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authorLukasz Majewski <l.majewski@samsung.com>2014-04-11 11:52:09 (GMT)
committerSylwester Nawrocki <s.nawrocki@samsung.com>2014-04-15 13:39:19 (GMT)
commitb06092716c445d40e7e50a9f9de45442a223d50c (patch)
treeac4fa1ea32dc5a40bfd6ec644457e21726a9f13c
parentd3e9d8f604f036d32d1511430f14705fb5cdef30 (diff)
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cpuidle:AFTR: Enable STANDBY_WFI0 and STANDBY_WFE0 for cpu0 in AFTR moderefs/changes/12/19412/2
Enabling of CORE0 idle state is based on the state of STANDBYWFI/STANDBYWFE internal signal. Change-Id: I43675fa312ce879f3741644057991bdb33f6cd55 Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
-rw-r--r--arch/arm/mach-exynos/cpuidle.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index 11c3db7..ca26770 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -107,6 +107,10 @@ static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
{
unsigned long tmp;
+ if (soc_is_exynos4412())
+ __raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0,
+ S5P_CENTRAL_SEQ_OPTION);
+
exynos4_set_wakeupmask();
/* Set value of power down register for aftr mode */