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authorChanho Park <chanho61.park@samsung.com>2013-11-05 07:48:16 (GMT)
committerChanho Park <chanho61.park@samsung.com>2014-04-16 12:47:07 (GMT)
commit6efc82535853ddffb3ac125afdfa1d39a0c5097a (patch)
tree13889fe26bcb4305f0a8360158d63f8b26d9dd1c
parentb9013103c03e5bcbf9d3a6c1f0d32f6c3a2296e6 (diff)
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arm64: mm: define dma_{alloc/free}_writecombine
This patch adds dma_alloc/free_writecombine macros for arm64. The ARMv8 supports 4 types of device memory. The write-combine is Device-GRE type which allows Device Gathering, Reordering and Early Write Acknowledgement. It almost same with normal memory except restricted speculative accesses. If we want to use a same driver which used in older ARM, we should define writecombine functions. Current AArch64 uses swiotlb for dma-mapping. Thus, we don't need to implement the dma-mapping supports such device memory types. Until it is implemented, we will use coherent_alloc. Signed-off-by: Chanho Park <chanho61.park@samsung.com>
-rw-r--r--arch/arm64/include/asm/dma-mapping.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/dma-mapping.h b/arch/arm64/include/asm/dma-mapping.h
index 3a4572e..76133f2 100644
--- a/arch/arm64/include/asm/dma-mapping.h
+++ b/arch/arm64/include/asm/dma-mapping.h
@@ -131,6 +131,22 @@ static inline void dma_free_attrs(struct device *dev, size_t size,
ops->free(dev, size, vaddr, dev_addr, attrs);
}
+static inline void *dma_alloc_writecombine(struct device *dev, size_t size,
+ dma_addr_t *dma_handle, gfp_t flag)
+{
+ DEFINE_DMA_ATTRS(attrs);
+ dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
+ return dma_alloc_attrs(dev, size, dma_handle, flag, &attrs);
+}
+
+static inline void dma_free_writecombine(struct device *dev, size_t size,
+ void *cpu_addr, dma_addr_t dma_handle)
+{
+ DEFINE_DMA_ATTRS(attrs);
+ dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
+ return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs);
+}
+
/*
* There is no dma_cache_sync() implementation, so just return NULL here.
*/