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| author | Jonghwa Lee <jonghwa3.lee@samsung.com> | 2014-02-03 17:31:33 +0900 |
|---|---|---|
| committer | Chanho Park <chanho61.park@samsung.com> | 2014-03-20 17:43:38 +0900 |
| commit | 3284e9433e06cb3f4c497be82b735aa9c4b53b14 (patch) | |
| tree | 52f74fb3ab858a906e889158388fa5f060308c9a | |
| parent | d9ffb5b2c63abe0ad52715e8572e92e031928c6e (diff) | |
| download | linux-3.10-3284e9433e06cb3f4c497be82b735aa9c4b53b14.tar.gz linux-3.10-3284e9433e06cb3f4c497be82b735aa9c4b53b14.tar.bz2 linux-3.10-3284e9433e06cb3f4c497be82b735aa9c4b53b14.zip | |
clk: exynos4: Keep 'chipid' clock enabled
During STR, we needed to access CHIP_ID, thus its clock should be online.
It's better to keep it enabled even in runtime for later suspend.
Change-Id: I057471e0aac3a9343b0ca8a73d4c8abf0ae36812
Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
| -rw-r--r-- | drivers/clk/samsung/clk-exynos4.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index e7c4c59b3ec..c0ee010c9e8 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -807,7 +807,8 @@ struct samsung_gate_clock exynos4210_gate_clks[] __initdata = { GATE(pcie, "pcie", "aclk133", GATE_IP_FSYS, 14, 0, 0), GATE(smmu_pcie, "smmu_pcie", "aclk133", GATE_IP_FSYS, 18, 0, 0), GATE(modemif, "modemif", "aclk100", GATE_IP_PERIL, 28, 0, 0), - GATE(chipid, "chipid", "aclk100", E4210_GATE_IP_PERIR, 0, 0, 0), + GATE(chipid, "chipid", "aclk100", E4210_GATE_IP_PERIR, 0, + CLK_IGNORE_UNUSED, 0), GATE(sysreg, "sysreg", "aclk100", E4210_GATE_IP_PERIR, 0, CLK_IGNORE_UNUSED, 0), GATE(hdmi_cec, "hdmi_cec", "aclk100", E4210_GATE_IP_PERIR, 11, 0, 0), @@ -837,7 +838,8 @@ struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = { GATE(mdma2, "mdma2", "aclk200", E4X12_GATE_IP_IMAGE, 2, 0, 0), GATE(smmu_mdma, "smmu_mdma", "aclk200", E4X12_GATE_IP_IMAGE, 5, 0, 0), GATE(mipi_hsi, "mipi_hsi", "aclk133", GATE_IP_FSYS, 10, 0, 0), - GATE(chipid, "chipid", "aclk100", E4X12_GATE_IP_PERIR, 0, 0, 0), + GATE(chipid, "chipid", "aclk100", E4X12_GATE_IP_PERIR, 0, + CLK_IGNORE_UNUSED, 0), GATE(sysreg, "sysreg", "aclk100", E4X12_GATE_IP_PERIR, 1, CLK_IGNORE_UNUSED, 0), GATE(hdmi_cec, "hdmi_cec", "aclk100", E4X12_GATE_IP_PERIR, 11, 0, 0), |