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authorRahul Sharma <rahul.sharma@samsung.com>2014-07-16 08:37:00 +0900
committerHyungwon Hwang <human.hwang@samsung.com>2014-12-17 16:18:12 +0900
commit0191324b7235e968be55fedeeabe126bf3a7afc3 (patch)
treefd2f0312a68a0861e83202f1264a5630cb31cd59
parent539d36410587fe1af52f7ad14bd38e05585c00d1 (diff)
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ARM: dts: remove display power domain for exynos5420
Display domain is removed due to instability issues. Explaining the problem below: exynos_init_late triggers the pm_genpd_poweroff_unused which powers off the unused power domains. This call hits before the trigger to deferred probes. DRM DP Panel defers the probe due to supply get failure. By the time, deferred probe is scheduled again, Display Power Domain is powered off by pm_genpd_poweroff_unused. FIMD and DP drivers are accessing registers during Probe and Bind callbacks. If display domain is enabled/disabled around register accesses, display domain gets unstable and we are getting Power Domain Disable fail notification. Increasing the Timeout also didn't help. Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi6
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 15957227ffd..b69de266101 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -265,11 +265,6 @@
clock-names = "oscclk", "pclk0", "clk0";
};
- disp_pd: power-domain@100440C0 {
- compatible = "samsung,exynos4210-pd";
- reg = <0x100440C0 0x20>;
- };
-
msc_pd: power-domain@10044120 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044120 0x20>;
@@ -521,7 +516,6 @@
};
fimd: fimd@14400000 {
- samsung,power-domain = <&disp_pd>;
clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
clock-names = "sclk_fimd", "fimd";
};