summaryrefslogtreecommitdiff
path: root/arch/mips/alchemy
AgeCommit message (Expand)AuthorFilesLines
2011-05-19Merge branch 'timers-clocksource-for-linus' of git://git.kernel.org/pub/scm/l...Linus Torvalds1-2/+1
2011-05-19MIPS: Alchemy: Clean up GPIO registers and accessorsManuel Lauss4-5/+5
2011-05-19MIPS: Alchemy: Cleanup DMA addressesManuel Lauss2-25/+29
2011-05-19MIPS: Alchemy: Rewrite ethernet platform setupManuel Lauss1-50/+101
2011-05-19MIPS: Alchemy: Rewrite UART setup and constants.Manuel Lauss7-63/+63
2011-05-19MIPS: Alchemy: Convert dbdma.c to syscore_opsManuel Lauss1-78/+45
2011-05-19MIPS: Alchemy: Convert irq.c to syscore_ops.Manuel Lauss1-60/+41
2011-05-19MIPS: Alchemy: irq code and constant cleanupManuel Lauss1-115/+135
2011-05-19MIPS: DB1200: Set Config[OD] for improved stability.Manuel Lauss2-2/+9
2011-05-14Merge branch 'consolidate-clksrc-i8253' of master.kernel.org:~rmk/linux-2.6-a...Thomas Gleixner13-132/+142
2011-05-10MIPS: Alchemy: fix xxs1500 build errorManuel Lauss1-3/+2
2011-05-10MIPS: Alchemy: Fix GCC 4.6.0 build error.Ralf Baechle1-28/+33
2011-03-31Fix common misspellingsLucas De Marchi1-1/+1
2011-03-29MIPS: Convert the irq functions to the new namesThomas Gleixner10-63/+63
2011-03-29MIPS: alchemy: Use proper irq accessorsThomas Gleixner1-7/+6
2011-03-25MIPS: Alchemy: Convert to new irq chip functionsThomas Gleixner2-57/+59
2011-03-14MIPS: Alchemy: Fix reset for MTX-1 and XXS1500Florian Fainelli2-4/+4
2011-03-14MIPS: MTX-1: Make au1000_eth probe all PHY addressesFlorian Fainelli1-0/+9
2011-02-21mips: convert to clocksource_register_hz/khzJohn Stultz1-2/+1
2010-12-22Merge branch 'master' into for-nextJiri Kosina2-3/+4
2010-12-16MIPS: Alchemy: fix build with SERIAL_8250=nManuel Lauss1-0/+2
2010-12-16MIPS: Alchemy: Add return value check for strict_strtoul()Yoichi Yuasa1-3/+2
2010-11-16suspend: constify platform_suspend_opsLionel Debroux1-1/+1
2010-11-01tree-wide: fix comment/printk typosUwe Kleine-König1-1/+1
2010-10-25Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiw...Linus Torvalds1-0/+6
2010-10-25Merge branch 'topic/asoc' into for-linusTakashi Iwai1-0/+6
2010-10-22Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6Linus Torvalds2-35/+28
2010-10-22Alchemy: Add UART PM methods.Manuel Lauss2-35/+28
2010-10-07MIPS: Add missing #inclusions of <linux/irq.h>David Howells1-0/+1
2010-10-04MIPS: Alchemy: Resolve prom section mismatchesManuel Lauss1-3/+2
2010-08-31ASoC: fix au1x platformManuel Lauss1-0/+6
2010-08-05MIPS: Ritually kill stupid printk.Ralf Baechle4-4/+0
2010-08-05MIPS: Alchemy: Add basic support for the GPR boardWolfgang Grandegger6-0/+361
2010-08-05MIPS: au1000_eth: Get ethernet address from platform_dataManuel Lauss1-1/+14
2010-08-05SERIAL: 8250: Remove SERIAL_8250_AU1X00Manuel Lauss1-2/+0
2010-08-05MIPS: Alchemy: remove SOC_AU1X00 in favor of MIPS_ALCHEMYManuel Lauss2-20/+3
2010-08-05MIPS: MTX-1: cleanup and commentsBruno Randolf1-8/+4
2010-08-05MIPS: Alchemy: Remove dead CONFIG_SOC_AU1000_FREQUENCYChristoph Egger1-4/+0
2010-08-05MIPS: Move Alchemy Makefile parts to their own Platform file.Manuel Lauss6-10/+109
2010-08-05MIPS: Alchemy: fix deprecated compile warningsFUJITA Tomonori1-4/+4
2010-08-05MIPS: Alchemy: move boards over to obj-yManuel Lauss2-3/+2
2010-08-05MIPS: MTX1: Fix build.Ralf Baechle3-3/+12
2010-07-26MIPS: Alchemy: Define eth platform devices in the correct orderWolfgang Grandegger1-4/+5
2010-07-26MIPS: MTX-1: Fix PCI on the MeshCube and related boardsBruno Randolf1-5/+3
2010-07-05MIPS: Alchemy: sleepcode without compile-time cputype dependenciesManuel Lauss2-31/+62
2010-05-21MIPS: Alchemy: add sysdev for DBDMA PM.Manuel Lauss2-40/+72
2010-05-21MIPS: Alchemy: add sysdev for IRQ PM.Manuel Lauss2-89/+90
2010-05-21MIPS: Alchemy: Fix up residual devboard poweroff/reboot code.Manuel Lauss5-22/+15
2010-04-30MIPS: DB1200: PCMCIA card detection must not be auto-enabled.Manuel Lauss1-3/+7
2010-04-12MIPS: Alchemy: DB1200: Remove custom wait implementationManuel Lauss1-40/+0
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-30 10:32:42 +0000