diff options
Diffstat (limited to 'core/arch/arm/plat-rpi3')
| -rw-r--r-- | core/arch/arm/plat-rpi3/conf.mk | 39 | ||||
| -rw-r--r-- | core/arch/arm/plat-rpi3/kern.ld.S | 1 | ||||
| -rw-r--r-- | core/arch/arm/plat-rpi3/link.mk | 1 | ||||
| -rw-r--r-- | core/arch/arm/plat-rpi3/main.c | 94 | ||||
| -rw-r--r-- | core/arch/arm/plat-rpi3/platform_config.h | 95 | ||||
| -rw-r--r-- | core/arch/arm/plat-rpi3/sub.mk | 2 |
6 files changed, 232 insertions, 0 deletions
diff --git a/core/arch/arm/plat-rpi3/conf.mk b/core/arch/arm/plat-rpi3/conf.mk new file mode 100644 index 0000000..567680a --- /dev/null +++ b/core/arch/arm/plat-rpi3/conf.mk @@ -0,0 +1,39 @@ +# 32-bit flags +arm32-platform-cpuarch := cortex-a53 +arm32-platform-cflags += -mcpu=$(arm32-platform-cpuarch) +arm32-platform-aflags += -mcpu=$(arm32-platform-cpuarch) +core_arm32-platform-aflags += -mfpu=neon + +$(call force,CFG_8250_UART,y) +$(call force,CFG_GENERIC_BOOT,y) +$(call force,CFG_HWSUPP_MEM_PERM_PXN,y) +$(call force,CFG_PM_STUBS,y) +$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) +$(call force,CFG_WITH_ARM_TRUSTED_FW,y) + +ta-targets = ta_arm32 + +ifeq ($(CFG_ARM64_core),y) +$(call force,CFG_WITH_LPAE,y) +ta-targets += ta_arm64 +else +$(call force,CFG_ARM32_core,y) +endif + +CFG_NUM_THREADS ?= 4 +CFG_CRYPTO_WITH_CE ?= n +CFG_WITH_STACK_CANARIES ?= y + +CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= y +CFG_TEE_FS_KEY_MANAGER_TEST ?= y +CFG_WITH_STACK_CANARIES ?= y +CFG_WITH_STATS ?= y + +arm32-platform-cflags += -Wno-error=cast-align +arm64-platform-cflags += -Wno-error=cast-align + +$(call force,CFG_CRYPTO_SHA256_ARM32_CE,n) +$(call force,CFG_CRYPTO_SHA256_ARM64_CE,n) +$(call force,CFG_CRYPTO_SHA1_ARM32_CE,n) +$(call force,CFG_CRYPTO_SHA1_ARM64_CE,n) +$(call force,CFG_CRYPTO_AES_ARM64_CE,n) diff --git a/core/arch/arm/plat-rpi3/kern.ld.S b/core/arch/arm/plat-rpi3/kern.ld.S new file mode 100644 index 0000000..8d794ee --- /dev/null +++ b/core/arch/arm/plat-rpi3/kern.ld.S @@ -0,0 +1 @@ +#include "../kernel/kern.ld.S" diff --git a/core/arch/arm/plat-rpi3/link.mk b/core/arch/arm/plat-rpi3/link.mk new file mode 100644 index 0000000..448ab89 --- /dev/null +++ b/core/arch/arm/plat-rpi3/link.mk @@ -0,0 +1 @@ +include core/arch/arm/kernel/link.mk diff --git a/core/arch/arm/plat-rpi3/main.c b/core/arch/arm/plat-rpi3/main.c new file mode 100644 index 0000000..9270e19 --- /dev/null +++ b/core/arch/arm/plat-rpi3/main.c @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2016, Sequitur Labs Inc. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include <console.h> +#include <drivers/serial8250_uart.h> +#include <kernel/generic_boot.h> +#include <kernel/panic.h> +#include <kernel/pm_stubs.h> +#include <mm/core_memprot.h> +#include <mm/tee_pager.h> +#include <platform_config.h> +#include <stdint.h> +#include <tee/entry_fast.h> +#include <tee/entry_std.h> + +static void main_fiq(void) +{ + panic(); +} + +static const struct thread_handlers handlers = { + .std_smc = tee_entry_std, + .fast_smc = tee_entry_fast, + .fiq = main_fiq, + .cpu_on = cpu_on_handler, + .cpu_off = pm_do_nothing, + .cpu_suspend = pm_do_nothing, + .cpu_resume = pm_do_nothing, + .system_off = pm_do_nothing, + .system_reset = pm_do_nothing, +}; + +const struct thread_handlers *generic_boot_get_handlers(void) +{ + return &handlers; +} + +static vaddr_t console_base(void) +{ + static vaddr_t va; + + if (cpu_mmu_enabled()) { + if (!va) + va = (vaddr_t)phys_to_virt(CONSOLE_UART_BASE, + MEM_AREA_IO_NSEC); + return va; + } + + return CONSOLE_UART_BASE; +} + +void console_putc(int ch) +{ + vaddr_t base = console_base(); + + if (ch == '\n') + serial8250_uart_putc('\r', base); + serial8250_uart_putc(ch, base); +} + +void console_init(void) +{ + serial8250_uart_init(console_base(), CONSOLE_UART_CLK_IN_HZ, + CONSOLE_BAUDRATE); +} + +void console_flush(void) +{ + serial8250_uart_flush_tx_fifo(console_base()); +} diff --git a/core/arch/arm/plat-rpi3/platform_config.h b/core/arch/arm/plat-rpi3/platform_config.h new file mode 100644 index 0000000..ac53e26 --- /dev/null +++ b/core/arch/arm/plat-rpi3/platform_config.h @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2016, Sequitur Labs Inc. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef PLATFORM_CONFIG_H +#define PLATFORM_CONFIG_H + +/* Make stacks aligned to data cache line length */ +#define STACK_ALIGNMENT 64 + +#ifdef ARM64 +#ifdef CFG_WITH_PAGER +#error "Pager not supported for ARM64" +#endif +#endif /* ARM64 */ + +/* 16550 UART */ +#define CONSOLE_UART_BASE 0x3f215040 /* UART0 */ +#define CONSOLE_BAUDRATE 115200 +#define CONSOLE_UART_CLK_IN_HZ 19200000 + +/* + * RPi memory map + * + * No secure memory on RPi... + * + * + * Available to Linux <above> + * 0x0a00_0000 + * TA RAM: 16 MiB | + * 0x0842_0000 | TZDRAM + * TEE RAM: 4 MiB (CFG_TEE_RAM_VA_SIZE) | + * 0x0840_0000 [ARM Trusted Firmware ] - + * 0x0840_0000 [TZDRAM_BASE, BL32_LOAD_ADDR] - + * Shared memory: 4 MiB | + * 0x0800_0000 | DRAM0 + * Available to Linux | + * 0x0000_0000 [DRAM0_BASE] - + * + */ + +#define DRAM0_BASE 0x00000000 +#define DRAM0_SIZE 0x40000000 + +/* Below ARM-TF */ +#define CFG_SHMEM_START (0x08000000) +#define CFG_SHMEM_SIZE (4 * 1024 * 1024) + +#define TZDRAM_BASE (CFG_SHMEM_START + CFG_SHMEM_SIZE) +#define TZDRAM_SIZE (32 * 1024 * 1024) + +#define CFG_TEE_CORE_NB_CORE 4 + +#define CFG_TEE_RAM_VA_SIZE (4 * 1024 * 1024) + +#define CFG_TEE_LOAD_ADDR (TZDRAM_BASE + 0x20000) + +#define CFG_TEE_RAM_PH_SIZE CFG_TEE_RAM_VA_SIZE +#define CFG_TEE_RAM_START TZDRAM_BASE + +#define CFG_TA_RAM_START ROUNDUP((TZDRAM_BASE + CFG_TEE_RAM_VA_SIZE), \ + CORE_MMU_DEVICE_SIZE) + +# define CFG_TA_RAM_SIZE (16 * 1024 * 1024) + +#define DEVICE0_BASE ROUNDDOWN(CONSOLE_UART_BASE, \ + CORE_MMU_DEVICE_SIZE) +#define DEVICE0_PA_BASE DEVICE0_BASE +#define DEVICE0_SIZE CORE_MMU_DEVICE_SIZE +#define DEVICE0_TYPE MEM_AREA_IO_NSEC + +#endif /* PLATFORM_CONFIG_H */ diff --git a/core/arch/arm/plat-rpi3/sub.mk b/core/arch/arm/plat-rpi3/sub.mk new file mode 100644 index 0000000..8ddc2fd --- /dev/null +++ b/core/arch/arm/plat-rpi3/sub.mk @@ -0,0 +1,2 @@ +global-incdirs-y += . +srcs-y += main.c |