diff options
Diffstat (limited to 'core/arch/arm/plat-mediatek')
| -rw-r--r-- | core/arch/arm/plat-mediatek/conf.mk | 25 | ||||
| -rw-r--r-- | core/arch/arm/plat-mediatek/kern.ld.S | 1 | ||||
| -rw-r--r-- | core/arch/arm/plat-mediatek/link.mk | 1 | ||||
| -rw-r--r-- | core/arch/arm/plat-mediatek/main.c | 93 | ||||
| -rw-r--r-- | core/arch/arm/plat-mediatek/mt8173_core_pos_a32.S | 51 | ||||
| -rw-r--r-- | core/arch/arm/plat-mediatek/mt8173_core_pos_a64.S | 47 | ||||
| -rw-r--r-- | core/arch/arm/plat-mediatek/platform_config.h | 108 | ||||
| -rw-r--r-- | core/arch/arm/plat-mediatek/sub.mk | 6 |
8 files changed, 332 insertions, 0 deletions
diff --git a/core/arch/arm/plat-mediatek/conf.mk b/core/arch/arm/plat-mediatek/conf.mk new file mode 100644 index 0000000..81642b6 --- /dev/null +++ b/core/arch/arm/plat-mediatek/conf.mk @@ -0,0 +1,25 @@ +PLATFORM_FLAVOR ?= mt8173 + +# 32-bit flags +arm32-platform-cpuarch := cortex-a15 +arm32-platform-cflags += -mcpu=$(arm32-platform-cpuarch) +arm32-platform-aflags += -mcpu=$(arm32-platform-cpuarch) +arm32-platform-aflags += -mfpu=neon + +$(call force,CFG_8250_UART,y) +$(call force,CFG_GENERIC_BOOT,y) +$(call force,CFG_HWSUPP_MEM_PERM_PXN,y) +$(call force,CFG_PM_STUBS,y) +$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) +$(call force,CFG_WITH_ARM_TRUSTED_FW,y) + +ta-targets = ta_arm32 + +ifeq ($(CFG_ARM64_core),y) +$(call force,CFG_WITH_LPAE,y) +ta-targets += ta_arm64 +else +$(call force,CFG_ARM32_core,y) +endif + +CFG_WITH_STACK_CANARIES ?= y diff --git a/core/arch/arm/plat-mediatek/kern.ld.S b/core/arch/arm/plat-mediatek/kern.ld.S new file mode 100644 index 0000000..8d794ee --- /dev/null +++ b/core/arch/arm/plat-mediatek/kern.ld.S @@ -0,0 +1 @@ +#include "../kernel/kern.ld.S" diff --git a/core/arch/arm/plat-mediatek/link.mk b/core/arch/arm/plat-mediatek/link.mk new file mode 100644 index 0000000..448ab89 --- /dev/null +++ b/core/arch/arm/plat-mediatek/link.mk @@ -0,0 +1 @@ +include core/arch/arm/kernel/link.mk diff --git a/core/arch/arm/plat-mediatek/main.c b/core/arch/arm/plat-mediatek/main.c new file mode 100644 index 0000000..7780591 --- /dev/null +++ b/core/arch/arm/plat-mediatek/main.c @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2015, Linaro Limited + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include <console.h> +#include <drivers/serial8250_uart.h> +#include <kernel/generic_boot.h> +#include <kernel/panic.h> +#include <kernel/pm_stubs.h> +#include <mm/core_memprot.h> +#include <platform_config.h> +#include <stdint.h> +#include <tee/entry_std.h> +#include <tee/entry_fast.h> + +static void main_fiq(void); + +static const struct thread_handlers handlers = { + .std_smc = tee_entry_std, + .fast_smc = tee_entry_fast, + .fiq = main_fiq, + .cpu_on = cpu_on_handler, + .cpu_off = pm_do_nothing, + .cpu_suspend = pm_do_nothing, + .cpu_resume = pm_do_nothing, + .system_off = pm_do_nothing, + .system_reset = pm_do_nothing, +}; + +const struct thread_handlers *generic_boot_get_handlers(void) +{ + return &handlers; +} + +static void main_fiq(void) +{ + panic(); +} + +static vaddr_t console_base(void) +{ + static void *va; + + if (cpu_mmu_enabled()) { + if (!va) + va = phys_to_virt(CONSOLE_UART_BASE, MEM_AREA_IO_NSEC); + return (vaddr_t)va; + } + return CONSOLE_UART_BASE; +} + +void console_init(void) +{ + serial8250_uart_init(console_base(), CONSOLE_UART_CLK_IN_HZ, + CONSOLE_BAUDRATE); +} + +void console_putc(int ch) +{ + vaddr_t base = console_base(); + + if (ch == '\n') + serial8250_uart_putc('\r', base); + serial8250_uart_putc(ch, base); +} + +void console_flush(void) +{ + serial8250_uart_flush_tx_fifo(console_base()); +} diff --git a/core/arch/arm/plat-mediatek/mt8173_core_pos_a32.S b/core/arch/arm/plat-mediatek/mt8173_core_pos_a32.S new file mode 100644 index 0000000..227deb3 --- /dev/null +++ b/core/arch/arm/plat-mediatek/mt8173_core_pos_a32.S @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2015, Linaro Limited + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include <asm.S> +#include <arm.h> +#include <arm32_macros.S> +#include <kernel/unwind.h> + +FUNC get_core_pos , : +UNWIND( .fnstart) + read_mpidr r0 + and r1, r0, #MPIDR_CPU_MASK + and r0, r0, #MPIDR_CLUSTER_MASK + /* + * Number of cores in cluster is 2, + * we should have the following mapping: + * MPIDR core_pos + * 0x0000 -> 0 + * 0x0001 -> 1 + * 0x0100 -> 2 + * 0x0101 -> 3 + */ + add r0, r1, r0, LSR #7 + bx lr +UNWIND( .fnend) +END_FUNC get_core_pos + diff --git a/core/arch/arm/plat-mediatek/mt8173_core_pos_a64.S b/core/arch/arm/plat-mediatek/mt8173_core_pos_a64.S new file mode 100644 index 0000000..a1c3b3e --- /dev/null +++ b/core/arch/arm/plat-mediatek/mt8173_core_pos_a64.S @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2015, Linaro Limited + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include <asm.S> +#include <arm.h> + +FUNC get_core_pos , : + mrs x0, mpidr_el1 + and x1, x0, #MPIDR_CPU_MASK + and x0, x0, #MPIDR_CLUSTER_MASK + /* + * Number of cores in cluster is 2, + * we should have the following mapping: + * MPIDR core_pos + * 0x0000 -> 0 + * 0x0001 -> 1 + * 0x0100 -> 2 + * 0x0101 -> 3 + */ + add x0, x1, x0, LSR #7 + ret +END_FUNC get_core_pos + diff --git a/core/arch/arm/plat-mediatek/platform_config.h b/core/arch/arm/plat-mediatek/platform_config.h new file mode 100644 index 0000000..7fe2f93 --- /dev/null +++ b/core/arch/arm/plat-mediatek/platform_config.h @@ -0,0 +1,108 @@ +/* + * Copyright (c) 2015, Linaro Limited + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef PLATFORM_CONFIG_H +#define PLATFORM_CONFIG_H + +/* Make stacks aligned to data cache line length */ +#define STACK_ALIGNMENT 64 + +#ifdef ARM64 +#ifdef CFG_WITH_PAGER +#error "Pager not supported for ARM64" +#endif +#endif /*ARM64*/ + +#if defined(PLATFORM_FLAVOR_mt8173) + +#define GIC_BASE 0x10220000 +#define GICC_OFFSET 0x2000 +#define GICD_OFFSET 0x1000 + +#define UART0_BASE 0x11002000 +#define UART1_BASE 0x11003000 +#define UART2_BASE 0x11004000 +#define UART3_BASE 0x11005000 + +#define CONSOLE_UART_BASE UART0_BASE +#define CONSOLE_BAUDRATE 921600 +#define CONSOLE_UART_CLK_IN_HZ 26000000 + +#define DRAM0_BASE 0x40000000 +#define DRAM0_SIZE 0x80000000 + +/* Location of trusted dram */ +#define TZDRAM_BASE 0xBE000000 +#define TZDRAM_SIZE 0x02000000 + +#define CFG_TEE_CORE_NB_CORE 4 + +/* Full GlobalPlatform test suite requires CFG_SHMEM_SIZE to be at least 2MB */ +#define CFG_SHMEM_START (TZDRAM_BASE - 0x200000) +#define CFG_SHMEM_SIZE 0x200000 + +#else +#error "Unknown platform flavor" +#endif + +#define CFG_TEE_RAM_VA_SIZE (1024 * 1024) + +#ifndef CFG_TEE_LOAD_ADDR +#define CFG_TEE_LOAD_ADDR CFG_TEE_RAM_START +#endif + +/* + * Everything is in TZDRAM. + * +------------------+ + * | | TEE_RAM | + * + TZDRAM +---------+ + * | | TA_RAM | + * +--------+---------+ + */ +#define CFG_TEE_RAM_PH_SIZE CFG_TEE_RAM_VA_SIZE +#define CFG_TEE_RAM_START TZDRAM_BASE +#define CFG_TA_RAM_START ROUNDUP((TZDRAM_BASE + CFG_TEE_RAM_VA_SIZE), \ + CORE_MMU_DEVICE_SIZE) +#define CFG_TA_RAM_SIZE ROUNDDOWN((TZDRAM_SIZE - CFG_TEE_RAM_VA_SIZE), \ + CORE_MMU_DEVICE_SIZE) + +#define DEVICE0_PA_BASE ROUNDDOWN(CONSOLE_UART_BASE, \ + CORE_MMU_DEVICE_SIZE) +#define DEVICE0_VA_BASE DEVICE0_PA_BASE +#define DEVICE0_SIZE CORE_MMU_DEVICE_SIZE +#define DEVICE0_TYPE MEM_AREA_IO_NSEC + +#define DEVICE1_PA_BASE ROUNDDOWN(GIC_BASE, CORE_MMU_DEVICE_SIZE) +#define DEVICE1_VA_BASE DEVICE1_PA_BASE +#define DEVICE1_SIZE CORE_MMU_DEVICE_SIZE +#define DEVICE1_TYPE MEM_AREA_IO_SEC + +#ifdef CFG_WITH_LPAE +#define MAX_XLAT_TABLES 5 +#endif + +#endif /*PLATFORM_CONFIG_H*/ diff --git a/core/arch/arm/plat-mediatek/sub.mk b/core/arch/arm/plat-mediatek/sub.mk new file mode 100644 index 0000000..95a8571 --- /dev/null +++ b/core/arch/arm/plat-mediatek/sub.mk @@ -0,0 +1,6 @@ +global-incdirs-y += . +srcs-y += main.c +ifeq ($(PLATFORM_FLAVOR),mt8173) +srcs-$(CFG_ARM32_core) += mt8173_core_pos_a32.S +srcs-$(CFG_ARM64_core) += mt8173_core_pos_a64.S +endif |