summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authoregukim <egukim@dignsys.com>2017-10-24 02:49:47 (GMT)
committereunggu kim <egukim@dignsys.com>2017-11-14 13:44:37 (GMT)
commit55074beb232064345583ffa4de3e4e33020fed47 (patch)
tree9608812d66d57ec6c5b3fe88bfaed31fd12fddcf
parentade5579e84527ddcac19e324764035b6b81a9ae0 (diff)
downloadtef-optee_os-55074beb232064345583ffa4de3e4e33020fed47.zip
tef-optee_os-55074beb232064345583ffa4de3e4e33020fed47.tar.gz
tef-optee_os-55074beb232064345583ffa4de3e4e33020fed47.tar.bz2
artik710: porting for optee 2.4refs/changes/51/157251/4
This patch rewrote the s5p6818 uart driver for the optee2.4 framework. And revised build config for optee 2.4 build Cryptographic extensions disable as rpi3 Change-Id: Ie31101761bb1b278804824c60e1081666054c021 Signed-off-by: egukim <egukim@dignsys.com>
-rw-r--r--core/arch/arm/plat-s5p6818/conf.mk30
-rw-r--r--core/arch/arm/plat-s5p6818/main.c16
-rw-r--r--core/arch/arm/plat-s5p6818/platform_config.h4
-rw-r--r--core/drivers/s5p6818_uart.c80
-rw-r--r--core/include/drivers/s5p6818_uart.h15
5 files changed, 72 insertions, 73 deletions
diff --git a/core/arch/arm/plat-s5p6818/conf.mk b/core/arch/arm/plat-s5p6818/conf.mk
index b7afa1f..33f3e08 100644
--- a/core/arch/arm/plat-s5p6818/conf.mk
+++ b/core/arch/arm/plat-s5p6818/conf.mk
@@ -4,11 +4,10 @@ include core/arch/$(ARCH)/plat-$(PLATFORM)/platform_flags.mk
core-platform-cppflags += -I$(arch-dir)/include
-$(call force,libutil_with_isoc,y)
$(call force,CFG_GENERIC_BOOT,y)
$(call force,CFG_HWSUPP_MEM_PERM_PXN,y)
$(call force,CFG_S5P6818_UART,y)
-$(call force,CFG_S5P6818_TIEOFF,y)
+#$(call force,CFG_S5P6818_TIEOFF,y)
#$(call force,CFG_GIC,y)
$(call force,CFG_PM_STUBS,y)
#$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
@@ -24,24 +23,13 @@ $(call force,CFG_MMU_V7_TTB,y)
endif
libtomcrypt_with_optimize_size ?= y
-CFG_CRYPTO_AES_ARM64_CE ?= $(CFG_ARM64_core)
-CFG_CRYPTO_SHA1_ARM32_CE ?= $(CFG_ARM32_core)
-CFG_CRYPTO_SHA1_ARM64_CE ?= $(CFG_ARM64_core)
-CFG_CRYPTO_SHA256_ARM32_CE ?= $(CFG_ARM32_core)
-CFG_CRYPTO_SHA256_ARM64_CE ?= $(CFG_ARM64_core)
CFG_WITH_STACK_CANARIES ?= y
+CFG_CORE_HEAP_SIZE ?= 24576
+# Number of threads
+CFG_NUM_THREADS ?= 8
-ifeq ($(CFG_CRYPTO_SHA256_ARM32_CE),y)
-$(call force,CFG_WITH_VFP,y)
-endif
-ifeq ($(CFG_CRYPTO_SHA1_ARM32_CE),y)
-$(call force,CFG_WITH_VFP,y)
-endif
-ifeq ($(CFG_CRYPTO_SHA1_ARM64_CE),y)
-$(call force,CFG_WITH_VFP,y)
-endif
-ifeq ($(CFG_CRYPTO_AES_ARM64_CE),y)
-$(call force,CFG_WITH_VFP,y)
-endif
-
-include mk/config.mk
+$(call force,CFG_CRYPTO_SHA256_ARM32_CE,n)
+$(call force,CFG_CRYPTO_SHA256_ARM64_CE,n)
+$(call force,CFG_CRYPTO_SHA1_ARM32_CE,n)
+$(call force,CFG_CRYPTO_SHA1_ARM64_CE,n)
+$(call force,CFG_CRYPTO_AES_ARM64_CE,n)
diff --git a/core/arch/arm/plat-s5p6818/main.c b/core/arch/arm/plat-s5p6818/main.c
index e907ffd..45e45ba 100644
--- a/core/arch/arm/plat-s5p6818/main.c
+++ b/core/arch/arm/plat-s5p6818/main.c
@@ -55,6 +55,8 @@ static const struct thread_handlers handlers = {
.system_reset = pm_do_nothing,
};
+static struct s5p6818_uart_data console_data __early_bss;
+
const struct thread_handlers *generic_boot_get_handlers(void)
{
return &handlers;
@@ -76,19 +78,9 @@ static void main_fiq(void)
void console_init(void)
{
- s5p6818_uart_init(CONSOLE_UART_BASE,
+ s5p6818_uart_init(&console_data, CONSOLE_UART_BASE,
CONSOLE_UART_CLK_IN_HZ,
CONSOLE_BAUDRATE);
+ register_serial_console(&console_data.chip);
}
-void console_putc(int ch)
-{
- s5p6818_uart_putc(ch, CONSOLE_UART_BASE);
- if (ch == '\n')
- s5p6818_uart_putc('\r', CONSOLE_UART_BASE);
-}
-
-void console_flush(void)
-{
- s5p6818_uart_flush(CONSOLE_UART_BASE);
-}
diff --git a/core/arch/arm/plat-s5p6818/platform_config.h b/core/arch/arm/plat-s5p6818/platform_config.h
index 8d9c0cb..e21ea2a 100644
--- a/core/arch/arm/plat-s5p6818/platform_config.h
+++ b/core/arch/arm/plat-s5p6818/platform_config.h
@@ -59,9 +59,6 @@
#define CONSOLE_BAUDRATE 115200
#define CONSOLE_UART_CLK_IN_HZ 19200000
-
-#define HEAP_SIZE (24 * 1024)
-
/*
* nexell memory map
*
@@ -144,6 +141,7 @@
#define DEVICE0_BASE ROUNDDOWN(CONSOLE_UART_BASE, \
CORE_MMU_DEVICE_SIZE)
+#define DEVICE0_PA_BASE DEVICE0_BASE
#define DEVICE0_SIZE CORE_MMU_DEVICE_SIZE
#define DEVICE0_TYPE MEM_AREA_IO_NSEC
diff --git a/core/drivers/s5p6818_uart.c b/core/drivers/s5p6818_uart.c
index b12ccef..659831f 100644
--- a/core/drivers/s5p6818_uart.c
+++ b/core/drivers/s5p6818_uart.c
@@ -26,10 +26,13 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include <compiler.h>
+#include <console.h>
#include <drivers/s5p6818_uart.h>
-#include <drivers/s5p6818_tieoff.h>
#include <io.h>
-#include <compiler.h>
+#include <keep.h>
+#include <util.h>
+#include <platform_config.h>
/* NX_UART Registers */
#define UARTDLCON 0x00 /* Line Control */
@@ -48,13 +51,6 @@
#define UARTINTSP 0x34 /* Instrrupt Source */
#define UARTINTM 0x38 /* Instrrupt Mask */
-#define UART0_BASE 0xC00A1000
-#define UART1_BASE 0xC00A0000
-#define UART2_BASE 0xC00A2000
-#define UART3_BASE 0xC00A3000
-#define UART4_BASE 0xC006D000
-#define UART5_BASE 0xC006F000
-
#define NUMBER_OF_RESET_MODULE_PIN 69
#define UART_RST_BASE 50
@@ -69,7 +65,7 @@
/* Transmit BUFFER empty bit in UARTTRSTAT register */
/* FIXME - Modify and use it after confirming the operation. */
-#if 0
+#ifdef CFG_S5P6818_TIEOFF
static int s5p6818_uart_get_ch_num(vaddr_t base)
{
int ch = 0;
@@ -200,7 +196,7 @@ static void uart_tieoff_set(uint32_t ch)
};
}
-void s5p6818_uart_init(vaddr_t base, uint32_t uart_clk, uint32_t baud_rate)
+void s5p6818_uart_tieoff_init(paddr_t base, uint32_t uart_clk, uint32_t baud_rate)
{
int ch = s5p6818_uart_get_ch_num(base);
@@ -224,40 +220,66 @@ void s5p6818_uart_init(vaddr_t base, uint32_t uart_clk, uint32_t baud_rate)
}
#endif
-void s5p6818_uart_flush(vaddr_t base)
+static vaddr_t chip_to_base(struct serial_chip *chip)
+{
+ struct s5p6818_uart_data *pd =
+ container_of(chip, struct s5p6818_uart_data, chip);
+
+ return io_pa_or_va(&pd->base);
+}
+
+static void s5p6818_uart_flush(struct serial_chip *chip)
{
+ vaddr_t base = chip_to_base(chip);
+
while (!(read32(base + UARTTRSTAT) & NX_UARTTRSTAT_TX_EMPTY_BIT))
;
}
-void s5p6818_uart_init(vaddr_t base __unused,
- uint32_t uart_clk __unused,
- uint32_t baud_rate __unused)
+static bool s5p6818_uart_have_rx_data(struct serial_chip *chip)
{
- return;
+ vaddr_t base = chip_to_base(chip);
+
+ return !(read32(base + UARTFSTAT) & NX_UARTFSTAT_RXFE_BIT);
}
-void s5p6818_uart_putc(int ch, vaddr_t base)
+static int s5p6818_uart_getchar(struct serial_chip *chip)
{
- /*
- * Wait until there is space in the FIFO
- */
- while (read32(base + UARTFSTAT) & NX_UARTFSTAT_TXFF_BIT)
+ vaddr_t base = chip_to_base(chip);
+
+ while (!s5p6818_uart_have_rx_data(chip))
;
+ return read32(base + UARTRXH) & 0xff;
+}
+
+static void s5p6818_uart_putc(struct serial_chip *chip, int ch)
+{
+ vaddr_t base = chip_to_base(chip);
+
+ s5p6818_uart_flush(chip);
/* Send the character */
write32(ch, base + UARTTXH);
}
-bool s5p6818_uart_have_rx_data(vaddr_t base)
-{
- return !(read32(base + UARTFSTAT) & NX_UARTFSTAT_RXFE_BIT);
-}
+static const struct serial_ops s5p6818_uart_ops = {
+ .flush = s5p6818_uart_flush,
+ .getchar = s5p6818_uart_getchar,
+ .have_rx_data = s5p6818_uart_have_rx_data,
+ .putc = s5p6818_uart_putc,
+};
+KEEP_PAGER(s5p6818_uart_ops);
-int s5p6818_uart_getchar(vaddr_t base)
+void s5p6818_uart_init(struct s5p6818_uart_data *pd, paddr_t base,
+ uint32_t __unused uart_clk,
+ uint32_t __unused baud_rate)
{
- while (!s5p6818_uart_have_rx_data(base))
- ;
- return read32(base + UARTRXH) & 0xff;
+ pd->base.pa = base;
+ pd->chip.ops = &s5p6818_uart_ops;
+
+#ifdef CFG_S5P6818_TIEOFF
+ s5p6818_uart_tieoff_init(base, uart_clk, baud_rate);
+#endif
+ return;
}
diff --git a/core/include/drivers/s5p6818_uart.h b/core/include/drivers/s5p6818_uart.h
index 6ec928b..e4a4442 100644
--- a/core/include/drivers/s5p6818_uart.h
+++ b/core/include/drivers/s5p6818_uart.h
@@ -30,16 +30,15 @@
#define __S5P6818_UART_H__
#include <types_ext.h>
+#include <drivers/serial.h>
-void s5p6818_uart_init(vaddr_t base, uint32_t uart_clk, uint32_t baud_rate);
+struct s5p6818_uart_data {
+ struct io_pa_va base;
+ struct serial_chip chip;
+};
-void s5p6818_uart_putc(int ch, vaddr_t base);
-
-void s5p6818_uart_flush(vaddr_t base);
-
-bool s5p6818_uart_have_rx_data(vaddr_t base);
-
-int s5p6818_uart_getchar(vaddr_t base);
+void s5p6818_uart_init(struct s5p6818_uart_data *pd, paddr_t base,
+ uint32_t uart_clk, uint32_t baud_rate);
#endif /* __S5P6818_UART_H__ */