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#include "ICLTensor.h"
namespace neurun
{
namespace backend
{
namespace acl_cl
{
namespace operand
{
size_t ICLTensor::total_size() const { return info()->total_size(); }
size_t ICLTensor::dimension(size_t index) const { return info()->dimension(index); }
size_t ICLTensor::num_dimensions() const { return info()->num_dimensions(); }
size_t ICLTensor::calcOffset(const neurun::util::feature::Coordinate4D &coords)
{
int32_t N = coords.n();
int32_t C = coords.c();
int32_t H = coords.h();
int32_t W = coords.w();
::arm_compute::Coordinates coordinates{W, H, C, N};
return info()->offset_element_in_bytes(coordinates);
}
arm_compute::DataType ICLTensor::data_type() const { return info()->data_type(); }
uint8_t *ICLTensor::buffer() const { return handle()->buffer(); }
const cl::Buffer &ICLTensor::cl_buffer() const { return handle()->cl_buffer(); }
arm_compute::ITensorInfo *ICLTensor::info() const { return handle()->info(); }
arm_compute::ITensorInfo *ICLTensor::info() { return handle()->info(); }
void ICLTensor::map(cl::CommandQueue &q, bool blocking) { return handle()->map(q, blocking); }
void ICLTensor::unmap(cl::CommandQueue &q) { return handle()->unmap(q); }
void ICLTensor::clear(cl::CommandQueue &q) { return handle()->clear(q); }
} // namespace operand
} // namespace acl_cl
} // namespace backend
} // namespace neurun
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