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/*
* Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __NEURUN_BACKEND_ITENSOR_BUILDER_H__
#define __NEURUN_BACKEND_ITENSOR_BUILDER_H__
#include <map>
#include "ir/Index.h"
#include "ir/OperandInfo.h"
#include "ir/Operation.h"
#include "ir/Layout.h"
#include "operand/ITensor.h"
#include "compiler/SubTensorInfo.h"
#include "ITensorManager.h"
namespace neurun
{
namespace backend
{
struct ITensorBuilder
{
using IterateFunction = std::function<void(const ir::OperandIndex &)>;
virtual ~ITensorBuilder(void) = default;
// TODO Merge registerTensorInfo and registerSubTensorInfo using abstraction by internal class
/**
* @brief Register tensor information to allocate on backend
*/
virtual void registerTensorInfo(const ir::OperandIndex &, const ir::OperandInfo &,
ir::Layout backend_layout, bool as_const) = 0;
/**
* @brief Register subtensor information to allocate on backend
*/
virtual void registerSubTensorInfo(const ir::OperandIndex &, const compiler::SubTensorInfo &) = 0;
virtual void notifyFirstUse(const ir::OperandIndex &) = 0;
virtual void notifyLastUse(const ir::OperandIndex &) = 0;
virtual bool isRegistered(const ir::OperandIndex &) const = 0;
virtual void prepare(void) = 0;
virtual void allocateConsts() = 0;
virtual void allocateNonconsts() = 0;
virtual void postFunctionPrepare() = 0;
virtual void finalize() = 0;
virtual std::shared_ptr<::neurun::backend::operand::ITensor>
tensorAt(const ir::OperandIndex &ind) = 0;
virtual void iterate(const IterateFunction &fn) = 0;
virtual void preVisit(const ir::Operation &) = 0;
virtual void postVisit(const ir::Operation &) = 0;
virtual std::unique_ptr<ITensorManager> releaseTensorManager(void) = 0;
};
} // namespace backend
} // namespace neurun
#include <unordered_set>
#include <memory>
namespace neurun
{
namespace backend
{
using TensorBuilderSet = std::unordered_set<std::shared_ptr<backend::ITensorBuilder>>;
} // namespace backend
} // namespace neurun
#endif // __NEURUN_BACKEND_ITENSOR_BUILDER_H__
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