blob: dec680873e68eba98a4054452d29acfe8632c6b4 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
|
/*
* Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __NEURUN_BACKEND_CPU_OPERAND_TENSOR_H__
#define __NEURUN_BACKEND_CPU_OPERAND_TENSOR_H__
#include <backend/operand/ITensor.h>
#include "ir/OperandInfo.h"
namespace neurun
{
namespace backend
{
namespace cpu
{
namespace operand
{
class Tensor : public ::neurun::backend::operand::ITensor
{
public:
Tensor() = delete;
public:
Tensor(const ir::OperandInfo &info) : _info(info)
{
// DO NOTHING
}
public:
void setBuffer(uint8_t *buffer) { _buffer = buffer; }
ir::DataType data_type() const { return _info.typeInfo().type(); }
public:
uint8_t *buffer() const override { return _buffer; }
/**
* @brief Get dimension by index
*
* @param index Index to get diemension
* @return size_t Dimension at index
* @note N : dimension(0)
* H : dimension(1)
* W : dimension(2)
* C : dimension(3)
*/
size_t dimension(size_t index) const override { return _info.shape().dim(index); }
size_t num_dimensions() const override { return _info.shape().rank(); }
size_t total_size() const override { return _info.total_size(); }
size_t calcOffset(const neurun::util::Coordinates &coords) const override;
ir::Layout layout() const override { return ir::Layout::NHWC; }
bool has_padding() const override { return false; }
void access(const std::function<void(ITensor &tensor)> &fn) final;
private:
ir::OperandInfo _info;
uint8_t *_buffer = nullptr;
};
} // namespace operand
} // namespace cpu
} // namespace backend
} // namespace neurun
#endif // __NEURUN_BACKEND_CPU_OPERAND_TENSOR_H__
|