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diff --git a/docs/nncc/project/development_document.md b/docs/nncc/project/development_document.md new file mode 100644 index 000000000..8315dd3b6 --- /dev/null +++ b/docs/nncc/project/development_document.md @@ -0,0 +1,257 @@ +# SW Development Document + +**Revision history** + +| Ver. | Date | Contents | Author | Approver | +| ---- | ---------- | --------------------------- | --------------- | ------------ | +| 0.1 | 2018.04.12 | Initial version | Vostokov Sergey | Sung-Jae Lee | +| 0.2 | 2018.04.16 | SE member in-charge review | Ilya Lopatin | | +| 1.0 | 2018.04.17 | Final Execution DR version | Vostokov Sergey | Sung-Jae Lee | +| 1.1 | 2018.04.17 | Add SW Quality Verification | Vostokov Sergey | Sung-Jae Lee | + +**Terminology and Abbreviation** + +| | | +| ------------ | ------------------------------------------------------------- | +| OS | Operating System | +| OS API | Application interface of OS | +| HW | Hardware | +| SW | Software | +| NN | Neural Network | +| NN model | Neural network model (Instance of NN built with ML framework) | +| NN compiler | The compiler for neural network | +| ML framework | The machine learning framework | +| TF/TF Lite | Tensorflow/Tensorflow Lite ML framework | +| IR | Intermediate representation | +| CI/CI system | Continuous integration system | +| UI | The user interface | +| GUI | The graphical user interface | +| CLI | The command-line interface | + +## Project Overview + +### Purpose and Scope + +The main goal of the project is to develop a compiler for neural networks to produce executable artefact for specified SW and HW platform. + +The development scope includes the following components: + + - Develop importer module to parse, verify and represent NN model for further optimization and compilation + - Develop code emitters to produce executable binary for CPU and GPU + + +**2018 year goals:** + + - Support TensorFlow Lite NN model format + - Support Caffe NN model format + - Support Caffe2 NN model format (Optional) + - Support compilation of MobileNet NN + - Support compilation of Inception v3 NN + - Support ARM CPU + - Support ARM GPU (Mali) + - Support Tizen OS + - Support SmartMachine OS (Optional) + +| Product | Target Model Name | Comment | +| ------------------- | ------------------------------ | ---------------- | +| Tizen phone | Tizen TM2 | Reference device | +| Tizen device | Odroid XU4 | Reference board | +| SmartMachine target | Microvision mv8890, exynos8890 | Reference device | + +### Assumptions, Dependencies and Constraints + +<table> +<colgroup> +<col style="width: 26%" /> +<col style="width: 46%" /> +<col style="width: 26%" /> +</colgroup> +<thead> +<tr class="header"> +<th>Item</th> +<th>Assumptions, Dependencies and the Constraints</th> +<th>Reference</th> +</tr> +</thead> +<tbody> +<tr class="odd"> +<td>Tizen SW Platform</td> +<td><dl> +<dt>The following items should be provided:</dt> +<dd><ul> +<li>Tizen API</li> +<li>Tizen kernel</li> +<li>Tizen FW</li> +<li>Tizen SDK</li> +<li>Tizen naming convention</li> +</ul> +</dd> +</dl></td> +<td><ul> +<li><a href="www.tizen.org" class="uri">www.tizen.org</a></li> +<li><a href="wiki.tizen.org" class="uri">wiki.tizen.org</a></li> +<li><a href="developer.tizen.org" class="uri">developer.tizen.org</a></li> +</ul></td> +</tr> +<tr class="even"> +<td>SmartMachine OS Platform</td> +<td><dl> +<dt>The following items should be provided:</dt> +<dd><ul> +<li>SmartMachine API</li> +<li>SmartMachine kernel</li> +<li>SmartMachine FW</li> +<li>SmartMachine SDK</li> +<li>SmartMachine naming convention</li> +</ul> +</dd> +</dl></td> +<td>- <a href="http://suprem.sec.samsung.net/confluence/pages/viewpage.action?pageId=81833987">Platform confluence</a> <br>- <a href="https://github.sec.samsung.net/RS7-SmartMachine">Github</a> <br>- <a href="http://suprem.sec.samsung.net/confluence/display/ASEC/Adaptive+AUTOSAR">Functional Safety confluence</a></td> +</tr> +<tr class="odd"> +<td>Host OS</td> +<td>Linux-based OS (Ubuntu, Archlinux, etc)</td> +<td>- <a href="https://www.ubuntu.com/">Ubuntu site</a> <br>- <a href="https://www.archlinux.org/">Archlinux site</a></td> +</tr> +<tr class="even"> +<td>Tizen target HW</td> +<td>The reference device should be provided: Tizen TM2</td> +<td></td> +</tr> +<tr class="odd"> +<td>SmartMachine target HW</td> +<td>The reference device should be provided</td> +<td></td> +</tr> +</tbody> +</table> + +## Development Plan And Result + +### Development Schedule + +| Task | Deliverable | Plan start | Plan end | Result start | Result end | Responsibility | +| ------------------------------------ | --------------------------------- | ---------- | -------- | ------------ | ---------- | -------------- | +| Prepare SW requirements | SRS | 04.2018 | 04.2018 | | | S. Vostokov | +| Prepare initial SW Test Document | STD | 04.2018 | 04.2018 | | | S. Vostokov | +| Prepare Initial Project Plan | SDD | 04.2018 | 04.2018 | | | S. Vostokov | +| Prepare SW Test Document | STD | 04.2018 | 06.2018 | | | S. Vostokov | +| Prepare design document | HLD, DLD | 05.2018 | 08.2018 | | | S. Vostokov | +| Prepare test result | STD, UTR | 04.2018 | 10.2018 | | | S. Vostokov | +| Prepare project completion documents | SDD, Project completion report | 05.2018 | 12.2018 | | | S. Vostokov | +| Implement Caffe Importer | Caffe NN model Importer | 05.2018 | 09.2018 | | | S. Vostokov | +| Implement code emitter for CPU | Code emitter | 05.2018 | 09.2018 | | | S. Vostokov | +| Implement TF Lite Importer | TensorFlow Lite NN model Importer | 05.2018 | 11.2018 | | | S. Vostokov | +| Implement code emitter for GPU | Code emitter | 02.2018 | 11.2018 | | | S. Vostokov | + +### SW Metrics + +| Category | Metric | Collection Method | Collection Period | Planned | Actual | Responsibility | +| -------- | ---------------------------------------------------------------------- | ------------------------ | ----------------------- | ----------------- | ------ | -------------- | +| Quality | Test pass rate | GTest | 22.02.2018 - 31.12.2018 | 100% | | S. Vostokov | +| Quality | Defects density | Defect management system | 22.02.2018 - 31.12.2018 | \<= 1 defect/KLOC | | S. Vostokov | +| Quality | Defects removal rate | Defect management system | 22.02.2018 - 31.12.2018 | 100% | | S. Vostokov | +| Quality | Critical defects | Static analysis | 22.02.2018 - 31.12.2018 | 0 | | S. Vostokov | +| Quality | Major defects | Static analysis | 22.02.2018 - 31.12.2018 | 0 | | S. Vostokov | +| Quality | Code review issue removal | Samsung Research github | 22.02.2018 - 31.12.2018 | 100% | | S. Vostokov | +| Quality | Comments Rate | `cloc` tool | 22.02.2018 - 31.12.2018 | Exceed 20% | | S. Vostokov | +| Quality | Cyclomatic Complexity | SVACE | 22.02.2018 - 31.12.2018 | \< 50 | | S. Vostokov | +| Quality | Unused Items (Unused Files, Unused Functions, Unused Global Variables) | gcc/g++ | 22.02.2018 - 31.12.2018 | 0 | | S. Vostokov | +| Process | Project On-time Completion Rate | PLM | 22.02.2018 - 31.12.2018 | 100% | | S. Vostokov | +| Process | Milestone On-time Completion Rate | PLM | 22.02.2018 - 31.12.2018 | 100% | | S. Vostokov | +| Process | Process compliance | Audit | 22.02.2018 - 31.12.2018 | 100% | | S. Vostokov | + +### SW Configurations Management + +#### Document + +| No | Configuration Item | Location | Submitter | +| -- | ---------------------------- | -------- | ----------- | +| 1 | SW Requirement Specification | PLM | S. Vostokov | +| 2 | SW Development Document | PLM | S. Vostokov | +| 3 | SW High Level Document | PLM | S. Vostokov | +| 4 | SW Detailed Level Document | PLM | S. Vostokov | +| 5 | SW System Test Document | PLM | S. Vostokov | +| 6 | SW Unit Test Report | PLM | S. Vostokov | + +#### SW Source Code + +SW Repository: +<https://github.sec.samsung.net/STAR/nncc> + + git clone https://github.sec.samsung.net/STAR/nncc.git + +#### Baseline + +| Phase | Baseline Name | SW Configuration Item | +| ------------------ | ------------------ | ------------------------------------------------------------------------------------------- | +| 04.2018 Plan | Execution DR | SW Requirement Specification, SW Development Document, System Test Document initial version | +| 06.2018 Execution | DR1 | System Test Document | +| 08.2018 Execution | Design document | SW High Level Document, SW Detailed Design Document | +| 09.2018 Execution | DR2 | | +| 10.2018 Execution | Test report | SW System Test Document (result), SW Unit Test Report | +| 12.2018 Completion | Project Completion | Project Completion Report | + +## SW Quality Verification + +### SW Verification + +| No | Verification Item | Quality Goal | Tool | Phase | Development Team Member in Charge | Result | Note | +| -- | -------------------------------- | ------------------------------------------ | -------- | --------- | --------------------------------- | ------ | ---- | +| 1 | Open source License Verification | Clear violations of open source obligation | ProtexIP | Execution | Vostokov Sergey | | | +| 2 | Potential Defect | Fix all defects | Svace | Test | Vostokov Sergey | | | +| 3 | System Defect | Fix Critical/ Major defects | Github | Test | Vostokov Sergey | | | + +### Static Analysis + +| No | Activity | Schedule | Result | Comment | +| -- | --------------------------- | ---------- | ------ | ------- | +| 1 | SA Verification I (SVACE) | 28.09.2018 | | | +| 2 | SA Verification II (SVACE) | 30.11.2018 | | | +| 2 | SA Verification III (SVACE) | 31.12.2018 | | | + +### Coding Standard + +| No | Activity | Schedule | Result | Comment | +| -- | ----------------------------------------------------- | -------- | ------ | ------- | +| 1 | Coding standard enforcement with `clang-format` tool. | Regular | | | + + +### Convergence (integration testing) + +Out of scope since the integration with other SW is not required by SW +Requirement Specification. + +### Dynamic Analysis + +| No | Activity | Schedule | Result | Comment | +| -- | ------------------- | ---------- | ------ | ------- | +| 1 | DA Verification I | 28.09.2018 | | | +| 2 | DA Verification II | 30.11.2018 | | | +| 2 | DA Verification III | 31.12.2018 | | | + + +### Architecture Analysis + +SW architecture verification is managed by HQ. + +### SW Security + +Out of the project scope since the project is not related to SW security. + +### Code Review + +| No | Activity | Schedule | Result | Comment | +| -- | ----------- | -------- | ------ | ------------------------------------------------------------------- | +| 1 | Code review | Regular | | All code is reviewed manually using `github` tool before committing | + +## Risk Management + +| Priority | Risk Description | Risk Reduction Solution | Schedule | Result | Responsibility | +| -------- | ------------------------------------------------------------------------------------------------------- | --------------------------------------------------------------------------------------------------------- | ----------------- | ------ | -------------- | +| 1 | Project scope is changed due extra HQ request | Discuss the new requirements via email and messenger, update SRS | 02.2018 - 12.2018 | | S. Vostokov | +| 2 | Unavoidable technical difficulties during requirements implementation | Submit requirements changes and get confirmation from HQ | 02.2018 - 12.2018 | | S. Vostokov | +| 3 | Not enough HR | Hire team members as soon as possible, request assistance from other teams | 02.2018 - 12.2018 | | S. Vostokov | +| 4 | Use of GPL code | Minimize usage of GPL code, wrap GPL modules with well-defined interfaces so they can be easily replaced. | 02.2018 - 12.2018 | | S. Vostokov | +| 5 | Requirements would change due external or internal circumstances, e.g. new technology or product launch | Discuss project changes and make corrections | 02.2018 - 12.2018 | | S. Vostokov | + |