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Diffstat (limited to 'compute/ARMComputeEx/src/runtime/CL/functions/CLArgMinMaxLayerEx.cpp')
-rw-r--r-- | compute/ARMComputeEx/src/runtime/CL/functions/CLArgMinMaxLayerEx.cpp | 224 |
1 files changed, 224 insertions, 0 deletions
diff --git a/compute/ARMComputeEx/src/runtime/CL/functions/CLArgMinMaxLayerEx.cpp b/compute/ARMComputeEx/src/runtime/CL/functions/CLArgMinMaxLayerEx.cpp new file mode 100644 index 000000000..6b9b0d4b4 --- /dev/null +++ b/compute/ARMComputeEx/src/runtime/CL/functions/CLArgMinMaxLayerEx.cpp @@ -0,0 +1,224 @@ +/* + * Copyright (c) 2020 Samsung Electronics Co., Ltd. All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* + * Copyright (c) 2018-2020 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include "arm_compute/runtime/CL/functions/CLArgMinMaxLayerEx.h" + +#include "arm_compute/core/Error.h" +#include "arm_compute/core/TensorInfo.h" +#include "arm_compute/core/Types.h" +#include "arm_compute/core/Validate.h" +#include "arm_compute/core/utils/misc/ShapeCalculator.h" +#include "src/core/helpers/WindowHelpers.h" +#include "src/core/helpers/AutoConfiguration.h" +#include "src/runtime/Utils.h" + +namespace arm_compute +{ +CLArgMinMaxLayerEx::CLArgMinMaxLayerEx(std::shared_ptr<IMemoryManager> memory_manager) + : _memory_group(std::move(memory_manager)), _results_vector(), _not_reshaped_output(), + _reduction_kernels_vector(), _reshape_kernel(), _num_of_stages(), _reduction_axis() +{ +} + +Status CLArgMinMaxLayerEx::validate(const ITensorInfo *input, int axis, const ITensorInfo *output, + const ReductionOperation &op) +{ + ARM_COMPUTE_ERROR_ON_NULLPTR(input, output); + ARM_COMPUTE_RETURN_ERROR_ON_MSG(op != ReductionOperation::ARG_IDX_MAX && + op != ReductionOperation::ARG_IDX_MIN, + "Invalid reduction operation"); + ARM_COMPUTE_RETURN_ERROR_ON_MSG(axis >= static_cast<int>(TensorShape::num_max_dimensions), + "Reduction axis greater than max number of dimensions"); + ARM_COMPUTE_RETURN_ERROR_ON_MSG(axis > 3, "Unsupported reduction axis"); + const unsigned int num_of_stages = + utils::calculate_number_of_stages_only_x_axis(input->dimension(0), axis); + + DataType output_data_type = DataType::S32; + TensorInfo not_reshaped_output; + const auto input_num_channles = input->num_channels(); + const auto input_qinfo = input->quantization_info(); + + if (output->total_size() != 0) + { + output_data_type = output->data_type(); + const TensorInfo expected_output_shape = + output->clone()->set_tensor_shape(arm_compute::misc::shape_calculator::compute_reduced_shape( + input->tensor_shape(), axis, false)); + ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_SHAPES(&expected_output_shape, output); + } + + auto shape_before_reshape = input->tensor_shape(); + shape_before_reshape.set(axis, 1); + auto initialize_tensorinfo = [](TensorInfo &ti, TensorShape shape, DataType data_type, + int num_channels, QuantizationInfo qinfo) { + ti.set_data_type(data_type) + .set_tensor_shape(shape) + .set_num_channels(num_channels) + .set_quantization_info(qinfo); + }; + + initialize_tensorinfo(not_reshaped_output, shape_before_reshape, output_data_type, + input_num_channles, input_qinfo); + + if (num_of_stages == 1) + { + ARM_COMPUTE_RETURN_ON_ERROR( + CLArgMinMaxLayerKernelEx::validate(input, nullptr, ¬_reshaped_output, axis, op)); + } + else + { + // Create temporary tensor infos + std::vector<TensorInfo> sums_vector(num_of_stages - 1); + + // Create intermediate tensor info + TensorShape shape{input->tensor_shape()}; + + for (unsigned int i = 0; i < num_of_stages - 1; i++) + { + shape.set(0, ceil(shape.x() / 128.f)); + sums_vector[i].set_data_type(input->data_type()); + sums_vector[i].set_tensor_shape(shape); + sums_vector[i].set_num_channels(input->num_channels()); + } + + // Validate ReductionOperation only on first kernel + ARM_COMPUTE_RETURN_ON_ERROR( + CLArgMinMaxLayerKernelEx::validate(input, nullptr, &sums_vector[0], axis, op)); + + // Validate ReductionOperation on intermediate stages + for (unsigned int i = 1; i < num_of_stages - 1; ++i) + { + ARM_COMPUTE_RETURN_ON_ERROR( + CLArgMinMaxLayerKernelEx::validate(input, &sums_vector[i - 1], &sums_vector[i], axis, op)); + } + + // Validate ReductionOperation on the last stage + const unsigned int last_stage = num_of_stages - 1; + ARM_COMPUTE_RETURN_ON_ERROR(CLArgMinMaxLayerKernelEx::validate( + input, &sums_vector[last_stage - 1], ¬_reshaped_output, axis, op)); + } + ARM_COMPUTE_RETURN_ON_ERROR(CLReshapeLayer::validate(¬_reshaped_output, output)); + return Status{}; +} + +void CLArgMinMaxLayerEx::configure(const ICLTensor *input, int axis, ICLTensor *output, + const ReductionOperation &op) +{ + ARM_COMPUTE_ERROR_ON_NULLPTR(input, output); + _num_of_stages = utils::calculate_number_of_stages_only_x_axis(input->info()->dimension(0), axis); + _reduction_axis = axis; + + const TensorShape output_shape = arm_compute::misc::shape_calculator::compute_reduced_shape( + input->info()->tensor_shape(), axis, false); + DataType output_data_type = (output->info()->data_type() == DataType::UNKNOWN) + ? DataType::S32 + : output->info()->data_type(); + auto_init_if_empty(*output->info(), input->info() + ->clone() + ->set_tensor_shape(output_shape) + .set_data_type(output_data_type) + .reset_padding() + .set_is_resizable(true)); + + // Configure reduction operation kernels + _reduction_kernels_vector.resize(_num_of_stages); + + _memory_group.manage(&_not_reshaped_output); + // Create temporary tensors + if (_num_of_stages == 1) + { + // Force an early initialization for int64 output type + TensorShape output_shape{input->info()->tensor_shape()}; + output_shape.set(axis, 1); + auto_init_if_empty(*_not_reshaped_output.info(), input->info() + ->clone() + ->set_tensor_shape(output_shape) + .set_data_type(output_data_type) + .reset_padding() + .set_is_resizable(true)); + _not_reshaped_output.info()->set_tensor_shape(output_shape); + _reduction_kernels_vector[0].configure(input, nullptr, &_not_reshaped_output, axis, op); + } + else + { + _results_vector.resize(_num_of_stages - 1); + TensorShape shape{input->info()->tensor_shape()}; + for (unsigned int i = 0; i < _num_of_stages - 1; i++) + { + shape.set(0, ceil(shape.x() / 128.f)); + _results_vector[i].allocator()->init( + input->info()->clone()->set_tensor_shape(shape).set_data_type(output_data_type)); + } + + // Apply ReductionOperation only on first kernel + _memory_group.manage(&_results_vector[0]); + _reduction_kernels_vector[0].configure(input, nullptr, &_results_vector[0], axis, op); + + // Apply ReductionOperation on intermediate stages + for (unsigned int i = 1; i < _num_of_stages - 1; ++i) + { + _memory_group.manage(&_results_vector[i]); + _reduction_kernels_vector[i].configure(input, &_results_vector[i - 1], &_results_vector[i], + axis, op); + _results_vector[i - 1].allocator()->allocate(); + } + + // Apply ReductionOperation on the last stage + const unsigned int last_stage = _num_of_stages - 1; + _reduction_kernels_vector[last_stage].configure(input, &_results_vector[last_stage - 1], + &_not_reshaped_output, axis, op); + _results_vector[last_stage - 1].allocator()->allocate(); + } + _reshape_kernel.configure(CLKernelLibrary::get().get_compile_context(), &_not_reshaped_output, + output); + _not_reshaped_output.allocator()->allocate(); +} + +void CLArgMinMaxLayerEx::run() +{ + MemoryGroupResourceScope scope_mg(_memory_group); + + for (unsigned int i = 0; i < _num_of_stages; ++i) + { + CLScheduler::get().enqueue(_reduction_kernels_vector[i], false); + } + _reshape_kernel.run(); +} +} // namespace arm_compute |