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author | Chunseok Lee <chunseok.lee@samsung.com> | 2020-04-23 14:45:49 +0900 |
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committer | Chunseok Lee <chunseok.lee@samsung.com> | 2020-04-23 14:45:49 +0900 |
commit | e2ef8438a24f7c56a0744eb579a6e293ee2fbf8e (patch) | |
tree | 44a1a7951d168dd4370e13593ed03f4bc6d920c5 /runtime/onert/backend/acl_common/Swizzle.h | |
parent | 302e6564a7a76109e1178207e44e45a58631c477 (diff) | |
download | nnfw-e2ef8438a24f7c56a0744eb579a6e293ee2fbf8e.tar.gz nnfw-e2ef8438a24f7c56a0744eb579a6e293ee2fbf8e.tar.bz2 nnfw-e2ef8438a24f7c56a0744eb579a6e293ee2fbf8e.zip |
Imported Upstream version 1.4.0upstream/1.4.0submit/tizen/20200423.054851
Diffstat (limited to 'runtime/onert/backend/acl_common/Swizzle.h')
-rw-r--r-- | runtime/onert/backend/acl_common/Swizzle.h | 160 |
1 files changed, 160 insertions, 0 deletions
diff --git a/runtime/onert/backend/acl_common/Swizzle.h b/runtime/onert/backend/acl_common/Swizzle.h new file mode 100644 index 000000000..e1c7f8041 --- /dev/null +++ b/runtime/onert/backend/acl_common/Swizzle.h @@ -0,0 +1,160 @@ +/* + * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __ONERT_BACKEND_ACL_COMMON_SWIZZLE_H__ +#define __ONERT_BACKEND_ACL_COMMON_SWIZZLE_H__ + +#include <cassert> +#include <ir/Layout.h> + +namespace onert +{ +namespace backend +{ +namespace acl_common +{ + +class ARMComputeAxis +{ +public: + ARMComputeAxis() = default; + +public: + explicit ARMComputeAxis(uint32_t value) : _value{value} + { + // DO NOTHING + } + +public: + uint32_t value(void) const { return _value; } + +private: + uint32_t _value; +}; + +// Convert axis in acl order +inline ARMComputeAxis ToARMComputeAxis(uint32_t rank, uint32_t axis, + const ir::Layout org_layout = ir::Layout::UNKNOWN, + const ir::Layout acl_layout = ir::Layout::UNKNOWN) +{ + assert(rank > axis); + + const ARMComputeAxis reversed{(rank - axis) - 1}; + + if (rank >= 4 && org_layout == ir::Layout::NHWC && acl_layout == ir::Layout::NCHW) + { + // NHWC -> WHCN + // DEPTH + if (0 == reversed.value()) + { + return ARMComputeAxis{2}; + } + // WIDTH + if (1 == reversed.value()) + { + return ARMComputeAxis{0}; + } + // HEIGHT + if (2 == reversed.value()) + { + return ARMComputeAxis{1}; + } + } + if (rank >= 4 && org_layout == ir::Layout::NCHW && acl_layout == ir::Layout::NHWC) + { + // NCHW -> CWHN + // WIDTH + if (0 == reversed.value()) + { + return ARMComputeAxis{1}; + } + // HEIGHT + if (1 == reversed.value()) + { + return ARMComputeAxis{2}; + } + // DEPTH + if (2 == reversed.value()) + { + return ARMComputeAxis{0}; + } + } + + return reversed; +} + +inline ::arm_compute::Coordinates +getARMComputeAxises(uint32_t rank, const ir::Layout org_layout = ir::Layout::UNKNOWN, + const ir::Layout acl_layout = ir::Layout::UNKNOWN) +{ + ::arm_compute::Coordinates res{}; + + res.set_num_dimensions(rank); + + for (uint32_t axis = 0; axis < rank; ++axis) + { + res.set(axis, ToARMComputeAxis(rank, axis, org_layout, acl_layout).value()); + } + + return res; +} + +// Restructure runtime_permutationVector to ACL_permutationVector +inline ::arm_compute::PermutationVector +getARMComputePermutationVector(uint32_t rank, const std::vector<int32_t> runtime_pv, + const ir::Layout org_layout = ir::Layout::UNKNOWN, + const ir::Layout acl_layout = ir::Layout::UNKNOWN) +{ + // rank upto 4 is supported + assert(rank <= 4); + assert(runtime_pv.size() > 0); + + int new_pv[4] = {0}; + ::arm_compute::Coordinates axises = getARMComputeAxises(rank, org_layout, acl_layout); + + for (uint32_t i = 0; i < rank; ++i) + { + new_pv[axises[i]] = ToARMComputeAxis(rank, runtime_pv[i], org_layout, acl_layout).value(); + } + + ::arm_compute::PermutationVector ACL_PV = + ::arm_compute::PermutationVector{new_pv[0], new_pv[1], new_pv[2], new_pv[3]}; + ACL_PV.set_num_dimensions(rank); + + return ACL_PV; +} + +template <typename T> +inline T ReorderBits(T in, size_t numOfBits, const ir::Layout org_layout = ir::Layout::UNKNOWN, + const ir::Layout acl_layout = ir::Layout::UNKNOWN) +{ + assert(numOfBits > 0); + T out = 0; + for (int32_t i = numOfBits - 1; i >= 0; --i) + { + const uint32_t toShift = + numOfBits - ToARMComputeAxis(numOfBits, i, org_layout, acl_layout).value() - 1; + out += ((in & 1) << toShift); + in >>= 1; + } + return out; +} + +} // namespace acl_common +} // namespace backend +} // namespace onert + +#endif // __ONERT_BACKEND_ACL_COMMON_SWIZZLE_H__ |