catch up to tizen_5.5 and remove unness dir

- update to tizen_5.5
- remove dirs

2292 files changed, 178770 insertions, 50386 deletions

diff --git a/.ctags b/.ctags
index e3d621775..6f33a26d3 100644
--- a/.ctags
+++ b/.ctags
@@ -1,5 +1,6 @@
 --extra=+f
 --exclude=Product
+--exclude=build
 --exclude=tags
 --exclude=tests/framework/cache
 --exclude=tools/cross/rootfs
diff --git a/.gitattributes b/.gitattributes
new file mode 100644
index 000000000..b8eec3df8
--- /dev/null
+++ b/.gitattributes
@@ -0,0 +1 @@
+tests/nnapi/specs/* linguist-detectable=false
diff --git a/.gitignore b/.gitignore
index da6e28990..5a5286016 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,59 +1,12 @@
-# Prerequisites
-*.d
-
-# Compiled Object files
-*.slo
-*.lo
-*.o
-*.obj
-
-# Precompiled Headers
-*.gch
-*.pch
-
-# Compiled Dynamic libraries
-*.so
-*.dylib
-*.dll
-
-# Fortran module files
-*.mod
-*.smod
-
-# Compiled Static libraries
-*.lai
-*.la
-*.a
-*.lib
-
-# Executables
-*.exe
-*.out
-*.app
-
 # Working Path
 /Product
+/build
 /tools/cross/rootfs
 
-# Tools
-/.vscode
-/.svace-dir
-
 # Compiled python3 code cache
 **/__pycache__
 *.pyc
 
-# vim temp files
-.*.sw*
-
-# ctags files
-tags
-
-# gnu-global files
-GPATH
-GTAGS
-GRTAGS
-
 # Test cache for model download
 /tests/framework/cache
 
@@ -70,28 +23,21 @@ GRTAGS
 /tools/cross/ndk
 
 # ignore the embeded cl_kernels
-/libs/ARMComputeEx/src/core/CL/cl_kernels/*.clembed
-/libs/ARMComputeEx/src/core/CL/cl_kernels/*.hembed
+/**/*.clembed
+/**/*.hembed
 
-# External stamp file
-/externals/*.stamp
-
-# External library
-/externals/eigen
-/externals/farmhash
-/externals/flatbuffers
-/externals/gemmlowp
-/externals/gtest
-/externals/neon_2_sse
-/externals/tensorflow
-/externals/acl
-/externals/absl
-/externals/nonius
+# External directory
+/externals
 
 # tflkit info files
 /tools/tflkit/*.info
 
 # Generated tests
 /tests/nnapi/src/generated
-/tests/runtime/neural_networks_test/generated
-/runtimes/tests/neural_networks_test/generated
+
+# Coverage
+/gcov
+/coverage
+
+# Makefile
+/Makefile
diff --git a/.mailmap b/.mailmap
new file mode 100644
index 000000000..12696d5aa
--- /dev/null
+++ b/.mailmap
@@ -0,0 +1,57 @@
+Aleksei Grebenkin <a.grebenkin@samsung.com>
+Andrew Tischenko <a.tischenko@partner.samsung.com>
+Andrey Shedko <a.shedko@samsung.com>
+Andrey Shedko <a.shedko@samsung.com> Андрей Шедько/AI Tools Lab /SRR/Assistant Engineer/삼성전자 <a.shedko@partner.samsung.com>
+Andrey Shedko <a.shedko@samsung.com> Андрей Шедько/AI Tools Lab /SRR/Assistant Engineer/삼성전자 <a.shedko@samsung.com>
+Cheongyo Bahk <ch.bahk@samsung.com>
+Chunseok Lee <chunseok.lee@samsung.com>
+Denis Maksimenko <d.maksimenko@partner.samsung.com>
+Devansh Bansal <b.devansh@samsung.com>
+Dilshodzhon Poshshoev <d.poshshoev@samsung.com>
+Dmitry Mozolev <d.mozolev@samsung.com>
+Efimov Alexander <a.efimov@samsung.com>
+Hanjoung Lee <hanjoung.lee@samsung.com>
+Hyeongseok Oh <hseok82.oh@samsung.com>
+HyungGyu Choi <hk0110.choi@samsung.com>
+Hyunsik Yoon <hyunsik.yoon@samsung.com>
+Inki Dae <inki.dae@samsung.com>
+Ivan Ivanovich Kulagin <i.kulagin@samsung.com>
+Ivan Vagin <ivan.vagin@samsung.com>
+Jiseob Jang <jiseob.jang@samsung.com>
+Jiyoung Yun <jy910.yun@samsung.com>
+Jonghyun Park <jh1302.park@samsung.com>
+Junghyun Kim <jh0822.kim@samsung.com>
+Kshitiz Bansal <kshitiz.b@samsung.com>
+Myungjae Lee <mjae.lee@samsung.com>
+Pavel Fattakhov <p.fattakhov@partner.samsung.com>
+Pavel Ilyutchenko <p.iliutchenk@samsung.com>
+Pavel Ilyutchenko <p.iliutchenk@samsung.com> Павел Ильютченко/AI Tools Lab /SRR/Assistant Engineer/삼성전자 <p.iliutchenk@partner.samsung.com>
+Pavel Ilyutchenko <p.iliutchenk@samsung.com> Павел Ильютченко/AI Tools Lab /SRR/Assistant Engineer/삼성전자 <p.iliutchenk@samsung.com>
+Prasanna R <prasanna.r@samsung.com>
+Praveen Doreswamy Naidu <praveen.dn@samsung.com>
+Roman Rusyaev <r.rusyaev@samsung.com>
+Saehie Park <saehie.park@samsung.com>
+Sanggyu Lee <sg5.lee@samsung.com>
+Sangjung Woo <sangjung.woo@samsung.com>
+Sangmin Seo <sangmin7.seo@samsung.com>
+Saulo Aldighieri Moraes <s.moraes@samsung.com>
+Saurav Babu <saurav.babu@samsung.com>
+Seok Namkoong <sk.namkoong@samsung.com>
+Seongwoo Chae <sw4670.chae@samsung.com>
+Sergei Barannikov <s.barannikov@samsung.com>
+Sergei Chicherin <s.chicherin@samsung.com>
+Sergey Vostokov <s.vostokov@samsung.com>
+Shubham Gupta <shub98.gupta@samsung.com>
+Siva Sai Vaddipati <siva.sai@samsung.com>
+Sujin Kim <sjsujin.kim@samsung.com>
+Sung-Jae Lee <sj925.lee@samsung.com>
+Sungjin Choi <lotieye.choi@samsung.com>
+Tanuj Tekriwal <tanuj.tekri@samsung.com>
+Timur Otellovich Ablyazimov <t.ablyazimov@samsung.com>
+Vishal Keshav <vishal.k1@samsung.com>
+Vitaliy Cherepanov <v.cherepanov@samsung.com>
+Vladimir Plazun <v.plazun@samsung.com>
+Vladimir Plazun <v.plazun@samsung.com> Vladimir Plazun/AI Tools Lab/Engineer/삼성전자 <v.plazun@partner.samsung.com>
+Vladimir Plazun <v.plazun@samsung.com> Vladimir Plazun/AI Tools Lab /SRR/Engineer/삼성전자 <v.plazun@partner.samsung.com>
+Yongseop Kim <yons.kim@samsung.com>
+Yuri Novikov <y.novikov@partner.samsung.com>
diff --git a/CMakeLists.txt b/CMakeLists.txt
deleted file mode 100644
index 34824ff71..000000000
--- a/CMakeLists.txt
+++ /dev/null
@@ -1,91 +0,0 @@
-cmake_minimum_required(VERSION 3.1)
-
-project(nnfw)
-
-macro(nnfw_include PREFIX)
-  include("${CMAKE_SOURCE_DIR}/cmake/modules/${PREFIX}.cmake")
-endmacro(nnfw_include)
-
-macro(nnfw_find_package PREFIX)
-  find_package(${PREFIX} CONFIG NO_DEFAULT_PATH PATHS ${CMAKE_SOURCE_DIR}/cmake/packages ${ARGN})
-endmacro(nnfw_find_package)
-
-set(CMAKE_CXX_STANDARD 11)
-
-# identify platform: HOST_PLATFORM, TARGET_PLATFORM and related
-include("cmake/option/identify_platform.cmake")
-
-# platform specific options
-include("cmake/option/option_${TARGET_PLATFORM}.cmake")
-
-# apply compilation flags
-# note: this should be placed after cmake/option/option_xxx.cmake files
-include("cmake/ApplyCompileFlags.cmake")
-
-# Configuration flags
-include("cmake/CfgOptionFlags.cmake")
-# and besides CfgOptionFlags.cmake that can be given outside
-#   OBS_BUILD: build boolean flag that tizen in OBS build
-#   COVERAGE_BUILD: build boolean flag that enables converage test
-#   ROOTFS_ARM: arm rootfs path for cross building
-#   ROOTFS_ARM64: arm 64bit rootfs path for cross building, linux,tizen,android
-#   TARGET_ARCH: target architecture string for cross building
-#   TARGET_OS: target os string for cross building
-
-# NOTE '${CMAKE_INSTALL_PREFIX}/lib' should be added as a link directory as
-#      CI server places pre-built ARM compute libraries on this directory.
-link_directories(${CMAKE_INSTALL_PREFIX}/lib)
-
-# Download configuration
-option(DOWNLOAD_TENSORFLOW "Download Tensorflow source" ON)
-option(DOWNLOAD_ABSL "Download Absl source" ON)
-option(DOWNLOAD_EIGEN "Download Eigen source" ON)
-option(DOWNLOAD_FARMHASH "Download farmhash source" ON)
-option(DOWNLOAD_GEMMLOWP "Download GEMM low precesion library source" ON)
-option(DOWNLOAD_NEON2SSE "Download NEON2SSE library source" ON)
-option(DOWNLOAD_FLATBUFFERS "Download FlatBuffers source" ON)
-option(DOWNLOAD_ARMCOMPUTE "Download ARM Compute source" ON)
-option(DOWNLOAD_NONIUS "Download nonius source" ON)
-
-# GTest support
-option(BUILD_GTEST "Download and build Google Test" ON)
-nnfw_find_package(GTest QUIET)
-
-# NOTE Workaround to avoid build fail by tensorflow (or acl) package version mismatch on obs build
-if(OBS_BUILD)
-  add_definitions(-DOBS_BUILD)
-endif(OBS_BUILD)
-
-nnfw_include(ExtendCMakeFunction)
-
-# TODO For now Android build is being enabled incrementally so not all subdirectories are added yet.
-#      However we are going to have the same subdirectories with other OS eventually.
-if("${TARGET_OS}" STREQUAL "android")
-
-  include_directories(externals/tensorflow)
-  include_directories(externals/acl)
-  include_directories(externals/acl/include)
-  include_directories(externals/flatbuffers/include)
-  include_directories(include)
-
-  add_subdirectory(libs)
-  add_subdirectory(externals)
-  add_subdirectory(tests/tools/nnapi_test)
-  add_subdirectory(tests/tools/tflite_benchmark)
-  add_subdirectory(tests/nnapi)
-
-  add_subdirectory(runtimes)
-
-else("${TARGET_OS}" STREQUAL "android") # General case (non-android build)
-
-  if(NOT OBS_BUILD)
-    add_subdirectory(externals)
-  endif(NOT OBS_BUILD)
-
-  add_subdirectory(contrib)
-  add_subdirectory(libs)
-  add_subdirectory(runtimes)
-  add_subdirectory(tests)
-  add_subdirectory(tools)
-
-endif("${TARGET_OS}" STREQUAL "android")
diff --git a/contrib/tflite_classify/.FORMATCHECKED b/CONTRIBTUTORS
index e69de29bb..e69de29bb 100644
--- a/contrib/tflite_classify/.FORMATCHECKED
+++ b/CONTRIBTUTORS
diff --git a/COPYRIGHT b/COPYRIGHT
new file mode 100644
index 000000000..3c788156c
--- /dev/null
+++ b/COPYRIGHT
@@ -0,0 +1 @@
+Copyright (c) <2019> <Samsung Inner Source Community> All Rights Reserved.
diff --git a/LICENSE b/LICENSE
index 4d3b3ab13..2411d90dc 100644
--- a/LICENSE
+++ b/LICENSE
@@ -2,6 +2,7 @@ This file provides full text of licenses used in this project
 
 - Apache Licence 2.0
 - MIT
+- BSD-2-Clause
 
 ...............................................................................
 
@@ -231,3 +232,49 @@ AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 SOFTWARE.
+
+.............................................................................
+COPYRIGHT
+
+All contributions by the University of California:
+Copyright (c) 2014-2017 The Regents of the University of California (Regents)
+All rights reserved.
+
+All other contributions:
+Copyright (c) 2014-2017, the respective contributors
+All rights reserved.
+
+Caffe uses a shared copyright model: each contributor holds copyright over
+their contributions to Caffe. The project versioning records all such
+contribution and copyright details. If a contributor wants to further mark
+their specific copyright on a particular contribution, they should indicate
+their copyright solely in the commit message of the change when it is
+committed.
+
+LICENSE
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met: 
+
+1. Redistributions of source code must retain the above copyright notice, this
+   list of conditions and the following disclaimer. 
+2. Redistributions in binary form must reproduce the above copyright notice,
+   this list of conditions and the following disclaimer in the documentation
+   and/or other materials provided with the distribution. 
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+CONTRIBUTION AGREEMENT
+
+By contributing to the BVLC/caffe repository through pull-request, comment,
+or otherwise, the contributor releases their content to the
+license and copyright terms herein.
\ No newline at end of file
diff --git a/Makefile b/Makefile
deleted file mode 100644
index fda5b0c01..000000000
--- a/Makefile
+++ /dev/null
@@ -1,265 +0,0 @@
-TARGET_ARCH?=$(shell uname -p)
-BUILD_TYPE?=Debug
-CROSS_BUILD?=0
-HOST_OS?=linux
-TARGET_OS?=linux
-PARALLEL_BUILD?=1
-## TODO: fix obs build break
-OBS_BUILD?=OFF
-COVERAGE_BUILD?=0
-BENCHMARK_ACL_BUILD?=0
-OPTIONS?=
-GENERATE_FILES?=1
-
-# make TARGET and TYPE to lowercase
-TARGET_ARCH_LC=$(shell echo $(TARGET_ARCH) | tr A-Z a-z)
-BUILD_TYPE_LC=$(shell echo $(BUILD_TYPE) | tr A-Z a-z)
-# we need base name 'arm` for all arm arch
-TARGET_ARCH_BASE=$(TARGET_ARCH_LC)
-ifneq (,$(findstring arm64,$(TARGET_ARCH_BASE)))
-	# arm64 as target-arch comes from Android
-	TARGET_ARCH_BASE=arm64
-	ifdef ROOTFS_DIR
-		ROOTFS_ARM64=$(ROOTFS_DIR)
-		export ROOTFS_ARM64
-	endif
-	# For now Android is the only option for arm64
-	TARGET_OS:=android
-else ifneq (,$(findstring arm,$(TARGET_ARCH_BASE)))
-	TARGET_ARCH_BASE=arm
-	ifdef ROOTFS_DIR
-		ROOTFS_ARM=$(ROOTFS_DIR)
-		export ROOTFS_ARM
-	endif
-else ifneq (,$(findstring aarch64,$(TARGET_ARCH_BASE)))
-	# aarch64 as target-arch comes from all except for Android
-	TARGET_ARCH_BASE=aarch64
-	ifdef ROOTFS_DIR
-		ROOTFS_ARM64=$(ROOTFS_DIR)
-		export ROOTFS_ARM64
-	endif
-endif
-# Todo: we may set CROSS_BUILD=1 when ROOTFS_DIR is given
-# the toolchain file, only for cross build
-ifeq ($(CROSS_BUILD),1)
-	TOOLCHAIN_FILE=cmake/config/config_$(TARGET_ARCH_LC)-$(TARGET_OS).cmake
-	OPTION_TOOLCHAIN=-DCMAKE_TOOLCHAIN_FILE=$(TOOLCHAIN_FILE)
-else
-	OPTION_TOOLCHAIN=
-endif
-
-ifeq ($(COVERAGE_BUILD),1)
-	OPTIONS+= -DCOVERAGE_BUILD=1
-else
-	OPTIONS+= -DCOVERAGE_BUILD=0
-endif
-
-ifeq ($(BENCHMARK_ACL_BUILD),1)
-	OPTIONS+= -DBUILD_BENCHMARK_ACL=1
-endif
-
-ifeq ($(PARALLEL_BUILD),1)
-	# Get number of processors (linux only for now)
-	ifeq ($(HOST_OS),linux)
-		NPROCS?=$(shell grep -c ^processor /proc/cpuinfo)
-	endif
-endif
-
-NPROCS?=1
-WORKHOME=Product
-WORKFOLDER=$(TARGET_ARCH_LC)-$(TARGET_OS).$(BUILD_TYPE_LC)
-WORKDIR=$(WORKHOME)/$(WORKFOLDER)
-
-BUILD_ROOT=$(WORKDIR)/obj
-INSTALL_ROOT=$(WORKDIR)/out
-
-BUILD_FOLDER=$(WORKFOLDER)/obj
-INSTALL_FOLDER=$(WORKFOLDER)/out
-BUILD_ALIAS=$(WORKHOME)/obj
-INSTALL_ALIAS=$(WORKHOME)/out
-
-INSTALL_PATH?=$(CURDIR)/$(WORKDIR)/out
-
-TIMESTAMP_CONFIGURE=$(WORKDIR)/CONFIGURE
-TIMESTAMP_BUILD=$(WORKDIR)/BUILD
-TIMESTAMP_INSTALL=$(WORKDIR)/INSTALL
-
-#
-# for Build Arm Compute Library with SCONS
-#
-ACL_FOLDER=externals/acl
-ACL_COMMAND=scons -j${NPROCS} neon=1 opencl=1 examples=0 embed_kernels=1 os=$(TARGET_OS)
-ifeq ($(TARGET_ARCH_LC),armv7l)
-	ACL_COMMAND+= arch=armv7a
-	ACL_BUILD_OUT=armv7a-$(TARGET_OS)
-else ifeq ($(TARGET_ARCH_LC),aarch64)
-	ACL_COMMAND+= arch=arm64-v8a
-	ACL_BUILD_OUT=arm64-v8a-$(TARGET_OS)
-else ifeq ($(TARGET_ARCH_BASE),arm64)
-	ACL_COMMAND+= arch=arm64-v8a
-	ACL_BUILD_OUT=arm64-v8a-$(TARGET_OS)
-endif
-ifeq ($(TARGET_OS),android)
-	ACL_COMMAND+= Werror=0
-	ANDROID_GNUSTL_PATH=$(ROOTFS_ARM64)/bin:$(ROOTFS_ARM64)/aarch64-linux-android/bin:$$PATH
-else
-	ACL_COMMAND+= Werror=1
-endif
-ifeq ($(BUILD_TYPE_LC),debug)
-	ACL_COMMAND+= debug=1 asserts=1
-endif
-ACL_FOLDER_NAME=$(ACL_BUILD_OUT).$(BUILD_TYPE_LC)
-ACL_COMMAND+= build_dir=$(ACL_FOLDER_NAME)
-ACL_FOLDER_BUILD=$(ACL_FOLDER)/build/$(ACL_FOLDER_NAME)
-#ifneq ($(EXT_ACL_FOLDER),)
-#	ACL_FOLDER_BUILD=$(EXT_ACL_FOLDER)
-#endif
-
-all: build
-
-###
-### Command (public)
-###
-configure: configure_internal
-
-build: build_internal
-
-install: $(TIMESTAMP_INSTALL)
-
-clean:
-	rm -rf $(WORKDIR)
-	rm -rf externals/*.stamp
-
-acl: internal_acl_build internal_acl_install
-
-check: check_internal
-
-runtime: runtime_build_internal
-
-testbuild: test_build_internal
-
-tflite: tflite_build_internal
-
-###
-### Command (internal)
-###
-configure_internal:
-ifeq ($(GENERATE_FILES),1)
-	tests/nnapi/specs/generate_test.sh
-endif
-
-	mkdir -p $(BUILD_ROOT)
-	cmake -B$(CURDIR)/$(BUILD_ROOT) -H$(CURDIR) \
-		-DCMAKE_INSTALL_PREFIX=$(INSTALL_PATH) \
-		-DCMAKE_BUILD_TYPE=$(BUILD_TYPE_LC) -DTARGET_ARCH=$(TARGET_ARCH_LC) \
-		-DHOST_OS=$(HOST_OS) \
-		-DTARGET_OS=$(TARGET_OS) \
-		-DOBS_BUILD=$(OBS_BUILD) \
-		$(OPTION_TOOLCHAIN) \
-		$(OPTIONS)
-	touch $(TIMESTAMP_CONFIGURE)
-
-build_internal: $(BUILD_ROOT)
-	cd $(BUILD_ROOT) && make -j $(NPROCS) all
-	rm -rf $(BUILD_ALIAS)
-	ln -s $(BUILD_FOLDER) $(BUILD_ALIAS)
-	touch $(TIMESTAMP_BUILD)
-
-install_internal:
-	cd $(BUILD_ROOT) && make install
-	rm -rf $(INSTALL_ALIAS)
-	ln -s $(INSTALL_FOLDER) $(INSTALL_ALIAS)
-	touch $(TIMESTAMP_INSTALL)
-
-internal_acl_build: configure_internal
-#ifeq ($(EXT_ACL_FOLDER),)
-ifeq ($(TARGET_OS),android)
-	cd $(ACL_FOLDER) && CXX=clang++ CC=clang PATH=$(ANDROID_GNUSTL_PATH) $(ACL_COMMAND)
-else
-	cd $(ACL_FOLDER) && $(ACL_COMMAND)
-endif
-#endif
-
-internal_acl_install:
-	@echo $(ACL_FOLDER_BUILD)
-	@mkdir -vp $(INSTALL_PATH)/lib
-	@cp -v $(ACL_FOLDER_BUILD)/libarm_compute_core.so $(INSTALL_PATH)/lib/.
-	@cp -v $(ACL_FOLDER_BUILD)/libarm_compute_graph.so $(INSTALL_PATH)/lib/.
-	@cp -v $(ACL_FOLDER_BUILD)/libarm_compute.so $(INSTALL_PATH)/lib/.
-
-external_acl:
-ifneq ($(EXT_ACL_FOLDER),)
-	@mkdir -vp $(INSTALL_PATH)/lib
-	@cp -v $(EXT_ACL_FOLDER)/libarm_compute_core.so $(INSTALL_PATH)/lib/.
-	@cp -v $(EXT_ACL_FOLDER)/libarm_compute_graph.so $(INSTALL_PATH)/lib/.
-	@cp -v $(EXT_ACL_FOLDER)/libarm_compute.so $(INSTALL_PATH)/lib/.
-endif
-
-ifeq ($(CROSS_BUILD),1)
-check_internal: test_internal_cross
-else
-check_internal: test_internal
-endif
-
-# TODO: Enable tests on cross build
-test_internal_cross:
-	@echo "Can't do tests on cross build"
-
-test_internal:
-	tests/scripts/test_driver.sh .
-
-build_test_suite: install_internal
-	@echo "packaging test suite"
-	@rm -rf $(INSTALL_ROOT)/test-suite.tar.gz
-	@tar -zcf test-suite.tar.gz tests/scripts tests/framework $(INSTALL_ALIAS) --dereference
-	@mv test-suite.tar.gz $(INSTALL_ROOT)/.
-
-build_coverage_suite: install_internal
-	@echo "packaging test-coverage suite"
-	@rm -rf $(INSTALL_ROOT)/coverage-suite.tar.gz
-	@find Product -name "*.gcno" > include_lists.txt
-	@pwd | grep -o '/' | wc -l > tests/scripts/build_path_depth.txt
-	@tar -zcf coverage-suite.tar.gz tests/scripts tests/framework $(INSTALL_ALIAS) --dereference -T include_lists.txt
-	@rm -rf include_lists.txt tests/scripts/build_path_depth.txt
-	@mv coverage-suite.tar.gz $(INSTALL_ROOT)/.
-
-runtime_build_internal: $(BUILD_ROOT)
-	cd $(BUILD_ROOT) && make -j $(NPROCS) nnapi_pure_arm_compute
-	rm -rf $(BUILD_ALIAS)
-	ln -s $(BUILD_FOLDER) $(BUILD_ALIAS)
-	touch $(TIMESTAMP_BUILD)
-
-test_build_internal: $(BUILD_ROOT)
-	# Build test
-	cd $(BUILD_ROOT) && make -j $(NPROCS) nnapi_test
-	cd $(BUILD_ROOT) && make -j $(NPROCS) tflite_benchmark
-	# Build unittest
-	cd $(BUILD_ROOT) && make -j $(NPROCS) nnapi_gtest
-	rm -rf $(BUILD_ALIAS)
-	ln -s $(BUILD_FOLDER) $(BUILD_ALIAS)
-	touch $(TIMESTAMP_BUILD)
-
-tflite_build_internal: $(BUILD_ROOT)
-	# Build test
-	cd $(BUILD_ROOT) && make -j $(NPROCS) tensorflow-lite gtest_main
-	rm -rf $(BUILD_ALIAS)
-	ln -s $(BUILD_FOLDER) $(BUILD_ALIAS)
-	touch $(TIMESTAMP_BUILD)
-
-###
-### Timestamps
-###
-$(WORKDIR):
-	mkdir -p $@
-
-$(BUILD_ROOT): $(WORKDIR)
-	make configure_internal
-
-$(TIMESTAMP_CONFIGURE):
-	make configure_internal
-
-$(TIMESTAMP_BUILD): $(TIMESTAMP_CONFIGURE)
-	make build_internal
-
-$(TIMESTAMP_INSTALL): $(TIMESTAMP_BUILD)
-	make install_internal
diff --git a/Makefile.template b/Makefile.template
new file mode 100644
index 000000000..a0ae361b8
--- /dev/null
+++ b/Makefile.template
@@ -0,0 +1,183 @@
+HOST_ARCH?=$(shell uname -p)
+TARGET_ARCH?=$(shell uname -p)
+BUILD_TYPE?=Debug
+CROSS_BUILD?=0
+HOST_OS?=linux
+TARGET_OS?=linux
+PARALLEL_BUILD?=1
+## TODO: fix obs build break
+OBS_BUILD?=OFF
+COVERAGE_BUILD?=0
+BENCHMARK_ACL_BUILD?=0
+OPTIONS?=
+GENERATE_NNAPI_TESTS?=1
+TFLITE_MAJOR_VER?=1
+TFLITE_MINOR_VER?=13
+
+# make TARGET and TYPE to lowercase
+HOST_ARCH_LC=$(shell echo $(HOST_ARCH) | tr A-Z a-z)
+TARGET_ARCH_LC=$(shell echo $(TARGET_ARCH) | tr A-Z a-z)
+BUILD_TYPE_LC=$(shell echo $(BUILD_TYPE) | tr A-Z a-z)
+# we need base name 'arm` for all arm arch
+TARGET_ARCH_BASE=$(TARGET_ARCH_LC)
+ifneq (,$(findstring arm64,$(TARGET_ARCH_BASE)))
+	# arm64 as target-arch comes from Android
+	TARGET_ARCH_BASE=arm64
+	# For now Android is the only option for arm64
+	TARGET_OS:=android
+else ifneq (,$(findstring arm,$(TARGET_ARCH_BASE)))
+	TARGET_ARCH_BASE=arm
+else ifneq (,$(findstring aarch64,$(TARGET_ARCH_BASE)))
+	# aarch64 as target-arch comes from all except for Android
+	TARGET_ARCH_BASE=aarch64
+endif
+# Set CROSS_BUILD=1 when ROOTFS_DIR is given, and TARGET_ARCH is different to HOST_ARCH.
+ifneq ($(ROOTFS_DIR),)
+ifneq ($(TARGET_ARCH_LC),$(HOST_ARCH_LC))
+  CROSS_BUILD=$(if $(wildcard $(ROOTFS_DIR)),1,0)
+endif
+endif
+# the toolchain file, only for cross build
+ifeq ($(CROSS_BUILD),1)
+	TOOLCHAIN_FILE=cmake/buildtool/cross/toolchain_$(TARGET_ARCH_LC)-$(TARGET_OS).cmake
+	OPTIONS+= -DCMAKE_TOOLCHAIN_FILE=$(TOOLCHAIN_FILE)
+endif
+
+ifeq ($(COVERAGE_BUILD),1)
+	OPTIONS+= -DENABLE_COVERAGE=ON
+else
+	OPTIONS+= -DENABLE_COVERAGE=OFF
+endif
+
+ifeq ($(BENCHMARK_ACL_BUILD),1)
+	OPTIONS+= -DBUILD_BENCHMARK_ACL=1
+endif
+
+ifneq ($(EXT_ACL_FOLDER),)
+	OPTIONS+= -DBUILD_ARMCOMPUTE=OFF
+	OPTIONS+= -DARMCompute_EXTDIR=$(EXT_ACL_FOLDER)
+endif
+
+ifneq ($(EXTERNAL_VOLUME),)
+	OPTIONS+= -DNNFW_EXTERNALS_DIR=$(EXTERNAL_VOLUME)
+endif
+
+ifneq ($(OBS_BUILD),OFF)
+	# Use pre-installed google test library
+	OPTIONS+= -DBUILD_GTEST=FALSE
+	OPTIONS+= -DBUILD_ARMCOMPUTE=FALSE
+	OPTIONS+= -DDOWNLOAD_ARMCOMPUTE=FALSE
+	OPTIONS+= -DDOWNLOAD_TENSORFLOW=FALSE
+	# Use pre-installed tensorflow lite library
+	OPTIONS+= -DBUILD_TENSORFLOW_LITE=FALSE
+	# Disable logging runtime build for Tizen
+	OPTIONS+= -DBUILD_LOGGING=FALSE
+	OPTIONS+= -DBUILD_TOOLS=FALSE
+	# Disable "tflite-run" and "tflite_benchmark_model" for Tizen
+	OPTIONS+= -DBUILD_TFLITE_RUN=FALSE
+	OPTIONS+= -DBUILD_TFLITE_BENCHMARK_MODEL=FALSE
+endif
+
+ifeq ($(GENERATE_NNAPI_TESTS),1)
+	OPTIONS+= -DGENERATE_RUNTIME_NNAPI_TESTS=ON
+endif
+
+ifeq ($(PARALLEL_BUILD),1)
+	# Get number of processors (linux only for now)
+	ifeq ($(HOST_OS),linux)
+		NPROCS?=$(shell grep -c ^processor /proc/cpuinfo)
+	endif
+endif
+
+NPROCS?=1
+WORKHOME=Product
+WORKFOLDER=$(TARGET_ARCH_LC)-$(TARGET_OS).$(BUILD_TYPE_LC)
+WORKDIR=$(WORKHOME)/$(WORKFOLDER)
+
+BUILD_ROOT=$(WORKDIR)/obj
+INSTALL_ROOT=$(WORKDIR)/out
+
+BUILD_FOLDER=$(WORKFOLDER)/obj
+INSTALL_FOLDER=$(WORKFOLDER)/out
+BUILD_ALIAS=$(WORKHOME)/obj
+INSTALL_ALIAS=$(WORKHOME)/out
+
+INSTALL_PATH?=$(CURDIR)/$(WORKDIR)/out
+
+TIMESTAMP_CONFIGURE=$(WORKDIR)/CONFIGURE
+TIMESTAMP_BUILD=$(WORKDIR)/BUILD
+TIMESTAMP_INSTALL=$(WORKDIR)/INSTALL
+
+all: build
+
+###
+### Command (public)
+###
+configure: configure_internal
+
+build: build_internal
+
+install: $(TIMESTAMP_INSTALL)
+
+clean:
+	rm -rf $(WORKDIR)
+
+distclean:
+	rm -rf $(WORKDIR)
+	rm -rf externals/*.stamp
+	rm -rf tests/nnapi/src/generated/
+
+###
+### Command (internal)
+###
+configure_internal:
+	NNFW_BUILD_DIR="$(CURDIR)/$(BUILD_ROOT)" NNFW_INSTALL_PREFIX=$(INSTALL_PATH) ./nnfw configure \
+		-DCMAKE_BUILD_TYPE=$(BUILD_TYPE_LC) -DTARGET_ARCH=$(TARGET_ARCH_LC) \
+		-DHOST_OS=$(HOST_OS) \
+		-DTARGET_OS=$(TARGET_OS) \
+		-DTFLITE_MAJOR_VER=$(TFLITE_MAJOR_VER) \
+		-DTFLITE_MINOR_VER=$(TFLITE_MINOR_VER) \
+		$(OPTIONS)
+	touch $(TIMESTAMP_CONFIGURE)
+
+build_internal: $(BUILD_ROOT)
+	cd $(BUILD_ROOT) && make -j $(NPROCS) all
+	rm -rf $(BUILD_ALIAS)
+	ln -s $(BUILD_FOLDER) $(BUILD_ALIAS)
+	touch $(TIMESTAMP_BUILD)
+
+install_internal:
+	cd $(BUILD_ROOT) && make install
+	rm -rf $(INSTALL_ALIAS)
+	ln -s $(INSTALL_FOLDER) $(INSTALL_ALIAS)
+	touch $(TIMESTAMP_INSTALL)
+
+build_test_suite: install_internal
+	@echo "packaging test suite"
+	@rm -rf $(INSTALL_ROOT)/test-suite.tar.gz
+	@tar -zcf test-suite.tar.gz tests/scripts tests/framework infra $(INSTALL_ALIAS) --dereference
+	@mv test-suite.tar.gz $(INSTALL_ROOT)/.
+
+build_coverage_suite: install_internal
+	@echo "packaging test-coverage suite"
+	@rm -rf $(INSTALL_ROOT)/coverage-suite.tar.gz
+	@find Product -name "*.gcno" > include_lists.txt
+	@pwd | grep -o '/' | wc -l > tests/scripts/build_path_depth.txt
+	@tar -zcf coverage-suite.tar.gz tests/scripts tests/framework tools/lcov-to-cobertura-xml \
+		nnas nnfw infra runtimes $(INSTALL_ALIAS) --dereference -T include_lists.txt
+	@rm -rf include_lists.txt tests/scripts/build_path_depth.txt
+	@mv coverage-suite.tar.gz $(INSTALL_ROOT)/.
+
+###
+### Timestamps
+###
+$(WORKDIR):
+	mkdir -p $@
+
+$(BUILD_ROOT): $(WORKDIR) configure_internal
+
+$(TIMESTAMP_CONFIGURE): configure_internal
+
+$(TIMESTAMP_BUILD): $(TIMESTAMP_CONFIGURE) build_internal
+
+$(TIMESTAMP_INSTALL): $(TIMESTAMP_BUILD) install_internal
diff --git a/README.md b/README.md
index 952c09883..53a4b2805 100644
--- a/README.md
+++ b/README.md
@@ -3,18 +3,32 @@
 A high-performance, on-device neural network inference framework
 
 ## Goal
+
 This project _nnfw_ aims at providing a high-performance, on-device neural network (NN) inference
 framework that performs inference of a given NN model on processors, such as CPU, GPU, or NPU, in
-the target platform, such as Tizen and Smart Machine Platform (SMP).
+the target platform, such as the Linux kernel based OS including Tizen.
 
 ## Project Documents
-- [Roadmap](docs/roadmap.md)
-- [SW Requirement Specification](docs/project/2018_requirement_specification.md)
-- [SW High Level Design](docs/project/2018_high_level_design.md)
+
+- [Roadmap](docs/nnfw/roadmap.md)
+- [SW Requirement Specification](docs/nnfw/project/2019_requirement_specification.md)
+- [SW High Level Design](docs/nnfw/project/2018_high_level_design.md)
 
 ## Getting started
-- For the contribution, please refer to our [contribution guide](docs/HowToContribute.md).
-- You can also find how-to documents [HERE](docs/howto.md).
+
+- For the contribution, please refer to our [contribution guide](docs/nnfw/HowToContribute.md).
+- You can also find how-to documents [HERE](docs/nnfw/howto.md).
+
+## Maintainers
+
+- Sung-Jae Lee <<sj925.lee@samsung.com>>
+- Chunseok Lee <<chunseok.lee@samsung.com>>
+
+## Committers
+
+- Hyeongseok Oh <<hseok82.oh@samsung.com>>
+- Hanjoung Lee <<hanjoung.lee@samsung.com>>
+- Sharan Allur <<sharan.allur@samsung.com>>
 
 ## Feature Request (NEW)
 
@@ -22,16 +36,56 @@ You can suggest development of nnfw's features that are not yet available.
 
 The functions requested so far can be checked in the [popular feature request](https://github.sec.samsung.net/STAR/nnfw/issues?utf8=%E2%9C%93&q=is%3Aopen+is%3Aissue+label%3AFEATURE_REQUEST+sort%3Areactions-%2B1-desc) list.
 
-- If the feature you want is on the list, :+1: to the body of the issue. The feature with the most 
+- If the feature you want is on the list, :+1: to the body of the issue. The feature with the most
 :+1: is placed at the top of the list. When adding new features, we will prioritize them with this reference.
 Of course, it is good to add an additional comment which describes your request in detail.
 
 - For features not listed, [create a new issue](https://github.sec.samsung.net/STAR/nnfw/issues/new).
 Sooner or later, the maintainer will tag the `FEATURE_REQUEST` label and appear on the list.
 
-We expect most current feature requests to be focused on operator kernel implementations.
-It is good to make a request, but it is better if you contribute by yourself. See the following guide, 
-[How to Implement Operator Kernel](docs/HowToImplementOperatorKernel.md), for help.
+We expect one of the most frequent feature requests would be the operator kernel implementation.
+It is good to make a request, but it is better if you contribute by yourself. See the following guide,
+[How to Implement Operator Kernel](docs/nnfw/HowToImplementOperatorKernel.md), for help.
 
 We are looking forward to your participation.
 Thank you in advance!
+
+# nncc
+Re-targetable neural network (NN) model compilation framework
+
+## Goals
+nncc, which stands for neural network compiler collection, aims to provide a general framework for
+compiling a given NN model to an artifact that runs on various target devices such as CPU, GPU, or
+NPU.
+
+## Maintainers
+
+- Sung-Jae Lee <<sj925.lee@samsung.com>>
+- Jonghyun Park <<jh1302.park@samsung.com>>
+
+## Committers
+
+- Saehie Park <<saehie.park@samsung.com>>
+- Hyeongseok Oh <<hseok82.oh@samsung.com>>
+- Efimov Alexander <<a.efimov@samsung.com>>
+
+----
+
+## Notice
+
+### 22/07/2019
+
+Congratulations! On July 22nd, 2019, _nnfw_ repo and
+[_nncc_](https://github.sec.samsung.net/STAR/nncc) repo are finally integrated into single one. Now
+all activities related to the development of _nnas(Neural Network Acceleration Solution)_ will
+proceed in this integrated _nnfw_ repo. The old _nncc_ repo will only be maintained for follow up on
+remaining issues and for preserving development history. The following notice will remain in place
+until the update of documents in integrated repo is complete.
+
+### 02/05/2019
+
+~~We are currently working on [_nncc_](https://github.sec.samsung.net/STAR/nncc) as a sibling project.
+In our plan, the two projects will soon be integrated into one, and focusing on their roles as
+front-end(_nncc_) and back-end(_nnfw_), respectively. It will accompany the physical combination of
+the github repo.~~ You can find the latest roadmap of the integrated project
+[here](https://github.sec.samsung.net/orgs/STAR/projects/1).
diff --git a/cmake/ApplyCompileFlags.cmake b/cmake/ApplyCompileFlags.cmake
deleted file mode 100644
index e2124bb1f..000000000
--- a/cmake/ApplyCompileFlags.cmake
+++ /dev/null
@@ -1,15 +0,0 @@
-# add common flags
-foreach(FLAG ${FLAGS_COMMON})
-  set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${FLAG}")
-  set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${FLAG}")
-endforeach()
-
-# add c flags
-foreach(FLAG ${FLAGS_CONLY})
-  set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${FLAG}")
-endforeach()
-
-# add cxx flags
-foreach(FLAG ${FLAGS_CXXONLY})
-  set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${FLAG}")
-endforeach()
diff --git a/cmake/CfgOptionFlags.cmake b/cmake/CfgOptionFlags.cmake
deleted file mode 100644
index f14033592..000000000
--- a/cmake/CfgOptionFlags.cmake
+++ /dev/null
@@ -1,26 +0,0 @@
-#
-# Configuration flags
-#
-option(BUILD_PURE_ARM_COMPUTE "Build pure_arm_compute runtime" ON)
-option(BUILD_NEURUN "Build neurun" OFF) #if implementation is done, it would replace nn runtime.
-option(BUILD_RUNTIME_NNAPI_TEST "Build Runtime NN API Generated Test" ON)
-option(BUILD_TFLITE_BENCHMARK_MODEL "Build tflite benchmark model" OFF)
-option(BUILD_NNAPI_QUICKCHECK "Build NN API Quickcheck tools" OFF)
-#
-# Configuration flags for contrib
-#
-option(BUILD_BENCHMARK_ACL "Build ARM Compute Library Benchmarks" OFF)
-option(BUILD_DETECTION_APP "Build detection example app" OFF)
-option(BUILD_LABS "Build lab projects" OFF)
-option(BUILD_TFLITE_TEST "Build tensorflow lite test" OFF)
-option(BUILD_TFLITE_CLASSIFY_APP "Build tflite_classify app" OFF)
-
-if("${TARGET_ARCH}" STREQUAL "armv7l" AND NOT "${TARGET_OS}" STREQUAL "tizen")
-  set(BUILD_PURE_ARM_COMPUTE ON)
-endif()
-
-# On x86, disable pureacl/new runtine build which depends on arm compute library
-if("${TARGET_ARCH}" STREQUAL "x86_64")
-  set(BUILD_PURE_ARM_COMPUTE OFF)
-  set(BUILD_NEURUN OFF)
-endif()
diff --git a/cmake/config/config_aarch64-linux.cmake b/cmake/config/config_aarch64-linux.cmake
deleted file mode 100644
index 4879c5817..000000000
--- a/cmake/config/config_aarch64-linux.cmake
+++ /dev/null
@@ -1,32 +0,0 @@
-#
-# config for aarch64-linux
-#
-include(CMakeForceCompiler)
-
-set(CMAKE_SYSTEM_NAME Linux)
-set(CMAKE_SYSTEM_PROCESSOR aarch64)
-
-set(CMAKE_C_COMPILER   aarch64-linux-gnu-gcc)
-set(CMAKE_CXX_COMPILER aarch64-linux-gnu-g++)
-
-# where is the target environment
-set(ROOTFS_ARM64 $ENV{ROOTFS_ARM64})
-if(NOT EXISTS "${ROOTFS_ARM64}/lib/aarch64-linux-gnu")
-  set(ROOTFS_ARM64 "${CMAKE_CURRENT_LIST_DIR}/../../tools/cross/rootfs/arm64")
-endif()
-
-set(CMAKE_SYSROOT ${ROOTFS_ARM64})
-set(CMAKE_FIND_ROOT_PATH ${ROOTFS_ARM64})
-set(CMAKE_SHARED_LINKER_FLAGS
-    "${CMAKE_SHARED_LINKER_FLAGS} --sysroot=${ROOTFS_ARM64}"
-    CACHE INTERNAL "" FORCE)
-set(CMAKE_EXE_LINKER_FLAGS
-    "${CMAKE_EXE_LINKER_FLAGS} --sysroot=${ROOTFS_ARM64}"
-    CACHE INTERNAL "" FORCE)
-
-# search for programs in the build host directories
-set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
-
-# for libraries and headers in the target directories
-set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
-set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
diff --git a/cmake/config/config_aarch64-tizen.cmake b/cmake/config/config_aarch64-tizen.cmake
deleted file mode 100644
index 422174712..000000000
--- a/cmake/config/config_aarch64-tizen.cmake
+++ /dev/null
@@ -1,55 +0,0 @@
-#
-# config for aarch64-linux
-#
-include(CMakeForceCompiler)
-
-set(CMAKE_SYSTEM_NAME Linux)
-set(CMAKE_SYSTEM_PROCESSOR aarch64)
-
-set(CMAKE_C_COMPILER   aarch64-linux-gnu-gcc-5)
-set(CMAKE_CXX_COMPILER aarch64-linux-gnu-g++-5)
-
-set(TIZEN_TOOLCHAIN "aarch64-tizen-linux-gnu/6.2.1")
-
-# where is the target environment
-set(ROOTFS_ARM64 $ENV{ROOTFS_ARM64})
-if(NOT EXISTS "${ROOTFS_ARM64}/usr/lib64/gcc/${TIZEN_TOOLCHAIN}")
-  set(ROOTFS_ARM64 "${CMAKE_SOURCE_DIR}/tools/cross/rootfs/arm64")
-endif()
-
-set(CMAKE_SYSROOT ${ROOTFS_ARM64})
-set(CMAKE_FIND_ROOT_PATH ${ROOTFS_ARM64})
-set(CMAKE_SHARED_LINKER_FLAGS
-    "${CMAKE_SHARED_LINKER_FLAGS} --sysroot=${ROOTFS_ARM64}"
-    CACHE INTERNAL "" FORCE)
-set(CMAKE_EXE_LINKER_FLAGS
-    "${CMAKE_EXE_LINKER_FLAGS} --sysroot=${ROOTFS_ARM64}"
-    CACHE INTERNAL "" FORCE)
-
-# search for programs in the build host directories
-set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
-
-# for libraries and headers in the target directories
-set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
-set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
-
-add_compile_options(--sysroot=${ROOTFS_ARM64})
-
-set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} --sysroot=${ROOTFS_ARM64}")
-
-set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} --sysroot=${ROOTFS_ARM64}")
-
-include_directories(SYSTEM ${ROOTFS_ARM64}/usr/lib64/gcc/${TIZEN_TOOLCHAIN}/include/c++/)
-include_directories(SYSTEM ${ROOTFS_ARM64}/usr/lib64/gcc/${TIZEN_TOOLCHAIN}/include/c++/aarch64-tizen-linux-gnu)
-add_compile_options(-Wno-deprecated-declarations) # compile-time option
-add_compile_options(-D__extern_always_inline=inline) # compile-time option
-
-set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -B${ROOTFS_ARM64}/usr/lib64/gcc/${TIZEN_TOOLCHAIN}")
-set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -L${ROOTFS_ARM64}/lib64")
-set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -L${ROOTFS_ARM64}/usr/lib64")
-set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -L${ROOTFS_ARM64}/usr/lib64/gcc/${TIZEN_TOOLCHAIN}")
-
-set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -B${ROOTFS_ARM64}/usr/lib64/gcc/${TIZEN_TOOLCHAIN}")
-set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L${ROOTFS_ARM64}/lib64")
-set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L${ROOTFS_ARM64}/usr/lib64")
-set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L${ROOTFS_ARM64}/usr/lib64/gcc/${TIZEN_TOOLCHAIN}")
diff --git a/cmake/config/config_arm64-android.cmake b/cmake/config/config_arm64-android.cmake
deleted file mode 100644
index 1c096b583..000000000
--- a/cmake/config/config_arm64-android.cmake
+++ /dev/null
@@ -1,44 +0,0 @@
-set(ANDROID_STANDALONE $ENV{ROOTFS_ARM64})
-set(CROSS_NDK_TOOLCHAIN ${ANDROID_STANDALONE}/bin)
-set(CROSS_ROOTFS ${ANDROID_STANDALONE}/sysroot)
-
-set(CMAKE_SYSTEM_NAME Linux)
-set(CMAKE_SYSTEM_VERSION 1)
-set(CMAKE_SYSTEM_PROCESSOR aarch64)
-
-## Specify the toolchain
-set(TOOLCHAIN "aarch64-linux-android")
-set(CMAKE_PREFIX_PATH ${CROSS_NDK_TOOLCHAIN})
-set(TOOLCHAIN_PREFIX ${TOOLCHAIN}-)
-
-find_program(CMAKE_C_COMPILER ${TOOLCHAIN_PREFIX}clang)
-find_program(CMAKE_CXX_COMPILER ${TOOLCHAIN_PREFIX}clang++)
-find_program(CMAKE_ASM_COMPILER ${TOOLCHAIN_PREFIX}clang)
-find_program(CMAKE_AR ${TOOLCHAIN_PREFIX}ar)
-find_program(CMAKE_LD ${TOOLCHAIN_PREFIX}ar)
-find_program(CMAKE_OBJCOPY ${TOOLCHAIN_PREFIX}objcopy)
-find_program(CMAKE_OBJDUMP ${TOOLCHAIN_PREFIX}objdump)
-
-add_compile_options(--sysroot=${CROSS_ROOTFS})
-add_compile_options(-fPIE)
-
-## Needed for Android or bionic specific conditionals
-#add_compile_options(-D__ANDROID__)
-#add_compile_options(-D__BIONIC__)
-
-## NOTE Not sure this is safe. This may cause side effects.
-## Without this, it cannot find `std::stol`, `std::stoi` and so on, with android toolchain
-add_compile_options(-D_GLIBCXX_USE_C99=1)
-
-set(CROSS_LINK_FLAGS "${CROSS_LINK_FLAGS} -B${CROSS_ROOTFS}/usr/lib/gcc/${TOOLCHAIN}")
-set(CROSS_LINK_FLAGS "${CROSS_LINK_FLAGS} -L${CROSS_ROOTFS}/lib/${TOOLCHAIN}")
-set(CROSS_LINK_FLAGS "${CROSS_LINK_FLAGS} --sysroot=${CROSS_ROOTFS}")
-set(CROSS_LINK_FLAGS "${CROSS_LINK_FLAGS} -fPIE -pie")
-
-set(CMAKE_EXE_LINKER_FLAGS    "${CMAKE_EXE_LINKER_FLAGS}    ${CROSS_LINK_FLAGS}" CACHE STRING "" FORCE)
-set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} ${CROSS_LINK_FLAGS}" CACHE STRING "" FORCE)
-set(CMAKE_MODULE_LINKER_FLAGS "${CMAKE_MODULE_LINKER_FLAGS} ${CROSS_LINK_FLAGS}" CACHE STRING "" FORCE)
-
-set(CMAKE_FIND_ROOT_PATH "${CROSS_ROOTFS}")
-set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
-set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
diff --git a/cmake/config/config_armv7l-linux.cmake b/cmake/config/config_armv7l-linux.cmake
deleted file mode 100644
index e092596a2..000000000
--- a/cmake/config/config_armv7l-linux.cmake
+++ /dev/null
@@ -1,32 +0,0 @@
-#
-# config for arm-linux
-#
-include(CMakeForceCompiler)
-
-set(CMAKE_SYSTEM_NAME Linux)
-set(CMAKE_SYSTEM_PROCESSOR armv7l)
-
-set(CMAKE_C_COMPILER   arm-linux-gnueabihf-gcc)
-set(CMAKE_CXX_COMPILER arm-linux-gnueabihf-g++)
-
-# where is the target environment
-set(ROOTFS_ARM $ENV{ROOTFS_ARM})
-if(NOT EXISTS "${ROOTFS_ARM}/lib/arm-linux-gnueabihf")
-  set(ROOTFS_ARM "${CMAKE_CURRENT_LIST_DIR}/../../tools/cross/rootfs/arm")
-endif()
-
-set(CMAKE_SYSROOT ${ROOTFS_ARM})
-set(CMAKE_FIND_ROOT_PATH ${ROOTFS_ARM})
-set(CMAKE_SHARED_LINKER_FLAGS
-    "${CMAKE_SHARED_LINKER_FLAGS} --sysroot=${ROOTFS_ARM}"
-    CACHE INTERNAL "" FORCE)
-set(CMAKE_EXE_LINKER_FLAGS
-    "${CMAKE_EXE_LINKER_FLAGS} --sysroot=${ROOTFS_ARM}"
-    CACHE INTERNAL "" FORCE)
-
-# search for programs in the build host directories
-set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
-
-# for libraries and headers in the target directories
-set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
-set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
diff --git a/cmake/config/config_armv7l-tizen.cmake b/cmake/config/config_armv7l-tizen.cmake
deleted file mode 100644
index 7971d9156..000000000
--- a/cmake/config/config_armv7l-tizen.cmake
+++ /dev/null
@@ -1,60 +0,0 @@
-#
-# config for arm-linux
-#
-include(CMakeForceCompiler)
-
-set(CMAKE_SYSTEM_NAME Linux)
-set(CMAKE_SYSTEM_PROCESSOR armv7l)
-
-set(CMAKE_C_COMPILER   arm-linux-gnueabi-gcc-5)
-set(CMAKE_CXX_COMPILER arm-linux-gnueabi-g++-5)
-
-set(TIZEN_TOOLCHAIN "armv7l-tizen-linux-gnueabi/6.2.1")
-
-# where is the target environment
-set(ROOTFS_ARM $ENV{ROOTFS_ARM})
-if(NOT EXISTS "${ROOTFS_ARM}/usr/lib/gcc/${TIZEN_TOOLCHAIN}")
-  set(ROOTFS_ARM "${CMAKE_SOURCE_DIR}/tools/cross/rootfs/armel")
-endif()
-
-set(CMAKE_SYSROOT ${ROOTFS_ARM})
-set(CMAKE_FIND_ROOT_PATH ${ROOTFS_ARM})
-set(CMAKE_SHARED_LINKER_FLAGS
-    "${CMAKE_SHARED_LINKER_FLAGS} --sysroot=${ROOTFS_ARM}"
-    CACHE INTERNAL "" FORCE)
-set(CMAKE_EXE_LINKER_FLAGS
-    "${CMAKE_EXE_LINKER_FLAGS} --sysroot=${ROOTFS_ARM}"
-    CACHE INTERNAL "" FORCE)
-
-# search for programs in the build host directories
-set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
-
-# for libraries and headers in the target directories
-set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
-set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
-
-
-
-add_compile_options(-mthumb)
-add_compile_options(-mfpu=neon-vfpv4)
-add_compile_options(-mfloat-abi=softfp)
-add_compile_options(--sysroot=${ROOTFS_ARM})
-
-set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} --sysroot=${ROOTFS_ARM}")
-
-set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} --sysroot=${ROOTFS_ARM}")
-
-include_directories(SYSTEM ${ROOTFS_ARM}/usr/lib/gcc/${TIZEN_TOOLCHAIN}/include/c++/)
-include_directories(SYSTEM ${ROOTFS_ARM}/usr/lib/gcc/${TIZEN_TOOLCHAIN}/include/c++/armv7l-tizen-linux-gnueabi)
-add_compile_options(-Wno-deprecated-declarations) # compile-time option
-add_compile_options(-D__extern_always_inline=inline) # compile-time option
-
-set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -B${ROOTFS_ARM}/usr/lib/gcc/${TIZEN_TOOLCHAIN}")
-set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -L${ROOTFS_ARM}/lib")
-set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -L${ROOTFS_ARM}/usr/lib")
-set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -L${ROOTFS_ARM}/usr/lib/gcc/${TIZEN_TOOLCHAIN}")
-
-set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -B${ROOTFS_ARM}/usr/lib/gcc/${TIZEN_TOOLCHAIN}")
-set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L${ROOTFS_ARM}/lib")
-set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L${ROOTFS_ARM}/usr/lib")
-set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L${ROOTFS_ARM}/usr/lib/gcc/${TIZEN_TOOLCHAIN}")
diff --git a/cmake/config/config_x86_64-linux.cmake b/cmake/config/config_x86_64-linux.cmake
deleted file mode 100644
index 3dee8766c..000000000
--- a/cmake/config/config_x86_64-linux.cmake
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# config for x86_64-linux
-#
-include(CMakeForceCompiler)
-
-set(CMAKE_SYSTEM_NAME Linux)
-set(CMAKE_SYSTEM_PROCESSOR x86_64)
diff --git a/cmake/modules/ExternalSourceTools.cmake b/cmake/modules/ExternalSourceTools.cmake
deleted file mode 100644
index 76ebb5500..000000000
--- a/cmake/modules/ExternalSourceTools.cmake
+++ /dev/null
@@ -1,58 +0,0 @@
-function(ExternalSource_Download PREFIX URL)
-  get_filename_component(FILENAME ${URL} NAME)
-
-  set(CACHE_DIR "${CMAKE_SOURCE_DIR}/externals")
-  set(OUT_DIR "${CACHE_DIR}/${PREFIX}")
-  set(TMP_DIR "${CACHE_DIR}/${PREFIX}-tmp")
-
-  set(DOWNLOAD_PATH "${CACHE_DIR}/${PREFIX}-${FILENAME}")
-  set(STAMP_PATH "${CACHE_DIR}/${PREFIX}.stamp")
-
-  if(NOT EXISTS "${CACHE_DIR}")
-    file(MAKE_DIRECTORY "${CACHE_DIR}")
-  endif(NOT EXISTS "${CACHE_DIR}")
-
-  # TODO Check MD5 for correctness
-  set(MATCH_URL FALSE)
-  if(EXISTS "${STAMP_PATH}")
-    file(READ "${STAMP_PATH}" SAVED_URL)
-    if("${SAVED_URL}" STREQUAL "${URL}")
-      set(MATCH_URL TRUE)
-    endif("${SAVED_URL}" STREQUAL "${URL}")
-  endif(EXISTS "${STAMP_PATH}")
-
-  if(NOT EXISTS "${STAMP_PATH}" OR NOT EXISTS "${OUT_DIR}" OR NOT MATCH_URL)
-    file(REMOVE_RECURSE "${OUT_DIR}")
-    file(REMOVE_RECURSE "${TMP_DIR}")
-
-    file(MAKE_DIRECTORY "${TMP_DIR}")
-
-    message("-- Download ${PREFIX} from ${URL}")
-    file(DOWNLOAD ${URL} "${DOWNLOAD_PATH}")
-    message("-- Download ${PREFIX} from ${URL} - done")
-
-    message("-- Extract ${PREFIX}")
-    execute_process(COMMAND ${CMAKE_COMMAND} -E tar xfz "${DOWNLOAD_PATH}"
-                    WORKING_DIRECTORY "${TMP_DIR}")
-    file(REMOVE "${DOWNLOAD_PATH}")
-    message("-- Extract ${PREFIX} - done")
-
-    message("-- Cleanup ${PREFIX}")
-    file(GLOB contents "${TMP_DIR}/*")
-    list(LENGTH contents n)
-    if(NOT n EQUAL 1 OR NOT IS_DIRECTORY "${contents}")
-      set(contents "${TMP_DIR}")
-    endif()
-
-    get_filename_component(contents ${contents} ABSOLUTE)
-
-    file(RENAME ${contents} "${OUT_DIR}")
-    file(REMOVE_RECURSE "${TMP_DIR}")
-    file(WRITE "${STAMP_PATH}" "${URL}")
-    message("-- Cleanup ${PREFIX} - done")
-  endif()
-
-  set(${PREFIX}_SOURCE_DIR "${OUT_DIR}" PARENT_SCOPE)
-endfunction(ExternalSource_Download)
-
-set(ExternalSourceTools_FOUND TRUE)
diff --git a/cmake/option/identify_platform.cmake b/cmake/option/identify_platform.cmake
deleted file mode 100644
index 3f62b524f..000000000
--- a/cmake/option/identify_platform.cmake
+++ /dev/null
@@ -1,48 +0,0 @@
-# set host platform to build
-if(NOT HOST_ARCH OR "${HOST_ARCH}" STREQUAL "")
-  set(HOST_ARCH ${CMAKE_HOST_SYSTEM_PROCESSOR})
-endif()
-
-# set target platform to run
-if(NOT TARGET_ARCH OR "${TARGET_ARCH}" STREQUAL "")
-  set(TARGET_ARCH "${HOST_ARCH}")
-endif()
-
-if(NOT DEFINED TARGET_OS)
-  set(TARGET_OS "${HOST_OS}")
-endif()
-
-if("${HOST_ARCH}" STREQUAL "x86_64")
-  set(HOST_ARCH_BASE ${HOST_ARCH})
-elseif("${HOST_ARCH}" STREQUAL "armv7l")
-  set(HOST_ARCH_BASE "arm")
-elseif("${HOST_ARCH}" STREQUAL "arm64")
-  set(HOST_ARCH_BASE "arm64")
-elseif("${HOST_ARCH}" STREQUAL "aarch64")
-  set(HOST_ARCH_BASE "aarch64")
-else()
-  message(FATAL_ERROR "'${HOST_ARCH}' architecture is not supported")
-endif()
-
-if("${TARGET_ARCH}" STREQUAL "x86_64")
-  set(TARGET_ARCH_BASE ${TARGET_ARCH})
-elseif("${TARGET_ARCH}" STREQUAL "armv7l")
-  set(TARGET_ARCH_BASE "arm")
-elseif("${TARGET_ARCH}" STREQUAL "arm64")
-  set(TARGET_ARCH_BASE "arm64")
-elseif("${TARGET_ARCH}" STREQUAL "aarch64")
-  set(TARGET_ARCH_BASE "aarch64")
-else()
-  message(FATAL_ERROR "'${TARGET_ARCH}' architecture is not supported")
-endif()
-
-# Determine native or cross build
-if("${HOST_ARCH}" STREQUAL "${TARGET_ARCH}")
-  set(BUILD_IS_NATIVE True)
-else()
-  set(BUILD_IS_NATIVE False)
-endif()
-
-# host & target platform name
-set(HOST_PLATFORM "${HOST_ARCH}-${HOST_OS}")
-set(TARGET_PLATFORM "${TARGET_ARCH}-${TARGET_OS}")
diff --git a/cmake/option/option_aarch64-linux.cmake b/cmake/option/option_aarch64-linux.cmake
deleted file mode 100644
index fa5c9205c..000000000
--- a/cmake/option/option_aarch64-linux.cmake
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# aarch64 linux compile options
-#
-
-message(STATUS "Building for AARCH64 Linux")
-
-# include linux common
-include("cmake/option/option_linux.cmake")
-
-if(NOT EXISTS "${ROOTFS_ARM64}/lib/aarch64-linux-gnu")
-  message(FATAL_ERROR "Please prepare RootFS for ARM64")
-endif()
-
-# addition for aarch64-linux
-set(FLAGS_COMMON ${FLAGS_COMMON}
-    )
diff --git a/cmake/option/option_aarch64-tizen.cmake b/cmake/option/option_aarch64-tizen.cmake
deleted file mode 100644
index 5e37f35a9..000000000
--- a/cmake/option/option_aarch64-tizen.cmake
+++ /dev/null
@@ -1,15 +0,0 @@
-#
-# aarch64 tizen compile options
-#
-
-message(STATUS "Building for AARCH64 Tizen")
-
-# TODO : add and use option_tizen if something uncommon comes up
-# include linux common
-include("cmake/option/option_linux.cmake")
-
-# TODO : support rootfs setting for tizen cross-build
-
-# addition for aarch64-tizen
-set(FLAGS_COMMON ${FLAGS_COMMON}
-    )
diff --git a/cmake/option/option_arm64-android.cmake b/cmake/option/option_arm64-android.cmake
deleted file mode 100644
index 3ce2c815b..000000000
--- a/cmake/option/option_arm64-android.cmake
+++ /dev/null
@@ -1,9 +0,0 @@
-include("cmake/option/option_linux.cmake")
-
-# On Android, pthread is contained in bionic(libc)
-set(LIB_PTHREAD "")
-
-# SIMD for arm64
-set(FLAGS_COMMON ${FLAGS_COMMON}
-    "-ftree-vectorize"
-    )
diff --git a/cmake/option/option_armv7l-linux.cmake b/cmake/option/option_armv7l-linux.cmake
deleted file mode 100644
index b295b4a82..000000000
--- a/cmake/option/option_armv7l-linux.cmake
+++ /dev/null
@@ -1,32 +0,0 @@
-#
-# armv7l linux compile options
-#
-
-message(STATUS "Building for ARMv7l Linux")
-
-# include linux common
-include("cmake/option/option_linux.cmake")
-
-if(NOT EXISTS "${ROOTFS_ARM}/lib/arm-linux-gnueabihf")
-  message(FATAL_ERROR "Please prepare RootFS for ARM")
-endif()
-
-# addition for arm-linux
-set(FLAGS_COMMON ${FLAGS_COMMON}
-    "-mcpu=cortex-a7"
-    "-mfloat-abi=hard"
-    "-mfpu=neon-vfpv4"
-    "-funsafe-math-optimizations"
-    "-ftree-vectorize"
-    "-fPIC"
-    )
-
-# remove warning from arm cl
-# https://github.com/ARM-software/ComputeLibrary/issues/330
-set(GCC_VERSION_DISABLE_WARNING 6.0)
-if(CMAKE_CXX_COMPILER_VERSION VERSION_GREATER GCC_VERSION_DISABLE_WARNING)
-  message(STATUS "GCC version higher than ${GCC_VERSION_DISABLE_WARNING}")
-  set(FLAGS_CXXONLY ${FLAGS_CXXONLY}
-      "-Wno-ignored-attributes"
-      )
-endif()
diff --git a/cmake/option/option_armv7l-tizen.cmake b/cmake/option/option_armv7l-tizen.cmake
deleted file mode 100644
index 6040eb6b8..000000000
--- a/cmake/option/option_armv7l-tizen.cmake
+++ /dev/null
@@ -1,20 +0,0 @@
-#
-# armv7l tizen compile options
-#
-
-message(STATUS "Building for ARMv7l(softfp) Tizen")
-
-# TODO : add and use option_tizen if something uncommon comes up
-# include linux common
-include("cmake/option/option_linux.cmake")
-
-# TODO : support rootfs setting for tizen cross-build
-
-# addition for arm-linux
-set(FLAGS_COMMON ${FLAGS_COMMON}
-    "-mcpu=cortex-a8"
-    "-mfloat-abi=softfp"
-    "-mfpu=neon-vfpv4"
-    "-funsafe-math-optimizations"
-    "-ftree-vectorize"
-    )
diff --git a/cmake/option/option_linux.cmake b/cmake/option/option_linux.cmake
deleted file mode 100644
index 8cae4e9a1..000000000
--- a/cmake/option/option_linux.cmake
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# linux common compile options
-#
-
-# flags for build type: debug, release
-set(CMAKE_C_FLAGS_DEBUG     "-O0 -g -DDEBUG")
-set(CMAKE_CXX_FLAGS_DEBUG   "-O0 -g -DDEBUG")
-set(CMAKE_C_FLAGS_RELEASE   "-O2 -DNDEBUG")
-set(CMAKE_CXX_FLAGS_RELEASE "-O2 -DNDEBUG")
-
-# test-coverage build flag
-if("${COVERAGE_BUILD}" STREQUAL "1")
-  set(CMAKE_CXX_OUTPUT_EXTENSION_REPLACE ON)
-  set(FLAGS_COMMON "${FLAGS_COMMON} -fprofile-arcs -ftest-coverage")
-  set(CMAKE_EXE_LINKER_FLAGS
-    "${CMAKE_EXE_LINKER_FLAGS} -fprofile-arcs -ftest-coverage")
-endif()
-
-#
-# linux common variable and settings
-#
-
-# lib pthread as a variable (pthread must be disabled on android)
-set(LIB_PTHREAD pthread)
-
-# nnfw common path
-set(NNFW_INCLUDE_DIR ${CMAKE_SOURCE_DIR}/include)
-set(NNFW_EXTERNALS_DIR ${CMAKE_SOURCE_DIR}/externals)
-
-# External sources to build tflite
-# If already downloaded files are in tensorflow/tensorflow/contrib/lite/downloads,
-# set TFLITE_DEPEND_DIR to ${NNFW_EXTERNALS_DIR}/tensorflow/tensorflow/contrib/lite/downloads
-set(TFLITE_DEPEND_DIR ${NNFW_EXTERNALS_DIR})
diff --git a/cmake/option/option_x86_64-linux.cmake b/cmake/option/option_x86_64-linux.cmake
deleted file mode 100644
index 6f4d0ebfc..000000000
--- a/cmake/option/option_x86_64-linux.cmake
+++ /dev/null
@@ -1,12 +0,0 @@
-#
-# x86_64 linux compile options
-#
-message(STATUS "Building for x86-64 Linux")
-
-# include linux common
-include("cmake/option/option_linux.cmake")
-
-# SIMD for x86
-set(FLAGS_COMMON ${FLAGS_COMMON}
-    "-msse4"
-    )
diff --git a/cmake/packages/ARMComputeConfig.cmake b/cmake/packages/ARMComputeConfig.cmake
deleted file mode 100644
index 656163a8e..000000000
--- a/cmake/packages/ARMComputeConfig.cmake
+++ /dev/null
@@ -1,81 +0,0 @@
-function(_ARMCompute_Import)
-  nnfw_find_package(ARMComputeSource QUIET)
-
-  if(NOT ARMComputeSource_FOUND)
-    set(ARMCompute_FOUND FALSE PARENT_SCOPE)
-    return()
-  endif(NOT ARMComputeSource_FOUND)
-
-  include(FindPackageHandleStandardArgs)
-
-  list(APPEND ARMCompute_INCLUDE_SEARCH_PATHS /usr/include)
-
-  list(APPEND ARMCompute_LIB_SEARCH_PATHS /usr/lib)
-
-  find_path(INCLUDE_DIR NAMES arm_compute/core/ITensor.h PATHS ${ARMCompute_INCLUDE_SEARCH_PATHS})
-
-  find_library(CORE_LIBRARY NAMES  	 arm_compute_core  PATHS ${ARMCompute_LIB_SEARCH_PATHS})
-  find_library(RUNTIME_LIBRARY NAMES arm_compute       PATHS ${ARMCompute_LIB_SEARCH_PATHS})
-  find_library(GRAPH_LIBRARY NAMES   arm_compute_graph PATHS ${ARMCompute_LIB_SEARCH_PATHS})
-
-  if(NOT INCLUDE_DIR)
-    set(INCLUDE_DIR ${CMAKE_SOURCE_DIR}/externals/acl ${CMAKE_SOURCE_DIR}/externals/acl/include)
-  endif(NOT INCLUDE_DIR)
-
-  # NOTE '${CMAKE_INSTALL_PREFIX}/lib' should be searched as CI server places
-  #       pre-built ARM compute libraries on this directory
-  if(NOT CORE_LIBRARY AND EXISTS ${CMAKE_INSTALL_PREFIX}/lib/libarm_compute_core.so)
-    set(CORE_LIBRARY ${CMAKE_INSTALL_PREFIX}/lib/libarm_compute_core.so)
-  endif()
-
-  if(NOT CORE_LIBRARY)
-    return()
-    set(ARMCompute_FOUND FALSE PARENT_SCOPE)
-  endif()
-
-  if(NOT RUNTIME_LIBRARY AND EXISTS ${CMAKE_INSTALL_PREFIX}/lib/libarm_compute.so)
-    set(RUNTIME_LIBRARY ${CMAKE_INSTALL_PREFIX}/lib/libarm_compute.so)
-  endif()
-
-  if(NOT RUNTIME_LIBRARY)
-    return()
-    set(ARMCompute_FOUND FALSE PARENT_SCOPE)
-  endif()
-
-  if(NOT GRAPH_LIBRARY AND EXISTS ${CMAKE_INSTALL_PREFIX}/lib/libarm_compute_graph.so)
-    set(GRAPH_LIBRARY ${CMAKE_INSTALL_PREFIX}/lib/libarm_compute_graph.so)
-  endif()
-
-  if(NOT GRAPH_LIBRARY)
-    return()
-    set(ARMCompute_FOUND FALSE PARENT_SCOPE)
-  endif()
-
-  if(NOT TARGET arm_compute_core)
-    add_library(arm_compute_core INTERFACE)
-    target_include_directories(arm_compute_core INTERFACE ${INCLUDE_DIR})
-	target_link_libraries(arm_compute_core INTERFACE dl ${LIB_PTHREAD})
-    target_link_libraries(arm_compute_core INTERFACE ${CORE_LIBRARY})
-    if (${TARGET_OS} STREQUAL "tizen")
-      target_link_libraries(arm_compute_core INTERFACE OpenCL)
-    endif()
-  endif(NOT TARGET arm_compute_core)
-
-  if(NOT TARGET arm_compute)
-    add_library(arm_compute INTERFACE)
-    target_include_directories(arm_compute INTERFACE ${INCLUDE_DIR})
-    target_link_libraries(arm_compute INTERFACE ${RUNTIME_LIBRARY})
-    target_link_libraries(arm_compute INTERFACE arm_compute_core)
-  endif(NOT TARGET arm_compute)
-
-  if(NOT TARGET arm_compute_graph)
-    add_library(arm_compute_graph INTERFACE)
-    target_include_directories(arm_compute_graph INTERFACE ${INCLUDE_DIR})
-    target_link_libraries(arm_compute_graph INTERFACE ${GRAPH_LIBRARY})
-    target_link_libraries(arm_compute_graph INTERFACE arm_compute)
-  endif(NOT TARGET arm_compute_graph)
-
-  set(ARMCompute_FOUND TRUE PARENT_SCOPE)
-endfunction(_ARMCompute_Import)
-
-_ARMCompute_Import()
diff --git a/cmake/packages/ARMComputeSourceConfig.cmake b/cmake/packages/ARMComputeSourceConfig.cmake
deleted file mode 100644
index c1a31d047..000000000
--- a/cmake/packages/ARMComputeSourceConfig.cmake
+++ /dev/null
@@ -1,18 +0,0 @@
-function(_ARMComputeSource_import)
-  if(NOT DOWNLOAD_ARMCOMPUTE)
-    set(ARMComputeSource_FOUND FALSE PARENT_SCOPE)
-    return()
-  endif(NOT DOWNLOAD_ARMCOMPUTE)
-
-  nnfw_include(ExternalSourceTools)
-  nnfw_include(OptionTools)
-
-  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
-  set(ARMCOMPUTE_URL ${EXTERNAL_DOWNLOAD_SERVER}/ARM-software/ComputeLibrary/archive/v18.11.tar.gz)
-  ExternalSource_Download("acl" ${ARMCOMPUTE_URL})
-
-  set(ARMComputeSource_DIR ${acl_SOURCE_DIR} PARENT_SCOPE)
-  set(ARMComputeSource_FOUND TRUE PARENT_SCOPE)
-endfunction(_ARMComputeSource_import)
-
-_ARMComputeSource_import()
diff --git a/cmake/packages/AbslSourceConfig.cmake b/cmake/packages/AbslSourceConfig.cmake
deleted file mode 100644
index 9075b7397..000000000
--- a/cmake/packages/AbslSourceConfig.cmake
+++ /dev/null
@@ -1,19 +0,0 @@
-function(_AbslSource_import)
-  if(NOT DOWNLOAD_ABSL)
-    set(AbslSource_FOUND FALSE PARENT_SCOPE)
-    return()
-  endif(NOT DOWNLOAD_ABSL)
-
-  nnfw_include(ExternalSourceTools)
-  nnfw_include(OptionTools)
-
-  # NOTE The following URL comes from TensorFlow 1.12
-  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
-  set(ABSL_URL ${EXTERNAL_DOWNLOAD_SERVER}/abseil/abseil-cpp/archive/48cd2c3f351ff188bc85684b84a91b6e6d17d896.tar.gz)
-  ExternalSource_Download("absl" ${ABSL_URL})
-
-  set(AbslSource_DIR ${absl_SOURCE_DIR} PARENT_SCOPE)
-  set(AbslSource_FOUND TRUE PARENT_SCOPE)
-endfunction(_AbslSource_import)
-
-_AbslSource_import()
diff --git a/cmake/packages/EigenSourceConfig.cmake b/cmake/packages/EigenSourceConfig.cmake
deleted file mode 100644
index dd94e069e..000000000
--- a/cmake/packages/EigenSourceConfig.cmake
+++ /dev/null
@@ -1,19 +0,0 @@
-function(_EigenSource_import)
-  if(NOT DOWNLOAD_EIGEN)
-    set(EigenSource_FOUND FALSE PARENT_SCOPE)
-    return()
-  endif(NOT DOWNLOAD_EIGEN)
-
-  nnfw_include(ExternalSourceTools)
-  nnfw_include(OptionTools)
-
-  # NOTE TensorFlow 1.12 downloads Eign from the following URL
-  envoption(EXTERNAL_DOWNLOAD_SERVER "https://bitbucket.org")
-  set(EIGEN_URL ${EXTERNAL_DOWNLOAD_SERVER}/eigen/eigen/get/fd6845384b86.tar.gz)
-  ExternalSource_Download("eigen" ${EIGEN_URL})
-
-  set(EigenSource_DIR ${eigen_SOURCE_DIR} PARENT_SCOPE)
-  set(EigenSource_FOUND TRUE PARENT_SCOPE)
-endfunction(_EigenSource_import)
-
-_EigenSource_import()
diff --git a/cmake/packages/FarmhashSourceConfig.cmake b/cmake/packages/FarmhashSourceConfig.cmake
deleted file mode 100644
index 802367968..000000000
--- a/cmake/packages/FarmhashSourceConfig.cmake
+++ /dev/null
@@ -1,19 +0,0 @@
-function(_FarmhashSource_import)
-  if(NOT DOWNLOAD_FARMHASH)
-    set(FarmhashSource_FOUND FALSE PARENT_SCOPE)
-    return()
-  endif(NOT DOWNLOAD_FARMHASH)
-
-  nnfw_include(ExternalSourceTools)
-  nnfw_include(OptionTools)
-
-  # NOTE TensorFlow 1.12 downloads farmhash from the following URL
-  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
-  set(FARMHASH_URL ${EXTERNAL_DOWNLOAD_SERVER}/google/farmhash/archive/816a4ae622e964763ca0862d9dbd19324a1eaf45.tar.gz)
-  ExternalSource_Download("farmhash" ${FARMHASH_URL})
-
-  set(FarmhashSource_DIR ${farmhash_SOURCE_DIR} PARENT_SCOPE)
-  set(FarmhashSource_FOUND TRUE PARENT_SCOPE)
-endfunction(_FarmhashSource_import)
-
-_FarmhashSource_import()
diff --git a/cmake/packages/FlatBuffersSourceConfig.cmake b/cmake/packages/FlatBuffersSourceConfig.cmake
deleted file mode 100644
index 5f142bff7..000000000
--- a/cmake/packages/FlatBuffersSourceConfig.cmake
+++ /dev/null
@@ -1,19 +0,0 @@
-function(_FlatBuffersSource_import)
-  if(NOT DOWNLOAD_FLATBUFFERS)
-    set(FlatBuffersSource_FOUND FALSE PARENT_SCOPE)
-    return()
-  endif(NOT DOWNLOAD_FLATBUFFERS)
-
-  nnfw_include(ExternalSourceTools)
-  nnfw_include(OptionTools)
-
-  # NOTE TensorFlow 1.12 downloads FlatBuffers from the following URL
-  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
-  set(FLATBUFFERS_URL ${EXTERNAL_DOWNLOAD_SERVER}/google/flatbuffers/archive/1f5eae5d6a135ff6811724f6c57f911d1f46bb15.tar.gz)
-  ExternalSource_Download("flatbuffers" ${FLATBUFFERS_URL})
-
-  set(FlatBuffersSource_DIR ${flatbuffers_SOURCE_DIR} PARENT_SCOPE)
-  set(FlatBuffersSource_FOUND TRUE PARENT_SCOPE)
-endfunction(_FlatBuffersSource_import)
-
-_FlatBuffersSource_import()
diff --git a/cmake/packages/GEMMLowpSourceConfig.cmake b/cmake/packages/GEMMLowpSourceConfig.cmake
deleted file mode 100644
index 613ff29b5..000000000
--- a/cmake/packages/GEMMLowpSourceConfig.cmake
+++ /dev/null
@@ -1,19 +0,0 @@
-function(_GEMMLowpSource_import)
-  if(NOT DOWNLOAD_GEMMLOWP)
-    set(GEMMLowpSource_FOUND FALSE PARENT_SCOPE)
-    return()
-  endif(NOT DOWNLOAD_GEMMLOWP)
-
-  nnfw_include(ExternalSourceTools)
-  nnfw_include(OptionTools)
-
-  # NOTE TensorFlow 1.12 uses the following URL
-  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
-  set(GEMMLOWP_URL ${EXTERNAL_DOWNLOAD_SERVER}/google/gemmlowp/archive/38ebac7b059e84692f53e5938f97a9943c120d98.tar.gz)
-  ExternalSource_Download("gemmlowp" ${GEMMLOWP_URL})
-
-  set(GEMMLowpSource_DIR ${gemmlowp_SOURCE_DIR} PARENT_SCOPE)
-  set(GEMMLowpSource_FOUND TRUE PARENT_SCOPE)
-endfunction(_GEMMLowpSource_import)
-
-_GEMMLowpSource_import()
diff --git a/cmake/packages/GTestConfig.cmake b/cmake/packages/GTestConfig.cmake
deleted file mode 100644
index 62d2e8967..000000000
--- a/cmake/packages/GTestConfig.cmake
+++ /dev/null
@@ -1,49 +0,0 @@
-if(OBS_BUILD)
-  enable_testing()
-  find_package(GTest REQUIRED)
-  include_directories(${GTEST_INCLUDE_DIR})
-  set(GTest_FOUND TRUE)
-  return()
-endif(OBS_BUILD)
-
-if(${BUILD_GTEST})
-  nnfw_include(ExternalSourceTools)
-  nnfw_include(ExternalProjectTools)
-  nnfw_include(OptionTools)
-
-  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
-  set(GTEST_URL ${EXTERNAL_DOWNLOAD_SERVER}/google/googletest/archive/release-1.8.0.tar.gz)
-  ExternalSource_Download("gtest" ${GTEST_URL})
-
-  # gtest_SOURCE_DIR is used in gtest subdirectorty's cmake
-  set(sourcedir_gtest ${gtest_SOURCE_DIR})
-  unset(gtest_SOURCE_DIR)
-
-  if(NOT TARGET gtest_main)
-    add_extdirectory(${sourcedir_gtest} gtest EXCLUDE_FROM_ALL)
-  endif(NOT TARGET gtest_main)
-
-  set(GTest_FOUND TRUE)
-  return()
-endif(${BUILD_GTEST})
-
-### Find and use pre-installed Google Test
-find_package(GTest)
-find_package(Threads)
-
-if(${GTEST_FOUND} AND TARGET Threads::Threads)
-  if(NOT TARGET gtest)
-    add_library(gtest INTERFACE)
-    target_include_directories(gtest INTERFACE ${GTEST_INCLUDE_DIRS})
-    target_link_libraries(gtest INTERFACE ${GTEST_LIBRARIES} Threads::Threads)
-  endif(NOT TARGET gtest)
-
-  if(NOT TARGET gtest_main)
-    add_library(gtest_main INTERFACE)
-    target_include_directories(gtest_main INTERFACE ${GTEST_INCLUDE_DIRS})
-    target_link_libraries(gtest_main INTERFACE gtest)
-    target_link_libraries(gtest_main INTERFACE ${GTEST_MAIN_LIBRARIES})
-  endif(NOT TARGET gtest_main)
-
-  set(GTest_FOUND TRUE)
-endif(${GTEST_FOUND} AND TARGET Threads::Threads)
diff --git a/cmake/packages/NEON2SSESourceConfig.cmake b/cmake/packages/NEON2SSESourceConfig.cmake
deleted file mode 100644
index b656f5700..000000000
--- a/cmake/packages/NEON2SSESourceConfig.cmake
+++ /dev/null
@@ -1,19 +0,0 @@
-function(_NEON2SSESource_import)
-  if(NOT DOWNLOAD_NEON2SSE)
-    set(NEON2SSESource_FOUND FALSE PARENT_SCOPE)
-    return()
-  endif(NOT DOWNLOAD_NEON2SSE)
-
-  nnfw_include(ExternalSourceTools)
-  nnfw_include(OptionTools)
-
-  # NOTE TensorFlow 1.12 downloads NEON2SSE from the following URL
-  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
-  set(NEON2SSE_URL ${EXTERNAL_DOWNLOAD_SERVER}/intel/ARM_NEON_2_x86_SSE/archive/0f77d9d182265259b135dad949230ecbf1a2633d.tar.gz)
-  ExternalSource_Download("neon_2_sse" ${NEON2SSE_URL})
-
-  set(NEON2SSESource_DIR ${neon_2_sse_SOURCE_DIR} PARENT_SCOPE)
-  set(NEON2SSESource_FOUND TRUE PARENT_SCOPE)
-endfunction(_NEON2SSESource_import)
-
-_NEON2SSESource_import()
diff --git a/cmake/packages/NoniusConfig.cmake b/cmake/packages/NoniusConfig.cmake
deleted file mode 100644
index 35f373a8c..000000000
--- a/cmake/packages/NoniusConfig.cmake
+++ /dev/null
@@ -1,18 +0,0 @@
-function(_Nonius_import)
-  nnfw_find_package(NoniusSource QUIET)
-
-  if(NOT NoniusSource_FOUND)
-    set(Nonius_FOUND FALSE PARENT_SCOPE)
-    return()
-  endif(NOT NoniusSource_FOUND)
-
-  if(NOT TARGET nonius)
-    message(STATUS "Found nonius: TRUE")
-    add_library(nonius INTERFACE)
-    target_include_directories(nonius INTERFACE "${NoniusSource_DIR}/include")
-  endif(NOT TARGET nonius)
-
-  set(Nonius_FOUND TRUE PARENT_SCOPE)
-endfunction(_Nonius_import)
-
-_Nonius_import()
diff --git a/cmake/packages/NoniusSourceConfig.cmake b/cmake/packages/NoniusSourceConfig.cmake
deleted file mode 100644
index 7349946db..000000000
--- a/cmake/packages/NoniusSourceConfig.cmake
+++ /dev/null
@@ -1,18 +0,0 @@
-function(_NoniusSource_import)
-  if(NOT DOWNLOAD_NONIUS)
-    set(NoniusSource_FOUND FALSE PARENT_SCOPE)
-    return()
-  endif(NOT DOWNLOAD_NONIUS)
-
-  nnfw_include(ExternalSourceTools)
-  nnfw_include(OptionTools)
-
-  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
-  set(NONIUS_URL ${EXTERNAL_DOWNLOAD_SERVER}/libnonius/nonius/archive/v1.2.0-beta.1.tar.gz)
-  ExternalSource_Download("nonius" ${NONIUS_URL})
-
-  set(NoniusSource_DIR ${nonius_SOURCE_DIR} PARENT_SCOPE)
-  set(NoniusSource_FOUND TRUE PARENT_SCOPE)
-endfunction(_NoniusSource_import)
-
-_NoniusSource_import()
diff --git a/cmake/packages/TensorFlowSourceConfig.cmake b/cmake/packages/TensorFlowSourceConfig.cmake
deleted file mode 100644
index 5828334c7..000000000
--- a/cmake/packages/TensorFlowSourceConfig.cmake
+++ /dev/null
@@ -1,18 +0,0 @@
-function(_TensorFlowSource_import)
-  if(NOT DOWNLOAD_TENSORFLOW)
-    set(TensorFlowSource_FOUND FALSE PARENT_SCOPE)
-    return()
-  endif(NOT DOWNLOAD_TENSORFLOW)
-
-  nnfw_include(ExternalSourceTools)
-  nnfw_include(OptionTools)
-
-  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
-  set(TENSORFLOW_URL ${EXTERNAL_DOWNLOAD_SERVER}/tensorflow/tensorflow/archive/v1.12.0.tar.gz)
-  ExternalSource_Download("tensorflow" ${TENSORFLOW_URL})
-
-  set(TensorFlowSource_DIR ${tensorflow_SOURCE_DIR} PARENT_SCOPE)
-  set(TensorFlowSource_FOUND TRUE PARENT_SCOPE)
-endfunction(_TensorFlowSource_import)
-
-_TensorFlowSource_import()
diff --git a/cmake/packages/TensorflowConfig.cmake b/cmake/packages/TensorflowConfig.cmake
deleted file mode 100644
index ab4e2715e..000000000
--- a/cmake/packages/TensorflowConfig.cmake
+++ /dev/null
@@ -1,44 +0,0 @@
-function(_Tensorflow_Import)
-  if(NOT DEFINED TENSORFLOW_DIR)
-    set(TENSORFLOW_DIR ${CMAKE_SOURCE_DIR}/externals/tensorflow)
-  endif(NOT DEFINED TENSORFLOW_DIR)
-
-  if(NOT DEFINED NSYNC_ARCH)
-    set(NSYNC_ARCH "default")
-  endif(NOT DEFINED NSYNC_ARCH)
-
-  set(TENSROFLOW_MAKEFILE_DIR "${TENSORFLOW_DIR}/tensorflow/contrib/makefile")
-  set(TENSORFLOW_GEN_DIR "${TENSROFLOW_MAKEFILE_DIR}/gen")
-  set(TENSORFLOW_DOWNLOADS_DIR "${TENSROFLOW_MAKEFILE_DIR}/downloads")
-
-  if(NOT EXISTS "${TENSORFLOW_GEN_DIR}/lib/libtensorflow-core.a")
-    set(Tensorflow_FOUND FALSE PARENT_SCOPE)
-    return()
-  endif()
-
-  if(NOT EXISTS "${TENSORFLOW_DOWNLOADS_DIR}/nsync/builds/${NSYNC_ARCH}.linux.c++11/libnsync.a")
-    set(Tensorflow_FOUND FALSE PARENT_SCOPE)
-    return()
-  endif()
-
-  if(NOT TARGET tensorflow-core)
-    add_library(tensorflow-core INTERFACE)
-
-    target_include_directories(tensorflow-core INTERFACE "${TENSORFLOW_DIR}")
-    target_include_directories(tensorflow-core INTERFACE "${TENSORFLOW_GEN_DIR}/proto")
-    target_include_directories(tensorflow-core INTERFACE "${TENSORFLOW_GEN_DIR}/protobuf/include")
-    target_include_directories(tensorflow-core INTERFACE "${TENSORFLOW_DOWNLOADS_DIR}/eigen")
-    target_include_directories(tensorflow-core INTERFACE "${TENSORFLOW_DOWNLOADS_DIR}/nsync/public")
-
-    target_link_libraries(tensorflow-core INTERFACE -Wl,--whole-archive "${TENSORFLOW_GEN_DIR}/lib/libtensorflow-core.a" -Wl,--no-whole-archive)
-    target_link_libraries(tensorflow-core INTERFACE "${TENSORFLOW_GEN_DIR}/protobuf/lib/libprotobuf.a")
-    target_link_libraries(tensorflow-core INTERFACE "${TENSORFLOW_DOWNLOADS_DIR}/nsync/builds/${NSYNC_ARCH}.linux.c++11/libnsync.a")
-    target_link_libraries(tensorflow-core INTERFACE ${LIB_PTHREAD} dl)
-
-    message(STATUS "Found Tensorflow (lib: ${TENSORFLOW_GEN_DIR}/lib/libtensorflow-core.a")
-  endif()
-
-    set(Tensorflow_FOUND TRUE PARENT_SCOPE)
-endfunction(_Tensorflow_Import)
-
-_Tensorflow_Import()
diff --git a/contrib/CMakeLists.txt b/contrib/CMakeLists.txt
deleted file mode 100644
index 78417eacb..000000000
--- a/contrib/CMakeLists.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-file(GLOB CONTRIB_CMAKE_FILES "*/CMakeLists.txt")
-
-foreach(CONTRIB_CMAKE_FILE ${CONTRIB_CMAKE_FILES})
-  get_filename_component(CONTRIB_BASE ${CONTRIB_CMAKE_FILE} DIRECTORY)
-  add_subdirectory(${CONTRIB_BASE})
-endforeach(CONTRIB_CMAKE_FILE ${CONTRIB_CMAKE_FILES})
diff --git a/contrib/TFLiteSharp/TFLiteNative/include/tflite_log.h b/contrib/TFLiteSharp/TFLiteNative/include/tflite_log.h
deleted file mode 100644
index cf51219fd..000000000
--- a/contrib/TFLiteSharp/TFLiteNative/include/tflite_log.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the License);
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef _TFLITE_LOG_H_
-#define _TFLITE_LOG_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif /*__cplusplus*/
-
-#define ERROR 1
-#define WARNING 2
-#define INFO 3
-#define DEBUG 4
-
-#ifdef __TIZEN__
-#include <dlog/dlog.h>
-#ifdef LOG_TAG
-#undef LOG_TAG
-#endif // LOG_TAG
-#define LOG_TAG "TFLITE_NATIVE"
-
-#define TFLITE_NATIVE_LOG(log_level, format, args...) \
-	do { \
-		switch (log_level) { \
-		case ERROR: \
-			LOGE(format, ## args); \
-		case WARNING: \
-			LOGE(format, ## args); \
-		default: \
-			LOGI(format, ## args); \
-		} \
-	} while (0)
-#else // __TIZEN__
-#define LEVEL_TO_STR(level) (\
-	((level) == ERROR) ? "ERROR" : \
-	((level) == WARNING) ? "WARNING" : \
-	((level) == INFO) ? "INFO": \
-	((level) == DEBUG) ? "DEBUG" : "DEFAULT")
-#define TFLITE_NATIVE_LOG(log_level, format, args...) \
-	do { \
-		printf("%s: %s: ", LEVEL_TO_STR(log_level), __FILE__); \
-		printf(format, ## args); \
-		printf("\n"); \
-	}while (0)
-#endif // __TIZEN__
-
-#ifdef __cplusplus
-}
-#endif /*__cplusplus*/
-
-#endif /*_TFLITE_LOG_H*/
diff --git a/contrib/TFLiteSharp/TFLiteNative/include/tflite_nativewrapper.h b/contrib/TFLiteSharp/TFLiteNative/include/tflite_nativewrapper.h
deleted file mode 100644
index 7fddb5400..000000000
--- a/contrib/TFLiteSharp/TFLiteNative/include/tflite_nativewrapper.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the License);
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef _TFLITE_NATIVEWRAPPER_H_
-#define _TFLITE_NATIVEWRAPPER_H_
-
-#include "tensorflow/contrib/lite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/string_util.h"
-#include "tensorflow/contrib/lite/tools/mutable_op_resolver.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif /*__cplusplus*/
-
-typedef enum
-{
-    /** 32-bit signed integer. */
-    INT32 = 1,
-
-    /** 32-bit single precision floating point. */
-    FLOAT32 = 2,
-
-    /** 8-bit unsigned integer. */
-    UINT8 = 3,
-
-    /** 64-bit signed integer. */
-    INT64 = 4
-} TFLiteNativeType;
-
-void tflite_interpreter_setNumThreads(long* interpreterHandle, int numThreads);
-
-long long tflite_flatbuffermodel_BuildFromFile(char* modelPath);
-
-long long tflite_builder_interpreterBuilder(long* modelHandle);
-
-void* tflite_interpreter_run(long* interpreterHandle, void* values, int inputLength, int dataType);
-
-#ifdef __cplusplus
-}
-#endif /*__cplusplus*/
-
-#endif /*_TFLITE_NATIVEWRAPPER_H_*/
diff --git a/contrib/TFLiteSharp/TFLiteNative/src/tflite_nativewrapper.cpp b/contrib/TFLiteSharp/TFLiteNative/src/tflite_nativewrapper.cpp
deleted file mode 100644
index 413304637..000000000
--- a/contrib/TFLiteSharp/TFLiteNative/src/tflite_nativewrapper.cpp
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the License);
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <iostream>
-#include "tflite_nativewrapper.h"
-#include "tflite_log.h"
-#include <string.h>
-#include <unistd.h>
-#include <errno.h>
-#include <assert.h>
-
-int getNumBytes(TFLiteNativeType dataType)
-{
-    switch (dataType) {
-    case INT32:
-        return 4;
-    case FLOAT32:
-        return 4;
-    case UINT8:
-        return 1;
-    case INT64:
-        return 8;
-    default:
-        return 1;
-    }
-}
-
-/// <summary>
-/// Set the number of threads available to the interpreter.
-/// </summary>
-/// <param name="interpreterHandle">Handle of the interpreter instance.</param>
-/// <param name="numThreads">Number of threads.</param>
-void tflite_interpreter_setNumThreads(long* interpreterHandle, int numThreads)
-{
-    assert(interpreterHandle != nullptr);
-    tflite::Interpreter* interpreter = reinterpret_cast<tflite::Interpreter*>(*interpreterHandle);
-
-    interpreter->SetNumThreads(numThreads);
-
-    TFLITE_NATIVE_LOG(DEBUG, "Number of threads: %d", numThreads);
-    return;
-}
-
-/// <summary>
-/// Creates a Flat Buffer Model from the given .tflite model.
-/// </summary>
-/// <param name="modelPath">Path of the model.</param>
-long long
-tflite_flatbuffermodel_BuildFromFile(char* modelPath)
-{
-    if (modelPath == nullptr) {
-        TFLITE_NATIVE_LOG(ERROR, "Invalid parameter");
-        return 0;
-    }
-    TFLITE_NATIVE_LOG(ERROR, "Model Path: %s", modelPath);
-
-    if (access(modelPath, F_OK) == -1) {
-        TFLITE_NATIVE_LOG(ERROR, "Failed to access model [%s]",
-            strerror(errno));
-        return 0;
-    }
-
-    auto model = tflite::FlatBufferModel::BuildFromFile(modelPath);
-
-    TFLITE_NATIVE_LOG(DEBUG, "Successfully loaded model");
-    return reinterpret_cast<long>(model.release());
-}
-
-/// <summary>
-/// Creates an interpreter instance taking the flatbuffer model as input.
-/// </summary>
-/// <param name="modelHandle">Address of the flatbuffer model.</param>
-long long
-tflite_builder_interpreterBuilder(long* modelHandle)
-{
-    assert(modelHandle != nullptr);
-    tflite::FlatBufferModel* model = reinterpret_cast<tflite::FlatBufferModel*>(*modelHandle);
-
-    tflite::ops::builtin::BuiltinOpResolver resolver;
-    std::unique_ptr<tflite::Interpreter> interpreter;
-
-    TfLiteStatus status = tflite::InterpreterBuilder (*model, resolver)(&interpreter);
-
-    if (status != kTfLiteOk) {
-        TFLITE_NATIVE_LOG(DEBUG, "Cannot create interpreter");
-        return 0;
-    }
-    TFLITE_NATIVE_LOG(DEBUG, "CheckPoint interpreter");
-    return reinterpret_cast<long>(interpreter.release());
-}
-
-/// <summary>
-/// Runs the inference given the inputs.
-/// </summary>
-/// <param name="interpreterHandle">Address of the interpreter instance.</param>
-/// <param name="values">Input values for the model.</param>
-/// <param name="inpLength">Length of the input.</param>
-/// <param name="dataType">Data type key of the input.</param>
-void* tflite_interpreter_run(long* interpreterHandle, void* values, int inputLength,
-    int dataType)
-{
-    assert(interpreterHandle != nullptr);
-    tflite::Interpreter* interpreter = reinterpret_cast<tflite::Interpreter*>(*interpreterHandle);
-
-    int inputTensorIndex = interpreter->inputs()[0];
-
-    //TODO:: input tensor size will be passed as a parameter. It is hardcoded for now.
-    interpreter->ResizeInputTensor(inputTensorIndex,
-        { 1, 224, 224, 3 });
-
-    if (interpreter->AllocateTensors() != kTfLiteOk) {
-        TFLITE_NATIVE_LOG(ERROR, "Failed to allocate tensors!");
-        return nullptr;
-    }
-
-    float* inputTensorPointer = interpreter->typed_tensor<float>(inputTensorIndex);
-
-    int numBytes = getNumBytes((TFLiteNativeType) dataType);
-
-    memcpy(inputTensorPointer, values, inputLength * numBytes);
-
-    if (interpreter->Invoke() != kTfLiteOk) {
-        TFLITE_NATIVE_LOG(ERROR, "Failed to invoke");
-    }
-
-    float* output = interpreter->typed_output_tensor<float>(0);
-    return output;
-}
-
diff --git a/contrib/benchmark_acl/src/Benchmark.cpp b/contrib/benchmark_acl/src/Benchmark.cpp
deleted file mode 100644
index ba6001232..000000000
--- a/contrib/benchmark_acl/src/Benchmark.cpp
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Benchmark.h"
-
-#include <cstdlib>
-
-Count::Count() : _value(1)
-{
-  auto env = std::getenv("COUNT");
-
-  if (env)
-  {
-    _value = atoi(env);
-  }
-}
-
-uint32_t Count::value(void) const { return _value; }
-
-#include <boost/accumulators/accumulators.hpp>
-#include <boost/accumulators/statistics/stats.hpp>
-#include <boost/accumulators/statistics/mean.hpp>
-
-#include <iostream>
-#include <chrono>
-
-using namespace boost::accumulators;
-
-void run_benchmark(arm_compute::graph::frontend::Stream &graph)
-{
-  // NOTE Here the number of warming-up iterations is hardcoded
-  // TODO Decide the number of warming-up iterations appropriately
-  for (uint32_t n = 0; n < 3; ++n)
-  {
-    auto beg = std::chrono::steady_clock::now();
-    graph.run();
-    auto end = std::chrono::steady_clock::now();
-    auto elapsed = std::chrono::duration_cast<std::chrono::milliseconds>(end - beg);
-
-    std::cout << "Warming-up " << n << ": " << elapsed.count() << "ms" << std::endl;
-  }
-
-  accumulator_set<double, stats<tag::mean>> acc;
-
-  const Count count;
-
-  for (uint32_t n = 0; n < count.value(); ++n)
-  {
-    auto beg = std::chrono::steady_clock::now();
-    graph.run();
-    auto end = std::chrono::steady_clock::now();
-    auto elapsed = std::chrono::duration_cast<std::chrono::milliseconds>(end - beg);
-
-    std::cout << "Iteration " << n << ": " << elapsed.count() << "ms" << std::endl;
-
-    acc(elapsed.count());
-  }
-
-  std::cout << "--------" << std::endl;
-  std::cout << "Mean: " << mean(acc) << "ms" << std::endl;
-}
diff --git a/contrib/detection/detection.cpp b/contrib/detection/detection.cpp
deleted file mode 100644
index 8a988ccf5..000000000
--- a/contrib/detection/detection.cpp
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <tensorflow/core/public/session.h>
-
-#include <iostream>
-#include <stdexcept>
-
-#include <cassert>
-#include <cstring>
-
-#include "misc/benchmark.h"
-
-#define CHECK_TF(e) {                             \
-  if(!(e).ok())                                   \
-  {                                               \
-    throw std::runtime_error{"'" #e "' FAILED"};  \
-  }                                               \
-}
-
-int main(int argc, char **argv)
-{
-  if (argc < 2)
-  {
-    std::cerr << "USAGE: " << argv[0] << " [T/F model path] [output 0] [output 1] ..." << std::endl;
-    return 255;
-  }
-
-  std::vector<std::string> output_nodes;
-
-  for (int argn = 2; argn < argc; ++argn)
-  {
-    output_nodes.emplace_back(argv[argn]);
-  }
-
-  tensorflow::Session* sess;
-
-  CHECK_TF(tensorflow::NewSession(tensorflow::SessionOptions(), &sess));
-
-  tensorflow::GraphDef graph_def;
-
-  CHECK_TF(ReadBinaryProto(tensorflow::Env::Default(), argv[1], &graph_def));
-  CHECK_TF(sess->Create(graph_def));
-
-  tensorflow::Tensor input(tensorflow::DT_FLOAT, tensorflow::TensorShape({1, 320, 320, 3}));
-  std::vector<tensorflow::Tensor> outputs;
-
-  for (uint32_t n = 0; n < 5; ++n)
-  {
-    std::chrono::milliseconds elapsed(0);
-
-    nnfw::misc::benchmark::measure(elapsed) << [&] (void) {
-      CHECK_TF(sess->Run({{"input_node", input}}, output_nodes, {}, &outputs));
-    };
-
-    std::cout << "Takes " << elapsed.count() << "ms" << std::endl;
-  }
-
-  return 0;
-}
diff --git a/contrib/labs/jniacl/src/io_accessor.cc b/contrib/labs/jniacl/src/io_accessor.cc
deleted file mode 100644
index 103660716..000000000
--- a/contrib/labs/jniacl/src/io_accessor.cc
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/*
- * Copyright (c) 2018 ARM Limited.
- *
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation the
- * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-#include "io_accessor.h"
-#include <ostream>
-#include <android/log.h>
-
-bool InputAccessor::access_tensor(arm_compute::ITensor &tensor)
-{
-  // Subtract the mean value from each channel
-  arm_compute::Window window;
-  window.use_tensor_dimensions(tensor.info()->tensor_shape());
-
-  execute_window_loop(window, [&](const arm_compute::Coordinates& id)
-  {
-    *reinterpret_cast<float *>(tensor.ptr_to_element(id)) = _test_input;
-    _test_input += _inc ? 1.0 : 0.0;
-
-    __android_log_print(ANDROID_LOG_DEBUG, "LOG_TAG", "Input %d, %d = %lf\r\n",
-        id.y(), id.x(), *reinterpret_cast<float *>(tensor.ptr_to_element(id)));
-  });
-  return true;
-}
-
-bool OutputAccessor::access_tensor(arm_compute::ITensor &tensor)
-{
-  // Subtract the mean value from each channel
-  arm_compute::Window window;
-  window.use_tensor_dimensions(tensor.info()->tensor_shape());
-
-  execute_window_loop(window, [&](const arm_compute::Coordinates& id)
-  {
-    __android_log_print(ANDROID_LOG_DEBUG, "Output", "Input %d, %d = %lf\r\n",
-      id.y(), id.x(), *reinterpret_cast<float *>(tensor.ptr_to_element(id)));
-  });
-  return false; // end the network
-}
-
-bool WeightAccessor::access_tensor(arm_compute::ITensor &tensor)
-{
-  // Subtract the mean value from each channel
-  arm_compute::Window window;
-  window.use_tensor_dimensions(tensor.info()->tensor_shape());
-
-  execute_window_loop(window, [&](const arm_compute::Coordinates& id)
-  {
-    *reinterpret_cast<float *>(tensor.ptr_to_element(id)) = _test_weight;
-    _test_weight += _inc ? 1.0 : 0.0;
-  });
-  return true;
-}
-
-bool BiasAccessor::access_tensor(arm_compute::ITensor &tensor)
-{
-  // Subtract the mean value from each channel
-  arm_compute::Window window;
-  window.use_tensor_dimensions(tensor.info()->tensor_shape());
-
-  execute_window_loop(window, [&](const arm_compute::Coordinates& id)
-  {
-    *reinterpret_cast<float *>(tensor.ptr_to_element(id)) = 0.0;
-  });
-  return true;
-}
diff --git a/contrib/labs/jniacl/src/io_accessor.h b/contrib/labs/jniacl/src/io_accessor.h
deleted file mode 100644
index 4033020e0..000000000
--- a/contrib/labs/jniacl/src/io_accessor.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/*
- * Copyright (c) 2018 ARM Limited.
- *
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation the
- * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-#ifndef __IO_ACCESSOR_H__
-#define __IO_ACCESSOR_H__
-
-#include <arm_compute/graph/ITensorAccessor.h>
-
-class InputAccessor : public arm_compute::graph::ITensorAccessor
-{
-public:
-    InputAccessor(bool inc) : _inc(inc) { _test_input = 1.0; }
-    InputAccessor(InputAccessor&&) = default;
-
-    // Inherited methods overriden:
-    bool access_tensor(arm_compute::ITensor& tensor) override;
-
-private:
-    bool _inc;
-    float _test_input;
-};
-
-class OutputAccessor : public arm_compute::graph::ITensorAccessor
-{
-public:
-    OutputAccessor() = default;
-    OutputAccessor(OutputAccessor&&) = default;
-
-    // Inherited methods overriden:
-    bool access_tensor(arm_compute::ITensor& tensor) override;
-};
-
-class WeightAccessor : public arm_compute::graph::ITensorAccessor
-{
-public:
-    WeightAccessor(bool inc) : _inc(inc) { _test_weight = 1.0; }
-    WeightAccessor(WeightAccessor&&) = default;
-
-    // Inherited methods overriden:
-    bool access_tensor(arm_compute::ITensor& tensor) override;
-
-private:
-    bool _inc;
-    float _test_weight;
-};
-
-class BiasAccessor : public arm_compute::graph::ITensorAccessor
-{
-public:
-    BiasAccessor() = default;
-    BiasAccessor(BiasAccessor&&) = default;
-
-    // Inherited methods overriden:
-    bool access_tensor(arm_compute::ITensor& tensor) override;
-};
-
-#endif // __IO_ACCESSOR_H__
diff --git a/contrib/labs/jniacl/src/jniacl_main.cc b/contrib/labs/jniacl/src/jniacl_main.cc
deleted file mode 100644
index 515f28732..000000000
--- a/contrib/labs/jniacl/src/jniacl_main.cc
+++ /dev/null
@@ -1,39 +0,0 @@
-#include <jni.h>
-#include <string>
-
-#include <arm_compute/graph/Graph.h>
-#include <arm_compute/graph/Nodes.h>
-
-#include "io_accessor.h"
-
-extern "C" JNIEXPORT jstring JNICALL
-Java_com_samsung_testaclexec_ActivityMain_RunACLJNI(JNIEnv *env, jobject)
-{
-    using arm_compute::DataType;
-    using arm_compute::graph::Tensor;
-    using arm_compute::graph::TargetHint;
-    using arm_compute::graph::Graph;
-    using arm_compute::TensorInfo;
-    using arm_compute::TensorShape;
-
-    arm_compute::graph::Graph graph;
-    TargetHint target_hint = TargetHint::OPENCL;
-    bool autoinc = true;
-
-    graph << target_hint
-        << Tensor(TensorInfo(TensorShape(3U, 3U, 1U, 1U), 1, DataType::F32),
-                  std::unique_ptr<InputAccessor>(new InputAccessor(autoinc)))
-        << arm_compute::graph::ConvolutionLayer(
-              3U, 3U, 1U,
-              std::unique_ptr<WeightAccessor>(new WeightAccessor(autoinc)),
-              std::unique_ptr<BiasAccessor>(new BiasAccessor()),
-              arm_compute::PadStrideInfo(1, 1, 0, 0))
-        << Tensor(std::unique_ptr<OutputAccessor>(new OutputAccessor()));
-        ;
-
-    graph.run();
-
-    std::string hello = "SoftMax Run OK";
-
-    return env->NewStringUTF(hello.c_str());
-}
diff --git a/contrib/labs/kerneltesting/CMakeLists.txt b/contrib/labs/kerneltesting/CMakeLists.txt
deleted file mode 100644
index 5792d0fe8..000000000
--- a/contrib/labs/kerneltesting/CMakeLists.txt
+++ /dev/null
@@ -1,19 +0,0 @@
-if(NOT ${TARGET_ARCH_BASE} STREQUAL "arm")
-  return()
-endif(NOT ${TARGET_ARCH_BASE} STREQUAL "arm")
-
-nnfw_find_package(ARMCompute REQUIRED)
-
-function(add_kerneltesting TESTNAME SRC_FILES)
-    link_directories(${CMAKE_INSTALL_PREFIX}/lib)
-    add_executable(${TESTNAME} ${SRC_FILES})
-    target_include_directories(${TESTNAME} PUBLIC
-                               ${NNFW_INCLUDE_DIR})
-    target_link_libraries(${TESTNAME} nnfw_lib_misc arm_compute_graph)
-    install(TARGETS ${TESTNAME} DESTINATION bin)
-endfunction()
-
-# TODO: Enable conv2d on Tizen
-if (NOT ${TARGET_OS} STREQUAL "tizen")
-  add_subdirectory(conv2d)
-endif()
diff --git a/contrib/labs/kerneltesting/conv2d/CMakeLists.txt b/contrib/labs/kerneltesting/conv2d/CMakeLists.txt
deleted file mode 100644
index 25e01f584..000000000
--- a/contrib/labs/kerneltesting/conv2d/CMakeLists.txt
+++ /dev/null
@@ -1,15 +0,0 @@
-set(KERNELTESTING_CONV2D kerneltesting_conv2d)
-
-set(KERNELTESTING_CONV2D_SRCS "nnfw_conv2d_test.cpp"
-                              "io_accessor.cpp")
-
-set(GEMLOWP_INCUDE ${TFLITE_DEPEND_DIR}/gemmlowp/public)
-set(EIGN_INCLUDE ${TFLITE_DEPEND_DIR}/eigen
-                 ${TFLITE_DEPEND_DIR}/eigen/Eigen)
-
-add_kerneltesting(${KERNELTESTING_CONV2D} "${KERNELTESTING_CONV2D_SRCS}")
-
-target_include_directories(${KERNELTESTING_CONV2D} PUBLIC
-                           ${GEMLOWP_INCUDE}
-                           ${EIGN_INCLUDE}
-                          )
diff --git a/contrib/labs/kerneltesting/conv2d/OperationUtils.h b/contrib/labs/kerneltesting/conv2d/OperationUtils.h
deleted file mode 100644
index 0beac80a4..000000000
--- a/contrib/labs/kerneltesting/conv2d/OperationUtils.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/*
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef ANDROID_ML_NN_COMMON_OPERATIONS_UTILS_H
-#define ANDROID_ML_NN_COMMON_OPERATIONS_UTILS_H
-
-#include <cstdint>
-#include <vector>
-#include <ostream>
-
-#define LOG(ERROR) std::cerr
-
-// Macro to check if the input parameters for operation are valid or not.
-#define NN_CHECK(v)                                                     \
-  do {                                                                  \
-    if (!(v)) {                                                         \
-      LOG(ERROR) << "NN_CHECK failed: "  << #v << "'\n";                \
-      return false;                                                     \
-    }                                                                   \
-  } while(0);
-
-#define NN_CHECK_EQ(actual, expected)           \
-  NN_CHECK((actual) == (expected))
-
-#define NN_OPS_CHECK NN_CHECK
-
-enum PaddingScheme {
-    kPaddingUnknown = 0,
-    kPaddingSame = 1,
-    kPaddingValid = 2,
-};
-
-enum class FusedActivationFunc : int32_t {
-    NONE = 0,
-    RELU = 1,
-    RELU1 = 2,
-    RELU6 = 3,
-};
-
-
-#define ANDROID_NN_MACRO_DISPATCH(macro)                                    \
-    switch (activation) {                                                   \
-        case (int32_t) FusedActivationFunc::NONE:                           \
-            macro(kNone);                                                   \
-            break;                                                          \
-        case (int32_t) FusedActivationFunc::RELU:                           \
-            macro(kRelu);                                                   \
-            break;                                                          \
-        case (int32_t) FusedActivationFunc::RELU1:                          \
-            macro(kRelu1);                                                  \
-            break;                                                          \
-        case (int32_t) FusedActivationFunc::RELU6:                          \
-            macro(kRelu6);                                                  \
-            break;                                                          \
-        default:                                                            \
-            LOG(ERROR) << "Unsupported fused activation function type";     \
-            return false;                                                   \
-    }
-
-
-#endif // ANDROID_ML_NN_COMMON_OPERATIONS_UTILS_H
diff --git a/contrib/labs/kerneltesting/conv2d/common.h b/contrib/labs/kerneltesting/conv2d/common.h
deleted file mode 100644
index 8e675e664..000000000
--- a/contrib/labs/kerneltesting/conv2d/common.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/*
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef ANDROID_ML_NN_COMMON_OPERATIONS_INTERNAL_COMMON_H_
-#define ANDROID_ML_NN_COMMON_OPERATIONS_INTERNAL_COMMON_H_
-
-#ifndef USE_NEON
-#if defined(__ARM_NEON__) || defined(__ARM_NEON)
-#define USE_NEON
-#include <arm_neon.h>
-#endif
-#endif
-
-#include <gemmlowp.h>
-#include "types.h"
-
-template <FusedActivationFunctionType Ac>
-struct ActivationFunctionImpl {};
-
-template <>
-struct ActivationFunctionImpl<FusedActivationFunctionType::kNone> {
-  static float Eval(float x) { return x; }
-};
-
-template <>
-struct ActivationFunctionImpl<FusedActivationFunctionType::kRelu> {
-  static float Eval(float x) { return x < 0.f ? 0.f : x; }
-};
-
-template <>
-struct ActivationFunctionImpl<FusedActivationFunctionType::kRelu1> {
-  static float Eval(float x) { return x > 1.f ? 1.f : x < -1.f ? -1.f : x; }
-};
-
-template <>
-struct ActivationFunctionImpl<FusedActivationFunctionType::kRelu6> {
-  static float Eval(float x) { return x > 6.f ? 6.f : x < 0.f ? 0.f : x; }
-};
-
-template <FusedActivationFunctionType Ac>
-float ActivationFunction(float x) {
-  return ActivationFunctionImpl<Ac>::Eval(x);
-}
-
-inline int32 MultiplyByQuantizedMultiplierSmallerThanOne(
-    int32 x, int32 quantized_multiplier, int right_shift) {
-  using gemmlowp::RoundingDivideByPOT;
-  using gemmlowp::SaturatingRoundingDoublingHighMul;
-  return RoundingDivideByPOT(
-      SaturatingRoundingDoublingHighMul(x, quantized_multiplier), right_shift);
-}
-
-inline int32 MultiplyByQuantizedMultiplierGreaterThanOne(
-    int32 x, int32 quantized_multiplier, int left_shift) {
-  using gemmlowp::SaturatingRoundingDoublingHighMul;
-  return SaturatingRoundingDoublingHighMul(x * (1 << left_shift),
-                                           quantized_multiplier);
-}
-
-#endif  // ANDROID_ML_NN_COMMON_OPERATIONS_INTERNAL_COMMON_H_
diff --git a/contrib/labs/kerneltesting/conv2d/compatibility.h b/contrib/labs/kerneltesting/conv2d/compatibility.h
deleted file mode 100644
index db8ba04bc..000000000
--- a/contrib/labs/kerneltesting/conv2d/compatibility.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/*
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef ANDROID_ML_NN_COMMON_OPERATIONS_INTERNAL_COMPATIBILITY_H_
-#define ANDROID_ML_NN_COMMON_OPERATIONS_INTERNAL_COMPATIBILITY_H_
-
-#ifndef ANDROID_ML_NN_COMPATIBILITY
-#define ANDROID_ML_NN_COMPATIBILITY
-
-#include <cassert>
-#include <cstdint>
-
-#ifndef DCHECK
-#define DCHECK(condition) (condition) ? (void)0 : assert(false)
-#endif
-
-#ifndef DCHECK_EQ
-#define DCHECK_EQ(x, y) ((x) == (y)) ? (void)0 : assert(false)
-#endif
-
-#ifndef DCHECK_GE
-#define DCHECK_GE(x, y) ((x) >= (y)) ? (void)0 : assert(false)
-#endif
-
-#ifndef DCHECK_GT
-#define DCHECK_GT(x, y) ((x) > (y)) ? (void)0 : assert(false)
-#endif
-
-#ifndef DCHECK_LE
-#define DCHECK_LE(x, y) ((x) <= (y)) ? (void)0 : assert(false)
-#endif
-
-#ifndef DCHECK_LT
-#define DCHECK_LT(x, y) ((x) < (y)) ? (void)0 : assert(false)
-#endif
-
-#ifndef CHECK_EQ
-#define CHECK_EQ(x, y) ((x) == (y)) ? (void)0 : assert(false)
-#endif
-
-using uint8 = std::uint8_t;
-using int16 = std::int16_t;
-using uint16 = std::uint16_t;
-using int32 = std::int32_t;
-using uint32 = std::uint32_t;
-
-#endif
-
-#endif  // ANDROID_ML_NN_COMMON_OPERATIONS_INTERNAL_COMPATIBILITY_H_
diff --git a/contrib/labs/kerneltesting/conv2d/io_accessor.cpp b/contrib/labs/kerneltesting/conv2d/io_accessor.cpp
deleted file mode 100644
index 6d3cd9d04..000000000
--- a/contrib/labs/kerneltesting/conv2d/io_accessor.cpp
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/*
- * Copyright (c) 2018 ARM Limited.
- *
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation the
- * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-#include "io_accessor.h"
-
-InputAccessor::InputAccessor(const float* inputData, const Shape& inputShape)
-  : _inputData(inputData)
-  , _inputShape(inputShape)
-{
-}
-
-WeightAccessor::WeightAccessor(const float* filterData, const Shape& filterShape)
-  : _filterData(filterData)
-  , _filterShape(filterShape)
-{
-}
-
-BiasAccessor::BiasAccessor(const float* biasData, const Shape& biasShape)
-  : _biasData(biasData)
-  , _biasShape(biasShape)
-{
-}
-
-OutputAccessor::OutputAccessor(float* outputData, const Shape& outputShape)
-  : _outputData(outputData)
-  , _outputShape(outputShape)
-{
-}
-
-bool InputAccessor::access_tensor(arm_compute::ITensor &tensor)
-{
-  arm_compute::Window window;
-  window.use_tensor_dimensions(tensor.info()->tensor_shape());
-
-  execute_window_loop(window, [&](const arm_compute::Coordinates& id)
-  {
-    uint32_t width  = getSizeOfDimension(_inputShape, 2);
-    uint32_t offset = id.y() * width + id.x();
-    *reinterpret_cast<float *>(tensor.ptr_to_element(id)) =
-        *(_inputData + offset);
-  });
-  return true;
-}
-
-bool WeightAccessor::access_tensor(arm_compute::ITensor &tensor)
-{
-  arm_compute::Window window;
-  window.use_tensor_dimensions(tensor.info()->tensor_shape());
-
-  execute_window_loop(window, [&](const arm_compute::Coordinates& id)
-  {
-    uint32_t width  = getSizeOfDimension(_filterShape, 2);
-    uint32_t offset = id.y() * width + id.x();
-    *reinterpret_cast<float *>(tensor.ptr_to_element(id)) =
-        *(_filterData + offset);
-  });
-  return true;
-}
-
-bool BiasAccessor::access_tensor(arm_compute::ITensor &tensor)
-{
-  arm_compute::Window window;
-  window.use_tensor_dimensions(tensor.info()->tensor_shape());
-
-  execute_window_loop(window, [&](const arm_compute::Coordinates& id)
-  {
-    uint32_t width  = getSizeOfDimension(_biasShape, 2);
-    uint32_t offset = id.y() * width + id.x();
-    *reinterpret_cast<float *>(tensor.ptr_to_element(id)) =
-        *(_biasData + offset);
-  });
-  return true;
-}
-
-bool OutputAccessor::access_tensor(arm_compute::ITensor &tensor)
-{
-  arm_compute::Window window;
-  window.use_tensor_dimensions(tensor.info()->tensor_shape());
-
-  execute_window_loop(window, [&](const arm_compute::Coordinates& id)
-  {
-    uint32_t width  = getSizeOfDimension(_outputShape, 2);
-    uint32_t offset = id.y() * width + id.x();
-    *(_outputData + offset) =
-        *reinterpret_cast<float *>(tensor.ptr_to_element(id));
-  });
-  return false; // end the network
-}
diff --git a/contrib/labs/kerneltesting/conv2d/io_accessor.h b/contrib/labs/kerneltesting/conv2d/io_accessor.h
deleted file mode 100644
index 0201f7242..000000000
--- a/contrib/labs/kerneltesting/conv2d/io_accessor.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/*
- * Copyright (c) 2018 ARM Limited.
- *
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation the
- * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-#ifndef __CONV2D_IO_ACCESSOR_H__
-#define __CONV2D_IO_ACCESSOR_H__
-
-#include <arm_compute/graph/ITensorAccessor.h>
-#include <arm_compute/runtime/CL/CLFunctions.h>
-
-#include "types.h"
-
-class InputAccessor : public arm_compute::graph::ITensorAccessor
-{
-public:
-    InputAccessor(const float* inputData, const Shape& inputShape);
-    InputAccessor(InputAccessor&&) = default;
-
-    // Inherited methods overriden:
-    bool access_tensor(arm_compute::ITensor& tensor) override;
-
-private:
-    const float* _inputData;
-    const Shape& _inputShape;
-};
-
-class WeightAccessor : public arm_compute::graph::ITensorAccessor
-{
-public:
-    WeightAccessor(const float* filterData, const Shape& filterShape);
-    WeightAccessor(WeightAccessor&&) = default;
-
-    // Inherited methods overriden:
-    bool access_tensor(arm_compute::ITensor& tensor) override;
-
-private:
-    const float* _filterData;
-    const Shape& _filterShape;
-};
-
-class BiasAccessor : public arm_compute::graph::ITensorAccessor
-{
-public:
-    BiasAccessor(const float* biasData, const Shape& biasShape);
-    BiasAccessor(BiasAccessor&&) = default;
-
-    // Inherited methods overriden:
-    bool access_tensor(arm_compute::ITensor& tensor) override;
-
-private:
-    const float* _biasData;
-    const Shape& _biasShape;
-};
-
-class OutputAccessor : public arm_compute::graph::ITensorAccessor
-{
-public:
-    OutputAccessor(float* outputData, const Shape& outputShape);
-    OutputAccessor(OutputAccessor&&) = default;
-
-    // Inherited methods overriden:
-    bool access_tensor(arm_compute::ITensor& tensor) override;
-
-private:
-    float* _outputData;
-    const Shape& _outputShape;
-};
-
-#endif // __CONV2D_IO_ACCESSOR_H__
diff --git a/contrib/labs/kerneltesting/conv2d/nnfw_conv2d_test.cpp b/contrib/labs/kerneltesting/conv2d/nnfw_conv2d_test.cpp
deleted file mode 100644
index 190be016e..000000000
--- a/contrib/labs/kerneltesting/conv2d/nnfw_conv2d_test.cpp
+++ /dev/null
@@ -1,607 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/*
- * Copyright (c) 2018 ARM Limited.
- *
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation the
- * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <iostream>
-#include <vector>
-#include <cassert>
-
-#include <Eigen/Core>
-#include <gemmlowp.h>
-
-#include "types.h"
-#include "common.h"
-#include "optimized_ops.h"
-#include "OperationUtils.h"
-
-#include <arm_compute/graph.h>
-
-#include <arm_compute/runtime/CL/CLFunctions.h>
-#include <arm_compute/runtime/CL/functions/CLConvolution.h>
-
-#include "io_accessor.h"
-#include "misc/environment.h"
-
-static constexpr int kStaticBufferSize = 1605632;
-static char static_scratch_buffer[kStaticBufferSize];
-
-#define ANDROID_NN_CONV_PARAMETERS(Type)                                        \
-    uint32_t height       = getSizeOfDimension(inputShape, 1);                  \
-    uint32_t width        = getSizeOfDimension(inputShape, 2);                  \
-    uint32_t filterHeight = getSizeOfDimension(filterShape, 1);                 \
-    uint32_t filterWidth  = getSizeOfDimension(filterShape, 2);                 \
-    uint32_t outHeight    = getSizeOfDimension(outputShape, 1);                 \
-    uint32_t outWidth     = getSizeOfDimension(outputShape, 2);                 \
-    uint32_t inDepth      = getSizeOfDimension(inputShape, 3);                  \
-                                                                                \
-    uint32_t paddingHeight = (uint32_t)padding_top;                             \
-    uint32_t paddingWidth = (uint32_t)padding_left;                             \
-                                                                                \
-    Dims<4> im2colDim;                                                          \
-    im2colDim.sizes[3] = (int)getSizeOfDimension(outputShape, 0);               \
-    im2colDim.sizes[2] = (int)getSizeOfDimension(outputShape, 1);               \
-    im2colDim.sizes[1] = (int)getSizeOfDimension(outputShape, 2);               \
-    im2colDim.sizes[0] = (int)inDepth * filterHeight * filterWidth;             \
-                                                                                \
-    im2colDim.strides[0] = 1;                                                   \
-    for (int i=1; i<4; i++) {                                                   \
-        im2colDim.strides[i] = im2colDim.strides[i-1] * im2colDim.sizes[i-1];   \
-    }                                                                           \
-                                                                                \
-    Type* im2colData = nullptr;                                                 \
-    int im2colByteSize = sizeof(Type);                                          \
-    for (int i=0; i<4; i++) {                                                   \
-        im2colByteSize *= im2colDim.sizes[i];                                   \
-    }                                                                           \
-    if (im2colByteSize <= kStaticBufferSize) {                                  \
-        im2colData = reinterpret_cast<Type *>(static_scratch_buffer);           \
-    } else {                                                                    \
-        im2colData = new (std::nothrow) Type[im2colByteSize / sizeof(Type)];    \
-    }
-
-
-bool convFloat32(const float* inputData, const Shape& inputShape,
-                 const float* filterData, const Shape& filterShape,
-                 const float* biasData, const Shape& biasShape,
-                 int32_t padding_left, int32_t padding_right,
-                 int32_t padding_top, int32_t padding_bottom,
-                 int32_t stride_width, int32_t stride_height,
-                 int32_t activation,
-                 float* outputData, const Shape& outputShape) {
-
-    ANDROID_NN_CONV_PARAMETERS(float)
-
-    #define ANDROID_NN_CONV(activation)                                        \
-        Conv<FusedActivationFunctionType::activation>(                         \
-            inputData, convertShapeToDims(inputShape),                         \
-            filterData, convertShapeToDims(filterShape),                       \
-            biasData, convertShapeToDims(biasShape),                           \
-            stride_width, stride_height, paddingWidth, paddingHeight,          \
-            outputData, convertShapeToDims(outputShape),                       \
-            im2colData, im2colDim)
-
-    ANDROID_NN_MACRO_DISPATCH(ANDROID_NN_CONV)
-
-    #undef ANDROID_NN_CONV
-
-    if (im2colByteSize > kStaticBufferSize) {
-        delete[] im2colData;
-    }
-    return true;
-}
-
-//-----------------------------------------------------------------------------
-
-using arm_compute::DataType;
-using arm_compute::graph::Target;
-using arm_compute::graph::TensorDescriptor;
-using arm_compute::TensorShape;
-using arm_compute::graph::frontend::InputLayer;
-using arm_compute::graph::frontend::OutputLayer;
-
-namespace acl_graph {
-
-bool convFloat32(const float* inputData, const Shape& inputShape,
-                 const float* filterData, const Shape& filterShape,
-                 const float* biasData, const Shape& biasShape,
-                 int32_t padding_left, int32_t padding_right,
-                 int32_t padding_top, int32_t padding_bottom,
-                 int32_t stride_width, int32_t stride_height,
-                 int32_t activation,
-                 float* outputData, const Shape& outputShape)
-{
-  // Try with simple build-run with ACL Layer
-  arm_compute::graph::frontend::Stream graph{0, "ACL_CONV2D_TEST"};
-
-  Target target_hint = nnfw::misc::get_env_int("NNFW_ACL_USENEON")
-                           ? Target::NEON : Target::CL;
-
-  // Not sure about which index is which value
-  uint32_t tsi_c = getSizeOfDimension(inputShape, 0);
-  uint32_t tsi_h = getSizeOfDimension(inputShape, 1);
-  uint32_t tsi_w = getSizeOfDimension(inputShape, 2);
-  uint32_t tsi_n = getSizeOfDimension(inputShape, 3);
-
-  uint32_t tsk_h = getSizeOfDimension(filterShape, 1);
-  uint32_t tsk_w = getSizeOfDimension(filterShape, 2);
-  uint32_t tsk_n = getSizeOfDimension(filterShape, 3);
-
-  graph << target_hint
-        << InputLayer(TensorDescriptor(TensorShape(tsi_w, tsi_h, tsi_c, tsi_n), DataType::F32),
-                  std::unique_ptr<InputAccessor>(new InputAccessor(inputData, inputShape)))
-        << arm_compute::graph::frontend::ConvolutionLayer(
-              tsk_w, tsk_h, tsk_n,
-              std::unique_ptr<WeightAccessor>(new WeightAccessor(filterData, filterShape)),
-              std::unique_ptr<BiasAccessor>(new BiasAccessor(biasData, biasShape)),
-              arm_compute::PadStrideInfo(stride_width, stride_height, padding_top, padding_bottom))
-        ;
-  if (activation != static_cast<int32_t>(FusedActivationFunc::NONE)) {
-    arm_compute::ActivationLayerInfo::ActivationFunction actFunc =
-        arm_compute::ActivationLayerInfo::ActivationFunction::RELU;
-
-    graph << arm_compute::graph::frontend::ActivationLayer(arm_compute::ActivationLayerInfo(actFunc));
-    // Activation does not provide output Tensor and makes next layer fail to add to graph
-    // when it's the last(output) layer. To solve this, need to add a dummy layer.
-    uint32_t tso_c = getSizeOfDimension(outputShape, 0);
-    uint32_t tso_h = getSizeOfDimension(outputShape, 1);
-    uint32_t tso_w = getSizeOfDimension(outputShape, 2);
-    uint32_t tso_n = getSizeOfDimension(outputShape, 3);
-    graph << arm_compute::graph::frontend::ReshapeLayer(TensorShape(tso_w, tso_h, tso_c, tso_n));
-  }
-  graph << OutputLayer(std::unique_ptr<OutputAccessor>(new OutputAccessor(outputData, outputShape)))
-        ;
-
-  graph.run();
-
-  return true;
-}
-
-} // namespace acl_graph
-
-//-----------------------------------------------------------------------------
-
-using arm_compute::TensorInfo;
-
-namespace acl_runtime {
-
-TensorShape calculate_convolution_layer_output_shape(
-    const arm_compute::TensorShape &input_shape,
-    const arm_compute::TensorShape &weights_shape,
-    const arm_compute::PadStrideInfo &conv_info)
-{
-    unsigned int output_width  = 0;
-    unsigned int output_height = 0;
-
-    // Get output width and height
-    std::tie(output_width, output_height) =
-        arm_compute::scaled_dimensions(
-            input_shape.x(), input_shape.y(),
-            weights_shape.x(), weights_shape.y(),
-            conv_info);
-
-    // Create output shape
-    TensorShape output_shape = input_shape;
-    output_shape.set(0, output_width);
-    output_shape.set(1, output_height);
-    output_shape.set(2, weights_shape[3]);
-
-    return output_shape;
-}
-
-bool convFloat32(const float* inputData, const Shape& inputShape,
-                 const float* filterData, const Shape& filterShape,
-                 const float* biasData, const Shape& biasShape,
-                 int32_t padding_left, int32_t padding_right,
-                 int32_t padding_top, int32_t padding_bottom,
-                 int32_t stride_width, int32_t stride_height,
-                 int32_t activation,
-                 float* outputData, const Shape& outputShape)
-{
-  arm_compute::CLScheduler::get().default_init();
-
-  uint32_t tsi_c = getSizeOfDimension(inputShape, 0);
-  uint32_t tsi_h = getSizeOfDimension(inputShape, 1);
-  uint32_t tsi_w = getSizeOfDimension(inputShape, 2);
-  uint32_t tsi_n = getSizeOfDimension(inputShape, 3);
-
-  uint32_t tsk_h = getSizeOfDimension(filterShape, 1);
-  uint32_t tsk_w = getSizeOfDimension(filterShape, 2);
-  uint32_t tsk_n = getSizeOfDimension(filterShape, 3);
-
-  TensorShape input_shape = TensorShape(tsi_w, tsi_h, tsi_c, tsi_n);
-  TensorShape filter_shape = TensorShape(tsi_w, tsi_h, tsi_c, tsi_n);
-  arm_compute::PadStrideInfo conv_info =
-      arm_compute::PadStrideInfo(stride_width, stride_height, padding_top, padding_bottom);
-
-  TensorShape output_shape = calculate_convolution_layer_output_shape(
-                                input_shape, filter_shape, conv_info);
-
-  uint32_t tso_c = output_shape[0];
-  uint32_t tso_w = output_shape[1];
-  uint32_t tso_h = output_shape[2];
-  uint32_t tso_n = output_shape[3];
-
-  arm_compute::CLTensor input, output, bias, filter;
-
-  input.allocator()->init(TensorInfo(tsi_w, tsi_h, arm_compute::Format::F32));
-  output.allocator()->init(TensorInfo(tso_w, tso_h, arm_compute::Format::F32));
-  bias.allocator()->init(TensorInfo(tso_w, tso_h, arm_compute::Format::F32));
-  filter.allocator()->init(TensorInfo(tsk_w, tsk_h, arm_compute::Format::F32));
-
-  input.allocator()->allocate();
-  output.allocator()->allocate();
-  bias.allocator()->allocate();
-  filter.allocator()->allocate();
-
-  input.map();
-  InputAccessor ia(inputData, inputShape);
-  ia.access_tensor(input);
-  input.unmap();
-
-  bias.map();
-  BiasAccessor ba(biasData, biasShape);
-  ba.access_tensor(bias);
-  bias.unmap();
-
-  filter.map();
-  WeightAccessor fa(filterData, filterShape);
-  fa.access_tensor(filter);
-  filter.unmap();
-
-  arm_compute::CLConvolutionLayer conv_f;
-  conv_f.configure(&input, &filter, &bias, &output, conv_info);
-
-  arm_compute::CLScheduler::get().sync();
-
-  conv_f.run();
-
-  output.map();
-  OutputAccessor oa(outputData, outputShape);
-  oa.access_tensor(output);
-  output.unmap();
-
-  return true;
-}
-
-} // namespace acl_runtime
-
-//-----------------------------------------------------------------------------
-
-enum COMPUTE_TYPE {
-  COMPUTE_DEFAULT = 0,
-  COMPUTE_ACLGRAPH,
-  COMPUTE_ACLRT
-};
-
-bool convFloat32(const float* inputData, const Shape& inputShape,
-                 const float* filterData, const Shape& filterShape,
-                 const float* biasData, const Shape& biasShape,
-                 int32_t padding_left, int32_t padding_right,
-                 int32_t padding_top, int32_t padding_bottom,
-                 int32_t stride_width, int32_t stride_height,
-                 int32_t activation,
-                 float* outputData, const Shape& outputShape,
-                 COMPUTE_TYPE compType) {
-
-  switch (compType)
-  {
-  case COMPUTE_DEFAULT :
-    return convFloat32(inputData, inputShape, filterData, filterShape,
-                       biasData, biasShape, padding_left, padding_right,
-                       padding_top, padding_bottom, stride_width, stride_height,
-                       activation, outputData, outputShape);
-
-  case COMPUTE_ACLGRAPH :
-    return acl_graph::convFloat32(inputData, inputShape, filterData, filterShape,
-                       biasData, biasShape, padding_left, padding_right,
-                       padding_top, padding_bottom, stride_width, stride_height,
-                       activation, outputData, outputShape);
-
-  case COMPUTE_ACLRT :
-    return acl_runtime::convFloat32(inputData, inputShape, filterData, filterShape,
-                       biasData, biasShape, padding_left, padding_right,
-                       padding_top, padding_bottom, stride_width, stride_height,
-                       activation, outputData, outputShape);
-  }
-  return false;
-}
-
-//-----------------------------------------------------------------------------
-
-void dumpData(const char* name, const float* data, const Shape& shape)
-{
-  uint32_t height = getSizeOfDimension(shape, 1);
-  uint32_t width  = getSizeOfDimension(shape, 2);
-
-  std::cout << "---" << name << "---" << std::endl;
-  for (int h = 0; h < height; h++) {
-    std::cout << "H=" << h << " | ";
-    for (int w = 0; w < width; w++) {
-      std::cout << data[h * width + w] << ",";
-    }
-    std::cout << std::endl;
-  }
-}
-
-void initData(float* outputData, int num, float value)
-{
-  for (int i = 0; i < num; i++) {
-    *(outputData + i) = value;
-  }
-}
-
-void initDataSeq(float* outputData, int num, float value)
-{
-  for (int i = 0; i < num; i++) {
-    *(outputData + i) = value;
-    value += 1.0;
-  }
-}
-
-// compareData
-// return true if result == expected with the shape info,
-// otherwise false
-bool compareData(const float* result, const float* expected, const Shape& shape)
-{
-  NN_CHECK_EQ(shape.dimensions.size(), 4);
-
-  uint32_t height = getSizeOfDimension(shape, 1);
-  uint32_t width  = getSizeOfDimension(shape, 2);
-  uint32_t numitems = height * width;
-  for (int item = 0; item < numitems; item++) {
-    if (*(result + item) != *(expected + item)) {
-      LOG(ERROR) << "compareData failed: result " << *(result + item)
-                 << ", expected " << *(expected + item) << std::endl;
-      return false;
-    }
-  }
-  return true;
-}
-
-int test_3x3_1x1_one(COMPUTE_TYPE comptype)
-{
-  float inputData[9];
-  const Shape inputShape = { OperandType::FLOAT32, {1,3,3,1}, 1.0, 0 };
-  float filterData[9];
-  const Shape filterShape = { OperandType::FLOAT32, {1,3,3,1}, 1.0, 0 };
-  float biasData[1] = { 1.0 };
-  const Shape biasShape = { OperandType::FLOAT32, {1,1,1,1}, 1.0, 0 };
-  int32_t padding_left = 0;
-  int32_t padding_right = 0;
-  int32_t padding_top = 0;
-  int32_t padding_bottom = 0;
-  int32_t stride_width = 1;
-  int32_t stride_height = 1;
-  int32_t activation = static_cast<int32_t>(FusedActivationFunc::RELU);
-  float* outputData = new float[9];
-  const Shape outputShape = { OperandType::FLOAT32, {1,1,1,1}, 1.0, 0 };
-  float* expectData = new float[9];
-  bool bret;
-
-  initData(inputData, sizeof(inputData) / sizeof(inputData[0]), 1.0);
-  initData(filterData, sizeof(filterData) / sizeof(filterData[0]), 1.0);
-  initData(outputData, sizeof(outputData) / sizeof(outputData[0]), 0.0);
-  initData(expectData, sizeof(expectData) / sizeof(expectData[0]), 0.0);
-
-  bret = convFloat32(inputData, inputShape,
-                     filterData, filterShape,
-                     biasData, biasShape,
-                     padding_left, padding_right,
-                     padding_top, padding_bottom,
-                     stride_width, stride_height,
-                     activation,
-                     expectData, outputShape,
-                     COMPUTE_DEFAULT);
-
-  bret = convFloat32(inputData, inputShape,
-                     filterData, filterShape,
-                     biasData, biasShape,
-                     padding_left, padding_right,
-                     padding_top, padding_bottom,
-                     stride_width, stride_height,
-                     activation,
-                     outputData, outputShape,
-                     comptype);
-
-  dumpData("Input  ", inputData, inputShape);
-  dumpData("Filter ", filterData, filterShape);
-  dumpData("Bias   ", biasData, biasShape);
-  dumpData("Output ", outputData, outputShape);
-  std::cout << std::endl;
-
-  bret = compareData(outputData, expectData, outputShape);
-
-  delete outputData;
-  delete expectData;
-
-  if (!bret)
-  {
-    LOG(ERROR) << "TEST FAILED " << __FUNCTION__ << std::endl;
-    return -1;
-  }
-  return 0;
-}
-
-int test_3x3_3x3_one(void)
-{
-  float inputData[9];
-  const Shape inputShape = { OperandType::FLOAT32, {1,3,3,1}, 1.0, 0 };
-  float filterData[9];
-  const Shape filterShape = { OperandType::FLOAT32, {1,3,3,1}, 1.0, 0 };
-  float biasData[1] = { 1.0 };
-  const Shape biasShape = { OperandType::FLOAT32, {1,1,1,1}, 1.0, 0 };
-  int32_t padding_left = 1;
-  int32_t padding_right = 1;
-  int32_t padding_top = 1;
-  int32_t padding_bottom = 1;
-  int32_t stride_width = 1;
-  int32_t stride_height = 1;
-  int32_t activation = static_cast<int32_t>(FusedActivationFunc::RELU);
-  float* outputData = new float[9];
-  const Shape outputShape = { OperandType::FLOAT32, {1,3,3,1}, 1.0, 0 };
-  float* expectData = new float[9];
-  bool bret;
-
-  initData(inputData, sizeof(inputData) / sizeof(inputData[0]), 1.0);
-  initData(filterData, sizeof(filterData) / sizeof(filterData[0]), 1.0);
-  initData(outputData, sizeof(outputData) / sizeof(outputData[0]), 0.0);
-  initData(expectData, sizeof(expectData) / sizeof(expectData[0]), 0.0);
-
-  bret = convFloat32(inputData, inputShape,
-                     filterData, filterShape,
-                     biasData, biasShape,
-                     padding_left, padding_right,
-                     padding_top, padding_bottom,
-                     stride_width, stride_height,
-                     activation,
-                     expectData, outputShape,
-                     COMPUTE_DEFAULT);
-
-  bret = convFloat32(inputData, inputShape,
-                     filterData, filterShape,
-                     biasData, biasShape,
-                     padding_left, padding_right,
-                     padding_top, padding_bottom,
-                     stride_width, stride_height,
-                     activation,
-                     outputData, outputShape,
-                     COMPUTE_ACLGRAPH);
-
-  dumpData("Input  ", inputData, inputShape);
-  dumpData("Filter ", filterData, filterShape);
-  dumpData("Bias   ", biasData, biasShape);
-  dumpData("Output ", outputData, outputShape);
-  std::cout << std::endl;
-
-  bret = compareData(outputData, expectData, outputShape);
-
-  delete outputData;
-  delete expectData;
-
-  if (!bret)
-  {
-    LOG(ERROR) << "TEST FAILED " << __FUNCTION__ << std::endl;
-    return -1;
-  }
-  return 0;
-}
-
-int test_3x3_3x3_seq(void)
-{
-  float inputData[9];
-  const Shape inputShape = { OperandType::FLOAT32, {1,3,3,1}, 1.0, 0 };
-  float filterData[9];
-  const Shape filterShape = { OperandType::FLOAT32, {1,3,3,1}, 1.0, 0 };
-  float biasData[1] = { 1.0 };
-  const Shape biasShape = { OperandType::FLOAT32, {1,1,1,1}, 1.0, 0 };
-  int32_t padding_left = 1;
-  int32_t padding_right = 1;
-  int32_t padding_top = 1;
-  int32_t padding_bottom = 1;
-  int32_t stride_width = 1;
-  int32_t stride_height = 1;
-  int32_t activation = static_cast<int32_t>(FusedActivationFunc::RELU);
-  float* outputData = new float[9];
-  const Shape outputShape = { OperandType::FLOAT32, {1,3,3,1}, 1.0, 0 };
-  float* expectData = new float[9];
-  bool bret;
-
-  initDataSeq(inputData, sizeof(inputData) / sizeof(inputData[0]), 1.0);
-  initDataSeq(filterData, sizeof(filterData) / sizeof(filterData[0]), 1.0);
-  initDataSeq(outputData, sizeof(outputData) / sizeof(outputData[0]), 0.0);
-  initData(expectData, sizeof(expectData) / sizeof(expectData[0]), 0.0);
-
-  bret = convFloat32(inputData, inputShape,
-                     filterData, filterShape,
-                     biasData, biasShape,
-                     padding_left, padding_right,
-                     padding_top, padding_bottom,
-                     stride_width, stride_height,
-                     activation,
-                     expectData, outputShape,
-                     COMPUTE_DEFAULT);
-
-  bret = convFloat32(inputData, inputShape,
-                     filterData, filterShape,
-                     biasData, biasShape,
-                     padding_left, padding_right,
-                     padding_top, padding_bottom,
-                     stride_width, stride_height,
-                     activation,
-                     outputData, outputShape,
-                     COMPUTE_ACLGRAPH);
-
-  dumpData("Input  ", inputData, inputShape);
-  dumpData("Filter ", filterData, filterShape);
-  dumpData("Bias   ", biasData, biasShape);
-  dumpData("Output ", outputData, outputShape);
-  std::cout << std::endl;
-
-  bret = compareData(outputData, expectData, outputShape);
-
-  delete outputData;
-  delete expectData;
-
-  if (!bret)
-  {
-    LOG(ERROR) << "TEST FAILED " << __FUNCTION__ << std::endl;
-    return -1;
-  }
-  return 0;
-}
-
-int main(int argc, char* argv[])
-{
-  int result;
-
-  // input 3x3, output 1x1, all data 1.0
-  result = test_3x3_1x1_one(COMPUTE_ACLGRAPH);
-  if (result) return result;
-  result = test_3x3_1x1_one(COMPUTE_ACLRT);
-  if (result) return result;
-
-  // input 3x3, output 3x3, all data 1.0
-  result = test_3x3_3x3_one();
-  if (result) return result;
-
-  result = test_3x3_3x3_seq();
-  if (result) return result;
-
-  return result;
-}
diff --git a/contrib/labs/kerneltesting/conv2d/optimized_ops.h b/contrib/labs/kerneltesting/conv2d/optimized_ops.h
deleted file mode 100644
index 1d8c4ff28..000000000
--- a/contrib/labs/kerneltesting/conv2d/optimized_ops.h
+++ /dev/null
@@ -1,339 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/*
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef ANDROID_ML_NN_COMMON_OPERATIONS_INTERNAL_OPTIMIZED_OPS_H_
-#define ANDROID_ML_NN_COMMON_OPERATIONS_INTERNAL_OPTIMIZED_OPS_H_
-
-// Make a local VectorMap typedef allowing to map a float array
-// as a Eigen matrix expression. The same explanation as for VectorMap
-// above also applies here.
-template <typename Scalar>
-using MatrixMap = typename std::conditional<
-    std::is_const<Scalar>::value,
-    Eigen::Map<const Eigen::Matrix<typename std::remove_const<Scalar>::type,
-                                   Eigen::Dynamic, Eigen::Dynamic>>,
-    Eigen::Map<Eigen::Matrix<Scalar, Eigen::Dynamic, Eigen::Dynamic>>>::type;
-
-template <typename Scalar, int N>
-MatrixMap<Scalar> MapAsMatrixWithFirstDimAsRows(Scalar* data,
-                                                const Dims<N>& dims) {
-  const int rows = dims.sizes[0];
-  int cols = 1;
-  for (int d = 1; d < N; d++) {
-    cols *= dims.sizes[d];
-  }
-  return MatrixMap<Scalar>(data, rows, cols);
-}
-
-template <typename Scalar, int N>
-MatrixMap<Scalar> MapAsMatrixWithLastDimAsCols(Scalar* data,
-                                               const Dims<N>& dims) {
-  const int cols = dims.sizes[N - 1];
-  int rows = 1;
-  for (int d = 0; d < N - 1; d++) {
-    rows *= dims.sizes[d];
-  }
-  return MatrixMap<Scalar>(data, rows, cols);
-}
-
-template <typename T>
-inline void ExtractPatchIntoBufferColumn(
-    const Dims<4>& input_dims, int w, int h, int b, int kheight, int kwidth,
-    int stride_width, int stride_height, int pad_width, int pad_height,
-    int in_width, int in_height, int in_depth, int single_buffer_length,
-    int buffer_id, const T* in_data, T* conv_buffer_data, uint8 byte_zero) {
-  gemmlowp::ScopedProfilingLabel label("ExtractPatchIntoBufferColumn");
-  // This chunk of code reshapes all the inputs corresponding to
-  // output (b, h, w) to a column vector in conv_buffer(:, buffer_id).
-  const int kwidth_times_indepth = kwidth * in_depth;
-  const int inwidth_times_indepth = in_width * in_depth;
-  const int ih_ungated_start = h * stride_height - pad_height;
-  const int ih_ungated_end = (ih_ungated_start + kheight);
-  const int ih_end = std::min(ih_ungated_end, in_height);
-  const int iw_ungated_start = w * stride_width - pad_width;
-  const int iw_ungated_end = (iw_ungated_start + kwidth);
-  const int iw_end = std::min(iw_ungated_end, in_width);
-  // If the patch is off the edge of the input image, skip writing those rows
-  // and columns from the patch into the output array.
-  const int h_offset = std::max(0, -ih_ungated_start);
-  const int w_offset = std::max(0, -iw_ungated_start);
-  const int ih_start = std::max(0, ih_ungated_start);
-  const int iw_start = std::max(0, iw_ungated_start);
-  const int single_row_num =
-      std::min(kwidth - w_offset, in_width - iw_start) * in_depth;
-  const int output_row_offset = (buffer_id * single_buffer_length);
-  int out_offset =
-      output_row_offset + (h_offset * kwidth + w_offset) * in_depth;
-  int in_offset = Offset(input_dims, 0, iw_start, ih_start, b);
-
-  // Express all of the calculations as padding around the input patch.
-  const int top_padding = h_offset;
-  const int bottom_padding = (ih_ungated_end - ih_end);
-  const int left_padding = w_offset;
-  const int right_padding = (iw_ungated_end - iw_end);
-  assert(single_row_num ==
-         ((kwidth - (left_padding + right_padding)) * in_depth));
-
-  // Write out zeroes to the elements representing the top rows of the input
-  // patch that are off the edge of the input image.
-  if (top_padding > 0) {
-    const int top_row_elements = (top_padding * kwidth * in_depth);
-    memset(conv_buffer_data + output_row_offset, byte_zero,
-           (top_row_elements * sizeof(T)));
-  }
-
-  // If the patch is on the interior of the input image horizontally, just copy
-  // over the rows sequentially, otherwise add zero padding at the start or end.
-  if ((left_padding == 0) && (right_padding == 0)) {
-    for (int ih = ih_start; ih < ih_end; ++ih) {
-      memcpy(conv_buffer_data + out_offset, in_data + in_offset,
-             single_row_num * sizeof(T));
-      out_offset += kwidth_times_indepth;
-      in_offset += inwidth_times_indepth;
-    }
-  } else {
-    for (int ih = ih_start; ih < ih_end; ++ih) {
-      if (left_padding > 0) {
-        const int left_start = (out_offset - (left_padding * in_depth));
-        memset(conv_buffer_data + left_start, byte_zero,
-               (left_padding * in_depth * sizeof(T)));
-      }
-      memcpy(conv_buffer_data + out_offset, in_data + in_offset,
-             single_row_num * sizeof(T));
-      if (right_padding > 0) {
-        const int right_start = (out_offset + single_row_num);
-        memset(conv_buffer_data + right_start, byte_zero,
-               (right_padding * in_depth * sizeof(T)));
-      }
-      out_offset += kwidth_times_indepth;
-      in_offset += inwidth_times_indepth;
-    }
-  }
-
-  // If the bottom of the patch falls off the input image, pad the values
-  // representing those input rows with zeroes.
-  if (bottom_padding > 0) {
-    const int bottom_row_elements = (bottom_padding * kwidth * in_depth);
-    const int bottom_start =
-        output_row_offset +
-        ((top_padding + (ih_end - ih_start)) * kwidth * in_depth);
-    memset(conv_buffer_data + bottom_start, byte_zero,
-           (bottom_row_elements * sizeof(T)));
-  }
-}
-
-#ifdef USE_NEON
-template <FusedActivationFunctionType Ac>
-void AddBiasAndEvalActivationFunction(const float* bias_data,
-                                      const Dims<4>& bias_dims,
-                                      float* array_data,
-                                      const Dims<4>& array_dims) {
-  gemmlowp::ScopedProfilingLabel label("AddBiasAndEvalActivationFunction");
-  const int bias_size = bias_dims.sizes[3] * bias_dims.strides[3];
-  const int array_size = array_dims.sizes[3] * array_dims.strides[3];
-  DCHECK_EQ((array_size % bias_size), 0);
-  float* array_ptr = array_data;
-  float* array_end_ptr = array_ptr + array_size;
-  const auto zero = vdupq_n_f32(0);
-  const auto six = vdupq_n_f32(6);
-  const auto neg_one = vdupq_n_f32(-1);
-  const auto one = vdupq_n_f32(1);
-  for (; array_ptr != array_end_ptr; array_ptr += bias_size) {
-    int i = 0;
-    for (; i <= bias_size - 16; i += 16) {
-      auto b0 = vld1q_f32(bias_data + i);
-      auto b1 = vld1q_f32(bias_data + i + 4);
-      auto b2 = vld1q_f32(bias_data + i + 8);
-      auto b3 = vld1q_f32(bias_data + i + 12);
-      auto a0 = vld1q_f32(array_ptr + i);
-      auto a1 = vld1q_f32(array_ptr + i + 4);
-      auto a2 = vld1q_f32(array_ptr + i + 8);
-      auto a3 = vld1q_f32(array_ptr + i + 12);
-      auto x0 = vaddq_f32(a0, b0);
-      auto x1 = vaddq_f32(a1, b1);
-      auto x2 = vaddq_f32(a2, b2);
-      auto x3 = vaddq_f32(a3, b3);
-      if (Ac == FusedActivationFunctionType::kRelu ||
-          Ac == FusedActivationFunctionType::kRelu6) {
-        x0 = vmaxq_f32(zero, x0);
-        x1 = vmaxq_f32(zero, x1);
-        x2 = vmaxq_f32(zero, x2);
-        x3 = vmaxq_f32(zero, x3);
-        if (Ac == FusedActivationFunctionType::kRelu6) {
-          x0 = vminq_f32(six, x0);
-          x1 = vminq_f32(six, x1);
-          x2 = vminq_f32(six, x2);
-          x3 = vminq_f32(six, x3);
-        }
-      } else if (Ac == FusedActivationFunctionType::kRelu1) {
-        x0 = vmaxq_f32(neg_one, x0);
-        x1 = vmaxq_f32(neg_one, x1);
-        x2 = vmaxq_f32(neg_one, x2);
-        x3 = vmaxq_f32(neg_one, x3);
-        x0 = vminq_f32(one, x0);
-        x1 = vminq_f32(one, x1);
-        x2 = vminq_f32(one, x2);
-        x3 = vminq_f32(one, x3);
-      }
-      vst1q_f32(array_ptr + i, x0);
-      vst1q_f32(array_ptr + i + 4, x1);
-      vst1q_f32(array_ptr + i + 8, x2);
-      vst1q_f32(array_ptr + i + 12, x3);
-    }
-    for (; i <= bias_size - 4; i += 4) {
-      auto b = vld1q_f32(bias_data + i);
-      auto a = vld1q_f32(array_ptr + i);
-      auto x = vaddq_f32(a, b);
-      if (Ac == FusedActivationFunctionType::kRelu ||
-          Ac == FusedActivationFunctionType::kRelu6) {
-        x = vmaxq_f32(zero, x);
-        if (Ac == FusedActivationFunctionType::kRelu6) {
-          x = vminq_f32(six, x);
-        }
-      } else if (Ac == FusedActivationFunctionType::kRelu1) {
-        x = vmaxq_f32(neg_one, x);
-        x = vminq_f32(one, x);
-      }
-      vst1q_f32(array_ptr + i, x);
-    }
-    for (; i < bias_size; i++) {
-      array_ptr[i] = ActivationFunction<Ac>(array_ptr[i] + bias_data[i]);
-    }
-  }
-}
-#else  // not NEON
-template <FusedActivationFunctionType Ac>
-void AddBiasAndEvalActivationFunction(const float* bias_data,
-                                      const Dims<4>& bias_dims,
-                                      float* array_data,
-                                      const Dims<4>& array_dims) {
-  gemmlowp::ScopedProfilingLabel label("AddBiasAndEvalActivationFunction");
-  const int bias_size = bias_dims.sizes[3] * bias_dims.strides[3];
-  const int array_size = array_dims.sizes[3] * array_dims.strides[3];
-  DCHECK_EQ((array_size % bias_size), 0);
-  for (int array_offset = 0; array_offset < array_size;
-       array_offset += bias_size) {
-    for (int i = 0; i < bias_size; i++) {
-      array_data[array_offset + i] =
-          ActivationFunction<Ac>(array_data[array_offset + i] + bias_data[i]);
-    }
-  }
-}
-#endif
-
-template <typename Lhs, typename Rhs, typename Result>
-void Gemm(const Eigen::MatrixBase<Lhs>& lhs, const Eigen::MatrixBase<Rhs>& rhs,
-          Eigen::MatrixBase<Result>* result) {
-  if (rhs.cols() == 1) {
-    gemmlowp::ScopedProfilingLabel label("GEMV");
-    result->col(0).noalias() = lhs * rhs.col(0);
-  } else {
-    gemmlowp::ScopedProfilingLabel label("GEMM");
-    result->noalias() = lhs * rhs;
-  }
-}
-
-template <typename T>
-void Im2col(const T* input_data, const Dims<4>& input_dims, int stride_width,
-            int stride_height, int pad_width, int pad_height, int kheight,
-            int kwidth, uint8 byte_zero, T* output_data,
-            const Dims<4>& output_dims) {
-  gemmlowp::ScopedProfilingLabel label("Im2col");
-  DCHECK(IsPackedWithoutStrides(input_dims));
-  DCHECK(IsPackedWithoutStrides(output_dims));
-  const int batches = MatchingArraySize(input_dims, 3, output_dims, 3);
-  const int input_depth = ArraySize(input_dims, 0);
-  const int input_width = ArraySize(input_dims, 1);
-  const int input_height = ArraySize(input_dims, 2);
-  const int output_depth = ArraySize(output_dims, 0);
-  const int output_width = ArraySize(output_dims, 1);
-  const int output_height = ArraySize(output_dims, 2);
-
-  int buffer_id = 0;
-  // Loop over the output nodes.
-  for (int b = 0; b < batches; ++b) {
-    for (int h = 0; h < output_height; ++h) {
-      for (int w = 0; w < output_width; ++w) {
-        ExtractPatchIntoBufferColumn(
-            input_dims, w, h, b, kheight, kwidth, stride_width, stride_height,
-            pad_width, pad_height, input_width, input_height, input_depth,
-            output_depth, buffer_id, input_data, output_data, byte_zero);
-        ++buffer_id;
-      }
-    }
-  }
-}
-
-template <FusedActivationFunctionType Ac>
-void Conv(const float* input_data, const Dims<4>& input_dims,
-          const float* filter_data, const Dims<4>& filter_dims,
-          const float* bias_data, const Dims<4>& bias_dims, int stride_width,
-          int stride_height, int pad_width, int pad_height, float* output_data,
-          const Dims<4>& output_dims, float* im2col_data,
-          const Dims<4>& im2col_dims) {
-  (void)im2col_data;
-  (void)im2col_dims;
-  gemmlowp::ScopedProfilingLabel label("Conv");
-
-  const float* gemm_input_data = nullptr;
-  const Dims<4>* gemm_input_dims = nullptr;
-  const int filter_width = ArraySize(filter_dims, 1);
-  const int filter_height = ArraySize(filter_dims, 2);
-  const bool need_im2col = stride_width != 1 || stride_height != 1 ||
-                           filter_width != 1 || filter_height != 1;
-  if (need_im2col) {
-    DCHECK(im2col_data);
-    Im2col(input_data, input_dims, stride_width, stride_height, pad_width,
-           pad_height, filter_height, filter_width, 0, im2col_data,
-           im2col_dims);
-    gemm_input_data = im2col_data;
-    gemm_input_dims = &im2col_dims;
-  } else {
-    DCHECK(!im2col_data);
-    gemm_input_data = input_data;
-    gemm_input_dims = &input_dims;
-  }
-
-  const auto im2col_matrix_map =
-      MapAsMatrixWithFirstDimAsRows(gemm_input_data, *gemm_input_dims);
-  const auto filter_matrix_map =
-      MapAsMatrixWithLastDimAsCols(filter_data, filter_dims);
-  auto output_matrix_map =
-      MapAsMatrixWithFirstDimAsRows(output_data, output_dims);
-
-  Gemm(filter_matrix_map.transpose(), im2col_matrix_map, &output_matrix_map);
-
-  AddBiasAndEvalActivationFunction<Ac>(bias_data, bias_dims, output_data,
-                                       output_dims);
-}
-
-#endif  // ANDROID_ML_NN_COMMON_OPERATIONS_INTERNAL_OPTIMIZED_OPS_H_
diff --git a/contrib/labs/kerneltesting/conv2d/types.h b/contrib/labs/kerneltesting/conv2d/types.h
deleted file mode 100644
index 3d09457c7..000000000
--- a/contrib/labs/kerneltesting/conv2d/types.h
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/*
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef ANDROID_ML_NN_COMMON_OPERATIONS_INTERNAL_TYPES_H_
-#define ANDROID_ML_NN_COMMON_OPERATIONS_INTERNAL_TYPES_H_
-
-enum class OperandType : int32_t {
-    FLOAT32 = 0,
-    INT32 = 1,
-    UINT32 = 2,
-    TENSOR_FLOAT32 = 3,
-    TENSOR_INT32 = 4,
-    TENSOR_QUANT8_ASYMM = 5,
-    OEM = 10000,
-    TENSOR_OEM_BYTE = 10001,
-};
-
-#include "compatibility.h"
-
-enum class FusedActivationFunctionType { kNone, kRelu6, kRelu1, kRelu };
-
-template <int N>
-struct Dims {
-  int sizes[N];
-  int strides[N];
-};
-
-// The type and dimensions of an operand.
-struct Shape {
-    OperandType type;
-    std::vector<uint32_t> dimensions;
-    float scale;
-    int32_t offset;
-};
-
-inline uint32_t getSizeOfDimension(const Shape& shape, uint32_t dimensionIdx) {
-    if (dimensionIdx >= shape.dimensions.size()) {
-        // TODO, log the error
-        return 0;
-    }
-    return shape.dimensions[dimensionIdx];
-}
-
-inline Dims<4> convertShapeToDims(const Shape& shape) {
-  Dims<4> dims;
-  for (int i=0; i<4; i++) {
-    dims.sizes[i] = 1;
-  }
-
-  if (shape.dimensions.size() == 1) {
-    dims.sizes[0] = (int)getSizeOfDimension(shape, 0);
-  } else {
-    for (int i=0; i<4; i++) {
-      int src = (int)shape.dimensions.size()-i-1;
-      if (src >= 0) {
-        dims.sizes[i] = (int)getSizeOfDimension(shape, src);
-      }
-    }
-  }
-
-  dims.strides[0] = 1;
-  for (int i = 1; i<4; i++) {
-    dims.strides[i] = dims.strides[i-1] * dims.sizes[i-1];
-  }
-  return dims;
-}
-
-inline int Offset(const Dims<4>& dims, int i0, int i1, int i2, int i3) {
-  DCHECK(i0 >= 0 && i0 < dims.sizes[0]);
-  DCHECK(i1 >= 0 && i1 < dims.sizes[1]);
-  DCHECK(i2 >= 0 && i2 < dims.sizes[2]);
-  DCHECK(i3 >= 0 && i3 < dims.sizes[3]);
-  return i0 * dims.strides[0] + i1 * dims.strides[1] + i2 * dims.strides[2] +
-         i3 * dims.strides[3];
-}
-
-// Get array size, DCHECKing that the dim index is in range.
-template <int N>
-int ArraySize(const Dims<N>& array, int index) {
-  DCHECK(index >= 0 && index < N);
-  return array.sizes[index];
-}
-
-// Get common array size, DCHECKing that they all agree.
-template <typename ArrayType1, typename ArrayType2>
-int MatchingArraySize(const ArrayType1& array1, int index1,
-                      const ArrayType2& array2, int index2) {
-  DCHECK_EQ(ArraySize(array1, index1), ArraySize(array2, index2));
-  return ArraySize(array1, index1);
-}
-
-template <typename ArrayType1, typename ArrayType2, typename... Args>
-int MatchingArraySize(const ArrayType1& array1, int index1,
-                      const ArrayType2& array2, int index2, Args... args) {
-  DCHECK_EQ(ArraySize(array1, index1), ArraySize(array2, index2));
-  return MatchingArraySize(array1, index1, args...);
-}
-
-inline int RequiredBufferSizeForDims(const Dims<4>& dims) {
-  int max_offset = 0;
-  for (int i = 0; i < 4; i++) {
-    max_offset += (dims.sizes[i] - 1) * dims.strides[i];
-  }
-  return max_offset + 1;
-}
-
-template <int N>
-bool IsPackedWithoutStrides(const Dims<N>& dims) {
-  int expected_stride = 1;
-  for (int d = 0; d < N; d++) {
-    if (dims.strides[d] != expected_stride) return false;
-    expected_stride *= dims.sizes[d];
-  }
-  return true;
-}
-
-#endif  // ANDROID_ML_NN_COMMON_OPERATIONS_INTERNAL_TYPES_H_
diff --git a/contrib/labs/opencl_test/CMakeLists.txt b/contrib/labs/opencl_test/CMakeLists.txt
deleted file mode 100644
index 5e99fa051..000000000
--- a/contrib/labs/opencl_test/CMakeLists.txt
+++ /dev/null
@@ -1,12 +0,0 @@
-if(NOT ${TARGET_ARCH_BASE} STREQUAL "arm")
-  return()
-endif(NOT ${TARGET_ARCH_BASE} STREQUAL "arm")
-
-list(APPEND OPENCL_INFO_SOURCE "src/opencl_test.cc")
-
-add_executable(opencl_test ${OPENCL_INFO_SOURCE})
-target_include_directories(opencl_test PUBLIC ${CMAKE_SOURCE_DIR}/externals/acl)
-target_include_directories(opencl_test PUBLIC ${CMAKE_SOURCE_DIR}/externals/acl/include)
-target_include_directories(opencl_test PUBLIC ${CMAKE_SOURCE_DIR}/libs/ARMComputeEx)
-target_link_libraries(opencl_test arm_compute)
-target_link_libraries(opencl_test arm_compute_ex)
diff --git a/contrib/labs/opencl_test/src/opencl_test.cc b/contrib/labs/opencl_test/src/opencl_test.cc
deleted file mode 100644
index 93994ae43..000000000
--- a/contrib/labs/opencl_test/src/opencl_test.cc
+++ /dev/null
@@ -1,397 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/*******************************************************************************
- * Copyright (c) 2008-2015 The Khronos Group Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and/or associated documentation files (the
- * "Materials"), to deal in the Materials without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Materials, and to
- * permit persons to whom the Materials are furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice shall be included
- * in all copies or substantial portions of the Materials.
- *
- * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
- ******************************************************************************/
-
-#include "arm_compute/core/CL/OpenCL.h"
-#include "arm_compute/core/CL/OpenCLEx.h"
-
-#include <iostream>
-#include <vector>
-
-void printDeviceInfo(int n, cl::Device &device, cl::Device &default_device)
-{
-  bool is_default = (device() == default_device());
-  std::cout << "\t\t\t#" << n << " Device: (id: " << device() << ") "
-            << (is_default ? " -> default" : "") << "\n";
-
-  const auto name = device.getInfo<CL_DEVICE_NAME>();
-  std::cout << "\t\t\t\tName: " << name << "\n";
-
-  const auto compute_unit = device.getInfo<CL_DEVICE_MAX_COMPUTE_UNITS>();
-  std::cout << "\t\t\t\tMax Compute Unit: " << compute_unit << "\n";
-
-  const auto max_work_item_size = device.getInfo<CL_DEVICE_MAX_WORK_ITEM_SIZES>();
-  std::cout << "\t\t\t\tMax Work Item Size: [";
-  for (auto size : max_work_item_size)
-    std::cout << size << ",";
-  std::cout << "]\n";
-
-  const auto max_work_group_size = device.getInfo<CL_DEVICE_MAX_WORK_GROUP_SIZE>();
-  std::cout << "\t\t\t\tMax Work Grpup Size: " << max_work_group_size << "\n";
-
-  const auto max_clock_frequency = device.getInfo<CL_DEVICE_MAX_CLOCK_FREQUENCY>();
-  std::cout << "\t\t\t\tMax Clock Frequency: " << max_clock_frequency << "\n";
-
-  std::cout << "\n";
-}
-
-
-class OpenCLGpu
-{
-  public:
-    cl::Platform platform_;
-    cl::Context context_;
-    cl::vector<cl::Device> devices_;
-    std::vector<cl::CommandQueue*> q_;
-    cl::Program program_;
-
-    OpenCLGpu()
-    {
-      cl_int cl_error;
-
-      platform_ = cl::Platform::getDefault();
-
-      try
-      {
-        cl_context_properties properties[3] = {
-            CL_CONTEXT_PLATFORM, (cl_context_properties)platform_(), 0
-          };
-
-        context_ = cl::Context(CL_DEVICE_TYPE_GPU, properties, NULL, NULL, &cl_error);
-      }
-      catch (cl::Error &err) // thrown when there is no Context for this platform
-      {
-        std::cout << "\t\t No Context Found\n";
-        return;
-      }
-
-      devices_ = context_.getInfo<CL_CONTEXT_DEVICES>();
-
-      for (int dev_id = 0; dev_id < devices_.size(); dev_id++)
-      {
-        cl::CommandQueue* que = new cl::CommandQueue(context_, devices_[dev_id]);
-        q_.emplace_back(que);
-      }
-    }
-
-    ~OpenCLGpu()
-    {
-      for (auto each_q : q_)
-        delete each_q;
-    }
-
-    void buildProgram(std::string& kernel_source_code)
-    {
-      std::vector<std::string> programStrings {kernel_source_code};
-
-      program_ = cl::Program(context_, programStrings);
-
-      try
-      {
-        program_.build("-cl-std=CL1.2");
-      }
-      catch (cl::Error &err)
-      {
-        cl_int buildErr = CL_SUCCESS;
-        auto buildInfo = program_.getBuildInfo<CL_PROGRAM_BUILD_LOG>(&buildErr);
-        for (auto &pair : buildInfo) {
-            std::cerr << pair.second << std::endl << std::endl;
-        }
-      }
-    }
-};
-
-
-void checkContextMem()
-{
-  cl_int cl_error;
-
-  // get context, devices
-  //
-  std::cout << "\nChecking if devices in GPU shares the same memory address:\n\n";
-
-  OpenCLGpu gpu;
-
-  std::cout << "\nDevices in GPU:\n\n";
-
-  auto &devices = gpu.devices_;
-  auto default_device = cl::Device::getDefault();
-
-  int d = 0;
-  for (auto device : devices)
-    printDeviceInfo(++d, device, default_device);
-
-  if (d < 2)
-  {
-    std::cout << "\t\t This options works when there are n (>= 2) devices.\n";
-    return;
-  }
-
-  // allocate and map memory
-
-  typedef cl_int T;
-  const int items_per_device = 128;
-  const int length = items_per_device * devices.size();
-
-  std::vector<T> input(length);
-  std::vector<T> output(length, 0);
-
-  for (int i = 0; i < length; i++)
-    input[i] = i;
-
-  cl::Buffer input_buf(gpu.context_, (cl_mem_flags)CL_MEM_USE_HOST_PTR, length*sizeof(T), input.data(), &cl_error);
-  cl::Buffer output_buf(gpu.context_, (cl_mem_flags)CL_MEM_USE_HOST_PTR, length*sizeof(T), output.data(), &cl_error);
-
-  // compile test cl code
-
-  std::string kernel_source {
-    "typedef int T;                                                 \n" \
-    "kernel void memory_test(                                       \n" \
-    "   const int dev_id,                                           \n" \
-    "   global T* input,                                            \n" \
-    "   global T* output,                                           \n" \
-    "   const int start_idx,                                        \n" \
-    "   const int count)                                            \n" \
-    "{                                                              \n" \
-    "   int input_idx = get_global_id(0);                           \n" \
-    "   if(input_idx < count)                                       \n" \
-    "   {                                                           \n" \
-    "       int output_idx = start_idx + input_idx;                 \n" \
-    "       output[output_idx] = input[input_idx] + dev_id;         \n" \
-    "   }                                                           \n" \
-    "}                                                              \n"
-    };
-
-  gpu.buildProgram(kernel_source);
-
-  try
-  {
-    auto kernel_functor = cl::KernelFunctor<cl_int, cl::Buffer, cl::Buffer, cl_int, cl_int>
-                              (gpu.program_, "memory_test"); // name should be same as cl function name
-
-    // create a queue per device and queue a kernel job
-
-    for (int dev_id = 0; dev_id < devices.size(); dev_id++)
-    {
-      kernel_functor(
-          cl::EnqueueArgs(
-              *(gpu.q_[dev_id]),
-              cl::NDRange(items_per_device)),
-          (cl_int)dev_id, // dev id
-          input_buf,
-          output_buf,
-          (cl_int)(items_per_device * dev_id), // start index
-          (cl_int)(items_per_device), // count
-          cl_error
-          );
-    }
-
-    // sync
-
-    for (d = 0; d < devices.size(); d++)
-      (gpu.q_[d])->finish();
-
-    // check if memory state changed by all devices
-
-    cl::copy(*(gpu.q_[0]), output_buf, begin(output), end(output));
-
-    bool use_same_memory = true;
-
-    for (int dev_id = 0; dev_id < devices.size(); dev_id++)
-    {
-      for (int i = 0; i < items_per_device; ++i)
-      {
-        int output_idx = items_per_device * dev_id + i;
-        if (output[output_idx] != input[i] + dev_id)
-        {
-          std::cout << "Output[" << output_idx << "] : "
-                    << "expected = "  << input[i] + dev_id
-                    << "; actual = " << output[output_idx] << "\n";
-          use_same_memory = false;
-          break;
-        }
-      }
-    }
-
-    if (use_same_memory)
-      std::cout << "\n=> Mapped memory addresses used by devices in GPU are same.\n\n";
-    else
-      std::cout << "\n=> Mapped memory addresses used by devices in GPU are different.\n\n";
-  }
-  catch (cl::Error &err)
-  {
-    std::cerr << "error: code: " << err.err() << ", what: " << err.what() << std::endl;
-  }
-}
-
-void printHelp()
-{
-    std::cout << "opencl information: \n\n";
-    std::cout << "\t -h : help\n";
-    std::cout << "\t -g : print if memory map is shared among devices in GPU (in default platform)\n\n";
-    std::cout << "\t -s : test for synchronized work by two devices in a GPU\n\n";
-}
-
-#include <mutex>
-#include <chrono>
-#include <thread>
-#include <condition_variable>
-
-#define MAX_DEVICE_NUM 8 // just for testing
-
-int  kernel_idx[MAX_DEVICE_NUM];
-unsigned char kernel_completed = 0x00; // bit 0 = 1 means kernel by device[0] was completed.
-unsigned char kernel_completed_flag;   // if comparing kernel_completed with this var, all kernels are completed
-int  device_num;
-std::mutex kernel_complete_handler_mutex;
-
-std::condition_variable wakeup_main;
-std::mutex wakeup_main_mutex;
-
-void notifyKernelFinished(cl_event ev, cl_int ev_info, void * device_idx)
-{
-  std::cout << "callback from device[" << *((int*)device_idx) << "] : ==> completed.\n";
-
-  std::unique_lock<std::mutex> lock(kernel_complete_handler_mutex);
-
-  kernel_completed |= 0x01 << *((int*)device_idx);
-  if (kernel_completed == kernel_completed_flag)
-     wakeup_main.notify_one();
-}
-
-void testSync()
-{
-  OpenCLGpu gpu;
-
-  cl_int cl_error;
-  typedef cl_int T;
-  const int items_per_device = 1024*768;
-  const int length = items_per_device * gpu.devices_.size();
-
-  std::vector<T> output(length, 0);
-
-  cl::Buffer output_buf(gpu.context_, (cl_mem_flags)CL_MEM_USE_HOST_PTR, length*sizeof(T), output.data(), &cl_error);
-
-  std::string kernel_source {
-    "kernel void test(global float* output, const int count)  \n" \
-    "{                                                        \n" \
-    "   int idx = get_global_id(0);                           \n" \
-    "   if(idx < count)                                       \n" \
-    "   {                                                     \n" \
-    "       float x = hypot(idx/1.111, idx*1.111);            \n" \
-    "       for (int y = 0; y < 200; y++)                     \n" \
-    "         x = rootn(log(pown(rootn(log(pown(x, 20)), 5), 20)), 5);  \n" \
-    "       output[idx] = x;                                  \n" \
-    "   }                                                     \n" \
-    "}                                                        \n"
-    };
-
-  gpu.buildProgram(kernel_source);
-
-  try
-  {
-    auto kernel_functor = cl::KernelFunctor<cl::Buffer, cl_int>
-                              (gpu.program_, "test"); // name should be same as cl function name
-
-    // variable init
-    cl::Event ev[MAX_DEVICE_NUM];
-
-    device_num = gpu.devices_.size();
-
-    kernel_completed = 0;
-    kernel_completed_flag = 0;
-    for (int i = 0; i < device_num; i++)
-    {
-      kernel_idx[i] = i;
-      kernel_completed_flag |= 0x01 << i;
-    }
-
-    // create a queue per device and queue a kernel job
-    // queueing with callback function
-    for (int dev_id = 0; dev_id < gpu.devices_.size(); dev_id++)
-    {
-      ev[dev_id] = kernel_functor(
-                          cl::EnqueueArgs(
-                              *(gpu.q_[dev_id]),
-                              cl::NDRange(items_per_device)),
-                          output_buf,
-                          (cl_int)(items_per_device), // count
-                          cl_error
-                          );
-      ev[dev_id].setCallback(CL_COMPLETE, notifyKernelFinished, (void*)(kernel_idx+dev_id));
-
-      // how to check kernel execution status
-      //
-      // auto status  = ev[dev_id].getInfo<CL_EVENT_COMMAND_EXECUTION_STATUS>();
-      // std::cout << "Event status = " << (status == CL_QUEUED ? "CL_QUEUED" : status == CL_SUBMITTED ? "CL_SUBMITTED" : status == CL_COMPLETE ? "CL_COMPLETE" : "unknown")
-      //           << std::endl;
-      // std::cout << "Event status code = " << status << std::endl;
-    }
-
-    // long wait until kernels are over
-    {
-      std::unique_lock<std::mutex> lk(wakeup_main_mutex);
-      wakeup_main.wait(lk, []{ return (kernel_completed == kernel_completed_flag); });
-
-      std::cout << "all devices were completed.\n";
-    }
-  }
-  catch (cl::Error &err)
-  {
-    std::cerr << "error: code: " << err.err() << ", what: " << err.what() << std::endl;
-  }
-
-}
-
-int main(const int argc, char **argv)
-{
-  if (argc < 2)
-    printHelp();
-  else
-  {
-    std::string option = argv[1];
-
-    if (option == "-h") // help
-      printHelp();
-    else if (option == "-g") // check if devices in GPU uses same memory address
-      checkContextMem();
-    else if (option == "-s") // check synchronization between devices in GPU
-      testSync();
-  }
-  return 0;
-}
diff --git a/contrib/labs/tflite_examples/src/conv.cpp b/contrib/labs/tflite_examples/src/conv.cpp
deleted file mode 100644
index e517da9f3..000000000
--- a/contrib/labs/tflite_examples/src/conv.cpp
+++ /dev/null
@@ -1,330 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "tflite/ext/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
-
-#include <iostream>
-
-using namespace tflite;
-using namespace nnfw::tflite;
-
-namespace vector
-{
-
-template <typename T> struct View
-{
-  virtual ~View() = default;
-
-  virtual int32_t size(void) const = 0;
-  virtual T at(uint32_t off) const = 0;
-};
-}
-
-namespace feature
-{
-
-struct Shape
-{
-  int32_t C;
-  int32_t H;
-  int32_t W;
-};
-
-template <typename T> struct View
-{
-  virtual ~View() = default;
-
-  virtual const Shape &shape(void) const = 0;
-  virtual T at(uint32_t ch, uint32_t row, uint32_t col) const = 0;
-};
-}
-
-namespace kernel
-{
-
-struct Shape
-{
-  int32_t N;
-  int32_t C;
-  int32_t H;
-  int32_t W;
-};
-
-template <typename T> struct View
-{
-  virtual ~View() = default;
-
-  virtual const Shape &shape(void) const = 0;
-  virtual T at(uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) const = 0;
-};
-}
-
-const int32_t N = 1;
-const int32_t C = 2;
-
-class SampleBiasObject final : public vector::View<float>
-{
-public:
-  SampleBiasObject() : _size(N)
-  {
-    // DO NOTHING
-  }
-
-public:
-  int32_t size(void) const override { return _size; }
-
-  float at(uint32_t off) const override { return 0.0f; }
-
-private:
-  int32_t _size;
-};
-
-class SampleFeatureObject final : public feature::View<float>
-{
-public:
-  SampleFeatureObject()
-  {
-    _shape.C = C;
-    _shape.H = 3;
-    _shape.W = 4;
-
-    const uint32_t size = _shape.C * _shape.H * _shape.W;
-
-    for (uint32_t off = 0; off < size; ++off)
-    {
-      _value.emplace_back(off);
-    }
-
-    assert(_value.size() == size);
-  }
-
-public:
-  const feature::Shape &shape(void) const override { return _shape; };
-
-  float at(uint32_t ch, uint32_t row, uint32_t col) const override
-  {
-    return _value.at(ch * _shape.H * _shape.W + row * _shape.W + col);
-  }
-
-public:
-  float &at(uint32_t ch, uint32_t row, uint32_t col)
-  {
-    return _value.at(ch * _shape.H * _shape.W + row * _shape.W + col);
-  }
-
-private:
-  feature::Shape _shape;
-  std::vector<float> _value;
-};
-
-class SampleKernelObject final : public kernel::View<float>
-{
-public:
-  SampleKernelObject()
-  {
-    _shape.N = N;
-    _shape.C = C;
-    _shape.H = 3;
-    _shape.W = 4;
-
-    const uint32_t size = _shape.N * _shape.C * _shape.H * _shape.W;
-
-    for (uint32_t off = 0; off < size; ++off)
-    {
-      _value.emplace_back(off);
-    }
-
-    assert(_value.size() == size);
-  }
-
-public:
-  const kernel::Shape &shape(void) const override { return _shape; };
-
-  float at(uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) const override
-  {
-    return _value.at(nth * _shape.C * _shape.H * _shape.W + ch * _shape.H * _shape.W +
-                     row * _shape.W + col);
-  }
-
-private:
-  kernel::Shape _shape;
-  std::vector<float> _value;
-};
-
-int main(int argc, char **argv)
-{
-  const SampleFeatureObject ifm;
-  const SampleKernelObject kernel;
-  const SampleBiasObject bias;
-
-  const int32_t IFM_C = ifm.shape().C;
-  const int32_t IFM_H = ifm.shape().H;
-  const int32_t IFM_W = ifm.shape().W;
-
-  const int32_t KER_N = kernel.shape().N;
-  const int32_t KER_C = kernel.shape().C;
-  const int32_t KER_H = kernel.shape().H;
-  const int32_t KER_W = kernel.shape().W;
-
-  const int32_t OFM_C = kernel.shape().N;
-  const int32_t OFM_H = (IFM_H - KER_H) + 1;
-  const int32_t OFM_W = (IFM_W - KER_W) + 1;
-
-  // Assumption on this example
-  assert(IFM_C == KER_C);
-  assert(KER_N == bias.size());
-
-  // Comment from 'context.h'
-  //
-  // Parameters for asymmetric quantization. Quantized values can be converted
-  // back to float using:
-  //    real_value = scale * (quantized_value - zero_point);
-  //
-  // Q: Is this necessary?
-  TfLiteQuantizationParams quantization;
-
-  quantization.scale = 1;
-  quantization.zero_point = 0;
-
-  Interpreter interp;
-
-  // On AddTensors(N) call, T/F Lite interpreter creates N tensors whose index is [0 ~ N)
-  interp.AddTensors(5);
-
-  // Configure OFM
-  interp.SetTensorParametersReadWrite(0, kTfLiteFloat32 /* type */, "output" /* name */,
-                                      {1 /*N*/, OFM_H, OFM_W, OFM_C} /* dims */, quantization);
-
-  // Configure IFM
-  interp.SetTensorParametersReadWrite(1, kTfLiteFloat32 /* type */, "input" /* name */,
-                                      {1 /*N*/, IFM_H, IFM_W, IFM_C} /* dims */, quantization);
-
-  // Configure Filter
-  const uint32_t kernel_size = KER_N * KER_C * KER_H * KER_W;
-  float kernel_data[kernel_size] = {
-      0.0f,
-  };
-
-  // Fill kernel data in NHWC order
-  {
-    uint32_t off = 0;
-
-    for (uint32_t nth = 0; nth < KER_N; ++nth)
-    {
-      for (uint32_t row = 0; row < KER_H; ++row)
-      {
-        for (uint32_t col = 0; col < KER_W; ++col)
-        {
-          for (uint32_t ch = 0; ch < KER_C; ++ch)
-          {
-            const auto value = kernel.at(nth, ch, row, col);
-            kernel_data[off++] = value;
-          }
-        }
-      }
-    }
-
-    assert(kernel_size == off);
-  }
-
-  interp.SetTensorParametersReadOnly(
-      2, kTfLiteFloat32 /* type */, "filter" /* name */, {KER_N, KER_H, KER_W, KER_C} /* dims */,
-      quantization, reinterpret_cast<const char *>(kernel_data), sizeof(kernel_data));
-
-  // Configure Bias
-  const uint32_t bias_size = bias.size();
-  float bias_data[bias_size] = {
-      0.0f,
-  };
-
-  // Fill bias data
-  for (uint32_t off = 0; off < bias.size(); ++off)
-  {
-    bias_data[off] = bias.at(off);
-  }
-
-  interp.SetTensorParametersReadOnly(3, kTfLiteFloat32 /* type */, "bias" /* name */,
-                                     {bias.size()} /* dims */, quantization,
-                                     reinterpret_cast<const char *>(bias_data), sizeof(bias_data));
-
-  // Add Convolution Node
-  //
-  // NOTE AddNodeWithParameters take the ownership of param, and deallocate it with free
-  //      So, param should be allocated with malloc
-  TfLiteConvParams *param = reinterpret_cast<TfLiteConvParams *>(malloc(sizeof(TfLiteConvParams)));
-
-  param->padding = kTfLitePaddingValid;
-  param->stride_width = 1;
-  param->stride_height = 1;
-  param->activation = kTfLiteActRelu;
-
-  // Run Convolution and store its result into Tensor #0
-  //  - Read IFM from Tensor #1
-  //  - Read Filter from Tensor #2,
-  //  - Read Bias from Tensor #3
-  interp.AddNodeWithParameters({1, 2, 3}, {0}, nullptr, 0, reinterpret_cast<void *>(param),
-                               BuiltinOpResolver().FindOp(BuiltinOperator_CONV_2D, 1));
-
-  // Set Tensor #1 as Input #0, and Tensor #0 as Output #0
-  interp.SetInputs({1});
-  interp.SetOutputs({0});
-
-  // Let's use NNAPI (if possible)
-  interp.UseNNAPI(true);
-
-  // Allocate Tensor
-  interp.AllocateTensors();
-
-  // Fill IFM data in HWC order
-  {
-    uint32_t off = 0;
-
-    for (uint32_t row = 0; row < ifm.shape().H; ++row)
-    {
-      for (uint32_t col = 0; col < ifm.shape().W; ++col)
-      {
-        for (uint32_t ch = 0; ch < ifm.shape().C; ++ch)
-        {
-          const auto value = ifm.at(ch, row, col);
-          interp.typed_input_tensor<float>(0)[off++] = value;
-        }
-      }
-    }
-  }
-
-  // Let's Rock-n-Roll!
-  interp.Invoke();
-
-  // Print OFM
-  {
-    uint32_t off = 0;
-
-    for (uint32_t row = 0; row < OFM_H; ++row)
-    {
-      for (uint32_t col = 0; col < OFM_W; ++col)
-      {
-        for (uint32_t ch = 0; ch < kernel.shape().N; ++ch)
-        {
-          std::cout << interp.typed_output_tensor<float>(0)[off++] << std::endl;
-        }
-      }
-    }
-  }
-
-  return 0;
-}
diff --git a/contrib/tflite_classify/CMakeLists.txt b/contrib/tflite_classify/CMakeLists.txt
deleted file mode 100644
index 3ae4adcc7..000000000
--- a/contrib/tflite_classify/CMakeLists.txt
+++ /dev/null
@@ -1,22 +0,0 @@
-if(NOT BUILD_TFLITE_CLASSIFY_APP)
-  return()
-endif(NOT BUILD_TFLITE_CLASSIFY_APP)
-
-list(APPEND SOURCES "src/tflite_classify.cc")
-list(APPEND SOURCES "src/ImageClassifier.cc")
-list(APPEND SOURCES "src/InferenceInterface.cc")
-
-## Required package
-find_package(OpenCV REQUIRED)
-find_package(Boost REQUIRED COMPONENTS system filesystem)
-
-# Without this line, this appliation couldn't search the opencv library that were already installed in ${ROOTFS_ARM}/usr/lib/arm-linux-gnueabihf directory
-set(CMAKE_EXE_LINKER_FLAGS "-Wl,--as-needed -Wl,--rpath=${ROOTFS_ARM}/usr/lib/arm-linux-gnueabihf -Wl,--rpath=${ROOTFS_ARM}/lib/arm-linux-gnueabihf")
-
-add_executable(tflite_classify ${SOURCES})
-target_include_directories(tflite_classify PRIVATE src)
-target_link_libraries(tflite_classify tensorflow-lite ${LIB_PTHREAD} dl nnfw_lib_tflite)
-target_link_libraries(tflite_classify ${Boost_LIBRARIES})
-target_link_libraries(tflite_classify ${OpenCV_LIBRARIES})
-
-install(TARGETS tflite_classify DESTINATION bin)
diff --git a/contrib/tflite_classify/src/InferenceInterface.h b/contrib/tflite_classify/src/InferenceInterface.h
deleted file mode 100644
index 06ebb3dad..000000000
--- a/contrib/tflite_classify/src/InferenceInterface.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file     InferenceInterface.h
- * @brief    This file contains class for running the actual inference model
- * @ingroup  COM_AI_RUNTIME
- */
-
-#ifndef __TFLITE_CLASSIFY_INFERENCE_INTERFACE_H__
-#define __TFLITE_CLASSIFY_INFERENCE_INTERFACE_H__
-
-#include "tflite/ext/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-
-#include "tflite/InterpreterSession.h"
-#include "tflite/NNAPISession.h"
-
-#include <iostream>
-#include <string>
-
-/**
- * @brief Class to define a inference interface for recognizing data
- */
-class InferenceInterface
-{
-public:
-  /**
-   * @brief Construct a new InferenceInterface object with parameters
-   * @param[in] model_file  The filepath of the model FlatBuffer protocol buffer
-   * @param[in] use_nnapi   The flag to distinguish between TfLite interpreter and NNFW runtime
-   */
-  InferenceInterface(const std::string &model_file, const bool use_nnapi);
-
-  /**
-   * @brief Destructor an InferenceInterface object
-   */
-  ~InferenceInterface();
-
-  /**
-   * @brief Copy the input data into model
-   * @param[in] input_name  The label of the image input node
-   * @param[in] data        The actual data to be copied into input tensor
-   * @param[in] batch       The number of batch size
-   * @param[in] height      The number of height size
-   * @param[in] width       The number of width size
-   * @param[in] channel     The number of channel size
-   * @return N/A
-   */
-  void feed(const std::string &input_name, const std::vector<float> &data, const int batch,
-            const int height, const int width, const int channel);
-  /**
-   * @brief Run the inference call
-   * @param[in] output_name The label of the output node
-   * @return N/A
-   */
-  void run(const std::string &output_name);
-
-  /**
-   * @brief Copy the output tensor back into the output array
-   * @param[in] output_node The label of the output node
-   * @param[in] outputs     The output data array
-   * @return N/A
-   */
-  void fetch(const std::string &output_name, std::vector<float> &outputs);
-
-  /**
-   * @brief Get tensor size
-   * @param[in] name  The label of the node
-   * @result The size of tensor
-   */
-  int getTensorSize(const std::string &name);
-
-private:
-  std::unique_ptr<tflite::Interpreter> _interpreter;
-  std::unique_ptr<tflite::FlatBufferModel> _model;
-  std::shared_ptr<nnfw::tflite::Session> _sess;
-};
-
-#endif // __TFLITE_CLASSIFY_INFERENCE_INTERFACE_H__
diff --git a/contrib/tflite_test/tflite_test.cpp b/contrib/tflite_test/tflite_test.cpp
deleted file mode 100644
index 4ee9e5a8d..000000000
--- a/contrib/tflite_test/tflite_test.cpp
+++ /dev/null
@@ -1,236 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <tensorflow/contrib/lite/model.h>
-#include <tensorflow/core/public/session.h>
-
-#include "tflite/Assert.h"
-#include "tflite/Session.h"
-#include "tflite/InterpreterSession.h"
-#include "tflite/NNAPISession.h"
-#include "tflite/ext/kernels/register.h"
-
-#include "misc/fp32.h"
-
-#include <iostream>
-
-#include <string>
-#include <vector>
-
-#define TF_ENSURE(e) {                            \
-  if(!(e).ok())                                   \
-  {                                               \
-    throw std::runtime_error{"'" #e "' FAILED"};  \
-  }                                               \
-}
-
-using namespace tflite;
-using namespace tflite::ops::builtin;
-
-std::unique_ptr<FlatBufferModel> BuildModelFromFile(const std::string &path)
-{
-  static StderrReporter reporter;
-  return FlatBufferModel::BuildFromFile(path.c_str(), &reporter);
-}
-
-std::unique_ptr<Interpreter> BuildInterpFromModel(const std::unique_ptr<FlatBufferModel> &model)
-{
-  std::unique_ptr<Interpreter> interp;
-
-  BuiltinOpResolver resolver;
-  InterpreterBuilder builder(*model, resolver);
-
-  TFLITE_ENSURE(builder(&interp));
-
-  return std::move(interp);
-}
-
-tensorflow::TensorShape asTensorflowShape(const TfLiteTensor *tensor)
-{
-  tensorflow::TensorShape shape;
-
-  const int rank = tensor->dims->size;
-
-  for (int axis = 0; axis < rank; ++axis)
-  {
-    shape.AddDim(tensor->dims->data[axis]);
-  }
-
-  return shape;
-}
-
-uint32_t count_elements(const TfLiteTensor *tensor)
-{
-  const int rank = tensor->dims->size;
-
-  if (rank == 0)
-  {
-    return 0;
-  }
-
-  uint32_t res = 1;
-
-  for (int axis = 0; axis < rank; ++axis)
-  {
-    res *= tensor->dims->data[axis];
-  }
-
-  return res;
-}
-
-int main(int argc, char **argv)
-{
-  bool use_nnapi = false;
-
-  if (std::getenv("USE_NNAPI") != nullptr)
-  {
-    use_nnapi = true;
-  }
-
-  if (argc < 3)
-  {
-    std::cerr << "USAGE: " << argv[0] << " [T/F lite model] [T/F model]" << std::endl;
-    return 255;
-  }
-
-  //
-  // Prepare Tensorflow Lite session
-  //
-  const std::string lite_model_path{argv[1]};
-
-  auto lite_model = BuildModelFromFile(lite_model_path);
-  auto lite_interp = BuildInterpFromModel(lite_model);
-
-  std::shared_ptr<nnfw::tflite::Session> lite_sess;
-
-  if (use_nnapi)
-  {
-    lite_sess = std::make_shared<nnfw::tflite::NNAPISession>(lite_interp.get());
-  }
-  else
-  {
-    lite_sess = std::make_shared<nnfw::tflite::InterpreterSession>(lite_interp.get());
-  }
-
-  //
-  // Prepare Tensorflow session
-  //
-  const std::string full_model_path{argv[2]};
-
-  tensorflow::Session* full_sess;
-  tensorflow::GraphDef full_model;
-
-  TF_ENSURE(tensorflow::NewSession(tensorflow::SessionOptions(), &full_sess));
-  TF_ENSURE(ReadBinaryProto(tensorflow::Env::Default(), full_model_path, &full_model));
-  TF_ENSURE(full_sess->Create(full_model));
-
-  //
-  //
-  //
-  std::vector<tensorflow::Tensor> input_nodes;
-  std::vector<std::string> input_names;
-
-  for (uint32_t n = 0; n < lite_interp->inputs().size(); ++n)
-  {
-    const TfLiteTensor *tensor = lite_interp->tensor(lite_interp->inputs().at(n));
-
-    input_nodes.emplace_back(tensorflow::DT_FLOAT, asTensorflowShape(tensor));
-    input_names.emplace_back(tensor->name);
-  }
-
-  assert(input_nodes.size() == input_names.size());
-  assert(input_nodes.size() == lite_interp->inputs().size());
-
-  std::vector<std::string> output_names;
-  std::vector<tensorflow::Tensor> output_nodes;
-
-  for (uint32_t n = 0; n < lite_interp->outputs().size(); ++n)
-  {
-    const TfLiteTensor *tensor = lite_interp->tensor(lite_interp->outputs().at(n));
-
-    output_names.emplace_back(tensor->name);
-  }
-
-  assert(output_names.size() == lite_interp->outputs().size());
-  // output_nodes will be initialized after Tensorflow Session run
-  assert(output_nodes.size() == 0);
-
-  //
-  // Prepare inference
-  //
-  lite_sess->prepare();
-
-  // TODO Feed Inputs (for both Tensorflow and Tensorflow Lite)
-  std::vector<std::pair<std::string, tensorflow::Tensor>> inputs;
-
-  for (uint32_t n = 0; n < input_nodes.size(); ++n)
-  {
-    inputs.emplace_back(input_names.at(0), input_nodes.at(0));
-  }
-
-  //
-  // Run inference
-  //
-  TF_ENSURE(full_sess->Run(inputs, output_names, {}, &output_nodes));
-
-  lite_sess->run();
-
-  //
-  // Compare Output
-  //
-  auto equals = [] (float lhs, float rhs) {
-    // TODO Allow users to set tolerance
-    if (nnfw::misc::fp32::absolute_epsilon_equal(lhs, rhs))
-    {
-      return true;
-    }
-
-    return nnfw::misc::fp32::epsilon_equal(lhs, rhs);
-  };
-
-  const uint32_t output_count = output_names.size();
-
-  bool matched = true;
-
-  for (uint32_t n = 0; n < output_count; ++n)
-  {
-    const TfLiteTensor *tensor = lite_interp->tensor(lite_interp->outputs().at(n));
-
-    // TODO Compare shape
-
-    const auto element_count = count_elements(tensor);
-
-    std::cout << "Compare output #" << n << "(" << tensor->name << ", " << element_count << " elements)" << std::endl;
-    for (uint32_t index = 0; index < element_count; ++index)
-    {
-      const auto full_value = output_nodes.at(n).flat<float>().data()[index];
-      const auto lite_value = lite_sess->interp()->typed_output_tensor<float>(n)[index];
-
-      if (!equals(full_value, lite_value))
-      {
-        std::cerr << full_value << " is expected, but " << lite_value << " is obtaeind (at " << n << ":" << index << ")" << std::endl;
-        matched = false;
-      }
-    }
-  }
-
-  //
-  // Cleanup
-  //
-  lite_sess->teardown();
-
-  return matched ? 0 : 255;
-}
diff --git a/docs/HowToContribute.md b/docs/HowToContribute.md
index e62666998..c6f89c3cf 100644
--- a/docs/HowToContribute.md
+++ b/docs/HowToContribute.md
@@ -19,8 +19,8 @@ This section explains the steps to create a pull request (PR).
 
 1. Create an issue
 
-   Maintainers will accept your contribution only when it is well aligned with the [roadmap and
-   design principles](./roadmap.md) of _nnfw_. So, it is optional, but recommended for contributors
+   Maintainers will accept your contribution only when it is well aligned with the roadmap and
+   design principles of [_nnfw_](./nnfw/roadmap.md) and [_nncc_](./nncc/roadmap.md). So, it is optional, but recommended for contributors
    to create an issue and have a discussion with maintainers before writing code.
 
 1. Create a draft PR
@@ -53,10 +53,16 @@ This section explains the steps to create a pull request (PR).
 
 1. Request review
 
-   Please assign reviewers if you need review from them. Maintainers will honor your review request,
-   and accept your pull request only when all the reviewer approve your pull request. Note that this
-   does **NOT** mean that you should assign reviewers. Maintainers (or reviewers) will review your
-   pull request even without explicit review request.
+   It is recommended to assign reviewers yourself. Maintainers will honor your review request,
+   and accept your pull request only when
+
+   - Approved by 1+ reviewers
+   - 0 rejection(Request Changes)
+   - 0 pending review request
+   - All the reviewers in the list must approve your pull request
+
+   You can add/remove pending review requests in the middle of the review process. Maintainers
+   (or reviewers) could review your pull request even without explicit review request.
 
 1. Update per feedback
 
@@ -64,9 +70,3 @@ This section explains the steps to create a pull request (PR).
    your pull request upon such feedbacks. These update commits will be squashed into the first
    commit of your pull request later. Please do **NOT** include a sign-off message or write a full
    description for update commits.
-
-
-# Note
-
-This document is originated from the [contribution guide in
-nncc](https://github.sec.samsung.net/STAR/nncc/blob/master/doc/contribution_guide.md).
diff --git a/docs/doxygen/Doxyfile b/docs/doxygen/Doxyfile
deleted file mode 100644
index 632282770..000000000
--- a/docs/doxygen/Doxyfile
+++ /dev/null
@@ -1,2500 +0,0 @@
-# Doxyfile 1.8.13
-
-# This file describes the settings to be used by the documentation system
-# doxygen (www.doxygen.org) for a project.
-#
-# All text after a double hash (##) is considered a comment and is placed in
-# front of the TAG it is preceding.
-#
-# All text after a single hash (#) is considered a comment and will be ignored.
-# The format is:
-# TAG = value [value, ...]
-# For lists, items can also be appended using:
-# TAG += value [value, ...]
-# Values that contain spaces should be placed between quotes (\" \").
-
-#---------------------------------------------------------------------------
-# Project related configuration options
-#---------------------------------------------------------------------------
-
-# This tag specifies the encoding used for all characters in the config file
-# that follow. The default is UTF-8 which is also the encoding used for all text
-# before the first occurrence of this tag. Doxygen uses libiconv (or the iconv
-# built into libc) for the transcoding. See http://www.gnu.org/software/libiconv
-# for the list of possible encodings.
-# The default value is: UTF-8.
-
-DOXYFILE_ENCODING      = UTF-8
-
-# The PROJECT_NAME tag is a single word (or a sequence of words surrounded by
-# double-quotes, unless you are using Doxywizard) that should identify the
-# project for which the documentation is generated. This name is used in the
-# title of most generated pages and in a few other places.
-# The default value is: My Project.
-
-PROJECT_NAME           = nnfw
-
-# The PROJECT_NUMBER tag can be used to enter a project or revision number. This
-# could be handy for archiving the generated documentation or if some version
-# control system is used.
-
-PROJECT_NUMBER         = 
-
-# Using the PROJECT_BRIEF tag one can provide an optional one line description
-# for a project that appears at the top of each page and should give viewer a
-# quick idea about the purpose of the project. Keep the description short.
-
-PROJECT_BRIEF          = 
-
-# With the PROJECT_LOGO tag one can specify a logo or an icon that is included
-# in the documentation. The maximum height of the logo should not exceed 55
-# pixels and the maximum width should not exceed 200 pixels. Doxygen will copy
-# the logo to the output directory.
-
-PROJECT_LOGO           = 
-
-# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) path
-# into which the generated documentation will be written. If a relative path is
-# entered, it will be relative to the location where doxygen was started. If
-# left blank the current directory will be used.
-
-OUTPUT_DIRECTORY       = 
-
-# If the CREATE_SUBDIRS tag is set to YES then doxygen will create 4096 sub-
-# directories (in 2 levels) under the output directory of each output format and
-# will distribute the generated files over these directories. Enabling this
-# option can be useful when feeding doxygen a huge amount of source files, where
-# putting all generated files in the same directory would otherwise causes
-# performance problems for the file system.
-# The default value is: NO.
-
-CREATE_SUBDIRS         = NO
-
-# If the ALLOW_UNICODE_NAMES tag is set to YES, doxygen will allow non-ASCII
-# characters to appear in the names of generated files. If set to NO, non-ASCII
-# characters will be escaped, for example _xE3_x81_x84 will be used for Unicode
-# U+3044.
-# The default value is: NO.
-
-ALLOW_UNICODE_NAMES    = NO
-
-# The OUTPUT_LANGUAGE tag is used to specify the language in which all
-# documentation generated by doxygen is written. Doxygen will use this
-# information to generate all constant output in the proper language.
-# Possible values are: Afrikaans, Arabic, Armenian, Brazilian, Catalan, Chinese,
-# Chinese-Traditional, Croatian, Czech, Danish, Dutch, English (United States),
-# Esperanto, Farsi (Persian), Finnish, French, German, Greek, Hungarian,
-# Indonesian, Italian, Japanese, Japanese-en (Japanese with English messages),
-# Korean, Korean-en (Korean with English messages), Latvian, Lithuanian,
-# Macedonian, Norwegian, Persian (Farsi), Polish, Portuguese, Romanian, Russian,
-# Serbian, Serbian-Cyrillic, Slovak, Slovene, Spanish, Swedish, Turkish,
-# Ukrainian and Vietnamese.
-# The default value is: English.
-
-OUTPUT_LANGUAGE        = English
-
-# If the BRIEF_MEMBER_DESC tag is set to YES, doxygen will include brief member
-# descriptions after the members that are listed in the file and class
-# documentation (similar to Javadoc). Set to NO to disable this.
-# The default value is: YES.
-
-BRIEF_MEMBER_DESC      = YES
-
-# If the REPEAT_BRIEF tag is set to YES, doxygen will prepend the brief
-# description of a member or function before the detailed description
-#
-# Note: If both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the
-# brief descriptions will be completely suppressed.
-# The default value is: YES.
-
-REPEAT_BRIEF           = YES
-
-# This tag implements a quasi-intelligent brief description abbreviator that is
-# used to form the text in various listings. Each string in this list, if found
-# as the leading text of the brief description, will be stripped from the text
-# and the result, after processing the whole list, is used as the annotated
-# text. Otherwise, the brief description is used as-is. If left blank, the
-# following values are used ($name is automatically replaced with the name of
-# the entity):The $name class, The $name widget, The $name file, is, provides,
-# specifies, contains, represents, a, an and the.
-
-ABBREVIATE_BRIEF       = "The $name class" \
-                         "The $name widget" \
-                         "The $name file" \
-                         is \
-                         provides \
-                         specifies \
-                         contains \
-                         represents \
-                         a \
-                         an \
-                         the
-
-# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then
-# doxygen will generate a detailed section even if there is only a brief
-# description.
-# The default value is: NO.
-
-ALWAYS_DETAILED_SEC    = NO
-
-# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all
-# inherited members of a class in the documentation of that class as if those
-# members were ordinary class members. Constructors, destructors and assignment
-# operators of the base classes will not be shown.
-# The default value is: NO.
-
-INLINE_INHERITED_MEMB  = NO
-
-# If the FULL_PATH_NAMES tag is set to YES, doxygen will prepend the full path
-# before files name in the file list and in the header files. If set to NO the
-# shortest path that makes the file name unique will be used
-# The default value is: YES.
-
-FULL_PATH_NAMES        = YES
-
-# The STRIP_FROM_PATH tag can be used to strip a user-defined part of the path.
-# Stripping is only done if one of the specified strings matches the left-hand
-# part of the path. The tag can be used to show relative paths in the file list.
-# If left blank the directory from which doxygen is run is used as the path to
-# strip.
-#
-# Note that you can specify absolute paths here, but also relative paths, which
-# will be relative from the directory where doxygen is started.
-# This tag requires that the tag FULL_PATH_NAMES is set to YES.
-
-STRIP_FROM_PATH        = ../../../nnfw 
-
-# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of the
-# path mentioned in the documentation of a class, which tells the reader which
-# header file to include in order to use a class. If left blank only the name of
-# the header file containing the class definition is used. Otherwise one should
-# specify the list of include paths that are normally passed to the compiler
-# using the -I flag.
-
-STRIP_FROM_INC_PATH    = 
-
-# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter (but
-# less readable) file names. This can be useful is your file systems doesn't
-# support long names like on DOS, Mac, or CD-ROM.
-# The default value is: NO.
-
-SHORT_NAMES            = NO
-
-# If the JAVADOC_AUTOBRIEF tag is set to YES then doxygen will interpret the
-# first line (until the first dot) of a Javadoc-style comment as the brief
-# description. If set to NO, the Javadoc-style will behave just like regular Qt-
-# style comments (thus requiring an explicit @brief command for a brief
-# description.)
-# The default value is: NO.
-
-JAVADOC_AUTOBRIEF      = NO
-
-# If the QT_AUTOBRIEF tag is set to YES then doxygen will interpret the first
-# line (until the first dot) of a Qt-style comment as the brief description. If
-# set to NO, the Qt-style will behave just like regular Qt-style comments (thus
-# requiring an explicit \brief command for a brief description.)
-# The default value is: NO.
-
-QT_AUTOBRIEF           = NO
-
-# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make doxygen treat a
-# multi-line C++ special comment block (i.e. a block of //! or /// comments) as
-# a brief description. This used to be the default behavior. The new default is
-# to treat a multi-line C++ comment block as a detailed description. Set this
-# tag to YES if you prefer the old behavior instead.
-#
-# Note that setting this tag to YES also means that rational rose comments are
-# not recognized any more.
-# The default value is: NO.
-
-MULTILINE_CPP_IS_BRIEF = NO
-
-# If the INHERIT_DOCS tag is set to YES then an undocumented member inherits the
-# documentation from any documented member that it re-implements.
-# The default value is: YES.
-
-INHERIT_DOCS           = YES
-
-# If the SEPARATE_MEMBER_PAGES tag is set to YES then doxygen will produce a new
-# page for each member. If set to NO, the documentation of a member will be part
-# of the file/class/namespace that contains it.
-# The default value is: NO.
-
-SEPARATE_MEMBER_PAGES  = NO
-
-# The TAB_SIZE tag can be used to set the number of spaces in a tab. Doxygen
-# uses this value to replace tabs by spaces in code fragments.
-# Minimum value: 1, maximum value: 16, default value: 4.
-
-TAB_SIZE               = 4
-
-# This tag can be used to specify a number of aliases that act as commands in
-# the documentation. An alias has the form:
-# name=value
-# For example adding
-# "sideeffect=@par Side Effects:\n"
-# will allow you to put the command \sideeffect (or @sideeffect) in the
-# documentation, which will result in a user-defined paragraph with heading
-# "Side Effects:". You can put \n's in the value part of an alias to insert
-# newlines.
-
-ALIASES                = 
-
-# This tag can be used to specify a number of word-keyword mappings (TCL only).
-# A mapping has the form "name=value". For example adding "class=itcl::class"
-# will allow you to use the command class in the itcl::class meaning.
-
-TCL_SUBST              = 
-
-# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources
-# only. Doxygen will then generate output that is more tailored for C. For
-# instance, some of the names that are used will be different. The list of all
-# members will be omitted, etc.
-# The default value is: NO.
-
-OPTIMIZE_OUTPUT_FOR_C  = NO
-
-# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java or
-# Python sources only. Doxygen will then generate output that is more tailored
-# for that language. For instance, namespaces will be presented as packages,
-# qualified scopes will look different, etc.
-# The default value is: NO.
-
-OPTIMIZE_OUTPUT_JAVA   = NO
-
-# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran
-# sources. Doxygen will then generate output that is tailored for Fortran.
-# The default value is: NO.
-
-OPTIMIZE_FOR_FORTRAN   = NO
-
-# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL
-# sources. Doxygen will then generate output that is tailored for VHDL.
-# The default value is: NO.
-
-OPTIMIZE_OUTPUT_VHDL   = NO
-
-# Doxygen selects the parser to use depending on the extension of the files it
-# parses. With this tag you can assign which parser to use for a given
-# extension. Doxygen has a built-in mapping, but you can override or extend it
-# using this tag. The format is ext=language, where ext is a file extension, and
-# language is one of the parsers supported by doxygen: IDL, Java, Javascript,
-# C#, C, C++, D, PHP, Objective-C, Python, Fortran (fixed format Fortran:
-# FortranFixed, free formatted Fortran: FortranFree, unknown formatted Fortran:
-# Fortran. In the later case the parser tries to guess whether the code is fixed
-# or free formatted code, this is the default for Fortran type files), VHDL. For
-# instance to make doxygen treat .inc files as Fortran files (default is PHP),
-# and .f files as C (default is Fortran), use: inc=Fortran f=C.
-#
-# Note: For files without extension you can use no_extension as a placeholder.
-#
-# Note that for custom extensions you also need to set FILE_PATTERNS otherwise
-# the files are not read by doxygen.
-
-EXTENSION_MAPPING      = 
-
-# If the MARKDOWN_SUPPORT tag is enabled then doxygen pre-processes all comments
-# according to the Markdown format, which allows for more readable
-# documentation. See http://daringfireball.net/projects/markdown/ for details.
-# The output of markdown processing is further processed by doxygen, so you can
-# mix doxygen, HTML, and XML commands with Markdown formatting. Disable only in
-# case of backward compatibilities issues.
-# The default value is: YES.
-
-MARKDOWN_SUPPORT       = YES
-
-# When the TOC_INCLUDE_HEADINGS tag is set to a non-zero value, all headings up
-# to that level are automatically included in the table of contents, even if
-# they do not have an id attribute.
-# Note: This feature currently applies only to Markdown headings.
-# Minimum value: 0, maximum value: 99, default value: 0.
-# This tag requires that the tag MARKDOWN_SUPPORT is set to YES.
-
-TOC_INCLUDE_HEADINGS   = 0
-
-# When enabled doxygen tries to link words that correspond to documented
-# classes, or namespaces to their corresponding documentation. Such a link can
-# be prevented in individual cases by putting a % sign in front of the word or
-# globally by setting AUTOLINK_SUPPORT to NO.
-# The default value is: YES.
-
-AUTOLINK_SUPPORT       = YES
-
-# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want
-# to include (a tag file for) the STL sources as input, then you should set this
-# tag to YES in order to let doxygen match functions declarations and
-# definitions whose arguments contain STL classes (e.g. func(std::string);
-# versus func(std::string) {}). This also make the inheritance and collaboration
-# diagrams that involve STL classes more complete and accurate.
-# The default value is: NO.
-
-BUILTIN_STL_SUPPORT    = NO
-
-# If you use Microsoft's C++/CLI language, you should set this option to YES to
-# enable parsing support.
-# The default value is: NO.
-
-CPP_CLI_SUPPORT        = NO
-
-# Set the SIP_SUPPORT tag to YES if your project consists of sip (see:
-# http://www.riverbankcomputing.co.uk/software/sip/intro) sources only. Doxygen
-# will parse them like normal C++ but will assume all classes use public instead
-# of private inheritance when no explicit protection keyword is present.
-# The default value is: NO.
-
-SIP_SUPPORT            = NO
-
-# For Microsoft's IDL there are propget and propput attributes to indicate
-# getter and setter methods for a property. Setting this option to YES will make
-# doxygen to replace the get and set methods by a property in the documentation.
-# This will only work if the methods are indeed getting or setting a simple
-# type. If this is not the case, or you want to show the methods anyway, you
-# should set this option to NO.
-# The default value is: YES.
-
-IDL_PROPERTY_SUPPORT   = YES
-
-# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC
-# tag is set to YES then doxygen will reuse the documentation of the first
-# member in the group (if any) for the other members of the group. By default
-# all members of a group must be documented explicitly.
-# The default value is: NO.
-
-DISTRIBUTE_GROUP_DOC   = NO
-
-# If one adds a struct or class to a group and this option is enabled, then also
-# any nested class or struct is added to the same group. By default this option
-# is disabled and one has to add nested compounds explicitly via \ingroup.
-# The default value is: NO.
-
-GROUP_NESTED_COMPOUNDS = NO
-
-# Set the SUBGROUPING tag to YES to allow class member groups of the same type
-# (for instance a group of public functions) to be put as a subgroup of that
-# type (e.g. under the Public Functions section). Set it to NO to prevent
-# subgrouping. Alternatively, this can be done per class using the
-# \nosubgrouping command.
-# The default value is: YES.
-
-SUBGROUPING            = YES
-
-# When the INLINE_GROUPED_CLASSES tag is set to YES, classes, structs and unions
-# are shown inside the group in which they are included (e.g. using \ingroup)
-# instead of on a separate page (for HTML and Man pages) or section (for LaTeX
-# and RTF).
-#
-# Note that this feature does not work in combination with
-# SEPARATE_MEMBER_PAGES.
-# The default value is: NO.
-
-INLINE_GROUPED_CLASSES = NO
-
-# When the INLINE_SIMPLE_STRUCTS tag is set to YES, structs, classes, and unions
-# with only public data fields or simple typedef fields will be shown inline in
-# the documentation of the scope in which they are defined (i.e. file,
-# namespace, or group documentation), provided this scope is documented. If set
-# to NO, structs, classes, and unions are shown on a separate page (for HTML and
-# Man pages) or section (for LaTeX and RTF).
-# The default value is: NO.
-
-INLINE_SIMPLE_STRUCTS  = NO
-
-# When TYPEDEF_HIDES_STRUCT tag is enabled, a typedef of a struct, union, or
-# enum is documented as struct, union, or enum with the name of the typedef. So
-# typedef struct TypeS {} TypeT, will appear in the documentation as a struct
-# with name TypeT. When disabled the typedef will appear as a member of a file,
-# namespace, or class. And the struct will be named TypeS. This can typically be
-# useful for C code in case the coding convention dictates that all compound
-# types are typedef'ed and only the typedef is referenced, never the tag name.
-# The default value is: NO.
-
-TYPEDEF_HIDES_STRUCT   = NO
-
-# The size of the symbol lookup cache can be set using LOOKUP_CACHE_SIZE. This
-# cache is used to resolve symbols given their name and scope. Since this can be
-# an expensive process and often the same symbol appears multiple times in the
-# code, doxygen keeps a cache of pre-resolved symbols. If the cache is too small
-# doxygen will become slower. If the cache is too large, memory is wasted. The
-# cache size is given by this formula: 2^(16+LOOKUP_CACHE_SIZE). The valid range
-# is 0..9, the default is 0, corresponding to a cache size of 2^16=65536
-# symbols. At the end of a run doxygen will report the cache usage and suggest
-# the optimal cache size from a speed point of view.
-# Minimum value: 0, maximum value: 9, default value: 0.
-
-LOOKUP_CACHE_SIZE      = 2
-
-#---------------------------------------------------------------------------
-# Build related configuration options
-#---------------------------------------------------------------------------
-
-# If the EXTRACT_ALL tag is set to YES, doxygen will assume all entities in
-# documentation are documented, even if no documentation was available. Private
-# class members and static file members will be hidden unless the
-# EXTRACT_PRIVATE respectively EXTRACT_STATIC tags are set to YES.
-# Note: This will also disable the warnings about undocumented members that are
-# normally produced when WARNINGS is set to YES.
-# The default value is: NO.
-
-EXTRACT_ALL            = YES
-
-# If the EXTRACT_PRIVATE tag is set to YES, all private members of a class will
-# be included in the documentation.
-# The default value is: NO.
-
-EXTRACT_PRIVATE        = NO
-
-# If the EXTRACT_PACKAGE tag is set to YES, all members with package or internal
-# scope will be included in the documentation.
-# The default value is: NO.
-
-EXTRACT_PACKAGE        = NO
-
-# If the EXTRACT_STATIC tag is set to YES, all static members of a file will be
-# included in the documentation.
-# The default value is: NO.
-
-EXTRACT_STATIC         = NO
-
-# If the EXTRACT_LOCAL_CLASSES tag is set to YES, classes (and structs) defined
-# locally in source files will be included in the documentation. If set to NO,
-# only classes defined in header files are included. Does not have any effect
-# for Java sources.
-# The default value is: YES.
-
-EXTRACT_LOCAL_CLASSES  = YES
-
-# This flag is only useful for Objective-C code. If set to YES, local methods,
-# which are defined in the implementation section but not in the interface are
-# included in the documentation. If set to NO, only methods in the interface are
-# included.
-# The default value is: NO.
-
-EXTRACT_LOCAL_METHODS  = NO
-
-# If this flag is set to YES, the members of anonymous namespaces will be
-# extracted and appear in the documentation as a namespace called
-# 'anonymous_namespace{file}', where file will be replaced with the base name of
-# the file that contains the anonymous namespace. By default anonymous namespace
-# are hidden.
-# The default value is: NO.
-
-EXTRACT_ANON_NSPACES   = NO
-
-# If the HIDE_UNDOC_MEMBERS tag is set to YES, doxygen will hide all
-# undocumented members inside documented classes or files. If set to NO these
-# members will be included in the various overviews, but no documentation
-# section is generated. This option has no effect if EXTRACT_ALL is enabled.
-# The default value is: NO.
-
-HIDE_UNDOC_MEMBERS     = NO
-
-# If the HIDE_UNDOC_CLASSES tag is set to YES, doxygen will hide all
-# undocumented classes that are normally visible in the class hierarchy. If set
-# to NO, these classes will be included in the various overviews. This option
-# has no effect if EXTRACT_ALL is enabled.
-# The default value is: NO.
-
-HIDE_UNDOC_CLASSES     = NO
-
-# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, doxygen will hide all friend
-# (class|struct|union) declarations. If set to NO, these declarations will be
-# included in the documentation.
-# The default value is: NO.
-
-HIDE_FRIEND_COMPOUNDS  = NO
-
-# If the HIDE_IN_BODY_DOCS tag is set to YES, doxygen will hide any
-# documentation blocks found inside the body of a function. If set to NO, these
-# blocks will be appended to the function's detailed documentation block.
-# The default value is: NO.
-
-HIDE_IN_BODY_DOCS      = NO
-
-# The INTERNAL_DOCS tag determines if documentation that is typed after a
-# \internal command is included. If the tag is set to NO then the documentation
-# will be excluded. Set it to YES to include the internal documentation.
-# The default value is: NO.
-
-INTERNAL_DOCS          = NO
-
-# If the CASE_SENSE_NAMES tag is set to NO then doxygen will only generate file
-# names in lower-case letters. If set to YES, upper-case letters are also
-# allowed. This is useful if you have classes or files whose names only differ
-# in case and if your file system supports case sensitive file names. Windows
-# and Mac users are advised to set this option to NO.
-# The default value is: system dependent.
-
-CASE_SENSE_NAMES       = NO
-
-# If the HIDE_SCOPE_NAMES tag is set to NO then doxygen will show members with
-# their full class and namespace scopes in the documentation. If set to YES, the
-# scope will be hidden.
-# The default value is: NO.
-
-HIDE_SCOPE_NAMES       = NO
-
-# If the HIDE_COMPOUND_REFERENCE tag is set to NO (default) then doxygen will
-# append additional text to a page's title, such as Class Reference. If set to
-# YES the compound reference will be hidden.
-# The default value is: NO.
-
-HIDE_COMPOUND_REFERENCE= NO
-
-# If the SHOW_INCLUDE_FILES tag is set to YES then doxygen will put a list of
-# the files that are included by a file in the documentation of that file.
-# The default value is: YES.
-
-SHOW_INCLUDE_FILES     = YES
-
-# If the SHOW_GROUPED_MEMB_INC tag is set to YES then Doxygen will add for each
-# grouped member an include statement to the documentation, telling the reader
-# which file to include in order to use the member.
-# The default value is: NO.
-
-SHOW_GROUPED_MEMB_INC  = NO
-
-# If the FORCE_LOCAL_INCLUDES tag is set to YES then doxygen will list include
-# files with double quotes in the documentation rather than with sharp brackets.
-# The default value is: NO.
-
-FORCE_LOCAL_INCLUDES   = NO
-
-# If the INLINE_INFO tag is set to YES then a tag [inline] is inserted in the
-# documentation for inline members.
-# The default value is: YES.
-
-INLINE_INFO            = YES
-
-# If the SORT_MEMBER_DOCS tag is set to YES then doxygen will sort the
-# (detailed) documentation of file and class members alphabetically by member
-# name. If set to NO, the members will appear in declaration order.
-# The default value is: YES.
-
-SORT_MEMBER_DOCS       = YES
-
-# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the brief
-# descriptions of file, namespace and class members alphabetically by member
-# name. If set to NO, the members will appear in declaration order. Note that
-# this will also influence the order of the classes in the class list.
-# The default value is: NO.
-
-SORT_BRIEF_DOCS        = NO
-
-# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen will sort the
-# (brief and detailed) documentation of class members so that constructors and
-# destructors are listed first. If set to NO the constructors will appear in the
-# respective orders defined by SORT_BRIEF_DOCS and SORT_MEMBER_DOCS.
-# Note: If SORT_BRIEF_DOCS is set to NO this option is ignored for sorting brief
-# member documentation.
-# Note: If SORT_MEMBER_DOCS is set to NO this option is ignored for sorting
-# detailed member documentation.
-# The default value is: NO.
-
-SORT_MEMBERS_CTORS_1ST = NO
-
-# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the hierarchy
-# of group names into alphabetical order. If set to NO the group names will
-# appear in their defined order.
-# The default value is: NO.
-
-SORT_GROUP_NAMES       = NO
-
-# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be sorted by
-# fully-qualified names, including namespaces. If set to NO, the class list will
-# be sorted only by class name, not including the namespace part.
-# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES.
-# Note: This option applies only to the class list, not to the alphabetical
-# list.
-# The default value is: NO.
-
-SORT_BY_SCOPE_NAME     = NO
-
-# If the STRICT_PROTO_MATCHING option is enabled and doxygen fails to do proper
-# type resolution of all parameters of a function it will reject a match between
-# the prototype and the implementation of a member function even if there is
-# only one candidate or it is obvious which candidate to choose by doing a
-# simple string match. By disabling STRICT_PROTO_MATCHING doxygen will still
-# accept a match between prototype and implementation in such cases.
-# The default value is: NO.
-
-STRICT_PROTO_MATCHING  = NO
-
-# The GENERATE_TODOLIST tag can be used to enable (YES) or disable (NO) the todo
-# list. This list is created by putting \todo commands in the documentation.
-# The default value is: YES.
-
-GENERATE_TODOLIST      = YES
-
-# The GENERATE_TESTLIST tag can be used to enable (YES) or disable (NO) the test
-# list. This list is created by putting \test commands in the documentation.
-# The default value is: YES.
-
-GENERATE_TESTLIST      = YES
-
-# The GENERATE_BUGLIST tag can be used to enable (YES) or disable (NO) the bug
-# list. This list is created by putting \bug commands in the documentation.
-# The default value is: YES.
-
-GENERATE_BUGLIST       = YES
-
-# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or disable (NO)
-# the deprecated list. This list is created by putting \deprecated commands in
-# the documentation.
-# The default value is: YES.
-
-GENERATE_DEPRECATEDLIST= YES
-
-# The ENABLED_SECTIONS tag can be used to enable conditional documentation
-# sections, marked by \if <section_label> ... \endif and \cond <section_label>
-# ... \endcond blocks.
-
-ENABLED_SECTIONS       = 
-
-# The MAX_INITIALIZER_LINES tag determines the maximum number of lines that the
-# initial value of a variable or macro / define can have for it to appear in the
-# documentation. If the initializer consists of more lines than specified here
-# it will be hidden. Use a value of 0 to hide initializers completely. The
-# appearance of the value of individual variables and macros / defines can be
-# controlled using \showinitializer or \hideinitializer command in the
-# documentation regardless of this setting.
-# Minimum value: 0, maximum value: 10000, default value: 30.
-
-MAX_INITIALIZER_LINES  = 30
-
-# Set the SHOW_USED_FILES tag to NO to disable the list of files generated at
-# the bottom of the documentation of classes and structs. If set to YES, the
-# list will mention the files that were used to generate the documentation.
-# The default value is: YES.
-
-SHOW_USED_FILES        = YES
-
-# Set the SHOW_FILES tag to NO to disable the generation of the Files page. This
-# will remove the Files entry from the Quick Index and from the Folder Tree View
-# (if specified).
-# The default value is: YES.
-
-SHOW_FILES             = YES
-
-# Set the SHOW_NAMESPACES tag to NO to disable the generation of the Namespaces
-# page. This will remove the Namespaces entry from the Quick Index and from the
-# Folder Tree View (if specified).
-# The default value is: YES.
-
-SHOW_NAMESPACES        = YES
-
-# The FILE_VERSION_FILTER tag can be used to specify a program or script that
-# doxygen should invoke to get the current version for each file (typically from
-# the version control system). Doxygen will invoke the program by executing (via
-# popen()) the command command input-file, where command is the value of the
-# FILE_VERSION_FILTER tag, and input-file is the name of an input file provided
-# by doxygen. Whatever the program writes to standard output is used as the file
-# version. For an example see the documentation.
-
-FILE_VERSION_FILTER    = 
-
-# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed
-# by doxygen. The layout file controls the global structure of the generated
-# output files in an output format independent way. To create the layout file
-# that represents doxygen's defaults, run doxygen with the -l option. You can
-# optionally specify a file name after the option, if omitted DoxygenLayout.xml
-# will be used as the name of the layout file.
-#
-# Note that if you run doxygen from a directory containing a file called
-# DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE
-# tag is left empty.
-
-LAYOUT_FILE            = 
-
-# The CITE_BIB_FILES tag can be used to specify one or more bib files containing
-# the reference definitions. This must be a list of .bib files. The .bib
-# extension is automatically appended if omitted. This requires the bibtex tool
-# to be installed. See also http://en.wikipedia.org/wiki/BibTeX for more info.
-# For LaTeX the style of the bibliography can be controlled using
-# LATEX_BIB_STYLE. To use this feature you need bibtex and perl available in the
-# search path. See also \cite for info how to create references.
-
-CITE_BIB_FILES         = 
-
-#---------------------------------------------------------------------------
-# Configuration options related to warning and progress messages
-#---------------------------------------------------------------------------
-
-# The QUIET tag can be used to turn on/off the messages that are generated to
-# standard output by doxygen. If QUIET is set to YES this implies that the
-# messages are off.
-# The default value is: NO.
-
-QUIET                  = NO
-
-# The WARNINGS tag can be used to turn on/off the warning messages that are
-# generated to standard error (stderr) by doxygen. If WARNINGS is set to YES
-# this implies that the warnings are on.
-#
-# Tip: Turn warnings on while writing the documentation.
-# The default value is: YES.
-
-WARNINGS               = YES
-
-# If the WARN_IF_UNDOCUMENTED tag is set to YES then doxygen will generate
-# warnings for undocumented members. If EXTRACT_ALL is set to YES then this flag
-# will automatically be disabled.
-# The default value is: YES.
-
-WARN_IF_UNDOCUMENTED   = YES
-
-# If the WARN_IF_DOC_ERROR tag is set to YES, doxygen will generate warnings for
-# potential errors in the documentation, such as not documenting some parameters
-# in a documented function, or documenting parameters that don't exist or using
-# markup commands wrongly.
-# The default value is: YES.
-
-WARN_IF_DOC_ERROR      = YES
-
-# This WARN_NO_PARAMDOC option can be enabled to get warnings for functions that
-# are documented, but have no documentation for their parameters or return
-# value. If set to NO, doxygen will only warn about wrong or incomplete
-# parameter documentation, but not about the absence of documentation.
-# The default value is: NO.
-
-WARN_NO_PARAMDOC       = NO
-
-# If the WARN_AS_ERROR tag is set to YES then doxygen will immediately stop when
-# a warning is encountered.
-# The default value is: NO.
-
-WARN_AS_ERROR          = NO
-
-# The WARN_FORMAT tag determines the format of the warning messages that doxygen
-# can produce. The string should contain the $file, $line, and $text tags, which
-# will be replaced by the file and line number from which the warning originated
-# and the warning text. Optionally the format may contain $version, which will
-# be replaced by the version of the file (if it could be obtained via
-# FILE_VERSION_FILTER)
-# The default value is: $file:$line: $text.
-
-WARN_FORMAT            = "$file:$line: $text"
-
-# The WARN_LOGFILE tag can be used to specify a file to which warning and error
-# messages should be written. If left blank the output is written to standard
-# error (stderr).
-
-WARN_LOGFILE           = 
-
-#---------------------------------------------------------------------------
-# Configuration options related to the input files
-#---------------------------------------------------------------------------
-
-# The INPUT tag is used to specify the files and/or directories that contain
-# documented source files. You may enter file names like myfile.cpp or
-# directories like /usr/src/myproject. Separate the files or directories with
-# spaces. See also FILE_PATTERNS and EXTENSION_MAPPING
-# Note: If this tag is empty the current directory is searched.
-
-INPUT                  = ../../../nnfw
-
-# This tag can be used to specify the character encoding of the source files
-# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses
-# libiconv (or the iconv built into libc) for the transcoding. See the libiconv
-# documentation (see: http://www.gnu.org/software/libiconv) for the list of
-# possible encodings.
-# The default value is: UTF-8.
-
-INPUT_ENCODING         = UTF-8
-
-# If the value of the INPUT tag contains directories, you can use the
-# FILE_PATTERNS tag to specify one or more wildcard patterns (like *.cpp and
-# *.h) to filter out the source-files in the directories.
-#
-# Note that for custom extensions or not directly supported extensions you also
-# need to set EXTENSION_MAPPING for the extension otherwise the files are not
-# read by doxygen.
-#
-# If left blank the following patterns are tested:*.c, *.cc, *.cxx, *.cpp,
-# *.c++, *.java, *.ii, *.ixx, *.ipp, *.i++, *.inl, *.idl, *.ddl, *.odl, *.h,
-# *.hh, *.hxx, *.hpp, *.h++, *.cs, *.d, *.php, *.php4, *.php5, *.phtml, *.inc,
-# *.m, *.markdown, *.md, *.mm, *.dox, *.py, *.pyw, *.f90, *.f95, *.f03, *.f08,
-# *.f, *.for, *.tcl, *.vhd, *.vhdl, *.ucf and *.qsf.
-
-FILE_PATTERNS          = *.c \
-                         *.cc \
-                         *.cxx \
-                         *.cpp \
-                         *.c++ \
-                         *.java \
-                         *.ii \
-                         *.ixx \
-                         *.ipp \
-                         *.i++ \
-                         *.inl \
-                         *.idl \
-                         *.ddl \
-                         *.odl \
-                         *.h \
-                         *.hh \
-                         *.hxx \
-                         *.hpp \
-                         *.h++ \
-                         *.cs \
-                         *.d \
-                         *.php \
-                         *.php4 \
-                         *.php5 \
-                         *.phtml \
-                         *.inc \
-                         *.m \
-                         *.markdown \
-                         *.md \
-                         *.mm \
-                         *.dox \
-                         *.py \
-                         *.pyw \
-                         *.f90 \
-                         *.f95 \
-                         *.f03 \
-                         *.f08 \
-                         *.f \
-                         *.for \
-                         *.tcl \
-                         *.vhd \
-                         *.vhdl \
-                         *.ucf \
-                         *.qsf
-
-# The RECURSIVE tag can be used to specify whether or not subdirectories should
-# be searched for input files as well.
-# The default value is: NO.
-
-RECURSIVE              = YES
-
-# The EXCLUDE tag can be used to specify files and/or directories that should be
-# excluded from the INPUT source files. This way you can easily exclude a
-# subdirectory from a directory tree whose root is specified with the INPUT tag.
-#
-# Note that relative paths are relative to the directory from which doxygen is
-# run.
-
-EXCLUDE                = ../../../nnfw/Product \
-                         ../../../nnfw/tools/cross/rootfs \
-                         ../../../nnfw/externals \
-                         ../../../nnfw/externals/acl \
-                         ../../../nnfw/externals/tensorflow \
-                         ../../../nnfw/tests/framework/cache \
-                         ../../../nnfw/runtimes/tests/neural_networks_test/generated/models \
-                         .caffemodel \
-                         .bin
-
-# The EXCLUDE_SYMLINKS tag can be used to select whether or not files or
-# directories that are symbolic links (a Unix file system feature) are excluded
-# from the input.
-# The default value is: NO.
-
-EXCLUDE_SYMLINKS       = NO
-
-# If the value of the INPUT tag contains directories, you can use the
-# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude
-# certain files from those directories.
-#
-# Note that the wildcards are matched against the file with absolute path, so to
-# exclude all test directories for example use the pattern */test/*
-
-EXCLUDE_PATTERNS       = 
-
-# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names
-# (namespaces, classes, functions, etc.) that should be excluded from the
-# output. The symbol name can be a fully qualified name, a word, or if the
-# wildcard * is used, a substring. Examples: ANamespace, AClass,
-# AClass::ANamespace, ANamespace::*Test
-#
-# Note that the wildcards are matched against the file with absolute path, so to
-# exclude all test directories use the pattern */test/*
-
-EXCLUDE_SYMBOLS        = 
-
-# The EXAMPLE_PATH tag can be used to specify one or more files or directories
-# that contain example code fragments that are included (see the \include
-# command).
-
-EXAMPLE_PATH           = 
-
-# If the value of the EXAMPLE_PATH tag contains directories, you can use the
-# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and
-# *.h) to filter out the source-files in the directories. If left blank all
-# files are included.
-
-EXAMPLE_PATTERNS       = *
-
-# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be
-# searched for input files to be used with the \include or \dontinclude commands
-# irrespective of the value of the RECURSIVE tag.
-# The default value is: NO.
-
-EXAMPLE_RECURSIVE      = NO
-
-# The IMAGE_PATH tag can be used to specify one or more files or directories
-# that contain images that are to be included in the documentation (see the
-# \image command).
-
-IMAGE_PATH             = 
-
-# The INPUT_FILTER tag can be used to specify a program that doxygen should
-# invoke to filter for each input file. Doxygen will invoke the filter program
-# by executing (via popen()) the command:
-#
-# <filter> <input-file>
-#
-# where <filter> is the value of the INPUT_FILTER tag, and <input-file> is the
-# name of an input file. Doxygen will then use the output that the filter
-# program writes to standard output. If FILTER_PATTERNS is specified, this tag
-# will be ignored.
-#
-# Note that the filter must not add or remove lines; it is applied before the
-# code is scanned, but not when the output code is generated. If lines are added
-# or removed, the anchors will not be placed correctly.
-#
-# Note that for custom extensions or not directly supported extensions you also
-# need to set EXTENSION_MAPPING for the extension otherwise the files are not
-# properly processed by doxygen.
-
-INPUT_FILTER           = 
-
-# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern
-# basis. Doxygen will compare the file name with each pattern and apply the
-# filter if there is a match. The filters are a list of the form: pattern=filter
-# (like *.cpp=my_cpp_filter). See INPUT_FILTER for further information on how
-# filters are used. If the FILTER_PATTERNS tag is empty or if none of the
-# patterns match the file name, INPUT_FILTER is applied.
-#
-# Note that for custom extensions or not directly supported extensions you also
-# need to set EXTENSION_MAPPING for the extension otherwise the files are not
-# properly processed by doxygen.
-
-FILTER_PATTERNS        = 
-
-# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using
-# INPUT_FILTER) will also be used to filter the input files that are used for
-# producing the source files to browse (i.e. when SOURCE_BROWSER is set to YES).
-# The default value is: NO.
-
-FILTER_SOURCE_FILES    = NO
-
-# The FILTER_SOURCE_PATTERNS tag can be used to specify source filters per file
-# pattern. A pattern will override the setting for FILTER_PATTERN (if any) and
-# it is also possible to disable source filtering for a specific pattern using
-# *.ext= (so without naming a filter).
-# This tag requires that the tag FILTER_SOURCE_FILES is set to YES.
-
-FILTER_SOURCE_PATTERNS = 
-
-# If the USE_MDFILE_AS_MAINPAGE tag refers to the name of a markdown file that
-# is part of the input, its contents will be placed on the main page
-# (index.html). This can be useful if you have a project on for instance GitHub
-# and want to reuse the introduction page also for the doxygen output.
-
-USE_MDFILE_AS_MAINPAGE = roadmap.md
-
-#---------------------------------------------------------------------------
-# Configuration options related to source browsing
-#---------------------------------------------------------------------------
-
-# If the SOURCE_BROWSER tag is set to YES then a list of source files will be
-# generated. Documented entities will be cross-referenced with these sources.
-#
-# Note: To get rid of all source code in the generated output, make sure that
-# also VERBATIM_HEADERS is set to NO.
-# The default value is: NO.
-
-SOURCE_BROWSER         = YES
-
-# Setting the INLINE_SOURCES tag to YES will include the body of functions,
-# classes and enums directly into the documentation.
-# The default value is: NO.
-
-INLINE_SOURCES         = NO
-
-# Setting the STRIP_CODE_COMMENTS tag to YES will instruct doxygen to hide any
-# special comment blocks from generated source code fragments. Normal C, C++ and
-# Fortran comments will always remain visible.
-# The default value is: YES.
-
-STRIP_CODE_COMMENTS    = YES
-
-# If the REFERENCED_BY_RELATION tag is set to YES then for each documented
-# function all documented functions referencing it will be listed.
-# The default value is: NO.
-
-REFERENCED_BY_RELATION = NO
-
-# If the REFERENCES_RELATION tag is set to YES then for each documented function
-# all documented entities called/used by that function will be listed.
-# The default value is: NO.
-
-REFERENCES_RELATION    = NO
-
-# If the REFERENCES_LINK_SOURCE tag is set to YES and SOURCE_BROWSER tag is set
-# to YES then the hyperlinks from functions in REFERENCES_RELATION and
-# REFERENCED_BY_RELATION lists will link to the source code. Otherwise they will
-# link to the documentation.
-# The default value is: YES.
-
-REFERENCES_LINK_SOURCE = YES
-
-# If SOURCE_TOOLTIPS is enabled (the default) then hovering a hyperlink in the
-# source code will show a tooltip with additional information such as prototype,
-# brief description and links to the definition and documentation. Since this
-# will make the HTML file larger and loading of large files a bit slower, you
-# can opt to disable this feature.
-# The default value is: YES.
-# This tag requires that the tag SOURCE_BROWSER is set to YES.
-
-SOURCE_TOOLTIPS        = YES
-
-# If the USE_HTAGS tag is set to YES then the references to source code will
-# point to the HTML generated by the htags(1) tool instead of doxygen built-in
-# source browser. The htags tool is part of GNU's global source tagging system
-# (see http://www.gnu.org/software/global/global.html). You will need version
-# 4.8.6 or higher.
-#
-# To use it do the following:
-# - Install the latest version of global
-# - Enable SOURCE_BROWSER and USE_HTAGS in the config file
-# - Make sure the INPUT points to the root of the source tree
-# - Run doxygen as normal
-#
-# Doxygen will invoke htags (and that will in turn invoke gtags), so these
-# tools must be available from the command line (i.e. in the search path).
-#
-# The result: instead of the source browser generated by doxygen, the links to
-# source code will now point to the output of htags.
-# The default value is: NO.
-# This tag requires that the tag SOURCE_BROWSER is set to YES.
-
-USE_HTAGS              = NO
-
-# If the VERBATIM_HEADERS tag is set the YES then doxygen will generate a
-# verbatim copy of the header file for each class for which an include is
-# specified. Set to NO to disable this.
-# See also: Section \class.
-# The default value is: YES.
-
-VERBATIM_HEADERS       = YES
-
-# If the CLANG_ASSISTED_PARSING tag is set to YES then doxygen will use the
-# clang parser (see: http://clang.llvm.org/) for more accurate parsing at the
-# cost of reduced performance. This can be particularly helpful with template
-# rich C++ code for which doxygen's built-in parser lacks the necessary type
-# information.
-# Note: The availability of this option depends on whether or not doxygen was
-# generated with the -Duse-libclang=ON option for CMake.
-# The default value is: NO.
-
-CLANG_ASSISTED_PARSING = NO
-
-# If clang assisted parsing is enabled you can provide the compiler with command
-# line options that you would normally use when invoking the compiler. Note that
-# the include paths will already be set by doxygen for the files and directories
-# specified with INPUT and INCLUDE_PATH.
-# This tag requires that the tag CLANG_ASSISTED_PARSING is set to YES.
-
-CLANG_OPTIONS          = 
-
-#---------------------------------------------------------------------------
-# Configuration options related to the alphabetical class index
-#---------------------------------------------------------------------------
-
-# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index of all
-# compounds will be generated. Enable this if the project contains a lot of
-# classes, structs, unions or interfaces.
-# The default value is: YES.
-
-ALPHABETICAL_INDEX     = YES
-
-# The COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns in
-# which the alphabetical index list will be split.
-# Minimum value: 1, maximum value: 20, default value: 5.
-# This tag requires that the tag ALPHABETICAL_INDEX is set to YES.
-
-COLS_IN_ALPHA_INDEX    = 5
-
-# In case all classes in a project start with a common prefix, all classes will
-# be put under the same header in the alphabetical index. The IGNORE_PREFIX tag
-# can be used to specify a prefix (or a list of prefixes) that should be ignored
-# while generating the index headers.
-# This tag requires that the tag ALPHABETICAL_INDEX is set to YES.
-
-IGNORE_PREFIX          = 
-
-#---------------------------------------------------------------------------
-# Configuration options related to the HTML output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_HTML tag is set to YES, doxygen will generate HTML output
-# The default value is: YES.
-
-GENERATE_HTML          = YES
-
-# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. If a
-# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
-# it.
-# The default directory is: html.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-HTML_OUTPUT            = html
-
-# The HTML_FILE_EXTENSION tag can be used to specify the file extension for each
-# generated HTML page (for example: .htm, .php, .asp).
-# The default value is: .html.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-HTML_FILE_EXTENSION    = .html
-
-# The HTML_HEADER tag can be used to specify a user-defined HTML header file for
-# each generated HTML page. If the tag is left blank doxygen will generate a
-# standard header.
-#
-# To get valid HTML the header file that includes any scripts and style sheets
-# that doxygen needs, which is dependent on the configuration options used (e.g.
-# the setting GENERATE_TREEVIEW). It is highly recommended to start with a
-# default header using
-# doxygen -w html new_header.html new_footer.html new_stylesheet.css
-# YourConfigFile
-# and then modify the file new_header.html. See also section "Doxygen usage"
-# for information on how to generate the default header that doxygen normally
-# uses.
-# Note: The header is subject to change so you typically have to regenerate the
-# default header when upgrading to a newer version of doxygen. For a description
-# of the possible markers and block names see the documentation.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-HTML_HEADER            = 
-
-# The HTML_FOOTER tag can be used to specify a user-defined HTML footer for each
-# generated HTML page. If the tag is left blank doxygen will generate a standard
-# footer. See HTML_HEADER for more information on how to generate a default
-# footer and what special commands can be used inside the footer. See also
-# section "Doxygen usage" for information on how to generate the default footer
-# that doxygen normally uses.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-HTML_FOOTER            = 
-
-# The HTML_STYLESHEET tag can be used to specify a user-defined cascading style
-# sheet that is used by each HTML page. It can be used to fine-tune the look of
-# the HTML output. If left blank doxygen will generate a default style sheet.
-# See also section "Doxygen usage" for information on how to generate the style
-# sheet that doxygen normally uses.
-# Note: It is recommended to use HTML_EXTRA_STYLESHEET instead of this tag, as
-# it is more robust and this tag (HTML_STYLESHEET) will in the future become
-# obsolete.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-HTML_STYLESHEET        = 
-
-# The HTML_EXTRA_STYLESHEET tag can be used to specify additional user-defined
-# cascading style sheets that are included after the standard style sheets
-# created by doxygen. Using this option one can overrule certain style aspects.
-# This is preferred over using HTML_STYLESHEET since it does not replace the
-# standard style sheet and is therefore more robust against future updates.
-# Doxygen will copy the style sheet files to the output directory.
-# Note: The order of the extra style sheet files is of importance (e.g. the last
-# style sheet in the list overrules the setting of the previous ones in the
-# list). For an example see the documentation.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-HTML_EXTRA_STYLESHEET  = 
-
-# The HTML_EXTRA_FILES tag can be used to specify one or more extra images or
-# other source files which should be copied to the HTML output directory. Note
-# that these files will be copied to the base HTML output directory. Use the
-# $relpath^ marker in the HTML_HEADER and/or HTML_FOOTER files to load these
-# files. In the HTML_STYLESHEET file, use the file name only. Also note that the
-# files will be copied as-is; there are no commands or markers available.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-HTML_EXTRA_FILES       = 
-
-# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. Doxygen
-# will adjust the colors in the style sheet and background images according to
-# this color. Hue is specified as an angle on a colorwheel, see
-# http://en.wikipedia.org/wiki/Hue for more information. For instance the value
-# 0 represents red, 60 is yellow, 120 is green, 180 is cyan, 240 is blue, 300
-# purple, and 360 is red again.
-# Minimum value: 0, maximum value: 359, default value: 220.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-HTML_COLORSTYLE_HUE    = 220
-
-# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of the colors
-# in the HTML output. For a value of 0 the output will use grayscales only. A
-# value of 255 will produce the most vivid colors.
-# Minimum value: 0, maximum value: 255, default value: 100.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-HTML_COLORSTYLE_SAT    = 100
-
-# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to the
-# luminance component of the colors in the HTML output. Values below 100
-# gradually make the output lighter, whereas values above 100 make the output
-# darker. The value divided by 100 is the actual gamma applied, so 80 represents
-# a gamma of 0.8, The value 220 represents a gamma of 2.2, and 100 does not
-# change the gamma.
-# Minimum value: 40, maximum value: 240, default value: 80.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-HTML_COLORSTYLE_GAMMA  = 80
-
-# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML
-# page will contain the date and time when the page was generated. Setting this
-# to YES can help to show when doxygen was last run and thus if the
-# documentation is up to date.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-HTML_TIMESTAMP         = NO
-
-# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML
-# documentation will contain sections that can be hidden and shown after the
-# page has loaded.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-HTML_DYNAMIC_SECTIONS  = NO
-
-# With HTML_INDEX_NUM_ENTRIES one can control the preferred number of entries
-# shown in the various tree structured indices initially; the user can expand
-# and collapse entries dynamically later on. Doxygen will expand the tree to
-# such a level that at most the specified number of entries are visible (unless
-# a fully collapsed tree already exceeds this amount). So setting the number of
-# entries 1 will produce a full collapsed tree by default. 0 is a special value
-# representing an infinite number of entries and will result in a full expanded
-# tree by default.
-# Minimum value: 0, maximum value: 9999, default value: 100.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-HTML_INDEX_NUM_ENTRIES = 100
-
-# If the GENERATE_DOCSET tag is set to YES, additional index files will be
-# generated that can be used as input for Apple's Xcode 3 integrated development
-# environment (see: http://developer.apple.com/tools/xcode/), introduced with
-# OSX 10.5 (Leopard). To create a documentation set, doxygen will generate a
-# Makefile in the HTML output directory. Running make will produce the docset in
-# that directory and running make install will install the docset in
-# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find it at
-# startup. See http://developer.apple.com/tools/creatingdocsetswithdoxygen.html
-# for more information.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-GENERATE_DOCSET        = NO
-
-# This tag determines the name of the docset feed. A documentation feed provides
-# an umbrella under which multiple documentation sets from a single provider
-# (such as a company or product suite) can be grouped.
-# The default value is: Doxygen generated docs.
-# This tag requires that the tag GENERATE_DOCSET is set to YES.
-
-DOCSET_FEEDNAME        = "Doxygen generated docs"
-
-# This tag specifies a string that should uniquely identify the documentation
-# set bundle. This should be a reverse domain-name style string, e.g.
-# com.mycompany.MyDocSet. Doxygen will append .docset to the name.
-# The default value is: org.doxygen.Project.
-# This tag requires that the tag GENERATE_DOCSET is set to YES.
-
-DOCSET_BUNDLE_ID       = org.doxygen.Project
-
-# The DOCSET_PUBLISHER_ID tag specifies a string that should uniquely identify
-# the documentation publisher. This should be a reverse domain-name style
-# string, e.g. com.mycompany.MyDocSet.documentation.
-# The default value is: org.doxygen.Publisher.
-# This tag requires that the tag GENERATE_DOCSET is set to YES.
-
-DOCSET_PUBLISHER_ID    = org.doxygen.Publisher
-
-# The DOCSET_PUBLISHER_NAME tag identifies the documentation publisher.
-# The default value is: Publisher.
-# This tag requires that the tag GENERATE_DOCSET is set to YES.
-
-DOCSET_PUBLISHER_NAME  = Publisher
-
-# If the GENERATE_HTMLHELP tag is set to YES then doxygen generates three
-# additional HTML index files: index.hhp, index.hhc, and index.hhk. The
-# index.hhp is a project file that can be read by Microsoft's HTML Help Workshop
-# (see: http://www.microsoft.com/en-us/download/details.aspx?id=21138) on
-# Windows.
-#
-# The HTML Help Workshop contains a compiler that can convert all HTML output
-# generated by doxygen into a single compiled HTML file (.chm). Compiled HTML
-# files are now used as the Windows 98 help format, and will replace the old
-# Windows help format (.hlp) on all Windows platforms in the future. Compressed
-# HTML files also contain an index, a table of contents, and you can search for
-# words in the documentation. The HTML workshop also contains a viewer for
-# compressed HTML files.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-GENERATE_HTMLHELP      = NO
-
-# The CHM_FILE tag can be used to specify the file name of the resulting .chm
-# file. You can add a path in front of the file if the result should not be
-# written to the html output directory.
-# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
-
-CHM_FILE               = 
-
-# The HHC_LOCATION tag can be used to specify the location (absolute path
-# including file name) of the HTML help compiler (hhc.exe). If non-empty,
-# doxygen will try to run the HTML help compiler on the generated index.hhp.
-# The file has to be specified with full path.
-# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
-
-HHC_LOCATION           = 
-
-# The GENERATE_CHI flag controls if a separate .chi index file is generated
-# (YES) or that it should be included in the master .chm file (NO).
-# The default value is: NO.
-# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
-
-GENERATE_CHI           = NO
-
-# The CHM_INDEX_ENCODING is used to encode HtmlHelp index (hhk), content (hhc)
-# and project file content.
-# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
-
-CHM_INDEX_ENCODING     = 
-
-# The BINARY_TOC flag controls whether a binary table of contents is generated
-# (YES) or a normal table of contents (NO) in the .chm file. Furthermore it
-# enables the Previous and Next buttons.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
-
-BINARY_TOC             = NO
-
-# The TOC_EXPAND flag can be set to YES to add extra items for group members to
-# the table of contents of the HTML help documentation and to the tree view.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
-
-TOC_EXPAND             = NO
-
-# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and
-# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated that
-# can be used as input for Qt's qhelpgenerator to generate a Qt Compressed Help
-# (.qch) of the generated HTML documentation.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-GENERATE_QHP           = NO
-
-# If the QHG_LOCATION tag is specified, the QCH_FILE tag can be used to specify
-# the file name of the resulting .qch file. The path specified is relative to
-# the HTML output folder.
-# This tag requires that the tag GENERATE_QHP is set to YES.
-
-QCH_FILE               = 
-
-# The QHP_NAMESPACE tag specifies the namespace to use when generating Qt Help
-# Project output. For more information please see Qt Help Project / Namespace
-# (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#namespace).
-# The default value is: org.doxygen.Project.
-# This tag requires that the tag GENERATE_QHP is set to YES.
-
-QHP_NAMESPACE          = org.doxygen.Project
-
-# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating Qt
-# Help Project output. For more information please see Qt Help Project / Virtual
-# Folders (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#virtual-
-# folders).
-# The default value is: doc.
-# This tag requires that the tag GENERATE_QHP is set to YES.
-
-QHP_VIRTUAL_FOLDER     = doc
-
-# If the QHP_CUST_FILTER_NAME tag is set, it specifies the name of a custom
-# filter to add. For more information please see Qt Help Project / Custom
-# Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom-
-# filters).
-# This tag requires that the tag GENERATE_QHP is set to YES.
-
-QHP_CUST_FILTER_NAME   = 
-
-# The QHP_CUST_FILTER_ATTRS tag specifies the list of the attributes of the
-# custom filter to add. For more information please see Qt Help Project / Custom
-# Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom-
-# filters).
-# This tag requires that the tag GENERATE_QHP is set to YES.
-
-QHP_CUST_FILTER_ATTRS  = 
-
-# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this
-# project's filter section matches. Qt Help Project / Filter Attributes (see:
-# http://qt-project.org/doc/qt-4.8/qthelpproject.html#filter-attributes).
-# This tag requires that the tag GENERATE_QHP is set to YES.
-
-QHP_SECT_FILTER_ATTRS  = 
-
-# The QHG_LOCATION tag can be used to specify the location of Qt's
-# qhelpgenerator. If non-empty doxygen will try to run qhelpgenerator on the
-# generated .qhp file.
-# This tag requires that the tag GENERATE_QHP is set to YES.
-
-QHG_LOCATION           = 
-
-# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files will be
-# generated, together with the HTML files, they form an Eclipse help plugin. To
-# install this plugin and make it available under the help contents menu in
-# Eclipse, the contents of the directory containing the HTML and XML files needs
-# to be copied into the plugins directory of eclipse. The name of the directory
-# within the plugins directory should be the same as the ECLIPSE_DOC_ID value.
-# After copying Eclipse needs to be restarted before the help appears.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-GENERATE_ECLIPSEHELP   = NO
-
-# A unique identifier for the Eclipse help plugin. When installing the plugin
-# the directory name containing the HTML and XML files should also have this
-# name. Each documentation set should have its own identifier.
-# The default value is: org.doxygen.Project.
-# This tag requires that the tag GENERATE_ECLIPSEHELP is set to YES.
-
-ECLIPSE_DOC_ID         = org.doxygen.Project
-
-# If you want full control over the layout of the generated HTML pages it might
-# be necessary to disable the index and replace it with your own. The
-# DISABLE_INDEX tag can be used to turn on/off the condensed index (tabs) at top
-# of each HTML page. A value of NO enables the index and the value YES disables
-# it. Since the tabs in the index contain the same information as the navigation
-# tree, you can set this option to YES if you also set GENERATE_TREEVIEW to YES.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-DISABLE_INDEX          = NO
-
-# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index
-# structure should be generated to display hierarchical information. If the tag
-# value is set to YES, a side panel will be generated containing a tree-like
-# index structure (just like the one that is generated for HTML Help). For this
-# to work a browser that supports JavaScript, DHTML, CSS and frames is required
-# (i.e. any modern browser). Windows users are probably better off using the
-# HTML help feature. Via custom style sheets (see HTML_EXTRA_STYLESHEET) one can
-# further fine-tune the look of the index. As an example, the default style
-# sheet generated by doxygen has an example that shows how to put an image at
-# the root of the tree instead of the PROJECT_NAME. Since the tree basically has
-# the same information as the tab index, you could consider setting
-# DISABLE_INDEX to YES when enabling this option.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-GENERATE_TREEVIEW      = NO
-
-# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that
-# doxygen will group on one line in the generated HTML documentation.
-#
-# Note that a value of 0 will completely suppress the enum values from appearing
-# in the overview section.
-# Minimum value: 0, maximum value: 20, default value: 4.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-ENUM_VALUES_PER_LINE   = 4
-
-# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be used
-# to set the initial width (in pixels) of the frame in which the tree is shown.
-# Minimum value: 0, maximum value: 1500, default value: 250.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-TREEVIEW_WIDTH         = 250
-
-# If the EXT_LINKS_IN_WINDOW option is set to YES, doxygen will open links to
-# external symbols imported via tag files in a separate window.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-EXT_LINKS_IN_WINDOW    = NO
-
-# Use this tag to change the font size of LaTeX formulas included as images in
-# the HTML documentation. When you change the font size after a successful
-# doxygen run you need to manually remove any form_*.png images from the HTML
-# output directory to force them to be regenerated.
-# Minimum value: 8, maximum value: 50, default value: 10.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-FORMULA_FONTSIZE       = 10
-
-# Use the FORMULA_TRANPARENT tag to determine whether or not the images
-# generated for formulas are transparent PNGs. Transparent PNGs are not
-# supported properly for IE 6.0, but are supported on all modern browsers.
-#
-# Note that when changing this option you need to delete any form_*.png files in
-# the HTML output directory before the changes have effect.
-# The default value is: YES.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-FORMULA_TRANSPARENT    = YES
-
-# Enable the USE_MATHJAX option to render LaTeX formulas using MathJax (see
-# http://www.mathjax.org) which uses client side Javascript for the rendering
-# instead of using pre-rendered bitmaps. Use this if you do not have LaTeX
-# installed or if you want to formulas look prettier in the HTML output. When
-# enabled you may also need to install MathJax separately and configure the path
-# to it using the MATHJAX_RELPATH option.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-USE_MATHJAX            = NO
-
-# When MathJax is enabled you can set the default output format to be used for
-# the MathJax output. See the MathJax site (see:
-# http://docs.mathjax.org/en/latest/output.html) for more details.
-# Possible values are: HTML-CSS (which is slower, but has the best
-# compatibility), NativeMML (i.e. MathML) and SVG.
-# The default value is: HTML-CSS.
-# This tag requires that the tag USE_MATHJAX is set to YES.
-
-MATHJAX_FORMAT         = HTML-CSS
-
-# When MathJax is enabled you need to specify the location relative to the HTML
-# output directory using the MATHJAX_RELPATH option. The destination directory
-# should contain the MathJax.js script. For instance, if the mathjax directory
-# is located at the same level as the HTML output directory, then
-# MATHJAX_RELPATH should be ../mathjax. The default value points to the MathJax
-# Content Delivery Network so you can quickly see the result without installing
-# MathJax. However, it is strongly recommended to install a local copy of
-# MathJax from http://www.mathjax.org before deployment.
-# The default value is: http://cdn.mathjax.org/mathjax/latest.
-# This tag requires that the tag USE_MATHJAX is set to YES.
-
-MATHJAX_RELPATH        = http://cdn.mathjax.org/mathjax/latest
-
-# The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax
-# extension names that should be enabled during MathJax rendering. For example
-# MATHJAX_EXTENSIONS = TeX/AMSmath TeX/AMSsymbols
-# This tag requires that the tag USE_MATHJAX is set to YES.
-
-MATHJAX_EXTENSIONS     = 
-
-# The MATHJAX_CODEFILE tag can be used to specify a file with javascript pieces
-# of code that will be used on startup of the MathJax code. See the MathJax site
-# (see: http://docs.mathjax.org/en/latest/output.html) for more details. For an
-# example see the documentation.
-# This tag requires that the tag USE_MATHJAX is set to YES.
-
-MATHJAX_CODEFILE       = 
-
-# When the SEARCHENGINE tag is enabled doxygen will generate a search box for
-# the HTML output. The underlying search engine uses javascript and DHTML and
-# should work on any modern browser. Note that when using HTML help
-# (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets (GENERATE_DOCSET)
-# there is already a search function so this one should typically be disabled.
-# For large projects the javascript based search engine can be slow, then
-# enabling SERVER_BASED_SEARCH may provide a better solution. It is possible to
-# search using the keyboard; to jump to the search box use <access key> + S
-# (what the <access key> is depends on the OS and browser, but it is typically
-# <CTRL>, <ALT>/<option>, or both). Inside the search box use the <cursor down
-# key> to jump into the search results window, the results can be navigated
-# using the <cursor keys>. Press <Enter> to select an item or <escape> to cancel
-# the search. The filter options can be selected when the cursor is inside the
-# search box by pressing <Shift>+<cursor down>. Also here use the <cursor keys>
-# to select a filter and <Enter> or <escape> to activate or cancel the filter
-# option.
-# The default value is: YES.
-# This tag requires that the tag GENERATE_HTML is set to YES.
-
-SEARCHENGINE           = YES
-
-# When the SERVER_BASED_SEARCH tag is enabled the search engine will be
-# implemented using a web server instead of a web client using Javascript. There
-# are two flavors of web server based searching depending on the EXTERNAL_SEARCH
-# setting. When disabled, doxygen will generate a PHP script for searching and
-# an index file used by the script. When EXTERNAL_SEARCH is enabled the indexing
-# and searching needs to be provided by external tools. See the section
-# "External Indexing and Searching" for details.
-# The default value is: NO.
-# This tag requires that the tag SEARCHENGINE is set to YES.
-
-SERVER_BASED_SEARCH    = NO
-
-# When EXTERNAL_SEARCH tag is enabled doxygen will no longer generate the PHP
-# script for searching. Instead the search results are written to an XML file
-# which needs to be processed by an external indexer. Doxygen will invoke an
-# external search engine pointed to by the SEARCHENGINE_URL option to obtain the
-# search results.
-#
-# Doxygen ships with an example indexer (doxyindexer) and search engine
-# (doxysearch.cgi) which are based on the open source search engine library
-# Xapian (see: http://xapian.org/).
-#
-# See the section "External Indexing and Searching" for details.
-# The default value is: NO.
-# This tag requires that the tag SEARCHENGINE is set to YES.
-
-EXTERNAL_SEARCH        = NO
-
-# The SEARCHENGINE_URL should point to a search engine hosted by a web server
-# which will return the search results when EXTERNAL_SEARCH is enabled.
-#
-# Doxygen ships with an example indexer (doxyindexer) and search engine
-# (doxysearch.cgi) which are based on the open source search engine library
-# Xapian (see: http://xapian.org/). See the section "External Indexing and
-# Searching" for details.
-# This tag requires that the tag SEARCHENGINE is set to YES.
-
-SEARCHENGINE_URL       = 
-
-# When SERVER_BASED_SEARCH and EXTERNAL_SEARCH are both enabled the unindexed
-# search data is written to a file for indexing by an external tool. With the
-# SEARCHDATA_FILE tag the name of this file can be specified.
-# The default file is: searchdata.xml.
-# This tag requires that the tag SEARCHENGINE is set to YES.
-
-SEARCHDATA_FILE        = searchdata.xml
-
-# When SERVER_BASED_SEARCH and EXTERNAL_SEARCH are both enabled the
-# EXTERNAL_SEARCH_ID tag can be used as an identifier for the project. This is
-# useful in combination with EXTRA_SEARCH_MAPPINGS to search through multiple
-# projects and redirect the results back to the right project.
-# This tag requires that the tag SEARCHENGINE is set to YES.
-
-EXTERNAL_SEARCH_ID     = 
-
-# The EXTRA_SEARCH_MAPPINGS tag can be used to enable searching through doxygen
-# projects other than the one defined by this configuration file, but that are
-# all added to the same external search index. Each project needs to have a
-# unique id set via EXTERNAL_SEARCH_ID. The search mapping then maps the id of
-# to a relative location where the documentation can be found. The format is:
-# EXTRA_SEARCH_MAPPINGS = tagname1=loc1 tagname2=loc2 ...
-# This tag requires that the tag SEARCHENGINE is set to YES.
-
-EXTRA_SEARCH_MAPPINGS  = 
-
-#---------------------------------------------------------------------------
-# Configuration options related to the LaTeX output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_LATEX tag is set to YES, doxygen will generate LaTeX output.
-# The default value is: YES.
-
-GENERATE_LATEX         = NO
-
-# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. If a
-# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
-# it.
-# The default directory is: latex.
-# This tag requires that the tag GENERATE_LATEX is set to YES.
-
-LATEX_OUTPUT           = latex
-
-# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be
-# invoked.
-#
-# Note that when enabling USE_PDFLATEX this option is only used for generating
-# bitmaps for formulas in the HTML output, but not in the Makefile that is
-# written to the output directory.
-# The default file is: latex.
-# This tag requires that the tag GENERATE_LATEX is set to YES.
-
-LATEX_CMD_NAME         = latex
-
-# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to generate
-# index for LaTeX.
-# The default file is: makeindex.
-# This tag requires that the tag GENERATE_LATEX is set to YES.
-
-MAKEINDEX_CMD_NAME     = makeindex
-
-# If the COMPACT_LATEX tag is set to YES, doxygen generates more compact LaTeX
-# documents. This may be useful for small projects and may help to save some
-# trees in general.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_LATEX is set to YES.
-
-COMPACT_LATEX          = NO
-
-# The PAPER_TYPE tag can be used to set the paper type that is used by the
-# printer.
-# Possible values are: a4 (210 x 297 mm), letter (8.5 x 11 inches), legal (8.5 x
-# 14 inches) and executive (7.25 x 10.5 inches).
-# The default value is: a4.
-# This tag requires that the tag GENERATE_LATEX is set to YES.
-
-PAPER_TYPE             = a4
-
-# The EXTRA_PACKAGES tag can be used to specify one or more LaTeX package names
-# that should be included in the LaTeX output. The package can be specified just
-# by its name or with the correct syntax as to be used with the LaTeX
-# \usepackage command. To get the times font for instance you can specify :
-# EXTRA_PACKAGES=times or EXTRA_PACKAGES={times}
-# To use the option intlimits with the amsmath package you can specify:
-# EXTRA_PACKAGES=[intlimits]{amsmath}
-# If left blank no extra packages will be included.
-# This tag requires that the tag GENERATE_LATEX is set to YES.
-
-EXTRA_PACKAGES         = 
-
-# The LATEX_HEADER tag can be used to specify a personal LaTeX header for the
-# generated LaTeX document. The header should contain everything until the first
-# chapter. If it is left blank doxygen will generate a standard header. See
-# section "Doxygen usage" for information on how to let doxygen write the
-# default header to a separate file.
-#
-# Note: Only use a user-defined header if you know what you are doing! The
-# following commands have a special meaning inside the header: $title,
-# $datetime, $date, $doxygenversion, $projectname, $projectnumber,
-# $projectbrief, $projectlogo. Doxygen will replace $title with the empty
-# string, for the replacement values of the other commands the user is referred
-# to HTML_HEADER.
-# This tag requires that the tag GENERATE_LATEX is set to YES.
-
-LATEX_HEADER           = 
-
-# The LATEX_FOOTER tag can be used to specify a personal LaTeX footer for the
-# generated LaTeX document. The footer should contain everything after the last
-# chapter. If it is left blank doxygen will generate a standard footer. See
-# LATEX_HEADER for more information on how to generate a default footer and what
-# special commands can be used inside the footer.
-#
-# Note: Only use a user-defined footer if you know what you are doing!
-# This tag requires that the tag GENERATE_LATEX is set to YES.
-
-LATEX_FOOTER           = 
-
-# The LATEX_EXTRA_STYLESHEET tag can be used to specify additional user-defined
-# LaTeX style sheets that are included after the standard style sheets created
-# by doxygen. Using this option one can overrule certain style aspects. Doxygen
-# will copy the style sheet files to the output directory.
-# Note: The order of the extra style sheet files is of importance (e.g. the last
-# style sheet in the list overrules the setting of the previous ones in the
-# list).
-# This tag requires that the tag GENERATE_LATEX is set to YES.
-
-LATEX_EXTRA_STYLESHEET = 
-
-# The LATEX_EXTRA_FILES tag can be used to specify one or more extra images or
-# other source files which should be copied to the LATEX_OUTPUT output
-# directory. Note that the files will be copied as-is; there are no commands or
-# markers available.
-# This tag requires that the tag GENERATE_LATEX is set to YES.
-
-LATEX_EXTRA_FILES      = 
-
-# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated is
-# prepared for conversion to PDF (using ps2pdf or pdflatex). The PDF file will
-# contain links (just like the HTML output) instead of page references. This
-# makes the output suitable for online browsing using a PDF viewer.
-# The default value is: YES.
-# This tag requires that the tag GENERATE_LATEX is set to YES.
-
-PDF_HYPERLINKS         = YES
-
-# If the USE_PDFLATEX tag is set to YES, doxygen will use pdflatex to generate
-# the PDF file directly from the LaTeX files. Set this option to YES, to get a
-# higher quality PDF documentation.
-# The default value is: YES.
-# This tag requires that the tag GENERATE_LATEX is set to YES.
-
-USE_PDFLATEX           = YES
-
-# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \batchmode
-# command to the generated LaTeX files. This will instruct LaTeX to keep running
-# if errors occur, instead of asking the user for help. This option is also used
-# when generating formulas in HTML.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_LATEX is set to YES.
-
-LATEX_BATCHMODE        = NO
-
-# If the LATEX_HIDE_INDICES tag is set to YES then doxygen will not include the
-# index chapters (such as File Index, Compound Index, etc.) in the output.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_LATEX is set to YES.
-
-LATEX_HIDE_INDICES     = NO
-
-# If the LATEX_SOURCE_CODE tag is set to YES then doxygen will include source
-# code with syntax highlighting in the LaTeX output.
-#
-# Note that which sources are shown also depends on other settings such as
-# SOURCE_BROWSER.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_LATEX is set to YES.
-
-LATEX_SOURCE_CODE      = NO
-
-# The LATEX_BIB_STYLE tag can be used to specify the style to use for the
-# bibliography, e.g. plainnat, or ieeetr. See
-# http://en.wikipedia.org/wiki/BibTeX and \cite for more info.
-# The default value is: plain.
-# This tag requires that the tag GENERATE_LATEX is set to YES.
-
-LATEX_BIB_STYLE        = plain
-
-# If the LATEX_TIMESTAMP tag is set to YES then the footer of each generated
-# page will contain the date and time when the page was generated. Setting this
-# to NO can help when comparing the output of multiple runs.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_LATEX is set to YES.
-
-LATEX_TIMESTAMP        = NO
-
-#---------------------------------------------------------------------------
-# Configuration options related to the RTF output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_RTF tag is set to YES, doxygen will generate RTF output. The
-# RTF output is optimized for Word 97 and may not look too pretty with other RTF
-# readers/editors.
-# The default value is: NO.
-
-GENERATE_RTF           = NO
-
-# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. If a
-# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
-# it.
-# The default directory is: rtf.
-# This tag requires that the tag GENERATE_RTF is set to YES.
-
-RTF_OUTPUT             = rtf
-
-# If the COMPACT_RTF tag is set to YES, doxygen generates more compact RTF
-# documents. This may be useful for small projects and may help to save some
-# trees in general.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_RTF is set to YES.
-
-COMPACT_RTF            = NO
-
-# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated will
-# contain hyperlink fields. The RTF file will contain links (just like the HTML
-# output) instead of page references. This makes the output suitable for online
-# browsing using Word or some other Word compatible readers that support those
-# fields.
-#
-# Note: WordPad (write) and others do not support links.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_RTF is set to YES.
-
-RTF_HYPERLINKS         = NO
-
-# Load stylesheet definitions from file. Syntax is similar to doxygen's config
-# file, i.e. a series of assignments. You only have to provide replacements,
-# missing definitions are set to their default value.
-#
-# See also section "Doxygen usage" for information on how to generate the
-# default style sheet that doxygen normally uses.
-# This tag requires that the tag GENERATE_RTF is set to YES.
-
-RTF_STYLESHEET_FILE    = 
-
-# Set optional variables used in the generation of an RTF document. Syntax is
-# similar to doxygen's config file. A template extensions file can be generated
-# using doxygen -e rtf extensionFile.
-# This tag requires that the tag GENERATE_RTF is set to YES.
-
-RTF_EXTENSIONS_FILE    = 
-
-# If the RTF_SOURCE_CODE tag is set to YES then doxygen will include source code
-# with syntax highlighting in the RTF output.
-#
-# Note that which sources are shown also depends on other settings such as
-# SOURCE_BROWSER.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_RTF is set to YES.
-
-RTF_SOURCE_CODE        = NO
-
-#---------------------------------------------------------------------------
-# Configuration options related to the man page output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_MAN tag is set to YES, doxygen will generate man pages for
-# classes and files.
-# The default value is: NO.
-
-GENERATE_MAN           = NO
-
-# The MAN_OUTPUT tag is used to specify where the man pages will be put. If a
-# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
-# it. A directory man3 will be created inside the directory specified by
-# MAN_OUTPUT.
-# The default directory is: man.
-# This tag requires that the tag GENERATE_MAN is set to YES.
-
-MAN_OUTPUT             = man
-
-# The MAN_EXTENSION tag determines the extension that is added to the generated
-# man pages. In case the manual section does not start with a number, the number
-# 3 is prepended. The dot (.) at the beginning of the MAN_EXTENSION tag is
-# optional.
-# The default value is: .3.
-# This tag requires that the tag GENERATE_MAN is set to YES.
-
-MAN_EXTENSION          = .3
-
-# The MAN_SUBDIR tag determines the name of the directory created within
-# MAN_OUTPUT in which the man pages are placed. If defaults to man followed by
-# MAN_EXTENSION with the initial . removed.
-# This tag requires that the tag GENERATE_MAN is set to YES.
-
-MAN_SUBDIR             = 
-
-# If the MAN_LINKS tag is set to YES and doxygen generates man output, then it
-# will generate one additional man file for each entity documented in the real
-# man page(s). These additional files only source the real man page, but without
-# them the man command would be unable to find the correct page.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_MAN is set to YES.
-
-MAN_LINKS              = NO
-
-#---------------------------------------------------------------------------
-# Configuration options related to the XML output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_XML tag is set to YES, doxygen will generate an XML file that
-# captures the structure of the code including all documentation.
-# The default value is: NO.
-
-GENERATE_XML           = NO
-
-# The XML_OUTPUT tag is used to specify where the XML pages will be put. If a
-# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
-# it.
-# The default directory is: xml.
-# This tag requires that the tag GENERATE_XML is set to YES.
-
-XML_OUTPUT             = xml
-
-# If the XML_PROGRAMLISTING tag is set to YES, doxygen will dump the program
-# listings (including syntax highlighting and cross-referencing information) to
-# the XML output. Note that enabling this will significantly increase the size
-# of the XML output.
-# The default value is: YES.
-# This tag requires that the tag GENERATE_XML is set to YES.
-
-XML_PROGRAMLISTING     = YES
-
-#---------------------------------------------------------------------------
-# Configuration options related to the DOCBOOK output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_DOCBOOK tag is set to YES, doxygen will generate Docbook files
-# that can be used to generate PDF.
-# The default value is: NO.
-
-GENERATE_DOCBOOK       = NO
-
-# The DOCBOOK_OUTPUT tag is used to specify where the Docbook pages will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be put in
-# front of it.
-# The default directory is: docbook.
-# This tag requires that the tag GENERATE_DOCBOOK is set to YES.
-
-DOCBOOK_OUTPUT         = docbook
-
-# If the DOCBOOK_PROGRAMLISTING tag is set to YES, doxygen will include the
-# program listings (including syntax highlighting and cross-referencing
-# information) to the DOCBOOK output. Note that enabling this will significantly
-# increase the size of the DOCBOOK output.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_DOCBOOK is set to YES.
-
-DOCBOOK_PROGRAMLISTING = NO
-
-#---------------------------------------------------------------------------
-# Configuration options for the AutoGen Definitions output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_AUTOGEN_DEF tag is set to YES, doxygen will generate an
-# AutoGen Definitions (see http://autogen.sf.net) file that captures the
-# structure of the code including all documentation. Note that this feature is
-# still experimental and incomplete at the moment.
-# The default value is: NO.
-
-GENERATE_AUTOGEN_DEF   = NO
-
-#---------------------------------------------------------------------------
-# Configuration options related to the Perl module output
-#---------------------------------------------------------------------------
-
-# If the GENERATE_PERLMOD tag is set to YES, doxygen will generate a Perl module
-# file that captures the structure of the code including all documentation.
-#
-# Note that this feature is still experimental and incomplete at the moment.
-# The default value is: NO.
-
-GENERATE_PERLMOD       = NO
-
-# If the PERLMOD_LATEX tag is set to YES, doxygen will generate the necessary
-# Makefile rules, Perl scripts and LaTeX code to be able to generate PDF and DVI
-# output from the Perl module output.
-# The default value is: NO.
-# This tag requires that the tag GENERATE_PERLMOD is set to YES.
-
-PERLMOD_LATEX          = NO
-
-# If the PERLMOD_PRETTY tag is set to YES, the Perl module output will be nicely
-# formatted so it can be parsed by a human reader. This is useful if you want to
-# understand what is going on. On the other hand, if this tag is set to NO, the
-# size of the Perl module output will be much smaller and Perl will parse it
-# just the same.
-# The default value is: YES.
-# This tag requires that the tag GENERATE_PERLMOD is set to YES.
-
-PERLMOD_PRETTY         = YES
-
-# The names of the make variables in the generated doxyrules.make file are
-# prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. This is useful
-# so different doxyrules.make files included by the same Makefile don't
-# overwrite each other's variables.
-# This tag requires that the tag GENERATE_PERLMOD is set to YES.
-
-PERLMOD_MAKEVAR_PREFIX = 
-
-#---------------------------------------------------------------------------
-# Configuration options related to the preprocessor
-#---------------------------------------------------------------------------
-
-# If the ENABLE_PREPROCESSING tag is set to YES, doxygen will evaluate all
-# C-preprocessor directives found in the sources and include files.
-# The default value is: YES.
-
-ENABLE_PREPROCESSING   = YES
-
-# If the MACRO_EXPANSION tag is set to YES, doxygen will expand all macro names
-# in the source code. If set to NO, only conditional compilation will be
-# performed. Macro expansion can be done in a controlled way by setting
-# EXPAND_ONLY_PREDEF to YES.
-# The default value is: NO.
-# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
-
-MACRO_EXPANSION        = NO
-
-# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES then
-# the macro expansion is limited to the macros specified with the PREDEFINED and
-# EXPAND_AS_DEFINED tags.
-# The default value is: NO.
-# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
-
-EXPAND_ONLY_PREDEF     = NO
-
-# If the SEARCH_INCLUDES tag is set to YES, the include files in the
-# INCLUDE_PATH will be searched if a #include is found.
-# The default value is: YES.
-# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
-
-SEARCH_INCLUDES        = YES
-
-# The INCLUDE_PATH tag can be used to specify one or more directories that
-# contain include files that are not input files but should be processed by the
-# preprocessor.
-# This tag requires that the tag SEARCH_INCLUDES is set to YES.
-
-INCLUDE_PATH           = 
-
-# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
-# patterns (like *.h and *.hpp) to filter out the header-files in the
-# directories. If left blank, the patterns specified with FILE_PATTERNS will be
-# used.
-# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
-
-INCLUDE_FILE_PATTERNS  = 
-
-# The PREDEFINED tag can be used to specify one or more macro names that are
-# defined before the preprocessor is started (similar to the -D option of e.g.
-# gcc). The argument of the tag is a list of macros of the form: name or
-# name=definition (no spaces). If the definition and the "=" are omitted, "=1"
-# is assumed. To prevent a macro definition from being undefined via #undef or
-# recursively expanded use the := operator instead of the = operator.
-# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
-
-PREDEFINED             = 
-
-# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then this
-# tag can be used to specify a list of macro names that should be expanded. The
-# macro definition that is found in the sources will be used. Use the PREDEFINED
-# tag if you want to use a different macro definition that overrules the
-# definition found in the source code.
-# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
-
-EXPAND_AS_DEFINED      = 
-
-# If the SKIP_FUNCTION_MACROS tag is set to YES then doxygen's preprocessor will
-# remove all references to function-like macros that are alone on a line, have
-# an all uppercase name, and do not end with a semicolon. Such function macros
-# are typically used for boiler-plate code, and will confuse the parser if not
-# removed.
-# The default value is: YES.
-# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
-
-SKIP_FUNCTION_MACROS   = YES
-
-#---------------------------------------------------------------------------
-# Configuration options related to external references
-#---------------------------------------------------------------------------
-
-# The TAGFILES tag can be used to specify one or more tag files. For each tag
-# file the location of the external documentation should be added. The format of
-# a tag file without this location is as follows:
-# TAGFILES = file1 file2 ...
-# Adding location for the tag files is done as follows:
-# TAGFILES = file1=loc1 "file2 = loc2" ...
-# where loc1 and loc2 can be relative or absolute paths or URLs. See the
-# section "Linking to external documentation" for more information about the use
-# of tag files.
-# Note: Each tag file must have a unique name (where the name does NOT include
-# the path). If a tag file is not located in the directory in which doxygen is
-# run, you must also specify the path to the tagfile here.
-
-TAGFILES               = 
-
-# When a file name is specified after GENERATE_TAGFILE, doxygen will create a
-# tag file that is based on the input files it reads. See section "Linking to
-# external documentation" for more information about the usage of tag files.
-
-GENERATE_TAGFILE       = 
-
-# If the ALLEXTERNALS tag is set to YES, all external class will be listed in
-# the class index. If set to NO, only the inherited external classes will be
-# listed.
-# The default value is: NO.
-
-ALLEXTERNALS           = NO
-
-# If the EXTERNAL_GROUPS tag is set to YES, all external groups will be listed
-# in the modules index. If set to NO, only the current project's groups will be
-# listed.
-# The default value is: YES.
-
-EXTERNAL_GROUPS        = YES
-
-# If the EXTERNAL_PAGES tag is set to YES, all external pages will be listed in
-# the related pages index. If set to NO, only the current project's pages will
-# be listed.
-# The default value is: YES.
-
-EXTERNAL_PAGES         = YES
-
-# The PERL_PATH should be the absolute path and name of the perl script
-# interpreter (i.e. the result of 'which perl').
-# The default file (with absolute path) is: /usr/bin/perl.
-
-PERL_PATH              = /usr/bin/perl
-
-#---------------------------------------------------------------------------
-# Configuration options related to the dot tool
-#---------------------------------------------------------------------------
-
-# If the CLASS_DIAGRAMS tag is set to YES, doxygen will generate a class diagram
-# (in HTML and LaTeX) for classes with base or super classes. Setting the tag to
-# NO turns the diagrams off. Note that this option also works with HAVE_DOT
-# disabled, but it is recommended to install and use dot, since it yields more
-# powerful graphs.
-# The default value is: YES.
-
-CLASS_DIAGRAMS         = YES
-
-# You can define message sequence charts within doxygen comments using the \msc
-# command. Doxygen will then run the mscgen tool (see:
-# http://www.mcternan.me.uk/mscgen/)) to produce the chart and insert it in the
-# documentation. The MSCGEN_PATH tag allows you to specify the directory where
-# the mscgen tool resides. If left empty the tool is assumed to be found in the
-# default search path.
-
-MSCGEN_PATH            = 
-
-# You can include diagrams made with dia in doxygen documentation. Doxygen will
-# then run dia to produce the diagram and insert it in the documentation. The
-# DIA_PATH tag allows you to specify the directory where the dia binary resides.
-# If left empty dia is assumed to be found in the default search path.
-
-DIA_PATH               = 
-
-# If set to YES the inheritance and collaboration graphs will hide inheritance
-# and usage relations if the target is undocumented or is not a class.
-# The default value is: YES.
-
-HIDE_UNDOC_RELATIONS   = YES
-
-# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is
-# available from the path. This tool is part of Graphviz (see:
-# http://www.graphviz.org/), a graph visualization toolkit from AT&T and Lucent
-# Bell Labs. The other options in this section have no effect if this option is
-# set to NO
-# The default value is: NO.
-
-HAVE_DOT               = YES
-
-# The DOT_NUM_THREADS specifies the number of dot invocations doxygen is allowed
-# to run in parallel. When set to 0 doxygen will base this on the number of
-# processors available in the system. You can set it explicitly to a value
-# larger than 0 to get control over the balance between CPU load and processing
-# speed.
-# Minimum value: 0, maximum value: 32, default value: 0.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-DOT_NUM_THREADS        = 0
-
-# When you want a differently looking font in the dot files that doxygen
-# generates you can specify the font name using DOT_FONTNAME. You need to make
-# sure dot is able to find the font, which can be done by putting it in a
-# standard location or by setting the DOTFONTPATH environment variable or by
-# setting DOT_FONTPATH to the directory containing the font.
-# The default value is: Helvetica.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-DOT_FONTNAME           = Calibri
-
-# The DOT_FONTSIZE tag can be used to set the size (in points) of the font of
-# dot graphs.
-# Minimum value: 4, maximum value: 24, default value: 10.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-DOT_FONTSIZE           = 10
-
-# By default doxygen will tell dot to use the default font as specified with
-# DOT_FONTNAME. If you specify a different font using DOT_FONTNAME you can set
-# the path where dot can find it using this tag.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-DOT_FONTPATH           = 
-
-# If the CLASS_GRAPH tag is set to YES then doxygen will generate a graph for
-# each documented class showing the direct and indirect inheritance relations.
-# Setting this tag to YES will force the CLASS_DIAGRAMS tag to NO.
-# The default value is: YES.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-CLASS_GRAPH            = YES
-
-# If the COLLABORATION_GRAPH tag is set to YES then doxygen will generate a
-# graph for each documented class showing the direct and indirect implementation
-# dependencies (inheritance, containment, and class references variables) of the
-# class with other documented classes.
-# The default value is: YES.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-COLLABORATION_GRAPH    = YES
-
-# If the GROUP_GRAPHS tag is set to YES then doxygen will generate a graph for
-# groups, showing the direct groups dependencies.
-# The default value is: YES.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-GROUP_GRAPHS           = YES
-
-# If the UML_LOOK tag is set to YES, doxygen will generate inheritance and
-# collaboration diagrams in a style similar to the OMG's Unified Modeling
-# Language.
-# The default value is: NO.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-UML_LOOK               = NO
-
-# If the UML_LOOK tag is enabled, the fields and methods are shown inside the
-# class node. If there are many fields or methods and many nodes the graph may
-# become too big to be useful. The UML_LIMIT_NUM_FIELDS threshold limits the
-# number of items for each type to make the size more manageable. Set this to 0
-# for no limit. Note that the threshold may be exceeded by 50% before the limit
-# is enforced. So when you set the threshold to 10, up to 15 fields may appear,
-# but if the number exceeds 15, the total amount of fields shown is limited to
-# 10.
-# Minimum value: 0, maximum value: 100, default value: 10.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-UML_LIMIT_NUM_FIELDS   = 10
-
-# If the TEMPLATE_RELATIONS tag is set to YES then the inheritance and
-# collaboration graphs will show the relations between templates and their
-# instances.
-# The default value is: NO.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-TEMPLATE_RELATIONS     = NO
-
-# If the INCLUDE_GRAPH, ENABLE_PREPROCESSING and SEARCH_INCLUDES tags are set to
-# YES then doxygen will generate a graph for each documented file showing the
-# direct and indirect include dependencies of the file with other documented
-# files.
-# The default value is: YES.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-INCLUDE_GRAPH          = YES
-
-# If the INCLUDED_BY_GRAPH, ENABLE_PREPROCESSING and SEARCH_INCLUDES tags are
-# set to YES then doxygen will generate a graph for each documented file showing
-# the direct and indirect include dependencies of the file with other documented
-# files.
-# The default value is: YES.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-INCLUDED_BY_GRAPH      = YES
-
-# If the CALL_GRAPH tag is set to YES then doxygen will generate a call
-# dependency graph for every global function or class method.
-#
-# Note that enabling this option will significantly increase the time of a run.
-# So in most cases it will be better to enable call graphs for selected
-# functions only using the \callgraph command. Disabling a call graph can be
-# accomplished by means of the command \hidecallgraph.
-# The default value is: NO.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-CALL_GRAPH             = YES
-
-# If the CALLER_GRAPH tag is set to YES then doxygen will generate a caller
-# dependency graph for every global function or class method.
-#
-# Note that enabling this option will significantly increase the time of a run.
-# So in most cases it will be better to enable caller graphs for selected
-# functions only using the \callergraph command. Disabling a caller graph can be
-# accomplished by means of the command \hidecallergraph.
-# The default value is: NO.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-CALLER_GRAPH           = YES
-
-# If the GRAPHICAL_HIERARCHY tag is set to YES then doxygen will graphical
-# hierarchy of all classes instead of a textual one.
-# The default value is: YES.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-GRAPHICAL_HIERARCHY    = YES
-
-# If the DIRECTORY_GRAPH tag is set to YES then doxygen will show the
-# dependencies a directory has on other directories in a graphical way. The
-# dependency relations are determined by the #include relations between the
-# files in the directories.
-# The default value is: YES.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-DIRECTORY_GRAPH        = YES
-
-# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images
-# generated by dot. For an explanation of the image formats see the section
-# output formats in the documentation of the dot tool (Graphviz (see:
-# http://www.graphviz.org/)).
-# Note: If you choose svg you need to set HTML_FILE_EXTENSION to xhtml in order
-# to make the SVG files visible in IE 9+ (other browsers do not have this
-# requirement).
-# Possible values are: png, jpg, gif, svg, png:gd, png:gd:gd, png:cairo,
-# png:cairo:gd, png:cairo:cairo, png:cairo:gdiplus, png:gdiplus and
-# png:gdiplus:gdiplus.
-# The default value is: png.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-DOT_IMAGE_FORMAT       = png
-
-# If DOT_IMAGE_FORMAT is set to svg, then this option can be set to YES to
-# enable generation of interactive SVG images that allow zooming and panning.
-#
-# Note that this requires a modern browser other than Internet Explorer. Tested
-# and working are Firefox, Chrome, Safari, and Opera.
-# Note: For IE 9+ you need to set HTML_FILE_EXTENSION to xhtml in order to make
-# the SVG files visible. Older versions of IE do not have SVG support.
-# The default value is: NO.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-INTERACTIVE_SVG        = NO
-
-# The DOT_PATH tag can be used to specify the path where the dot tool can be
-# found. If left blank, it is assumed the dot tool can be found in the path.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-DOT_PATH               = /usr/local/bin/dot
-
-# The DOTFILE_DIRS tag can be used to specify one or more directories that
-# contain dot files that are included in the documentation (see the \dotfile
-# command).
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-DOTFILE_DIRS           = 
-
-# The MSCFILE_DIRS tag can be used to specify one or more directories that
-# contain msc files that are included in the documentation (see the \mscfile
-# command).
-
-MSCFILE_DIRS           = 
-
-# The DIAFILE_DIRS tag can be used to specify one or more directories that
-# contain dia files that are included in the documentation (see the \diafile
-# command).
-
-DIAFILE_DIRS           = 
-
-# When using plantuml, the PLANTUML_JAR_PATH tag should be used to specify the
-# path where java can find the plantuml.jar file. If left blank, it is assumed
-# PlantUML is not used or called during a preprocessing step. Doxygen will
-# generate a warning when it encounters a \startuml command in this case and
-# will not generate output for the diagram.
-
-PLANTUML_JAR_PATH      = 
-
-# When using plantuml, the PLANTUML_CFG_FILE tag can be used to specify a
-# configuration file for plantuml.
-
-PLANTUML_CFG_FILE      = 
-
-# When using plantuml, the specified paths are searched for files specified by
-# the !include statement in a plantuml block.
-
-PLANTUML_INCLUDE_PATH  = 
-
-# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of nodes
-# that will be shown in the graph. If the number of nodes in a graph becomes
-# larger than this value, doxygen will truncate the graph, which is visualized
-# by representing a node as a red box. Note that doxygen if the number of direct
-# children of the root node in a graph is already larger than
-# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note that
-# the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH.
-# Minimum value: 0, maximum value: 10000, default value: 50.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-DOT_GRAPH_MAX_NODES    = 50
-
-# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the graphs
-# generated by dot. A depth value of 3 means that only nodes reachable from the
-# root by following a path via at most 3 edges will be shown. Nodes that lay
-# further from the root node will be omitted. Note that setting this option to 1
-# or 2 may greatly reduce the computation time needed for large code bases. Also
-# note that the size of a graph can be further restricted by
-# DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction.
-# Minimum value: 0, maximum value: 1000, default value: 0.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-MAX_DOT_GRAPH_DEPTH    = 0
-
-# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent
-# background. This is disabled by default, because dot on Windows does not seem
-# to support this out of the box.
-#
-# Warning: Depending on the platform used, enabling this option may lead to
-# badly anti-aliased labels on the edges of a graph (i.e. they become hard to
-# read).
-# The default value is: NO.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-DOT_TRANSPARENT        = NO
-
-# Set the DOT_MULTI_TARGETS tag to YES to allow dot to generate multiple output
-# files in one run (i.e. multiple -o and -T options on the command line). This
-# makes dot run faster, but since only newer versions of dot (>1.8.10) support
-# this, this feature is disabled by default.
-# The default value is: NO.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-DOT_MULTI_TARGETS      = NO
-
-# If the GENERATE_LEGEND tag is set to YES doxygen will generate a legend page
-# explaining the meaning of the various boxes and arrows in the dot generated
-# graphs.
-# The default value is: YES.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-GENERATE_LEGEND        = YES
-
-# If the DOT_CLEANUP tag is set to YES, doxygen will remove the intermediate dot
-# files that are used to generate the various graphs.
-# The default value is: YES.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-DOT_CLEANUP            = YES
diff --git a/include/.FORMATCHECKED b/docs/fig/compiler_flow.png
index e69de29bb..e69de29bb 100644
--- a/include/.FORMATCHECKED
+++ b/docs/fig/compiler_flow.png
diff --git a/libs/.FORMATCHECKED b/docs/fig/nnfw_compiler_structure.png
index e69de29bb..e69de29bb 100644
--- a/libs/.FORMATCHECKED
+++ b/docs/fig/nnfw_compiler_structure.png
diff --git a/runtimes/neurun/.FORMATCHECKED b/docs/fig/nnfw_compiler_structure.pptx
index e69de29bb..e69de29bb 100644
--- a/runtimes/neurun/.FORMATCHECKED
+++ b/docs/fig/nnfw_compiler_structure.pptx
diff --git a/runtimes/pure_arm_compute/.FORMATCHECKED b/docs/fig/nnfw_components.png
index e69de29bb..e69de29bb 100644
--- a/runtimes/pure_arm_compute/.FORMATCHECKED
+++ b/docs/fig/nnfw_components.png
diff --git a/tests/.FORMATCHECKED b/docs/fig/nnfw_components.pptx
index e69de29bb..e69de29bb 100644
--- a/tests/.FORMATCHECKED
+++ b/docs/fig/nnfw_components.pptx
diff --git a/tools/.FORMATCHECKED b/docs/fig/nnfw_nativeapi_flow.png
index e69de29bb..e69de29bb 100644
--- a/tools/.FORMATCHECKED
+++ b/docs/fig/nnfw_nativeapi_flow.png
diff --git a/docs/fig/nnfw_nativeapi_flow.pptx b/docs/fig/nnfw_nativeapi_flow.pptx
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/fig/nnfw_nativeapi_flow.pptx
diff --git a/docs/fig/nnfw_nnapi_flow.png b/docs/fig/nnfw_nnapi_flow.png
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/fig/nnfw_nnapi_flow.png
diff --git a/docs/fig/nnfw_nnapi_flow.pptx b/docs/fig/nnfw_nnapi_flow.pptx
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/fig/nnfw_nnapi_flow.pptx
diff --git a/docs/fig/nnfw_runtime_behavior.png b/docs/fig/nnfw_runtime_behavior.png
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/fig/nnfw_runtime_behavior.png
diff --git a/docs/fig/nnfw_runtime_behavior.pptx b/docs/fig/nnfw_runtime_behavior.pptx
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/fig/nnfw_runtime_behavior.pptx
diff --git a/docs/fig/nnfw_runtime_structure.png b/docs/fig/nnfw_runtime_structure.png
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/fig/nnfw_runtime_structure.png
diff --git a/docs/fig/nnfw_runtime_structure.pptx b/docs/fig/nnfw_runtime_structure.pptx
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/fig/nnfw_runtime_structure.pptx
diff --git a/docs/fig/runtime_nativeapi_flow.png b/docs/fig/runtime_nativeapi_flow.png
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/fig/runtime_nativeapi_flow.png
diff --git a/docs/howto.md b/docs/howto.md
deleted file mode 100644
index 866f56115..000000000
--- a/docs/howto.md
+++ /dev/null
@@ -1,36 +0,0 @@
-## Build Requires
-
-If you are building this project, then the following modules must be installed on your system:
-
-- CMake
-- Boost C++ libraries
-
-```
-$ sudo apt-get install cmake libboost-all-dev
-```
-
-## How to use (simple) NNAPI Binding
-
-This repo provides a T/F Lite Model loader(named ``tflite_run``), and simple NNAPI binding.
-
-Let's type the following commands, and see what happens!
-```
-$ make install
-$ USE_NNAPI=1 LD_LIBRARY_PATH="$(pwd)/Product/obj/runtimes/logging:$(pwd)/Product/out/lib" Product/out/bin/tflite_run [T/F Lite Flatbuffer Model Path]
-```
-
-## How to get pre-built T/F Lite Flatbuffer models?
-Google provides several pre-built T/F Lite models. Please check [this article](https://github.com/tensorflow/tensorflow/blob/master/tensorflow/contrib/lite/g3doc/models.md)
-
-
-## Build How-to
-- [Cross building for ARM](howto/CrossBuildForArm.md)
-- [Cross building for AARCH64](howto/CrossBuildForAarch64.md)
-- [Build using prebuilt docker image](howto/HowToUseDockerImage.md)
-
-
-## Other how-to documents
-- [Building TensorFlow and TOCO from source](howto/BuildTFfromSource.md)
-- [How to setup XU3 with Ubuntu 16.04](howto/device/xu3_ubuntu.md)
-- [How to setup XU4 with Ubuntu 16.04](howto/device/xu4_ubuntu.md)
-- [How to add unittest using gtest](howto/HowToAddUnittest.md)
diff --git a/docs/howto/CrossBuildForArm.md b/docs/howto/CrossBuildForArm.md
deleted file mode 100644
index e307596d0..000000000
--- a/docs/howto/CrossBuildForArm.md
+++ /dev/null
@@ -1,107 +0,0 @@
-# Cross building for ARM
-
-## Prepare Ubuntu RootFS
-
-Install required packages
-
-```
-sudo apt-get install qemu qemu-user-static binfmt-support debootstrap
-```
-
-Use `build_rootfs.sh` script to prepare Root File System. You should have `sudo`
-
-```
-sudo ./tools/cross/build_rootfs.sh arm
-```
-- supports `arm`(default) and `arm64` architecutre for now
-- supports `xenial`(default) and `trusty` release
-
-To see the options,
-```
-./tools/cross/build_rootfs.sh -h
-```
-
-RootFS will be prepared at `tools/cross/rootfs/arm` folder.
-
-## Prepare RootFS at alternative folder
-
-Use `ROOTFS_DIR` to a full path to prepare at alternative path.
-
-```
-ROOTFS_DIR=/home/user/rootfs/arm-xenial sudo ./tools/cross/build_rootfs.sh arm
-```
-
-## Using proxy
-
-If you need to use proxy server while building the rootfs, use `--setproxy` option.
-
-```
-# for example,
-sudo ./tools/cross/build_rootfs.sh arm --setproxy="1.2.3.4:8080"
-# or
-sudo ./tools/cross/build_rootfs.sh arm --setproxy="proxy.server.com:8888"
-```
-
-This will put `apt` proxy settings in `rootfs/etc/apt/apt.conf.d/90proxy` file
-for `http`, `https` and `ftp` protocol.
-
-## Install ARM Cross Toolchain
-
-We recommend you have g++ >= 6 installed on your system because NN generated tests require it.
-
-On Ubuntu 16.04 or older, follow the next steps:
-
-```
-cd ~/your/path
-wget https://releases.linaro.org/components/toolchain/binaries/7.2-2017.11/arm-linux-gnueabihf/gcc-linaro-7.2.1-2017.11-x86_64_arm-linux-gnueabihf.tar.xz
-tar xvf gcc-linaro-7.2.1-2017.11-x86_64_arm-linux-gnueabihf.tar.xz
-echo 'PATH=~/your/path/gcc-linaro-7.2.1-2017.11-x86_64_arm-linux-gnueabihf/bin:$PATH' >> ~/.bashrc
-```
-
-On Ubuntu 18.04 LTS, you can install using `apt-get`.
-Choose g++ version whatever you prefer: 6, 7 or 8.
-
-```
-sudo apt-get install g++-{6,7,8}-arm-linux-gnueabihf
-```
-
-Make sure you get `libstdc++.so` updated on your target with your new toolchain's corresponding one.
-
-For example, if you installed gcc-linaro-7.2.1-2017.11 above, do
-
-```
-wget https://releases.linaro.org/components/toolchain/binaries/7.2-2017.11/arm-linux-gnueabihf/runtime-gcc-linaro-7.2.1-2017.11-arm-linux-gnueabihf.tar.xz
-tar xvf runtime-gcc-linaro-7.2.1-2017.11-arm-linux-gnueabihf.tar.xz
-```
-
-Then, copy `libstdc++.so.6.0.24` into `/usr/lib/arm-linux-gnueabihf`, and update symbolic links on your device.
-
-## Build and install ARM Compute Library
-
-```
-CROSS_BUILD=1 TARGET_ARCH=armv7l make acl
-```
-Mostly you only need once of ACL build. This will build and install to `Product/(target_arch-os)/out/bin` folder.
-- this is required for ARM on Ubuntu
-
-## Build nnfw
-
-Give `TARGET_ARCH` variable to set the target architecture
-
-```
-CROSS_BUILD=1 TARGET_ARCH=armv7l make all install
-```
-- supports `armv7l` and `aarch64` for now
-
-If you used `ROOTFS_DIR` to prepare in alternative folder, you should also give this to makefile.
-
-```
-ROOTFS_DIR=ROOTFS_ARM=/path/to/your/rootfs/arm \
-CROSS_BUILD=1 TARGET_ARCH=armv7l make all install
-```
-
-## Run test
-
-```
- ./tests/scripts/test_driver.sh --artifactpath=.
-```
diff --git a/docs/howto/HowToUseDockerImage.md b/docs/howto/HowToUseDockerImage.md
deleted file mode 100644
index a28502cf0..000000000
--- a/docs/howto/HowToUseDockerImage.md
+++ /dev/null
@@ -1,168 +0,0 @@
-# How to use docker image of nnfw
-
-We have a docker image to build `nnfw` repo.
-
-This docker image is built from https://github.sec.samsung.net/STAR/nnfw/blob/master/docker/Dockerfile and based on Ubuntu 16.04.
-And prebuilt docker image is available from Samsung private docker registry.
-
-This document describes how to use prebuilt docker image when developing `nnfw`.
-
-## How to install docker
-
-Follow [Installing Docker](https://docs.docker.com/)
-
-- For Ubuntu, follow [Installing Docker on Ubuntu](https://docs.docker.com/install/linux/docker-ce/ubuntu/)
-
-These are the actual steps to install using apt package manager:
-```
-$ sudo apt-get install \
-     apt-transport-https \
-     ca-certificates \
-     curl \
-     software-properties-common
-$ curl -fsSL https://download.docker.com/linux/ubuntu/gpg | sudo apt-key add -
-$ sudo apt-key fingerprint 0EBFCD88
-```
-```
-$ sudo add-apt-repository \
-     "deb [arch=amd64] https://download.docker.com/linux/ubuntu \
-     $(lsb_release -cs) \
-	 stable"
-$ sudo apt-get update
-```
-```
-$ sudo apt-get install docker-ce
-```
-
-## Configure docker daemon
-
-1. Set HTTP/HTTPS proxy
-
-    * For Ubuntu, follow [Setting HTTP/HTTPS proxy environment variables](https://docs.docker.com/v17.09/engine/admin/systemd/#httphttps-proxy)
-
-If you are behind an HTTP or HTTPS proxy server, you will need to add this configuration in the Docker systemd service file.
-These are the actual steps to set an HTTP/HTTPS proxy environment variable:
-```
-$ sudo mkdir -p /etc/systemd/system/docker.service.d
-$ sudo vi etc/systemd/system/docker.service.d/http-proxy.conf
-```
-```
-[Service]
-Environment="HTTP_PROXY=http://10.112.1.184:8080/" "HTTPS_PROXY=https://10.112.1.184:8080/" "NO_PROXY=localhost,127.0.0.1"
-```
-```
-$ sudo systemctl daemon-reload
-$ sudo systemctl restart docker
-$ systemctl show --property=Environment docker
-```
-
-2. Edit configuration file of docker daemon
-
-First you have to add Samsung private docker reigstry to your docker daemon.
-Depending on your docker daemon installed, there are two ways of configuration.
-
-
-If there is a `/etc/default/docker`, please edit the file as below.
-```
-$ sudo vi /etc/default/docker
-
-DOCKER_OPTS="--insecure-registry docker.sec.samsung.net:5000"
-```
-
-If there is a `/etc/docker/daemon.json`, please edit the file as below.
-```
-{
-  ...,
-  "insecure-registries": [..., "docker.sec.samsung.net:5000"]
-}
-```
-
-3. Then restart docker daemon as below.
-
-```
-$ sudo service docker restart     // Ubuntu 14.04
-
-or
-
-$ sudo systemctl restart docker   // Ubuntu 16.04
-```
-
-## Install docker image of `nnfw`
-
-Let's pull docker image for `nnfw` repo and tag it to `nnfw_docker:latest`
-
-```
-$ docker pull docker.sec.samsung.net:5000/star/nnfw/nnfw_docker:1.5
-$ docker tag docker.sec.samsung.net:5000/star/nnfw/nnfw_docker:1.5 nnfw_docker:latest
-```
-
-If you would like to build `nnfw` tizen package using gbs, pull `nnfw_docker_tizen`.
-```
-$ docker pull docker.sec.samsung.net:5000/star/nnfw/nnfw_docker_tizen:1.2
-$ docker tag docker.sec.samsung.net:5000/star/nnfw/nnfw_docker_tizen:1.2 nnfw_docker_tizen:latest
-```
-
-## Build docker image instead of pull
-
-You can build docker image in your environment instead of pull docker image from server.
-
-```
-$ cd nnfw
-$ ./run build-docker
-```
-
-Default docker image name is `nnfw_docker`. If you want to change image name and/or tag, use `-t` or `--tag` option
-
-```
-$ cd nnfw
-$ ./run build-docker -t nnfw_docker_test
-```
-
-You can use options supported by `docker build` command (ex. `--network` option)
-
-```
-$ cd nnfw
-$ ./run build-docker --network=host --no-cache
-```
-
-If you want to build docker image for tizen build, use `--tizen` option
-
-```
-```
-$ cd nnfw
-$ ./run build-docker --tizen
-```
-```
-
-
-## Use docker image to build `nnfw`
-Three different targets for `nnfw` can be built using docker image.
-
-1. Build `nnfw` for `x86_64` target
-```
-$ cd nnfw
-$ docker run --rm -v $(pwd):/opt/nnfw -w /opt/nnfw nnfw_docker make install
-```
-or use `docker_run_test.sh` for convenience as below.
-```
-$ cd nnfw
-$ ./run docker_run_test.sh
-```
-You can find built artifacts at `nnfw/Product/x86_64-linux.debug`.
-
-2. Cross build `nnfw` for ARM on x86_64 host
-
-You should prepare RootFS, following [Cross Building for ARM](https://github.sec.samsung.net/STAR/nnfw/blob/master/docs/howto/CrossBuildForArm.md) except ACL build and cross build steps. Then execute below commands. If your RootFS directory is different with below directory, change it to correct path and ensure the path is absolute.
-```
-$ cd nnfw
-$ ROOTFS_DIR=$(pwd)/tools/cross/rootfs/arm \
-./run docker_build_cross_arm_ubuntu.sh
-```
-You can find built artifacts at `nnfw/Product/armv7l-linux.debug/`.
-
-3. Build `nnfw` for Tizen ARM package on x86_64 host
-```
-$ cd nnfw
-$ ./run docker_gbs_build.sh
-```
-You can find built artifacts at `Product/out/rpm`.
diff --git a/docs/nncc/design.md b/docs/nncc/design.md
new file mode 100644
index 000000000..a01d6fec4
--- /dev/null
+++ b/docs/nncc/design.md
@@ -0,0 +1,10 @@
+This document describes basic principles behind _nncc_ design.
+
+## Goals and non-goals
+
+As mentioned in README.md, _nncc_ aims to provide a general framework for compiling a given NN model
+to an artifact that runs on a target device (such as CPU, GPU, or NPU).
+
+More specifically, _nncc_ aims to create an efficient artifact (in terms of throughput or memory)
+for a specific target via focusing on a restricted set of NN operations. It is not the goal of _nncc_
+to support all the known NN operations although _nncc_ will keep trying to broaden its coverage.
diff --git a/docs/nncc/getting_started.md b/docs/nncc/getting_started.md
new file mode 100644
index 000000000..8f01bd2a4
--- /dev/null
+++ b/docs/nncc/getting_started.md
@@ -0,0 +1,73 @@
+#### Prerequisites
+
+The following toolchains are needed to build _nncc_ project:
+ - CMake (>= 3.1)
+ - g++ (>= 4.8)
+
+#### How to build _nncc_ with docker
+
+_nncc_ provides ``Dockerfile`` in order to make it easy to setup development environment.
+
+One may build ``nncc`` docker image with the following command:
+```
+nncc$ cat infra/docker/Dockerfile | docker build -t nncc -
+...
+```
+
+By default, this ``Dockerfile`` uses "archive.ubuntu.com" which may be quite slow. One may use mirror site via ``UBUNTU_MIRROR`` variable.
+For example, one may enable the use of ``kr.archive.ubuntu.com`` via the following command
+```
+nncc$ cat infra/docker/Dockerfile | docker build --build-arg UBUNTU_MIRROR="kr.archive.ubuntu.com" -t nncc -
+...
+```
+
+One who works behind proxy should provide proxy configuration via the following command:
+```
+nncc$ cat infra/docker/Dockerfile | docker build --build-arg HTTP_PROXY=<HTTP proxy address> --build-arg HTTPS_PROXY=<HTTPS proxy address> -t nncc -
+...
+```
+One may use simplified command if ``HTTP_PROXY`` and ``HTTPS_PROXY`` environment variables are already set:
+```
+nncc$ export
+...
+declare -x HTTP_PROXY=...
+declare -x HTTPS_PROXY=...
+...
+nncc$ cat infra/docker/Dockerfile | docker build --build-arg HTTP_PROXY --build-arg HTTPS_PROXY -t nncc -
+...
+```
+
+Note that these configurations are orthogonal to each other. One may freely combine these options as follows:
+```
+nncc$ cat infra/docker/Dockerfile | docker build --build-arg HTTP_PROXY --build-arg HTTPS_PROXY --build-arg UBUNTU_MIRROR="kr.archive.ubuntu.com" -t nncc -
+```
+
+One may easily build _nncc_ with the following command once ``nncc`` docker image is built.
+```
+nncc$ ./nncc docker-nncc configure
+...
+nncc$ ./nncc docker-nncc build
+...
+```
+
+#### How to build _nncc_ with ninja
+
+You may build _nncc_ with ninja (instead of make) if ninja is available. Please try the following commands:
+```
+nncc$ rm -rf build
+nncc$ ./nncc configure -G Ninja
+nncc$ ./nncc build
+```
+
+#### How to build and run _nncc_ unittests
+
+_nncc_ includes various unittests to check its correctness. One may build and run these unittests via the following command:
+```
+nncc$ rm -rf build
+nncc$ ./nncc configure -DENABLE_TEST=1
+nncc$ ./nncc build
+nncc$ ./nncc test
+```
+
+**NOTE** As _nncc_ unittests are implemented on top of google test framework (_gtest_), _nncc_ build script will automatically download _gtest_ 1.8 from public GitHub.
+If you are not able to access public GitHub from your machine, please override download URL via ``GTEST_URL`` environment variable.
diff --git a/docs/nncc/images/nncc_components.png b/docs/nncc/images/nncc_components.png
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/nncc/images/nncc_components.png
diff --git a/docs/nncc/images/nncc_idef0_a0.png b/docs/nncc/images/nncc_idef0_a0.png
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/nncc/images/nncc_idef0_a0.png
diff --git a/docs/nncc/images/nncc_idef0_a1.png b/docs/nncc/images/nncc_idef0_a1.png
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/nncc/images/nncc_idef0_a1.png
diff --git a/docs/nncc/images/nncc_idef0_a12.png b/docs/nncc/images/nncc_idef0_a12.png
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/nncc/images/nncc_idef0_a12.png
diff --git a/docs/nncc/project/detailed_level_design.md b/docs/nncc/project/detailed_level_design.md
new file mode 100644
index 000000000..50fb8fa13
--- /dev/null
+++ b/docs/nncc/project/detailed_level_design.md
@@ -0,0 +1,329 @@
+# SW Detailed Level Design
+
+**Revision history**
+
+| Ver. | Date       | Contents          | Author            | Approver     |
+| ---- | ---------- | ----------------- | ----------------- | ------------ |
+| 0.1  | 2018.06.20 | Initial version   | Vostokov Sergey   | Sung-Jae Lee |
+| 0.2  | 2018.06.21 | SE member review  | Alexey Kondrashov |              |
+| 1.0  | 2018.06.22 | Final DR1 version | Vostokov Sergey   | Sung-Jae Lee |
+
+**Terminology and Abbreviation**
+
+|              |                                                               |
+| ------------ | ------------------------------------------------------------- |
+| OS           | Operating System                                              |
+| OS API       | Application interface of OS                                   |
+| HW           | Hardware                                                      |
+| SW           | Software                                                      |
+| NN           | Neural Network                                                |
+| NN model     | Neural network model (Instance of NN built with ML framework) |
+| NN compiler  | The compiler for neural network                               |
+| ML framework | The machine learning framework                                |
+| TF/TF Lite   | Tensorflow/Tensorflow Lite ML framework                       |
+| IR           | Intermediate representation                                   |
+| CI/CI system | Continuous integration system                                 |
+| UI           | The user interface                                            |
+| GUI          | The graphical user interface                                  |
+| CLI          | The command-line interface                                    |
+
+**References**
+
+\[1\] Vostokov Sergey, [SW Requirements Specification](requirements_specification.md)
+
+\[2\] Vostokov Sergey, [SW High-Level Design](high_level_design.md)
+
+## Overview
+
+### Scope
+
+The main goal of the project is to develop a compiler for neural
+networks to produce executable artefact for specified SW and HW
+platform.
+
+The development scope includes the following components:
+
+  - Develop importer module to parse, verify and represent NN model for
+    further optimization and compilation
+  - Develop code emitters to produce executable binary for CPU and GPU
+
+  
+**2018 year goals:**
+
+  - Support TensorFlow Lite NN model format
+  - Support Caffe NN model format
+  - Support Caffe2 NN model format (Optional)
+  - Support compilation of MobileNet NN
+  - Support compilation of Inception v3 NN
+  - Support ARM CPU
+  - Support ARM GPU (Mali)
+  - Support Tizen OS
+  - Support SmartMachine OS
+(Optional)
+
+| Product             | Target Model Name              | Comment          |
+| ------------------- | ------------------------------ | ---------------- |
+| Tizen phone         | Tizen TM2                      | Reference device |
+| Tizen device        | Odroid XU4                     | Reference board  |
+| SmartMachine target | Microvision mv8890, exynos8890 | Reference device |
+
+Table 1-1. Target Model
+
+### Design Consideration
+
+Deep learning software demands reliability and performance. The common
+approach which comes from the history is to develop a SW framework
+(machine learning framework) which would compute each step of the neural
+network inference process using supported hardware. This approach is
+used in many popular solutions like Google Tensorflow/Tensorflow Lite,
+Caffe/2, etc. Traditionally, neural network developers build a
+computation graph and then an appropriate machine learning framework
+interprets it. The latest discoveries in AI field show that the
+node-visitor method of execution is inefficient. As a result, a second
+approach has been worked out by the industry, which is a neural network
+compiler that executes code more efficiently.
+
+This document presents the design of the *nncc*, a neural network
+compiler collection. The design should provide the easiest way to extend
+the functionality of the *nncc* by adding new modules with the following
+features:
+
+  - Support neural networks produced by various machine learning
+    frameworks;
+  - Produce an artefact taking advantages of various hardware
+    including specialized processors like NPU;
+  - Apply new domain specific optimization techniques over given NN.
+
+Non-functional requirements to the developed software are well-described
+in the SW Requirements Specification, such requirements are not shown
+here to avoid duplication.
+
+### Constraints
+
+See constraints in SW Requirements Specification.
+
+
+<table>
+<colgroup>
+<col style="width: 24%" />
+<col style="width: 64%" />
+<col style="width: 10%" />
+</colgroup>
+<thead>
+<tr class="header">
+<th>Item</th>
+<th>Assumptions, Dependencies and the Constraints</th>
+<th>Reference</th>
+</tr>
+</thead>
+<tbody>
+<tr class="odd">
+<td>Tizen SW Platform</td>
+<td><dl>
+<dt>The following items should be provided:</dt>
+<dd><ul>
+<li>Tizen API</li>
+<li>Tizen kernel</li>
+<li>Tizen FW</li>
+<li>Tizen SDK</li>
+<li>Tizen naming convention</li>
+</ul>
+</dd>
+</dl></td>
+<td>- <a href="www.tizen.org" class="uri">www.tizen.org</a> <br>- <a href="wiki.tizen.org" class="uri">wiki.tizen.org</a> <br>- <a href="developer.tizen.org" class="uri">developer.tizen.org</a></td>
+</tr>
+<tr class="even">
+<td>SmartMachine OS Platform</td>
+<td><dl>
+<dt>The following items should be provided:</dt>
+<dd><ul>
+<li>SmartMachine API</li>
+<li>SmartMachine kernel</li>
+<li>SmartMachine FW</li>
+<li>SmartMachine SDK</li>
+<li>SmartMachine naming convention</li>
+</ul>
+</dd>
+</dl></td>
+<td>- <a href="http://suprem.sec.samsung.net/confluence/pages/viewpage.action?pageId=81833987">Platform confluence</a> <br>- <a href="https://github.sec.samsung.net/RS7-SmartMachine">Github</a> <br>- <a href="http://suprem.sec.samsung.net/confluence/display/ASEC/Adaptive+AUTOSAR">Functional Safety confluence</a></td>
+</tr>
+<tr class="odd">
+<td>Host OS</td>
+<td>Linux-based OS (Ubuntu, Archlinux, etc)</td>
+<td>- <a href="https://www.ubuntu.com/">Ubuntu site</a> <br>- <a href="https://www.archlinux.org/">Archlinux site</a></td>
+</tr>
+<tr class="even">
+<td>Tizen target HW</td>
+<td>The reference device should be provided: Tizen TM2</td>
+<td></td>
+</tr>
+<tr class="odd">
+<td>SmartMachine target HW</td>
+<td>The reference device should be provided</td>
+<td></td>
+</tr>
+</tbody>
+</table>
+Table 1-2. Assumptions, Dependecies and the Constraints</caption>
+
+## SW Detailed Structure Design
+
+### SW Block Structure
+
+Top-Level Components of the nncc descriped in HLD. More detailed
+structure and class diagram will be available after development
+completion.
+
+### SW Block Feature
+
+1.  Initialization: configure all internal modules (see
+    [{Initialization} Detailed Design](#initialization-detailed-design))
+2.  Frontend: Import NN model (see [{Import NN model} Detailed
+    Design](#import-nn-model-detailed-design))
+      - *Caffe frontend*: includes the parser of Caffe NN model format,
+        verifier to ensure that parsed data is valid and consentient,
+        and Caffe-specific IR converter
+      - *Caffe2 frontend*: includes the parser of Caffe2 NN model
+        format, verifier to ensure that parsed data is valid and
+        consentient, and Caffe2-specific IR converter to Model IR
+      - *Tensorflow Lite frontend*: includes the parser of Tensorflow NN
+        model format with automatic version recognition feature,
+        verifier to ensure that parsed data is valid and consentient,
+        and Tensorflow Lite-specific IR converter to Model IR
+3.  Backend: Generate the code (see [{Generate the code} Detailed
+    Design](#generate-the-code-detailed-design))
+      - *Interpreter:* As it was described in SW High-Level Document
+        imported NN model may proceed through three step of Intermediate
+        representation: Model IR, Coarse-Grained IR, Fine-Grained IR.
+        The Interpreter backend uses each this IR to do inference of
+        given NN model. As the output, the user gets the resulting
+        calculation of all NN ops included into original computation
+        graph.
+      - *Binary*:This type refers to generating binary code that can be
+        executed on the target device. NN compiler can generate code
+        that is either executed solely on CPU or takes advantage of the
+        GPU when possible if the corresponding target was specified. The
+        user may want to incorporate 3rd party libraries included into
+        target firmware or delivered with the application package. In
+        this case, the compiler prepares the data following EABI
+        convention and embeds an invocation of high-level functions by
+        appropriate symbol.
+      - *Soft*: Resulting program is a generated source code in
+        high-level programming language C or C++. Here there are two
+        options: the first one is to generate the source code that does
+        not depend on libraries outside of itself, with the exception of
+        system libraries. The second one is to include the code to
+        invoke high-level functions from 3rd party libraries. For
+        example, it may be an invocation of matrix multiplication from
+        GEMM library.
+
+## SW Detailed Operation Design
+
+### {Initialization} Detailed Design
+
+#### Major Function
+
+To provide a valid configuration session for all modules of *nncc* using
+user input from the command line/config file/environment variables.
+
+#### Operation Sequence
+
+Initialization of the *nncc* includes command line option processing,
+configuration of its subsystems as well as any error checking possible
+at this stage. It consists of the following steps:
+
+1.  Collect all command line options and verify their format for
+    validity (no syntax errors etc.)
+
+2.  Check for validity and then process general options
+
+3.  Load subsystem modules
+
+4.  For each one of them:
+    
+      - Configure
+      - Pass command line options
+      - Check command line options for validity (for example, check
+        that every required option is present)
+
+At the end of this process each subsystem is configured and has access
+to all data needed for its operation.
+
+### {Import NN model} Detailed Design
+
+#### Major Function
+
+To convert given NN model from framework-specific IR to Model IR for
+further processing.
+
+#### Operation Sequence
+
+As you may see on the diagram, neural network import is the main
+function of the compiler front-end part. The result of this operation is
+a computation graph which is presented as Model IR.
+
+![image](../images/nncc_idef0_a12.png)
+
+The import process consists of three parts:
+
+1.  NN model parsing
+2.  Verification of the result from the previous step
+3.  Converting the model to the Model IR
+
+During the first step, file or files containing the model are read and
+represented in some format specific to each NN framework.
+
+Verification step is included to ensure that:
+
+  - None of the files constituting the model are damaged
+  - Model format corresponds to the specified one
+  - Version of the model format corresponds to the specified one
+
+The most important step is accurately converting the model from the
+framework-specific representation to the Model IR. This conversion
+includes:
+
+  - *Translation of the NN model computation graph to the Model IR
+    computation graph.* During the translation new nodes may be
+    introduced - for example, a high-level NN operation may be split
+    into a few smaller ones.
+  - *NN model parameter layout conversion.* The way parameters (also
+    known as weights) of a model are layed out in each specific NN
+    framework may differ, and it is necessary to convert such layout
+    into a unified format.
+  - *NN operation parameter conversion.* Each NN operation has a set
+    of its own parameters describing the way this operation should be
+    performed, and these parameters also differ between frameworks.
+
+Resulting Model IR is equivalent to the initial NN model in terms of how
+NN model inputs would be transformed into its outputs if all the
+operations in the Model IR were executed.
+
+### {Generate the code} Detailed Design
+
+Development in progress. Will be described on Completion DR.
+
+## Interface Design
+
+Development in progress. Will be described on DR2.
+
+## SW Code Structure
+
+| Directory                | Description                                                          |
+| ------------------------ | -------------------------------------------------------------------- |
+| /                        | source codes of the build system, main README file                   |
+| /contrib                 | Incubating projects                                                  |
+| /doc                     | Contains the documentation of the project                            |
+| /doc/project             | Contains project management documents (SRS, SDD, STD, HLD, DLD, etc) |
+| /libs                    | Contains the source of the libraries which are used by the nncc      |
+| /libs/core               | Contains the source code of the core library of nncc                 |
+| /libs/frontend           | Contains the source code of supported frontend's plugins             |
+| /libs/frontend/caffe     | The source code for the Caffe frontend                               |
+| /libs/frontend/caffe2    | The source code for the Caffe2 frontend                              |
+| /libs/frontend/tflite    | The source code for the Tensorflow Lite frontend                     |
+| /libs/backend            | Contains the source code of supported backend’ plugins               |
+| /libs/backend/cpu        | Contains the source code of CPU backend                              |
+| /libs/backend/gpu        | Contains the source code of GPU backend                              |
+| /libs/backend/3rd\_party | Contains the source code of backend to utilize 3rd party libraries   |
+| /scripts                 | Various scripts for building and testing the nncc                    |
+| /tools                   | The source code of the executables                                   |
diff --git a/docs/nncc/project/development_document.md b/docs/nncc/project/development_document.md
new file mode 100644
index 000000000..8315dd3b6
--- /dev/null
+++ b/docs/nncc/project/development_document.md
@@ -0,0 +1,257 @@
+# SW Development Document
+
+**Revision history**
+
+| Ver. | Date       | Contents                    | Author          | Approver     |
+| ---- | ---------- | --------------------------- | --------------- | ------------ |
+| 0.1  | 2018.04.12 | Initial version             | Vostokov Sergey | Sung-Jae Lee |
+| 0.2  | 2018.04.16 | SE member in-charge review  | Ilya Lopatin    |              |
+| 1.0  | 2018.04.17 | Final Execution DR version  | Vostokov Sergey | Sung-Jae Lee |
+| 1.1  | 2018.04.17 | Add SW Quality Verification | Vostokov Sergey | Sung-Jae Lee |
+
+**Terminology and Abbreviation**
+
+|              |                                                               |
+| ------------ | ------------------------------------------------------------- |
+| OS           | Operating System                                              |
+| OS API       | Application interface of OS                                   |
+| HW           | Hardware                                                      |
+| SW           | Software                                                      |
+| NN           | Neural Network                                                |
+| NN model     | Neural network model (Instance of NN built with ML framework) |
+| NN compiler  | The compiler for neural network                               |
+| ML framework | The machine learning framework                                |
+| TF/TF Lite   | Tensorflow/Tensorflow Lite ML framework                       |
+| IR           | Intermediate representation                                   |
+| CI/CI system | Continuous integration system                                 |
+| UI           | The user interface                                            |
+| GUI          | The graphical user interface                                  |
+| CLI          | The command-line interface                                    |
+
+## Project Overview
+
+### Purpose and Scope
+
+The main goal of the project is to develop a compiler for neural networks to produce executable artefact for specified SW and HW platform.
+
+The development scope includes the following components:
+
+  - Develop importer module to parse, verify and represent NN model for further optimization and compilation
+  - Develop code emitters to produce executable binary for CPU and GPU
+
+  
+**2018 year goals:**
+
+  - Support TensorFlow Lite NN model format
+  - Support Caffe NN model format
+  - Support Caffe2 NN model format (Optional)
+  - Support compilation of MobileNet NN
+  - Support compilation of Inception v3 NN
+  - Support ARM CPU
+  - Support ARM GPU (Mali)
+  - Support Tizen OS
+  - Support SmartMachine OS (Optional)
+
+| Product             | Target Model Name              | Comment          |
+| ------------------- | ------------------------------ | ---------------- |
+| Tizen phone         | Tizen TM2                      | Reference device |
+| Tizen device        | Odroid XU4                     | Reference board  |
+| SmartMachine target | Microvision mv8890, exynos8890 | Reference device |
+
+### Assumptions, Dependencies and Constraints
+
+<table>
+<colgroup>
+<col style="width: 26%" />
+<col style="width: 46%" />
+<col style="width: 26%" />
+</colgroup>
+<thead>
+<tr class="header">
+<th>Item</th>
+<th>Assumptions, Dependencies and the Constraints</th>
+<th>Reference</th>
+</tr>
+</thead>
+<tbody>
+<tr class="odd">
+<td>Tizen SW Platform</td>
+<td><dl>
+<dt>The following items should be provided:</dt>
+<dd><ul>
+<li>Tizen API</li>
+<li>Tizen kernel</li>
+<li>Tizen FW</li>
+<li>Tizen SDK</li>
+<li>Tizen naming convention</li>
+</ul>
+</dd>
+</dl></td>
+<td><ul>
+<li><a href="www.tizen.org" class="uri">www.tizen.org</a></li>
+<li><a href="wiki.tizen.org" class="uri">wiki.tizen.org</a></li>
+<li><a href="developer.tizen.org" class="uri">developer.tizen.org</a></li>
+</ul></td>
+</tr>
+<tr class="even">
+<td>SmartMachine OS Platform</td>
+<td><dl>
+<dt>The following items should be provided:</dt>
+<dd><ul>
+<li>SmartMachine API</li>
+<li>SmartMachine kernel</li>
+<li>SmartMachine FW</li>
+<li>SmartMachine SDK</li>
+<li>SmartMachine naming convention</li>
+</ul>
+</dd>
+</dl></td>
+<td>- <a href="http://suprem.sec.samsung.net/confluence/pages/viewpage.action?pageId=81833987">Platform confluence</a> <br>- <a href="https://github.sec.samsung.net/RS7-SmartMachine">Github</a> <br>- <a href="http://suprem.sec.samsung.net/confluence/display/ASEC/Adaptive+AUTOSAR">Functional Safety confluence</a></td>
+</tr>
+<tr class="odd">
+<td>Host OS</td>
+<td>Linux-based OS (Ubuntu, Archlinux, etc)</td>
+<td>- <a href="https://www.ubuntu.com/">Ubuntu site</a> <br>- <a href="https://www.archlinux.org/">Archlinux site</a></td>
+</tr>
+<tr class="even">
+<td>Tizen target HW</td>
+<td>The reference device should be provided: Tizen TM2</td>
+<td></td>
+</tr>
+<tr class="odd">
+<td>SmartMachine target HW</td>
+<td>The reference device should be provided</td>
+<td></td>
+</tr>
+</tbody>
+</table>
+
+## Development Plan And Result
+
+### Development Schedule
+
+| Task                                 | Deliverable                       | Plan start | Plan end | Result start | Result end | Responsibility |
+| ------------------------------------ | --------------------------------- | ---------- | -------- | ------------ | ---------- | -------------- |
+| Prepare SW requirements              | SRS                               | 04.2018    | 04.2018  |              |            | S. Vostokov    |
+| Prepare initial SW Test Document     | STD                               | 04.2018    | 04.2018  |              |            | S. Vostokov    |
+| Prepare Initial Project Plan         | SDD                               | 04.2018    | 04.2018  |              |            | S. Vostokov    |
+| Prepare SW Test Document             | STD                               | 04.2018    | 06.2018  |              |            | S. Vostokov    |
+| Prepare design document              | HLD, DLD                          | 05.2018    | 08.2018  |              |            | S. Vostokov    |
+| Prepare test result                  | STD, UTR                          | 04.2018    | 10.2018  |              |            | S. Vostokov    |
+| Prepare project completion documents | SDD, Project completion report    | 05.2018    | 12.2018  |              |            | S. Vostokov    |
+| Implement Caffe Importer             | Caffe NN model Importer           | 05.2018    | 09.2018  |              |            | S. Vostokov    |
+| Implement code emitter for CPU       | Code emitter                      | 05.2018    | 09.2018  |              |            | S. Vostokov    |
+| Implement TF Lite Importer           | TensorFlow Lite NN model Importer | 05.2018    | 11.2018  |              |            | S. Vostokov    |
+| Implement code emitter for GPU       | Code emitter                      | 02.2018    | 11.2018  |              |            | S. Vostokov    |
+
+### SW Metrics
+
+| Category | Metric                                                                 | Collection Method        | Collection Period       | Planned           | Actual | Responsibility |
+| -------- | ---------------------------------------------------------------------- | ------------------------ | ----------------------- | ----------------- | ------ | -------------- |
+| Quality  | Test pass rate                                                         | GTest                    | 22.02.2018 - 31.12.2018 | 100%              |        | S. Vostokov    |
+| Quality  | Defects density                                                        | Defect management system | 22.02.2018 - 31.12.2018 | \<= 1 defect/KLOC |        | S. Vostokov    |
+| Quality  | Defects removal rate                                                   | Defect management system | 22.02.2018 - 31.12.2018 | 100%              |        | S. Vostokov    |
+| Quality  | Critical defects                                                       | Static analysis          | 22.02.2018 - 31.12.2018 | 0                 |        | S. Vostokov    |
+| Quality  | Major defects                                                          | Static analysis          | 22.02.2018 - 31.12.2018 | 0                 |        | S. Vostokov    |
+| Quality  | Code review issue removal                                              | Samsung Research github  | 22.02.2018 - 31.12.2018 | 100%              |        | S. Vostokov    |
+| Quality  | Comments Rate                                                          | `cloc` tool              | 22.02.2018 - 31.12.2018 | Exceed 20%        |        | S. Vostokov    |
+| Quality  | Cyclomatic Complexity                                                  | SVACE                    | 22.02.2018 - 31.12.2018 | \< 50             |        | S. Vostokov    |
+| Quality  | Unused Items (Unused Files, Unused Functions, Unused Global Variables) | gcc/g++                  | 22.02.2018 - 31.12.2018 | 0                 |        | S. Vostokov    |
+| Process  | Project On-time Completion Rate                                        | PLM                      | 22.02.2018 - 31.12.2018 | 100%              |        | S. Vostokov    |
+| Process  | Milestone On-time Completion Rate                                      | PLM                      | 22.02.2018 - 31.12.2018 | 100%              |        | S. Vostokov    |
+| Process  | Process compliance                                                     | Audit                    | 22.02.2018 - 31.12.2018 | 100%              |        | S. Vostokov    |
+
+### SW Configurations Management
+
+#### Document
+
+| No | Configuration Item           | Location | Submitter   |
+| -- | ---------------------------- | -------- | ----------- |
+| 1  | SW Requirement Specification | PLM      | S. Vostokov |
+| 2  | SW Development Document      | PLM      | S. Vostokov |
+| 3  | SW High Level Document       | PLM      | S. Vostokov |
+| 4  | SW Detailed Level Document   | PLM      | S. Vostokov |
+| 5  | SW System Test Document      | PLM      | S. Vostokov |
+| 6  | SW Unit Test Report          | PLM      | S. Vostokov |
+
+#### SW Source Code
+
+SW Repository:
+<https://github.sec.samsung.net/STAR/nncc>
+
+    git clone https://github.sec.samsung.net/STAR/nncc.git
+
+#### Baseline
+
+| Phase              | Baseline Name      | SW Configuration Item                                                                       |
+| ------------------ | ------------------ | ------------------------------------------------------------------------------------------- |
+| 04.2018 Plan       | Execution DR       | SW Requirement Specification, SW Development Document, System Test Document initial version |
+| 06.2018 Execution  | DR1                | System Test Document                                                                        |
+| 08.2018 Execution  | Design document    | SW High Level Document, SW Detailed Design Document                                         |
+| 09.2018 Execution  | DR2                |                                                                                             |
+| 10.2018 Execution  | Test report        | SW System Test Document (result), SW Unit Test Report                                       |
+| 12.2018 Completion | Project Completion | Project Completion Report                                                                   |
+
+## SW Quality Verification
+
+### SW Verification
+
+| No | Verification Item                | Quality Goal                               | Tool     | Phase     | Development Team Member in Charge | Result | Note |
+| -- | -------------------------------- | ------------------------------------------ | -------- | --------- | --------------------------------- | ------ | ---- |
+| 1  | Open source License Verification | Clear violations of open source obligation | ProtexIP | Execution | Vostokov Sergey                   |        |      |
+| 2  | Potential Defect                 | Fix all defects                            | Svace    | Test      | Vostokov Sergey                   |        |      |
+| 3  | System Defect                    | Fix Critical/ Major defects                | Github   | Test      | Vostokov Sergey                   |        |      |
+
+### Static Analysis
+
+| No | Activity                    | Schedule   | Result | Comment |
+| -- | --------------------------- | ---------- | ------ | ------- |
+| 1  | SA Verification I (SVACE)   | 28.09.2018 |        |         |
+| 2  | SA Verification II (SVACE)  | 30.11.2018 |        |         |
+| 2  | SA Verification III (SVACE) | 31.12.2018 |        |         |
+
+### Coding Standard
+
+| No | Activity                                              | Schedule | Result | Comment |
+| -- | ----------------------------------------------------- | -------- | ------ | ------- |
+| 1  | Coding standard enforcement with `clang-format` tool. | Regular  |        |         |
+
+
+### Convergence (integration testing)
+
+Out of scope since the integration with other SW is not required by SW
+Requirement Specification.
+
+### Dynamic Analysis
+
+| No | Activity            | Schedule   | Result | Comment |
+| -- | ------------------- | ---------- | ------ | ------- |
+| 1  | DA Verification I   | 28.09.2018 |        |         |
+| 2  | DA Verification II  | 30.11.2018 |        |         |
+| 2  | DA Verification III | 31.12.2018 |        |         |
+
+
+### Architecture Analysis
+
+SW architecture verification is managed by HQ.
+
+### SW Security
+
+Out of the project scope since the project is not related to SW security.
+
+### Code Review
+
+| No | Activity    | Schedule | Result | Comment                                                             |
+| -- | ----------- | -------- | ------ | ------------------------------------------------------------------- |
+| 1  | Code review | Regular  |        | All code is reviewed manually using `github` tool before committing |
+
+## Risk Management
+
+| Priority | Risk Description                                                                                        | Risk Reduction Solution                                                                                   | Schedule          | Result | Responsibility |
+| -------- | ------------------------------------------------------------------------------------------------------- | --------------------------------------------------------------------------------------------------------- | ----------------- | ------ | -------------- |
+| 1        | Project scope is changed due extra HQ request                                                           | Discuss the new requirements via email and messenger, update SRS                                          | 02.2018 - 12.2018 |        | S. Vostokov    |
+| 2        | Unavoidable technical difficulties during requirements implementation                                   | Submit requirements changes and get confirmation from HQ                                                  | 02.2018 - 12.2018 |        | S. Vostokov    |
+| 3        | Not enough HR                                                                                           | Hire team members as soon as possible, request assistance from other teams                                | 02.2018 - 12.2018 |        | S. Vostokov    |
+| 4        | Use of GPL code                                                                                         | Minimize usage of GPL code, wrap GPL modules with well-defined interfaces so they can be easily replaced. | 02.2018 - 12.2018 |        | S. Vostokov    |
+| 5        | Requirements would change due external or internal circumstances, e.g. new technology or product launch | Discuss project changes and make corrections                                                              | 02.2018 - 12.2018 |        | S. Vostokov    |
+
diff --git a/docs/nncc/project/high_level_design.md b/docs/nncc/project/high_level_design.md
new file mode 100644
index 000000000..a15aaca4a
--- /dev/null
+++ b/docs/nncc/project/high_level_design.md
@@ -0,0 +1,457 @@
+# SW High Level Design
+
+**Revision history**
+
+| Ver. | Date       | Contents          | Author            | Approver     |
+| ---- | ---------- | ----------------- | ----------------- | ------------ |
+| 0.1  | 2018.05.25 | Initial version   | Vostokov Sergey   | Sung-Jae Lee |
+| 0.2  | 2018.06.21 | SE member review  | Alexey Kondrashov |              |
+| 1.0  | 2018.06.22 | Final DR1 version | Vostokov Sergey   | Sung-Jae Lee |
+
+**Terminology and Abbreviation**
+
+| Terminology  | Description                                                   |
+| ------------ | ------------------------------------------------------------- |
+| OS           | Operating System                                              |
+| OS API       | Application interface of OS                                   |
+| HW           | Hardware                                                      |
+| SW           | Software                                                      |
+| NN           | Neural Network                                                |
+| NN model     | Neural network model (Instance of NN built with ML framework) |
+| NN compiler  | The compiler for neural network                               |
+| ML framework | The machine learning framework                                |
+| TF/TF Lite   | Tensorflow/Tensorflow Lite ML framework                       |
+| IR           | Intermediate representation                                   |
+| CI/CI system | Continuous integration system                                 |
+| UI           | The user interface                                            |
+| GUI          | The graphical user interface                                  |
+| CLI          | The command-line interface                                    |
+
+**References**
+
+\[1\] Vostokov Sergey, [SW Requirements Specification](requirements_specification.md)
+
+## Overview
+
+### Scope
+
+The main goal of the project is to develop a compiler for neural
+networks to produce executable artefact for specified SW and HW
+platform.
+
+The development scope includes the following components:
+
+  - Develop importer module to parse, verify and represent NN model for
+    further optimization and compilation
+  - Develop code emitters to produce executable binary for CPU and GPU
+
+  
+**2018 year goals:**
+
+  - Support TensorFlow Lite NN model format
+  - Support Caffe NN model format
+  - Support Caffe2 NN model format (Optional)
+  - Support compilation of MobileNet NN
+  - Support compilation of Inception v3 NN
+  - Support ARM CPU
+  - Support ARM GPU (Mali)
+  - Support Tizen OS
+  - Support SmartMachine OS(Optional)
+
+| Product             | Target Model Name              | Comment          |
+| ------------------- | ------------------------------ | ---------------- |
+| Tizen phone         | Tizen TM2                      | Reference device |
+| Tizen device        | Odroid XU4                     | Reference board  |
+| SmartMachine target | Microvision mv8890, exynos8890 | Reference device |
+
+Table 1-1. Target Model
+
+### Design Consideration
+
+Deep learning software demands reliability and performance. The common
+approach which comes from the history is to develop a SW framework
+(machine learning framework) which would compute each step of the neural
+network inference process using supported hardware. This approach is
+used in many popular solutions like Google Tensorflow/Tensorflow Lite,
+Caffe/2, etc. Traditionally, neural network developers build a
+computation graph and then an appropriate machine learning framework
+interprets it. The latest discoveries in AI field show that the
+node-visitor method of execution is inefficient. As a result, a second
+approach has been worked out by the industry, which is a neural network
+compiler that executes code more efficiently.
+
+This document presents the design of the *nncc*, a neural network
+compiler collection. The design should provide the easiest way to extend
+the functionality of the *nncc* by adding new modules with the following
+features:
+
+ - Support neural networks produced by various machine learning
+   frameworks;
+ - Produce an artefact taking advantages of various hardware
+   including specialized processors like NPU;
+ - Apply new domain specific optimization techniques over given NN.
+
+### Constraints
+
+See constraints in SW Requirements Specification.
+
+<table>
+<colgroup>
+<col style="width: 24%" />
+<col style="width: 64%" />
+<col style="width: 10%" />
+</colgroup>
+<thead>
+<tr class="header">
+<th>Item</th>
+<th>Assumptions, Dependencies and the Constraints</th>
+<th>Reference</th>
+</tr>
+</thead>
+<tbody>
+<tr class="odd">
+<td>Tizen SW Platform</td>
+<td><dl>
+<dt>The following items should be provided:</dt>
+<dd><ul>
+<li>Tizen API</li>
+<li>Tizen kernel</li>
+<li>Tizen FW</li>
+<li>Tizen SDK</li>
+<li>Tizen naming convention</li>
+</ul>
+</dd>
+</dl></td>
+<td>- <a href="www.tizen.org" class="uri">www.tizen.org</a> <br>- <a href="wiki.tizen.org" class="uri">wiki.tizen.org</a> <br>- <a href="developer.tizen.org" class="uri">developer.tizen.org</a></td>
+</tr>
+<tr class="even">
+<td>SmartMachine OS Platform</td>
+<td><dl>
+<dt>The following items should be provided:</dt>
+<dd><ul>
+<li>SmartMachine API</li>
+<li>SmartMachine kernel</li>
+<li>SmartMachine FW</li>
+<li>SmartMachine SDK</li>
+<li>SmartMachine naming convention</li>
+</ul>
+</dd>
+</dl></td>
+<td>- <a href="http://suprem.sec.samsung.net/confluence/pages/viewpage.action?pageId=81833987">Platform confluence</a> <br>- <a href="https://github.sec.samsung.net/RS7-SmartMachine">Github</a> <br>- <a href="http://suprem.sec.samsung.net/confluence/display/ASEC/Adaptive+AUTOSAR">Functional Safety confluence</a></td>
+</tr>
+<tr class="odd">
+<td>Host OS</td>
+<td>Linux-based OS (Ubuntu, Archlinux, etc)</td>
+<td>- <a href="https://www.ubuntu.com/">Ubuntu site</a> <br>- <a href="https://www.archlinux.org/">Archlinux site</a></td>
+</tr>
+<tr class="even">
+<td>Tizen target HW</td>
+<td>The reference device should be provided: Tizen TM2</td>
+<td></td>
+</tr>
+<tr class="odd">
+<td>SmartMachine target HW</td>
+<td>The reference device should be provided</td>
+<td></td>
+</tr>
+</tbody>
+</table>
+Table 1-2. Assumptions, Dependecies and the Constraints</caption>
+
+## SW System Architecture Design
+
+### Overall Architecture
+
+The picture below presents the result of high-level analysis of the
+requirements which **nncc** should satisfy. It describes the main
+function **Compilation** of the compiler collection using IDEF0
+(functional modeling) notation. The full information on IDEF family of
+modeling languages is available at this link on [Wikipedia:
+IDEF](https://en.wikipedia.org/wiki/IDEF).
+
+![image](../images/nncc_idef0_a0.png)
+
+Figure 1. Top-Level Context Diagram of compilation function.
+
+  
+The short explanation of the **Figure 1**:  
+
+**1. Input entities:**
+
+   - *NN Model instance:* It is the main input of *nncc*. The compiler
+     takes from a user information describing a neural network which
+     should be compiled. In most cases, this NN is produced by a
+     machine learning framework and stored in one or many files. The
+     contents of these files constitute the essence of the neural
+     network. Here it is denoted as an instance of NN model.
+   - *Command line options:* In order to provide the most convenient
+     way to use the compiler, it should be configurable. Current design
+     presents a tool which has a Command Line Interface (CLI). Command
+     line options are a symbolic representation of directions
+     instructing the compiler how to set up a working session to get
+     the desired result.
+
+**2. Output:**
+
+   - *Target binaries:* Everything that is produced by the compilation
+     operation. In general case the result may consist of one or more
+     files. Each of them may be one of the following: an executable, a
+     source code file, a log/verification/error report. For example,
+     when we require the compiler to compile a neural network for
+     execution on GPU, the output artefact may be OpenCL/C/C++ source
+     code, or a binary containing invocation of the procedures
+     delegating the calculations to GPU.
+
+**3. Rules and notations:**
+
+   - *NN Model specification:* Each machine learning framework has its
+     own architecture design and uses its own format to
+     serialize/deserialize computation graphs which represent neural
+     networks. On a storage device, it may be saved as a file or many
+     files using a unique markup of binary data. To enable *nncc* to
+     read such data and process it, in the future it should recognize
+     the format of the container. Importer/parser subsystem of *nncc*
+     stores the full knowledge of the NN specifications and is
+     responsible for reading and parsing NN models (see [Import NN
+     model](#import-nn-model)).
+   - *High-Level and Low-Level Optimization techniques:* Before
+     deployment, a neural network developer might want to verify their
+     product and optimize it by size and performance. There are many
+     techniques for reducing the common size of neural network weights
+     and improving performance of the inference. NN optimization
+     activity can be automated by implementing each technique in the
+     middleend according to its specifications (see [Apply
+     Optimizations](#apply-optimizations)).
+   - *Target Runtime Environment (TRE):* In the case when the compiler
+     produces the binary for execution on a specific SW platform, it
+     should take into account the common API of this SW Platform. It
+     includes the full public API of a chosen OS available to the 3rd
+     party developers.
+   - *Target Instruction Set Architecture (Target ISA):* Resulting
+     artefact is always executed on a SW Platform using some specified
+     API. The user may want to generate the artefact that would use
+     OpenBlas or Arm Compute Library or something else (if supported by
+     the compiler), to perform calculations. In order to provide such
+     possibility, *nncc* should be aware of the API to the specified
+     3rd party libraries.
+   - *Device specifications:* Some of the optimization techniques may
+     take into account the technological features of the computing
+     device, like the time to perform some specific calculations. Such
+     information is very helpful during optimization of the final code
+     of the compiled artefact because it may be used to select an
+     optimal sequence of command invocations in order to achieve the
+     best performance.
+
+**4. Mechanism:**
+
+   - *Optimizing NN Compiler:* The implemented compiler itself. Since
+     *nncc* is dedicated to producing the code for the most efficient
+     execution, we may regard the tool as optimizing.
+   - *Host OS:* Since the compiler is a tool that works in some SW
+     Environment, the main Top-Level SW system is an Operating System.
+     In the SW Requirements specification it may be defined as a
+     Linux-like OS, for example Ubuntu, Archlinux, etc.
+
+### Composition of Architecture
+
+The compiler consists of three main parts: frontend, middleend, backend.
+Together they form a Neural Network instance processing pipeline.
+Moreover, there is one additional part that is in charge of the compiler
+configuration.
+
+![image](../images/nncc_components.png)
+
+Figure 2. Top-Level Components of the
+*nncc*.
+
+| Layer or Subsystem Name | Description                                                                                                                              |
+| ----------------------- | ---------------------------------------------------------------------------------------------------------------------------------------- |
+| Frontend                | Imports a specified Neural Network, presents it as a computation graph                                                                   |
+| Middleend               | Provides various optimizations over the computation graph; at the end transforms it to internal IR                                       |
+| Backend                 | Produces the specified artefact as a result of compilation procedure using specified parameters describing the target OS, target HW, etc |
+| Configuration system    | Accepts command line options and configures *nncc* according to their contents                                                           |
+
+  
+The detailed decomposition of the main function **Compilation** is
+presented on the diagram A1 below.  
+
+### Interface
+
+Similar to any console application the *nncc* CLI accepts two types of
+options:
+
+  - Options that have values, for example, a name of the output executable
+  - Options that don't have values (switches) that turn various features on and off
+
+Additionally, options can be general and subsystem-specific.
+
+General options direct the process of the neural network compilation as
+a whole, and also control the utility functions like the verbosity of
+the messages that *nncc* outputs during the compilation process.
+
+Subsystem-specific options control each respective subsystem:
+
+  - Frontend subsystem takes options that point to the NN model to
+    compile, which format it has, which version of the format and so
+    on.
+  - Middleend subsystem takes options that either turn on specific
+    optimizations for the NN model, or just point at the more desired
+    outcome, for example "target performance efficiency" or "target
+    memory efficiency".
+  - Backend subsystem takes options that describe the desired target
+    device or architecture and so on.
+
+For better usability, high-level options are also supported. A single
+high-level option is mapped to a group of lower level options, similarly
+to how it is done with conventional compiler drivers, like gcc. This way
+by choosing a single Middleend option "target performance", nncc will
+automatically choose a number of performance optimizations by itself.
+
+## SW System Operation Design
+
+The Figure 3 presents a more detailed composition of the main function
+**Compilation**. As it was shown in previous section [Composition of
+Architecture](#composition-of-architecture) it is composed of 5
+subfunctions:
+
+  - Setup and configure each module - *Block 1* (See
+    [Initialization](#initialization) section)
+  - Import the specified neural network - *Block 2* (See [Import NN
+    model](#import-nn-model) section)
+  - Apply High-Level optimizations - *Block 3* (See [Apply
+    Optimizations](#apply-optimizations) section)
+  - Apply Low-Level optimizations - *Block 4* (See [Apply
+    Optimizations](#apply-optimizations) section)
+  - Generate the output code for specified target - *Block 5* (See
+    [Generate the code](#generate-the-code) section)
+
+![image](../images/nncc_idef0_a1.png)
+
+Figure 3. Decomposition of top-Level function **Compilation**.
+
+### Initialization
+
+At this stage the initialization of all submodules of the *nncc*
+happens. This procedure starts from command line option processing till
+selection of all required and correctly configured modules. At the
+parsing stage the configuration system checks its own consistency. If
+command line option set is not enought to establish a valid
+configuration the environment variables will be used. Also, almost all
+configuration options can be read from config file if it is specified in
+command line.
+
+### Import NN model
+
+The major function of the *nncc* frontend is to import specified NN
+model. It means that frontend should recognize the format of given NN
+model, parse all internal structures (load computation graph using
+framework specific IR: NN topology, NN ops, weights), verify their
+correctness and convert to Model IR.
+
+### Apply Optimizations
+
+There are two levels of neural network optimizations in *nncc*.
+
+First one is High-Level Optimizations, they are applied to the Model IR,
+which is output by the NN Import subsystem.
+
+#### High-Level Optimizations
+
+High-Level optimizations can be divided into two groups:
+
+  - optimizations aimed at reducing the size of the resulting model -
+    *size optimizations*
+  - optimizations aimed at reducing the inference time of the model -
+    *performance optimizations*
+
+These two groups are not mutually exclusive. Some optimization
+techniques positively affect both size and performance, while some of
+them might reduce the size of the model at some performance cost.
+
+High-Level Optimizations in this sense are purely
+neural-network-specific, as they attempt to improve the model by
+manipulating the computation graph and the weights. For example, some
+techniques search for unused parts of the computation graph and remove
+them, or they search for the parts of the graph that can be merged
+together and thus gain some performance. Other techniques manipulate the
+neural network weights - either reduce their amount or modify their
+values in a way that allows for the reduced storage consumption.
+
+Currently, High-Level Optimizations are out of scope of the project.
+
+#### Low-Level Optimization
+
+The Low-Level Optimizations are applied by the compiler closer to the
+end of the whole compilation process, before the executable generation.
+The input for this stage of *nncc* is the Coarse-Grained IR, which is
+output but High-Level Optimization subsystem.
+
+### Generate the code
+
+Present architecture allows for several backend solutions, depending on
+target specified. Those solutions can be divided into 3 types:
+
+  - *Interpretation.* At every step inference can be carried out by
+    interpreting IR produced after that step.
+  - *Soft backend.* Resulting program can be generated as source code
+    in high-level programming language (e.g., C/C++) that does not
+    depend on libraries outside of itself, with the exception of
+    system libraries.
+  - *Hardware (Binary) backend.* This type refers to generating binary
+    code that can be executed on target device. NN compiler can
+    generate code that is either executed solely on CPU, or takes
+    advantage of the GPU when possible if corresponding target was
+    specified.
+
+Third-party libraries incorporation can be done either in form of source
+code or by compiling a binary artefact.
+
+## Appendix 1. Traceability Matrix
+
+The following table shows mapping between SW Requirements Specification
+and SW High-Level Design
+Document.
+
+| Requirement                                     | Description                                                                                                                       | Section                                 |
+| ----------------------------------------------- | --------------------------------------------------------------------------------------------------------------------------------- | --------------------------------------- |
+| RF-1 (Frontend: Tensorflow Lite)                | The compiler should support import of NN model in Tensorflow Lite format (parsing & verification of data scheme v0-v3, 50 NN ops) | [Import NN model](#import-nn-model)     |
+| RF-2 (Frontend: Caffe)                          | The compiler should support import of NN model in Caffe format (parsing & verification)                                           | [Import NN model](#import-nn-model)     |
+| RF-3 (Frontend: Caffe2 (Optional))              | The compiler should support import of NN model in Caffe2 format (parsing & verification)                                          | [Import NN model](#import-nn-model)     |
+| RF-4 (Frontend: lossless import)                | The frontend should use the lossless approach while it is converting any NN model to IR                                           | [Import NN model](#import-nn-model)     |
+| RF-5 (Frontend: Inception\_v3)                  | The frontend should successful import the Inception V3 NN model                                                                   | [Import NN model](#import-nn-model)     |
+| RF-6 (Frontend: MobileNet)                      | The frontend should successful import the MobileNet NN model                                                                      | [Import NN model](#import-nn-model)     |
+| RF-7 (Backend: ARM CPU)                         | The compiler should produce executable for ARM CPU                                                                                | [Generate the code](#generate-the-code) |
+| RF-8 (Backend: ARM GPU)                         | The compiler should produce the binary that takes advantages of GPU when it was specified before compilation                      | [Generate the code](#generate-the-code) |
+| RF-9 (Backend: Artefact type)                   | The compiler should produce executable as a shared library or as a static library                                                 | [Generate the code](#generate-the-code) |
+| RF-10 (Backend: Inception\_v3)                  | The compiler should produce the valid compiled artefact for Inception v3 NN model                                                 | [Generate the code](#generate-the-code) |
+| RF-11 (Backend: MobileNet)                      | The compiler should produce the valid compiled artefact for MobileNet NN model                                                    | [Generate the code](#generate-the-code) |
+| RF-12 (Config: command line)                    | The compiler should get configuration parameters from command line                                                                | [Initialization](#initialization)       |
+| RF-13 (Config: config file (Optional))          | The compiler should get configuration parameters from config file                                                                 | [Initialization](#initialization)       |
+| RF-14 (Config: environment variable (Optional)) | The compiler should get configuration parameters from environment variables                                                       | [Initialization](#initialization)       |
+| RF-15 (Artefact: result)                        | The artefact should provide comparable result to the original NN model for the same input data                                    | [Generate the code](#generate-the-code) |
+| RF-16 (Artefact: input verifications)           | The artefact should verify any input data and check consistency                                                                   | [Generate the code](#generate-the-code) |
+| RF-17 (Artefact: GPU)                           | The artefact should take advantage of the GPU for GPU-enabled operations                                                          | [Generate the code](#generate-the-code) |
+| RF-18 (Artefact: CPU)                           | The artefact should take advantage of CPU if it was specified                                                                     | [Generate the code](#generate-the-code) |
+
+**Design Module of S/W Architecture**
+
+| Requirement                                     | Import NN model | Generate the code | Initialization |
+| ----------------------------------------------- | --------------- | ----------------- | -------------- |
+| RF-1 (Frontend: Tensorflow Lite)                | O               |                   |                |
+| RF-2 (Frontend: Caffe)                          | O               |                   |                |
+| RF-3 (Frontend: Caffe2 (Optional))              | O               |                   |                |
+| RF-4 (Frontend: lossless import)                | O               |                   |                |
+| RF-5 (Frontend: Inception\_v3)                  | O               |                   |                |
+| RF-6 (Frontend: MobileNet)                      | O               |                   |                |
+| RF-7 (Backend: ARM CPU)                         |                 | O                 |                |
+| RF-8 (Backend: ARM GPU)                         |                 | O                 |                |
+| RF-9 (Backend: Artefact type)                   |                 | O                 |                |
+| RF-10 (Backend: Inception\_v3)                  |                 | O                 |                |
+| RF-11 (Backend: MobileNet)                      |                 | O                 |                |
+| RF-12 (Config: command line)                    |                 |                   | O              |
+| RF-13 (Config: config file (Optional))          |                 |                   | O              |
+| RF-14 (Config: environment variable (Optional)) |                 |                   | O              |
+| RF-15 (Artefact: result)                        |                 | O                 |                |
+| RF-16 (Artefact: input verifications)           |                 | O                 |                |
+| RF-17 (Artefact: GPU)                           |                 | O                 |                |
+| RF-18 (Artefact: CPU)                           |                 | O                 |                |
diff --git a/docs/nncc/project/requirements_specification.md b/docs/nncc/project/requirements_specification.md
new file mode 100644
index 000000000..7a6fce762
--- /dev/null
+++ b/docs/nncc/project/requirements_specification.md
@@ -0,0 +1,272 @@
+# SW Requirements Specification
+
+
+**Revision history**
+
+| Ver. | Date       | Contents                                   | Author             | Approver     |
+| ---- | ---------- | ------------------------------------------ | ------------------ | ------------ |
+| 0.1  | 2018.04.11 | Initial version                            | Vostokov Sergey    | Sung-Jae Lee |
+| 0.2  | 2018.04.11 | SE member in-charge review                 | Aleksei Kondrashov |              |
+| 1.0  | 2018.04.13 | Final Execution DR version                 | Vostokov Sergey    | Sung-Jae Lee |
+| 1.1  | 2018.05.24 | Add new requirement in Source code section | Vostokov Sergey    | Sung-Jae Lee |
+
+## Introduction
+
+### Purpose and scope
+
+The main goal of the project is to develop a compiler for neural
+networks to produce executable artefact for specified SW and HW
+platform.
+
+The development scope includes the following components:
+
+  - Develop importer module to parse, verify and represent NN model for
+    further optimization and compilation
+  - Develop code emitters to produce executable binary for CPU and GPU
+
+2018 year goals:
+
+  - Support TensorFlow Lite NN model format
+  - Support Caffe NN model format
+  - Support Caffe2 NN model format (Optional)
+  - Support compilation of MobileNet NN
+  - Support compilation of Inception v3 NN
+  - Support ARM CPU
+  - Support ARM GPU (Mali)
+  - Support Tizen OS
+  - Support SmartMachine OS (Optional)
+
+### Terminology and Abbreviation
+
+|              |                                                               |
+| ------------ | ------------------------------------------------------------- |
+| OS           | Operating System                                              |
+| OS API       | Application interface of OS                                   |
+| HW           | Hardware                                                      |
+| SW           | Software                                                      |
+| NN           | Neural Network                                                |
+| NN model     | Neural network model (Instance of NN built with ML framework) |
+| NN compiler  | The compiler for neural network                               |
+| ML framework | The machine learning framework                                |
+| TF/TF Lite   | Tensorflow/Tensorflow Lite ML framework                       |
+| IR           | Intermediate representation                                   |
+| CI/CI system | Continuous integration system                                 |
+| UI           | The user interface                                            |
+| GUI          | The graphical user interface                                  |
+| CLI          | The command-line interface                                    |
+
+### SW System Architecture
+
+The main components of the compiler are the following:
+
+  - Configuration system
+  - Importer (convert supported NN model to Model IR before
+    optimization)
+  - High-Level optimization (Applies HW independent optimizations)
+  - Low-Level optimization (Applies optimizations appropriate to the
+    specified target HW)
+  - Code emitter (Produces the binary to take advantages of CPU and/or
+    GPU)
+
+![image](../images/nncc_idef0_a1.png)
+
+### Relevant Industry Standards
+
+Architecture design is described using IDEF notation. Since the nncc is a part of open source STAR Platform project
+any other industry standards not required and/or applicable.
+
+## SW Functional Requirements
+
+### Frontend
+
+| ID   | Requirement Name            | Description                                                                                                                       |
+| ---- | --------------------------- | --------------------------------------------------------------------------------------------------------------------------------- |
+| RF-1 | Frontend: Tensorflow Lite   | The compiler should support import of NN model in Tensorflow Lite format (parsing & verification of data scheme v0-v3, 50 NN ops) |
+| RF-2 | Frontend: Caffe             | The compiler should support import of NN model in Caffe format (parsing & verification)                                           |
+| RF-3 | Frontend: Caffe2 (Optional) | The compiler should support import of NN model in Caffe2 format (parsing & verification)                                          |
+| RF-4 | Frontend: lossless import   | The front-end should use the lossless approach while it is converting any NN model to IR                                          |
+| RF-5 | Frontend: Inception\_v3     | The front-end should successful import the Inception V3 NN model                                                                  |
+| RF-6 | Frontend: MobileNet         | The front-end should successful import the MobileNet NN model                                                                     |
+
+### High-Level optimization
+
+No special requirements
+
+### Low-Level optimization
+
+No special requirements
+
+### Backend
+
+| ID    | Requirement Name       | Description                                                                                                  |
+| ----- | ---------------------- | ------------------------------------------------------------------------------------------------------------ |
+| RF-7  | Backend: ARM CPU       | The compiler should produce executable for ARM CPU                                                           |
+| RF-8  | Backend: ARM GPU       | The compiler should produce the binary that takes advantages of GPU when it was specified before compilation |
+| RF-9  | Backend: Artefact type | The compiler should produce executable as a shared library or as a static library                            |
+| RF-10 | Backend: Inception\_v3 | The compiler should produce the valid compiled artefact for Inception v3 NN model                            |
+| RF-11 | Backend: MobileNet     | The compiler should produce the valid compiled artefact for MobileNet NN model                               |
+
+### Configuration
+
+| ID    | Requirement Name                        | Description                                                                 |
+| ----- | --------------------------------------- | --------------------------------------------------------------------------- |
+| RF-12 | Config: command line                    | The compiler should get configuration parameters from command line          |
+| RF-13 | Config: config file (Optional)          | The compiler should get configuration parameters from config file           |
+| RF-14 | Config: environment variable (Optional) | The compiler should get configuration parameters from environment variables |
+
+### Compiled Artefact
+
+| ID    | Requirement Name              | Description                                                                                    |
+| ----- | ----------------------------- | ---------------------------------------------------------------------------------------------- |
+| RF-15 | Artefact: result              | The artefact should provide comparable result to the original NN model for the same input data |
+| RF-16 | Artefact: input verifications | The artefact should verify any input data and check consistency                                |
+| RF-17 | Artefact: GPU                 | The artefact should take advantage of the GPU for GPU-enabled operations                       |
+| RF-18 | Artefact: CPU                 | The artefact should take advantage of CPU if it was specified                                  |
+
+## SW Non-Functional Requirements
+
+### The compiler
+
+#### Performance
+
+No special requirements
+
+#### SW capacity
+
+No special requirements
+
+#### Reliability
+
+| ID    | Requirement Name   | Description                                                                                                                                                                                                                                                           |
+| ----- | ------------------ | --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
+| RNF-1 | Reliability: input | The compiler should produce correct executable in order to utilize CPU and GPU when the correct input data is provided. If the incorrect input data are provided the compiler should not produce a compiled artefact, but inform user about all errors which were met |
+
+#### Security
+
+No special requirements
+
+#### Usability
+
+No special requirements
+
+#### Availability
+
+No special requirements
+
+#### Maintainability
+
+No special
+requirements
+
+#### Extendibility
+
+| ID    | Requirement Name        | Description                                                                                                               |
+| ----- | ----------------------- | ------------------------------------------------------------------------------------------------------------------------- |
+| RNF-2 | Extendibility: frontend | The compiler design and implementations should provide possibility to add new features to front-end: new NN models format |
+| RNF-3 | Extendibility: backend  | The compiler design and implementations should provide possibility to add new features to backend (new targets)           |
+
+#### Testability
+
+| ID    | Requirement Name         | Description                                                                                                                                                                                                         |
+| ----- | ------------------------ | ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
+| RNF-4 | Testability: environment | The test environment should be built in order to verify compiler functionality, product build status, artefact build/execution status, artefact calculation result and calculation memory footprint and performance |
+
+#### Portability
+
+| ID    | Requirement Name   | Description                                         |
+| ----- | ------------------ | --------------------------------------------------- |
+| RNF-5 | Portability: Linux | The compiler should be portable with Linux-based OS |
+
+#### Scalability
+
+No special requirements
+
+#### Expandability
+
+No special
+requirements
+
+#### Configurability
+
+| ID    | Requirement Name                        | Description                                                                       |
+| ----- | --------------------------------------- | --------------------------------------------------------------------------------- |
+| RNF-6 | Configurability: command line           | The compiler should support applying configuration through command line options.  |
+| RNF-7 | Configurability: file (Optional)        | The compiler should support applying configuration through configuration file.    |
+| RNF-8 | Configurability: environment (Optional) | The compiler should support applying configuration through environment variables. |
+
+### The compiled artefact
+
+No special
+requirements
+
+### The source code
+
+| ID     | Requirement Name | Description                                                                                                                                                                                                                                                           |
+| ------ | ---------------- | --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
+| RNF-9  | Legislation      | All source code files should follows its original license and general project license without any conflicts                                                                                                                                                           |
+| RNF-10 | Legitimacy       | The project should have its own general license                                                                                                                                                                                                                       |
+| RNF-11 | Coding style     | Each source code file should follow the one defined for the project coding style                                                                                                                                                                                      |
+| RNF-12 | Contrib          | RNF-9, RNF-10, RNF-11 are applicable only for the final release version of source code. These requirements are not applicable to the source code placed in development branch or any folder which is used as temporary storage for the source code under development. |
+
+## SW Interface Requirements
+
+### The compiler interface
+
+#### User Interface
+
+| ID    | Requirement Name             | Description                                                                                                                             |
+| ----- | ---------------------------- | --------------------------------------------------------------------------------------------------------------------------------------- |
+| RIF-1 | Compiler UI: no interaction  | The compiler should not require any user interation during compilation (completed compilations, fatal exit)                             |
+| RIF-2 | Compiler UI: CLI             | The compiler is considering as a command line tool which proceed parameters from command line and/or config file, environment variables |
+| RIF-3 | Compiler UI: input           | The compiler should provide the facility to specify NN model to be compiled                                                             |
+| RIF-4 | Compiler UI: target device   | The compiler should provide the facility to specify result target device (CPU or GPU)                                                   |
+| RIF-5 | Compiler UI: target platform | The compiler should provide the facility to specify result target SW platform                                                           |
+| RIF-6 | Compiler UI: output          | The compiler should provide the facility to specify result target name                                                                  |
+| RIF-7 | Compiler UI: target type     | The compiler should provide the facility to specify result target type: shared or static library                                        |
+
+#### Hardware Interface
+
+| ID    | Requirement Name                 | Description                                                                 |
+| ----- | -------------------------------- | --------------------------------------------------------------------------- |
+| RIF-8 | Compiler HWI: x86\_64 executable | The solution should provide executables to run on x86\_64-compatible system |
+
+#### Software Interface
+
+| ID     | Requirement Name                           | Description                                                                                      |
+| ------ | ------------------------------------------ | ------------------------------------------------------------------------------------------------ |
+| RIF-9  | Compiler SWI: frontend plugin              | The compiler should provide the SW interface in order to add support of the new NN model formats |
+| RIF-10 | Compiler SWI: backend plugin (HW)          | The compiler should provide the SW interface in order to add support of the new HW               |
+| RIF-11 | Compiler SWI: backend plugin (SW Platform) | The compiler should provide the SW interface in order to add support of the new SW Platform      |
+
+#### Communication Interface
+
+No requirements for communication interface.
+
+### The compiled artefact interface
+
+#### User Interface
+
+| ID     | Requirement Name    | Description                         |
+| ------ | ------------------- | ----------------------------------- |
+| RIF-12 | Artefact UI: no GUI | Command line UI in text is suitable |
+
+#### Hardware Interface
+
+| ID     | Requirement Name  | Description                                                                   |
+| ------ | ----------------- | ----------------------------------------------------------------------------- |
+| RIF-13 | Artefact HWI: CPU | The artefact should use ARM CPU instruction set when it was built for ARM CPU |
+| RIF-14 | Artefact HWI: GPU | The artefact should use ARM GPU instruction set when it was build for ARM GPU |
+
+#### Software Interface
+
+| ID     | Requirement Name           | Description                                                                                                                                |
+| ------ | -------------------------- | ------------------------------------------------------------------------------------------------------------------------------------------ |
+| RIF-15 | Artefact SWI: GPU driver   | The artefact should use ARM GPU driver to invoke calculations when it was built for ARM GPU                                                |
+| RIF-16 | Artefact SWI: C/C++ header | The artefact should provide C/C++ interface in order to use it in other applications                                                       |
+| RIF-17 | Artefact SWI: shared type  | The compiled artefact should be a shared library in order to share it between several executables when it was specified before compilation |
+| RIF-18 | Artefact SWI: static type  | The compiled artefact should be a static library in order to be built-in to an executable when it was specified before compilation         |
+| RIF-19 | Artefact SWI: Info         | The artefact should provide SW interface in order to get the actual status of calculation process (progress, errors, final result)         |
+
+#### Communication Interface
+
+No requirements for communication interface.
diff --git a/docs/nncc/project/test_plan.md b/docs/nncc/project/test_plan.md
new file mode 100644
index 000000000..a1f0f0a97
--- /dev/null
+++ b/docs/nncc/project/test_plan.md
@@ -0,0 +1,442 @@
+# SW System Test Document
+
+**Revision history**
+
+| Ver. | Date       | Contents                   | Author             | Approver     |
+| ---- | ---------- | -------------------------- | ------------------ | ------------ |
+| 0.1  | 2018.04.12 | Initial version            | Vostokov Sergey    | Sung-Jae Lee |
+| 0.2  | 2018.04.13 | SE member in-charge review | Aleksei Kondrashov |              |
+| 1.0  | 2018.04.17 | Final Execution DR version | Vostokov Sergey    | Sung-Jae Lee |
+| 1.1  | 2018.06.20 | DR1 version                | Vostokov Sergey    | Sung-Jae Lee |
+
+**Terminology and Abbreviation**
+
+|              |                                                               |
+| ------------ | ------------------------------------------------------------- |
+| OS           | Operating System                                              |
+| OS API       | Application interface of OS                                   |
+| HW           | Hardware                                                      |
+| SW           | Software                                                      |
+| NN           | Neural Network                                                |
+| NN model     | Neural network model (Instance of NN built with ML framework) |
+| NN compiler  | The compiler for neural network                               |
+| ML framework | The machine learning framework                                |
+| TF/TF Lite   | Tensorflow/Tensorflow Lite ML framework                       |
+| IR           | Intermediate representation                                   |
+| CI/CI system | Continuous integration system                                 |
+| UI           | The user interface                                            |
+| GUI          | The graphical user interface                                  |
+| CLI          | The command-line interface                                    |
+
+**References**
+
+\[1\] Vostokov Sergey, [SW Requirements Specification](requirements_specification.md)
+
+## SW System Test Overview
+
+### Purpose
+
+Software testing is an investigation to provide the quality of the
+product under test and to reduce risk of its failure to users or
+customers. Purpose of testing is to detect software failures so that
+defects may be discovered and corrected.
+
+Software system test procedure is a collection of processes and methods
+used to ensure quality. An additional goal is to make sure that the
+product follows regulations and meets the quality standards expected by
+the customer.
+
+### Scope
+
+As the number of possible tests for every software is practically
+infinite, we use some strategy to select tests that are feasible for the
+available time and resources.
+
+Software system tests attempt to cover requirements listed in the [SW
+Requirement
+Specification](https://github.sec.samsung.net/STAR/nncc/doc/project/requirements_specification.md).
+
+Since the projest outcome is a compiler then its testing are in
+different domain than many other kinds of application or system testing.
+They are dedicated to find all possible issues that cause the following
+bugs:
+
+  - Compiler crashes (also known as an ICE or Internal Compiler Error)
+
+  - Compiler hangs (kind of infinite loop in the compiler)
+
+  - Bad code generation (a result of incorrect compiler output):
+    
+       - Bad code generation that leads to a crash in the application
+       - “Silent” bad code generation
+
+  - Compiler throughput issues (Issues that affect the amount of time
+    the compiler takes to compile code )
+
+  - Code quality issues (Issues that affect the performance of the
+    compiled application)
+
+  - Compiler feature correctness issues (This class of bugs involves the
+    compiler generating correct code, but not doing what a particular
+    feature specifies should be
+done)
+
+## SW System Test Items
+
+### Functions to be tested
+
+| Feature                                  | Test Item ID | Test Item description                                                                                                                                               |
+| ---------------------------------------- | ------------ | ------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
+| RF-1, RIF-3 - RIF-7                      | TST-1        | Test suite checks NN ops import from Tensorflow Lite format by loading NN model that consists of a single NN op. One test for each NN op.                           |
+| RF-2, RIF-3 - RIF-7                      | TST-2        | Test suite checks NN ops import from Caffe format by loading NN model that consists of a single NN op. One test for each NN op.                                     |
+| RF-3, RIF-3 - RIF-7                      | TST-3        | Test suite checks NN ops import from Caffe2 format by loading NN model that consists of a single NN op. One test for each NN op.                                    |
+| RF-5, RIF-3 - RIF-7                      | TST-4        | The test should verify successful loading the Inception V3 NN model                                                                                                 |
+| RF-6, RIF-3 - RIF-7                      | TST-5        | The test should verify successful loading the MobileNet NN model                                                                                                    |
+| RF-4                                     | TST-6        | The test suite should automatically verify the completeness of information that was read from the raw data by comparing it with serialized raw data from Model IR   |
+| RF-7, RF-18, RIF-13                      | TST-7        | The unit test should automatically verify successful execution of binary on target ARM CPU                                                                          |
+| RF-8, RF-17, RIF-14, RIF-15              | TST-8        | The unit test should automatically verify successful execution of calculation on GPU                                                                                |
+| RF-9, RNF-1, RIF-17, RIF-18              | TST-9        | Unit test should verify the existence and format of binary (shared or static) in accordance to specified options                                                    |
+| RF-10                                    | TST-10       | Unit test should verify that compiler produces a compiled artefact for the Inception V3 NN model (Validity of compiled artefact is checked by other tests)          |
+| RF-11                                    | TST-11       | Unit test should verify that compiler produces a compiled artefact for the MobileNet NN model (Validity of compiled artefact is checked by other tests)             |
+| RF-12, RF-13, RF-14, RNF-6, RNF-7, RNF-8 | TST-12       | The test suite should verify correctness of configuration object by unit testing                                                                                    |
+| RF-15, RNF-1                             | TST-13       | The test suite is to verify the correctness of calculations by comparing the result of original NN model and the result of compiled artefact on the same input data |
+| RF-16                                    | TST-14       | Unit test should verify that the incorrect input data is processed with an error message without unexpected termination of the application                          |
+| RNF-4, RNF-5, RIF-8                      | TST-15       | A Linux-based OS should be used while the test environment are built.                                                                                               |
+| RIF-16                                   | TST-16       | The unit test should verify the existence and validity of generated C/C++ header for compiled artefact                                                              |
+
+Table 2-1. Test Item
+
+**The following requirements can be tested only manually:**
+
+  - Non-functional requirements: RNF-2, RNF-3 (They would be tested
+    during development)
+  - Interface requirements: RIF-1, RIF-2, RIF-9 - RIF-12, RIF-19
+
+### Functions not to be tested
+
+The following requirements cannot be tested:
+
+  - The source code requirements (RNF-9. RNF-10. RNF-11)
+
+## SW System Test Procedure
+
+### Test approaches
+
+While implementation of the project deliverables several kinds of
+testing are used. All of them are performed automatically by continuous
+integration system since it is developed. CI system subscribes on source
+code modification in the version control system. The configuration does
+not allow any changes to be merged into the main line if these changes
+do not pass merge mandatory tests.
+
+  - **Code style check** (Merge mandatory test): to verify consistency
+    of coding style
+  - **Build test** (Merge mandatory test): to verify the current build
+  - **Unit tests**: to verify SW system consistency. All new implemented
+    features, code refactoring, optimizations must not cause unit test
+    failure. Each unit test reflect the exact logic of testing
+    component, thus, it should be adopted any time when program logic
+    changes.
+  - **System tests**: to verify the feature quality as well as
+    compliance with its specified requirements.
+  - **Manual-based UI testing approach**: for interface requirements,
+    which cannot be automated
+
+### Test Pass/Fail Criteria
+
+All tests (unit/system) must be executed without any issues at any time
+for newly implemented, refactored, or changed code.
+
+### Test Start/Suspension/Resumption criteria
+
+Two mandatory tests (code style check and build test) are performed for
+every pool request (PR) before it is merged. The configuration of
+continuous integration system (CI) does not allow to merge the changes
+into devel branch if they does not pass the tests.
+
+Unit and feature testing are performed for the devel branch
+automatically. The merge to master branch (release) are possible when
+all these tests passed.
+
+### Regression Test strategy
+
+If a new issue is detected and it is not covered by an existing test
+then a new test will be developed. In other case the issue should be
+resolved.
+
+### Test tools
+
+|                                 |                                                                                      |
+| ------------------------------- | ------------------------------------------------------------------------------------ |
+| Source code static verification | AEGIS (CODE pre-commit test suite: static/structure/open source violation analyzers) |
+| Test execution                  | CMake                                                                                |
+| Defect management               | Samsung Research GitHub                                                              |
+| Continuous Integration system   | HQ CI (CODE)                                                                         |
+
+Table 3-1. Test Tools
+
+## SW System Test Schedule Plan
+
+### Test task & schedule
+
+|                |                         |                |                                        |
+| -------------- | ----------------------- | -------------- | -------------------------------------- |
+| Task           | Schedule                | Responsibility | Detailed Task                          |
+| Unit testing   | 01.04.2018 - 31.12.2018 | All            | All unit tests should be carried out   |
+| System testing | 01.04.2018 - 31.12.2018 | All            | All system tests should be carried out |
+
+Table 4-1. Test Tasks and Schedule
+
+### Test Resource organization plan
+
+#### Test environment
+
+| Type/Model | Operating System                  | Usage                                                                    |
+| ---------- | --------------------------------- | ------------------------------------------------------------------------ |
+| PC/x86     | Ubuntu GNU/Linux version \>=14.04 | Build system with unit tests. System and system tests are performed too. |
+| Tizen TM2  | Tizen                             | Unit and system testing                                                  |
+| Odroid XU4 | Tizen                             | Unit and system testing                                                  |
+
+Table 4-2. Hardware / Operating System
+
+| Type                | Spec                                                  | Usage                                                                           |
+| ------------------- | ----------------------------------------------------- | ------------------------------------------------------------------------------- |
+| Library             | Google test                                           | Organize test code and provide utility methods                                  |
+| VCS                 | Samsung github                                        | The source code version controlling system                                      |
+| CI                  | CODE                                                  | The HQ CI system                                                                |
+| Build system        | CMake                                                 | Run test and check status                                                       |
+| Device connectivity | sdb                                                   | Send tools to the device and provide shell to run it                            |
+| Management tool     | The CODE (Collaborative Open Development Environment) | Source code version control, code review, issue tracker, Continuous Integration |
+
+Table 4-3. Software
+
+### Risk management plan
+
+| Risk                                              | Description                                                                                                                                     | Probability | Countermeasures                                                                         |
+| ------------------------------------------------- | ----------------------------------------------------------------------------------------------------------------------------------------------- | ----------- | --------------------------------------------------------------------------------------- |
+| SmartMachine OS SDK toolchain is not available    | In order to support compilation for SmartMachine OS the SDK is required. The compiler would have dependency of a SmartMachine OS SDK toolchain. | High        | Suspend support of SmartMachine OS, and make plans when SmartMachine OS SDK is released |
+| SmartMachine OS targets are not available         | To perform testing of executables for SmartMachine OS the specified targets are required.                                                       | High        | Request targets or SW emulator when SmartMachine OS is released                         |
+| HQ CI does not support target testing             | Some tests required the target devices to be run on it. The provided CI system may not support such type of testing.                            | High        | Set CI environment on site                                                              |
+| Targets for testing/development are not available | Full automatic testing may take a long time. It also required target devices to execute the binaries.                                           | Medium      | Request/Buy enough amount of devices                                                    |
+
+Table 4-5. Risk Management
+
+### SW configuration management plan
+
+#### SW Configuration items identification
+
+| No | Document number           | SW configuration Item          | File name                                   |
+| -- | ------------------------- | ------------------------------ | ------------------------------------------- |
+| 1  | SRR-RAJ0118ZZ-BWRF-STD001 | System Test Document           | 18 NN compiler and Optimizer (STD) v1.0.pdf |
+| 2  | SRR-RAJ0118ZZ-BWRF-STS001 | System Test Case Specification | 18 NN compiler and Optimizer (STS) v1.0.pdf |
+| 3  | SRR-RAJ0118ZZ-BWRF-UTR001 | Unit Test Report               | 18 NN compiler and Optimizer (UTR) v1.0.pdf |
+
+Table 4-6. SW Configuration Items List
+
+#### Directory Structure
+
+| Directory                | Description                                                          |
+| ------------------------ | -------------------------------------------------------------------- |
+| /                        | source codes of the build system, main README file                   |
+| /contrib                 | Incubating projects                                                  |
+| /doc                     | Contains the documentation of the project                            |
+| /doc/project             | Contains project management documents (SRS, SDD, STD, HLD, DLD, etc) |
+| /libs                    | Contains the source of the libraries which are used by the nncc      |
+| /libs/core               | Contains the source code of the core library of nncc                 |
+| /libs/frontend           | Contains the source code of supported frontend's plugins             |
+| /libs/frontend/caffe     | The source code for the Caffe frontend                               |
+| /libs/frontend/caffe2    | The source code for the Caffe2 frontend                              |
+| /libs/frontend/tflite    | The source code for the Tensorflow Lite frontend                     |
+| /libs/backend            | Contains the source code of supported backend plugins                |
+| /libs/backend/cpu        | Contains the source code of CPU backend                              |
+| /libs/backend/gpu        | Contains the source code of GPU backend                              |
+| /libs/backend/3rd\_party | Contains the source code of backend to utilize 3rd party libraries   |
+| /scripts                 | Various scripts for building and testing the nncc                    |
+| /tools                   | The source code of the executables                                   |
+
+Table 4-7. Directory Structure
+
+#### Baseline
+
+| Test Round | Baseline Name | Configuration Item                                   | Schedule   |
+| ---------- | ------------- | ---------------------------------------------------- | ---------- |
+| Round 1    | The nncc v0.5 | SRR-RAJ0118ZZ-BWRF-STD001, SRR-RAJ0118ZZ-BWRF-UTR001 | 01.09.2018 |
+| Round 2    | The nncc v1.0 | SRR-RAJ0118ZZ-BWRF-STD002, SRR-RAJ0118ZZ-BWRF-UTR002 | 01.12.2018 |
+
+Table 4-8. Baselines
+
+## SW System Test Case
+
+| TestItem ID | Testcase ID | Test Procedures                                                                                                                                                                                    | Expected Results                                                                                                                                            |
+| ----------- | ----------- | -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | ----------------------------------------------------------------------------------------------------------------------------------------------------------- |
+| TST-1       | TST-1-1     | Import a NN consisting of a single Tensorflow Lite ADD operation                                                                                                                                   | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-2     | Import a NN consisting of a single Tensorflow Lite AVERAGE\_POOL\_2D operation                                                                                                                     | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-3     | Import a NN consisting of a single Tensorflow Lite CONCATENATION operation                                                                                                                         | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-4     | Import a NN consisting of a single Tensorflow Lite CONV\_2D operation                                                                                                                              | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-5     | Import a NN consisting of a single Tensorflow Lite DEPTHWISE\_CONV\_2D operation                                                                                                                   | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-6     | Import a NN consisting of a single Tensorflow Lite DEQUANTIZE operation                                                                                                                            | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-7     | Import a NN consisting of a single Tensorflow Lite EMBEDDING\_LOOKUP operation                                                                                                                     | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-8     | Import a NN consisting of a single Tensorflow Lite FULLY\_CONNECTED operation                                                                                                                      | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-9     | Import a NN consisting of a single Tensorflow Lite HASHTABLE\_LOOKUP operation                                                                                                                     | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-10    | Import a NN consisting of a single Tensorflow Lite L2\_NORMALIZATION operation                                                                                                                     | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-11    | Import a NN consisting of a single Tensorflow Lite L2\_POOL\_2D operation                                                                                                                          | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-12    | Import a NN consisting of a single Tensorflow Lite LOCAL\_RESPONSE\_NORMALIZATION operation                                                                                                        | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-13    | Import a NN consisting of a single Tensorflow Lite LOGISTIC operation                                                                                                                              | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-14    | Import a NN consisting of a single Tensorflow Lite LSH\_PROJECTION operation                                                                                                                       | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-15    | Import a NN consisting of a single Tensorflow Lite LSTM operation                                                                                                                                  | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-16    | Import a NN consisting of a single Tensorflow Lite MAX\_POOL\_2D operation                                                                                                                         | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-17    | Import a NN consisting of a single Tensorflow Lite MUL operation                                                                                                                                   | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-18    | Import a NN consisting of a single Tensorflow Lite RELU operation                                                                                                                                  | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-19    | Import a NN consisting of a single Tensorflow Lite RELU\_N1\_TO\_1 operation                                                                                                                       | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-20    | Import a NN consisting of a single Tensorflow Lite RELU6 operation                                                                                                                                 | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-21    | Import a NN consisting of a single Tensorflow Lite RESHAPE operation                                                                                                                               | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-22    | Import a NN consisting of a single Tensorflow Lite RESIZE\_BILINEAR operation                                                                                                                      | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-23    | Import a NN consisting of a single Tensorflow Lite RNN operation                                                                                                                                   | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-24    | Import a NN consisting of a single Tensorflow Lite SOFTMAX operation                                                                                                                               | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-25    | Import a NN consisting of a single Tensorflow Lite SPACE\_TO\_DEPTH operation                                                                                                                      | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-26    | Import a NN consisting of a single Tensorflow Lite SVDF operation                                                                                                                                  | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-27    | Import a NN consisting of a single Tensorflow Lite TANH operation                                                                                                                                  | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-28    | Import a NN consisting of a single Tensorflow Lite CONCAT\_EMBEDDINGS operation                                                                                                                    | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-29    | Import a NN consisting of a single Tensorflow Lite SKIP\_GRAM operation                                                                                                                            | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-30    | Import a NN consisting of a single Tensorflow Lite CALL operation                                                                                                                                  | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-31    | Import a NN consisting of a single Tensorflow Lite CUSTOM operation                                                                                                                                | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-32    | Import a NN consisting of a single Tensorflow Lite EMBEDDING\_LOOKUP\_SPARSE operation                                                                                                             | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-33    | Import a NN consisting of a single Tensorflow Lite PAD operation                                                                                                                                   | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-34    | Import a NN consisting of a single Tensorflow Lite UNIDIRECTIONAL\_SEQUENCE\_RNN operation                                                                                                         | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-35    | Import a NN consisting of a single Tensorflow Lite GATHER operation                                                                                                                                | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-36    | Import a NN consisting of a single Tensorflow Lite BATCH\_TO\_SPACE\_ND operation                                                                                                                  | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-37    | Import a NN consisting of a single Tensorflow Lite SPACE\_TO\_BATCH\_ND operation                                                                                                                  | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-38    | Import a NN consisting of a single Tensorflow Lite TRANSPOSE operation                                                                                                                             | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-39    | Import a NN consisting of a single Tensorflow Lite MEAN operation                                                                                                                                  | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-40    | Import a NN consisting of a single Tensorflow Lite SUB operation                                                                                                                                   | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-41    | Import a NN consisting of a single Tensorflow Lite DIV operation                                                                                                                                   | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-42    | Import a NN consisting of a single Tensorflow Lite SQUEEZE operation                                                                                                                               | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-43    | Import a NN consisting of a single Tensorflow Lite UNIDIRECTIONAL\_SEQUENCE\_LSTM operation                                                                                                        | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-44    | Import a NN consisting of a single Tensorflow Lite STRIDED\_SLICE operation                                                                                                                        | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-45    | Import a NN consisting of a single Tensorflow Lite BIDIRECTIONAL\_SEQUENCE\_RNN operation                                                                                                          | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-46    | Import a NN consisting of a single Tensorflow Lite EXP operation                                                                                                                                   | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-47    | Import a NN consisting of a single Tensorflow Lite TOPK\_V2 operation                                                                                                                              | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-48    | Import a NN consisting of a single Tensorflow Lite SPLIT operation                                                                                                                                 | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-49    | Import a NN consisting of a single Tensorflow Lite LOG\_SOFTMAX operation                                                                                                                          | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-50    | Import a NN consisting of a single Tensorflow Lite DELEGATE operation                                                                                                                              | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-51    | Import a NN consisting of a single Tensorflow Lite BIDIRECTIONAL\_SEQUENCE\_LSTM operation                                                                                                         | During import no crashes or error messages occurred                                                                                                         |
+| TST-1       | TST-1-52    | Import a NN consisting of a single Tensorflow Lite CAST operation                                                                                                                                  | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-1     | Import a NN consisting of Caffe ImageData layer                                                                                                                                                    | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-2     | Import a NN consisting of Caffe Data layer                                                                                                                                                         | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-3     | Import a NN consisting of Caffe HDF5Input layer                                                                                                                                                    | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-4     | Import a NN consisting of two Caffe layers - Input layer and HDF5Output layer                                                                                                                      | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-5     | Import a NN consisting of Caffe Input layer                                                                                                                                                        | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-6     | Import a NN consisting of Caffe WindowData layer                                                                                                                                                   | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-7     | Import a NN consisting of Caffe MemoryData layer                                                                                                                                                   | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-8     | Import a NN consisting of Caffe DummyData layer                                                                                                                                                    | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-9     | Import a NN consisting of two Caffe layers - Input layer and Convolution layer                                                                                                                     | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-10    | Import a NN consisting of two Caffe layers - Input layer and Pooling layer                                                                                                                         | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-11    | Import a NN consisting of two Caffe layers - Input layer and SPP layer                                                                                                                             | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-12    | Import a NN consisting of two Caffe layers - Input layer and Crop layer                                                                                                                            | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-13    | Import a NN consisting of two Caffe layers - Input layer and Deconvolution layer                                                                                                                   | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-14    | Import a NN consisting of two Caffe layers - Input layer and Im2Col layer                                                                                                                          | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-15    | Import a NN consisting of two Caffe layers - Input layer and Recurrent layer                                                                                                                       | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-16    | Import a NN consisting of two Caffe layers - Input layer and RNN layer                                                                                                                             | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-17    | Import a NN consisting of two Caffe layers - Input layer and LSTM layer                                                                                                                            | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-18    | Import a NN consisting of two Caffe layers - Input layer and InnerProduct layer                                                                                                                    | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-19    | Import a NN consisting of two Caffe layers - Input layer and Dropout layer                                                                                                                         | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-20    | Import a NN consisting of two Caffe layers - Input layer and Embed layer                                                                                                                           | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-21    | Import a NN consisting of two Caffe layers - Input layer and LRN layer                                                                                                                             | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-22    | Import a NN consisting of two Caffe layers - Input layer and MVN layer                                                                                                                             | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-23    | Import a NN consisting of two Caffe layers - Input layer and BatchNorm layer                                                                                                                       | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-24    | Import a NN consisting of two Caffe layers - Input layer and ReLU layer                                                                                                                            | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-25    | Import a NN consisting of two Caffe layers - Input layer and PReLU layer                                                                                                                           | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-26    | Import a NN consisting of two Caffe layers - Input layer and ELU layer                                                                                                                             | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-27    | Import a NN consisting of two Caffe layers - Input layer and Sigmoid layer                                                                                                                         | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-28    | Import a NN consisting of two Caffe layers - Input layer and TanH layer                                                                                                                            | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-29    | Import a NN consisting of two Caffe layers - Input layer and AbsVal layer                                                                                                                          | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-30    | Import a NN consisting of two Caffe layers - Input layer and Power layer                                                                                                                           | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-31    | Import a NN consisting of two Caffe layers - Input layer and Exp layer                                                                                                                             | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-32    | Import a NN consisting of two Caffe layers - Input layer and Log layer                                                                                                                             | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-33    | Import a NN consisting of two Caffe layers - Input layer and BNLL layer                                                                                                                            | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-34    | Import a NN consisting of two Caffe layers - Input layer and Threshold layer                                                                                                                       | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-35    | Import a NN consisting of two Caffe layers - Input layer and Bias layer                                                                                                                            | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-36    | Import a NN consisting of two Caffe layers - Input layer and Scale layer                                                                                                                           | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-37    | Import a NN consisting of two Caffe layers - Input layer and Flatten layer                                                                                                                         | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-38    | Import a NN consisting of two Caffe layers - Input layer and Reshape layer                                                                                                                         | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-39    | Import a NN consisting of two Caffe layers - Input layer and BatchReindex layer                                                                                                                    | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-40    | Import a NN consisting of two Caffe layers - Input layer and Split layer                                                                                                                           | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-41    | Import a NN consisting of two Caffe layers - Input layer and Concat layer                                                                                                                          | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-42    | Import a NN consisting of two Caffe layers - Input layer and Slice layer                                                                                                                           | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-43    | Import a NN consisting of two Caffe layers - Input layer and Eltwise layer                                                                                                                         | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-44    | Import a NN consisting of two Caffe layers - Input layer and Filter layer                                                                                                                          | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-45    | Import a NN consisting of two Caffe layers - Input layer and Parameter layer                                                                                                                       | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-46    | Import a NN consisting of two Caffe layers - Input layer and Reduction layer                                                                                                                       | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-47    | Import a NN consisting of two Caffe layers - Input layer and Silence layer                                                                                                                         | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-48    | Import a NN consisting of two Caffe layers - Input layer and ArgMax layer                                                                                                                          | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-49    | Import a NN consisting of two Caffe layers - Input layer and Softmax layer                                                                                                                         | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-50    | Import a NN consisting of two Caffe layers - Input layer and Python layer                                                                                                                          | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-51    | Import a NN consisting of two Caffe layers - Input layer and MultinomialLogisticLoss layer                                                                                                         | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-52    | Import a NN consisting of two Caffe layers - Input layer and Infogain layer                                                                                                                        | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-53    | Import a NN consisting of two Caffe layers - Input layer and SoftmaxWithLoss layer                                                                                                                 | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-54    | Import a NN consisting of two Caffe layers - Input layer and EuclideanLoss layer                                                                                                                   | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-55    | Import a NN consisting of two Caffe layers - Input layer and HingeLoss layer                                                                                                                       | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-56    | Import a NN consisting of two Caffe layers - Input layer and SigmoidCrossEntropyLoss layer                                                                                                         | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-57    | Import a NN consisting of two Caffe layers - Input layer and Accuracy layer                                                                                                                        | During import no crashes or error messages occurred                                                                                                         |
+| TST-2       | TST-2-58    | Import a NN consisting of two Caffe layers - Input layer and ContrastiveLoss layer                                                                                                                 | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-1     | Import a NN consisting of a single Caffe2 Add operation                                                                                                                                            | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-2     | Import a NN consisting of a single Caffe2 AveragePool2D operation                                                                                                                                  | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-3     | Import a NN consisting of a single Caffe2 Concat operation                                                                                                                                         | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-4     | Import a NN consisting of a single Caffe2 Conv2D operation                                                                                                                                         | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-5     | Import a NN consisting of a single Caffe2 FC operation                                                                                                                                             | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-6     | Import a NN consisting of a single Caffe2 LRN operation                                                                                                                                            | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-7     | Import a NN consisting of a single Caffe2 Sigmoid operation                                                                                                                                        | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-8     | Import a NN consisting of a single Caffe2 MaxPool2D operation                                                                                                                                      | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-9     | Import a NN consisting of a single Caffe2 Mul operation                                                                                                                                            | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-10    | Import a NN consisting of a single Caffe2 Relu operation                                                                                                                                           | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-11    | Import a NN consisting of a single Caffe2 Reshape operation                                                                                                                                        | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-12    | Import a NN consisting of a single Caffe2 Softmax operation                                                                                                                                        | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-13    | Import a NN consisting of a single Caffe2 Tanh operation                                                                                                                                           | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-14    | Import a NN consisting of a single Caffe2 PadImage operation                                                                                                                                       | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-15    | Import a NN consisting of a single Caffe2 BatchToSpace operation                                                                                                                                   | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-16    | Import a NN consisting of a single Caffe2 SpaceToBatch operation                                                                                                                                   | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-17    | Import a NN consisting of a single Caffe2 Transpose operation                                                                                                                                      | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-18    | Import a NN consisting of a single Caffe2 Mean operation                                                                                                                                           | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-19    | Import a NN consisting of a single Caffe2 Sub operation                                                                                                                                            | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-20    | Import a NN consisting of a single Caffe2 Div operation                                                                                                                                            | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-21    | Import a NN consisting of a single Caffe2 Squeeze operation                                                                                                                                        | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-22    | Import a NN consisting of a single Caffe2 Exp operation                                                                                                                                            | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-23    | Import a NN consisting of a single Caffe2 TopK operation                                                                                                                                           | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-24    | Import a NN consisting of a single Caffe2 Split operation                                                                                                                                          | During import no crashes or error messages occurred                                                                                                         |
+| TST-3       | TST-3-25    | Import a NN consisting of a single Caffe2 Cast operation                                                                                                                                           | During import no crashes or error messages occurred                                                                                                         |
+| TST-4       | TST-4-1     | Import Inception V3 NN model                                                                                                                                                                       | During import no crashes or error messages occurred                                                                                                         |
+| TST-5       | TST-5-1     | Import MobileNet NN model                                                                                                                                                                          | During import no crashes or error messages occurred                                                                                                         |
+| TST-6       | TST-6-1     | Import Inception V3 NN model, serialize all model weights, compare serialized data with the initial NN model                                                                                       | Test executed successfully, serialized weights are equal to initial model weights                                                                           |
+| TST-6       | TST-6-2     | Import MobileNet NN model, serialize all model weigths, compare serialized data with the initial NN model                                                                                          | Test executed successfully, serialized weights are equal to initial model weights                                                                           |
+| TST-7       | TST-7-1     | Generate binary for the Inception V3 NN model and run its inference on a device with ARM CPU                                                                                                       | Test executed successfully, no crashes occurred, inference result was output, amount and format of the outputs corresponds to the expected NN model outputs |
+| TST-7       | TST-7-2     | Generate binary for the MobileNet NN model and run its inference on a device with ARM CPU                                                                                                          | Test executed successfully, no crashes occurred, inference result was output, amount and format of the outputs corresponds to the expected NN model outputs |
+| TST-8       | TST-8-1     | Generate binary for the Inception V3 NN model and run its inference on a GPU-enabled device                                                                                                        | Test executed successfully, no crashes occurred, inference result was output, amount and format of the outputs corresponds to the expected NN model outputs |
+| TST-8       | TST-8-2     | Generate binary for the MobileNet V3 NN model and run its inference on a GPU-enabled device                                                                                                        | Test executed successfully, no crashes occurred, inference result was output, amount and format of the outputs corresponds to the expected NN model outputs |
+| TST-9       | TST-9-1     | Provide correct NN model, compile it as a static library, then check that corresponding binary exists and it is a static library                                                                   | Test executed successfully                                                                                                                                  |
+| TST-9       | TST-9-2     | Provide correct NN model, compile it as a shared library, then check that corresponding binary exists and it is a shared library                                                                   | Test executed successfully                                                                                                                                  |
+| TST-9       | TST-9-3     | Provide incorrect model, compile it as a static library, then check that no compiled artifact is produced                                                                                          | Test executed successfully                                                                                                                                  |
+| TST-9       | TST-9-4     | Provide incorrect model, compile it as a shared library, then check that no compiled artifact is produced                                                                                          | Test executed successfully                                                                                                                                  |
+| TST-10      | TST-10-1    | Check that a static library is provided after compiling Inception V3 as a static library                                                                                                           | Test executed successfully                                                                                                                                  |
+| TST-10      | TST-10-2    | Check that a shared library is provided after compiling Inception V3 as a shared library                                                                                                           | Test executed successfully                                                                                                                                  |
+| TST-11      | TST-11-1    | Check that a static library is provided after compiling MobileNet as a static library                                                                                                              | Test executed successfully                                                                                                                                  |
+| TST-11      | TST-11-2    | Check that a shared library is provided after compiling MobileNet as a shared library                                                                                                              | Test executed successfully                                                                                                                                  |
+| TST-12      | TST-12-1    | Check that configuration object is constructed correctly when getting configuration parameters from command line                                                                                   | Test executed successfully                                                                                                                                  |
+| TST-12      | TST-12-2    | Check that configuration object is constructed correctly when getting configuration parameters from config file                                                                                    | Test executed successfully                                                                                                                                  |
+| TST-12      | TST-12-3    | Check that configuration object is constructed correctly when getting configuration parameters from environment variables                                                                          | Test executed successfully                                                                                                                                  |
+| TST-13      | TST-13-1    | Compile Inception V3 as static library for CPU, provide it and the original model with same correct input data, then compare the result from original model with the result from compiled artifact | Test executed successfully, results are comparable                                                                                                          |
+| TST-13      | TST-13-2    | Compile Inception V3 as shared library for CPU, provide it and the original model with same correct input data, then compare the result from original model with the result from compiled artifact | Test executed successfully, results are comparable                                                                                                          |
+| TST-13      | TST-13-3    | Compile Inception V3 as static library for GPU, provide it and the original model with same correct input data, then compare the result from original model with the result from compiled artifact | Test executed successfully, results are comparable                                                                                                          |
+| TST-13      | TST-13-4    | Compile Inception V3 as shared library for GPU, provide it and the original model with same correct input data, then compare the result from original model with the result from compiled artifact | Test executed successfully, results are comparable                                                                                                          |
+| TST-13      | TST-13-5    | Compile MobileNet as static library for CPU, provide it and the original model with same correct input data, then compare the result from original model with the result from compiled artifact    | Test executed successfully, results are comparable                                                                                                          |
+| TST-13      | TST-13-6    | Compile MobileNet as shared library for CPU, provide it and the original model with same correct input data, then compare the result from original model with the result from compiled artifact    | Test executed successfully, results are comparable                                                                                                          |
+| TST-13      | TST-13-7    | Compile MobileNet as static library for GPU, provide it and the original model with same correct input data, then compare the result from original model with the result from compiled artifact    | Test executed successfully, results are comparable                                                                                                          |
+| TST-13      | TST-13-8    | Compile MobileNet as shared library for GPU, provide it and the original model with same correct input data, then compare the result from original model with the result from compiled artifact    | Test executed successfully, results are comparable                                                                                                          |
+| TST-14      | TST-14-1    | Provide compiled Inception V3 artifact with invalid input, check that no unexpected termination occurs                                                                                             | Test executed successfully                                                                                                                                  |
+| TST-14      | TST-14-2    | Provide compiled Inception V3 artifact with invalid input, check that an error message is provided                                                                                                 | Test executed successfully                                                                                                                                  |
+| TST-14      | TST-14-3    | Provide compiled MobileNet artifact with invalid input, check that no unexpected termination occurs                                                                                                | Test executed successfully                                                                                                                                  |
+| TST-14      | TST-14-4    | Provide compiled MobileNet artifact with invalid input, check that an error message is provided                                                                                                    | Test executed successfully                                                                                                                                  |
+| TST-15      | TST-15-1    | Check that the OS used during test environment build is Linux-based                                                                                                                                | Test executed successfully                                                                                                                                  |
+| TST-16      | TST-16-1    | Compile a valid NN model, then check that C/C++ header corresponding to compiled artifact exists                                                                                                   | Test executed successfully                                                                                                                                  |
+| TST-16      | TST-16-2    | Compile a valid NN model, then if C/C++ header corresponding to compiled artifact exists, verify its validity                                                                                      | Test executed successfully                                                                                                                                  |
+
+Table 5-1. System Test case
diff --git a/docs/nncc/project_guide.md b/docs/nncc/project_guide.md
new file mode 100644
index 000000000..af6a5acfd
--- /dev/null
+++ b/docs/nncc/project_guide.md
@@ -0,0 +1,27 @@
+### How to create your own project
+_nncc_ aims to make it easy to develop optimized, retargetable NN compilers. Anyone or team interested in _nncc_ can create a new incubating project.
+
+#### Subject
+Subject is related to NN(Neural Network) complier. Some examples are below, but not limited:
+- NN IR(Intermediate Representation)
+- Extended frontend and backend
+- High-performance (model optimization, memory optimization, scheduling, etc.)
+- Tools (verification, benchmark, visualization, etc.)
+- Tutorial, testbed
+
+#### How to propose
+There is no formal proposal process. Anyone can submit an issue or a PR as a starting point of a proposal. It would be helpful that the submissions have documents or descriptions containing the followings to share your idea and concept and attract new contibutors to your project (not mandatory):
+- Overview, goal or architecture description to explain your project
+- How-to guide including building and running your programs
+
+#### Directory to use
+- A directory under `compiler/`, which starts with your project name.
+
+#### Requirement
+- A project should follow the formal review process that _nncc_ is currently using [[(How to create a Pull Request (in contribution guide)](contribution_guide.md#how-to-create-a-pull-request)].
+
+#### How to enable format checker
+- Create a `.FORMATCHECKED` file in your project directory for format checker to check the source code of the directory and its subdirectories.
+
+#### How to contribute`
+Anyone who wants to contribute can create and submit PRs and issues following [nncc contribution_guide](contribution_guide.md). _nncc_ always welcomes your contribution.
diff --git a/docs/nncc/roadmap.md b/docs/nncc/roadmap.md
new file mode 100644
index 000000000..d2227e8be
--- /dev/null
+++ b/docs/nncc/roadmap.md
@@ -0,0 +1,6 @@
+## 2018
+
+In 2018, _nncc_ will provide Caffe/TensorFlow Lite frontends and ARM CPU/GPU backends built on top of
+well-specified common (re-targetable) intermediate representation (IR) which is expressive enough to
+encode Inception(v3) and MobileNet, and is flexible enough to support next-gen H/W architectures, such
+as DSP or NPU.
diff --git a/docs/nnfw/2018/fig/nnfw_architecture.png b/docs/nnfw/2018/fig/nnfw_architecture.png
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/nnfw/2018/fig/nnfw_architecture.png
diff --git a/docs/nnfw/2018/fig/nnfw_architecture.pptx b/docs/nnfw/2018/fig/nnfw_architecture.pptx
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/nnfw/2018/fig/nnfw_architecture.pptx
diff --git a/docs/project/2018_requirement_specification.md b/docs/nnfw/2018/project/2018_requirement_specification.md
index 90e3937ef..90e3937ef 100644
--- a/docs/project/2018_requirement_specification.md
+++ b/docs/nnfw/2018/project/2018_requirement_specification.md
diff --git a/docs/roadmap.md b/docs/nnfw/2018/roadmap.md
index aca206889..aca206889 100644
--- a/docs/roadmap.md
+++ b/docs/nnfw/2018/roadmap.md
diff --git a/docs/workgroups.md b/docs/nnfw/2018/workgroups.md
index b258c3971..b258c3971 100644
--- a/docs/workgroups.md
+++ b/docs/nnfw/2018/workgroups.md
diff --git a/docs/HowToImplementOperatorKernel.md b/docs/nnfw/HowToImplementOperatorKernel.md
index 715575a5f..715575a5f 100644
--- a/docs/HowToImplementOperatorKernel.md
+++ b/docs/nnfw/HowToImplementOperatorKernel.md
diff --git a/docs/nnfw/fig/nnfw_architecture.png b/docs/nnfw/fig/nnfw_architecture.png
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/nnfw/fig/nnfw_architecture.png
diff --git a/docs/nnfw/fig/nnfw_architecture.pptx b/docs/nnfw/fig/nnfw_architecture.pptx
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/nnfw/fig/nnfw_architecture.pptx
diff --git a/docs/nnfw/fig/nnfw_behavior.png b/docs/nnfw/fig/nnfw_behavior.png
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/nnfw/fig/nnfw_behavior.png
diff --git a/docs/nnfw/fig/nnfw_behavior.pptx b/docs/nnfw/fig/nnfw_behavior.pptx
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/nnfw/fig/nnfw_behavior.pptx
diff --git a/docs/nnfw/howto.md b/docs/nnfw/howto.md
new file mode 100644
index 000000000..48e26a28a
--- /dev/null
+++ b/docs/nnfw/howto.md
@@ -0,0 +1,37 @@
+## Build Requires
+
+If you are building this project, then the following modules must be installed on your system:
+
+- CMake
+- Boost C++ libraries
+
+```
+$ sudo apt-get install cmake libboost-all-dev
+```
+
+## How to use (simple) NNAPI Binding
+
+This repo provides a T/F Lite Model loader(named ``tflite_run``), and simple NNAPI binding.
+
+Let's type the following commands, and see what happens!
+```
+$ make install
+$ USE_NNAPI=1 LD_LIBRARY_PATH="$(pwd)/Product/obj/runtimes/logging:$(pwd)/Product/out/lib" Product/out/bin/tflite_run [T/F Lite Flatbuffer Model Path]
+```
+
+## How to get pre-built T/F Lite Flatbuffer models?
+Google provides several pre-built T/F Lite models. Please check [this page](https://www.tensorflow.org/lite/models)
+
+
+## Build How-to
+- [Cross building for ARM](howto/CrossBuildForArm.md)
+- [Cross building for AARCH64](howto/CrossBuildForAarch64.md)
+- [Build using prebuilt docker image](howto/HowToUseDockerImage.md)
+
+
+## Other how-to documents
+- [Building TensorFlow and TOCO from source](howto/BuildTFfromSource.md)
+- [How to setup XU3 with Ubuntu 16.04](howto/device/xu3_ubuntu.md)
+- [How to setup XU4 with Ubuntu 16.04](howto/device/xu4_ubuntu.md)
+- [How to add unittest using gtest](howto/HowToAddUnittest.md)
+- [How to manually test NNFW on single model/input pair](howto/HowToTestManualy.md)
diff --git a/docs/howto/BuildTFfromSource.md b/docs/nnfw/howto/BuildTFfromSource.md
index 3880d5ab9..3880d5ab9 100644
--- a/docs/howto/BuildTFfromSource.md
+++ b/docs/nnfw/howto/BuildTFfromSource.md
diff --git a/docs/howto/CrossBuildForAarch64.md b/docs/nnfw/howto/CrossBuildForAarch64.md
index f3dc55236..f3dc55236 100644
--- a/docs/howto/CrossBuildForAarch64.md
+++ b/docs/nnfw/howto/CrossBuildForAarch64.md
diff --git a/docs/nnfw/howto/CrossBuildForArm.md b/docs/nnfw/howto/CrossBuildForArm.md
new file mode 100644
index 000000000..110dde861
--- /dev/null
+++ b/docs/nnfw/howto/CrossBuildForArm.md
@@ -0,0 +1,129 @@
+# Cross building for ARM
+
+## Prepare Ubuntu RootFS
+
+Install required packages
+
+```
+sudo apt-get install qemu qemu-user-static binfmt-support debootstrap
+```
+
+Use `build_rootfs.sh` script to prepare Root File System. You should have `sudo`
+
+```
+sudo ./tools/cross/build_rootfs.sh arm
+```
+- supports `arm`(default) and `arm64` architecutre for now
+- supports `xenial`(default) and `trusty` release
+
+To see the options,
+```
+./tools/cross/build_rootfs.sh -h
+```
+
+RootFS will be prepared at `tools/cross/rootfs/arm` folder.
+
+### Prepare RootFS at alternative folder
+
+Use `ROOTFS_DIR` to a full path to prepare at alternative path.
+
+```
+ROOTFS_DIR=/home/user/rootfs/arm-xenial sudo ./tools/cross/build_rootfs.sh arm
+```
+
+### Using proxy
+
+If you need to use proxy server while building the rootfs, use `--setproxy` option.
+
+```
+# for example,
+sudo ./tools/cross/build_rootfs.sh arm --setproxy="1.2.3.4:8080"
+# or
+sudo ./tools/cross/build_rootfs.sh arm --setproxy="proxy.server.com:8888"
+```
+
+This will put `apt` proxy settings in `rootfs/etc/apt/apt.conf.d/90proxy` file
+for `http`, `https` and `ftp` protocol.
+
+## Install ARM Cross Toolchain
+
+We recommend you have g++ >= 6 installed on your system because NN generated tests require it.
+
+- On Ubuntu 16.04 or older, follow the next steps:
+
+```
+cd ~/your/path
+wget https://releases.linaro.org/components/toolchain/binaries/7.2-2017.11/arm-linux-gnueabihf/gcc-linaro-7.2.1-2017.11-x86_64_arm-linux-gnueabihf.tar.xz
+tar xvf gcc-linaro-7.2.1-2017.11-x86_64_arm-linux-gnueabihf.tar.xz
+echo 'PATH=~/your/path/gcc-linaro-7.2.1-2017.11-x86_64_arm-linux-gnueabihf/bin:$PATH' >> ~/.bashrc
+```
+
+- On Ubuntu 18.04 LTS, you can install using `apt-get`.
+Choose g++ version whatever you prefer: 6, 7 or 8.
+
+```
+sudo apt-get install g++-{6,7,8}-arm-linux-gnueabihf
+```
+
+Make sure you get `libstdc++.so` updated on your target with your new toolchain's corresponding one.
+
+For example, if you installed gcc-linaro-7.2.1-2017.11 above, do
+
+```
+wget https://releases.linaro.org/components/toolchain/binaries/7.2-2017.11/arm-linux-gnueabihf/runtime-gcc-linaro-7.2.1-2017.11-arm-linux-gnueabihf.tar.xz
+tar xvf runtime-gcc-linaro-7.2.1-2017.11-arm-linux-gnueabihf.tar.xz
+```
+
+Then, copy `libstdc++.so.6.0.24` into `/usr/lib/arm-linux-gnueabihf`, and update symbolic links on your device.
+
+## Build and install ARM Compute Library
+
+Mostly you only need once of ACL build.
+
+ACL will be automatically installed in `externals/acl` when you build nnfw without any changes.
+
+You can check ACL source information in `cmake/packages/ARMComputeSourceConfig.cmake`
+
+## Build nnfw
+
+Give `TARGET_ARCH` variable to set the target architecture.
+
+If you used `ROOTFS_DIR` to prepare in alternative folder, you should also give this to makefile.
+
+```
+CROSS_BUILD=1 TARGET_ARCH=armv7l make all install
+
+# If ROOTFS_DIR is in alternative folder
+ROOTFS_DIR=/path/to/your/rootfs/arm \
+CROSS_BUILD=1 TARGET_ARCH=armv7l make all install
+```
+
+You can also omit the `CROSS_BUILD=1` option if you explicitly pass `ROOTFS_DIR`. In that case, if
+the `TARGET_ARCH` are differs from the hostarchitecture, the make script automatically applies
+`CROSS_BUILD=1`. So, if you set `ROOTFS_DIR` as an environment variable, you can simply perform
+normal build and cross build as follows.
+
+```
+export ROOTFS_DIR = xxx
+...
+make all install    # do normal build 
+TARGET_ARCH = armv7l make all install    # do cross build
+```
+
+If you want to build neurun, you should switch on `BUILD_NEURUN` option in `cmake/CfgOptionFlags.cmake`
+```
+option(BUILD_NEURUN "Build neurun" ON)
+```
+
+## Run test
+- PureACL
+```
+ ./tests/scripts/test_driver.sh --artifactpath=.
+```
+
+- neurun
+```
+ ./tests/scripts/test_driver.sh --artifactpath=. \
+ --ldlibrarypath=Product/out/lib/neurun:Product/out/lib \
+ --frameworktest_list_file=tests/scripts/neurun_frameworktest_list.armv7l.acl_cl.txt
+```
diff --git a/docs/howto/HowToAddUnittest.md b/docs/nnfw/howto/HowToAddUnittest.md
index 5bb75b258..5bb75b258 100644
--- a/docs/howto/HowToAddUnittest.md
+++ b/docs/nnfw/howto/HowToAddUnittest.md
diff --git a/docs/nnfw/howto/HowToTestManualy.md b/docs/nnfw/howto/HowToTestManualy.md
new file mode 100644
index 000000000..545f97a1f
--- /dev/null
+++ b/docs/nnfw/howto/HowToTestManualy.md
@@ -0,0 +1,64 @@
+# How to test NNFW on single model/input pair
+
+1. Select backend through environment variables:
+    * acl_cl: `export OP_BACKEND_ALLOPS=acl_cl`
+    * acl_neon: `export OP_BACKEND_ALLOPS=acl_neon`
+    * cpu: `export OP_BACKEND_ALLOPS=cpu`
+    * different backends for different operations:
+        ``` 
+        unset OP_BACKEND_ALLOPS
+        export OP_BACKEND_Conv2DNode=cpu
+        export OP_BACKEND_MaxPool2DNode=acl_cl
+        export OP_BACKEND_AvgPool2DNode=acl_neon
+        ```
+        
+2. Select executor through environment variable:
+    * linear: `export EXECUTOR=Linear`
+    * dataflow: `export EXECUTOR=Dataflow`
+    * parallel: `export EXECUTOR=Parallel`
+    
+3. Set library path: `export LD_LIBRARY_PATH=/path/to/nnfw/Product/armv7l-linux.debug/out/lib`
+
+## Test NNFW through NNAPI
+
+### Testing on random input
+1. Generate random input, get reference result using tflite interpreter, dump input and result into file:
+    ```
+    /path/to/tflite_run --tflite /path/to/model.tflite --dump /path/to/out.dat
+    ```
+2. Inference with NNFW NNAPI and compare result with reference one:
+    ```
+    USE_NNAPI=1 /path/to/tflite_run --tflite /path/to/model.tflite ---compare /path/to/out.dat
+    ```
+
+### Testing on particular input
+1. Prepare input:
+
+    `tflite_run` consumes input as sequence of floats.
+    
+    For example, you could convert `.jpg` image into such format file with next python3 script:
+    ```
+    from PIL import Image
+    import numpy as np
+    
+    img = Image.open("./image.jpg")
+    np_img = np.array(img.getdata()).reshape(img.size[0], img.size[1], 3).astype(np.float32) / 255.
+    
+    with open('./converted_image.dat', 'wb') as f:
+        for i in np_img.flatten('C'):
+            f.write(i)
+    ```
+
+2. Get reference result using tflite interpreter, dump input and result into file:
+
+    ```
+    /path/to/tflite_run --tflite /path/to/model.tflite --input /path/to/input.dat --dump /path/to/out.dat
+    ```
+3. Inference with NNFW NNAPI and compare result with reference one:
+    ```
+    USE_NNAPI=1 /path/to/tflite_run --tflite /path/to/model.tflite ---compare /path/to/out.dat
+    ```
+
+## Test NNFW through NNPackage
+
+TODO: fill this section when NNPackage will be implemented
diff --git a/docs/nnfw/howto/HowToUseDockerImage.md b/docs/nnfw/howto/HowToUseDockerImage.md
new file mode 100644
index 000000000..0b2a859b3
--- /dev/null
+++ b/docs/nnfw/howto/HowToUseDockerImage.md
@@ -0,0 +1,158 @@
+# How to use docker image of nnfw
+
+We have a docker image to build `nnfw` repo.
+
+This docker image is built from https://github.sec.samsung.net/STAR/nnfw/blob/master/infra/docker/Dockerfile and based on Ubuntu 16.04.
+And prebuilt docker image is available from Samsung private docker registry.
+
+This document describes how to use prebuilt docker image when developing `nnfw`.
+
+## How to install docker
+
+Follow [Installing Docker](https://docs.docker.com/)
+
+- For Ubuntu, follow [Installing Docker on Ubuntu](https://docs.docker.com/install/linux/docker-ce/ubuntu/)
+
+These are the actual steps to install using apt package manager:
+```
+$ sudo apt-get install \
+     apt-transport-https \
+     ca-certificates \
+     curl \
+     software-properties-common
+$ curl -fsSL https://download.docker.com/linux/ubuntu/gpg | sudo apt-key add -
+$ sudo apt-key fingerprint 0EBFCD88
+```
+```
+$ sudo add-apt-repository \
+     "deb [arch=amd64] https://download.docker.com/linux/ubuntu \
+     $(lsb_release -cs) \
+	 stable"
+$ sudo apt-get update
+```
+```
+$ sudo apt-get install docker-ce
+```
+
+## Configure docker daemon
+
+1. Set HTTP/HTTPS proxy
+
+    * For Ubuntu, follow [Setting HTTP/HTTPS proxy environment variables](https://docs.docker.com/v17.09/engine/admin/systemd/#httphttps-proxy)
+
+If you are behind an HTTP or HTTPS proxy server, you will need to add this configuration in the Docker systemd service file.
+These are the actual steps to set an HTTP/HTTPS proxy environment variable:
+```
+$ sudo mkdir -p /etc/systemd/system/docker.service.d
+$ sudo vi /etc/systemd/system/docker.service.d/http-proxy.conf
+```
+```
+[Service]
+Environment="HTTP_PROXY=http://10.112.1.184:8080/" "HTTPS_PROXY=https://10.112.1.184:8080/" "NO_PROXY=localhost,127.0.0.1"
+```
+```
+$ sudo systemctl daemon-reload
+$ sudo systemctl restart docker
+$ systemctl show --property=Environment docker
+```
+
+2. Edit configuration file of docker daemon
+
+First you have to add Samsung private docker reigstry to your docker daemon.
+Depending on your docker daemon installed, there are two ways of configuration.
+
+
+If there is a `/etc/default/docker`, please edit the file as below.
+```
+$ sudo vi /etc/default/docker
+
+DOCKER_OPTS="--insecure-registry docker.sec.samsung.net:5000"
+```
+
+If there is a `/etc/docker/daemon.json`, please edit the file as below.
+```
+{
+  ...,
+  "insecure-registries": [..., "docker.sec.samsung.net:5000"]
+}
+```
+
+3. Then restart docker daemon as below.
+
+```
+$ sudo service docker restart     // Ubuntu 14.04
+
+or
+
+$ sudo systemctl restart docker   // Ubuntu 16.04
+```
+
+## Install docker image of `nnfw`
+
+Let's pull docker image for `nnfw` repo and tag it to `nnfw_docker:latest`
+
+```
+$ docker pull docker.sec.samsung.net:5000/star/nnfw/nnfw_docker:1.5
+$ docker tag docker.sec.samsung.net:5000/star/nnfw/nnfw_docker:1.5 nnfw_docker:latest
+```
+
+If you would like to build `nnfw` tizen package using gbs, pull `nnfw_docker_tizen`.
+```
+$ docker pull docker.sec.samsung.net:5000/star/nnfw/nnfw_docker_tizen:1.2
+$ docker tag docker.sec.samsung.net:5000/star/nnfw/nnfw_docker_tizen:1.2 nnfw_docker_tizen:latest
+```
+
+## Build docker image instead of pull
+
+You can build docker image in your environment instead of pull docker image from server.
+
+```
+$ cd nnfw
+$ ./nnfw build-docker
+```
+
+Default docker image name is `nnfw_docker`. If you want to change image name and/or tag, use `-t` or `--tag` option
+
+```
+$ cd nnfw
+$ ./nnfw build-docker -t nnfw_docker_test
+```
+
+You can use options supported by `docker build` command (ex. `--network` option)
+
+```
+$ cd nnfw
+$ ./nnfw build-docker --network=host --no-cache
+```
+
+## Use docker image to build `nnfw`
+Three different targets for `nnfw` can be built using docker image.
+
+1. Build `nnfw` for `x86_64` target
+```
+$ cd nnfw
+$ docker run --rm -v $(pwd):/opt/nnfw -w /opt/nnfw nnfw_docker make install
+```
+or use `docker_build_test_x64.sh` for convenience as below.
+```
+$ cd nnfw
+$ ./infra/scripts/docker_build_test_x64.sh
+```
+You can find built artifacts at `nnfw/Product/x86_64-linux.debug`.
+
+2. Cross build `nnfw` for ARM on x86_64 host
+
+You should prepare RootFS, following [Cross Building for ARM](https://github.sec.samsung.net/STAR/nnfw/blob/master/docs/howto/CrossBuildForArm.md) except ACL build and cross build steps. Then execute below commands. If your RootFS directory is different with below directory, change it to correct path and ensure the path is absolute.
+```
+$ cd nnfw
+$ ROOTFS_DIR=$(pwd)/tools/cross/rootfs/arm \
+./infra/scripts/docker_build_cross_arm_neurun.sh
+```
+You can find built artifacts at `nnfw/Product/armv7l-linux.debug/`.
+
+3. Build `nnfw` for Tizen ARM package on x86_64 host
+```
+$ cd nnfw
+$ ./infra/scripts/docker_build_tizen_gbs.sh
+```
+You can find built artifacts at `Product/out/rpm`.
diff --git a/docs/nnfw/howto/HowtoMakeSampleAppOnNnfw.md b/docs/nnfw/howto/HowtoMakeSampleAppOnNnfw.md
new file mode 100644
index 000000000..d272a8390
--- /dev/null
+++ b/docs/nnfw/howto/HowtoMakeSampleAppOnNnfw.md
@@ -0,0 +1,132 @@
+# How to make a sample app on nnfw
+
+Our runtime `neurun` support `NNAPI` as interface currently. To use `NNAPI` efficiently, one of solution is to use tensorflow lite. We support additional library to help using tensorflow lite in `/libs/tflite`. (this library is not official support)
+
+To use tensorflow lite, you need to prepare tensorflow lite model file, and you should know input/output tensor name. Then write sample app.
+
+## Prepare loaded tensorflow lite model object
+
+You can select one of kernel register: tensorflow lite official kernel register or extended register (for pre-implemented custom op)
+```
+#include "tensorflow/lite/kernels/register.h"
+#include "tflite/ext/kernels/register.h"
+```
+
+To use tensorflow lite interpreter, need tensorflow lite interpreter session header
+```
+#include "tflite/InterpreterSession.h"
+```
+
+For NNAPI usage, need NNAPI session header
+```
+#include "tflite/NNAPISession.h"
+```
+
+Load the model object into `FlatBuffer`, create a tensorflow lite operator resolver `BuiltinOpResolver` and construct a tensorflow interpreter builder using them:
+```
+tflite::StderrReporter error_reporter;
+auto model = tflite::FlatBufferModel::BuildFromFile(model_file.c_str(), &error_reporter);
+
+// TODO: determine which BuiltinOpResolver and prepend namespace
+BuiltinOpResolver resolver;
+
+tflite::InterpreterBuilder builder(*model, resolver);
+```
+
+Create a tensorflow interpreter and init the builder using it:
+```
+std::unique_ptr<tflite::Interpreter> interpreter;
+builder(&interpreter);
+```
+
+Create a tensorflow lite session to use NNAPI:
+```
+std::shared_ptr<nnfw::tflite::Session> sess = std::make_shared<nnfw::tflite::NNAPISession>(interpreter.get());
+```
+
+If you want to use tensorflow lite interpreter instead of NNAPI, then:
+```
+std::shared_ptr<nnfw::tflite::Session> sess = std::make_shared<nnfw::tflite::InterpreterSession>(interpreter.get());
+```
+
+`NNAPISession` constructs a computational graph from the interpreter and builds the model.
+
+## Prepare tensors memory allocation and model input for inference
+
+Allocate the memory for tensors of `tflite::Interpreter`:
+```
+sess->prepare();
+```
+
+Prepare inputs. How to prepare is out of scope and task specific.<br/>
+Copy the input data into model, i.e. into `interpreter->inputs`. This is tensorflow specific, not nnfw, so one can use any method, that is applicable to Tensorflow, e.g.:
+```
+for (const auto &id : interpreter->inputs())
+{
+  if (interpreter->tensor(id)->name == input_name)
+  {
+    float *p = interpreter->tensor(id)->data.f;
+
+    for (int y = 0; y < height; ++y)
+    {
+      for (int x = 0; x < width; ++x)
+      {
+        for (int c = 0; c < channel; ++c)
+        {
+          *p++ = data[y * width * channel + x * channel + c];
+        }
+      }
+    }
+  }
+}
+```
+where:<br/>
+`input_name` - name of the inputs of the model;<br/>
+`data` - source vector of size `height * width * channel`.
+
+## Run the inference and get outputs
+
+Run the inference
+```
+sess->run();
+```
+
+Get the result from `interpreter->outputs()`. This is tensorflow lite specific, not nnfw, so one can use any method, that is applicable to tensorflow lite, e.g.:
+```
+for (const auto &id : interpreter->outputs())
+{
+  if (interpreter->tensor(id)->name == output_name)
+  {
+    float *p = interpreter->tensor(id)->data.f;
+
+    for (int i = 0; i < result.capacity(); ++i)
+    {
+      result.push_back(p[i]);
+    }
+  }
+}
+```
+where:<br/>
+`output_name` - name of the outputs of the model;<br/>
+`result` - float vector, where to put output. Its size can be calculated using
+```
+for (const auto &id : interpreter->outputs())
+{
+  if (interpreter->tensor(id)->name == output_name)
+  {
+    TfLiteTensor *t = interpreter->tensor(id);
+    int v = 1;
+    for (int i = 0; i < t->dims->size; ++i)
+    {
+      v *= t->dims->data[i];
+    }
+    return v;
+  }
+}
+return -1;
+```
+
+Release the session
+```
+sess->teardown();
+```
diff --git a/docs/nnfw/howto/device/xu3-dip.png b/docs/nnfw/howto/device/xu3-dip.png
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/nnfw/howto/device/xu3-dip.png
diff --git a/docs/nnfw/howto/device/xu3_tizen.md b/docs/nnfw/howto/device/xu3_tizen.md
new file mode 100644
index 000000000..6473ab9a8
--- /dev/null
+++ b/docs/nnfw/howto/device/xu3_tizen.md
@@ -0,0 +1,140 @@
+# About
+
+This will describe how to flash microSD with Tizen-5.5 for ODroid XU3.
+
+Host environment is Ubuntu 18.04
+
+This document will explain the only on eMMC + XU3.
+
+# Download files
+
+## Images
+
+Boot
+- https://download.tizen.org/snapshots/tizen/unified/latest/images/standard/tv-boot-armv7l-odroidxu3/
+- download the biggest file
+
+Root FS
+- https://download.tizen.org/snapshots/tizen/unified/latest/images/standard/tv-wayland-armv7l-odroidu3/
+- download the biggest file
+
+U-Boot images
+```
+wget https://github.com/hardkernel/u-boot/raw/odroidxu3-v2012.07/sd_fuse/hardkernel_1mb_uboot/bl1.bin.hardkernel
+wget https://github.com/hardkernel/u-boot/raw/odroidxu3-v2012.07/sd_fuse/hardkernel_1mb_uboot/bl2.bin.hardkernel.1mb_uboot
+wget https://github.com/hardkernel/u-boot/raw/odroidxu3-v2012.07/sd_fuse/hardkernel_1mb_uboot/tzsw.bin.hardkernel
+```
+
+You also need `u-boot-mmc.bin` that is inside `tizen-unified_20180425.2_tv-boot-armv7l-odroidxu3.tar.gz` file.
+```
+tar xvf tizen-unified_20180425.2_tv-boot-armv7l-odroidxu3.tar.gz u-boot-mmc.bin
+```
+
+
+## Flashing script
+
+Download [sd_fusing_xu4.sh](https://git.tizen.org/cgit/platform/kernel/u-boot/plain/scripts/tizen/sd_fusing_xu4.sh?h=tizen)
+
+This file name has `xu4` but it works on also xu3.
+
+
+## Files
+
+```
+dragon@loki:~/Works/tizen/odroid-xu3/flashing$ ls -l
+total 1316
+-rw-rw-r-- 1 dragon dragon   15616  9월  5 14:41 bl1.bin.hardkernel
+-rw-rw-r-- 1 dragon dragon   14592  9월  5 14:41 bl2.bin.hardkernel.1mb_uboot
+-rw-rw-r-- 1 dragon dragon  262144  9월  5 14:41 tzsw.bin.hardkernel
+-rwxr-xr-x 1 dragon dragon 1048576  9월  4 15:17 u-boot-mmc.bin
+```
+
+# Flash
+
+Host environment
+- Ubuntu 18.04
+- eMMC connected through microUSB from xu3 to host
+
+## Flash boot files
+
+on target
+```
+...
+
+CPU: Exynos5422 @ 800 MHz
+
+Model: Odroid XU3 based on EXYNOS5422
+Board: Odroid XU3 based on EXYNOS5422
+Type: xu3
+DRAM: 2 GiB
+MMC: EXYNOS DWMMC: 0, EXYNOS DWMMC: 1
+In: serial
+Out: serial
+Err: serial
+Net: No ethernet found.
+Hit any key to stop autoboot: 0
+ODROID-XU3 #
+
+ODROID-XU3 # mmc list
+EXYNOS DWMMC: 0 (eMMC)
+EXYNOS DWMMC: 1
+
+ODROID-XU3 # ums 0 mmc 0
+
+UMS: LUN 0, dev 0, hwpart 0, sector 0x0, count 0x1d5a000
+
+/
+```
+
+then on host
+```
+$ sudo fdisk -l 
+..........
+
+Partition table entries are not in disk order
+
+Disk /dev/sdh: 32.0 GB, 32010928128 bytes
+
+64 heads, 32 sectors/track, 30528 cylinders, total 62521344 sectors
+
+Units = sectors of 1 * 512 = 512 bytes
+
+Sector size (logical/physical): 512 bytes / 512 bytes
+
+I/O size (minimum/optimal): 512 bytes / 512 bytes
+
+Disk identifier: 0x00000000
+
+
+Device Boot Start End Blocks Id System
+
+/dev/sdh1 * 8192 139263 65536 e W95 FAT16 (LBA) ..........
+```
+
+```
+$ sudo ../sd_fusing_xu4.sh -d /dev/sdh --format \
+    -b bl1.bin.hardkernel bl2.bin.hardkernel.1mb_uboot tzsw.bin.hardkernel u-boot-mmc.bin
+...
+```
+
+`--format` option will, 1) delete current partition 2) create new partition table, 3) format each partitions.
+
+- If you meet `./sd_fusing_xu4-u1604.sh: line 147: pv: command not found` message and want to remove this message, install pv package by `sudo apt-get install pv`
+
+## Flash image files
+```
+$ sudo ../sd_fusing_xu4.sh -d /dev/sdh \
+    -b tizen-unified_20190905.1_tv-boot-armv7l-odroidxu3.tar.gz \
+       tizen-unified_20190905.1_tv-wayland-armv7l-odroidxu3.tar.gz
+```
+
+# After boot
+
+Follow [xu4_tizen](xu4_tizen.md)
+
+# References
+
+- http://suprem.sec.samsung.net/confluence/display/KS/Odroid+XU3
+- http://suprem.sec.samsung.net/confluence/pages/viewpage.action?pageId=104635990
+- http://suprem.sec.samsung.net/confluence/pages/viewpage.action?spaceKey=TPLAB&title=XU3+Image+Flashing
+- http://download.tizen.org/snapshots/tizen/unified/latest/images/standard/
diff --git a/docs/howto/device/xu3_ubuntu.md b/docs/nnfw/howto/device/xu3_ubuntu.md
index 38dbc69b0..38dbc69b0 100644
--- a/docs/howto/device/xu3_ubuntu.md
+++ b/docs/nnfw/howto/device/xu3_ubuntu.md
diff --git a/docs/howto/device/xu4_tizen.md b/docs/nnfw/howto/device/xu4_tizen.md
index 3481be206..3481be206 100644
--- a/docs/howto/device/xu4_tizen.md
+++ b/docs/nnfw/howto/device/xu4_tizen.md
diff --git a/docs/howto/device/xu4_ubuntu.md b/docs/nnfw/howto/device/xu4_ubuntu.md
index 7b8a3aa2b..7b8a3aa2b 100644
--- a/docs/howto/device/xu4_ubuntu.md
+++ b/docs/nnfw/howto/device/xu4_ubuntu.md
diff --git a/docs/project/2018_high_level_design.md b/docs/nnfw/project/2018_high_level_design.md
index 7be495b34..7be495b34 100644
--- a/docs/project/2018_high_level_design.md
+++ b/docs/nnfw/project/2018_high_level_design.md
diff --git a/docs/nnfw/project/2019_requirement_specification.md b/docs/nnfw/project/2019_requirement_specification.md
new file mode 100644
index 000000000..937530766
--- /dev/null
+++ b/docs/nnfw/project/2019_requirement_specification.md
@@ -0,0 +1,131 @@
+# Software Requirement Specification
+
+## Background
+Artificial intelligence (AI) techniques are getting popular and utilized in various products and
+services.  While the cloud-based AI techniques have been used to perform compute/memory intensive
+inferences because of the powerful servers on cloud, on-device AI technologies are recently drawing
+attention from the mobile industry for response time reduction, privacy protection, and
+connection-less AI service.  Big mobile players, such as Google, Apple, and Huawei, are investing
+their research effort on the on-device AI technologies and already announced hardware and software
+on-device AI solutions.  Samsung is not leading this trend currently, but since on-device AI area is
+just started and still in the initial state, there are still opportunities and possibilities to
+reduce the gap between pioneer companies and Samsung.  We believe on-device AI will become a key
+differentiator for mobile phone, TV, and other home appliances, and thus developing on-device AI
+software stack is of paramount importance in order to take leadership in the on-device AI
+technology.
+
+Although the vision of on-device AI is promising, enabling on-device AI involves unique technical
+challenges compared to traditional cloud-based approach.  This is because on-device AI tries to
+conduct inference tasks solely on device without connecting to cloud resources.  Specifically,
+hardware resources on device, such as processor performance, memory capacity, and power budget, are
+very scarce and limit the compute capability, which is typically required to execute complicated
+neural network (NN) models.  For example, in one product requirement, a mobile device should consume
+less than 1.2W and could use at most 2W only for 10 minutes due to thermal issue.  Next, on-device
+AI software stack needs to support diverse device environments, since embedded platforms may consist
+of heterogeneous compute devices, such as CPU, GPU, DSP, or neural processing unit (NPU), and use
+different OS platforms, such as Tizen, Android, or various embedded Linux.
+
+To tackle the challenges above and to have the leadership on on-device AI technology, this project
+aims at developing a neural network inference framework specialized and optimized for on-device AI.
+
+
+## Product Context
+
+This project _nnfw_ aims at providing a high-performance, on-device neural network (NN) inference
+framework that performs inference of a given NN model on processors, such as CPU, GPU, or NPU, in
+the target platform, such as Tizen and Smart Machine Platform (SMP).
+
+### Expected Value
+
+We expect the following would be possible with _nnfw_:
+
+- To improve user experience by reducing the service response time.
+- To provide AI services without network connection while achieving similar performance.
+- To protect personal information and company confidential by limiting data transfer to the network.
+
+
+### Success Criteria
+
+The goals of this project are:
+
+- Supports mixed acceleration using CPU and GPU.
+  + for operator coverage flexibility.
+  + for flexible utilization of computing resource on device.
+- Define Common IR and Runtime APIs and perform successful inference using it.
+  + for _nncc_ integration as a frontend, and _nnfw_ itself to concentrate on the backend.
+- Support of user implemented kernel extension for custom operator.
+- Construction of SW infrastructure to support SR NPU.
+
+
+### Target
+
+_nnfw_ targets following platforms and target devices:
+
+- Odroid-XU4 running Tizen 5.5 (Primary)
+- A variety of Android based mobile phones (Secondary)
+
+
+### Product Roadmap
+
+- March: Set up milestones, tasks, workgroups, initial code structure, and build/test
+  infrastructure.
+- May: Tizen M1 release / Execute InceptionV3 with static scheduling by mixing CPU and GPU on
+  Odroid-XU4.
+- August: Perform inference using NN Package and Runtime API.
+- October: Tizen M2 release / Completed neural network acceleration SW stack integrated with NN
+  Compiler.
+- December: Release NPU SDK v1.0 pre-alpha.
+
+
+## Requirements
+
+### Functionality Requirements
+
+_nnfw_ has the following functionality requirements:
+
+1. CPU/GPU mixed acceleration
+    - Description
+      + Run the model using a mixture of CPU and GPU
+    - Validation
+      + Run the InceptionV3 model by selecting CPU or GPU for individual operators.
+      + Confirm execution results against ground truth(for example, the result of using CPU or GPU
+        alone).
+1. Support its own input format
+   - Description
+      + Define and support its own input format to ensure file format independence
+      + Define and implement of Common IR
+   - Validation
+      + Read and execute the input model described by Common IR.
+      + Confirm execution results against ground truth(for example, the result of using NNAPI).
+1. Support its own API
+   - Description
+      + Define and implement its own API to replace current NNAPI.
+   - Validation
+      + Perform unit tests and integration tests for individual APIs.
+1. Custom operator support
+   - Description
+      + Defines a specification that describes a custom operation, and provides a mechanism for
+        writing and installing the kernel implementation needed to run it at runtime.
+   - Validation
+      + Load and execute the input format that contains the model using the custom op and the kernel
+        implementation of the custom op.
+      + Confirm execution results against ground truth.
+1. Prepare SW infrastructure for NPU support
+    - Description
+      + The runtime must be able to read and process the model information developed for the purpose
+        of execution in NPU.
+   - Validation
+      + Read the model developed for the NPU and run it on the NPU.
+      + Confirm execution results against ground truth.
+
+
+### Non-Functionality Requirements
+
+1. Optimizing mixed acceleration performance
+    - Description
+      + Ensure performance above the individual acceleration averages for mixed acceleration using
+        CPU and GPU.
+    - Validation
+      + Measure the inference time for mixed accelerations for the target model.
+      + Compare the result to the average value of the CPU or GPU alone acceleration time for the
+        same model.
diff --git a/docs/nnfw/roadmap.md b/docs/nnfw/roadmap.md
new file mode 100644
index 000000000..c04bab66b
--- /dev/null
+++ b/docs/nnfw/roadmap.md
@@ -0,0 +1,76 @@
+This document describes roadmap of 2019 NN Runtime (or _nnfw_) project.
+
+# Goal
+
+This project _nnfw_ aims at providing a high-performance, on-device neural network (NN) inference
+framework that performs inference of a given NN model on processors, such as CPU, GPU, or NPU, in
+the target platform, such as Tizen and Android. 
+
+Last year in 2018, we already saw significant gains in accelerating with a single CPU or GPU
+back-end. Now we want to gain more benefits by using a mixture of CPU and GPU according to each
+operation characteristic. It could give us an opportunity to have a high degree of freedom in terms
+of operator coverage, and possibly provide better performance compared to single back-end
+acceleration.
+
+On the other hand, we are going to introduce a new compiler to the front-end. This will support a
+variety of deep learning frameworks in relatively spacious host PC environments, while the runtime
+running on the target device is intended to take a smaller burden. In this process, the compiler and
+the runtime will effectively share information among themselves by the Common IR, which is referred
+to as the NN Package.
+
+# Architecture 
+
+![nnfw_architecture](./fig/nnfw_architecture.png)
+
+The figure above illustrates the overall architecture and scope of _nnfw_,  along with  _nncc_, a
+sibling project, to help understand. In this document, we will deal specifically with _nnfw_. 
+
+The _nnfw_ can be divided into three parts which is NN API and NN Runtime, as well as NN Compute
+that is provided by the platform.
+
+1. NN API
+    - Provide a common interface to application.
+    - Last year, Android NN API was selected for seamless integration with TF Lite. As long as our
+      NN runtime provides Android NN API as an interface, TF Lite can link to our NN runtime without
+      any modification.
+    - In choosing Android NN API, we expected standardization and rapid adoption. But the results
+      were far less than that. We could not control its specifications, and its growth rate was too
+      slow to accommodate our needs. So we try to define our own new one, NN Runtime API, in this
+      year. (Once the new API is stable, we provide a way to replace the Android NN API and it will
+      naturally be deprecated.)
+1. NN Runtime
+    - It already provides significant performance improvements using CPU or GPU acceleration. Now we
+      want to add the flexibility to this by providing various functions suitable to specific device
+      configuration.
+    - Mixed back-end acceleration enables various usage scenarios according to device-specific CPU
+      or GPU configurations and usage conditions.
+    - By introducing an interpreter, it will respond to dynamic conditions that the compiler can not
+      handle, and will effectively utilize the memory through the memory manager.
+1. NN Compute
+    - Provide computation acceleration library, such as ACL, or device driver for NPU.
+    - This layer will be provided by OS platform, and we will use the library or device driver as it
+      is. We may request a specific version to the Platform team, but we don't expect we will be
+      modifying the library.
+    - In this year, we will also introduce an extension mechanism to support custom operations on
+      this part.
+
+# Deliverables
+
+- On-Device AI SW stack for Tizen
+  + Advanced runtime support with interpreter, memory manager, and execution planner.
+  + Provides back-end flexibility, such as CPU/GPU mixed acceleration
+  + Well designed custom op support.
+  + Basic infrastructure for NPU support.
+- Specification and implementation of Common IR and Runtime API
+
+# Milestones
+
+- [Project Milestones](https://github.sec.samsung.net/orgs/STAR/projects/1)
+- [Monthly Milestones](https://github.sec.samsung.net/STAR/nnfw/projects/25)
+
+# Workgroups (WGs)
+
+- We organize WGs for major topics, and each WG will be working on its own major topic by breaking
+  it into small tasks/issues, performing them inside WG, and collaborating between WGs.
+- The WG information can be found [here](workgroups.md).
+
diff --git a/docs/nnfw/tests/Convolution_manual_3x3.xlsx b/docs/nnfw/tests/Convolution_manual_3x3.xlsx
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/nnfw/tests/Convolution_manual_3x3.xlsx
diff --git a/docs/nnfw/tests/Softmax_manual.xlsx b/docs/nnfw/tests/Softmax_manual.xlsx
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/docs/nnfw/tests/Softmax_manual.xlsx
diff --git a/docs/nnfw/workgroups.md b/docs/nnfw/workgroups.md
new file mode 100644
index 000000000..f6f4f9587
--- /dev/null
+++ b/docs/nnfw/workgroups.md
@@ -0,0 +1,65 @@
+# 2019 Workgroups
+
+For faster communication and development, we organize workgroups (WGs) based on major topics
+described in [WBS of 2019 NN Acceleration Solution v2.0 Development
+(#4919)](https://github.sec.samsung.net/STAR/nnfw/issues/4919).  All WGs will work together to
+achieve the goal of _nnfw_ project, but each WG will define its own tasks and milestones, set its
+own sprints, and conduct its tasks.  All WGs will sync up through github (note that github is our
+primary communication channel, and thus using github for communication is highly recommended) and
+on/off-line meetings.
+
+Current WGs based on the major topics in
+[#4919](https://github.sec.samsung.net/STAR/nnfw/issues/4919) and their root issue links are as
+follows:
+
+1. Runtime WG
+    - Tasks
+      + Runtime improvement
+      + Heterogeneous computing support
+      + Runtime API
+    - Members
+      + Hanjoung Lee(@wateret), Hyeongseok Oh(@hseok82-oh), Chunseok Lee(@chunseok-lee), 
+        Yongseop Kim(@YongseopKim), Jiseob Jang(@jiseob-jang), Sanggyu Lee(@sg5-lee), 
+        Seongwoo Chae(@sw4670-chae), Sung-Jae Lee(@sj925-lee)
+      + Dilshodzhon Poshshoev(@d-poshshoev), Efimov Alexander(@a-efimov), 
+        Pavel Ilyutchenko(@p-iliutchenk)
+2. NN Package WG
+    - Tasks
+      + Common IR design : Hyeongseok Oh(@hseok82-oh), Cheongyo Bahk(@ch-bahk), 
+        Seok NamKoong(@sk-namkoong)
+      + Importer/Exporter
+      + Custom Operator Support
+    - Members
+      + Sanggyu Lee(@sg5-lee), Hyeongseok Oh(@hseok82-oh), Cheongyo Bahk(@ch-bahk), 
+        Hyun Sik Yoon(@hyunsik-yoon), Seok NamKoong(@sk-namkoong)
+      + Vladimir Plazun(@v-plazun), Sergei Barannikov(@s-barannikov)
+3. Kernel Optimization WG
+    - Tasks
+      + NN model analysis
+      + NN operator analysis
+      + Kernel implementation optimization
+    - Members
+      + Chunseok Lee(@chunseok-lee), Jiyoung Yun(@jy910-yun), Jiseob Jang(@jiseob-jang),
+        SaeHie Park(@seanshpark)
+      + Andrey Shedko(@a-shedko), Sergei Barannikov(@s-barannikov)
+
+There is one unique workgroup containing most _nncc_ tasks. They are working closely together as a
+front-end to the runtime. Since _nncc_ and _nnfw_ will be merged soon, it is natural to think of
+them as one team. In fact, most of the members are already involved in two things.
+
+4. Compiler Frontend
+    - Tasks
+      + NN Compiler (@in memory) IR design & implementation : Jonghyun Park(@jh1302.park)
+      + TensorFlow model support
+      + ONNX model support
+      + Target independent graph optimization
+    - Members
+      + Seok NamKoong(@sk-namkoong), Cheongyo Bahk(@ch-bahk), Hyun Sik Yoon(@hyunsik-yoon), 
+        Jiyoung Yun(@jy910-yun), Seongwoo Chae(@sw4670-chae), Jiseob Jang(@jiseob-jang), 
+        SaeHie Park(@seanshpark)
+      + Pavel Ilyutchenko(@p-iliutchenk), Sergei Barannikov(@s-barannikov) , Ivan Vagin(@ivan-vagin)
+
+# How to join
+
+If you would like to participate in any WGs above or create a new WG, please create an issue or
+leave a comment at [#4919](https://github.sec.samsung.net/STAR/nnfw/issues/4919).
diff --git a/externals/CMakeLists.txt b/externals/CMakeLists.txt
deleted file mode 100644
index 1c8a14a7d..000000000
--- a/externals/CMakeLists.txt
+++ /dev/null
@@ -1,122 +0,0 @@
-set(TENSORFLOW_BASE ${CMAKE_CURRENT_SOURCE_DIR}/tensorflow)
-set(TENSORFLOW_LITE_BASE ${TENSORFLOW_BASE}/tensorflow/contrib/lite)
-
-# Required source & package
-nnfw_find_package(AbslSource REQUIRED)
-nnfw_find_package(Eigen REQUIRED)
-nnfw_find_package(FarmhashSource REQUIRED)
-nnfw_find_package(FlatBuffersSource REQUIRED)
-nnfw_find_package(GEMMLowpSource REQUIRED)
-nnfw_find_package(TensorFlowSource REQUIRED)
-
-#
-# Tensorflow Lite library
-#
-file(GLOB TFLITE_CORE_SRCS "${TENSORFLOW_LITE_BASE}/*.c" "${TENSORFLOW_LITE_BASE}/*.cc")
-file(GLOB TFLITE_CORE_TESTS "${TENSORFLOW_LITE_BASE}/*test*.cc")
-list(REMOVE_ITEM TFLITE_CORE_SRCS ${TFLITE_CORE_TESTS})
-
-file(GLOB_RECURSE TFLITE_KERNEL_SRCS "${TENSORFLOW_LITE_BASE}/kernels/*.cc")
-file(GLOB_RECURSE TFLITE_KERNEL_TESTS "${TENSORFLOW_LITE_BASE}/kernels/*test*.cc")
-list(REMOVE_ITEM TFLITE_KERNEL_SRCS ${TFLITE_KERNEL_TESTS})
-
-file(GLOB TFLITE_LIB_SRCS "${TENSORFLOW_LITE_BASE}/c/*.c" "${TENSORFLOW_LITE_BASE}/c/*.cc")
-file(GLOB TFLITE_LIB_TESTS "${TENSORFLOW_LITE_BASE}/c/*test*.cc")
-list(REMOVE_ITEM TFLITE_LIB_SRCS ${TFLITE_LIB_TESTS})
-
-file(GLOB TFLITE_API_SRCS "${TENSORFLOW_LITE_BASE}/core/api/*.c" "${TENSORFLOW_LITE_BASE}/core/api/*.cc")
-file(GLOB TFLITE_API_TESTS "${TENSORFLOW_LITE_BASE}/core/api/*test*.cc")
-list(REMOVE_ITEM TFLITE_API_SRCS ${TFLITE_API_TESTS})
-
-file(GLOB TFLITE_PROFILING_SRCS "${TENSORFLOW_LITE_BASE}/profiling/*.cc")
-file(GLOB TFLITE_PROFILING_TESTS "${TENSORFLOW_LITE_BASE}/profiling/*test*.cc")
-list(REMOVE_ITEM TFLITE_PROFILING_SRCS ${TFLITE_PROFILING_TESTS})
-
-# We will use our own BuiltinOpResolver
-list(REMOVE_ITEM TFLITE_KERNEL_SRCS "${TENSORFLOW_LITE_BASE}/kernels/register.cc")
-# We will use our own summarizer
-list(REMOVE_ITEM TFLITE_PROFILING_SRCS "${TENSORFLOW_LITE_BASE}/profiling/profile_summarizer.cc")
-list(APPEND TFLITE_SRCS ${TFLITE_CORE_SRCS})
-list(APPEND TFLITE_SRCS ${TFLITE_KERNEL_SRCS})
-list(APPEND TFLITE_SRCS ${TFLITE_LIB_SRCS})
-list(APPEND TFLITE_SRCS ${TFLITE_API_SRCS})
-list(APPEND TFLITE_SRCS ${TFLITE_PROFILING_SRCS})
-
-list(APPEND TFLITE_SRCS "${TFLITE_DEPEND_DIR}/farmhash/src/farmhash.cc")
-
-list(APPEND TFLITE_INCLUDES "${CMAKE_CURRENT_SOURCE_DIR}/tensorflow")
-list(APPEND TFLITE_INCLUDES "${TFLITE_DEPEND_DIR}/absl")
-list(APPEND TFLITE_INCLUDES "${TFLITE_DEPEND_DIR}/gemmlowp")
-list(APPEND TFLITE_INCLUDES "${TFLITE_DEPEND_DIR}/farmhash/src")
-list(APPEND TFLITE_INCLUDES "${TFLITE_DEPEND_DIR}/flatbuffers/include")
-
-if(BUILD_IS_NATIVE AND NOT HOST_ARCH_BASE STREQUAL "arm")
-  # Flatbuffer build
-  nnfw_find_package(FlatBuffers)
-  # Required external sourcefor x86-64 build
-  nnfw_find_package(NEON2SSESource REQUIRED)
-  list(APPEND TFLITE_INCLUDES "${TFLITE_DEPEND_DIR}/neon_2_sse")
-endif()
-
-# This kernels are not used on nnfw
-## spectrogram
-list(REMOVE_ITEM TFLITE_SRCS "${TENSORFLOW_LITE_BASE}/kernels/audio_spectrogram.cc")
-list(REMOVE_ITEM TFLITE_SRCS "${TENSORFLOW_LITE_BASE}/kernels/audio_spectrogram_test.cc")
-list(REMOVE_ITEM TFLITE_SRCS "${TENSORFLOW_LITE_BASE}/kernels/internal/spectrogram.cc")
-## mfcc
-list(REMOVE_ITEM TFLITE_SRCS "${TENSORFLOW_LITE_BASE}/kernels/internal/mfcc.cc")
-list(REMOVE_ITEM TFLITE_SRCS "${TENSORFLOW_LITE_BASE}/kernels/internal/mfcc_dct.cc")
-list(REMOVE_ITEM TFLITE_SRCS "${TENSORFLOW_LITE_BASE}/kernels/internal/mfcc_mel_filterbank.cc")
-list(REMOVE_ITEM TFLITE_SRCS "${TENSORFLOW_LITE_BASE}/kernels/mfcc.cc")
-list(REMOVE_ITEM TFLITE_SRCS "${TENSORFLOW_LITE_BASE}/kernels/mfcc_test.cc")
-
-if("${TARGET_OS}" STREQUAL "android")
-  if(NOT DEFINED NDK_DIR)
-    file(GLOB NDK_DIRS "${CMAKE_SOURCE_DIR}/tools/cross/ndk/*")
-    list(LENGTH NDK_DIRS NDK_DIRS_COUNT)
-    if (NDK_DIRS_COUNT EQUAL 1)
-      set(NDK_DIR "${NDK_DIRS}")
-    endif(NDK_DIRS_COUNT EQUAL 1)
-  endif(NOT DEFINED NDK_DIR)
-
-  if(NOT DEFINED NDK_DIR)
-    message(FATAL_ERROR "NDK_DIR should be specified via environment variable")
-  endif()
-  message(STATUS "Found NDK: ${NDK_DIR}")
-  list(APPEND TFLITE_INCLUDES "${NDK_DIR}")
-endif()
-
-add_library(tensorflow-lite ${TFLITE_SRCS})
-target_include_directories(tensorflow-lite PUBLIC ${TFLITE_INCLUDES})
-target_compile_definitions(tensorflow-lite PUBLIC "GEMMLOWP_ALLOW_SLOW_SCALAR_FALLBACK")
-if(BUILD_TFLITE_BENCHMARK_MODEL)
-  target_compile_definitions(tensorflow-lite PUBLIC "TFLITE_PROFILING_ENABLED")
-endif()
-target_link_libraries(tensorflow-lite eigen ${LIB_PTHREAD} dl)
-
-if("${TARGET_OS}" STREQUAL "android")
-  target_link_libraries(tensorflow-lite log)
-  #
-  # Tensorflow Lite JNI library
-  #
-  set(TFLITE_JNI_BASE ${TENSORFLOW_LITE_BASE}/java/src/main/native)
-  set(TFLITE_JNI_SRCS ${TFLITE_JNI_BASE}/duration_utils_jni.cc
-                      ${TFLITE_JNI_BASE}/exception_jni.cc
-                      ${TFLITE_JNI_BASE}/nativeinterpreterwrapper_jni.cc
-                      ${TFLITE_JNI_BASE}/tensor_jni.cc
-                      ${TFLITE_JNI_BASE}/tensorflow_lite_jni.cc
-                      ${TFLITE_JNI_BASE}/builtin_ops_jni.cc
-                      )
-  set(TFLITE_JNI_INCLUDES ${TENSORFLOW_LITE_BASE}/java/src/native)
-
-  # We need this for running vanilla tflite
-  # TODO remove this when nnfw is used
-  set(TFLITE_SRCS_V ${TENSORFLOW_LITE_BASE}/kernels/register.cc)
-
-  # TODO use tensorflow-lite static library instead of compiling all the sources again
-  add_library(tensorflowlite_jni SHARED ${TFLITE_JNI_SRCS} ${TFLITE_SRCS} ${TFLITE_SRCS_V})
-  target_include_directories(tensorflowlite_jni PUBLIC ${TFLITE_JNI_INCLUDES} ${TFLITE_INCLUDES})
-  target_link_libraries(tensorflowlite_jni eigen ${LIB_PTHREAD} dl)
-  target_link_libraries(tensorflowlite_jni log)
-  install(TARGETS tensorflowlite_jni DESTINATION lib)
-endif()
diff --git a/externals/nnapi_test_generator/README.md b/externals/nnapi_test_generator/README.md
deleted file mode 100644
index 37d3af0c7..000000000
--- a/externals/nnapi_test_generator/README.md
+++ /dev/null
@@ -1,11 +0,0 @@
-# nnapi test generator
-
-_nnapi test generator_ aims at generating NN public C API tests.
-
-To generate tests, run the following command.
-
-```
-$ runtimes/tests/neural_networks_test/specs/generate_test.sh
-```
-
-Original code is at https://android.googlesource.com/platform/frameworks/ml/+/efd22b6.
diff --git a/include/NeuralNetworks.h b/include/NeuralNetworks.h
deleted file mode 100644
index 6414af688..000000000
--- a/include/NeuralNetworks.h
+++ /dev/null
@@ -1,2578 +0,0 @@
-/*
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @addtogroup NeuralNetworks
- * @{
- */
-
-/**
- * @file NeuralNetworks.h
- */
-
-#ifndef ANDROID_ML_NN_RUNTIME_NEURAL_NETWORKS_H
-#define ANDROID_ML_NN_RUNTIME_NEURAL_NETWORKS_H
-
-/******************************************************************
- *
- * IMPORTANT NOTICE:
- *
- *   This file is part of Android's set of stable system headers
- *   exposed by the Android NDK (Native Development Kit).
- *
- *   Third-party source AND binary code relies on the definitions
- *   here to be FROZEN ON ALL UPCOMING PLATFORM RELEASES.
- *
- *   - DO NOT MODIFY ENUMS (EXCEPT IF YOU ADD NEW 32-BIT VALUES)
- *   - DO NOT MODIFY CONSTANTS OR FUNCTIONAL MACROS
- *   - DO NOT CHANGE THE SIGNATURE OF FUNCTIONS IN ANY WAY
- *   - DO NOT CHANGE THE LAYOUT OR SIZE OF STRUCTURES
- */
-
-#include <stddef.h>
-#include <stdint.h>
-#include <sys/cdefs.h>
-
-__BEGIN_DECLS
-
-/**
- * Operand types.
- *
- * The type of operands that can be added to a model.
- *
- * Although we define many types, most operators accept just a few
- * types. Most used are {@link ANEURALNETWORKS_TENSOR_FLOAT32},
- * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
- * and {@link ANEURALNETWORKS_INT32}.
- */
-typedef enum {
-    /** A 32 bit floating point scalar value. */
-    ANEURALNETWORKS_FLOAT32             = 0,
-    /** A signed 32 bit integer scalar value. */
-    ANEURALNETWORKS_INT32               = 1,
-    /** An unsigned 32 bit integer scalar value. */
-    ANEURALNETWORKS_UINT32              = 2,
-
-    /** A tensor of 32 bit floating point values. */
-    ANEURALNETWORKS_TENSOR_FLOAT32      = 3,
-    /** A tensor of 32 bit integer values. */
-    ANEURALNETWORKS_TENSOR_INT32        = 4,
-    /**
-     * A tensor of 8 bit integers that represent real numbers.
-     *
-     * Attached to this tensor are two numbers that can be used to convert the
-     * 8 bit integer to the real value and vice versa. These two numbers are:
-     * - scale: a 32 bit floating point value greater than zero.
-     * - zeroPoint: a 32 bit integer, in range [0, 255].
-     *
-     * The formula is:
-     * real_value = (integer_value - zeroPoint) * scale.
-     */
-    ANEURALNETWORKS_TENSOR_QUANT8_ASYMM = 5,
-} OperandCode;
-
-/**
- * Operation types.
- *
- * The type of operations that can be added to a model.
- */
-typedef enum {
-    /**
-     * Adds two tensors, element-wise.
-     *
-     * Takes two input tensors of identical {@link OperandCode} and compatible
-     * dimensions. The output is the sum of both input tensors, optionally
-     * modified by an activation function.
-     *
-     * Two dimensions are compatible when:
-     *     1. they are equal, or
-     *     2. one of them is 1
-     *
-     * The size of the output is the maximum size along each dimension of the
-     * input operands. It starts with the trailing dimensions, and works its
-     * way forward.
-     *
-     * Example:
-     *
-     *     input1.dimension = {4, 1, 2}
-     *     input2.dimension = {5, 4, 3, 1}
-     *     output.dimension = {5, 4, 3, 2}
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: up to 4
-     *
-     * Inputs:
-     * * 0: A tensor.
-     * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
-     *      as input0.
-     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
-     *      {@link FuseCode} values. Specifies the activation to
-     *      invoke on the result.
-     *
-     * Outputs:
-     * * 0: The sum, a tensor of the same {@link OperandCode} as input0.
-     */
-    ANEURALNETWORKS_ADD = 0,
-
-    /**
-     * Performs a 2-D average pooling operation.
-     *
-     * The output dimensions are functions of the filter dimensions, stride, and
-     * padding.
-     *
-     * The values in the output tensor are computed as:
-     *
-     *     output[batch, row, col, channel] =
-     *         sum_{i, j}(input[batch, row + i, col + j, channel]) / sum(1)
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: 4, with "NHWC" (i.e., Num_samples, Height, Width,
-     * and Channels) data layout.
-     *
-     * Both explicit padding and implicit padding are supported.
-     *
-     * Inputs (explicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
-     *      the input.
-     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the left, in the ‘width’ dimension.
-     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the right, in the ‘width’ dimension.
-     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the top, in the ‘height’ dimension.
-     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the bottom, in the ‘height’ dimension.
-     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘width’ dimension.
-     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘height’ dimension.
-     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
-     *      width.
-     * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
-     *      height.
-     * * 9: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
-     *      {@link FuseCode} values. Specifies the activation to
-     *      invoke on the result.
-     *
-     * Inputs (implicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
-     *      the input.
-     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the implicit
-     *      padding scheme, has to be one of the
-     *      {@link PaddingCode} values.
-     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘width’ dimension.
-     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘height’ dimension.
-     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
-     *      width.
-     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
-     *      height.
-     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
-     *      {@link FuseCode} values. Specifies the activation to
-     *      invoke on the result.
-     *
-     * Outputs:
-     * * 0: The output 4-D tensor, of shape
-            [batches, out_height, out_width, depth].
-     */
-    ANEURALNETWORKS_AVERAGE_POOL_2D = 1,
-
-    /**
-     * Concatenates the input tensors along the given dimension.
-     *
-     * The input tensors must have identical {@link OperandCode} and the same
-     * dimensions except the dimension along the concatenation axis.
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: up to 4
-     *
-     * Inputs:
-     * * 0 ~ n-1: The list of n input tensors, of shape
-     *            [D0, D1, ..., Daxis(i), ..., Dm]. For inputs of
-     *            {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, all input tensors
-     *            must have the same scale and zeroPoint.
-     * * n: An {@link ANEURALNETWORKS_INT32} scalar, specifying the
-     *      concatenation axis.
-     *
-     * Outputs:
-     * * 0: The output, a tensor of the same {@link OperandCode} as the input
-     *      tensors. The output shape is [D0, D1, ..., sum(Daxis(i)), ..., Dm].
-     */
-    ANEURALNETWORKS_CONCATENATION = 2,
-
-    /**
-     * Performs an 2-D convolution operation.
-     *
-     * The CONV_2D op sweeps a 2-D filter that can mix channels together over a
-     * batch of images, applying the filter to each window of each image of the
-     * appropriate size.
-     *
-     * The output dimensions are functions of the filter dimensions, stride, and
-     * padding.
-     *
-     * The values in the output tensor are computed as:
-     *
-     *     output[batch, row, col, channel] =
-     *         sum_{i, j} (
-     *             input[batch, row + i, col + j, k] *
-     *             filter[channel, row + i, col + j, k] +
-     *             bias[channel]
-     *         )
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: 4, with "NHWC" data layout.
-     *
-     * Both explicit padding and implicit padding are supported.
-     *
-     * Inputs (explicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
-     *      specifying the input.
-     * * 1: A 4-D tensor, of shape
-     *      [depth_out, filter_height, filter_width, depth_in], specifying the
-     *      filter.
-     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias.
-     *      For input tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, the bias
-     *      should also be of {@link ANEURALNETWORKS_TENSOR_FLOAT32}. For input
-     *      tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the bias
-     *      should be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of
-     *      0 and bias_scale == input_scale * filter_scale.
-     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the left, in the ‘width’ dimension.
-     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the right, in the ‘width’ dimension.
-     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the top, in the ‘height’ dimension.
-     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the bottom, in the ‘height’ dimension.
-     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘width’ dimension.
-     * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘height’ dimension.
-     * * 9: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
-     *      {@link FuseCode} values. Specifies the activation to
-     *      invoke on the result.
-     *
-     * Inputs (implicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
-     *      specifying the input.
-     * * 1: A 4-D tensor, of shape
-     *      [depth_out, filter_height, filter_width, depth_in], specifying the
-     *      filter.
-     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
-     *      tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, the bias should
-     *      also be of {@link ANEURALNETWORKS_TENSOR_FLOAT32}. For input tensor
-     *      of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the bias should be
-     *      of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of 0 and
-     *      bias_scale == input_scale * filter_scale.
-     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the implicit
-     *      padding scheme, has to be one of the
-     *      {@link PaddingCode} values.
-     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘width’ dimension.
-     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-    *       walking through input in the ‘height’ dimension.
-     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
-     *      {@link FuseCode} values. Specifies the activation to
-     *      invoke on the result.
-     *
-     * Outputs:
-     * * 0: The output 4-D tensor, of shape
-     *      [batches, out_height, out_width, depth_out]. For output tensor of
-     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the following condition
-     *      must be satisfied: output_scale > input_scale * filter_scale.
-     */
-    ANEURALNETWORKS_CONV_2D = 3,
-
-    /**
-     * Performs a depthwise 2-D convolution operation.
-     *
-     * Given an input tensor of shape [batches, height, width, depth_in] and a
-     * filter tensor of shape [1, filter_height, filter_width, depth_out]
-     * containing depth_out convolutional filters of depth 1, DEPTHWISE_CONV
-     * applies a different filter to each input channel (expanding from 1
-     * channel to channel_multiplier channels for each), then concatenates the
-     * results together.
-     *
-     * The output has depth_out = depth_in * depth_multiplier channels.
-     * The output dimensions are functions of the filter dimensions, stride, and
-     * padding.
-     *
-     * The values in the output tensor are computed as:
-     *
-     *     output[b, i, j, k * channel_multiplier + q] =
-     *         sum_{di, dj} (
-     *             input[b, strides[1] * i + di, strides[2] * j + dj, k] *
-     *             filter[1, di, dj, k * channel_multiplier + q]
-     *         )
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: 4, with "NHWC" data layout.
-     *
-     * Both explicit padding and implicit padding are supported.
-     *
-     * Inputs (explicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
-     *      specifying the input.
-     * * 1: A 4-D tensor, of shape [1, filter_height, filter_width, depth_out],
-     *      specifying the filter.
-     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
-     *      tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, the bias should
-     *      also be of {@link ANEURALNETWORKS_TENSOR_FLOAT32}. For input tensor
-     *      of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the bias should be
-     *      of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of 0 and
-     *      bias_scale == input_scale * filter_scale.
-     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the left, in the ‘width’ dimension.
-     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the right, in the ‘width’ dimension.
-     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the top, in the ‘height’ dimension.
-     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the bottom, in the ‘height’ dimension.
-     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘width’ dimension.
-     * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘height’ dimension.
-     * * 9: An {@link ANEURALNETWORKS_INT32} scalar, specifying the depthwise
-     *      multiplier.
-     * * 10: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
-     *       {@link FuseCode} values. Specifies the activation to
-     *       invoke on the result.
-     *
-     * Inputs (implicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
-     *      specifying the input.
-     * * 1: A 4-D tensor, of shape [1, filter_height, filter_width, depth_out],
-     *      specifying the filter.
-     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
-     *      tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, the bias should
-     *      also be of {@link ANEURALNETWORKS_TENSOR_FLOAT32}. For input tensor
-     *      of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the bias should be
-     *      of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of 0 and
-     *      bias_scale == input_scale * filter_scale.
-     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the implicit
-     *      padding scheme, has to be one of the
-     *      {@link PaddingCode} values.
-     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘width’ dimension.
-     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘height’ dimension.
-     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the depthwise
-     *      multiplier.
-     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
-     *      {@link FuseCode} values. Specifies the activation to
-     *      invoke on the result.
-     *
-     * Outputs:
-     * * 0: The output 4-D tensor, of shape
-     *      [batches, out_height, out_width, depth_out]. For output tensor of
-     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the following condition
-     *      must be satisfied: output_scale > input_scale * filter_scale.
-     */
-    ANEURALNETWORKS_DEPTHWISE_CONV_2D = 4,
-
-    /**
-     * Rearranges data from depth into blocks of spatial data.
-     *
-     * More specifically, this op outputs a copy of the input tensor where
-     * values from the depth dimension are moved in spatial blocks to the height
-     * and width dimensions. The value block_size indicates the input block size
-     * and how the data is moved.
-     *
-     * Chunks of data of size block_size * block_size from depth are rearranged
-     * into non-overlapping blocks of size block_size x block_size.
-     *
-     * The width of the output tensor is input_depth * block_size, whereas the
-     * height is input_height * block_size. The depth of the input tensor must
-     * be divisible by block_size * block_size
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: 4, with "NHWC" data layout.
-     *
-     * Inputs:
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
-     *      specifying the input.
-     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the block_size.
-     *      block_size must be >=1 and block_size * block_size must be a divisor
-     *      of the input depth.
-     *
-     * Outputs:
-     * * 0: The output 4-D tensor, of shape [batch, height*block_size,
-     *      width*block_size, depth/(block_size*block_size)].
-     */
-    ANEURALNETWORKS_DEPTH_TO_SPACE = 5,
-
-    /**
-     * Dequantizes the input tensor.
-     *
-     * The formula is:
-     *
-     *     output = (input - zeroPoint) * scale.
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: up to 4
-     *
-     * Inputs:
-     * * 0: A tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}.
-     *
-     * Outputs:
-     * * 0: The output tensor of same shape as input0, but with
-     *      {@link ANEURALNETWORKS_TENSOR_FLOAT32}.
-     */
-    ANEURALNETWORKS_DEQUANTIZE = 6,
-
-    /**
-     * Looks up sub-tensors in the input tensor.
-     *
-     * This operator takes for input a tensor of values (Values) and
-     * a one-dimensional tensor of selection indices (Lookups).
-     * The output tensor is the concatenation of sub-tensors of Values as
-     * selected by Lookups.
-     *
-     * Think of Values as being sliced along its first dimension:
-     * The entries in Lookups select which slices are concatenated together
-     * to create the output tensor.
-     *
-     * For example, if Values has shape of [40, 200, 300] and
-     * Lookups has shape of [3], all three values found in Lookups are
-     * expected to be between 0 and 39. The resulting tensor must
-     * have shape of [3, 200, 300].
-     *
-     * If a value in Lookups is out of bounds, the operation must fail
-     * and an error must be reported.
-     *
-     * Inputs:
-     * * 0: Lookups. A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}.
-     *      The values are indices into the first dimension of Values.
-     * * 1: Values. An n-D tensor, where n >= 2, from which sub-tensors are
-     *      extracted.
-     *
-     * Output:
-     * * 0: A n-D tensor with the same rank and shape as the Values
-     *      tensor, except for the first dimension which has the same size
-     *      as Lookups' only dimension.
-     */
-    ANEURALNETWORKS_EMBEDDING_LOOKUP = 7,
-
-    /**
-     * Computes element-wise floor() on the input tensor.
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     *
-     * Supported tensor rank: up to 4
-     *
-     * Inputs:
-     * * 0: A tensor.
-     *
-     * Outputs:
-     * * 0: The output tensor, of the same {@link OperandCode} and dimensions as
-     *      the input tensor.
-     */
-    ANEURALNETWORKS_FLOOR = 8,
-
-    /**
-     * Denotes a fully (densely) connected layer, which connects all elements
-     * in the input tensor with each element in the output tensor.
-     *
-     * This layer implements the operation:
-     *
-     *     outputs = activation(inputs * weights’ + bias)
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: up to 4.
-     *
-     * Inputs:
-     * * 0: A tensor of at least rank 2, specifying the input. If rank is
-     *      greater than 2, then it gets flattened to a 2-D Tensor. The
-     *      (flattened) 2-D Tensor is reshaped (if necessary) to
-     *      [batch_size, input_size], where "input_size" corresponds to the
-     *      number of inputs to the layer, matching the second dimension of
-     *      weights, and "batch_size" is calculated by dividing the number of
-     *      elements by "input_size".
-     * * 1: A 2-D tensor, specifying the weights, of shape
-     *      [num_units, input_size], where "num_units" corresponds to the number
-     *      of output nodes.
-     * * 2: A 1-D tensor, of shape [num_units], specifying the bias. For input
-     *      tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, the bias should
-     *      also be of {@link ANEURALNETWORKS_TENSOR_FLOAT32}. For input tensor
-     *      of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the bias should be
-     *      of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of 0 and
-     *      bias_scale == input_scale * filter_scale.
-     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
-     *      {@link FuseCode} values. Specifies the activation to
-     *      invoke on the result.
-     *
-     * Outputs:
-     * * 0: The output tensor, of shape [batch_size, num_units]. For output
-     *      tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the following
-     *      condition must be satisfied:
-     *      output_scale > input_scale * filter_scale.
-     */
-    ANEURALNETWORKS_FULLY_CONNECTED = 9,
-
-    /**
-     * Looks up sub-tensors in the input tensor using a key-value map.
-     *
-     * This operator takes for input a tensor of values (Values),
-     * a one-dimensional tensor of selection values (Lookups) and
-     * a one-dimensional tensor that maps these values to Values
-     * indexes. The output tensor is the concatenation of sub-tensors of
-     * Values as selected by Lookups via Keys.
-     *
-     * Think of Values as being sliced along its outer-most dimension.
-     * The output is a concatenation of selected slices, with one slice
-     * for each entry of Lookups. The slice selected is the one at the
-     * same index as the Maps entry that matches the value in Lookups.
-     *
-     * For a hit, the corresponding sub-tensor of Values is included
-     * in the Output tensor. For a miss, the corresponding sub-tensor in
-     * Output must have zero values.
-     *
-     * For example, if Values has shape of [40, 200, 300],
-     * Keys should have a shape of [40]. If Lookups tensor has shape
-     * of [3], three slices are being concatenated, so the resulting tensor
-     * must have the shape of [3, 200, 300]. If the first entry in Lookups
-     * has the value 123456, that value must be located in Keys tensor.
-     * If the sixth entry of Keys contains 123456, the sixth slice of Values
-     * must be selected. If no entry in Keys has 123456, a slice of zeroes
-     * must be concatenated.
-     *
-     * Inputs:
-     * * 0: Lookups. A 1-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor with
-     *      shape [ k ].
-     * * 1: Keys. A 1-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor with shape
-     *      [ n ]; Keys and Values pair represent a map, i.e., the ith element
-     *      in Keys (Keys[i]) is the key to select the ith sub-tensor in Values
-     *      (Values[i]), where 0 <= i <= n-1. Keys tensor *MUST* be sorted in
-     *      ascending order.
-     * * 2: Values. A tensor with shape of [ n, … ]; i.e., the first dimension
-     *      must be n.
-     *
-     * Outputs:
-     * * 0: Output. A tensor with shape [ k …].
-     * * 1: Hits. A boolean tensor with shape [ k ] indicates whether the lookup
-     *      hits (True) or not (False).
-     *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
-     *      and scale 1.0f.
-     *      A non-zero byte represents True, a hit. A zero indicates otherwise.
-     */
-    ANEURALNETWORKS_HASHTABLE_LOOKUP = 10,
-
-    /**
-     * Applies L2 normalization along the depth dimension.
-     *
-     * The values in the output tensor are computed as:
-     *
-     *     output[batch, row, col, channel] =
-     *         input[batch, row, col, channel] /
-     *         sqrt(sum_{c} pow(input[batch, row, col, c], 2))
-     *
-     * For input tensor with more dimensions, independently normalizes each 1-D
-     * slice along dimension dim.
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     *
-     * Supported tensor rank: 4, with "NHWC" data layout (i.e., Num_samples,
-     * Height, Width, and Channels).
-     *
-     * Inputs:
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth].
-     *
-     * Outputs:
-     * * 0: The output 4-D tensor, of the same shape as input
-     *      [batches, height, width, depth].
-     */
-    ANEURALNETWORKS_L2_NORMALIZATION = 11,
-
-    /**
-     * Performs an 2-D L2 pooling operation.
-     *
-     * The output dimensions are functions of the filter dimensions, stride, and
-     * padding.
-     *
-     * The values in the output tensor are computed as:
-     *
-     *     output[batch, row, col, channel] =
-     *         sqrt(sum_{i, j} pow(input[batch, row + i, col + j, channel], 2) /
-     *              sum(1))
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     *
-     * Supported tensor rank: 4, with "NHWC" data layout.
-     *
-     * Both explicit padding and implicit padding are supported.
-     *
-     * Inputs (explicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
-     *      the input.
-     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the left, in the ‘width’ dimension.
-     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the right, in the ‘width’ dimension.
-     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the top, in the ‘height’ dimension.
-     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the bottom, in the ‘height’ dimension.
-     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘width’ dimension.
-     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘height’ dimension.
-     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
-     *      width.
-     * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
-     *      height.
-     * * 9: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
-     *      {@link FuseCode} values. Specifies the activation to
-     *      invoke on the result.
-     *
-     * Inputs (implicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
-     *      the input.
-     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the implicit
-     *      padding scheme, has to be one of the
-     *      {@link PaddingCode} values.
-     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘width’ dimension.
-     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘height’ dimension.
-     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
-     *      width.
-     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
-     *      height.
-     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
-     *      {@link FuseCode} values. Specifies the activation to
-     *      invoke on the result.
-     *
-     * Outputs:
-     * * 0: The output 4-D tensor, of shape
-     *      [batches, out_height, out_width, depth].
-     */
-    ANEURALNETWORKS_L2_POOL_2D = 12,
-
-    /**
-     * Applies Local Response Normalization along the depth dimension.
-     *
-     * The 4-D input tensor is treated as a 3-D array of 1-D vectors (along the
-     * last dimension), and each vector is normalized independently. Within a
-     * given vector, each component is divided by the weighted, squared sum of
-     * inputs within depth_radius.
-     *
-     * The output is calculated using this formula:
-     *
-     *     sqr_sum[a, b, c, d] = sum(
-     *         pow(input[a, b, c, d - depth_radius : d + depth_radius + 1], 2))
-     *     output = input / pow((bias + alpha * sqr_sum), beta)
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     *
-     * Supported tensor rank: 4, with "NHWC" data layout.
-     *
-     * Inputs:
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
-     *      the input.
-     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the radius of
-     *      the normalization window.
-     * * 2: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the bias, must
-     *      not be zero.
-     * * 3: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the scale
-     *      factor, alpha.
-     * * 4: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the exponent,
-     *      beta.
-     *
-     * Outputs:
-     * * 0: The output tensor of same shape as input0.
-     */
-    ANEURALNETWORKS_LOCAL_RESPONSE_NORMALIZATION = 13,
-
-    /**
-     * Computes sigmoid activation on the input tensor element-wise.
-     *
-     * The output is calculated using this formula:
-     *
-     *     output = 1 / (1 + exp(-input))
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: up to 4.
-     *
-     * Inputs:
-     * * 0: A tensor, specifying the input.
-     *
-     * Outputs:
-     * * 0: The output tensor of same shape as input0.
-     *      For {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
-     *      the scale must be 1.f / 256 and the zeroPoint must be 0.
-     */
-    ANEURALNETWORKS_LOGISTIC = 14,
-
-    /**
-     * Projects an input to a bit vector via locality senstive hashing.
-     *
-     * Inputs:
-     * * 0: Hash functions. Dim.size == 2, DataType: Float.
-     *            Tensor[0].Dim[0]: Number of hash functions.
-     *            Tensor[0].Dim[1]: Number of seeds per hash functions.
-     *            Tensor[0].Dim[1] <= 32 in sparse case.
-     *
-     * * 1: Input. Dim.size >= 1, no restriction on DataType.
-     * * 2: Weight. Optional. Dim.size == 1, DataType: Float.
-     *     If not set, each input element is considered to have the same weight
-     *     of 1.0.
-     *     Tensor[1].Dim[0] == Tensor[2].Dim[0]
-     * * 3: Type:
-     *        Sparse: Value LSHProjectionType_SPARSE(=1).
-     *          Computed bit vector is considered to be sparse.
-     *          Each output element is an int32 made up of multiple bits
-     *          computed from hash functions.
-     *
-     *        Dense: Value LSHProjectionType_DENSE(=2).
-     *          Computed bit vector is considered to be dense. Each output
-     *          element represents a bit and can take the value of either
-     *          0 or 1.
-     *
-     * Outputs:
-     * * 0: If the projection type is sparse:
-     *        Output.Dim == { Tensor[0].Dim[0] }
-     *        A tensor of int32 that represents hash signatures.
-     *      If the projection type is Dense:
-     *        Output.Dim == { Tensor[0].Dim[0] * Tensor[0].Dim[1] }
-     *        A flattened tensor that represents projected bit vectors.
-     */
-    ANEURALNETWORKS_LSH_PROJECTION = 15,
-
-    /**
-     * Performs a single time step in a Long Short-Term Memory (LSTM) layer
-     *
-     * The LSTM operation is described by the following equations.
-     *
-     * \f{eqnarray*}{
-     * i_t =& \sigma(W_{xi}x_t+W_{hi}h_{t-1}+W_{ci}C_{t-1}+b_i) & \\
-     * f_t =& \sigma(W_{xf}x_t+W_{hf}h_{t-1}+W_{cf}C_{t-1}+b_f) & \\
-     * C_t =& clip(f_t \odot C_{t-1} + i_t \odot
-     *        g(W_{xc}x_t+W_{hc}h_{t-1}+b_c),\ t_{cell}) & \\
-     * o_t =& \sigma(W_{xo}x_t+W_{ho}h_{t-1}+W_{co}C_t+b_o) & \\
-     *      & & \\
-     *      & clip(W_{proj}(o_t \odot g(C_t))+b_{proj},\ t_{proj})
-     *      & if\ there\ is\ a\ projection; \\
-     * h_t =& & \\
-     *      & o_t \odot g(C_t) & otherwise. \\
-     * \f}
-     * Where:
-     * * \f$x_t\f$ is the input,
-     * * \f$i_t\f$ is the input gate,
-     * * \f$f_t\f$ is the forget gate,
-     * * \f$C_t\f$ is the cell state,
-     * * \f$o_t\f$ is the output,
-     * * \f$h_t\f$ is the output state,
-     * * \f$\sigma\f$ is the logistic sigmoid function,
-     * * \f$g\f$ is the cell input and cell output activation function, usually
-     *   \f$tahn\f$,
-     * * \f$W_{xi}\f$ is the input-to-input weight matrix,
-     * * \f$W_{hi}\f$ is the recurrent to input weight matrix,
-     * * \f$W_{ci}\f$ is the cell-to-input weight matrix,
-     * * \f$b_i\f$ is the input gate bias,
-     * * \f$W_{xf}\f$ is the input-to-forget weight matrix,
-     * * \f$W_{hf}\f$ is the recurrent-to-forget weight matrix,
-     * * \f$W_{cf}\f$ is the cell-to-forget weight matrix,
-     * * \f$b_f\f$ is the forget gate bias,
-     * * \f$W_{xc}\f$ is the input-to-cell weight matrix,
-     * * \f$W_{hc}\f$ is the recurrent-to-cell weight matrix,
-     * * \f$b_c\f$ is the cell bias,
-     * * \f$W_{xo}\f$ is the input-to-output weight matrix,
-     * * \f$W_{ho}\f$ is the recurrent-to-output weight matrix,
-     * * \f$W_{co}\f$ is the cell-to-output weight matrix,
-     * * \f$b_o\f$ is the output gate bias,
-     * * \f$W_{proj}\f$ is the projection weight matrix,
-     * * \f$b_{proj}\f$ is the projection bias,
-     * * \f$t_{cell}\f$ is the threshold for clipping the cell state, and
-     * * \f$t_{proj}\f$ is the threshold for clipping the projected output.
-     * * \f$\odot\f$ is the
-     *   <a href="https://en.wikipedia.org/wiki/Hadamard_product_(matrices)">
-     *   Hadamard product</a> that takes two matrices and produces another
-     *   matrix, each element of which is the product of the corresponding
-     *   elements of the input matrices.
-     *
-     * The operation has the following independently optional inputs:
-     * * The input-to-input weights (\f$W_{xi}\f$), recurrent-to-input weights
-     *   (\f$W_{hi}\f$), cell-to-input (\f$W_{ci}\f$) weights, and input gate
-     *   bias (\f$b_i\f$) either all have values, or none of them have values
-     *   (i.e., all set to null). If they have no values, coupling of input and
-     *   forget gates (CIFG) is used, in which case the input gate (\f$i_t\f$)
-     *   is calculated using the following equation instead.
-     *   \f{eqnarray*}{
-     *   i_t = 1 - f_t
-     *   \f}
-     * * The cell-to-forget weights (\f$W_{cf}\f$) and cell-to-output weights
-     *   (\f$W_{co}\f$) either both have values or neither of them have values.
-     *   If they have values, the peephole optimization is used. Additionally,
-     *   if CIFG is not used, cell-to-input weights (\f$W_{ci}\f$) is also
-     *   required to have values for peephole optimization.
-     * * The projection weights (\f$W_{proj}\f$) is required only for the
-     *   recurrent projection layer, and should otherwise have no value.
-     * * The projection bias (\f$b_{proj}\f$) may (but not required to) have a
-     *   value if the recurrent projection layer exists, and should otherwise
-     *   have no value.
-     *
-     * References:
-     *
-     * The default non-peephole non-CIFG implementation is based on:
-     * http://www.bioinf.jku.at/publications/older/2604.pdf
-     * S. Hochreiter and J. Schmidhuber. "Long Short-Term Memory". Neural
-     * Computation, 9(8):1735-1780, 1997.
-     *
-     * The peephole implementation and projection layer is based on:
-     * https://research.google.com/pubs/archive/43905.pdf
-     * Hasim Sak, Andrew Senior, and Francoise Beaufays. "Long short-term memory
-     * recurrent neural network architectures for large scale acoustic
-     * modeling." INTERSPEECH, 2014.
-     * (However, the concept of peephole optimization was introduced in work
-     * prior to this paper.)
-     *
-     * The coupling of input and forget gate (CIFG) is based on:
-     * http://arxiv.org/pdf/1503.04069.pdf
-     * Greff et al. "LSTM: A Search Space Odyssey"
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     *
-     * Inputs:
-     * * 0: The input (\f$x_t\f$).
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [batch_size, input_size], where “batch_size” corresponds to the
-     *      batching dimension, and “input_size” is the size of the input.
-     * * 1: The input-to-input weights (\f$W_{xi}\f$). Optional.
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units, input_size], where “num_units” corresponds to the
-     *      number of cell units.
-     * * 2: The input-to-forget weights (\f$W_{xf}\f$).
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units, input_size].
-     * * 3: The input-to-cell weights (\f$W_{xc}\f$).
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units, input_size].
-     * * 4: The input-to-output weights (\f$W_{xo}\f$).
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units, input_size].
-     * * 5: The recurrent-to-input weights (\f$W_{hi}\f$). Optional.
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units, output_size], where “output_size” corresponds to either
-     *      the number of cell units (i.e., “num_units”), or the second
-     *      dimension of the “projection_weights”, if defined.
-     * * 6: The recurrent-to-forget weights (\f$W_{hf}\f$).
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units, output_size].
-     * * 7: The recurrent-to-cell weights (\f$W_{hc}\f$).
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units, output_size].
-     * * 8: The recurrent-to-output weights (\f$W_{ho}\f$).
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units, output_size].
-     * * 9: The cell-to-input weights (\f$W_{ci}\f$). Optional.
-     *      A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units].
-     * * 10:The cell-to-forget weights (\f$W_{cf}\f$). Optional.
-     *      A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units].
-     * * 11:The cell-to-output weights (\f$W_{co}\f$). Optional.
-     *      A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units].
-     * * 12:The input gate bias (\f$b_i\f$). Optional.
-     *      A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units].
-     * * 13:The forget gate bias (\f$b_f\f$).
-     *      A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units].
-     * * 14:The cell bias (\f$b_c\f$).
-     *      A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units].
-     * * 15:The output gate bias (\f$b_o\f$).
-     *      A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units].
-     * * 16:The projection weights (\f$W_{proj}\f$). Optional.
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [output_size, num_units].
-     * * 17:The projection bias (\f$b_{proj}\f$). Optional.
-     *      A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [output_size].
-     * * 18:The output state (in) (\f$h_{t-1}\f$).
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [batch_size, output_size].
-     * * 19:The cell state (in) (\f$C_{t-1}\f$).
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [batch_size, num_units].
-     * * 20:The activation function (\f$g\f$).
-     *      A value indicating the activation function:
-     *      <ul>
-     *      <li>0: None;
-     *      <li>1: Relu;
-     *      <li>3: Relu6;
-     *      <li>4: Tanh;
-     *      <li>6: Sigmoid.
-     *      </ul>
-     * * 21:The clipping threshold (\f$t_{cell}\f$) for the cell state, such
-     *      that values are bound within [-cell_clip, cell_clip]. If set to 0.0
-     *      then clipping is disabled.
-     * * 22:The clipping threshold (\f$t_{proj}\f$) for the output from the
-     *      projection layer, such that values are bound within
-     *      [-proj_clip, proj_clip]. If set to 0.0 then clipping is disabled.
-     *
-     * Outputs:
-     * * 0: The scratch buffer.
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [batch_size, num_units * 4] with CIFG, or
-     *      [batch_size, num_units * 3] without CIFG.
-     * * 1: The output state (out) (\f$h_t\f$).
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [batch_size, output_size].
-     * * 2: The cell state (out) (\f$C_t\f$).
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [batch_size, num_units].
-     * * 3: The output (\f$o_t\f$).
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [batch_size, output_size]. This is effectively the same as the
-     *      current “output state (out)” value.
-     */
-    ANEURALNETWORKS_LSTM = 16,
-
-    /**
-     * Performs an 2-D max pooling operation.
-     *
-     * The output dimensions are functions of the filter dimensions, stride, and
-     * padding.
-     *
-     * The values in the output tensor are computed as:
-     *
-     *     output[batch, row, col, channel] =
-     *         max_{i, j} (input[batch, row + i, col + j, channel])
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: 4, with "NHWC" data layout.
-     *
-     * Both explicit padding and implicit padding are supported.
-     *
-     * Inputs (explicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
-     *      the input.
-     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the left, in the ‘width’ dimension.
-     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the right, in the ‘width’ dimension.
-     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the top, in the ‘height’ dimension.
-     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
-     *      the bottom, in the ‘height’ dimension.
-     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘width’ dimension.
-     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘height’ dimension.
-     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
-     *      width.
-     * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
-     *      height.
-     * * 9: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
-     *      {@link FuseCode} values. Specifies the activation to
-     *      invoke on the result.
-     *
-     * Inputs (implicit padding):
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
-     *      the input.
-     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the implicit
-     *      padding scheme, has to be one of the
-     *      {@link PaddingCode} values.
-     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘width’ dimension.
-     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-     *      walking through input in the ‘height’ dimension.
-     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
-     *      width.
-     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
-     *      height.
-     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
-     *      {@link FuseCode} values. Specifies the activation to
-     *      invoke on the result.
-     *
-     * Outputs:
-     * * 0: The output 4-D tensor, of shape
-     *      [batches, out_height, out_width, depth].
-     */
-    ANEURALNETWORKS_MAX_POOL_2D = 17,
-
-    /**
-     * Multiplies two tensors, element-wise.
-     *
-     * Takes two input tensors of identical {@link OperandCode} and compatible
-     * dimensions. The output is the product of both input tensors, optionally
-     * modified by an activation function.
-     *
-     * Two dimensions are compatible when:
-     *     1. they are equal, or
-     *     2. one of them is 1
-     *
-     * The size of the resulting output is the maximum size along each dimension
-     * of the input operands. It starts with the trailing dimensions, and works
-     * its way forward.
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: up to 4
-     *
-     * Inputs:
-     * * 0: A tensor.
-     * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
-     *      as input0.
-     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
-     *      {@link FuseCode} values. Specifies the activation to
-     *      invoke on the result.
-     *
-     * Outputs:
-     * * 0: The product, a tensor of the same {@link OperandCode} as input0.
-     *      For output tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
-     *      the following condition must be satisfied:
-     *      output_scale > input1_scale * input2_scale.
-     */
-    ANEURALNETWORKS_MUL = 18,
-
-    /**
-     * Computes rectified linear activation on the input tensor element-wise.
-     *
-     * The output is calculated using this formula:
-     *
-     *     output = max(0, input)
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: up to 4.
-     *
-     * Inputs:
-     * * 0: A tensor, specifying the input.
-     *
-     * Outputs:
-     * * 0: The output tensor of same shape as input0.
-     */
-    ANEURALNETWORKS_RELU = 19,
-
-    /**
-     * Computes rectified linear 1 activation on the input tensor element-wise.
-     *
-     * The output is calculated using this formula:
-     *
-     *     output = min(1.f, max(-1.f, input))
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: up to 4.
-     *
-     * Inputs:
-     * * 0: A tensor, specifying the input.
-     *
-     * Outputs:
-     * * 0: The output tensor of same shape as input0.
-     */
-    ANEURALNETWORKS_RELU1 = 20,
-
-    /**
-     * Computes rectified linear 6 activation on the input tensor element-wise.
-     *
-     * The output is calculated using this formula:
-     *
-     *     output = min(6, max(0, input))
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: up to 4.
-     *
-     * Inputs:
-     * * 0: A tensor, specifying the input.
-     *
-     * Outputs:
-     * * 0: The output tensor of same shape as input0.
-     */
-    ANEURALNETWORKS_RELU6 = 21,
-
-    /**
-     * Reshapes a tensor.
-     *
-     * Given tensor, this operation returns a tensor that has the same values as
-     * tensor, but with a newly specified shape.
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: up to 4.
-     *
-     * Inputs:
-     * * 0: A tensor, specifying the tensor to be reshaped.
-     * * 1: A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, defining the
-     *      shape of the output tensor. The number of elements implied by shape
-     *      must be the same as the number of elements in the input tensor.
-     *
-     * Outputs:
-     * * 0: The output tensor, of shape specified by the input shape.
-     */
-    ANEURALNETWORKS_RESHAPE = 22,
-
-    /**
-     * Resizes images to given size using the bilinear interpretation.
-     *
-     * Resized images must be distorted if their output aspect ratio is not the
-     * same as input aspect ratio. The corner pixels of output may not be the
-     * same as corner pixels of input.
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     *
-     * Supported tensor rank: 4, with "NHWC" data layout.
-     *
-     * Inputs:
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
-     *      the input.
-     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the output
-     *      height of the output tensor.
-     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the output
-     *      width of the output tensor.
-     *
-     * Outputs:
-     * * 0: The output 4-D tensor, of shape
-     *      [batches, new_height, new_width, depth].
-     */
-    ANEURALNETWORKS_RESIZE_BILINEAR = 23,
-
-    /**
-     * A basic recurrent neural network layer.
-     *
-     * This layer implements the operation:
-     * outputs = state = activation(inputs * input_weights +
-     *                              state * recurrent_weights + bias)
-     *
-     * Where:
-     * * “input_weights” is a weight matrix that multiplies the inputs;
-     * * “recurrent_weights” is a weight matrix that multiplies the current
-     *    “state” which itself is the output from the previous time step
-     *    computation;
-     * * “bias” is a bias vector (added to each output vector in the batch);
-     * * “activation” is the function passed as the “fused_activation_function”
-     *   argument (if not “NONE”).
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     *
-     * Inputs:
-     * * 0: input.
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32} of shape
-     *      [batch_size, input_size], where “batch_size” corresponds to the
-     *      batching dimension, and “input_size” is the size of the input.
-     * * 1: weights.
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units, input_size], where “num_units” corresponds to the
-     *      number of units.
-     * * 2: recurrent_weights.
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units, num_units], with columns corresponding to the weights
-     *      from each unit.
-     * * 3: bias.
-     *      A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units].
-     * * 4: hidden state (in).
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [batch_size, num_units].
-     * * 5: fused_activation_function.
-     *      An optional {@link FuseCode} value indicating the
-     *      activation function. If “NONE” is specified then it results in a
-     *      linear activation.
-     *
-     * Outputs:
-     * * 0: hidden state (out).
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [batch_size, num_units].
-     *
-     * * 1: output.
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [batch_size, num_units]. This is effectively the same as the
-     *      current state value.
-     */
-    ANEURALNETWORKS_RNN = 24,
-
-    /**
-     * Computes the softmax activation on the input tensor element-wise, per
-     * batch, by normalizing the input vector so the maximum coefficient is
-     * zero.
-     *
-     * The output is calculated using this formula:
-     *
-     *     output[batch, i] =
-     *         exp((input[batch, i] - max(input[batch, :])) * beta) /
-     *         sum_{k}{exp((input[batch, k] - max(input[batch, :])) * beta)}
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: 2 or 4.
-     *
-     * Inputs:
-     * * 0: A 2-D or 4-D tensor, specifying the tensor to be reshaped.
-     * * 1: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the positive
-     *      scaling factor for the exponent, beta.
-     *
-     * Outputs:
-     * * 0: The output tensor of same shape as input0.
-     *      For {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
-     *      the scale must be 1.f / 256 and the zeroPoint must be 0.
-     */
-    ANEURALNETWORKS_SOFTMAX = 25,
-
-    /**
-     * Rearranges blocks of spatial data, into depth.
-     *
-     * More specifically, this op outputs a copy of the input tensor where
-     * values from the height and width dimensions are moved to the depth
-     * dimension. The value block_size indicates the input block size and how
-     * the data is moved.
-     *
-     * Chunks of data of size block_size * block_size from depth are rearranged
-     * into non-overlapping blocks of size block_size x block_size.
-     *
-     * The depth of the output tensor is input_depth * block_size * block_size.
-     * The input tensor's height and width must be divisible by block_size.
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: 4, with "NHWC" data layout.
-     *
-     * Inputs:
-     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
-     *      specifying the input.
-     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the block_size.
-     *      block_size must be >=1 and block_size must be a divisor of both the
-     *      input height and width.
-     *
-     * Outputs:
-     * * 0: The output 4-D tensor, of shape [batches, height/block_size,
-     *      width/block_size, depth_in*block_size*block_size].
-     */
-    ANEURALNETWORKS_SPACE_TO_DEPTH = 26,
-
-    /**
-     * SVDF op is a kind of stateful layer derived from the notion that a
-     * densely connected layer that's processing a sequence of input frames can
-     * be approximated by using a singular value decomposition of each of its
-     * nodes. The implementation is based on:
-     *
-     * https://research.google.com/pubs/archive/43813.pdf
-     *
-     * P. Nakkiran, R. Alvarez, R. Prabhavalkar, C. Parada.
-     * “Compressing Deep Neural Networks using a Rank-Constrained Topology”.
-     * INTERSPEECH, 2015.
-     *
-     * It processes the incoming input using a 2-stage filtering mechanism:
-     * * stage 1 performs filtering on the "features" dimension, whose outputs
-     *   get pushed into a memory of fixed-size memory_size.
-     * * stage 2 performs filtering on the "time" dimension of the memory_size
-     *   memoized outputs of stage 1.
-     *
-     * Specifically, for rank 1, this layer implements the operation:
-     *
-     *     memory = push(conv1d(inputs, weights_feature, feature_dim,
-     *                          "ANEURALNETWORKS_PADDING_VALID"));
-     *     outputs = activation(memory * weights_time + bias);
-     *
-     * Where:
-     * * “weights_feature” is a weights matrix that processes the inputs (by
-     *   convolving the input with every “feature filter”), and whose outputs
-     *   get pushed, stacked in order, into the fixed-size “memory” (the oldest
-     *   entry gets dropped);
-     * * “weights_time” is a weights matrix that processes the “memory” (by a
-     *   batched matrix multiplication on the num_units);
-     * * “bias” is an optional bias vector (added to each output vector in the
-     *   batch); and
-     * * “activation” is the function passed as the “fused_activation_function”
-     *   argument (if not “NONE”).
-     *
-     * Each rank adds a dimension to the weights matrices by means of stacking
-     * the filters.
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     *
-     * Inputs:
-     * * 0: input.
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [batch_size, input_size], where “batch_size” corresponds to the
-     *      batching dimension, and “input_size” is the size of the input.
-     * * 1: weights_feature.
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units, input_size], where “num_units” corresponds to the
-     *      number of units.
-     * * 2: weights_time.
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [num_units, memory_size], where “memory_size” corresponds to the
-     *      fixed-size of the memory.
-     * * 3: bias.
-     *      An optional 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32},
-     *      of shape [num_units].
-     * * 4: state (in).
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [batch_size, (memory_size - 1) * num_units * rank].
-     * * 5: rank.
-     *      The rank of the SVD approximation.
-     * * 6: fused_activation_function.
-     *      An optional {@link FuseCode} value indicating the
-     *      activation function. If “NONE” is specified then it results in a
-     *      linear activation.
-     *
-     * Outputs:
-     * * 0: state (out).
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-     *      [batch_size, (memory_size - 1) * num_units * rank].
-     * * 1: output.
-     *      A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape
-         *      [batch_size, num_units].
-     */
-    ANEURALNETWORKS_SVDF = 27,
-
-    /**
-     * Computes hyperbolic tangent of input tensor element-wise.
-     *
-     * The output is calculated using this formula:
-     *
-     *     output = tanh(input)
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     *
-     * Supported tensor rank: up to 4.
-     *
-     * Inputs:
-     * * 0: A tensor, specifying the input.
-     *
-     * Outputs:
-     * * 0: The output tensor of same shape as input0.
-     */
-    ANEURALNETWORKS_TANH = 28,
-
-    // TODO: make the description easier to understand.
-    /**
-     * BatchToSpace for N-dimensional tensors.
-     *
-     * This operation reshapes the batch dimension (dimension 0) into M + 1
-     * dimensions of shape block_shape + [batch], interleaves these blocks back
-     * into the grid defined by the spatial dimensions [1, ..., M], to obtain a
-     * result with the same rank as the input.
-     *
-     * This is the reverse of SpaceToBatch.
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: 4
-     *
-     * Inputs:
-     * * 0: An n-D tensor, specifying the tensor to be reshaped
-     * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the block
-     *      sizes for each spatial dimension of the input tensor. All values
-     *      must be >= 1.
-     *
-     * Outputs:
-     * * 0: A tensor of the same {@link OperandCode} as input0.
-     */
-    ANEURALNETWORKS_BATCH_TO_SPACE_ND = 29,
-
-    /**
-     * Element-wise division of two tensors.
-     *
-     * Takes two input tensors of identical {@link OperandCode} and compatible
-     * dimensions. The output is the result of dividing the first input tensor
-     * by the second, optionally modified by an activation function.
-     *
-     * Two dimensions are compatible when:
-     *     1. they are equal, or
-     *     2. one of them is 1
-     *
-     * The size of the output is the maximum size along each dimension of the
-     * input operands. It starts with the trailing dimensions, and works its way
-     * forward.
-     *
-     * Example:
-     *     input1.dimension =    {4, 1, 2}
-     *     input2.dimension = {5, 4, 3, 1}
-     *     output.dimension = {5, 4, 3, 2}
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     *
-     * Supported tensor rank: up to 4
-     *
-     * Inputs:
-     * * 0: An n-D tensor, specifying the first input.
-     * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
-     *      as input0.
-     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
-     *      {@link FuseCode} values. Specifies the activation to
-     *      invoke on the result.
-     *
-     * Outputs:
-     * * 0: A tensor of the same {@link OperandCode} as input0.
-     */
-    ANEURALNETWORKS_DIV = 30,
-
-    /**
-     * Computes the mean of elements across dimensions of a tensor.
-     *
-     * Reduces the input tensor along the given dimensions to reduce. Unless
-     * keep_dims is true, the rank of the tensor is reduced by 1 for each entry
-     * in axis. If keep_dims is true, the reduced dimensions are retained with
-     * length 1.
-     *
-     * If dimensions to reduce have no entries, all dimensions are reduced, and
-     * a tensor with a single element is returned.
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: up to 4
-     *
-     * Inputs:
-     * * 0: A tensor, specifying the input.
-     * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The dimensions
-     *      to reduce. If None (the default), reduces all dimensions. Must be in
-     *      the range [-rank(input_tensor), rank(input_tensor)).
-     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, keep_dims. If positive,
-     *      retains reduced dimensions with length 1.
-     *
-     * Outputs:
-     * * 0: A tensor of the same {@link OperandCode} as input0.
-     */
-    ANEURALNETWORKS_MEAN = 31,
-
-    /**
-     * Pads a tensor.
-     *
-     * This operation pads a tensor according to the specified paddings.
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: up to 4
-     *
-     * Inputs:
-     * * 0: An n-D tensor, specifying the tensor to be padded.
-     * * 1: A 2-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the paddings
-     *      for each spatial dimension of the input tensor. The shape of the
-     *      tensor must be {rank(input0), 2}.
-     *      padding[i, 0] specifies the number of elements to be padded in the
-     *      front of dimension i.
-     *      padding[i, 1] specifies the number of elements to be padded after the
-     *      end of dimension i.
-     *
-     * Outputs:
-     * * 0: A tensor of the same {@link OperandCode} as input0. The
-     *      output tensor has the same rank as input0, and each
-     *      dimension of the output tensor has the same size as the
-     *      corresponding dimension of the input tensor plus the size
-     *      of the padding:
-     *          output0.dimension[i] =
-     *              padding[i, 0] + input0.dimension[i] + padding[i, 1]
-     */
-    ANEURALNETWORKS_PAD = 32,
-
-    // TODO: make the description easier to understand.
-    /**
-     * SpaceToBatch for N-Dimensional tensors.
-     *
-     * This operation divides "spatial" dimensions [1, ..., M] of the input into
-     * a grid of blocks of shape block_shape, and interleaves these blocks with
-     * the "batch" dimension (0) such that in the output, the spatial dimensions
-     * [1, ..., M] correspond to the position within the grid, and the batch
-     * dimension combines both the position within a spatial block and the
-     * original batch position. Prior to division into blocks, the spatial
-     * dimensions of the input are optionally zero padded according to paddings.
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: 4
-     *
-     * Inputs:
-     * * 0: An n-D tensor, specifying the input.
-     * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the block
-     *      sizes for each spatial dimension of the input tensor. All values
-     *      must be >= 1.
-     * * 2: A 2-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the paddings
-     *      for each spatial dimension of the input tensor. All values must be
-     *      >= 0. The shape of the tensor must be {rank(input0), 2}.
-     *      padding[i, 0] specifies the number of element to be padded in the
-     *      front of dimension i.
-     *      padding[i, 1] specifies the number of element to be padded after the
-     *      end of dimension i.
-     *
-     * Outputs:
-     * * 0: A tensor of the same {@link OperandCode} as input0.
-     */
-    ANEURALNETWORKS_SPACE_TO_BATCH_ND = 33,
-
-    /**
-     * Removes dimensions of size 1 from the shape of a tensor.
-     *
-     * Given a tensor input, this operation returns a tensor of the same
-     * {@link OperandCode} with all dimensions of size 1 removed. If you don't
-     * want to remove all size 1 dimensions, you can remove specific size 1
-     * dimensions by specifying the axes (input1).
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: up to 4
-     *
-     * Inputs:
-     * * 0: An n-D tensor, the tensor to be squeezed.
-     * * 1: An optional 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The
-     *      dimensions to squeeze. If specified only squeezes the dimensions
-     *      listed. Otherwise, squeezes all dimensions. The dimension index
-     *      starts at 0. An error must be reported if squeezing a dimension that
-     *      is not 1.
-     *
-     * Outputs:
-     * * 0: A tensor of the same {@link OperandCode} as input0. Contains the
-     *      same data as input, but has one or more dimensions of size 1
-     *      removed.
-     */
-    ANEURALNETWORKS_SQUEEZE = 34,
-
-    /**
-     * Extracts a strided slice of a tensor.
-     *
-     * Roughly speaking, this op extracts a slice of size (end - begin) / stride
-     * from the given input tensor. Starting at the location specified by begin
-     * the slice continues by adding stride to the index until all dimensions
-     * are not less than end. Note that a stride can be negative, which causes a
-     * reverse slice.
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: up to 4
-     *
-     * Inputs:
-     * * 0: An n-D tensor, specifying the tensor to be sliced.
-     * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the starts of
-     *      the dimensions of the input tensor to be sliced. The length must be
-     *      of rank(input0).
-     * * 2: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the ends of
-     *      the dimensions of the input tensor to be sliced. The length must be
-     *      of rank(input0).
-     * * 3: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the strides of
-     *      the dimensions of the input tensor to be sliced. The length must be
-     *      of rank(input0).
-     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, begin_mask. If the ith bit
-     *      of begin_mask is set, begin[i] is ignored and the fullest possible
-     *      range in that dimension is used instead.
-     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, end_mask. If the ith bit of
-     *      end_mask is set, end[i] is ignored and the fullest possible range in
-     *      that dimension is used instead.
-     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, shrink_axis_mask. An int32
-     *      mask. If the ith bit of shrink_axis_mask is set, it implies that the
-     *      ith specification shrinks the dimensionality by 1. A slice of size 1
-     *      starting from begin[i] in the dimension must be preserved.
-     *
-     * Outputs:
-     * * 0: A tensor of the same {@link OperandCode} as input0.
-     */
-    ANEURALNETWORKS_STRIDED_SLICE = 35,
-
-    /**
-     * Element-wise subtraction of two tensors.
-     *
-     * Takes two input tensors of identical {@link OperandCode} and compatible
-     * dimensions. The output is the result of subtracting the second input
-     * tensor from the first one, optionally modified by an activation function.
-     *
-     * Two dimensions are compatible when:
-     *     1. they are equal, or
-     *     2. one of them is 1
-     *
-     * The size of the output is the maximum size along each dimension of the
-     * input operands. It starts with the trailing dimensions, and works its way
-     * forward.
-     *
-     * Example:
-     *     input1.dimension =    {4, 1, 2}
-     *     input2.dimension = {5, 4, 3, 1}
-     *     output.dimension = {5, 4, 3, 2}
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     *
-     * Supported tensor rank: up to 4
-     *
-     * Inputs:
-     * * 0: An n-D tensor, specifying the first input.
-     * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
-     *      as input0.
-     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
-     *      {@link FuseCode} values. Specifies the activation to
-     *      invoke on the result.
-     *
-     * Outputs:
-     * * 0: A tensor of the same {@link OperandCode} as input0.
-     */
-    ANEURALNETWORKS_SUB = 36,
-
-    /**
-     * Transposes the input tensor, permuting the dimensions according to the
-     * perm tensor.
-     *
-     * The returned tensor's dimension i corresponds to the input dimension
-     * perm[i]. If perm is not given, it is set to (n-1...0), where n is the
-     * rank of the input tensor. Hence by default, this operation performs a
-     * regular matrix transpose on 2-D input Tensors.
-     *
-     * Supported tensor {@link OperandCode}:
-     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-     *
-     * Supported tensor rank: up to 4
-     *
-     * Inputs:
-     * * 0: An n-D tensor, specifying the tensor to be transposed.
-     * * 1: An optional 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32},
-     *      the permutation of the dimensions of the input tensor.
-     *
-     * Outputs:
-     * * 0: A tensor of the same {@link OperandCode} as input0.
-     */
-    ANEURALNETWORKS_TRANSPOSE = 37,
-} OperationCode;
-
-/**
- * Fused activation function types.
- *
- */
-typedef enum {
-    /** NO fused activation function. */
-    ANEURALNETWORKS_FUSED_NONE = 0,
-    /** Fused ReLU activation function. */
-    ANEURALNETWORKS_FUSED_RELU = 1,
-    /** Fused ReLU1 activation function. */
-    ANEURALNETWORKS_FUSED_RELU1 = 2,
-    /** Fused ReLU6 activation function. */
-    ANEURALNETWORKS_FUSED_RELU6 = 3,
-} FuseCode;
-
-/**
- * Implicit padding algorithms.
- *
- */
-typedef enum {
-    /**
-     * SAME padding.
-     * Padding on both ends are the "same":
-     *     padding_to_beginning =  total_padding / 2
-     *     padding_to_end       = (total_padding + 1)/2.
-     * i.e., for even number of padding, padding to both ends are exactly
-     * the same; for odd number of padding, padding to the ending is bigger
-     * than the padding to the beginning by 1.
-     *
-     * total_padding is a function of input, stride and filter size.
-     * It could be computed as follows:
-     *    out_size = (input + stride - 1) / stride;
-     *    needed_input = (out_size - 1) * stride + filter_size
-     *    total_padding = max(0, needed_input - output_size)
-     *  The computation is the same for the horizontal and vertical directions.
-     */
-    ANEURALNETWORKS_PADDING_SAME = 1,
-
-    /**
-     * VALID padding.
-     * No padding. When the input size is not evenly divisible by
-     * the filter size, the input at the end that could not fill
-     * the whole filter tile will simply be ignored.
-     */
-    ANEURALNETWORKS_PADDING_VALID = 2,
-} PaddingCode;
-
-/**
- * Execution preferences.
- */
-typedef enum {
-    /**
-     * Prefer executing in a way that minimizes battery drain.
-     * This is desirable for compilations that will be executed often.
-     */
-    ANEURALNETWORKS_PREFER_LOW_POWER = 0,
-    /**
-     * Prefer returning a single answer as fast as possible, even if this causes
-     * more power consumption.
-     */
-    ANEURALNETWORKS_PREFER_FAST_SINGLE_ANSWER = 1,
-    /**
-     * Prefer maximizing the throughput of successive frames, for example when
-     * processing successive frames coming from the camera.
-     */
-    ANEURALNETWORKS_PREFER_SUSTAINED_SPEED = 2,
-} PreferenceCode;
-
-/**
- * Result codes.
- */
-typedef enum {
-    ANEURALNETWORKS_NO_ERROR = 0,
-    ANEURALNETWORKS_OUT_OF_MEMORY = 1,
-    ANEURALNETWORKS_INCOMPLETE = 2,
-    ANEURALNETWORKS_UNEXPECTED_NULL = 3,
-    ANEURALNETWORKS_BAD_DATA = 4,
-    ANEURALNETWORKS_OP_FAILED = 5,
-    ANEURALNETWORKS_BAD_STATE = 6,
-    ANEURALNETWORKS_UNMAPPABLE = 7,
-} ResultCode;
-
-/**
- * For {@link ANeuralNetworksModel_setOperandValue}, values with a
- * length smaller or equal to this will be immediately copied into
- * the model. The size is in bytes.
- */
-enum {
-    ANEURALNETWORKS_MAX_SIZE_OF_IMMEDIATELY_COPIED_VALUES = 128
-};
-
-/**
- * ANeuralNetworksMemory is an opaque type that represents memory.
- *
- * This type is used to represent shared memory, memory mapped files,
- * and similar memories.
- *
- * By using shared memory, a program can efficiently communicate to the
- * runtime and drivers the tensors that define a model. See
- * {@link ANeuralNetworksModel_setOperandValueFromMemory}. An application
- * should typically create one shared memory object that contains every tensor
- * needed to define a model. {@link ANeuralNetworksMemory_createFromFd} can be
- * used to create shared memory from a file handle.
- *
- * Memory objects can also be used to specify the input and output arguments of
- * an execution. See {@link ANeuralNetworksExecution_setInputFromMemory}
- * and {@link ANeuralNetworksExecution_setOutputFromMemory}.
- */
-typedef struct ANeuralNetworksMemory ANeuralNetworksMemory;
-
-/**
- * ANeuralNetworksModel is an opaque type that contains a description of the
- * mathematical operations that constitute the model.
- *
- * <p>Build the model by calling<ul>
- * <li>{@link ANeuralNetworksModel_create}</li>
- * <li>{@link ANeuralNetworksModel_addOperation}</li>
- * <li>{@link ANeuralNetworksModel_addOperand}</li>
- * </ul>
- *
- * This forms a graph in which each operation and operand is a node, a
- * directed edge from an operand to an operation indicates that the
- * operand is an input to the operation, and a directed edge from an
- * operation to an operand indicates that the operand is an output
- * from the operation. This graph must be acyclic.
- *
- * A model is completed by calling {@link ANeuralNetworksModel_finish}.
- * A model is destroyed by calling {@link ANeuralNetworksModel_free}.
- *
- * <p>A model cannot be modified once {@link ANeuralNetworksModel_finish}
- * has been called on it.</p>
- *
- * <p>It is the application's responsibility to make sure that only one thread
- * modifies a model at a given time. It is however safe for more than one
- * thread to use the model once {@link ANeuralNetworksModel_finish} has returned.</p>
- *
- * <p>It is also the application's responsibility to ensure that there are no other
- * uses of the model after calling {@link ANeuralNetworksModel_free}.
- * This includes any compilation or execution object created using the model.</p>
- */
-typedef struct ANeuralNetworksModel ANeuralNetworksModel;
-
-/**
- * ANeuralNetworksCompilation is an opaque type that can be used to compile
- * a machine learning model.
- *
- * <p>To use:<ul>
- *    <li>Create a new compilation instance by calling the
- *        {@link ANeuralNetworksCompilation_create} function.</li>
- *    <li>Set any desired properties on the compilation (for example,
- *        {@link ANeuralNetworksCompilation_setPreference}).</li>
- *    <li>Complete the compilation with {@link ANeuralNetworksCompilation_finish}.</li>
- *    <li>Use the compilation as many times as needed
- *        with {@link ANeuralNetworksExecution_create}.</li>
- *    <li>Destroy the compilation with {@link ANeuralNetworksCompilation_free}
- *        once all executions using the compilation have completed.</li></ul></p>
- *
- * A compilation is completed by calling {@link ANeuralNetworksCompilation_finish}.
- * A compilation is destroyed by calling {@link ANeuralNetworksCompilation_free}.
- *
- * <p>A compilation cannot be modified once {@link ANeuralNetworksCompilation_finish}
- * has been called on it.</p>
- *
- * <p>It is the application's responsibility to make sure that only
- * one thread modifies a compilation at a given time. It is however
- * safe for more than one thread to use the compilation once
- * {@link ANeuralNetworksCompilation_finish} has returned.</p>
- *
- * <p>It is also the application's responsibility to ensure that there are no other
- * uses of the compilation after calling {@link ANeuralNetworksCompilation_free}.
- * This includes any execution object created using the compilation.</p>
- */
-typedef struct ANeuralNetworksCompilation ANeuralNetworksCompilation;
-
-/**
- * ANeuralNetworksExecution is an opaque type that can be used to apply a machine
- * learning model to a set of inputs.
- *
- * <p>To use:<ul>
- *    <li>Create a new execution instance by calling the
- *        {@link ANeuralNetworksExecution_create} function.</li>
- *    <li>Associate input buffers or memory regions to the model inputs with
- *        {@link ANeuralNetworksExecution_setInput} or
- *        {@link ANeuralNetworksExecution_setInputFromMemory}.</li>
- *    <li>Associate output buffers or memory regions to the model outputs with
- *        {@link ANeuralNetworksExecution_setOutput} or
- *        {@link ANeuralNetworksExecution_setOutputFromMemory}.</li>
- *    <li>Apply the model with {@link ANeuralNetworksExecution_startCompute}.</li>
- *    <li>Wait for the execution to complete with {@link
- *        ANeuralNetworksEvent_wait}.</li>
- *    <li>Destroy the execution with
- *        {@link ANeuralNetworksExecution_free}.</li></ul></p>
- *
- * <p>An output buffer or memory region must not overlap with any
- * other output buffer or memory region, with an input buffer or
- * memory region, or with an operand value in a memory object
- * ({@link ANeuralNetworksModel_setOperandValueFromMemory}).</p>
- *
- * <p>An execution cannot be modified once {@link ANeuralNetworksExecution_startCompute}
- * has been called on it.</p>
- *
- * <p>An execution can be applied to a model with
- * {@link ANeuralNetworksExecution_startCompute} only once. Create new executions
- * to do new evaluations of the model.</p>
- *
- * <p>It is the application's responsibility to make sure that only one thread
- * modifies an execution at a given time. It is however safe for more than one
- * thread to use {@link ANeuralNetworksEvent_wait} at the same time.</p>
- *
- * <p>It is also the application's responsibility to ensure that there are no other
- * uses of the execution after calling {@link ANeuralNetworksExecution_free}.</p>
- */
-typedef struct ANeuralNetworksExecution ANeuralNetworksExecution;
-
-/**
- * ANeuralNetworksOperandType describes the type of an operand.
- * This structure is used to describe both scalars and tensors.
- *
- * A tensor operand type must have a specified rank (number of
- * dimensions) but may have any of its dimensions unspecified.
- *
- * A tensor operand type with all dimensions specified is "fully
- * specified".  Whenever possible (i.e., whenever the dimensions are
- * known at model construction time), a tensor operand type should be
- * (but is not required to be) fully specified, in order to enable the
- * best possible performance.
- *
- * If a tensor operand's type is not fully specified, the dimensions
- * of the operand are deduced from the operand types and values of the
- * operation for which that operand is an output.
- *
- * <p>In the following situations, a tensor operand type must be fully
- * specified:<ul>
- *     <li>The operand has a constant value, set by
- *         {@link ANeuralNetworksModel_setOperandValue} (with a
- *         non-nullptr buffer) or
- *         {@link ANeuralNetworksModel_setOperandValueFromMemory}.</li>
- *     <li>The operand is a model input or model output (see
- *         {@link ANeuralNetworksModel_identifyInputsAndOutputs}).  A
- *         fully specified tensor operand type must either be provided
- *         to {@link ANeuralNetworksModel_addOperand}; or it must be
- *         provided to the corresponding
- *         {@link ANeuralNetworksExecution_setInput},
- *         {@link ANeuralNetworksExecution_setInputFromMemory},
- *         {@link ANeuralNetworksExecution_setOutput}, or
- *         {@link ANeuralNetworksModel_setOperandValueFromMemory}.
- *         EXCEPTION: If the input or output is optional and omitted
- *         (by passing nullptr for buffer to
- *         {@link ANeuralNetworksExecution_setInput} or
- *         {@link ANeuralNetworksExecution_setOutput}) then it need
- *         not have a fully specified tensor operand type.</li></ul>
- *
- * A tensor operand type with some number of unspecified dimensions is
- * represented by setting each unspecified dimension to 0.
- */
-typedef struct ANeuralNetworksOperandType {
-    /** The data type, e.g ANEURALNETWORKS_INT8. */
-    int32_t type;
-    /** The number of dimensions (rank). It should be 0 for scalars. */
-    uint32_t dimensionCount;
-    /** The dimensions of the tensor. It should be nullptr for scalars. */
-    const uint32_t* dimensions;
-    /** These two fields are only used for quantized tensors.
-     * They should be zero for scalars and non-fixed point tensors.
-     * The dequantized value of each entry is (value - zeroPoint) * scale.
-     */
-    float scale;
-    int32_t zeroPoint;
-} ANeuralNetworksOperandType;
-
-typedef int32_t ANeuralNetworksOperationType;
-
-/**
- * ANeuralNetworksEvent is an opaque type that represents an event
- * that will be signaled once an execution completes.
- */
-typedef struct ANeuralNetworksEvent ANeuralNetworksEvent;
-
-
-/**
- * Creates a shared memory object from a file descriptor.
- *
- * The shared memory is backed by a file descriptor via mmap.
- * See {@link ANeuralNetworksMemory} for a description on how to use
- * this shared memory.
- *
- * @param size The requested size in bytes.
- *             Must not be larger than the file size.
- * @param prot The desired memory protection for the mapping.
- *             It is either PROT_NONE or the bitwise OR of one or
- *             more of the following flags: PROT_READ, PROT_WRITE.
- * @param fd The requested file descriptor.
- *           The file descriptor has to be mmap-able. The file
- *           descriptor will be duplicated.
- * @param offset The offset to the beginning of the file of the area to map.
- *               The offset has to be aligned to a page size.
- * @param memory The memory object to be created.
- *               Set to NULL if unsuccessful.
- *
- * @return ANEURALNETWORKS_NO_ERROR if the request completed normally.
- */
-int ANeuralNetworksMemory_createFromFd(size_t size, int protect, int fd, size_t offset,
-                                       ANeuralNetworksMemory** memory);
-
-/**
- * Delete a memory object.
- *
- * Destroys the object used by the run time to keep track of the memory.
- * This will free the underlying actual memory if no other code has open
- * handles to this memory.
- *
- * @param memory The memory object to be freed.
- */
-void ANeuralNetworksMemory_free(ANeuralNetworksMemory* memory);
-
-/**
- * Create an empty {@link ANeuralNetworksModel}.
- *
- * <p>This only creates the object. Computation is performed once
- * {@link ANeuralNetworksExecution_startCompute} is invoked.
- *
- * The model should be constructed with calls to
- * {@link ANeuralNetworksModel_addOperation} and
- * {@link ANeuralNetworksModel_addOperand}
- *
- * <p>{@link ANeuralNetworksModel_finish} should be called once the model
- * has been fully constructed.</p>
- *
- * <p>{@link ANeuralNetworksModel_free} should be called once the model
- * is no longer needed.</p>
- *
- * @param model The {@link ANeuralNetworksModel} to be created.
- *              Set to NULL if unsuccessful.
- *
- * @return ANEURALNETWORKS_NO_ERROR if successful.
- */
-int ANeuralNetworksModel_create(ANeuralNetworksModel** model);
-
-/**
- * Destroy a model.
- *
- * The model need not have been finished by a call to
- * {@link ANeuralNetworksModel_finish}.
- *
- * See {@link ANeuralNetworksModel} for information on multithreaded usage.
- *
- * @param model The model to be destroyed. Passing NULL is acceptable and
- *              results in no operation.
- */
-void ANeuralNetworksModel_free(ANeuralNetworksModel* model);
-
-/**
- * Indicate that we have finished modifying a model. Required before
- * calling {@link ANeuralNetworksCompilation_create}.
- *
- * An application is responsible to make sure that no other thread uses
- * the model at the same time.
- *
- * This function must only be called once for a given model.
- *
- * See {@link ANeuralNetworksModel} for information on multithreaded usage.
- *
- * @param model The model to be finished.
- *
- * @return ANEURALNETWORKS_NO_ERROR if successful.
- */
-int ANeuralNetworksModel_finish(ANeuralNetworksModel* model);
-
-/**
- * Add an operand to a model.
- *
- * The order in which the operands are added is important. The first one added
- * to a model will have the index value 0, the second 1, etc. These indexes are
- * used as operand identifiers in
- * {@link ANeuralNetworksModel_addOperation},
- * {@link ANeuralNetworksModel_identifyInputsAndOutputs},
- * {@link ANeuralNetworksModel_setOperandValue},
- * {@link ANeuralNetworksModel_setOperandValueFromMemory},
- * {@link ANeuralNetworksExecution_setInput},
- * {@link ANeuralNetworksExecution_setInputFromMemory},
- * {@link ANeuralNetworksExecution_setOutput},
- * {@link ANeuralNetworksExecution_setOutputFromMemory} and
- * {@link ANeuralNetworksExecution_setOperandValue}.
- *
- * <p>Every operand must be referenced in exactly one of the following
- * ways:<ul>
- *    <li>It is identified as a model input with
- *        {@link ANeuralNetworksModel_identifyInputsAndOutputs}.</li>
- *    <li>It is identified as a constant with
- *        {@link ANeuralNetworksModel_setOperandValue} or
- *        {@link ANeuralNetworksModel_setOperandValueFromMemory}.</li>
- *    <li>It is identified as an output of exactly one operation with
- *        {@link ANeuralNetworksModel_addOperation}.</li></p>
- * <p>An operand that is identified as a model input or as a constant
- * must not also be identified as a model output with
- * {@link ANeuralNetworksModel_identifyInputsAndOutputs}.</p>
- *
- * To build a model that can accommodate inputs of various sizes, as
- * you may want to do for a CNN, leave unspecified the dimensions that
- * will vary at run time.  If you do so, fully specify dimensions
- * when calling {@link ANeuralNetworksExecution_setInput} or
- * {@link ANeuralNetworksExecution_setInputFromMemory}.
- *
- * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been
- * called will return an error.
- *
- * See {@link ANeuralNetworksModel} for information on multithreaded usage.
- *
- * @param model The model to be modified.
- * @param type The {@link ANeuralNetworksOperandType} that describes the shape
- *             of the operand.  Neither the {@link ANeuralNetworksOperandType}
- *             nor the dimensions it points to need to outlive the call to
- *             {@link ANeuralNetworksModel_addOperand}.
- *
- * @return ANEURALNETWORKS_NO_ERROR if successful.
- */
-int ANeuralNetworksModel_addOperand(ANeuralNetworksModel* model,
-                                    const ANeuralNetworksOperandType* type);
-
-/**
- * Sets an operand to a constant value.
- *
- * Values of length smaller or equal to
- * {@link ANEURALNETWORKS_MAX_SIZE_OF_IMMEDIATELY_COPIED_VALUES}
- * are immediately copied into the model.
- *
- * For values of length greater than {@link ANEURALNETWORKS_MAX_SIZE_OF_IMMEDIATELY_COPIED_VALUES},
- * a pointer to the buffer is stored within the model. The application is responsible
- * for not changing the content of this region until all executions using this model
- * have completed. As the data may be copied during processing, modifying the data
- * after this call yields undefined results.
- *
- * For large tensors, using {@link ANeuralNetworksModel_setOperandValueFromMemory}
- * is likely to be more efficient.
- *
- * To indicate that an optional operand should be considered missing,
- * pass nullptr for buffer and 0 for length.
- *
- * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been
- * called will return an error.
- *
- * See {@link ANeuralNetworksModel} for information on multithreaded usage.
- *
- * @param model The model to be modified.
- * @param index The index of the model operand we're setting.
- * @param buffer A pointer to the data to use.
- * @param length The size in bytes of the data value.
- *
- * @return ANEURALNETWORKS_NO_ERROR if successful.
- */
-int ANeuralNetworksModel_setOperandValue(ANeuralNetworksModel* model, int32_t index,
-                                         const void* buffer, size_t length);
-
-/**
- * Sets an operand to a value stored in a memory object.
- *
- * The content of the memory is not copied. A reference to that memory is stored
- * inside the model. The application is responsible for not changing the content
- * of the memory region until all executions using this model have completed.
- * As the data may be copied during processing, modifying the data after this call
- * yields undefined results.
- *
- * To indicate that an optional operand should be considered missing,
- * use {@link ANeuralNetworksModel_setOperandValue} instead, passing nullptr for buffer.
- *
- * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been
- * called will return an error.
- *
- * See {@link ANeuralNetworksModel} for information on multithreaded usage.
- *
- * @param model The model to be modified.
- * @param index The index of the model operand we're setting.
- * @param buffer A pointer to the data to use.
- * @param memory The memory containing the data.
- * @param offset This specifies the location of the data within the memory.
- *               The offset is in bytes from the start of memory.
- * @param length The size in bytes of the data value.
- *
- * @return ANEURALNETWORKS_NO_ERROR if successful.
- */
-int ANeuralNetworksModel_setOperandValueFromMemory(ANeuralNetworksModel* model, int32_t index,
-                                                   const ANeuralNetworksMemory* memory,
-                                                   size_t offset, size_t length);
-
-/**
- * Add an operation to a model.
- *
- * @param model The model to be modified.
- * @param type The {@link ANeuralNetworksOperationType} of the operation.
- * @param inputCount The number of entries in the inputs array.
- * @param inputs An array of indexes identifying each operand.
- * @param outputCount The number of entries in the outputs array.
- * @param outputs An array of indexes identifying each operand.
- *
- * The operands specified by inputs and outputs must have been
- * previously added by calls to {@link ANeuralNetworksModel_addOperand}.
- *
- * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been
- * called will return an error.
- *
- * See {@link ANeuralNetworksModel} for information on multithreaded usage.
- *
- * @return ANEURALNETWORKS_NO_ERROR if successful.
- */
-int ANeuralNetworksModel_addOperation(ANeuralNetworksModel* model,
-                                      ANeuralNetworksOperationType type, uint32_t inputCount,
-                                      const uint32_t* inputs, uint32_t outputCount,
-                                      const uint32_t* outputs);
-
-/**
- * Specifies which operands will be the model's inputs and
- * outputs. Every model must have at least one input and one output.
- *
- * An operand cannot be used for both input and output. Doing so will
- * return an error.
- *
- * @param model The model to be modified.
- * @param inputCount The number of entries in the inputs array.
- * @param inputs An array of indexes identifying the input operands.
- * @param outputCount The number of entries in the outputs array.
- * @param outputs An array of indexes identifying the output operands.
- *
- * The operands specified by inputs and outputs must have been
- * previously added by calls to {@link ANeuralNetworksModel_addOperand}.
- *
- * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been
- * called will return an error.
- *
- * See {@link ANeuralNetworksModel} for information on multithreaded usage.
- *
- */
-int ANeuralNetworksModel_identifyInputsAndOutputs(ANeuralNetworksModel* model, uint32_t inputCount,
-                                                  const uint32_t* inputs, uint32_t outputCount,
-                                                  const uint32_t* outputs);
-
-/**
- * Specifies whether {@link ANEURALNETWORKS_TENSOR_FLOAT32} is allowed to be
- * calculated with range and/or precision as low as that of the IEEE 754 16-bit
- * floating-point format. By default, {@link ANEURALNETWORKS_TENSOR_FLOAT32}
- * must be calculated using at least the range and precision of the IEEE 754
- * 32-bit floating-point format.
- *
- * @param model The model to be modified.
- * @param allow 'true' indicates {@link ANEURALNETWORKS_TENSOR_FLOAT32} may be
- *              calculated with range and/or precision as low as that of the
- *              IEEE 754 16-bit floating point format. 'false' indicates
- *              {@link ANEURALNETWORKS_TENSOR_FLOAT32} must be calculated using
- *              at least the range and precision of the IEEE 754 32-bit floating
- *              point format.
- *
- * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been
- * called will return an error.
- *
- * See {@link ANeuralNetworksModel} for information on multithreaded usage.
- */
-int ANeuralNetworksModel_relaxComputationFloat32toFloat16(ANeuralNetworksModel* model, bool allow);
-
-/**
- * Create a {@link ANeuralNetworksCompilation} to compile the given model.
- *
- * <p>This only creates the object. Compilation is only performed once
- * {@link ANeuralNetworksCompilation_finish} is invoked.</p>
- *
- * <p>{@link ANeuralNetworksCompilation_finish} should be called once
- * all desired properties have been set on the compilation.</p>
- *
- * <p>{@link ANeuralNetworksModel_free} should be called once the compilation
- * is no longer needed.</p>
- *
- * <p>The provided model must outlive the compilation.</p>
- *
- * The model must already have been finished by a call to
- * {@link ANeuralNetworksModel_finish}.
- *
- * See {@link ANeuralNetworksCompilation} for information on multithreaded usage.
- *
- * @param model The {@link ANeuralNetworksModel} to be compiled.
- * @param compilation The newly created object or NULL if unsuccessful.
- *
- * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA
- *         if the model is invalid.
- */
-int ANeuralNetworksCompilation_create(ANeuralNetworksModel* model,
-                                      ANeuralNetworksCompilation** compilation);
-
-/**
- * Destroy a compilation.
- *
- * The compilation need not have been finished by a call to
- * {@link ANeuralNetworksModel_finish}.
- *
- * See {@link ANeuralNetworksCompilation} for information on multithreaded usage.
- *
- * @param compilation The compilation to be destroyed. Passing NULL is acceptable and
- *                    results in no operation.
- */
-void ANeuralNetworksCompilation_free(ANeuralNetworksCompilation* compilation);
-
-/**
- * Sets the execution preference.
- *
- * <p>Provides guidance to the runtime when trade-offs are possible.</p>
- *
- * See {@link ANeuralNetworksCompilation} for information on multithreaded usage.
- *
- * @param compilation The compilation to be modified.
- * @param preference Either {@link PREFER_LOW_POWER},
- *                  {@link PREFER_SINGLE_FAST_ANSWER}, or
- *                  {@link PREFER_SUSTAINED_SPEED}.
- *
- * @return ANEURALNETWORKS_NO_ERROR if successful.
- */
-int ANeuralNetworksCompilation_setPreference(ANeuralNetworksCompilation* compilation,
-                                             int32_t preference);
-
-/**
- * Indicate that we have finished modifying a compilation. Required before
- * calling {@link ANeuralNetworksExecution_create}.
- *
- * An application is responsible to make sure that no other thread uses
- * the compilation at the same time.
- *
- * This function must only be called once for a given compilation.
- *
- * See {@link ANeuralNetworksCompilation} for information on multithreaded usage.
- *
- * @param compilation The compilation to be finished.
- *
- * @return ANEURALNETWORKS_NO_ERROR if successful.
- */
-int ANeuralNetworksCompilation_finish(ANeuralNetworksCompilation* compilation);
-
-/**
- * Create a {@link ANeuralNetworksExecution} to apply the given compilation.
- * This only creates the object. Computation is only performed once
- * {@link ANeuralNetworksExecution_startCompute} is invoked.
- *
- * <p>The provided compilation must outlive the execution.</p>
- *
- * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
- *
- * @param compilation The {@link ANeuralNetworksCompilation} to be evaluated.
- * @param execution The newly created object or NULL if unsuccessful.
- *
- * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA
- *         if the compilation is invalid.
- */
-int ANeuralNetworksExecution_create(ANeuralNetworksCompilation* compilation,
-                                    ANeuralNetworksExecution** execution);
-
-/**
- * Destroy an execution.
- *
- * <p>If called on an execution for which
- * {@link ANeuralNetworksExecution_startCompute} has been called, the
- * function will return immediately but will mark the execution to be deleted
- * once the computation completes. The related {@link ANeuralNetworksEvent}
- * will be signaled and the {@link ANeuralNetworksEvent_wait} will return
- * ANEURALNETWORKS_ERROR_DELETED.
- *
- * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
- *
- * @param execution The execution to be destroyed. Passing NULL is acceptable and
- *                  results in no operation.
- */
-void ANeuralNetworksExecution_free(ANeuralNetworksExecution* execution);
-
-/**
- * Associate a user buffer with an input of the model of the
- * {@link ANeuralNetworksExecution}.
- *
- * <p>The provided buffer must outlive the execution.</p>
- *
- * If the input is optional, you can indicate that it is omitted by
- * passing nullptr for buffer and 0 for length.
- *
- * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
- *
- * @param execution The execution to be modified.
- * @param index The index of the input argument we are setting. It is
- *              an index into the lists passed to
- *              {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not
- *              the index associated with
- *              {@link ANeuralNetworksModel_addOperand}.
- * @param type The {@link ANeuralNetworksOperandType} of the
- *             operand. Unless the input is omitted, this should be
- *             used to specify the dimensions that were left
- *             unspecified when the operand was added to the
- *             model. All other properties of the type must be the
- *             same as specified in the model. If the type is the same
- *             as specified when the model was built, NULL can be
- *             passed. Neither the {@link ANeuralNetworksOperandType}
- *             nor the dimensions it points to need to outlive the call
- *             to {@link ANeuralNetworksExecution_setInput}.
- * @param buffer The buffer containing the data.
- * @param length The length in bytes of the buffer.
- *
- * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA if the
- *         name is not recognized or the buffer is too small for the input.
- */
-int ANeuralNetworksExecution_setInput(ANeuralNetworksExecution* execution, int32_t index,
-                                      const ANeuralNetworksOperandType* type, const void* buffer,
-                                      size_t length);
-
-/**
- * Associate part of a memory object with an input of the model of the
- * {@link ANeuralNetworksExecution}.
- *
- * <p>The provided memory must outlive the execution.</p>
- *
- * If the input is optional, you can indicate that it is omitted by
- * using {@link ANeuralNetworks_setInput} instead, passing nullptr for buffer
- * and 0 for length.
- *
- * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
- *
- * @param execution The execution to be modified.
- * @param index The index of the input argument we are setting. It is
- *              an index into the lists passed to
- *              {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not
- *              the index associated with {@link ANeuralNetworksModel_addOperand}.
- * @param type The {@link ANeuralNetworksOperandType} of the
- *             operand. This should be used to specify the dimensions
- *             that were left unspecified when the operand was added
- *             to the model. All other properties of the type must be
- *             the same as specified in the model. If the type is the
- *             same as specified when the model was built, NULL can be
- *             passed. Neither the {@link ANeuralNetworksOperandType}
- *             nor the dimensions it points to need to outlive the call
- *             to {@link ANeuralNetworksExecution_setInputFromMemory}.
- * @param memory The memory containing the data.
- * @param offset This specifies the location of the data within the memory.
- *               The offset is in bytes from the start of memory.
- * @param length The size in bytes of the data value.
- *
- * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA if the
- *         name is not recognized or the buffer is too small for the input.
- */
-int ANeuralNetworksExecution_setInputFromMemory(ANeuralNetworksExecution* execution, int32_t index,
-                                                const ANeuralNetworksOperandType* type,
-                                                const ANeuralNetworksMemory* memory, size_t offset,
-                                                size_t length);
-
-/**
- * Associate a user buffer with an output of the model of the
- * {@link ANeuralNetworksExecution}.
- *
- * If the output is optional, you can indicate that it is omitted by
- * passing nullptr for buffer and 0 for length.
- *
- * <p>The provided buffer must outlive the execution.</p>
- *
- * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
- *
- * @param execution The execution to be modified.
- * @param index The index of the output argument we are setting. It is
- *              an index into the lists passed to
- *              {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not
- *              the index associated with {@link ANeuralNetworksModel_addOperand}.
- * @param type The {@link ANeuralNetworksOperandType} of the
- *             operand. Unless the output is omitted, this should be
- *             used to specify the dimensions that were left
- *             unspecified when the operand was added to the
- *             model. All other properties of the type must be the
- *             same as specified in the model. If the type is the same
- *             as specified when the model was built, NULL can be
- *             passed. Neither the {@link ANeuralNetworksOperandType}
- *             nor the dimensions it points to need to outlive the call
- *             to {@link ANeuralNetworksExecution_setOutput}.
- * @param buffer The buffer where the data is to be written.
- * @param length The length in bytes of the buffer.
- *
- * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA if the
- *         name is not recognized or the buffer is too small for the output.
- */
-int ANeuralNetworksExecution_setOutput(ANeuralNetworksExecution* execution, int32_t index,
-                                       const ANeuralNetworksOperandType* type, void* buffer,
-                                       size_t length);
-
-/**
- * Associate part of a memory object with an output of the model of the
- * {@link ANeuralNetworksExecution}.
- *
- * If the output is optional, you can indicate that it is omitted by
- * using {@link ANeuralNetworks_setOutput} instead, passing nullptr for buffer
- * and 0 for length.
- *
- * <p>The provided memory must outlive the execution.</p>
- *
- * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
- *
- * @param execution The execution to be modified.
- * @param index The index of the output argument we are setting. It is
- *              an index into the lists passed to
- *              {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not
- *              the index associated with {@link ANeuralNetworksModel_addOperand}.
- * @param type The {@link ANeuralNetworksOperandType} of the operand. This should be
- *             used to specify the dimensions that were left
- *             unspecified when the operand was added to the
- *             model. All other properties of the type must be the
- *             same as specified in the model. If the type is the same
- *             as specified when the model was built, NULL can be
- *             passed. Neither the {@link ANeuralNetworksOperandType}
- *             nor the dimensions it points to need to outlive the call
- *             to {@link ANeuralNetworksExecution_setOutputFromMemory}.
- * @param memory The memory where the data is to be stored.
- * @param offset This specifies the location of the data within the memory.
- *               The offset is in bytes from the start of memory.
- * @param length The length in bytes of the data value.
- *
- * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA if the
- *         name is not recognized or the buffer is too small for the output.
- */
-int ANeuralNetworksExecution_setOutputFromMemory(ANeuralNetworksExecution* execution, int32_t index,
-                                                 const ANeuralNetworksOperandType* type,
-                                                 const ANeuralNetworksMemory* memory, size_t offset,
-                                                 size_t length);
-
-/**
- * Schedule evaluation of the execution.
- *
- * <p>Schedules evaluation of the execution. Once the model has been
- * applied and the outputs are ready to be consumed, the returned event will be
- * signaled. Use {@link ANeuralNetworksEvent_wait} to wait for that event.
- * </p>
- *
- * Multiple executions can be scheduled and evaluated concurrently. The
- * runtime makes no guarantee on the ordering of completion of
- * executions. If it's important to the application, the application
- * should enforce the ordering by using
- * {@link ANeuralNetworksEvent_wait}.
- *
- * ANeuralNetworksEvent_wait must be called to recuperate the resources used
- * by the execution.
- *
- * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
- *
- * @param execution The execution to be scheduled and executed.
- * @param event The event that will be signaled on completion. event is set to
- *              NULL if there's an error.
- *
- * @return ANEURALNETWORKS_NO_ERROR if successful.
- */
-int ANeuralNetworksExecution_startCompute(ANeuralNetworksExecution* execution,
-                                          ANeuralNetworksEvent** event);
-
-/**
- * Waits until the execution completes.
- *
- * More than one thread can wait on an event. When the execution completes,
- * all threads will be released.
- *
- * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
- *
- * @return ANEURALNETWORKS_NO_ERROR if the execution completed normally.
- */
-int ANeuralNetworksEvent_wait(ANeuralNetworksEvent* event);
-
-/**
- * Destroys the event.
- *
- * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
- */
-void ANeuralNetworksEvent_free(ANeuralNetworksEvent* event);
-
-__END_DECLS
-
-#endif  // ANDROID_ML_NN_RUNTIME_NEURAL_NETWORKS_H
-
-/** @} */
diff --git a/include/NeuralNetworksEx.h b/include/NeuralNetworksEx.h
deleted file mode 100644
index 727ca9484..000000000
--- a/include/NeuralNetworksEx.h
+++ /dev/null
@@ -1,670 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file     NeuralNetworksEx.h
- * @brief    This file contains ANeuralNetworksModel_addOperationEx function definition
- * @ingroup  COM_AI_RUNTIME
- */
-#ifndef NN_RUNTIME_NEURAL_NETWORKS_EX_H
-#define NN_RUNTIME_NEURAL_NETWORKS_EX_H
-
-#include <sys/cdefs.h>
-
-__BEGIN_DECLS
-
-/**
- * @brief Extended operation types
- */
-typedef enum {
-  /** extends operation. */
-
-  /**
-   * Casts a tensor/tensor-values to a new type
-   *
-   * The output value is calucated as:
-   *
-   *     output =  new_type(input)
-   *
-   * Ex:
-   * X = {1.8,2.2}, dtype of X = float32
-   * Y = Cast(X), dtype of Y = int32
-   * then Y = {1,2}
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   * * {@link ANEURALNETWORKS_TENSOR_INT32}
-   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-   *
-   * Supported tensor rank: up to 4
-   *
-   * Inputs:
-   * * 0: An n-D tensor, specifying the first input.
-   *
-   * Outputs:
-   * * 0: The output tensor, of the same {@link OperandCode} and shape as input0.
-   */
-  ANEURALNETWORKS_CAST_EX = 50000,
-
-  /**
-   * Gathers values along an axis.
-   *
-   * Produces an output tensor with shape
-   *     input0.dimension[:axis] + indices.dimension + input0.dimension[axis + 1:]
-   * where:
-   *     # Vector indices (output is rank(input0)).
-   *     output[a_0, ..., a_n, i, b_0, ..., b_n] =
-   *       input0[a_0, ..., a_n, indices[i], b_0, ..., b_n]
-   *
-   *     # Higher rank indices (output is rank(input0) + rank(indices) - 1).
-   *     output[a_0, ..., a_n, i, ..., j, b_0, ... b_n] =
-   *       input0[a_0, ..., a_n, indices[i, ..., j], b_0, ..., b_n]
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   * * {@link ANEURALNETWORKS_TENSOR_INT32}
-   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-   *
-   * Supported tensor rank: from 1
-   *
-   * Inputs:
-   * * 0: An n-D tensor from which to gather values.
-   * * 1: A k-D tensor {@link ANEURALNETWORKS_TENSOR_INT32} of indices.
-   *      The values must be in the bounds of the corresponding dimensions
-   *      of input0.
-   * * 2: An {@link ANEURALNETWORKS_INT32} scalar specifying the axis.
-   *      Negative index is used to specify axis from the end
-   *      (e.g. -1 for the last axis). Must be in the range [-n, n).
-   *
-   * Outputs:
-   * * 0: An (n + k - 1)-D tensor with the same {@link OperandCode} as input0.
-   */
-  ANEURALNETWORKS_GATHER_EX = 50001, /**< Gather slices according to indexes and axis */
-
-  /**
-   * Finds values and indices of the k largest entries for the last dimension.
-   *
-   * Resulting values in each dimensions are sorted in descending order. If
-   * two values are equal, the one with larger index appears first.
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   * * {@link ANEURALNETWORKS_TENSOR_INT32}
-   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-   *
-   * Supported tensor rank: from 1
-   *
-   * Inputs:
-   * * 0: input, an n-D tensor specifying the input.
-   * * 1: k, an {@link ANEURALNETWORKS_INT32} scalar, specifying the number of
-   *      top elements to look for along the last dimension.
-   *
-   * Outputs:
-   * * 0: An n-D tensor of the same type as the input, containing the k
-   *      largest elements along each last dimensional slice.
-   * * 1: An n-D tensor of type {@link ANEURALNETWORKS_TENSOR_INT32}
-   *      containing the indices of values within the last dimension of input.
-   */
-  ANEURALNETWORKS_TOPK_V2_EX = 50002,
-
-  /**
-   * Computes the maximum of elements across dimensions of a tensor.
-   *
-   * Reduces the input tensor along the given dimensions to reduce.
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   * * {@link ANEURALNETWORKS_TENSOR_INT32}
-   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-   *
-   * Supported tensor rank: up to 4
-   *
-   * Inputs:
-   * * 0: A tensor, specifying the input.
-   * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The dimensions
-   *      to reduce.
-   *
-   * Outputs:
-   * * 0: A tensor of the same {@link OperandCode} as input0.
-   */
-  ANEURALNETWORKS_TENSORFLOW_MAX_EX = 50003,
-
-  /**
-   * Splits a tensor along a given axis into num_splits subtensors.
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   * * {@link ANEURALNETWORKS_TENSOR_INT32}
-   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-   *
-   * Supported tensor rank: from 1
-   *
-   * Inputs:
-   * * 0: An n-D tensor to split.
-   * * 1: An {@link ANEURALNETWORKS_INT32} scalar specifying the axis along
-   *      which to split.
-   * * 2: An {@link ANEURALNETWORKS_INT32} scalar indicating the number of
-   *      splits along given axis. Must evenly divide axis size.
-   *
-   * Outputs:
-   * * 0 ~ (num_splits - 1): Resulting subtensors.
-   */
-  ANEURALNETWORKS_SPLIT_EX = 50004, /**< Splits a tensor into sub tensors */
-
-  /**
-   * Computes element-wise reciprocal of square root of the input tensor.
-   *
-   * The output is calculated using this formula:
-   *
-   *      output = 1/sqrt(input)
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   *
-   * Supported tensor rank: up to 4
-   *
-   * Inputs:
-   * * 0: An n-D tensor, specifying the first input.
-   *
-   * Outputs:
-   * * 0: The output tensor, of the same {@link OperandCode} and shape as input0.
-   */
-  ANEURALNETWORKS_RSQRT_EX = 50005,
-
-  /**
-   * Computes element-wise squared difference on the input tensors.
-   *
-   * Takes two input tensors of identical {@link OperandCode} and compatible dimensions.
-   * The output is the result of squaring of difference given by subtracting the second input tensor
-   * from the first one.
-   *
-   * Two dimensions are compatible when:
-   *     1. they are equal, or
-   *     2. one of them is 1
-   *
-   * The size of the output is the maximum size along each dimension of the
-   * input operands. It starts with the trailing dimensions, and works its way
-   * forward.
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   *
-   * Supported tensor rank: up to 4
-   *
-   * Inputs:
-   * * 0: An n-D tensor, specifying the first input.
-   * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
-   *      as input0.
-   *
-   * Outputs:
-   * * 0: The output tensor, of the same {@link OperandCode} as input0.
-   */
-  ANEURALNETWORKS_SQUARED_DIFFERENCE_EX = 50006,
-
-  /**
-   * Computes numerical negative value element-wise on the input tensor.
-   *
-   * Given an input tensor of {@link OperandCode},
-   * The output is the numerical negative value element-wise on the input tensor.
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   * * {@link ANEURALNETWORKS_TENSOR_INT32}
-   *
-   * Supported tensor rank: up to 4
-   *
-   * Inputs:
-   * * 0: An n-D tensor, specifying the input.
-   *
-   * Outputs:
-   * * 0: The output tensor, of the same {@link OperandCode} and shape as input0.
-   */
-  ANEURALNETWORKS_NEG_EX = 50007,
-
-  /**
-   * Computes exponential value element-wise on the input tensor.
-   *
-   * Given an input tensor of {@link OperandCode},
-   * The output is the exponential value element-wise on the input tensor.
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   *
-   * Supported tensor rank: up to 4
-   *
-   * Inputs:
-   * * 0: An n-D tensor, specifying the input.
-   *
-   * Outputs:
-   * * 0: The output tensor, of the same {@link OperandCode} and shape as input0.
-   */
-  ANEURALNETWORKS_EXP_EX = 50008,
-
-  /**
-   * Computes the sum of elements across dimensions of a tensor.
-   *
-   * Reduces the input tensor along the given dimensions to reduce.
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   *
-   * Supported tensor rank: up to 4
-   *
-   * Inputs:
-   * * 0: A tensor, specifying the input.
-   * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The dimensions
-   *      to reduce.
-   *
-   * Outputs:
-   * * 0: A tensor of the same {@link OperandCode} as input0.
-   */
-  ANEURALNETWORKS_REDUCE_SUM_EX = 50009,
-
-  /**
-   * A transposed convolutional layer carries out a regular convolution
-   * but reverts its spatial transformation.
-   * Transpose convolution basically performs convolution with transposed weights.
-   *
-   * Supported tensor {@link OperandCode}:
-   * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   * {@link ANEURALNETWORKS_TENSOR_INT32}
-   *
-   * Supported tensor rank: only 4
-   *
-   * Inputs:
-   *   0: An {@link ANEURALNETWORKS_INT32} 1-D four element tensor, specifying the output shape.
-   *   1: A 4-D tensor, of shape [depth_out, filter_height, filter_width, depth_in],
-   *      specifying the filter.
-   *   2: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
-   *   3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding type.
-   *   4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-   *      walking through input in the ‘width’ dimension.
-   *   5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
-   *      walking through input in the height dimension.
-   *
-   * Outputs:
-   *   0: The output 4-D tensor, of shape [batches, out_height, out_width, depth_out].
-   */
-  ANEURALNETWORKS_TRANSPOSE_CONV_EX = 50010,
-
-  /**
-   * Computes element-wise truth value by comparing the two input tensors for equality.
-   *
-   * Takes two input tensors of identical {@link OperandCode} and compatible dimensions.
-   * The output is the result of comparison of two input tensors.
-   *
-   * Two dimensions are compatible when:
-   *     1. they are equal, or
-   *     2. one of them is 1
-   *
-   * The size of the output is the maximum size along each dimension of the
-   * input operands. It starts with the trailing dimensions, and works its way
-   * forward.
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   * * {@link ANEURALNETWORKS_TENSOR_INT32}
-   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-   *
-   * Supported tensor rank: up to 4
-   *
-   * Inputs:
-   * * 0: An n-D tensor, specifying the first input.
-   * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
-   *      as input0.
-   *
-   * Outputs:
-   * * 0: A boolean tensor indicating the truth value of (x == y)
-   *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
-   *      and scale 1.0f.
-   *      A non-zero byte represents True, a hit. A zero indicates otherwise.
-   */
-  ANEURALNETWORKS_EQUAL_EX = 50011,
-
-  /**
-   * Computes element-wise absolute value of the input tensor.
-   *
-   * The output is calculated using this formula:
-   *
-   *      output = fabs(input)
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   * * {@link ANEURALNETWORKS_TENSOR_INT32}
-   *
-   * Supported tensor rank: up to 4
-   *
-   * Inputs:
-   * * 0: An n-D tensor, specifying the first input.
-   *
-   * Outputs:
-   * * 0: The output tensor, of the same {@link OperandCode} and shape as input0.
-   */
-  ANEURALNETWORKS_ABS_EX = 50012,
-  /**
-   * Packs a list of rank-R tensors into one rank- (R+1) tensor along the axis dimension.
-   *
-   * The input tensors must have identical {@link OperandCode} and the same
-   * dimensions.
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   * * {@link ANEURALNETWORKS_TENSOR_INT32}
-   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-   *
-   * Supported tensor rank: up to 3
-   *
-   * Inputs:
-   * * 0 ~ n-1: The list of n input tensors, of shape
-   *            [D0, D1, ..., Daxis(i), ..., Dm]. For inputs of
-   *            {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, all input tensors
-   *            must have the same scale and zeroPoint.
-   * * n: An {@link ANEURALNETWORKS_INT32} scalar, specifying the
-   *      number of input tensors.
-   * * n+1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the
-   *        pack axis.
-   *
-   * Outputs:
-   * * 0: The output, a tensor of the same {@link OperandCode} as the input
-   *      tensors. The output shape is [D0, D1, ..., N at Daxis(i), ..., Dm+1]
-   *      where N is the number of tensors to be packed.
-   */
-  ANEURALNETWORKS_PACK_EX = 50013,
-  /**
-   * Unpacks a given rank-R tensors into num_splits rank- (R-1) tensors along the axis dimention.
-   * num_splits has to respect integral divisibility of dimention value along axis dimention
-   * of the input.
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   * * {@link ANEURALNETWORKS_TENSOR_INT32}
-   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-   *
-   * Supported tensor rank: up to 4
-   *
-   * Inputs:
-   * * 0: The input shape is [D0, D1, ..., N at Daxis(i), ..., Dm+1].
-   * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the
-   *      number of splits along unpack axis.
-   * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the
-   *      unpack axis.
-   *
-   * Outputs:
-   * * 0 ~ n-1: The list of n output tensors, of shape
-   *            [D0, D1, ..., Daxis(i), ..., Dm]. The output tensors are of the same
-   *            {@link OperandCode} as the input tensor 0.
-   */
-  ANEURALNETWORKS_UNPACK_EX = 50014,
-
-  /**
-   * Find index with the largest value across axes of a input tensor.
-   *
-   * Reduces the input tensor along the given dimensions to reduce. The reduced
-   * dimensions are retained with length 1.
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   * * {@link ANEURALNETWORKS_TENSOR_INT32}
-   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-   *
-   * Inputs:
-   * * 0: An n-D tensor, specifying the input.
-   * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The dimensions
-   *      to reduce. Must be in the range [-rank(input_tensor), rank(input_tensor)).
-   *
-   * Outputs:
-   * * 0: A output tensor of {@link ANEURALNETWORKS_TENSOR_INT32}.
-   *      The rank of output tensor should be same rank of input0.
-   */
-  ANEURALNETWORKS_ARGMAX_EX = 50015,
-
-  /**
-   * Element-wise square root computation of the input tensor.
-   *
-   * The output is calculated using this formula:
-   *
-   *     output = sqrt(input)
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   *
-   * Supported tensor rank: up to 4
-   *
-   * Inputs:
-   * * 0: An n-D tensor, specifying the first input.
-   *
-   * Outputs:
-   * * 0: The output tensor, of the same {@link OperandCode} and shape as input0.
-   */
-  ANEURALNETWORKS_SQRT_EX = 50016,
-
-  /**
-  * Computes element-wise truth value by comparing the input tensors for non-equality.
-  *
-  * Takes two input tensors of identical {@link OperandCode} and compatible dimensions.
-  * The output is the result of comparison of two input tensors.
-  *
-  * Two dimensions are compatible when:
-  *     1. they are equal, or
-  *     2. one of them is 1
-  *
-  * The size of the output is the maximum size along each dimension of the
-  * input operands. It starts with the trailing dimensions, and works its way
-  * forward.
-  *
-  * Supported tensor {@link OperandCode}:
-  * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-  * * {@link ANEURALNETWORKS_TENSOR_INT32}
-  * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-  *
-  * Supported tensor rank: up to 4
-  *
-  * Inputs:
-  * * 0: An n-D tensor, specifying the first input.
-  * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
-  *      as input0.
-  *
-  * Outputs:
-  * * 0: A boolean tensor indicating the truth value of non-equality of input tensors
-  *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
-  *      and scale 1.0f.
-  *      A non-zero byte represents True, a hit. A zero indicates otherwise.
-  */
-  ANEURALNETWORKS_NOT_EQUAL_EX = 50017,
-
-  /**
-   * Computes element-wise truth value of the input tensor negation.
-   *
-   * Takes one input tensor.
-   * The output is the negation, which is logical complement, of the input tensor.
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-   *
-   * Supported tensor rank: up to 4
-   *
-   * Inputs:
-   * * 0: An n-D boolean tensor, specifying the input.
-   *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
-   *      and scale 1.0f.
-   *      A non-zero byte represents True. A zero indicates otherwise.
-   *
-   * Outputs:
-   * * 0: A boolean tensor of the same size as input indicating the truth value of (NOT x)
-   *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
-   *      and scale 1.0f.
-   *      A non-zero byte represents True. A zero indicates otherwise.
-   */
-  ANEURALNETWORKS_LOGICAL_NOT_EX = 50018,
-
-  /**
-   * Computes element-wise truth value of two input tensors for LOGICAL AND.
-   *
-   * Takes two input tensors of identical {@link OperandCode} and compatible dimensions.
-   * The output is the result of comparison of two input tensors.
-   *
-   * Two dimensions are compatible when:
-   *     1. they are equal, or
-   *     2. one of them is 1
-   *
-   * The size of the output is the maximum size along each dimension of the
-   * input operands. It starts with the trailing dimensions, and works its way
-   * forward.
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-   *
-   * Supported tensor rank: up to 4
-   *
-   * Inputs:
-   * * 0: An n-D boolean tensor, specifying the first input.
-   *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
-   *      and scale 1.0f.
-   *      A non-zero byte represents True, a hit. A zero indicates otherwise.
-   * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
-   *      as input0.
-   *
-   * Outputs:
-   * * 0: A boolean tensor indicating the truth value of two input tensors for LOGICAL AND.
-   *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
-   *      and scale 1.0f.
-   *      A non-zero byte represents True, a hit. A zero indicates otherwise.
-   */
-  ANEURALNETWORKS_LOGICAL_AND_EX = 50019,
-
-  /**
-   * Computes element-wise truth value of two input tensors for LOGICAL OR.
-   *
-   * Takes two input tensors of identical {@link OperandCode} and compatible dimensions.
-   * The output is the result of comparison of two input tensors.
-   *
-   * Two dimensions are compatible when:
-   *     1. they are equal, or
-   *     2. one of them is 1
-   *
-   * The size of the output is the maximum size along each dimension of the
-   * input operands. It starts with the trailing dimensions, and works its way
-   * forward.
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-   *
-   * Supported tensor rank: up to 4
-   *
-   * Inputs:
-   * * 0: An n-D boolean tensor, specifying the first input.
-   *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
-   *      and scale 1.0f.
-   *      A non-zero byte represents True, a hit. A zero indicates otherwise.
-   * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
-   *      as input0.
-   *
-   * Outputs:
-   * * 0: A boolean tensor indicating the truth value of two input tensors for LOGICAL OR.
-   *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
-   *      and scale 1.0f.
-   *      A non-zero byte represents True, a hit. A zero indicates otherwise.
-   */
-  ANEURALNETWORKS_LOGICAL_OR_EX = 50020,
-
-  /**
-   * Computes the minimum of elements across dimensions of a tensor.
-   *
-   * Reduces the input tensor along the given dimensions to reduce.
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   * * {@link ANEURALNETWORKS_TENSOR_INT32}
-   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-   *
-   * Supported tensor rank: up to 4
-   *
-   * Inputs:
-   * * 0: A tensor, specifying the input.
-   * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The dimensions
-   *      to reduce.
-   *
-   * Outputs:
-   * * 0: A tensor of the same {@link OperandCode} as input0.
-   */
-  ANEURALNETWORKS_REDUCE_MIN_EX = 500021,
-
-  /**
-   * Parametric Rectified Linear Unit.
-   *
-   * It follows: f(x) = alpha * x for x < 0, f(x) = x for x >= 0, where alpha
-   * is a learned array with the same {@link OperandCode} and compatible
-   * dimensions as input x.
-   *
-   * Two dimensions are compatible when:
-   *     1. they are equal, or
-   *     2. one of them is 1
-   *
-   * The size of the output is the maximum size along each dimension of the
-   * input operands. It starts with the trailing dimensions, and works its way
-   * forward.
-   *
-   * Example:
-   *     input.dimension  =    {4, 1, 2}
-   *     alpha.dimension  = {5, 4, 3, 1}
-   *     output.dimension = {5, 4, 3, 2}
-   *
-   * Supported tensor {@link OperandCode}:
-   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
-   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
-   *
-   * Supported tensor rank: up to 4
-   *
-   * Inputs:
-   * * 0: A tensor, specifying the input.
-   * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
-   *      as input0, specifying the alpha.
-   *
-   * Outputs:
-   * * 0: A tensor of the same {@link OperandCode} as input0.
-   */
-  ANEURALNETWORKS_PRELU_EX = 500022,
-} OperationCodeEx; // extends OperationCode
-
-typedef OperationCodeEx ANeuralNetworksOperationTypeEx;
-
-/**
- * @brief Add an extended operation to a model.
- *
- * @param[in] model The model to be modified.
- * @param[in] type The type of extended operation.
- * @param[in] inputCount The number of entries in the inputs array.
- * @param[in] inputs An array of indexes identifying each operand.
- * @param[in] outputCount The number of entries in the outputs array.
- * @param[in] outputs An array of indexes identifying each operand.
- *
- * @note The operands specified by inputs and outputs must have been
- *       previously added by calls to {@link ANeuralNetworksModel_addOperand}.\n
- *       Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been
- *       called will return an error.\n
- *       See {@link ANeuralNetworksModel} for information on multithreaded usage.
- *
- * @return ANEURALNETWORKS_NO_ERROR if successful.
- */
-int ANeuralNetworksModel_addOperationEx(ANeuralNetworksModel *model,
-                                        ANeuralNetworksOperationTypeEx type, uint32_t inputCount,
-                                        const uint32_t *inputs, uint32_t outputCount,
-                                        const uint32_t *outputs);
-
-__END_DECLS
-
-#endif // NN_RUNTIME_NEURAL_NETWORKS_EX_H
diff --git a/include/NeuralNetworksLoadHelpers.h b/include/NeuralNetworksLoadHelpers.h
deleted file mode 100644
index eeef2b5ec..000000000
--- a/include/NeuralNetworksLoadHelpers.h
+++ /dev/null
@@ -1,132 +0,0 @@
-/* Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
-   Copyright 2017 The TensorFlow Authors. All Rights Reserved.
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-==============================================================================*/
-
-// NOTE To minimize diff with upstream tensorflow, disable clang-format
-// clang-format off
-
-// NOTE This header is derived from part of the following file (in TensorFlow v1.12)
-//       'externals/tensorflow/tensorflow/contrib/lite/nnapi/NeuralNetworksShim.h'
-
-/**
- * @file NeuralNetworksLoadHelpers.h
- * @ingroup COM_AI_RUNTIME
- * @brief This file contains functions to load NN API runtime library
- */
-
-#ifndef __NEURAL_NETWORKS_LOAD_HELPER_H__
-#define __NEURAL_NETWORKS_LOAD_HELPER_H__
-
-#include <dlfcn.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <stdlib.h>
-
-/**
- * @brief Print log data
- * @param[in] format    Format string of @c printf
- * @param[in] args      Argument after format string. (Same with @c printf)
- */
-#define NNAPI_LOG(format, ...) printf(format "\n", __VA_ARGS__);
-
-/**
- * @brief Create a function pointer named @c fn after loading NN API library
- * @param[in] name    Name of a function
- */
-#define LOAD_FUNCTION(name) \
-  static name##_fn fn = reinterpret_cast<name##_fn>(nnfw::loadFunction(#name));
-
-/**
- * @brief Run @c fn function. @c fn is created by @ref LOAD_FUNCTION
- * @param[in] args    List of arguments for the function @c fn
- */
-#define EXECUTE_FUNCTION(...) \
-  if (fn != nullptr) {        \
-    fn(__VA_ARGS__);          \
-  }
-
-/**
- * @brief Run @c fn function. @c fn is created by @ref LOAD_FUNCTION
- * @param[in] args    List of arguments for the function @c fn
- * @return            the return value of @c fn
- */
-#define EXECUTE_FUNCTION_RETURN(...) return fn != nullptr ? fn(__VA_ARGS__) : 0;
-
-namespace nnfw
-{
-
-/**
- * @brief Load NN API library
- * @param[in] name path of NN API library
- * @return a symbol table handle of NN API library
- */
-inline void* loadLibrary(const char* name) {
-  // TODO: change RTLD_LOCAL? Assumes there can be multiple instances of nn
-  // api RT
-  void* handle = nullptr;
-#if 1 //#ifdef __ANDROID__
-  handle = dlopen(name, RTLD_LAZY | RTLD_LOCAL);
-  if (handle == nullptr) {
-    NNAPI_LOG("nnapi error: unable to open library %s", name);
-  }
-#endif
-  return handle;
-}
-
-/**
- * @brief Load libneuralnetworks.so and return handle of library
- * @return a symbol table handle of NN API library
- */
-inline void* getLibraryHandle() {
-  static void* handle = loadLibrary("libneuralnetworks.so");
-  return handle;
-}
-
-/**
- * @brief Return function ptr in libneuralnetworks.so
- * @param[in] name    Name of function
- * @return function pointer
- */
-inline void* loadFunction(const char* name) {
-  void* fn = nullptr;
-  if (getLibraryHandle() != nullptr) {
-    fn = dlsym(getLibraryHandle(), name);
-  }
-  if (fn == nullptr) {
-    NNAPI_LOG("nnapi error: unable to open function %s", name);
-    abort();
-  }
-  else {
-#ifdef _GNU_SOURCE
-    Dl_info info;
-    dladdr(fn, &info);
-    NNAPI_LOG("nnapi function '%s' is loaded from '%s' ", name, info.dli_fname);
-#endif // _GNU_SOURCE
-  }
-  return fn;
-}
-
-/**
- * @brief Check if libneuralnetworks.so can be loaded
- * @return @c true if loading is successful, otherwise @c false.
- */
-inline bool NNAPIExists() {
-  static bool nnapi_is_available = getLibraryHandle();
-  return nnapi_is_available;
-}
-
-} // namespace nnfw
-
-#endif // __NEURAL_NETWORKS_LOAD_HELPER_H__
diff --git a/infra/command/build-docker-image b/infra/command/build-docker-image
new file mode 100644
index 000000000..5b1dbb5e1
--- /dev/null
+++ b/infra/command/build-docker-image
@@ -0,0 +1,46 @@
+#!/bin/bash
+
+function Usage()
+{
+  echo "Usage: $0 $(basename ${BASH_SOURCE[0]}) [OPTIONS]"
+  echo ""
+  echo "Options:"
+  echo "      --tizen                   Build docker image for tizen build"
+  echo "Options can use as docker build option:"
+  docker build --help
+}
+
+DOCKER_FILE_RPATH="infra/docker/Dockerfile"
+DOCKER_BUILD_ARGS=()
+
+# Handle argument for this script
+# Set default docker image name, tag
+for i in "$@"
+do
+  case ${i} in
+    -h|--help|help)
+      Usage
+      exit 1
+      ;;
+  esac
+done
+
+DOCKER_BUILD_ARGS+="-t ${DOCKER_IMAGE_NAME:-nnas}"
+
+# Argument for docker build commands
+for i in "$@"
+do
+  case ${i} in
+    -h|--help|help)
+      # Already handled argument
+      ;;
+    *)
+      DOCKER_BUILD_ARGS+=(${i})
+      ;;
+  esac
+done
+
+docker build --build-arg http_proxy="${http_proxy}" \
+  --build-arg https_proxy="${https_proxy}" \
+  ${DOCKER_BUILD_ARGS[@]} \
+  - < ${NNAS_PROJECT_PATH}/${DOCKER_FILE_RPATH}
diff --git a/infra/command/format b/infra/command/format
new file mode 100644
index 000000000..1015c4473
--- /dev/null
+++ b/infra/command/format
@@ -0,0 +1,198 @@
+#!/bin/bash
+
+INVALID_EXIT=0
+FILES_TO_CHECK=()
+DIRECTORIES_NOT_TO_BE_TESTED=()
+
+function pushd () {
+  command pushd "$@" > /dev/null
+}
+
+function popd () {
+  command popd "$@" > /dev/null
+}
+
+function command_exists() {
+  command -v $1 > /dev/null 2>&1
+}
+
+function check_newline() {
+  # Check all files (CMakeLists.txt, *.cl, ... not only for C++, Python)
+  if [[ ${#FILES_TO_CHECK} -ne 0 ]]; then
+    CRCHECK=$(file ${FILES_TO_CHECK} | grep 'with CR')
+  fi
+  FILES_TO_FIX=($(echo "$CRCHECK" | grep "with CRLF line" | cut -d':' -f1))
+  for f in ${FILES_TO_FIX[@]}; do
+    tr -d '\r' < $f > $f.fixed && cat $f.fixed > $f && rm $f.fixed
+  done
+  FILES_TO_FIX=($(echo "${CRCHECK}" | grep "with CR line" | cut -d':' -f1))
+  for f in ${FILES_TO_FIX[@]}; do
+    tr '\r' '\n' < $f > $f.fixed && cat $f.fixed > $f && rm $f.fixed
+  done
+}
+
+function check_permission() {
+  # Check all files except script
+  FILES_TO_CHECK_PERMISSION=()
+  for f in ${FILES_TO_CHECK[@]}; do
+    # Manually ignore permission checking
+    if [[ ${f} == !(nnas|nnfw|nncc|*.sh|*.py) ]]; then
+      FILES_TO_CHECK_PERMISSION+=("${f}")
+    fi
+  done
+
+  if [[ ${#FILES_TO_CHECK_PERMISSION} -eq 0 ]]; then
+    return
+  fi
+  for FILE_TO_CHECK in ${FILES_TO_CHECK_PERMISSION[@]}; do
+    RESULT=$(stat -c '%A' ${FILE_TO_CHECK} | grep 'x')
+    if [ "${RESULT}" != "" ]; then
+      chmod a-x ${FILE_TO_CHECK}
+    fi
+  done
+}
+
+function check_cpp_files() {
+  if [[ ${__Check_CPP} -eq 0 ]]; then
+    echo "[SKIPPED] C/C++ check is skipped"
+    return
+  fi
+
+  CLANG_FORMAT_CANDIDATES=()
+  CLANG_FORMAT_CANDIDATES+=("clang-format")
+  CLANG_FORMAT_CANDIDATES+=("clang-format-3.9")
+
+  for CLANG_FORMAT_CANDIDATE in ${CLANG_FORMAT_CANDIDATES[@]}; do
+    if command_exists ${CLANG_FORMAT_CANDIDATE} ; then
+      CLANG_FORMAT="${CLANG_FORMAT_CANDIDATE}"
+    fi
+  done
+
+  if [[ -z ${CLANG_FORMAT}  ]]; then
+    echo "[ERROR] clang-format is unavailable"
+    echo
+    echo "Please install clang-format before running format check"
+    exit 1
+  fi
+
+  # Check c++ files
+  FILES_TO_CHECK_CPP=()
+  for f in ${FILES_TO_CHECK[@]}; do
+    # Manually ignore style checking
+    if [[ ${f} == +(*/NeuralNetworks.h|*/NeuralNetworksExtensions.h) ]]; then
+      continue
+    fi
+
+    # File extension to check
+    if [[ ${f} == +(*.h|*.hpp|*.cpp|*.cc|*.c|*.cl) ]]; then
+      FILES_TO_CHECK_CPP+=("${f}")
+    fi
+  done
+
+  # Skip by '.FORMATDENY' file
+  for s in ${DIRECTORIES_NOT_TO_BE_TESTED[@]}; do
+    FILES_TO_CHECK_CPP=(${FILES_TO_CHECK_CPP[*]/$s*/})
+  done
+
+  if [[ ${#FILES_TO_CHECK_CPP} -ne 0 ]]; then
+    clang-format-3.9 -i ${FILES_TO_CHECK_CPP[@]}
+    EXIT_CODE=$?
+    if [[ ${EXIT_CODE} -ne 0 ]]; then
+      INVALID_EXIT=${EXIT_CODE}
+    fi
+  fi
+}
+
+function check_python_files() {
+  if [[ ${__Check_PYTHON} -eq 0 ]]; then
+    echo "[SKIPPED] Python check is skipped"
+    return
+  fi
+
+  if ! command_exists yapf; then
+    echo "[ERROR] yapf is unavailable"
+    echo "       Please install yapf."
+    exit 1
+  fi
+
+  # Check python files
+  FILES_TO_CHECK_PYTHON=()
+  for f in ${FILES_TO_CHECK[@]}; do
+    # File extension to check
+    if [[ ${f} == *.py ]]; then
+      FILES_TO_CHECK_PYTHON+=("${f}")
+    fi
+  done
+  for s in ${DIRECTORIES_NOT_TO_BE_TESTED[@]}; do
+    skip=${s#'.'/}/
+    FILES_TO_CHECK_PYTHON=(${FILES_TO_CHECK_PYTHON[*]/$skip*/})
+  done
+
+  if [[ ${#FILES_TO_CHECK_PYTHON} -ne 0 ]]; then
+    yapf -i --style='{based_on_style: pep8, column_limit: 90}' ${FILES_TO_CHECK_PYTHON[@]}
+    EXIT_CODE=$?
+    if [[ ${EXIT_CODE} -ne 0 ]]; then
+      INVALID_EXIT=${EXIT_CODE}
+    fi
+  fi
+}
+
+pushd ${NNAS_PROJECT_PATH}
+
+if [ -n "$(git diff)" ]; then
+  echo "[WARNING] Commit all the changes before running format check"
+  echo "          format.patch file will contain unstaged files"
+fi
+
+__Check_CPP=${CHECK_CPP:-"1"}
+__Check_PYTHON=${CHECK_PYTHON:-"1"}
+
+FILES_TO_CHECK=$(git ls-files -co --exclude-standard)
+if [[ "${CHECK_DIFF_ONLY}" = "1" ]]; then
+  MASTER_EXIST=$(git rev-parse --verify master)
+  CURRENT_BRANCH=$(git branch | grep \* | cut -d ' ' -f2-)
+  DIFF_COMMITS=`git log --graph --oneline master..HEAD | wc -l`
+  if [[ -z "${MASTER_EXIST}" ]]; then
+    echo "Cannot found local master branch"
+  elif [[ "${CURRENT_BRANCH}" = "master" ]]; then
+    echo "Current branch is master"
+  else
+    FILES_TO_CHECK=$(git diff --name-only --diff-filter=d HEAD~${DIFF_COMMITS}..HEAD)
+  fi
+fi
+
+for DIR_NOT_TO_BE_TESTED in $(git ls-files -co --exclude-standard '*/.FORMATDENY'); do
+  DIRECTORIES_NOT_TO_BE_TESTED+=($(dirname "${DIR_NOT_TO_BE_TESTED}"))
+done
+
+check_newline
+check_permission
+check_cpp_files
+check_python_files
+
+DIFF=$(git diff | tee format.patch)
+
+popd
+
+if [[ -z "${CRCHECK}" ]] && [[ ! -n "${DIFF}" ]] && [[ ${INVALID_EXIT} -eq 0 ]]; then
+  echo "[PASSED] Format checker succeed."
+  return
+fi
+
+# Something went wrong
+
+if [[ ! -z "${CRCHECK}" ]]; then
+  echo "[FAILED] Please use LF for newline for following files."
+  echo "${CRCHECK}"
+fi
+
+if [[ ${PATCHFILE_SIZE} -ne 0 ]]; then
+  echo "[FAILED] Format checker failed and update code to follow convention."
+  echo "         You can find changes in format.patch"
+fi
+
+if [[ ${INVALID_EXIT} -ne 0 ]]; then
+  echo "[[FAILED] Invalid format checker exit."
+fi
+
+exit 1
diff --git a/infra/command/gen-coverage-report b/infra/command/gen-coverage-report
new file mode 100644
index 000000000..5f928eca5
--- /dev/null
+++ b/infra/command/gen-coverage-report
@@ -0,0 +1,78 @@
+#!/bin/bash
+
+import "build.configuration"
+
+BUILD_WORKSPACE_PATH="${NNAS_PROJECT_PATH}/${BUILD_WORKSPACE_RPATH}"
+
+LCOV_PATH=$(command -v lcov)
+GENHTML_PATH=$(command -v genhtml)
+
+if [[ -z "${LCOV_PATH}" ]]; then
+  echo "ERROR: 'lcov' is not found"
+  exit 255
+fi
+
+if [[ -z "${GENHTML_PATH}" ]]; then
+  echo "ERROR: 'genhtml' is not found"
+  exit 255
+fi
+
+if [[ -z "${GCOV_PATH}" ]]; then
+  GCOV_PATH=$(command -v gcov)
+  if [[ -z "${GCOV_PATH}" ]]; then
+    echo "ERROR: 'gcov' is not found"
+    exit 255
+  fi
+fi
+
+OUTPUT_TAG="${NNAS_COVERAGE:-coverage}"
+OUTPUT_PATH="${NNAS_COVERAGE_PATH:-${NNAS_PROJECT_PATH}/${OUTPUT_TAG}}"
+
+if [[ -e "${OUTPUT_PATH}" ]]; then
+  echo "ERROR: '${OUTPUT_PATH}' already exists"
+  exit 255
+fi
+
+mkdir -p "${OUTPUT_PATH}"
+
+RAW_BASE_COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.base.raw.info"
+RAW_TEST_COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.test.raw.info"
+RAW_COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.raw.info"
+EXTRACTED_COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.extracted.info"
+EXCLUDED_COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.excluded.info"
+COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.info"
+HTML_PATH="${OUTPUT_PATH}/html"
+
+CANDIDATES=()
+
+for CANDIDATE in "$@";
+do
+  CANDIDATES+=("${NNAS_PROJECT_PATH}/${CANDIDATE}/*")
+done
+
+# Capture initial zero coverage data
+"${LCOV_PATH}" -c -i -d "${BUILD_WORKSPACE_PATH}" --gcov-tool ${GCOV_PATH} -o "${RAW_BASE_COVERAGE_INFO_PATH}"
+
+# Capture tests coverage data
+"${LCOV_PATH}" -c -d "${BUILD_WORKSPACE_PATH}" --gcov-tool ${GCOV_PATH} -o "${RAW_TEST_COVERAGE_INFO_PATH}"
+
+# Append zero coverage data and tests coverage data
+"${LCOV_PATH}" -o "${RAW_COVERAGE_INFO_PATH}" \
+    -a "${RAW_BASE_COVERAGE_INFO_PATH}" \
+    -a "${RAW_TEST_COVERAGE_INFO_PATH}"
+
+# Extract data for particular pathes
+"${LCOV_PATH}" -e "${RAW_COVERAGE_INFO_PATH}" -o "${EXTRACTED_COVERAGE_INFO_PATH}" \
+  "${CANDIDATES[@]}"
+
+# Exclude *.test.cpp files from coverage report
+"${LCOV_PATH}" -r "${EXTRACTED_COVERAGE_INFO_PATH}" -o "${EXCLUDED_COVERAGE_INFO_PATH}" \
+  '*.test.cpp'
+
+# Final coverage data
+cp -v ${EXCLUDED_COVERAGE_INFO_PATH} ${COVERAGE_INFO_PATH}
+
+# Gen html
+"${GENHTML_PATH}" "${EXCLUDED_COVERAGE_INFO_PATH}" \
+  --prefix "${NNAS_PROJECT_PATH}" \
+  --output-directory "${HTML_PATH}"
diff --git a/infra/command/install-githooks b/infra/command/install-githooks
new file mode 100644
index 000000000..e624aa6d7
--- /dev/null
+++ b/infra/command/install-githooks
@@ -0,0 +1,15 @@
+#!/usr/bin/env bash
+
+REPO_HOOKS_PATH=$NNAS_PROJECT_PATH/infra/git-hooks
+GIT_HOOKS_PATH=$NNAS_PROJECT_PATH/.git/hooks
+
+# Create symbolic links to hooks dir
+if [ -e $GIT_HOOKS_PATH/pre-push ]; then
+  echo "Backup old $GIT_HOOKS_PATH/pre-push to $GIT_HOOKS_PATH/pre-push~"
+  mv -v $GIT_HOOKS_PATH/pre-push $GIT_HOOKS_PATH/pre-push~
+elif [ -h $GIT_HOOKS_PATH/pre-push ]; then
+  ls -l $GIT_HOOKS_PATH/pre-push
+  echo "Remove broken symlink $GIT_HOOKS_PATH/pre-push"
+  rm -v $GIT_HOOKS_PATH/pre-push
+fi
+ln -sv $REPO_HOOKS_PATH/pre-push.sh $GIT_HOOKS_PATH/pre-push
diff --git a/infra/command/pylint b/infra/command/pylint
new file mode 100644
index 000000000..d20f89169
--- /dev/null
+++ b/infra/command/pylint
@@ -0,0 +1,32 @@
+#!/bin/bash
+
+INVALID_EXIT=0
+
+__Check_PYLINT=${CHECK_PYLINT:-"1"}
+
+DIRECTORIES_NOT_TO_BE_TESTED=()
+
+for DIR_NOT_TO_BE_TESTED in $(find -name '.FORMATDENY' -exec dirname {} \;); do
+    DIRECTORIES_NOT_TO_BE_TESTED+=("$DIR_NOT_TO_BE_TESTED")
+done
+
+PYTHON_FILES_TO_CHECK=$(git ls-files '*.py')
+ARR=($PYTHON_FILES_TO_CHECK)
+for s in ${DIRECTORIES_NOT_TO_BE_TESTED[@]}; do
+    skip=${s#'.'/}/
+    ARR=(${ARR[*]//$skip*/})
+done
+PYTHON_FILES_TO_CHECK=${ARR[*]}
+if [[ ${#PYTHON_FILES_TO_CHECK} -ne 0 ]]; then
+    pylint --disable=all --enable="E0110, E0203, W1401, W1402, W0221, W0199, W0111, E0237, E1111, E1128, E0701, E0703, E1300, W1302, W1300, W1501, E0012, E0111, W0211, E1310, E1003, W0702, W0711, W1502, E0712, W0640, W0124, E0116, W0102, W1505, W0402, E0108, E0241, W0705, W0109, W0123, W0122, W0106, W1305, E1303, E0102, W0604, W0603, W0602, W0601, W0406, E0240, E0239, E0100, E0604, W1307, E0303, E1139, E1126, E1127, E0238, E0236, E0113, E1130, W1202, E1201, W1201, E1206, E1205, E1200, W0150, E0202, E0704, W0410, W1303, W1306, E1304, E1125, E1302, W0223, E0213, W0233, E0107, E0115, E0117, E1134, E1133, E0103, E0711, W0104, W0105, E0702, E0710, W0623, W0622, E1124, W0404, E0402, E1132, E0101, E0104, W0222, E0114, W0231, E0001, E1306, E1305, E1121, E0112, E1301, E0632, E0603, E0602, W0108, W0107, W0101, E0011, E1137, E1131, E1138, E1135, W1304, W1301, E0601, W0120, E1700" $PYTHON_FILES_TO_CHECK
+    EXIT_CODE=$?
+    if [[ $EXIT_CODE -ne 0 ]]; then
+        INVALID_EXIT=$EXIT_CODE
+    fi
+fi
+
+if [[ $INVALID_EXIT -eq 0 ]]; then
+    echo "[PASSED] Format checker succeed."
+    return
+fi
+exit 1
diff --git a/infra/config/build.configuration b/infra/config/build.configuration
new file mode 100644
index 000000000..10e41879b
--- /dev/null
+++ b/infra/config/build.configuration
@@ -0,0 +1 @@
+BUILD_WORKSPACE_RPATH=${NNAS_WORKSPACE:-build}
diff --git a/infra/docker/Dockerfile b/infra/docker/Dockerfile
new file mode 100644
index 000000000..2ca3b44c2
--- /dev/null
+++ b/infra/docker/Dockerfile
@@ -0,0 +1,65 @@
+FROM ubuntu:16.04
+
+ARG UBUNTU_MIRROR
+ENV http_proxy $http_proxy
+ENV https_proxy $https_proxy
+
+RUN if [ -n "$http_proxy" ] ; then echo "Acquire::http::proxy \"${http_proxy}\";" >> /etc/apt/apt.conf ; fi
+RUN if [ -n "$https_proxy" ] ; then echo "Acquire::https::proxy \"${https_proxy}\";" >> /etc/apt/apt.conf ; fi
+RUN if [ -n "$UBUNTU_MIRROR" ] ; then sed "s/archive.ubuntu.com/${UBUNTU_MIRROR}/g" -i /etc/apt/sources.list ; fi
+
+# Install 'add-apt-repository'
+RUN apt-get update && apt-get -qqy install software-properties-common
+
+# Build tool
+RUN apt-get update && apt-get -qqy install build-essential cmake scons git lcov
+
+# Install extra dependencies (Caffe, nnkit)
+RUN apt-get update && apt-get -qqy install libboost-all-dev libgflags-dev libgoogle-glog-dev libatlas-base-dev libhdf5-dev
+
+# Install protocol buffer
+RUN apt-get update && apt-get -qqy install libprotobuf-dev protobuf-compiler
+
+# Additonal tools
+RUN apt-get update && apt-get -qqy install doxygen graphviz wget unzip clang-format-3.9 python3 python3-pip hdf5-tools
+RUN pip3 install yapf==0.22.0 numpy
+
+# Install google test (source)
+RUN apt-get update && apt-get -qqy install libgtest-dev
+
+###
+### NOTE: Don't add new package install using apt-get or pip below this line
+###
+
+# Install native build tool gcc version 6.x
+RUN add-apt-repository ppa:ubuntu-toolchain-r/test && apt-get update && apt-get -qqy install gcc-6 g++-6
+RUN update-alternatives --install /usr/bin/gcc gcc /usr/bin/gcc-6 60 --slave /usr/bin/g++ g++ /usr/bin/g++-6 && update-alternatives --config gcc
+
+# Install cross build tool gcc version 6.x
+RUN wget https://releases.linaro.org/components/toolchain/binaries/6.3-2017.02/arm-linux-gnueabihf/gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf.tar.xz -O gcc-hardfp.tar.xz -nv
+RUN wget https://releases.linaro.org/components/toolchain/binaries/6.2-2016.11/arm-linux-gnueabi/gcc-linaro-6.2.1-2016.11-x86_64_arm-linux-gnueabi.tar.xz -O gcc-softfp.tar.xz -nv
+RUN tar -xf gcc-hardfp.tar.xz -C /opt/ && rm -rf gcc-hardfp.tar.xz
+RUN tar -xf gcc-softfp.tar.xz -C /opt/ && rm -rf gcc-softfp.tar.xz
+ENV PATH "/opt/gcc-linaro-6.2.1-2016.11-x86_64_arm-linux-gnueabi/bin:/opt/gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf/bin:$PATH"
+
+###
+### NOTE: Don't add build & install process using installed buildtool above this line
+###
+
+# Build and install google test static libraries
+WORKDIR /root/gtest
+RUN cmake /usr/src/gtest
+RUN make
+RUN mv *.a /usr/lib
+WORKDIR /root
+RUN rm -rf gtest
+
+# Install gbs & sdb
+RUN echo 'deb [trusted=yes] http://download.tizen.org/tools/latest-release/Ubuntu_16.04/ /' | cat >> /etc/apt/sources.list
+RUN apt-get update && apt-get -qqy install gbs
+RUN wget http://download.tizen.org/sdk/tizenstudio/official/binary/sdb_3.1.4_ubuntu-64.zip -O sdb.zip
+RUN unzip -d tmp sdb.zip && rm sdb.zip
+RUN cp tmp/data/tools/sdb /usr/bin/. && rm -rf tmp
+
+# Clean archives (to reduce image size)
+RUN apt-get clean -y
diff --git a/infra/git-hooks/pre-push.sh b/infra/git-hooks/pre-push.sh
new file mode 100644
index 000000000..ce751333a
--- /dev/null
+++ b/infra/git-hooks/pre-push.sh
@@ -0,0 +1,32 @@
+#!/bin/sh
+
+# An example hook script to verify what is about to be pushed.  Called by "git
+# push" after it has checked the remote status, but before anything has been
+# pushed.  If this script exits with a non-zero status nothing will be pushed.
+#
+# This hook is called with the following parameters:
+#
+# $1 -- Name of the remote to which the push is being done
+# $2 -- URL to which the push is being done
+#
+# If pushing without using a named remote those arguments will be equal.
+#
+# Information about the commits which are being pushed is supplied as lines to
+# the standard input in the form:
+#
+#   <local ref> <local sha1> <remote ref> <remote sha1>
+#
+# This sample shows how to prevent push of commits where the log message starts
+# with "WIP" (work in progress).
+
+remote="$1"
+url="$2"
+
+# RUN FORMAT CHECKER
+
+REPO_PATH=$(git rev-parse --show-toplevel)
+cd $REPO_PATH
+
+CHECK_DIFF_ONLY=1 ./nnas format
+
+exit $?
diff --git a/infra/nncc/3rdparty/.gitignore b/infra/nncc/3rdparty/.gitignore
new file mode 100644
index 000000000..c3d773e35
--- /dev/null
+++ b/infra/nncc/3rdparty/.gitignore
@@ -0,0 +1 @@
+URL.local
diff --git a/infra/nncc/3rdparty/Eigen/fd6845384b86/URL.default b/infra/nncc/3rdparty/Eigen/fd6845384b86/URL.default
new file mode 100644
index 000000000..1fff1b4f3
--- /dev/null
+++ b/infra/nncc/3rdparty/Eigen/fd6845384b86/URL.default
@@ -0,0 +1 @@
+https://bitbucket.org/eigen/eigen/get/fd6845384b86.tar.gz
diff --git a/infra/nncc/3rdparty/Eigen/fd6845384b86/URL.info b/infra/nncc/3rdparty/Eigen/fd6845384b86/URL.info
new file mode 100644
index 000000000..8e7a3c2f0
--- /dev/null
+++ b/infra/nncc/3rdparty/Eigen/fd6845384b86/URL.info
@@ -0,0 +1,3 @@
+This URL originates from TensorFlow 1.12
+
+Please check https://github.com/tensorflow/tensorflow/blob/v1.12.0/tensorflow/workspace.bzl#L121
diff --git a/infra/nncc/CMakeLists.txt b/infra/nncc/CMakeLists.txt
new file mode 100644
index 000000000..12b840636
--- /dev/null
+++ b/infra/nncc/CMakeLists.txt
@@ -0,0 +1,144 @@
+cmake_minimum_required(VERSION 3.1)
+
+project(nncc)
+
+enable_testing()
+
+set(CMAKE_CXX_STANDARD 11)
+
+# This feature works with CMake 3.5.2 or later. However, using previous versions does not produce
+# an error. We are still officially using CMake 3.1.0, but put this code for the sake of semantic
+# support in various development tools.
+# Todo: Someday, CMake needs to be updated to 3.7.2 or later to take advantage of improvements
+#       such as `cmake-server`.
+set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
+
+set(NNCC_PROJECT_SOURCE_DIR "${CMAKE_CURRENT_LIST_DIR}/../.." CACHE
+  INTERNAL "Where to find nncc top-level source directory"
+)
+
+set(NNCC_EXTERNALS_DIR
+  "${NNCC_PROJECT_SOURCE_DIR}/externals" CACHE
+  INTERNAL "Where to download external dependencies"
+)
+set(NNCC_OVERLAY_DIR "${CMAKE_BINARY_DIR}/overlay" CACHE
+    INTERNAL "Where locally built external dependencies are installed")
+
+# This allows find_package to access configurations installed inside overlay
+list(APPEND CMAKE_PREFIX_PATH "${NNCC_OVERLAY_DIR}")
+
+macro(nncc_include PREFIX)
+  include("${NNCC_PROJECT_SOURCE_DIR}/infra/nncc/cmake/modules/${PREFIX}.cmake")
+endmacro(nncc_include)
+
+macro(nncc_find_package PREFIX)
+  find_package(${PREFIX} CONFIG NO_DEFAULT_PATH
+    PATHS ${NNCC_PROJECT_SOURCE_DIR}/infra/nncc/cmake/packages
+    ${ARGN}
+  )
+endmacro(nncc_find_package)
+
+# nncc_find_resource(NAME) will update the following variables
+#
+#   NAME_FOUND
+#   NAME_DIR
+#
+# TODO Explain how to add a resource in README.md
+function(nncc_find_resource NAME)
+  set(RESOURCE_DIR "${NNCC_PROJECT_SOURCE_DIR}/res/${NAME}")
+
+  if(NOT IS_DIRECTORY ${RESOURCE_DIR})
+    set(${NAME}_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT IS_DIRECTORY ${RESOURCE_DIR})
+
+  set(${NAME}_DIR ${RESOURCE_DIR} PARENT_SCOPE)
+  set(${NAME}_FOUND TRUE PARENT_SCOPE)
+endfunction(nncc_find_resource)
+
+###
+### CMake configuration
+###
+if(NOT CMAKE_BUILD_TYPE)
+  set(CMAKE_BUILD_TYPE "Debug" CACHE STRING "Type of build" FORCE)
+endif(NOT CMAKE_BUILD_TYPE)
+message(STATUS "Use '${CMAKE_BUILD_TYPE}' configuration")
+
+# Prefer -pthread to -lpthread for find_package(Threads ...)
+#
+# std::thread code compiled only with -lpthread emits the following runtime error (on GCC 4.8.4)
+#
+#   terminate called after throwing an instance of 'std::system_error'
+#     what():  Enable multithreading to use std::thread: Operation not permitted
+#
+set(THREADS_PREFER_PTHREAD_FLAG TRUE)
+
+###
+### Configuration
+###
+option(DOWNLOAD_PROTOBUF "Download Protocol Buffer source" ON)
+option(BUILD_PROTOBUF "Locally build Protocol Buffer from the downloaded source" ON)
+option(DOWNLOAD_EIGEN "Download Eigen source" ON)
+option(DOWNLOAD_FARMHASH "Download farmhash source" ON)
+option(DOWNLOAD_GEMMLOWP "Download GEMM low precesion library source" ON)
+option(DOWNLOAD_NEON2SSE "Download NEON2SSE library source" ON)
+option(DOWNLOAD_GFLAGS "Download GFlags source" OFF)
+option(DOWNLOAD_FLATBUFFERS "Download FlatBuffers source" ON)
+option(BUILD_FLATBUFFERS "Locally build Flatbuffers from the downloaded source" ON)
+option(DOWNLOAD_TENSORFLOW "Download TensorFlow source" ON)
+option(DOWNLOAD_CAFFE "Download Caffe source" ON)
+option(DOWNLOAD_PYTORCH "Download Pytorch source" ON)
+option(DOWNLOAD_ONNX "Download ONNX source" ON)
+option(DOWNLOAD_ABSEIL "Download Abseil-cpp source" ON)
+
+option(DOWNLOAD_GTEST "Download Google Test source" ON)
+option(BUILD_GTEST "Build Google Test from the downloaded source" ON)
+
+nncc_find_package(GTest QUIET)
+
+option(ENABLE_TEST "Build Tests using Google Test" ${GTest_FOUND})
+
+if(${ENABLE_TEST} AND NOT ${GTest_FOUND})
+  message(FATAL_ERROR "Google Test is required to enable test")
+endif(${ENABLE_TEST} AND NOT ${GTest_FOUND})
+
+option(ENABLE_COVERAGE "Build for coverage test" OFF)
+if(${ENABLE_COVERAGE} AND NOT ${ENABLE_TEST})
+  message(FATAL_ERROR "Test should be enabled to measure test coverage")
+endif(${ENABLE_COVERAGE} AND NOT ${ENABLE_TEST})
+
+if(${ENABLE_TEST})
+  include(CTest)
+endif(${ENABLE_TEST})
+
+option(ENABLE_CONTRIB_BUILD "Build incubating projects under contrib/" ON)
+option(ENABLE_STRICT_BUILD "Treat warning as error" OFF)
+
+###
+### Target
+###
+add_library(nncc_common INTERFACE)
+if(ENABLE_STRICT_BUILD)
+  # TODO Remove -Wno-reoder
+  target_compile_options(nncc_common INTERFACE -Werror -Wall -Wextra -Wno-reorder)
+endif(ENABLE_STRICT_BUILD)
+
+add_library(nncc_coverage INTERFACE)
+if(ENABLE_COVERAGE)
+  target_compile_options(nncc_coverage INTERFACE -g -O0 -fprofile-arcs -ftest-coverage)
+  target_link_libraries(nncc_coverage INTERFACE gcov)
+endif(ENABLE_COVERAGE)
+
+###
+### Function
+###
+# TODO Remove this nncc_include
+nncc_include(OptionalTargetTools)
+nncc_include(add_subdirectories)
+
+###
+### Components
+###
+if(ENABLE_CONTRIB_BUILD)
+  add_subdirectory("${NNCC_PROJECT_SOURCE_DIR}/compiler" "${CMAKE_BINARY_DIR}/compiler")
+endif(ENABLE_CONTRIB_BUILD)
diff --git a/infra/nncc/cmake/modules/Asserts.cmake b/infra/nncc/cmake/modules/Asserts.cmake
new file mode 100644
index 000000000..e40097e31
--- /dev/null
+++ b/infra/nncc/cmake/modules/Asserts.cmake
@@ -0,0 +1,8 @@
+# AssertTarget(t) stops the build if target "t" does not exist.
+function(AssertTarget TGT)
+  if(TARGET ${TGT})
+    return()
+  endif(TARGET ${TGT})
+
+  message(FATAL_ERROR "${TGT} target does not exist")
+endfunction(AssertTarget TGT)
diff --git a/infra/nncc/cmake/modules/ExternalProjectTools.cmake b/infra/nncc/cmake/modules/ExternalProjectTools.cmake
new file mode 100644
index 000000000..11446c051
--- /dev/null
+++ b/infra/nncc/cmake/modules/ExternalProjectTools.cmake
@@ -0,0 +1,3 @@
+macro(add_extdirectory DIR TAG)
+  add_subdirectory(${DIR} "${CMAKE_BINARY_DIR}/externals/${TAG}")
+endmacro(add_extdirectory)
diff --git a/infra/nncc/cmake/modules/ExternalSourceTools.cmake b/infra/nncc/cmake/modules/ExternalSourceTools.cmake
new file mode 100644
index 000000000..3baaeba8e
--- /dev/null
+++ b/infra/nncc/cmake/modules/ExternalSourceTools.cmake
@@ -0,0 +1,97 @@
+#
+# ExternalSource_Download(VAR ...)
+#
+function(ExternalSource_Download PREFIX)
+  include(CMakeParseArguments)
+  nncc_include(StampTools)
+
+  cmake_parse_arguments(ARG "" "DIRNAME;URL;CHECKSUM" "" ${ARGN})
+
+  # Configure URL
+  if(ARG_URL)
+    set(URL ${ARG_URL})
+  else()
+    # Use the first unparsed argument as URL (for backward compatibility)
+    list(GET ARG_UNPARSED_ARGUMENTS 0 URL)
+  endif(ARG_URL)
+
+  # Configure DIRNAME
+  if(NOT ARG_DIRNAME)
+    # Use PREFIX as DIRNAME (for backward compatibility)
+    set(DIRNAME ${PREFIX})
+  else()
+    set(DIRNAME ${ARG_DIRNAME})
+  endif(NOT ARG_DIRNAME)
+
+  get_filename_component(FILENAME ${URL} NAME)
+
+  set(CACHE_DIR "${NNCC_EXTERNALS_DIR}")
+  set(OUT_DIR "${CACHE_DIR}/${DIRNAME}")
+  set(TMP_DIR "${CACHE_DIR}/${DIRNAME}-tmp")
+
+  set(DOWNLOAD_PATH "${CACHE_DIR}/${DIRNAME}-${FILENAME}")
+  set(STAMP_PATH "${CACHE_DIR}/${DIRNAME}.stamp")
+
+  if(NOT EXISTS "${CACHE_DIR}")
+    file(MAKE_DIRECTORY "${CACHE_DIR}")
+  endif(NOT EXISTS "${CACHE_DIR}")
+
+  # Compare URL in STAMP file and the given URL
+  Stamp_Check(URL_CHECK "${STAMP_PATH}" "${URL}")
+
+  if(NOT URL_CHECK)
+    file(REMOVE "${STAMP_PATH}")
+    file(REMOVE_RECURSE "${OUT_DIR}")
+    file(REMOVE_RECURSE "${TMP_DIR}")
+
+    file(MAKE_DIRECTORY "${TMP_DIR}")
+
+    message("-- Download ${PREFIX} from ${URL}")
+    file(DOWNLOAD ${URL} "${DOWNLOAD_PATH}" SHOW_PROGRESS)
+    message("-- Download ${PREFIX} from ${URL} - done")
+
+    # Verify checksum
+    if(ARG_CHECKSUM)
+      message(STATUS "Verify ${PREFIX} archive")
+      string(REPLACE "=" ";" CHECKSUM_SPEC "${ARG_CHECKSUM}")
+
+      list(GET CHECKSUM_SPEC 0 CHECKSUM_ALG)
+      list(GET CHECKSUM_SPEC 1 CHECKSUM_VAL)
+      string(STRIP "${CHECKSUM_VAL}" CHECKSUM_VAL)
+
+      set(EXPECTED_CHECKSUM ${CHECKSUM_VAL})
+      file(${CHECKSUM_ALG} "${DOWNLOAD_PATH}" OBTAINED_CHECKSUM)
+
+      if(NOT (EXPECTED_CHECKSUM STREQUAL OBTAINED_CHECKSUM))
+        message(STATUS "CHECKSUM MISMATCH")
+        message(STATUS "  expected: ${EXPECTED_CHECKSUM}")
+        message(STATUS "  obtained: ${OBTAINED_CHECKSUM}")
+        message(FATAL_ERROR "Verify ${PREFIX} archive - fail")
+      endif(NOT (EXPECTED_CHECKSUM STREQUAL OBTAINED_CHECKSUM))
+
+      message(STATUS "Verify ${PREFIX} archive - done")
+    endif(ARG_CHECKSUM)
+
+    message("-- Extract ${PREFIX}")
+    execute_process(COMMAND ${CMAKE_COMMAND} -E tar xfz "${DOWNLOAD_PATH}"
+                    WORKING_DIRECTORY "${TMP_DIR}")
+    file(REMOVE "${DOWNLOAD_PATH}")
+    message("-- Extract ${PREFIX} - done")
+
+    message("-- Cleanup ${PREFIX}")
+    file(GLOB contents "${TMP_DIR}/*")
+    list(LENGTH contents n)
+    if(NOT n EQUAL 1 OR NOT IS_DIRECTORY "${contents}")
+      set(contents "${TMP_DIR}")
+    endif()
+
+    get_filename_component(contents ${contents} ABSOLUTE)
+
+    file(RENAME ${contents} "${OUT_DIR}")
+    file(REMOVE_RECURSE "${TMP_DIR}")
+    file(WRITE "${STAMP_PATH}" "${URL}")
+    message("-- Cleanup ${PREFIX} - done")
+  endif()
+
+  set(${PREFIX}_SOURCE_DIR "${OUT_DIR}" PARENT_SCOPE)
+endfunction(ExternalSource_Download)
diff --git a/infra/nncc/cmake/modules/ListFile.cmake b/infra/nncc/cmake/modules/ListFile.cmake
new file mode 100644
index 000000000..aee0d162a
--- /dev/null
+++ b/infra/nncc/cmake/modules/ListFile.cmake
@@ -0,0 +1,12 @@
+# Read a file and create a list variable
+#
+# HOW TO USE
+#
+#  ListFile_Read("A.txt" A_LIST)
+#
+function(ListFile_Read FILENAME VARNAME)
+  file(READ ${FILENAME} content)
+  # Reference: http://public.kitware.com/pipermail/cmake/2007-May/014236.html
+  STRING(REGEX REPLACE "\n" ";" content "${content}")
+  set(${VARNAME} ${content} PARENT_SCOPE)
+endfunction(ListFile_Read)
diff --git a/infra/nncc/cmake/modules/OptionTools.cmake b/infra/nncc/cmake/modules/OptionTools.cmake
new file mode 100644
index 000000000..0ca50f7c3
--- /dev/null
+++ b/infra/nncc/cmake/modules/OptionTools.cmake
@@ -0,0 +1,9 @@
+function(envoption PREFIX DEFAULT_VALUE)
+  set(VALUE ${DEFAULT_VALUE})
+
+  if(DEFINED ENV{${PREFIX}})
+    set(VALUE $ENV{${PREFIX}})
+  endif()
+
+  set(${PREFIX} ${VALUE} PARENT_SCOPE)
+endfunction(envoption)
diff --git a/infra/nncc/cmake/modules/OptionalTargetTools.cmake b/infra/nncc/cmake/modules/OptionalTargetTools.cmake
new file mode 100644
index 000000000..8bf2c37ef
--- /dev/null
+++ b/infra/nncc/cmake/modules/OptionalTargetTools.cmake
@@ -0,0 +1,5 @@
+macro(optional_target_link_libraries NAME)
+  if(TARGET ${NAME})
+    target_link_libraries(${NAME} ${ARGN})
+  endif(TARGET ${NAME})
+endmacro(optional_target_link_libraries)
diff --git a/infra/nncc/cmake/modules/StampTools.cmake b/infra/nncc/cmake/modules/StampTools.cmake
new file mode 100644
index 000000000..d38e033ff
--- /dev/null
+++ b/infra/nncc/cmake/modules/StampTools.cmake
@@ -0,0 +1,18 @@
+# Stamp_Check(VARNAME PATH CONTENT)
+#  Stamp_Check sets VARNAME as TRUE if a file exists at "PATH", and its content is same as "CONTENT"
+#  Stamp_Check sets VARNAME as FALSE otherwise
+function(Stamp_Check VARNAME PATH EXPECTED_CONTENT)
+  if(NOT EXISTS "${PATH}")
+    set(${VARNAME} FALSE PARENT_SCOPE)
+    return()
+  endif(NOT EXISTS "${PATH}")
+
+  file(READ ${PATH} OBTAINED_CONTENT)
+
+  if(NOT EXPECTED_CONTENT STREQUAL OBTAINED_CONTENT)
+    set(${VARNAME} FALSE PARENT_SCOPE)
+    return()
+  endif(NOT EXPECTED_CONTENT STREQUAL OBTAINED_CONTENT)
+
+  set(${VARNAME} TRUE PARENT_SCOPE)
+endfunction(Stamp_Check)
diff --git a/infra/nncc/cmake/modules/TargetRequire.cmake b/infra/nncc/cmake/modules/TargetRequire.cmake
new file mode 100644
index 000000000..801600dd9
--- /dev/null
+++ b/infra/nncc/cmake/modules/TargetRequire.cmake
@@ -0,0 +1,45 @@
+# TargetRequire_Check(NAME t1 t2 t3 ...)
+#
+# TargetRequire_Check(NAME ...) sets "NAME" as TRUE if all the required targets are
+# available, and FALSE otherwise.
+function(TargetRequire_Check VARNAME)
+  set(${VARNAME} TRUE PARENT_SCOPE)
+  foreach(REQUIRED_TARGET IN ITEMS ${ARGN})
+    if(NOT TARGET ${REQUIRED_TARGET})
+      set(${VARNAME} FALSE PARENT_SCOPE)
+      return()
+    endif(NOT TARGET ${REQUIRED_TARGET})
+  endforeach(REQUIRED_TARGET)
+endfunction(TargetRequire_Check)
+
+# TargetRequire_Assert(t1 t2 t3 ...)
+#
+# TargetRequire_Assert(...) stops CMake immediately if there is a target required but unavailable.
+function(TargetRequire_Assert)
+  unset(MISSING_TARGETS)
+
+  foreach(REQUIRED_TARGET IN ITEMS ${ARGN})
+    if(NOT TARGET ${REQUIRED_TARGET})
+      list(APPEND MISSING_TARGETS ${REQUIRED_TARGET})
+    endif(NOT TARGET ${REQUIRED_TARGET})
+  endforeach(REQUIRED_TARGET)
+
+  list(LENGTH MISSING_TARGETS MISSING_COUNT)
+
+  if(NOT MISSING_COUNT EQUAL 0)
+    message(FATAL_ERROR "${MISSING_TARGETS} are required, but unavailable")
+  endif(NOT MISSING_COUNT EQUAL 0)
+endfunction(TargetRequire_Assert)
+
+# TargetRequire_Return(t1 t2 t3 ...)
+#
+# TargetRequire_Return(...) returns immediately if there is a target required but unavailable.
+#
+# NOTE "macro" is inevitable to make "return" inside affect the caller.
+macro(TargetRequire_Return)
+  foreach(REQUIRED_TARGET IN ITEMS ${ARGN})
+    if(NOT TARGET ${REQUIRED_TARGET})
+      return()
+    endif(NOT TARGET ${REQUIRED_TARGET})
+  endforeach(REQUIRED_TARGET)
+endmacro(TargetRequire_Return)
diff --git a/infra/nncc/cmake/modules/ThirdPartyTools.cmake b/infra/nncc/cmake/modules/ThirdPartyTools.cmake
new file mode 100644
index 000000000..8fbeacf6e
--- /dev/null
+++ b/infra/nncc/cmake/modules/ThirdPartyTools.cmake
@@ -0,0 +1,42 @@
+function(ThirdParty_URL VARNAME)
+  # PACKAGE (mandatory)
+  # VERSION (mandatory)
+  # ENV ... (optional, for backward compatibility)
+
+  include(CMakeParseArguments)
+
+  cmake_parse_arguments(ARG "" "PACKAGE;VERSION;ENV" "" ${ARGN})
+
+  if(NOT ARG_PACKAGE)
+    message(FATAL_ERROR "PACKAGE is missing")
+  endif(NOT ARG_PACKAGE)
+
+  if(NOT ARG_VERSION)
+    message(FATAL_ERROR "VERSION is missing")
+  endif(NOT ARG_VERSION)
+
+  set(PACKAGE_INFO_DIR "${NNCC_PROJECT_SOURCE_DIR}/infra/nncc/3rdparty/${ARG_PACKAGE}/${ARG_VERSION}")
+  set(PACKAGE_URL_FILE "${PACKAGE_INFO_DIR}/URL.default")
+  set(PACKAGE_URL_LOCAL_FILE "${PACKAGE_INFO_DIR}/URL.local")
+
+  if(NOT EXISTS "${PACKAGE_URL_FILE}")
+    message(FATAL_ERROR "URL file does not exist")
+  endif()
+
+  # Read URL from "[PACKAGE NAME]/[PACKAGE VERSION]/URL.default"
+  file(STRINGS "${PACKAGE_URL_FILE}" VALUE)
+
+  # Read URL from "[PACKAGE NAME]/[PACAKGE VERSION]/URL.local" (if it exists)
+  if(EXISTS "${PACKAGE_URL_LOCAL_FILE}")
+    file(STRINGS "${PACKAGE_URL_LOCAL_FILE}" VALUE)
+  endif()
+
+  # Read URL from process environment (if ENV option is specified)
+  if(ARG_ENV)
+    if(DEFINED ENV{${ARG_ENV}})
+      set(VALUE $ENV{${ARG_ENV}})
+    endif()
+  endif(ARG_ENV)
+
+  set("${VARNAME}" "${VALUE}" PARENT_SCOPE)
+endfunction(ThirdParty_URL)
diff --git a/cmake/modules/ExtendCMakeFunction.cmake b/infra/nncc/cmake/modules/add_subdirectories.cmake
index 06b7c768d..06b7c768d 100644
--- a/cmake/modules/ExtendCMakeFunction.cmake
+++ b/infra/nncc/cmake/modules/add_subdirectories.cmake
diff --git a/infra/nncc/cmake/packages/AbseilConfig.cmake b/infra/nncc/cmake/packages/AbseilConfig.cmake
new file mode 100644
index 000000000..4c731008a
--- /dev/null
+++ b/infra/nncc/cmake/packages/AbseilConfig.cmake
@@ -0,0 +1,37 @@
+function(_Abseil_import)
+  nncc_find_package(AbseilSource QUIET)
+
+  if(NOT AbseilSource_FOUND)
+    message("Abseil: NOT FOUND (Cannot access source)")
+    set(Abseil_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT AbseilSource_FOUND)
+
+  if(NOT TARGET abseil)
+    nncc_include(ExternalProjectTools)
+
+    # NOTE Turn off abseil testing
+    set(BUILD_TESTING OFF)
+    add_extdirectory("${AbseilSource_DIR}" ABSEIL)
+
+    add_library(abseil INTERFACE)
+    target_link_libraries(abseil INTERFACE
+      # From "Available Abseil CMake Public Targets" in CMake/README.md
+      absl::base
+      absl::algorithm
+      absl::container
+      absl::debugging
+      absl::memory
+      absl::meta
+      absl::numeric
+      absl::strings
+      absl::synchronization
+      absl::time
+      absl::utility
+    )
+  endif(NOT TARGET abseil)
+
+  set(Abseil_FOUND TRUE PARENT_SCOPE)
+endfunction(_Abseil_import)
+
+_Abseil_import()
diff --git a/infra/nncc/cmake/packages/AbseilSourceConfig.cmake b/infra/nncc/cmake/packages/AbseilSourceConfig.cmake
new file mode 100644
index 000000000..d980ac653
--- /dev/null
+++ b/infra/nncc/cmake/packages/AbseilSourceConfig.cmake
@@ -0,0 +1,24 @@
+function(_AbseilSource_import)
+  if(NOT DOWNLOAD_ABSEIL)
+    set(AbseilSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_ABSEIL)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  # NOTE TensorFlow 1.12 downloads abseil from the following URL
+  # - https://github.com/abseil/abseil-cpp/archive/48cd2c3f351ff188bc85684b84a91b6e6d17d896.tar.gz
+  #
+  # The last change of "48cd2c3f351" was commited on 2018.09.27
+  #
+  # Let's use the latest released version (2018-12 release)
+  envoption(ABSEIL_URL https://github.com/abseil/abseil-cpp/archive/20181200.tar.gz)
+
+  ExternalSource_Download(ABSEIL ${ABSEIL_URL})
+
+  set(AbseilSource_DIR ${ABSEIL_SOURCE_DIR} PARENT_SCOPE)
+  set(AbseilSource_FOUND TRUE PARENT_SCOPE)
+endfunction(_AbseilSource_import)
+
+_AbseilSource_import()
diff --git a/infra/nncc/cmake/packages/Caffe/CMakeLists.txt b/infra/nncc/cmake/packages/Caffe/CMakeLists.txt
new file mode 100644
index 000000000..51b723edd
--- /dev/null
+++ b/infra/nncc/cmake/packages/Caffe/CMakeLists.txt
@@ -0,0 +1,15 @@
+file(GLOB CORE_SOURCES "${CaffeSource_DIR}/src/caffe/*.cpp" "${CaffeSource_DIR}/src/caffe/util/*.cpp")
+file(GLOB LAYER_SOURCES "${CaffeSource_DIR}/src/caffe/layers/*.cpp")
+
+add_library(caffe SHARED ${CORE_SOURCES} ${LAYER_SOURCES})
+target_compile_definitions(caffe PUBLIC CPU_ONLY)
+target_include_directories(caffe PUBLIC ${CaffeSource_DIR}/include)
+target_include_directories(caffe PRIVATE ${Boost_INCLUDE_DIRS})
+target_include_directories(caffe PRIVATE ${HDF5_INCLUDE_DIRS})
+target_include_directories(caffe PRIVATE ${Atlas_INCLUDE_DIRS})
+target_link_libraries(caffe caffeproto)
+target_link_libraries(caffe glog)
+target_link_libraries(caffe gflags)
+target_link_libraries(caffe ${Boost_LIBRARIES})
+target_link_libraries(caffe ${HDF5_LIBRARIES} ${HDF5_HL_LIBRARIES})
+target_link_libraries(caffe ${Atlas_LIBRARIES})
diff --git a/infra/nncc/cmake/packages/CaffeConfig.cmake b/infra/nncc/cmake/packages/CaffeConfig.cmake
new file mode 100644
index 000000000..7b5eb2f2e
--- /dev/null
+++ b/infra/nncc/cmake/packages/CaffeConfig.cmake
@@ -0,0 +1,62 @@
+function(_Caffe_import)
+  nncc_find_package(CaffeSource QUIET)
+
+  if(NOT CaffeSource_FOUND)
+    set(Caffe_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT CaffeSource_FOUND)
+
+  nncc_find_package(CaffeProto QUIET)
+
+  if(NOT CaffeProto_FOUND)
+    set(Caffe_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif()
+
+  find_package(Boost 1.54 COMPONENTS system thread filesystem QUIET)
+
+  if(NOT Boost_FOUND)
+    set(Caffe_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif()
+
+  find_package(HDF5 COMPONENTS HL QUIET)
+
+  if(NOT HDF5_FOUND)
+    set(Caffe_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif()
+
+  list(APPEND CMAKE_MODULE_PATH ${CaffeSource_DIR}/cmake/Modules)
+
+  find_package(Atlas QUIET)
+
+  if(NOT ATLAS_FOUND)
+    set(Caffe_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif()
+
+  nncc_find_package(GLog QUIET)
+
+  if(NOT GLog_FOUND)
+    set(Caffe_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif()
+
+  nncc_find_package(GFlags QUIET)
+
+  if(NOT GFlags_FOUND)
+    set(Caffe_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif()
+
+  if(NOT TARGET caffe)
+    nncc_include(ExternalProjectTools)
+    add_extdirectory("${CMAKE_CURRENT_LIST_DIR}/Caffe" caffe)
+    message(STATUS "Found Caffe: TRUE")
+  endif(NOT TARGET caffe)
+
+  set(Caffe_FOUND TRUE PARENT_SCOPE)
+endfunction(_Caffe_import)
+
+_Caffe_import()
diff --git a/infra/nncc/cmake/packages/CaffeProto/CMakeLists.txt b/infra/nncc/cmake/packages/CaffeProto/CMakeLists.txt
new file mode 100644
index 000000000..f9f8724a0
--- /dev/null
+++ b/infra/nncc/cmake/packages/CaffeProto/CMakeLists.txt
@@ -0,0 +1,6 @@
+Protobuf_Generate(CAFFE_PROTO "${CMAKE_CURRENT_BINARY_DIR}/generated/caffe" "${CaffeSource_DIR}/src" "caffe/proto/caffe.proto")
+
+add_library(caffeproto STATIC ${CAFFE_PROTO_SOURCES})
+set_target_properties(caffeproto PROPERTIES POSITION_INDEPENDENT_CODE ON)
+target_include_directories(caffeproto PUBLIC ${CAFFE_PROTO_INCLUDE_DIRS})
+target_link_libraries(caffeproto libprotobuf)
diff --git a/infra/nncc/cmake/packages/CaffeProtoConfig.cmake b/infra/nncc/cmake/packages/CaffeProtoConfig.cmake
new file mode 100644
index 000000000..33c239509
--- /dev/null
+++ b/infra/nncc/cmake/packages/CaffeProtoConfig.cmake
@@ -0,0 +1,24 @@
+function(_CaffeProto_import)
+  nncc_find_package(CaffeSource QUIET)
+
+  if(NOT CaffeSource_FOUND)
+    set(CaffeProto_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT CaffeSource_FOUND)
+
+  nncc_find_package(Protobuf QUIET)
+
+  if(NOT Protobuf_FOUND)
+    set(CaffeProto_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT Protobuf_FOUND)
+
+  if(NOT TARGET caffeproto)
+    nncc_include(ExternalProjectTools)
+    add_extdirectory("${CMAKE_CURRENT_LIST_DIR}/CaffeProto" caffeproto)
+  endif(NOT TARGET caffeproto)
+
+  set(CaffeProto_FOUND TRUE PARENT_SCOPE)
+endfunction(_CaffeProto_import)
+
+_CaffeProto_import()
diff --git a/infra/nncc/cmake/packages/CaffeSourceConfig.cmake b/infra/nncc/cmake/packages/CaffeSourceConfig.cmake
new file mode 100644
index 000000000..91d334235
--- /dev/null
+++ b/infra/nncc/cmake/packages/CaffeSourceConfig.cmake
@@ -0,0 +1,18 @@
+function(_CaffeSource_import)
+  if(NOT DOWNLOAD_CAFFE)
+    set(CaffeSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_CAFFE)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  envoption(CAFFE_URL https://github.com/BVLC/caffe/archive/1.0.tar.gz)
+
+  ExternalSource_Download(CAFFE ${CAFFE_URL})
+
+  set(CaffeSource_DIR ${CAFFE_SOURCE_DIR} PARENT_SCOPE)
+  set(CaffeSource_FOUND ${DOWNLOAD_CAFFE} PARENT_SCOPE)
+endfunction(_CaffeSource_import)
+
+_CaffeSource_import()
diff --git a/infra/nncc/cmake/packages/EigenConfig.cmake b/infra/nncc/cmake/packages/EigenConfig.cmake
new file mode 100644
index 000000000..ac5164f68
--- /dev/null
+++ b/infra/nncc/cmake/packages/EigenConfig.cmake
@@ -0,0 +1,17 @@
+function(_Eigen_import)
+  nncc_find_package(EigenSource QUIET)
+
+  if(NOT EigenSource_FOUND)
+    set(Eigen_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT EigenSource_FOUND)
+
+  if(NOT TARGET eigen)
+    add_library(eigen INTERFACE)
+    target_include_directories(eigen INTERFACE "${EigenSource_DIR}")
+  endif(NOT TARGET eigen)
+
+  set(EigenSource_FOUND TRUE PARENT_SCOPE)
+endfunction(_Eigen_import)
+
+_Eigen_import()
diff --git a/infra/nncc/cmake/packages/EigenSource-fd6845384b86Config.cmake b/infra/nncc/cmake/packages/EigenSource-fd6845384b86Config.cmake
new file mode 100644
index 000000000..bf0f94d29
--- /dev/null
+++ b/infra/nncc/cmake/packages/EigenSource-fd6845384b86Config.cmake
@@ -0,0 +1,26 @@
+# find_package rejects version with commit number. Commit ID is appended to the package name
+# as a workaround.
+#
+# TODO Find a better way
+function(_import)
+  if(NOT DOWNLOAD_EIGEN)
+    set(EigenSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_EIGEN)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(ThirdPartyTools)
+
+  ThirdParty_URL(EIGEN_URL PACKAGE Eigen VERSION fd6845384b86)
+
+  ExternalSource_Download(EIGEN
+    DIRNAME EIGEN-fd6845384b86
+    CHECKSUM MD5=4c884968ede816a84c70e2cd2c81de8d
+    ${EIGEN_URL}
+  )
+
+  set(EigenSource_DIR ${EIGEN_SOURCE_DIR} PARENT_SCOPE)
+  set(EigenSource-fd6845384b86_FOUND TRUE PARENT_SCOPE)
+endfunction(_import)
+
+_import()
diff --git a/infra/nncc/cmake/packages/EigenSourceConfig.cmake b/infra/nncc/cmake/packages/EigenSourceConfig.cmake
new file mode 100644
index 000000000..f87f53304
--- /dev/null
+++ b/infra/nncc/cmake/packages/EigenSourceConfig.cmake
@@ -0,0 +1,19 @@
+function(_EigenSource_import)
+  if(NOT DOWNLOAD_EIGEN)
+    set(EigenSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_EIGEN)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  # NOTE The following URL comes from TensorFlow 1.7
+  envoption(EIGEN_URL https://bitbucket.org/eigen/eigen/get/2355b229ea4c.tar.gz)
+
+  ExternalSource_Download(EIGEN ${EIGEN_URL})
+
+  set(EigenSource_DIR ${EIGEN_SOURCE_DIR} PARENT_SCOPE)
+  set(EigenSource_FOUND TRUE PARENT_SCOPE)
+endfunction(_EigenSource_import)
+
+_EigenSource_import()
diff --git a/infra/nncc/cmake/packages/Farmhash/CMakeLists.txt b/infra/nncc/cmake/packages/Farmhash/CMakeLists.txt
new file mode 100644
index 000000000..3da57a498
--- /dev/null
+++ b/infra/nncc/cmake/packages/Farmhash/CMakeLists.txt
@@ -0,0 +1,3 @@
+add_library(farmhash "${FarmhashSource_DIR}/src/farmhash.cc")
+set_target_properties(farmhash PROPERTIES POSITION_INDEPENDENT_CODE ON)
+target_include_directories(farmhash PUBLIC "${FarmhashSource_DIR}/src")
diff --git a/infra/nncc/cmake/packages/FarmhashConfig.cmake b/infra/nncc/cmake/packages/FarmhashConfig.cmake
new file mode 100644
index 000000000..68f3d7c49
--- /dev/null
+++ b/infra/nncc/cmake/packages/FarmhashConfig.cmake
@@ -0,0 +1,17 @@
+function(_Farmhash_import)
+  nncc_find_package(FarmhashSource QUIET)
+
+  if(NOT FarmhashSource_FOUND)
+    set(Farmhash_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT FarmhashSource_FOUND)
+
+  if(NOT TARGET farmhash)
+    nncc_include(ExternalProjectTools)
+    add_extdirectory("${CMAKE_CURRENT_LIST_DIR}/Farmhash" farmhash)
+  endif(NOT TARGET farmhash)
+
+  set(Farmhash_FOUND TRUE PARENT_SCOPE)
+endfunction(_Farmhash_import)
+
+_Farmhash_import()
diff --git a/infra/nncc/cmake/packages/FarmhashSourceConfig.cmake b/infra/nncc/cmake/packages/FarmhashSourceConfig.cmake
new file mode 100644
index 000000000..207909fab
--- /dev/null
+++ b/infra/nncc/cmake/packages/FarmhashSourceConfig.cmake
@@ -0,0 +1,19 @@
+function(_FarmhashSource_import)
+  if(NOT DOWNLOAD_FARMHASH)
+    set(FarmhashSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_FARMHASH)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  # NOTE TensorFlow 1.7 downloads farmhash from the following URL
+  envoption(FARMHASH_URL https://github.com/google/farmhash/archive/816a4ae622e964763ca0862d9dbd19324a1eaf45.tar.gz)
+
+  ExternalSource_Download(FARMHASH ${FARMHASH_URL})
+
+  set(FarmhashSource_DIR ${FARMHASH_SOURCE_DIR} PARENT_SCOPE)
+  set(FarmhashSource_FOUND TRUE PARENT_SCOPE)
+endfunction(_FarmhashSource_import)
+
+_FarmhashSource_import()
diff --git a/infra/nncc/cmake/packages/FlatBuffersConfig.cmake b/infra/nncc/cmake/packages/FlatBuffersConfig.cmake
new file mode 100644
index 000000000..45511ca5e
--- /dev/null
+++ b/infra/nncc/cmake/packages/FlatBuffersConfig.cmake
@@ -0,0 +1,135 @@
+function(_FlatBuffers_import)
+  find_package(Flatbuffers QUIET)
+  set(FlatBuffers_FOUND ${Flatbuffers_FOUND} PARENT_SCOPE)
+endfunction(_FlatBuffers_import)
+
+function(_FlatBuffers_build)
+  if(NOT BUILD_FLATBUFFERS)
+    return()
+  endif(NOT BUILD_FLATBUFFERS)
+
+  nncc_find_package(FlatBuffersSource EXACT 1.10 QUIET)
+
+  if(NOT FlatBuffersSource_FOUND)
+    # Source is not available
+    return()
+  endif(NOT FlatBuffersSource_FOUND)
+
+  # TODO Introduce helper functions
+  set(FLATBUFFERS_BUILD "${CMAKE_BINARY_DIR}/externals/FLATBUFFERS/build")
+  set(FLATBUFFERS_INSTALL "${NNCC_OVERLAY_DIR}")
+
+  set(STAMP_PATH "${FLATBUFFERS_INSTALL}/FLATBUFFERS.stamp")
+  set(LOG_PATH "${FLATBUFFERS_INSTALL}/FLATBUFFERS.log")
+
+  if(EXISTS ${STAMP_PATH})
+    return()
+  endif(EXISTS ${STAMP_PATH})
+
+  message(STATUS "Build Flatbuffers from ${FlatBuffersSource_DIR}")
+
+  file(MAKE_DIRECTORY ${FLATBUFFERS_BUILD})
+  file(MAKE_DIRECTORY ${FLATBUFFERS_INSTALL})
+
+  # NOTE Do NOT retry Flatbuffers build once it fails
+  file(WRITE "${STAMP_PATH}")
+
+  execute_process(COMMAND ${CMAKE_COMMAND}
+                            -DCMAKE_INSTALL_PREFIX=${FLATBUFFERS_INSTALL}
+                            -DCMAKE_BUILD_TYPE=Release
+                            ${FlatBuffersSource_DIR}
+                  OUTPUT_FILE ${LOG_PATH}
+                  ERROR_FILE ${LOG_PATH}
+                  WORKING_DIRECTORY ${FLATBUFFERS_BUILD}
+                  RESULT_VARIABLE BUILD_EXITCODE)
+
+  execute_process(COMMAND ${CMAKE_COMMAND} --build . -- install
+                  OUTPUT_FILE ${LOG_PATH}
+                  ERROR_FILE ${LOG_PATH}
+                  WORKING_DIRECTORY ${FLATBUFFERS_BUILD}
+                  RESULT_VARIABLE INSTALL_EXITCODE)
+
+  if(BUILD_EXITCODE EQUAL 0 AND INSTALL_EXITCODE EQUAL 0)
+    message(STATUS "Succeeded in building Flatbuffers")
+  else()
+    message(FATAL_ERROR "Fail to build Flatbuffers (check '${LOG_PATH}' for details)")
+  endif(BUILD_EXITCODE EQUAL 0 AND INSTALL_EXITCODE EQUAL 0)
+endfunction(_FlatBuffers_build)
+
+_FlatBuffers_build()
+_FlatBuffers_import()
+
+if(FlatBuffers_FOUND)
+  if(NOT TARGET flatbuffers)
+    add_library(flatbuffers INTERFACE)
+    target_link_libraries(flatbuffers INTERFACE flatbuffers::flatbuffers)
+    message(STATUS "Found FlatBuffers: TRUE")
+  endif(NOT TARGET flatbuffers)
+
+  function(FlatBuffers_Generate PREFIX OUTPUT_DIR SCHEMA_DIR)
+    get_filename_component(abs_output_dir ${OUTPUT_DIR} ABSOLUTE)
+    get_filename_component(abs_schema_dir ${SCHEMA_DIR} ABSOLUTE)
+
+    foreach(schema ${ARGN})
+      get_filename_component(schema_fn "${schema}" NAME)
+      get_filename_component(dir "${schema}" DIRECTORY)
+
+      get_filename_component(schema_fn_we "${schema_fn}" NAME_WE)
+
+      list(APPEND SCHEMA_FILES "${abs_schema_dir}/${schema}")
+      list(APPEND OUTPUT_FILES "${abs_output_dir}/${schema_fn_we}_generated.h")
+    endforeach()
+
+    add_custom_command(OUTPUT ${OUTPUT_FILES}
+                       COMMAND ${CMAKE_COMMAND} -E make_directory "${abs_output_dir}"
+                       COMMAND "$<TARGET_FILE:flatbuffers::flatc>" -c --no-includes
+                       --no-union-value-namespacing
+                       --gen-object-api -o "${abs_output_dir}"
+                       ${SCHEMA_FILES}
+                       DEPENDS flatbuffers::flatc)
+
+    set(${PREFIX}_SOURCES ${OUTPUT_FILES} PARENT_SCOPE)
+    set(${PREFIX}_INCLUDE_DIRS ${abs_output_dir} PARENT_SCOPE)
+  endfunction(FlatBuffers_Generate)
+
+  function(FlatBuffers_Target TGT)
+    set(oneValueArgs OUTPUT_DIR SCHEMA_DIR)
+    set(multiValueArgs SCHEMA_FILES)
+    cmake_parse_arguments(ARG "" "${oneValueArgs}" "${multiValueArgs}" ${ARGN})
+
+    get_filename_component(abs_output_dir ${ARG_OUTPUT_DIR} ABSOLUTE)
+    get_filename_component(abs_schema_dir ${ARG_SCHEMA_DIR} ABSOLUTE)
+
+    # Let's reset list variables before using them
+    # NOTE THIS DOES NOT AFFECT parent scope
+    unset(SCHEMA_FILES)
+    unset(OUTPUT_FILES)
+
+    foreach(schema ${ARG_SCHEMA_FILES})
+      get_filename_component(schema_fn "${schema}" NAME)
+      get_filename_component(dir "${schema}" DIRECTORY)
+
+      get_filename_component(schema_fn_we "${schema_fn}" NAME_WE)
+
+      list(APPEND SCHEMA_FILES "${abs_schema_dir}/${schema}")
+      list(APPEND OUTPUT_FILES "${abs_output_dir}/${schema_fn_we}_generated.h")
+    endforeach()
+
+    # Generate headers
+    add_custom_command(OUTPUT ${OUTPUT_FILES}
+                       COMMAND ${CMAKE_COMMAND} -E make_directory "${abs_output_dir}"
+                       COMMAND "$<TARGET_FILE:flatbuffers::flatc>" -c --no-includes
+                               --no-union-value-namespacing
+                               --gen-object-api -o "${abs_output_dir}"
+                               ${SCHEMA_FILES}
+                       DEPENDS ${SCHEMA_FILES}
+                       COMMENT "Generate '${TGT}' headers")
+
+    # NOTE This header-only library is deliberately declared as STATIC library
+    #      to avoid possible scope issues related with generated files
+    add_library(${TGT} STATIC ${OUTPUT_FILES})
+    set_target_properties(${TGT} PROPERTIES LINKER_LANGUAGE CXX)
+    target_include_directories(${TGT} PUBLIC "${ARG_OUTPUT_DIR}")
+    target_link_libraries(${TGT} PUBLIC flatbuffers)
+  endfunction(FlatBuffers_Target)
+endif(FlatBuffers_FOUND)
diff --git a/infra/nncc/cmake/packages/FlatBuffersSource-1.10/FlatBuffersSourceConfig.cmake b/infra/nncc/cmake/packages/FlatBuffersSource-1.10/FlatBuffersSourceConfig.cmake
new file mode 100644
index 000000000..c5f4dc9b7
--- /dev/null
+++ b/infra/nncc/cmake/packages/FlatBuffersSource-1.10/FlatBuffersSourceConfig.cmake
@@ -0,0 +1,18 @@
+function(_FlatBuffersSource_import)
+  if(NOT DOWNLOAD_FLATBUFFERS)
+    set(FlatBuffersSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_FLATBUFFERS)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  envoption(FLATBUFFERS_1_10_URL https://github.com/google/flatbuffers/archive/v1.10.0.tar.gz)
+
+  ExternalSource_Download(FLATBUFFERS DIRNAME FLATBUFFERS-1.10 ${FLATBUFFERS_1_10_URL})
+
+  set(FlatBuffersSource_DIR ${FLATBUFFERS_SOURCE_DIR} PARENT_SCOPE)
+  set(FlatBuffersSource_FOUND TRUE PARENT_SCOPE)
+endfunction(_FlatBuffersSource_import)
+
+_FlatBuffersSource_import()
diff --git a/infra/nncc/cmake/packages/FlatBuffersSource-1.10/FlatBuffersSourceConfigVersion.cmake b/infra/nncc/cmake/packages/FlatBuffersSource-1.10/FlatBuffersSourceConfigVersion.cmake
new file mode 100644
index 000000000..6585f21d5
--- /dev/null
+++ b/infra/nncc/cmake/packages/FlatBuffersSource-1.10/FlatBuffersSourceConfigVersion.cmake
@@ -0,0 +1,10 @@
+set(PACKAGE_VERSION "1.10")
+set(PACKAGE_VERSION_EXACT FALSE)
+set(PACKAGE_VERSION_COMPATIBLE FALSE)
+set(PACKAGE_VERSION_UNSUITABLE TRUE)
+
+if(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
+  set(PACKAGE_VERSION_EXACT TRUE)
+  set(PACKAGE_VERSION_COMPATIBLE TRUE)
+  set(PACKAGE_VERSION_UNSUITABLE FALSE)
+endif(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
diff --git a/infra/nncc/cmake/packages/FlatBuffersSource-1.8/FlatBuffersSourceConfig.cmake b/infra/nncc/cmake/packages/FlatBuffersSource-1.8/FlatBuffersSourceConfig.cmake
new file mode 100644
index 000000000..46935b9f7
--- /dev/null
+++ b/infra/nncc/cmake/packages/FlatBuffersSource-1.8/FlatBuffersSourceConfig.cmake
@@ -0,0 +1,18 @@
+function(_FlatBuffersSource_import)
+  if(NOT DOWNLOAD_FLATBUFFERS)
+    set(FlatBuffersSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_FLATBUFFERS)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  envoption(FLATBUFFERS_1_8_URL https://github.com/google/flatbuffers/archive/v1.8.0.tar.gz)
+
+  ExternalSource_Download(FLATBUFFERS DIRNAME FLATBUFFERS-1.8 ${FLATBUFFERS_1_8_URL})
+
+  set(FlatBuffersSource_DIR ${FLATBUFFERS_SOURCE_DIR} PARENT_SCOPE)
+  set(FlatBuffersSource_FOUND TRUE PARENT_SCOPE)
+endfunction(_FlatBuffersSource_import)
+
+_FlatBuffersSource_import()
diff --git a/infra/nncc/cmake/packages/FlatBuffersSource-1.8/FlatBuffersSourceConfigVersion.cmake b/infra/nncc/cmake/packages/FlatBuffersSource-1.8/FlatBuffersSourceConfigVersion.cmake
new file mode 100644
index 000000000..ac5e9b2b9
--- /dev/null
+++ b/infra/nncc/cmake/packages/FlatBuffersSource-1.8/FlatBuffersSourceConfigVersion.cmake
@@ -0,0 +1,10 @@
+set(PACKAGE_VERSION "1.8")
+set(PACKAGE_VERSION_EXACT FALSE)
+set(PACKAGE_VERSION_COMPATIBLE FALSE)
+set(PACKAGE_VERSION_UNSUITABLE TRUE)
+
+if(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
+  set(PACKAGE_VERSION_EXACT TRUE)
+  set(PACKAGE_VERSION_COMPATIBLE TRUE)
+  set(PACKAGE_VERSION_UNSUITABLE FALSE)
+endif(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
diff --git a/infra/nncc/cmake/packages/FlatBuffersSourceConfig.cmake b/infra/nncc/cmake/packages/FlatBuffersSourceConfig.cmake
new file mode 100644
index 000000000..63a9ccdd0
--- /dev/null
+++ b/infra/nncc/cmake/packages/FlatBuffersSourceConfig.cmake
@@ -0,0 +1,25 @@
+function(_FlatBuffersSource_import)
+  if(NOT DOWNLOAD_FLATBUFFERS)
+    set(FlatBuffersSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_FLATBUFFERS)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  # Each TensorFlow needs a specific version of Flatbuffers
+  # - TensorFlow 1.7 downloads it from https://github.com/google/flatbuffers/archive/971a68110e4.tar.gz
+  # - TensorFlow 1.12 downloads it from https://github.com/google/flatbuffers/archive/1f5eae5d6a1.tar.gz
+  #
+  # Let's use 1.10 released in 2018.10 (compatible with 1f5eae5d6a1).
+  #
+  # TODO Manage multiple versions
+  envoption(FLATBUFFERS_URL https://github.com/google/flatbuffers/archive/v1.10.0.tar.gz)
+
+  ExternalSource_Download(FLATBUFFERS ${FLATBUFFERS_URL})
+
+  set(FlatBuffersSource_DIR ${FLATBUFFERS_SOURCE_DIR} PARENT_SCOPE)
+  set(FlatBuffersSource_FOUND TRUE PARENT_SCOPE)
+endfunction(_FlatBuffersSource_import)
+
+_FlatBuffersSource_import()
diff --git a/infra/nncc/cmake/packages/FlatBuffersSourceConfigVersion.cmake b/infra/nncc/cmake/packages/FlatBuffersSourceConfigVersion.cmake
new file mode 100644
index 000000000..ac9e22e51
--- /dev/null
+++ b/infra/nncc/cmake/packages/FlatBuffersSourceConfigVersion.cmake
@@ -0,0 +1,9 @@
+set(PACKAGE_VERSION_EXACT FALSE)
+set(PACKAGE_VERSION_COMPATIBLE FALSE)
+set(PACKAGE_VERSION_UNSUITABLE TRUE)
+
+if(NOT PACKAGE_FIND_VERSION)
+  # This package works only when find_package(...) call has no EXACT option
+  set(PACKAGE_VERSION_COMPATIBLE TRUE)
+  set(PACKAGE_VERSION_UNSUITABLE FALSE)
+endif(NOT PACKAGE_FIND_VERSION)
diff --git a/infra/nncc/cmake/packages/GEMMLowpConfig.cmake b/infra/nncc/cmake/packages/GEMMLowpConfig.cmake
new file mode 100644
index 000000000..f469a0a08
--- /dev/null
+++ b/infra/nncc/cmake/packages/GEMMLowpConfig.cmake
@@ -0,0 +1,20 @@
+function(_GEMMLowp_import)
+  nncc_find_package(GEMMLowpSource QUIET)
+
+  if(NOT GEMMLowpSource_FOUND)
+    set(GEMMLowp_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT GEMMLowpSource_FOUND)
+
+  if(NOT TARGET gemmlowp)
+    find_package(Threads REQUIRED)
+
+    add_library(gemmlowp INTERFACE)
+    target_include_directories(gemmlowp INTERFACE ${GEMMLowpSource_DIR})
+    target_link_libraries(gemmlowp INTERFACE Threads::Threads)
+  endif(NOT TARGET gemmlowp)
+
+  set(GEMMLowp_FOUND TRUE PARENT_SCOPE)
+endfunction(_GEMMLowp_import)
+
+_GEMMLowp_import()
diff --git a/infra/nncc/cmake/packages/GEMMLowpSourceConfig.cmake b/infra/nncc/cmake/packages/GEMMLowpSourceConfig.cmake
new file mode 100644
index 000000000..a18a4cdc0
--- /dev/null
+++ b/infra/nncc/cmake/packages/GEMMLowpSourceConfig.cmake
@@ -0,0 +1,19 @@
+function(_GEMMLowpSource_import)
+  if(NOT DOWNLOAD_GEMMLOWP)
+    set(GEMMLowpSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_GEMMLOWP)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  # NOTE TensorFlow 1.7 uses the following URL
+  envoption(GEMMLOWP_URL https://github.com/google/gemmlowp/archive/7c7c744640ddc3d0af18fb245b4d23228813a71b.zip)
+
+  ExternalSource_Download(GEMMLOWP ${GEMMLOWP_URL})
+
+  set(GEMMLowpSource_DIR ${GEMMLOWP_SOURCE_DIR} PARENT_SCOPE)
+  set(GEMMLowpSource_FOUND TRUE PARENT_SCOPE)
+endfunction(_GEMMLowpSource_import)
+
+_GEMMLowpSource_import()
diff --git a/infra/nncc/cmake/packages/GFlagsConfig.cmake b/infra/nncc/cmake/packages/GFlagsConfig.cmake
new file mode 100644
index 000000000..891320a95
--- /dev/null
+++ b/infra/nncc/cmake/packages/GFlagsConfig.cmake
@@ -0,0 +1,35 @@
+function(_GFlags_import)
+  if(TARGET gflags)
+    set(GFlags_FOUND True PARENT_SCOPE)
+    return()
+  endif()
+
+  nncc_find_package(GFlagsSource QUIET)
+
+  if(GFlagsSource_FOUND)
+    nncc_include(ExternalProjectTools)
+    # build shared multi-threading gflag library
+    set(BUILD_SHARED_LIBS On)
+    set(BUILD_STATIC_LIBS Off)
+    set(BUILD_gflags_LIB On)
+    set(BUILD_gflags_nothreads_LIB Off)
+    add_extdirectory(${GFLAGS_SOURCE_DIR} gflags)
+  else(GFlagsSource_FOUND)
+    set(GFLAGS_ROOT_DIR "" CACHE PATH "Folder contains GFlags")
+    find_path(GFLAGS_INCLUDE_DIR gflags/gflags.h PATHS ${GFLAGS_ROOT_DIR})
+    find_library(GFLAGS_LIBRARY gflags)
+
+    if(NOT GFLAGS_INCLUDE_DIR)
+      set(GFlags_FOUND False PARENT_SCOPE)
+      return()
+    endif(NOT GFLAGS_INCLUDE_DIR)
+
+    add_library(gflags INTERFACE)
+    target_include_directories(gflags INTERFACE ${GFLAGS_INCLUDE_DIR})
+    target_link_libraries(gflags INTERFACE ${GFLAGS_LIBRARY})
+  endif(GFlagsSource_FOUND)
+
+  set(GFlags_FOUND True PARENT_SCOPE)
+endfunction(_GFlags_import)
+
+_GFlags_import()
diff --git a/infra/nncc/cmake/packages/GFlagsSourceConfig.cmake b/infra/nncc/cmake/packages/GFlagsSourceConfig.cmake
new file mode 100644
index 000000000..17970b0ec
--- /dev/null
+++ b/infra/nncc/cmake/packages/GFlagsSourceConfig.cmake
@@ -0,0 +1,18 @@
+function(_GFlagsSource_import)
+  if(NOT DOWNLOAD_GFLAGS)
+    set(GFlagsSource_FOUND False PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_GFLAGS)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  envoption(GFLAGS_URL https://github.com/gflags/gflags/archive/v2.2.1.tar.gz)
+
+  ExternalSource_Download(GFLAGS ${GFLAGS_URL})
+
+  set(GFLAGS_SOURCE_DIR ${GFLAGS_SOURCE_DIR} PARENT_SCOPE)
+  set(GFlagsSource_FOUND True PARENT_SCOPE)
+endfunction(_GFlagsSource_import)
+
+_GFlagsSource_import()
diff --git a/infra/nncc/cmake/packages/GLogConfig.cmake b/infra/nncc/cmake/packages/GLogConfig.cmake
new file mode 100644
index 000000000..e5ed02cd3
--- /dev/null
+++ b/infra/nncc/cmake/packages/GLogConfig.cmake
@@ -0,0 +1,24 @@
+function(_GLog_import)
+  if(TARGET glog)
+    set(GLog_FOUND True PARENT_SCOPE)
+    return()
+  endif()
+
+  set(GLOG_ROOT_DIR "" CACHE PATH "Folder contains Google Log")
+  find_path(GLOG_INCLUDE_DIR glog/logging.h PATHS ${GLOG_ROOT_DIR})
+  find_library(GLOG_LIBRARY glog)
+
+  if(NOT GLOG_INCLUDE_DIR)
+    set(GLog_FOUND False PARENT_SCOPE)
+    return()
+  endif(NOT GLOG_INCLUDE_DIR)
+
+  add_library(glog INTERFACE)
+  target_include_directories(glog INTERFACE ${GLOG_INCLUDE_DIR} ${GFLAGS_INCLUDE_DIR})
+  target_link_libraries(glog INTERFACE ${GLOG_LIBRARY} gflags)
+
+  message(STATUS "Found GLog: TRUE")
+  set(GLog_FOUND True PARENT_SCOPE)
+endfunction(_GLog_import)
+
+_GLog_import()
diff --git a/infra/nncc/cmake/packages/GTestConfig.cmake b/infra/nncc/cmake/packages/GTestConfig.cmake
new file mode 100644
index 000000000..27f96b27d
--- /dev/null
+++ b/infra/nncc/cmake/packages/GTestConfig.cmake
@@ -0,0 +1,86 @@
+function(_GTest_build)
+  if(NOT BUILD_GTEST)
+    return()
+  endif(NOT BUILD_GTEST)
+
+  nncc_find_package(GTestSource QUIET)
+
+  if(NOT GTestSource_FOUND)
+    return()
+  endif(NOT GTestSource_FOUND)
+
+  # TODO Introduce helper functions
+  set(GTEST_SOURCE_DIR "${GTestSource_DIR}")
+  set(GTEST_BUILD_DIR "${CMAKE_BINARY_DIR}/externals/GTEST/build")
+  set(GTEST_INSTALL_DIR "${NNCC_OVERLAY_DIR}")
+
+  set(STAMP_PATH "${GTEST_INSTALL_DIR}/GTEST.stamp")
+  set(LOG_PATH "${GTEST_INSTALL_DIR}/GTEST.log")
+
+  if(EXISTS ${STAMP_PATH})
+    return()
+  endif(EXISTS ${STAMP_PATH})
+
+  message(STATUS "Google Test Package: Source found (path: ${GTEST_SOURCE_DIR})")
+
+  file(MAKE_DIRECTORY ${GTEST_BUILD_DIR})
+  file(MAKE_DIRECTORY ${GTEST_INSTALL_DIR})
+
+  # NOTE Do NOT retry build once it failed
+  file(WRITE "${STAMP_PATH}")
+
+  execute_process(COMMAND ${CMAKE_COMMAND}
+                            -DCMAKE_INSTALL_PREFIX=${GTEST_INSTALL_DIR}
+                            -DCMAKE_BUILD_TYPE=Release
+                            ${GTestSource_DIR}
+                  OUTPUT_FILE ${LOG_PATH}
+                  ERROR_FILE ${LOG_PATH}
+                  WORKING_DIRECTORY ${GTEST_BUILD_DIR}
+                  RESULT_VARIABLE BUILD_EXITCODE)
+
+  if(NOT BUILD_EXITCODE EQUAL 0)
+    message(FATAL_ERROR "Google Test Package: Build failed (check '${LOG_PATH}' for details)")
+  endif(NOT BUILD_EXITCODE EQUAL 0)
+
+  execute_process(COMMAND ${CMAKE_COMMAND} --build . -- install
+                  OUTPUT_FILE ${LOG_PATH}
+                  ERROR_FILE ${LOG_PATH}
+                  WORKING_DIRECTORY ${GTEST_BUILD_DIR}
+                  RESULT_VARIABLE INSTALL_EXITCODE)
+
+  if(NOT INSTALL_EXITCODE EQUAL 0)
+    message(FATAL_ERROR "Google Test Package: Installation failed (check '${LOG_PATH}' for details)")
+  endif(NOT INSTALL_EXITCODE EQUAL 0)
+
+  message(STATUS "Google Test Package: Done")
+endfunction(_GTest_build)
+
+_GTest_build()
+
+### Find and use pre-installed Google Test
+find_package(GTest)
+find_package(Threads)
+
+if(${GTEST_FOUND} AND TARGET Threads::Threads)
+  if(NOT TARGET gtest)
+    add_library(gtest INTERFACE)
+    target_include_directories(gtest INTERFACE ${GTEST_INCLUDE_DIRS})
+    target_link_libraries(gtest INTERFACE ${GTEST_LIBRARIES} Threads::Threads)
+  endif(NOT TARGET gtest)
+
+  if(NOT TARGET gtest_main)
+    add_library(gtest_main INTERFACE)
+    target_include_directories(gtest_main INTERFACE ${GTEST_INCLUDE_DIRS})
+    target_link_libraries(gtest_main INTERFACE gtest)
+    target_link_libraries(gtest_main INTERFACE ${GTEST_MAIN_LIBRARIES})
+
+    # GTest_AddTest(TGT ...) creates an executable target and registers that executable as a CMake test
+    function(GTest_AddTest TGT)
+      add_executable(${TGT} ${ARGN})
+      target_link_libraries(${TGT} gtest_main)
+      add_test(${TGT} ${TGT})
+    endfunction(GTest_AddTest)
+  endif(NOT TARGET gtest_main)
+
+  set(GTest_FOUND TRUE)
+endif(${GTEST_FOUND} AND TARGET Threads::Threads)
diff --git a/infra/nncc/cmake/packages/GTestSourceConfig.cmake b/infra/nncc/cmake/packages/GTestSourceConfig.cmake
new file mode 100644
index 000000000..d7c9d53c6
--- /dev/null
+++ b/infra/nncc/cmake/packages/GTestSourceConfig.cmake
@@ -0,0 +1,18 @@
+function(_GTestSource_import)
+  if(NOT DOWNLOAD_GTEST)
+    set(GTestSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_GTEST)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  envoption(GTEST_URL https://github.com/google/googletest/archive/release-1.8.0.tar.gz)
+
+  ExternalSource_Download(GTEST ${GTEST_URL})
+
+  set(GTestSource_DIR ${GTEST_SOURCE_DIR} PARENT_SCOPE)
+  set(GTestSource_FOUND TRUE PARENT_SCOPE)
+endfunction(_GTestSource_import)
+
+_GTestSource_import()
diff --git a/infra/nncc/cmake/packages/GoogleDoubleConversionConfig.cmake b/infra/nncc/cmake/packages/GoogleDoubleConversionConfig.cmake
new file mode 100644
index 000000000..3fdc86102
--- /dev/null
+++ b/infra/nncc/cmake/packages/GoogleDoubleConversionConfig.cmake
@@ -0,0 +1,52 @@
+# https://github.com/google/double-conversion
+set(GOOGLE_DOUBLE_CONVERSION_PREFIX "/usr" CACHE PATH "Google DoubleConversion install prefix")
+
+function(_GoogleDoubleConversion_import)
+  # Find the header & lib
+  find_library(GoogleDoubleConversion_LIB
+    NAMES double-conversion
+    PATHS "${GOOGLE_DOUBLE_CONVERSION_PREFIX}/lib"
+  )
+
+  find_path(GoogleDoubleConversion_INCLUDE_DIR
+    NAMES double-conversion/double-conversion.h
+    PATHS "${GOOGLE_DOUBLE_CONVERSION_PREFIX}/include"
+  )
+
+  # TODO Version check
+  set(GoogleDoubleConversion_FOUND TRUE)
+
+  if(NOT GoogleDoubleConversion_LIB)
+    set(GoogleDoubleConversion_FOUND FALSE)
+  endif(NOT GoogleDoubleConversion_LIB)
+
+  if(NOT GoogleDoubleConversion_INCLUDE_DIR)
+    set(GoogleDoubleConversion_FOUND FALSE)
+  endif(NOT GoogleDoubleConversion_INCLUDE_DIR)
+
+  set(GoogleDoubleConversion_FOUND ${GoogleDoubleConversion_FOUND} PARENT_SCOPE)
+
+  unset(MESSAGE)
+  list(APPEND MESSAGE "Found Google Double Conversion")
+
+  if(NOT GoogleDoubleConversion_FOUND)
+    list(APPEND MESSAGE ": FALSE")
+  else(NOT GoogleDoubleConversion_FOUND)
+    list(APPEND MESSAGE " (include: ${GoogleDoubleConversion_INCLUDE_DIR} library: ${GoogleDoubleConversion_LIB})")
+
+    # Add target
+    if(NOT TARGET google_double_conversion)
+      # NOTE IMPORTED target may be more appropriate for this case
+      add_library(google_double_conversion INTERFACE)
+      target_link_libraries(google_double_conversion INTERFACE ${GoogleDoubleConversion_LIB})
+      target_include_directories(google_double_conversion INTERFACE ${GoogleDoubleConversion_INCLUDE_DIR})
+
+      add_library(Google::DoubleConversion ALIAS google_double_conversion)
+    endif(NOT TARGET google_double_conversion)
+  endif(NOT GoogleDoubleConversion_FOUND)
+
+  message(STATUS ${MESSAGE})
+  set(GoogleDoubleConversion_FOUND ${GoogleDoubleConversion_FOUND} PARENT_SCOPE)
+endfunction(_GoogleDoubleConversion_import)
+
+_GoogleDoubleConversion_import()
diff --git a/infra/nncc/cmake/packages/GoogleNSyncConfig.cmake b/infra/nncc/cmake/packages/GoogleNSyncConfig.cmake
new file mode 100644
index 000000000..1fdf8cc20
--- /dev/null
+++ b/infra/nncc/cmake/packages/GoogleNSyncConfig.cmake
@@ -0,0 +1,62 @@
+# https://github.com/google/nsync
+set(GOOGLE_NSYNC_PREFIX "/usr" CACHE PATH "Where to find Google NSync library")
+
+function(_GoogleNSync_import)
+  # Find the header & lib
+  find_library(GoogleNSync_C_LIB
+    NAMES nsync
+    PATHS "${GOOGLE_NSYNC_PREFIX}/lib"
+  )
+
+  find_library(GoogleNSync_CPP_LIB
+    NAMES nsync_cpp
+    PATHS "${GOOGLE_NSYNC_PREFIX}/lib"
+  )
+
+  find_path(GoogleNSync_INCLUDE_DIR
+    NAMES nsync.h
+    PATHS "${GOOGLE_NSYNC_PREFIX}/include"
+  )
+
+  message(STATUS "GoogleNSync_C_LIB: ${GoogleNSync_C_LIB}")
+  message(STATUS "GoogleNSync_CPP_LIB: ${GoogleNSync_CPP_LIB}")
+  message(STATUS "GoogleNSync_INCLUDE_DIR: ${GoogleNSync_INCLUDE_DIR}")
+
+  set(GoogleNSync_FOUND TRUE)
+
+  if(NOT GoogleNSync_C_LIB)
+    set(GoogleNSync_FOUND FALSE)
+  endif(NOT GoogleNSync_C_LIB)
+
+  if(NOT GoogleNSync_CPP_LIB)
+    set(GoogleNSync_FOUND FALSE)
+  endif(NOT GoogleNSync_CPP_LIB)
+
+  if(NOT GoogleNSync_INCLUDE_DIR)
+    set(GoogleNSync_FOUND FALSE)
+  endif(NOT GoogleNSync_INCLUDE_DIR)
+
+  unset(MESSAGE)
+  list(APPEND MESSAGE "Found Google NSync")
+
+  if(NOT GoogleNSync_FOUND)
+    list(APPEND MESSAGE ": FALSE")
+  else(NOT GoogleNSync_FOUND)
+    list(APPEND MESSAGE " (include: ${GoogleNSync_INCLUDE_DIR} library: ${GoogleNSync_C_LIB} ${GoogleNSync_CPP_LIB})")
+
+    # Add target
+    if(NOT TARGET google_nsync)
+      # NOTE IMPORTED target may be more appropriate for this case
+      add_library(google_nsync INTERFACE)
+      target_link_libraries(google_nsync INTERFACE ${GoogleNSync_C_LIB} ${GoogleNSync_CPP_LIB})
+      target_include_directories(google_nsync INTERFACE ${GoogleNSync_INCLUDE_DIR})
+
+      add_library(Google::NSync ALIAS google_nsync)
+    endif(NOT TARGET google_nsync)
+  endif(NOT GoogleNSync_FOUND)
+
+  message(STATUS ${MESSAGE})
+  set(GoogleNSync_FOUND ${GoogleNSync_FOUND} PARENT_SCOPE)
+endfunction(_GoogleNSync_import)
+
+_GoogleNSync_import()
diff --git a/infra/nncc/cmake/packages/LLVMConfig.cmake b/infra/nncc/cmake/packages/LLVMConfig.cmake
new file mode 100644
index 000000000..0f8faec7f
--- /dev/null
+++ b/infra/nncc/cmake/packages/LLVMConfig.cmake
@@ -0,0 +1,45 @@
+function(_LLVM_import)
+
+  if(NOT TARGET llvm)
+    find_program(llvm_config "llvm-config")
+    if (NOT llvm_config)
+      return()
+    endif(NOT llvm_config)
+    message(STATUS "Found llvm-config: ${llvm_config}")
+
+    # get llvm compile options
+    execute_process(COMMAND ${llvm_config} --cppflags OUTPUT_VARIABLE
+                    LLVM_CPPFLAGS_STR OUTPUT_STRIP_TRAILING_WHITESPACE)
+    # split one string to list of option items
+    string(REPLACE " " ";" LLVM_CPPFLAGS ${LLVM_CPPFLAGS_STR})
+    execute_process(COMMAND ${llvm_config} --has-rtti OUTPUT_VARIABLE
+                    LLVM_HAS_RTTI OUTPUT_STRIP_TRAILING_WHITESPACE)
+    if("${LLVM_HAS_RTTI}" STREQUAL "NO")
+      list(APPEND LLVM_CPPFLAGS "-fno-rtti")
+    endif()
+    # note: "llvm-config --cxxflags" returns whole string but also includes
+    # unwanted "-O3 -DNDEBUG" and several "-Wno-" options so this is not used
+
+    # get llvm link options
+    execute_process(COMMAND ${llvm_config} --ldflags OUTPUT_VARIABLE
+                    LLVM_LINKFLAGS OUTPUT_STRIP_TRAILING_WHITESPACE)
+    execute_process(COMMAND ${llvm_config} --system-libs 
+                    OUTPUT_VARIABLE LLVM_LINKSYSLIBS OUTPUT_STRIP_TRAILING_WHITESPACE)
+    execute_process(COMMAND ${llvm_config} --libs core mcjit native
+                    OUTPUT_VARIABLE LLVM_LINKLIBS OUTPUT_STRIP_TRAILING_WHITESPACE)
+                    
+    add_library(llvm INTERFACE)
+    
+    foreach(ONE_CPPFLAG ${LLVM_CPPFLAGS})
+      target_compile_options(llvm INTERFACE ${ONE_CPPFLAG})
+    endforeach()
+    target_link_libraries(llvm INTERFACE ${LLVM_LINKFLAGS})
+    target_link_libraries(llvm INTERFACE ${LLVM_LINKLIBS})
+    target_link_libraries(llvm INTERFACE ${LLVM_LINKSYSLIBS})
+  
+  endif(NOT TARGET llvm)
+
+  set(LLVM_FOUND TRUE PARENT_SCOPE)
+endfunction(_LLVM_import)
+
+_LLVM_import()
diff --git a/infra/nncc/cmake/packages/NEON2SSEConfig.cmake b/infra/nncc/cmake/packages/NEON2SSEConfig.cmake
new file mode 100644
index 000000000..c7f0c294e
--- /dev/null
+++ b/infra/nncc/cmake/packages/NEON2SSEConfig.cmake
@@ -0,0 +1,17 @@
+function(_NEON2SSE_import)
+  nncc_find_package(NEON2SSESource QUIET)
+
+  if(NOT NEON2SSESource_FOUND)
+    set(NEON2SSE_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT NEON2SSESource_FOUND)
+
+  if(NOT TARGET neon2sse)
+    add_library(neon2sse INTERFACE)
+    target_include_directories(neon2sse INTERFACE "${NEON2SSESource_DIR}")
+  endif(NOT TARGET neon2sse)
+
+  set(NEON2SSE_FOUND TRUE PARENT_SCOPE)
+endfunction(_NEON2SSE_import)
+
+_NEON2SSE_import()
diff --git a/infra/nncc/cmake/packages/NEON2SSESourceConfig.cmake b/infra/nncc/cmake/packages/NEON2SSESourceConfig.cmake
new file mode 100644
index 000000000..f66c5cf41
--- /dev/null
+++ b/infra/nncc/cmake/packages/NEON2SSESourceConfig.cmake
@@ -0,0 +1,19 @@
+function(_NEON2SSESource_import)
+  if(NOT DOWNLOAD_NEON2SSE)
+    set(NEON2SSESource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_NEON2SSE)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  # NOTE TensorFlow 1.7 downloads NEON2SSE from the following URL
+  envoption(NEON2SSE_URL https://github.com/intel/ARM_NEON_2_x86_SSE/archive/0f77d9d182265259b135dad949230ecbf1a2633d.tar.gz)
+
+  ExternalSource_Download(NEON2SSE ${NEON2SSE_URL})
+
+  set(NEON2SSESource_DIR ${NEON2SSE_SOURCE_DIR} PARENT_SCOPE)
+  set(NEON2SSESource_FOUND TRUE PARENT_SCOPE)
+endfunction(_NEON2SSESource_import)
+
+_NEON2SSESource_import()
diff --git a/infra/nncc/cmake/packages/ONNXProto/CMakeLists.txt b/infra/nncc/cmake/packages/ONNXProto/CMakeLists.txt
new file mode 100644
index 000000000..8291958a4
--- /dev/null
+++ b/infra/nncc/cmake/packages/ONNXProto/CMakeLists.txt
@@ -0,0 +1,6 @@
+Protobuf_Generate(ONNX_PROTO "${CMAKE_CURRENT_BINARY_DIR}/generated" "${ONNXSource_DIR}" "onnx/onnx.proto")
+
+add_library(onnxproto STATIC ${ONNX_PROTO_SOURCES})
+set_target_properties(onnxproto PROPERTIES POSITION_INDEPENDENT_CODE ON)
+target_include_directories(onnxproto PUBLIC ${ONNX_PROTO_INCLUDE_DIRS})
+target_link_libraries(onnxproto libprotobuf)
diff --git a/infra/nncc/cmake/packages/ONNXProtoConfig.cmake b/infra/nncc/cmake/packages/ONNXProtoConfig.cmake
new file mode 100644
index 000000000..a6dc7a01d
--- /dev/null
+++ b/infra/nncc/cmake/packages/ONNXProtoConfig.cmake
@@ -0,0 +1,25 @@
+function(_ONNXProto_import)
+  nncc_find_package(ONNXSource EXACT 1.3.0 QUIET)
+
+  if(NOT ONNXSource_FOUND)
+    set(ONNXProto_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT ONNXSource_FOUND)
+
+  nncc_find_package(Protobuf QUIET)
+
+  if(NOT Protobuf_FOUND)
+    set(ONNXProto_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT Protobuf_FOUND)
+
+  if(NOT TARGET onnxproto)
+    nncc_include(ExternalProjectTools)
+    add_extdirectory("${CMAKE_CURRENT_LIST_DIR}/ONNXProto" onnxproto)
+  endif(NOT TARGET onnxproto)
+
+  message(STATUS "Found ONNX: TRUE")
+  set(ONNXProto_FOUND TRUE PARENT_SCOPE)
+endfunction(_ONNXProto_import)
+
+_ONNXProto_import()
diff --git a/infra/nncc/cmake/packages/ONNXRuntimeConfig.cmake b/infra/nncc/cmake/packages/ONNXRuntimeConfig.cmake
new file mode 100644
index 000000000..cfccfff88
--- /dev/null
+++ b/infra/nncc/cmake/packages/ONNXRuntimeConfig.cmake
@@ -0,0 +1,29 @@
+set(ONNXRUNTIME_PREFIX "/usr" CACHE PATH "The location of pre-installed ONNX Runtime library")
+
+# TODO Download ONNXRuntime binaries
+
+function(_ONNXRuntime_import)
+  # Find the header & lib
+  find_library(ONNXRuntime_LIB NAMES onnxruntime PATHS "${ONNXRUNTIME_PREFIX}/lib")
+  find_path(ONNXRuntime_INCLUDE_DIR NAMES onnxruntime_c_api.h PATHS "${ONNXRUNTIME_PREFIX}/include")
+
+  if(NOT ONNXRuntime_LIB OR NOT ONNXRuntime_INCLUDE_DIR)
+    message(STATUS "Found ONNXRuntime: FALSE")
+
+    set(ONNXRuntime_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT ONNXRuntime_LIB OR NOT ONNXRuntime_INCLUDE_DIR)
+
+  # Add onnxruntime target
+  if(NOT TARGET onnxruntime)
+    message(STATUS "Found ONNXRuntime (include: ${ONNXRuntime_INCLUDE_DIR}, library: ${ONNXRuntime_LIB})")
+
+    add_library(onnxruntime INTERFACE)
+    target_link_libraries(onnxruntime INTERFACE ${ONNXRuntime_LIB})
+    target_include_directories(onnxruntime INTERFACE ${ONNXRuntime_INCLUDE_DIR})
+  endif(NOT TARGET onnxruntime)
+
+  set(ONNXRuntime_FOUND TRUE PARENT_SCOPE)
+endfunction(_ONNXRuntime_import)
+
+_ONNXRuntime_import()
diff --git a/infra/nncc/cmake/packages/ONNXSource-1.3.0/ONNXSourceConfig.cmake b/infra/nncc/cmake/packages/ONNXSource-1.3.0/ONNXSourceConfig.cmake
new file mode 100644
index 000000000..0ff33232d
--- /dev/null
+++ b/infra/nncc/cmake/packages/ONNXSource-1.3.0/ONNXSourceConfig.cmake
@@ -0,0 +1,20 @@
+function(_ONNXSource_import)
+  if(NOT DOWNLOAD_ONNX)
+    set(ONNXSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_ONNX)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  envoption(ONNX_1_3_0_URL https://github.com/onnx/onnx/archive/v1.3.0.zip)
+
+  ExternalSource_Download(ONNX DIRNAME ONNX-1.3.0
+                               CHECKSUM MD5=5d588ffcf43bb18f99a67c015c97f92e
+                               URL ${ONNX_1_3_0_URL})
+
+  set(ONNXSource_DIR ${ONNX_SOURCE_DIR} PARENT_SCOPE)
+  set(ONNXSource_FOUND TRUE PARENT_SCOPE)
+endfunction(_ONNXSource_import)
+
+_ONNXSource_import()
diff --git a/infra/nncc/cmake/packages/ONNXSource-1.3.0/ONNXSourceConfigVersion.cmake b/infra/nncc/cmake/packages/ONNXSource-1.3.0/ONNXSourceConfigVersion.cmake
new file mode 100644
index 000000000..0ecf9d222
--- /dev/null
+++ b/infra/nncc/cmake/packages/ONNXSource-1.3.0/ONNXSourceConfigVersion.cmake
@@ -0,0 +1,10 @@
+set(PACKAGE_VERSION "1.3.0")
+set(PACKAGE_VERSION_EXACT FALSE)
+set(PACKAGE_VERSION_COMPATIBLE FALSE)
+set(PACKAGE_VERSION_UNSUITABLE TRUE)
+
+if(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
+  set(PACKAGE_VERSION_EXACT TRUE)
+  set(PACKAGE_VERSION_COMPATIBLE TRUE)
+  set(PACKAGE_VERSION_UNSUITABLE FALSE)
+endif(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
diff --git a/infra/nncc/cmake/packages/ONNXSource-1.4.1/ONNXSourceConfig.cmake b/infra/nncc/cmake/packages/ONNXSource-1.4.1/ONNXSourceConfig.cmake
new file mode 100644
index 000000000..b60e9446e
--- /dev/null
+++ b/infra/nncc/cmake/packages/ONNXSource-1.4.1/ONNXSourceConfig.cmake
@@ -0,0 +1,20 @@
+function(_ONNXSource_import)
+  if(NOT DOWNLOAD_ONNX)
+    set(ONNXSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_ONNX)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  envoption(ONNX_1_4_1_URL https://github.com/onnx/onnx/archive/v1.4.1.zip)
+
+  ExternalSource_Download(ONNX DIRNAME ONNX-1.4.1
+                               CHECKSUM MD5=604b43a22fbc758f32ae9f3a4fb9d397
+                               URL ${ONNX_1_4_1_URL})
+
+  set(ONNXSource_DIR ${ONNX_SOURCE_DIR} PARENT_SCOPE)
+  set(ONNXSource_FOUND TRUE PARENT_SCOPE)
+endfunction(_ONNXSource_import)
+
+_ONNXSource_import()
diff --git a/infra/nncc/cmake/packages/ONNXSource-1.4.1/ONNXSourceConfigVersion.cmake b/infra/nncc/cmake/packages/ONNXSource-1.4.1/ONNXSourceConfigVersion.cmake
new file mode 100644
index 000000000..802b464da
--- /dev/null
+++ b/infra/nncc/cmake/packages/ONNXSource-1.4.1/ONNXSourceConfigVersion.cmake
@@ -0,0 +1,10 @@
+set(PACKAGE_VERSION "1.4.1")
+set(PACKAGE_VERSION_EXACT FALSE)
+set(PACKAGE_VERSION_COMPATIBLE FALSE)
+set(PACKAGE_VERSION_UNSUITABLE TRUE)
+
+if(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
+  set(PACKAGE_VERSION_EXACT TRUE)
+  set(PACKAGE_VERSION_COMPATIBLE TRUE)
+  set(PACKAGE_VERSION_UNSUITABLE FALSE)
+endif(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
diff --git a/infra/nncc/cmake/packages/ONNXSource-1.5.0/ONNXSourceConfig.cmake b/infra/nncc/cmake/packages/ONNXSource-1.5.0/ONNXSourceConfig.cmake
new file mode 100644
index 000000000..7f890e911
--- /dev/null
+++ b/infra/nncc/cmake/packages/ONNXSource-1.5.0/ONNXSourceConfig.cmake
@@ -0,0 +1,20 @@
+function(_ONNXSource_import)
+  if(NOT DOWNLOAD_ONNX)
+    set(ONNXSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_ONNX)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  envoption(ONNX_1_5_0_URL https://github.com/onnx/onnx/archive/v1.5.0.zip)
+
+  ExternalSource_Download(ONNX DIRNAME ONNX-1.5.0
+                               CHECKSUM MD5=1a5fe554569a3819705b26de33d8fe02
+                               URL ${ONNX_1_5_0_URL})
+
+  set(ONNXSource_DIR ${ONNX_SOURCE_DIR} PARENT_SCOPE)
+  set(ONNXSource_FOUND TRUE PARENT_SCOPE)
+endfunction(_ONNXSource_import)
+
+_ONNXSource_import()
diff --git a/infra/nncc/cmake/packages/ONNXSource-1.5.0/ONNXSourceConfigVersion.cmake b/infra/nncc/cmake/packages/ONNXSource-1.5.0/ONNXSourceConfigVersion.cmake
new file mode 100644
index 000000000..70b2804b0
--- /dev/null
+++ b/infra/nncc/cmake/packages/ONNXSource-1.5.0/ONNXSourceConfigVersion.cmake
@@ -0,0 +1,10 @@
+set(PACKAGE_VERSION "1.5.0")
+set(PACKAGE_VERSION_EXACT FALSE)
+set(PACKAGE_VERSION_COMPATIBLE FALSE)
+set(PACKAGE_VERSION_UNSUITABLE TRUE)
+
+if(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
+  set(PACKAGE_VERSION_EXACT TRUE)
+  set(PACKAGE_VERSION_COMPATIBLE TRUE)
+  set(PACKAGE_VERSION_UNSUITABLE FALSE)
+endif(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
diff --git a/infra/nncc/cmake/packages/ProtobufConfig.cmake b/infra/nncc/cmake/packages/ProtobufConfig.cmake
new file mode 100644
index 000000000..9064d1140
--- /dev/null
+++ b/infra/nncc/cmake/packages/ProtobufConfig.cmake
@@ -0,0 +1,139 @@
+# NOTE This function is unused, but remains for future reference
+function(_Protobuf_module_import)
+  # Let's use find_package here not to export unnecessary definitions
+  find_package(Protobuf MODULE QUIET)
+
+  if(NOT PROTOBUF_FOUND)
+    set(Protobuf_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT PROTOBUF_FOUND)
+
+  if(NOT TARGET protoc)
+    add_executable(protoc IMPORTED)
+    set_target_properties(protoc PROPERTIES IMPORTED_LOCATION ${PROTOBUF_PROTOC_EXECUTABLE})
+   endif(NOT TARGET protoc)
+
+  if(NOT TARGET libprotobuf)
+    add_library(libprotobuf INTERFACE)
+    target_include_directories(libprotobuf INTERFACE ${PROTOBUF_INCLUDE_DIRS})
+    target_link_libraries(libprotobuf INTERFACE ${PROTOBUF_LIBRARIES})
+  endif(NOT TARGET libprotobuf)
+
+  set(Protobuf_FOUND TRUE PARENT_SCOPE)
+endfunction(_Protobuf_module_import)
+
+function(_Protobuf_import)
+  # Let's use find_package here not to export unnecessary definitions
+  # NOTE Here we use "exact" match to avoid possible infinite loop
+  find_package(protobuf EXACT 3.5.2 QUIET)
+
+  if(NOT protobuf_FOUND)
+    set(Protobuf_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT protobuf_FOUND)
+
+  if(NOT TARGET libprotobuf)
+    add_library(libprotobuf INTERFACE)
+    target_link_libraries(libprotobuf INTERFACE protobuf::libprotobuf)
+  endif(NOT TARGET libprotobuf)
+
+  set(Protobuf_FOUND TRUE PARENT_SCOPE)
+endfunction(_Protobuf_import)
+
+function(_Protobuf_build)
+  if(NOT BUILD_PROTOBUF)
+    return()
+  endif(NOT BUILD_PROTOBUF)
+
+  nncc_find_package(ProtobufSource QUIET)
+
+  if(NOT ProtobufSource_FOUND)
+    # Source is not available
+    return()
+  endif(NOT ProtobufSource_FOUND)
+
+  # TODO Introduce helper functions
+  set(PROTOBUF_BUILD_DIR "${CMAKE_BINARY_DIR}/externals/PROTOBUF/build")
+  set(PROTOBUF_INSTALL_DIR "${NNCC_OVERLAY_DIR}")
+
+  set(STAMP_PATH "${PROTOBUF_INSTALL_DIR}/PROTOBUF.stamp")
+  set(LOG_PATH "${PROTOBUF_INSTALL_DIR}/PROTOBUF.log")
+
+  if(EXISTS ${STAMP_PATH})
+    return()
+  endif(EXISTS ${STAMP_PATH})
+
+  message(STATUS "Build Protocol Buffer from ${ProtobufSource_DIR}")
+
+  file(MAKE_DIRECTORY ${PROTOBUF_BUILD_DIR})
+  file(MAKE_DIRECTORY ${PROTOBUF_INSTALL_DIR})
+
+  # NOTE Do NOT retry Protocol Buffer build
+  file(WRITE "${STAMP_PATH}")
+
+  execute_process(COMMAND ${CMAKE_COMMAND}
+                            -DCMAKE_INSTALL_PREFIX=${PROTOBUF_INSTALL_DIR}
+                            -DCMAKE_BUILD_TYPE=Release
+                            -DCMAKE_CXX_FLAGS="-fPIC"
+                            -Dprotobuf_BUILD_TESTS=OFF
+                            -Dprotobuf_WITH_ZLIB=OFF
+                            "${ProtobufSource_DIR}/cmake"
+                  OUTPUT_FILE ${LOG_PATH}
+                  ERROR_FILE ${LOG_PATH}
+                  WORKING_DIRECTORY ${PROTOBUF_BUILD_DIR}
+                  RESULT_VARIABLE CONFIGURE_EXITCODE)
+
+  if(NOT CONFIGURE_EXITCODE EQUAL 0)
+    message(FATAL_ERROR "Fail to configure Protocol Buffer (check '${LOG_PATH}' for details)")
+  endif(NOT CONFIGURE_EXITCODE EQUAL 0)
+
+  execute_process(COMMAND ${CMAKE_COMMAND} --build . -- install
+                  OUTPUT_FILE ${LOG_PATH}
+                  ERROR_FILE ${LOG_PATH}
+                  WORKING_DIRECTORY ${PROTOBUF_BUILD_DIR}
+                  RESULT_VARIABLE BUILD_AND_INSTALL_EXITCODE)
+
+  if(NOT BUILD_AND_INSTALL_EXITCODE EQUAL 0)
+    message(FATAL_ERROR "Fail to build/install Protocol Buffer (check '${LOG_PATH}' for details)")
+  endif(NOT BUILD_AND_INSTALL_EXITCODE EQUAL 0)
+
+  message(STATUS "Succeeded in building Protocol Buffer")
+endfunction(_Protobuf_build)
+
+_Protobuf_build()
+_Protobuf_import()
+
+if(Protobuf_FOUND)
+  function(Protobuf_Generate PREFIX OUTPUT_DIR PROTO_DIR)
+    get_filename_component(abs_output_dir ${OUTPUT_DIR} ABSOLUTE)
+    get_filename_component(abs_proto_dir ${PROTO_DIR} ABSOLUTE)
+
+    # Let's reset variables before using them
+    # NOTE This DOES NOT AFFECT variables in the parent scope
+    unset(PROTO_FILES)
+    unset(OUTPUT_FILES)
+
+    foreach(proto ${ARGN})
+      get_filename_component(fil "${proto}" NAME)
+      get_filename_component(dir "${proto}" DIRECTORY)
+
+      get_filename_component(fil_we "${fil}" NAME_WE)
+
+      get_filename_component(abs_fil "${abs_proto_base}/${proto}" ABSOLUTE)
+      get_filename_component(abs_dir "${abs_fil}" DIRECTORY)
+
+      list(APPEND PROTO_FILES "${abs_proto_dir}/${proto}")
+      list(APPEND OUTPUT_FILES "${abs_output_dir}/${dir}/${fil_we}.pb.h")
+      list(APPEND OUTPUT_FILES "${abs_output_dir}/${dir}/${fil_we}.pb.cc")
+    endforeach()
+
+    add_custom_command(OUTPUT ${OUTPUT_FILES}
+                       COMMAND ${CMAKE_COMMAND} -E make_directory "${abs_output_dir}"
+                       COMMAND "$<TARGET_FILE:protobuf::protoc>" --cpp_out "${abs_output_dir}" -I "${abs_proto_dir}" ${PROTO_FILES}
+                       DEPENDS ${PROTO_FILES})
+
+    set(${PREFIX}_SOURCES ${OUTPUT_FILES} PARENT_SCOPE)
+    set(${PREFIX}_INCLUDE_DIRS ${abs_output_dir} PARENT_SCOPE)
+    set(${PREFIX}_LIBRARIES protobuf::libprotobuf PARENT_SCOPE)
+  endfunction(Protobuf_Generate)
+endif(Protobuf_FOUND)
diff --git a/infra/nncc/cmake/packages/ProtobufSourceConfig.cmake b/infra/nncc/cmake/packages/ProtobufSourceConfig.cmake
new file mode 100644
index 000000000..89176eb61
--- /dev/null
+++ b/infra/nncc/cmake/packages/ProtobufSourceConfig.cmake
@@ -0,0 +1,18 @@
+function(_ProtobufSource_import)
+  if(NOT DOWNLOAD_PROTOBUF)
+    set(ProtobufSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_PROTOBUF)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  envoption(PROTOBUF_URL https://github.com/protocolbuffers/protobuf/archive/v3.5.2.tar.gz)
+
+  ExternalSource_Download(PROTOBUF ${PROTOBUF_URL})
+
+  set(ProtobufSource_DIR ${PROTOBUF_SOURCE_DIR} PARENT_SCOPE)
+  set(ProtobufSource_FOUND TRUE PARENT_SCOPE)
+endfunction(_ProtobufSource_import)
+
+_ProtobufSource_import()
diff --git a/infra/nncc/cmake/packages/PytorchSourceConfig.cmake b/infra/nncc/cmake/packages/PytorchSourceConfig.cmake
new file mode 100644
index 000000000..c28bc7c00
--- /dev/null
+++ b/infra/nncc/cmake/packages/PytorchSourceConfig.cmake
@@ -0,0 +1,18 @@
+function(_PytorchSource_import)
+  if(NOT DOWNLOAD_PYTORCH)
+    set(PytorchSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_PYTORCH)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  envoption(PYTORCH_URL https://github.com/pytorch/pytorch/archive/v0.4.1.tar.gz) 
+
+  ExternalSource_Download(PYTORCH ${PYTORCH_URL})
+
+  set(PytorchSource_DIR ${PYTORCH_SOURCE_DIR} PARENT_SCOPE)
+  set(PytorchSource_FOUND ${DOWNLOAD_PYTORCH} PARENT_SCOPE)
+endfunction(_PytorchSource_import)
+
+_PytorchSource_import()
diff --git a/infra/nncc/cmake/packages/TensorFlowConfig.cmake b/infra/nncc/cmake/packages/TensorFlowConfig.cmake
new file mode 100644
index 000000000..14d2fdf26
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowConfig.cmake
@@ -0,0 +1,53 @@
+set(TENSORFLOW_PREFIX "/usr" CACHE PATH "The location of pre-installed TensorFlow library")
+set(TENSORFLOW_VERSION_REQUIRED "1.12.0")
+
+# TODO Build TensorFlow from the (downloaded) source
+
+function(_TensorFlow_import)
+  # Find the header & lib
+  find_library(TensorFlow_LIB NAMES tensorflow PATHS "${TENSORFLOW_PREFIX}/lib")
+  find_path(TensorFlow_INCLUDE_DIR NAMES tensorflow/c/c_api.h PATHS "${TENSORFLOW_PREFIX}/include")
+
+  if(NOT TensorFlow_LIB OR NOT TensorFlow_INCLUDE_DIR)
+    message(STATUS "Found TensorFlow: FALSE")
+
+    set(TensorFlow_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT TensorFlow_LIB OR NOT TensorFlow_INCLUDE_DIR)
+
+  # Check TensorFlow version
+  try_run(RUN_RESULT_VAR COMPILE_RESULT_VAR
+    ${CMAKE_BINARY_DIR}
+    ${CMAKE_CURRENT_LIST_DIR}/TensorFlowVersionChecker.c
+    COMPILE_DEFINITIONS -I${TensorFlow_INCLUDE_DIR}
+    LINK_LIBRARIES ${TensorFlow_LIB}
+    ARGS ${TENSORFLOW_VERSION_REQUIRED})
+
+  if(NOT COMPILE_RESULT_VAR)
+    message(STATUS "Failed to build TensorFlowVersionChecker. Your libtensorflow may be built on different version of Ubuntu.")
+    message(STATUS "Found TensorFlow: FALSE")
+    set(TensorFlow_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT COMPILE_RESULT_VAR)
+
+  if(NOT RUN_RESULT_VAR EQUAL 0)
+    message(STATUS "you need tensorflow version ${TENSORFLOW_VERSION_REQUIRED}")
+    message(STATUS "Found TensorFlow: FALSE")
+    set(TensorFlow_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT RUN_RESULT_VAR EQUAL 0)
+
+  # Add tensorflow target (if necessary)
+  if(NOT TARGET tensorflow)
+    message(STATUS "Found TensorFlow (include: ${TensorFlow_INCLUDE_DIR}, library: ${TensorFlow_LIB})")
+
+    # NOTE IMPORTED target may be more appropriate for this case
+    add_library(tensorflow INTERFACE)
+    target_link_libraries(tensorflow INTERFACE ${TensorFlow_LIB})
+    target_include_directories(tensorflow INTERFACE ${TensorFlow_INCLUDE_DIR})
+  endif(NOT TARGET tensorflow)
+
+  set(TensorFlow_FOUND TRUE PARENT_SCOPE)
+endfunction(_TensorFlow_import)
+
+_TensorFlow_import()
diff --git a/infra/nncc/cmake/packages/TensorFlowLite-1.12/Lite/CMakeLists.txt b/infra/nncc/cmake/packages/TensorFlowLite-1.12/Lite/CMakeLists.txt
new file mode 100644
index 000000000..068022fcf
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowLite-1.12/Lite/CMakeLists.txt
@@ -0,0 +1,41 @@
+# NOTE The followings SHOULD be defined before using this CMakeLists.txt
+#
+#  'TensorFlowSource_DIR' variable
+#  'FlatBuffersSource_DIR' variable
+#  'eigen' target
+#  'gemmlowp' target
+#  'neon2sse' target
+#  'farmhash' target
+#  'abseil' target
+#
+message(STATUS "Build TensorFlow Lite from ${TensorFlowSource_DIR}")
+
+set(TensorFlowLiteSource_DIR ${TensorFlowSource_DIR}/tensorflow/contrib/lite)
+
+file(GLOB CORE_SRCS "${TensorFlowLiteSource_DIR}/*.c" "${TensorFlowLiteSource_DIR}/*.cc" "${TensorFlowLiteSource_DIR}/c/*.c" "${TensorFlowLiteSource_DIR}/core/api/*.cc")
+file(GLOB_RECURSE CORE_TESTS "${TensorFlowLiteSource_DIR}/*test*.cc")
+list(REMOVE_ITEM CORE_SRCS ${CORE_TESTS})
+
+file(GLOB_RECURSE KERNEL_SRCS "${TensorFlowLiteSource_DIR}/kernels/*.cc")
+file(GLOB_RECURSE KERNEL_TESTS "${TensorFlowLiteSource_DIR}/kernels/*test*.cc")
+list(REMOVE_ITEM KERNEL_SRCS ${KERNEL_TESTS})
+# Exclude buggy kernel(s) from the build
+#list(REMOVE_ITEM KERNEL_SRCS "${TensorFlowLiteSource_DIR}/kernels/internal/spectrogram.cc")
+
+list(APPEND SRCS ${CORE_SRCS})
+list(APPEND SRCS ${KERNEL_SRCS})
+
+include(CheckCXXCompilerFlag)
+
+CHECK_CXX_COMPILER_FLAG(-Wno-extern-c-compat COMPILER_SUPPORT_EXTERN_C_COMPAT_WARNING)
+
+add_library(tensorflowlite-1.12 ${SRCS})
+set_target_properties(tensorflowlite-1.12 PROPERTIES POSITION_INDEPENDENT_CODE ON)
+target_include_directories(tensorflowlite-1.12 PUBLIC ${TensorFlowSource_DIR})
+target_include_directories(tensorflowlite-1.12 PUBLIC ${FlatBuffersSource_DIR}/include)
+target_compile_options(tensorflowlite-1.12 PUBLIC -Wno-ignored-attributes)
+if(COMPILER_SUPPORT_EXTERN_C_COMPAT_WARNING)
+  target_compile_options(tensorflowlite-1.12 PUBLIC -Wno-extern-c-compat)
+endif(COMPILER_SUPPORT_EXTERN_C_COMPAT_WARNING)
+target_compile_definitions(tensorflowlite-1.12 PUBLIC "GEMMLOWP_ALLOW_SLOW_SCALAR_FALLBACK")
+target_link_libraries(tensorflowlite-1.12 eigen gemmlowp neon2sse farmhash abseil dl)
diff --git a/infra/nncc/cmake/packages/TensorFlowLite-1.12/TensorFlowLiteConfig.cmake b/infra/nncc/cmake/packages/TensorFlowLite-1.12/TensorFlowLiteConfig.cmake
new file mode 100644
index 000000000..2f4ff0a46
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowLite-1.12/TensorFlowLiteConfig.cmake
@@ -0,0 +1,62 @@
+function(_TensorFlowLite_import)
+  nncc_find_package(TensorFlowSource EXACT 1.12 QUIET)
+
+  if(NOT TensorFlowSource_FOUND)
+    set(TensorFlowLite_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT TensorFlowSource_FOUND)
+
+  # TensorFlow 1.12 downloads FlatBuffers from https://github.com/google/flatbuffers/archive/1f5eae5d6a1.tar.gz
+  #
+  # Let's use 1.10 released in 2018.10 (compatible with 1f5eae5d6a1).
+  nncc_find_package(FlatBuffersSource EXACT 1.10 QUIET)
+
+  if(NOT FlatBuffersSource_FOUND)
+    set(TensorFlowLite_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT FlatBuffersSource_FOUND)
+
+  nncc_find_package(Farmhash QUIET)
+
+  if(NOT Farmhash_FOUND)
+    set(TensorFlowLite_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT Farmhash_FOUND)
+
+  nncc_find_package(Eigen QUIET)
+
+  if(NOT Eigen_FOUND)
+    set(TensorFlowLite_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT Eigen_FOUND)
+
+  nncc_find_package(GEMMLowp QUIET)
+
+  if(NOT GEMMLowp_FOUND)
+    set(TensorFlowLite_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT GEMMLowp_FOUND)
+
+  nncc_find_package(NEON2SSE QUIET)
+
+  if(NOT NEON2SSE_FOUND)
+    set(TensorFlowLite_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT NEON2SSE_FOUND)
+
+  nncc_find_package(Abseil QUIET)
+
+  if(NOT Abseil_FOUND)
+    set(TensorFlowLite_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT Abseil_FOUND)
+
+  if(NOT TARGET tensorflowlite-1.12)
+    nncc_include(ExternalProjectTools)
+    add_extdirectory("${CMAKE_CURRENT_LIST_DIR}/Lite" tflite-1.12)
+  endif(NOT TARGET tensorflowlite-1.12)
+
+  set(TensorFlowLite_FOUND TRUE PARENT_SCOPE)
+endfunction(_TensorFlowLite_import)
+
+_TensorFlowLite_import()
diff --git a/infra/nncc/cmake/packages/TensorFlowLite-1.12/TensorFlowLiteConfigVersion.cmake b/infra/nncc/cmake/packages/TensorFlowLite-1.12/TensorFlowLiteConfigVersion.cmake
new file mode 100644
index 000000000..4a57b655b
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowLite-1.12/TensorFlowLiteConfigVersion.cmake
@@ -0,0 +1,9 @@
+set(PACKAGE_VERSION "1.12")
+set(PACKAGE_VERSION_EXACT FALSE)
+set(PACKAGE_VERSION_COMPATIBLE FALSE)
+set(PACKAGE_VERSION_UNSUITABLE TRUE)
+
+if(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
+  set(PACKAGE_VERSION_EXACT TRUE)
+  set(PACKAGE_VERSION_UNSUITABLE FALSE)
+endif(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
diff --git a/infra/nncc/cmake/packages/TensorFlowLite-1.7/Lite/CMakeLists.txt b/infra/nncc/cmake/packages/TensorFlowLite-1.7/Lite/CMakeLists.txt
new file mode 100644
index 000000000..c5e89eebe
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowLite-1.7/Lite/CMakeLists.txt
@@ -0,0 +1,38 @@
+# NOTE The followings SHOULD be defined before using this CMakeLists.txt
+#
+#  'TensorFlowSource_DIR' variable
+#  'FlatBuffersSource_DIR' variable
+#  'eigen' target
+#  'gemmlowp' target
+#  'neon2sse' target
+#  'farmhash' target
+#
+set(TensorFlowLiteSource_DIR ${TensorFlowSource_DIR}/tensorflow/contrib/lite)
+
+file(GLOB CORE_SRCS "${TensorFlowLiteSource_DIR}/*.c" "${TensorFlowLiteSource_DIR}/*.cc")
+file(GLOB CORE_TESTS "${TensorFlowLiteSource_DIR}/*test*.cc")
+list(REMOVE_ITEM CORE_SRCS ${CORE_TESTS})
+
+file(GLOB_RECURSE KERNEL_SRCS "${TensorFlowLiteSource_DIR}/kernels/*.cc")
+file(GLOB_RECURSE KERNEL_TESTS "${TensorFlowLiteSource_DIR}/kernels/*test*.cc")
+list(REMOVE_ITEM KERNEL_SRCS ${KERNEL_TESTS})
+# Exclude buggy kernel(s) from the build
+list(REMOVE_ITEM KERNEL_SRCS "${TensorFlowLiteSource_DIR}/kernels/internal/spectrogram.cc")
+
+list(APPEND SRCS ${CORE_SRCS})
+list(APPEND SRCS ${KERNEL_SRCS})
+
+include(CheckCXXCompilerFlag)
+
+CHECK_CXX_COMPILER_FLAG(-Wno-extern-c-compat COMPILER_SUPPORT_EXTERN_C_COMPAT_WARNING)
+
+add_library(tensorflowlite-1.7 ${SRCS})
+set_target_properties(tensorflowlite-1.7 PROPERTIES POSITION_INDEPENDENT_CODE ON)
+target_include_directories(tensorflowlite-1.7 PUBLIC ${TensorFlowSource_DIR})
+target_include_directories(tensorflowlite-1.7 PUBLIC ${FlatBuffersSource_DIR}/include)
+target_compile_options(tensorflowlite-1.7 PUBLIC -Wno-ignored-attributes)
+if(COMPILER_SUPPORT_EXTERN_C_COMPAT_WARNING)
+  target_compile_options(tensorflowlite-1.7 PUBLIC -Wno-extern-c-compat)
+endif(COMPILER_SUPPORT_EXTERN_C_COMPAT_WARNING)
+target_compile_definitions(tensorflowlite-1.7 PUBLIC "GEMMLOWP_ALLOW_SLOW_SCALAR_FALLBACK")
+target_link_libraries(tensorflowlite-1.7 eigen gemmlowp neon2sse farmhash dl)
diff --git a/infra/nncc/cmake/packages/TensorFlowLite-1.7/TensorFlowLiteConfig.cmake b/infra/nncc/cmake/packages/TensorFlowLite-1.7/TensorFlowLiteConfig.cmake
new file mode 100644
index 000000000..44bc817e1
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowLite-1.7/TensorFlowLiteConfig.cmake
@@ -0,0 +1,55 @@
+function(_TensorFlowLite_import)
+  nncc_find_package(TensorFlowSource EXACT 1.7 QUIET)
+
+  if(NOT TensorFlowSource_FOUND)
+    set(TensorFlowLite_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT TensorFlowSource_FOUND)
+
+  # TensorFlow 1.7 downloads FlatBuffers from https://github.com/google/flatbuffers/archive/971a68110e4.tar.gz
+  #
+  # FlatBuffers 1.8 is compatible with 971a68110e4.
+  nncc_find_package(FlatBuffersSource EXACT 1.8 QUIET)
+
+  if(NOT FlatBuffersSource_FOUND)
+    set(TensorFlowLite_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT FlatBuffersSource_FOUND)
+
+  nncc_find_package(Farmhash QUIET)
+
+  if(NOT Farmhash_FOUND)
+    set(TensorFlowLite_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT Farmhash_FOUND)
+
+  nncc_find_package(Eigen QUIET)
+
+  if(NOT Eigen_FOUND)
+    set(TensorFlowLite_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT Eigen_FOUND)
+
+  nncc_find_package(GEMMLowp QUIET)
+
+  if(NOT GEMMLowp_FOUND)
+    set(TensorFlowLite_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT GEMMLowp_FOUND)
+
+  nncc_find_package(NEON2SSE QUIET)
+
+  if(NOT NEON2SSE_FOUND)
+    set(TensorFlowLite_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT NEON2SSE_FOUND)
+
+  if(NOT TARGET tensorflowlite-1.7)
+    nncc_include(ExternalProjectTools)
+    add_extdirectory("${CMAKE_CURRENT_LIST_DIR}/Lite" tflite-1.7)
+  endif(NOT TARGET tensorflowlite-1.7)
+
+  set(TensorFlowLite_FOUND TRUE PARENT_SCOPE)
+endfunction(_TensorFlowLite_import)
+
+_TensorFlowLite_import()
diff --git a/infra/nncc/cmake/packages/TensorFlowLite-1.7/TensorFlowLiteConfigVersion.cmake b/infra/nncc/cmake/packages/TensorFlowLite-1.7/TensorFlowLiteConfigVersion.cmake
new file mode 100644
index 000000000..46609dc10
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowLite-1.7/TensorFlowLiteConfigVersion.cmake
@@ -0,0 +1,9 @@
+set(PACKAGE_VERSION "1.7")
+set(PACKAGE_VERSION_EXACT FALSE)
+set(PACKAGE_VERSION_COMPATIBLE FALSE)
+set(PACKAGE_VERSION_UNSUITABLE TRUE)
+
+if(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
+  set(PACKAGE_VERSION_EXACT TRUE)
+  set(PACKAGE_VERSION_UNSUITABLE FALSE)
+endif(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
diff --git a/infra/nncc/cmake/packages/TensorFlowProtoText-1.12/TensorFlowProtoTextConfig.cmake b/infra/nncc/cmake/packages/TensorFlowProtoText-1.12/TensorFlowProtoTextConfig.cmake
new file mode 100644
index 000000000..5963ce418
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowProtoText-1.12/TensorFlowProtoTextConfig.cmake
@@ -0,0 +1,104 @@
+function(_TensorFlowProtoText_import)
+  macro(require_package PKGNAME)
+    nncc_find_package(${PKGNAME} ${ARGN} QUIET)
+    if(NOT ${PKGNAME}_FOUND)
+      message(STATUS "Found TensorFlowProtoText: FALSE (${PKGNAME} is missing)")
+      set(TensorFlowProtoText_FOUND FALSE PARENT_SCOPE)
+      return()
+    endif(NOT ${PKGNAME}_FOUND)
+  endmacro(require_package)
+
+  require_package(TensorFlowSource EXACT 1.12)
+  require_package(Abseil)
+  require_package(Eigen)
+  require_package(Protobuf)
+  require_package(GoogleDoubleConversion)
+  require_package(GoogleNSync)
+
+  if(NOT TARGET tensorflow-prototext-1.12)
+    nncc_include(ExternalProjectTools)
+    add_extdirectory("${CMAKE_CURRENT_LIST_DIR}/build" TensorFlowProtoText-1.12)
+  endif(NOT TARGET tensorflow-prototext-1.12)
+
+  set(TensorFlowProtoText_FOUND TRUE PARENT_SCOPE)
+endfunction(_TensorFlowProtoText_import)
+
+_TensorFlowProtoText_import()
+
+if(TensorFlowProtoText_FOUND)
+  # CMAKE_CURRENT_LIST_DIR
+  #
+  # ... The value has dynamic scope. ... Therefore the value of the variable inside a macro
+  # or function is the directory of the file invoking the bottom-most entry on the call stack,
+  # not the directory of the file containing the macro or function definition.
+  #
+  # Reference: https://cmake.org/cmake/help/v3.1/variable/CMAKE_CURRENT_LIST_DIR.html
+  set(TENSORLFLOW_PROTO_TEXT_1_12_CMAKE_DIR
+    "${CMAKE_CURRENT_LIST_DIR}" CACHE INTERNAL
+    "Where to find make_directories"
+  )
+
+  # Comments from "gen_proto_text_functions.cc"
+  # >
+  # > Main program to take input protos and write output pb_text source files that
+  # > contain generated proto text input and output functions.
+  # >
+  # > Main expects:
+  # > - First argument is output path
+  # > - Second argument is the relative path of the protos to the root. E.g.,
+  # >   for protos built by a rule in tensorflow/core, this will be
+  # >   tensorflow/core.
+  # > - Then any number of source proto file names, plus one source name must be
+  # >   placeholder.txt from this gen tool's package.  placeholder.txt is
+  # >   ignored for proto resolution, but is used to determine the root at which
+  # >   the build tool has placed the source proto files.
+  # >
+  function(ProtoText_Generate PREFIX OUTPUT_DIR)
+    # THIS SHOULD SUCCEED!
+    nncc_find_package(TensorFlowSource EXACT 1.12 REQUIRED)
+
+    set(OUTPUT_REL "tensorflow")
+    set(PROTO_DIR "${TensorFlowSource_DIR}")
+
+    set(PROTO_INPUTS ${ARGN})
+    list(APPEND PROTO_INPUTS "tensorflow/tools/proto_text/placeholder.txt")
+
+    get_filename_component(abs_output_dir ${OUTPUT_DIR} ABSOLUTE)
+    get_filename_component(abs_proto_dir ${TensorFlowSource_DIR} ABSOLUTE)
+
+    # Let's reset variables before using them
+    # NOTE This DOES NOT AFFECT variables in the parent scope
+    unset(PROTO_FILES)
+    unset(OUTPUT_DIRS)
+    unset(OUTPUT_FILES)
+
+    foreach(proto ${PROTO_INPUTS})
+      get_filename_component(fil "${proto}" NAME)
+      get_filename_component(dir "${proto}" DIRECTORY)
+
+      get_filename_component(fil_we "${fil}" NAME_WE)
+
+      get_filename_component(abs_fil "${abs_proto_base}/${proto}" ABSOLUTE)
+      get_filename_component(abs_dir "${abs_fil}" DIRECTORY)
+
+      list(APPEND PROTO_FILES "${abs_proto_dir}/${proto}")
+
+      if(NOT ${fil} STREQUAL "placeholder.txt")
+        list(APPEND OUTPUT_DIRS "${abs_output_dir}/${dir}")
+        list(APPEND OUTPUT_FILES "${abs_output_dir}/${dir}/${fil_we}.pb_text.h")
+        list(APPEND OUTPUT_FILES "${abs_output_dir}/${dir}/${fil_we}.pb_text-impl.h")
+        list(APPEND OUTPUT_FILES "${abs_output_dir}/${dir}/${fil_we}.pb_text.cc")
+      endif(NOT ${fil} STREQUAL "placeholder.txt")
+    endforeach()
+
+    add_custom_command(OUTPUT ${OUTPUT_FILES}
+      # "make_directory" in CMake 3.1 cannot create multiple directories at once.
+      # COMMAND ${CMAKE_COMMAND} -E make_directory ${OUTPUT_DIRS}
+      COMMAND "${TENSORLFLOW_PROTO_TEXT_1_12_CMAKE_DIR}/make_directories.sh" ${OUTPUT_DIRS}
+      COMMAND "$<TARGET_FILE:tensorflow-prototext-1.12>" "${abs_output_dir}/${OUTPUT_REL}" "${OUTPUT_REL}" ${PROTO_FILES}
+      DEPENDS ${PROTO_FILES})
+
+    set(${PREFIX}_SOURCES ${OUTPUT_FILES} PARENT_SCOPE)
+    set(${PREFIX}_INCLUDE_DIRS ${abs_output_dir} PARENT_SCOPE)
+  endfunction(ProtoText_Generate)
+endif(TensorFlowProtoText_FOUND)
diff --git a/infra/nncc/cmake/packages/TensorFlowProtoText-1.12/TensorFlowProtoTextConfigVersion.cmake b/infra/nncc/cmake/packages/TensorFlowProtoText-1.12/TensorFlowProtoTextConfigVersion.cmake
new file mode 100644
index 000000000..4a57b655b
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowProtoText-1.12/TensorFlowProtoTextConfigVersion.cmake
@@ -0,0 +1,9 @@
+set(PACKAGE_VERSION "1.12")
+set(PACKAGE_VERSION_EXACT FALSE)
+set(PACKAGE_VERSION_COMPATIBLE FALSE)
+set(PACKAGE_VERSION_UNSUITABLE TRUE)
+
+if(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
+  set(PACKAGE_VERSION_EXACT TRUE)
+  set(PACKAGE_VERSION_UNSUITABLE FALSE)
+endif(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
diff --git a/infra/nncc/cmake/packages/TensorFlowProtoText-1.12/build/CMakeLists.txt b/infra/nncc/cmake/packages/TensorFlowProtoText-1.12/build/CMakeLists.txt
new file mode 100644
index 000000000..86d6e6fe5
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowProtoText-1.12/build/CMakeLists.txt
@@ -0,0 +1,78 @@
+message(STATUS "Build TensorFlowProtoText from '${TensorFlowSource_DIR}'")
+
+#
+# Build "proto_text" tool
+#
+unset(SOURCE_FILES)
+
+macro(Source_Add RPATH)
+  list(APPEND SOURCE_FILES "${TensorFlowSource_DIR}/${RPATH}")
+endmacro(Source_Add)
+
+# This list comes from "tensorflow/contrib/makefile/proto_text_cc_files.txt"
+Source_Add(tensorflow/core/lib/core/status.cc)
+Source_Add(tensorflow/core/lib/core/threadpool.cc)
+Source_Add(tensorflow/core/lib/hash/hash.cc)
+Source_Add(tensorflow/core/lib/io/inputstream_interface.cc)
+Source_Add(tensorflow/core/lib/io/random_inputstream.cc)
+Source_Add(tensorflow/core/lib/io/buffered_inputstream.cc)
+Source_Add(tensorflow/core/lib/io/inputbuffer.cc)
+Source_Add(tensorflow/core/lib/io/iterator.cc)
+Source_Add(tensorflow/core/lib/io/path.cc)
+Source_Add(tensorflow/core/lib/strings/numbers.cc)
+Source_Add(tensorflow/core/lib/strings/scanner.cc)
+Source_Add(tensorflow/core/lib/strings/str_util.cc)
+Source_Add(tensorflow/core/lib/strings/strcat.cc)
+Source_Add(tensorflow/core/lib/strings/stringprintf.cc)
+Source_Add(tensorflow/core/lib/strings/proto_text_util.cc)
+Source_Add(tensorflow/core/platform/cpu_info.cc)
+Source_Add(tensorflow/core/platform/denormal.cc)
+Source_Add(tensorflow/core/platform/env.cc)
+Source_Add(tensorflow/core/platform/env_time.cc)
+Source_Add(tensorflow/core/platform/file_system.cc)
+Source_Add(tensorflow/core/platform/file_system_helper.cc)
+Source_Add(tensorflow/core/platform/protobuf_util.cc)
+Source_Add(tensorflow/core/platform/setround.cc)
+Source_Add(tensorflow/core/platform/tracing.cc)
+Source_Add(tensorflow/core/platform/posix/env.cc)
+Source_Add(tensorflow/core/platform/posix/env_time.cc)
+Source_Add(tensorflow/core/platform/posix/error.cc)
+Source_Add(tensorflow/core/platform/posix/load_library.cc)
+Source_Add(tensorflow/core/platform/posix/port.cc)
+Source_Add(tensorflow/core/platform/posix/posix_file_system.cc)
+Source_Add(tensorflow/core/platform/default/logging.cc)
+Source_Add(tensorflow/core/platform/default/mutex.cc)
+Source_Add(tensorflow/core/platform/default/protobuf.cc)
+
+Source_Add(tensorflow/tools/proto_text/gen_proto_text_functions_lib.cc)
+Source_Add(tensorflow/tools/proto_text/gen_proto_text_functions.cc)
+
+unset(PROTO_FILES)
+
+macro(Proto_Add RPATH)
+  list(APPEND PROTO_FILES "${RPATH}")
+endmacro(Proto_Add)
+
+Proto_Add(tensorflow/core/lib/core/error_codes.proto)
+Proto_Add(tensorflow/core/framework/types.proto)
+Proto_Add(tensorflow/core/framework/tensor.proto)
+Proto_Add(tensorflow/core/framework/tensor_shape.proto)
+Proto_Add(tensorflow/core/framework/summary.proto)
+Proto_Add(tensorflow/core/framework/resource_handle.proto)
+
+Protobuf_Generate(PROTO_TEXT_PROTO
+  "${CMAKE_CURRENT_BINARY_DIR}/generated/proto_text"
+  "${TensorFlowSource_DIR}"
+  ${PROTO_FILES}
+)
+
+add_executable(tensorflow-prototext-1.12 ${SOURCE_FILES} ${PROTO_TEXT_PROTO_SOURCES})
+target_include_directories(tensorflow-prototext-1.12 PRIVATE ${TensorFlowSource_DIR})
+target_include_directories(tensorflow-prototext-1.12 PRIVATE ${PROTO_TEXT_PROTO_INCLUDE_DIRS})
+
+target_link_libraries(tensorflow-prototext-1.12 PRIVATE abseil)
+target_link_libraries(tensorflow-prototext-1.12 PRIVATE eigen)
+target_link_libraries(tensorflow-prototext-1.12 PRIVATE ${PROTO_TEXT_PROTO_LIBRARIES})
+target_link_libraries(tensorflow-prototext-1.12 PRIVATE Google::DoubleConversion)
+target_link_libraries(tensorflow-prototext-1.12 PRIVATE Google::NSync)
+target_link_libraries(tensorflow-prototext-1.12 PRIVATE dl)
diff --git a/infra/nncc/cmake/packages/TensorFlowProtoText-1.12/make_directories.sh b/infra/nncc/cmake/packages/TensorFlowProtoText-1.12/make_directories.sh
new file mode 100644
index 000000000..1fb2ab683
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowProtoText-1.12/make_directories.sh
@@ -0,0 +1,6 @@
+#!/bin/bash
+
+while [[ $# -ne 0 ]]; do
+  DIR=$1; shift
+  mkdir -p "${DIR}"
+done
diff --git a/infra/nncc/cmake/packages/TensorFlowSource-1.12/TensorFlowSourceConfig.cmake b/infra/nncc/cmake/packages/TensorFlowSource-1.12/TensorFlowSourceConfig.cmake
new file mode 100644
index 000000000..b3adef052
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowSource-1.12/TensorFlowSourceConfig.cmake
@@ -0,0 +1,18 @@
+function(_TensorFlowSource_import)
+  if(NOT DOWNLOAD_TENSORFLOW)
+    set(TensorFlowSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_TENSORFLOW)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  envoption(TENSORFLOW_1_12_URL https://github.com/tensorflow/tensorflow/archive/v1.12.0.tar.gz)
+
+  ExternalSource_Download(TENSORFLOW DIRNAME TENSORFLOW-1.12 ${TENSORFLOW_1_12_URL})
+
+  set(TensorFlowSource_DIR ${TENSORFLOW_SOURCE_DIR} PARENT_SCOPE)
+  set(TensorFlowSource_FOUND TRUE PARENT_SCOPE)
+endfunction(_TensorFlowSource_import)
+
+_TensorFlowSource_import()
diff --git a/infra/nncc/cmake/packages/TensorFlowSource-1.12/TensorFlowSourceConfigVersion.cmake b/infra/nncc/cmake/packages/TensorFlowSource-1.12/TensorFlowSourceConfigVersion.cmake
new file mode 100644
index 000000000..8cfdbf8e5
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowSource-1.12/TensorFlowSourceConfigVersion.cmake
@@ -0,0 +1,10 @@
+set(PACKAGE_VERSION "1.12")
+set(PACKAGE_VERSION_EXACT FALSE)
+set(PACKAGE_VERSION_COMPATIBLE FALSE)
+set(PACKAGE_VERSION_UNSUITABLE TRUE)
+
+if(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
+  set(PACKAGE_VERSION_EXACT TRUE)
+  set(PACKAGE_VERSION_COMPATIBLE TRUE)
+  set(PACKAGE_VERSION_UNSUITABLE FALSE)
+endif(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
diff --git a/infra/nncc/cmake/packages/TensorFlowSource-1.14/TensorFlowSourceConfig.cmake b/infra/nncc/cmake/packages/TensorFlowSource-1.14/TensorFlowSourceConfig.cmake
new file mode 100644
index 000000000..f9df7dc18
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowSource-1.14/TensorFlowSourceConfig.cmake
@@ -0,0 +1,18 @@
+function(_TensorFlowSource_import)
+  if(NOT DOWNLOAD_TENSORFLOW)
+    set(TensorFlowSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_TENSORFLOW)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  envoption(TENSORFLOW_1_14_URL https://github.com/tensorflow/tensorflow/archive/v1.14.0.tar.gz)
+
+  ExternalSource_Download(TENSORFLOW DIRNAME TENSORFLOW-1.14 ${TENSORFLOW_1_14_URL})
+
+  set(TensorFlowSource_DIR ${TENSORFLOW_SOURCE_DIR} PARENT_SCOPE)
+  set(TensorFlowSource_FOUND TRUE PARENT_SCOPE)
+endfunction(_TensorFlowSource_import)
+
+_TensorFlowSource_import()
diff --git a/infra/nncc/cmake/packages/TensorFlowSource-1.14/TensorFlowSourceConfigVersion.cmake b/infra/nncc/cmake/packages/TensorFlowSource-1.14/TensorFlowSourceConfigVersion.cmake
new file mode 100644
index 000000000..e9d7db2be
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowSource-1.14/TensorFlowSourceConfigVersion.cmake
@@ -0,0 +1,10 @@
+set(PACKAGE_VERSION "1.14")
+set(PACKAGE_VERSION_EXACT FALSE)
+set(PACKAGE_VERSION_COMPATIBLE FALSE)
+set(PACKAGE_VERSION_UNSUITABLE TRUE)
+
+if(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
+  set(PACKAGE_VERSION_EXACT TRUE)
+  set(PACKAGE_VERSION_COMPATIBLE TRUE)
+  set(PACKAGE_VERSION_UNSUITABLE FALSE)
+endif(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
diff --git a/infra/nncc/cmake/packages/TensorFlowSource-1.7/TensorFlowSourceConfig.cmake b/infra/nncc/cmake/packages/TensorFlowSource-1.7/TensorFlowSourceConfig.cmake
new file mode 100644
index 000000000..11dbf01c5
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowSource-1.7/TensorFlowSourceConfig.cmake
@@ -0,0 +1,18 @@
+function(_TensorFlowSource_import)
+  if(NOT DOWNLOAD_TENSORFLOW)
+    set(TensorFlowSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_TENSORFLOW)
+
+  nncc_include(ExternalSourceTools)
+  nncc_include(OptionTools)
+
+  envoption(TENSORFLOW_URL https://github.com/tensorflow/tensorflow/archive/v1.7.0.tar.gz)
+
+  ExternalSource_Download(TENSORFLOW ${TENSORFLOW_URL})
+
+  set(TensorFlowSource_DIR ${TENSORFLOW_SOURCE_DIR} PARENT_SCOPE)
+  set(TensorFlowSource_FOUND TRUE PARENT_SCOPE)
+endfunction(_TensorFlowSource_import)
+
+_TensorFlowSource_import()
diff --git a/infra/nncc/cmake/packages/TensorFlowSource-1.7/TensorFlowSourceConfigVersion.cmake b/infra/nncc/cmake/packages/TensorFlowSource-1.7/TensorFlowSourceConfigVersion.cmake
new file mode 100644
index 000000000..b1d5282b2
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowSource-1.7/TensorFlowSourceConfigVersion.cmake
@@ -0,0 +1,10 @@
+set(PACKAGE_VERSION "1.7")
+set(PACKAGE_VERSION_EXACT FALSE)
+set(PACKAGE_VERSION_COMPATIBLE FALSE)
+set(PACKAGE_VERSION_UNSUITABLE TRUE)
+
+if(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
+  set(PACKAGE_VERSION_EXACT TRUE)
+  set(PACKAGE_VERSION_COMPATIBLE TRUE)
+  set(PACKAGE_VERSION_UNSUITABLE FALSE)
+endif(PACKAGE_FIND_VERSION VERSION_EQUAL PACKAGE_VERSION)
diff --git a/infra/nncc/cmake/packages/TensorFlowVersionChecker.c b/infra/nncc/cmake/packages/TensorFlowVersionChecker.c
new file mode 100644
index 000000000..6161ef74a
--- /dev/null
+++ b/infra/nncc/cmake/packages/TensorFlowVersionChecker.c
@@ -0,0 +1,9 @@
+#include <string.h>
+#include <tensorflow/c/c_api.h>
+
+int main(int argc, char **argv)
+{
+  if (argc >= 2 && !strcmp(argv[1], TF_Version()))
+    return 0;
+  return 255;
+}
diff --git a/infra/nncc/command/build b/infra/nncc/command/build
new file mode 100644
index 000000000..86082c188
--- /dev/null
+++ b/infra/nncc/command/build
@@ -0,0 +1,11 @@
+#!/bin/bash
+
+import "build.configuration"
+
+BUILD_WORKSPACE_PATH="${NNCC_PROJECT_PATH}/${BUILD_WORKSPACE_RPATH}"
+
+if [[ ! -d "${BUILD_WORKSPACE_PATH}" ]]; then
+  echo "'${BUILD_WORKSPACE_RPATH}' does not exist. Please run 'configure' first"
+  exit 255
+fi
+cd "${BUILD_WORKSPACE_PATH}" && cmake --build . -- "$@"
diff --git a/infra/nncc/command/check-copyright b/infra/nncc/command/check-copyright
new file mode 100644
index 000000000..b70785971
--- /dev/null
+++ b/infra/nncc/command/check-copyright
@@ -0,0 +1,62 @@
+#!/bin/bash
+
+# HOW TO USE
+#
+# Create .COPYRIGHT file at the root of your project (compiler/[PROJECT]/.COPYRIGHT)
+# with the copyright pattern required for your project.
+#
+# echo "Copyright (c) [0-9]\+ Samsung Electronics Co., Ltd. All Rights Reserved" > compiler/[PROJECT]/.COPYRIGHT
+#
+# DISCLAIMER
+#
+# This check works only when your copyright notice is of the following form:
+#
+# /**
+#  * [Copyright notice]
+#  ...
+#  */
+#
+# NOTE
+#
+# The current implementation does not validate YEAR in the copyright notice.
+#
+# TODO Validate YEAR without FALSE POSTIVIES
+#
+# It already turns out that checking the initial commit year introduces
+# FALSE POSITIVES if there are relocated files.
+INVALID_FILES=()
+
+for COPYRIGHT_PATH in $(ls ${NNCC_PROJECT_PATH}/compiler/*/.COPYRIGHT); do
+  PROJECT_PATH="$(dirname ${COPYRIGHT_PATH})"
+  PROJECT_NAME="$(basename ${PROJECT_PATH})"
+
+  CANDIDATE_FILES=$(find "${PROJECT_PATH}" -iname '*.h' -o -iname '*.hpp' -o -iname '*.cpp' -o -iname '*.c')
+
+  # Skip copyright check if there is no candidate files
+  #
+  # NOTE "git ls-files" with no argument will enumerate all the files in the repo
+  if [[ -z ${CANDIDATE_FILES} ]]; then
+    continue
+  fi
+
+  for TRACKED_FILE in $(git ls-files $CANDIDATE_FILES); do
+    MATCHED=$(cat "${NNCC_PROJECT_PATH}/${TRACKED_FILE}" | head -n2 | tail -n1 | sed 's/^ \* //g' | grep -f "${COPYRIGHT_PATH}" | wc -l)
+
+    if [[ ${MATCHED} -ne 1 ]]; then
+      INVALID_FILES+=(${TRACKED_FILE})
+    fi
+  done
+done
+
+if [[ ${#INVALID_FILES[@]} -ne 0 ]]; then
+  echo ">> FAILED <<"
+  echo
+  echo "PLEASE CHECK THE FOLLOWING FILES"
+  for INVALID_FILE in "${INVALID_FILES[@]}"; do
+    echo "- ${INVALID_FILE}"
+  done
+  exit 255
+fi
+
+echo ">> PASSED <<"
+exit 0
diff --git a/infra/nncc/command/configure b/infra/nncc/command/configure
new file mode 100644
index 000000000..2648cb893
--- /dev/null
+++ b/infra/nncc/command/configure
@@ -0,0 +1,10 @@
+#!/bin/bash
+
+import "build.configuration"
+
+BUILD_WORKSPACE_PATH="${NNCC_PROJECT_PATH}/${BUILD_WORKSPACE_RPATH}"
+
+mkdir -p "${BUILD_WORKSPACE_PATH}"
+
+cd "${BUILD_WORKSPACE_PATH}"
+cmake "${NNCC_PROJECT_PATH}/infra/nncc" "$@"
diff --git a/infra/nncc/command/docker-nncc b/infra/nncc/command/docker-nncc
new file mode 100644
index 000000000..0eea016c6
--- /dev/null
+++ b/infra/nncc/command/docker-nncc
@@ -0,0 +1,10 @@
+#!/bin/bash
+
+import "docker.configuration"
+
+docker run $DOCKER_RUN_OPTS $DOCKER_ENV_VARS $DOCKER_VOLUMES $DOCKER_IMAGE_NAME ./nncc "$@"
+EXITCODE=$?
+
+docker_cleanup
+
+exit $EXITCODE
diff --git a/infra/nncc/command/docker-run b/infra/nncc/command/docker-run
new file mode 100644
index 000000000..863b2b8f1
--- /dev/null
+++ b/infra/nncc/command/docker-run
@@ -0,0 +1,10 @@
+#!/bin/bash
+
+import "docker.configuration"
+
+docker run $DOCKER_RUN_OPTS $DOCKER_ENV_VARS $DOCKER_VOLUMES $DOCKER_IMAGE_NAME "$@"
+EXITCODE=$?
+
+docker_cleanup
+
+exit $EXITCODE
diff --git a/infra/nncc/command/docker-shell b/infra/nncc/command/docker-shell
new file mode 100644
index 000000000..7f8449855
--- /dev/null
+++ b/infra/nncc/command/docker-shell
@@ -0,0 +1,11 @@
+#!/bin/bash
+
+import "docker.configuration"
+
+DOCKER_RUN_OPTS+=" -it"
+docker run $DOCKER_RUN_OPTS $DOCKER_ENV_VARS $DOCKER_VOLUMES $DOCKER_IMAGE_NAME /bin/bash
+EXITCODE=$?
+
+docker_cleanup
+
+exit $EXITCODE
diff --git a/infra/nncc/command/test b/infra/nncc/command/test
new file mode 100644
index 000000000..96ddd7a17
--- /dev/null
+++ b/infra/nncc/command/test
@@ -0,0 +1,13 @@
+#!/bin/bash
+
+import "build.configuration"
+
+BUILD_WORKSPACE_PATH="${NNCC_PROJECT_PATH}/${BUILD_WORKSPACE_RPATH}"
+
+if [[ ! -d "${BUILD_WORKSPACE_PATH}" ]]; then
+  echo "'${BUILD_WORKSPACE_RPATH}' does not exist. Please run 'configure' first"
+  exit 255
+fi
+
+export CTEST_OUTPUT_ON_FAILURE=1
+cd "${BUILD_WORKSPACE_PATH}" && ctest "$@"
diff --git a/infra/nncc/config/build.configuration b/infra/nncc/config/build.configuration
new file mode 100644
index 000000000..25ffb6ee0
--- /dev/null
+++ b/infra/nncc/config/build.configuration
@@ -0,0 +1 @@
+BUILD_WORKSPACE_RPATH=${NNCC_WORKSPACE:-build}
diff --git a/infra/nncc/config/docker.configuration b/infra/nncc/config/docker.configuration
new file mode 100644
index 000000000..7078585a2
--- /dev/null
+++ b/infra/nncc/config/docker.configuration
@@ -0,0 +1,46 @@
+DOCKER_IMAGE_NAME=${DOCKER_IMAGE_NAME:-nnas}
+echo "Using docker image ${DOCKER_IMAGE_NAME}"
+
+if [ -z "`docker images ${DOCKER_IMAGE_NAME}`" ]; then
+  echo "Need docker image!"
+  exit 1
+fi
+
+HOST_PATH="$NNCC_PROJECT_PATH"
+DOCKER_PATH="$NNCC_PROJECT_PATH"
+
+export GIT_SSL_NO_VERIFY=1
+
+DOCKER_VOLUMES=" -v $HOST_PATH:$DOCKER_PATH"
+
+DOCKER_ENV_VARS+=" -e http_proxy"
+DOCKER_ENV_VARS+=" -e no_proxy"
+DOCKER_ENV_VARS+=" -e GIT_SSL_NO_VERIFY"
+DOCKER_ENV_VARS+=" -e CAFFE_URL"
+DOCKER_ENV_VARS+=" -e GTEST_URL"
+DOCKER_ENV_VARS+=" -e EIGEN_URL"
+DOCKER_ENV_VARS+=" -e GEMMLOWP_URL"
+DOCKER_ENV_VARS+=" -e FLATBUFFERS_URL"
+DOCKER_ENV_VARS+=" -e FARMHASH_URL"
+DOCKER_ENV_VARS+=" -e NEON2SSE_URL"
+DOCKER_ENV_VARS+=" -e TENSORFLOW_URL"
+
+DOCKER_ENV_VARS+=" -e NNCC_WORKSPACE"
+
+DOCKER_RUN_OPTS="${DOCKER_OPTS}"
+DOCKER_RUN_OPTS+=" --rm"
+DOCKER_RUN_OPTS+=" -w $DOCKER_PATH"
+
+function docker_cleanup()
+{
+  # Newly created files during during docker run can have different ownership.
+  # This may cause some problems, for example, some jenkins slaves or developers
+  # can't remove built files due to lack of permission.
+  # To address this issue, let's change owner of all files
+  # in nncc to owner of nncc.
+  NNCC_OWNER_UID=$(stat -c "%u" $HOST_PATH)
+  NNCC_OWNER_GID=$(stat -c "%g" $HOST_PATH)
+
+  CMD="chown -R $NNCC_OWNER_UID:$NNCC_OWNER_GID $DOCKER_PATH"
+  docker run $DOCKER_RUN_OPTS $DOCKER_ENV_VARS $DOCKER_VOLUMES $DOCKER_IMAGE_NAME $CMD
+}
diff --git a/infra/nnfw/CMakeLists.txt b/infra/nnfw/CMakeLists.txt
new file mode 100644
index 000000000..f2eb2f3ba
--- /dev/null
+++ b/infra/nnfw/CMakeLists.txt
@@ -0,0 +1,107 @@
+cmake_minimum_required(VERSION 3.5.1)
+
+project(nnfw)
+
+enable_testing()
+
+set(NNFW_EXTERNALS_DIR
+  "${CMAKE_CURRENT_LIST_DIR}/../../externals" CACHE
+  INTERNAL "Where to download external dependencies"
+)
+set(NNFW_OVERLAY_DIR "${CMAKE_BINARY_DIR}/overlay" CACHE
+    INTERNAL "Where locally built external dependencies are installed")
+
+# This allows find_package to access configurations installed inside overlay
+list(APPEND CMAKE_PREFIX_PATH "${NNFW_OVERLAY_DIR}")
+
+macro(nnfw_include PREFIX)
+  include("${CMAKE_SOURCE_DIR}/cmake/modules/${PREFIX}.cmake")
+endmacro(nnfw_include)
+
+# 'find_package()' wrapper to find in cmake/packages folder
+#
+# Example:
+#  nnfw_find_package(Boost): Load settings from 'BoostConfig.cmake' file
+#    - this may drop warnings like "-- Could NOT find Boost (missing: Boost_DIR)
+#  nnfw_find_package(Boost QUIET): Load settings silently, without warnings
+#  nnfw_find_package(Boost REQUIRED): Load settings but stop with error when failed
+macro(nnfw_find_package PREFIX)
+  find_package(${PREFIX} CONFIG NO_DEFAULT_PATH PATHS ${CMAKE_SOURCE_DIR}/cmake/packages ${ARGN})
+endmacro(nnfw_find_package)
+
+set(CMAKE_CXX_STANDARD 11)
+set(CMAKE_CXX_EXTENSIONS OFF)
+
+# This feature works with CMake 3.5.2 or later. However, using previous versions does not produce
+# an error. We are still officially using CMake 3.5.1, but put this code for the sake of semantic
+# support in various development tools.
+# Todo: Someday, CMake needs to be updated to 3.7.2 or later to take advantage of improvements
+#       such as `cmake-server`.
+set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
+
+# identify platform: HOST_PLATFORM, TARGET_PLATFORM and related
+# note: this should be placed before flags and options setting
+nnfw_include(IdentifyPlatform)
+
+# apply compilation flags
+# note: this should be placed after cmake/option/option_xxx.cmake files
+include("cmake/ApplyCompileFlags.cmake")
+
+# Configuration flags
+include("cmake/CfgOptionFlags.cmake")
+# and besides CfgOptionFlags.cmake that can be given outside
+#   COVERAGE_BUILD: build boolean flag that enables converage test
+#   ROOTFS_DIR: rootfs path for cross building
+#   TARGET_ARCH: target architecture string for cross building
+#   TARGET_OS: target os string for cross building
+
+nnfw_find_package(GTest QUIET)
+
+option(ENABLE_TEST "Build Tests using Google Test" ${GTest_FOUND})
+
+if(${ENABLE_TEST} AND NOT ${GTest_FOUND})
+  message(FATAL_ERROR "Google Test is required to enable test")
+endif(${ENABLE_TEST} AND NOT ${GTest_FOUND})
+
+if(${ENABLE_COVERAGE} AND NOT ${ENABLE_TEST})
+  message(FATAL_ERROR "Test should be enabled to measure test coverage")
+endif(${ENABLE_COVERAGE} AND NOT ${ENABLE_TEST})
+
+add_library(nnfw_common INTERFACE)
+if(ENABLE_STRICT_BUILD)
+  target_compile_options(nnfw_common INTERFACE -Werror -Wall -Wextra)
+endif(ENABLE_STRICT_BUILD)
+
+# TODO Replace using default build option setting in cmake/buildtool/config/config_linux.cmake
+#      to link nnfw_coverage on each module which want to check coverage
+add_library(nnfw_coverage INTERFACE)
+if(ENABLE_COVERAGE)
+  target_compile_options(nnfw_coverage INTERFACE -g -O -DDEBUG -fprofile-arcs -ftest-coverage)
+  target_link_libraries(nnfw_coverage INTERFACE gcov)
+endif(ENABLE_COVERAGE)
+
+nnfw_include(ExtendCMakeFunction)
+
+set(NNFW_SOURCE_ROOT "${CMAKE_SOURCE_DIR}/../..")
+
+add_library(nnfw-header INTERFACE)
+target_include_directories(nnfw-header INTERFACE ${NNFW_SOURCE_ROOT}/runtimes/include)
+
+# TODO Support android build via fine-control for each component
+#      - Introduce BUILD_CONTRIB option
+#      - Set "BUILD_TFLITE_BENCHMARK_MODEL" as OFF for android build
+#
+# The original android build script (for future reference)
+#
+# add_subdirectory(libs)
+# add_subdirectory(tests/tools/nnapi_test)
+# add_subdirectory(tests/tools/tflite_benchmark)
+# add_subdirectory(tests/nnapi)
+#
+# add_subdirectory(runtimes)
+
+add_subdirectory(${NNFW_SOURCE_ROOT}/runtimes/contrib contrib)
+add_subdirectory(${NNFW_SOURCE_ROOT}/runtimes/libs libs)
+add_subdirectory(${NNFW_SOURCE_ROOT}/runtimes runtimes)
+add_subdirectory(${NNFW_SOURCE_ROOT}/tests tests)
+add_subdirectory(${NNFW_SOURCE_ROOT}/tools tools)
diff --git a/infra/nnfw/cmake/ApplyCompileFlags.cmake b/infra/nnfw/cmake/ApplyCompileFlags.cmake
new file mode 100644
index 000000000..5098fd0f3
--- /dev/null
+++ b/infra/nnfw/cmake/ApplyCompileFlags.cmake
@@ -0,0 +1,33 @@
+#
+# Platform independent compile flag setting
+#
+# flags for build type: debug, release
+set(CMAKE_C_FLAGS_DEBUG     "-O0 -g -DDEBUG")
+set(CMAKE_CXX_FLAGS_DEBUG   "-O0 -g -DDEBUG")
+set(CMAKE_C_FLAGS_RELEASE   "-O2 -DNDEBUG")
+set(CMAKE_CXX_FLAGS_RELEASE "-O2 -DNDEBUG")
+
+#
+# Platform specific compile flag setting
+#
+include("cmake/buildtool/config/config_${TARGET_PLATFORM}.cmake")
+
+#
+# Apply compile flags
+# note: this should be placed after cmake/buildtool/config/config_xxx.cmake files
+#
+# add common flags
+foreach(FLAG ${FLAGS_COMMON})
+  set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${FLAG}")
+  set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${FLAG}")
+endforeach()
+
+# add c flags
+foreach(FLAG ${FLAGS_CONLY})
+  set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${FLAG}")
+endforeach()
+
+# add cxx flags
+foreach(FLAG ${FLAGS_CXXONLY})
+  set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${FLAG}")
+endforeach()
diff --git a/infra/nnfw/cmake/CfgOptionFlags.cmake b/infra/nnfw/cmake/CfgOptionFlags.cmake
new file mode 100644
index 000000000..d431f30a7
--- /dev/null
+++ b/infra/nnfw/cmake/CfgOptionFlags.cmake
@@ -0,0 +1,65 @@
+include(CMakeDependentOption)
+
+#
+# Platfor specific configuration
+# note: this should be placed before platform common setting for option setting priority
+#       (platform specific setting have higher priority)
+#
+include("cmake/options/options_${TARGET_PLATFORM}.cmake")
+
+#
+# Build configuration for project
+#
+option(BUILD_EXT_MULTITHREAD "Build external build using multi thread" ON)
+option(BUILD_NEURUN "Build neurun" ON)
+option(BUILD_LOGGING "Build logging runtime" ON)
+option(BUILD_PURE_ARM_COMPUTE "Build pure_arm_compute runtime" OFF)
+CMAKE_DEPENDENT_OPTION(BUILD_RUNTIME_NNAPI_TEST "Build Runtime NN API Generated Test"
+                       # Set BUILD_RUNTIME_NNAPI_TEST as ON
+                       #   if CMAKE_COMPILER_IS_GNUCC AND NOT CMAKE_CXX_COMPILER_VERSION VERSION_LESS 6.2
+                       ON "CMAKE_COMPILER_IS_GNUCC;NOT CMAKE_CXX_COMPILER_VERSION VERSION_LESS 6.2"
+                       # Otherwise set BUILD_RUNTIME_NNAPI_TEST as OFF
+                       OFF)
+option(BUILD_TFLITE_RUN "Build tflite-run" ON)
+option(BUILD_TFLITE_BENCHMARK_MODEL "Build tflite benchmark model" OFF)
+option(BUILD_NNAPI_QUICKCHECK "Build NN API Quickcheck tools" OFF)
+option(BUILD_TOOLS "Bulid nnfw projects under tools/" ON)
+option(BUILD_TFLITE_ACCURACY "Build tflite accuracy tool" OFF)
+option(BUILD_NNPACKAGE_RUN "Build nnpackge_run" ON)
+option(BUILD_SRCN_KERNEL "Build srcn kernel" OFF)
+option(ENVVAR_NEURUN_CONFIG "Use environment variable for neurun configuration" ON)
+#
+# Build configuration for contrib
+#
+option(BUILD_BENCHMARK_ACL "Build ARM Compute Library Benchmarks" OFF)
+option(BUILD_DETECTION_APP "Build detection example app" OFF)
+option(BUILD_LABS "Build lab projects" OFF)
+option(BUILD_TFLITE_TEST "Build tensorflow lite test" OFF)
+option(BUILD_TFLITE_CLASSIFY_APP "Build tflite_classify app" OFF)
+option(BUILD_UBEN "Build micro-benchmark (uben) suite" OFF)
+option(BUILD_MLAPSE "Build mlapse benchmark toolkit" OFF)
+option(BUILD_TFLITE_LOADER "Build tensorflow lite file loader" ON)
+option(BUILD_TFLITE_LOADER_TEST_TOOL "Build tflite loader testing tool" ON)
+option(BUILD_KBENCHMARK "Build kernel benchmark tool" OFF)
+#
+# Download configuration
+#
+option(DOWNLOAD_TENSORFLOW "Download Tensorflow source" ON)
+option(DOWNLOAD_ABSL "Download Absl source" ON)
+option(DOWNLOAD_EIGEN "Download Eigen source" ON)
+option(DOWNLOAD_FARMHASH "Download farmhash source" ON)
+option(DOWNLOAD_GEMMLOWP "Download GEMM low precesion library source" ON)
+option(DOWNLOAD_NEON2SSE "Download NEON2SSE library source" ON)
+option(DOWNLOAD_NNPACK "Download NNPACK source" ON)
+option(DOWNLOAD_FLATBUFFERS "Download FlatBuffers source" ON)
+option(BUILD_TENSORFLOW_LITE "Build TensorFlow Lite from the downloaded source" ON)
+option(DOWNLOAD_ARMCOMPUTE "Download ARM Compute source" ON)
+option(DOWNLOAD_NONIUS "Download nonius source" ON)
+option(DOWNLOAD_BOOST "Download boost source" OFF)
+option(BUILD_BOOST "Build boost source" OFF)
+#
+# GTest support
+#
+option(BUILD_GTEST "Download and build Google Test" ON)
+option(ENABLE_STRICT_BUILD "Treat warning as error" ON)
+option(ENABLE_COVERAGE "Build for coverage test" OFF)
diff --git a/infra/nnfw/cmake/buildtool/config/config_aarch64-linux.cmake b/infra/nnfw/cmake/buildtool/config/config_aarch64-linux.cmake
new file mode 100644
index 000000000..f859bbfe5
--- /dev/null
+++ b/infra/nnfw/cmake/buildtool/config/config_aarch64-linux.cmake
@@ -0,0 +1,12 @@
+#
+# aarch64 linux compile options
+#
+
+message(STATUS "Building for AARCH64 Linux")
+
+# include linux common
+include("cmake/buildtool/config/config_linux.cmake")
+
+# addition for aarch64-linux
+set(FLAGS_COMMON ${FLAGS_COMMON}
+    )
diff --git a/infra/nnfw/cmake/buildtool/config/config_aarch64-tizen.cmake b/infra/nnfw/cmake/buildtool/config/config_aarch64-tizen.cmake
new file mode 100644
index 000000000..fa1e8b078
--- /dev/null
+++ b/infra/nnfw/cmake/buildtool/config/config_aarch64-tizen.cmake
@@ -0,0 +1,13 @@
+#
+# aarch64 tizen compile options
+#
+
+message(STATUS "Building for AARCH64 Tizen")
+
+# TODO : add and use option_tizen if something uncommon comes up
+# include linux common
+include("cmake/buildtool/config/config_linux.cmake")
+
+# addition for aarch64-tizen
+set(FLAGS_COMMON ${FLAGS_COMMON}
+    )
diff --git a/infra/nnfw/cmake/buildtool/config/config_arm64-android.cmake b/infra/nnfw/cmake/buildtool/config/config_arm64-android.cmake
new file mode 100644
index 000000000..037541c58
--- /dev/null
+++ b/infra/nnfw/cmake/buildtool/config/config_arm64-android.cmake
@@ -0,0 +1,9 @@
+include("cmake/buildtool/config/config_linux.cmake")
+
+# On Android, pthread is contained in bionic(libc)
+set(LIB_PTHREAD "")
+
+# SIMD for arm64
+set(FLAGS_COMMON ${FLAGS_COMMON}
+    "-ftree-vectorize"
+    )
diff --git a/infra/nnfw/cmake/buildtool/config/config_armv7l-linux.cmake b/infra/nnfw/cmake/buildtool/config/config_armv7l-linux.cmake
new file mode 100644
index 000000000..6d6459f0f
--- /dev/null
+++ b/infra/nnfw/cmake/buildtool/config/config_armv7l-linux.cmake
@@ -0,0 +1,18 @@
+#
+# armv7l linux compile options
+#
+
+message(STATUS "Building for ARMv7l Linux")
+
+# include linux common
+include("cmake/buildtool/config/config_linux.cmake")
+
+# addition for arm-linux
+set(FLAGS_COMMON ${FLAGS_COMMON}
+    "-mcpu=cortex-a7"
+    "-mfloat-abi=hard"
+    "-mfpu=neon-vfpv4"
+    "-funsafe-math-optimizations"
+    "-ftree-vectorize"
+    "-mfp16-format=ieee"
+    )
diff --git a/infra/nnfw/cmake/buildtool/config/config_armv7l-tizen.cmake b/infra/nnfw/cmake/buildtool/config/config_armv7l-tizen.cmake
new file mode 100644
index 000000000..0bbe0ddca
--- /dev/null
+++ b/infra/nnfw/cmake/buildtool/config/config_armv7l-tizen.cmake
@@ -0,0 +1,18 @@
+#
+# armv7l tizen compile options
+#
+
+message(STATUS "Building for ARMv7l(softfp) Tizen")
+
+# TODO : add and use option_tizen if something uncommon comes up
+# include linux common
+include("cmake/buildtool/config/config_linux.cmake")
+
+# addition for arm-linux
+set(FLAGS_COMMON ${FLAGS_COMMON}
+    "-mcpu=cortex-a8"
+    "-mfloat-abi=softfp"
+    "-mfpu=neon-vfpv4"
+    "-funsafe-math-optimizations"
+    "-ftree-vectorize"
+    )
diff --git a/infra/nnfw/cmake/buildtool/config/config_linux.cmake b/infra/nnfw/cmake/buildtool/config/config_linux.cmake
new file mode 100644
index 000000000..a17bbb2bd
--- /dev/null
+++ b/infra/nnfw/cmake/buildtool/config/config_linux.cmake
@@ -0,0 +1,30 @@
+#
+# linux common compile options
+#
+
+# test-coverage build flag
+if("${COVERAGE_BUILD}" STREQUAL "1")
+  set(CMAKE_CXX_OUTPUT_EXTENSION_REPLACE ON)
+  set(FLAGS_COMMON "${FLAGS_COMMON} -fprofile-arcs -ftest-coverage")
+  set(CMAKE_EXE_LINKER_FLAGS
+    "${CMAKE_EXE_LINKER_FLAGS} -fprofile-arcs -ftest-coverage")
+  set(CMAKE_C_FLAGS_DEBUG     "-O -g -DDEBUG")
+  set(CMAKE_CXX_FLAGS_DEBUG   "-O -g -DDEBUG")
+endif()
+
+#
+# linux common variable and settings
+#
+
+# remove warning from arm cl
+# https://github.com/ARM-software/ComputeLibrary/issues/330
+set(GCC_VERSION_DISABLE_WARNING 6.0)
+if(CMAKE_CXX_COMPILER_VERSION VERSION_GREATER GCC_VERSION_DISABLE_WARNING)
+  message(STATUS "GCC version higher than ${GCC_VERSION_DISABLE_WARNING}")
+  set(FLAGS_CXXONLY ${FLAGS_CXXONLY}
+      "-Wno-ignored-attributes"
+      )
+endif()
+
+# lib pthread as a variable (pthread must be disabled on android)
+set(LIB_PTHREAD pthread)
diff --git a/infra/nnfw/cmake/buildtool/config/config_x86_64-linux.cmake b/infra/nnfw/cmake/buildtool/config/config_x86_64-linux.cmake
new file mode 100644
index 000000000..528e48396
--- /dev/null
+++ b/infra/nnfw/cmake/buildtool/config/config_x86_64-linux.cmake
@@ -0,0 +1,12 @@
+#
+# x86_64 linux compile options
+#
+message(STATUS "Building for x86-64 Linux")
+
+# include linux common
+include("cmake/buildtool/config/config_linux.cmake")
+
+# SIMD for x86
+set(FLAGS_COMMON ${FLAGS_COMMON}
+    "-msse4"
+    )
diff --git a/infra/nnfw/cmake/buildtool/cross/toolchain_aarch64-linux.cmake b/infra/nnfw/cmake/buildtool/cross/toolchain_aarch64-linux.cmake
new file mode 100644
index 000000000..2d1a08d2b
--- /dev/null
+++ b/infra/nnfw/cmake/buildtool/cross/toolchain_aarch64-linux.cmake
@@ -0,0 +1,39 @@
+#
+# config for aarch64-linux
+#
+include(CMakeForceCompiler)
+
+set(CMAKE_SYSTEM_NAME Linux)
+set(CMAKE_SYSTEM_PROCESSOR aarch64)
+
+set(CMAKE_C_COMPILER   aarch64-linux-gnu-gcc)
+set(CMAKE_CXX_COMPILER aarch64-linux-gnu-g++)
+
+# where is the target environment
+set(NNFW_SOURCE_ROOT "${CMAKE_CURRENT_LIST_DIR}/../../../../..")
+set(ROOTFS_AARCH64 "${NNFW_SOURCE_ROOT}/tools/cross/rootfs/arm64")
+include("${NNFW_SOURCE_ROOT}/infra/nnfw/cmake/modules/OptionTools.cmake")
+
+envoption(ROOTFS_DIR ${ROOTFS_AARCH64})
+if(NOT EXISTS "${ROOTFS_DIR}/lib/aarch64-linux-gnu")
+  message(FATAL_ERROR "Please prepare RootFS for AARCH64")
+endif()
+
+set(CMAKE_SYSROOT ${ROOTFS_DIR})
+set(CMAKE_FIND_ROOT_PATH ${ROOTFS_DIR})
+set(CMAKE_SHARED_LINKER_FLAGS
+    "${CMAKE_SHARED_LINKER_FLAGS} --sysroot=${ROOTFS_DIR}"
+    CACHE INTERNAL "" FORCE)
+set(CMAKE_EXE_LINKER_FLAGS
+    "${CMAKE_EXE_LINKER_FLAGS} --sysroot=${ROOTFS_DIR}"
+    CACHE INTERNAL "" FORCE)
+
+# search for programs in the build host directories
+set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
+
+# for libraries and headers in the target directories
+set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
+set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
+
+# Set cache variable to ignore try-run error by find_package(Threads REQUIRED) on cross build
+set(THREADS_PTHREAD_ARG "2" CACHE STRING "Result from TRY_RUN" FORCE)
diff --git a/infra/nnfw/cmake/buildtool/cross/toolchain_aarch64-tizen.cmake b/infra/nnfw/cmake/buildtool/cross/toolchain_aarch64-tizen.cmake
new file mode 100644
index 000000000..9e1cf3b11
--- /dev/null
+++ b/infra/nnfw/cmake/buildtool/cross/toolchain_aarch64-tizen.cmake
@@ -0,0 +1,62 @@
+#
+# config for aarch64-linux
+#
+include(CMakeForceCompiler)
+
+set(CMAKE_SYSTEM_NAME Linux)
+set(CMAKE_SYSTEM_PROCESSOR aarch64)
+
+set(CMAKE_C_COMPILER   aarch64-linux-gnu-gcc-5)
+set(CMAKE_CXX_COMPILER aarch64-linux-gnu-g++-5)
+
+set(TIZEN_TOOLCHAIN "aarch64-tizen-linux-gnu/6.2.1")
+
+# where is the target environment
+set(NNFW_SOURCE_ROOT "${CMAKE_CURRENT_LIST_DIR}/../../../../..")
+set(ROOTFS_AARCH64 "${NNFW_SOURCE_ROOT}/tools/cross/rootfs/arm64")
+include("${NNFW_SOURCE_ROOT}/infra/nnfw/cmake/modules/OptionTools.cmake")
+
+envoption(ROOTFS_DIR ${ROOTFS_AARCH64})
+if(NOT EXISTS "${ROOTFS_DIR}/usr/lib64/gcc/${TIZEN_TOOLCHAIN}")
+  message(FATAL_ERROR "Please prepare RootFS for tizen aarch64")
+endif()
+
+set(CMAKE_SYSROOT ${ROOTFS_DIR})
+set(CMAKE_FIND_ROOT_PATH ${ROOTFS_DIR})
+set(CMAKE_SHARED_LINKER_FLAGS
+    "${CMAKE_SHARED_LINKER_FLAGS} --sysroot=${ROOTFS_DIR}"
+    CACHE INTERNAL "" FORCE)
+set(CMAKE_EXE_LINKER_FLAGS
+    "${CMAKE_EXE_LINKER_FLAGS} --sysroot=${ROOTFS_DIR}"
+    CACHE INTERNAL "" FORCE)
+
+# search for programs in the build host directories
+set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
+
+# for libraries and headers in the target directories
+set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
+set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
+
+# Set cache variable to ignore try-run error by find_package(Threads REQUIRED) on cross build
+set(THREADS_PTHREAD_ARG "2" CACHE STRING "Result from TRY_RUN" FORCE)
+
+add_compile_options(--sysroot=${ROOTFS_DIR})
+
+set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} --sysroot=${ROOTFS_DIR}")
+
+set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} --sysroot=${ROOTFS_DIR}")
+
+include_directories(SYSTEM ${ROOTFS_DIR}/usr/lib64/gcc/${TIZEN_TOOLCHAIN}/include/c++/)
+include_directories(SYSTEM ${ROOTFS_DIR}/usr/lib64/gcc/${TIZEN_TOOLCHAIN}/include/c++/aarch64-tizen-linux-gnu)
+add_compile_options(-Wno-deprecated-declarations) # compile-time option
+add_compile_options(-D__extern_always_inline=inline) # compile-time option
+
+set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -B${ROOTFS_DIR}/usr/lib64/gcc/${TIZEN_TOOLCHAIN}")
+set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -L${ROOTFS_DIR}/lib64")
+set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -L${ROOTFS_DIR}/usr/lib64")
+set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -L${ROOTFS_DIR}/usr/lib64/gcc/${TIZEN_TOOLCHAIN}")
+
+set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -B${ROOTFS_DIR}/usr/lib64/gcc/${TIZEN_TOOLCHAIN}")
+set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L${ROOTFS_DIR}/lib64")
+set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L${ROOTFS_DIR}/usr/lib64")
+set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L${ROOTFS_DIR}/usr/lib64/gcc/${TIZEN_TOOLCHAIN}")
diff --git a/infra/nnfw/cmake/buildtool/cross/toolchain_arm64-android.cmake b/infra/nnfw/cmake/buildtool/cross/toolchain_arm64-android.cmake
new file mode 100644
index 000000000..c0c707dd3
--- /dev/null
+++ b/infra/nnfw/cmake/buildtool/cross/toolchain_arm64-android.cmake
@@ -0,0 +1,44 @@
+set(ANDROID_STANDALONE $ENV{ROOTFS_DIR})
+set(CROSS_NDK_TOOLCHAIN ${ANDROID_STANDALONE}/bin)
+set(CROSS_ROOTFS ${ANDROID_STANDALONE}/sysroot)
+
+set(CMAKE_SYSTEM_NAME Linux)
+set(CMAKE_SYSTEM_VERSION 1)
+set(CMAKE_SYSTEM_PROCESSOR aarch64)
+
+## Specify the toolchain
+set(TOOLCHAIN "aarch64-linux-android")
+set(CMAKE_PREFIX_PATH ${CROSS_NDK_TOOLCHAIN})
+set(TOOLCHAIN_PREFIX ${TOOLCHAIN}-)
+
+find_program(CMAKE_C_COMPILER ${TOOLCHAIN_PREFIX}clang)
+find_program(CMAKE_CXX_COMPILER ${TOOLCHAIN_PREFIX}clang++)
+find_program(CMAKE_ASM_COMPILER ${TOOLCHAIN_PREFIX}clang)
+find_program(CMAKE_AR ${TOOLCHAIN_PREFIX}ar)
+find_program(CMAKE_LD ${TOOLCHAIN_PREFIX}ar)
+find_program(CMAKE_OBJCOPY ${TOOLCHAIN_PREFIX}objcopy)
+find_program(CMAKE_OBJDUMP ${TOOLCHAIN_PREFIX}objdump)
+
+add_compile_options(--sysroot=${CROSS_ROOTFS})
+add_compile_options(-fPIE)
+
+## Needed for Android or bionic specific conditionals
+#add_compile_options(-D__ANDROID__)
+#add_compile_options(-D__BIONIC__)
+
+## NOTE Not sure this is safe. This may cause side effects.
+## Without this, it cannot find `std::stol`, `std::stoi` and so on, with android toolchain
+add_compile_options(-D_GLIBCXX_USE_C99=1)
+
+set(CROSS_LINK_FLAGS "${CROSS_LINK_FLAGS} -B${CROSS_ROOTFS}/usr/lib/gcc/${TOOLCHAIN}")
+set(CROSS_LINK_FLAGS "${CROSS_LINK_FLAGS} -L${CROSS_ROOTFS}/lib/${TOOLCHAIN}")
+set(CROSS_LINK_FLAGS "${CROSS_LINK_FLAGS} --sysroot=${CROSS_ROOTFS}")
+set(CROSS_LINK_FLAGS "${CROSS_LINK_FLAGS} -fPIE -pie")
+
+set(CMAKE_EXE_LINKER_FLAGS    "${CMAKE_EXE_LINKER_FLAGS}    ${CROSS_LINK_FLAGS}" CACHE STRING "" FORCE)
+set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} ${CROSS_LINK_FLAGS}" CACHE STRING "" FORCE)
+set(CMAKE_MODULE_LINKER_FLAGS "${CMAKE_MODULE_LINKER_FLAGS} ${CROSS_LINK_FLAGS}" CACHE STRING "" FORCE)
+
+set(CMAKE_FIND_ROOT_PATH "${CROSS_ROOTFS}")
+set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
+set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
diff --git a/infra/nnfw/cmake/buildtool/cross/toolchain_armv7l-linux.cmake b/infra/nnfw/cmake/buildtool/cross/toolchain_armv7l-linux.cmake
new file mode 100644
index 000000000..8e3619879
--- /dev/null
+++ b/infra/nnfw/cmake/buildtool/cross/toolchain_armv7l-linux.cmake
@@ -0,0 +1,38 @@
+#
+# config for arm-linux
+#
+include(CMakeForceCompiler)
+include("${CMAKE_CURRENT_LIST_DIR}/../../modules/OptionTools.cmake")
+
+set(CMAKE_SYSTEM_NAME Linux)
+set(CMAKE_SYSTEM_PROCESSOR armv7l)
+
+set(CMAKE_C_COMPILER   arm-linux-gnueabihf-gcc)
+set(CMAKE_CXX_COMPILER arm-linux-gnueabihf-g++)
+
+# where is the target environment
+set(ROOTFS_ARM "${CMAKE_CURRENT_LIST_DIR}/../../../../../tools/cross/rootfs/arm")
+envoption(ROOTFS_DIR ${ROOTFS_ARM})
+
+if(NOT EXISTS "${ROOTFS_DIR}/lib/arm-linux-gnueabihf")
+  message(FATAL_ERROR "Please prepare RootFS for ARM")
+endif()
+
+set(CMAKE_SYSROOT ${ROOTFS_DIR})
+set(CMAKE_FIND_ROOT_PATH ${ROOTFS_DIR})
+set(CMAKE_SHARED_LINKER_FLAGS
+    "${CMAKE_SHARED_LINKER_FLAGS} --sysroot=${ROOTFS_DIR}"
+    CACHE INTERNAL "" FORCE)
+set(CMAKE_EXE_LINKER_FLAGS
+    "${CMAKE_EXE_LINKER_FLAGS} --sysroot=${ROOTFS_DIR}"
+    CACHE INTERNAL "" FORCE)
+
+# search for programs in the build host directories
+set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
+
+# for libraries and headers in the target directories
+set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
+set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
+
+# Set cache variable to ignore try-run error by find_package(Threads REQUIRED) on cross build
+set(THREADS_PTHREAD_ARG "2" CACHE STRING "Result from TRY_RUN" FORCE)
diff --git a/infra/nnfw/cmake/buildtool/cross/toolchain_armv7l-tizen.cmake b/infra/nnfw/cmake/buildtool/cross/toolchain_armv7l-tizen.cmake
new file mode 100644
index 000000000..eb8e63832
--- /dev/null
+++ b/infra/nnfw/cmake/buildtool/cross/toolchain_armv7l-tizen.cmake
@@ -0,0 +1,66 @@
+#
+# config for arm-linux
+#
+include(CMakeForceCompiler)
+
+set(CMAKE_SYSTEM_NAME Linux)
+set(CMAKE_SYSTEM_PROCESSOR armv7l)
+
+set(CMAKE_C_COMPILER   arm-linux-gnueabi-gcc)
+set(CMAKE_CXX_COMPILER arm-linux-gnueabi-g++)
+
+set(TIZEN_TOOLCHAIN "armv7l-tizen-linux-gnueabi/6.2.1")
+
+# where is the target environment
+set(NNFW_SOURCE_ROOT "${CMAKE_CURRENT_LIST_DIR}/../../../../..")
+set(ROOTFS_ARM "${NNFW_SOURCE_ROOT}/tools/cross/rootfs/armel")
+include("${NNFW_SOURCE_ROOT}/infra/nnfw/cmake/modules/OptionTools.cmake")
+
+envoption(ROOTFS_DIR ${ROOTFS_ARM})
+if(NOT EXISTS "${ROOTFS_DIR}/usr/lib/gcc/${TIZEN_TOOLCHAIN}")
+  message(FATAL_ERROR "Please prepare RootFS for tizen ARM softfp")
+endif()
+
+set(CMAKE_SYSROOT ${ROOTFS_DIR})
+set(CMAKE_FIND_ROOT_PATH ${ROOTFS_DIR})
+set(CMAKE_SHARED_LINKER_FLAGS
+    "${CMAKE_SHARED_LINKER_FLAGS} --sysroot=${ROOTFS_DIR}"
+    CACHE INTERNAL "" FORCE)
+set(CMAKE_EXE_LINKER_FLAGS
+    "${CMAKE_EXE_LINKER_FLAGS} --sysroot=${ROOTFS_DIR}"
+    CACHE INTERNAL "" FORCE)
+
+# search for programs in the build host directories
+set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
+
+# for libraries and headers in the target directories
+set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
+set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
+
+# Set cache variable to ignore try-run error by find_package(Threads REQUIRED) on cross build
+set(THREADS_PTHREAD_ARG "2" CACHE STRING "Result from TRY_RUN" FORCE)
+
+
+add_compile_options(-mthumb)
+add_compile_options(-mfpu=neon-vfpv4)
+add_compile_options(-mfloat-abi=softfp)
+add_compile_options(--sysroot=${ROOTFS_DIR})
+
+set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} --sysroot=${ROOTFS_DIR}")
+
+set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} --sysroot=${ROOTFS_DIR}")
+
+include_directories(SYSTEM ${ROOTFS_DIR}/usr/lib/gcc/${TIZEN_TOOLCHAIN}/include/c++/)
+include_directories(SYSTEM ${ROOTFS_DIR}/usr/lib/gcc/${TIZEN_TOOLCHAIN}/include/c++/armv7l-tizen-linux-gnueabi)
+add_compile_options(-Wno-deprecated-declarations) # compile-time option
+add_compile_options(-D__extern_always_inline=inline) # compile-time option
+
+set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -B${ROOTFS_DIR}/usr/lib/gcc/${TIZEN_TOOLCHAIN}")
+set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -L${ROOTFS_DIR}/lib")
+set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -L${ROOTFS_DIR}/usr/lib")
+set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -L${ROOTFS_DIR}/usr/lib/gcc/${TIZEN_TOOLCHAIN}")
+
+set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -B${ROOTFS_DIR}/usr/lib/gcc/${TIZEN_TOOLCHAIN}")
+set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L${ROOTFS_DIR}/lib")
+set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L${ROOTFS_DIR}/usr/lib")
+set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L${ROOTFS_DIR}/usr/lib/gcc/${TIZEN_TOOLCHAIN}")
diff --git a/infra/nnfw/cmake/modules/ExtendCMakeFunction.cmake b/infra/nnfw/cmake/modules/ExtendCMakeFunction.cmake
new file mode 100644
index 000000000..06b7c768d
--- /dev/null
+++ b/infra/nnfw/cmake/modules/ExtendCMakeFunction.cmake
@@ -0,0 +1,27 @@
+function(list_subdirectories OUTPUT_VARIABLE)
+  cmake_parse_arguments(ARG "" "" "EXCLUDES" ${ARGN})
+
+  file(GLOB PROJECT_FILES
+            RELATIVE ${CMAKE_CURRENT_SOURCE_DIR}
+            "*/CMakeLists.txt")
+
+  foreach(PROJECT_FILE IN ITEMS ${PROJECT_FILES})
+    get_filename_component(PROJECT_DIR ${PROJECT_FILE} DIRECTORY)
+    list(FIND ARG_EXCLUDES ${PROJECT_DIR} PROJECT_INDEX)
+    if(${PROJECT_INDEX} EQUAL -1)
+      list(APPEND PROJECT_LIST ${PROJECT_DIR})
+    endif(${PROJECT_INDEX} EQUAL -1)
+  endforeach(PROJECT_FILE)
+
+  set(${OUTPUT_VARIABLE} ${PROJECT_LIST} PARENT_SCOPE)
+endfunction(list_subdirectories)
+
+function(add_subdirectories)
+  cmake_parse_arguments(ARG "" "" "EXCLUDES" ${ARGN})
+
+  list_subdirectories(PROJECT_DIRS EXCLUDES ${ARG_EXCLUDES})
+
+  foreach(PROJECT_DIR IN ITEMS ${PROJECT_DIRS})
+    add_subdirectory(${PROJECT_DIR})
+  endforeach(PROJECT_DIR)
+endfunction(add_subdirectories)
diff --git a/cmake/modules/ExternalProjectTools.cmake b/infra/nnfw/cmake/modules/ExternalProjectTools.cmake
index 71d74e5a6..71d74e5a6 100644
--- a/cmake/modules/ExternalProjectTools.cmake
+++ b/infra/nnfw/cmake/modules/ExternalProjectTools.cmake
diff --git a/infra/nnfw/cmake/modules/ExternalSourceTools.cmake b/infra/nnfw/cmake/modules/ExternalSourceTools.cmake
new file mode 100644
index 000000000..01a0c4d00
--- /dev/null
+++ b/infra/nnfw/cmake/modules/ExternalSourceTools.cmake
@@ -0,0 +1,102 @@
+function(ExternalSource_Download PREFIX URL)
+  get_filename_component(FILENAME ${URL} NAME)
+
+  set(CACHE_DIR "${NNFW_EXTERNALS_DIR}")
+  set(OUT_DIR "${CACHE_DIR}/${PREFIX}")
+  set(TMP_DIR "${CACHE_DIR}/${PREFIX}-tmp")
+
+  set(DOWNLOAD_PATH "${CACHE_DIR}/${PREFIX}-${FILENAME}")
+  set(STAMP_PATH "${CACHE_DIR}/${PREFIX}.stamp")
+
+  if(NOT EXISTS "${CACHE_DIR}")
+    file(MAKE_DIRECTORY "${CACHE_DIR}")
+  endif(NOT EXISTS "${CACHE_DIR}")
+
+  # TODO Check MD5 for correctness
+  set(MATCH_URL FALSE)
+  if(EXISTS "${STAMP_PATH}")
+    file(READ "${STAMP_PATH}" SAVED_URL)
+    if("${SAVED_URL}" STREQUAL "${URL}")
+      set(MATCH_URL TRUE)
+    endif("${SAVED_URL}" STREQUAL "${URL}")
+  endif(EXISTS "${STAMP_PATH}")
+
+  if(NOT EXISTS "${STAMP_PATH}" OR NOT EXISTS "${OUT_DIR}" OR NOT MATCH_URL)
+    file(REMOVE_RECURSE "${OUT_DIR}")
+    file(REMOVE_RECURSE "${TMP_DIR}")
+
+    file(MAKE_DIRECTORY "${TMP_DIR}")
+
+    message(STATUS "Download ${PREFIX} from ${URL}")
+    file(DOWNLOAD ${URL} "${DOWNLOAD_PATH}"
+                  STATUS status
+                  LOG log)
+
+    list(GET status 0 status_code)
+    list(GET status 1 status_string)
+
+    if(NOT status_code EQUAL 0)
+      message(FATAL_ERROR "error: downloading '${URL}' failed
+              status_code: ${status_code}
+              status_string: ${status_string}
+              log: ${log}")
+    endif()
+    message(STATUS "Download ${PREFIX} from ${URL} - done")
+
+    message(STATUS "Extract ${PREFIX}")
+    execute_process(COMMAND ${CMAKE_COMMAND} -E tar xfz "${DOWNLOAD_PATH}"
+                    WORKING_DIRECTORY "${TMP_DIR}")
+    file(REMOVE "${DOWNLOAD_PATH}")
+    message(STATUS "Extract ${PREFIX} - done")
+
+    message(STATUS "Cleanup ${PREFIX}")
+    file(GLOB contents "${TMP_DIR}/*")
+    list(LENGTH contents n)
+    if(NOT n EQUAL 1 OR NOT IS_DIRECTORY "${contents}")
+      set(contents "${TMP_DIR}")
+    endif()
+
+    get_filename_component(contents ${contents} ABSOLUTE)
+
+    file(RENAME ${contents} "${OUT_DIR}")
+    file(REMOVE_RECURSE "${TMP_DIR}")
+    file(WRITE "${STAMP_PATH}" "${URL}")
+    message(STATUS "Cleanup ${PREFIX} - done")
+  endif()
+
+  set(${PREFIX}_SOURCE_DIR "${OUT_DIR}" PARENT_SCOPE)
+endfunction(ExternalSource_Download)
+
+function(ExternalSource_Get PREFIX DOWNLOAD_FLAG URL)
+  set(CACHE_DIR "${NNFW_EXTERNALS_DIR}")
+  set(OUT_DIR "${CACHE_DIR}/${PREFIX}")
+  set(STAMP_PATH "${CACHE_DIR}/${PREFIX}.stamp")
+
+  if(NOT EXISTS "${CACHE_DIR}")
+    file(MAKE_DIRECTORY "${CACHE_DIR}")
+  endif(NOT EXISTS "${CACHE_DIR}")
+
+  # TODO Check MD5 for correctness
+  set(MATCH_URL FALSE)
+  if(EXISTS "${STAMP_PATH}")
+    file(READ "${STAMP_PATH}" SAVED_URL)
+    if("${SAVED_URL}" STREQUAL "${URL}")
+      set(MATCH_URL TRUE)
+    endif("${SAVED_URL}" STREQUAL "${URL}")
+  endif(EXISTS "${STAMP_PATH}")
+
+  set(SOURCE_GET TRUE)
+
+  if(NOT EXISTS "${STAMP_PATH}" OR NOT EXISTS "${OUT_DIR}" OR NOT MATCH_URL)
+    if(NOT DOWNLOAD_FLAG)
+      set(SOURCE_GET FALSE)
+    else(NOT DOWNLOAD_FLAG)
+      ExternalSource_Download(${PREFIX} ${URL})
+    endif(NOT DOWNLOAD_FLAG)
+  endif()
+
+  set(${PREFIX}_SOURCE_GET ${SOURCE_GET} PARENT_SCOPE)
+  set(${PREFIX}_SOURCE_DIR "${OUT_DIR}" PARENT_SCOPE)
+endfunction(ExternalSource_Get)
+
+set(ExternalSourceTools_FOUND TRUE)
diff --git a/infra/nnfw/cmake/modules/IdentifyPlatform.cmake b/infra/nnfw/cmake/modules/IdentifyPlatform.cmake
new file mode 100644
index 000000000..9313eefcf
--- /dev/null
+++ b/infra/nnfw/cmake/modules/IdentifyPlatform.cmake
@@ -0,0 +1,45 @@
+# set host platform to build
+if(NOT HOST_ARCH OR "${HOST_ARCH}" STREQUAL "")
+  set(HOST_ARCH ${CMAKE_HOST_SYSTEM_PROCESSOR})
+endif()
+
+# set target platform to run
+if(NOT TARGET_ARCH OR "${TARGET_ARCH}" STREQUAL "")
+  set(TARGET_ARCH "${HOST_ARCH}")
+endif()
+
+if(NOT DEFINED HOST_OS)
+  string(TOLOWER ${CMAKE_HOST_SYSTEM_NAME} HOST_OS)
+endif()
+
+if(NOT DEFINED TARGET_OS)
+  set(TARGET_OS "${HOST_OS}")
+endif()
+
+if("${HOST_ARCH}" STREQUAL "x86_64")
+  set(HOST_ARCH_BASE ${HOST_ARCH})
+elseif("${HOST_ARCH}" STREQUAL "armv7l")
+  set(HOST_ARCH_BASE "arm")
+elseif("${HOST_ARCH}" STREQUAL "arm64")
+  set(HOST_ARCH_BASE "arm64")
+elseif("${HOST_ARCH}" STREQUAL "aarch64")
+  set(HOST_ARCH_BASE "aarch64")
+else()
+  message(FATAL_ERROR "'${HOST_ARCH}' architecture is not supported")
+endif()
+
+if("${TARGET_ARCH}" STREQUAL "x86_64")
+  set(TARGET_ARCH_BASE ${TARGET_ARCH})
+elseif("${TARGET_ARCH}" STREQUAL "armv7l")
+  set(TARGET_ARCH_BASE "arm")
+elseif("${TARGET_ARCH}" STREQUAL "arm64")
+  set(TARGET_ARCH_BASE "arm64")
+elseif("${TARGET_ARCH}" STREQUAL "aarch64")
+  set(TARGET_ARCH_BASE "aarch64")
+else()
+  message(FATAL_ERROR "'${TARGET_ARCH}' architecture is not supported")
+endif()
+
+# host & target platform name
+set(HOST_PLATFORM "${HOST_ARCH}-${HOST_OS}")
+set(TARGET_PLATFORM "${TARGET_ARCH}-${TARGET_OS}")
diff --git a/cmake/modules/OptionTools.cmake b/infra/nnfw/cmake/modules/OptionTools.cmake
index 066d53078..066d53078 100644
--- a/cmake/modules/OptionTools.cmake
+++ b/infra/nnfw/cmake/modules/OptionTools.cmake
diff --git a/infra/nnfw/cmake/options/options_aarch64-linux.cmake b/infra/nnfw/cmake/options/options_aarch64-linux.cmake
new file mode 100644
index 000000000..fbe49d421
--- /dev/null
+++ b/infra/nnfw/cmake/options/options_aarch64-linux.cmake
@@ -0,0 +1,8 @@
+#
+# aarch64 linux cmake options
+#
+option(BUILD_ARMCOMPUTE "Build ARM Compute from the downloaded source" ON)
+option(BUILD_ANDROID_TFLITE "Enable android support for TensorFlow Lite" OFF)
+option(DOWNLOAD_ARMCOMPUTE "Download ARM Compute source" ON)
+option(DOWNLOAD_NEON2SSE "Download NEON2SSE library source" OFF)
+option(BUILD_SRCN_KERNEL "Build srcn kernel" ON)
diff --git a/infra/nnfw/cmake/options/options_aarch64-tizen.cmake b/infra/nnfw/cmake/options/options_aarch64-tizen.cmake
new file mode 100644
index 000000000..66ee34284
--- /dev/null
+++ b/infra/nnfw/cmake/options/options_aarch64-tizen.cmake
@@ -0,0 +1,10 @@
+#
+# aarch64 tizen cmake options
+#
+option(BUILD_ARMCOMPUTE "Build ARM Compute from the downloaded source" ON)
+option(BUILD_ANDROID_TFLITE "Enable android support for TensorFlow Lite" OFF)
+option(DOWNLOAD_ARMCOMPUTE "Download ARM Compute source" ON)
+option(DOWNLOAD_NEON2SSE "Download NEON2SSE library source" OFF)
+option(DOWNLOAD_NNPACK "Download NNPACK library source" OFF)
+option(BUILD_SRCN_KERNEL "Build srcn kernel" ON)
+option(ENVVAR_NEURUN_CONFIG "Use environment variable for neurun configuration" OFF)
diff --git a/infra/nnfw/cmake/options/options_arm64-android.cmake b/infra/nnfw/cmake/options/options_arm64-android.cmake
new file mode 100644
index 000000000..486b3bb96
--- /dev/null
+++ b/infra/nnfw/cmake/options/options_arm64-android.cmake
@@ -0,0 +1,7 @@
+# arm64 android cmake options
+#
+option(BUILD_ARMCOMPUTE "Build ARM Compute from the downloaded source" ON)
+option(BUILD_ANDROID_TFLITE "Enable android support for TensorFlow Lite" ON)
+option(DOWNLOAD_ARMCOMPUTE "Download ARM Compute source" ON)
+option(DOWNLOAD_NEON2SSE "Download NEON2SSE library source" OFF)
+
diff --git a/infra/nnfw/cmake/options/options_armv7l-linux.cmake b/infra/nnfw/cmake/options/options_armv7l-linux.cmake
new file mode 100644
index 000000000..f06f998d9
--- /dev/null
+++ b/infra/nnfw/cmake/options/options_armv7l-linux.cmake
@@ -0,0 +1,8 @@
+#
+# armv7l linux cmake options
+#
+option(BUILD_ARMCOMPUTE "Build ARM Compute from the downloaded source" ON)
+option(BUILD_ANDROID_TFLITE "Enable android support for TensorFlow Lite" OFF)
+option(DOWNLOAD_ARMCOMPUTE "Download ARM Compute source" ON)
+option(DOWNLOAD_NEON2SSE "Download NEON2SSE library source" OFF)
+option(BUILD_SRCN_KERNEL "Build srcn kernel" ON)
diff --git a/infra/nnfw/cmake/options/options_armv7l-tizen.cmake b/infra/nnfw/cmake/options/options_armv7l-tizen.cmake
new file mode 100644
index 000000000..3ba48f332
--- /dev/null
+++ b/infra/nnfw/cmake/options/options_armv7l-tizen.cmake
@@ -0,0 +1,12 @@
+#
+# armv7l tizen cmake options
+#
+option(BUILD_ARMCOMPUTE "Build ARM Compute from the downloaded source" ON)
+option(BUILD_ANDROID_TFLITE "Enable android support for TensorFlow Lite" OFF)
+option(DOWNLOAD_ARMCOMPUTE "Download ARM Compute source" ON)
+option(DOWNLOAD_NEON2SSE "Download NEON2SSE library source" OFF)
+option(DOWNLOAD_NNPACK "Download NNPACK library source" OFF)
+option(BUILD_TFLITE_LOADER "Build tensorflow lite file loader" ON)
+option(BUILD_TFLITE_LOADER_TEST_TOOL "Build tflite loader testing tool" OFF)
+option(BUILD_SRCN_KERNEL "Build srcn kernel" ON)
+option(ENVVAR_NEURUN_CONFIG "Use environment variable for neurun configuration" OFF)
diff --git a/infra/nnfw/cmake/options/options_x86_64-linux.cmake b/infra/nnfw/cmake/options/options_x86_64-linux.cmake
new file mode 100644
index 000000000..179e5bdb2
--- /dev/null
+++ b/infra/nnfw/cmake/options/options_x86_64-linux.cmake
@@ -0,0 +1,7 @@
+#
+# x86_64 linux cmake options
+#
+option(BUILD_ARMCOMPUTE "Build ARM Compute from the downloaded source" OFF)
+option(BUILD_ANDROID_TFLITE "Enable android support for TensorFlow Lite" OFF)
+option(DOWNLOAD_ARMCOMPUTE "Download ARM Compute source" OFF)
+option(DOWNLOAD_NEON2SSE "Download NEON2SSE library source" ON)
diff --git a/infra/nnfw/cmake/packages/ARMCompute/SConstruct b/infra/nnfw/cmake/packages/ARMCompute/SConstruct
new file mode 100644
index 000000000..9c0e4a84e
--- /dev/null
+++ b/infra/nnfw/cmake/packages/ARMCompute/SConstruct
@@ -0,0 +1,309 @@
+# Copyright (c) 2016, 2017 ARM Limited.
+#
+# SPDX-License-Identifier: MIT
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to
+# deal in the Software without restriction, including without limitation the
+# rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+# sell copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in all
+# copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+import SCons
+import os
+import subprocess
+
+def version_at_least(version, required):
+    end = min(len(version), len(required))
+
+    for i in range(0, end, 2):
+        if int(version[i]) < int(required[i]):
+            return False
+        elif int(version[i]) > int(required[i]):
+            return True
+
+    return True
+
+vars = Variables("scons")
+vars.AddVariables(
+    BoolVariable("debug", "Debug", False),
+    BoolVariable("asserts", "Enable asserts (this flag is forced to 1 for debug=1)", False),
+    BoolVariable("logging", "Logging (this flag is forced to 1 for debug=1)", False),
+    EnumVariable("arch", "Target Architecture", "armv7a", allowed_values=("armv7a", "arm64-v8a", "arm64-v8.2-a", "arm64-v8.2-a-sve", "x86_32", "x86_64")),
+    EnumVariable("os", "Target OS", "linux", allowed_values=("linux", "android", "tizen", "bare_metal")),
+    EnumVariable("build", "Build type", "cross_compile", allowed_values=("native", "cross_compile", "embed_only")),
+    BoolVariable("examples", "Build example programs", True),
+    BoolVariable("Werror", "Enable/disable the -Werror compilation flag", True),
+    BoolVariable("standalone", "Builds the tests as standalone executables, links statically with libgcc, libstdc++ and libarm_compute", False),
+    BoolVariable("opencl", "Enable OpenCL support", True),
+    BoolVariable("neon", "Enable Neon support", False),
+    BoolVariable("gles_compute", "Enable OpenGL ES Compute Shader support", False),
+    BoolVariable("embed_kernels", "Embed OpenCL kernels and OpenGL ES compute shaders in library binary", True),
+    BoolVariable("set_soname", "Set the library's soname and shlibversion (requires SCons 2.4 or above)", False),
+    BoolVariable("openmp", "Enable OpenMP backend", False),
+    BoolVariable("cppthreads", "Enable C++11 threads backend", True),
+    PathVariable("build_dir", "Specify sub-folder for the build", ".", PathVariable.PathAccept),
+    PathVariable("install_dir", "Specify sub-folder for the install", "", PathVariable.PathAccept),
+    ("extra_cxx_flags", "Extra CXX flags to be appended to the build command", ""),
+    ("extra_link_flags", "Extra LD flags to be appended to the build command", ""),
+    ("compiler_cache", "Command to prefix to the C and C++ compiler (e.g ccache)", "")
+)
+
+env = Environment(platform="posix", variables=vars, ENV = os.environ)
+build_path = env['build_dir']
+# If build_dir is a relative path then add a #build/ prefix:
+if not env['build_dir'].startswith('/'):
+    SConsignFile('build/%s/.scons' % build_path)
+    build_path = "#build/%s" % build_path
+else:
+    SConsignFile('%s/.scons' % build_path)
+
+install_path = env['install_dir']
+#If the install_dir is a relative path then assume it's from inside build_dir
+if not env['install_dir'].startswith('/') and install_path != "":
+    install_path = "%s/%s" % (build_path, install_path)
+
+env.Append(LIBPATH = [build_path])
+Export('env')
+Export('vars')
+
+def install_lib( lib ):
+    # If there is no install folder, then there is nothing to do:
+    if install_path == "":
+        return lib
+    return env.Install( "%s/lib/" % install_path, lib)
+def install_bin( bin ):
+    # If there is no install folder, then there is nothing to do:
+    if install_path == "":
+        return bin
+    return env.Install( "%s/bin/" % install_path, bin)
+def install_include( inc ):
+    if install_path == "":
+        return inc
+    return env.Install( "%s/include/" % install_path, inc)
+
+Export('install_lib')
+Export('install_bin')
+
+Help(vars.GenerateHelpText(env))
+
+if env['build'] == "embed_only":
+    SConscript('./SConscript', variant_dir=build_path, duplicate=0)
+    Return()
+
+if env['neon'] and 'x86' in env['arch']:
+    print("Cannot compile NEON for x86")
+    Exit(1)
+
+if env['set_soname'] and not version_at_least(SCons.__version__, "2.4"):
+    print("Setting the library's SONAME / SHLIBVERSION requires SCons 2.4 or above")
+    print("Update your version of SCons or use set_soname=0")
+    Exit(1)
+
+if env['os'] == 'bare_metal':
+    if env['cppthreads'] or env['openmp']:
+         print("ERROR: OpenMP and C++11 threads not supported in bare_metal. Use cppthreads=0 openmp=0")
+         Exit(1)
+
+env.Append(CXXFLAGS = ['-Wno-deprecated-declarations','-Wall','-DARCH_ARM',
+         '-Wextra','-Wno-unused-parameter','-pedantic','-Wdisabled-optimization','-Wformat=2',
+         '-Winit-self','-Wstrict-overflow=2','-Wswitch-default',
+         '-fpermissive','-std=gnu++11','-Wno-vla','-Woverloaded-virtual',
+         '-Wctor-dtor-privacy','-Wsign-promo','-Weffc++','-Wno-format-nonliteral','-Wno-overlength-strings','-Wno-strict-overflow'])
+
+env.Append(CPPDEFINES = ['_GLIBCXX_USE_NANOSLEEP'])
+
+default_cpp_compiler = 'g++' if env['os'] != 'android' else 'clang++'
+default_c_compiler = 'gcc' if env['os'] != 'android' else 'clang'
+cpp_compiler = os.environ.get('CXX', default_cpp_compiler)
+c_compiler = os.environ.get('CC', default_c_compiler)
+
+if env['os'] == 'android' and ( 'clang++' not in cpp_compiler or 'clang' not in c_compiler ):
+    print( "WARNING: Only clang is officially supported to build the Compute Library for Android")
+
+if 'clang++' in cpp_compiler:
+    env.Append(CXXFLAGS = ['-Wno-format-nonliteral','-Wno-deprecated-increment-bool','-Wno-vla-extension','-Wno-mismatched-tags'])
+else:
+    env.Append(CXXFLAGS = ['-Wlogical-op','-Wnoexcept','-Wstrict-null-sentinel','-Wno-implicit-fallthrough'])
+
+if env['cppthreads']:
+    env.Append(CPPDEFINES = [('ARM_COMPUTE_CPP_SCHEDULER', 1)])
+
+if env['openmp']:
+    if 'clang++' in cpp_compiler:
+        print( "Clang does not support OpenMP. Use scheduler=cpp.")
+        Exit(1)
+
+    env.Append(CPPDEFINES = [('ARM_COMPUTE_OPENMP_SCHEDULER', 1)])
+    env.Append(CXXFLAGS = ['-fopenmp'])
+    env.Append(LINKFLAGS = ['-fopenmp'])
+
+prefix = ""
+if env['arch'] == 'armv7a':
+    env.Append(CXXFLAGS = ['-march=armv7-a', '-mthumb', '-mfpu=neon'])
+
+    if env['os'] == 'linux':
+        prefix = "arm-linux-gnueabihf-"
+        env.Append(CXXFLAGS = ['-mfloat-abi=hard'])
+    elif env['os'] == 'bare_metal':
+        prefix = "arm-eabi-"
+        env.Append(CXXFLAGS = ['-mfloat-abi=hard'])
+    elif env['os'] == 'android':
+        prefix = "arm-linux-androideabi-"
+        env.Append(CXXFLAGS = ['-mfloat-abi=softfp'])
+    elif env['os'] == 'tizen':
+        prefix = "arm-linux-gnueabi-"
+        env.Append(CXXFLAGS = ['-mfloat-abi=softfp'])
+elif env['arch'] == 'arm64-v8a':
+    env.Append(CXXFLAGS = ['-march=armv8-a'])
+    env.Append(CPPDEFINES = ['ARM_COMPUTE_AARCH64_V8A','NO_DOT_IN_TOOLCHAIN'])
+    if env['os'] == 'linux':
+        prefix = "aarch64-linux-gnu-"
+    elif env['os'] == 'bare_metal':
+        prefix = "aarch64-elf-"
+    elif env['os'] == 'android':
+        prefix = "aarch64-linux-android-"
+    elif env['os'] == 'tizen':
+        prefix = "aarch64-linux-gnu-"
+    if 'clang++' in cpp_compiler:
+        env.Append(CXXFLAGS = ['-no-integrated-as'])
+elif 'arm64-v8.2-a' in env['arch']:
+    if env['arch'] == 'arm64-v8.2-a-sve':
+        if env['os'] != 'bare_metal':
+            print("Only bare metal SVE is supported at the moment")
+            Exit(1)
+        env.Append(CXXFLAGS = ['-march=armv8.2-a+sve+fp16+dotprod'])
+    else:
+        env.Append(CXXFLAGS = ['-march=armv8.2-a+fp16']) # explicitly enable fp16 extension otherwise __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is undefined
+        if env['os'] == 'linux':
+            prefix = "aarch64-linux-gnu-"
+        elif env['os'] == 'bare_metal':
+            prefix = "aarch64-elf-"
+        elif env['os'] == 'android':
+            prefix = "aarch64-linux-android-"
+        elif env['os'] == 'tizen':
+            prefix = "aarch64-linux-gnu-"
+    env.Append(CPPDEFINES = ['ARM_COMPUTE_AARCH64_V8_2','NO_DOT_IN_TOOLCHAIN'])
+    if 'clang++' in cpp_compiler:
+        env.Append(CXXFLAGS = ['-no-integrated-as'])
+elif env['arch'] == 'x86_32':
+    env.Append(CCFLAGS = ['-m32'])
+    env.Append(LINKFLAGS = ['-m32'])
+elif env['arch'] == 'x86_64':
+    env.Append(CCFLAGS = ['-m64'])
+    env.Append(LINKFLAGS = ['-m64'])
+
+if env['build'] == 'native':
+    prefix = ""
+
+env['CC'] = env['compiler_cache']+" "+prefix + c_compiler
+env['CXX'] = env['compiler_cache']+" "+prefix + cpp_compiler
+env['LD'] = prefix + "ld"
+env['AS'] = prefix + "as"
+env['AR'] = prefix + "ar"
+env['RANLIB'] = prefix + "ranlib"
+
+if not GetOption("help"):
+    try:
+        compiler_ver = subprocess.check_output(env['CXX'].split() + ["-dumpversion"]).strip()
+    except OSError:
+        print("ERROR: Compiler '%s' not found" % env['CXX'])
+        Exit(1)
+
+    if 'clang++' not in cpp_compiler:
+        if env['arch'] == 'arm64-v8.2-a' and not version_at_least(compiler_ver, '6.2.1'):
+            print("GCC 6.2.1 or newer is required to compile armv8.2-a code")
+            Exit(1)
+        elif env['arch'] == 'arm64-v8a' and not version_at_least(compiler_ver, '4.9'):
+            print("GCC 4.9 or newer is required to compile NEON code for AArch64")
+            Exit(1)
+
+        if version_at_least(compiler_ver, '6.1'):
+            env.Append(CXXFLAGS = ['-Wno-ignored-attributes'])
+
+        if compiler_ver == '4.8.3':
+            env.Append(CXXFLAGS = ['-Wno-array-bounds'])
+
+if env['standalone']:
+    env.Append(CXXFLAGS = ['-fPIC'])
+    env.Append(LINKFLAGS = ['-static-libgcc','-static-libstdc++'])
+
+if env['Werror']:
+    env.Append(CXXFLAGS = ['-Werror'])
+
+if env['os'] == 'android':
+    env.Append(CPPDEFINES = ['ANDROID'])
+    env.Append(LINKFLAGS = ['-pie', '-static-libstdc++'])
+elif env['os'] == 'bare_metal':
+    env.Append(LINKFLAGS = ['-static'])
+    env.Append(LINKFLAGS = ['-specs=rdimon.specs'])
+    env.Append(CXXFLAGS = ['-fPIC'])
+    env.Append(CPPDEFINES = ['NO_MULTI_THREADING'])
+    env.Append(CPPDEFINES = ['BARE_METAL'])
+
+if env['opencl']:
+    if env['os'] in ['bare_metal'] or env['standalone']:
+        print("Cannot link OpenCL statically, which is required for bare metal / standalone builds")
+        Exit(1)
+
+if env['gles_compute']:
+    if env['os'] in ['bare_metal'] or env['standalone']:
+        print("Cannot link OpenGLES statically, which is required for bare metal / standalone builds")
+        Exit(1)
+
+if env["os"] not in ["android", "bare_metal"] and (env['opencl'] or env['cppthreads']):
+    env.Append(LIBS = ['pthread'])
+
+if env['opencl'] or env['gles_compute']:
+    if env['embed_kernels']:
+        env.Append(CPPDEFINES = ['EMBEDDED_KERNELS'])
+
+if env['debug']:
+    env['asserts'] = True
+    env['logging'] = True
+    env.Append(CXXFLAGS = ['-O0','-g','-gdwarf-2'])
+    env.Append(CPPDEFINES = ['ARM_COMPUTE_DEBUG_ENABLED'])
+else:
+    env.Append(CXXFLAGS = ['-O3','-ftree-vectorize'])
+
+if env['asserts']:
+    env.Append(CPPDEFINES = ['ARM_COMPUTE_ASSERTS_ENABLED'])
+    env.Append(CXXFLAGS = ['-fstack-protector-strong'])
+
+if env['logging']:
+    env.Append(CPPDEFINES = ['ARM_COMPUTE_LOGGING_ENABLED'])
+
+env.Append(CPPPATH = ['#/include', "#"])
+env.Append(CXXFLAGS = env['extra_cxx_flags'])
+env.Append(LINKFLAGS = env['extra_link_flags'])
+
+Default( install_include("arm_compute"))
+Default( install_include("support"))
+
+Export('version_at_least')
+
+if env['opencl']:
+    SConscript("./opencl-1.2-stubs/SConscript", variant_dir="%s/opencl-1.2-stubs" % build_path, duplicate=0)
+
+if env['gles_compute'] and env['os'] != 'android':
+    env.Append(CPPPATH = ['#/include/linux'])
+    SConscript("./opengles-3.1-stubs/SConscript", variant_dir="%s/opengles-3.1-stubs" % build_path, duplicate=0)
+
+SConscript('./SConscript', variant_dir=build_path, duplicate=0)
+
+if env['examples'] and env['os'] != 'bare_metal':
+    SConscript('./examples/SConscript', variant_dir='%s/examples' % build_path, duplicate=0)
+
+if env['os'] != 'bare_metal':
+    SConscript('./tests/SConscript', variant_dir='%s/tests' % build_path, duplicate=0)
diff --git a/infra/nnfw/cmake/packages/ARMComputeConfig.cmake b/infra/nnfw/cmake/packages/ARMComputeConfig.cmake
new file mode 100644
index 000000000..ccf96692e
--- /dev/null
+++ b/infra/nnfw/cmake/packages/ARMComputeConfig.cmake
@@ -0,0 +1,205 @@
+function(_ARMCompute_Import)
+  include(FindPackageHandleStandardArgs)
+
+  list(APPEND ARMCompute_LIB_SEARCH_PATHS ${ARMCompute_PREFIX})
+
+  find_path(INCLUDE_DIR NAMES arm_compute/core/ITensor.h PATHS ${ARMCompute_INCLUDE_SEARCH_PATHS})
+
+  find_library(CORE_LIBRARY NAMES  	 arm_compute_core  PATHS ${ARMCompute_LIB_SEARCH_PATHS})
+  find_library(RUNTIME_LIBRARY NAMES arm_compute       PATHS ${ARMCompute_LIB_SEARCH_PATHS})
+  find_library(GRAPH_LIBRARY NAMES   arm_compute_graph PATHS ${ARMCompute_LIB_SEARCH_PATHS})
+
+  if(NOT INCLUDE_DIR)
+    nnfw_find_package(ARMComputeSource QUIET)
+    if (NOT ARMComputeSource_FOUND)
+      set(ARMCompute_FOUND FALSE PARENT_SCOPE)
+      return()
+    endif()
+    set(INCLUDE_DIR ${NNFW_EXTERNALS_DIR}/acl ${NNFW_EXTERNALS_DIR}/acl/include)
+  endif(NOT INCLUDE_DIR)
+
+  # NOTE '${CMAKE_INSTALL_PREFIX}/lib' should be searched as CI server places
+  #       pre-built ARM compute libraries on this directory
+  if(NOT CORE_LIBRARY AND EXISTS ${CMAKE_INSTALL_PREFIX}/lib/libarm_compute_core.so)
+    set(CORE_LIBRARY ${CMAKE_INSTALL_PREFIX}/lib/libarm_compute_core.so)
+  endif()
+
+  if(NOT CORE_LIBRARY)
+    set(ARMCompute_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif()
+
+  if(NOT RUNTIME_LIBRARY AND EXISTS ${CMAKE_INSTALL_PREFIX}/lib/libarm_compute.so)
+    set(RUNTIME_LIBRARY ${CMAKE_INSTALL_PREFIX}/lib/libarm_compute.so)
+  endif()
+
+  if(NOT RUNTIME_LIBRARY)
+    set(ARMCompute_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif()
+
+  if(NOT GRAPH_LIBRARY AND EXISTS ${CMAKE_INSTALL_PREFIX}/lib/libarm_compute_graph.so)
+    set(GRAPH_LIBRARY ${CMAKE_INSTALL_PREFIX}/lib/libarm_compute_graph.so)
+  endif()
+
+  if(NOT GRAPH_LIBRARY)
+    set(ARMCompute_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif()
+
+  if(NOT TARGET arm_compute_core)
+    add_library(arm_compute_core INTERFACE)
+    target_include_directories(arm_compute_core SYSTEM INTERFACE ${INCLUDE_DIR})
+	target_link_libraries(arm_compute_core INTERFACE dl ${LIB_PTHREAD})
+    target_link_libraries(arm_compute_core INTERFACE ${CORE_LIBRARY})
+  endif(NOT TARGET arm_compute_core)
+
+  if(NOT TARGET arm_compute)
+    add_library(arm_compute INTERFACE)
+    target_include_directories(arm_compute SYSTEM INTERFACE ${INCLUDE_DIR})
+    target_link_libraries(arm_compute INTERFACE ${RUNTIME_LIBRARY})
+    target_link_libraries(arm_compute INTERFACE arm_compute_core)
+  endif(NOT TARGET arm_compute)
+
+  if(NOT TARGET arm_compute_graph)
+    add_library(arm_compute_graph INTERFACE)
+    target_include_directories(arm_compute_graph SYSTEM INTERFACE ${INCLUDE_DIR})
+    target_link_libraries(arm_compute_graph INTERFACE ${GRAPH_LIBRARY})
+    target_link_libraries(arm_compute_graph INTERFACE arm_compute)
+  endif(NOT TARGET arm_compute_graph)
+
+  set(ARMCompute_FOUND TRUE PARENT_SCOPE)
+endfunction(_ARMCompute_Import)
+
+### Check whether library exists
+function(_ARMCompute_Check VAR LIBDIR)
+  set(FOUND TRUE)
+
+  if(NOT EXISTS "${LIBDIR}/libarm_compute_core.so")
+    set(FOUND FALSE)
+  endif()
+
+  if(NOT EXISTS "${LIBDIR}/libarm_compute.so")
+    set(FOUND FALSE)
+  endif()
+
+  if(NOT EXISTS "${LIBDIR}/libarm_compute_graph.so")
+    set(FOUND FALSE)
+  endif()
+
+  set(${VAR} ${FOUND} PARENT_SCOPE)
+endfunction(_ARMCompute_Check)
+
+# Let's build and install ARMCompute libraries
+# NOTE This function silently returns on error
+function(_ARMCompute_Build ARMCompute_PREFIX)
+  ### Check whether library exists
+  _ARMCompute_Check(ARMCompute_FOUND ${ARMCompute_PREFIX})
+
+  if(ARMCompute_FOUND)
+    return()
+  endif(ARMCompute_FOUND)
+
+  ### Let's build with SCONS
+  nnfw_find_package(ARMComputeSource QUIET)
+
+  if(NOT ARMComputeSource_FOUND)
+    return()
+  endif(NOT ARMComputeSource_FOUND)
+
+  find_program(SCONS_PATH scons)
+
+  if(NOT SCONS_PATH)
+    return()
+  endif(NOT SCONS_PATH)
+
+  if(CMAKE_BUILD_TYPE)
+    string(TOLOWER "${CMAKE_BUILD_TYPE}" SCON_BUILD_TYPE)
+  else(CMAKE_BUILD_TYPE)
+    set(SCON_BUILD_TYPE "release")
+  endif(CMAKE_BUILD_TYPE)
+
+  #### Architecture-specific configurations
+  if(TARGET_ARCH STREQUAL "armv7l")
+    set(BUILD_ARCH "armv7a")
+    set(BUILD_DIR "${BUILD_ARCH}-${TARGET_OS}.${SCON_BUILD_TYPE}")
+  endif()
+
+  if(TARGET_ARCH STREQUAL "aarch64")
+    set(BUILD_ARCH "arm64-v8a")
+    set(BUILD_DIR "${BUILD_ARCH}-${TARGET_OS}.${SCON_BUILD_TYPE}")
+  endif()
+
+  if(TARGET_ARCH STREQUAL "arm64")
+    set(BUILD_ARCH "arm64-v8a")
+    set(BUILD_DIR "${BUILD_ARCH}-${TARGET_OS}.${SCON_BUILD_TYPE}")
+  endif()
+
+  #### Platform-specific configurations
+  #### TODO Support android
+
+  #### Mode-specific configurations
+  if(SCON_BUILD_TYPE STREQUAL "debug")
+    list(APPEND SCONS_OPTIONS "debug=1")
+  endif()
+
+  #### Generic configurations
+  list(APPEND SCONS_OPTIONS "neon=1")
+  list(APPEND SCONS_OPTIONS "opencl=1")
+  list(APPEND SCONS_OPTIONS "examples=0")
+  list(APPEND SCONS_OPTIONS "Werror=0")
+  list(APPEND SCONS_OPTIONS "os=${TARGET_OS}")
+  include(ProcessorCount)
+  ProcessorCount(N)
+  if((NOT N EQUAL 0) AND BUILD_EXT_MULTITHREAD)
+    list(APPEND SCONS_OPTIONS -j${N})
+  endif()
+  if(DEFINED BUILD_ARCH)
+    list(APPEND SCONS_OPTIONS "arch=${BUILD_ARCH}")
+  endif(DEFINED BUILD_ARCH)
+
+  if(DEFINED BUILD_DIR)
+    list(APPEND SCONS_OPTIONS "build_dir=${BUILD_DIR}")
+  endif(DEFINED BUILD_DIR)
+
+  message(STATUS "Build ARMCompute with ${SCONS_PATH} ('${SCONS_OPTIONS}'")
+
+  # Copy externals/SConstruct to externals/acl/ for Tizen build support.
+  # TODO The change of externals/SConstruct should be upstreamed to ARM Compute Library community layer.
+  execute_process(COMMAND ${CMAKE_COMMAND} -E copy "${CMAKE_CURRENT_LIST_DIR}/ARMCompute/SConstruct" "${ARMComputeSource_DIR}")
+
+  # Build ARMCompute libraries with SCONS
+  # NOTE ARMCompute SConstruct unconditioanlly appends "arm-linux-gnueabihf-" prefix for linux
+  execute_process(COMMAND /usr/bin/env CC=gcc CXX=g++ "${SCONS_PATH}" ${SCONS_OPTIONS}
+                  WORKING_DIRECTORY ${ARMComputeSource_DIR}
+                  RESULT_VARIABLE ARMCompute_BUILD)
+
+  # Install ARMCompute libraries
+  # Ps. CI server will copy below installed libraries to target device to test.
+  execute_process(COMMAND ${CMAKE_COMMAND} -E make_directory "${ARMCompute_PREFIX}"
+                  WORKING_DIRECTORY ${ARMComputeSource_DIR}
+                  RESULT_VARIABLE ARMCompute_BUILD)
+  execute_process(COMMAND ${CMAKE_COMMAND} -E copy "build/${BUILD_DIR}/libarm_compute_core.so" "${ARMCompute_PREFIX}"
+                  COMMAND ${CMAKE_COMMAND} -E copy "build/${BUILD_DIR}/libarm_compute.so" "${ARMCompute_PREFIX}"
+                  COMMAND ${CMAKE_COMMAND} -E copy "build/${BUILD_DIR}/libarm_compute_graph.so" "${ARMCompute_PREFIX}"
+                  WORKING_DIRECTORY ${ARMComputeSource_DIR}
+                  RESULT_VARIABLE ARMCompute_BUILD)
+endfunction(_ARMCompute_Build)
+
+
+set(ARMCompute_PREFIX ${CMAKE_INSTALL_PREFIX}/lib)
+
+# This is a workaround for CI issues
+# Ps. CI server will copy below installed libraries to target device to test.
+# TODO Remove this workaround
+if(DEFINED ARMCompute_EXTDIR)
+  execute_process(COMMAND ${CMAKE_COMMAND} -E make_directory "${ARMCompute_PREFIX}")
+  execute_process(COMMAND ${CMAKE_COMMAND} -E copy "${ARMCompute_EXTDIR}/libarm_compute_core.so" "${ARMCompute_PREFIX}"
+                  COMMAND ${CMAKE_COMMAND} -E copy "${ARMCompute_EXTDIR}/libarm_compute.so" "${ARMCompute_PREFIX}"
+                  COMMAND ${CMAKE_COMMAND} -E copy "${ARMCompute_EXTDIR}/libarm_compute_graph.so" "${ARMCompute_PREFIX}")
+endif(DEFINED ARMCompute_EXTDIR)
+
+if(BUILD_ARMCOMPUTE)
+  _ARMCompute_Build("${ARMCompute_PREFIX}")
+endif(BUILD_ARMCOMPUTE)
+_ARMCompute_Import()
diff --git a/infra/nnfw/cmake/packages/ARMComputeSourceConfig.cmake b/infra/nnfw/cmake/packages/ARMComputeSourceConfig.cmake
new file mode 100644
index 000000000..ef7384d7c
--- /dev/null
+++ b/infra/nnfw/cmake/packages/ARMComputeSourceConfig.cmake
@@ -0,0 +1,13 @@
+function(_ARMComputeSource_import)
+  nnfw_include(ExternalSourceTools)
+  nnfw_include(OptionTools)
+
+  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+  set(ARMCOMPUTE_URL ${EXTERNAL_DOWNLOAD_SERVER}/ARM-software/ComputeLibrary/archive/v19.05.tar.gz)
+  ExternalSource_Get("acl" ${DOWNLOAD_ARMCOMPUTE} ${ARMCOMPUTE_URL})
+
+  set(ARMComputeSource_DIR ${acl_SOURCE_DIR} PARENT_SCOPE)
+  set(ARMComputeSource_FOUND ${acl_SOURCE_GET} PARENT_SCOPE)
+endfunction(_ARMComputeSource_import)
+
+_ARMComputeSource_import()
diff --git a/infra/nnfw/cmake/packages/AbslSourceConfig.cmake b/infra/nnfw/cmake/packages/AbslSourceConfig.cmake
new file mode 100644
index 000000000..685550d52
--- /dev/null
+++ b/infra/nnfw/cmake/packages/AbslSourceConfig.cmake
@@ -0,0 +1,14 @@
+function(_AbslSource_import)
+  nnfw_include(ExternalSourceTools)
+  nnfw_include(OptionTools)
+
+  # NOTE The following URL comes from TensorFlow 1.12
+  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+  set(ABSL_URL ${EXTERNAL_DOWNLOAD_SERVER}/abseil/abseil-cpp/archive/389ec3f906f018661a5308458d623d01f96d7b23.tar.gz)
+  ExternalSource_Get("absl" ${DOWNLOAD_ABSL} ${ABSL_URL})
+
+  set(AbslSource_DIR ${absl_SOURCE_DIR} PARENT_SCOPE)
+  set(AbslSource_FOUND ${absl_SOURCE_GET} PARENT_SCOPE)
+endfunction(_AbslSource_import)
+
+_AbslSource_import()
diff --git a/infra/nnfw/cmake/packages/BoostConfig.cmake b/infra/nnfw/cmake/packages/BoostConfig.cmake
new file mode 100644
index 000000000..26ad78922
--- /dev/null
+++ b/infra/nnfw/cmake/packages/BoostConfig.cmake
@@ -0,0 +1,58 @@
+# Let's build and install Boost libraries
+function(_Boost_Build Boost_PREFIX)
+  nnfw_find_package(BoostSource QUIET)
+
+  if(NOT BoostSource_FOUND)
+    return()
+  endif(NOT BoostSource_FOUND)
+
+  #### Generic configurations
+  if(NOT EXISTS ${BoostSource_DIR}/b2)
+    execute_process(COMMAND "${BoostSource_DIR}/bootstrap.sh"
+                    WORKING_DIRECTORY ${BoostSource_DIR}
+                    RESULT_VARIABLE Boost_BUILD)
+  endif()
+
+  set(BoostBuild_DIR ${BoostSource_DIR})
+  set(BoostInstall_DIR ${Boost_PREFIX})
+
+  unset(Boost_Options)
+
+  list(APPEND Boost_Options --build-dir=${BoostBuild_DIR})
+  list(APPEND Boost_Options --prefix=${BoostInstall_DIR})
+  list(APPEND Boost_Options --with-log)
+  list(APPEND Boost_Options --with-program_options)
+  list(APPEND Boost_Options --with-system)
+  list(APPEND Boost_Options --with-filesystem)
+
+  set(JAM_FILENAME ${BoostBuild_DIR}/user-config.jam)
+
+  file(WRITE ${JAM_FILENAME} "using gcc : local : ${CMAKE_CXX_COMPILER} ;\n")
+  list(APPEND Boost_Options toolset=gcc-local)
+
+  # Install Boost libraries
+  execute_process(COMMAND ${CMAKE_COMMAND} -E make_directory "${BoostInstall_DIR}")
+  execute_process(COMMAND /usr/bin/env BOOST_BUILD_PATH="${BoostBuild_DIR}" ${BoostSource_DIR}/b2 install ${Boost_Options}
+                  WORKING_DIRECTORY ${BoostSource_DIR})
+
+endfunction(_Boost_Build)
+
+# Find pre-installed boost library and update Boost variables.
+find_package(Boost 1.58.0 QUIET COMPONENTS log program_options filesystem system)
+if(Boost_FOUND)
+  return()
+endif()
+
+set(Boost_PREFIX ${CMAKE_INSTALL_PREFIX})
+
+if(BUILD_BOOST)
+  _Boost_Build("${Boost_PREFIX}")
+
+  # Let's use locally built boost to system-wide one so sub modules
+  # needing Boost library and header files can search for them
+  # in ${Boost_PREFIX} directory
+  list(APPEND CMAKE_PREFIX_PATH "${Boost_PREFIX}")
+
+  # We built boost library so update Boost variables.
+  find_package(Boost 1.58.0 QUIET COMPONENTS log program_options filesystem system)
+endif(BUILD_BOOST)
diff --git a/infra/nnfw/cmake/packages/BoostSourceConfig.cmake b/infra/nnfw/cmake/packages/BoostSourceConfig.cmake
new file mode 100644
index 000000000..1b81316fd
--- /dev/null
+++ b/infra/nnfw/cmake/packages/BoostSourceConfig.cmake
@@ -0,0 +1,14 @@
+function(_BoostSource_import)
+  nnfw_include(ExternalSourceTools)
+  nnfw_include(OptionTools)
+
+  # EXTERNAL_DOWNLOAD_SERVER will be overwritten by CI server to use mirror server.
+  envoption(EXTERNAL_DOWNLOAD_SERVER "http://sourceforge.net")
+  set(BOOST_URL ${EXTERNAL_DOWNLOAD_SERVER}/projects/boost/files/boost/1.58.0/boost_1_58_0.tar.gz)
+  ExternalSource_Get("boost" ${DOWNLOAD_BOOST} ${BOOST_URL})
+
+  set(BoostSource_DIR ${boost_SOURCE_DIR} PARENT_SCOPE)
+  set(BoostSource_FOUND ${boost_SOURCE_GET} PARENT_SCOPE)
+endfunction(_BoostSource_import)
+
+_BoostSource_import()
diff --git a/infra/nnfw/cmake/packages/CpuinfoSourceConfig.cmake b/infra/nnfw/cmake/packages/CpuinfoSourceConfig.cmake
new file mode 100644
index 000000000..0939ba3b3
--- /dev/null
+++ b/infra/nnfw/cmake/packages/CpuinfoSourceConfig.cmake
@@ -0,0 +1,14 @@
+function(_cpuinfoSource_import)
+    nnfw_include(ExternalSourceTools)
+    nnfw_include(OptionTools)
+
+    envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+    set(CPUINFO_URL ${EXTERNAL_DOWNLOAD_SERVER}/pytorch/cpuinfo/archive/d5e37adf1406cf899d7d9ec1d317c47506ccb970.tar.gz)
+
+    ExternalSource_Get("cpuinfo" ${DOWNLOAD_NNPACK} ${CPUINFO_URL})
+
+    set(CPUINFO_SOURCE_DIR ${cpuinfo_SOURCE_DIR} PARENT_SCOPE)
+    set(CPUINFO_SOURCE_FOUND ${cpuinfo_SOURCE_GET} PARENT_SCOPE)
+endfunction(_cpuinfoSource_import)
+
+_cpuinfoSource_import()
diff --git a/cmake/packages/EigenConfig.cmake b/infra/nnfw/cmake/packages/EigenConfig.cmake
index 0feb0890a..0feb0890a 100644
--- a/cmake/packages/EigenConfig.cmake
+++ b/infra/nnfw/cmake/packages/EigenConfig.cmake
diff --git a/infra/nnfw/cmake/packages/EigenSourceConfig.cmake b/infra/nnfw/cmake/packages/EigenSourceConfig.cmake
new file mode 100644
index 000000000..e9b0ba8f1
--- /dev/null
+++ b/infra/nnfw/cmake/packages/EigenSourceConfig.cmake
@@ -0,0 +1,14 @@
+function(_EigenSource_import)
+  nnfw_include(ExternalSourceTools)
+  nnfw_include(OptionTools)
+
+  # NOTE TensorFlow 1.12 downloads Eign from the following URL
+  envoption(EXTERNAL_DOWNLOAD_SERVER "https://bitbucket.org")
+  set(EIGEN_URL ${EXTERNAL_DOWNLOAD_SERVER}/eigen/eigen/get/88fc23324517.tar.gz)
+  ExternalSource_Get("eigen" ${DOWNLOAD_EIGEN} ${EIGEN_URL})
+
+  set(EigenSource_DIR ${eigen_SOURCE_DIR} PARENT_SCOPE)
+  set(EigenSource_FOUND ${eigen_SOURCE_GET} PARENT_SCOPE)
+endfunction(_EigenSource_import)
+
+_EigenSource_import()
diff --git a/infra/nnfw/cmake/packages/Enum34SourceConfig.cmake b/infra/nnfw/cmake/packages/Enum34SourceConfig.cmake
new file mode 100644
index 000000000..96b6ca85a
--- /dev/null
+++ b/infra/nnfw/cmake/packages/Enum34SourceConfig.cmake
@@ -0,0 +1,14 @@
+function(_enum34Source_import)
+    nnfw_include(ExternalSourceTools)
+    nnfw_include(OptionTools)
+
+    envoption(EXTERNAL_DOWNLOAD_SERVER "https://bitbucket.org")
+    set(ENUM34_URL ${EXTERNAL_DOWNLOAD_SERVER}/stoneleaf/enum34/get/1.1.6.tar.gz)
+
+    ExternalSource_Get("python_enum" ${DOWNLOAD_NNPACK} ${ENUM34_URL})
+
+    set(PYTHON_ENUM_SOURCE_DIR ${python_enum_SOURCE_DIR} PARENT_SCOPE)
+    set(PYTHON_ENUM_SOURCE_FOUND ${python_enum_SOURCE_GET} PARENT_SCOPE)
+endfunction(_enum34Source_import)
+
+_enum34Source_import()
diff --git a/infra/nnfw/cmake/packages/FP16SourceConfig.cmake b/infra/nnfw/cmake/packages/FP16SourceConfig.cmake
new file mode 100644
index 000000000..7df52948e
--- /dev/null
+++ b/infra/nnfw/cmake/packages/FP16SourceConfig.cmake
@@ -0,0 +1,14 @@
+function(_FP16Source_import)
+    nnfw_include(ExternalSourceTools)
+    nnfw_include(OptionTools)
+
+    envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+    set(FP16_URL ${EXTERNAL_DOWNLOAD_SERVER}/Maratyszcza/FP16/archive/febbb1c163726b5db24bed55cc9dc42529068997.tar.gz)
+
+    ExternalSource_Get("FP16" ${DOWNLOAD_NNPACK} ${FP16_URL})
+
+    set(FP16_SOURCE_DIR ${FP16_SOURCE_DIR} PARENT_SCOPE)
+    set(FP16_SOURCE_FOUND ${FP16_SOURCE_GET} PARENT_SCOPE)
+endfunction(_FP16Source_import)
+
+_FP16Source_import()
diff --git a/infra/nnfw/cmake/packages/FXdivSourceConfig.cmake b/infra/nnfw/cmake/packages/FXdivSourceConfig.cmake
new file mode 100644
index 000000000..2ea574ab8
--- /dev/null
+++ b/infra/nnfw/cmake/packages/FXdivSourceConfig.cmake
@@ -0,0 +1,14 @@
+function(_FXdivSource_import)
+    nnfw_include(ExternalSourceTools)
+    nnfw_include(OptionTools)
+
+    envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+    set(FXDIV_URL ${EXTERNAL_DOWNLOAD_SERVER}/Maratyszcza/FXdiv/archive/f8c5354679ec2597792bc70a9e06eff50c508b9a.tar.gz)
+
+    ExternalSource_Get("FXdiv" ${DOWNLOAD_NNPACK} ${FXDIV_URL})
+
+    set(FXDIV_SOURCE_DIR ${FXdiv_SOURCE_DIR} PARENT_SCOPE)
+    set(FXDIV_SOURCE_FOUND ${FXdiv_SOURCE_GET} PARENT_SCOPE)
+endfunction(_FXdivSource_import)
+
+_FXdivSource_import()
diff --git a/infra/nnfw/cmake/packages/FarmhashSourceConfig.cmake b/infra/nnfw/cmake/packages/FarmhashSourceConfig.cmake
new file mode 100644
index 000000000..b2cb9886d
--- /dev/null
+++ b/infra/nnfw/cmake/packages/FarmhashSourceConfig.cmake
@@ -0,0 +1,14 @@
+function(_FarmhashSource_import)
+  nnfw_include(ExternalSourceTools)
+  nnfw_include(OptionTools)
+
+  # NOTE TensorFlow 1.12 downloads farmhash from the following URL
+  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+  set(FARMHASH_URL ${EXTERNAL_DOWNLOAD_SERVER}/google/farmhash/archive/816a4ae622e964763ca0862d9dbd19324a1eaf45.tar.gz)
+  ExternalSource_Get("farmhash" ${DOWNLOAD_FARMHASH} ${FARMHASH_URL})
+
+  set(FarmhashSource_DIR ${farmhash_SOURCE_DIR} PARENT_SCOPE)
+  set(FarmhashSource_FOUND ${farmhash_SOURCE_GET} PARENT_SCOPE)
+endfunction(_FarmhashSource_import)
+
+_FarmhashSource_import()
diff --git a/cmake/packages/FlatBuffersConfig.cmake b/infra/nnfw/cmake/packages/FlatBuffersConfig.cmake
index 064673158..064673158 100644
--- a/cmake/packages/FlatBuffersConfig.cmake
+++ b/infra/nnfw/cmake/packages/FlatBuffersConfig.cmake
diff --git a/infra/nnfw/cmake/packages/FlatBuffersSourceConfig.cmake b/infra/nnfw/cmake/packages/FlatBuffersSourceConfig.cmake
new file mode 100644
index 000000000..f8a85effc
--- /dev/null
+++ b/infra/nnfw/cmake/packages/FlatBuffersSourceConfig.cmake
@@ -0,0 +1,14 @@
+function(_FlatBuffersSource_import)
+  nnfw_include(ExternalSourceTools)
+  nnfw_include(OptionTools)
+
+  # NOTE TensorFlow 1.12 downloads FlatBuffers from the following URL
+  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+  set(FLATBUFFERS_URL ${EXTERNAL_DOWNLOAD_SERVER}/google/flatbuffers/archive/1f5eae5d6a135ff6811724f6c57f911d1f46bb15.tar.gz)
+  ExternalSource_Get("flatbuffers" ${DOWNLOAD_FLATBUFFERS} ${FLATBUFFERS_URL})
+
+  set(FlatBuffersSource_DIR ${flatbuffers_SOURCE_DIR} PARENT_SCOPE)
+  set(FlatBuffersSource_FOUND ${flatbuffers_SOURCE_GET} PARENT_SCOPE)
+endfunction(_FlatBuffersSource_import)
+
+_FlatBuffersSource_import()
diff --git a/infra/nnfw/cmake/packages/GEMMLowpSourceConfig.cmake b/infra/nnfw/cmake/packages/GEMMLowpSourceConfig.cmake
new file mode 100644
index 000000000..51b8ff993
--- /dev/null
+++ b/infra/nnfw/cmake/packages/GEMMLowpSourceConfig.cmake
@@ -0,0 +1,14 @@
+function(_GEMMLowpSource_import)
+  nnfw_include(ExternalSourceTools)
+  nnfw_include(OptionTools)
+
+  # NOTE TensorFlow 1.12 uses the following URL
+  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+  set(GEMMLOWP_URL ${EXTERNAL_DOWNLOAD_SERVER}/google/gemmlowp/archive/38ebac7b059e84692f53e5938f97a9943c120d98.tar.gz)
+  ExternalSource_Get("gemmlowp" ${DOWNLOAD_GEMMLOWP} ${GEMMLOWP_URL})
+
+  set(GEMMLowpSource_DIR ${gemmlowp_SOURCE_DIR} PARENT_SCOPE)
+  set(GEMMLowpSource_FOUND ${gemmlowp_SOURCE_GET} PARENT_SCOPE)
+endfunction(_GEMMLowpSource_import)
+
+_GEMMLowpSource_import()
diff --git a/infra/nnfw/cmake/packages/GTestConfig.cmake b/infra/nnfw/cmake/packages/GTestConfig.cmake
new file mode 100644
index 000000000..990a3d52e
--- /dev/null
+++ b/infra/nnfw/cmake/packages/GTestConfig.cmake
@@ -0,0 +1,43 @@
+if(${BUILD_GTEST})
+  nnfw_include(ExternalSourceTools)
+  nnfw_include(ExternalProjectTools)
+  nnfw_include(OptionTools)
+
+  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+  set(GTEST_URL ${EXTERNAL_DOWNLOAD_SERVER}/google/googletest/archive/release-1.8.0.tar.gz)
+  ExternalSource_Get("gtest" TRUE ${GTEST_URL})
+
+  # gtest_SOURCE_DIR is used in gtest subdirectorty's cmake
+  set(sourcedir_gtest ${gtest_SOURCE_DIR})
+  unset(gtest_SOURCE_DIR)
+
+  if(NOT TARGET gtest_main)
+    add_extdirectory(${sourcedir_gtest} gtest EXCLUDE_FROM_ALL)
+  endif(NOT TARGET gtest_main)
+
+  set(GTest_FOUND TRUE)
+  return()
+endif(${BUILD_GTEST})
+
+### Find and use pre-installed Google Test
+find_package(GTest)
+find_package(Threads)
+
+if(${GTEST_FOUND} AND TARGET Threads::Threads)
+  if(NOT TARGET gtest)
+    add_library(gtest INTERFACE)
+    target_include_directories(gtest INTERFACE ${GTEST_INCLUDE_DIRS})
+    target_link_libraries(gtest INTERFACE ${GTEST_LIBRARIES} Threads::Threads)
+  endif(NOT TARGET gtest)
+
+  if(NOT TARGET gtest_main)
+    add_library(gtest_main INTERFACE)
+    target_include_directories(gtest_main INTERFACE ${GTEST_INCLUDE_DIRS})
+    target_link_libraries(gtest_main INTERFACE gtest)
+    target_link_libraries(gtest_main INTERFACE ${GTEST_MAIN_LIBRARIES})
+  endif(NOT TARGET gtest_main)
+
+  # TODO Check whether this command is necessary or not
+  include_directories(${GTEST_INCLUDE_DIR})
+  set(GTest_FOUND TRUE)
+endif(${GTEST_FOUND} AND TARGET Threads::Threads)
diff --git a/infra/nnfw/cmake/packages/HDF5Config.cmake b/infra/nnfw/cmake/packages/HDF5Config.cmake
new file mode 100644
index 000000000..1f90deaf9
--- /dev/null
+++ b/infra/nnfw/cmake/packages/HDF5Config.cmake
@@ -0,0 +1,31 @@
+unset(HDF5_DIR CACHE)
+find_package(HDF5 QUIET)
+
+if (NOT HDF5_FOUND)
+  # Give second chance for some systems where sytem find_package config mode fails
+  unset(HDF5_FOUND)
+
+  find_path(HDF5_INCLUDE_DIRS NAMES hdf5.h PATH_SUFFIXES include/hdf5/serial)
+
+  if (NOT HDF5_INCLUDE_DIRS)
+    set(HDF5_FOUND FALSE)
+    return()
+  endif()
+
+  if (HDF5_USE_STATIC_LIBRARIES)
+    find_library(HDF5_LIBRARIES libhdf5.a)
+  else (HDF5_USE_STATIC_LIBRARIES)
+    find_library(HDF5_LIBRARIES libhdf5.so)
+  endif(HDF5_USE_STATIC_LIBRARIES)
+
+  if (NOT HDF5_LIBRARIES)
+    set(HDF5_FOUND FALSE)
+    return()
+  endif()
+  list(APPEND HDF5_LIBRARIES "sz" "z" "dl" "m")
+
+  set(HDF5_FOUND TRUE)
+endif()
+
+# Append missing libaec which is required by libsz, which is required by libhdf5
+list(APPEND HDF5_LIBRARIES "aec")
diff --git a/infra/nnfw/cmake/packages/NEON2SSESourceConfig.cmake b/infra/nnfw/cmake/packages/NEON2SSESourceConfig.cmake
new file mode 100644
index 000000000..114a51245
--- /dev/null
+++ b/infra/nnfw/cmake/packages/NEON2SSESourceConfig.cmake
@@ -0,0 +1,20 @@
+function(_NEON2SSESource_import)
+  # TODO Remove this workaround once target preset is ready
+  if(NOT (TARGET_ARCH_BASE STREQUAL "x86_64"))
+    set(NEON2SSESource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT (TARGET_ARCH_BASE STREQUAL "x86_64"))
+
+  nnfw_include(ExternalSourceTools)
+  nnfw_include(OptionTools)
+
+  # NOTE TensorFlow 1.12 downloads NEON2SSE from the following URL
+  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+  set(NEON2SSE_URL ${EXTERNAL_DOWNLOAD_SERVER}/intel/ARM_NEON_2_x86_SSE/archive/0f77d9d182265259b135dad949230ecbf1a2633d.tar.gz)
+  ExternalSource_Get("neon_2_sse" ${DOWNLOAD_NEON2SSE} ${NEON2SSE_URL})
+
+  set(NEON2SSESource_DIR ${neon_2_sse_SOURCE_DIR} PARENT_SCOPE)
+  set(NEON2SSESource_FOUND ${neon_2_sse_SOURCE_GET} PARENT_SCOPE)
+endfunction(_NEON2SSESource_import)
+
+_NEON2SSESource_import()
diff --git a/infra/nnfw/cmake/packages/NNPACKConfig.cmake b/infra/nnfw/cmake/packages/NNPACKConfig.cmake
new file mode 100644
index 000000000..97382b71e
--- /dev/null
+++ b/infra/nnfw/cmake/packages/NNPACKConfig.cmake
@@ -0,0 +1,51 @@
+function(_NNPACK_Import)
+    nnfw_find_package(NNPACKSource QUIET)
+
+    if(NOT NNPACK_SOURCE_FOUND)
+        set(NNPACK_FOUND FALSE PARENT_SCOPE)
+        message(STATUS "NNPACK not found")
+        return()
+    endif(NOT NNPACK_SOURCE_FOUND)
+
+    nnfw_find_package(CpuinfoSource REQUIRED)
+    nnfw_find_package(FP16Source REQUIRED)
+    nnfw_find_package(FXdivSource REQUIRED)
+    nnfw_find_package(PSIMDSource REQUIRED)
+    nnfw_find_package(PthreadpoolSource REQUIRED)
+    nnfw_find_package(SixSource REQUIRED)
+    nnfw_find_package(Enum34Source REQUIRED)
+    nnfw_find_package(OpcodesSource REQUIRED)
+    nnfw_find_package(PeachpySource QUIET)
+
+    if(NOT PYTHON_PEACHPY_SOURCE_FOUND)
+        set(NNPACK_FOUND FALSE PARENT_SCOPE)
+        return()
+    endif(NOT PYTHON_PEACHPY_SOURCE_FOUND)
+
+    # workaround for CI
+    set(THREADS_PTHREAD_ARG "2" CACHE STRING "Forcibly set by CMakeLists.txt." FORCE)
+    if(NOT TARGET nnpack)
+        # Allows us to build nnpack at build time
+        set(NNPACK_BUILD_TESTS OFF CACHE BOOL "")
+        set(NNPACK_BUILD_BENCHMARKS OFF CACHE BOOL "")
+        set(NNPACK_LIBRARY_TYPE "static" CACHE STRING "")
+        set(PTHREADPOOL_LIBRARY_TYPE "static" CACHE STRING "")
+        set(CPUINFO_LIBRARY_TYPE "static" CACHE STRING "")
+        nnfw_include(ExternalProjectTools)
+        add_extdirectory("${NNPACK_SOURCE_DIR}" nnpack EXCLUDE_FROM_ALL)
+        # We build static versions of nnpack and pthreadpool but link
+        # them into a shared library (high-perf-backend), so they need PIC.
+        set_property(TARGET nnpack PROPERTY POSITION_INDEPENDENT_CODE ON)
+        set_property(TARGET pthreadpool PROPERTY POSITION_INDEPENDENT_CODE ON)
+        set_property(TARGET cpuinfo PROPERTY POSITION_INDEPENDENT_CODE ON)
+    endif()
+
+    set(NNPACK_FOUND TRUE PARENT_SCOPE)
+    set(NNPACK_INCLUDE_DIRS
+            $<TARGET_PROPERTY:nnpack,INCLUDE_DIRECTORIES>
+            $<TARGET_PROPERTY:pthreadpool,INCLUDE_DIRECTORIES> PARENT_SCOPE)
+    set(NNPACK_LIBRARIES $<TARGET_FILE:nnpack> $<TARGET_FILE:cpuinfo> PARENT_SCOPE)
+
+endfunction(_NNPACK_Import)
+
+_NNPACK_Import()
diff --git a/infra/nnfw/cmake/packages/NNPACKSourceConfig.cmake b/infra/nnfw/cmake/packages/NNPACKSourceConfig.cmake
new file mode 100644
index 000000000..b6b5b01bd
--- /dev/null
+++ b/infra/nnfw/cmake/packages/NNPACKSourceConfig.cmake
@@ -0,0 +1,20 @@
+function(_NNPACKSource_import)
+    if(NOT DOWNLOAD_NNPACK)
+        set(NNPACKSource_FOUND FALSE PARENT_SCOPE)
+        message(WARN "NNPACK not downloaded")
+        return()
+    endif(NOT DOWNLOAD_NNPACK)
+
+    nnfw_include(ExternalSourceTools)
+    nnfw_include(OptionTools)
+
+    envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+    set(NNPACK_URL ${EXTERNAL_DOWNLOAD_SERVER}/Maratyszcza/NNPACK/archive/c039579abe21f5756e0f0e45e8e767adccc11852.tar.gz)
+    ExternalSource_Get("NNPACK" ${DOWNLOAD_NNPACK} ${NNPACK_URL})
+
+    set(NNPACK_SOURCE_DIR ${NNPACK_SOURCE_DIR} PARENT_SCOPE)
+    set(NNPACK_INCLUDE_DIR ${NNPACK_SOURCE_DIR}/include PARENT_SCOPE)
+    set(NNPACK_SOURCE_FOUND ${NNPACK_SOURCE_GET} PARENT_SCOPE)
+endfunction(_NNPACKSource_import)
+
+_NNPACKSource_import()
diff --git a/infra/nnfw/cmake/packages/Nonius/html_report_template.g.h++ b/infra/nnfw/cmake/packages/Nonius/html_report_template.g.h++
new file mode 100644
index 000000000..fa159c6a4
--- /dev/null
+++ b/infra/nnfw/cmake/packages/Nonius/html_report_template.g.h++
@@ -0,0 +1,433 @@
+"<!DOCTYPE html>\n"
+"<html>\n"
+" <head>\n"
+"  <meta http-equiv=\"Content-Type\" content=\"text/html; charset=utf-8\">\n"
+"  <title>{$title} - nonius report</title>\n"
+"  <style type=\"text/css\"> body {\n"
+"    left: 0;\n"
+"    right: 0;\n"
+"    top: 0;\n"
+"    bottom: 0;\n"
+"    margin: 0;\n"
+"}\n"
+"\n"
+".plotly .modebar {\n"
+"    margin-top: 2em !important;\n"
+"}\n"
+"\n"
+"#header {\n"
+"    background-color: black;\n"
+"    z-index: 2;\n"
+"    position: absolute;\n"
+"    left: 0;\n"
+"    right: 0;\n"
+"    color: white;\n"
+"    font-family: monospace;\n"
+"    padding-left: 0;\n"
+"    text-align: center;\n"
+"    font-size: 1.2em;\n"
+"    font-weight: bold;\n"
+"    line-height: 2em;\n"
+"}\n"
+"\n"
+".select {\n"
+"    position: relative;\n"
+"    display: inline-block;\n"
+"    font-size: 1em;\n"
+"    font-weight: bold;\n"
+"    font-size: 1em;\n"
+"}\n"
+"\n"
+".select .arr {\n"
+"    background: #000;\n"
+"    bottom: 5px;\n"
+"    position: absolute;\n"
+"    right: 5px;\n"
+"    top: 5px;\n"
+"    width: 0px;\n"
+"    pointer-events: none;\n"
+"}\n"
+"\n"
+".select .arr:before {\n"
+"    content: '';\n"
+"    position: absolute;\n"
+"    top: 50%;\n"
+"    right: 14px;\n"
+"    margin-top: -5px;\n"
+"    pointer-events: none;\n"
+"    border-top: 10px solid white;\n"
+"    border-left: 10px solid transparent;\n"
+"    border-right: 10px solid transparent;\n"
+"}\n"
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+".select .arr:after {\n"
+"    content: '';\n"
+"    position: absolute;\n"
+"    top: 50%;\n"
+"    right: 18px;\n"
+"    margin-top: -5px;\n"
+"    pointer-events: none;\n"
+"    border-top: 6px solid black;\n"
+"    border-left: 6px solid transparent;\n"
+"    border-right: 6px solid transparent;\n"
+"}\n"
+"\n"
+".select select {\n"
+"    outline: none;\n"
+"    -webkit-appearance: none;\n"
+"    display: block;\n"
+"    padding: 0 3em 0 1.5em;\n"
+"    margin: 0.3em;\n"
+"\n"
+"    transition: border-color 0.2s;\n"
+"    border: 2px solid #aaa;\n"
+"    border-radius: 0px;\n"
+"\n"
+"    background: black;\n"
+"    color: white;\n"
+"    font-family: inherit;\n"
+"    font-size: inherit;\n"
+"    line-height: inherit;\n"
+"    font-weight: inherit;\n"
+"}\n"
+"\n"
+".select select:focus {\n"
+"    border: 2px solid white;\n"
+"    color: white;\n"
+"}\n"
+"\n"
+"#plot {\n"
+"    position: absolute;\n"
+"    min-width: 300px;\n"
+"    min-height: 200px;\n"
+"    left: 0;\n"
+"    right: 0;\n"
+"    top: 2em;\n"
+"    bottom: 1em;\n"
+"}\n"
+"\n"
+"#footer {\n"
+"    position: absolute;\n"
+"    bottom: 0;\n"
+"    left: 0;\n"
+"    right: 0;\n"
+"    font-family: monospace;\n"
+"    font-size: 0.9em;\n"
+"    text-align: center;\n"
+"    text-transform: lowercase;\n"
+"    background-color: #bbb;\n"
+"    line-height: 2em;\n"
+"}\n"
+" </style>\n"
+"  <script type=\"text/javascript\"> /**\n"
+"* plotly.js (basic - minified) v1.15.0\n"
+"* Copyright 2012-2016, Plotly, Inc.\n"
+"* All rights reserved.\n"
+"* Licensed under the MIT license\n"
+"*/\n"
+,
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n=f.select(this),r=e,a=r.rangeselector,l=n.selectAll(\"g.button\").data(a.buttons);l.enter().append(\"g\").classed(\"button\",!0),l.exit().remove(),l.each(function(e){var n=f.select(this),l=b(r,e);e.isActive=o(r,e,l),n.call(i,a,e),n.call(s,a,e),n.on(\"click\",function(){t._dragged||d.relayout(t,l)}),n.on(\"mouseover\",function(){e.isHovered=!0,n.call(i,a,e)}),n.on(\"mouseout\",function(){e.isHovered=!1,n.call(i,a,e)})}),u(t,l,a,r._name),n.attr(\"transform\",\"translate(\"+a.lx+\",\"+a.ly+\")\")})}},{\"../../lib/svg_text_utils\":100,\"../../plotly\":107,\"../../plots/cartesian/axis_ids\":112,\"../../plots/plots\":130,\"../color\":18,\"../drawing\":41,\"../legend/anchor_utils\":54,\"./constants\":68,\"./get_update_object\":71,d3:9}],71:[function(t,e,n){\"use strict\";function r(t,e){var n,r=t.range,o=new Date(r[1]),i=e.step,l=e.count;switch(e.stepmode){case\"backward\":n=a.time[i].offset(o,-l).getTime();break;case\"todate\":var s=a.time[i].offset(o,-(l-1));n=a.time[i].floor(s).getTime()}var c=r[1];return[n,c]}var a=t(\"d3\");e.exports=function(t,e){var n=t._name,a={};if(\"all\"===e.step)a[n+\".autorange\"]=!0;else{var o=r(t,e);a[n+\".range[0]\"]=o[0],a[n+\".range[1]\"]=o[1]}return a}},{d3:9}],72:[function(t,e,n){\"use strict\";n.attributes=t(\"./attributes\"),n.supplyLayoutDefaults=t(\"./defaults\"),n.draw=t(\"./draw\")},{\"./attributes\":66,\"./defaults\":69,\"./draw\":70}],73:[function(t,e,n){\"use strict\";var r=t(\"../color/attributes\");e.exports={bgcolor:{valType:\"color\",dflt:r.background},bordercolor:{valType:\"color\",dflt:r.defaultLine},borderwidth:{valType:\"integer\",dflt:0,min:0},range:{valType:\"info_array\",items:[{valType:\"number\"},{valType:\"number\"}]},thickness:{valType:\"number\",dflt:.15,min:0,max:1},visible:{valType:\"boolean\",dflt:!0}}},{\"../color/attributes\":17}],74:[function(t,e,n){\"use strict\";var r=t(\"../../plotly\"),a=t(\"../../plots/cartesian/axes\"),o=t(\"../../lib\"),i=t(\"../../constants/xmlns_namespaces\").svg,l=t(\"./helpers\"),s=t(\"./range_plot\");e.exports=function(t){function e(t){var e=h.range[0],n=h.range[1],r=n-e,a=t/p*r+e;return a=o.constrain(a,e,n)}function n(t,e){t=t||-(1/0),e=e||1/0;var n=h.range[0],r=h.range[1],a=r-n,o=(t-n)/a*p,i=(e-n)/a*p;u(o,i)}function c(e,n){window.requestAnimationFrame?window.requestAnimationFrame(function(){r.relayout(t,\"xaxis.range\",[e,n])}):setTimeout(function(){r.relayout(t,\"xaxis.range\",[e,n])},16)}"
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L=r(M,h),T=r(M,p),z=0;z<L.length;z++){var S=e*(L[z]-g)/(v-g),E=n*(1-(T[z]-m)/(y-m));isNaN(S)||isNaN(E)||A.push([S,E])}c.appendChildren(f,a(M,A,e,n))}}return f}},{\"../../constants/xmlns_namespaces\":82,\"../../lib\":89,\"../drawing\":41,\"../drawing/symbol_defs\":42,\"./helpers\":76,d3:9}],79:[function(t,e,n){\"use strict\";var r=t(\"../annotations/attributes\"),a=t(\"../../traces/scatter/attributes\"),o=t(\"../../lib/extend\").extendFlat,i=a.line;e.exports={_isLinkedToArray:!0,type:{valType:\"enumerated\",values:[\"circle\",\"rect\",\"path\",\"line\"]},layer:{valType:\"enumerated\",values:[\"below\",\"above\"],dflt:\"above\"},xref:o({},r.xref,{}),x0:{valType:\"any\"},x1:{valType:\"any\"},yref:o({},r.yref,{}),y0:{valType:\"any\"},y1:{valType:\"any\"},path:{valType:\"string\"},opacity:{valType:\"number\",min:0,max:1,dflt:1},line:{color:i.color,width:i.width,dash:i.dash},fillcolor:{valType:\"color\",dflt:\"rgba(0,0,0,0)\"}}},{\"../../lib/extend\":88,\"../../traces/scatter/attributes\":167,\"../annotations/attributes\":15}],80:[function(t,e,n){\"use strict\";function r(t,e){function n(e,n){return M.coerce(t,r,E.layoutAttributes,e,n)}var r={};n(\"layer\"),n(\"opacity\"),n(\"fillcolor\"),n(\"line.color\"),n(\"line.width\"),n(\"line.dash\");for(var a=t.path?\"path\":\"rect\",i=n(\"type\",a),l=[\"x\",\"y\"],s=0;2>s;s++){var c=l[s],u={_fullLayout:e},f=A.coerceRef(t,r,u,c);if(\"path\"!==i){var d=.25,h=.75;if(\"paper\"!==f){var p=A.getFromId(u,f),g=o(p);d=g(p.range[0]+d*(p.range[1]-p.range[0])),h=g(p.range[0]+h*(p.range[1]-p.range[0]))}n(c+\"0\",d),n(c+\"1\",h)}}return\"path\"===i?n(\"path\"):M.noneOrAll(t,r,[\"x0\",\"x1\",\"y0\",\"y1\"]),r}function a(t){return\"category\"===t.type?t.c2l:t.d2l}function o(t){return\"category\"===t.type?t.l2c:t.l2d}function i(t,e){t.layout.shapes=e,E.supplyLayoutDefaults(t.layout,t._fullLayout),E.drawAll(t)}function l(t){delete t.layout.shapes,t._fullLayout.shapes=[],E.drawAll(t)}function s(t,e,n){for(var r=0;r<t._fullLayout.shapes.length;r++)E.draw(t,r,e,n)}function c(t,e){h(t,e).selectAll('[data-index=\"'+e+'\"]').remove(),t._fullLayout.shapes.splice(e,1),t.layout.shapes.splice(e,1);for(var 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+"t.layout},a.node()),t.framework.setUndoPoint();var o=t.framework.svg(),i=1,l=t._fullLayout.title;\"\"!==l&&l||(i=0);var s=\"Click to enter title\",c=function(){this.call(O.util.convertToTspans)},u=o.select(\".title-group text\").call(c);if(t._context.editable){u.attr({\"data-unformatted\":l}),l&&l!==s||(i=.2,u.attr({\"data-unformatted\":s}).text(s).style({opacity:i}).on(\"mouseover.opacity\",function(){S.select(this).transition().duration(100).style(\"opacity\",1)}).on(\"mouseout.opacity\",function(){S.select(this).transition().duration(1e3).style(\"opacity\",0)}));var f=function(){this.call(O.util.makeEditable).on(\"edit\",function(e){t.framework({layout:{title:e}}),this.attr({\"data-unformatted\":e}).text(e).call(c),this.call(f)}).on(\"cancel\",function(){var t=this.attr(\"data-unformatted\");this.text(t).call(c)})};u.call(f)}return t._context.setBackground(t,t._fullLayout.paper_bgcolor),I.addLinks(t),Promise.resolve()}function l(t){var e,n;t||(t={}),t.xaxis1&&(t.xaxis||(t.xaxis=t.xaxis1),delete t.xaxis1),t.yaxis1&&(t.yaxis||(t.yaxis=t.yaxis1),delete t.yaxis1);var r=O.Axes.list({_fullLayout:t});for(e=0;e<r.length;e++){var a=r[e];a.anchor&&\"free\"!==a.anchor&&(a.anchor=O.Axes.cleanId(a.anchor)),a.overlaying&&(a.overlaying=O.Axes.cleanId(a.overlaying)),a.type||(a.isdate?a.type=\"date\":a.islog?a.type=\"log\":a.isdate===!1&&a.islog===!1&&(a.type=\"linear\")),\"withzero\"!==a.autorange&&\"tozero\"!==a.autorange||(a.autorange=!0,a.rangemode=\"tozero\"),delete a.islog,delete a.isdate,delete a.categories,f(a,\"domain\")&&delete a.domain,void 0!==a.autotick&&(void 0===a.tickmode&&(a.tickmode=a.autotick?\"auto\":\"linear\"),delete a.autotick)}void 0===t.annotations||Array.isArray(t.annotations)||(P.warn(\"Annotations must be an array.\"),delete t.annotations);var o=(t.annotations||[]).length;for(e=0;o>e;e++){var i=t.annotations[e];i.ref&&(\"paper\"===i.ref?(i.xref=\"paper\",i.yref=\"paper\"):\"data\"===i.ref&&(i.xref=\"x\",i.yref=\"y\"),delete i.ref),s(i,\"xref\"),s(i,\"yref\")}void 0===t.shapes||Array.isArray(t.shapes)||(P.warn(\"Shapes must be an array.\"),delete t.shapes);var l=(t.shapes||[]).length;for(e=0;l>e;e++){var c=t.shapes[e];s(c,\"xref\"),s(c,\"yref\")}var u=t.legend;u&&(u.x>3?(u.x=1.02,u.xanchor=\"left\"):u.x<-2&&(u.x=-.02,u.xanchor=\"right\"),u.y>3?(u.y=1.02,u.yanchor=\"bottom\"):u.y<-2&&(u.y=-.02,u.yanchor=\"top\")),\"rotate\"===t.dragmode&&(t.dragmode=\"orbit\"),t.scene1&&(t.scene||(t.scene=t.scene1),delete t.scene1);var d=I.getSubplotIds(t,\"gl3d\");for(e=0;e<d.length;e++){var h=t[d[e]],p=h.cameraposition;if(Array.isArray(p)&&4===p[0].length){var g=p[0],v=p[1],m=p[2],y=E([],g),x=[];for(n=0;3>n;++n)x[n]=v[e]+m*y[2+4*n];h.camera={eye:{x:x[0],y:x[1],z:x[2]},center:{x:v[0],y:v[1],z:v[2]},up:{x:y[1],y:y[5],z:y[9]}},delete h.cameraposition}}return j.clean(t),t}function s(t,e){var n=t[e],r=e.charAt(0);n&&\"paper\"!==n&&(t[e]=O.Axes.cleanId(n,r))}function c(t,e){for(var n=[],r=(t.concat(Array.isArray(e)?e:[]).filter(function(t){return\"uid\"in t}).map(function(t){return t.uid})),a=0;a<t.length;a++){var o,i=t[a];if(!(\"uid\"in i)||-1!==n.indexOf(i.uid)){var l;for(o=0;100>o&&(l=P.randstr(r),-1!==n.indexOf(l));o++);i.uid=P.randstr(r),r.push(i.uid)}if(n.push(i.uid),\"histogramy\"===i.type&&\"xbins\"in i&&!(\"ybins\"in i)&&(i.ybins=i.xbins,delete i.xbins),i.error_y&&\"opacity\"in i.error_y){var s=j.defaults,c=i.error_y.color||(I.traceIs(i,\"bar\")?j.defaultLine:s[a%s.length]);i.error_y.color=j.addOpacity(j.rgb(c),j.opacity(c)*i.error_y.opacity),delete i.error_y.opacity}if(\"bardir\"in i&&(\"h\"!==i.bardir||!I.traceIs(i,\"bar\")&&\"histogram\"!==i.type.substr(0,9)||(i.orientation=\"h\",b(i)),delete i.bardir),\"histogramy\"===i.type&&b(i),\"histogramx\"!==i.type&&\"histogramy\"!==i.type||(i.type=\"histogram\"),\"scl\"in i&&(i.colorscale=i.scl,delete i.scl),\"reversescl\"in i&&(i.reversescale=i.reversescl,delete i.reversescl),i.xaxis&&(i.xaxis=O.Axes.cleanId(i.xaxis,\"x\")),i.yaxis&&(i.yaxis=O.Axes.cleanId(i.yaxis,\"y\")),I.traceIs(i,\"gl3d\")&&i.scene&&(i.scene=I.subplotsRegistry.gl3d.cleanId(i.scene)),I.traceIs(i,\"pie\")||(Array.isArray(i.textposition)?i.textposition=i.textposition.map(u):i.textposition&&(i.textposition=u(i.textposition))),I.traceIs(i,\"2dMap\")&&(\"YIGnBu\"===i.colorscale&&(i.colorscale=\"YlGnBu\"),\"YIOrRd\"===i.colorscale&&(i.colorscale=\"YlOrRd\")),I.traceIs(i,\"markerColorscale\")&&i.marker){var d=i.marker;\"YIGnBu\"===d.colorscale&&(d.colorscale=\"YlGnBu\"),\"YIOrRd\"===d.colorscale&&(d.colorscale=\"YlOrRd\")}if(\"surface\"===i.type&&P.isPlainObject(i.contours)){var h=[\"x\",\"y\",\"z\"];for(o=0;o<h.length;o++){var p=i.contours[h[o]];P.isPlainObject(p)&&(p.highlightColor&&(p.highlightcolor=p.highlightColor,delete p.highlightColor),p.highlightWidth&&(p.highlightwidth=p.highlightWidth,delete p.highlightWidth))}}f(i,\"line\")&&delete i.line,\"marker\"in i&&(f(i.marker,\"line\")&&delete i.marker.line,f(i,\"marker\")&&delete i.marker),j.clean(i)}}function u(t){var e=\"middle\",n=\"center\";return-1!==t.indexOf(\"top\")?e=\"top\":-1!==t.indexOf(\"bottom\")&&(e=\"bottom\"),-1!==t.indexOf(\"left\")?n=\"left\":-1!==t.indexOf(\"right\")&&(n=\"right\"),e+\" \"+n}function f(t,e){return e in t&&\"object\"==typeof t[e]&&0===Object.keys(t[e]).length}function d(t){var e,n=O.Axes.list(t),r=t._fullData,a=t._fullLayout,o=t.calcdata=new Array(r.length);for(t.firstscatter=!0,t.numboxes=0,t._hmpixcount=0,t._hmlumcount=0,a._piecolormap={},a._piedefaultcolorcount=0,e=0;e<n.length;e++)n[e]._categories=n[e]._initialCategories.slice();for(e=0;e<r.length;e++){var i=r[e],l=i._module,s=[];l&&i.visible===!0&&l.calc&&(s=l.calc(t,i)),Array.isArray(s)&&s[0]||(s=[{x:!1,y:!1}]),s[0].t||(s[0].t={}),s[0].trace=i,o[e]=s}}function h(t,e){var n,r,a=e+1,o=[];for(n=0;n<t.length;n++)r=t[n],0>r?o.push(a+r):o.push(r);return o}function p(t,e,n){var r,a;for(r=0;r<e.length;r++){if(a=e[r],a!==parseInt(a,10))throw new Error(\"all values in \"+n+\" must be integers\");if(a>=t.data.length||a<-t.data.length)throw new Error(n+\" must be valid indices for gd.data.\");if(e.indexOf(a,r+1)>-1||a>=0&&e.indexOf(-t.data.length+a)>-1||0>a&&e.indexOf(t.data.length+a)>-1)throw new Error(\"each index in \"+n+\" must be unique.\")}}function g(t,e,n){if(!Array.isArray(t.data))throw new Error(\"gd.data must be an array.\");if(\"undefined\"==typeof e)throw new Error(\"currentIndices is a required argument.\");if(Array.isArray(e)||(e=[e]),p(t,e,\"currentIndices\"),\"undefined\"==typeof n||Array.isArray(n)||(n=[n]),\"undefined\"!=typeof n&&p(t,n,\"newIndices\"),\"undefined\"!=typeof n&&e.length!==n.length)throw new Error(\"current and new indices must be of equal length.\")}function v(t,e,n){var r,a;if(!Array.isArray(t.data))throw new Error(\"gd.data must be an array.\");if(\"undefined\"==typeof e)throw new Error(\"traces must be defined.\");for(Array.isArray(e)||(e=[e]),r=0;r<e.length;r++)if(a=e[r],\"object\"!=typeof a||Array.isArray(a)||null===a)throw new Error(\"all values in traces array must be non-array objects\");if(\"undefined\"==typeof n||Array.isArray(n)||(n=[n]),\"undefined\"!=typeof n&&n.length!==e.length)throw new Error(\"if indices is specified, traces.length must equal indices.length\")}function m(t,e,n,r){var a=P.isPlainObject(r);if(!Array.isArray(t.data))throw new Error(\"gd.data must be an array\");if(!P.isPlainObject(e))throw new Error(\"update must be a key:value object\");if(\"undefined\"==typeof n)throw new Error(\"indices must be an integer or array of integers\");p(t,n,\"indices\");for(var o in e){if(!Array.isArray(e[o])||e[o].length!==n.length)throw new Error(\"attribute \"+o+\" must be an array of length equal to indices array length\");if(a&&(!(o in r)||!Array.isArray(r[o])||r[o].length!==e[o].length))throw new Error(\"when maxPoints is set as a key:value object it must contain a 1:1 corrispondence with the keys and number of traces in the update object\")}}function y(t,e,n,r){var a,o,i,l,s,c=P.isPlainObject(r),u=[];Array.isArray(n)||(n=[n]),n=h(n,t.data.length-1);for(var f in e)for(var d=0;d<n.length;d++){if(a=t.data[n[d]],i=P.nestedProperty(a,f),o=i.get(),l=e[f][d],!Array.isArray(l))throw new Error(\"attribute: \"+f+\" index: \"+d+\" must be an array\");if(!Array.isArray(o))throw new Error(\"cannot extend missing or non-array attribute: \"+f);s=c?r[f][d]:r,C(s)||(s=-1),u.push({prop:i,target:o,insert:l,maxp:Math.floor(s)})}return u}function x(t,e,n,r,a,o){m(t,e,n,r);for(var i,l,s,c=y(t,e,n,r),u=[],f={},d={},h=0;h<c.length;h++)l=c[h].prop,s=c[h].maxp,i=a(c[h].target,c[h].insert),s>=0&&s<i.length&&(u=o(i,s)),s=c[h].target.length,l.set(i),Array.isArray(f[l.astr])||(f[l.astr]=[]),Array.isArray(d[l.astr])||(d[l.astr]=[]),f[l.astr].push(u),d[l.astr].push(s);return{update:f,maxPoints:d}}function b(t){var e;if(P.swapAttrs(t,[\"?\",\"?0\",\"d?\",\"?bins\",\"nbins?\",\"autobin?\",\"?src\",\"error_?\"]),Array.isArray(t.z)&&Array.isArray(t.z[0])&&(t.transpose?delete t.transpose:t.transpose=!0),t.error_x&&t.error_y){var n=t.error_y,r=\"copy_ystyle\"in n?n.copy_ystyle:!(n.color||n.thickness||n.width);P.swapAttrs(t,[\"error_?.copy_ystyle\"]),r&&P.swapAttrs(t,[\"error_?.color\",\"error_?.thickness\",\"error_?.width\"])}if(t.hoverinfo){var a=t.hoverinfo.split(\"+\");for(e=0;e<a.length;e++)\"x\"===a[e]?a[e]=\"y\":\"y\"===a[e]&&(a[e]=\"x\");t.hoverinfo=a.join(\"+\")}}function _(t){var e,n={left:0,right:0,bottom:0,top:0};if(t)for(e in t)t.hasOwnProperty(e)&&(n.left+=t[e].left||0,n.right+=t[e].right||0,n.bottom+=t[e].bottom||0,n.top+=t[e].top||0);return n}function w(t,e){var n,r,a,o=t._fullLayout,i=t._context;if(t.emit(\"plotly_autosize\"),t._context.fillFrame)a=window.innerWidth,r=window.innerHeight,document.body.style.overflow=\"hidden\";else if(C(i.frameMargins)&&i.frameMargins>0){var l=_(t._boundingBoxMargins),s=l.left+l.right,c=l.bottom+l.top,u=o._container.node().getBoundingClientRect(),f=1-2*i.frameMargins;a=Math.round(f*(u.width-s)),r=Math.round(f*(u.height-c))}else n=window.getComputedStyle(t),r=parseFloat(n.height)||o.height,a=parseFloat(n.width)||o.width;return Math.abs(o.width-a)>1||Math.abs(o.height-r)>1?(o.height=t.layout.height=r,o.width=t.layout.width=a):\"initial\"!==o.autosize&&(delete e.autosize,o.autosize=t.layout.autosize=!0),I.sanitizeMargins(o),e}function k(t){var e=S.select(t),n=t._fullLayout;if(n._container=e.selectAll(\".pl"
+,
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u=O.Axes.getFromId(t,s.overlaying)||s;u!==s&&u.overlaying&&(u=s,s.overlaying=!1);var f=O.Axes.getFromId(t,c.overlaying)||c;f!==c&&f.overlaying&&(f=c,c.overlaying=!1);var d=u._id+f._id;if(d!==o&&-1!==e.indexOf(d))i.mainplot=d,a.push(i),s.domain=u.domain.slice(),c.domain=f.domain.slice();else{i.bg=l.append(\"rect\").style(\"stroke-width\",0);var h=l.append(\"g\").classed(\"layer-subplot\",!0);i.shapelayer=h.append(\"g\").classed(\"shapelayer\",!0),i.imagelayer=h.append(\"g\").classed(\"imagelayer\",!0),i.gridlayer=l.append(\"g\"),i.overgrid=l.append(\"g\"),i.zerolinelayer=l.append(\"g\"),i.overzero=l.append(\"g\"),i.plot=l.append(\"g\").call(n),i.overplot=l.append(\"g\"),i.xlines=l.append(\"path\"),i.ylines=l.append(\"path\"),i.overlines=l.append(\"g\"),i.xaxislayer=l.append(\"g\"),i.yaxislayer=l.append(\"g\"),i.overaxes=l.append(\"g\")}i.draglayer=r._draggers.append(\"g\")}),a.forEach(function(t){var e=r._plots[t.mainplot];e.overlays.push(t),t.gridlayer=e.overgrid.append(\"g\"),t.zerolinelayer=e.overzero.append(\"g\"),t.plot=e.overplot.append(\"g\").call(n),t.xlines=e.overlines.append(\"path\"),t.ylines=e.overlines.append(\"path\"),t.xaxislayer=e.overaxes.append(\"g\"),t.yaxislayer=e.overaxes.append(\"g\")}),e.forEach(function(t){var e=r._plots[t];e.xlines.style(\"fill\",\"none\").classed(\"crisp\",!0),e.ylines.style(\"fill\",\"none\").classed(\"crisp\",!0)})}function L(t){return P.syncOrAsync([I.doAutoMargin,T],t)}function T(t){var e,n=t._fullLayout,r=n._size,a=O.Axes.list(t);for(e=0;e<a.length;e++)a[e]._linepositions={};n._paperdiv.style({width:n.width+\"px\",height:n.height+\"px\"}).selectAll(\".main-svg\").call(q.setSize,n.width,n.height),t._context.setBackground(t,n.paper_bgcolor);var o=[];return n._paper.selectAll(\"g.subplot\").each(function(e){var a=n._plots[e],i=O.Axes.getFromId(t,e,\"x\"),l=O.Axes.getFromId(t,e,\"y\");i.setScale(),l.setScale(),a.bg&&a.bg.call(q.setRect,i._offset-r.p,l._offset-r.p,i._length+2*r.p,l._length+2*r.p).call(j.fill,n.plot_bgcolor),a.clipId=\"clip\"+n._uid+e+\"plot\";var s=n._defs.selectAll(\"g.clips\").selectAll(\"#\"+a.clipId).data([0]);s.enter().append(\"clipPath\").attr({\"class\":\"plotclip\",id:a.clipId}).append(\"rect\"),s.selectAll(\"rect\").attr({width:i._length,height:l._length}),a.plot.call(P.setTranslate,i._offset,l._offset),a.plot.call(q.setClipUrl,a.clipId);var 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i=\"top\"===u.side?\"-\":\"\";n.attr(\"d\",\"M0,0L\"+C+\",\"+i+C+\"H\"+(O+o.width/2)+\"v\"+i+(2*O+o.height)+\"H-\"+(O+o.width/2)+\"V\"+i+C+\"H-\"+C+\"Z\"),e.attr(\"transform\",\"translate(\"+(u._offset+(c.x0+c.x1)/2)+\",\"+(f._offset+(\"top\"===u.side?0:f._length))+\")\")}else{r.attr(\"text-anchor\",\"right\"===f.side?\"start\":\"end\").call(b.setPosition,(\"right\"===f.side?1:-1)*(O+C),_-o.top-o.height/2).selectAll(\"tspan.line\").attr({x:r.attr(\"x\"),y:r.attr(\"y\")});var l=\"right\"===f.side?\"\":\"-\";n.attr(\"d\",\"M0,0L\"+l+C+\",\"+C+\"V\"+(O+o.height/2)+\"h\"+l+(2*O+o.width)+\"V-\"+(O+o.height/2)+\"H\"+l+C+\"V-\"+C+\"Z\"),e.attr(\"transform\",\"translate(\"+(u._offset+(\"right\"===f.side?u._length:0))+\",\"+(f._offset+(c.y0+c.y1)/2)+\")\")}t=t.filter(function(t){return void 0!==t.zLabelVal||(t[d]||\"\").split(\" \")[0]===v})});var S=l.selectAll(\"g.hovertext\").data(t,function(t){return[t.trace.index,t.index,t.x0,t.y0,t.name,t.attr,t.xa,t.ya||\"\"].join(\",\")});return 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m,k,T=f.node().getBoundingClientRect(),z=t.xa._offset+(t.x0+t.x1)/2,S=t.ya._offset+(t.y0+t.y1)/2,E=Math.abs(t.x1-t.x0),P=Math.abs(t.y1-t.y0),N=T.width+C+O+v;t.ty0=_-T.top,t.bx=T.width+2*O,t.by=T.height+2*O,t.anchor=\"start\",t.txwidth=T.width,t.tx2width=v,t.offset=0,o?(t.pos=z,m=M>=S+P/2+N,k=S-P/2-N>=0,\"top\"!==t.idealAlign&&m||!k?m?(S+=P/2,t.anchor=\"start\"):t.anchor=\"middle\":(S-=P/2,t.anchor=\"end\")):(t.pos=S,m=w>=z+E/2+N,k=z-E/2-N>=0,\"left\"!==t.idealAlign&&m||!k?m?(z+=E/2,t.anchor=\"start\"):t.anchor=\"middle\":(z-=E/2,t.anchor=\"end\")),f.attr(\"text-anchor\",t.anchor),v&&d.attr(\"text-anchor\",t.anchor),e.attr(\"transform\",\"translate(\"+z+\",\"+S+\")\"+(o?\"rotate(\"+L+\")\":\"\"))}),S}function u(t,e){function n(t){var e=t[0],n=t[t.length-1];if(a=e.pmin-e.pos-e.dp+e.size,o=n.pos+n.dp+n.size-e.pmax,a>.01){for(l=t.length-1;l>=0;l--)t[l].dp+=a;r=!1}if(!(.01>o)){if(-.01>a){for(l=t.length-1;l>=0;l--)t[l].dp-=o;r=!1}if(r){var c=0;for(i=0;i<t.length;i++)s=t[i],s.pos+s.dp+s.size>e.pmax&&c++;for(i=t.length-1;i>=0&&!(0>=c);i--)s=t[i],s.pos>e.pmax-1&&(s.del=!0,c--);for(i=0;i<t.length&&!(0>=c);i++)if(s=t[i],s.pos<e.pmin+1)for(s.del=!0,c--,o=2*s.size,l=t.length-1;l>=0;l--)t[l].dp-=o;for(i=t.length-1;i>=0&&!(0>=c);i--)s=t[i],s.pos+s.dp+s.size>e.pmax&&(s.del=!0,c--)}}}for(var r,a,o,i,l,s,c,u=0,f=t.map(function(t,n){var r=t[e];return[{i:n,dp:0,pos:t.pos,posref:t.posref,size:t.by*(\"x\"===r._id.charAt(0)?z:1)/2,pmin:r._offset,pmax:r._offset+r._length}]}).sort(function(t,e){return t[0].posref-e[0].posref});!r&&u<=t.length;){for(u++,r=!0,i=0;i<f.length-1;){var d=f[i],h=f[i+1"
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r=\"end\"===t.anchor?-1:1,a=n.select(\"text.nums\"),o={start:1,end:-1,middle:0}[t.anchor],i=o*(C+O),l=i+o*(t.txwidth+O),s=0,c=t.offset;\"middle\"===t.anchor&&(i-=t.tx2width/2,l-=t.tx2width/2),e&&(c*=-E,s=t.offset*S),n.select(\"path\").attr(\"d\",\"middle\"===t.anchor?\"M-\"+t.bx/2+\",-\"+t.by/2+\"h\"+t.bx+\"v\"+t.by+\"h-\"+t.bx+\"Z\":\"M0,0L\"+(r*C+s)+\",\"+(C+c)+\"v\"+(t.by/2-C)+\"h\"+r*t.bx+\"v-\"+t.by+\"H\"+(r*C+s)+\"V\"+(c-C)+\"Z\"),a.call(b.setPosition,i+s,c+t.ty0-t.by/2+O).selectAll(\"tspan.line\").attr({x:a.attr(\"x\"),y:a.attr(\"y\")}),t.tx2width&&(n.select(\"text.name, text.name tspan.line\").call(b.setPosition,l+o*O+s,c+t.ty0-t.by/2+O),n.select(\"rect\").call(b.setRect,l+(o-1)*t.tx2width/2+s,c-t.by/2-1,t.tx2width,t.by+2))})}function d(t,e,n){if(!e.target)return!1;if(!n||n.length!==t._hoverdata.length)return!0;for(var r=n.length-1;r>=0;r--){var a=n[r],o=t._hoverdata[r];if(a.curveNumber!==o.curveNumber||String(a.pointNumber)!==String(o.pointNumber))return!0}return!1}var h=t(\"d3\"),p=t(\"tinycolor2\"),g=t(\"fast-isnumeric\"),v=t(\"../../lib\"),m=t(\"../../lib/events\"),y=t(\"../../lib/svg_text_utils\"),x=t(\"../../components/color\"),b=t(\"../../components/drawing\"),_=t(\"../../components/dragelement\"),w=t(\"./axes\"),k=t(\"./constants\"),M=t(\"./dragbox\"),A=e.exports={};A.unhover=_.unhover,A.layoutAttributes={dragmode:{valType:\"enumerated\",values:[\"zoom\",\"pan\",\"select\",\"lasso\",\"orbit\",\"turntable\"],dflt:\"zoom\"},hovermode:{valType:\"enumerated\",values:[\"x\",\"y\",\"closest\",!1]}},A.supplyLayoutDefaults=function(t,e,n){function r(n,r){return v.coerce(t,e,A.layoutAttributes,n,r)}r(\"dragmode\");var a;if(e._has(\"cartesian\")){var o=e._isHoriz=A.isHoriz(n);a=o?\"y\":\"x\"}else a=\"closest\";r(\"hovermode\",a)},A.isHoriz=function(t){for(var e=!0,n=0;n<t.length;n++){var r=t[n];if(\"h\"!==r.orientation){e=!1;break}}return e},A.init=function(t){var e=t._fullLayout;if(e._has(\"cartesian\")&&!t._context.staticPlot){var n=Object.keys(e._plots||{}).sort(function(t,n){if((e._plots[t].mainplot&&!0)===(e._plots[n].mainplot&&!0)){var r=t.split(\"y\"),a=n.split(\"y\");return r[0]===a[0]?Number(r[1]||1)-Number(a[1]||1):Number(r[0]||1)-Number(a[0]||1)}return e._plots[t].mainplot?1:-1});n.forEach(function(n){var r=e._plots[n];if(e._has(\"cartesian\")){var a=r.x(),o=r.y(),i=(a._linepositions[n]||[])[3],l=(o._linepositions[n]||[])[3],s=k.DRAGGERSIZE;if(g(i)&&\"top\"===a.side&&(i-=s),g(l)&&\"right\"!==o.side&&(l-=s),!r.mainplot){var c=M(t,r,0,0,a._length,o._length,\"ns\",\"ew\");c.onmousemove=function(r){A.hover(t,r,n),e._lasthover=c,e._hoversubplot=n},c.onmouseout=function(e){t._dragging||_.unhover(t,e)},c.onclick=function(e){A.click(t,e)},M(t,r,-s,-s,s,s,\"n\",\"w\"),M(t,r,a._length,-s,s,s,\"n\",\"e\"),M(t,r,-s,o._length,s,s,\"s\",\"w\"),M(t,r,a._length,o._length,s,s,\"s\",\"e\")}g(i)&&(\"free\"===a.anchor&&(i-=e._size.h*(1-o.domain[1])),M(t,r,.1*a._length,i,.8*a._length,s,\"\",\"ew\"),M(t,r,0,i,.1*a._length,s,\"\",\"w\"),M(t,r,.9*a._length,i,.1*a._length,s,\"\",\"e\")),g(l)&&(\"free\"===o.anchor&&(l-=e._size.w*a.domain[0]),M(t,r,l,.1*o._length,s,.8*o._length,\"ns\",\"\"),M(t,r,l,.9*o._length,s,.1*o._length,\"s\",\"\"),M(t,r,l,0,s,.1*o._length,\"n\",\"\"))}});var r=e._hoverlayer.node();r.onmousemove=function(n){n.target=e._lasthover,A.hover(t,n,e._hoversubplot)},r.onclick=function(n){n.target=e._lasthover,A.click(t,n)},r.onmousedown=function(t){e._lasthover.onmousedown(t)}}};var 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G=X.selectAll(\"circle.grid-circle\").data(r.ticks(5));G.enter().append(\"circle\").attr({\"class\":\"grid-circle\"}).style(F),G.attr(\"r\",r),G.exit().remove()}X.select(\"circle.outside-circle\").attr({r:x}).style(F);var $=e.select(\"circle.background-circle\").attr({r:x}).style({fill:f.backgroundColor,stroke:f.stroke});if(f.radialAxis.visible){var Q=a.svg.axis().scale(r).ticks(5).tickSize(5);X.call(Q).attr({transform:\"rotate(\"+f.radialAxis.orientation+\")\"}),X.selectAll(\".domain\").style(F),X.selectAll(\"g>text\").text(function(t,e){return this.textContent+f.radialAxis.ticksSuffix}).style(B).style({\"text-anchor\":\"start\"}).attr({x:0,y:0,dx:0,dy:0,transform:function(t,e){return\"horizontal\"===f.radialAxis.tickOrientation?\"rotate(\"+-f.radialAxis.orientation+\") translate(\"+[0,B[\"font-size\"]]+\")\":\"translate(\"+[0,B[\"font-size\"]]+\")\"}}),X.selectAll(\"g>line\").style({stroke:\"black\"})}var W=e.select(\".angular.axis-group\").selectAll(\"g.angular-tick\").data(N),J=W.enter().append(\"g\").classed(\"angular-tick\",!0);W.attr({transform:function(t,e){return\"rotate(\"+s(t,e)+\")\"}}).style({display:f.angularAxis.visible?\"block\":\"none\"}),W.exit().remove(),J.append(\"line\").classed(\"grid-line\",!0).classed(\"major\",function(t,e){return e%(f.minorTicks+1)==0}).classed(\"minor\",function(t,e){return!(e%(f.minorTicks+1)==0)}).style(F),J.selectAll(\".minor\").style({stroke:f.minorTickColor}),W.select(\"line.grid-line\").attr({x1:f.tickLength?x-f.tickLength:0,x2:x}).style({display:f.angularAxis.gridLinesVisible?\"block\":\"none\"}),J.append(\"text\""
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r=a.select(this),i=r.style(\"fill\"),l=\"black\",s=r.style(\"opacity\")||1;if(r.attr({\"data-opacity\":s}),\"none\"!=i){r.attr({\"data-fill\":i}),l=a.hsl(i).darker().toString(),r.style({fill:l,opacity:1});var c={t:o.util.round(t[0]),r:o.util.round(t[1])};A&&(c.t=k[t[0]]);var u=\"t: \"+c.t+\", r: \"+c.r,f=this.getBoundingClientRect(),d=e.node().getBoundingClientRect(),h=[f.left+f.width/2-Z[0]-d.left,f.top+f.height/2-Z[1]-d.top];dt.config({color:l}).text(u),dt.move(h)}else i=r.style(\"stroke\"),r.attr({\"data-stroke\":i}),l=a.hsl(i).darker().toString(),r.style({stroke:l,opacity:1})}).on(\"mousemove.tooltip\",function(t,e){return 0!=a.event.which?!1:void(a.select(this).attr(\"data-fill\")&&dt.show())}).on(\"mouseout.tooltip\",function(t,e){dt.hide();var n=a.select(this),r=n.attr(\"data-fill\");r?n.style({fill:r,opacity:n.attr(\"data-opacity\")}):n.style({stroke:n.attr(\"data-stroke\"),opacity:n.attr(\"data-opacity\")})})}),d}var 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l=i({},t.layout),s=[[l,[\"plot_bgcolor\"],[\"backgroundColor\"]],[l,[\"showlegend\"],[\"showLegend\"]],[l,[\"radialaxis\"],[\"radialAxis\"]],[l,[\"angularaxis\"],[\"angularAxis\"]],[l.angularaxis,[\"showline\"],[\"gridLinesVisible\"]],[l.angularaxis,[\"showticklabels\"],[\"labelsVisible\"]],[l.angularaxis,[\"nticks\"],[\"ticksCount\"]],[l.angularaxis,[\"tickorientation\"],[\"tickOrientation\"]],[l.angularaxis,[\"ticksuffix\"],[\"ticksSuffix\"]],[l.angularaxis,[\"range\"],[\"domain\"]],[l.angularaxis,[\"endpadding\"],[\"endPadding\"]],[l.radialaxis,[\"showline\"],[\"gridLinesVisible\"]],[l.radialaxis,[\"tickorientation\"],[\"tickOrientation\"]],[l.radialaxis,[\"ticksuffix\"],[\"ticksSuffix\"]],[l.radialaxis,[\"range\"],[\"domain\"]],[l.angularAxis,[\"showline\"],[\"gridLinesVisible\"]],[l.angularAxis,[\"showticklabels\"],[\"labelsVisible\"]],[l.angularAxis,[\"nticks\"],[\"ticksCount\"]],[l.angularAxis,[\"tickorientation\"],[\"tickOrientation\"]],[l.angularAxis,[\"ticksuffix\"],[\"ticksSuffix\"]],[l.angularAxis,[\"range\"],[\"domain\"]],[l.angularAxis,[\"endpadding\"],[\"endPadding\"]],[l.radialAxis,[\"showline\"],[\"gridLinesVisible\"]],[l.radialAxis,[\"tickorientation\"],[\"tickOrientation\"]],[l.radialAxis,[\"ticksuffix\"],[\"ticksSuffix\"]],[l.radialAxis,[\"range\"],[\"domain\"]],[l.font,[\"outlinecolor\"],[\"outlineColor\"]],[l.legend,[\"traceorder\"],[\"reverseOrder\"]],[l,[\"labeloffset\"],[\"labelOffset\"]],[l,[\"defaultcolorrange\"],[\"defaultColorRange\"]]];if(s.forEach(function(t,n){o.util.translator.apply(null,t.concat(e))}),e?(\"undefined\"!=typeof l.tickLength&&(l.angularaxis.ticklen=l.tickLength,delete l.tickLength),l.tickColor&&(l.angularaxis.tickcolor=l.tickColor,delete l.tickColor)):(l.angularAxis&&\"undefined\"!=typeof l.angularAxis.ticklen&&(l.tickLength=l.angularAxis.ticklen),l.angularAxis&&\"undefined\"!=typeof l.angularAxis.tickcolor&&(l.tickColor=l.angularAxis.tickcolor)),l.legend&&\"boolean\"!=typeof l.legend.reverseOrder&&(l.legend.reverseOrder=\"normal\"!=l.legend.reverseOrder),l.legend&&\"boolean\"==typeof l.legend.traceorder&&(l.legend.traceorder=l.legend.traceorder?\"reversed\":\"normal\",delete l.legend.reverseOrder),l.margin&&\"undefined\"!=typeof l.margin.t){var c=[\"t\",\"r\",\"b\",\"l\",\"pad\"],u=[\"top\",\"right\",\"bottom\",\"left\",\"pad\"],f={};a.entries(l.margin).forEach(function(t,e){f[u[c.indexOf(t.key)]]=t.value}),l.margin=f}e&&(delete l.needsEndSpacing,delete l.minorTickColor,delete l.minorTicks,delete l.angularaxis.ticksCount,delete l.angularaxis.ticksCount,delete l.angularaxis.ticksStep,delete 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strict\";function r(t,e){for(var n=[],r=0;r<t.length;r++){var a=t[r],o=a[0].trace;o._module===e&&o.visible===!0&&n.push(a)}return n}var a=t(\"../../plots/plots\");n.name=\"pie\",n.plot=function(t){var e=a.getModule(\"pie\"),n=r(t.calcdata,e);n.length&&e.plot(t,n)},n.clean=function(t,e,n,r){var a=r._has&&r._has(\"pie\"),o=e._has&&e._has(\"pie\");a&&!o&&r._pielayer.selectAll(\"g.trace\").remove()}},{\"../../plots/plots\":130}],157:[function(t,e,n){\"use strict\";function r(t){if(!s){var e=i.defaults;s=e.slice();var n;for(n=0;n<e.length;n++)s.push(o(e[n]).lighten(20).toHexString());for(n=0;n<i.defaults.length;n++)s.push(o(e[n]).darken(20).toHexString())}return s[t%s.length]}var a=t(\"fast-isnumeric\"),o=t(\"tinycolor2\"),i=t(\"../../components/color\"),l=t(\"./helpers\");e.exports=function(t,e){var n,s,c,u,f,d,h=e.values,p=e.labels,g=[],v=t._fullLayout,m=v._piecolormap,y={},x=!1,b=0,_=v.hiddenlabels||[];if(e.dlabel)for(p=new Array(h.length),n=0;n<h.length;n++)p[n]=String(e.label0+n*e.dlabel);for(n=0;n<h.length;n++)s=h[n],a(s)&&(s=+s,0>s||(c=p[n],void 0!==c&&\"\"!==c||(c=n),c=String(c),void 0===y[c]&&(y[c]=!0,u=o(e.marker.colors[n]),u.isValid()?(u=i.addOpacity(u,u.getAlpha()),m[c]||(m[c]=u)):m[c]?u=m[c]:(u=!1,x=!0),f=-1!==_.indexOf(c),f||(b+=s),g.push({v:s,label:c,color:u,i:n,hidden:f}))));if(e.sort&&g.sort(function(t,e){return e.v-t.v}),x)for(n=0;n<g.length;n++)d=g[n],d.color===!1&&(m[d.label]=d.color=r(v._piedefaultcolorcount),v._piedefaultcolorcount++);if(g[0]&&(g[0].vTotal=b),e.textinfo&&\"none\"!==e.textinfo){var w,k=-1!==e.textinfo.indexOf(\"label\"),M=-1!==e.textinfo.indexOf(\"text\"),A=-1!==e.textinfo.indexOf(\"value\"),L=-1!==e.textinfo.indexOf(\"percent\"),T=v.separators;for(n=0;n<g.length;n++)d=g[n],w=k?[d.label]:[],M&&e.text[d.i]&&w.push(e.text[d.i]),A&&w.push(l.formatPieValue(d.v,T)),L&&w.push(l.formatPiePercent(d.v/b,T)),d.text=w.join(\"<br>\")}return g};var s},{\"../../components/color\":18,\"./helpers\":159,\"fast-isnumeric\":11,tinycolor2:13}],158:[function(t,e,n){\"use strict\";var r=t(\"../../lib\"),a=t(\"./attributes\");e.exports=function(t,e,n,o){function i(n,o){return r.coerce(t,e,a,n,o)}var l=r.coerceFont,s=i(\"values\");if(!Array.isArray(s)||!s.length)return void(e.visible=!1);var c=i(\"labels\");Array.isArray(c)||(i(\"label0\"),i(\"dlabel\"));var u=i(\"marker.line.width\");u&&i(\"marker.line.color\");var f=i(\"marker.colors\");Array.isArray(f)||(e.marker.colors=[]),i(\"scalegroup\");var d=i(\"text\"),h=i(\"textinfo\",Array.isArray(d)?\"text+percent\":\"percent\");if(i(\"hoverinfo\",1===o._dataLength?\"label+text+value+percent\":void 0),h&&\"none\"!==h){var p=i(\"textposition\"),g=Array.isArray(p)||\"auto\"===p,v=g||\"inside\"===p,m=g||\"outside\"===p;if(v||m){var y=l(i,\"textfont\",o.font);v&&l(i,\"insidetextfont\",y),m&&l(i,\"outsidetextfont\",y)}}i(\"domain.x\"),i(\"domain.y\"),i(\"hol"
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r={};r.attributes=t(\"./attributes\"),r.supplyDefaults=t(\"./defaults\"),r.supplyLayoutDefaults=t(\"./layout_defaults\"),r.layoutAttributes=t(\"./layout_attributes\"),r.calc=t(\"./calc\"),r.plot=t(\"./plot\"),r.style=t(\"./style\"),r.styleOne=t(\"./style_one\"),r.moduleType=\"trace\",r.name=\"pie\",r.basePlotModule=t(\"./base_plot\"),r.categories=[\"pie\",\"showLegend\"],r.meta={},e.exports=r},{\"./attributes\":155,\"./base_plot\":156,\"./calc\":157,\"./defaults\":158,\"./layout_attributes\":161,\"./layout_defaults\":162,\"./plot\":163,\"./style\":164,\"./style_one\":165}],161:[function(t,e,n){\"use strict\";e.exports={hiddenlabels:{valType:\"data_array\"}}},{}],162:[function(t,e,n){\"use strict\";var r=t(\"../../lib\"),a=t(\"./layout_attributes\");e.exports=function(t,e){function n(n,o){return r.coerce(t,e,a,n,o)}n(\"hiddenlabels\")}},{\"../../lib\":89,\"./layout_attributes\":161}],163:[function(t,e,n){\"use strict\";function r(t,e,n){var r=Math.sqrt(t.width*t.width+t.height*t.height),o=t.width/t.height,i=Math.PI*Math.min(e.v/n.vTotal,.5),l=1-n.trace.hole,s=a(e,n),c={scale:s*n.r*2/r,rCenter:1-s,rotate:0};if(c.scale>=1)return c;var u=o+1/(2*Math.tan(i)),f=n.r*Math.min(1/(Math.sqrt(u*u+.5)+u),l/(Math.sqrt(o*o+l/2)+o)),d={scale:2*f/t.height,rCenter:Math.cos(f/n.r)-f*o/n.r,rotate:(180/Math.PI*e.midangle+720)%180-90},h=1/o,p=h+1/(2*Math.tan(i)),g=n.r*Math.min(1/(Math.sqrt(p*p+.5)+p),l/(Math.sqrt(h*h+l/2)+h)),v={scale:2*g/t.width,rCenter:Math.cos(g/n.r)-g/o/n.r,rotate:(180/Math.PI*e.midangle+810)%180-90},m=v.scale>d.scale?v:d;return c.scale<1&&m.scale>c.scale?m:c}function a(t,e){if(t.v===e.vTotal&&!e.trace.hole)return 1;var n=Math.PI*Math.min(t.v/e.vTotal,.5);return Math.min(1/(1+1/Math.sin(n)),(1-e.trace.hole)/2)}function o(t,e){var n=e.pxmid[0],r=e.pxmid[1],a=t.width/2,o=t.height/2;return 0>n&&(a*=-1),0>r&&(o*=-1),{scale:1,rCenter:1,rotate:0,x:a+Math.abs(o)*(a>0?1:-1)/2,y:o/(1+n*n/(r*r)),outside:!0}}function i(t,e){function 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y=g&&v[g-1];m&&!g&&(y=m),a(v[g],y)}}}function l(t,e){var n,r,a,o,i,l,s,u,f,d,h=[];for(a=0;a<t.length;a++){if(i=t[a][0],l=i.trace,n=e.w*(l.domain.x[1]-l.domain.x[0]),r=e.h*(l.domain.y[1]-l.domain.y[0]),s=l.tiltaxis*Math.PI/180,u=l.pull,Array.isArray(u))for(u=0,o=0;o<l.pull.length;o++)l.pull[o]>u&&(u=l.pull[o]);i.r=Math.min(n/c(l.tilt,Math.sin(s),l.depth),r/c(l.tilt,Math.cos(s),l.depth))/(2+2*u),i.cx=e.l+e.w*(l.domain.x[1]+l.domain.x[0])/2,i.cy=e.t+e.h*(2-l.domain.y[1]-l.domain.y[0])/2,l.scalegroup&&-1===h.indexOf(l.scalegroup)&&h.push(l.scalegroup)}for(o=0;o<h.length;o++){for(d=1/0,f=h[o],a=0;a<t.length;a++)i=t[a][0],i.trace.scalegroup===f&&(d=Math.min(d,i.r*i.r/i.vTotal));for(a=0;a<t.length;a++)i=t[a][0],i.trace.scalegroup===f&&(i.r=Math.sqrt(d*i.vTotal))}}function s(t){function e(t){var e=f.r*Math.sin(t),n=-f.r*Math.cos(t);return h?[e*(1-l*r*r)+n*i*l,e*i*l+n*(1-l*a*a),Math.sin(o)*(n*a-e*r)]:[e,n]}var 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c=n._pielayer.selectAll(\"g.trace\").data(e);c.enter().append(\"g\").attr({\"stroke-linejoin\":\"round\",\"class\":\"trace\"}),c.exit().remove(),c.order(),c.each(function(e){var l=u.select(this),c=e[0],v=c.trace,m=0,y=(v.depth||0)*c.r*Math.sin(m)/2,x=v.tiltaxis||0,b=x*Math.PI/180,_=[y*Math.sin(b),y*Math.cos(b)],w=c.r*Math.cos(m),k=l.selectAll(\"g.part\").data(v.tilt?[\"top\",\"sides\"]:[\"top\"]);k.enter().append(\"g\").attr(\"class\",function(t){return t+\" part\"}),k.exit().remove(),k.order(),s(e),l.selectAll(\".top\").each(function(){var l=u.select(this).selectAll(\"g.slice\").data(e);l.enter().append(\"g\").classed(\"slice\",!0),l.exit().remove();var s=[[[],[]],[[],[]]],m=!1;l.each(function(i){function l(e){var r=t._fullLayout,o=t._fullData[v.index],l=o.hoverinfo;if(\"all\"===l&&(l=\"label+text+value+percent+name\"),!t._dragging&&r.hovermode!==!1&&\"none\"!==l&&l){var s=a(i,c),u=k+i.pxmid[0]*(1-s),d=M+i.pxmid[1]*(1-s),h=n.separators,p=[];-1!==l.indexOf(\"label\")&&p.push(i.label),o.text&&o.text[i.i]&&-1!==l.indexOf(\"text\")&&p.push(o.text[i.i]),-1!==l.indexOf(\"value\")&&p.push(g.formatPieValue(i.v,h)),-1!==l.indexOf(\"percent\")&&p.push(g.formatPiePercent(i.v/c.vTotal,h)),f.loneHover({x0:u-s*c.r,x1:u+s*c.r,y:d,text:p.join(\"<br>\"),name:-1!==l.indexOf(\"name\")?o.name:void 0,color:i.color,idealAlign:i.pxmid[0]<0?\"left\":\"right\"},{container:r._hoverlayer.node(),outerContainer:r._paper.node()}),f.hover(t,e,\"pie\"),T=!0}}function d(e){t.emit(\"plotly_unhover\",{points:[e]}),T&&(f.loneUnhover(n._hoverlayer.node()),T=!1)}function y(){t._hoverdata=[i],t._hoverdata.trace=e.trace,f.click(t,{target:!0})}function b(t,e,n,r){return\"a\"+r*c.r+\",\"+r*w+\" \"+x+\" \"+i.largeArc+(n?\" 1 \":\" 0 \")+r*(e[0]-t[0])+\",\"+r*(e[1]-t[1])}if(i.hidden)return void u.select(this).selectAll(\"path,g\").remove();s[i.pxmid[1]<0?0:1][i.pxmid[0]<0?0:1].push(i);var k=c.cx+_[0],M=c.cy+_[1],A=u.select(this),L=A.selectAll(\"path.surface\").data([i]),T=!1;if(L.enter().append(\"path\").classed(\"surface\",!0).style({\"pointer-events\":\"all\"}),A.select(\"path.textline\").remove(),A.on(\"mouseover\",l).on(\"mouseout\",d).on(\"click\",y),v.pull){var z=+(Array.isArray(v.pull)?v.pull[i.i]:v.pull)||0;z>0&&(k+=z*i.pxmid[0],M+=z*i.pxmid[1])}i.cxFinal=k,i.cyFinal=M;var S=v.hole;if(i.v===c.vTotal){var E=\"M\"+(k+i.px0[0])+\",\"+(M+i.px0[1])+b(i.px0,i.pxmid,!0,1)+b(i.pxmid,i.px0,!0,1)+\"Z\";S?L.attr(\"d\",\"M\"+(k+S*i.px0[0])+\",\"+(M+S*i.px0[1])+b(i.px0,i.pxmid,!1,S)+b(i.pxmid,i.px0,!1,S)+\"Z\"+E):L.attr(\"d\",E)}else{var C=b(i.px0,i.px1,!0,1);if(S){var O=1-S;L.attr(\"d\",\"M\"+(k+S*i.px1[0])+\",\"+(M+S*i.px1[1])+b(i.px1,i.px0,!1,S)+\"l\"+O*i.px0[0]+\",\"+O*i.px0[1]+C+\"Z\")}else L.attr(\"d\",\"M\"+k+\",\"+M+\"l\"+i.px0[0]+\",\"+i.px0[1]+C+\"Z\")}var P=Array.isArray(v.textposition)?v.textposition[i.i]:v.textposition,N=A.selectAll(\"g.slicetext\").data(i.text&&\"none\"!==P?[0]:[]);N.enter().append(\"g\").classed(\"slicetext\",!0),N.exit().remove(),N.each(function(){var t=u.select(this).selectAll(\"text\").data([0]);t.enter().append(\"text\").attr(\"data-notex\",1),t.exit().remove(),t.text(i.text).attr({\"class\":\"slicetext\",transform:\"\",\"data-bb\":\"\",\"text-anchor\":\"middle\",x:0,y:0}).call(h.font,\"outside\"===P?v.outsidetextfont:v.insidetextfont).call(p.convertToTspans),t.selectAll(\"tspan.line\").attr({x:0,y:0});var e,n=h.bBox(t.node());\"outside\"===P?e=o(n,i):(e=r(n,i,c),\"auto\"===P&&e.scale<1&&(t.call(h.font,v.outsidetextfont),v.outsidetextfont.family===v.insidetextfont.family&&v.outsidetextfont.size===v.insidetextfont.size||(t.attr({\"data-bb\":\"\"}),n=h.bBox(t.node())),e=o(n,i)));var a=k+i.pxmid[0]*e.rCenter+(e.x||0),l=M+i.pxmid[1]*e.rCenter+(e.y||0);e.outside&&(i.yLabelMin=l-n.height/2,i.yLabelMid=l,i.yLabelMax=l+n.height/2,i.labelExtraX=0,i.labelExtraY=0,m=!0),t.attr(\"transform\",\"translate(\"+a+\",\"+l+\")\"+(e.scale<1?\"scale(\"+e.scale+\")\":\"\")+(e.rotate?\"rotate(\"+e.rotate+\")\":\"\")+\"translate(\"+-(n.left+n.right)/2+\",\"+-(n.top+n.bottom)/2+\")\")})}),m&&i(s,v),l.each(function(t){if(t.labelExtraX||t.labelExtraY){var e=u.select(this),n=e.select(\"g.slicetext text\");n.attr(\"transform\",\"translate(\"+t.labelExtraX+\",\"+t.labelExtraY+\")\"+n.attr(\"transform\"));var r=t.cxFinal+t.pxmid[0],a=t.cyFinal+t.pxmid[1],o=\"M\"+r+\",\"+a,i=(t.yLabelMax-t.yLabelMin)*(t.pxmid[0]<0?-1:1)/4;if(t.labelExtraX){var l=t.labelExtraX*t.pxmid[1]/t.pxmid[0],s=t.yLabelMid+t.labelExtraY-(t.cyFinal+t.pxmid[1]);o+=Math.abs(l)>Math.abs(s)?\"l\"+s*t.pxmid[0]/t.pxmid[1]+\",\"+s+\"H\"+(r+t.labelExtraX+i):\"l\"+t.labelExtraX+\",\"+l+\"v\"+(s-l)+\"h\"+i}else o+=\"V\"+(t.yLabelMid+t.labelExtraY)+\"h\"+i;e.append(\"path\").classed(\"textline\",!0).call(d.stroke,v.outsidetextfont.color).attr({\"stroke-width\":Math.min(2,v.outsidetextfont.size/8),d:o,fill:\"none\"})}})})}),setTimeout(function(){c.selectAll(\"tspan\").each(function(){var t=u.select(this);t.attr(\"dy\")&&t.attr(\"dy\",t.attr(\"dy\"))})},0)}},{\"../../components/color\":18,\"../../components/drawing\":41,\"../../lib/svg_text_utils\":100,\"../../plots/cartesian/graph_interact\":117,\"./helpers"
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r=t(\"../../components/color\"),a=t(\"./subtypes\");e.exports=function(t,e){var n,o;if(\"lines\"===t.mode)return n=t.line.color,n&&r.opacity(n)?n:t.fillcolor;if(\"none\"===t.mode)return t.fill?t.fillcolor:\"\";var i=e.mcc||(t.marker||{}).color,l=e.mlcc||((t.marker||{}).line||{}).color;return o=i&&r.opacity(i)?i:l&&r.opacity(l)&&(e.mlw||((t.marker||{}).line||{}).width)?l:\"\",o?r.opacity(o)<.3?r.addOpacity(o,.3):o:(n=(t.line||{}).color,n&&r.opacity(n)&&a.hasLines(t)&&t.line.width?n:t.fillcolor)}},{\"../../components/color\":18,\"./subtypes\":186}],176:[function(t,e,n){\"use strict\";var r=t(\"../../lib\"),a=t(\"../../plots/cartesian/graph_interact\"),o=t(\"../../plots/cartesian/constants\"),i=t(\"../../components/errorbars\"),l=t(\"./get_trace_color\"),s=t(\"../../components/color\");e.exports=function(t,e,n,c){var u=t.cd,f=u[0].trace,d=t.xa,h=t.ya,p=d.c2p(e),g=h.c2p(n),v=[p,g];if(-1!==f.hoveron.indexOf(\"points\")){var m=function(t){var e=Math.max(3,t.mrc||0);return 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r=t[0].trace;c.hasMarkers(r)&&r.marker.maxdisplayed>0&&e>n&&u++});var f=Math.round(u*s/3+Math.floor(u/3)*s/7.1);t.forEach(function(t){delete t.vis}),o.forEach(function(t,e){0===Math.round((e+f)%s)&&(t.vis=!0)})}}})}var a=t(\"d3\"),o=t(\"../../lib\"),i=t(\"../../components/drawing\"),l=t(\"../../components/errorbars\"),s=t(\"../../lib/polygon\").tester,c=t(\"./subtypes\"),u=t(\"./arrays_to_calcdata\"),f=t(\"./line_points\");e.exports=function(t,e,n){function d(t){return t.filter(function(t){return t.vis})}r(t,e,n);var h=e.x(),p=e.y(),g=e.plot.select(\".scatterlayer\").selectAll(\"g.trace.scatter\").data(n);g.enter().append(\"g\").attr(\"class\",\"trace scatter\").style(\"stroke-miterlimit\",2),g.call(l.plot,e);var v,m,y,x,b=\"\",_=[];g.each(function(t){var e=t[0].trace,n=e.line,r=a.select(this);if(e.visible===!0&&(m=e.fill.charAt(e.fill.length-1),\"x\"!==m&&\"y\"!==m&&(m=\"\"),t[0].node3=r,u(t),c.hasLines(e)||\"none\"!==e.fill)){var o,l,d,g,w,k=\"\",M=\"\";v=\"tozero\"===e.fill.substr(0,6)||\"toself\"===e.fill||\"to\"===e.fill.substr(0,2)&&!b?r.append(\"path\").classed(\"js-fill\",!0):null,x&&(y=x.datum(t)),x=r.append(\"path\").classed(\"js-fill\",!0),-1!==[\"hv\",\"vh\",\"hvh\",\"vhv\"].indexOf(n.shape)?(d=i.steps(n.shape),g=i.steps(n.shape.split(\"\").reverse().join(\"\"))):d=g=\"spline\"===n.shape?function(t){var e=t[t.length-1];return t[0][0]===e[0]&&t[0][1]===e[1]?i.smoothclosed(t.slice(1),n.smoothing):i.smoothopen(t,n.smoothing)}:function(t){return\"M\"+t.join(\"L\")},w=function(t){return g(t.reverse())};var A,L=f(t,{xaxis:h,yaxis:p,connectGaps:e.connectgaps,baseTolerance:Math.max(n.width||1,3)/4,linear:\"linear\"===n.shape}),T=e._polygons=new Array(L.length);for(A=0;A<L.length;A++)e._polygons[A]=s(L[A]);if(L.length){var z=L[0][0],S=L[L.length-1],E=S[S.length-1];for(A=0;A<L.length;A++){var C=L[A];o=d(C),l=w(C),k?m?(k+=\"L\"+o.substr(1),M=l+(\"L\"+M.substr(1))):(k+=\"Z\"+o,M=l+\"Z\"+M):(k=o,M=l),c.hasLines(e)&&C.length>1&&r.append(\"path\").classed(\"js-line\",!0).style(\"vector-effect\",\"non-scaling-stroke\").attr(\"d\",o)}v?z&&E&&(m?(\"y\"===m?z[1]=E[1]=p.c2p(0,!0):\"x\"===m&&(z[0]=E[0]=h.c2p(0,!0)),v.attr(\"d\",k+\"L\"+E+\"L\"+z+\"Z\")):v.attr(\"d\",k+\"Z\")):\"tonext\"===e.fill.substr(0,6)&&k&&b&&(\"tonext\"===e.fill?y.attr(\"d\",k+\"Z\"+b+\"Z\"):y.attr(\"d\",k+\"L\"+b.substr(1)+\"Z\"),e._polygons=e._polygons.concat(_)),b=M,_=T}}}),g.selectAll(\"path:not([d])\").remove(),g.append(\"g\").attr(\"class\",\"points\").each(function(t){var e=t[0].trace,n=a.select(this),r=c.hasMarkers(e),l=c.hasText(e);!r&&!l||e.visible!==!0?n.remove():(r&&n.selectAll(\"path.point\").data(e.marker.maxdisplayed?d:o.identity).enter().append(\"path\").classed(\"point\",!0).call(i.translatePoints,h,p),l&&n.selectAll(\"g\").data(e.marker.maxdisplayed?d:o.identity).enter().append(\"g\").append(\"text\").call(i.translatePoints,h,p))})}},{\"../../components/drawing\":41,\"../../components/errorbars\":47,\"../../lib\":89,\"../../lib/polygon\":95,\"./arrays_to_calcdata\":166,\"./line_points\":179,\"./subtypes\":186,d3:9}],184:[function(t,e,n){\"use strict\";var r=t(\"./subtypes\"),a=.2;e.exports=function(t,e){var n,o,i,l,s=t.cd,c=t.xaxis,u=t.yaxis,f=[],d=s[0].trace,h=d.index,p=d.marker,g=!r.hasMarkers(d)&&!r.hasText(d);if(d.visible===!0&&!g){var v=Array.isArray(p.opacity)?1:p.opacity;if(e===!1)for(n=0;n<s.length;n++)s[n].dim=0;else for(n=0;n<s.length;n++)o=s[n],i=c.c2p(o.x),l=u.c2p(o.y),e.contains([i,l])?(f.push({curveNumber:h,pointNumber:n,x:o.x,y:o.y}),o.dim=0):o.dim=1;return s[0].node3.selectAll(\"path.point\").style(\"opacity\",function(t){return((t.mo+1||v+1)-1)*(t.dim?a:1)}),s[0].node3.selectAll(\"text\").style(\"opacity\",function(t){return t.dim?a:1}),f}}},{\"./subtypes\":186}],185:[function(t,e,n){\"use strict\";var r=t(\"d3\"),a=t(\"../../components/drawing\"),o=t(\"../../components/errorbars\");e.exports=function(t){var e=r.select(t).selectAll(\"g.trace.scatter\");e.style(\"opacity\",function(t){return t[0].trace.opacity}),e.selectAll(\"g.points\").each(function(t){r.select(this).selectAll(\"path.point\").call(a.pointStyle,t.trace||t[0].trace),r.select(this).selectAll(\"text\").call(a.textPointStyle,t.trace||t[0].trace)}),e.selectAll(\"g.trace path.js-line\").call(a.lineGroupStyle),e.selectAll(\"g.trace path.js-fill\").call(a.fillGroupStyle),e.call(o.style)}},{\"../../components/drawing\":41,\"../../components/errorbars\":47,d3:9}],186:[function(t,e,n){\"use strict\";e.exports={hasLines:function(t){return t.visible&&t.mode&&-1!==t.mode.indexOf(\"lines\")},hasMarkers:function(t){return t.visible&&t.mode&&-1!==t.mode.indexOf(\"markers\")},hasText:function(t){return t.visible&&t.mode&&-1!==t.mode.indexOf(\"text\")},isBubble:function(t){return\"object\"==typeof t.marker&&Array.isArray(t.marker.size)}}},{}],187:[function(t,e,n){\"use strict\";var r=t(\"../../lib\");e.exports=function(t,e,n,a){a(\"textposition\"),r.coerceFont(a,\"textfont\",n.font)}},{\"../../lib\":89}],188:[function(t,e,n){\"use strict\";e.exports=function(t,e,n){var r,a=n(\"x\"),o=n(\"y\");if(a)o?(r=Math.min(a.length,o.length),r<a.length&&(e.x=a.slice(0,r)),r<o.length&&(e.y=o.slice(0,r))):(r=a.length,n(\"y0\"),n(\"dy\"));else{if(!o)return 0;r=e.y.length,n(\"x0\"),n(\"dx\")}return r}},{}]},{},[5])(5)}); </script>\n"
+" </head>\n"
+" <body>\n"
+"   <div id=\"header\">\n"
+"     <label>plot:</label>\n"
+"     <div class=\"select\">\n"
+"       <span class=\"arr\"></span>\n"
+,
+"       <select id=\"chooser\">\n"
+"         <option value=\"summary\">summary</option>\n"
+"         {% for run in runs %}\n"
+"         <option value=\"{$loop.index0}\">samples\n"
+"           {% for param in run.params %}\n"
+"           | {$param.name}={$param.value}\n"
+"           {% endfor %}\n"
+"         </option>\n"
+"         {% endfor %}\n"
+"       </select>\n"
+"     </div>\n"
+"   </div>\n"
+"   <div id=\"plot\"></div>\n"
+"   <div id=\"footer\">Generated with <a href=\"http://flamingdangerzone.com/nonius\">nonius</a></div>\n"
+"   <script type=\"text/javascript\"> !function () {\n"
+"    var data = {\n"
+"        title: '{$title}',\n"
+"        units: '{$units}',\n"
+"        logarithmic: {$logarithmic},\n"
+"        param: '{$runparam}',\n"
+"        runs: [\n"
+"            {% for run in runs %}{\n"
+"                params: {\n"
+"                    {% for param in run.params %}'{$param.name}': '{$param.value}',\n"
+"                    {% endfor %}\n"
+"                },\n"
+"                benchmarks: [\n"
+"                    {% for benchmark in run.benchmarks %}{\n"
+"                        name: '{$benchmark.name}',\n"
+"                        mean: {$benchmark.mean},\n"
+"                        stddev: {$benchmark.stddev},\n"
+"                        samples: [\n"
+"                            {% for sample in benchmark.samples %}{$sample}, {% endfor %}\n"
+"                        ],\n"
+"                    },{% endfor %}\n"
+"                ]\n"
+"            },{% endfor %}\n"
+"        ]\n"
+"    };\n"
+"\n"
+"    var plotdiv = document.getElementById(\"plot\");\n"
+"    window.addEventListener(\"resize\", function() {\n"
+"        Plotly.Plots.resize(plotdiv);\n"
+"    });\n"
+"\n"
+"    var chooser = document.getElementById(\"chooser\");\n"
+"    chooser.addEventListener(\"change\", choosePlot);\n"
+"    chooser.addEventListener(\"blur\", chooser.focus.bind(chooser));\n"
+"    chooser.focus();\n"
+"\n"
+"    var legendStyle = {\n"
+"        font: { family: 'monospace' },\n"
+"        borderwidth: 2,\n"
+"        bordercolor: 'black'\n"
+"    }\n"
+"\n"
+"    function choosePlot() {\n"
+"        var plot = chooser.options[chooser.selectedIndex].value;\n"
+"        if (plot == 'summary') {\n"
+"            if (data.runs.length > 1) {\n"
+"                plotSummary();\n"
+"            } else {\n"
+"                plotSingleSummary();\n"
+"            }\n"
+"        } else {\n"
+"            plotSamples(plot);\n"
+"        }\n"
+"    }\n"
+"\n"
+"    function plotSamples(plot) {\n"
+"        var run = data.runs[plot];\n"
+"        var traces = run.benchmarks.map(function (b, i) {\n"
+"            return {\n"
+"                name: b.name,\n"
+"                type: 'scatter',\n"
+"                mode: 'markers',\n"
+"                marker: { symbol: i },\n"
+"                y: b.samples,\n"
+"                x: b.samples.map(function (_, i) { return i; })\n"
+"            }\n"
+"        });\n"
+"        var layout = {\n"
+"            title: data.title,\n"
+"            showLegend: true,\n"
+"            xaxis: { title: 'Measurement' },\n"
+"            yaxis: {\n"
+"                title: 'Time (' + data.units + ')',\n"
+"                rangemode: 'tozero',\n"
+"                zeroline: true\n"
+"            },\n"
+"            legend: legendStyle\n"
+"        };\n"
+"        Plotly.newPlot(plotdiv, traces, layout);\n"
+"    }\n"
+"\n"
+"    function plotSummary() {\n"
+"        var traces = data.runs[0].benchmarks.map(function (b, i) {\n"
+"            return {\n"
+"                name: b.name,\n"
+"                type: 'scatter',\n"
+"                mode: 'markers',\n"
+"                marker: { symbol: i },\n"
+"                x: data.runs.map(function (r) { return r.params['LAYER']; }),\n"
+"                y: data.runs.map(function (r) { return r.benchmarks[i].mean; }),\n"
+"            }\n"
+"        });\n"
+"        var layout = {\n"
+"            title: data.title,\n"
+"            showLegend: true,\n"
+"            xaxis: {\n"
+"                title: 'Layer',\n"
+"                tickmode: 'array',\n"
+"                tickvals: data.runs.map(function (r) { return r.params['LAYER']; }),\n"
+"                type: data.logarithmic ? 'log' : '',\n"
+"            },\n"
+"            yaxis: {\n"
+"                title: 'Time (' + data.units + ')',\n"
+"                rangemode: 'tozero',\n"
+"                zeroline: true,\n"
+"                type: data.logarithmic ? 'log' : '',\n"
+"            },\n"
+"            legend: legendStyle\n"
+"        };\n"
+"        Plotly.newPlot(plotdiv, traces, layout);\n"
+"    }\n"
+"\n"
+"    function plotSingleSummary() {\n"
+"        var traces = data.runs[0].benchmarks.map(function (b, i) {\n"
+"            return {\n"
+"                type: 'bar',\n"
+"                name: b.name,\n"
+"                x: [ 0 ],\n"
+"                y: [ b.mean ],\n"
+"                error_y: {\n"
+"                    type: 'data',\n"
+"                    array: [ b.stddev ],\n"
+"                    visible: true\n"
+"                }\n"
+"            }\n"
+"        });\n"
+"        var layout = {\n"
+"            title: data.title,\n"
+"            showLegend: true,\n"
+"            xaxis: {\n"
+"                title: '',\n"
+"                showticklabels: false,\n"
+"            },\n"
+"            yaxis: {\n"
+"                title: 'Time (' + data.units + ')',\n"
+"                rangemode: 'tozero',\n"
+"                zeroline: true\n"
+"            },\n"
+"            legend: legendStyle\n"
+"        };\n"
+"        Plotly.newPlot(plotdiv, traces, layout);\n"
+"    }\n"
+"\n"
+"    choosePlot();\n"
+"}();\n"
+" </script>\n"
+" </body>\n"
+"</html>\n"
diff --git a/infra/nnfw/cmake/packages/NoniusConfig.cmake b/infra/nnfw/cmake/packages/NoniusConfig.cmake
new file mode 100644
index 000000000..2b5778ebb
--- /dev/null
+++ b/infra/nnfw/cmake/packages/NoniusConfig.cmake
@@ -0,0 +1,26 @@
+function(_Nonius_import)
+  nnfw_find_package(NoniusSource QUIET)
+
+  if(NOT NoniusSource_FOUND)
+    set(Nonius_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT NoniusSource_FOUND)
+
+  if(NOT TARGET nonius)
+    message(STATUS "Found nonius: TRUE")
+    add_library(nonius INTERFACE)
+    target_include_directories(nonius INTERFACE "${NoniusSource_DIR}/include")
+  endif(NOT TARGET nonius)
+
+  if(BUILD_KBENCHMARK)
+    # Copy html_report_template.g.h++ file to externals/nonius.
+    # This header file is modified to show the html summary view according to the layer in kbenchmark.
+    execute_process(COMMAND ${CMAKE_COMMAND} -E copy
+                    "${CMAKE_CURRENT_LIST_DIR}/Nonius/html_report_template.g.h++"
+                    "${NoniusSource_DIR}/include/nonius/detail")
+  endif(BUILD_KBENCHMARK)
+
+  set(Nonius_FOUND TRUE PARENT_SCOPE)
+endfunction(_Nonius_import)
+
+_Nonius_import()
diff --git a/infra/nnfw/cmake/packages/NoniusSourceConfig.cmake b/infra/nnfw/cmake/packages/NoniusSourceConfig.cmake
new file mode 100644
index 000000000..5dde6b476
--- /dev/null
+++ b/infra/nnfw/cmake/packages/NoniusSourceConfig.cmake
@@ -0,0 +1,13 @@
+function(_NoniusSource_import)
+  nnfw_include(ExternalSourceTools)
+  nnfw_include(OptionTools)
+
+  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+  set(NONIUS_URL ${EXTERNAL_DOWNLOAD_SERVER}/libnonius/nonius/archive/v1.2.0-beta.1.tar.gz)
+  ExternalSource_Get("nonius" ${DOWNLOAD_NONIUS} ${NONIUS_URL})
+
+  set(NoniusSource_DIR ${nonius_SOURCE_DIR} PARENT_SCOPE)
+  set(NoniusSource_FOUND ${nonius_SOURCE_GET} PARENT_SCOPE)
+endfunction(_NoniusSource_import)
+
+_NoniusSource_import()
diff --git a/infra/nnfw/cmake/packages/OpcodesSourceConfig.cmake b/infra/nnfw/cmake/packages/OpcodesSourceConfig.cmake
new file mode 100644
index 000000000..635249f64
--- /dev/null
+++ b/infra/nnfw/cmake/packages/OpcodesSourceConfig.cmake
@@ -0,0 +1,13 @@
+function(_PeachpySource_import)
+    nnfw_include(ExternalSourceTools)
+    nnfw_include(OptionTools)
+
+    envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+    set(PEACHPY_URL ${EXTERNAL_DOWNLOAD_SERVER}/Maratyszcza/Opcodes/archive/6e2b0cd9f1403ecaf164dea7019dd54db5aea252.tar.gz)
+    ExternalSource_Get("python_opcodes" ${DOWNLOAD_NNPACK} ${PEACHPY_URL})
+        
+    set(PYTHON_OPCODES_SOURCE_DIR ${python_opcodes_SOURCE_DIR} PARENT_SCOPE)
+    set(PYTHON_OPCODES_SOURCE_FOUND ${python_opcodes_SOURCE_GET} PARENT_SCOPE)
+endfunction(_PeachpySource_import)
+
+_PeachpySource_import()
diff --git a/infra/nnfw/cmake/packages/PSIMDSourceConfig.cmake b/infra/nnfw/cmake/packages/PSIMDSourceConfig.cmake
new file mode 100644
index 000000000..0f208cd55
--- /dev/null
+++ b/infra/nnfw/cmake/packages/PSIMDSourceConfig.cmake
@@ -0,0 +1,14 @@
+function(_PSIMDSource_import)
+    nnfw_include(ExternalSourceTools)
+    nnfw_include(OptionTools)
+
+    envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+    set(PSIMD_URL ${EXTERNAL_DOWNLOAD_SERVER}/Maratyszcza/psimd/archive/90a938f30ba414ada2f4b00674ee9631d7d85e19.tar.gz)
+
+    ExternalSource_Get("PSIMD" ${DOWNLOAD_NNPACK} ${PSIMD_URL})
+
+    set(PSIMD_SOURCE_DIR ${PSIMD_SOURCE_DIR} PARENT_SCOPE)
+    set(PSIMD_SOURCE_FOUND ${PSIMD_SOURCE_GET} PARENT_SCOPE)
+endfunction(_PSIMDSource_import)
+
+_PSIMDSource_import()
diff --git a/infra/nnfw/cmake/packages/PeachpySourceConfig.cmake b/infra/nnfw/cmake/packages/PeachpySourceConfig.cmake
new file mode 100644
index 000000000..4cfd682c7
--- /dev/null
+++ b/infra/nnfw/cmake/packages/PeachpySourceConfig.cmake
@@ -0,0 +1,31 @@
+function(_PeachpySource_import)
+    nnfw_include(ExternalSourceTools)
+    nnfw_include(OptionTools)
+
+    envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+    set(PEACHPY_URL ${EXTERNAL_DOWNLOAD_SERVER}/Maratyszcza/PeachPy/archive/01d15157a973a4ae16b8046313ddab371ea582db.tar.gz)
+
+    ExternalSource_Get("python_peachpy" ${DOWNLOAD_NNPACK} ${PEACHPY_URL})
+    FIND_PACKAGE(PythonInterp)
+
+    nnfw_find_package(SixSource REQUIRED)
+    nnfw_find_package(Enum34Source REQUIRED)
+    nnfw_find_package(OpcodesSource REQUIRED)
+
+    # Generate opcodes:
+    SET(ENV{PYTHONPATH} ${python_peachpy_SOURCE_DIR}:${PYTHON_SIX_SOURCE_DIR}:${PYTHON_ENUM_SOURCE_DIR}:${PYTHON_OPCODES_SOURCE_DIR})
+    EXECUTE_PROCESS(COMMAND ${PYTHON_EXECUTABLE} ./codegen/x86_64.py
+            WORKING_DIRECTORY ${python_peachpy_SOURCE_DIR}
+            RESULT_VARIABLE BUILT_PP)
+
+    if(NOT BUILT_PP EQUAL 0)
+			# Mark PYTHON_PEACHPY_SOURCE_FOUND as FALSE if source generation fails
+      set(PYTHON_PEACHPY_SOURCE_FOUND FALSE PARENT_SCOPE)
+      return()
+    endif(NOT BUILT_PP EQUAL 0)
+
+    set(PYTHON_PEACHPY_SOURCE_DIR ${python_peachpy_SOURCE_DIR} PARENT_SCOPE)
+    set(PYTHON_PEACHPY_SOURCE_FOUND ${python_peachpy_SOURCE_GET} PARENT_SCOPE)
+endfunction(_PeachpySource_import)
+
+_PeachpySource_import()
diff --git a/infra/nnfw/cmake/packages/PthreadpoolSourceConfig.cmake b/infra/nnfw/cmake/packages/PthreadpoolSourceConfig.cmake
new file mode 100644
index 000000000..0c3b61ac4
--- /dev/null
+++ b/infra/nnfw/cmake/packages/PthreadpoolSourceConfig.cmake
@@ -0,0 +1,14 @@
+function(_pthreadpoolSource_import)
+    nnfw_include(ExternalSourceTools)
+    nnfw_include(OptionTools)
+
+    envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+    set(PTHREADPOOL_URL ${EXTERNAL_DOWNLOAD_SERVER}/Maratyszcza/pthreadpool/archive/6673a4c71fe35e077c6843a74017d9c25610c537.tar.gz)
+
+    ExternalSource_Get("pthreadpool" ${DOWNLOAD_NNPACK} ${PTHREADPOOL_URL})
+
+    set(PTHREADPOOL_SOURCE_DIR ${pthreadpool_SOURCE_DIR} PARENT_SCOPE)
+    set(PTHREADPOOL_SOURCE_FOUND ${pthreadpool_SOURCE_GET} PARENT_SCOPE)
+endfunction(_pthreadpoolSource_import)
+
+_pthreadpoolSource_import()
diff --git a/infra/nnfw/cmake/packages/SixSourceConfig.cmake b/infra/nnfw/cmake/packages/SixSourceConfig.cmake
new file mode 100644
index 000000000..309ead302
--- /dev/null
+++ b/infra/nnfw/cmake/packages/SixSourceConfig.cmake
@@ -0,0 +1,14 @@
+function(_SIXSource_import)
+    nnfw_include(ExternalSourceTools)
+    nnfw_include(OptionTools)
+
+    envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+    set(six_URL ${EXTERNAL_DOWNLOAD_SERVER}/benjaminp/six/archive/1.11.0.tar.gz)
+
+    ExternalSource_Get("python_six" ${DOWNLOAD_NNPACK} ${six_URL})
+
+    set(PYTHON_SIX_SOURCE_DIR ${python_six_SOURCE_DIR} PARENT_SCOPE)
+    set(PYTHON_SIX_SOURCE_FOUND ${python_six_SOURCE_GET} PARENT_SCOPE)
+endfunction(_SIXSource_import)
+
+_SIXSource_import()
diff --git a/infra/nnfw/cmake/packages/TensorFlowLite/CMakeLists.txt b/infra/nnfw/cmake/packages/TensorFlowLite/CMakeLists.txt
new file mode 100644
index 000000000..93676525a
--- /dev/null
+++ b/infra/nnfw/cmake/packages/TensorFlowLite/CMakeLists.txt
@@ -0,0 +1,64 @@
+set(TENSORFLOW_LITE_BASE ${TensorFlowSource_DIR}/tensorflow/lite)
+
+#
+# Tensorflow Lite library
+#
+file(GLOB TFLITE_CORE_SRCS "${TENSORFLOW_LITE_BASE}/*.c" "${TENSORFLOW_LITE_BASE}/*.cc" "${TENSORFLOW_LITE_BASE}/core/*.cc")
+file(GLOB TFLITE_CORE_TESTS "${TENSORFLOW_LITE_BASE}/*test*.cc")
+list(REMOVE_ITEM TFLITE_CORE_SRCS ${TFLITE_CORE_TESTS})
+
+file(GLOB_RECURSE TFLITE_KERNEL_SRCS "${TENSORFLOW_LITE_BASE}/kernels/*.cc")
+file(GLOB_RECURSE TFLITE_KERNEL_TESTS "${TENSORFLOW_LITE_BASE}/kernels/*test*.cc")
+list(REMOVE_ITEM TFLITE_KERNEL_SRCS ${TFLITE_KERNEL_TESTS})
+
+file(GLOB TFLITE_LIB_SRCS "${TENSORFLOW_LITE_BASE}/c/*.c" "${TENSORFLOW_LITE_BASE}/c/*.cc")
+file(GLOB TFLITE_LIB_TESTS "${TENSORFLOW_LITE_BASE}/c/*test*.cc")
+list(REMOVE_ITEM TFLITE_LIB_SRCS ${TFLITE_LIB_TESTS})
+
+file(GLOB TFLITE_API_SRCS "${TENSORFLOW_LITE_BASE}/core/api/*.c" "${TENSORFLOW_LITE_BASE}/core/api/*.cc")
+file(GLOB TFLITE_API_TESTS "${TENSORFLOW_LITE_BASE}/core/api/*test*.cc")
+list(REMOVE_ITEM TFLITE_API_SRCS ${TFLITE_API_TESTS})
+
+file(GLOB TFLITE_PROFILING_SRCS "${TENSORFLOW_LITE_BASE}/profiling/*.cc")
+file(GLOB TFLITE_PROFILING_TESTS "${TENSORFLOW_LITE_BASE}/profiling/*test*.cc")
+list(REMOVE_ITEM TFLITE_PROFILING_SRCS ${TFLITE_PROFILING_TESTS})
+
+# We will use our own BuiltinOpResolver
+list(REMOVE_ITEM TFLITE_KERNEL_SRCS "${TENSORFLOW_LITE_BASE}/kernels/register.cc")
+# We will use our own summarizer
+list(REMOVE_ITEM TFLITE_PROFILING_SRCS "${TENSORFLOW_LITE_BASE}/profiling/profile_summarizer.cc")
+list(APPEND TFLITE_SRCS ${TFLITE_CORE_SRCS})
+list(APPEND TFLITE_SRCS ${TFLITE_KERNEL_SRCS})
+list(APPEND TFLITE_SRCS ${TFLITE_LIB_SRCS})
+list(APPEND TFLITE_SRCS ${TFLITE_API_SRCS})
+list(APPEND TFLITE_SRCS ${TFLITE_PROFILING_SRCS})
+
+list(APPEND TFLITE_SRCS "${FarmhashSource_DIR}/src/farmhash.cc")
+
+list(APPEND TFLITE_INCLUDES "${TensorFlowSource_DIR}")
+list(APPEND TFLITE_INCLUDES "${AbslSource_DIR}")
+list(APPEND TFLITE_INCLUDES "${GEMMLowpSource_DIR}")
+list(APPEND TFLITE_INCLUDES "${FarmhashSource_DIR}/src")
+list(APPEND TFLITE_INCLUDES "${FlatBuffersSource_DIR}/include")
+
+if(NEON2SSESource_FOUND)
+  list(APPEND TFLITE_INCLUDES "${NEON2SSESource_DIR}")
+endif(NEON2SSESource_FOUND)
+
+# This kernels are not used on nnfw
+## spectrogram
+list(REMOVE_ITEM TFLITE_SRCS "${TENSORFLOW_LITE_BASE}/kernels/audio_spectrogram.cc")
+list(REMOVE_ITEM TFLITE_SRCS "${TENSORFLOW_LITE_BASE}/kernels/audio_spectrogram_test.cc")
+list(REMOVE_ITEM TFLITE_SRCS "${TENSORFLOW_LITE_BASE}/kernels/internal/spectrogram.cc")
+## mfcc
+list(REMOVE_ITEM TFLITE_SRCS "${TENSORFLOW_LITE_BASE}/kernels/internal/mfcc.cc")
+list(REMOVE_ITEM TFLITE_SRCS "${TENSORFLOW_LITE_BASE}/kernels/internal/mfcc_dct.cc")
+list(REMOVE_ITEM TFLITE_SRCS "${TENSORFLOW_LITE_BASE}/kernels/internal/mfcc_mel_filterbank.cc")
+list(REMOVE_ITEM TFLITE_SRCS "${TENSORFLOW_LITE_BASE}/kernels/mfcc.cc")
+list(REMOVE_ITEM TFLITE_SRCS "${TENSORFLOW_LITE_BASE}/kernels/mfcc_test.cc")
+
+add_library(tensorflow-lite STATIC ${TFLITE_SRCS})
+target_include_directories(tensorflow-lite SYSTEM PUBLIC ${TFLITE_INCLUDES})
+target_compile_definitions(tensorflow-lite PUBLIC "GEMMLOWP_ALLOW_SLOW_SCALAR_FALLBACK")
+set_property(TARGET tensorflow-lite PROPERTY POSITION_INDEPENDENT_CODE ON)
+target_link_libraries(tensorflow-lite eigen ${LIB_PTHREAD} dl)
diff --git a/infra/nnfw/cmake/packages/TensorFlowLiteConfig.cmake b/infra/nnfw/cmake/packages/TensorFlowLiteConfig.cmake
new file mode 100644
index 000000000..4dbc1d14c
--- /dev/null
+++ b/infra/nnfw/cmake/packages/TensorFlowLiteConfig.cmake
@@ -0,0 +1,69 @@
+# NOTE This line prevents multiple definitions of tensorflow-lite target
+if(TARGET tensorflow-lite)
+  set(TensorFlowLite_FOUND TRUE)
+  return()
+endif(TARGET tensorflow-lite)
+
+if(BUILD_TENSORFLOW_LITE)
+  macro(return_unless VAR)
+    if(NOT ${VAR})
+      set(TensorFlowLite_FOUND PARENT_SCOPE)
+      return()
+    endif(NOT ${VAR})
+  endmacro(return_unless)
+
+  # Required packages
+  nnfw_find_package(AbslSource QUIET)
+  return_unless(AbslSource_FOUND)
+  nnfw_find_package(Eigen QUIET)
+  return_unless(Eigen_FOUND)
+  nnfw_find_package(FarmhashSource QUIET)
+  return_unless(FarmhashSource_FOUND)
+  nnfw_find_package(FlatBuffersSource QUIET)
+  return_unless(FlatBuffersSource_FOUND)
+  nnfw_find_package(GEMMLowpSource QUIET)
+  return_unless(GEMMLowpSource_FOUND)
+  nnfw_find_package(TensorFlowSource QUIET)
+  return_unless(TensorFlowSource_FOUND)
+
+  # Optional packages
+  nnfw_find_package(NEON2SSESource QUIET)
+
+  nnfw_include(ExternalProjectTools)
+  add_extdirectory("${CMAKE_CURRENT_LIST_DIR}/TensorFlowLite" tflite)
+
+  set(TensorFlowLite_FOUND TRUE)
+  return()
+endif(BUILD_TENSORFLOW_LITE)
+
+# Use pre-built TensorFlow Lite
+find_path(TFLITE_INCLUDE_DIR NAMES  tensorflow/lite/interpreter.h)
+find_library(TFLITE_LIB NAMES       tensorflow-lite)
+
+if(NOT TFLITE_INCLUDE_DIR)
+  set(TensorFlowLite_FOUND FALSE)
+  return()
+endif(NOT TFLITE_INCLUDE_DIR)
+
+if(NOT TFLITE_LIB)
+  set(TensorFlowLite_FOUND FALSE)
+  return()
+endif(NOT TFLITE_LIB)
+
+message(STATUS "Found TensorFlow Lite: TRUE (include: ${TFLITE_INCLUDE_DIR}, lib: ${TFLITE_LIB}")
+
+# TODO Use IMPORTED target
+add_library(tensorflow-lite INTERFACE)
+target_include_directories(tensorflow-lite SYSTEM INTERFACE ${TFLITE_INCLUDE_DIR})
+target_link_libraries(tensorflow-lite INTERFACE ${TFLITE_LIB})
+
+# Prefer -pthread to -lpthread
+set(THREADS_PREFER_PTHREAD_FLAG TRUE)
+set(CMAKE_THREAD_PREFER_PTHREAD TRUE)
+find_package(Threads QUIET)
+
+if(Threads_FOUND)
+  target_link_libraries(tensorflow-lite INTERFACE ${CMAKE_THREAD_LIBS_INIT})
+endif(Threads_FOUND)
+
+set(TensorFlowLite_FOUND TRUE)
diff --git a/infra/nnfw/cmake/packages/TensorFlowSourceConfig.cmake b/infra/nnfw/cmake/packages/TensorFlowSourceConfig.cmake
new file mode 100644
index 000000000..f9fd3af13
--- /dev/null
+++ b/infra/nnfw/cmake/packages/TensorFlowSourceConfig.cmake
@@ -0,0 +1,18 @@
+function(_TensorFlowSource_import)
+  if(NOT DOWNLOAD_TENSORFLOW)
+    set(TensorFlowSource_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif(NOT DOWNLOAD_TENSORFLOW)
+
+  nnfw_include(ExternalSourceTools)
+  nnfw_include(OptionTools)
+
+  envoption(EXTERNAL_DOWNLOAD_SERVER "https://github.com")
+  set(TENSORFLOW_URL ${EXTERNAL_DOWNLOAD_SERVER}/tensorflow/tensorflow/archive/v1.13.1.tar.gz)
+  ExternalSource_Get("tensorflow" ${DOWNLOAD_TENSORFLOW} ${TENSORFLOW_URL})
+
+  set(TensorFlowSource_DIR ${tensorflow_SOURCE_DIR} PARENT_SCOPE)
+  set(TensorFlowSource_FOUND ${tensorflow_SOURCE_GET} PARENT_SCOPE)
+endfunction(_TensorFlowSource_import)
+
+_TensorFlowSource_import()
diff --git a/infra/nnfw/cmake/packages/TensorflowConfig.cmake b/infra/nnfw/cmake/packages/TensorflowConfig.cmake
new file mode 100644
index 000000000..5df000819
--- /dev/null
+++ b/infra/nnfw/cmake/packages/TensorflowConfig.cmake
@@ -0,0 +1,44 @@
+function(_Tensorflow_Import)
+  if(NOT DEFINED TENSORFLOW_DIR)
+    set(TENSORFLOW_DIR ${NNFW_EXTERNALS_DIR}/tensorflow)
+  endif(NOT DEFINED TENSORFLOW_DIR)
+
+  if(NOT DEFINED NSYNC_ARCH)
+    set(NSYNC_ARCH "default")
+  endif(NOT DEFINED NSYNC_ARCH)
+
+  set(TENSROFLOW_MAKEFILE_DIR "${TENSORFLOW_DIR}/tensorflow/makefile")
+  set(TENSORFLOW_GEN_DIR "${TENSROFLOW_MAKEFILE_DIR}/gen")
+  set(TENSORFLOW_DOWNLOADS_DIR "${TENSROFLOW_MAKEFILE_DIR}/downloads")
+
+  if(NOT EXISTS "${TENSORFLOW_GEN_DIR}/lib/libtensorflow-core.a")
+    set(Tensorflow_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif()
+
+  if(NOT EXISTS "${TENSORFLOW_DOWNLOADS_DIR}/nsync/builds/${NSYNC_ARCH}.linux.c++11/libnsync.a")
+    set(Tensorflow_FOUND FALSE PARENT_SCOPE)
+    return()
+  endif()
+
+  if(NOT TARGET tensorflow-core)
+    add_library(tensorflow-core INTERFACE)
+
+    target_include_directories(tensorflow-core INTERFACE "${TENSORFLOW_DIR}")
+    target_include_directories(tensorflow-core INTERFACE "${TENSORFLOW_GEN_DIR}/proto")
+    target_include_directories(tensorflow-core INTERFACE "${TENSORFLOW_GEN_DIR}/protobuf/include")
+    target_include_directories(tensorflow-core INTERFACE "${TENSORFLOW_DOWNLOADS_DIR}/eigen")
+    target_include_directories(tensorflow-core INTERFACE "${TENSORFLOW_DOWNLOADS_DIR}/nsync/public")
+
+    target_link_libraries(tensorflow-core INTERFACE -Wl,--whole-archive "${TENSORFLOW_GEN_DIR}/lib/libtensorflow-core.a" -Wl,--no-whole-archive)
+    target_link_libraries(tensorflow-core INTERFACE "${TENSORFLOW_GEN_DIR}/protobuf/lib/libprotobuf.a")
+    target_link_libraries(tensorflow-core INTERFACE "${TENSORFLOW_DOWNLOADS_DIR}/nsync/builds/${NSYNC_ARCH}.linux.c++11/libnsync.a")
+    target_link_libraries(tensorflow-core INTERFACE ${LIB_PTHREAD} dl)
+
+    message(STATUS "Found Tensorflow (lib: ${TENSORFLOW_GEN_DIR}/lib/libtensorflow-core.a")
+  endif()
+
+    set(Tensorflow_FOUND TRUE PARENT_SCOPE)
+endfunction(_Tensorflow_Import)
+
+_Tensorflow_Import()
diff --git a/infra/nnfw/command/build b/infra/nnfw/command/build
new file mode 100644
index 000000000..c9fe814c8
--- /dev/null
+++ b/infra/nnfw/command/build
@@ -0,0 +1,24 @@
+#!/bin/bash
+
+import "build.configuration"
+
+if [[ ! -d "${BUILD_ALIAS}" ]]; then
+  echo "'${BUILD_ALIAS}' does not exist. Please run 'configure' first"
+  exit 255
+fi
+
+# Set parallel build
+# TODO Use argument instead of environment variable
+HOST_OS=${HOST_OS:-linux}
+NPROCS=${NPROCS:-1}
+PARALLEL_BUILD=${PARALLEL_BUILD:-1}
+
+if [ "${PARALLEL_BUILD}" == "1" ]; then
+  # Get number of processors (linux only for now)
+  if [ "${HOST_OS}" == "linux" ]; then
+    NPROCS="$(grep -c ^processor /proc/cpuinfo)"
+  fi
+fi
+
+cd ${BUILD_ALIAS}
+make -j ${NPROCS} "$@"
diff --git a/infra/nnfw/command/configure b/infra/nnfw/command/configure
new file mode 100644
index 000000000..2f47dfedc
--- /dev/null
+++ b/infra/nnfw/command/configure
@@ -0,0 +1,12 @@
+#!/bin/bash
+
+import "build.configuration"
+
+BUILD_PATH="${NNFW_BUILD_DIR:-${BUILD_ALIAS}}"
+INSTALL_PATH="${NNFW_INSTALL_PREFIX:-${INSTALL_ALIAS}}"
+
+# Create "BUILD_PATH"
+mkdir -p "${BUILD_PATH}"
+
+cd "${BUILD_PATH}"
+cmake "${NNFW_PROJECT_PATH}"/infra/nnfw -DCMAKE_INSTALL_PREFIX="${INSTALL_PATH}" "$@"
diff --git a/infra/nnfw/command/copyright-check b/infra/nnfw/command/copyright-check
new file mode 100644
index 000000000..9401e69d3
--- /dev/null
+++ b/infra/nnfw/command/copyright-check
@@ -0,0 +1,55 @@
+#!/bin/bash
+
+INVALID_EXIT=0
+
+check_copyright_year() {
+    DIRECTORIES_NOT_TO_BE_TESTED=$2
+    YEAR=`date +"%Y"`
+    CORRECT_COPYRIGHT="Copyright (c) $YEAR Samsung Electronics Co"
+    FILE_EXT_TO_SEARCH="\.h$\|\.hpp$\|\.cc$\|\.cpp$\|\.cl$"
+
+    # Check newly added files
+    #this also includes files, that were moved here from another dir
+    NEW_FILES_OF_SUBDIR_TO_CHECK=$(git whatchanged --diff-filter=A --since "01/01/2019"\
+                                    --oneline --name-only --pretty=format: . | sort | uniq\
+                                    | grep $FILE_EXT_TO_SEARCH)
+    ARR=($NEW_FILES_OF_SUBDIR_TO_CHECK)
+    for s in ${DIRECTORIES_NOT_TO_BE_TESTED[@]}; do
+        if [[ $s = $TEST_DIR* ]]; then
+            skip=${s#$TEST_DIR/}/
+            ARR=(${ARR[*]//$skip*})
+        fi
+    done
+    NEW_FILES_OF_SUBDIR_TO_CHECK=${ARR[*]}
+    if [[ ${#NEW_FILES_OF_SUBDIR_TO_CHECK} -ne 0 ]]; then
+        for f in $NEW_FILES_OF_SUBDIR_TO_CHECK; do
+            [[ -f "$f" ]] || continue
+
+            CREATED_YEAR=$(git log --follow --format=%aD $f | tail -1)
+            [[ $CREATED_YEAR != *"$YEAR"* ]] && continue
+
+            COPYRIGHT_YEAR=$(sed -rn  '0,/.*Copyright \(c\) ([^ ]+).*/ s//\1/p' $f)
+            if [[ $COPYRIGHT_YEAR != $YEAR ]]; then
+                [[ -z "$COPYRIGHT_YEAR" ]] && COPYRIGHT_YEAR="None"
+                echo "Copyright year of $f is incorrect: expected $YEAR, found $COPYRIGHT_YEAR"
+                INVALID_EXIT=1
+            elif ! grep -q "$CORRECT_COPYRIGHT" $f; then
+                echo "Copyright format of $f is incorrect: expected $CORRECT_COPYRIGHT"
+                INVALID_EXIT=1
+            fi
+        done
+    fi
+}
+
+DIRECTORIES_NOT_TO_BE_TESTED=()
+
+for DIR_NOT_TO_BE_TESTED in $(find -name '.FORMATDENY' -exec dirname {} \;); do
+    DIRECTORIES_NOT_TO_BE_TESTED+=("$DIR_NOT_TO_BE_TESTED")
+done
+
+check_copyright_year $DIRECTORIES_NOT_TO_BE_TESTED
+
+if [[ $INVALID_EXIT -ne 0 ]]; then
+    echo "[FAILED] Invalid copyright check exit."
+    exit 1
+fi
diff --git a/infra/nnfw/command/docker-run b/infra/nnfw/command/docker-run
new file mode 100644
index 000000000..b523d61a3
--- /dev/null
+++ b/infra/nnfw/command/docker-run
@@ -0,0 +1,12 @@
+#!/bin/bash
+
+import "docker.configuration"
+
+docker run $DOCKER_RUN_OPTS $DOCKER_ENV_VARS $DOCKER_VOLUMES $DOCKER_IMAGE_NAME "$@"
+EXITCODE=$?
+
+docker_cleanup
+
+if [ $EXITCODE -ne 0 ]; then
+  exit $EXITCODE
+fi
diff --git a/infra/nnfw/command/docker-run-user b/infra/nnfw/command/docker-run-user
new file mode 100644
index 000000000..3b5a96142
--- /dev/null
+++ b/infra/nnfw/command/docker-run-user
@@ -0,0 +1,12 @@
+#!/bin/bash
+
+import "docker.configuration"
+
+DOCKER_RUN_OPTS+=" -u $(id -u):$(id -g)"
+
+docker run $DOCKER_RUN_OPTS $DOCKER_ENV_VARS $DOCKER_VOLUMES $DOCKER_IMAGE_NAME "$@"
+EXITCODE=$?
+
+if [ $EXITCODE -ne 0 ]; then
+  exit $EXITCODE
+fi
diff --git a/infra/nnfw/command/docker-shell b/infra/nnfw/command/docker-shell
new file mode 100644
index 000000000..1413a7ade
--- /dev/null
+++ b/infra/nnfw/command/docker-shell
@@ -0,0 +1,13 @@
+#!/bin/bash
+
+import "docker.configuration"
+
+DOCKER_RUN_OPTS+=" -it"
+docker run $DOCKER_RUN_OPTS $DOCKER_ENV_VARS $DOCKER_VOLUMES $DOCKER_IMAGE_NAME "/bin/bash"
+EXITCODE=$?
+
+docker_cleanup
+
+if [ $EXITCODE -ne 0 ]; then
+  exit $EXITCODE
+fi
diff --git a/infra/nnfw/command/doxygen b/infra/nnfw/command/doxygen
new file mode 100644
index 000000000..f455934e4
--- /dev/null
+++ b/infra/nnfw/command/doxygen
@@ -0,0 +1,7 @@
+#!/bin/bash
+
+pushd ${NNFW_PROJECT_PATH} > /dev/null
+
+doxygen infra/nnfw/doxygen/Doxyfile
+
+popd > /dev/null
diff --git a/infra/nnfw/command/gen-coverage-report b/infra/nnfw/command/gen-coverage-report
new file mode 100644
index 000000000..8fd398db3
--- /dev/null
+++ b/infra/nnfw/command/gen-coverage-report
@@ -0,0 +1,59 @@
+#!/bin/bash
+
+# This file is based on https://github.sec.samsung.net/STAR/nncc/pull/80
+
+LCOV_PATH=$(command -v lcov)
+GENHTML_PATH=$(command -v genhtml)
+
+SRC_PREFIX=${SRC_PREFIX:-${NNFW_PROJECT_PATH}}
+
+if [[ -z "${LCOV_PATH}" ]]; then
+  echo "ERROR: 'lcov' is not found"
+  exit 255
+fi
+
+if [[ -z "${GENHTML_PATH}" ]]; then
+  echo "ERROR: 'genhtml' is not found"
+  exit 255
+fi
+
+if [[ -z "${GCOV_PATH}" ]]; then
+  GCOV_PATH=$(command -v gcov)
+  if [[ -z "${GCOV_PATH}" ]]; then
+    echo "ERROR: 'gcov' is not found"
+    exit 255
+  fi
+fi
+
+OUTPUT_PATH="$1"
+
+if [[ -z "${OUTPUT_PATH}" ]]; then
+  OUTPUT_PATH="$NNFW_PROJECT_PATH/coverage"
+fi
+
+if [[ -e "${OUTPUT_PATH}" ]]; then
+  echo "ERROR: '${OUTPUT_PATH}' already exists"
+  exit 255
+fi
+
+mkdir -p "${OUTPUT_PATH}"
+
+RAW_COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.raw.info"
+LIBS_COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.libs.info"
+INCLUDE_COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.include.info"
+RUNTIMES_COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.runtimes.info"
+TOOLS_COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.tools.info"
+FINAL_COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.info"
+HTML_PATH="${OUTPUT_PATH}/html"
+COVERTURA_PATH="${OUTPUT_PATH}/nnfw_coverage.xml"
+
+"${LCOV_PATH}" -c -d "${NNFW_PROJECT_PATH}" --gcov-tool ${GCOV_PATH} -o "${RAW_COVERAGE_INFO_PATH}"
+#"${LCOV_PATH}" -e "${RAW_COVERAGE_INFO_PATH}" -o "${LIBS_COVERAGE_INFO_PATH}" "${SRC_PREFIX}/libs/*"
+#"${LCOV_PATH}" -e "${RAW_COVERAGE_INFO_PATH}" -o "${INCLUDE_COVERAGE_INFO_PATH}" "${SRC_PREFIX}/include/*"
+"${LCOV_PATH}" -e "${RAW_COVERAGE_INFO_PATH}" -o "${RUNTIMES_COVERAGE_INFO_PATH}" "${SRC_PREFIX}/runtimes/*"
+"${LCOV_PATH}" -e "${RAW_COVERAGE_INFO_PATH}" -o "${TOOLS_COVERAGE_INFO_PATH}" "${SRC_PREFIX}/tests/tools/*"
+#"${LCOV_PATH}" -a "${LIBS_COVERAGE_INFO_PATH}" -a "${INCLUDE_COVERAGE_INFO_PATH}" \
+#               -a "${RUNTIMES_COVERAGE_INFO_PATH}" -a "${TOOLS_COVERAGE_INFO_PATH}" \
+#               -o "${FINAL_COVERAGE_INFO_PATH}"
+"${LCOV_PATH}" -a "${RUNTIMES_COVERAGE_INFO_PATH}" -a "${TOOLS_COVERAGE_INFO_PATH}" -o "${FINAL_COVERAGE_INFO_PATH}"
+"${GENHTML_PATH}" "${FINAL_COVERAGE_INFO_PATH}" --output-directory "${HTML_PATH}" ${GENHTML_FLAG:-}
diff --git a/infra/nnfw/command/install b/infra/nnfw/command/install
new file mode 100644
index 000000000..2bacb876b
--- /dev/null
+++ b/infra/nnfw/command/install
@@ -0,0 +1,16 @@
+#!/bin/bash
+
+import "build.configuration"
+
+if [[ ! -d "${BUILD_ALIAS}" ]]; then
+  echo "'${BUILD_ALIAS}' does not exist. Please run 'configure' first"
+  exit 255
+fi
+
+if [[ ! -d "${INSTALL_ALIAS}" ]]; then
+  echo "'${INSTALL_ALIAS}' does not exist. Please run 'configure' first"
+  exit 255
+fi
+
+cd ${BUILD_ALIAS}
+make install
diff --git a/scripts/config/build.configuration b/infra/nnfw/config/build.configuration
index cdbf3bf4b..cdbf3bf4b 100644
--- a/scripts/config/build.configuration
+++ b/infra/nnfw/config/build.configuration
diff --git a/infra/nnfw/config/docker.configuration b/infra/nnfw/config/docker.configuration
new file mode 100644
index 000000000..b7e9ad30f
--- /dev/null
+++ b/infra/nnfw/config/docker.configuration
@@ -0,0 +1,44 @@
+#!/bin/bash
+
+DOCKER_IMAGE_NAME=${DOCKER_IMAGE_NAME:-nnas}
+echo "Using docker image ${DOCKER_IMAGE_NAME}"
+
+if [ -z "`docker images ${DOCKER_IMAGE_NAME}`" ]; then
+  echo "Need docker image!"
+  exit 1
+fi
+
+HOST_PATH="$NNFW_PROJECT_PATH"
+DOCKER_PATH="$NNFW_PROJECT_PATH"
+
+export GIT_SSL_NO_VERIFY=1
+
+DOCKER_VOLUMES+=" -v $HOST_PATH:$DOCKER_PATH"
+
+if [[ ! -z $ENV_FILE ]]; then
+  DOCKER_ENV_VARS+=" --env-file ${ENV_FILE} "
+fi
+
+DOCKER_ENV_VARS+=" -e http_proxy"
+DOCKER_ENV_VARS+=" -e no_proxy"
+DOCKER_ENV_VARS+=" -e GIT_SSL_NO_VERIFY"
+DOCKER_ENV_VARS+=" -e EXTERNAL_DOWNLOAD_SERVER"
+DOCKER_ENV_VARS+=" -e GENERATE_NNAPI_TESTS"
+
+DOCKER_RUN_OPTS="${DOCKER_OPTS}"
+DOCKER_RUN_OPTS+=" --rm"
+DOCKER_RUN_OPTS+=" -w $DOCKER_PATH"
+
+function docker_cleanup()
+{
+  # Newly created files during during docker run can have different ownership.
+  # This may cause some problems, for example, some jenkins slaves or developers
+  # can't remove built files due to lack of permission.
+  # To address this issue, let's change owner of all files
+  # in nncc to owner of nncc.
+  NNFW_OWNER_UID=$(stat -c "%u" $HOST_PATH)
+  NNFW_OWNER_GID=$(stat -c "%g" $HOST_PATH)
+
+  CMD="chown -R $NNFW_OWNER_UID:$NNFW_OWNER_GID $DOCKER_PATH"
+  docker run $DOCKER_RUN_OPTS $DOCKER_ENV_VARS $DOCKER_VOLUMES $DOCKER_IMAGE_NAME $CMD
+}
diff --git a/infra/nnfw/config/gbs.conf b/infra/nnfw/config/gbs.conf
new file mode 100644
index 000000000..515cadaba
--- /dev/null
+++ b/infra/nnfw/config/gbs.conf
@@ -0,0 +1,20 @@
+[general]
+#Current profile name which should match a profile section name
+profile = profile.tizen
+
+[profile.tizen]
+user=obs_viewer
+obs = obs.tizen
+repos = repo.tizen_base,repo.tizen_mobile
+buildroot = /home/GBS-ROOT/
+
+[obs.tizen]
+url = http://api.tizen.org
+
+[repo.tizen_mobile]
+url = http://download.tizen.org/snapshots/tizen/unified/latest/repos/standard/packages/
+
+[repo.tizen_base]
+url =  http://download.tizen.org/snapshots/tizen/base/latest/repos/standard/packages/
+
+
diff --git a/infra/nnfw/doxygen/Doxyfile b/infra/nnfw/doxygen/Doxyfile
new file mode 100644
index 000000000..c04a7bb0f
--- /dev/null
+++ b/infra/nnfw/doxygen/Doxyfile
@@ -0,0 +1,2502 @@
+# Doxyfile 1.8.13
+
+# This file describes the settings to be used by the documentation system
+# doxygen (www.doxygen.org) for a project.
+#
+# All text after a double hash (##) is considered a comment and is placed in
+# front of the TAG it is preceding.
+#
+# All text after a single hash (#) is considered a comment and will be ignored.
+# The format is:
+# TAG = value [value, ...]
+# For lists, items can also be appended using:
+# TAG += value [value, ...]
+# Values that contain spaces should be placed between quotes (\" \").
+
+#---------------------------------------------------------------------------
+# Project related configuration options
+#---------------------------------------------------------------------------
+
+# This tag specifies the encoding used for all characters in the config file
+# that follow. The default is UTF-8 which is also the encoding used for all text
+# before the first occurrence of this tag. Doxygen uses libiconv (or the iconv
+# built into libc) for the transcoding. See http://www.gnu.org/software/libiconv
+# for the list of possible encodings.
+# The default value is: UTF-8.
+
+DOXYFILE_ENCODING      = UTF-8
+
+# The PROJECT_NAME tag is a single word (or a sequence of words surrounded by
+# double-quotes, unless you are using Doxywizard) that should identify the
+# project for which the documentation is generated. This name is used in the
+# title of most generated pages and in a few other places.
+# The default value is: My Project.
+
+PROJECT_NAME           = nnfw
+
+# The PROJECT_NUMBER tag can be used to enter a project or revision number. This
+# could be handy for archiving the generated documentation or if some version
+# control system is used.
+
+PROJECT_NUMBER         =
+
+# Using the PROJECT_BRIEF tag one can provide an optional one line description
+# for a project that appears at the top of each page and should give viewer a
+# quick idea about the purpose of the project. Keep the description short.
+
+PROJECT_BRIEF          =
+
+# With the PROJECT_LOGO tag one can specify a logo or an icon that is included
+# in the documentation. The maximum height of the logo should not exceed 55
+# pixels and the maximum width should not exceed 200 pixels. Doxygen will copy
+# the logo to the output directory.
+
+PROJECT_LOGO           =
+
+# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) path
+# into which the generated documentation will be written. If a relative path is
+# entered, it will be relative to the location where doxygen was started. If
+# left blank the current directory will be used.
+
+OUTPUT_DIRECTORY       = docs/doxygen
+
+# If the CREATE_SUBDIRS tag is set to YES then doxygen will create 4096 sub-
+# directories (in 2 levels) under the output directory of each output format and
+# will distribute the generated files over these directories. Enabling this
+# option can be useful when feeding doxygen a huge amount of source files, where
+# putting all generated files in the same directory would otherwise causes
+# performance problems for the file system.
+# The default value is: NO.
+
+CREATE_SUBDIRS         = NO
+
+# If the ALLOW_UNICODE_NAMES tag is set to YES, doxygen will allow non-ASCII
+# characters to appear in the names of generated files. If set to NO, non-ASCII
+# characters will be escaped, for example _xE3_x81_x84 will be used for Unicode
+# U+3044.
+# The default value is: NO.
+
+ALLOW_UNICODE_NAMES    = NO
+
+# The OUTPUT_LANGUAGE tag is used to specify the language in which all
+# documentation generated by doxygen is written. Doxygen will use this
+# information to generate all constant output in the proper language.
+# Possible values are: Afrikaans, Arabic, Armenian, Brazilian, Catalan, Chinese,
+# Chinese-Traditional, Croatian, Czech, Danish, Dutch, English (United States),
+# Esperanto, Farsi (Persian), Finnish, French, German, Greek, Hungarian,
+# Indonesian, Italian, Japanese, Japanese-en (Japanese with English messages),
+# Korean, Korean-en (Korean with English messages), Latvian, Lithuanian,
+# Macedonian, Norwegian, Persian (Farsi), Polish, Portuguese, Romanian, Russian,
+# Serbian, Serbian-Cyrillic, Slovak, Slovene, Spanish, Swedish, Turkish,
+# Ukrainian and Vietnamese.
+# The default value is: English.
+
+OUTPUT_LANGUAGE        = English
+
+# If the BRIEF_MEMBER_DESC tag is set to YES, doxygen will include brief member
+# descriptions after the members that are listed in the file and class
+# documentation (similar to Javadoc). Set to NO to disable this.
+# The default value is: YES.
+
+BRIEF_MEMBER_DESC      = YES
+
+# If the REPEAT_BRIEF tag is set to YES, doxygen will prepend the brief
+# description of a member or function before the detailed description
+#
+# Note: If both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the
+# brief descriptions will be completely suppressed.
+# The default value is: YES.
+
+REPEAT_BRIEF           = YES
+
+# This tag implements a quasi-intelligent brief description abbreviator that is
+# used to form the text in various listings. Each string in this list, if found
+# as the leading text of the brief description, will be stripped from the text
+# and the result, after processing the whole list, is used as the annotated
+# text. Otherwise, the brief description is used as-is. If left blank, the
+# following values are used ($name is automatically replaced with the name of
+# the entity):The $name class, The $name widget, The $name file, is, provides,
+# specifies, contains, represents, a, an and the.
+
+ABBREVIATE_BRIEF       = "The $name class" \
+                         "The $name widget" \
+                         "The $name file" \
+                         is \
+                         provides \
+                         specifies \
+                         contains \
+                         represents \
+                         a \
+                         an \
+                         the
+
+# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then
+# doxygen will generate a detailed section even if there is only a brief
+# description.
+# The default value is: NO.
+
+ALWAYS_DETAILED_SEC    = NO
+
+# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all
+# inherited members of a class in the documentation of that class as if those
+# members were ordinary class members. Constructors, destructors and assignment
+# operators of the base classes will not be shown.
+# The default value is: NO.
+
+INLINE_INHERITED_MEMB  = NO
+
+# If the FULL_PATH_NAMES tag is set to YES, doxygen will prepend the full path
+# before files name in the file list and in the header files. If set to NO the
+# shortest path that makes the file name unique will be used
+# The default value is: YES.
+
+FULL_PATH_NAMES        = YES
+
+# The STRIP_FROM_PATH tag can be used to strip a user-defined part of the path.
+# Stripping is only done if one of the specified strings matches the left-hand
+# part of the path. The tag can be used to show relative paths in the file list.
+# If left blank the directory from which doxygen is run is used as the path to
+# strip.
+#
+# Note that you can specify absolute paths here, but also relative paths, which
+# will be relative from the directory where doxygen is started.
+# This tag requires that the tag FULL_PATH_NAMES is set to YES.
+
+STRIP_FROM_PATH        = ./
+
+# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of the
+# path mentioned in the documentation of a class, which tells the reader which
+# header file to include in order to use a class. If left blank only the name of
+# the header file containing the class definition is used. Otherwise one should
+# specify the list of include paths that are normally passed to the compiler
+# using the -I flag.
+
+STRIP_FROM_INC_PATH    =
+
+# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter (but
+# less readable) file names. This can be useful is your file systems doesn't
+# support long names like on DOS, Mac, or CD-ROM.
+# The default value is: NO.
+
+SHORT_NAMES            = NO
+
+# If the JAVADOC_AUTOBRIEF tag is set to YES then doxygen will interpret the
+# first line (until the first dot) of a Javadoc-style comment as the brief
+# description. If set to NO, the Javadoc-style will behave just like regular Qt-
+# style comments (thus requiring an explicit @brief command for a brief
+# description.)
+# The default value is: NO.
+
+JAVADOC_AUTOBRIEF      = NO
+
+# If the QT_AUTOBRIEF tag is set to YES then doxygen will interpret the first
+# line (until the first dot) of a Qt-style comment as the brief description. If
+# set to NO, the Qt-style will behave just like regular Qt-style comments (thus
+# requiring an explicit \brief command for a brief description.)
+# The default value is: NO.
+
+QT_AUTOBRIEF           = NO
+
+# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make doxygen treat a
+# multi-line C++ special comment block (i.e. a block of //! or /// comments) as
+# a brief description. This used to be the default behavior. The new default is
+# to treat a multi-line C++ comment block as a detailed description. Set this
+# tag to YES if you prefer the old behavior instead.
+#
+# Note that setting this tag to YES also means that rational rose comments are
+# not recognized any more.
+# The default value is: NO.
+
+MULTILINE_CPP_IS_BRIEF = NO
+
+# If the INHERIT_DOCS tag is set to YES then an undocumented member inherits the
+# documentation from any documented member that it re-implements.
+# The default value is: YES.
+
+INHERIT_DOCS           = YES
+
+# If the SEPARATE_MEMBER_PAGES tag is set to YES then doxygen will produce a new
+# page for each member. If set to NO, the documentation of a member will be part
+# of the file/class/namespace that contains it.
+# The default value is: NO.
+
+SEPARATE_MEMBER_PAGES  = NO
+
+# The TAB_SIZE tag can be used to set the number of spaces in a tab. Doxygen
+# uses this value to replace tabs by spaces in code fragments.
+# Minimum value: 1, maximum value: 16, default value: 4.
+
+TAB_SIZE               = 4
+
+# This tag can be used to specify a number of aliases that act as commands in
+# the documentation. An alias has the form:
+# name=value
+# For example adding
+# "sideeffect=@par Side Effects:\n"
+# will allow you to put the command \sideeffect (or @sideeffect) in the
+# documentation, which will result in a user-defined paragraph with heading
+# "Side Effects:". You can put \n's in the value part of an alias to insert
+# newlines.
+
+ALIASES                =
+
+# This tag can be used to specify a number of word-keyword mappings (TCL only).
+# A mapping has the form "name=value". For example adding "class=itcl::class"
+# will allow you to use the command class in the itcl::class meaning.
+
+TCL_SUBST              =
+
+# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources
+# only. Doxygen will then generate output that is more tailored for C. For
+# instance, some of the names that are used will be different. The list of all
+# members will be omitted, etc.
+# The default value is: NO.
+
+OPTIMIZE_OUTPUT_FOR_C  = NO
+
+# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java or
+# Python sources only. Doxygen will then generate output that is more tailored
+# for that language. For instance, namespaces will be presented as packages,
+# qualified scopes will look different, etc.
+# The default value is: NO.
+
+OPTIMIZE_OUTPUT_JAVA   = NO
+
+# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran
+# sources. Doxygen will then generate output that is tailored for Fortran.
+# The default value is: NO.
+
+OPTIMIZE_FOR_FORTRAN   = NO
+
+# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL
+# sources. Doxygen will then generate output that is tailored for VHDL.
+# The default value is: NO.
+
+OPTIMIZE_OUTPUT_VHDL   = NO
+
+# Doxygen selects the parser to use depending on the extension of the files it
+# parses. With this tag you can assign which parser to use for a given
+# extension. Doxygen has a built-in mapping, but you can override or extend it
+# using this tag. The format is ext=language, where ext is a file extension, and
+# language is one of the parsers supported by doxygen: IDL, Java, Javascript,
+# C#, C, C++, D, PHP, Objective-C, Python, Fortran (fixed format Fortran:
+# FortranFixed, free formatted Fortran: FortranFree, unknown formatted Fortran:
+# Fortran. In the later case the parser tries to guess whether the code is fixed
+# or free formatted code, this is the default for Fortran type files), VHDL. For
+# instance to make doxygen treat .inc files as Fortran files (default is PHP),
+# and .f files as C (default is Fortran), use: inc=Fortran f=C.
+#
+# Note: For files without extension you can use no_extension as a placeholder.
+#
+# Note that for custom extensions you also need to set FILE_PATTERNS otherwise
+# the files are not read by doxygen.
+
+EXTENSION_MAPPING      =
+
+# If the MARKDOWN_SUPPORT tag is enabled then doxygen pre-processes all comments
+# according to the Markdown format, which allows for more readable
+# documentation. See http://daringfireball.net/projects/markdown/ for details.
+# The output of markdown processing is further processed by doxygen, so you can
+# mix doxygen, HTML, and XML commands with Markdown formatting. Disable only in
+# case of backward compatibilities issues.
+# The default value is: YES.
+
+MARKDOWN_SUPPORT       = YES
+
+# When the TOC_INCLUDE_HEADINGS tag is set to a non-zero value, all headings up
+# to that level are automatically included in the table of contents, even if
+# they do not have an id attribute.
+# Note: This feature currently applies only to Markdown headings.
+# Minimum value: 0, maximum value: 99, default value: 0.
+# This tag requires that the tag MARKDOWN_SUPPORT is set to YES.
+
+TOC_INCLUDE_HEADINGS   = 0
+
+# When enabled doxygen tries to link words that correspond to documented
+# classes, or namespaces to their corresponding documentation. Such a link can
+# be prevented in individual cases by putting a % sign in front of the word or
+# globally by setting AUTOLINK_SUPPORT to NO.
+# The default value is: YES.
+
+AUTOLINK_SUPPORT       = YES
+
+# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want
+# to include (a tag file for) the STL sources as input, then you should set this
+# tag to YES in order to let doxygen match functions declarations and
+# definitions whose arguments contain STL classes (e.g. func(std::string);
+# versus func(std::string) {}). This also make the inheritance and collaboration
+# diagrams that involve STL classes more complete and accurate.
+# The default value is: NO.
+
+BUILTIN_STL_SUPPORT    = NO
+
+# If you use Microsoft's C++/CLI language, you should set this option to YES to
+# enable parsing support.
+# The default value is: NO.
+
+CPP_CLI_SUPPORT        = NO
+
+# Set the SIP_SUPPORT tag to YES if your project consists of sip (see:
+# http://www.riverbankcomputing.co.uk/software/sip/intro) sources only. Doxygen
+# will parse them like normal C++ but will assume all classes use public instead
+# of private inheritance when no explicit protection keyword is present.
+# The default value is: NO.
+
+SIP_SUPPORT            = NO
+
+# For Microsoft's IDL there are propget and propput attributes to indicate
+# getter and setter methods for a property. Setting this option to YES will make
+# doxygen to replace the get and set methods by a property in the documentation.
+# This will only work if the methods are indeed getting or setting a simple
+# type. If this is not the case, or you want to show the methods anyway, you
+# should set this option to NO.
+# The default value is: YES.
+
+IDL_PROPERTY_SUPPORT   = YES
+
+# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC
+# tag is set to YES then doxygen will reuse the documentation of the first
+# member in the group (if any) for the other members of the group. By default
+# all members of a group must be documented explicitly.
+# The default value is: NO.
+
+DISTRIBUTE_GROUP_DOC   = NO
+
+# If one adds a struct or class to a group and this option is enabled, then also
+# any nested class or struct is added to the same group. By default this option
+# is disabled and one has to add nested compounds explicitly via \ingroup.
+# The default value is: NO.
+
+GROUP_NESTED_COMPOUNDS = NO
+
+# Set the SUBGROUPING tag to YES to allow class member groups of the same type
+# (for instance a group of public functions) to be put as a subgroup of that
+# type (e.g. under the Public Functions section). Set it to NO to prevent
+# subgrouping. Alternatively, this can be done per class using the
+# \nosubgrouping command.
+# The default value is: YES.
+
+SUBGROUPING            = YES
+
+# When the INLINE_GROUPED_CLASSES tag is set to YES, classes, structs and unions
+# are shown inside the group in which they are included (e.g. using \ingroup)
+# instead of on a separate page (for HTML and Man pages) or section (for LaTeX
+# and RTF).
+#
+# Note that this feature does not work in combination with
+# SEPARATE_MEMBER_PAGES.
+# The default value is: NO.
+
+INLINE_GROUPED_CLASSES = NO
+
+# When the INLINE_SIMPLE_STRUCTS tag is set to YES, structs, classes, and unions
+# with only public data fields or simple typedef fields will be shown inline in
+# the documentation of the scope in which they are defined (i.e. file,
+# namespace, or group documentation), provided this scope is documented. If set
+# to NO, structs, classes, and unions are shown on a separate page (for HTML and
+# Man pages) or section (for LaTeX and RTF).
+# The default value is: NO.
+
+INLINE_SIMPLE_STRUCTS  = NO
+
+# When TYPEDEF_HIDES_STRUCT tag is enabled, a typedef of a struct, union, or
+# enum is documented as struct, union, or enum with the name of the typedef. So
+# typedef struct TypeS {} TypeT, will appear in the documentation as a struct
+# with name TypeT. When disabled the typedef will appear as a member of a file,
+# namespace, or class. And the struct will be named TypeS. This can typically be
+# useful for C code in case the coding convention dictates that all compound
+# types are typedef'ed and only the typedef is referenced, never the tag name.
+# The default value is: NO.
+
+TYPEDEF_HIDES_STRUCT   = NO
+
+# The size of the symbol lookup cache can be set using LOOKUP_CACHE_SIZE. This
+# cache is used to resolve symbols given their name and scope. Since this can be
+# an expensive process and often the same symbol appears multiple times in the
+# code, doxygen keeps a cache of pre-resolved symbols. If the cache is too small
+# doxygen will become slower. If the cache is too large, memory is wasted. The
+# cache size is given by this formula: 2^(16+LOOKUP_CACHE_SIZE). The valid range
+# is 0..9, the default is 0, corresponding to a cache size of 2^16=65536
+# symbols. At the end of a run doxygen will report the cache usage and suggest
+# the optimal cache size from a speed point of view.
+# Minimum value: 0, maximum value: 9, default value: 0.
+
+LOOKUP_CACHE_SIZE      = 2
+
+#---------------------------------------------------------------------------
+# Build related configuration options
+#---------------------------------------------------------------------------
+
+# If the EXTRACT_ALL tag is set to YES, doxygen will assume all entities in
+# documentation are documented, even if no documentation was available. Private
+# class members and static file members will be hidden unless the
+# EXTRACT_PRIVATE respectively EXTRACT_STATIC tags are set to YES.
+# Note: This will also disable the warnings about undocumented members that are
+# normally produced when WARNINGS is set to YES.
+# The default value is: NO.
+
+EXTRACT_ALL            = YES
+
+# If the EXTRACT_PRIVATE tag is set to YES, all private members of a class will
+# be included in the documentation.
+# The default value is: NO.
+
+EXTRACT_PRIVATE        = NO
+
+# If the EXTRACT_PACKAGE tag is set to YES, all members with package or internal
+# scope will be included in the documentation.
+# The default value is: NO.
+
+EXTRACT_PACKAGE        = NO
+
+# If the EXTRACT_STATIC tag is set to YES, all static members of a file will be
+# included in the documentation.
+# The default value is: NO.
+
+EXTRACT_STATIC         = NO
+
+# If the EXTRACT_LOCAL_CLASSES tag is set to YES, classes (and structs) defined
+# locally in source files will be included in the documentation. If set to NO,
+# only classes defined in header files are included. Does not have any effect
+# for Java sources.
+# The default value is: YES.
+
+EXTRACT_LOCAL_CLASSES  = YES
+
+# This flag is only useful for Objective-C code. If set to YES, local methods,
+# which are defined in the implementation section but not in the interface are
+# included in the documentation. If set to NO, only methods in the interface are
+# included.
+# The default value is: NO.
+
+EXTRACT_LOCAL_METHODS  = NO
+
+# If this flag is set to YES, the members of anonymous namespaces will be
+# extracted and appear in the documentation as a namespace called
+# 'anonymous_namespace{file}', where file will be replaced with the base name of
+# the file that contains the anonymous namespace. By default anonymous namespace
+# are hidden.
+# The default value is: NO.
+
+EXTRACT_ANON_NSPACES   = NO
+
+# If the HIDE_UNDOC_MEMBERS tag is set to YES, doxygen will hide all
+# undocumented members inside documented classes or files. If set to NO these
+# members will be included in the various overviews, but no documentation
+# section is generated. This option has no effect if EXTRACT_ALL is enabled.
+# The default value is: NO.
+
+HIDE_UNDOC_MEMBERS     = NO
+
+# If the HIDE_UNDOC_CLASSES tag is set to YES, doxygen will hide all
+# undocumented classes that are normally visible in the class hierarchy. If set
+# to NO, these classes will be included in the various overviews. This option
+# has no effect if EXTRACT_ALL is enabled.
+# The default value is: NO.
+
+HIDE_UNDOC_CLASSES     = NO
+
+# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, doxygen will hide all friend
+# (class|struct|union) declarations. If set to NO, these declarations will be
+# included in the documentation.
+# The default value is: NO.
+
+HIDE_FRIEND_COMPOUNDS  = NO
+
+# If the HIDE_IN_BODY_DOCS tag is set to YES, doxygen will hide any
+# documentation blocks found inside the body of a function. If set to NO, these
+# blocks will be appended to the function's detailed documentation block.
+# The default value is: NO.
+
+HIDE_IN_BODY_DOCS      = NO
+
+# The INTERNAL_DOCS tag determines if documentation that is typed after a
+# \internal command is included. If the tag is set to NO then the documentation
+# will be excluded. Set it to YES to include the internal documentation.
+# The default value is: NO.
+
+INTERNAL_DOCS          = NO
+
+# If the CASE_SENSE_NAMES tag is set to NO then doxygen will only generate file
+# names in lower-case letters. If set to YES, upper-case letters are also
+# allowed. This is useful if you have classes or files whose names only differ
+# in case and if your file system supports case sensitive file names. Windows
+# and Mac users are advised to set this option to NO.
+# The default value is: system dependent.
+
+CASE_SENSE_NAMES       = NO
+
+# If the HIDE_SCOPE_NAMES tag is set to NO then doxygen will show members with
+# their full class and namespace scopes in the documentation. If set to YES, the
+# scope will be hidden.
+# The default value is: NO.
+
+HIDE_SCOPE_NAMES       = NO
+
+# If the HIDE_COMPOUND_REFERENCE tag is set to NO (default) then doxygen will
+# append additional text to a page's title, such as Class Reference. If set to
+# YES the compound reference will be hidden.
+# The default value is: NO.
+
+HIDE_COMPOUND_REFERENCE= NO
+
+# If the SHOW_INCLUDE_FILES tag is set to YES then doxygen will put a list of
+# the files that are included by a file in the documentation of that file.
+# The default value is: YES.
+
+SHOW_INCLUDE_FILES     = YES
+
+# If the SHOW_GROUPED_MEMB_INC tag is set to YES then Doxygen will add for each
+# grouped member an include statement to the documentation, telling the reader
+# which file to include in order to use the member.
+# The default value is: NO.
+
+SHOW_GROUPED_MEMB_INC  = NO
+
+# If the FORCE_LOCAL_INCLUDES tag is set to YES then doxygen will list include
+# files with double quotes in the documentation rather than with sharp brackets.
+# The default value is: NO.
+
+FORCE_LOCAL_INCLUDES   = NO
+
+# If the INLINE_INFO tag is set to YES then a tag [inline] is inserted in the
+# documentation for inline members.
+# The default value is: YES.
+
+INLINE_INFO            = YES
+
+# If the SORT_MEMBER_DOCS tag is set to YES then doxygen will sort the
+# (detailed) documentation of file and class members alphabetically by member
+# name. If set to NO, the members will appear in declaration order.
+# The default value is: YES.
+
+SORT_MEMBER_DOCS       = YES
+
+# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the brief
+# descriptions of file, namespace and class members alphabetically by member
+# name. If set to NO, the members will appear in declaration order. Note that
+# this will also influence the order of the classes in the class list.
+# The default value is: NO.
+
+SORT_BRIEF_DOCS        = NO
+
+# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen will sort the
+# (brief and detailed) documentation of class members so that constructors and
+# destructors are listed first. If set to NO the constructors will appear in the
+# respective orders defined by SORT_BRIEF_DOCS and SORT_MEMBER_DOCS.
+# Note: If SORT_BRIEF_DOCS is set to NO this option is ignored for sorting brief
+# member documentation.
+# Note: If SORT_MEMBER_DOCS is set to NO this option is ignored for sorting
+# detailed member documentation.
+# The default value is: NO.
+
+SORT_MEMBERS_CTORS_1ST = NO
+
+# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the hierarchy
+# of group names into alphabetical order. If set to NO the group names will
+# appear in their defined order.
+# The default value is: NO.
+
+SORT_GROUP_NAMES       = NO
+
+# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be sorted by
+# fully-qualified names, including namespaces. If set to NO, the class list will
+# be sorted only by class name, not including the namespace part.
+# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES.
+# Note: This option applies only to the class list, not to the alphabetical
+# list.
+# The default value is: NO.
+
+SORT_BY_SCOPE_NAME     = NO
+
+# If the STRICT_PROTO_MATCHING option is enabled and doxygen fails to do proper
+# type resolution of all parameters of a function it will reject a match between
+# the prototype and the implementation of a member function even if there is
+# only one candidate or it is obvious which candidate to choose by doing a
+# simple string match. By disabling STRICT_PROTO_MATCHING doxygen will still
+# accept a match between prototype and implementation in such cases.
+# The default value is: NO.
+
+STRICT_PROTO_MATCHING  = NO
+
+# The GENERATE_TODOLIST tag can be used to enable (YES) or disable (NO) the todo
+# list. This list is created by putting \todo commands in the documentation.
+# The default value is: YES.
+
+GENERATE_TODOLIST      = YES
+
+# The GENERATE_TESTLIST tag can be used to enable (YES) or disable (NO) the test
+# list. This list is created by putting \test commands in the documentation.
+# The default value is: YES.
+
+GENERATE_TESTLIST      = YES
+
+# The GENERATE_BUGLIST tag can be used to enable (YES) or disable (NO) the bug
+# list. This list is created by putting \bug commands in the documentation.
+# The default value is: YES.
+
+GENERATE_BUGLIST       = YES
+
+# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or disable (NO)
+# the deprecated list. This list is created by putting \deprecated commands in
+# the documentation.
+# The default value is: YES.
+
+GENERATE_DEPRECATEDLIST= YES
+
+# The ENABLED_SECTIONS tag can be used to enable conditional documentation
+# sections, marked by \if <section_label> ... \endif and \cond <section_label>
+# ... \endcond blocks.
+
+ENABLED_SECTIONS       =
+
+# The MAX_INITIALIZER_LINES tag determines the maximum number of lines that the
+# initial value of a variable or macro / define can have for it to appear in the
+# documentation. If the initializer consists of more lines than specified here
+# it will be hidden. Use a value of 0 to hide initializers completely. The
+# appearance of the value of individual variables and macros / defines can be
+# controlled using \showinitializer or \hideinitializer command in the
+# documentation regardless of this setting.
+# Minimum value: 0, maximum value: 10000, default value: 30.
+
+MAX_INITIALIZER_LINES  = 30
+
+# Set the SHOW_USED_FILES tag to NO to disable the list of files generated at
+# the bottom of the documentation of classes and structs. If set to YES, the
+# list will mention the files that were used to generate the documentation.
+# The default value is: YES.
+
+SHOW_USED_FILES        = YES
+
+# Set the SHOW_FILES tag to NO to disable the generation of the Files page. This
+# will remove the Files entry from the Quick Index and from the Folder Tree View
+# (if specified).
+# The default value is: YES.
+
+SHOW_FILES             = YES
+
+# Set the SHOW_NAMESPACES tag to NO to disable the generation of the Namespaces
+# page. This will remove the Namespaces entry from the Quick Index and from the
+# Folder Tree View (if specified).
+# The default value is: YES.
+
+SHOW_NAMESPACES        = YES
+
+# The FILE_VERSION_FILTER tag can be used to specify a program or script that
+# doxygen should invoke to get the current version for each file (typically from
+# the version control system). Doxygen will invoke the program by executing (via
+# popen()) the command command input-file, where command is the value of the
+# FILE_VERSION_FILTER tag, and input-file is the name of an input file provided
+# by doxygen. Whatever the program writes to standard output is used as the file
+# version. For an example see the documentation.
+
+FILE_VERSION_FILTER    =
+
+# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed
+# by doxygen. The layout file controls the global structure of the generated
+# output files in an output format independent way. To create the layout file
+# that represents doxygen's defaults, run doxygen with the -l option. You can
+# optionally specify a file name after the option, if omitted DoxygenLayout.xml
+# will be used as the name of the layout file.
+#
+# Note that if you run doxygen from a directory containing a file called
+# DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE
+# tag is left empty.
+
+LAYOUT_FILE            =
+
+# The CITE_BIB_FILES tag can be used to specify one or more bib files containing
+# the reference definitions. This must be a list of .bib files. The .bib
+# extension is automatically appended if omitted. This requires the bibtex tool
+# to be installed. See also http://en.wikipedia.org/wiki/BibTeX for more info.
+# For LaTeX the style of the bibliography can be controlled using
+# LATEX_BIB_STYLE. To use this feature you need bibtex and perl available in the
+# search path. See also \cite for info how to create references.
+
+CITE_BIB_FILES         =
+
+#---------------------------------------------------------------------------
+# Configuration options related to warning and progress messages
+#---------------------------------------------------------------------------
+
+# The QUIET tag can be used to turn on/off the messages that are generated to
+# standard output by doxygen. If QUIET is set to YES this implies that the
+# messages are off.
+# The default value is: NO.
+
+QUIET                  = NO
+
+# The WARNINGS tag can be used to turn on/off the warning messages that are
+# generated to standard error (stderr) by doxygen. If WARNINGS is set to YES
+# this implies that the warnings are on.
+#
+# Tip: Turn warnings on while writing the documentation.
+# The default value is: YES.
+
+WARNINGS               = YES
+
+# If the WARN_IF_UNDOCUMENTED tag is set to YES then doxygen will generate
+# warnings for undocumented members. If EXTRACT_ALL is set to YES then this flag
+# will automatically be disabled.
+# The default value is: YES.
+
+WARN_IF_UNDOCUMENTED   = YES
+
+# If the WARN_IF_DOC_ERROR tag is set to YES, doxygen will generate warnings for
+# potential errors in the documentation, such as not documenting some parameters
+# in a documented function, or documenting parameters that don't exist or using
+# markup commands wrongly.
+# The default value is: YES.
+
+WARN_IF_DOC_ERROR      = YES
+
+# This WARN_NO_PARAMDOC option can be enabled to get warnings for functions that
+# are documented, but have no documentation for their parameters or return
+# value. If set to NO, doxygen will only warn about wrong or incomplete
+# parameter documentation, but not about the absence of documentation.
+# The default value is: NO.
+
+WARN_NO_PARAMDOC       = NO
+
+# If the WARN_AS_ERROR tag is set to YES then doxygen will immediately stop when
+# a warning is encountered.
+# The default value is: NO.
+
+WARN_AS_ERROR          = NO
+
+# The WARN_FORMAT tag determines the format of the warning messages that doxygen
+# can produce. The string should contain the $file, $line, and $text tags, which
+# will be replaced by the file and line number from which the warning originated
+# and the warning text. Optionally the format may contain $version, which will
+# be replaced by the version of the file (if it could be obtained via
+# FILE_VERSION_FILTER)
+# The default value is: $file:$line: $text.
+
+WARN_FORMAT            = "$file:$line: $text"
+
+# The WARN_LOGFILE tag can be used to specify a file to which warning and error
+# messages should be written. If left blank the output is written to standard
+# error (stderr).
+
+WARN_LOGFILE           =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the input files
+#---------------------------------------------------------------------------
+
+# The INPUT tag is used to specify the files and/or directories that contain
+# documented source files. You may enter file names like myfile.cpp or
+# directories like /usr/src/myproject. Separate the files or directories with
+# spaces. See also FILE_PATTERNS and EXTENSION_MAPPING
+# Note: If this tag is empty the current directory is searched.
+
+INPUT                  =
+
+# This tag can be used to specify the character encoding of the source files
+# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses
+# libiconv (or the iconv built into libc) for the transcoding. See the libiconv
+# documentation (see: http://www.gnu.org/software/libiconv) for the list of
+# possible encodings.
+# The default value is: UTF-8.
+
+INPUT_ENCODING         = UTF-8
+
+# If the value of the INPUT tag contains directories, you can use the
+# FILE_PATTERNS tag to specify one or more wildcard patterns (like *.cpp and
+# *.h) to filter out the source-files in the directories.
+#
+# Note that for custom extensions or not directly supported extensions you also
+# need to set EXTENSION_MAPPING for the extension otherwise the files are not
+# read by doxygen.
+#
+# If left blank the following patterns are tested:*.c, *.cc, *.cxx, *.cpp,
+# *.c++, *.java, *.ii, *.ixx, *.ipp, *.i++, *.inl, *.idl, *.ddl, *.odl, *.h,
+# *.hh, *.hxx, *.hpp, *.h++, *.cs, *.d, *.php, *.php4, *.php5, *.phtml, *.inc,
+# *.m, *.markdown, *.md, *.mm, *.dox, *.py, *.pyw, *.f90, *.f95, *.f03, *.f08,
+# *.f, *.for, *.tcl, *.vhd, *.vhdl, *.ucf and *.qsf.
+
+FILE_PATTERNS          = *.c \
+                         *.cc \
+                         *.cxx \
+                         *.cpp \
+                         *.c++ \
+                         *.java \
+                         *.ii \
+                         *.ixx \
+                         *.ipp \
+                         *.i++ \
+                         *.inl \
+                         *.idl \
+                         *.ddl \
+                         *.odl \
+                         *.h \
+                         *.hh \
+                         *.hxx \
+                         *.hpp \
+                         *.h++ \
+                         *.cs \
+                         *.d \
+                         *.php \
+                         *.php4 \
+                         *.php5 \
+                         *.phtml \
+                         *.inc \
+                         *.m \
+                         *.markdown \
+                         *.md \
+                         *.mm \
+                         *.dox \
+                         *.py \
+                         *.pyw \
+                         *.f90 \
+                         *.f95 \
+                         *.f03 \
+                         *.f08 \
+                         *.f \
+                         *.for \
+                         *.tcl \
+                         *.vhd \
+                         *.vhdl \
+                         *.ucf \
+                         *.qsf
+
+# The RECURSIVE tag can be used to specify whether or not subdirectories should
+# be searched for input files as well.
+# The default value is: NO.
+
+RECURSIVE              = YES
+
+# The EXCLUDE tag can be used to specify files and/or directories that should be
+# excluded from the INPUT source files. This way you can easily exclude a
+# subdirectory from a directory tree whose root is specified with the INPUT tag.
+#
+# Note that relative paths are relative to the directory from which doxygen is
+# run.
+
+EXCLUDE                = Product/ \
+                         report/ \
+                         runtimes/contrib/ \
+                         docs/doxygen/html/ \
+                         externals/ \
+                         packaging/ \
+                         runtimes/pure_arm_compute/ \
+                         tests/framework/ \
+                         tests/nnapi/src/generated/ \
+                         tests/nnapi/specs/ \
+                         tools/
+
+# The EXCLUDE_SYMLINKS tag can be used to select whether or not files or
+# directories that are symbolic links (a Unix file system feature) are excluded
+# from the input.
+# The default value is: NO.
+
+EXCLUDE_SYMLINKS       = NO
+
+# If the value of the INPUT tag contains directories, you can use the
+# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude
+# certain files from those directories.
+#
+# Note that the wildcards are matched against the file with absolute path, so to
+# exclude all test directories for example use the pattern */test/*
+
+EXCLUDE_PATTERNS       =
+
+# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names
+# (namespaces, classes, functions, etc.) that should be excluded from the
+# output. The symbol name can be a fully qualified name, a word, or if the
+# wildcard * is used, a substring. Examples: ANamespace, AClass,
+# AClass::ANamespace, ANamespace::*Test
+#
+# Note that the wildcards are matched against the file with absolute path, so to
+# exclude all test directories use the pattern */test/*
+
+EXCLUDE_SYMBOLS        =
+
+# The EXAMPLE_PATH tag can be used to specify one or more files or directories
+# that contain example code fragments that are included (see the \include
+# command).
+
+EXAMPLE_PATH           =
+
+# If the value of the EXAMPLE_PATH tag contains directories, you can use the
+# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and
+# *.h) to filter out the source-files in the directories. If left blank all
+# files are included.
+
+EXAMPLE_PATTERNS       = *
+
+# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be
+# searched for input files to be used with the \include or \dontinclude commands
+# irrespective of the value of the RECURSIVE tag.
+# The default value is: NO.
+
+EXAMPLE_RECURSIVE      = NO
+
+# The IMAGE_PATH tag can be used to specify one or more files or directories
+# that contain images that are to be included in the documentation (see the
+# \image command).
+
+IMAGE_PATH             =
+
+# The INPUT_FILTER tag can be used to specify a program that doxygen should
+# invoke to filter for each input file. Doxygen will invoke the filter program
+# by executing (via popen()) the command:
+#
+# <filter> <input-file>
+#
+# where <filter> is the value of the INPUT_FILTER tag, and <input-file> is the
+# name of an input file. Doxygen will then use the output that the filter
+# program writes to standard output. If FILTER_PATTERNS is specified, this tag
+# will be ignored.
+#
+# Note that the filter must not add or remove lines; it is applied before the
+# code is scanned, but not when the output code is generated. If lines are added
+# or removed, the anchors will not be placed correctly.
+#
+# Note that for custom extensions or not directly supported extensions you also
+# need to set EXTENSION_MAPPING for the extension otherwise the files are not
+# properly processed by doxygen.
+
+INPUT_FILTER           =
+
+# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern
+# basis. Doxygen will compare the file name with each pattern and apply the
+# filter if there is a match. The filters are a list of the form: pattern=filter
+# (like *.cpp=my_cpp_filter). See INPUT_FILTER for further information on how
+# filters are used. If the FILTER_PATTERNS tag is empty or if none of the
+# patterns match the file name, INPUT_FILTER is applied.
+#
+# Note that for custom extensions or not directly supported extensions you also
+# need to set EXTENSION_MAPPING for the extension otherwise the files are not
+# properly processed by doxygen.
+
+FILTER_PATTERNS        =
+
+# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using
+# INPUT_FILTER) will also be used to filter the input files that are used for
+# producing the source files to browse (i.e. when SOURCE_BROWSER is set to YES).
+# The default value is: NO.
+
+FILTER_SOURCE_FILES    = NO
+
+# The FILTER_SOURCE_PATTERNS tag can be used to specify source filters per file
+# pattern. A pattern will override the setting for FILTER_PATTERN (if any) and
+# it is also possible to disable source filtering for a specific pattern using
+# *.ext= (so without naming a filter).
+# This tag requires that the tag FILTER_SOURCE_FILES is set to YES.
+
+FILTER_SOURCE_PATTERNS =
+
+# If the USE_MDFILE_AS_MAINPAGE tag refers to the name of a markdown file that
+# is part of the input, its contents will be placed on the main page
+# (index.html). This can be useful if you have a project on for instance GitHub
+# and want to reuse the introduction page also for the doxygen output.
+
+USE_MDFILE_AS_MAINPAGE = docs/nnfw/roadmap.md
+
+#---------------------------------------------------------------------------
+# Configuration options related to source browsing
+#---------------------------------------------------------------------------
+
+# If the SOURCE_BROWSER tag is set to YES then a list of source files will be
+# generated. Documented entities will be cross-referenced with these sources.
+#
+# Note: To get rid of all source code in the generated output, make sure that
+# also VERBATIM_HEADERS is set to NO.
+# The default value is: NO.
+
+SOURCE_BROWSER         = YES
+
+# Setting the INLINE_SOURCES tag to YES will include the body of functions,
+# classes and enums directly into the documentation.
+# The default value is: NO.
+
+INLINE_SOURCES         = NO
+
+# Setting the STRIP_CODE_COMMENTS tag to YES will instruct doxygen to hide any
+# special comment blocks from generated source code fragments. Normal C, C++ and
+# Fortran comments will always remain visible.
+# The default value is: YES.
+
+STRIP_CODE_COMMENTS    = YES
+
+# If the REFERENCED_BY_RELATION tag is set to YES then for each documented
+# function all documented functions referencing it will be listed.
+# The default value is: NO.
+
+REFERENCED_BY_RELATION = NO
+
+# If the REFERENCES_RELATION tag is set to YES then for each documented function
+# all documented entities called/used by that function will be listed.
+# The default value is: NO.
+
+REFERENCES_RELATION    = NO
+
+# If the REFERENCES_LINK_SOURCE tag is set to YES and SOURCE_BROWSER tag is set
+# to YES then the hyperlinks from functions in REFERENCES_RELATION and
+# REFERENCED_BY_RELATION lists will link to the source code. Otherwise they will
+# link to the documentation.
+# The default value is: YES.
+
+REFERENCES_LINK_SOURCE = YES
+
+# If SOURCE_TOOLTIPS is enabled (the default) then hovering a hyperlink in the
+# source code will show a tooltip with additional information such as prototype,
+# brief description and links to the definition and documentation. Since this
+# will make the HTML file larger and loading of large files a bit slower, you
+# can opt to disable this feature.
+# The default value is: YES.
+# This tag requires that the tag SOURCE_BROWSER is set to YES.
+
+SOURCE_TOOLTIPS        = YES
+
+# If the USE_HTAGS tag is set to YES then the references to source code will
+# point to the HTML generated by the htags(1) tool instead of doxygen built-in
+# source browser. The htags tool is part of GNU's global source tagging system
+# (see http://www.gnu.org/software/global/global.html). You will need version
+# 4.8.6 or higher.
+#
+# To use it do the following:
+# - Install the latest version of global
+# - Enable SOURCE_BROWSER and USE_HTAGS in the config file
+# - Make sure the INPUT points to the root of the source tree
+# - Run doxygen as normal
+#
+# Doxygen will invoke htags (and that will in turn invoke gtags), so these
+# tools must be available from the command line (i.e. in the search path).
+#
+# The result: instead of the source browser generated by doxygen, the links to
+# source code will now point to the output of htags.
+# The default value is: NO.
+# This tag requires that the tag SOURCE_BROWSER is set to YES.
+
+USE_HTAGS              = NO
+
+# If the VERBATIM_HEADERS tag is set the YES then doxygen will generate a
+# verbatim copy of the header file for each class for which an include is
+# specified. Set to NO to disable this.
+# See also: Section \class.
+# The default value is: YES.
+
+VERBATIM_HEADERS       = YES
+
+# If the CLANG_ASSISTED_PARSING tag is set to YES then doxygen will use the
+# clang parser (see: http://clang.llvm.org/) for more accurate parsing at the
+# cost of reduced performance. This can be particularly helpful with template
+# rich C++ code for which doxygen's built-in parser lacks the necessary type
+# information.
+# Note: The availability of this option depends on whether or not doxygen was
+# generated with the -Duse-libclang=ON option for CMake.
+# The default value is: NO.
+
+CLANG_ASSISTED_PARSING = NO
+
+# If clang assisted parsing is enabled you can provide the compiler with command
+# line options that you would normally use when invoking the compiler. Note that
+# the include paths will already be set by doxygen for the files and directories
+# specified with INPUT and INCLUDE_PATH.
+# This tag requires that the tag CLANG_ASSISTED_PARSING is set to YES.
+
+CLANG_OPTIONS          =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the alphabetical class index
+#---------------------------------------------------------------------------
+
+# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index of all
+# compounds will be generated. Enable this if the project contains a lot of
+# classes, structs, unions or interfaces.
+# The default value is: YES.
+
+ALPHABETICAL_INDEX     = YES
+
+# The COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns in
+# which the alphabetical index list will be split.
+# Minimum value: 1, maximum value: 20, default value: 5.
+# This tag requires that the tag ALPHABETICAL_INDEX is set to YES.
+
+COLS_IN_ALPHA_INDEX    = 5
+
+# In case all classes in a project start with a common prefix, all classes will
+# be put under the same header in the alphabetical index. The IGNORE_PREFIX tag
+# can be used to specify a prefix (or a list of prefixes) that should be ignored
+# while generating the index headers.
+# This tag requires that the tag ALPHABETICAL_INDEX is set to YES.
+
+IGNORE_PREFIX          =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the HTML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_HTML tag is set to YES, doxygen will generate HTML output
+# The default value is: YES.
+
+GENERATE_HTML          = YES
+
+# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: html.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_OUTPUT            = html
+
+# The HTML_FILE_EXTENSION tag can be used to specify the file extension for each
+# generated HTML page (for example: .htm, .php, .asp).
+# The default value is: .html.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_FILE_EXTENSION    = .html
+
+# The HTML_HEADER tag can be used to specify a user-defined HTML header file for
+# each generated HTML page. If the tag is left blank doxygen will generate a
+# standard header.
+#
+# To get valid HTML the header file that includes any scripts and style sheets
+# that doxygen needs, which is dependent on the configuration options used (e.g.
+# the setting GENERATE_TREEVIEW). It is highly recommended to start with a
+# default header using
+# doxygen -w html new_header.html new_footer.html new_stylesheet.css
+# YourConfigFile
+# and then modify the file new_header.html. See also section "Doxygen usage"
+# for information on how to generate the default header that doxygen normally
+# uses.
+# Note: The header is subject to change so you typically have to regenerate the
+# default header when upgrading to a newer version of doxygen. For a description
+# of the possible markers and block names see the documentation.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_HEADER            =
+
+# The HTML_FOOTER tag can be used to specify a user-defined HTML footer for each
+# generated HTML page. If the tag is left blank doxygen will generate a standard
+# footer. See HTML_HEADER for more information on how to generate a default
+# footer and what special commands can be used inside the footer. See also
+# section "Doxygen usage" for information on how to generate the default footer
+# that doxygen normally uses.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_FOOTER            =
+
+# The HTML_STYLESHEET tag can be used to specify a user-defined cascading style
+# sheet that is used by each HTML page. It can be used to fine-tune the look of
+# the HTML output. If left blank doxygen will generate a default style sheet.
+# See also section "Doxygen usage" for information on how to generate the style
+# sheet that doxygen normally uses.
+# Note: It is recommended to use HTML_EXTRA_STYLESHEET instead of this tag, as
+# it is more robust and this tag (HTML_STYLESHEET) will in the future become
+# obsolete.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_STYLESHEET        =
+
+# The HTML_EXTRA_STYLESHEET tag can be used to specify additional user-defined
+# cascading style sheets that are included after the standard style sheets
+# created by doxygen. Using this option one can overrule certain style aspects.
+# This is preferred over using HTML_STYLESHEET since it does not replace the
+# standard style sheet and is therefore more robust against future updates.
+# Doxygen will copy the style sheet files to the output directory.
+# Note: The order of the extra style sheet files is of importance (e.g. the last
+# style sheet in the list overrules the setting of the previous ones in the
+# list). For an example see the documentation.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_EXTRA_STYLESHEET  =
+
+# The HTML_EXTRA_FILES tag can be used to specify one or more extra images or
+# other source files which should be copied to the HTML output directory. Note
+# that these files will be copied to the base HTML output directory. Use the
+# $relpath^ marker in the HTML_HEADER and/or HTML_FOOTER files to load these
+# files. In the HTML_STYLESHEET file, use the file name only. Also note that the
+# files will be copied as-is; there are no commands or markers available.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_EXTRA_FILES       =
+
+# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. Doxygen
+# will adjust the colors in the style sheet and background images according to
+# this color. Hue is specified as an angle on a colorwheel, see
+# http://en.wikipedia.org/wiki/Hue for more information. For instance the value
+# 0 represents red, 60 is yellow, 120 is green, 180 is cyan, 240 is blue, 300
+# purple, and 360 is red again.
+# Minimum value: 0, maximum value: 359, default value: 220.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_COLORSTYLE_HUE    = 220
+
+# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of the colors
+# in the HTML output. For a value of 0 the output will use grayscales only. A
+# value of 255 will produce the most vivid colors.
+# Minimum value: 0, maximum value: 255, default value: 100.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_COLORSTYLE_SAT    = 100
+
+# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to the
+# luminance component of the colors in the HTML output. Values below 100
+# gradually make the output lighter, whereas values above 100 make the output
+# darker. The value divided by 100 is the actual gamma applied, so 80 represents
+# a gamma of 0.8, The value 220 represents a gamma of 2.2, and 100 does not
+# change the gamma.
+# Minimum value: 40, maximum value: 240, default value: 80.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_COLORSTYLE_GAMMA  = 80
+
+# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML
+# page will contain the date and time when the page was generated. Setting this
+# to YES can help to show when doxygen was last run and thus if the
+# documentation is up to date.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_TIMESTAMP         = NO
+
+# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML
+# documentation will contain sections that can be hidden and shown after the
+# page has loaded.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_DYNAMIC_SECTIONS  = NO
+
+# With HTML_INDEX_NUM_ENTRIES one can control the preferred number of entries
+# shown in the various tree structured indices initially; the user can expand
+# and collapse entries dynamically later on. Doxygen will expand the tree to
+# such a level that at most the specified number of entries are visible (unless
+# a fully collapsed tree already exceeds this amount). So setting the number of
+# entries 1 will produce a full collapsed tree by default. 0 is a special value
+# representing an infinite number of entries and will result in a full expanded
+# tree by default.
+# Minimum value: 0, maximum value: 9999, default value: 100.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_INDEX_NUM_ENTRIES = 100
+
+# If the GENERATE_DOCSET tag is set to YES, additional index files will be
+# generated that can be used as input for Apple's Xcode 3 integrated development
+# environment (see: http://developer.apple.com/tools/xcode/), introduced with
+# OSX 10.5 (Leopard). To create a documentation set, doxygen will generate a
+# Makefile in the HTML output directory. Running make will produce the docset in
+# that directory and running make install will install the docset in
+# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find it at
+# startup. See http://developer.apple.com/tools/creatingdocsetswithdoxygen.html
+# for more information.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_DOCSET        = NO
+
+# This tag determines the name of the docset feed. A documentation feed provides
+# an umbrella under which multiple documentation sets from a single provider
+# (such as a company or product suite) can be grouped.
+# The default value is: Doxygen generated docs.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_FEEDNAME        = "Doxygen generated docs"
+
+# This tag specifies a string that should uniquely identify the documentation
+# set bundle. This should be a reverse domain-name style string, e.g.
+# com.mycompany.MyDocSet. Doxygen will append .docset to the name.
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_BUNDLE_ID       = org.doxygen.Project
+
+# The DOCSET_PUBLISHER_ID tag specifies a string that should uniquely identify
+# the documentation publisher. This should be a reverse domain-name style
+# string, e.g. com.mycompany.MyDocSet.documentation.
+# The default value is: org.doxygen.Publisher.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_PUBLISHER_ID    = org.doxygen.Publisher
+
+# The DOCSET_PUBLISHER_NAME tag identifies the documentation publisher.
+# The default value is: Publisher.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_PUBLISHER_NAME  = Publisher
+
+# If the GENERATE_HTMLHELP tag is set to YES then doxygen generates three
+# additional HTML index files: index.hhp, index.hhc, and index.hhk. The
+# index.hhp is a project file that can be read by Microsoft's HTML Help Workshop
+# (see: http://www.microsoft.com/en-us/download/details.aspx?id=21138) on
+# Windows.
+#
+# The HTML Help Workshop contains a compiler that can convert all HTML output
+# generated by doxygen into a single compiled HTML file (.chm). Compiled HTML
+# files are now used as the Windows 98 help format, and will replace the old
+# Windows help format (.hlp) on all Windows platforms in the future. Compressed
+# HTML files also contain an index, a table of contents, and you can search for
+# words in the documentation. The HTML workshop also contains a viewer for
+# compressed HTML files.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_HTMLHELP      = NO
+
+# The CHM_FILE tag can be used to specify the file name of the resulting .chm
+# file. You can add a path in front of the file if the result should not be
+# written to the html output directory.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+CHM_FILE               =
+
+# The HHC_LOCATION tag can be used to specify the location (absolute path
+# including file name) of the HTML help compiler (hhc.exe). If non-empty,
+# doxygen will try to run the HTML help compiler on the generated index.hhp.
+# The file has to be specified with full path.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+HHC_LOCATION           =
+
+# The GENERATE_CHI flag controls if a separate .chi index file is generated
+# (YES) or that it should be included in the master .chm file (NO).
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+GENERATE_CHI           = NO
+
+# The CHM_INDEX_ENCODING is used to encode HtmlHelp index (hhk), content (hhc)
+# and project file content.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+CHM_INDEX_ENCODING     =
+
+# The BINARY_TOC flag controls whether a binary table of contents is generated
+# (YES) or a normal table of contents (NO) in the .chm file. Furthermore it
+# enables the Previous and Next buttons.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+BINARY_TOC             = NO
+
+# The TOC_EXPAND flag can be set to YES to add extra items for group members to
+# the table of contents of the HTML help documentation and to the tree view.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTMLHELP is set to YES.
+
+TOC_EXPAND             = NO
+
+# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and
+# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated that
+# can be used as input for Qt's qhelpgenerator to generate a Qt Compressed Help
+# (.qch) of the generated HTML documentation.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_QHP           = NO
+
+# If the QHG_LOCATION tag is specified, the QCH_FILE tag can be used to specify
+# the file name of the resulting .qch file. The path specified is relative to
+# the HTML output folder.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QCH_FILE               =
+
+# The QHP_NAMESPACE tag specifies the namespace to use when generating Qt Help
+# Project output. For more information please see Qt Help Project / Namespace
+# (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#namespace).
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_NAMESPACE          = org.doxygen.Project
+
+# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating Qt
+# Help Project output. For more information please see Qt Help Project / Virtual
+# Folders (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#virtual-
+# folders).
+# The default value is: doc.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_VIRTUAL_FOLDER     = doc
+
+# If the QHP_CUST_FILTER_NAME tag is set, it specifies the name of a custom
+# filter to add. For more information please see Qt Help Project / Custom
+# Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom-
+# filters).
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_CUST_FILTER_NAME   =
+
+# The QHP_CUST_FILTER_ATTRS tag specifies the list of the attributes of the
+# custom filter to add. For more information please see Qt Help Project / Custom
+# Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom-
+# filters).
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_CUST_FILTER_ATTRS  =
+
+# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this
+# project's filter section matches. Qt Help Project / Filter Attributes (see:
+# http://qt-project.org/doc/qt-4.8/qthelpproject.html#filter-attributes).
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHP_SECT_FILTER_ATTRS  =
+
+# The QHG_LOCATION tag can be used to specify the location of Qt's
+# qhelpgenerator. If non-empty doxygen will try to run qhelpgenerator on the
+# generated .qhp file.
+# This tag requires that the tag GENERATE_QHP is set to YES.
+
+QHG_LOCATION           =
+
+# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files will be
+# generated, together with the HTML files, they form an Eclipse help plugin. To
+# install this plugin and make it available under the help contents menu in
+# Eclipse, the contents of the directory containing the HTML and XML files needs
+# to be copied into the plugins directory of eclipse. The name of the directory
+# within the plugins directory should be the same as the ECLIPSE_DOC_ID value.
+# After copying Eclipse needs to be restarted before the help appears.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_ECLIPSEHELP   = NO
+
+# A unique identifier for the Eclipse help plugin. When installing the plugin
+# the directory name containing the HTML and XML files should also have this
+# name. Each documentation set should have its own identifier.
+# The default value is: org.doxygen.Project.
+# This tag requires that the tag GENERATE_ECLIPSEHELP is set to YES.
+
+ECLIPSE_DOC_ID         = org.doxygen.Project
+
+# If you want full control over the layout of the generated HTML pages it might
+# be necessary to disable the index and replace it with your own. The
+# DISABLE_INDEX tag can be used to turn on/off the condensed index (tabs) at top
+# of each HTML page. A value of NO enables the index and the value YES disables
+# it. Since the tabs in the index contain the same information as the navigation
+# tree, you can set this option to YES if you also set GENERATE_TREEVIEW to YES.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+DISABLE_INDEX          = NO
+
+# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index
+# structure should be generated to display hierarchical information. If the tag
+# value is set to YES, a side panel will be generated containing a tree-like
+# index structure (just like the one that is generated for HTML Help). For this
+# to work a browser that supports JavaScript, DHTML, CSS and frames is required
+# (i.e. any modern browser). Windows users are probably better off using the
+# HTML help feature. Via custom style sheets (see HTML_EXTRA_STYLESHEET) one can
+# further fine-tune the look of the index. As an example, the default style
+# sheet generated by doxygen has an example that shows how to put an image at
+# the root of the tree instead of the PROJECT_NAME. Since the tree basically has
+# the same information as the tab index, you could consider setting
+# DISABLE_INDEX to YES when enabling this option.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+GENERATE_TREEVIEW      = NO
+
+# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that
+# doxygen will group on one line in the generated HTML documentation.
+#
+# Note that a value of 0 will completely suppress the enum values from appearing
+# in the overview section.
+# Minimum value: 0, maximum value: 20, default value: 4.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+ENUM_VALUES_PER_LINE   = 4
+
+# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be used
+# to set the initial width (in pixels) of the frame in which the tree is shown.
+# Minimum value: 0, maximum value: 1500, default value: 250.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+TREEVIEW_WIDTH         = 250
+
+# If the EXT_LINKS_IN_WINDOW option is set to YES, doxygen will open links to
+# external symbols imported via tag files in a separate window.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+EXT_LINKS_IN_WINDOW    = NO
+
+# Use this tag to change the font size of LaTeX formulas included as images in
+# the HTML documentation. When you change the font size after a successful
+# doxygen run you need to manually remove any form_*.png images from the HTML
+# output directory to force them to be regenerated.
+# Minimum value: 8, maximum value: 50, default value: 10.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+FORMULA_FONTSIZE       = 10
+
+# Use the FORMULA_TRANPARENT tag to determine whether or not the images
+# generated for formulas are transparent PNGs. Transparent PNGs are not
+# supported properly for IE 6.0, but are supported on all modern browsers.
+#
+# Note that when changing this option you need to delete any form_*.png files in
+# the HTML output directory before the changes have effect.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+FORMULA_TRANSPARENT    = YES
+
+# Enable the USE_MATHJAX option to render LaTeX formulas using MathJax (see
+# http://www.mathjax.org) which uses client side Javascript for the rendering
+# instead of using pre-rendered bitmaps. Use this if you do not have LaTeX
+# installed or if you want to formulas look prettier in the HTML output. When
+# enabled you may also need to install MathJax separately and configure the path
+# to it using the MATHJAX_RELPATH option.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+USE_MATHJAX            = NO
+
+# When MathJax is enabled you can set the default output format to be used for
+# the MathJax output. See the MathJax site (see:
+# http://docs.mathjax.org/en/latest/output.html) for more details.
+# Possible values are: HTML-CSS (which is slower, but has the best
+# compatibility), NativeMML (i.e. MathML) and SVG.
+# The default value is: HTML-CSS.
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_FORMAT         = HTML-CSS
+
+# When MathJax is enabled you need to specify the location relative to the HTML
+# output directory using the MATHJAX_RELPATH option. The destination directory
+# should contain the MathJax.js script. For instance, if the mathjax directory
+# is located at the same level as the HTML output directory, then
+# MATHJAX_RELPATH should be ../mathjax. The default value points to the MathJax
+# Content Delivery Network so you can quickly see the result without installing
+# MathJax. However, it is strongly recommended to install a local copy of
+# MathJax from http://www.mathjax.org before deployment.
+# The default value is: http://cdn.mathjax.org/mathjax/latest.
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_RELPATH        = http://cdn.mathjax.org/mathjax/latest
+
+# The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax
+# extension names that should be enabled during MathJax rendering. For example
+# MATHJAX_EXTENSIONS = TeX/AMSmath TeX/AMSsymbols
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_EXTENSIONS     =
+
+# The MATHJAX_CODEFILE tag can be used to specify a file with javascript pieces
+# of code that will be used on startup of the MathJax code. See the MathJax site
+# (see: http://docs.mathjax.org/en/latest/output.html) for more details. For an
+# example see the documentation.
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_CODEFILE       =
+
+# When the SEARCHENGINE tag is enabled doxygen will generate a search box for
+# the HTML output. The underlying search engine uses javascript and DHTML and
+# should work on any modern browser. Note that when using HTML help
+# (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets (GENERATE_DOCSET)
+# there is already a search function so this one should typically be disabled.
+# For large projects the javascript based search engine can be slow, then
+# enabling SERVER_BASED_SEARCH may provide a better solution. It is possible to
+# search using the keyboard; to jump to the search box use <access key> + S
+# (what the <access key> is depends on the OS and browser, but it is typically
+# <CTRL>, <ALT>/<option>, or both). Inside the search box use the <cursor down
+# key> to jump into the search results window, the results can be navigated
+# using the <cursor keys>. Press <Enter> to select an item or <escape> to cancel
+# the search. The filter options can be selected when the cursor is inside the
+# search box by pressing <Shift>+<cursor down>. Also here use the <cursor keys>
+# to select a filter and <Enter> or <escape> to activate or cancel the filter
+# option.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+SEARCHENGINE           = YES
+
+# When the SERVER_BASED_SEARCH tag is enabled the search engine will be
+# implemented using a web server instead of a web client using Javascript. There
+# are two flavors of web server based searching depending on the EXTERNAL_SEARCH
+# setting. When disabled, doxygen will generate a PHP script for searching and
+# an index file used by the script. When EXTERNAL_SEARCH is enabled the indexing
+# and searching needs to be provided by external tools. See the section
+# "External Indexing and Searching" for details.
+# The default value is: NO.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+SERVER_BASED_SEARCH    = NO
+
+# When EXTERNAL_SEARCH tag is enabled doxygen will no longer generate the PHP
+# script for searching. Instead the search results are written to an XML file
+# which needs to be processed by an external indexer. Doxygen will invoke an
+# external search engine pointed to by the SEARCHENGINE_URL option to obtain the
+# search results.
+#
+# Doxygen ships with an example indexer (doxyindexer) and search engine
+# (doxysearch.cgi) which are based on the open source search engine library
+# Xapian (see: http://xapian.org/).
+#
+# See the section "External Indexing and Searching" for details.
+# The default value is: NO.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+EXTERNAL_SEARCH        = NO
+
+# The SEARCHENGINE_URL should point to a search engine hosted by a web server
+# which will return the search results when EXTERNAL_SEARCH is enabled.
+#
+# Doxygen ships with an example indexer (doxyindexer) and search engine
+# (doxysearch.cgi) which are based on the open source search engine library
+# Xapian (see: http://xapian.org/). See the section "External Indexing and
+# Searching" for details.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+SEARCHENGINE_URL       =
+
+# When SERVER_BASED_SEARCH and EXTERNAL_SEARCH are both enabled the unindexed
+# search data is written to a file for indexing by an external tool. With the
+# SEARCHDATA_FILE tag the name of this file can be specified.
+# The default file is: searchdata.xml.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+SEARCHDATA_FILE        = searchdata.xml
+
+# When SERVER_BASED_SEARCH and EXTERNAL_SEARCH are both enabled the
+# EXTERNAL_SEARCH_ID tag can be used as an identifier for the project. This is
+# useful in combination with EXTRA_SEARCH_MAPPINGS to search through multiple
+# projects and redirect the results back to the right project.
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+EXTERNAL_SEARCH_ID     =
+
+# The EXTRA_SEARCH_MAPPINGS tag can be used to enable searching through doxygen
+# projects other than the one defined by this configuration file, but that are
+# all added to the same external search index. Each project needs to have a
+# unique id set via EXTERNAL_SEARCH_ID. The search mapping then maps the id of
+# to a relative location where the documentation can be found. The format is:
+# EXTRA_SEARCH_MAPPINGS = tagname1=loc1 tagname2=loc2 ...
+# This tag requires that the tag SEARCHENGINE is set to YES.
+
+EXTRA_SEARCH_MAPPINGS  =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the LaTeX output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_LATEX tag is set to YES, doxygen will generate LaTeX output.
+# The default value is: YES.
+
+GENERATE_LATEX         = NO
+
+# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: latex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_OUTPUT           = latex
+
+# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be
+# invoked.
+#
+# Note that when enabling USE_PDFLATEX this option is only used for generating
+# bitmaps for formulas in the HTML output, but not in the Makefile that is
+# written to the output directory.
+# The default file is: latex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_CMD_NAME         = latex
+
+# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to generate
+# index for LaTeX.
+# The default file is: makeindex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+MAKEINDEX_CMD_NAME     = makeindex
+
+# If the COMPACT_LATEX tag is set to YES, doxygen generates more compact LaTeX
+# documents. This may be useful for small projects and may help to save some
+# trees in general.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+COMPACT_LATEX          = NO
+
+# The PAPER_TYPE tag can be used to set the paper type that is used by the
+# printer.
+# Possible values are: a4 (210 x 297 mm), letter (8.5 x 11 inches), legal (8.5 x
+# 14 inches) and executive (7.25 x 10.5 inches).
+# The default value is: a4.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+PAPER_TYPE             = a4
+
+# The EXTRA_PACKAGES tag can be used to specify one or more LaTeX package names
+# that should be included in the LaTeX output. The package can be specified just
+# by its name or with the correct syntax as to be used with the LaTeX
+# \usepackage command. To get the times font for instance you can specify :
+# EXTRA_PACKAGES=times or EXTRA_PACKAGES={times}
+# To use the option intlimits with the amsmath package you can specify:
+# EXTRA_PACKAGES=[intlimits]{amsmath}
+# If left blank no extra packages will be included.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+EXTRA_PACKAGES         =
+
+# The LATEX_HEADER tag can be used to specify a personal LaTeX header for the
+# generated LaTeX document. The header should contain everything until the first
+# chapter. If it is left blank doxygen will generate a standard header. See
+# section "Doxygen usage" for information on how to let doxygen write the
+# default header to a separate file.
+#
+# Note: Only use a user-defined header if you know what you are doing! The
+# following commands have a special meaning inside the header: $title,
+# $datetime, $date, $doxygenversion, $projectname, $projectnumber,
+# $projectbrief, $projectlogo. Doxygen will replace $title with the empty
+# string, for the replacement values of the other commands the user is referred
+# to HTML_HEADER.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_HEADER           =
+
+# The LATEX_FOOTER tag can be used to specify a personal LaTeX footer for the
+# generated LaTeX document. The footer should contain everything after the last
+# chapter. If it is left blank doxygen will generate a standard footer. See
+# LATEX_HEADER for more information on how to generate a default footer and what
+# special commands can be used inside the footer.
+#
+# Note: Only use a user-defined footer if you know what you are doing!
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_FOOTER           =
+
+# The LATEX_EXTRA_STYLESHEET tag can be used to specify additional user-defined
+# LaTeX style sheets that are included after the standard style sheets created
+# by doxygen. Using this option one can overrule certain style aspects. Doxygen
+# will copy the style sheet files to the output directory.
+# Note: The order of the extra style sheet files is of importance (e.g. the last
+# style sheet in the list overrules the setting of the previous ones in the
+# list).
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_EXTRA_STYLESHEET =
+
+# The LATEX_EXTRA_FILES tag can be used to specify one or more extra images or
+# other source files which should be copied to the LATEX_OUTPUT output
+# directory. Note that the files will be copied as-is; there are no commands or
+# markers available.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_EXTRA_FILES      =
+
+# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated is
+# prepared for conversion to PDF (using ps2pdf or pdflatex). The PDF file will
+# contain links (just like the HTML output) instead of page references. This
+# makes the output suitable for online browsing using a PDF viewer.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+PDF_HYPERLINKS         = YES
+
+# If the USE_PDFLATEX tag is set to YES, doxygen will use pdflatex to generate
+# the PDF file directly from the LaTeX files. Set this option to YES, to get a
+# higher quality PDF documentation.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+USE_PDFLATEX           = YES
+
+# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \batchmode
+# command to the generated LaTeX files. This will instruct LaTeX to keep running
+# if errors occur, instead of asking the user for help. This option is also used
+# when generating formulas in HTML.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_BATCHMODE        = NO
+
+# If the LATEX_HIDE_INDICES tag is set to YES then doxygen will not include the
+# index chapters (such as File Index, Compound Index, etc.) in the output.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_HIDE_INDICES     = NO
+
+# If the LATEX_SOURCE_CODE tag is set to YES then doxygen will include source
+# code with syntax highlighting in the LaTeX output.
+#
+# Note that which sources are shown also depends on other settings such as
+# SOURCE_BROWSER.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_SOURCE_CODE      = NO
+
+# The LATEX_BIB_STYLE tag can be used to specify the style to use for the
+# bibliography, e.g. plainnat, or ieeetr. See
+# http://en.wikipedia.org/wiki/BibTeX and \cite for more info.
+# The default value is: plain.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_BIB_STYLE        = plain
+
+# If the LATEX_TIMESTAMP tag is set to YES then the footer of each generated
+# page will contain the date and time when the page was generated. Setting this
+# to NO can help when comparing the output of multiple runs.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_TIMESTAMP        = NO
+
+#---------------------------------------------------------------------------
+# Configuration options related to the RTF output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_RTF tag is set to YES, doxygen will generate RTF output. The
+# RTF output is optimized for Word 97 and may not look too pretty with other RTF
+# readers/editors.
+# The default value is: NO.
+
+GENERATE_RTF           = NO
+
+# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: rtf.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_OUTPUT             = rtf
+
+# If the COMPACT_RTF tag is set to YES, doxygen generates more compact RTF
+# documents. This may be useful for small projects and may help to save some
+# trees in general.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+COMPACT_RTF            = NO
+
+# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated will
+# contain hyperlink fields. The RTF file will contain links (just like the HTML
+# output) instead of page references. This makes the output suitable for online
+# browsing using Word or some other Word compatible readers that support those
+# fields.
+#
+# Note: WordPad (write) and others do not support links.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_HYPERLINKS         = NO
+
+# Load stylesheet definitions from file. Syntax is similar to doxygen's config
+# file, i.e. a series of assignments. You only have to provide replacements,
+# missing definitions are set to their default value.
+#
+# See also section "Doxygen usage" for information on how to generate the
+# default style sheet that doxygen normally uses.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_STYLESHEET_FILE    =
+
+# Set optional variables used in the generation of an RTF document. Syntax is
+# similar to doxygen's config file. A template extensions file can be generated
+# using doxygen -e rtf extensionFile.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_EXTENSIONS_FILE    =
+
+# If the RTF_SOURCE_CODE tag is set to YES then doxygen will include source code
+# with syntax highlighting in the RTF output.
+#
+# Note that which sources are shown also depends on other settings such as
+# SOURCE_BROWSER.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_RTF is set to YES.
+
+RTF_SOURCE_CODE        = NO
+
+#---------------------------------------------------------------------------
+# Configuration options related to the man page output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_MAN tag is set to YES, doxygen will generate man pages for
+# classes and files.
+# The default value is: NO.
+
+GENERATE_MAN           = NO
+
+# The MAN_OUTPUT tag is used to specify where the man pages will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it. A directory man3 will be created inside the directory specified by
+# MAN_OUTPUT.
+# The default directory is: man.
+# This tag requires that the tag GENERATE_MAN is set to YES.
+
+MAN_OUTPUT             = man
+
+# The MAN_EXTENSION tag determines the extension that is added to the generated
+# man pages. In case the manual section does not start with a number, the number
+# 3 is prepended. The dot (.) at the beginning of the MAN_EXTENSION tag is
+# optional.
+# The default value is: .3.
+# This tag requires that the tag GENERATE_MAN is set to YES.
+
+MAN_EXTENSION          = .3
+
+# The MAN_SUBDIR tag determines the name of the directory created within
+# MAN_OUTPUT in which the man pages are placed. If defaults to man followed by
+# MAN_EXTENSION with the initial . removed.
+# This tag requires that the tag GENERATE_MAN is set to YES.
+
+MAN_SUBDIR             =
+
+# If the MAN_LINKS tag is set to YES and doxygen generates man output, then it
+# will generate one additional man file for each entity documented in the real
+# man page(s). These additional files only source the real man page, but without
+# them the man command would be unable to find the correct page.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_MAN is set to YES.
+
+MAN_LINKS              = NO
+
+#---------------------------------------------------------------------------
+# Configuration options related to the XML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_XML tag is set to YES, doxygen will generate an XML file that
+# captures the structure of the code including all documentation.
+# The default value is: NO.
+
+GENERATE_XML           = NO
+
+# The XML_OUTPUT tag is used to specify where the XML pages will be put. If a
+# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of
+# it.
+# The default directory is: xml.
+# This tag requires that the tag GENERATE_XML is set to YES.
+
+XML_OUTPUT             = xml
+
+# If the XML_PROGRAMLISTING tag is set to YES, doxygen will dump the program
+# listings (including syntax highlighting and cross-referencing information) to
+# the XML output. Note that enabling this will significantly increase the size
+# of the XML output.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_XML is set to YES.
+
+XML_PROGRAMLISTING     = YES
+
+#---------------------------------------------------------------------------
+# Configuration options related to the DOCBOOK output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_DOCBOOK tag is set to YES, doxygen will generate Docbook files
+# that can be used to generate PDF.
+# The default value is: NO.
+
+GENERATE_DOCBOOK       = NO
+
+# The DOCBOOK_OUTPUT tag is used to specify where the Docbook pages will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be put in
+# front of it.
+# The default directory is: docbook.
+# This tag requires that the tag GENERATE_DOCBOOK is set to YES.
+
+DOCBOOK_OUTPUT         = docbook
+
+# If the DOCBOOK_PROGRAMLISTING tag is set to YES, doxygen will include the
+# program listings (including syntax highlighting and cross-referencing
+# information) to the DOCBOOK output. Note that enabling this will significantly
+# increase the size of the DOCBOOK output.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_DOCBOOK is set to YES.
+
+DOCBOOK_PROGRAMLISTING = NO
+
+#---------------------------------------------------------------------------
+# Configuration options for the AutoGen Definitions output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_AUTOGEN_DEF tag is set to YES, doxygen will generate an
+# AutoGen Definitions (see http://autogen.sf.net) file that captures the
+# structure of the code including all documentation. Note that this feature is
+# still experimental and incomplete at the moment.
+# The default value is: NO.
+
+GENERATE_AUTOGEN_DEF   = NO
+
+#---------------------------------------------------------------------------
+# Configuration options related to the Perl module output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_PERLMOD tag is set to YES, doxygen will generate a Perl module
+# file that captures the structure of the code including all documentation.
+#
+# Note that this feature is still experimental and incomplete at the moment.
+# The default value is: NO.
+
+GENERATE_PERLMOD       = NO
+
+# If the PERLMOD_LATEX tag is set to YES, doxygen will generate the necessary
+# Makefile rules, Perl scripts and LaTeX code to be able to generate PDF and DVI
+# output from the Perl module output.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_PERLMOD is set to YES.
+
+PERLMOD_LATEX          = NO
+
+# If the PERLMOD_PRETTY tag is set to YES, the Perl module output will be nicely
+# formatted so it can be parsed by a human reader. This is useful if you want to
+# understand what is going on. On the other hand, if this tag is set to NO, the
+# size of the Perl module output will be much smaller and Perl will parse it
+# just the same.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_PERLMOD is set to YES.
+
+PERLMOD_PRETTY         = YES
+
+# The names of the make variables in the generated doxyrules.make file are
+# prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. This is useful
+# so different doxyrules.make files included by the same Makefile don't
+# overwrite each other's variables.
+# This tag requires that the tag GENERATE_PERLMOD is set to YES.
+
+PERLMOD_MAKEVAR_PREFIX =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the preprocessor
+#---------------------------------------------------------------------------
+
+# If the ENABLE_PREPROCESSING tag is set to YES, doxygen will evaluate all
+# C-preprocessor directives found in the sources and include files.
+# The default value is: YES.
+
+ENABLE_PREPROCESSING   = YES
+
+# If the MACRO_EXPANSION tag is set to YES, doxygen will expand all macro names
+# in the source code. If set to NO, only conditional compilation will be
+# performed. Macro expansion can be done in a controlled way by setting
+# EXPAND_ONLY_PREDEF to YES.
+# The default value is: NO.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+MACRO_EXPANSION        = NO
+
+# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES then
+# the macro expansion is limited to the macros specified with the PREDEFINED and
+# EXPAND_AS_DEFINED tags.
+# The default value is: NO.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+EXPAND_ONLY_PREDEF     = NO
+
+# If the SEARCH_INCLUDES tag is set to YES, the include files in the
+# INCLUDE_PATH will be searched if a #include is found.
+# The default value is: YES.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+SEARCH_INCLUDES        = YES
+
+# The INCLUDE_PATH tag can be used to specify one or more directories that
+# contain include files that are not input files but should be processed by the
+# preprocessor.
+# This tag requires that the tag SEARCH_INCLUDES is set to YES.
+
+INCLUDE_PATH           =
+
+# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
+# patterns (like *.h and *.hpp) to filter out the header-files in the
+# directories. If left blank, the patterns specified with FILE_PATTERNS will be
+# used.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+INCLUDE_FILE_PATTERNS  =
+
+# The PREDEFINED tag can be used to specify one or more macro names that are
+# defined before the preprocessor is started (similar to the -D option of e.g.
+# gcc). The argument of the tag is a list of macros of the form: name or
+# name=definition (no spaces). If the definition and the "=" are omitted, "=1"
+# is assumed. To prevent a macro definition from being undefined via #undef or
+# recursively expanded use the := operator instead of the = operator.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+PREDEFINED             =
+
+# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then this
+# tag can be used to specify a list of macro names that should be expanded. The
+# macro definition that is found in the sources will be used. Use the PREDEFINED
+# tag if you want to use a different macro definition that overrules the
+# definition found in the source code.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+EXPAND_AS_DEFINED      =
+
+# If the SKIP_FUNCTION_MACROS tag is set to YES then doxygen's preprocessor will
+# remove all references to function-like macros that are alone on a line, have
+# an all uppercase name, and do not end with a semicolon. Such function macros
+# are typically used for boiler-plate code, and will confuse the parser if not
+# removed.
+# The default value is: YES.
+# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
+
+SKIP_FUNCTION_MACROS   = YES
+
+#---------------------------------------------------------------------------
+# Configuration options related to external references
+#---------------------------------------------------------------------------
+
+# The TAGFILES tag can be used to specify one or more tag files. For each tag
+# file the location of the external documentation should be added. The format of
+# a tag file without this location is as follows:
+# TAGFILES = file1 file2 ...
+# Adding location for the tag files is done as follows:
+# TAGFILES = file1=loc1 "file2 = loc2" ...
+# where loc1 and loc2 can be relative or absolute paths or URLs. See the
+# section "Linking to external documentation" for more information about the use
+# of tag files.
+# Note: Each tag file must have a unique name (where the name does NOT include
+# the path). If a tag file is not located in the directory in which doxygen is
+# run, you must also specify the path to the tagfile here.
+
+TAGFILES               =
+
+# When a file name is specified after GENERATE_TAGFILE, doxygen will create a
+# tag file that is based on the input files it reads. See section "Linking to
+# external documentation" for more information about the usage of tag files.
+
+GENERATE_TAGFILE       =
+
+# If the ALLEXTERNALS tag is set to YES, all external class will be listed in
+# the class index. If set to NO, only the inherited external classes will be
+# listed.
+# The default value is: NO.
+
+ALLEXTERNALS           = NO
+
+# If the EXTERNAL_GROUPS tag is set to YES, all external groups will be listed
+# in the modules index. If set to NO, only the current project's groups will be
+# listed.
+# The default value is: YES.
+
+EXTERNAL_GROUPS        = YES
+
+# If the EXTERNAL_PAGES tag is set to YES, all external pages will be listed in
+# the related pages index. If set to NO, only the current project's pages will
+# be listed.
+# The default value is: YES.
+
+EXTERNAL_PAGES         = YES
+
+# The PERL_PATH should be the absolute path and name of the perl script
+# interpreter (i.e. the result of 'which perl').
+# The default file (with absolute path) is: /usr/bin/perl.
+
+PERL_PATH              = /usr/bin/perl
+
+#---------------------------------------------------------------------------
+# Configuration options related to the dot tool
+#---------------------------------------------------------------------------
+
+# If the CLASS_DIAGRAMS tag is set to YES, doxygen will generate a class diagram
+# (in HTML and LaTeX) for classes with base or super classes. Setting the tag to
+# NO turns the diagrams off. Note that this option also works with HAVE_DOT
+# disabled, but it is recommended to install and use dot, since it yields more
+# powerful graphs.
+# The default value is: YES.
+
+CLASS_DIAGRAMS         = YES
+
+# You can define message sequence charts within doxygen comments using the \msc
+# command. Doxygen will then run the mscgen tool (see:
+# http://www.mcternan.me.uk/mscgen/)) to produce the chart and insert it in the
+# documentation. The MSCGEN_PATH tag allows you to specify the directory where
+# the mscgen tool resides. If left empty the tool is assumed to be found in the
+# default search path.
+
+MSCGEN_PATH            =
+
+# You can include diagrams made with dia in doxygen documentation. Doxygen will
+# then run dia to produce the diagram and insert it in the documentation. The
+# DIA_PATH tag allows you to specify the directory where the dia binary resides.
+# If left empty dia is assumed to be found in the default search path.
+
+DIA_PATH               =
+
+# If set to YES the inheritance and collaboration graphs will hide inheritance
+# and usage relations if the target is undocumented or is not a class.
+# The default value is: YES.
+
+HIDE_UNDOC_RELATIONS   = YES
+
+# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is
+# available from the path. This tool is part of Graphviz (see:
+# http://www.graphviz.org/), a graph visualization toolkit from AT&T and Lucent
+# Bell Labs. The other options in this section have no effect if this option is
+# set to NO
+# The default value is: NO.
+
+HAVE_DOT               = YES
+
+# The DOT_NUM_THREADS specifies the number of dot invocations doxygen is allowed
+# to run in parallel. When set to 0 doxygen will base this on the number of
+# processors available in the system. You can set it explicitly to a value
+# larger than 0 to get control over the balance between CPU load and processing
+# speed.
+# Minimum value: 0, maximum value: 32, default value: 0.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_NUM_THREADS        = 0
+
+# When you want a differently looking font in the dot files that doxygen
+# generates you can specify the font name using DOT_FONTNAME. You need to make
+# sure dot is able to find the font, which can be done by putting it in a
+# standard location or by setting the DOTFONTPATH environment variable or by
+# setting DOT_FONTPATH to the directory containing the font.
+# The default value is: Helvetica.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_FONTNAME           = Calibri
+
+# The DOT_FONTSIZE tag can be used to set the size (in points) of the font of
+# dot graphs.
+# Minimum value: 4, maximum value: 24, default value: 10.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_FONTSIZE           = 10
+
+# By default doxygen will tell dot to use the default font as specified with
+# DOT_FONTNAME. If you specify a different font using DOT_FONTNAME you can set
+# the path where dot can find it using this tag.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_FONTPATH           =
+
+# If the CLASS_GRAPH tag is set to YES then doxygen will generate a graph for
+# each documented class showing the direct and indirect inheritance relations.
+# Setting this tag to YES will force the CLASS_DIAGRAMS tag to NO.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+CLASS_GRAPH            = YES
+
+# If the COLLABORATION_GRAPH tag is set to YES then doxygen will generate a
+# graph for each documented class showing the direct and indirect implementation
+# dependencies (inheritance, containment, and class references variables) of the
+# class with other documented classes.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+COLLABORATION_GRAPH    = YES
+
+# If the GROUP_GRAPHS tag is set to YES then doxygen will generate a graph for
+# groups, showing the direct groups dependencies.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+GROUP_GRAPHS           = YES
+
+# If the UML_LOOK tag is set to YES, doxygen will generate inheritance and
+# collaboration diagrams in a style similar to the OMG's Unified Modeling
+# Language.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+UML_LOOK               = NO
+
+# If the UML_LOOK tag is enabled, the fields and methods are shown inside the
+# class node. If there are many fields or methods and many nodes the graph may
+# become too big to be useful. The UML_LIMIT_NUM_FIELDS threshold limits the
+# number of items for each type to make the size more manageable. Set this to 0
+# for no limit. Note that the threshold may be exceeded by 50% before the limit
+# is enforced. So when you set the threshold to 10, up to 15 fields may appear,
+# but if the number exceeds 15, the total amount of fields shown is limited to
+# 10.
+# Minimum value: 0, maximum value: 100, default value: 10.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+UML_LIMIT_NUM_FIELDS   = 10
+
+# If the TEMPLATE_RELATIONS tag is set to YES then the inheritance and
+# collaboration graphs will show the relations between templates and their
+# instances.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+TEMPLATE_RELATIONS     = NO
+
+# If the INCLUDE_GRAPH, ENABLE_PREPROCESSING and SEARCH_INCLUDES tags are set to
+# YES then doxygen will generate a graph for each documented file showing the
+# direct and indirect include dependencies of the file with other documented
+# files.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+INCLUDE_GRAPH          = YES
+
+# If the INCLUDED_BY_GRAPH, ENABLE_PREPROCESSING and SEARCH_INCLUDES tags are
+# set to YES then doxygen will generate a graph for each documented file showing
+# the direct and indirect include dependencies of the file with other documented
+# files.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+INCLUDED_BY_GRAPH      = YES
+
+# If the CALL_GRAPH tag is set to YES then doxygen will generate a call
+# dependency graph for every global function or class method.
+#
+# Note that enabling this option will significantly increase the time of a run.
+# So in most cases it will be better to enable call graphs for selected
+# functions only using the \callgraph command. Disabling a call graph can be
+# accomplished by means of the command \hidecallgraph.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+CALL_GRAPH             = YES
+
+# If the CALLER_GRAPH tag is set to YES then doxygen will generate a caller
+# dependency graph for every global function or class method.
+#
+# Note that enabling this option will significantly increase the time of a run.
+# So in most cases it will be better to enable caller graphs for selected
+# functions only using the \callergraph command. Disabling a caller graph can be
+# accomplished by means of the command \hidecallergraph.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+CALLER_GRAPH           = YES
+
+# If the GRAPHICAL_HIERARCHY tag is set to YES then doxygen will graphical
+# hierarchy of all classes instead of a textual one.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+GRAPHICAL_HIERARCHY    = YES
+
+# If the DIRECTORY_GRAPH tag is set to YES then doxygen will show the
+# dependencies a directory has on other directories in a graphical way. The
+# dependency relations are determined by the #include relations between the
+# files in the directories.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DIRECTORY_GRAPH        = YES
+
+# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images
+# generated by dot. For an explanation of the image formats see the section
+# output formats in the documentation of the dot tool (Graphviz (see:
+# http://www.graphviz.org/)).
+# Note: If you choose svg you need to set HTML_FILE_EXTENSION to xhtml in order
+# to make the SVG files visible in IE 9+ (other browsers do not have this
+# requirement).
+# Possible values are: png, jpg, gif, svg, png:gd, png:gd:gd, png:cairo,
+# png:cairo:gd, png:cairo:cairo, png:cairo:gdiplus, png:gdiplus and
+# png:gdiplus:gdiplus.
+# The default value is: png.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_IMAGE_FORMAT       = png
+
+# If DOT_IMAGE_FORMAT is set to svg, then this option can be set to YES to
+# enable generation of interactive SVG images that allow zooming and panning.
+#
+# Note that this requires a modern browser other than Internet Explorer. Tested
+# and working are Firefox, Chrome, Safari, and Opera.
+# Note: For IE 9+ you need to set HTML_FILE_EXTENSION to xhtml in order to make
+# the SVG files visible. Older versions of IE do not have SVG support.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+INTERACTIVE_SVG        = NO
+
+# The DOT_PATH tag can be used to specify the path where the dot tool can be
+# found. If left blank, it is assumed the dot tool can be found in the path.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_PATH               = /usr/local/bin/dot
+
+# The DOTFILE_DIRS tag can be used to specify one or more directories that
+# contain dot files that are included in the documentation (see the \dotfile
+# command).
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOTFILE_DIRS           =
+
+# The MSCFILE_DIRS tag can be used to specify one or more directories that
+# contain msc files that are included in the documentation (see the \mscfile
+# command).
+
+MSCFILE_DIRS           =
+
+# The DIAFILE_DIRS tag can be used to specify one or more directories that
+# contain dia files that are included in the documentation (see the \diafile
+# command).
+
+DIAFILE_DIRS           =
+
+# When using plantuml, the PLANTUML_JAR_PATH tag should be used to specify the
+# path where java can find the plantuml.jar file. If left blank, it is assumed
+# PlantUML is not used or called during a preprocessing step. Doxygen will
+# generate a warning when it encounters a \startuml command in this case and
+# will not generate output for the diagram.
+
+PLANTUML_JAR_PATH      =
+
+# When using plantuml, the PLANTUML_CFG_FILE tag can be used to specify a
+# configuration file for plantuml.
+
+PLANTUML_CFG_FILE      =
+
+# When using plantuml, the specified paths are searched for files specified by
+# the !include statement in a plantuml block.
+
+PLANTUML_INCLUDE_PATH  =
+
+# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of nodes
+# that will be shown in the graph. If the number of nodes in a graph becomes
+# larger than this value, doxygen will truncate the graph, which is visualized
+# by representing a node as a red box. Note that doxygen if the number of direct
+# children of the root node in a graph is already larger than
+# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note that
+# the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH.
+# Minimum value: 0, maximum value: 10000, default value: 50.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_GRAPH_MAX_NODES    = 50
+
+# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the graphs
+# generated by dot. A depth value of 3 means that only nodes reachable from the
+# root by following a path via at most 3 edges will be shown. Nodes that lay
+# further from the root node will be omitted. Note that setting this option to 1
+# or 2 may greatly reduce the computation time needed for large code bases. Also
+# note that the size of a graph can be further restricted by
+# DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction.
+# Minimum value: 0, maximum value: 1000, default value: 0.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+MAX_DOT_GRAPH_DEPTH    = 0
+
+# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent
+# background. This is disabled by default, because dot on Windows does not seem
+# to support this out of the box.
+#
+# Warning: Depending on the platform used, enabling this option may lead to
+# badly anti-aliased labels on the edges of a graph (i.e. they become hard to
+# read).
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_TRANSPARENT        = NO
+
+# Set the DOT_MULTI_TARGETS tag to YES to allow dot to generate multiple output
+# files in one run (i.e. multiple -o and -T options on the command line). This
+# makes dot run faster, but since only newer versions of dot (>1.8.10) support
+# this, this feature is disabled by default.
+# The default value is: NO.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_MULTI_TARGETS      = NO
+
+# If the GENERATE_LEGEND tag is set to YES doxygen will generate a legend page
+# explaining the meaning of the various boxes and arrows in the dot generated
+# graphs.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+GENERATE_LEGEND        = YES
+
+# If the DOT_CLEANUP tag is set to YES, doxygen will remove the intermediate dot
+# files that are used to generate the various graphs.
+# The default value is: YES.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_CLEANUP            = YES
diff --git a/infra/scripts/build_nnpkg.sh b/infra/scripts/build_nnpkg.sh
new file mode 100644
index 000000000..221c7210f
--- /dev/null
+++ b/infra/scripts/build_nnpkg.sh
@@ -0,0 +1,19 @@
+#!/bin/bash
+
+# Test suite: nnpkg-test-suite.tar.gz
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="${CURRENT_PATH}/../../"
+
+pushd ${ROOT_PATH} > /dev/null
+
+for f in `find build/compiler/tf2tflite -name "UNIT*" | cut -d'.' -f1 | sort | uniq`;
+do
+  tools/nnpackage_tool/nncc-tc-to-nnpkg-tc/nncc-tc-to-nnpkg-tc.sh -o nnpkg-tcs -i ${f%/*} $(basename $f);
+done
+
+tar -zcf nnpkg-test-suite.tar.gz tools/nnpackage_tool/nnpkg_test nnpkg-tcs
+
+popd > /dev/null
diff --git a/infra/scripts/docker_build_cross_arm_benchmark_model.sh b/infra/scripts/docker_build_cross_arm_benchmark_model.sh
new file mode 100644
index 000000000..0bc20b142
--- /dev/null
+++ b/infra/scripts/docker_build_cross_arm_benchmark_model.sh
@@ -0,0 +1,49 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+# prepare rootfs
+if [ ! -d $ROOTFS_DIR ]; then
+  echo "It will use default rootfs path"
+else
+  DOCKER_VOLUMES+=" -v $ROOTFS_DIR:/opt/rootfs"
+  DOCKER_ENV_VARS+=" -e ROOTFS_DIR=/opt/rootfs"
+fi
+
+# mount volume (or directory) for externals
+if [ -n "$EXTERNAL_VOLUME" ]; then
+  DOCKER_VOLUMES+=" -v $EXTERNAL_VOLUME:/externals"
+  DOCKER_ENV_VARS+=" -e EXTERNAL_VOLUME=/externals"
+else
+  echo "It will use default external path"
+fi
+
+# docker image name
+if [ -z $DOCKER_IMAGE_NAME ]; then
+  echo "It will use default docker image name"
+fi
+
+# Mirror server setting
+if [ -z $EXTERNAL_DOWNLOAD_SERVER ]; then
+  echo "It will not use mirror server"
+fi
+
+DOCKER_ENV_VARS+=" -e TARGET_ARCH=armv7l"
+DOCKER_ENV_VARS+=" -e CROSS_BUILD=1"
+DOCKER_ENV_VARS+=" -e BENCHMARK_ACL_BUILD=1"
+DOCKER_ENV_VARS+=" -e BUILD_TYPE=Release"
+
+pushd $ROOT_PATH > /dev/null
+
+# TODO use command instead of makefile
+export DOCKER_ENV_VARS
+export DOCKER_VOLUMES
+CMD="export OPTIONS='-DBUILD_PURE_ARM_COMPUTE=ON -DBUILD_NEURUN=OFF -DBUILD_TFLITE_BENCHMARK_MODEL=ON -DBUILD_TFLITE_LOADER=OFF' && \
+     cp -nv Makefile.template Makefile && \
+     make all install build_test_suite"
+./nnfw docker-run bash -c "$CMD"
+
+popd > /dev/null
diff --git a/infra/scripts/docker_build_cross_arm_neurun.sh b/infra/scripts/docker_build_cross_arm_neurun.sh
new file mode 100644
index 000000000..c1014c57c
--- /dev/null
+++ b/infra/scripts/docker_build_cross_arm_neurun.sh
@@ -0,0 +1,46 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+# prepare rootfs
+if [ ! -d $ROOTFS_DIR ]; then
+  echo "It will use default rootfs path"
+else
+  DOCKER_VOLUMES+=" -v $ROOTFS_DIR:/opt/rootfs"
+  DOCKER_ENV_VARS+=" -e ROOTFS_DIR=/opt/rootfs"
+fi
+
+# mount volume (or directory) for externals
+if [ -n "$EXTERNAL_VOLUME" ]; then
+  DOCKER_VOLUMES+=" -v $EXTERNAL_VOLUME:/externals"
+  DOCKER_ENV_VARS+=" -e EXTERNAL_VOLUME=/externals"
+else
+  echo "It will use default external path"
+fi
+
+# docker image name
+if [[ -z $DOCKER_IMAGE_NAME ]]; then
+  echo "It will use default docker image name"
+fi
+
+# Mirror server setting
+if [[ -z $EXTERNAL_DOWNLOAD_SERVER ]]; then
+  echo "It will not use mirror server"
+fi
+
+DOCKER_ENV_VARS+=" -e TARGET_ARCH=armv7l"
+DOCKER_ENV_VARS+=" -e CROSS_BUILD=1"
+
+pushd $ROOT_PATH > /dev/null
+
+# TODO use command instead of makefile
+export DOCKER_ENV_VARS
+export DOCKER_VOLUMES
+CMD="cp -nv Makefile.template Makefile && \
+     make all install build_test_suite"
+./nnfw docker-run bash -c "$CMD"
+
+popd > /dev/null
diff --git a/infra/scripts/docker_build_cross_arm_neurun_release.sh b/infra/scripts/docker_build_cross_arm_neurun_release.sh
new file mode 100644
index 000000000..c8c3e997e
--- /dev/null
+++ b/infra/scripts/docker_build_cross_arm_neurun_release.sh
@@ -0,0 +1,47 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+# prepare rootfs
+if [ ! -d $ROOTFS_DIR ]; then
+  echo "It will use default rootfs path"
+else
+  DOCKER_VOLUMES+=" -v $ROOTFS_DIR:/opt/rootfs"
+  DOCKER_ENV_VARS+=" -e ROOTFS_DIR=/opt/rootfs"
+fi
+
+# mount volume (or directory) for externals
+if [ -n "$EXTERNAL_VOLUME" ]; then
+  DOCKER_VOLUMES+=" -v $EXTERNAL_VOLUME:/externals"
+  DOCKER_ENV_VARS+=" -e EXTERNAL_VOLUME=/externals"
+else
+  echo "It will use default external path"
+fi
+
+# docker image name
+if [[ -z $DOCKER_IMAGE_NAME ]]; then
+  echo "It will use default docker image name"
+fi
+
+# Mirror server setting
+if [[ -z $EXTERNAL_DOWNLOAD_SERVER ]]; then
+  echo "It will not use mirror server"
+fi
+
+DOCKER_ENV_VARS+=" -e TARGET_ARCH=armv7l"
+DOCKER_ENV_VARS+=" -e CROSS_BUILD=1"
+DOCKER_ENV_VARS+=" -e BUILD_TYPE=release"
+
+pushd $ROOT_PATH > /dev/null
+
+# TODO use command instead of makefile
+export DOCKER_ENV_VARS
+export DOCKER_VOLUMES
+CMD="cp -nv Makefile.template Makefile && \
+     make all install build_test_suite"
+./nnfw docker-run bash -c "$CMD"
+
+popd > /dev/null
diff --git a/infra/scripts/docker_build_cross_arm_pacl.sh b/infra/scripts/docker_build_cross_arm_pacl.sh
new file mode 100644
index 000000000..2091287c0
--- /dev/null
+++ b/infra/scripts/docker_build_cross_arm_pacl.sh
@@ -0,0 +1,47 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+# prepare rootfs
+if [ ! -d $ROOTFS_DIR ]; then
+  echo "It will use default rootfs path"
+else
+  DOCKER_VOLUMES+=" -v $ROOTFS_DIR:/opt/rootfs"
+  DOCKER_ENV_VARS+=" -e ROOTFS_DIR=/opt/rootfs"
+fi
+
+# mount volume (or directory) for externals
+if [ -n "$EXTERNAL_VOLUME" ]; then
+  DOCKER_VOLUMES+=" -v $EXTERNAL_VOLUME:/externals"
+  DOCKER_ENV_VARS+=" -e EXTERNAL_VOLUME=/externals"
+else
+  echo "It will use default external path"
+fi
+
+# docker image name
+if [[ -z $DOCKER_IMAGE_NAME ]]; then
+  echo "It will use default docker image name"
+fi
+
+# Mirror server setting
+if [[ -z $EXTERNAL_DOWNLOAD_SERVER ]]; then
+  echo "It will not use mirror server"
+fi
+
+DOCKER_ENV_VARS+=" -e TARGET_ARCH=armv7l"
+DOCKER_ENV_VARS+=" -e CROSS_BUILD=1"
+
+pushd $ROOT_PATH > /dev/null
+
+# TODO use command instead of makefile
+export DOCKER_ENV_VARS
+export DOCKER_VOLUMES
+CMD="export OPTIONS='-DBUILD_NEURUN=OFF -DBUILD_PURE_ARM_COMPUTE=ON -DBUILD_TFLITE_LOADER=OFF' && \
+     cp -nv Makefile.template Makefile && \
+     make all install build_test_suite"
+./nnfw docker-run bash -c "${CMD}"
+
+popd > /dev/null
diff --git a/infra/scripts/docker_build_cross_arm_pacl_release.sh b/infra/scripts/docker_build_cross_arm_pacl_release.sh
new file mode 100644
index 000000000..fdac80071
--- /dev/null
+++ b/infra/scripts/docker_build_cross_arm_pacl_release.sh
@@ -0,0 +1,48 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+# prepare rootfs
+if [ ! -d $ROOTFS_DIR ]; then
+  echo "It will use default rootfs path"
+else
+  DOCKER_VOLUMES+=" -v $ROOTFS_DIR:/opt/rootfs"
+  DOCKER_ENV_VARS+=" -e ROOTFS_DIR=/opt/rootfs"
+fi
+
+# mount volume (or directory) for externals
+if [ -n "$EXTERNAL_VOLUME" ]; then
+  DOCKER_VOLUMES+=" -v $EXTERNAL_VOLUME:/externals"
+  DOCKER_ENV_VARS+=" -e EXTERNAL_VOLUME=/externals"
+else
+  echo "It will use default external path"
+fi
+
+# docker image name
+if [[ -z $DOCKER_IMAGE_NAME ]]; then
+  echo "It will use default docker image name"
+fi
+
+DOCKER_ENV_VARS+=" -e TARGET_ARCH=armv7l"
+DOCKER_ENV_VARS+=" -e CROSS_BUILD=1"
+DOCKER_ENV_VARS+=" -e BUILD_TYPE=release"
+
+# Mirror server setting
+if [[ -z $EXTERNAL_DOWNLOAD_SERVER ]]; then
+  echo "It will not use mirror server"
+fi
+
+pushd $ROOT_PATH > /dev/null
+
+# TODO use command instead of makefile
+export DOCKER_ENV_VARS
+export DOCKER_VOLUMES
+CMD="export OPTIONS='-DBUILD_NEURUN=OFF -DBUILD_PURE_ARM_COMPUTE=ON -DBUILD_TFLITE_LOADER=OFF' && \
+     cp -nv Makefile.template Makefile && \
+     make all install build_test_suite"
+./nnfw docker-run bash -c "${CMD}"
+
+popd > /dev/null
diff --git a/infra/scripts/docker_build_cross_coverage.sh b/infra/scripts/docker_build_cross_coverage.sh
new file mode 100644
index 000000000..661e85b00
--- /dev/null
+++ b/infra/scripts/docker_build_cross_coverage.sh
@@ -0,0 +1,47 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+# prepare rootfs
+if [ ! -d $ROOTFS_DIR ]; then
+  echo "It will use default rootfs path"
+else
+  DOCKER_VOLUMES+=" -v $ROOTFS_DIR:/opt/rootfs"
+  DOCKER_ENV_VARS+=" -e ROOTFS_DIR=/opt/rootfs"
+fi
+
+# mount volume (or directory) for externals
+if [ -n "$EXTERNAL_VOLUME" ]; then
+  DOCKER_VOLUMES+=" -v $EXTERNAL_VOLUME:/externals"
+  DOCKER_ENV_VARS+=" -e EXTERNAL_VOLUME=/externals"
+else
+  echo "It will use default external path"
+fi
+
+# docker image name
+if [[ -z $DOCKER_IMAGE_NAME ]]; then
+  echo "It will use default docker image name"
+fi
+
+# Mirror server setting
+if [[ -z $EXTERNAL_DOWNLOAD_SERVER ]]; then
+  echo "It will not use mirror server"
+fi
+
+DOCKER_ENV_VARS+=" -e TARGET_ARCH=armv7l"
+DOCKER_ENV_VARS+=" -e CROSS_BUILD=1"
+DOCKER_ENV_VARS+=" -e COVERAGE_BUILD=1"
+
+pushd $ROOT_PATH > /dev/null
+
+# TODO use command instead of makefile
+export DOCKER_ENV_VARS
+export DOCKER_VOLUMES
+CMD="cp -nv Makefile.template Makefile && \
+     make all install build_coverage_suite"
+./nnfw docker-run bash -c "$CMD"
+
+popd > /dev/null
diff --git a/infra/scripts/docker_build_test_x64.sh b/infra/scripts/docker_build_test_x64.sh
new file mode 100644
index 000000000..a6078b755
--- /dev/null
+++ b/infra/scripts/docker_build_test_x64.sh
@@ -0,0 +1,53 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+# mount volume (or directory) for externals
+if [ -n "$EXTERNAL_VOLUME" ]; then
+  DOCKER_VOLUMES+=" -v $EXTERNAL_VOLUME:/externals"
+  DOCKER_ENV_VARS+=" -e EXTERNAL_VOLUME=/externals"
+else
+  echo "It will use default external path"
+fi
+
+# docker image name
+if [[ -z $DOCKER_IMAGE_NAME ]]; then
+  echo "It will use default docker image name"
+fi
+
+# Mirror server setting
+if [[ -z $EXTERNAL_DOWNLOAD_SERVER ]]; then
+  echo "It will not use mirror server"
+fi
+
+pushd $ROOT_PATH > /dev/null
+
+export DOCKER_ENV_VARS
+export DOCKER_VOLUMES
+# Disable nnpackage_run build: mismatch between buildtool for CI and installed hdf5
+CMD="export OPTIONS='-DBUILD_NNPACKAGE_RUN=OFF' && \
+     cp -nv Makefile.template Makefile && \
+     make all install build_test_suite"
+./nnfw docker-run bash -c "$CMD"
+EXIT_CODE=$?
+
+if [ ${EXIT_CODE} -ne 0 ]; then
+  exit ${EXIT_CODE}
+fi
+
+# Model download server setting
+if [[ -z $MODELFILE_SERVER ]]; then
+  echo "Need model file server setting"
+  exit 1
+fi
+
+set -e
+
+export DOCKER_ENV_VARS=" -e MODELFILE_SERVER=$MODELFILE_SERVER"
+./nnfw docker-run-user bash -c "./infra/scripts/test_x64_neurun_cpu.sh"
+./nnfw docker-run-user bash -c "./infra/scripts/test_neurun_interp.sh"
+
+popd > /dev/null
diff --git a/infra/scripts/docker_build_tizen_cross.sh b/infra/scripts/docker_build_tizen_cross.sh
new file mode 100644
index 000000000..bcd0378ac
--- /dev/null
+++ b/infra/scripts/docker_build_tizen_cross.sh
@@ -0,0 +1,49 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+# prepare rootfs
+if [ ! -d $ROOTFS_DIR ]; then
+  echo "It will use default rootfs path"
+else
+  DOCKER_VOLUMES+=" -v $ROOTFS_DIR:/opt/rootfs"
+  DOCKER_ENV_VARS+=" -e ROOTFS_DIR=/opt/rootfs"
+fi
+
+# mount volume (or directory) for externals
+if [ -n "$EXTERNAL_VOLUME" ]; then
+  DOCKER_VOLUMES+=" -v $EXTERNAL_VOLUME:/externals"
+  DOCKER_ENV_VARS+=" -e EXTERNAL_VOLUME=/externals"
+else
+  echo "It will use default external path"
+fi
+
+# docker image name
+if [[ -z $DOCKER_IMAGE_NAME ]]; then
+  echo "It will use default docker image name"
+fi
+
+DOCKER_ENV_VARS+=" -e TARGET_ARCH=armv7l"
+DOCKER_ENV_VARS+=" -e CROSS_BUILD=1"
+DOCKER_ENV_VARS+=" -e TARGET_OS=tizen"
+DOCKER_ENV_VARS+=" -e BUILD_TYPE=release"
+# Disable arm compute build (use rootfs)
+DOCKER_ENV_VARS+=" -e OPTIONS=-DBUILD_ARMCOMPUTE=OFF"
+
+# Mirror server setting
+if [[ -z $EXTERNAL_DOWNLOAD_SERVER ]]; then
+  echo "It will not use mirror server"
+fi
+
+pushd $ROOT_PATH > /dev/null
+
+export DOCKER_ENV_VARS
+export DOCKER_VOLUMES
+CMD="cp -nv Makefile.template Makefile && \
+     make all install build_test_suite"
+./nnfw docker-run bash -c "$CMD"
+
+popd > /dev/null
diff --git a/infra/scripts/docker_build_tizen_gbs.sh b/infra/scripts/docker_build_tizen_gbs.sh
new file mode 100644
index 000000000..501cd3fdd
--- /dev/null
+++ b/infra/scripts/docker_build_tizen_gbs.sh
@@ -0,0 +1,29 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+GBS_RPM_DIR=$ROOT_PATH/Product/out/rpm
+mkdir -p $GBS_RPM_DIR
+DOCKER_VOLUMES=" -v $GBS_RPM_DIR:/opt/rpm"
+
+if [[ -z $DOCKER_IMAGE_NAME ]]; then
+  echo "It will use default docker image name for tizen gbs build"
+  DOCKER_IMAGE_NAME="nnfw_docker_tizen"
+fi
+
+DOCKER_ENV_VARS=" --privileged"
+
+pushd $ROOT_PATH > /dev/null
+
+CMD="gbs -c $ROOT_PATH/infra/nnfw/config/gbs.conf build \
+         -A armv7l --profile=profile.tizen --clean --include-all --define '$GBS_DEFINE' && \
+     cp -rf /home/GBS-ROOT/local/repos/tizen/armv7l/RPMS/*.rpm /opt/rpm/"
+
+export DOCKER_ENV_VARS
+export DOCKER_VOLUMES
+./nnfw docker-run bash -c "$CMD"
+
+popd > /dev/null
diff --git a/infra/scripts/docker_coverage_report.sh b/infra/scripts/docker_coverage_report.sh
new file mode 100644
index 000000000..c9bd9f1f5
--- /dev/null
+++ b/infra/scripts/docker_coverage_report.sh
@@ -0,0 +1,23 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+# docker image name
+if [[ -z $DOCKER_IMAGE_NAME ]]; then
+  echo "It will use default docker image name"
+fi
+
+set -e
+
+pushd $ROOT_PATH > /dev/null
+
+CMD="GCOV_PATH=arm-linux-gnueabihf-gcov NNAS_WORKSPACE=Product ./nnas gen-coverage-report runtimes &&
+     tar -zcf coverage/coverage_report.tar.gz coverage/html &&
+     python tools/lcov-to-cobertura-xml/lcov_cobertura.py coverage/coverage.info -o coverage/nnfw_coverage.xml"
+
+./nnfw docker-run-user bash -c "$CMD"
+
+popd > /dev/null
diff --git a/infra/scripts/test_arm_neurun_acl_cl.sh b/infra/scripts/test_arm_neurun_acl_cl.sh
new file mode 100644
index 000000000..c41862514
--- /dev/null
+++ b/infra/scripts/test_arm_neurun_acl_cl.sh
@@ -0,0 +1,36 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+# Model download server setting
+if [[ -z $MODELFILE_SERVER ]]; then
+  echo "Need model file server setting"
+  exit 1
+fi
+
+set -e
+
+pushd $ROOT_PATH > /dev/null
+
+export OP_BACKEND_ALLOPS=acl_cl
+
+cp -v ./Product/out/unittest/nnapi_gtest.skip.armv7l-linux ./Product/out/unittest/nnapi_gtest.skip
+export EXECUTOR=Linear
+source ./tests/scripts/test_driver.sh \
+        --ldlibrarypath="$ROOT_PATH/Product/out/lib" \
+        --reportdir="$ROOT_PATH/report/acl_cl" .
+
+export EXECUTOR=Dataflow
+source ./tests/scripts/test_driver.sh \
+        --ldlibrarypath="$ROOT_PATH/Product/out/lib" \
+        --reportdir="$ROOT_PATH/report/acl_cl" .
+
+export EXECUTOR=Parallel
+source ./tests/scripts/test_driver.sh \
+        --ldlibrarypath="$ROOT_PATH/Product/out/lib" \
+        --reportdir="$ROOT_PATH/report/acl_cl" .
+
+popd > /dev/null
diff --git a/infra/scripts/test_arm_neurun_acl_neon.sh b/infra/scripts/test_arm_neurun_acl_neon.sh
new file mode 100644
index 000000000..3c6e6ce02
--- /dev/null
+++ b/infra/scripts/test_arm_neurun_acl_neon.sh
@@ -0,0 +1,40 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+# Model download server setting
+if [[ -z $MODELFILE_SERVER ]]; then
+  echo "Need model file server setting"
+  exit 1
+fi
+
+set -e
+
+pushd $ROOT_PATH > /dev/null
+
+export OP_BACKEND_ALLOPS=acl_neon
+
+cp -v ./Product/out/unittest/nnapi_gtest.skip.armv7l-linux.acl_neon ./Product/out/unittest/nnapi_gtest.skip
+export EXECUTOR=Linear
+source ./tests/scripts/test_driver.sh \
+        --frameworktest_list_file=tests/scripts/neurun_frameworktest_list.armv7l.acl_neon.txt \
+        --ldlibrarypath="$ROOT_PATH/Product/out/lib" \
+        --reportdir="$ROOT_PATH/report/acl_neon" .
+
+export EXECUTOR=Dataflow
+source ./tests/scripts/test_driver.sh \
+        --frameworktest_list_file=tests/scripts/neurun_frameworktest_list.armv7l.acl_neon.txt \
+        --ldlibrarypath="$ROOT_PATH/Product/out/lib" \
+        --reportdir="$ROOT_PATH/report/acl_neon" .
+
+export EXECUTOR=Parallel
+source ./tests/scripts/test_driver.sh \
+        --frameworktest_list_file=tests/scripts/neurun_frameworktest_list.armv7l.acl_neon.txt \
+        --ldlibrarypath="$ROOT_PATH/Product/out/lib" \
+        --reportdir="$ROOT_PATH/report/acl_neon" .
+
+
+popd > /dev/null
diff --git a/infra/scripts/test_arm_neurun_cpu.sh b/infra/scripts/test_arm_neurun_cpu.sh
new file mode 100644
index 000000000..6bf48598c
--- /dev/null
+++ b/infra/scripts/test_arm_neurun_cpu.sh
@@ -0,0 +1,47 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+# Model download server setting
+if [[ -z $MODELFILE_SERVER ]]; then
+  echo "Need model file server setting"
+  exit 1
+fi
+
+set -e
+
+pushd $ROOT_PATH > /dev/null
+
+export OP_BACKEND_ALLOPS=cpu
+
+cp -v ./Product/out/unittest/nnapi_gtest.skip.armv7l-linux.cpu ./Product/out/unittest/nnapi_gtest.skip
+export EXECUTOR=Linear
+source ./tests/scripts/test_driver.sh \
+        --frameworktest_list_file=tests/scripts/neurun_frameworktest_list.armv7l.cpu.txt \
+        --ldlibrarypath="$ROOT_PATH/Product/out/lib" \
+        --reportdir="$ROOT_PATH/report/cpu" .
+
+export EXECUTOR=Dataflow
+source ./tests/scripts/test_driver.sh \
+        --frameworktest_list_file=tests/scripts/neurun_frameworktest_list.armv7l.cpu.txt \
+        --ldlibrarypath="$ROOT_PATH/Product/out/lib" \
+        --reportdir="$ROOT_PATH/report/cpu" .
+
+export EXECUTOR=Parallel
+source ./tests/scripts/test_driver.sh \
+        --frameworktest_list_file=tests/scripts/neurun_frameworktest_list.armv7l.cpu.txt \
+        --ldlibrarypath="$ROOT_PATH/Product/out/lib" \
+        --reportdir="$ROOT_PATH/report/cpu" .
+
+# Test tflite_loader
+source ./tests/scripts/test_driver.sh \
+        --frameworktest \
+        --framework_driverbin="$ROOT_PATH/Product/out/bin/tflite_loader_test_tool" \
+        --frameworktest_list_file=tests/scripts/neurun_frameworktest_list.armv7l.cpu.txt \
+        --ldlibrarypath="$ROOT_PATH/Product/out/lib" \
+        --reportdir="$ROOT_PATH/report/cpu" .
+
+popd > /dev/null
diff --git a/infra/scripts/test_arm_neurun_mixed.sh b/infra/scripts/test_arm_neurun_mixed.sh
new file mode 100644
index 000000000..7ba9d2098
--- /dev/null
+++ b/infra/scripts/test_arm_neurun_mixed.sh
@@ -0,0 +1,44 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+# Model download server setting
+if [[ -z $MODELFILE_SERVER ]]; then
+  echo "Need model file server setting"
+  exit 1
+fi
+
+set -e
+
+pushd $ROOT_PATH > /dev/null
+
+export EXECUTOR=Linear
+
+# NOTE Fixed backend assignment by type of operation
+# TODO Enhance this with randomized test
+BACKENDS=(cpu acl_cl acl_neon)
+unset OP_BACKEND_ALLOPS
+export OP_BACKEND_Conv2DNode=cpu
+export OP_BACKEND_MaxPool2DNode=acl_cl
+export OP_BACKEND_AvgPool2DNode=acl_neon
+export ACL_LAYOUT=NCHW
+
+# Get the intersect of framework test list files(each backend has a lsit)
+TESTLIST_PREFIX="tests/scripts/neurun_frameworktest_list.armv7l"
+cat $TESTLIST_PREFIX.${BACKENDS[0]}.txt | sort > $TESTLIST_PREFIX.intersect.txt
+for BACKEND in $BACKENDS; do
+    comm -12 <(sort $TESTLIST_PREFIX.intersect.txt) <(sort $TESTLIST_PREFIX.$BACKEND.txt) > $TESTLIST_PREFIX.intersect.next.txt
+    mv $TESTLIST_PREFIX.intersect.next.txt $TESTLIST_PREFIX.intersect.txt
+done
+
+# Run the test
+cp -v ./Product/out/unittest/nnapi_gtest.skip.armv7l-linux ./Product/out/unittest/nnapi_gtest.skip
+source ./tests/scripts/test_driver.sh \
+        --frameworktest_list_file=$TESTLIST_PREFIX.intersect.txt \
+        --ldlibrarypath="$ROOT_PATH/Product/out/lib/neurun:$ROOT_PATH/Product/out/lib" \
+        --reportdir="$ROOT_PATH/report/mixed" .
+
+popd > /dev/null
diff --git a/infra/scripts/test_arm_nnpkg.sh b/infra/scripts/test_arm_nnpkg.sh
new file mode 100644
index 000000000..23759a319
--- /dev/null
+++ b/infra/scripts/test_arm_nnpkg.sh
@@ -0,0 +1,24 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="${CURRENT_PATH}/../../"
+
+pushd ${ROOT_PATH} > /dev/null
+
+EXITCODE=0
+PKG_LIST=$(cat tools/nnpackage_tool/nnpkg_test/list)
+for f in ${PKG_LIST}
+do
+  tools/nnpackage_tool/nnpkg_test/nnpkg_test.sh -d -i nnpkg-tcs $f
+  EXITCODE_F=$?
+
+  if [ ${EXITCODE_F} -ne 0 ]; then
+    EXITCODE=${EXITCODE_F}
+  fi
+done
+
+popd > /dev/null
+
+exit ${EXITCODE}
diff --git a/infra/scripts/test_arm_pacl.sh b/infra/scripts/test_arm_pacl.sh
new file mode 100644
index 000000000..eb50e2610
--- /dev/null
+++ b/infra/scripts/test_arm_pacl.sh
@@ -0,0 +1,24 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+# Model download server setting
+if [[ -z $MODELFILE_SERVER ]]; then
+  echo "Need model file server setting"
+  exit 1
+fi
+
+set -e
+
+pushd $ROOT_PATH > /dev/null
+
+cp -v ./Product/out/unittest/nnapi_gtest.skip.armv7l-linux.pacl ./Product/out/unittest/nnapi_gtest.skip
+source ./tests/scripts/test_driver.sh \
+        --frameworktest_list_file=tests/scripts/pacl_frameworktest_list.armv7l-linux.txt \
+        --ldlibrarypath="$ROOT_PATH/Product/out/lib/pureacl:$ROOT_PATH/Product/out/lib" \
+        --reportdir="$ROOT_PATH/report" .
+
+popd > /dev/null
diff --git a/infra/scripts/test_coverage.sh b/infra/scripts/test_coverage.sh
new file mode 100644
index 000000000..7dd5ece28
--- /dev/null
+++ b/infra/scripts/test_coverage.sh
@@ -0,0 +1,46 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+# Model download server setting
+if [[ -z $MODELFILE_SERVER ]]; then
+  echo "Need model file server setting"
+  exit 1
+fi
+export MODELFILE_SERVER=$MODELFILE_SERVER
+
+if [[ ! -e $ROOT_PATH/tests/scripts/build_path_depth.txt ]]; then
+  echo "Cannot find prefix strip file"
+  exit 1
+fi
+
+set -e
+
+export GCOV_PREFIX_STRIP=`cat $ROOT_PATH/tests/scripts/build_path_depth.txt`
+
+pushd $ROOT_PATH > /dev/null
+
+./infra/scripts/test_arm_neurun_acl_cl.sh
+./infra/scripts/test_arm_neurun_acl_neon.sh
+./infra/scripts/test_arm_neurun_cpu.sh
+./infra/scripts/test_arm_neurun_mixed.sh
+
+# Enable all logs (acl_cl kernel)
+NEURUN_LOG_ENABLE=1 GRAPH_DOT_DUMP=1 ./infra/scripts/test_arm_neurun_acl_cl.sh
+
+# Interpreter
+./infra/scripts/test_neurun_interp.sh
+
+if [[ -e ${ROOT_PATH}/tools/nnpackage_tool/nnpkg_test/nnpkg_test.sh ]]; then
+  ./infra/scripts/test_arm_nnpkg.sh
+fi
+
+# Pack coverage test data: coverage-data.tar.gz
+find Product -type f \( -iname *.gcda -or -iname *.gcno \) > include_lists.txt
+tar -zcf coverage-data.tar.gz nnas nnfw infra runtimes tools -T include_lists.txt
+rm -rf include_lists.txt
+
+popd > /dev/null
diff --git a/infra/scripts/test_neurun_interp.sh b/infra/scripts/test_neurun_interp.sh
new file mode 100644
index 000000000..6687e8089
--- /dev/null
+++ b/infra/scripts/test_neurun_interp.sh
@@ -0,0 +1,18 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+# Model download server setting
+if [[ -z $MODELFILE_SERVER ]]; then
+  echo "Need model file server setting"
+  exit 1
+fi
+
+export DISABLE_COMPILE=1
+
+cp -v ./Product/out/unittest/nnapi_gtest.skip.noarch.interp ./Product/out/unittest/nnapi_gtest.skip
+./tests/scripts/test_driver.sh \
+  --ldlibrarypath=$ROOT_PATH/Product/out/lib --unittest .
diff --git a/infra/scripts/test_tizen_neurun_acl_cl.sh b/infra/scripts/test_tizen_neurun_acl_cl.sh
new file mode 100644
index 000000000..d09895463
--- /dev/null
+++ b/infra/scripts/test_tizen_neurun_acl_cl.sh
@@ -0,0 +1,30 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+set -e
+
+pushd $ROOT_PATH > /dev/null
+
+export OP_BACKEND_ALLOPS=acl_cl
+
+cp -v ./Product/out/unittest/nnapi_gtest.skip.armv7l-tizen ./Product/out/unittest/nnapi_gtest.skip
+export EXECUTOR=Linear
+source ./tests/scripts/test_driver.sh \
+        --ldlibrarypath="$ROOT_PATH/Product/out/lib" \
+        --reportdir="$ROOT_PATH/report/acl_cl" .
+
+export EXECUTOR=Dataflow
+source ./tests/scripts/test_driver.sh \
+        --ldlibrarypath="$ROOT_PATH/Product/out/lib" \
+        --reportdir="$ROOT_PATH/report/acl_cl" .
+
+export EXECUTOR=Parallel
+source ./tests/scripts/test_driver.sh \
+        --ldlibrarypath="$ROOT_PATH/Product/out/lib" \
+        --reportdir="$ROOT_PATH/report/acl_cl" .
+
+popd > /dev/null
diff --git a/infra/scripts/test_tizen_neurun_mixed.sh b/infra/scripts/test_tizen_neurun_mixed.sh
new file mode 100644
index 000000000..ef1781486
--- /dev/null
+++ b/infra/scripts/test_tizen_neurun_mixed.sh
@@ -0,0 +1,38 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+set -e
+
+pushd $ROOT_PATH > /dev/null
+
+export EXECUTOR=Linear
+
+# NOTE Fixed backend assignment by type of operation
+# TODO Enhance this with randomized test
+BACKENDS=(cpu acl_cl acl_neon)
+unset OP_BACKEND_ALLOPS
+export OP_BACKEND_Conv2DNode=cpu
+export OP_BACKEND_MaxPool2DNode=acl_cl
+export OP_BACKEND_AvgPool2DNode=acl_neon
+export ACL_LAYOUT=NCHW
+
+# Get the intersect of framework test list files(each backend has a lsit)
+TESTLIST_PREFIX="tests/scripts/neurun_frameworktest_list.armv7l"
+cat $TESTLIST_PREFIX.${BACKENDS[0]}.txt | sort > $TESTLIST_PREFIX.intersect.txt
+for BACKEND in $BACKENDS; do
+    comm -12 <(sort $TESTLIST_PREFIX.intersect.txt) <(sort $TESTLIST_PREFIX.$BACKEND.txt) > $TESTLIST_PREFIX.intersect.next.txt
+    mv $TESTLIST_PREFIX.intersect.next.txt $TESTLIST_PREFIX.intersect.txt
+done
+
+# Run the test
+cp -v ./Product/out/unittest/nnapi_gtest.skip.armv7l-tizen ./Product/out/unittest/nnapi_gtest.skip
+source ./tests/scripts/test_driver.sh \
+        --frameworktest_list_file=$TESTLIST_PREFIX.intersect.txt \
+        --ldlibrarypath="$ROOT_PATH/Product/out/lib/neurun:$ROOT_PATH/Product/out/lib" \
+        --reportdir="$ROOT_PATH/report/mixed" .
+
+popd > /dev/null
diff --git a/infra/scripts/test_x64_neurun_cpu.sh b/infra/scripts/test_x64_neurun_cpu.sh
new file mode 100644
index 000000000..c522ea1fb
--- /dev/null
+++ b/infra/scripts/test_x64_neurun_cpu.sh
@@ -0,0 +1,20 @@
+#!/bin/bash
+
+[[ "${BASH_SOURCE[0]}" != "${0}" ]] && echo "Please don't source ${BASH_SOURCE[0]}, execute it" && return
+
+CURRENT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+ROOT_PATH="$CURRENT_PATH/../../"
+
+# Model download server setting
+if [[ -z $MODELFILE_SERVER ]]; then
+  echo "Need model file server setting"
+  exit 1
+fi
+
+export BACKENDS=cpu
+export OP_BACKEND_ALLOPS=cpu
+
+./tests/scripts/test_driver.sh \
+  --ldlibrarypath=$ROOT_PATH/Product/out/lib \
+  --frameworktest_list_file=./tests/scripts/neurun_frameworktest_list.x86-64.cpu.txt \
+  --reportdir=$ROOT_PATH/report/ .
diff --git a/infra/scripts/tizen_xu4_test.sh b/infra/scripts/tizen_xu4_test.sh
new file mode 100644
index 000000000..19aa0297e
--- /dev/null
+++ b/infra/scripts/tizen_xu4_test.sh
@@ -0,0 +1,161 @@
+#!/bin/bash
+
+SCRIPT_ROOT="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )"
+HOST_HOME=$SCRIPT_ROOT/../..
+if [ -z "$TEST_ROOT" ]; then
+    TEST_ROOT=/opt/usr/nnfw-test
+fi
+
+function Usage()
+{
+    echo "Usage: ./tizen_xu4_test.sh --rpm-dir=path/to/rpm-dir --unittest --verification"
+    echo "Usage: ./tizen_xu4_test.sh --test-suite-path=path/to/test-suite.tar.gz --unittest --verification"
+    echo "--rpm-dir : directory containing nnfw.rpm and nnfw-test.rpm"
+    echo "--test-suite-path : filepath to test-suite.tar.gz"
+    echo "--unittest : run unittest"
+    echo "--verification : run verification"
+    echo "--framework : run framework"
+    echo "--gcov-dir : directory to save gcov files"
+}
+
+
+function prepare_rpm_test()
+{
+    echo "======= Test with rpm packages(gbs build) ======="
+    # clean up
+    $SDB_CMD shell rm -rf $TEST_ROOT
+    $SDB_CMD shell mkdir -p $TEST_ROOT
+    # install nnfw nnfw-test rpms
+    for file in $RPM_DIR/*
+    do
+        $SDB_CMD push $file $TEST_ROOT
+        $SDB_CMD shell rpm -Uvh $TEST_ROOT/$(basename $file) --force --nodeps
+    done
+
+    # download tflite model files
+    pushd $HOST_HOME
+    tests/framework/run_test.sh --download=on
+    find tests -name "*.zip" -exec rm {} \;
+    tar -zcf cache.tar.gz tests/framework/cache
+    $SDB_CMD push cache.tar.gz $TEST_ROOT/.
+    rm -rf cache.tar.gz
+    $SDB_CMD shell tar -zxf $TEST_ROOT/cache.tar.gz -C $TEST_ROOT
+}
+
+function prepare_suite_test()
+{
+    echo "======= Test with test-suite(cross build) ======="
+    # clean up
+    $SDB_CMD shell rm -rf $TEST_ROOT
+    $SDB_CMD shell mkdir -p $TEST_ROOT
+
+    # install test-suite
+    $SDB_CMD push $TEST_SUITE_PATH $TEST_ROOT/$(basename $TEST_SUITE_PATH)
+    $SDB_CMD shell tar -zxf $TEST_ROOT/$(basename $TEST_SUITE_PATH) -C $TEST_ROOT
+
+    # download tflite model files
+    pushd $HOST_HOME
+    tests/framework/run_test.sh --download=on
+    find tests -name "*.zip" -exec rm {} \;
+    tar -zcf cache.tar.gz tests/framework/cache
+    $SDB_CMD push cache.tar.gz $TEST_ROOT/.
+    rm -rf cache.tar.gz
+    $SDB_CMD shell tar -zxf $TEST_ROOT/cache.tar.gz -C $TEST_ROOT
+}
+
+
+# Parse command argv
+for i in "$@"
+do
+    case $i in
+        -h|--help|help)
+            Usage
+            exit 1
+            ;;
+        --rpm-dir=*)
+            RPM_DIR=${i#*=}
+            ;;
+        --test-suite-path=*)
+            TEST_SUITE_PATH=${i#*=}
+            ;;
+        --unittest)
+            UNITTEST=on
+            ;;
+        --verification)
+            VERIFICATION=on
+            ;;
+        --framework)
+            FRAMEWORK=on
+            ;;
+        --gcov-dir=*)
+            GCOV_DIR=${i#*=}
+            ;;
+    esac
+    shift
+done
+
+
+N=`sdb devices 2>/dev/null | wc -l`
+
+# exit if no device found
+if [[ $N -le 1 ]]; then
+    echo "No device found."
+    exit 1;
+fi
+
+NUM_DEV=$(($N-1))
+echo "device list"
+DEVICE_LIST=`sdb devices 2>/dev/null`
+echo "$DEVICE_LIST" | tail -n"$NUM_DEV"
+
+if [ -z "$SERIAL" ]; then
+    SERIAL=`echo "$DEVICE_LIST" | tail -n1 | awk '{print $1}'`
+fi
+SDB_CMD="sdb -s $SERIAL "
+
+# root on, remount as rw
+$SDB_CMD root on
+$SDB_CMD shell mount -o rw,remount /
+
+SCRIPT_ROOT="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )"
+ROOT=$SCRIPT_ROOT/../
+
+if [ -z "$RPM_DIR" ] && [ -z "$TEST_SUITE_PATH" ]; then
+    echo "Please provide --rpm-dir or --test-suite-path"
+    exit 255
+fi
+
+if [ ! -z "$RPM_DIR" ]; then
+    prepare_rpm_test
+else
+    prepare_suite_test
+fi
+
+# For tizen, we run acl_cl and mixed test
+$SDB_CMD shell /bin/bash -c "IGNORE_MD5=1 $TEST_ROOT/infra/scripts/test_tizen_neurun_acl_cl.sh"
+$SDB_CMD shell /bin/bash -c "IGNORE_MD5=1 $TEST_ROOT/infra/scripts/test_tizen_neurun_mixed.sh"
+
+# run unittest
+if [ "$UNITTEST" == "on" ]; then
+    $SDB_CMD shell $TEST_ROOT/tests/scripts/test_driver.sh --unittest --artifactpath=$TEST_ROOT
+fi
+
+# run framework test
+if [ "$FRAMEWORK" == "on" ]; then
+    $SDB_CMD shell $TEST_ROOT/tests/scripts/test_driver.sh --frameworktest --artifactpath=$TEST_ROOT
+fi
+
+# run verification
+if [ "$VERIFICATION" == "on" ]; then
+    $SDB_CMD shell $TEST_ROOT/tests/scripts/test_driver.sh --verification --artifactpath=$TEST_ROOT
+fi
+
+# pull gcov files
+if [ -n "$GCOV_DIR" ]; then
+    $SDB_CMD shell 'rm -rf /home/gcov && mkdir -p /home/gcov'
+    $SDB_CMD shell 'find / -type f \( -iname "*.gcda" -or -iname "*.gcno" \) -exec cp {} /home/gcov/. \;'
+    $SDB_CMD shell 'cd /home/ && tar -zcvf gcov.tar.gz ./gcov '
+    cd $GCOV_DIR
+    sdb pull /home/gcov.tar.gz
+    tar -zxvf gcov.tar.gz
+fi
diff --git a/libs/ARMComputeEx/CMakeLists.txt b/libs/ARMComputeEx/CMakeLists.txt
deleted file mode 100644
index 2483fb55d..000000000
--- a/libs/ARMComputeEx/CMakeLists.txt
+++ /dev/null
@@ -1,21 +0,0 @@
-if("${TARGET_ARCH}" STREQUAL "x86_64")
-  return()
-endif()
-
-nnfw_find_package(ARMCompute REQUIRED)
-
-set(ACL_EX_BASE ${CMAKE_SOURCE_DIR}/libs/ARMComputeEx)
-
-file(GLOB_RECURSE ACL_EX_SRCS "${ACL_EX_BASE}/*.cpp")
-
-# generate embeded cl_kernel
-execute_process (
-    WORKING_DIRECTORY "${CMAKE_SOURCE_DIR}/libs/ARMComputeEx"
-    COMMAND bash -c "python resolve_includes.py"
-)
-
-add_library(arm_compute_ex SHARED ${ACL_EX_SRCS})
-set_target_properties(arm_compute_ex PROPERTIES COMPILE_FLAGS "-DEMBEDDED_KERNELS=1")
-target_include_directories(arm_compute_ex PUBLIC ${CMAKE_SOURCE_DIR}/libs/ARMComputeEx)
-target_link_libraries(arm_compute_ex arm_compute_core)
-install(TARGETS arm_compute_ex DESTINATION lib)
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/OpenCLEx.h b/libs/ARMComputeEx/arm_compute/core/CL/OpenCLEx.h
deleted file mode 100644
index dbda354d6..000000000
--- a/libs/ARMComputeEx/arm_compute/core/CL/OpenCLEx.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation the
- * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-#ifndef __ARM_COMPUTE_OPENCLEX_H__
-#define __ARM_COMPUTE_OPENCLEX_H__
-
-#include <string>
-#include <utility>
-
-/* Configure the Khronos C++ wrapper to target OpenCL 1.2: */
-#ifndef ARM_COMPUTE_NO_EXCEPTIONS
-#define CL_HPP_ENABLE_EXCEPTIONS
-#endif // ARM_COMPUTE_NO_EXCEPTIONS
-#define CL_HPP_CL_1_2_DEFAULT_BUILD
-#define CL_HPP_TARGET_OPENCL_VERSION 110
-#define CL_HPP_MINIMUM_OPENCL_VERSION 110
-#include <CL/cl2.hpp>
-
-namespace arm_compute
-{
-/** Class for loading OpenCL symbols. */
-class CLSymbolsEx final
-{
-private:
-  CLSymbolsEx() = default;
-  void load_symbols(void *handle);
-
-public:
-  /** Get the static instance of CLSymbols.
-   *
-   * @return The static instance of CLSymbols.
-   */
-  static CLSymbolsEx &get();
-  /** Load symbols from the given OpenCL library path.
-   *
-   * @param[in] library Path to the OpenCL library.
-   *
-   * @return True if loading the library is successful.
-   */
-  bool load(const std::string &library);
-  /** Load symbols from any of the default OpenCL library names.
-   *
-   * @return True if loading any library is successful.
-   */
-  bool load_default();
-
-#define DECLARE_FUNCTION_PTR(func_name) std::function<decltype(func_name)> func_name##_ptr = nullptr
-
-  DECLARE_FUNCTION_PTR(clGetEventInfo);
-  DECLARE_FUNCTION_PTR(clSetEventCallback);
-
-#undef DECLARE_FUNCTION_PTR
-
-private:
-  std::pair<bool, bool> _loaded{false, false};
-};
-} // namespace arm_compute
-#endif /* __ARM_COMPUTE_OPENCLEX_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLActivationLayerExKernel.h b/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLActivationLayerExKernel.h
deleted file mode 100644
index 080cc47ef..000000000
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLActivationLayerExKernel.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_CLACTIVATIONLAYEREXKERNEL_H__
-#define __ARM_COMPUTE_CLACTIVATIONLAYEREXKERNEL_H__
-
-#include "arm_compute/core/CL/ICLKernel.h"
-#include "arm_compute/core/TypesEx.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/** Interface for the activation layer kernel. */
-class CLActivationLayerExKernel : public ICLKernel
-{
-public:
-  /** Default constructor */
-  CLActivationLayerExKernel();
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  CLActivationLayerExKernel(const CLActivationLayerExKernel &) = delete;
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  CLActivationLayerExKernel &operator=(const CLActivationLayerExKernel &) = delete;
-  /** Allow instances of this class to be moved */
-  CLActivationLayerExKernel(CLActivationLayerExKernel &&) = default;
-  /** Allow instances of this class to be moved */
-  CLActivationLayerExKernel &operator=(CLActivationLayerExKernel &&) = default;
-  /** Default destructor */
-  ~CLActivationLayerExKernel() = default;
-  /** Set the input and output tensor.
-   *
-   * @note If the output tensor is a nullptr, the activation function will be performed in-place
-   *
-   * @param[in, out] input    Source tensor. In case of @p output tensor = nullptr, this tensor will
-   * store the result
-   *                          of the activation function. Data types supported:
-   * QASYMM8/F16/F32.
-   * @param[out]     output   Destination tensor. Data type supported: same as @p input
-   * @param[in]      act_info Activation layer information.
-   */
-  void configure(ICLTensor *input, ICLTensor *output, ActivationLayerInfoEx act_info);
-  /** Static function to check if given info will lead to a valid configuration of @ref
-   * CLActivationLayerKernel
-   *
-   * @param[in] input    Source tensor info. In case of @p output tensor info = nullptr, this tensor
-   * will store the result
-   *                     of the activation function. Data types supported: QASYMM8/F16/F32.
-   * @param[in] output   Destination tensor info. Data type supported: same as @p input
-   * @param[in] act_info Activation layer information.
-   *
-   * @return a status
-   */
-  static Status validate(const ITensorInfo *input, const ITensorInfo *output,
-                         const ActivationLayerInfoEx &act_info);
-
-  // Inherited methods overridden:
-  void run(const Window &window, cl::CommandQueue &queue) override;
-
-private:
-  ICLTensor *_input;
-  ICLTensor *_output;
-  bool _run_in_place;
-};
-} // namespace arm_compute
-#endif /*__ARM_COMPUTE_CLACTIVATIONLAYEREXKERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLArgMinMaxKernel.h b/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLArgMinMaxKernel.h
deleted file mode 100644
index b91a26159..000000000
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLArgMinMaxKernel.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file CLArgMinMaxKernel.h
- * @brief This file defines CLArgMinMaxKernel
- * @ingroup COM_AI_RUNTIME
- */
-
-#ifndef __ARM_COMPUTE_CLARG_MIN_MAX_KERNEL_H__
-#define __ARM_COMPUTE_CLARG_MIN_MAX_KERNEL_H__
-
-#include "arm_compute/core/CL/ICLKernel.h"
-#include "arm_compute/core/TypesEx.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/**
- * @brief Class to define interface for the argminmax max kernel.
- */
-class CLArgMinMaxKernel : public ICLKernel
-{
-public:
-  /**
-   * @brief Default constructor.
-   */
-  CLArgMinMaxKernel();
-  /**
-   * @brief Prevent instances of this class from being copied (As this class contains pointers).
-   * @param [in] copiedInstance Const reference of CLArgMinMaxKernel to be copied
-   */
-  CLArgMinMaxKernel(const CLArgMinMaxKernel &) = delete;
-  /**
-   * @brief Prevent instances of this class from being copied (As this class contains pointers).
-   * @param [in] copiedInstance Const reference of CLArgMinMaxKernel to be copied
-   * @return Reference of this instance
-   */
-  CLArgMinMaxKernel &operator=(const CLArgMinMaxKernel &) = delete;
-  /**
-   * @brief Allow instances of this class to be moved
-   * @param [in] movedInstance Rvalue reference of CLArgMinMaxKernel to be moved
-   */
-  CLArgMinMaxKernel(CLArgMinMaxKernel &&) = default;
-  /**
-   * @brief Allow instances of this class to be moved
-   * @param [in] movedInstance Rvalue reference of CLArgMinMaxKernel to be moved
-   * @return Reference of this instance
-   */
-  CLArgMinMaxKernel &operator=(CLArgMinMaxKernel &&) = default;
-  /**
-   * @brief Initialise the kernel's input, output and border mode.
-   * @param[in]  input          An input tensor. Data types supported: U8/QASYMM8/S32/F32.
-   * @param[out] output         The output tensor, Data types supported: same as @p input.
-   * @param[in]  argminmax_axis    Axis to argminmax
-   * return N/A
-   */
-  void configure(const ICLTensor *input, ICLTensor *output, const uint32_t argminmax_axis,
-                 ArgOperation op);
-  /**
-   * @brief Static function to check if given info will lead to a valid configuration of @ref
-   * CLArgMinMaxKernel
-   * @param[in] input           An input tensor info. Data types supported: U8/QASYMM8/S32/F32.
-   * @param[in] output          The output tensor info, Data types supported: same as @p input1.
-   * @param[in] argminmax_axis     Axis to argminmax
-   * @return a status
-   */
-  static Status validate(const ITensorInfo *input, const ITensorInfo *output,
-                         const uint32_t argminmax_axis, ArgOperation op);
-
-  /*
-   * @brief Run CLArgMinMaxKernel op
-   * @param[in] window  Window to be used for in_slice
-   * @param[in] queue   cl::CommandQueue
-   * @return N/A
-   */
-  void run(const Window &window, cl::CommandQueue &queue) override;
-  /*
-   * @brief Run CLArgMinMaxKernel op on CPU
-   * @param[in] queue   cl::CommandQueue
-   * @return N/A
-   */
-  void run_on_cpu(cl::CommandQueue &queue);
-
-private:
-  const ICLTensor *_input;
-  ICLTensor *_output;
-  uint32_t _argminmax_axis;
-};
-} // namespace arm_compute
-#endif /*__ARM_COMPUTE_CLargminmaxMAXKERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLArithmeticSubtractionExKernel.h b/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLArithmeticSubtractionExKernel.h
deleted file mode 100644
index 9a765f310..000000000
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLArithmeticSubtractionExKernel.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_CLARITHMETICSUBTRACTIONEXKERNEL_H__
-#define __ARM_COMPUTE_CLARITHMETICSUBTRACTIONEXKERNEL_H__
-
-#include "arm_compute/core/CL/ICLKernel.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/** Interface for the arithmetic subtraction kernel (support broadcasting)
- *
- * Arithmetic subtraction is computed by:
- * @f[ output(x,y) = input1(x,y) - input2(x,y) @f]
- */
-class CLArithmeticSubtractionExKernel : public ICLKernel
-{
-public:
-  /** Default constructor */
-  CLArithmeticSubtractionExKernel();
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  CLArithmeticSubtractionExKernel(const CLArithmeticSubtractionExKernel &) = delete;
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  CLArithmeticSubtractionExKernel &operator=(const CLArithmeticSubtractionExKernel &) = delete;
-  /** Allow instances of this class to be moved */
-  CLArithmeticSubtractionExKernel(CLArithmeticSubtractionExKernel &&) = default;
-  /** Allow instances of this class to be moved */
-  CLArithmeticSubtractionExKernel &operator=(CLArithmeticSubtractionExKernel &&) = default;
-  /** Default destructor */
-  ~CLArithmeticSubtractionExKernel() = default;
-
-  /** Initialise the kernel's inputs, output and convertion policy.
-   *
-   * @param[in]  input1 First tensor input. Data types supported: U8/S16/F16/F32.
-   * @param[in]  input2 Second tensor input. Data types supported: U8/S16/F16/F32.
-   * @param[out] output Output tensor. Data types supported: U8 (Only if both inputs are U8),
-   * S16/F16/F32.
-   * @param[in]  policy Policy to use to handle overflow.
-   */
-  void configure(const ICLTensor *input1, const ICLTensor *input2, ICLTensor *output,
-                 ConvertPolicy policy);
-  /** Static function to check if given info will lead to a valid configuration of @ref
-   * CLArithmeticSubtractionExKernel
-   *
-   * @param[in] input1 First tensor input info. Data types supported: U8/S16/F16/F32.
-   * @param[in] input2 Second tensor input info. Data types supported: U8/S16/F16/F32.
-   * @param[in] output Output tensor info. Data types supported: U8 (Only if both inputs are U8),
-   * S16/F16/F32.
-   * @param[in] policy Policy to use to handle overflow.
-   *
-   * @return a status
-   */
-  static Status validate(const ITensorInfo *input1, const ITensorInfo *input2,
-                         const ITensorInfo *output, ConvertPolicy policy);
-
-  // Inherited methods overridden:
-  void run(const Window &window, cl::CommandQueue &queue) override;
-  BorderSize border_size() const override;
-
-private:
-  const ICLTensor *_input1; /**< Source tensor 1 */
-  const ICLTensor *_input2; /**< Source tensor 2 */
-  ICLTensor *_output;       /**< Destination tensor */
-};
-} // namespace arm_compute
-#endif /* __ARM_COMPUTE_CLARITHMETICSUBTRACTIONEXKERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLBatchToSpaceNDKernel.h b/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLBatchToSpaceNDKernel.h
deleted file mode 100644
index 1387897c9..000000000
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLBatchToSpaceNDKernel.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_CLBATCH_TO_SPACE_ND_KERNEL_H__
-#define __ARM_COMPUTE_CLBATCH_TO_SPACE_ND_KERNEL_H__
-
-#include "arm_compute/core/CL/ICLKernel.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/** OpenCL kernel to perform BATCH_TO_SPACE_ND operation */
-class CLBatchToSpaceNDKernel : public ICLKernel
-{
-public:
-  /** Default constructor */
-  CLBatchToSpaceNDKernel();
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  CLBatchToSpaceNDKernel(const CLBatchToSpaceNDKernel &) = delete;
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  CLBatchToSpaceNDKernel &operator=(const CLBatchToSpaceNDKernel &) = delete;
-  /** Allow instances of this class to be moved */
-  CLBatchToSpaceNDKernel(CLBatchToSpaceNDKernel &&) = default;
-  /** Allow instances of this class to be moved */
-  CLBatchToSpaceNDKernel &operator=(CLBatchToSpaceNDKernel &&) = default;
-  /** Default destructor */
-  ~CLBatchToSpaceNDKernel() = default;
-  /** Initialise the kernel's input and output.
-   *
-   * @param[in]  input  Input tensor. Data types supported: U8/QASYMM8/S16/S32/F16/F32.
-   * @param[in]  output Output tensor. Data types supported: U8/QASYMM8/S16/S32/F16/F32.
-   */
-  void configure(const ICLTensor *input, ICLTensor *output, const int32_t *block_size);
-
-  // Inherited methods overridden:
-  void run(const Window &window, cl::CommandQueue &queue) override;
-
-private:
-  const ICLTensor *_input; /**< Source tensor */
-  ICLTensor *_output;      /**< Destination tensor */
-};
-
-} // namespace arm_compute
-#endif /* __ARM_COMPUTE_CLSPACE_TO_BATCH_ND_KERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLComparisonOpKernel.h b/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLComparisonOpKernel.h
deleted file mode 100644
index f5f455993..000000000
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLComparisonOpKernel.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_CLCOMPARISON_OP_KERNEL_H__
-#define __ARM_COMPUTE_CLCOMPARISON_OP_KERNEL_H__
-
-#include "arm_compute/core/CL/ICLKernel.h"
-#include "arm_compute/core/TypesEx.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/** OpenCL kernel to check if values in both tensors are equal*/
-class CLComparisonOpKernel : public ICLKernel
-{
-public:
-  /** Default constructor */
-  CLComparisonOpKernel();
-  /** Prevent instances of this class from being copied (As this class contains pointers). */
-  CLComparisonOpKernel(const CLComparisonOpKernel &) = delete;
-  /** Prevent instances of this class from being copied (As this class contains pointers). */
-  CLComparisonOpKernel &operator=(const CLComparisonOpKernel &) = delete;
-  /** Allow instances of this class to be moved */
-  CLComparisonOpKernel(CLComparisonOpKernel &&) = default;
-  /** Allow instances of this class to be moved */
-  CLComparisonOpKernel &operator=(CLComparisonOpKernel &&) = default;
-  /** Initialize the kernel's input, output.
-   *
-   * @param[in]  input1  Source tensor1.
-   * @param[in]  input2  Source tensor2.
-   * @param[out] output  Output tensor.
-   */
-  void configure(const ICLTensor *input1, const ICLTensor *input2, ICLTensor *output,
-                 const ComparisonOperation &op);
-
-  // Inherited methods overridden:
-  void run(const Window &window, cl::CommandQueue &queue) override;
-
-  BorderSize border_size() const override;
-
-private:
-  const ICLTensor *_input1;
-  const ICLTensor *_input2;
-  ICLTensor *_output;
-};
-} // namespace arm_compute
-#endif /*__ARM_COMPUTE_CLCOMPARISON_OP_KERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLExpKernel.h b/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLExpKernel.h
deleted file mode 100644
index a6ea539f8..000000000
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLExpKernel.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_CLEXPKERNEL_H__
-#define __ARM_COMPUTE_CLEXPKERNEL_H__
-
-#include "arm_compute/core/CL/ICLKernel.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/** OpenCL kernel to perform an exponential operation */
-class CLExpKernel : public ICLKernel
-{
-public:
-  /** Default constructor */
-  CLExpKernel();
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  CLExpKernel(const CLExpKernel &) = delete;
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  CLExpKernel &operator=(const CLExpKernel &) = delete;
-  /** Allow instances of this class to be moved */
-  CLExpKernel(CLExpKernel &&) = default;
-  /** Allow instances of this class to be moved */
-  CLExpKernel &operator=(CLExpKernel &&) = default;
-  /** Default destructor */
-  ~CLExpKernel() = default;
-  /** Set the source, destination of the kernel
-   *
-   * @param[in]  input  Source tensor. Data type supported: F32.
-   * @param[out] output Destination tensor. Data type supported: F32.
-   */
-  void configure(const ICLTensor *input, ICLTensor *output);
-
-  // Inherited methods overridden:
-  void run(const Window &window, cl::CommandQueue &queue) override;
-
-private:
-  const ICLTensor *_input;
-  ICLTensor *_output;
-};
-} // namespace arm_compute
-#endif /*__ARM_COMPUTE_CLEXPKERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLGatherKernel.h b/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLGatherKernel.h
deleted file mode 100644
index 7e35a80b0..000000000
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLGatherKernel.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file      CLGatherKernel.h
- * @ingroup   COM_AI_RUNTIME
- * @brief     This file defines CLGatherKernel class
- */
-
-#ifndef __ARM_COMPUTE_CLGATHERKERNEL_H__
-#define __ARM_COMPUTE_CLGATHERKERNEL_H__
-
-#include "arm_compute/core/CL/ICLKernel.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/**
- * @brief Class to define an interface for the gather kernel.
- */
-class CLGatherKernel : public ICLKernel
-{
-public:
-  /**
-   * @brief Construct CLGatherKernel object
-   * */
-  CLGatherKernel();
-
-  /**
-   * @brief Prevent instances of this class from being copied (As this class contains pointers).
-   */
-  CLGatherKernel(const CLGatherKernel &) = delete;
-
-  /**
-   * @brief Prevent instances of this class from being copied (As this class contains pointers).
-   */
-  CLGatherKernel &operator=(const CLGatherKernel &) = delete;
-
-  /**
-   * @brief Construct CLGatherKernel object by using default move constructor
-   * @param[in] CLGatherKernel object to move
-   */
-  CLGatherKernel(CLGatherKernel &&) = default;
-
-  /**
-   * @brief Move assignment operator
-   * @param[in] CLGatherKernel object to move
-   */
-  CLGatherKernel &operator=(CLGatherKernel &&) = default;
-
-  /**
-   * @brief Initialise the kernel's input, output and border mode.
-   * @param[in]  input1          An input tensor. Data types supported: U8/S32/F32.
-   * @param[in]  input2          An input tensor. Data types supported: S32.
-   * @param[out] output          The output tensor, Data types supported: same as @p input1.
-   * @return N/A
-   */
-  void configure(const ICLTensor *input1, const ICLTensor *input2, ICLTensor *output);
-
-  /**
-   * @brief Static function to check if given info will lead to a valid configuration of @ref
-   * CLGatherKernel
-   * @param[in]  input1          An input tensor. Data types supported: U8/S32/F32.
-   * @param[in]  input2          An input tensor. Data types supported: S32.
-   * @param[out] output          The output tensor, Data types supported: same as @p input1.
-   * @return a status
-   */
-  static Status validate(const ITensorInfo *input1, const ITensorInfo *input2,
-                         const ITensorInfo *output);
-
-  /**
-   * @brief Enqueue the OpenCL kernel to process the given window on the passed OpenCL command
-   *        queue.
-   * @note  The queue is *not* flushed by this method, and therefore the kernel will not have
-   *        been executed by the time this method returns.
-   * @param[in] window      Region on which to execute the kernel. (Must be a valid region of
-   *                        the window returned by window()).
-   * @param[in,out] queue   Command queue on which to enqueue the kernel.@return N/A
-   * @return N/A
-   */
-  void run(const Window &window, cl::CommandQueue &queue) override;
-
-private:
-  const ICLTensor *_input1;
-  const ICLTensor *_input2;
-  ICLTensor *_output;
-};
-} // namespace arm_compute
-#endif /*__ARM_COMPUTE_CLGATHERKERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLHashtableLookupKernel.h b/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLHashtableLookupKernel.h
deleted file mode 100644
index c3fc15637..000000000
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLHashtableLookupKernel.h
+++ /dev/null
@@ -1,129 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file      CLHashtableLookupKernel.h
- * @ingroup   COM_AI_RUNTIME
- * @brief     This file defines CLHashtableLookupKernel class
- */
-
-#ifndef __ARM_COMPUTE_CLHASHTABLELOOKUPKERNEL_H__
-#define __ARM_COMPUTE_CLHASHTABLELOOKUPKERNEL_H__
-
-#include "arm_compute/core/CL/ICLKernel.h"
-#include "arm_compute/runtime/CL/CLTensor.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/**
-* @brief Class to perform HashtableLookup operation with opencl kernel
-*/
-class CLHashtableLookupKernel : public ICLKernel
-{
-public:
-  /**
-   * @brief Construct a CLHashtableLookupKernel object
-   * */
-  CLHashtableLookupKernel();
-
-  /**
-   * @brief Prevent instances of this class from being copied (As this class contains pointers)
-   * */
-  CLHashtableLookupKernel(const CLHashtableLookupKernel &) = delete;
-
-  /**
-   * @brief Prevent instances of this class from being copied (As this class contains pointers)
-   * */
-  CLHashtableLookupKernel &operator=(const CLHashtableLookupKernel &) = delete;
-
-  /**
-   * @brief Construct a CLHashtableLookupKernel object by using default move constructor
-   * @param[in] CLHashtableLookupKernel object to move
-   * */
-  CLHashtableLookupKernel(CLHashtableLookupKernel &&) = default;
-
-  /**
-   * @brief Move assignment operator
-   * @param[in] CLHashtableLookupKernel object to move
-   * */
-  CLHashtableLookupKernel &operator=(CLHashtableLookupKernel &&) = default;
-
-  /**
-   * @brief Destruct this object
-   * */
-  ~CLHashtableLookupKernel() = default;
-
-  /**
-   * @brief Set the input and output of the kernel
-   * @param[in]  lookups  Lookups 1D tensor that values are indices into the first dimension of
-   *                      input.
-   * @param[in]  keys     Keys 1D tensor. keys and input pair represent a map.
-   *                      Data types supported: S32
-   * @param[in]  input    Source tensor.
-   *                      Data types supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32
-   * @param[out] output   Destination tensor. Data types and data layouts supported: Same as @p
-   *                      input.
-   * @param[out] hits     Hits 1D tensor. A boolean tensor that indicates whether the lookup hits
-   *                      (True) or not (False). Data types supported: U8/QASYMM8
-   * @return N/A
-   */
-  void configure(const ICLTensor *lookups, const ICLTensor *keys, const ICLTensor *input,
-                 ICLTensor *output, ICLTensor *hits);
-
-  /**
-   * @brief Static function to check if given info will lead to a valid configuration of @ref
-   *        CLHashtableLookupKernel
-   * @param[in]  lookups  The lookups tensor info. Data types supported: S32.
-   * @param[in]  keys     The keys tensor info. keys and input pair represent a map.
-   *                      Data types supported: S32
-   * @param[in]  input    The input tensor info.
-   *                      Data types supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32
-   * @param[out] output   The output tensor. Data types and data layouts supported: Same as @p
-   *                      input.
-   * @param[out] hits     The hits tensor info. A boolean tensor that indicates whether the lookup
-   *                      hits
-   *                      (True) or not (False). Data types supported: U8/QASYMM8
-   * @return a status
-   */
-  static Status validate(const ITensorInfo *lookups, const ITensorInfo *keys,
-                         const ITensorInfo *input, const ITensorInfo *output,
-                         const ITensorInfo *hits);
-
-  /**
-   * @brief Enqueue the OpenCL kernel to process the given window on the passed OpenCL command
-   *        queue.
-   * @note  The queue is *not* flushed by this method, and therefore the kernel will not have
-   *        been executed by the time this method returns.
-   * @param[in]     window  Region on which to execute the kernel. (Must be a valid region of
-   *                        the window returned by window()).
-   * @param[in,out] queue   Command queue on which to enqueue the kernel.@return N/A
-   * @return N/A
-   */
-  void run(const Window &window, cl::CommandQueue &queue) override;
-
-private:
-  const ICLTensor *_lookups;                          /** Lookups tensor */
-  const ICLTensor *_keys;                             /** Keys tensor */
-  const ICLTensor *_input;                            /** Source tensor */
-  ICLTensor *_output;                                 /** Destination tensor */
-  ICLTensor *_hits;                                   /** Hits tensor */
-  std::unique_ptr<CLTensor> _lookup_indices{nullptr}; /** Lookup indices tensor */
-};
-} // namespace arm_compute
-#endif /*__ARM_COMPUTE_CLHASHTABLELOOKUPKERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLNormalizationLayerExKernel.h b/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLNormalizationLayerExKernel.h
deleted file mode 100644
index 181a6226a..000000000
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLNormalizationLayerExKernel.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_CLNORMALIZATIONLAYEREXKERNEL_H__
-#define __ARM_COMPUTE_CLNORMALIZATIONLAYEREXKERNEL_H__
-
-#include "arm_compute/core/CL/ICLKernel.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/** Interface for the normalization layer kernel.
- */
-class CLNormalizationLayerExKernel : public ICLKernel
-{
-public:
-  /** Constructor */
-  CLNormalizationLayerExKernel();
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  CLNormalizationLayerExKernel(const CLNormalizationLayerExKernel &) = delete;
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  CLNormalizationLayerExKernel &operator=(const CLNormalizationLayerExKernel &) = delete;
-  /** Default Move Constructor. */
-  CLNormalizationLayerExKernel(CLNormalizationLayerExKernel &&) = default;
-  /** Default move assignment operator */
-  CLNormalizationLayerExKernel &operator=(CLNormalizationLayerExKernel &&) = default;
-  /** Set the input and output tensors.
-   *
-   * @param[in]  input     Source tensor. 3 lower dims represent a single input with dimensions
-   * [width, height, IFM],
-   *                       and an optional 4th dimension for batch of inputs. Data types supported:
-   * F16/F32.
-   * @param[out] output    Destination tensor. Output will have the same number of dimensions as
-   * input. Data types supported: same as @p input.
-   * @param[in]  norm_info Normalization layer information like the normalization type,
-   * normalization size and other parameters.
-   */
-  void configure(const ICLTensor *input, ICLTensor *output, NormalizationLayerInfo norm_info);
-  /** Static function to check if given info will lead to a valid configuration of @ref
-   * CLNormalizationLayerKernel
-   *
-   * @param[in] input     Source tensor. 3 lower dims represent a single input with dimensions
-   * [width, height, IFM],
-   *                      and an optional 4th dimension for batch of inputs. Data types supported:
-   * F16/F32.
-   * @param[in] output    Destination tensor. Output will have the same number of dimensions as
-   * input. Data types supported: same as @p input.
-   * @param[in] norm_info Normalization layer information like the normalization type, normalization
-   * size and other parameters.
-   *
-   * @return a status
-   */
-  static Status validate(const ITensorInfo *input, const ITensorInfo *output,
-                         NormalizationLayerInfo norm_info);
-
-  // Inherited methods overridden:
-  void run(const Window &window, cl::CommandQueue &queue) override;
-  BorderSize border_size() const override;
-
-private:
-  const ICLTensor *_input;
-  ICLTensor *_output;
-  BorderSize _border_size;
-  bool _is_in_map;
-};
-} // namespace arm_compute
-#endif /*__ARM_COMPUTE_CLNORMALIZATIONLAYEREXKERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLPadLayerKernel.h b/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLPadLayerKernel.h
deleted file mode 100644
index cbaa2adee..000000000
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLPadLayerKernel.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
-* Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
-* Copyright (c) 2016-2018 ARM Limited.
-*
-* Licensed under the Apache License, Version 2.0 (the "License");
-* you may not use this file except in compliance with the License.
-* You may obtain a copy of the License at
-*
-*      http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing, software
-* distributed under the License is distributed on an "AS IS" BASIS,
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-* See the License for the specific language governing permissions and
-* limitations under the License.
-*/
-#ifndef __ARM_COMPUTE_CLPADLAYERKERNEL_H__
-#define __ARM_COMPUTE_CLPADLAYERKERNEL_H__
-
-#include "arm_compute/core/CL/ICLKernel.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/** OpenCL kernel to perform PAD operation */
-class CLPadLayerKernel : public ICLKernel
-{
-public:
-  /** Default constructor */
-  CLPadLayerKernel();
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  CLPadLayerKernel(const CLPadLayerKernel &) = delete;
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  CLPadLayerKernel &operator=(const CLPadLayerKernel &) = delete;
-  /** Allow instances of this class to be moved */
-  CLPadLayerKernel(CLPadLayerKernel &&) = default;
-  /** Allow instances of this class to be moved */
-  CLPadLayerKernel &operator=(CLPadLayerKernel &&) = default;
-  /** Default destructor */
-  ~CLPadLayerKernel() = default;
-  /** Initialise the kernel's input and output.
-   *
-   * @param[in]  input  Input tensor. Data types supported: U8/QASYMM8/S16/S32/F16/F32.
-   * @param[in]  output Output tensor. Data types supported: U8/QASYMM8/S16/S32/F16/F32.
-   * @param[in]  pad_size Padding Size tensor. Data types supported : S32
-   */
-  void configure(const ICLTensor *input, ICLTensor *output, ICLTensor *pad_size);
-
-  // Inherited methods overridden:
-  void run(const Window &window, cl::CommandQueue &queue) override;
-
-private:
-  const ICLTensor *_input; /**< Source tensor */
-  ICLTensor *_output;      /**< Destination tensor */
-  ICLTensor *_pad_size;    /**< Padding Size tensor */
-};
-
-} // namespace arm_compute
-#endif /* __ARM_COMPUTE_CLPADLAYERKERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLPermuteExKernel.h b/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLPermuteExKernel.h
deleted file mode 100644
index 3434deee8..000000000
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLPermuteExKernel.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_CLPERMUTEEXKERNEL_H__
-#define __ARM_COMPUTE_CLPERMUTEEXKERNEL_H__
-
-#include "arm_compute/core/CL/ICLKernel.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/** OpenCL kernel to perform tensor permutation.
- *
- * Permutes given a permutation vector
- */
-class CLPermuteExKernel : public ICLKernel
-{
-public:
-  /** Default constructor */
-  CLPermuteExKernel();
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  CLPermuteExKernel(const CLPermuteExKernel &) = delete;
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  CLPermuteExKernel &operator=(const CLPermuteExKernel &) = delete;
-  /** Allow instances of this class to be moved */
-  CLPermuteExKernel(CLPermuteExKernel &&) = default;
-  /** Allow instances of this class to be moved */
-  CLPermuteExKernel &operator=(CLPermuteExKernel &&) = default;
-  /** Set the input and output of the kernel.
-   *
-   * @param[in] input  The input tensor to permute. Data types supported:
-   * U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
-   * @param[in] output The output tensor. Data types supported: Same as @p input
-   * @param[in] perm   Permutation vector
-   */
-  void configure(const ICLTensor *input, ICLTensor *output, const PermutationVector &perm);
-  /** Static function to check if given info will lead to a valid configuration of @ref
-   * CLPermuteKernel
-   *
-   * @param[in] input  First tensor input info. Data types supported:
-   * U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32.
-   * @param[in] output Output tensor info. Data types supported: same as @p input.
-   * @param[in] perm   Permutation vector
-   *
-   * @return a status
-   */
-  static Status validate(const ITensorInfo *input, const ITensorInfo *output,
-                         const PermutationVector &perm);
-
-  // Inherited methods overridden:
-  void run(const Window &window, cl::CommandQueue &queue) override;
-
-private:
-  const ICLTensor *_input;
-  ICLTensor *_output;
-  PermutationVector _perm;
-};
-} // arm_compute
-#endif /*__ARM_COMPUTE_CLPERMUTEEXKERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLPixelWiseDivisionKernel.h b/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLPixelWiseDivisionKernel.h
deleted file mode 100644
index d579f5d8f..000000000
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLPixelWiseDivisionKernel.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file      CLPixelWiseDivisionKernel.h
- * @ingroup   COM_AI_RUNTIME
- * @brief     This file defines CLPixelWiseDivisionKernel class
- */
-
-#ifndef __ARM_COMPUTE_CLPIXELWISEDIVISIONKERNEL_H__
-#define __ARM_COMPUTE_CLPIXELWISEDIVISIONKERNEL_H__
-
-#include "arm_compute/core/CL/ICLKernel.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/**
- * @brief Interface for the pixelwise division kernel.
- */
-class CLPixelWiseDivisionKernel : public ICLKernel
-{
-public:
-  /**
-   * @brief Construct a CLPixelWiseDivisionKernel object
-   */
-  CLPixelWiseDivisionKernel();
-
-  /**
-   * @brief Prevent instances of this class from being copied (As this class contains pointers).
-   */
-  CLPixelWiseDivisionKernel(const CLPixelWiseDivisionKernel &) = delete;
-
-  /**
-   * @brief Prevent instances of this class from being copied (As this class contains pointers).
-   */
-  CLPixelWiseDivisionKernel &operator=(const CLPixelWiseDivisionKernel &) = delete;
-
-  /**
-   * @brief Construct a CLPixelWiseDivisionKernel object by using move constructor
-   * @param[in] CLPixelWiseDivisionKernel object to move
-   */
-  CLPixelWiseDivisionKernel(CLPixelWiseDivisionKernel &&) = default;
-
-  /**
-   * @brief Allow instances of this class to be moved
-   * @param[in] CLPixelWiseDivisionKernel object to move
-   */
-  CLPixelWiseDivisionKernel &operator=(CLPixelWiseDivisionKernel &&) = default;
-
-  /**
-   * @brief Initialise the kernel's input, output and border mode.
-   * @param[in]  input1          An input tensor. Data types supported: U8/S16/F16/F32.
-   * @param[in]  input2          An input tensor. Data types supported: same as @p input1.
-   * @param[out] output          The output tensor, Data types supported: same as @p input1. Note:
-   * U8 requires both inputs to be U8.
-   * @param[in]  scale           Scale to apply after division.
-   *                             Scale must be positive and its value must be either 1/255 or 1/2^n
-   *                             where n is between 0 and 15.
-   * @param[in]  overflow_policy Overflow policy. Supported overflow policies: Wrap, Saturate
-   * @param[in]  rounding_policy Rounding policy. Supported rounding modes: to zero, to nearest
-   * even.
-   * @return N/A
-   */
-  void configure(const ICLTensor *input1, const ICLTensor *input2, ICLTensor *output, float scale,
-                 ConvertPolicy overflow_policy, RoundingPolicy rounding_policy);
-
-  /**
-   * @brief Static function to check if given info will lead to a valid configuration of @ref
-   * CLPixelWiseDivisionKernel
-   * @param[in] input1          An input tensor info. Data types supported: U8/S16/F16/F32.
-   * @param[in] input2          An input tensor info. Data types supported: same as @p input1.
-   * @param[in] output          The output tensor info, Data types supported: same as @p input1.
-   * Note: U8 requires both inputs to be U8.
-   * @param[in] scale           Scale to apply after division.
-   *                            Scale must be positive and its value must be either 1/255 or 1/2^n
-   * where n is between 0 and 15.
-   * @param[in] overflow_policy Overflow policy. Supported overflow policies: Wrap, Saturate
-   * @param[in] rounding_policy Rounding policy. Supported rounding modes: to zero, to nearest even.
-   * @return a status
-   */
-  static Status validate(const ITensorInfo *input1, const ITensorInfo *input2,
-                         const ITensorInfo *output, float scale, ConvertPolicy overflow_policy,
-                         RoundingPolicy rounding_policy);
-
-  /**
-   * @brief Enqueue the OpenCL kernel to process the given window on the passed OpenCL command
-   *        queue.
-   * @note  The queue is *not* flushed by this method, and therefore the kernel will not have
-   *        been executed by the time this method returns.
-   * @param[in] window      Region on which to execute the kernel. (Must be a valid region of
-   *                        the window returned by window()).
-   * @param[in,out] queue   Command queue on which to enqueue the kernel.@return N/A
-   * @return N/A
-   */
-  void run(const Window &window, cl::CommandQueue &queue) override;
-
-  /**
-   * @brief The size of the border for that kernel
-   * @return The width in number of elements of the border.
-   */
-  BorderSize border_size() const override;
-
-private:
-  const ICLTensor *_input1;
-  const ICLTensor *_input2;
-  ICLTensor *_output;
-};
-} // namespace arm_compute
-#endif /*__ARM_COMPUTE_CLPIXELWISEDIVISIONKERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLSpaceToBatchNDKernel.h b/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLSpaceToBatchNDKernel.h
deleted file mode 100644
index 68534f1ab..000000000
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLSpaceToBatchNDKernel.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_CLSPACE_TO_BATCH_ND_KERNEL_H__
-#define __ARM_COMPUTE_CLSPACE_TO_BATCH_ND_KERNEL_H__
-
-#include "arm_compute/core/CL/ICLKernel.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/** OpenCL kernel to perform SPACE_TO_BATCH_ND operation */
-class CLSpaceToBatchNDKernel final : public ICLKernel
-{
-public:
-  /** Default constructor */
-  CLSpaceToBatchNDKernel();
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  CLSpaceToBatchNDKernel(const CLSpaceToBatchNDKernel &) = delete;
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  CLSpaceToBatchNDKernel &operator=(const CLSpaceToBatchNDKernel &) = delete;
-  /** Allow instances of this class to be moved */
-  CLSpaceToBatchNDKernel(CLSpaceToBatchNDKernel &&) = default;
-  /** Allow instances of this class to be moved */
-  CLSpaceToBatchNDKernel &operator=(CLSpaceToBatchNDKernel &&) = default;
-  /** Default destructor */
-  ~CLSpaceToBatchNDKernel() = default;
-  /** Initialise the kernel's input and output.
-   *
-   * @note       The data layout of input and output must be the same.
-   * @note       The number of dimensions of input and output must be 4, and `spatial` dimensions
-   *             are height and width.
-   * @param[in]  input         Input tensor. Data types supported: U8/QASYMM8/S16/F16/S32/F32.
-   *                           Data layout supported: NCHW/NHWC
-   * @param[in]  block_size    Block size tensor. Data types supported: S32.
-   * @param[in]  padding_size  Padding size tensor. Data types supported: S32.
-   * @param[out]  output        Output tensor. Data types supported: U8/QASYMM8/S16/F16/S32/F32.
-   *                            Data layout supported: NCHW/NHWC
-   */
-  void configure(const ICLTensor *input, const ICLTensor *block_size, const ICLTensor *padding_size,
-                 ICLTensor *output);
-
-  // Inherited methods overridden:
-  void run(const Window &window, cl::CommandQueue &queue) override;
-
-private:
-  const ICLTensor *_input;        /**< Source tensor */
-  const ICLTensor *_block_size;   /**< Block size tensor */
-  const ICLTensor *_padding_size; /**< Padding size tensor */
-  ICLTensor *_output;             /**< Destination tensor */
-};
-
-} // namespace arm_compute
-
-#endif /* __ARM_COMPUTE_CLSPACE_TO_BATCH_ND_KERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLSquaredDifferenceKernel.h b/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLSquaredDifferenceKernel.h
deleted file mode 100644
index a4c44e35d..000000000
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLSquaredDifferenceKernel.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_CLSQUARED_DIFFERENCE_KERNEL_H__
-#define __ARM_COMPUTE_CLSQUARED_DIFFERENCE_KERNEL_H__
-
-#include "arm_compute/core/CL/ICLKernel.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/** OpenCL kernel to return squared difference value of two tensors (x-y)^2*/
-class CLSquaredDifferenceKernel : public ICLKernel
-{
-public:
-  /** Default constructor */
-  CLSquaredDifferenceKernel();
-  /** Prevent instances of this class from being copied (As this class contains pointers). */
-  CLSquaredDifferenceKernel(const CLSquaredDifferenceKernel &) = delete;
-  /** Prevent instances of this class from being copied (As this class contains pointers). */
-  CLSquaredDifferenceKernel &operator=(const CLSquaredDifferenceKernel &) = delete;
-  /** Allow instances of this class to be moved */
-  CLSquaredDifferenceKernel(CLSquaredDifferenceKernel &&) = default;
-  /** Allow instances of this class to be moved */
-  CLSquaredDifferenceKernel &operator=(CLSquaredDifferenceKernel &&) = default;
-  /** Initialize the kernel's input, output.
- *
- * @param[in]  input1  Source tensor1.
- * @param[in]  input2  Source tensor2.
- * @param[out] output  Output tensor.
- */
-  void configure(const ICLTensor *input1, const ICLTensor *input2, ICLTensor *output);
-
-  // Inherited methods overridden:
-  void run(const Window &window, cl::CommandQueue &queue) override;
-
-  BorderSize border_size() const override;
-
-private:
-  const ICLTensor *_input1;
-  const ICLTensor *_input2;
-  ICLTensor *_output;
-};
-} // namespace arm_compute
-#endif /*__ARM_COMPUTE_CLSQUARED_DIFFERENCE_KERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLStridedSliceExKernel.h b/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLStridedSliceExKernel.h
deleted file mode 100644
index 6368c380e..000000000
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLStridedSliceExKernel.h
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file      CLStridedSliceExKernel.h
- * @ingroup   COM_AI_RUNTIME
- * @brief     This file defines CLStridedSliceExKernel class
- */
-
-#ifndef __ARM_COMPUTE_CLSTRIDEDSLICEEXKERNEL_H__
-#define __ARM_COMPUTE_CLSTRIDEDSLICEEXKERNEL_H__
-
-#include "arm_compute/core/CL/ICLKernel.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/**
-* @brief Class to define an interface for the kernel to extract a strided slice of a tensor
-*/
-class CLStridedSliceExKernel : public ICLKernel
-{
-public:
-  /**
-   * @brief Construct a CLStridedSliceExKernel object
-   * */
-  CLStridedSliceExKernel();
-
-  /**
-   * @brief Prevent instances of this class from being copied (As this class contains pointers)
-   * */
-  CLStridedSliceExKernel(const CLStridedSliceExKernel &) = delete;
-
-  /**
-   * @brief Prevent instances of this class from being copied (As this class contains pointers)
-   * */
-  CLStridedSliceExKernel &operator=(const CLStridedSliceExKernel &) = delete;
-
-  /**
-   * @brief Construct a CLStridedSliceExKernel object by using default move constructor
-   * @param[in] CLStridedSliceExKernel object to move
-   * */
-  CLStridedSliceExKernel(CLStridedSliceExKernel &&) = default;
-
-  /**
-   * @brief Move assignment operator
-   * @param[in] CLStridedSliceExKernel object to move
-   * */
-  CLStridedSliceExKernel &operator=(CLStridedSliceExKernel &&) = default;
-
-  /**
-   * @brief Destruct this object
-   * */
-  ~CLStridedSliceExKernel() = default;
-
-  /**
-   * @brief Set the input and output of the kernel
-   * @param[in]  input          Source tensor. Data type supported:
-   * U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32
-   * @param[out] output         Destination tensor. Data type supported: Same as @p input
-   * @param[in]  beginData      The begin tensor. Data types supported: S32.
-   *                            The number of dimensions must be 1.
-   *                            The length must be the same as the number of dimensions of input.
-   * @param[in]  endData        The end tensor. Data types supported: S32.
-   *                            The number of dimensions must be 1.
-   *                            The length must be the same as the number of dimensions of input.
-   * @param[in]  strideData     The stride tensor. Data types supported: S32.
-   *                            The number of dimensions must be 1.
-   *                            The length must be the same as the number of dimensions of input.
-   * @param[in]  beginMask      Mask for begin
-   * @param[in]  endMask        Mask for end
-   * @param[in]  shrinkAxisMask Mask for shrink axis.
-   * @return N/A
-   */
-  void configure(const ICLTensor *input, ICLTensor *output, ICLTensor *beginData,
-                 ICLTensor *endData, ICLTensor *stridesData, int32_t beginMask, int32_t endMask,
-                 int32_t shrinkAxisMask);
-
-  /**
-   * @brief Static function to check if given info will lead to a valid configuration of @ref
-   * CLStridedSliceExKernel
-   * @param[in]  input          The input tensor info. Data types supported:
-   * U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32
-   * @param[in]  output         The output tensor info, Data types supported: same as @p input1.
-   * @param[in]  begin          The begin tensor info. Data types supported: S32.
-   *                            The number of dimensions must be 1.
-   *                            The length must be the same as the number of dimensions of input.
-   * @param[in]  end            The end tensor info. Data types supported: S32.
-   *                            The number of dimensions must be 1.
-   *                            The length must be the same as the number of dimensions of input.
-   * @param[in]  stride         The stride tensor info. Data types supported: S32.
-   *                            The number of dimensions must be 1.
-   *                            The length must be the same as the number of dimensions of input.
-   * @param[in]  beginMask      Mask for begin
-   * @param[in]  endMask        Mask for end
-   * @param[in]  shrinkAxisMask Mask for shrink axis.
-   * @return a status
-   */
-  static Status validate(const ITensorInfo *input, const ITensorInfo *output,
-                         const ITensorInfo *begin, const ITensorInfo *end,
-                         const ITensorInfo *stride, int32_t beginMask, int32_t endMask,
-                         int32_t shrinkAxisMask);
-
-  /**
-   * @brief Enqueue the OpenCL kernel to process the given window on the passed OpenCL command
-   *        queue.
-   * @note  The queue is *not* flushed by this method, and therefore the kernel will not have
-   *        been executed by the time this method returns.
-   * @param[in] window      Region on which to execute the kernel. (Must be a valid region of
-   *                        the window returned by window()).
-   * @param[in,out] queue   Command queue on which to enqueue the kernel.@return N/A
-   * @return N/A
-   */
-  void run(const Window &window, cl::CommandQueue &queue) override;
-
-private:
-  const ICLTensor *_input; /** Source tensor */
-  ICLTensor *_output;      /** Destination tensor */
-  ICLTensor *_beginData;   /** Start indices of input tensor */
-  ICLTensor *_endData;     /** Stop indices of input tensor */
-  ICLTensor *_stridesData; /** Strides tensor */
-  int32_t _beginMask;      /** Begin mask */
-  int32_t _endMask;        /** End mask */
-  int32_t _shrinkAxisMask; /** Shrink axis mask */
-};
-} // namespace arm_compute
-#endif /*__ARM_COMPUTE_CLSTRIDEDSLICEEXKERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/NEON/kernels/NENormalizationLayerExKernel.h b/libs/ARMComputeEx/arm_compute/core/NEON/kernels/NENormalizationLayerExKernel.h
deleted file mode 100644
index f7bf72985..000000000
--- a/libs/ARMComputeEx/arm_compute/core/NEON/kernels/NENormalizationLayerExKernel.h
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_NENORMALIZATIONLAYEREXKERNEL_H__
-#define __ARM_COMPUTE_NENORMALIZATIONLAYEREXKERNEL_H__
-
-#include "arm_compute/core/NEON/INEKernel.h"
-
-namespace arm_compute
-{
-class ITensor;
-
-/** Interface for the normalization layer kernel.
- */
-class NENormalizationLayerExKernel : public INEKernel
-{
-public:
-  const char *name() const override { return "NENormalizationLayerKernel"; }
-  /** Default constructor */
-  NENormalizationLayerExKernel();
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  NENormalizationLayerExKernel(const NENormalizationLayerExKernel &) = delete;
-  /** Prevent instances of this class from being copied (As this class contains pointers) */
-  NENormalizationLayerExKernel &operator=(const NENormalizationLayerExKernel &) = delete;
-  /** Default Move Constructor. */
-  NENormalizationLayerExKernel(NENormalizationLayerExKernel &&) = default;
-  /** Default move assignment operator */
-  NENormalizationLayerExKernel &operator=(NENormalizationLayerExKernel &&) = default;
-  /** Default destructor */
-  ~NENormalizationLayerExKernel() = default;
-  /** Set the input and output tensors.
-   *
-   * @param[in]  input         Source tensor. 3 lower dims represent a single input with dimensions
-   * [width, height, IFM],
-   *                           and an optional 4th dimension for batch of inputs. Data types
-   * supported: FP16/F32.
-   * @param[in]  input_squared Source with each element has been squared. 3 lower dims represent a
-   * single input with dimensions [width, height, IFM],
-   *                           Data type supported: same as @p input
-   * @param[out] output        Destination tensor. Output will have the same number of dimensions as
-   * input. Data type supported: same as @p input
-   * @param[in]  norm_info     Normalization layer information like the normalization type,
-   * normalization size and other parameters.
-   */
-  void configure(const ITensor *input, const ITensor *input_squared, ITensor *output,
-                 NormalizationLayerInfo norm_info);
-  /** Static function to check if given info will lead to a valid configuration of @ref
-   * NENormalizationLayerKernel
-   *
-   * @param[in] input         Source tensor. 3 lower dims represent a single input with dimensions
-   * [width, height, IFM],
-   *                          and an optional 4th dimension for batch of inputs. Data types
-   * supported: FP16/F32.
-   * @param[in] input_squared Source with each element has been squared. 3 lower dims represent a
-   * single input with dimensions [width, height, IFM],
-   *                          Data type supported: same as @p input
-   * @param[in] output        Destination tensor. Output will have the same number of dimensions as
-   * input. Data type supported: same as @p input
-   * @param[in] norm_info     Normalization layer information like the normalization type,
-   * normalization size and other parameters.
-   *
-   * @return a status
-   */
-  static Status validate(const ITensorInfo *input, const ITensorInfo *input_squared,
-                         const ITensorInfo *output, NormalizationLayerInfo norm_info);
-
-  // Inherited methods overridden:
-  void run(const Window &window, const ThreadInfo &info) override;
-  BorderSize border_size() const override;
-
-private:
-  /** Function to perform normalization depending on the given template
-   *  dimension. The second template parameter specifies whether the
-   *  normalization has to be 1D or 2D.
-   *
-   * @note Only supported normalizations are:
-   *  - 1D over X or Z
-   *  - 2D over X and Y
-   *
-   * @param[in] window Region on which to execute the kernel.
-   */
-  template <DataType dt, unsigned int dim, bool do_2D_norm>
-  void normalize_float(const Window &window);
-
-  /** Common signature for all the specialised normalization functions
-   *
-   * @param[in] window Region on which to execute the kernel.
-   */
-  using NormalizationFunctionEx = void (NENormalizationLayerExKernel::*)(const Window &window);
-
-private:
-  NormalizationFunctionEx _func;
-  const ITensor *_input;
-  const ITensor *_input_squared;
-  ITensor *_output;
-  NormalizationLayerInfo _norm_info;
-  BorderSize _border_size;
-};
-} // namespace arm_compute
-#endif /*__ARM_COMPUTE_NENORMALIZATIONLAYEREXKERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/TypesEx.h b/libs/ARMComputeEx/arm_compute/core/TypesEx.h
deleted file mode 100644
index 8381f1cc6..000000000
--- a/libs/ARMComputeEx/arm_compute/core/TypesEx.h
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_TYPESEX_H__
-#define __ARM_COMPUTE_TYPESEX_H__
-
-#include <cmath>
-#include <cstddef>
-#include <cstdint>
-#include <string>
-#include <utility>
-
-namespace arm_compute
-{
-
-/** Available ArgIndex operations **/
-enum class ArgOperation
-{
-  MAX,
-  MIN,
-};
-
-/** Available reduce operations */
-enum class ReduceOperation
-{
-  MAX,  /**< Max */
-  MEAN, /**< Mean */
-  SUM,  /**< Sum */
-  MIN,  /**< Min */
-};
-
-/** Available binary logical operations */
-enum class BinaryLogicalOperation
-{
-  AND, /**< AND */
-  OR,  /**< OR */
-};
-
-enum class ComparisonOperation
-{
-  EQUAL,     /**< EQUAL */
-  NOT_EQUAL, /**< NOT_EQUAL */
-};
-
-/** Activation Layer Information class */
-class ActivationLayerInfoEx
-{
-public:
-  /** Available activation functions */
-  enum class ActivationFunction
-  {
-    RSQRT /**< Inverse Square root ( \f$ f(x) = \rsqrt{x} \f$ )*/
-  };
-
-  ActivationLayerInfoEx() = default;
-  /** Default Constructor
-   *
-   * @param[in] f The activation function to use.
-   * @param[in] a (Optional) The alpha parameter used by some activation functions
-   *              (@ref ActivationFunction::BOUNDED_RELU, @ref ActivationFunction::LU_BOUNDED_RELU,
-   * @ref ActivationFunction::LINEAR, @ref ActivationFunction::TANH).
-   * @param[in] b (Optional) The beta parameter used by some activation functions (@ref
-   * ActivationFunction::LINEAR, @ref ActivationFunction::LU_BOUNDED_RELU, @ref
-   * ActivationFunction::TANH).
-   */
-  ActivationLayerInfoEx(ActivationFunction f, float a = 0.0f, float b = 0.0f)
-      : _act(f), _a(a), _b(b), _enabled(true)
-  {
-  }
-  /** Get the type of activation function */
-  ActivationFunction activation() const { return _act; }
-  /** Get the alpha value */
-  float a() const { return _a; }
-  /** Get the beta value */
-  float b() const { return _b; }
-  /** Check if initialised */
-  bool enabled() const { return _enabled; }
-
-private:
-  ActivationFunction _act = {ActivationLayerInfoEx::ActivationFunction::RSQRT};
-  float _a = {};
-  float _b = {};
-  bool _enabled = {false};
-};
-
-} // namespace arm_compute
-#endif /* __ARM_COMPUTE_TYPESEX_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/UtilsEx.h b/libs/ARMComputeEx/arm_compute/core/UtilsEx.h
deleted file mode 100644
index 8dd68a0c3..000000000
--- a/libs/ARMComputeEx/arm_compute/core/UtilsEx.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_UTILSEX_H__
-#define __ARM_COMPUTE_UTILSEX_H__
-
-#include "arm_compute/core/TypesEx.h"
-
-#include <cstdint>
-#include <cstdlib>
-#include <sstream>
-#include <string>
-
-namespace arm_compute
-{
-/** Translates a given activation function to a string.
- *
- * @param[in] act @ref ActivationLayerInfo::ActivationFunction to be translated to string.
- *
- * @return The string describing the activation function.
- */
-const std::string &string_from_activation_func_ex(ActivationLayerInfoEx::ActivationFunction act);
-}
-#endif /*__ARM_COMPUTE_UTILSEX_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLActivationLayerEx.h b/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLActivationLayerEx.h
deleted file mode 100644
index 7e578550f..000000000
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLActivationLayerEx.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_CLACTIVATIONLAYEREX_H__
-#define __ARM_COMPUTE_CLACTIVATIONLAYEREX_H__
-
-#include "arm_compute/runtime/CL/ICLSimpleFunction.h"
-
-#include "arm_compute/core/TypesEx.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/** Basic function to run @ref CLActivationLayerExKernel
- *
- * @note The function simulates an activation layer with the specified activation function.
- */
-class CLActivationLayerEx : public ICLSimpleFunction
-{
-public:
-  /** Set the input and output tensor.
-   *
-   * @note If the output tensor is a nullptr or is equal to the input, the activation function will
-   * be performed in-place
-   *
-   * @param[in, out] input    Source tensor. In case of @p output tensor = nullptr, this tensor will
-   * store the result
-   *                          of the activation function. Data types supported:
-   * QASYMM8/F16/F32.
-   * @param[out]     output   Destination tensor. Data type supported: same as @p input
-   * @param[in]      act_info Activation layer parameters.
-   */
-  void configure(ICLTensor *input, ICLTensor *output, ActivationLayerInfoEx act_info);
-  /** Static function to check if given info will lead to a valid configuration of @ref
-   * CLActivationLayer
-   *
-   * @param[in] input    Source tensor info. In case of @p output tensor info = nullptr, this tensor
-   * will store the result
-   *                     of the activation function. Data types supported: QASYMM8/F16/F32.
-   * @param[in] output   Destination tensor info. Data type supported: same as @p input
-   * @param[in] act_info Activation layer information.
-   *
-   * @return a status
-   */
-  static Status validate(const ITensorInfo *input, const ITensorInfo *output,
-                         const ActivationLayerInfoEx &act_info);
-};
-}
-#endif /* __ARM_COMPUTE_CLACTIVATIONLAYEREX_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLArgMinMax.h b/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLArgMinMax.h
deleted file mode 100644
index 8044c58af..000000000
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLArgMinMax.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file CLArgMinMax.h
- * @ingroup COM_AI_RUNTIME
- * @brief This file contains arm_compute::CLArgMinMax class
- */
-
-#ifndef __ARM_COMPUTE_CLARG_MIN_MAX_H__
-#define __ARM_COMPUTE_CLARG_MIN_MAX_H__
-
-#include "arm_compute/core/CL/kernels/CLArgMinMaxKernel.h"
-#include "arm_compute/runtime/CL/CLTensor.h"
-#include "arm_compute/runtime/IFunction.h"
-#include "arm_compute/core/TypesEx.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/**
- * @brief Class to execute CLArgMinMax operation
- */
-class CLArgMinMax : public IFunction
-{
-public:
-  /**
-   * @brief Construct a new CLArgMinMax object
-   */
-  CLArgMinMax();
-
-  /**
-   * @brief Prevent instances of this class from being copied (As this class contains pointers)
-   */
-  CLArgMinMax(const CLArgMinMax &) = delete;
-
-  /**
-   * @brief Prevent instances of this class from being copied (As this class contains pointers)
-   */
-  CLArgMinMax &operator=(const CLArgMinMax &) = delete;
-
-  /**
-   * @brief Construct a new CLArgMinMax object by using copy constructor
-   * @param[in] CLArgMinMax object to move
-   */
-  CLArgMinMax(CLArgMinMax &&) = default;
-
-  /**
-   * @brief Assign a CLArgMinMax object.
-   * @param[in] CLArgMinMax object to assign. This object will be moved.
-   */
-  CLArgMinMax &operator=(CLArgMinMax &&) = default;
-
-  /**
-   * @brief Initialise the kernel's inputs and outputs.
-   * @param[in]  input     Input tensor. Data types supported: U8/QASYMM8/S32/F32.
-   * @param[out] output    The result of argminmaxMax operation. Data types supported: same as @p
-   * input.
-   * @param[in]  axis      Axis to argminmax. It must be sorted and no duplicates.
-   * @param[in] is_min     True for ArgMin operation.
-   * @param[in] is_max     Ture for ArgMax operation.
-   * @return N/A
-   */
-  void configure(ICLTensor *input, ICLTensor *output, std::vector<uint32_t> argminmax_axis,
-                 ArgOperation op);
-
-  /**
-   * @brief Static function to check if given info will lead to a valid configuration
-   * @param[in]  input     Input tensor. Data types supported: U8/QASYMM8/S32/F32.
-   * @param[in]  axis      Axis to argminmax
-   * @param[out] output    The result of argminmaxMax operation. Data types supported: same as @p
-   * input.
-   * @return a status
-   */
-  static Status validate(const ITensorInfo *input, const std::vector<uint32_t> &argminmax_axis,
-                         const ITensorInfo *output, ArgOperation op);
-
-  /**
-   * @brief Run the kernels contained in the function
-   * This operation works on CPU on GPU depending on the value of argminmax_MAX_RUN_ON_CPU macro
-   * in CLArgMinMax.cpp.
-   * If argminmax_MAX_RUN_ON_CPU == 1, CPU runs this operation.
-   * Otherwise GPU runs this operation.
-   * @return N/A
-   */
-  void run() override;
-
-private:
-  ICLTensor *_input;
-  ICLTensor *_output;
-  std::vector<uint32_t> _argminmax_axis;
-  ArgOperation _arg_op;
-
-  std::unique_ptr<CLTensor[]> _interm_tensors{nullptr};
-  std::unique_ptr<CLArgMinMaxKernel[]> _argminmax_kernels{nullptr};
-  size_t _num_of_kernels;
-};
-}
-#endif /*__ARM_COMPUTE_CLargminmax_MAX_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLArithmeticSubtractionEx.h b/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLArithmeticSubtractionEx.h
deleted file mode 100644
index 34e6c6334..000000000
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLArithmeticSubtractionEx.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_CLARITHMETICSUBTRACTIONEX_H__
-#define __ARM_COMPUTE_CLARITHMETICSUBTRACTIONEX_H__
-
-#include "arm_compute/runtime/CL/ICLSimpleFunction.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/** Basic function to run @ref CLArithmeticSubtractionExKernel
- *
- * @note The tensor data type for the inputs must be U8/S16/F16/F32.
- * @note The function performs an arithmetic subtraction between two tensors.
- */
-class CLArithmeticSubtractionEx : public ICLSimpleFunction
-{
-public:
-  /** Initialise the kernel's inputs, output and convertion policy.
-   *
-   * @param[in, out] input1 An input tensor. Data types supported: U8/S16/F16/F32.
-   *                        The input tensor is [in, out] because its TensorInfo might be modified
-   * inside the kernel in case of broadcasting of dimension 0.
-   * @param[in, out] input2 An input tensor. Data types supported: same as @p input1.
-   *                        The input tensor is [in, out] because its TensorInfo might be modified
-   * inside the kernel in case of broadcasting of dimension 0.
-   * @param[out]     output Output tensor. Data types supported: U8 (Only if both inputs are U8),
-   * S16/F16/F32.
-   * @param[in]      policy Policy to use to handle overflow.
-   */
-  void configure(ICLTensor *input1, ICLTensor *input2, ICLTensor *output, ConvertPolicy policy);
-  /** Static function to check if given info will lead to a valid configuration of @ref
-   * CLArithmeticSubtractionEx
-   *
-   * @param[in] input1 First tensor input info. Data types supported: U8/S16/F16/F32.
-   * @param[in] input2 Second tensor input info. Data types supported: U8/S16/F16/F32.
-   * @param[in] output Output tensor info. Data types supported: U8 (Only if both inputs are U8),
-   * S16/F16/F32.
-   * @param[in] policy Policy to use to handle overflow.
-   *
-   * @return a status
-   */
-  static Status validate(const ITensorInfo *input1, const ITensorInfo *input2,
-                         const ITensorInfo *output, ConvertPolicy policy);
-};
-}
-#endif /* __ARM_COMPUTE_CLARITHMETICSUBTRACTIONEX_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLComparisonOp.h b/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLComparisonOp.h
deleted file mode 100644
index 1b0d70e7f..000000000
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLComparisonOp.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_CLCOMPARISON_OP_H__
-#define __ARM_COMPUTE_CLCOMPARISON_OP_H__
-
-#include "arm_compute/runtime/CL/ICLSimpleFunction.h"
-#include "arm_compute/core/TypesEx.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-class CLComparisonOp : public ICLSimpleFunction
-{
-public:
-  /** Initialise the function's source and destination.
-   *
-   * @param[in]  input1  Source tensor1. Data types supported:
-   * U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32.
-   * @param[in]  input2  Source tensor2. Data types supported:
-   * U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32.
-   * @param[out] output Output tensor. Data types supported: Same as @p input.
-   */
-  void configure(ICLTensor *input1, ICLTensor *input2, ICLTensor *output,
-                 const ComparisonOperation &op);
-};
-} // namespace arm_compute
-#endif /*__ARM_COMPUTE_CLCOMPARISON_OP_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLExp.h b/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLExp.h
deleted file mode 100644
index 2d0fc23a4..000000000
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLExp.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_CLEXP_H__
-#define __ARM_COMPUTE_CLEXP_H__
-
-#include "arm_compute/runtime/CL/ICLSimpleFunction.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/** Basic function to run @ref CLExpKernel */
-class CLExp : public ICLSimpleFunction
-{
-public:
-  /** Set the source, destination of the kernel
-   *
-   * @param[in]  input  Source tensor. Data type supported: F32.
-   * @param[out] output Destination tensor. Data type supported: F32.
-   */
-  void configure(const ICLTensor *input, ICLTensor *output);
-};
-}
-#endif /* __ARM_COMPUTE_CLEXP_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLGather.h b/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLGather.h
deleted file mode 100644
index f7fd3cda1..000000000
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLGather.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file CLGather.h
- * @brief       This file contains CLGather class
- * @ingroup     COM_AI_RUNTIME
- */
-
-#ifndef __ARM_COMPUTE_CLGATHER_H__
-#define __ARM_COMPUTE_CLGATHER_H__
-
-#include "arm_compute/runtime/CL/ICLSimpleFunction.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/**
- * @brief Class to to run @ref CLGatherKernel.
- */
-class CLGather : public ICLSimpleFunction
-{
-public:
-  /**
-   * @brief Initialise the kernel's inputs, output and convertion policy.
-   * @param[in]  input1   An input tensor. Data types supported: U8/S32/F32.
-   * @param[in]  input2   An indexes tensor. Data types supported: S32.
-   * @param[out] output   The output tensor, Data types supported: same as @p input1.
-   * @return N/A
- */
-  void configure(ICLTensor *input1, ICLTensor *input2, ICLTensor *output);
-
-  /**
-   * @brief Static function to check if given info will lead to a valid configuration
-   *        of @ref CLGather
-   * @param[in]  input1   An input tensor. Data types supported: U8/S32/F32.
-   * @param[in]  input2   An indexes tensor. Data types supported: S32.
-   * @param[out] output   The output tensor, Data types supported: same as @p input1.
-   * @return a status
-   */
-  static Status validate(const ITensorInfo *input1, const ITensorInfo *input2,
-                         const ITensorInfo *output);
-};
-}
-#endif /*__ARM_COMPUTE_CLGATHER_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLNormalizationLayerEx.h b/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLNormalizationLayerEx.h
deleted file mode 100644
index 4077245d5..000000000
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLNormalizationLayerEx.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_CLNORMALIZATIONLAYEREX_H__
-#define __ARM_COMPUTE_CLNORMALIZATIONLAYEREX_H__
-
-#include "arm_compute/runtime/IFunction.h"
-
-#include "arm_compute/core/CL/kernels/CLFillBorderKernel.h"
-#include "arm_compute/core/CL/kernels/CLNormalizationLayerExKernel.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/** Basic function to compute a normalization layer. This function calls the following CL kernels:
- *
- * -# @ref CLFillBorderKernel
- * -# @ref CLNormalizationLayerKernelEx
- *
- */
-class CLNormalizationLayerEx : public IFunction
-{
-public:
-  /** Default constructor */
-  CLNormalizationLayerEx();
-  /** Set the input and output tensors.
-   *
-   * @param[in, out] input     Source tensor. 3 lower dims represent a single input with dimensions
-   * [width, height, IFM],
-   *                           and an optional 4th dimension for batch of inputs. Data types
-   * supported: F16/F32 (Written to by the border handler)
-   * @param[out]     output    Destination tensor. Dimensions, data type and number of channels must
-   * match the input ones.
-   * @param[in]      norm_info Normalization layer information like the normalization type,
-   * normalization size and other parameters.
-   */
-  void configure(ICLTensor *input, ICLTensor *output, const NormalizationLayerInfo &norm_info);
-  /** Static function to check if given info will lead to a valid configuration of @ref
-   * CLNormalizationLayer
-   *
-   * @param[in] input     Source tensor. 3 lower dims represent a single input with dimensions
-   * [width, height, IFM],
-   *                      and an optional 4th dimension for batch of inputs. Data types supported:
-   * F16/F32
-   * @param[in] output    Destination tensor. Dimensions, data type and number of channels must
-   * match the input ones.
-   * @param[in] norm_info Normalization layer information like the normalization type, normalization
-   * size and other parameters.
-   *
-   * @return a status
-   */
-  static Status validate(const ITensorInfo *input, const ITensorInfo *output,
-                         const NormalizationLayerInfo &norm_info);
-
-  // Inherited methods overridden:
-  void run() override;
-
-private:
-  CLNormalizationLayerExKernel _norm_kernel; /**< Normalization layer kernel to run */
-  CLFillBorderKernel _border_handler;        /**< Kernel to handle  borders */
-};
-}
-#endif /* __ARM_COMPUTE_CLNORMALIZATIONLAYEREX_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLPadLayerEx.h b/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLPadLayerEx.h
deleted file mode 100644
index d6ea486d1..000000000
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLPadLayerEx.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
-* Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
-* Copyright (c) 2016-2018 ARM Limited.
-*
-* Licensed under the Apache License, Version 2.0 (the "License");
-* you may not use this file except in compliance with the License.
-* You may obtain a copy of the License at
-*
-*      http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing, software
-* distributed under the License is distributed on an "AS IS" BASIS,
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-* See the License for the specific language governing permissions and
-* limitations under the License.
-*/
-#ifndef __ARM_COMPUTE_CLPADLAYEREX_H__
-#define __ARM_COMPUTE_CLPADLAYEREX_H__
-
-#include "arm_compute/runtime/CL/ICLSimpleFunction.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/** Basic function to run @ref CLPadLayerKernel
- *
- * @note The tensor data type for the inputs must be U8/QASYMM8/S16/S32/F16/F32.
- * @note The function converts the input tensor to the tensor of the output tensor's type.
- */
-class CLPadLayerEx : public ICLSimpleFunction
-{
-public:
-  /** Initialise the kernel's input and output.
-   *
-   * @param[in]           input     Input tensor. Data types supported:
-   *                                U8/QASYMM8/S16/S32/F16/F32.
-   * @param[out]          output    Output tensor. Data types supported:
-   *                                U8/QASYMM8/S16/S32/F16/F32.
-   * @param[in]           pad_size  Tensor for Padding values in NHWC format shape [n, 2],
-   *                                where n is the rank of tensor . Data types supported: S32
-   */
-  void configure(ICLTensor *input, ICLTensor *output, ICLTensor *pad_size);
-};
-
-} // namespace arm_compute
-#endif /* __ARM_COMPUTE_CLPADLAYEREX_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLPermuteEx.h b/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLPermuteEx.h
deleted file mode 100644
index 9a0cc213c..000000000
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLPermuteEx.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_CLPERMUTEEX_H__
-#define __ARM_COMPUTE_CLPERMUTEEX_H__
-
-#include "arm_compute/runtime/CL/ICLSimpleFunction.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-/** Basic function to execute an @ref CLPermuteKernel. */
-class CLPermuteEx : public ICLSimpleFunction
-{
-public:
-  /** Set the input and output tensors.
-   *
-   * @param[in] input  The input tensor to permute. Data types supported:
-   * U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
-   * @param[in] output The output tensor. Data types supported: Same as @p input
-   * @param[in] perm   Permutation vector
-   */
-  void configure(const ICLTensor *input, ICLTensor *output, const PermutationVector &perm);
-  /**  Static function to check if given info will lead to a valid configuration of @ref CLPermute.
-   *
-   * @param[in] input  First tensor input info. Data types supported:
-   * U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32.
-   * @param[in] output Output tensor info. Data types supported: same as @p input.
-   * @param[in] perm   Permutation vector
-   *
-   * @return a status
-   */
-  static Status validate(const ITensorInfo *input, const ITensorInfo *output,
-                         const PermutationVector &perm);
-};
-}
-#endif /*__ARM_COMPUTE_CLPERMUTEEX_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLSquaredDifference.h b/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLSquaredDifference.h
deleted file mode 100644
index 3610ba71c..000000000
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLSquaredDifference.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_CLSQUARED_DIFFERENCE_H__
-#define __ARM_COMPUTE_CLSQUARED_DIFFERENCE_H__
-
-#include "arm_compute/runtime/CL/ICLSimpleFunction.h"
-
-namespace arm_compute
-{
-class ICLTensor;
-
-class CLSquaredDifference : public ICLSimpleFunction
-{
-public:
-  /** Initialise the function's source and destination.
-   *
-   * @param[in]  input1  Source tensor1. Data types supported:
-   * U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32.
-   * @param[in]  input2  Source tensor2. Data types supported:
-   * U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32.
-   * @param[out] output Output tensor. Data types supported: Same as @p input.
-   */
-  void configure(ICLTensor *input1, ICLTensor *input2, ICLTensor *output);
-};
-} // namespace arm_compute
-#endif /*__ARM_COMPUTE_CLSQUARED_DIFFERENCE_H__*/
diff --git a/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NENormalizationLayerEx.h b/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NENormalizationLayerEx.h
deleted file mode 100644
index fa7408ecd..000000000
--- a/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NENormalizationLayerEx.h
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __ARM_COMPUTE_NENORMALIZATIONLAYEREX_H__
-#define __ARM_COMPUTE_NENORMALIZATIONLAYEREX_H__
-
-#include "arm_compute/runtime/IFunction.h"
-
-#include "arm_compute/core/NEON/kernels/NEFillBorderKernel.h"
-#include "arm_compute/core/NEON/kernels/NENormalizationLayerExKernel.h"
-#include "arm_compute/core/NEON/kernels/NEPixelWiseMultiplicationKernel.h"
-#include "arm_compute/runtime/MemoryGroup.h"
-
-namespace arm_compute
-{
-class ITensor;
-
-/** Basic function to compute a normalization layer. This function calls the following NEON kernels:
- *
- * -# @ref NEPixelWiseMultiplicationKernel
- * -# @ref NEFillBorderKernel
- * -# @ref NENormalizationLayerKernelEx
- *
- */
-class NENormalizationLayerEx : public IFunction
-{
-public:
-  /** Default constructor */
-  NENormalizationLayerEx(std::shared_ptr<IMemoryManager> memory_manager = nullptr);
-  /** Set the input and output tensors.
-   *
-   * @param[in]  input     Source tensor. 3 lower dims represent a single input with dimensions
-   * [width, height, IFM],
-   *                       and an optional 4th dimension for batch of inputs. Data type supported:
-   * F16/F32
-   * @param[out] output    Destination with the same dimensions, data type and number of channels of
-   * @p input
-   * @param[in]  norm_info Normalization layer information like the normalization type,
-   * normalization size and other parameters.
-   */
-  void configure(const ITensor *input, ITensor *output, const NormalizationLayerInfo &norm_info);
-  /** Static function to check if given info will lead to a valid configuration of @ref
-   * NENormalizationLayer
-   *
-   * @param[in] input     Source tensor. 3 lower dims represent a single input with dimensions
-   * [width, height, IFM],
-   *                      and an optional 4th dimension for batch of inputs. Data type supported:
-   * F16/F32
-   * @param[in] output    Destination with the same dimensions, data type and number of channels of
-   * @p input
-   * @param[in] norm_info Normalization layer information like the normalization type, normalization
-   * size and other parameters.
-   *
-   * @return a status
-   */
-  static Status validate(const ITensorInfo *input, const ITensorInfo *output,
-                         const NormalizationLayerInfo &norm_info);
-
-  // Inherited methods overridden:
-  void run() override;
-
-private:
-  MemoryGroup _memory_group;                        /**< Function memory group */
-  NENormalizationLayerExKernel _norm_kernel;        /**< Normalization layer kernel */
-  NEPixelWiseMultiplicationKernel _multiply_kernel; /**< Pixel multiplication kernel */
-  NEFillBorderKernel _border_handler;               /**< Kernel to handle  borders */
-  Tensor _input_squared; /**< The intermediate buffer which stores results of squaring input */
-};
-}
-#endif /* __ARM_COMPUTE_NENORMALIZATIONLAYEREX_H__ */
diff --git a/libs/ARMComputeEx/src/core/CL/CLKernelLibrary.cpp b/libs/ARMComputeEx/src/core/CL/CLKernelLibrary.cpp
deleted file mode 100644
index 05ecdeb22..000000000
--- a/libs/ARMComputeEx/src/core/CL/CLKernelLibrary.cpp
+++ /dev/null
@@ -1,409 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation the
- * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-#include "arm_compute/core/CL/CLKernelLibrary.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/Error.h"
-#include "arm_compute/core/Utils.h"
-
-#include <algorithm>
-#include <fstream>
-#include <iostream>
-#include <utility>
-#include <vector>
-
-using namespace arm_compute;
-
-const std::map<std::string, std::string> CLKernelLibraryEx::_kernel_program_map = {
-    // ARMComputeEx kernels
-    {"activation_layer_ex", "activation_layer_ex.cl"},
-    {"arg_op", "arg_operation.cl"},
-    {"arithmetic_sub_ex", "arithmetic_op_ex.cl"},
-    {"arithmetic_add_qasymm8", "arithmetic_op_quantized.cl"},
-    {"batch_to_space_nd", "batch_to_space_nd.cl"},
-    {"binary_logical_op", "binary_logical_op.cl"},
-    {"cast", "cast.cl"},
-    {"cast_qasymm_in", "cast.cl"},
-    {"cast_qasymm_out", "cast.cl"},
-    {"comparison_op", "comparison_op.cl"},
-    {"comparison_op_qasymm8", "comparison_op_quantized.cl"},
-    {"depth_to_space", "depth_to_space.cl"},
-    {"embedding_lookup", "embedding_lookup.cl"},
-    {"exp_layer", "exp.cl"},
-    {"gather", "gather.cl"},
-    {"gather_1d", "gather.cl"},
-    {"gather_1d_out", "gather.cl"},
-    {"hashtable_lookup", "hashtable_lookup.cl"},
-    {"neg_tensor", "neg_tensor.cl"},
-    {"pad", "pad.cl"},
-    {"permute_generic", "permute_ex.cl"},
-    {"pixelwise_mul_qasymm8", "pixelwise_mul_quantized.cl"},
-    {"pixelwise_div_float", "pixelwise_div_float.cl"},
-    {"pixelwise_div_int", "pixelwise_div_int.cl"},
-    {"prelu", "prelu.cl"},
-    {"prelu_qasymm8", "prelu_quantized.cl"},
-    {"reduce_min_max", "reduce_operation.cl"},
-    {"reduce_sum_mean", "reduce_operation.cl"},
-    {"squared_difference", "squared_difference.cl"},
-    {"strided_slice_ex", "strided_slice_ex.cl"},
-    {"topkv2_init", "topkv2.cl"},
-    {"topkv2_find_first_negative", "topkv2.cl"},
-    {"topkv2_reorder_negatives", "topkv2.cl"},
-    {"topkv2_store", "topkv2.cl"},
-    {"radixsort_histogram", "topkv2_radixsort.cl"},
-    {"radixsort_scanhistograms", "topkv2_radixsort.cl"},
-    {"radixsort_pastehistograms", "topkv2_radixsort.cl"},
-    {"radixsort_reorder", "topkv2_radixsort.cl"},
-    {"topkv2_quicksort", "topkv2_quicksort.cl"},
-    {"space_to_batch_4d_nchw", "space_to_batch.cl"},
-    {"space_to_batch_4d_nhwc", "space_to_batch.cl"},
-    {"space_to_depth", "space_to_depth.cl"},
-};
-
-const std::map<std::string, std::string> CLKernelLibraryEx::_program_source_map = {
-#ifdef EMBEDDED_KERNELS
-    {
-        "activation_layer_ex.cl",
-#include "./cl_kernels/activation_layer_ex.clembed"
-    },
-    {
-        "arg_operation.cl",
-#include "./cl_kernels/arg_operation.clembed"
-    },
-    {
-        "arithmetic_op_ex.cl",
-#include "./cl_kernels/arithmetic_op_ex.clembed"
-    },
-    {
-        "batch_to_space_nd.cl",
-#include "./cl_kernels/batch_to_space_nd.clembed"
-    },
-    {
-        "cast.cl",
-#include "./cl_kernels/cast.clembed"
-    },
-    {
-        "comparison_op.cl",
-#include "./cl_kernels/comparison_op.clembed"
-    },
-    {
-        "comparison_op_quantized.cl",
-#include "./cl_kernels/comparison_op_quantized.clembed"
-    },
-    {
-        "embedding_lookup.cl",
-#include "./cl_kernels/embedding_lookup.clembed"
-    },
-    {
-        "depth_to_space.cl",
-#include "./cl_kernels/depth_to_space.clembed"
-    },
-    {
-        "exp.cl",
-#include "./cl_kernels/exp.clembed"
-    },
-    {
-        "gather.cl",
-#include "./cl_kernels/gather.clembed"
-    },
-    {
-        "hashtable_lookup.cl",
-#include "./cl_kernels/hashtable_lookup.clembed"
-    },
-    {
-        "helpers.h",
-#include "./cl_kernels/helpers.hembed"
-    },
-    {
-        "helpers_asymm.h",
-#include "./cl_kernels/helpers_asymm.hembed"
-    },
-    {
-        "binary_logical_op.cl",
-#include "./cl_kernels/binary_logical_op.clembed"
-    },
-    {
-        "neg_tensor.cl",
-#include "./cl_kernels/neg_tensor.clembed"
-    },
-    {
-        "pad.cl",
-#include "./cl_kernels/pad.clembed"
-    },
-    {
-        "pixelwise_div_float.cl",
-#include "./cl_kernels/pixelwise_div_float.clembed"
-    },
-    {
-        "pixelwise_div_int.cl",
-#include "./cl_kernels/pixelwise_div_int.clembed"
-    },
-    {
-        "prelu.cl",
-#include "./cl_kernels/prelu.clembed"
-    },
-    {
-        "prelu_quantized.cl",
-#include "./cl_kernels/prelu_quantized.clembed"
-    },
-    {
-        "reduce_operation.cl",
-#include "./cl_kernels/reduce_operation.clembed"
-    },
-    {
-        "space_to_batch.cl",
-#include "./cl_kernels/space_to_batch.clembed"
-    },
-    {
-        "space_to_depth.cl",
-#include "./cl_kernels/space_to_depth.clembed"
-    },
-    {
-        "squared_difference.cl",
-#include "./cl_kernels/squared_difference.clembed"
-    },
-    {
-        "strided_slice_ex.cl",
-#include "./cl_kernels/strided_slice_ex.clembed"
-    },
-    {
-        "topkv2.cl",
-#include "./cl_kernels/topkv2.clembed"
-    },
-    {
-        "topkv2_radixsort.cl",
-#include "./cl_kernels/topkv2_radixsort.clembed"
-    },
-    {
-        "topkv2_quicksort.cl",
-#include "./cl_kernels/topkv2_quicksort.clembed"
-    },
-    {
-        "permute_ex.cl",
-#include "./cl_kernels/permute_ex.clembed"
-    },
-
-#endif /* EMBEDDED_KERNELS */
-};
-
-CLKernelLibraryEx::CLKernelLibraryEx()
-    : _context(), _device(), _kernel_path("."), _programs_map(), _built_programs_map()
-{
-  opencl_is_available(); // Make sure the OpenCL symbols are initialised *before* the
-                         // CLKernelLibraryEx is built
-}
-
-CLKernelLibraryEx &CLKernelLibraryEx::get()
-{
-  static CLKernelLibraryEx _kernel_library;
-  return _kernel_library;
-}
-
-Kernel CLKernelLibraryEx::create_kernel(const std::string &kernel_name,
-                                        const StringSet &build_options_set) const
-{
-  // Find which program contains the kernel
-  auto kernel_program_it = _kernel_program_map.find(kernel_name);
-
-  if (_kernel_program_map.end() == kernel_program_it)
-  {
-    ARM_COMPUTE_ERROR("Kernel %s not found in the CLKernelLibrary", kernel_name.c_str());
-  }
-  std::string concat_str;
-
-  if (fp16_supported())
-  {
-    concat_str += " -DARM_COMPUTE_OPENCL_FP16_ENABLED=1 ";
-  }
-
-  if (get_cl_version(_device) == CLVersion::CL20)
-  {
-    concat_str += " -cl-std=CL2.0 ";
-  }
-  else if (arm_non_uniform_workgroup_supported(_device))
-  {
-    concat_str += " -cl-arm-non-uniform-work-group-size ";
-  }
-  else
-  {
-    ARM_COMPUTE_ERROR("Non uniform workgroup size is not supported!!");
-  }
-
-  // Check if the program has been built before with same build options.
-  const std::string program_name = kernel_program_it->second;
-  const std::string build_options = stringify_set(build_options_set) + concat_str;
-
-  const std::string built_program_name = program_name + "_" + build_options;
-  auto built_program_it = _built_programs_map.find(built_program_name);
-
-  cl::Program cl_program;
-
-  if (_built_programs_map.end() != built_program_it)
-  {
-    // If program has been built, retrieve to create kernel from it
-    cl_program = built_program_it->second;
-  }
-  else
-  {
-    // Get program
-    Program program = load_program(program_name);
-
-    // Build program
-    cl_program = program.build(build_options);
-
-    // Add built program to internal map
-    _built_programs_map.emplace(built_program_name, cl_program);
-  }
-
-  // Create and return kernel
-  return Kernel(kernel_name, cl_program);
-}
-
-void CLKernelLibraryEx::add_built_program(const std::string &built_program_name,
-                                          cl::Program program)
-{
-  _built_programs_map.emplace(built_program_name, program);
-}
-
-bool CLKernelLibraryEx::fp16_supported() const { return ::fp16_supported(_device); }
-
-bool CLKernelLibraryEx::int64_base_atomics_supported() const
-{
-  return device_supports_extension(_device, "cl_khr_int64_base_atomics");
-}
-
-const Program &CLKernelLibraryEx::load_program(const std::string &program_name) const
-{
-  const auto program_it = _programs_map.find(program_name);
-
-  if (program_it != _programs_map.end())
-  {
-    return program_it->second;
-  }
-
-  Program program;
-
-#ifdef EMBEDDED_KERNELS
-  const auto program_source_it = _program_source_map.find(program_name);
-
-  if (_program_source_map.end() == program_source_it)
-  {
-    ARM_COMPUTE_ERROR("Embedded program for %s does not exist.", program_name.c_str());
-  }
-
-  program = Program(_context, program_name, program_source_it->second);
-#else  /* EMBEDDED_KERNELS */
-  // Check for binary
-  std::string source_name = _kernel_path + program_name;
-  std::string binary_name = source_name + "bin";
-
-  if (std::ifstream(binary_name).is_open())
-  {
-    const std::string program_binary = read_file(binary_name, true);
-    program = Program(_context, _device, program_name,
-                      std::vector<unsigned char>(program_binary.begin(), program_binary.end()));
-  }
-  else if (std::ifstream(source_name).is_open())
-  {
-    program = Program(_context, program_name, read_file(source_name, false));
-  }
-  else
-  {
-    ARM_COMPUTE_ERROR("Kernel file %s does not exist.", source_name.c_str());
-  }
-#endif /* EMBEDDED_KERNELS */
-
-  // Insert program to program map
-  const auto new_program = _programs_map.emplace(program_name, std::move(program));
-
-  return new_program.first->second;
-}
-
-std::string CLKernelLibraryEx::stringify_set(const StringSet &s) const
-{
-  std::string concat_set;
-
-#ifndef EMBEDDED_KERNELS
-  concat_set += "-I" + _kernel_path + " ";
-#endif /* EMBEDDED_KERNELS */
-
-  // Concatenate set
-  for (const auto &el : s)
-  {
-    concat_set += " " + el;
-  }
-
-  return concat_set;
-}
-
-std::string CLKernelLibraryEx::get_program_source(const std::string &program_name)
-{
-  const auto program_source_it = _program_source_map.find(program_name);
-
-  if (program_source_it == _program_source_map.end())
-  {
-    ARM_COMPUTE_ERROR("Embedded program for %s does not exist.", program_name.c_str());
-  }
-
-  return program_source_it->second;
-}
-
-size_t CLKernelLibraryEx::max_local_workgroup_size(const cl::Kernel &kernel) const
-{
-  size_t result;
-
-  size_t err = kernel.getWorkGroupInfo(_device, CL_KERNEL_WORK_GROUP_SIZE, &result);
-  ARM_COMPUTE_ERROR_ON_MSG(
-      err != 0,
-      "clGetKernelWorkGroupInfo failed to return the maximum workgroup size for the kernel");
-  ARM_COMPUTE_UNUSED(err);
-
-  return result;
-}
-
-cl::NDRange CLKernelLibraryEx::default_ndrange() const
-{
-  //    GPUTarget   _target = get_target_from_device(_device);
-  cl::Device device = cl::Device::getDefault();
-  GPUTarget _target = get_target_from_device(device);
-  cl::NDRange default_range;
-
-  switch (_target)
-  {
-    case GPUTarget::MIDGARD:
-    case GPUTarget::T600:
-    case GPUTarget::T700:
-    case GPUTarget::T800:
-      default_range = cl::NDRange(128u, 1);
-      break;
-    default:
-      default_range = cl::NullRange;
-  }
-
-  return default_range;
-}
-
-std::string CLKernelLibraryEx::get_device_version() { return _device.getInfo<CL_DEVICE_VERSION>(); }
diff --git a/libs/ARMComputeEx/src/core/CL/OpenCLEx.cpp b/libs/ARMComputeEx/src/core/CL/OpenCLEx.cpp
deleted file mode 100644
index cbda169fb..000000000
--- a/libs/ARMComputeEx/src/core/CL/OpenCLEx.cpp
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to
- * deal in the Software without restriction, including without limitation the
- * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include "arm_compute/core/CL/OpenCLEx.h"
-
-#include <dlfcn.h>
-#include <iostream>
-
-namespace arm_compute
-{
-CLSymbolsEx &CLSymbolsEx::get()
-{
-  static CLSymbolsEx symbols;
-  return symbols;
-}
-
-bool CLSymbolsEx::load_default()
-{
-  static const std::vector<std::string> libraries{"libOpenCL.so", "libGLES_mali.so", "libmali.so"};
-
-  if (_loaded.first)
-  {
-    return _loaded.second;
-  }
-
-  // Indicate that default loading has been tried
-  _loaded.first = true;
-
-  for (const auto &lib : libraries)
-  {
-    if (load(lib))
-    {
-      return true;
-    }
-  }
-
-  std::cerr << "Couldn't find any OpenCL library.\n";
-  return false;
-}
-
-bool CLSymbolsEx::load(const std::string &library)
-{
-  void *handle = dlopen(library.c_str(), RTLD_LAZY | RTLD_LOCAL);
-
-  if (handle == nullptr)
-  {
-    std::cerr << "Can't load " << library << ": " << dlerror() << "\n";
-    // Set status of loading to failed
-    _loaded.second = false;
-    return false;
-  }
-
-#define LOAD_FUNCTION_PTR(func_name, handle) \
-  func_name##_ptr = reinterpret_cast<decltype(func_name) *>(dlsym(handle, #func_name));
-
-  LOAD_FUNCTION_PTR(clGetEventInfo, handle);
-  LOAD_FUNCTION_PTR(clSetEventCallback, handle);
-
-#undef LOAD_FUNCTION_PTR
-
-  // Don't call dlclose(handle) or all the symbols will be unloaded !
-
-  // Disable default loading and set status to successful
-  _loaded = std::make_pair(true, true);
-
-  return true;
-}
-
-} // namespace arm_compute
-
-cl_int clGetEventInfo(cl_event event, cl_event_info param_name, size_t param_value_size,
-                      void *param_value, size_t *param_value_size_ret)
-{
-  arm_compute::CLSymbolsEx::get().load_default();
-  auto func = arm_compute::CLSymbolsEx::get().clGetEventInfo_ptr;
-  if (func != nullptr)
-  {
-    return func(event, param_name, param_value_size, param_value, param_value_size_ret);
-  }
-  else
-  {
-    return CL_OUT_OF_RESOURCES;
-  }
-}
-
-cl_int clSetEventCallback(cl_event event, cl_int command_exec_callback_type,
-                          void(CL_CALLBACK *pfn_ev_notify)(cl_event ev, cl_int ev_cmd_exec_status,
-                                                           void *user_data),
-                          void *user_data)
-{
-  arm_compute::CLSymbolsEx::get().load_default();
-  auto func = arm_compute::CLSymbolsEx::get().clSetEventCallback_ptr;
-  if (func != nullptr)
-  {
-    return func(event, command_exec_callback_type, pfn_ev_notify, user_data);
-  }
-  else
-  {
-    return CL_OUT_OF_RESOURCES;
-  }
-}
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/activation_layer_ex.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/activation_layer_ex.cl
deleted file mode 100644
index f54c7bde3..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/activation_layer_ex.cl
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#define TYPE VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE)
-
-#define CONST_ONE 1.f
-#define DIV_OP(a, b) ((a) / (b))
-#define RSQRT_OP(a) DIV_OP(CONST_ONE, sqrt((a)))
-
-// Inverse Square-root Activation
-inline TYPE rsqrt_op(TYPE x)
-{
-    return RSQRT_OP(x);
-}
-
-#define ACTIVATION_OP2(op, x) op##_op(x)
-#define ACTIVATION_OP(op, x) ACTIVATION_OP2(op, x)
-
-#if defined(ACT)
-
-/** This performs an activation function floating point inputs.
- *
- * @note In order to perform the activation function "in-place", the pre-processor -DIN_PLACE must be passed at compile time
- *
- * @note Datatype should be given as a preprocessor argument using -DDATA_TYPE=type. e.g. -DDATA_TYPE=short
- * @note Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g. -DVEC_SIZE=16
- * @note Activation function should be given as a preprocessor argument using -DACT=name. e.g. -DACT=TANH
- * @note A, B variables required by some activation functions are set using -DA_VAL= and -DB_VAL= respectively.
- *
- * @param[in]  input_ptr                            Pointer to the source image. Supported data types: F16/F32
- * @param[in]  input_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  input_step_x                         input_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  input_step_y                         input_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                         input_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source image
- * @param[out] output_ptr                           Pointer to the destination image. Supported data types: same as @p input_ptr
- * @param[in]  output_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination image
- */
-__kernel void activation_layer_ex(
-    TENSOR3D_DECLARATION(input)
-#ifndef IN_PLACE
-    ,
-    TENSOR3D_DECLARATION(output)
-#endif /* not IN_PLACE */
-)
-{
-    // Get pixels pointer
-    Tensor3D input = CONVERT_TO_TENSOR3D_STRUCT(input);
-#ifdef IN_PLACE
-    Tensor3D output = input;
-#else  /* IN_PLACE */
-    Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
-#endif /* IN_PLACE */
-
-    // Load data
-    TYPE data = VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input.ptr);
-
-    // Perform activation
-    data = ACTIVATION_OP(ACT, data);
-
-    // Store result
-    VSTORE(VEC_SIZE)
-    (data, 0, (__global DATA_TYPE *)output.ptr);
-}
-
-#endif /* defined(ACT) */
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/arg_operation.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/arg_operation.cl
deleted file mode 100644
index 9a6921d7c..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/arg_operation.cl
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#if defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(OP_CODE)
-/** Perform arg_max/arg_min
- *
- * @note Datatype should be given as a preprocessor argument using -DDATA_TYPE=type. e.g. -DDATA_TYPE=short
- * @attention Output tensor depth should be given as a preprocessor argument using -DDEPTH_OUT=size. e.g. -DDEPTH_OUT=16
- * @attention Operation type(code) specifying which operation to perform should be passed as preprocessor argument using
- * -DOP_CODE = number. e.g. -DOP_CODE=1
- *
- * @param[in]  input_ptr                            Pointer to the source image. Supported data types: U8/S8/U16/S16/F16/U32/S32/F32
- * @param[in]  input_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  input_step_x                         input_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  input_step_y                         input_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                         input_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source image
- * @param[in]  input_stride_w                       Stride of the source tensor in W dimension (in bytes)
- * @param[in]  input_step_w                         output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[out] output_ptr                           Pointer to the destination image. Supported data types: U32
- * @param[in]  output_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_stride_w                      Stride of the source tensor in W dimension (in bytes)
- * @param[in]  output_step_w                        output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination image
- * @param[in]  axis                                 Axis through which reduction occurs for max value index
- * @param[in]  dim                                  Dimension across the axis to be reduced.
- */
-
-__kernel void arg_op(TENSOR4D_DECLARATION(input),
-                     TENSOR4D_DECLARATION(output),
-		     const int axis,
-		     const int dim)
-{
-    Tensor4D in  = CONVERT_TO_TENSOR4D_STRUCT(input, 0);
-    Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, DEPTH_OUT);
-
-    int indices[4] =
-    {
-        get_global_id(0),
-        get_global_id(1),
-        get_global_id(2) % DEPTH_OUT,
-        get_global_id(2) / DEPTH_OUT,
-    };
-
-    DATA_TYPE value = *((__global DATA_TYPE *)tensor4D_offset(&in, indices[0], indices[1], indices[2], indices[3]));
-    DATA_TYPE tval = value;
-    int idx = 0;
-    for(int i = 1; i < dim; ++i)
-    {
-      indices[axis] = i;
-
-      #if OP_CODE == 1 // ArgMax
-        value = max(value, *((__global DATA_TYPE *)
-		             tensor4D_offset(&in, indices[0], indices[1], indices[2], indices[3])));
-      #elif OP_CODE == 2 //ArgMin
-        value = min(value, *((__global DATA_TYPE *)
-		    	     tensor4D_offset(&in, indices[0], indices[1], indices[2], indices[3])));
-      #else
-	return;
-
-      #endif
-
-      if(tval!=value)
-      {
-        idx = indices[axis];
-        tval = value;
-      }
-    }
-
-    *((__global uint *)out.ptr) = idx;
-}
-#endif // defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(OP_CODE)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/arithmetic_op_ex.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/arithmetic_op_ex.cl
deleted file mode 100644
index 2ed698951..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/arithmetic_op_ex.cl
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#ifdef SATURATE
-#define SUB(x, y) sub_sat((x), (y))
-#else /* SATURATE */
-#define SUB(x, y) (x) - (y)
-#endif /* SATURATE */
-
-/** This function subtracts one tensors from another.
- *
- * @attention The input and output data_types need to be passed at compile time using -DDATA_TYPE_IN1, -DDATA_TYPE_IN2 and -DDATA_TYPE_OUT:
- * e.g. -DDATA_TYPE_IN1=uchar -DDATA_TYPE_IN2=uchar -DDATA_TYPE_OUT=short
- * @attention To perform saturating operation -DSATURATE has to be passed to the compiler otherwise wrapping policy will be used.
- *
- * @param[in]  in1_ptr                           Pointer to the source tensor. Supported data types: U8, S16
- * @param[in]  in1_stride_x                      Stride of the source tensor in X dimension (in bytes)
- * @param[in]  in1_step_x                        in1_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  in1_stride_y                      Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  in1_step_y                        in1_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  in1_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  in1_step_z                        in1_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  in1_offset_first_element_in_bytes The offset of the first element in the source tensor
- * @param[in]  in2_ptr                           Pointer to the source tensor. Supported data types: U8, S16
- * @param[in]  in2_stride_x                      Stride of the source tensor in X dimension (in bytes)
- * @param[in]  in2_step_x                        in2_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  in2_stride_y                      Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  in2_step_y                        in2_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  in2_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  in2_step_z                        in2_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  in2_offset_first_element_in_bytes The offset of the first element in the source tensor
- * @param[out] out_ptr                           Pointer to the destination tensor. Supported data types: U8, S16
- * @param[in]  out_stride_x                      Stride of the destination tensor in X dimension (in bytes)
- * @param[in]  out_step_x                        out_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  out_stride_y                      Stride of the destination tensor in Y dimension (in bytes)
- * @param[in]  out_step_y                        out_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  out_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  out_step_z                        out_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  out_offset_first_element_in_bytes The offset of the first element in the destination tensor
- */
-__kernel void arithmetic_sub_ex(
-    TENSOR3D_DECLARATION(in1),
-    TENSOR3D_DECLARATION(in2),
-    TENSOR3D_DECLARATION(out))
-{
-    // Get pixels pointer
-    Tensor3D in1 = CONVERT_TO_TENSOR3D_STRUCT(in1);
-    Tensor3D in2 = CONVERT_TO_TENSOR3D_STRUCT(in2);
-    Tensor3D out = CONVERT_TO_TENSOR3D_STRUCT(out);
-
-    // Load values
-    VEC_DATA_TYPE(DATA_TYPE_OUT, 16)
-    in_a = CONVERT(vload16(0, (__global DATA_TYPE_IN1 *)in1.ptr), VEC_DATA_TYPE(DATA_TYPE_OUT, 16));
-    VEC_DATA_TYPE(DATA_TYPE_OUT, 16)
-    in_b = CONVERT(vload16(0, (__global DATA_TYPE_IN2 *)in2.ptr), VEC_DATA_TYPE(DATA_TYPE_OUT, 16));
-
-    // Calculate and store result
-    vstore16(SUB(in_a, in_b), 0, (__global DATA_TYPE_OUT *)out.ptr);
-}
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/arithmetic_op_quantized.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/arithmetic_op_quantized.cl
deleted file mode 100644
index 5cd0a4309..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/arithmetic_op_quantized.cl
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016, 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers_asymm.h"
-
-#ifdef SATURATE
-#define ADD(x, y) add_sat((x), (y))
-#define SUB(x, y) sub_sat((x), (y))
-#else /* SATURATE */
-#define ADD(x, y) (x) + (y)
-#define SUB(x, y) (x) - (y)
-#endif /* SATURATE */
-
-/** Performs a pixelwise addition used to quantize down the int32 accumulator values of GEMMLowp to QASYMM8
- *
- * The following computations will be performed:
- *
- *  -# Add offset terms to inputs
-    -# Get scaled value of two inputs
- *  -# Add inputs
- *  -# Add offset terms to final result
- *  -# Multiply each entry of result by result_mult_int
- *  -# Shift the int32 accumulator by result_shift
- *  -# Clamp the resulting int32 values to the [0..255] range and cast to QASYMM8.
- *
- * @attention The inputs and output data types need to be passed at compile time using -DDATA_TYPE_IN1, -DDATA_TYPE_IN2 and -DDATA_TYPE_OUT:
- * e.g. -DDATA_TYPE_IN1=uchar -DDATA_TYPE_IN2=uchar -DDATA_TYPE_OUT=uchar
- * @attention The number of bits to shift left of input tensors must be passed at compile time using -DLEFT_SHIFT
- * @attention The offset, scalar scale factor and number of bits to shift right of input tensors must be passed at compile time using -DIN1_OFFSET, -RIN1_MULT_INT, -DIN1_SHIFT, -DIN2_OFFSET, -RIN2_MULT_INT and -DIN2_SHIFT
- * @attention The offset, scalar scale factor and number of bits to shift right of output tensor must be passed at compile time using -DRESULT_OFFSET, -RESULT_MULT_INT and -DRESULT_SHIFT
- *
- * @attention The input and output data_types need to be passed at compile time using -DDATA_TYPE_IN1, -DDATA_TYPE_IN2 and -DDATA_TYPE_OUT:
- * e.g. -DDATA_TYPE_IN1=uchar -DDATA_TYPE_IN2=uchar -DDATA_TYPE_OUT=uchar
- * @attention The inputs and output scale information of qasymm8 need to be passed at compile time using -DSCALE_IN1, -DSCALE_IN2 and -DSCALE_OUT:
- * e.g. -DSCALE_IN1=1.f -DSCALE_IN2=1.f -DSCALE_OUT=2.f
- * @attention The inputs and output scale offset need to be passed at compile time using -DOFFSET_IN1, -DOFFSET_IN2 and -DOFFSET_OUT:
- * e.g. -DOFFSET_IN1=0 -DOFFSET_IN2=0 -DOFFSET_OUT=0
- * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g. -DVEC_SIZE=16
- * @attention To perform saturating operation -DSATURATE has to be passed to the compiler otherwise wrapping policy will be used.
- *
- * @param[in]  in1_ptr                           Pointer to the source tensor. Supported data types: QASYMM8
- * @param[in]  in1_stride_x                      Stride of the source tensor in X dimension (in bytes)
- * @param[in]  in1_step_x                        in1_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  in1_stride_y                      Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  in1_step_y                        in1_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  in1_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  in1_step_z                        in1_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  in1_offset_first_element_in_bytes The offset of the first element in the source tensor
- * @param[in]  in2_ptr                           Pointer to the source tensor. Supported data types: QASYMM8
- * @param[in]  in2_stride_x                      Stride of the source tensor in X dimension (in bytes)
- * @param[in]  in2_step_x                        in2_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  in2_stride_y                      Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  in2_step_y                        in2_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  in2_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  in2_step_z                        in2_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  in2_offset_first_element_in_bytes The offset of the first element in the source tensor
- * @param[out] out_ptr                           Pointer to the destination tensor. Supported data types: QASYMM8
- * @param[in]  out_stride_x                      Stride of the destination tensor in X dimension (in bytes)
- * @param[in]  out_step_x                        out_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  out_stride_y                      Stride of the destination tensor in Y dimension (in bytes)
- * @param[in]  out_step_y                        out_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  out_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  out_step_z                        out_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  out_offset_first_element_in_bytes The offset of the first element in the destination tensor
- */
-__kernel void arithmetic_add_qasymm8(
-    TENSOR3D_DECLARATION(in1),
-    TENSOR3D_DECLARATION(in2),
-    TENSOR3D_DECLARATION(out))
-{
-    // Get pixels pointer
-    Tensor3D in1 = CONVERT_TO_TENSOR3D_STRUCT(in1);
-    Tensor3D in2 = CONVERT_TO_TENSOR3D_STRUCT(in2);
-    Tensor3D out = CONVERT_TO_TENSOR3D_STRUCT(out);
-
-    // Load data
-    VEC_DATA_TYPE(int, 16)
-    in1_data = CONVERT(vload16(0, (__global DATA_TYPE_IN1 *)in1.ptr), VEC_DATA_TYPE(int, 16));
-    VEC_DATA_TYPE(int, 16)
-    in2_data = CONVERT(vload16(0, (__global DATA_TYPE_IN2 *)in2.ptr), VEC_DATA_TYPE(int, 16));
-
-    // Get scaled value of two inputs
-    VEC_DATA_TYPE(int, 16) in1_val = in1_data + (VEC_DATA_TYPE(int, 16))(IN1_OFFSET);
-    VEC_DATA_TYPE(int, 16) in2_val = in2_data + (VEC_DATA_TYPE(int, 16))(IN2_OFFSET);
-
-    VEC_DATA_TYPE(int, 16) left_shift = (VEC_DATA_TYPE(int, 16))1 << (VEC_DATA_TYPE(int, 16))(LEFT_SHIFT);
-    VEC_DATA_TYPE(int, 16) shifted_in1_val = in1_val * left_shift;
-    VEC_DATA_TYPE(int, 16) shifted_in2_val = in2_val * left_shift;
-
-    VEC_DATA_TYPE(int, 16) scaled_in1_val = ASYMM_MULT_BY_QUANT_MULTIPLIER_LESS_THAN_ONE(shifted_in1_val, IN1_MULT_INT, IN1_SHIFT, 16);
-    VEC_DATA_TYPE(int, 16) scaled_in2_val = ASYMM_MULT_BY_QUANT_MULTIPLIER_LESS_THAN_ONE(shifted_in2_val, IN2_MULT_INT, IN2_SHIFT, 16);
-
-    // Add inputs and multiply with a multiplier smaller than 1
-    VEC_DATA_TYPE(int, 16) sum_val = scaled_in1_val + scaled_in2_val;
-    VEC_DATA_TYPE(int, 16) out_val = ASYMM_MULT_BY_QUANT_MULTIPLIER_LESS_THAN_ONE(sum_val, RESULT_MULT_INT, RESULT_SHIFT, 16);
-    out_val += (VEC_DATA_TYPE(int, 16))(RESULT_OFFSET);
-
-    VEC_DATA_TYPE(uchar, 16) res = CONVERT(out_val, VEC_DATA_TYPE(uchar, 16));
-
-// TODO: Apply min-max BOUND to support fuse with relu.
-/*
-#if defined(MIN_BOUND)
-    res = max(res, (uchar16)MIN_BOUND);
-#endif // defined(MIN_BOUND)
-#if defined(MAX_BOUND)
-    res = min(res, (uchar16)MAX_BOUND);
-#endif // defined(MAX_BOUND)
-*/
-
-    // Store result
-    VSTORE(16)(CONVERT(res, VEC_DATA_TYPE(DATA_TYPE_OUT, 16)),
-                     0, (__global DATA_TYPE_OUT *)out.ptr);
-}
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/batch_to_space_nd.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/batch_to_space_nd.cl
deleted file mode 100644
index ad6a48a02..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/batch_to_space_nd.cl
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016, 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#if defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(BLOCK_SIZE0) && defined(BLOCK_SIZE1) && defined(BATCH_OUT)
-/** Perform batch to space rearrangement of tensor
- *
- * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
- * @attention Output tensor batch should be given as a preprocessor argument using -DBATCH_OUT=size. e.g. -DBATCH_OUT=16
- * @attention block size should be given as a preprocessor argument using -DBLOCK_SIZE0=size. e.g. -DBLOCK_SIZE0=1
- *
- * @param[in]  input_ptr                            Pointer to the source tensor. Supported data types: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
- * @param[in]  input_stride_x                       Stride of the source tensor in X dimension (in bytes)
- * @param[in]  input_step_x                         input_stride_x * number of elements along X processed per workitem(in  bytes)
- * @param[in]  input_stride_y                       Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  input_step_y                         input_stride_y * number of elements along Y processed per workitem(in  bytes)
- * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                         input_stride_z * number of elements along Z processed per workitem(in  bytes)
- * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source tensor
- *
- * @param[out] output_ptr                           Pointer to the destination tensor. Supported data types: same as @p inpu
-t_ptr
- * @param[in]  output_stride_x                      Stride of the destination tensor in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination tensor in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in
-bytes)
- * @param[in]  output_stride_z                      Stride of the destination tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_stride_w                      Stride of the destination tensor in W dimension (in bytes)
- * @param[in]  output_step_w                        output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination tensor
- */
-__kernel void batch_to_space_nd(
-     TENSOR4D_DECLARATION(input),
-     TENSOR4D_DECLARATION(output))
- {
-    Tensor4D in  = CONVERT_TO_TENSOR4D_STRUCT_NO_STEP(input, 0);
-    Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, DEPTH_OUT);
-
-    int out_index[4]={0};
-    int in_index[4]={0};
-
-    out_index[0] = get_global_id(0);//W
-    out_index[1] = get_global_id(1);//H
-    out_index[2] = get_global_id(2) % DEPTH_OUT;//C
-    out_index[3] = get_global_id(2) / DEPTH_OUT;//N
-
-    in_index[0] = out_index[0]/BLOCK_SIZE1;
-    in_index[1] = out_index[1]/BLOCK_SIZE0;
-    in_index[2] = out_index[2];
-    in_index[3] = out_index[3] + ((out_index[1] % BLOCK_SIZE0) * BLOCK_SIZE0 + out_index[0] % BLOCK_SIZE1) * BATCH_OUT;
-
-    *((__global DATA_TYPE *)out.ptr) = *((__global DATA_TYPE *)tensor4D_offset(&in, in_index[0], in_index[1], in_index[2], in_index[3]));
- }
-#endif // defined(DATA_TYPE) && defined(DEPTH_IN) && defined(BLOCK_SIZE0) && defined(BLOCK_SIZE1) && defined(BATCH_OUT)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/binary_logical_op.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/binary_logical_op.cl
deleted file mode 100644
index bea61f53e..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/binary_logical_op.cl
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#ifndef VEC_SIZE
-#define VEC_SIZE 1
-#endif
-
-#if defined(OP_CODE) && defined(DATA_TYPE)
-/** returns truth value of the two input tensors for BINARY LOGICAL OP.
- * where BINARY LOGICAL OP can be AND, OR.
- *
- * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=uchar
- * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g. -DVEC_SIZE=16
- * @attention Operation type(code) specifying which operation to perform should be passed as preprocessor argument using
- * -DOP_CODE = number. e.g. -DOP_CODE=1
- *
- * @param[in]  input1_ptr                            Pointer to the source tensor. Supported data types: QASYMM8
- * @param[in]  input1_stride_x                       Stride of the source tensor in X dimension (in bytes)
- * @param[in]  input1_step_x                         input1_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input1_stride_y                       Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  input1_step_y                         input1_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input1_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input1_step_z                         input1_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input1_offset_first_element_in_bytes  The offset of the first element in the source tensor
- *
- * @param[in]  input2_ptr                            Pointer to the source tensor.Supported data types: QASYMM8
- * @param[in]  input2_stride_x                       Stride of the source tensor in X dimension (in bytes)
- * @param[in]  input2_step_x                         input2_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input2_stride_y                       Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  input2_step_y                         input2_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input2_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input2_step_z                         input2_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input2_offset_first_element_in_bytes  The offset of the first element in the source tensor
- *
- * @param[out] output_ptr                           Pointer to the destination tensor. Supported data types: QASYMM8
- * @param[in]  output_stride_x                      Stride of the destination tensor in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination tensor in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                      Stride of the destination tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- */
-__kernel void binary_logical_op(
-    TENSOR3D_DECLARATION(input1),
-    TENSOR3D_DECLARATION(input2),
-    TENSOR3D_DECLARATION(output))
-{
-    Tensor3D input1  = CONVERT_TO_TENSOR3D_STRUCT(input1);
-    Tensor3D input2  = CONVERT_TO_TENSOR3D_STRUCT(input2);
-    Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
-
-    #if OP_CODE == 1 // LOGICAL AND
-     VSTORE(VEC_SIZE)
-     (CONVERT(VLOAD(VEC_SIZE)
-	     (0, (__global DATA_TYPE *)input1.ptr) && VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input2.ptr),
-             VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE)), 0, (__global DATA_TYPE *)output.ptr);
-
-    #elif OP_CODE == 2 // LOGICAL OR
-     VSTORE(VEC_SIZE)
-     (CONVERT(VLOAD(VEC_SIZE)
-	     (0, (__global DATA_TYPE *)input1.ptr) || VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input2.ptr),
-             VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE)), 0, (__global DATA_TYPE *)output.ptr);
-
-    #else // OP NOT SUPPORTED
-     return
-
-    #endif
-}
-#endif //if defined(OP_CODE) && defined(DATA_TYPE)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/cast.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/cast.cl
deleted file mode 100644
index 3d4675e5d..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/cast.cl
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#ifndef SCALE
-#define SCALE    1.0f
-#endif
-#ifndef OFFSET
-#define OFFSET   0
-#endif
-#ifndef VEC_SIZE
-#define VEC_SIZE 1
-#endif
-
-#if defined(DATA_TYPE_IN) && defined(DATA_TYPE_OUT)
-/** Perform a cast operation on an input tensor.
- *
- * @attention Data types of both input and output can be passed using the -DDATA_TYPE_IN and -DDATA_TYPE_OUT compile flag, e.g. -DDATA_TYPE_IN=float, -DDATA_TYPE_OUT=int
- * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g. -DVEC_SIZE=16
- *
- * @param[in]  input_ptr                            Pointer to the source image. Supported data types: F16/F32
- * @param[in]  input_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  input_step_x                         input_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  input_step_y                         input_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                         input_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source image
- * @param[out] output_ptr                           Pointer to the destination image. Supported data types: same as @p input_ptr
- * @param[in]  output_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination image
- */
-__kernel void cast(
-    TENSOR3D_DECLARATION(input),
-    TENSOR3D_DECLARATION(output))
-{
-    Tensor3D input  = CONVERT_TO_TENSOR3D_STRUCT(input);
-    Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
-
-    VSTORE(VEC_SIZE)(CONVERT(VLOAD(VEC_SIZE)(0, (__global DATA_TYPE_IN *)input.ptr),
-                             VEC_DATA_TYPE(DATA_TYPE_OUT, VEC_SIZE)),
-                     0, (__global DATA_TYPE_OUT *)output.ptr);
-}
-
-/** Perform a cast operation on an QASYMM8 input tensor.
- * @attention Data types of both input and output can be passed using the -DDATA_TYPE_IN and -DDATA_TYPE_OUT compile flag, e.g. -DDATA_TYPE_IN=float, -DDATA_TYPE_OUT=int
- * @attention Offset and Scale of input should be given as a preprocessor argument using -DOFFSET=int, -DSCALE=float. e.g. -DOFFSET=1, -DSCALE=0.5
- * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g. -DVEC_SIZE=16
- *
- * @param[in]  input_ptr                            Pointer to the source image. Supported data types: F16/F32
- * @param[in]  input_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  input_step_x                         input_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  input_step_y                         input_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                         input_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source image
- * @param[out] output_ptr                           Pointer to the destination image. Supported data types: same as @p input_ptr
- * @param[in]  output_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination image
- */
-__kernel void cast_qasymm_in(
-    TENSOR3D_DECLARATION(input),
-    TENSOR3D_DECLARATION(output))
-{
-    Tensor3D input  = CONVERT_TO_TENSOR3D_STRUCT(input);
-    Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
-
-    VEC_DATA_TYPE(DATA_TYPE_IN, VEC_SIZE) in_data =
-        VLOAD(VEC_SIZE)(0, (__global DATA_TYPE_IN *)input.ptr);
-    VEC_DATA_TYPE(int, VEC_SIZE) offset = (VEC_DATA_TYPE(int, VEC_SIZE))(OFFSET);
-    VEC_DATA_TYPE(float, VEC_SIZE) scale = (VEC_DATA_TYPE(float, VEC_SIZE))(SCALE);
-
-    VEC_DATA_TYPE(int, VEC_SIZE) tmp = CONVERT(in_data, VEC_DATA_TYPE(int, VEC_SIZE)) - offset;
-    VEC_DATA_TYPE(float, VEC_SIZE) out_data = CONVERT(tmp, VEC_DATA_TYPE(float, VEC_SIZE)) * scale;
-
-    VSTORE(VEC_SIZE)(CONVERT(out_data, VEC_DATA_TYPE(DATA_TYPE_OUT, VEC_SIZE)),
-                     0, (__global DATA_TYPE_OUT *)output.ptr);
-}
-
-
-/** Perform a cast operation on an QASYMM8 output tensor.
- * @attention Data types of both input and output can be passed using the -DDATA_TYPE_IN and -DDATA_TYPE_OUT compile flag, e.g. -DDATA_TYPE_IN=float, -DDATA_TYPE_OUT=int
- * @attention Offset and Scale of output should be given as a preprocessor argument using -DOFFSET=int, -DSCALE=float. e.g. -DOFFSET=1, -DSCALE=0.5
- * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g. -DVEC_SIZE=16
- *
- * @param[in]  input_ptr                            Pointer to the source image. Supported data types: F16/F32
- * @param[in]  input_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  input_step_x                         input_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  input_step_y                         input_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                         input_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source image
- * @param[out] output_ptr                           Pointer to the destination image. Supported data types: U8
- * @param[in]  output_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination image
- */
-__kernel void cast_qasymm_out(
-    TENSOR3D_DECLARATION(input),
-    TENSOR3D_DECLARATION(output))
-{
-    Tensor3D input  = CONVERT_TO_TENSOR3D_STRUCT(input);
-    Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
-
-    VEC_DATA_TYPE(DATA_TYPE_IN, VEC_SIZE) in_data =
-        VLOAD(VEC_SIZE)(0, (__global DATA_TYPE_IN *)input.ptr);
-    VEC_DATA_TYPE(int, VEC_SIZE) offset = (VEC_DATA_TYPE(int, VEC_SIZE))(OFFSET);
-    VEC_DATA_TYPE(float, VEC_SIZE) scale = (VEC_DATA_TYPE(float, VEC_SIZE))(SCALE);
-
-    VEC_DATA_TYPE(float, VEC_SIZE) tmp = CONVERT(in_data, VEC_DATA_TYPE(float, VEC_SIZE)) / scale;
-    VEC_DATA_TYPE(float, VEC_SIZE) out_data = tmp + CONVERT(offset, VEC_DATA_TYPE(float, VEC_SIZE));
-
-    VSTORE(VEC_SIZE)(CONVERT(out_data, VEC_DATA_TYPE(DATA_TYPE_OUT, VEC_SIZE)),
-                     0, (__global DATA_TYPE_OUT *)output.ptr);
-}
-#endif // defined(DATA_TYPE_IN) && defined(DATA_TYPE_OUT)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/comparison_op.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/comparison_op.cl
deleted file mode 100644
index 765072556..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/comparison_op.cl
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#ifndef VEC_SIZE
-#define VEC_SIZE 1
-#endif
-
-#if defined(DATA_TYPE_IN) && defined(DATA_TYPE_OUT) && defined(OP_CODE)
-/** Returns truth value of comparison operators.
- * Comparison operators may be equal, not_equal etc.
- *
- * @attention The input and output data types need to be passed at compile time using -DDATA_TYPE_IN, -DDATA_TYPE_OUT,
- * e.g. -DDATA_TYPE_IN=float, -DDATA_TYPE_OUT = uchar
- * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g. -DVEC_SIZE=16
- * @attention Operation type(code) specifying which operation to perform should be passed as preprocessor argument using
- * -DOP_CODE = number. e.g. -DOP_CODE=1
- *
- * @param[in]  input1_ptr                            Pointer to the source tensor. Supported data types: U8/S8/U16/S16/F16/U32/S32/F32
- * @param[in]  input1_stride_x                       Stride of the source tensor in X dimension (in bytes)
- * @param[in]  input1_step_x                         input1_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input1_stride_y                       Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  input1_step_y                         input1_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input1_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input1_step_z                         input1_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input1_offset_first_element_in_bytes  The offset of the first element in the source tensor
- *
- * @param[in]  input2_ptr                            Pointer to the source tensor. Supported data types: U8/S8/U16/S16/F16/U32/S32/F32
- * @param[in]  input2_stride_x                       Stride of the source tensor in X dimension (in bytes)
- * @param[in]  input2_step_x                         input2_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input2_stride_y                       Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  input2_step_y                         input2_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input2_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input2_step_z                         input2_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input2_offset_first_element_in_bytes  The offset of the first element in the source tensor
- *
- * @param[out] output_ptr                           Pointer to the destination tensor. Supported data types: QASYMM8
- * @param[in]  output_stride_x                      Stride of the destination tensor in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination tensor in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                      Stride of the destination tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination image
- */
-__kernel void comparison_op(
-    TENSOR3D_DECLARATION(input1),
-    TENSOR3D_DECLARATION(input2),
-    TENSOR3D_DECLARATION(output))
-{
-    Tensor3D input1 = CONVERT_TO_TENSOR3D_STRUCT(input1);
-    Tensor3D input2 = CONVERT_TO_TENSOR3D_STRUCT(input2);
-    Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
-
-    #if OP_CODE == 1 //EQUAL
-     VSTORE(VEC_SIZE)
-     (CONVERT(VLOAD(VEC_SIZE)
-             (0, (__global DATA_TYPE_IN *)input1.ptr) == VLOAD(VEC_SIZE)(0, (__global DATA_TYPE_IN *)input2.ptr),
-             VEC_DATA_TYPE(DATA_TYPE_OUT, VEC_SIZE)),0, (__global DATA_TYPE_OUT *)output.ptr);
-
-    #elif OP_CODE == 2 //NOT_EQUAL
-     VSTORE(VEC_SIZE)
-     (CONVERT(VLOAD(VEC_SIZE)
-             (0, (__global DATA_TYPE_IN *)input1.ptr) != VLOAD(VEC_SIZE)(0, (__global DATA_TYPE_IN *)input2.ptr),
-             VEC_DATA_TYPE(DATA_TYPE_OUT, VEC_SIZE)), 0, (__global DATA_TYPE_OUT *)output.ptr);
-
-    #else // OP NOT SUPPORTED
-     return;
-
-    #endif
-}
-#endif // defined(DATA_TYPE_IN) && defined(DATA_TYPE_OUT) && defined(OP_CODE)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/comparison_op_quantized.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/comparison_op_quantized.cl
deleted file mode 100644
index 1eb305f7b..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/comparison_op_quantized.cl
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-#define SUB(x, y) (x) - (y)
-
-#ifndef VEC_SIZE
-#define VEC_SIZE  1
-#endif
-
-#if defined(OFFSET_IN1) && defined(OFFSET_IN2) && defined(SCALE_IN1) && defined(SCALE_IN2) && defined(DATA_TYPE_OUT)
-
-#define VEC_FLOAT VEC_DATA_TYPE(float, VEC_SIZE)
-#define VEC_INT VEC_DATA_TYPE(int, VEC_SIZE)
-#define VEC_OUT VEC_DATA_TYPE(DATA_TYPE_OUT, VEC_SIZE)
-
-/** Returns the truth value of comparison .
- * @attention Offset and Scale of both input should be given as a preprocessor argument using -DOFFSET_IN1=int, -DOFFSET_IN2=int, -DSCALE_IN1=float and -DSCALE_IN2=float. e.g. -DOFFSET_IN1=1, -DOFFSET_IN2=0, -DSCALE_IN1=0.5, -DSCALE_IN2=0.5
- * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g. -DVEC_SIZE=16
- * @attention Operation type(code) specifying which operation to perform should be passed as preprocessor argument using
- * -DOP_CODE = number. e.g. -DOP_CODE=1
- *
- * @param[in]  input1_ptr                            Pointer to the source tensor. Supported data types: QASYMM8
- * @param[in]  input1_stride_x                       Stride of the source tensor in X dimension (in bytes)
- * @param[in]  input1_step_x                         input1_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input1_stride_y                       Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  input1_step_y                         input1_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input1_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input1_step_z                         input1_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input1_offset_first_element_in_bytes  The offset of the first element in the source tensor
- *
- * @param[in]  input2_ptr                            Pointer to the source tensor. Supported data types: QASYMM8
- * @param[in]  input2_stride_x                       Stride of the source tensor in X dimension (in bytes)
- * @param[in]  input2_step_x                         input2_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input2_stride_y                       Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  input2_step_y                         input2_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input2_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input2_step_z                         input2_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input2_offset_first_element_in_bytes  The offset of the first element in the source tensor
- *
- * @param[out] output_ptr                           Pointer to the destination tensor. Supported data types: QASYMM8
- * @param[in]  output_stride_x                      Stride of the destination tensor in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination tensor in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                      Stride of the destination tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination tensor
- */
-__kernel void comparison_op_qasymm8(
-    TENSOR3D_DECLARATION(in1),
-    TENSOR3D_DECLARATION(in2),
-    TENSOR3D_DECLARATION(out))
-{
-    // Get pixels pointer
-    Tensor3D in1 = CONVERT_TO_TENSOR3D_STRUCT(in1);
-    Tensor3D in2 = CONVERT_TO_TENSOR3D_STRUCT(in2);
-    Tensor3D out = CONVERT_TO_TENSOR3D_STRUCT(out);
-
-    VEC_INT in_a = CONVERT(VLOAD(VEC_SIZE)(0, (__global uchar *)in1.ptr), VEC_INT);
-    VEC_INT in_b = CONVERT(VLOAD(VEC_SIZE)(0, (__global uchar *)in2.ptr), VEC_INT);
-
-    in_a = SUB(in_a, (VEC_INT)((int)OFFSET_IN1));
-    in_b = SUB(in_b, (VEC_INT)((int)OFFSET_IN2));
-
-    const VEC_FLOAT in1f32  = CONVERT(in_a, VEC_FLOAT) * (VEC_FLOAT)((float)SCALE_IN1);
-    const VEC_FLOAT in2f32  = CONVERT(in_b, VEC_FLOAT) * (VEC_FLOAT)((float)SCALE_IN2);
-
-    #if OPCODE == 1 //EQUAL QUANTIZED
-      VSTORE(VEC_SIZE)(CONVERT(in1f32 == in2f32, VEC_OUT), 0, (__global DATA_TYPE_OUT *)out.ptr);
-
-    #elif OPCODE == 2 //NOT EQUAL QUANTIZED
-      VSTORE(VEC_SIZE)(CONVERT(in1f32 != in2f32, VEC_OUT), 0, (__global DATA_TYPE_OUT *)out.ptr);
-
-    #else // OP NOT SUPPORTED
-      return;
-
-    #endif
-}
-#endif // defined(OFFSET_IN1) && defined(OFFSET_IN2) && defined(SCALE_IN1) && defined(SCALE_IN2) && defined(DATA_TYPE_OUT)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/depth_to_space.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/depth_to_space.cl
deleted file mode 100644
index fef2243e7..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/depth_to_space.cl
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016, 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#if defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(BLOCK_SIZE)
-/** Perform space to depth rearrangement of tensor
- *
- * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
- * @attention Input tensor depth should be given as a preprocessor argument using -DDEPTH_IN=size. e.g. -DDEPTH_IN=16
- * @attention block size should be given as a preprocessor argument using -DBLOCK_SIZE=size. e.g. -DBLOCK_SIZE=1
- *
- * @param[in]  input_ptr                            Pointer to the source image. Supported data types: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
- * @param[in]  input_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  input_step_x                         input_stride_x * number of elements along X processed per workitem(in  bytes)
- * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  input_step_y                         input_stride_y * number of elements along Y processed per workitem(in  bytes)
- * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                         input_stride_z * number of elements along Z processed per workitem(in  bytes)
- * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source image
- * @param[out] output_ptr                           Pointer to the destination image. Supported data types: same as @p inpu
-t_ptr
- * @param[in]  output_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in
-bytes)
- * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_stride_w                      Stride of the source tensor in W dimension (in bytes)
- * @param[in]  output_step_w                        output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination image
- */
-__kernel void depth_to_space(
-     TENSOR4D_DECLARATION(input),
-     TENSOR4D_DECLARATION(output))
- {
-    Tensor4D in  = CONVERT_TO_TENSOR4D_STRUCT_NO_STEP(input, 0);
-    Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, DEPTH_OUT);
-
-    int out_index[4]={0};
-    int in_index[4]={0};
-
-    out_index[0] = get_global_id(0);//W
-    out_index[1] = get_global_id(1);//H
-    out_index[2] = get_global_id(2) % DEPTH_OUT;//C
-    out_index[3] = get_global_id(2) / DEPTH_OUT;//B
-
-    in_index[0] = out_index[0]/BLOCK_SIZE;
-    in_index[1] = out_index[1]/BLOCK_SIZE;
-    in_index[2] = out_index[2] + ((out_index[1] % BLOCK_SIZE) * BLOCK_SIZE + out_index[0] % BLOCK_SIZE) * DEPTH_OUT;
-    in_index[3] = out_index[3];
-
-    *((__global DATA_TYPE *)out.ptr) = *((__global DATA_TYPE *)tensor4D_offset(&in, in_index[0], in_index[1], in_index[2],in_index[3]));
- }
-#endif // defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(BLOCK_SIZE)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/embedding_lookup.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/embedding_lookup.cl
deleted file mode 100644
index 348458fe9..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/embedding_lookup.cl
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#ifndef VEC_SIZE
-#define VEC_SIZE 1
-#endif
-
-#if defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(NUM_DIMS)
-/** Perform embedding_lookup of input tensor
- *
- * @note Datatype should be given as a preprocessor argument using -DDATA_TYPE=type. e.g. -DDATA_TYPE=short
- * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g. -DVEC_SIZE=16
- * @attention Output tensor depth should be given as a preprocessor argument using -DDEPTH_OUT=depth. e.g. -DDEPTH_OUT=16
- * @attention Number of input dimensions are passed as a preprocessor argument using -DNUM_DIMS=size, e.g. -DNUM_DIMS=4
- *
- * @param[in]  input_ptr                             Pointer to the source tensor. Supported data types: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
- * @param[in]  input_stride_x                        Stride of the source tensor in X dimension (in bytes)
- * @param[in]  input_step_x                          input_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input_stride_y                        Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  input_step_y                          input_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input_stride_z                        Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                          input_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input_offset_first_element_in_bytes   The offset of the first element in the source tensor
- * @param[in]  input_stride_w                        Stride of the source tensor in W dimension (in bytes)
- * @param[in]  input_step_w                          output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[out] output_ptr                            Pointer to the destination tensor. Supported data types: same as @p input_ptr
- * @param[in]  output_stride_x                       Stride of the destination tensor in X dimension (in bytes)
- * @param[in]  output_step_x                         output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                       Stride of the destination tensor in Y dimension (in bytes)
- * @param[in]  output_step_y                         output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                         output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_stride_w                       Stride of the source tensor in W dimension (in bytes)
- * @param[in]  output_step_w                         output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes  The offset of the first element in the destination tensor
- * @param[in]  lookups_ptr                           Pointer to the lookups vector. Supported data types: S32
- * @param[in]  lookups_stride_x                      Stride of the lookups vector in X dimension (in bytes)
- * @param[in]  lookups_step_x                        lookups_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  lookups_offset_first_element_in_bytes The offset of the first element in the lookups vector
- */
-
-__kernel void embedding_lookup(TENSOR4D_DECLARATION(input),
-                               TENSOR4D_DECLARATION(output),
-                               VECTOR_DECLARATION(lookups))
-{
-    Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, DEPTH_OUT);
-    Tensor4D in = CONVERT_TO_TENSOR4D_STRUCT_NO_STEP(input, DEPTH_OUT);
-
-    Vector lups = CONVERT_TO_VECTOR_STRUCT_NO_STEP(lookups);
-
-    //lookup ids for based on the tensor dimensions
-    int lup_id[4] = {0};
-
-    lup_id[0] = (NUM_DIMS == 1)?*((__global int *)vector_offset(&lups,get_global_id(0)))
-	                       :get_global_id(0);
-    lup_id[1] = (NUM_DIMS == 2)?*((__global int *)vector_offset(&lups,get_global_id(1)))
-	                       :get_global_id(1);
-    lup_id[2] = (NUM_DIMS == 3)?*((__global int *)vector_offset(&lups,get_global_id(2)))
-	                       :get_global_id(2)%DEPTH_OUT;
-    lup_id[3] = (NUM_DIMS == 4)?*((__global int *)vector_offset(&lups, get_global_id(2) / DEPTH_OUT))
-                               :get_global_id(2) / DEPTH_OUT;
-
-    in.ptr += input_offset_first_element_in_bytes + lup_id[0] * input_step_x + lup_id[1] * input_step_y
-              + lup_id[2] * input_step_z + lup_id[3] * input_step_w;
-
-    VSTORE(VEC_SIZE)(CONVERT(VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)in.ptr), VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE)),
-                     0, (__global DATA_TYPE *)out.ptr);
-}
-#endif // defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(NUM_DIMS)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/exp.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/exp.cl
deleted file mode 100644
index 69d94f30a..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/exp.cl
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#ifndef VEC_SIZE
-#define VEC_SIZE 1
-#endif
-
-#if defined(DATA_TYPE)
-/** Perform an exponential operation on an input tensor.
- *
- * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
- * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g. -DVEC_SIZE=16
- * @note Can only take floating point data types.
- *
- * @param[in]  input_ptr                            Pointer to the source image. Supported data types: F16/F32
- * @param[in]  input_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  input_step_x                         input_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  input_step_y                         input_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                         input_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source image
- * @param[out] output_ptr                           Pointer to the destination image. Supported data types: same as @p input_ptr
- * @param[in]  output_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination image
- */
-__kernel void exp_layer(
-    TENSOR3D_DECLARATION(input),
-    TENSOR3D_DECLARATION(output))
-{
-    Tensor3D input  = CONVERT_TO_TENSOR3D_STRUCT(input);
-    Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
-
-    VSTORE(VEC_SIZE)
-    (exp(VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input.ptr)), 0, (__global DATA_TYPE *)output.ptr);
-}
-#endif // defined(DATA_TYPE)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/gather.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/gather.cl
deleted file mode 100644
index 6b767d6c9..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/gather.cl
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-/** Perform gather
- *
- * @note Datatype should be given as a preprocessor argument using -DDATA_TYPE=type. e.g. -DDATA_TYPE=short
- *
- * @param[in]  input1_ptr                            Pointer to the first source tensor. Supported data types: U8/S32/F32
- * @param[in]  input1_stride_x                       Stride of the first source tensor in X dimension (in bytes)
- * @param[in]  input1_step_x                         input_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input1_stride_y                       Stride of the first source tensor in Y dimension (in bytes)
- * @param[in]  input1_step_y                         input_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input1_stride_z                       Stride of the first source tensor in Z dimension (in bytes)
- * @param[in]  input1_step_z                         input_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input1_offset_first_element_in_bytes  The offset of the first element in the first source tensor
- * @param[in]  input2_ptr                            Pointer to the first source tensor. Supported data types: U32
- * @param[in]  input2_stride_x                       Stride of the first source tensor in X dimension (in bytes)
- * @param[in]  input2_step_x                         input_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input2_offset_first_element_in_bytes  The offset of the first element in the first source tensor
- * @param[out] output_ptr                           Pointer to the destination tensor. Supported data types: same as @p input_ptr
- * @param[in]  output_stride_x                      Stride of the destination tensor in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination tensor in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                      Stride of the destination tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination tensor
- */
-__kernel void gather(IMAGE_DECLARATION(input1),
-                    VECTOR_DECLARATION(input2),
-                    IMAGE_DECLARATION(output))
-{
-    Image in1  = CONVERT_TO_IMAGE_STRUCT_NO_STEP(input1);
-    Vector in2  = CONVERT_TO_VECTOR_STRUCT(input2);
-    Image out = CONVERT_TO_IMAGE_STRUCT_NO_STEP(output);
-
-    VEC_DATA_TYPE(DATA_TYPE_IN2, 2)
-    in2_data = CONVERT(vload2(0, (__global DATA_TYPE_IN2 *)in2.ptr), VEC_DATA_TYPE(DATA_TYPE_IN2, 2));
-
-    //TODO: performance tuning for memcopy
-    int index = in2_data.s0;
-    int stride=input1_stride_y/input1_stride_x;
-
-    for(int i=0; i<stride; i++){
-        *((__global DATA_TYPE_OUT *)offset(&out, i,get_global_id(0)))=*((__global DATA_TYPE_IN1 *)offset(&in1, i,index));
-    }
-}
-
-__kernel void gather_1d_out(IMAGE_DECLARATION(input1),
-                    VECTOR_DECLARATION(input2),
-                    VECTOR_DECLARATION(output))
-{
-    Image in1  = CONVERT_TO_IMAGE_STRUCT_NO_STEP(input1);
-    Vector in2  = CONVERT_TO_VECTOR_STRUCT(input2);
-    Vector out = CONVERT_TO_VECTOR_STRUCT_NO_STEP(output);
-
-    VEC_DATA_TYPE(DATA_TYPE_IN2, 2)
-    in2_data = CONVERT(vload2(0, (__global DATA_TYPE_IN2 *)in2.ptr), VEC_DATA_TYPE(DATA_TYPE_IN2, 2));
-
-    //TODO: performance tuning for memcopy
-    int index = in2_data.s0;
-    int stride=input1_stride_y/input1_stride_x;
-
-    for(int i=0; i<stride; i++){
-        *((__global DATA_TYPE_OUT *)vector_offset(&out, i+get_global_id(0)))=*((__global DATA_TYPE_IN1 *)offset(&in1, i, index));
-    }
-}
-
-__kernel void gather_1d(VECTOR_DECLARATION(input1),
-                    VECTOR_DECLARATION(input2),
-                    VECTOR_DECLARATION(output))
-{
-    Vector in1  = CONVERT_TO_VECTOR_STRUCT_NO_STEP(input1);
-    Vector in2  = CONVERT_TO_VECTOR_STRUCT(input2);
-    Vector out = CONVERT_TO_VECTOR_STRUCT_NO_STEP(output);
-
-    VEC_DATA_TYPE(DATA_TYPE_IN2, 2)
-    in2_data = CONVERT(vload2(0, (__global DATA_TYPE_IN2 *)in2.ptr), VEC_DATA_TYPE(DATA_TYPE_IN2, 2));
-
-    //TODO: performance tuning for memcopy
-    int index = in2_data.s0;
-    *((__global DATA_TYPE_OUT *)vector_offset(&out, get_global_id(0)))=*((__global DATA_TYPE_IN1 *)vector_offset(&in1, index));
-}
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/hashtable_lookup.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/hashtable_lookup.cl
deleted file mode 100644
index ed7409852..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/hashtable_lookup.cl
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#ifndef VEC_SIZE
-#define VEC_SIZE 1
-#endif
-
-#if defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(NUM_DIMS)
-/** Perform hashtable_lookup of input tensor
- *
- * @note Datatype should be given as a preprocessor argument using -DDATA_TYPE=type. e.g. -DDATA_TYPE=short
- * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g. -DVEC_SIZE=16
- * @attention Output tensor depth should be given as a preprocessor argument using -DDEPTH_OUT=depth. e.g. -DDEPTH_OUT=16
- * @attention Number of input dimensions are passed as a preprocessor argument using -DNUM_DIMS=size, e.g. -DNUM_DIMS=4
- *
- * @param[in]  input_ptr                             Pointer to the source tensor. Supported data types: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
- * @param[in]  input_stride_x                        Stride of the source tensor in X dimension (in bytes)
- * @param[in]  input_step_x                          input_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input_stride_y                        Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  input_step_y                          input_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input_stride_z                        Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                          input_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input_offset_first_element_in_bytes   The offset of the first element in the source tensor
- * @param[in]  input_stride_w                        Stride of the source tensor in W dimension (in bytes)
- * @param[in]  input_step_w                          output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[out] output_ptr                            Pointer to the destination tensor. Supported data types: same as @p input_ptr
- * @param[in]  output_stride_x                       Stride of the destination tensor in X dimension (in bytes)
- * @param[in]  output_step_x                         output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                       Stride of the destination tensor in Y dimension (in bytes)
- * @param[in]  output_step_y                         output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                         output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_stride_w                       Stride of the source tensor in W dimension (in bytes)
- * @param[in]  output_step_w                         output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes  The offset of the first element in the destination tensor
- * @param[in]  lookups_ptr                           Pointer to the lookups vector. Supported data types: S32
- * @param[in]  lookups_stride_x                      Stride of the lookups vector in X dimension (in bytes)
- * @param[in]  lookups_step_x                        lookups_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  lookups_offset_first_element_in_bytes The offset of the first element in the lookups vector
- */
-__kernel void hashtable_lookup(TENSOR4D_DECLARATION(input),
-                               TENSOR4D_DECLARATION(output),
-                               VECTOR_DECLARATION(lookups))
-{
-    Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, DEPTH_OUT);
-    Tensor4D in = CONVERT_TO_TENSOR4D_STRUCT_NO_STEP(input, DEPTH_OUT);
-
-    Vector lups = CONVERT_TO_VECTOR_STRUCT_NO_STEP(lookups);
-
-    int lup_id[4] = {0};
-
-    lup_id[0] = (NUM_DIMS == 1)?*((__global int *)vector_offset(&lups,get_global_id(0)))
-	                       :get_global_id(0);
-    lup_id[1] = (NUM_DIMS == 2)?*((__global int *)vector_offset(&lups,get_global_id(1)))
-	                       :get_global_id(1);
-    lup_id[2] = (NUM_DIMS == 3)?*((__global int *)vector_offset(&lups,get_global_id(2)))
-	                       :get_global_id(2)%DEPTH_OUT;
-    lup_id[3] = (NUM_DIMS == 4)?*((__global int *)vector_offset(&lups, get_global_id(2) / DEPTH_OUT))
-                               :get_global_id(2) / DEPTH_OUT;
-
-    if (lup_id[NUM_DIMS-1] < 0)
-    {
-      VSTORE(VEC_SIZE)((VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE))0, 0, (__global DATA_TYPE *)out.ptr);
-      return;
-    }
-
-    in.ptr += input_offset_first_element_in_bytes + lup_id[0] * input_step_x + lup_id[1] * input_step_y
-              + lup_id[2] * input_step_z + lup_id[3] * input_step_w;
-
-    VSTORE(VEC_SIZE)(CONVERT(VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)in.ptr), VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE)),
-                     0, (__global DATA_TYPE *)out.ptr);
-}
-#endif // defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(NUM_DIMS)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/neg_tensor.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/neg_tensor.cl
deleted file mode 100644
index e3aa463db..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/neg_tensor.cl
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#ifndef VEC_SIZE
-#define VEC_SIZE 1
-#endif
-
-#if defined(DATA_TYPE)
-/** Performs a negation of input tensor.
- *
- * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g. -DVEC_SIZE=16
- * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
- *
- * @param[in]  in_ptr                            Pointer to the source image. Supported data types: S16/S32/F16/F32.
- * @param[in]  in_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  in_step_x                         in_stride_x * number of elements along X processed per work item (in bytes)
- * @param[in]  in_offset_first_element_in_bytes  Offset of the first element in the source image
- * @param[out] out_ptr                           Pointer to the destination image. Supported data types: same as @p input_ptr
- * @param[in]  out_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  out_step_x                        out_stride_x * number of elements along X processed per work item (in bytes)
- * @param[in]  out_offset_first_element_in_bytes Offset of the first element in the destination image
- */
-__kernel void neg_tensor(
-    TENSOR3D_DECLARATION(input),
-    TENSOR3D_DECLARATION(output))
-{
-    Tensor3D input  = CONVERT_TO_TENSOR3D_STRUCT(input);
-    Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
-
-    VSTORE(VEC_SIZE)
-    (-VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input.ptr), 0, (__global DATA_TYPE *)output.ptr);
-}
-#endif // defined(DATA_TYPE)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/pad.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/pad.cl
deleted file mode 100644
index ecf4696e9..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/pad.cl
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016, 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#if defined(IW) && defined(IH) && defined(ID) && defined(IB) && defined(DEPTH_OUT) && defined(ZERO_VALUE)
-/** Perform space to depth rearrangement of tensor
- *
- * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
- * @attention Output tensor depth should be given as a preprocessor argument using -DDEPTH_OUT=size. e.g. -DDEPTH_OUT=16
- * @attention Input dimensions should be passed as a preprocessor argument using -DIW(width), -DIH(height), -DID(depth) and -DIB(batch). e.g. -DIW = 4
- * @attention The value to be set by pad value using -DZERO_VALUE=value. e.g. -DZERO_VALUE=0
- *
- * @param[in]  input_ptr                            Pointer to the source tensor. Supported data types: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
- * @param[in]  input_stride_x                       Stride of the source tensor in X dimension (in bytes)
- * @param[in]  input_step_x                         input_stride_x * number of elements along X processed per workitem(in  bytes)
- * @param[in]  input_stride_y                       Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  input_step_y                         input_stride_y * number of elements along Y processed per workitem(in  bytes)
- * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                         input_stride_z * number of elements along Z processed per workitem(in  bytes)
- * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source tensor
- *
- * @param[out] output_ptr                           Pointer to the destination tensor. Supported data types: same as @p inpu
-t_ptr
- * @param[in]  output_stride_x                      Stride of the destination tensor in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination tensor in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in
-bytes)
- * @param[in]  output_stride_z                      Stride of the destination tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_stride_w                      Stride of the destination tensor in W dimension (in bytes)
- * @param[in]  output_step_w                        output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination tensor
- *
- * @param[in]  pad_values                           Padding values for each of the dimensions. Only pad values for Up(for
- *                                                  batch), Top(for height), Left(for width) and Front(for depth) are
- *				                    required. Supported data type: S32
- */
-
-__kernel void pad(
-     TENSOR4D_DECLARATION(input),
-     TENSOR4D_DECLARATION(output),
-     const int4 pad_values)
- {
-    Tensor4D in  = CONVERT_TO_TENSOR4D_STRUCT_NO_STEP(input, 0);
-    Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, DEPTH_OUT);
-
-    int index[4]={0};
-
-    index[0] = get_global_id(0);//W
-    index[1] = get_global_id(1);//H
-    index[2] = get_global_id(2) % DEPTH_OUT;//C
-    index[3] = get_global_id(2) / DEPTH_OUT;//N
-
-    if (index[0] < pad_values.x || index[0] >= (IW + pad_values.x) ||
-        index[1] < pad_values.y || index[1] >= (IH + pad_values.y) ||
-        index[2] < pad_values.z || index[2] >= (ID + pad_values.z) ||
-        index[3] < pad_values.w || index[3] >= (IB + pad_values.w))
-    {
-        *((__global DATA_TYPE *)out.ptr) = (DATA_TYPE)ZERO_VALUE;
-    }
-    else
-    {
-        *((__global DATA_TYPE *)out.ptr) = *((__global DATA_TYPE *)
-                                              tensor4D_offset(&in, index[0] - pad_values.x,
-                                                              index[1] - pad_values.y,
-                                                              index[2] - pad_values.z,
-                                                              index[3] - pad_values.w));
-    }
- }
-
-#endif //if defined(IW) && defined(IH) && defined(ID) && defined(IB) && defined(DEPTH_OUT) && defined(ZERO_VALUE)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/permute_ex.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/permute_ex.cl
deleted file mode 100644
index 7cc8b0354..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/permute_ex.cl
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "helpers.h"
-
-#if defined(DATA_TYPE) && defined(DEPTH_IN) && defined(P1) && defined(P2) && defined(P3) && defined(P4)
-/** Perform a Generic permute operation on an input tensor of Shape DCHW.
- *
- * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
- * @attention Input tensor depth should be given as a preprocessor argument using -DDEPTH_IN=size. e.g. -DDEPTH_IN=16
- * @attention Permutation vector is passed as a preprocessor arguement using -DP1, -DP2, -DP3 and -DP4=int, e.g. -DP1=2
- *
- * @param[in]  input_ptr                            Pointer to the source image. Supported data types: U8/S8/QASYMM8/U1
-6/S16/F16/U32/S32/F32
- * @param[in]  input_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  input_step_x                         input_stride_x * number of elements along X processed per workitem(in b
-ytes)
- * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  input_step_y                         input_stride_y * number of elements along Y processed per workitem(in b
-ytes)
- * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                         input_stride_z * number of elements along Z processed per workitem(in b
-ytes)
- * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source image
- * @param[out] output_ptr                           Pointer to the destination image. Supported data types: same as @p inpu
-t_ptr
- * @param[in]  output_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in
-bytes)
- * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_stride_w                      Stride of the source tensor in W dimension (in bytes)
- * @param[in]  output_step_w                        output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination image
- */
-__kernel void permute_generic(
-    TENSOR4D_DECLARATION(input),
-    TENSOR4D_DECLARATION(output))
-{
-    Tensor4D in  = CONVERT_TO_TENSOR4D_STRUCT(input, DEPTH_IN);
-    Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT_NO_STEP(output, 0);
-
-   int out_index[4];
-   int in_index[4];
-   in_index[0] = get_global_id(0);//W
-   in_index[1] = get_global_id(1);//H
-   in_index[2] = get_global_id(2) % DEPTH_IN;//C
-   in_index[3] = get_global_id(2) / DEPTH_IN;//B
-   out_index[0] = in_index[P1];
-   out_index[1] = in_index[P2];
-   out_index[2] = in_index[P3];
-   out_index[3] = in_index[P4];
-
-    *((__global DATA_TYPE *)tensor4D_offset(&out, out_index[0],out_index[1],out_index[2],out_index[3])) = *((__global DATA_TYPE *)in.ptr);
-}
-#endif // defined(DATA_TYPE) && defined(DEPTH_IN) && defined(P1) && defined(P2) && defined(P3) && defined(P4)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/pixelwise_div_float.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/pixelwise_div_float.cl
deleted file mode 100644
index aa05121b1..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/pixelwise_div_float.cl
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016, 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#ifdef SATURATE
-#define CONVERT_OP_FLOAT_STR(x, type, round) (convert_##type##_sat##round(x))
-#else /* SATURATE */
-#define CONVERT_OP_FLOAT_STR(x, type, round) (convert_##type##round(x))
-#endif /* SATURATE */
-#define CONVERT_OP_FLOAT(x, type, round) CONVERT_OP_FLOAT_STR(x, type, round)
-
-/** Performs a pixelwise division with float scale of either integer or float inputs.
- *
- * @attention The inputs and output data types need to be passed at compile time using -DDATA_TYPE_IN1, -DDATA_TYPE_IN2 and -DDATA_TYPE_OUT:
- * e.g. -DDATA_TYPE_IN1=uchar -DDATA_TYPE_IN2=ushort -DDATA_TYPE_OUT=short
- * @attention The data type of the intermediate result of the division should passed as well using -DDATA_TYPE_RES.
- * e.g. If one of inputs is S16 -DDATA_TYPE_RES=int should be passed else -DDATA_TYPE_RES=short.
- * @attention -DDATA_TYPE_FLOAT must be passed if floating point inputs are provided.
- *
- * @param[in]  in1_ptr                           Pointer to the source image. Supported data types: U8, S16, F16, F32
- * @param[in]  in1_stride_x                      Stride of the source image in X dimension (in bytes)
- * @param[in]  in1_step_x                        in1_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  in1_stride_y                      Stride of the source image in Y dimension (in bytes)
- * @param[in]  in1_step_y                        in1_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  in1_stride_z                      Stride of the source image in Y dimension (in bytes)
- * @param[in]  in1_step_z                        in1_stride_z * number of elements along Y processed per workitem(in bytes)
- * @param[in]  in1_offset_first_element_in_bytes The offset of the first element in the source image
- * @param[in]  in2_ptr                           Pointer to the source image. Supported data types: U8, S16, F16, F32
- * @param[in]  in2_stride_x                      Stride of the source image in X dimension (in bytes)
- * @param[in]  in2_step_x                        in2_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  in2_stride_y                      Stride of the source image in Y dimension (in bytes)
- * @param[in]  in2_step_y                        in2_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  in2_stride_z                      Stride of the source image in Y dimension (in bytes)
- * @param[in]  in2_step_z                        in2_stride_z * number of elements along Y processed per workitem(in bytes)
- * @param[in]  in2_offset_first_element_in_bytes The offset of the first element in the source image
- * @param[out] out_ptr                           Pointer to the destination image. Supported data types: U8, S16, F16, F32
- * @param[in]  out_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  out_step_x                        out_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  out_stride_y                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  out_step_y                        out_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  out_stride_z                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  out_step_z                        out_stride_z * number of elements along Y processed per workitem(in bytes)
- * @param[in]  out_offset_first_element_in_bytes The offset of the first element in the destination image
- * @param[in]  scale                             Float scaling factor. Supported data types: F32
- */
-__kernel void pixelwise_div_float(
-    TENSOR3D_DECLARATION(in1),
-    TENSOR3D_DECLARATION(in2),
-    TENSOR3D_DECLARATION(out),
-    const float scale)
-{
-    // Get pixels pointer
-    Tensor3D in1 = CONVERT_TO_TENSOR3D_STRUCT(in1);
-    Tensor3D in2 = CONVERT_TO_TENSOR3D_STRUCT(in2);
-    Tensor3D out = CONVERT_TO_TENSOR3D_STRUCT(out);
-
-    // Load data
-    VEC_DATA_TYPE(DATA_TYPE_RES, 16)
-    in1_data = CONVERT(vload16(0, (__global DATA_TYPE_IN1 *)in1.ptr), VEC_DATA_TYPE(DATA_TYPE_RES, 16));
-    VEC_DATA_TYPE(DATA_TYPE_RES, 16)
-    in2_data = CONVERT(vload16(0, (__global DATA_TYPE_IN2 *)in2.ptr), VEC_DATA_TYPE(DATA_TYPE_RES, 16));
-
-    // Perform division
-#ifdef DATA_TYPE_FLOAT
-    VEC_DATA_TYPE(DATA_TYPE_OUT, 16)
-    res = CONVERT(in1_data / in2_data * (DATA_TYPE_RES)scale, VEC_DATA_TYPE(DATA_TYPE_OUT, 16));
-#else  /* DATA_TYPE_FLOAT */
-    VEC_DATA_TYPE(DATA_TYPE_OUT, 16)
-    res = CONVERT_OP_FLOAT(CONVERT_OP_FLOAT((convert_float16(in1_data / in2_data) * scale), VEC_DATA_TYPE(DATA_TYPE_RES, 16), ROUND), VEC_DATA_TYPE(DATA_TYPE_OUT, 16), ROUND);
-#endif /* DATA_TYPE_FLOAT */
-
-    // Store result
-    vstore16(res, 0, (__global DATA_TYPE_OUT *)out.ptr);
-}
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/pixelwise_div_int.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/pixelwise_div_int.cl
deleted file mode 100644
index fdfb78003..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/pixelwise_div_int.cl
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016, 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#if defined(SATURATE)
-#define CONVERT_OP_INT_STR(x, type, size) (convert_##type##size##_sat(x))
-#else // SATURATE
-#define CONVERT_OP_INT_STR(x, type, size) (convert_##type##size(x))
-#endif // SATURATE
-#define CONVERT_OP_INT(x, type, size) CONVERT_OP_INT_STR(x, type, size)
-
-#define DIV_OP(x, y, scale, type, size) CONVERT_OP_INT((x) / (y) >> scale, type, size)
-
-/** Performs a pixelwise division with integer scale of integer inputs.
- *
- * @attention The inputs and output data types need to be passed at compile time using -DDATA_TYPE_IN1, -DDATA_TYPE_IN2 and -DDATA_TYPE_OUT:
- * e.g. -DDATA_TYPE_IN1=uchar -DDATA_TYPE_IN2=ushort -DDATA_TYPE_OUT=short
- * @attention The data_type of the intermediate result of the division should passed as well using -DDATA_TYPE_RES.
- * e.g. If one of inputs is S16 -DDATA_TYPE_RES=int should be passed else -DDATA_TYPE_RES=short.
- *
- * @param[in]  in1_ptr                           Pointer to the source image. Supported data types: U8/S16
- * @param[in]  in1_stride_x                      Stride of the source image in X dimension (in bytes)
- * @param[in]  in1_step_x                        in1_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  in1_stride_y                      Stride of the source image in Y dimension (in bytes)
- * @param[in]  in1_step_y                        in1_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  in1_stride_z                      Stride of the source image in Y dimension (in bytes)
- * @param[in]  in1_step_z                        in1_stride_z * number of elements along Y processed per workitem(in bytes)
- * @param[in]  in1_offset_first_element_in_bytes The offset of the first element in the source image
- * @param[in]  in2_ptr                           Pointer to the source image. Supported data types: same as @p in1_ptr
- * @param[in]  in2_stride_x                      Stride of the source image in X dimension (in bytes)
- * @param[in]  in2_step_x                        in2_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  in2_stride_y                      Stride of the source image in Y dimension (in bytes)
- * @param[in]  in2_step_y                        in2_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  in2_stride_z                      Stride of the source image in Y dimension (in bytes)
- * @param[in]  in2_step_z                        in2_stride_z * number of elements along Y processed per workitem(in bytes)
- * @param[in]  in2_offset_first_element_in_bytes The offset of the first element in the source image
- * @param[out] out_ptr                           Pointer to the destination image. Supported data types: same as @p in1_ptr
- * @param[in]  out_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  out_step_x                        out_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  out_stride_y                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  out_step_y                        out_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  out_stride_z                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  out_step_z                        out_stride_z * number of elements along Y processed per workitem(in bytes)
- * @param[in]  out_offset_first_element_in_bytes The offset of the first element in the destination image
- * @param[in]  scale                             Integer scaling factor. Supported data types: S32
- */
-__kernel void pixelwise_div_int(
-    TENSOR3D_DECLARATION(in1),
-    TENSOR3D_DECLARATION(in2),
-    TENSOR3D_DECLARATION(out),
-    const uint scale)
-{
-    // Get pixels pointer
-    Tensor3D in1 = CONVERT_TO_TENSOR3D_STRUCT(in1);
-    Tensor3D in2 = CONVERT_TO_TENSOR3D_STRUCT(in2);
-    Tensor3D out = CONVERT_TO_TENSOR3D_STRUCT(out);
-
-    // Load data
-    VEC_DATA_TYPE(DATA_TYPE_RES, 16)
-    in1_data = CONVERT(vload16(0, (__global DATA_TYPE_IN1 *)in1.ptr), VEC_DATA_TYPE(DATA_TYPE_RES, 16));
-    VEC_DATA_TYPE(DATA_TYPE_RES, 16)
-    in2_data = CONVERT(vload16(0, (__global DATA_TYPE_IN2 *)in2.ptr), VEC_DATA_TYPE(DATA_TYPE_RES, 16));
-
-    // Perform division and store result
-    vstore16(DIV_OP(in1_data, in2_data, scale, DATA_TYPE_OUT, 16), 0, (__global DATA_TYPE_OUT *)out.ptr);
-}
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/pixelwise_mul_quantized.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/pixelwise_mul_quantized.cl
deleted file mode 100644
index ab1307e64..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/pixelwise_mul_quantized.cl
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016, 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers_asymm.h"
-
-#ifdef SATURATE
-#define CONVERT_OP_FLOAT_STR(x, type, round) (convert_##type##_sat##round(x))
-#else /* SATURATE */
-#define CONVERT_OP_FLOAT_STR(x, type, round) (convert_##type##round(x))
-#endif /* SATURATE */
-#define CONVERT_OP_FLOAT(x, type, round) CONVERT_OP_FLOAT_STR(x, type, round)
-
-#if defined(RESULT_OFFSET) && defined(RESULT_MULT_INT) && defined(RESULT_SHIFT)
-/** Performs a pixelwise multiplication used to quantize down the int32 accumulator values of GEMMLowp to QASYMM8
- *
- * The following computations will be performed by the kernel:
- *
- *  -# Add offset terms to inputs
- *  -# Multiply inputs
- *  -# Add offset terms to final result
- *  -# Multiply each entry of result by result_mult_int
- *  -# Shift the int32 accumulator by result_shift
- *  -# Clamp the resulting int32 values to the [0..255] range and cast to QASYMM8.
- *
- * @attention The inputs and output data types need to be passed at compile time using -DDATA_TYPE_IN1, -DDATA_TYPE_IN2 and -DDATA_TYPE_OUT:
- * e.g. -DDATA_TYPE_IN1=uchar -DDATA_TYPE_IN2=uchar -DDATA_TYPE_OUT=uchar
- * @attention The offset factor of inputs must be passed at compile time using -DIN1_OFFSET and -DIN2_OFFSET
- * @attention The offset, scalar scale factor and number of bits to shift right of output tensor must be passed at compile time using -DRESULT_OFFSET, -RESULT_MULT_INT and -DRESULT_SHIFT
- *
- * @param[in]  in1_ptr                           Pointer to the source image. Supported data types: U8
- * @param[in]  in1_stride_x                      Stride of the source image in X dimension (in bytes)
- * @param[in]  in1_step_x                        in1_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  in1_stride_y                      Stride of the source image in Y dimension (in bytes)
- * @param[in]  in1_step_y                        in1_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  in1_stride_z                      Stride of the source image in Y dimension (in bytes)
- * @param[in]  in1_step_z                        in1_stride_z * number of elements along Y processed per workitem(in bytes)
- * @param[in]  in1_offset_first_element_in_bytes The offset of the first element in the source image
- * @param[in]  in2_ptr                           Pointer to the source image. Supported data types: U8
- * @param[in]  in2_stride_x                      Stride of the source image in X dimension (in bytes)
- * @param[in]  in2_step_x                        in2_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  in2_stride_y                      Stride of the source image in Y dimension (in bytes)
- * @param[in]  in2_step_y                        in2_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  in2_stride_z                      Stride of the source image in Y dimension (in bytes)
- * @param[in]  in2_step_z                        in2_stride_z * number of elements along Y processed per workitem(in bytes)
- * @param[in]  in2_offset_first_element_in_bytes The offset of the first element in the source image
- * @param[out] out_ptr                           Pointer to the destination image. Supported data types: U8
- * @param[in]  out_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  out_step_x                        out_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  out_stride_y                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  out_step_y                        out_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  out_stride_z                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  out_step_z                        out_stride_z * number of elements along Y processed per workitem(in bytes)
- * @param[in]  out_offset_first_element_in_bytes The offset of the first element in the destination image
- * @param[in]  scale                             Float scaling factor. Supported data types: F32
- */
-__kernel void pixelwise_mul_qasymm8(
-    TENSOR3D_DECLARATION(in1),
-    TENSOR3D_DECLARATION(in2),
-    TENSOR3D_DECLARATION(out),
-    const float scale)
-{
-    // Get pixels pointer
-    Tensor3D in1 = CONVERT_TO_TENSOR3D_STRUCT(in1);
-    Tensor3D in2 = CONVERT_TO_TENSOR3D_STRUCT(in2);
-    Tensor3D out = CONVERT_TO_TENSOR3D_STRUCT(out);
-
-    // Load data
-    VEC_DATA_TYPE(int, 16)
-    in1_data = CONVERT(vload16(0, (__global DATA_TYPE_IN1 *)in1.ptr), VEC_DATA_TYPE(int, 16));
-    VEC_DATA_TYPE(int, 16)
-    in2_data = CONVERT(vload16(0, (__global DATA_TYPE_IN2 *)in2.ptr), VEC_DATA_TYPE(int, 16));
-
-    // Perform multiplication of two inputs
-    VEC_DATA_TYPE(int, 16) in1_val = in1_data + (VEC_DATA_TYPE(int, 16))(IN1_OFFSET);
-    VEC_DATA_TYPE(int, 16) in2_val = in2_data + (VEC_DATA_TYPE(int, 16))(IN2_OFFSET);
-    VEC_DATA_TYPE(int, 16) out_val = in1_val * in2_val;
-
-    // Multiply with a multiplier smaller than 1
-    out_val = ASYMM_MULT_BY_QUANT_MULTIPLIER_LESS_THAN_ONE(out_val, RESULT_MULT_INT, RESULT_SHIFT, 16);
-    out_val += (VEC_DATA_TYPE(int, 16))(RESULT_OFFSET);
-
-    VEC_DATA_TYPE(uchar, 16) res = CONVERT(out_val, VEC_DATA_TYPE(uchar, 16));
-
-// TODO: Apply min-max BOUND to support fuse with relu.
-/*
-#if defined(MIN_BOUND)
-    res = max(res, (uchar16)MIN_BOUND);
-#endif // defined(MIN_BOUND)
-#if defined(MAX_BOUND)
-    res = min(res, (uchar16)MAX_BOUND);
-#endif // defined(MAX_BOUND)
-*/
-
-    // Store result
-    VSTORE(16)(CONVERT(res, VEC_DATA_TYPE(DATA_TYPE_OUT, 16)),
-                     0, (__global DATA_TYPE_OUT *)out.ptr);
-}
-#endif // defined(RESULT_OFFSET) && defined(RESULT_MULT_INT) && defined(RESULT_SHIFT)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/prelu.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/prelu.cl
deleted file mode 100644
index 68da2ba32..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/prelu.cl
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#ifndef VEC_SIZE
-#define VEC_SIZE 1
-#endif
-
-#if defined(DATA_TYPE)
-/** Returns result of prelu function implemented as below:
- * f(input) = alpha * input for input < 0, f(input) = input for input >= 0.
- *
- * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
- * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g. -DVEC_SIZE=16
- * @note Can only take floating point data types.
- *
- * @param[in]  input1_ptr                            Pointer to the source image. Supported Data types : F16/F32
- * @param[in]  input1_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  input1_step_x                         input1_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input1_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  input1_step_y                         input1_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input1_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input1_step_z                         input1_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input1_offset_first_element_in_bytes  The offset of the first element in the source image
- *
- * @param[in]  alpha_ptr                            Pointer to the source image. Supported Data types : F16/F32
- * @param[in]  alpha_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  alpha_step_x                         input2_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  alpha_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  alpha_step_y                         input2_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  alpha_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  alpha_step_z                         input2_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  alpha_offset_first_element_in_bytes  The offset of the first element in the source image
- *
- * @param[out] output_ptr                           Pointer to the destination image. Supported data types: same as @p input_ptr
- * @param[in]  output_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination image
- */
-__kernel void prelu(
-    TENSOR3D_DECLARATION(input),
-    TENSOR3D_DECLARATION(alpha),
-    TENSOR3D_DECLARATION(output))
-{
-    Tensor3D input  = CONVERT_TO_TENSOR3D_STRUCT(input);
-    Tensor3D alpha  = CONVERT_TO_TENSOR3D_STRUCT(alpha);
-    Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
-
-    VSTORE(VEC_SIZE)
-      (VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input.ptr) < 0 ?
-                       VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input.ptr) * VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)alpha.ptr) :
-	               VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input.ptr),
-       0, (__global DATA_TYPE *)output.ptr);
-
-}
-#endif // defined(DATA_TYPE)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/prelu_quantized.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/prelu_quantized.cl
deleted file mode 100644
index 7e97b7ed6..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/prelu_quantized.cl
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-#define SUB(x, y) (x) - (y)
-
-#if defined(OFF_IN1) && defined(OFF_IN2) && defined(OFF_OUT) && defined(SCALE_IN1) && defined(SCALE_IN2) && defined(SCALE_OUT) && defined(VEC_SIZE)
-
-#define VEC_FLOAT VEC_DATA_TYPE(float, VEC_SIZE)
-#define VEC_INT VEC_DATA_TYPE(int, VEC_SIZE)
-#define VEC_UCHAR VEC_DATA_TYPE(uchar, VEC_SIZE)
-#define CONVERT_RTE(x, type) (convert_##type##_rte((x)))
-#define CONVERT_DOWN(x, type) CONVERT_RTE(x, type)
-
-/** Returns result of prelu function implemented as below:
- * f(input) = alpha * input for input < 0, f(input) = input for input >= 0.
- *
- * @attention Data type can be passed using the -DDATA_TYPE_IN compile flag, e.g. -DDATA_TYPE_IN=uchar
- * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g. -DVEC_SIZE=16
- * @note Can only take uchar data types.
- *
- * @param[in]  input1_ptr                            Pointer to the source image. Supported Data types : QASYMM8
- * @param[in]  input1_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  input1_step_x                         input1_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input1_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  input1_step_y                         input1_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input1_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input1_step_z                         input1_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input1_offset_first_element_in_bytes  The offset of the first element in the source image
- *
- * @param[in]  alpha_ptr                            Pointer to the source image. Supported Data types : QASYMM8
- * @param[in]  alpha_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  alpha_step_x                         input2_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  alpha_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  alpha_step_y                         input2_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  alpha_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  alpha_step_z                         input2_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  alpha_offset_first_element_in_bytes  The offset of the first element in the source image
- *
- * @param[out] output_ptr                           Pointer to the destination image. Supported data types: same as @p input_ptr
- * @param[in]  output_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination image
- */
-__kernel void prelu_qasymm8(
-    TENSOR3D_DECLARATION(input),
-    TENSOR3D_DECLARATION(alpha),
-    TENSOR3D_DECLARATION(output))
-{
-    // Get pixels pointer
-    Tensor3D input = CONVERT_TO_TENSOR3D_STRUCT(input);
-    Tensor3D alpha = CONVERT_TO_TENSOR3D_STRUCT(alpha);
-    Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
-
-    VEC_INT in_a = CONVERT(VLOAD(VEC_SIZE)(0, (__global uchar *)input.ptr), VEC_INT);
-    VEC_INT in_b = CONVERT(VLOAD(VEC_SIZE)(0, (__global uchar *)alpha.ptr), VEC_INT);
-
-    in_a = SUB(in_a, (VEC_INT)((int)OFF_IN1));
-    in_b = SUB(in_b, (VEC_INT)((int)OFF_IN2));
-
-    const VEC_FLOAT in1f32  = CONVERT(in_a, VEC_FLOAT) * (VEC_FLOAT)((float)SCALE_IN1);
-    const VEC_FLOAT in2f32  = CONVERT(in_b, VEC_FLOAT) * (VEC_FLOAT)((float)SCALE_IN2);
-    const VEC_FLOAT outf32 = in1f32 < 0 ? in1f32 * in2f32 : in1f32;
-    const VEC_FLOAT qresf32 = outf32 / ((VEC_FLOAT)(float)SCALE_OUT) + ((VEC_FLOAT)((float)OFF_OUT));
-    const VEC_UCHAR res     = CONVERT_SAT(CONVERT_DOWN(qresf32, VEC_INT), VEC_UCHAR);
-
-    VSTORE(VEC_SIZE)
-    (res, 0, (__global uchar *)output.ptr);
-}
-
-#endif // defined(OFF_IN1) && defined(OFF_IN2) && defined(OFF_OUT) && defined(SCALE_IN1) && defined(SCALE_IN2) && defined(SCALE_OUT) && defined(VEC_SIZE)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/reduce_operation.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/reduce_operation.cl
deleted file mode 100644
index 8bef49363..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/reduce_operation.cl
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016, 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#if defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(OP_CODE)
-/** Perform reduce max/min
- *
- * @note Datatype should be given as a preprocessor argument using -DDATA_TYPE=type. e.g. -DDATA_TYPE=short
- * @attention Output tensor depth should be given as a preprocessor argument using -DDEPTH_OUT=size. e.g. -DDEPTH_OUT=16
- * @attention Operation type(code) specifying which operation to perform should be passed as preprocessor argument using
- * -DOP_CODE = number. e.g. -DOP_CODE=1
- *
- * @param[in]  input_ptr                            Pointer to the source image. Supported data types: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
- * @param[in]  input_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  input_step_x                         input_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  input_step_y                         input_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                         input_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source image
- * @param[in]  input_stride_w                       Stride of the source tensor in W dimension (in bytes)
- * @param[in]  input_step_w                         output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[out] output_ptr                           Pointer to the destination image. Supported data types: same as @p input_ptr
- * @param[in]  output_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_stride_w                      Stride of the source tensor in W dimension (in bytes)
- * @param[in]  output_step_w                        output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination image
- * @param[in]  axis                                 Axis through which reduction occurs
- * @param[in]  dim                                  Dimension across the axis to be reduced.
- */
-__kernel void reduce_min_max(TENSOR4D_DECLARATION(input),
-                             TENSOR4D_DECLARATION(output),
-                             const int axis,
-                             const int dim)
-{
-    Tensor4D in  = CONVERT_TO_TENSOR4D_STRUCT(input, 0);
-    Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, DEPTH_OUT);
-
-    int indices[4] =
-    {
-        get_global_id(0),
-        get_global_id(1),
-        get_global_id(2) % DEPTH_OUT,
-        get_global_id(2) / DEPTH_OUT,
-    };
-
-    DATA_TYPE value = *((__global DATA_TYPE *)tensor4D_offset(&in, indices[0], indices[1], indices[2], indices[3]));
-    for(int i = 1; i < dim; ++i)
-    {
-      indices[axis] = i;
-
-      #if OP_CODE == 1 // REDUCE_MAX
-       value = max(value, *((__global DATA_TYPE *)
-			   tensor4D_offset(&in, indices[0], indices[1], indices[2], indices[3])));
-
-      #elif OP_CODE == 2 // REDUCE_MIN
-       value = min(value, *((__global DATA_TYPE *)
-			   tensor4D_offset(&in, indices[0], indices[1], indices[2], indices[3])));
-
-      #else // OP NOT SUPPORTED
-       return;
-
-      #endif
-    }
-
-    *((__global DATA_TYPE *)out.ptr) = value;
-}
-
-/** Perform reduce sum/mean
- *
- * @note Datatype should be given as a preprocessor argument using -DDATA_TYPE=type. e.g. -DDATA_TYPE=short
- * @attention Output tensor depth should be given as a preprocessor argument using -DDEPTH_OUT=size. e.g. -DDEPTH_OUT=16
- * @attention Operation type(code) specifying which operation to perform should be passed as preprocessor argument using
- * -DOP_CODE = number. e.g. -DOP_CODE=1
- *
- * @param[in]  input_ptr                            Pointer to the source image. Supported data types: U8/S8/U16/S16/F16/U32/S32/F32
- * @param[in]  input_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  input_step_x                         input_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  input_step_y                         input_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                         input_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source image
- * @param[in]  input_stride_w                       Stride of the source tensor in W dimension (in bytes)
- * @param[in]  input_step_w                         output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[out] output_ptr                           Pointer to the destination image. Supported data types: same as @p input_ptr
- * @param[in]  output_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_stride_w                      Stride of the source tensor in W dimension (in bytes)
- * @param[in]  output_step_w                        output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination image
- * @param[in]  axis                                 Axis through which reduction occurs
- * @param[in]  dim                                  Dimension across the axis to be reduced.
- */
-__kernel void reduce_sum_mean(TENSOR4D_DECLARATION(input),
-                              TENSOR4D_DECLARATION(output),
-                              const int axis,
-                              const int dim)
-{
-    Tensor4D in  = CONVERT_TO_TENSOR4D_STRUCT(input, 0);
-    Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, DEPTH_OUT);
-
-    int indices[4] =
-    {
-        get_global_id(0),
-        get_global_id(1),
-        get_global_id(2) % DEPTH_OUT,
-        get_global_id(2) / DEPTH_OUT,
-    };
-
-    DATA_TYPE sum_value = (DATA_TYPE)0;
-    for(int i = 0; i < dim; ++i)
-    {
-      indices[axis] = i;
-      sum_value += *((__global DATA_TYPE *)tensor4D_offset(&in, indices[0], indices[1], indices[2], indices[3]));
-    }
-
-    #if OP_CODE == 3 // REDUCE_SUM
-     *((__global DATA_TYPE *)out.ptr) = sum_value;
-
-    #elif OP_CODE == 4 // REDUCE_MEAN
-     *((__global DATA_TYPE *)out.ptr) = sum_value / CONVERT(dim, DATA_TYPE);
-
-    #else // OP NOT SUPPORTED
-     return;
-
-    #endif
-}
-#endif // defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(OP_CODE)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/space_to_batch.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/space_to_batch.cl
deleted file mode 100644
index a0fc2d5a9..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/space_to_batch.cl
+++ /dev/null
@@ -1,163 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016, 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#if defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(BATCH_IN) && defined(HEIGHT_IN) && defined(WIDTH_IN) && defined(ZERO_VALUE)
-/** Perform space to batch with input of 4D and NCHW format
- *
- * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
- * @attention Output tensor depth should be given as a preprocessor argument using -DDEPTH_OUT=size. e.g. -DDEPTH_OUT=16
- * @attention Input tensor batch should be given as a preprocessor argument using -DBATCH_IN=size. e.g. -DBATCH_IN=16
- * @attention Input tensor height should be given as a preprocessor argument using -DHEIGHT_IN=size. e.g. -DHEIGHT_IN=16
- * @attention Input tensor width should be given as a preprocessor argument using -DHEIGHT_IN=size. e.g. -DWIDTH_IN=16
- * @attention The value to be set by pad value using -DZERO_VALUE=value. e.g. -DZERO_VALUE=0
- *
- * @param[in]  input_ptr                                   Pointer to the source tensor. Supported data types: U8/S8/U16/S16/F16/U32/S32/F32
- * @param[in]  input_stride_x                              Stride of the source tensor in X dimension (in bytes)
- * @param[in]  input_step_x                                input_stride_x * number of elements along X processed per workitem(in  bytes)
- * @param[in]  input_stride_y                              Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  input_step_y                                input_stride_y * number of elements along Y processed per workitem(in  bytes)
- * @param[in]  input_stride_z                              Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                                input_stride_z * number of elements along Z processed per workitem(in  bytes)
- * @param[in]  input_stride_w                              Stride of the destination tensor in W dimension (in bytes)
- * @param[in]  input_step_w                                input_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[in]  input_offset_first_element_in_bytes         The offset of the first element in the source tensor
- * @param[out] output_ptr                                  Pointer to the destination tensor. Supported data types: same as @p input_ptr
- * @param[in]  output_stride_x                             Stride of the destination tensor in X dimension (in bytes)
- * @param[in]  output_step_x                               output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                             Stride of the destination tensor in Y dimension (in bytes)
- * @param[in]  output_step_y                               output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                             Stride of the destination tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                               output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_stride_w                             Stride of the destination tensor in W dimension (in bytes)
- * @param[in]  output_step_w                               output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes        The offset of the first element in the destination tensor
- * @param[in]  block_size_ptr                              Pointer to the source tensor. Supported data types: S32
- * @param[in]  block_size_stride_x                         Stride of the source tensor in X dimension (in bytes)
- * @param[in]  block_size_step_x                           block_size_stride_x * number of elements along X processed per workitem(in  bytes)
- * @param[in]  block_size_offset_first_element_in_bytes    The offset of the first element in the destination tensor
- * @param[in]  padding_size_ptr                            Pointer to the source tensor. Supported data types: S32
- * @param[in]  padding_size_stride_x                       Stride of the source tensor in X dimension (in bytes)
- * @param[in]  padding_size_step_x                         padding_size_stride_x * number of elements along X processed per workitem(in  bytes)
- * @param[in]  padding_size_stride_y                       Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  padding_size_step_y                         padding_size_stride_y * number of elements along Y processed per workitem(in  bytes)
- * @param[in]  padding_size_offset_first_element_in_bytes  The offset of the first element in the destination tensor
- */
-__kernel void space_to_batch_4d_nchw(TENSOR4D_DECLARATION(input),
-                                     TENSOR4D_DECLARATION(output),
-                                     VECTOR_DECLARATION(block_size),
-                                     IMAGE_DECLARATION(padding_size))
-{
-    Tensor4D in  = CONVERT_TO_TENSOR4D_STRUCT(input, 0);
-    Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, DEPTH_OUT);
-
-    int block_size_x = *((__global int *)(block_size_ptr));
-    int block_size_y = *((__global int *)(block_size_ptr + block_size_stride_x));
-    int shift_x = (get_global_id(2) / DEPTH_OUT / BATCH_IN) % block_size_x;
-    int shift_y = (get_global_id(2) / DEPTH_OUT / BATCH_IN) / block_size_x;
-
-    int in_index[4] = {0, };
-    in_index[0] = get_global_id(0) * block_size_x + shift_x - *((__global int *)(padding_size_ptr));
-    in_index[1] = get_global_id(1) * block_size_y + shift_y - *((__global int *)(padding_size_ptr + padding_size_stride_y));
-    in_index[2] = get_global_id(2) % DEPTH_OUT;
-    in_index[3] = (get_global_id(2) / DEPTH_OUT) % BATCH_IN;
-
-    if (in_index[0] < 0 || in_index[0] >= WIDTH_IN || in_index[1] < 0 || in_index[1] >= HEIGHT_IN)
-    {
-        *((__global DATA_TYPE *)out.ptr) = (DATA_TYPE)ZERO_VALUE;
-    }
-    else
-    {
-        *((__global DATA_TYPE *)out.ptr) = *((__global DATA_TYPE *)tensor4D_offset(&in, in_index[0], in_index[1], in_index[2], in_index[3]));
-    }
-}
-#endif // defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(BATCH_IN) && defined(HEIGHT_IN) && defined(WIDTH_IN) && defined(ZERO_VALUE)
-
-#if defined(DATA_TYPE) && defined(HEIGHT_OUT) && defined(BATCH_IN) && defined(HEIGHT_IN) && defined(WIDTH_IN) && defined(ZERO_VALUE) && defined(VEC_SIZE)
-/** Perform space to batch with input of 4D and NHWC format
- *
- * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
- * @attention Output tensor depth should be given as a preprocessor argument using -DHEIGHT_OUT=size. e.g. -DHEIGHT_OUT=16
- * @attention Input tensor batch should be given as a preprocessor argument using -DBATCH_IN=size. e.g. -DBATCH_IN=16
- * @attention Input tensor height should be given as a preprocessor argument using -DHEIGHT_IN=size. e.g. -DHEIGHT_IN=16
- * @attention Input tensor width should be given as a preprocessor argument using -DHEIGHT_IN=size. e.g. -DWIDTH_IN=16
- * @attention The value to be set by pad value using -DZERO_VALUE=value. e.g. -DZERO_VALUE=0
- * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g. -DVEC_SIZE=16
- *
- * @param[in]  input_ptr                                   Pointer to the source tensor. Supported data types: U8/S8/U16/S16/F16/U32/S32/F32
- * @param[in]  input_stride_x                              Stride of the source tensor in X dimension (in bytes)
- * @param[in]  input_step_x                                input_stride_x * number of elements along X processed per workitem(in  bytes)
- * @param[in]  input_stride_y                              Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  input_step_y                                input_stride_y * number of elements along Y processed per workitem(in  bytes)
- * @param[in]  input_stride_z                              Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                                input_stride_z * number of elements along Z processed per workitem(in  bytes)
- * @param[in]  input_stride_w                              Stride of the destination tensor in W dimension (in bytes)
- * @param[in]  input_step_w                                input_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[in]  input_offset_first_element_in_bytes         The offset of the first element in the source tensor
- * @param[out] output_ptr                                  Pointer to the destination tensor. Supported data types: same as @p input_ptr
- * @param[in]  output_stride_x                             Stride of the destination tensor in X dimension (in bytes)
- * @param[in]  output_step_x                               output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                             Stride of the destination tensor in Y dimension (in bytes)
- * @param[in]  output_step_y                               output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                             Stride of the destination tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                               output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_stride_w                             Stride of the destination tensor in W dimension (in bytes)
- * @param[in]  output_step_w                               output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes        The offset of the first element in the destination tensor
- * @param[in]  block_size_ptr                              Pointer to the source tensor. Supported data types: S32
- * @param[in]  block_size_stride_x                         Stride of the source tensor in X dimension (in bytes)
- * @param[in]  block_size_step_x                           block_size_stride_x * number of elements along X processed per workitem(in  bytes)
- * @param[in]  block_size_offset_first_element_in_bytes    The offset of the first element in the destination tensor
- * @param[in]  padding_size_ptr                            Pointer to the source tensor. Supported data types: S32
- * @param[in]  padding_size_stride_x                       Stride of the source tensor in X dimension (in bytes)
- * @param[in]  padding_size_step_x                         padding_size_stride_x * number of elements along X processed per workitem(in  bytes)
- * @param[in]  padding_size_stride_y                       Stride of the source tensor in Y dimension (in bytes)
- * @param[in]  padding_size_step_y                         padding_size_stride_y * number of elements along Y processed per workitem(in  bytes)
- * @param[in]  padding_size_offset_first_element_in_bytes  The offset of the first element in the destination tensor
- */
-__kernel void space_to_batch_4d_nhwc(TENSOR4D_DECLARATION(input),
-                                     TENSOR4D_DECLARATION(output),
-                                     VECTOR_DECLARATION(block_size),
-                                     IMAGE_DECLARATION(padding_size))
-{
-    Tensor4D in  = CONVERT_TO_TENSOR4D_STRUCT(input, 0);
-    Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, HEIGHT_OUT);
-
-    int block_size_x = *((__global int *)(block_size_ptr));
-    int block_size_y = *((__global int *)(block_size_ptr + block_size_stride_x));
-    int shift_x = (get_global_id(2) / HEIGHT_OUT / BATCH_IN) % block_size_x;
-    int shift_y = (get_global_id(2) / HEIGHT_OUT / BATCH_IN) / block_size_x;
-
-    int in_index[4] = {0, };
-    in_index[0] = get_global_id(0) * VEC_SIZE;
-    in_index[1] = get_global_id(1) * block_size_x + shift_x - *((__global int *)(padding_size_ptr));
-    in_index[2] = get_global_id(2) % HEIGHT_OUT * block_size_y + shift_y - *((__global int *)(padding_size_ptr + padding_size_stride_y));
-    in_index[3] = (get_global_id(2) / HEIGHT_OUT) % BATCH_IN;
-
-    if (in_index[1] < 0 || in_index[1] >= WIDTH_IN || in_index[2] < 0 || in_index[2] >= HEIGHT_IN)
-    {
-        VSTORE(VEC_SIZE)((VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE))ZERO_VALUE, 0, (__global DATA_TYPE *)out.ptr);
-    }
-    else
-    {
-        VSTORE(VEC_SIZE)(CONVERT(VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)tensor4D_offset(&in, in_index[0], in_index[1], in_index[2], in_index[3])),
-                                 VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE)),
-                         0, (__global DATA_TYPE *)out.ptr);
-    }
-}
-
-#endif // defined(DATA_TYPE) && defined(HEIGHT_OUT) && defined(BATCH_IN) && defined(HEIGHT_IN) && defined(WIDTH_IN) && defined(ZERO_VALUE) && defined(VEC_SIZE)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/space_to_depth.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/space_to_depth.cl
deleted file mode 100644
index f6977045a..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/space_to_depth.cl
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016, 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#if defined(DATA_TYPE) && defined(DEPTH_IN) && defined(BLOCK_SIZE)
-/** Perform space to depth rearrangement of tensor
- *
- * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
- * @attention Input tensor depth should be given as a preprocessor argument using -DDEPTH_IN=size. e.g. -DDEPTH_IN=16
- * @attention block size should be given as a preprocessor argument using -DBLOCK_SIZE=size. e.g. -DBLOCK_SIZE=1
- *
- * @param[in]  input_ptr                            Pointer to the source image. Supported data types: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
- * @param[in]  input_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  input_step_x                         input_stride_x * number of elements along X processed per workitem(in  bytes)
- * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  input_step_y                         input_stride_y * number of elements along Y processed per workitem(in  bytes)
- * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                         input_stride_z * number of elements along Z processed per workitem(in  bytes)
- * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source image
- * @param[out] output_ptr                           Pointer to the destination image. Supported data types: same as @p inpu
-t_ptr
- * @param[in]  output_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in
-bytes)
- * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_stride_w                      Stride of the source tensor in W dimension (in bytes)
- * @param[in]  output_step_w                        output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination image
- */
-__kernel void space_to_depth(
-     TENSOR4D_DECLARATION(input),
-     TENSOR4D_DECLARATION(output))
- {
-    Tensor4D in  = CONVERT_TO_TENSOR4D_STRUCT(input, DEPTH_IN);
-    Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT_NO_STEP(output, 0);
-
-    int out_index[4]={0};
-    int in_index[4]={0};
-
-    in_index[0] = get_global_id(0);//W
-    in_index[1] = get_global_id(1);//H
-    in_index[2] = get_global_id(2) % DEPTH_IN;//C
-    in_index[3] = get_global_id(2) / DEPTH_IN;//B
-
-    out_index[0] = in_index[0]/BLOCK_SIZE;
-    out_index[1] = in_index[1]/BLOCK_SIZE;
-    out_index[2] = in_index[2] + ((in_index[1] % BLOCK_SIZE) * BLOCK_SIZE + in_index[0] % BLOCK_SIZE) * DEPTH_IN;
-    out_index[3] = in_index[3];
-
-    *((__global DATA_TYPE *)tensor4D_offset(&out, out_index[0],out_index[1],out_index[2],out_index[3])) =                                                                                                 *((__global DATA_TYPE *)in.ptr);
- }
-#endif // defined(DATA_TYPE) && defined(DEPTH_IN) && defined(BLOCK_SIZE)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/squared_difference.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/squared_difference.cl
deleted file mode 100644
index 3e1a5c97f..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/squared_difference.cl
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#ifndef VEC_SIZE
-#define VEC_SIZE 1
-#endif
-
-#if defined(DATA_TYPE)
-/** Returns true value of squared_difference of two tensors.
- *
- * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
- * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g. -DVEC_SIZE=16
- * @note Can only take floating point data types.
- *
- * @param[in]  input1_ptr                            Pointer to the source image. Supported data types: F16/F32
- * @param[in]  input1_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  input1_step_x                         input1_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input1_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  input1_step_y                         input1_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input1_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input1_step_z                         input1_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input1_offset_first_element_in_bytes  The offset of the first element in the source image
- *
- * @param[in]  input2_ptr                            Pointer to the source image. Supported data types: F16/F32
- * @param[in]  input2_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  input2_step_x                         input2_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input2_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  input2_step_y                         input2_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input2_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input2_step_z                         input2_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input2_offset_first_element_in_bytes  The offset of the first element in the source image
- *
- * @param[out] output_ptr                            Pointer to the destination image. Supported data types: F16/F32
- * @param[in]  output_stride_x                       Stride of the destination image in X dimension (in bytes)
- * @param[in]  output_step_x                         output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                       Stride of the destination image in Y dimension (in bytes)
- * @param[in]  output_step_y                         output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                         output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination image
- */
-__kernel void squared_difference(
-    TENSOR3D_DECLARATION(input1),
-    TENSOR3D_DECLARATION(input2),
-    TENSOR3D_DECLARATION(output))
-{
-    Tensor3D input1  = CONVERT_TO_TENSOR3D_STRUCT(input1);
-    Tensor3D input2  = CONVERT_TO_TENSOR3D_STRUCT(input2);
-    Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
-
-    VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE)
-    diff = VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input1.ptr)- VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input2.ptr);
-
-    VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE)
-    sq_diff = diff * diff;
-
-    VSTORE(VEC_SIZE)
-    (sq_diff, 0, (__global DATA_TYPE *)output.ptr);
-}
-#endif // defined(DATA_TYPE)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/strided_slice_ex.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/strided_slice_ex.cl
deleted file mode 100644
index b39c55b96..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/strided_slice_ex.cl
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "helpers.h"
-
-#if defined(ELEMENT_DATA_TYPE) && defined(DEPTH_OUT)
-/** Extracts a strided slice up to 4-dimensions
- *
- * @note Datatype should be given as a preprocessor argument using -DELEMENT_DATA_TYPE=type. e.g. -DELEMENT_DATA_TYPE=short
- * @attention Output tensor depth should be given as a preprocessor argument using -DDEPTH_OUT=size. e.g. -DDEPTH_OUT=16
- *
- * @param[in]  input_ptr                            Pointer to the source image. Supported data types: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
- * @param[in]  input_stride_x                       Stride of the source image in X dimension (in bytes)
- * @param[in]  input_step_x                         input_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in bytes)
- * @param[in]  input_step_y                         input_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  input_step_z                         input_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source image
- * @param[out] output_ptr                           Pointer to the destination image. Supported data types: same as @p input_ptr
- * @param[in]  output_stride_x                      Stride of the destination image in X dimension (in bytes)
- * @param[in]  output_step_x                        output_stride_x * number of elements along X processed per workitem(in bytes)
- * @param[in]  output_stride_y                      Stride of the destination image in Y dimension (in bytes)
- * @param[in]  output_step_y                        output_stride_y * number of elements along Y processed per workitem(in bytes)
- * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in bytes)
- * @param[in]  output_step_z                        output_stride_z * number of elements along Z processed per workitem(in bytes)
- * @param[in]  output_stride_w                      Stride of the source tensor in W dimension (in bytes)
- * @param[in]  output_step_w                        output_stride_w * number of elements along W processed per workitem(in bytes)
- * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the destination image
- * @param[in]  starts                               The stride of X dimension of input tensor to be sliced. Supported data types: S32
- * @param[in]  strides                              The stride of Y dimension of input tensor to be sliced. Supported data types: S32
- */
-__kernel void strided_slice_ex(TENSOR4D_DECLARATION(input),
-                               TENSOR4D_DECLARATION(output),
-                               const int4 starts,
-                               const int4 strides)
-{
-    Tensor4D in  = CONVERT_TO_TENSOR4D_STRUCT(input, 0);
-    Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, DEPTH_OUT);
-
-    int4 indices_in =
-    {
-            starts.x + (strides.x * get_global_id(0)),
-            starts.y + (strides.y * get_global_id(1)),
-            starts.z + (strides.z * (get_global_id(2) % DEPTH_OUT)),
-            starts.w + (strides.w * (get_global_id(2) / DEPTH_OUT)),
-    };
-    *((__global ELEMENT_DATA_TYPE *)out.ptr) = *((__global ELEMENT_DATA_TYPE *)tensor4D_offset(&in, indices_in.x, indices_in.y, indices_in.z, indices_in.w));
-}
-#endif // defined(ELEMENT_DATA_TYPE) && defined(DEPTH_OUT)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2.cl
deleted file mode 100644
index d97f23a47..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2.cl
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "helpers.h"
-
-__kernel void topkv2_init(VECTOR_DECLARATION(input),
-    __global float* in_key_buf,
-    __global int* in_ind_buf,
-    const int n)
-{
-  int gid = get_global_id(0);
-  int lws = get_local_size(0);
-  int groups = get_num_groups(0);
-  int gws = lws * groups;
-  int iter = n / gws;
-
-  Vector input = CONVERT_TO_VECTOR_STRUCT_NO_STEP(input);
-
-  for(int i = 0; i < iter; ++i)
-  {
-    int idx = i * gws + gid;
-    in_key_buf[idx] = *(__global float*)(input.ptr + idx * input.stride_x);
-    in_ind_buf[idx] = idx;
-  }
-}
-
-__kernel void topkv2_find_first_negative(
-    __global float *out_key_buf,
-    __global int *first_negative_idx,
-    int n)
-{
-  int gid = get_global_id(0);
-
-  if( gid == n - 1 )
-  {
-    // if the last item is positive, the first negative index is n.
-    if( out_key_buf[gid] > 0.f )
-      *first_negative_idx = n;
-  } else if ( gid == 0 ) {
-    // if the first item is negative, set it 0.
-    if( out_key_buf[gid] < 0.f )
-      *first_negative_idx = 0;
-  } else {
-    // if its left is positive and it is negative, then it is the first negative item.
-    if( out_key_buf[gid-1] > 0.f && out_key_buf[gid] < 0.f )
-      *first_negative_idx = gid;
-  }
-}
-
-__kernel void topkv2_reorder_negatives(
-    __global float* in_key_buf,
-    __global float* out_key_buf,
-    __global float* in_ind_buf,
-    __global float* out_ind_buf,
-    __global int* first_negative_idx,
-    int n)
-{
-  int gid = get_global_id(0);
-
-  int num_negs = n - *first_negative_idx;
-  int in_idx;
-
-  if( gid < num_negs ) {
-    in_idx = n - 1 - gid;
-  } else {
-    in_idx = gid - num_negs;
-  }
-
-  out_key_buf[gid] = in_key_buf[in_idx];
-  out_ind_buf[gid] = in_ind_buf[in_idx];
-}
-
-__kernel void topkv2_store(
-    VECTOR_DECLARATION(values),
-    VECTOR_DECLARATION(indices),
-    __global float *out_key_buf,
-    __global int *out_ind_buf,
-    int n)
-{
-  int gid = get_global_id(0);
-
-  Vector values = CONVERT_TO_VECTOR_STRUCT_NO_STEP(values);
-  Vector indices = CONVERT_TO_VECTOR_STRUCT_NO_STEP(indices);
-
-  int idx = n - 1 - gid;
-
-  *(__global float*)(values.ptr + gid * values.stride_x) = out_key_buf[idx];
-  *(__global int*)(indices.ptr + gid * indices.stride_x) = out_ind_buf[idx];
-}
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2_quicksort.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2_quicksort.cl
deleted file mode 100644
index 0292fab04..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2_quicksort.cl
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "helpers.h"
-
-__global inline float* get_vec_elem(Vector* vec, int idx)
-{
-  return (__global float*)(vec->ptr + idx * vec->stride_x);
-}
-
-__global inline int* get_vec_elem_int(Vector* vec, int idx)
-{
-  return (__global int*)(vec->ptr + idx * vec->stride_x);
-}
-
-// A utility function to swap two elements
-void swap(__global float *a, __global float *b)
-{
-    float t = *a;
-    *a = *b;
-    *b = t;
-}
-
-void swap_idx(__global int *a, __global int *b)
-{
-    int t = *a;
-    *a = *b;
-    *b = t;
-}
-
-/* This function is same in both iterative and recursive*/
-int partition (Vector* arr, __global int* indices, int l, int h)
-{
-    float x = *get_vec_elem(arr, h);
-    int i = (l - 1);
-
-    for (int j = l; j <= h- 1; j++)
-    {
-        if (*get_vec_elem(arr, j) >= x)
-        {
-            i++;
-            swap (get_vec_elem(arr,i), get_vec_elem(arr,j));
-            swap_idx(&indices[i], &indices[j]);
-        }
-    }
-    swap (get_vec_elem(arr, i + 1), get_vec_elem(arr, h));
-    swap_idx(&indices[i + 1], &indices[h]);
-    return (i + 1);
-}
-
-/* A[] --> Array to be sorted,
-   l  --> Starting index,
-   h  --> Ending index */
-void quickSortIterative (Vector* arr, __global int* indices, 
-    __global int *stack, int l, int h)
-{
-    // Create an auxiliary stack
-
-    // initialize top of stack
-    int top = -1;
-
-    // push initial values of l and h to stack
-    stack[ ++top ] = l;
-    stack[ ++top ] = h;
-
-    // Keep popping from stack while is not empty
-    while ( top >= 0 )
-    {
-        // Pop h and l
-        h = stack[ top-- ];
-        l = stack[ top-- ];
-
-        // Set pivot element at its correct position
-        // in sorted array
-        int p = partition( arr, indices, l, h );
-
-        // If there are elements on left side of pivot,
-        // then push left side to stack
-        if ( p-1 > l )
-        {
-            stack[ ++top ] = l;
-            stack[ ++top ] = p - 1;
-        }
-
-        // If there are elements on right side of pivot,
-        // then push right side to stack
-        if ( p+1 < h )
-        {
-            stack[ ++top ] = p + 1;
-            stack[ ++top ] = h;
-        }
-    }
-}
-
-__kernel void topkv2_quicksort(VECTOR_DECLARATION(input),
-    VECTOR_DECLARATION(topk_values), VECTOR_DECLARATION(topk_indices),
-    __global int* indices, __global int* temp_stack, int k, int n)
-{
-  Vector input = CONVERT_TO_VECTOR_STRUCT_NO_STEP(input);
-  Vector topk_values = CONVERT_TO_VECTOR_STRUCT_NO_STEP(topk_values);
-  Vector topk_indices = CONVERT_TO_VECTOR_STRUCT_NO_STEP(topk_indices);
-
-  for( int i = 0; i < n; ++i )
-  {
-    indices[i] = i;
-  }
-
-  quickSortIterative(&input, indices, temp_stack, 0, n-1);
-
-  // extract k items.
-  for(int i = 0; i < k; ++i)
-  {
-    *get_vec_elem(&topk_values, i)  = *get_vec_elem(&input, i);
-    *get_vec_elem_int(&topk_indices, i) = indices[i];
-  }
-}
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2_radixsort.cl b/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2_radixsort.cl
deleted file mode 100644
index c2c2d89a4..000000000
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2_radixsort.cl
+++ /dev/null
@@ -1,271 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-// reference:
-// https://code.google.com/archive/p/ocl-radix-sort/source/default/source
-// OpenCL kernel sources for the CLRadixSort class
-// the #include does not exist in OpenCL
-// Copyright Philippe Helluy, Université de Strasbourg, France, 2011, helluy@math.unistra.fr
-// licensed under the GNU Lesser General Public License see http://www.gnu.org/copyleft/lesser.html
-// if you find this software usefull you can cite the following work in your reports or articles:
-// Philippe HELLUY, A portable implementation of the radix sort algorithm in OpenCL, 2011.
-// http://hal.archives-ouvertes.fr/hal-00596730
-
-// Reference for floating point radix sort:
-// http://www.codercorner.com/RadixSortRevisited.htm
-
-// compute the histogram for each radix and each virtual processor for the pass
-__kernel void radixsort_histogram(__global float* in_key_buf,
-      __global int* d_Histograms,
-      const int pass,
-      __local int* loc_histo,
-      const int n)
-{
-  int it = get_local_id(0);  // i local number of the processor
-  int ig = get_global_id(0); // global number = i + g I
-
-  int gr = get_group_id(0); // g group number
-
-  int groups = get_num_groups(0);
-  int items  = get_local_size(0);
-
-  // set the local histograms to zero
-  for(int ir=0;ir<_RADIX;ir++){
-    loc_histo[ir * items + it] = 0;
-  }
-
-  barrier(CLK_LOCAL_MEM_FENCE);
-
-  // range of keys that are analyzed by the work item
-  int size= n/groups/items; // size of the sub-list
-  int start= ig * size; // beginning of the sub-list
-
-  unsigned int key;
-  int shortkey,k;
-
-  // compute the index
-  // the computation depends on the transposition
-  for(int j = 0; j < size ; j++) {
-#ifdef TRANSPOSE
-    k= groups * items * j + ig;
-#else
-    k=j+start;
-#endif
-
-    key = *((__global unsigned int*)(in_key_buf + k));
-
-    // extract the group of _BITS bits of the pass
-    // the result is in the range 0.._RADIX-1
-    shortkey=(( key >> (pass * _BITS)) & (_RADIX-1));
-
-    // increment the local histogram
-    loc_histo[shortkey *  items + it ]++;
-  }
-
-  barrier(CLK_LOCAL_MEM_FENCE);
-
-  // copy the local histogram to the global one
-  for(int ir=0;ir<_RADIX;ir++) {
-    d_Histograms[items * (ir * groups + gr) + it] = loc_histo[ir * items + it];
-  }
-
-  barrier(CLK_GLOBAL_MEM_FENCE);
-}
-
-// initial transpose of the list for improving
-// coalescent memory access
-__kernel void transpose(const __global int* invect,
-      __global int* outvect,
-      const int nbcol,
-      const int nbrow,
-      const __global int* inperm,
-      __global int* outperm,
-      __local int* blockmat,
-      __local int* blockperm,
-      const int tilesize){
-
-  int i0 = get_global_id(0)*tilesize;  // first row index
-  int j = get_global_id(1);  // column index
-
-  int jloc = get_local_id(1);  // local column index
-
-  // fill the cache
-  for(int iloc=0;iloc<tilesize;iloc++){
-    int k=(i0+iloc)*nbcol+j;  // position in the matrix
-    blockmat[iloc*tilesize+jloc]=invect[k];
-#ifdef PERMUT
-    blockperm[iloc*tilesize+jloc]=inperm[k];
-#endif
-  }
-
-  barrier(CLK_LOCAL_MEM_FENCE);
-
-  // first row index in the transpose
-  int j0=get_group_id(1)*tilesize;
-
-  // put the cache at the good place
-  for(int iloc=0;iloc<tilesize;iloc++){
-    int kt=(j0+iloc)*nbrow+i0+jloc;  // position in the transpose
-    outvect[kt]=blockmat[jloc*tilesize+iloc];
-#ifdef PERMUT
-      outperm[kt]=blockperm[jloc*tilesize+iloc];
-#endif
-  }
-
-}
-
-// each virtual processor reorders its data using the scanned histogram
-__kernel void radixsort_reorder(__global float* in_key,
-    __global float* out_key,
-    __global int* d_Histograms,
-    const int pass,
-    __global int* indices_in,
-    __global int* indices_out,
-    __local int* loc_histo,
-    const int n){
-
-  int it = get_local_id(0);
-  int ig = get_global_id(0);
-
-  int gr = get_group_id(0);
-  int groups=get_num_groups(0);
-  int items=get_local_size(0);
-
-  int start= ig *(n/groups/items);
-  int size= n/groups/items;
-
-  // take the histogram in the cache
-  for(int ir=0;ir<_RADIX;ir++){
-    loc_histo[ir * items + it]=
-      d_Histograms[items * (ir * groups + gr) + it];
-  }
-  barrier(CLK_LOCAL_MEM_FENCE);
-
-  int newpos,shortkey,k,newpost;
-  unsigned int key;
-
-  for(int j= 0; j< size;j++){
-#ifdef TRANSPOSE
-      k= groups * items * j + ig;
-#else
-      k=j+start;
-#endif
-    float org_value = in_key[k];
-    key = *(__global unsigned int*)(in_key + k);
-    shortkey=((key >> (pass * _BITS)) & (_RADIX-1));
-
-    newpos=loc_histo[shortkey * items + it];
-
-#ifdef TRANSPOSE
-    int ignew,jnew;
-    ignew= newpos/(n/groups/items);
-    jnew = newpos%(n/groups/items);
-    newpost = jnew * (groups*items) + ignew;
-#else
-    newpost=newpos;
-#endif
-
-    //d_outKeys[newpost]= key;  // killing line !!!
-    out_key[newpost] = org_value;
-
-#ifdef PERMUT
-    indices_out[newpost] = indices_in[k];
-#endif
-
-    newpos++;
-    loc_histo[shortkey * items + it]=newpos;
-  }
-}
-
-// perform a parallel prefix sum (a scan) on the local histograms
-// (see Blelloch 1990) each workitem worries about two memories
-// see also http://http.developer.nvidia.com/GPUGems3/gpugems3_ch39.html
-__kernel void radixsort_scanhistograms(__global int* histo, __local int* temp, __global int* globsum)
-{
-  int it = get_local_id(0);
-  int ig = get_global_id(0);
-  int decale = 1;
-  int n=get_local_size(0) * 2 ;
-  int gr=get_group_id(0);
-
-  // load input into local memory
-  // up sweep phase
-  temp[2*it] = histo[2*ig];
-  temp[2*it+1] = histo[2*ig+1];
-
-  // parallel prefix sum (algorithm of Blelloch 1990)
-  for (int d = n>>1; d > 0; d >>= 1){
-    barrier(CLK_LOCAL_MEM_FENCE);
-    if (it < d){
-      int ai = decale*(2*it+1)-1;
-      int bi = decale*(2*it+2)-1;
-      temp[bi] += temp[ai];
-    }
-    decale *= 2;
-  }
-
-  // store the last element in the global sum vector
-  // (maybe used in the next step for constructing the global scan)
-  // clear the last element
-  if (it == 0) {
-    globsum[gr]=temp[n-1];
-    temp[n - 1] = 0;
-  }
-
-  // down sweep phase
-  for (int d = 1; d < n; d *= 2){
-    decale >>= 1;
-    barrier(CLK_LOCAL_MEM_FENCE);
-
-    if (it < d){
-      int ai = decale*(2*it+1)-1;
-      int bi = decale*(2*it+2)-1;
-
-      int t = temp[ai];
-      temp[ai] = temp[bi];
-      temp[bi] += t;
-    }
-
-  }
-  barrier(CLK_LOCAL_MEM_FENCE);
-
-  // write results to device memory
-
-  histo[2*ig] = temp[2*it];
-  histo[2*ig+1] = temp[2*it+1];
-
-  barrier(CLK_GLOBAL_MEM_FENCE);
-
-}
-
-// use the global sum for updating the local histograms
-// each work item updates two values
-__kernel void radixsort_pastehistograms( __global int* histo,__global int* globsum)
-{
-  int ig = get_global_id(0);
-  int gr=get_group_id(0);
-
-  int s;
-
-  s=globsum[gr];
-
-  // write results to device memory
-  histo[2*ig] += s;
-  histo[2*ig+1] += s;
-
-  barrier(CLK_GLOBAL_MEM_FENCE);
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLActivationLayerExKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLActivationLayerExKernel.cpp
deleted file mode 100644
index 1fdd2f98f..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLActivationLayerExKernel.cpp
+++ /dev/null
@@ -1,211 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLActivationLayerExKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-#include "arm_compute/core/UtilsEx.h"
-
-using namespace arm_compute;
-
-namespace
-{
-Status validate_arguments(const ITensorInfo *input, const ITensorInfo *output,
-                          const ActivationLayerInfoEx &act_info)
-{
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::U8, DataType::QASYMM8,
-                                                       DataType::F16, DataType::F32);
-
-  // Checks performed when output is configured
-  if ((output != nullptr) && (output->total_size() != 0))
-  {
-    ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_SHAPES(input, output);
-    ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
-  }
-
-  return Status{};
-}
-
-std::pair<Status, Window> validate_and_configure_window(ITensorInfo *input, ITensorInfo *output)
-{
-  if (output != nullptr)
-  {
-    ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
-    // Output auto inizialitation if not yet initialized
-    auto_init_if_empty(*output, *input);
-  }
-
-  const unsigned int num_elems_processed_per_iteration = 16 / input->element_size();
-
-  Window win = calculate_max_window(*input, Steps(num_elems_processed_per_iteration));
-  bool window_changed = false;
-
-  if (output != nullptr)
-  {
-    AccessWindowHorizontal input_access(input, 0, num_elems_processed_per_iteration);
-    AccessWindowHorizontal output_access(output, 0, num_elems_processed_per_iteration);
-    window_changed = update_window_and_padding(win, input_access, output_access);
-    output_access.set_valid_region(win, input->valid_region());
-  }
-  else
-  {
-    window_changed = update_window_and_padding(
-        win, AccessWindowHorizontal(input, 0, num_elems_processed_per_iteration));
-  }
-
-  Status err = (window_changed)
-                   ? ARM_COMPUTE_CREATE_ERROR(ErrorCode::RUNTIME_ERROR, "Insufficient Padding!")
-                   : Status{};
-  return std::make_pair(err, win);
-}
-} // namespace
-
-CLActivationLayerExKernel::CLActivationLayerExKernel()
-    : _input(nullptr), _output(nullptr), _run_in_place(false)
-{
-}
-
-void CLActivationLayerExKernel::configure(ICLTensor *input, ICLTensor *output,
-                                          ActivationLayerInfoEx act_info)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input);
-
-  _run_in_place = (output == nullptr) || (output == input);
-
-  if (output != nullptr)
-  {
-    // Output auto inizialitation if not yet initialized
-    auto_init_if_empty(*output->info(), *input->info()->clone());
-  }
-
-  ARM_COMPUTE_ERROR_THROW_ON(
-      validate_arguments(input->info(), (output != nullptr) ? output->info() : nullptr, act_info));
-
-  const unsigned int num_elems_processed_per_iteration = 16 / input->info()->element_size();
-  const DataType dt = input->info()->data_type();
-  float a_const = act_info.a();
-  float b_const = act_info.b();
-  int a_const_int = 0;
-  int b_const_int = 0;
-
-  // Create quantized version of constants a, b if needed
-  if (is_data_type_quantized(dt))
-  {
-    a_const_int =
-        input->info()->quantization_info().quantize(a_const, RoundingPolicy::TO_NEAREST_UP);
-    b_const_int =
-        input->info()->quantization_info().quantize(b_const, RoundingPolicy::TO_NEAREST_UP);
-  }
-
-  // Set build options
-  std::set<std::string> build_opts;
-  build_opts.emplace(
-      ("-DACT=" + lower_string(string_from_activation_func_ex(act_info.activation()))));
-  build_opts.emplace(("-DDATA_TYPE=" + get_cl_type_from_data_type(dt)));
-  build_opts.emplace(
-      ("-DVEC_SIZE=" + support::cpp11::to_string(num_elems_processed_per_iteration)));
-
-  if (is_data_type_quantized(dt))
-  {
-    build_opts.emplace(("-DA_VAL=" + support::cpp11::to_string(a_const_int)));
-    build_opts.emplace(("-DB_VAL=" + support::cpp11::to_string(b_const_int)));
-
-    const int o1 = input->info()->quantization_info().offset;
-    // Quantized value of 0 corresponds to the offset o1
-    build_opts.emplace(("-DCONST_0=" + support::cpp11::to_string(o1)));
-
-    // Set scale and offset of the input and output if they have different quantization info
-    if (is_data_type_quantized_asymmetric(dt) && output != nullptr)
-    {
-      const float s1 = input->info()->quantization_info().scale;
-      const float s2 = output->info()->quantization_info().scale;
-      const int o2 = output->info()->quantization_info().offset;
-
-      if (o1 != o2 || s1 != s2)
-      {
-        build_opts.emplace(("-DS1_VAL=" + float_to_string_with_full_precision(s1)));
-        build_opts.emplace(("-DS2_VAL=" + float_to_string_with_full_precision(s2)));
-        build_opts.emplace(("-DO1_VAL=" + support::cpp11::to_string(o1)));
-        build_opts.emplace(("-DO2_VAL=" + support::cpp11::to_string(o2)));
-      }
-    }
-  }
-  else
-  {
-    build_opts.emplace(("-DA_VAL=" + float_to_string_with_full_precision(a_const)));
-    build_opts.emplace(("-DB_VAL=" + float_to_string_with_full_precision(b_const)));
-  }
-
-  build_opts.emplace((_run_in_place) ? "-DIN_PLACE" : "");
-
-  // Create kernel
-  std::string kernel_name = std::string("activation_layer_ex");
-  _kernel =
-      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel(kernel_name, build_opts));
-
-  // Make sure _kernel is initialized before calling the parent's configure
-  _input = input;
-  _output = output;
-
-  // Configure kernel window
-  auto win_config =
-      validate_and_configure_window(input->info(), (_run_in_place) ? nullptr : output->info());
-  ARM_COMPUTE_ERROR_THROW_ON(win_config.first);
-  ICLKernel::configure_internal(win_config.second);
-
-  // Set config_id for enabling LWS tuning
-  _config_id = "activation_layer_ex_";
-  _config_id += lower_string(string_from_data_type(dt));
-  _config_id += "_";
-  _config_id += support::cpp11::to_string(input->info()->dimension(0));
-  _config_id += "_";
-  _config_id += support::cpp11::to_string(input->info()->dimension(1));
-}
-
-Status CLActivationLayerExKernel::validate(const ITensorInfo *input, const ITensorInfo *output,
-                                           const ActivationLayerInfoEx &act_info)
-{
-  const bool run_in_place = (output == nullptr) || (output == input);
-  ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(input, output, act_info));
-  ARM_COMPUTE_RETURN_ON_ERROR(
-      validate_and_configure_window(input->clone().get(),
-                                    (run_in_place) ? nullptr : output->clone().get())
-          .first);
-
-  return Status{};
-}
-
-void CLActivationLayerExKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
-
-  Window collapsed = window.collapse_if_possible(ICLKernel::window(), Window::DimZ);
-  Window slice = collapsed.first_slice_window_3D();
-
-  do
-  {
-    unsigned int idx = 0;
-    add_3D_tensor_argument(idx, _input, slice);
-    if (!_run_in_place)
-    {
-      add_3D_tensor_argument(idx, _output, slice);
-    }
-    enqueue(queue, *this, slice, lws_hint());
-  } while (collapsed.slide_window_slice_3D(slice));
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLArgMinMaxKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLArgMinMaxKernel.cpp
deleted file mode 100644
index c1a2ad0be..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLArgMinMaxKernel.cpp
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLArgMinMaxKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-namespace
-{
-const TensorShape inferOutputShape(const TensorShape &input_shape, const uint32_t argminmax_axis)
-{
-  TensorShape out_shape{input_shape};
-
-  out_shape.set(argminmax_axis, 1);
-
-  return out_shape;
-}
-} // namespace
-
-namespace
-{
-constexpr unsigned int num_elems_processed_per_iteration = 16;
-
-Status validate_arguments(const ITensorInfo *input, const ITensorInfo *output,
-                          const uint32_t argminmax_axis, ArgOperation op)
-{
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::S32, DataType::F32,
-                                                       DataType::U8);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
-
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_DIMENSIONS(input, output);
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(output->tensor_shape().total_size() == 0,
-                                  "Inputs are not broadcast compatible");
-
-  const TensorShape output_shape = inferOutputShape(input->tensor_shape(), argminmax_axis);
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(output_shape.total_size() != output->tensor_shape().total_size(),
-                                  "output shape's size does not match argminmax_axis");
-
-  const auto num_dimensions = input->tensor_shape().num_dimensions();
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(
-      argminmax_axis >= 0 && argminmax_axis < num_dimensions,
-      "argminmax_axis must be greater than or equal to 0 and less than (input's rank).");
-  return Status{};
-}
-
-} // namespace
-
-CLArgMinMaxKernel::CLArgMinMaxKernel() : _input(nullptr), _output(nullptr), _argminmax_axis() {}
-
-void CLArgMinMaxKernel::configure(const ICLTensor *input, ICLTensor *output,
-                                  const uint32_t argminmax_axis, ArgOperation op)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
-  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input->info(), output->info(), argminmax_axis));
-
-  _input = input;
-  _output = output;
-  _argminmax_axis = argminmax_axis;
-
-  std::unique_ptr<ITensorInfo> output_info = output->info()->clone();
-  output_info->set_tensor_shape(inferOutputShape(input->info()->tensor_shape(), argminmax_axis));
-
-  // Construct kernel name for argmax and argmin based on axis
-  std::string kernel_name = "arg_op";
-  int op_code = 0;
-  if (op == ArgOperation::MAX)
-  {
-    op_code = 1;
-  }
-  else if (op == ArgOperation::MIN)
-  {
-    op_code = 2;
-  }
-  else
-    throw std::runtime_error("Operation not supported, yet");
-
-  // Set kernel build options
-  std::set<std::string> build_opts;
-  build_opts.emplace("-DDATA_TYPE=" + get_cl_type_from_data_type(output_info->data_type()));
-  build_opts.emplace("-DDEPTH_OUT=" + support::cpp11::to_string(output_info->dimension(2)));
-  build_opts.emplace("-DOP_CODE=" + support::cpp11::to_string(op_code));
-
-  // Create kernel
-  _kernel =
-      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel(kernel_name, build_opts));
-
-  // Configure  kernel window
-  Window win = calculate_max_window(*output_info, Steps());
-
-  Coordinates coord;
-  coord.set_num_dimensions(output_info->num_dimensions());
-  output->info()->set_valid_region(ValidRegion(coord, output_info->tensor_shape()));
-
-  ICLKernel::configure_internal(win);
-}
-
-Status CLArgMinMaxKernel::validate(const ITensorInfo *input, const ITensorInfo *output,
-                                   const uint32_t argminmax_axis, ArgOperation op)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
-  ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(input, output, argminmax_axis, op));
-
-  return Status{};
-}
-
-void CLArgMinMaxKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
-
-  const TensorShape &shape_in = _input->info()->tensor_shape();
-
-  unsigned int idx = 2 * num_arguments_per_4D_tensor(); // Skip the input and output parameters
-
-  _kernel.setArg<cl_int>(idx++, _argminmax_axis);
-  _kernel.setArg<cl_int>(idx++, shape_in[_argminmax_axis]);
-
-  Window slice_out = window.first_slice_window_4D().collapse(ICLKernel::window(), 2, 4);
-
-  // Setup input slice
-  Window slice_in(slice_out);
-  slice_in.set(Window::DimX, Window::Dimension(0, 0, 0));
-  slice_in.set(Window::DimY, Window::Dimension(0, 0, 0));
-  slice_in.set(Window::DimZ, Window::Dimension(0, 0, 0));
-  slice_in.set(3, Window::Dimension(0, 0, 0));
-
-  // Copy output's shape in order to use for recovering at end of this method
-  const TensorShape shape_out = _output->info()->tensor_shape();
-  _output->info()->set_tensor_shape(inferOutputShape(shape_in, _argminmax_axis));
-
-  do
-  {
-    unsigned int idx = 0;
-    add_4D_tensor_argument(idx, _input, slice_in);
-    add_4D_tensor_argument(idx, _output, slice_out);
-    enqueue(queue, *this, slice_out);
-  } while (window.slide_window_slice_4D(slice_in) && window.slide_window_slice_4D(slice_out));
-
-  // Recover output's shape of output tensor
-  _output->info()->set_tensor_shape(shape_out);
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLArithmeticSubtractionExKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLArithmeticSubtractionExKernel.cpp
deleted file mode 100644
index 1c505b4d5..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLArithmeticSubtractionExKernel.cpp
+++ /dev/null
@@ -1,216 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLArithmeticSubtractionExKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-namespace
-{
-constexpr unsigned int num_elems_processed_per_iteration = 16;
-
-Status validate_arguments(const ITensorInfo *input1, const ITensorInfo *input2,
-                          const ITensorInfo *output, ConvertPolicy policy)
-{
-  ARM_COMPUTE_UNUSED(policy);
-
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input1, 1, DataType::U8, DataType::S16,
-                                                       DataType::F16, DataType::F32);
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input2, 1, DataType::U8, DataType::S16,
-                                                       DataType::F16, DataType::F32);
-
-  const TensorShape &out_shape =
-      TensorShape::broadcast_shape(input1->tensor_shape(), input2->tensor_shape());
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(out_shape.total_size() == 0,
-                                  "Inputs are not broadcast compatible");
-
-  // Validate in case of configured output
-  if (output->total_size() > 0)
-  {
-    ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::U8, DataType::S16,
-                                                         DataType::F16, DataType::F32);
-    ARM_COMPUTE_RETURN_ERROR_ON_MSG(
-        output->data_type() == DataType::U8 &&
-            (input1->data_type() != DataType::U8 || input2->data_type() != DataType::U8),
-        "Output can only be U8 if both inputs are U8");
-    ARM_COMPUTE_RETURN_ERROR_ON_MSG(
-        detail::have_different_dimensions(out_shape, output->tensor_shape(), 0),
-        "Wrong shape for output");
-  }
-
-  return Status{};
-}
-
-std::pair<Status, Window> validate_and_configure_window(ITensorInfo *input1, ITensorInfo *input2,
-                                                        ITensorInfo *output)
-{
-  const std::pair<TensorShape, ValidRegion> broadcast_pair =
-      ITensorInfo::broadcast_shape_and_valid_region(*input1, *input2);
-  const TensorShape &out_shape = broadcast_pair.first;
-  const ValidRegion &valid_region = broadcast_pair.second;
-
-  // Auto initialize output if not initialized
-  {
-    set_shape_if_empty(*output, out_shape);
-
-    if (input1->data_type() == DataType::S16 || input2->data_type() == DataType::S16)
-    {
-      set_format_if_unknown(*output, Format::S16);
-    }
-    else if (input1->data_type() == DataType::F16 && input2->data_type() == DataType::F16)
-    {
-      set_format_if_unknown(*output, Format::F16);
-    }
-    else if (input1->data_type() == DataType::F32 || input2->data_type() == DataType::F32)
-    {
-      set_format_if_unknown(*output, Format::F32);
-    }
-  }
-
-  Window win = calculate_max_window(valid_region, Steps(num_elems_processed_per_iteration));
-  Window win_input1 = win.broadcast_if_dimension_le_one(*input1);
-  Window win_input2 = win.broadcast_if_dimension_le_one(*input2);
-
-  AccessWindowHorizontal input1_access(input1, 0, num_elems_processed_per_iteration);
-  AccessWindowHorizontal input2_access(input2, 0, num_elems_processed_per_iteration);
-  AccessWindowHorizontal output_access(output, 0, num_elems_processed_per_iteration);
-
-  bool window_changed = update_window_and_padding(win_input1, input1_access) ||
-                        update_window_and_padding(win_input2, input2_access) ||
-                        update_window_and_padding(win, output_access);
-
-  output_access.set_valid_region(win, valid_region);
-
-  Status err = (window_changed)
-                   ? ARM_COMPUTE_CREATE_ERROR(ErrorCode::RUNTIME_ERROR, "Insufficient Padding!")
-                   : Status{};
-  return std::make_pair(err, win);
-}
-} // namespace
-
-CLArithmeticSubtractionExKernel::CLArithmeticSubtractionExKernel()
-    : _input1(nullptr), _input2(nullptr), _output(nullptr)
-{
-}
-
-void CLArithmeticSubtractionExKernel::configure(const ICLTensor *input1, const ICLTensor *input2,
-                                                ICLTensor *output, ConvertPolicy policy)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input1, input2, output);
-  ARM_COMPUTE_ERROR_THROW_ON(
-      validate_arguments(input1->info(), input2->info(), output->info(), policy));
-
-  // Configure kernel window
-  auto win_config = validate_and_configure_window(input1->info(), input2->info(), output->info());
-  ARM_COMPUTE_ERROR_THROW_ON(win_config.first);
-
-  _input1 = input1;
-  _input2 = input2;
-  _output = output;
-
-  const bool has_float_out = is_data_type_float(output->info()->data_type());
-
-  // Set kernel build options
-  std::set<std::string> build_opts;
-  build_opts.emplace((policy == ConvertPolicy::WRAP || has_float_out) ? "-DWRAP" : "-DSATURATE");
-  build_opts.emplace("-DDATA_TYPE_IN1=" + get_cl_type_from_data_type(input1->info()->data_type()));
-  build_opts.emplace("-DDATA_TYPE_IN2=" + get_cl_type_from_data_type(input2->info()->data_type()));
-  build_opts.emplace("-DDATA_TYPE_OUT=" + get_cl_type_from_data_type(output->info()->data_type()));
-
-  // Create kernel
-  _kernel = static_cast<cl::Kernel>(
-      CLKernelLibraryEx::get().create_kernel("arithmetic_sub_ex", build_opts));
-
-  ICLKernel::configure_internal(win_config.second);
-}
-
-Status CLArithmeticSubtractionExKernel::validate(const ITensorInfo *input1,
-                                                 const ITensorInfo *input2,
-                                                 const ITensorInfo *output, ConvertPolicy policy)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input1, input2, output);
-  ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(input1, input2, output, policy));
-  ARM_COMPUTE_RETURN_ON_ERROR(validate_and_configure_window(input1->clone().get(),
-                                                            input2->clone().get(),
-                                                            output->clone().get())
-                                  .first);
-
-  return Status{};
-}
-
-void CLArithmeticSubtractionExKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
-
-  const TensorShape &in_shape1 = _input1->info()->tensor_shape();
-  const TensorShape &in_shape2 = _input2->info()->tensor_shape();
-  const TensorShape &out_shape = _output->info()->tensor_shape();
-
-  bool can_collapse = true;
-  if (std::min(in_shape1.total_size(), in_shape2.total_size()) > 1)
-  {
-    can_collapse =
-        (std::min(in_shape1.num_dimensions(), in_shape2.num_dimensions()) > Window::DimZ);
-    for (size_t d = Window::DimZ; can_collapse && (d < out_shape.num_dimensions()); d++)
-    {
-      can_collapse = (in_shape1[d] == in_shape2[d]);
-    }
-  }
-
-  bool has_collapsed = false;
-  Window collapsed =
-      can_collapse ? window.collapse_if_possible(ICLKernel::window(), Window::DimZ, &has_collapsed)
-                   : window;
-
-  const TensorShape &in_shape1_collapsed =
-      has_collapsed ? in_shape1.collapsed_from(Window::DimZ) : in_shape1;
-  const TensorShape &in_shape2_collapsed =
-      has_collapsed ? in_shape2.collapsed_from(Window::DimZ) : in_shape2;
-
-  Window slice = collapsed.first_slice_window_3D();
-  Window slice_input1 = slice.broadcast_if_dimension_le_one(in_shape1_collapsed);
-  Window slice_input2 = slice.broadcast_if_dimension_le_one(in_shape2_collapsed);
-
-  do
-  {
-    unsigned int idx = 0;
-
-    add_3D_tensor_argument(idx, _input1, slice_input1);
-    add_3D_tensor_argument(idx, _input2, slice_input2);
-    add_3D_tensor_argument(idx, _output, slice);
-
-    enqueue(queue, *this, slice);
-
-    collapsed.slide_window_slice_3D(slice_input1);
-    collapsed.slide_window_slice_3D(slice_input2);
-  } while (collapsed.slide_window_slice_3D(slice));
-}
-
-BorderSize CLArithmeticSubtractionExKernel::border_size() const
-{
-  const unsigned int replicateSize =
-      _output->info()->dimension(0) -
-      std::min(_input1->info()->dimension(0), _input2->info()->dimension(0));
-  const unsigned int border =
-      std::min<unsigned int>(num_elems_processed_per_iteration - 1U, replicateSize);
-  return BorderSize(0, border, 0, 0);
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLBatchToSpaceNDKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLBatchToSpaceNDKernel.cpp
deleted file mode 100644
index b0016d23c..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLBatchToSpaceNDKernel.cpp
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLBatchToSpaceNDKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-namespace
-{
-Status validate_arguments(const ITensorInfo *input, const ITensorInfo *output,
-                          const int32_t *block_size)
-{
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::U8, DataType::QASYMM8,
-                                                DataType::S16, DataType::S32, DataType::F16,
-                                                DataType::F32);
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::U8, DataType::QASYMM8,
-                                                DataType::S16, DataType::S32, DataType::F16,
-                                                DataType::F32);
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(block_size[0] >= 1 && block_size[1] >= 1,
-                                  "Block size should be greater than or equal to 1.");
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->dimension(2) == output->dimension(2),
-                                  "Input Depth should be equal to Output Depth");
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(
-      output->dimension(3) * block_size[0] * block_size[1] == input->dimension(3),
-      "Input batch should be equal to (output batch * block size[0] *block size[1])");
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(!(output->dimension(0) % block_size[1]) &&
-                                      !(output->dimension(1) % block_size[0]),
-                                  "Output height and width should be divisible by block size[0] "
-                                  "and block_size[1] respectively");
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG((output->dimension(0) == input->dimension(0) * block_size[1]) &&
-                                      (output->dimension(1) == input->dimension(1) * block_size[0]),
-                                  "Output height and width should be equal to "
-                                  "input_height*blocksize[0] and input_width*blocksize[1] "
-                                  "respectively");
-
-  return Status{};
-}
-
-} // namespace
-
-CLBatchToSpaceNDKernel::CLBatchToSpaceNDKernel() : _input(nullptr), _output(nullptr) {}
-
-void CLBatchToSpaceNDKernel::configure(const ICLTensor *input, ICLTensor *output,
-                                       const int32_t *block_size)
-{
-
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
-  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input->info(), output->info(), block_size));
-
-  _input = input;
-  _output = output;
-
-  // Set kernel build options
-  std::set<std::string> build_opts;
-  build_opts.emplace("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type()));
-  build_opts.emplace("-DBLOCK_SIZE0=" + support::cpp11::to_string(block_size[0]));
-  build_opts.emplace("-DBLOCK_SIZE1=" + support::cpp11::to_string(block_size[1]));
-  build_opts.emplace("-DBATCH_OUT=" + support::cpp11::to_string(output->info()->dimension(3)));
-  build_opts.emplace("-DDEPTH_OUT=" + support::cpp11::to_string(output->info()->dimension(2)));
-
-  // Create kernel
-  _kernel = static_cast<cl::Kernel>(
-      CLKernelLibraryEx::get().create_kernel("batch_to_space_nd", build_opts));
-
-  // Configure  kernel window
-  Window win = calculate_max_window(*output->info(), Steps());
-
-  Coordinates coord;
-  coord.set_num_dimensions(output->info()->num_dimensions());
-  output->info()->set_valid_region(ValidRegion(coord, output->info()->tensor_shape()));
-
-  ICLKernel::configure_internal(win);
-}
-
-void CLBatchToSpaceNDKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_WINDOWS(ICLKernel::window(), window);
-
-  Window slice_in = window.first_slice_window_4D().collapse(ICLKernel::window(), 2, 4);
-
-  // Setup output slice
-  Window slice_out(slice_in);
-  slice_out.set(Window::DimX, Window::Dimension(0, 0, 0));
-  slice_out.set(Window::DimY, Window::Dimension(0, 0, 0));
-  slice_out.set(Window::DimZ, Window::Dimension(0, 0, 0));
-  slice_out.set(3, Window::Dimension(0, 0, 0));
-
-  do
-  {
-    unsigned int idx = 0;
-    add_4D_tensor_argument(idx, _input, slice_out);
-    add_4D_tensor_argument(idx, _output, slice_in);
-    enqueue(queue, *this, slice_in);
-  } while (window.slide_window_slice_4D(slice_out) && window.slide_window_slice_4D(slice_in));
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLBinaryLogicalOpKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLBinaryLogicalOpKernel.cpp
deleted file mode 100644
index 3d2f2c702..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLBinaryLogicalOpKernel.cpp
+++ /dev/null
@@ -1,173 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLBinaryLogicalOpKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-namespace
-{
-constexpr unsigned int num_elems_processed_per_iteration = 16;
-
-Status validate_parameters(const ITensorInfo *input1, const ITensorInfo *input2,
-                           const ITensorInfo *output)
-{
-  const TensorShape &out_shape =
-      TensorShape::broadcast_shape(input1->tensor_shape(), input2->tensor_shape());
-
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input1, 1, DataType::U8, DataType::QASYMM8);
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input2, 1, DataType::U8, DataType::QASYMM8);
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(out_shape.total_size() == 0,
-                                  "Inputs are not broadcast compatible");
-  // Validate in case of configured output
-  if (output->total_size() > 0)
-  {
-    ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::U8,
-                                                         DataType::QASYMM8);
-    ARM_COMPUTE_RETURN_ERROR_ON_MSG(
-        detail::have_different_dimensions(out_shape, output->tensor_shape(), 0),
-        "Wrong shape for output");
-  }
-  return Status{};
-}
-} // namespace
-
-CLBinaryLogicalOpKernel::CLBinaryLogicalOpKernel()
-    : _input1(nullptr), _input2(nullptr), _output(nullptr)
-{
-}
-
-void CLBinaryLogicalOpKernel::configure(const ICLTensor *input1, const ICLTensor *input2,
-                                        ICLTensor *output, BinaryLogicalOperation op)
-{
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input1, input2);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input1, output);
-  ARM_COMPUTE_ERROR_THROW_ON(validate_parameters(input1->info(), input2->info(), output->info()));
-
-  _input1 = input1;
-  _input2 = input2;
-  _output = output;
-
-  // Create kernel
-  std::string kernel_name = "binary_logical_op";
-  std::set<std::string> build_opts;
-  build_opts.emplace(("-DDATA_TYPE=" + get_cl_type_from_data_type(input1->info()->data_type())));
-
-  int op_code = 0;
-  switch (op)
-  {
-    case BinaryLogicalOperation::AND:
-      op_code = 1;
-      break;
-    case BinaryLogicalOperation::OR:
-      op_code = 2;
-      break;
-    default:
-      throw std::runtime_error("Operation not supported, yet");
-  }
-
-  build_opts.emplace(("-DOP_CODE=" + support::cpp11::to_string(op_code)));
-  build_opts.emplace(
-      ("-DVEC_SIZE=" + support::cpp11::to_string(num_elems_processed_per_iteration)));
-
-  _kernel =
-      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel(kernel_name, build_opts));
-
-  const std::pair<TensorShape, ValidRegion> broadcast_pair =
-      ITensorInfo::broadcast_shape_and_valid_region(*input1->info(), *input2->info());
-
-  const TensorShape &out_shape = broadcast_pair.first;
-  const ValidRegion &valid_region = broadcast_pair.second;
-
-  Window win = calculate_max_window(valid_region, Steps(num_elems_processed_per_iteration));
-  Window win_input1 = win.broadcast_if_dimension_le_one(*input1->info());
-  Window win_input2 = win.broadcast_if_dimension_le_one(*input2->info());
-
-  AccessWindowHorizontal input1_access(input1->info(), 0, num_elems_processed_per_iteration);
-  AccessWindowHorizontal input2_access(input2->info(), 0, num_elems_processed_per_iteration);
-  AccessWindowHorizontal output_access(output->info(), 0, num_elems_processed_per_iteration);
-
-  bool window_changed = update_window_and_padding(win_input1, input1_access) ||
-                        update_window_and_padding(win_input2, input2_access) ||
-                        update_window_and_padding(win, output_access);
-
-  output_access.set_valid_region(win, valid_region);
-
-  ICLKernel::configure_internal(win);
-}
-
-void CLBinaryLogicalOpKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
-
-  const TensorShape &in_shape1 = _input1->info()->tensor_shape();
-  const TensorShape &in_shape2 = _input2->info()->tensor_shape();
-  const TensorShape &out_shape = _output->info()->tensor_shape();
-
-  bool can_collapse = true;
-  if (std::min(in_shape1.total_size(), in_shape2.total_size()) > 1)
-  {
-    can_collapse =
-        (std::min(in_shape1.num_dimensions(), in_shape2.num_dimensions()) > Window::DimZ);
-    for (size_t d = Window::DimZ; can_collapse && (d < out_shape.num_dimensions()); d++)
-    {
-      can_collapse = (in_shape1[d] == in_shape2[d]);
-    }
-  }
-
-  bool has_collapsed = false;
-  Window collapsed =
-      can_collapse ? window.collapse_if_possible(ICLKernel::window(), Window::DimZ, &has_collapsed)
-                   : window;
-
-  const TensorShape &in_shape1_collapsed =
-      has_collapsed ? in_shape1.collapsed_from(Window::DimZ) : in_shape1;
-  const TensorShape &in_shape2_collapsed =
-      has_collapsed ? in_shape2.collapsed_from(Window::DimZ) : in_shape2;
-
-  Window slice = collapsed.first_slice_window_3D();
-  Window slice_input1 = slice.broadcast_if_dimension_le_one(in_shape1_collapsed);
-  Window slice_input2 = slice.broadcast_if_dimension_le_one(in_shape2_collapsed);
-
-  do
-  {
-    unsigned int idx = 0;
-    add_3D_tensor_argument(idx, _input1, slice_input1);
-    add_3D_tensor_argument(idx, _input2, slice_input2);
-    add_3D_tensor_argument(idx, _output, slice);
-
-    enqueue(queue, *this, slice);
-
-    collapsed.slide_window_slice_3D(slice_input1);
-    collapsed.slide_window_slice_3D(slice_input2);
-  } while (collapsed.slide_window_slice_3D(slice));
-}
-
-BorderSize CLBinaryLogicalOpKernel::border_size() const
-{
-  const unsigned int replicateSize =
-      _output->info()->dimension(0) -
-      std::min(_input1->info()->dimension(0), _input2->info()->dimension(0));
-  const unsigned int border =
-      std::min<unsigned int>(num_elems_processed_per_iteration - 1U, replicateSize);
-  return BorderSize(0, border, 0, 0);
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLCastKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLCastKernel.cpp
deleted file mode 100644
index bf7ebae3f..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLCastKernel.cpp
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLCastKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-CLCastKernel::CLCastKernel() : _input(nullptr), _output(nullptr) {}
-
-void CLCastKernel::configure(const ICLTensor *input, ICLTensor *output)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
-
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::U8, DataType::QASYMM8,
-                                                DataType::S16, DataType::S32, DataType::F16,
-                                                DataType::F32);
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::U8, DataType::QASYMM8,
-                                                DataType::S16, DataType::S32, DataType::F16,
-                                                DataType::F32);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_SHAPES(input, output);
-
-  _input = input;
-  _output = output;
-
-  constexpr unsigned int num_elems_processed_per_iteration = 16;
-
-  // Set kernel build options
-  std::set<std::string> build_opts;
-  build_opts.emplace("-DDATA_TYPE_IN=" + get_cl_type_from_data_type(input->info()->data_type()));
-  build_opts.emplace("-DDATA_TYPE_OUT=" + get_cl_type_from_data_type(output->info()->data_type()));
-  build_opts.emplace(
-      ("-DVEC_SIZE=" + support::cpp11::to_string(num_elems_processed_per_iteration)));
-
-  // Create kernel
-  if (is_data_type_quantized_asymmetric(input->info()->data_type()))
-  {
-    const float scale_in = input->info()->quantization_info().scale;
-    const int offset_in = input->info()->quantization_info().offset;
-    build_opts.emplace("-DSCALE=" + float_to_string_with_full_precision(scale_in));
-    build_opts.emplace("-DOFFSET=" + support::cpp11::to_string(offset_in));
-
-    _kernel = static_cast<cl::Kernel>(
-        CLKernelLibraryEx::get().create_kernel("cast_qasymm_in", build_opts));
-  }
-  else if (is_data_type_quantized_asymmetric(output->info()->data_type()))
-  {
-    const float scale_in = output->info()->quantization_info().scale;
-    const int offset_in = output->info()->quantization_info().offset;
-    build_opts.emplace("-DSCALE=" + float_to_string_with_full_precision(scale_in));
-    build_opts.emplace("-DOFFSET=" + support::cpp11::to_string(offset_in));
-
-    _kernel = static_cast<cl::Kernel>(
-        CLKernelLibraryEx::get().create_kernel("cast_qasymm_out", build_opts));
-  }
-  else
-  {
-    _kernel = static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel("cast", build_opts));
-  }
-
-  // Configure kernel window
-  Window win = calculate_max_window(*input->info(), Steps(num_elems_processed_per_iteration));
-  AccessWindowHorizontal input_access(input->info(), 0, num_elems_processed_per_iteration);
-  AccessWindowHorizontal output_access(output->info(), 0, num_elems_processed_per_iteration);
-  update_window_and_padding(win, input_access, output_access);
-  output_access.set_valid_region(win, input->info()->valid_region());
-
-  ICLKernel::configure_internal(win);
-}
-
-void CLCastKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
-
-  Window collapsed = window.collapse_if_possible(ICLKernel::window(), Window::DimZ);
-  Window slice = collapsed.first_slice_window_3D();
-
-  do
-  {
-    unsigned int idx = 0;
-    add_3D_tensor_argument(idx, _input, slice);
-    add_3D_tensor_argument(idx, _output, slice);
-    enqueue(queue, *this, slice);
-  } while (collapsed.slide_window_slice_3D(slice));
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLComparisonOpKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLComparisonOpKernel.cpp
deleted file mode 100644
index 5af5b16ea..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLComparisonOpKernel.cpp
+++ /dev/null
@@ -1,212 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLComparisonOpKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-namespace
-{
-constexpr unsigned int num_elems_processed_per_iteration = 16;
-
-Status validate_arguments(const ITensorInfo *input1, const ITensorInfo *input2,
-                          const ITensorInfo *output)
-{
-  const TensorShape &out_shape =
-      TensorShape::broadcast_shape(input1->tensor_shape(), input2->tensor_shape());
-
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input1, 1, DataType::U8, DataType::U16,
-                                                       DataType::S16, DataType::F16, DataType::S32,
-                                                       DataType::F32, DataType::QASYMM8);
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input2, 1, DataType::U8, DataType::U16,
-                                                       DataType::S16, DataType::F16, DataType::S32,
-                                                       DataType::F32, DataType::QASYMM8);
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(out_shape.total_size() == 0,
-                                  "Inputs are not broadcast compatible");
-  // Validate in case of configured output
-  if (output->total_size() > 0)
-  {
-    ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::QASYMM8);
-    ARM_COMPUTE_RETURN_ERROR_ON_MSG(
-        detail::have_different_dimensions(out_shape, output->tensor_shape(), 0),
-        "Wrong shape for output");
-  }
-  return Status{};
-}
-} // namespace
-
-CLComparisonOpKernel::CLComparisonOpKernel() : _input1(nullptr), _input2(nullptr), _output(nullptr)
-{
-}
-
-void CLComparisonOpKernel::configure(const ICLTensor *input1, const ICLTensor *input2,
-                                     ICLTensor *output, const ComparisonOperation &op)
-{
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input1, input2);
-  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input1->info(), input2->info(), output->info()));
-
-  _input1 = input1;
-  _input2 = input2;
-  _output = output;
-
-  // Create kernel
-  std::string kernel_name = "comparison_op";
-  int op_code = 0;
-
-  switch (op)
-  {
-    case ComparisonOperation::EQUAL:
-      op_code = 1;
-      break;
-    case ComparisonOperation::NOT_EQUAL:
-      op_code = 2;
-      break;
-    default:
-      throw std::runtime_error(" Operation not supported, yet");
-  }
-
-  std::set<std::string> build_opts;
-  build_opts.emplace(("-DOP_CODE=" + support::cpp11::to_string(op_code)));
-  build_opts.emplace(("-DDATA_TYPE_IN=" + get_cl_type_from_data_type(input1->info()->data_type())));
-  build_opts.emplace(
-      ("-DDATA_TYPE_OUT=" + get_cl_type_from_data_type(output->info()->data_type())));
-  build_opts.emplace(
-      ("-DVEC_SIZE=" + support::cpp11::to_string(num_elems_processed_per_iteration)));
-
-  if (is_data_type_quantized_asymmetric(input1->info()->data_type()) &&
-      ((input1->info()->quantization_info().offset != input2->info()->quantization_info().offset) ||
-       (input1->info()->quantization_info().scale != input2->info()->quantization_info().scale)))
-  {
-    build_opts.emplace("-DOFFSET_IN1=" +
-                       support::cpp11::to_string(input1->info()->quantization_info().offset));
-    build_opts.emplace("-DOFFSET_IN2=" +
-                       support::cpp11::to_string(input2->info()->quantization_info().offset));
-    build_opts.emplace("-DSCALE_IN1=" +
-                       support::cpp11::to_string(input1->info()->quantization_info().scale));
-    build_opts.emplace("-DSCALE_IN2=" +
-                       support::cpp11::to_string(input2->info()->quantization_info().scale));
-    kernel_name += "_qasymm8";
-  }
-
-  _kernel =
-      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel(kernel_name, build_opts));
-
-  const std::pair<TensorShape, ValidRegion> broadcast_pair =
-      ITensorInfo::broadcast_shape_and_valid_region(*input1->info(), *input2->info());
-
-  const TensorShape &out_shape = broadcast_pair.first;
-  const ValidRegion &valid_region = broadcast_pair.second;
-
-  // Auto initialize output if not initialized
-  {
-    set_shape_if_empty(*output->info(), out_shape);
-
-    if (input1->info()->data_type() == DataType::S16 ||
-        input2->info()->data_type() == DataType::S16)
-    {
-      set_format_if_unknown(*output->info(), Format::S16);
-    }
-    else if (input1->info()->data_type() == DataType::F16 &&
-             input2->info()->data_type() == DataType::F16)
-    {
-      set_format_if_unknown(*output->info(), Format::F16);
-    }
-    else if (input1->info()->data_type() == DataType::F32 ||
-             input2->info()->data_type() == DataType::F32)
-    {
-      set_format_if_unknown(*output->info(), Format::F32);
-    }
-  }
-
-  Window win = calculate_max_window(valid_region, Steps(num_elems_processed_per_iteration));
-  Window win_input1 = win.broadcast_if_dimension_le_one(*input1->info());
-  Window win_input2 = win.broadcast_if_dimension_le_one(*input2->info());
-
-  AccessWindowHorizontal input1_access(input1->info(), 0, num_elems_processed_per_iteration);
-  AccessWindowHorizontal input2_access(input2->info(), 0, num_elems_processed_per_iteration);
-  AccessWindowHorizontal output_access(output->info(), 0, num_elems_processed_per_iteration);
-
-  bool window_changed = update_window_and_padding(win_input1, input1_access) ||
-                        update_window_and_padding(win_input2, input2_access) ||
-                        update_window_and_padding(win, output_access);
-
-  output_access.set_valid_region(win, valid_region);
-
-  ICLKernel::configure_internal(win);
-}
-
-void CLComparisonOpKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
-
-  const TensorShape &in_shape1 = _input1->info()->tensor_shape();
-  const TensorShape &in_shape2 = _input2->info()->tensor_shape();
-  const TensorShape &out_shape = _output->info()->tensor_shape();
-
-  bool can_collapse = true;
-  if (std::min(in_shape1.total_size(), in_shape2.total_size()) > 1)
-  {
-    can_collapse =
-        (std::min(in_shape1.num_dimensions(), in_shape2.num_dimensions()) > Window::DimZ);
-    for (size_t d = Window::DimZ; can_collapse && (d < out_shape.num_dimensions()); d++)
-    {
-      can_collapse = (in_shape1[d] == in_shape2[d]);
-    }
-  }
-
-  bool has_collapsed = false;
-  Window collapsed =
-      can_collapse ? window.collapse_if_possible(ICLKernel::window(), Window::DimZ, &has_collapsed)
-                   : window;
-
-  const TensorShape &in_shape1_collapsed =
-      has_collapsed ? in_shape1.collapsed_from(Window::DimZ) : in_shape1;
-  const TensorShape &in_shape2_collapsed =
-      has_collapsed ? in_shape2.collapsed_from(Window::DimZ) : in_shape2;
-
-  Window slice = collapsed.first_slice_window_3D();
-  Window slice_input1 = slice.broadcast_if_dimension_le_one(in_shape1_collapsed);
-  Window slice_input2 = slice.broadcast_if_dimension_le_one(in_shape2_collapsed);
-
-  do
-  {
-    unsigned int idx = 0;
-    add_3D_tensor_argument(idx, _input1, slice_input1);
-    add_3D_tensor_argument(idx, _input2, slice_input2);
-    add_3D_tensor_argument(idx, _output, slice);
-
-    enqueue(queue, *this, slice);
-
-    collapsed.slide_window_slice_3D(slice_input1);
-    collapsed.slide_window_slice_3D(slice_input2);
-  } while (collapsed.slide_window_slice_3D(slice));
-}
-
-BorderSize CLComparisonOpKernel::border_size() const
-{
-  const unsigned int replicateSize =
-      _output->info()->dimension(0) -
-      std::min(_input1->info()->dimension(0), _input2->info()->dimension(0));
-  const unsigned int border =
-      std::min<unsigned int>(num_elems_processed_per_iteration - 1U, replicateSize);
-  return BorderSize(0, border, 0, 0);
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLDepthToSpaceKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLDepthToSpaceKernel.cpp
deleted file mode 100644
index c386e3312..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLDepthToSpaceKernel.cpp
+++ /dev/null
@@ -1,109 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLDepthToSpaceKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-namespace
-{
-Status validate_arguments(const ITensorInfo *input, const ITensorInfo *output,
-                          const int32_t block_size)
-{
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::U8, DataType::QASYMM8,
-                                                DataType::S16, DataType::S32, DataType::F16,
-                                                DataType::F32);
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::U8, DataType::QASYMM8,
-                                                DataType::S16, DataType::S32, DataType::F16,
-                                                DataType::F32);
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(block_size >= 1,
-                                  "Block size should be greater than or equal to 1.");
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(output->dimension(0) == input->dimension(0) * block_size,
-                                  "Output width should be equal to (Input width * block size)");
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(output->dimension(1) == input->dimension(1) * block_size,
-                                  "Output height should be equal to (Input height * block size)");
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->dimension(2) % (block_size * block_size) == 0,
-                                  "Input depth should be divisible by (block size * block size)");
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(
-      output->dimension(2) == input->dimension(2) / (block_size * block_size),
-      "Output depth should be equal to (Input depth / (block size * block size))");
-
-  return Status{};
-}
-} // namespace
-
-CLDepthToSpaceKernel::CLDepthToSpaceKernel() : _input(nullptr), _output(nullptr)
-{
-  // DO NOTHING
-}
-
-void CLDepthToSpaceKernel::configure(const ICLTensor *input, ICLTensor *output,
-                                     const int32_t block_size)
-{
-
-  _input = input;
-  _output = output;
-
-  // Set kernel build options
-  std::set<std::string> build_opts;
-  build_opts.emplace("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type()));
-  build_opts.emplace("-DBLOCK_SIZE=" + support::cpp11::to_string(block_size));
-  build_opts.emplace("-DDEPTH_OUT=" + support::cpp11::to_string(output->info()->dimension(2)));
-
-  // Create kernel
-  _kernel =
-      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel("depth_to_space", build_opts));
-
-  // Configure  kernel window
-  Window win = calculate_max_window(*output->info(), Steps());
-
-  Coordinates coord;
-  coord.set_num_dimensions(output->info()->num_dimensions());
-  output->info()->set_valid_region(ValidRegion(coord, output->info()->tensor_shape()));
-
-  ICLKernel::configure_internal(win);
-}
-
-void CLDepthToSpaceKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_WINDOWS(ICLKernel::window(), window);
-
-  Window slice_out = window.first_slice_window_4D().collapse(ICLKernel::window(), 2, 4);
-
-  // Setup input slice
-  Window slice_in(slice_out);
-  slice_in.set(Window::DimX, Window::Dimension(0, 0, 0));
-  slice_in.set(Window::DimY, Window::Dimension(0, 0, 0));
-  slice_in.set(Window::DimZ, Window::Dimension(0, 0, 0));
-  slice_in.set(3, Window::Dimension(0, 0, 0));
-
-  do
-  {
-    unsigned int idx = 0;
-    add_4D_tensor_argument(idx, _input, slice_in);
-    add_4D_tensor_argument(idx, _output, slice_out);
-    enqueue(queue, *this, slice_out);
-  } while (window.slide_window_slice_4D(slice_in) && window.slide_window_slice_4D(slice_out));
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLExpKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLExpKernel.cpp
deleted file mode 100644
index b1ee21bdc..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLExpKernel.cpp
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLExpKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-CLExpKernel::CLExpKernel() : _input(nullptr), _output(nullptr) {}
-
-void CLExpKernel::configure(const ICLTensor *input, ICLTensor *output)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
-
-  // Auto initialize output
-  auto_init_if_empty(*output->info(), input->info()->tensor_shape(), 1, input->info()->data_type(),
-                     input->info()->quantization_info());
-
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::F32);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_SHAPES(input, output);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
-
-  _input = input;
-  _output = output;
-
-  constexpr unsigned int num_elems_processed_per_iteration = 4;
-
-  // Create kernel
-  std::set<std::string> build_opts;
-  build_opts.emplace(("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type())));
-  build_opts.emplace(
-      ("-DVEC_SIZE=" + support::cpp11::to_string(num_elems_processed_per_iteration)));
-  _kernel =
-      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel("exp_layer", build_opts));
-
-  // Configure kernel window
-  Window win = calculate_max_window(*input->info(), Steps(num_elems_processed_per_iteration));
-  AccessWindowHorizontal input_access(input->info(), 0, num_elems_processed_per_iteration);
-  AccessWindowHorizontal output_access(output->info(), 0, num_elems_processed_per_iteration);
-  update_window_and_padding(win, input_access, output_access);
-  output_access.set_valid_region(win, input->info()->valid_region());
-
-  ICLKernel::configure_internal(win);
-}
-
-void CLExpKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
-
-  Window collapsed = window.collapse_if_possible(ICLKernel::window(), Window::DimZ);
-  Window slice = collapsed.first_slice_window_3D();
-
-  do
-  {
-    unsigned int idx = 0;
-    add_3D_tensor_argument(idx, _input, slice);
-    add_3D_tensor_argument(idx, _output, slice);
-    enqueue(queue, *this, slice);
-  } while (collapsed.slide_window_slice_3D(slice));
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLGatherKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLGatherKernel.cpp
deleted file mode 100644
index ae2801e2b..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLGatherKernel.cpp
+++ /dev/null
@@ -1,129 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLGatherKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-namespace
-{
-constexpr unsigned int num_elems_processed_per_iteration = 1;
-
-Status validate_arguments(const ITensorInfo *input1, const ITensorInfo *input2,
-                          const ITensorInfo *output)
-{
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input1, 1, DataType::U8, DataType::S32,
-                                                       DataType::F32);
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input2, 1, DataType::S32);
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::U8, DataType::S32,
-                                                       DataType::F32);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input1, output);
-
-  return Status{};
-}
-
-} // namespace
-
-CLGatherKernel::CLGatherKernel() : _input1(nullptr), _input2(nullptr), _output(nullptr) {}
-
-void CLGatherKernel::configure(const ICLTensor *input1, const ICLTensor *input2, ICLTensor *output)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input1, input2, output);
-  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input1->info(), input2->info(), output->info()));
-
-  _input1 = input1;
-  _input2 = input2;
-  _output = output;
-
-  // Construct kernel name
-  std::string kernel_name = "gather";
-  if (input1->info()->num_dimensions() == 1)
-  {
-    kernel_name = "gather_1d";
-  }
-  else if (input1->info()->num_dimensions() == 2)
-  {
-    if (_output->info()->num_dimensions() == 1)
-    {
-      kernel_name = "gather_1d_out";
-    }
-  }
-
-  // Set kernel build options
-  std::set<std::string> build_opts;
-  build_opts.emplace("-DDATA_TYPE_IN1=" + get_cl_type_from_data_type(input1->info()->data_type()));
-  build_opts.emplace("-DDATA_TYPE_IN2=" + get_cl_type_from_data_type(input2->info()->data_type()));
-  build_opts.emplace("-DDATA_TYPE_OUT=" + get_cl_type_from_data_type(output->info()->data_type()));
-
-  // Create kernel
-  _kernel =
-      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel(kernel_name, build_opts));
-
-  // Configure kernel window
-  Window win = calculate_max_window(*input2->info(), Steps(num_elems_processed_per_iteration));
-  output->info()->set_valid_region(ValidRegion(Coordinates(), output->info()->tensor_shape()));
-
-  ICLKernel::configure_internal(win);
-}
-
-Status CLGatherKernel::validate(const ITensorInfo *input1, const ITensorInfo *input2,
-                                const ITensorInfo *output)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input1, input2, output);
-  ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(input1, input2, output));
-
-  return Status{};
-}
-
-void CLGatherKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(IKernel::window(), window);
-
-  if (_input1->info()->num_dimensions() == 1)
-  {
-    Window slice = window.first_slice_window_1D();
-
-    unsigned int idx = 0;
-    add_1D_tensor_argument(idx, _input1, slice);
-    add_1D_tensor_argument(idx, _input2, slice);
-    add_1D_tensor_argument(idx, _output, slice);
-    enqueue(queue, *this, slice);
-  }
-  else if (_input1->info()->num_dimensions() == 2)
-  {
-    Window window_collapsed = window.collapse_if_possible(ICLKernel::window(), Window::DimY);
-    Window slice = window.collapse_if_possible(ICLKernel::window(), Window::DimX);
-
-    // Set inputs
-    unsigned int idx = 0;
-    add_2D_tensor_argument(idx, _input1, window_collapsed);
-    add_1D_tensor_argument(idx, _input2, slice);
-    if (_output->info()->num_dimensions() == 1)
-    {
-      add_1D_tensor_argument(idx, _output, slice);
-    }
-    else
-    {
-      add_2D_tensor_argument(idx, _output, window_collapsed);
-    }
-    enqueue(queue, *this, slice);
-  }
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLHashtableLookupKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLHashtableLookupKernel.cpp
deleted file mode 100644
index cd7b21c6d..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLHashtableLookupKernel.cpp
+++ /dev/null
@@ -1,177 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLHashtableLookupKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-namespace
-{
-constexpr unsigned int num_elems_processed_per_iteration = 16;
-
-std::pair<Status, Window> validate_and_configure_window(ITensorInfo *input, ITensorInfo *output)
-{
-  Window win = calculate_max_window(*output, Steps(num_elems_processed_per_iteration));
-  AccessWindowHorizontal input_access(input, 0, num_elems_processed_per_iteration);
-  AccessWindowHorizontal output_access(output, 0, num_elems_processed_per_iteration);
-
-  bool window_changed = update_window_and_padding(win, input_access, output_access);
-  input_access.set_valid_region(win, output->valid_region());
-
-  Status err = (window_changed)
-                   ? ARM_COMPUTE_CREATE_ERROR(ErrorCode::RUNTIME_ERROR, "Insufficient Padding!")
-                   : Status{};
-  return std::make_pair(err, win);
-}
-} // namespace
-
-CLHashtableLookupKernel::CLHashtableLookupKernel()
-    : _input(nullptr), _output(nullptr), _lookups(nullptr)
-{
-}
-
-Status CLHashtableLookupKernel::validate(const ITensorInfo *lookups, const ITensorInfo *keys,
-                                         const ITensorInfo *input, const ITensorInfo *output,
-                                         const ITensorInfo *hits)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(lookups, keys, input, output, hits);
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(
-      input, 1, DataType::U8, DataType::S8, DataType::QASYMM8, DataType::U16, DataType::S16,
-      DataType::U32, DataType::S32, DataType::F16, DataType::F32);
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(lookups, 1, DataType::S32);
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(keys, 1, DataType::S32);
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(hits, 1, DataType::U8, DataType::QASYMM8);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(output->tensor_shape().total_size() == 0,
-                                  "Output's shape was not set");
-
-  ARM_COMPUTE_ERROR_ON(lookups->dimensions(0) == hits->dimensions(0) &&
-                       output->dimension(output->num_dimensions() - 1) == lookups->dimension(0));
-  ARM_COMPUTE_ERROR_ON(input->num_dimensions() < 2 && input->num_dimensions() > 4);
-  ARM_COMPUTE_ERROR_ON(lookups->num_dimensions() > 1);
-  ARM_COMPUTE_ERROR_ON(keys->num_dimensions() > 1);
-  ARM_COMPUTE_ERROR_ON(hits->num_dimensions() > 1);
-
-  return Status{};
-}
-
-void CLHashtableLookupKernel::configure(const ICLTensor *lookups, const ICLTensor *keys,
-                                        const ICLTensor *input, ICLTensor *output, ICLTensor *hits)
-{
-  ARM_COMPUTE_ERROR_THROW_ON(validate(input->info(), output->info(), lookups->info()));
-
-  _lookups = lookups;
-  _keys = keys;
-  _input = input;
-  _output = output;
-  _hits = hits;
-
-  // Make _lookup_indices tensor
-  _lookup_indices = arm_compute::support::cpp14::make_unique<CLTensor>();
-  _lookup_indices->allocator()->init(
-      TensorInfo(lookups->info()->tensor_shape(), lookups->info()->num_channels(), DataType::S32));
-  _lookup_indices->allocator()->allocate();
-
-  // Set kernel build options
-  std::stringstream kernel_name;
-  std::set<std::string> build_opts;
-  kernel_name << "hashtable_lookup";
-
-  build_opts.emplace("-DDEPTH_OUT=" + support::cpp11::to_string(output->info()->dimension(2)));
-  build_opts.emplace("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type()));
-  build_opts.emplace("-DVEC_SIZE=" + support::cpp11::to_string(num_elems_processed_per_iteration));
-  build_opts.emplace("-DNUM_DIMS=" + support::cpp11::to_string(_input->info()->num_dimensions()));
-
-  // Create kernel
-  _kernel = static_cast<cl::Kernel>(
-      CLKernelLibraryEx::get().create_kernel(kernel_name.str(), build_opts));
-
-  // Configure kernel window
-  auto win_config = validate_and_configure_window(input->info(), output->info());
-  ARM_COMPUTE_ERROR_THROW_ON(win_config.first);
-  ICLKernel::configure_internal(win_config.second);
-}
-
-void CLHashtableLookupKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(IKernel::window(), window);
-
-  const_cast<ICLTensor *>(_lookups)->map(queue);
-  const_cast<ICLTensor *>(_keys)->map(queue);
-  _hits->map(queue);
-  _lookup_indices->map(queue);
-
-  // Set values of hits
-  const int32_t *lookups_buf =
-      reinterpret_cast<int32_t *>(const_cast<ICLTensor *>(_lookups)->buffer());
-  const int32_t *keys_buf = reinterpret_cast<int32_t *>(const_cast<ICLTensor *>(_keys)->buffer());
-  uint8_t *hits_buf = reinterpret_cast<uint8_t *>(_hits->buffer());
-  int32_t *lookup_indices_buf = reinterpret_cast<int32_t *>(_lookup_indices->buffer());
-
-  std::map<int32_t, size_t> key_map;
-  const size_t keys_num = _keys->info()->dimension(0);
-  for (size_t key_index = 0; key_index < keys_num; key_index++)
-  {
-    key_map[keys_buf[key_index]] = key_index;
-  }
-
-  const size_t lookups_num = _lookups->info()->dimension(0);
-  for (size_t i = 0; i < lookups_num; ++i)
-  {
-    const auto lookup_value = lookups_buf[i];
-    const auto it = key_map.find(lookup_value);
-    if (it != key_map.end())
-    {
-#if defined(DEBUG)
-      if (it->second >= lookups_num)
-        ARM_COMPUTE_ERROR("HashTable Lookup: index out of bounds.");
-#endif // defined(DEBUG)
-      lookup_indices_buf[i] = static_cast<int32_t>(it->second);
-      hits_buf[i] = static_cast<uint8_t>(1);
-    }
-    else
-    {
-      lookup_indices_buf[i] = -1;
-      hits_buf[i] = static_cast<uint8_t>(0);
-    }
-  }
-
-  const_cast<ICLTensor *>(_lookups)->unmap(queue);
-  const_cast<ICLTensor *>(_keys)->unmap(queue);
-  _hits->unmap(queue);
-  _lookup_indices->unmap(queue);
-
-  Window win = window.collapse(ICLKernel::window(), 2, 4);
-
-  Window win_lookup;
-  win_lookup.set(Window::DimX, Window::Dimension(0, 0, 0));
-
-  do
-  {
-    unsigned int idx = 0;
-    add_4D_tensor_argument(idx, _input, win);
-    add_4D_tensor_argument(idx, _output, win);
-    add_1D_tensor_argument(idx, _lookup_indices.get(), win_lookup);
-
-    enqueue(queue, *this, win);
-  } while (window.slide_window_slice_4D(win) && window.slide_window_slice_1D(win_lookup));
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLNegKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLNegKernel.cpp
deleted file mode 100644
index 80d99dd3b..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLNegKernel.cpp
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLNegKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-namespace
-{
-Status validate_arguments(const ITensorInfo *input, const ITensorInfo *output)
-{
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::S16, DataType::S32,
-                                                DataType::F16, DataType::F32);
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::S16, DataType::S32,
-                                                DataType::F16, DataType::F32);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_DIMENSIONS(input->info()->tensor_shape(),
-                                              output->info()->tensor_shape());
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
-
-  return Status{};
-}
-
-} // namespace
-
-CLNegKernel::CLNegKernel() : _input(nullptr), _output(nullptr) {}
-
-void CLNegKernel::configure(const ICLTensor *input, ICLTensor *output)
-{
-
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
-  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input->info(), output->info()));
-
-  _input = input;
-  _output = output;
-
-  constexpr unsigned int num_elems_processed_per_iteration = 16;
-
-  // Create kernel
-  std::set<std::string> build_opts;
-  build_opts.emplace(("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type())));
-  build_opts.emplace(
-      ("-DVEC_SIZE=" + support::cpp11::to_string(num_elems_processed_per_iteration)));
-  _kernel =
-      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel("neg_tensor", build_opts));
-
-  // Configure window
-  Window win = calculate_max_window(*input->info(), Steps(num_elems_processed_per_iteration));
-
-  AccessWindowHorizontal input_access(input->info(), 0, num_elems_processed_per_iteration);
-  AccessWindowHorizontal output_access(output->info(), 0, num_elems_processed_per_iteration);
-  update_window_and_padding(win, input_access, output_access);
-  output_access.set_valid_region(win, input->info()->valid_region());
-
-  ICLKernel::configure_internal(win);
-}
-
-void CLNegKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
-
-  Window collapsed = window.collapse_if_possible(ICLKernel::window(), Window::DimZ);
-  Window slice = collapsed.first_slice_window_3D();
-
-  do
-  {
-    unsigned int idx = 0;
-    add_3D_tensor_argument(idx, _input, slice);
-    add_3D_tensor_argument(idx, _output, slice);
-    enqueue(queue, *this, slice, lws_hint());
-  } while (collapsed.slide_window_slice_3D(slice));
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLNormalizationLayerExKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLNormalizationLayerExKernel.cpp
deleted file mode 100644
index 12bbe910f..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLNormalizationLayerExKernel.cpp
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLNormalizationLayerExKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibrary.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-namespace
-{
-Status validate_arguments(const ITensorInfo *input, const ITensorInfo *output,
-                          NormalizationLayerInfo norm_info)
-{
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::F16, DataType::F32);
-  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(output);
-
-  // Checks performed when output is configured
-  if (output->total_size() != 0)
-  {
-    ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
-    ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_SHAPES(input, output);
-  }
-
-  return Status{};
-}
-
-std::pair<Status, Window> validate_and_configure_window(ITensorInfo *input, ITensorInfo *output,
-                                                        NormalizationLayerInfo norm_info)
-{
-  // Output tensor auto initialization if not yet initialized
-  auto_init_if_empty(*output, *input->clone());
-
-  const unsigned int norm_size = norm_info.norm_size();
-  bool is_in_map = norm_info.is_in_map();
-
-  const unsigned int border_width = is_in_map ? std::min(norm_size / 2, 3U) : 0;
-  const BorderSize border_size = BorderSize(0, border_width);
-
-  const unsigned int num_elems_processed_per_iteration = 4;
-  const unsigned int num_elems_read_per_iteration =
-      is_in_map ? (num_elems_processed_per_iteration + 2 * (norm_size / 2))
-                : num_elems_processed_per_iteration;
-
-  Window win = calculate_max_window(*input, Steps(num_elems_processed_per_iteration));
-
-  // We do not use a Rectangle window for IN_MAP_2D as we clamp the top and bottom accesses inside
-  // the kernel, avoiding padding
-  AccessWindowHorizontal input_access(input, -border_size.left, num_elems_read_per_iteration);
-  AccessWindowHorizontal output_access(output, 0, num_elems_processed_per_iteration);
-
-  bool window_changed = update_window_and_padding(win, input_access, output_access);
-
-  output_access.set_valid_region(win, input->valid_region());
-
-  Status err = (window_changed)
-                   ? ARM_COMPUTE_CREATE_ERROR(ErrorCode::RUNTIME_ERROR, "Insufficient Padding!")
-                   : Status{};
-  return std::make_pair(err, win);
-}
-} // namespace
-
-CLNormalizationLayerExKernel::CLNormalizationLayerExKernel()
-    : _input(nullptr), _output(nullptr), _border_size(0), _is_in_map(false)
-{
-}
-
-BorderSize CLNormalizationLayerExKernel::border_size() const { return _border_size; }
-
-void CLNormalizationLayerExKernel::configure(const ICLTensor *input, ICLTensor *output,
-                                             NormalizationLayerInfo norm_info)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
-
-  // Output tensor auto initialization if not yet initialized
-  auto_init_if_empty(*output->info(), *input->info()->clone());
-
-  // Perform validation step
-  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input->info(), output->info(), norm_info));
-
-  _input = input;
-  _output = output;
-
-  const unsigned int num_elems_processed_per_iteration = 4;
-  const bool is_in_map_2D = (norm_info.type() == NormType::IN_MAP_2D);
-
-  // Set build options
-  CLBuildOptions build_opts;
-  build_opts.add_option(("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type())));
-  build_opts.add_option(
-      ("-DCOEFF=" + float_to_string_with_full_precision(norm_info.scale_coeff())));
-  build_opts.add_option(("-DBETA=" + float_to_string_with_full_precision(norm_info.beta())));
-  build_opts.add_option(("-DKAPPA=" + float_to_string_with_full_precision(norm_info.kappa())));
-  build_opts.add_option(
-      ("-DVEC_SIZE=" + support::cpp11::to_string(num_elems_processed_per_iteration)));
-  build_opts.add_option(("-DRADIUS=" + support::cpp11::to_string(norm_info.norm_size())));
-  build_opts.add_option(("-DNUM_SLICES=" + support::cpp11::to_string(input->info()->dimension(2))));
-  build_opts.add_option_if(is_in_map_2D, "-DIN_MAP_2D");
-
-  // Create kernel
-  std::string kernel_name =
-      _is_in_map ? "normalization_layer_in_map" : "normalization_layer_cross_map";
-  _kernel = static_cast<cl::Kernel>(
-      CLKernelLibrary::get().create_kernel(kernel_name, build_opts.options()));
-
-  // Configure kernel window
-  auto win_config = validate_and_configure_window(input->info(), output->info(), norm_info);
-  ARM_COMPUTE_ERROR_THROW_ON(win_config.first);
-  ICLKernel::configure_internal(win_config.second);
-
-  // Set config_id for enabling LWS tuning
-  _config_id = "normalization_layer_";
-  _config_id += lower_string(string_from_data_type(input->info()->data_type()));
-  _config_id += "_";
-  _config_id += support::cpp11::to_string(
-      static_cast<std::underlying_type<NormType>::type>(norm_info.type()));
-  _config_id += "_";
-  _config_id += support::cpp11::to_string(norm_info.norm_size());
-  _config_id += "_";
-  _config_id += support::cpp11::to_string(input->info()->dimension(0));
-  _config_id += "_";
-  _config_id += support::cpp11::to_string(input->info()->dimension(1));
-}
-
-Status CLNormalizationLayerExKernel::validate(const ITensorInfo *input, const ITensorInfo *output,
-                                              NormalizationLayerInfo norm_info)
-{
-  ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(input, output, norm_info));
-  ARM_COMPUTE_RETURN_ON_ERROR(
-      validate_and_configure_window(input->clone().get(), output->clone().get(), norm_info).first);
-
-  return Status{};
-}
-
-void CLNormalizationLayerExKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(IKernel::window(), window);
-
-  const int collapsed_dimension = _is_in_map ? Window::DimZ : 4;
-  Window window_collapsed = window.collapse_if_possible(ICLKernel::window(), collapsed_dimension);
-  Window slice = window_collapsed.first_slice_window_3D();
-
-  do
-  {
-    unsigned int idx = 0;
-    add_3D_tensor_argument(idx, _input, slice);
-    add_3D_tensor_argument(idx, _output, slice);
-    enqueue(queue, *this, slice);
-  } while (window_collapsed.slide_window_slice_3D(slice));
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLPReLUKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLPReLUKernel.cpp
deleted file mode 100644
index 241f8ae4d..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLPReLUKernel.cpp
+++ /dev/null
@@ -1,185 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLPReLUKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-namespace
-{
-constexpr unsigned int num_elems_processed_per_iteration = 16;
-
-Status validate_info(const ITensorInfo *input, const ITensorInfo *alpha, const ITensorInfo *output)
-{
-  const TensorShape &out_shape =
-      TensorShape::broadcast_shape(input->tensor_shape(), alpha->tensor_shape());
-
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::F16, DataType::F32,
-                                                       DataType::QASYMM8);
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(alpha, 1, DataType::F16, DataType::F32,
-                                                       DataType::QASYMM8);
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(out_shape.total_size() == 0,
-                                  "Inputs are not broadcast compatible");
-  // Validate in case of configured output
-  if (output->total_size() > 0)
-  {
-    ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::F16, DataType::F32);
-    ARM_COMPUTE_RETURN_ERROR_ON_MSG(
-        detail::have_different_dimensions(out_shape, output->tensor_shape(), 0),
-        "Wrong shape for output");
-  }
-  return Status{};
-}
-} // namespace
-
-CLPReLUKernel::CLPReLUKernel() : _input(nullptr), _alpha(nullptr), _output(nullptr) {}
-
-void CLPReLUKernel::configure(const ICLTensor *input, const ICLTensor *alpha, ICLTensor *output)
-{
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input, alpha);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
-  ARM_COMPUTE_ERROR_THROW_ON(validate(input->info(), alpha->info(), output->info()));
-
-  _input = input;
-  _alpha = alpha;
-  _output = output;
-
-  // Create kernel
-  std::string kernel_name = "prelu";
-  std::set<std::string> build_opts;
-  build_opts.emplace(("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type())));
-  build_opts.emplace(
-      ("-DVEC_SIZE=" + support::cpp11::to_string(num_elems_processed_per_iteration)));
-
-  if (is_data_type_quantized_asymmetric(input->info()->data_type()))
-  {
-    build_opts.emplace("-DOFF_IN1=" +
-                       support::cpp11::to_string(input->info()->quantization_info().offset));
-    build_opts.emplace("-DOFF_IN2=" +
-                       support::cpp11::to_string(alpha->info()->quantization_info().offset));
-    build_opts.emplace("-DOFF_OUT=" +
-                       support::cpp11::to_string(output->info()->quantization_info().offset));
-    build_opts.emplace("-DSCALE_IN1=" +
-                       support::cpp11::to_string(input->info()->quantization_info().scale));
-    build_opts.emplace("-DSCALE_IN2=" +
-                       support::cpp11::to_string(alpha->info()->quantization_info().scale));
-    build_opts.emplace("-DSCALE_OUT=" +
-                       support::cpp11::to_string(output->info()->quantization_info().scale));
-    kernel_name += "_qasymm8";
-  }
-  _kernel =
-      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel(kernel_name, build_opts));
-
-  const std::pair<TensorShape, ValidRegion> broadcast_pair =
-      ITensorInfo::broadcast_shape_and_valid_region(*input->info(), *alpha->info());
-
-  const TensorShape &out_shape = broadcast_pair.first;
-  const ValidRegion &valid_region = broadcast_pair.second;
-
-  // Auto initialize output if not initialized
-  {
-    set_shape_if_empty(*output->info(), out_shape);
-
-    if (input->info()->data_type() == DataType::F16 && alpha->info()->data_type() == DataType::F16)
-    {
-      set_format_if_unknown(*output->info(), Format::F16);
-    }
-    else if (input->info()->data_type() == DataType::F32 ||
-             alpha->info()->data_type() == DataType::F32)
-    {
-      set_format_if_unknown(*output->info(), Format::F32);
-    }
-  }
-
-  Window win = calculate_max_window(valid_region, Steps(num_elems_processed_per_iteration));
-  Window win_input1 = win.broadcast_if_dimension_le_one(*input->info());
-  Window win_input2 = win.broadcast_if_dimension_le_one(*alpha->info());
-
-  AccessWindowHorizontal input1_access(input->info(), 0, num_elems_processed_per_iteration);
-  AccessWindowHorizontal input2_access(alpha->info(), 0, num_elems_processed_per_iteration);
-  AccessWindowHorizontal output_access(output->info(), 0, num_elems_processed_per_iteration);
-
-  bool window_changed = update_window_and_padding(win_input1, input1_access) ||
-                        update_window_and_padding(win_input2, input2_access) ||
-                        update_window_and_padding(win, output_access);
-
-  output_access.set_valid_region(win, valid_region);
-
-  ICLKernel::configure_internal(win);
-}
-
-void CLPReLUKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
-
-  const TensorShape &in_shape1 = _input->info()->tensor_shape();
-  const TensorShape &in_shape2 = _alpha->info()->tensor_shape();
-  const TensorShape &out_shape = _output->info()->tensor_shape();
-
-  bool can_collapse = true;
-  if (std::min(in_shape1.total_size(), in_shape2.total_size()) > 1)
-  {
-    can_collapse =
-        (std::min(in_shape1.num_dimensions(), in_shape2.num_dimensions()) > Window::DimZ);
-    for (size_t d = Window::DimZ; can_collapse && (d < out_shape.num_dimensions()); d++)
-    {
-      can_collapse = (in_shape1[d] == in_shape2[d]);
-    }
-  }
-
-  bool has_collapsed = false;
-  Window collapsed =
-      can_collapse ? window.collapse_if_possible(ICLKernel::window(), Window::DimZ, &has_collapsed)
-                   : window;
-
-  const TensorShape &in_shape1_collapsed =
-      has_collapsed ? in_shape1.collapsed_from(Window::DimZ) : in_shape1;
-  const TensorShape &in_shape2_collapsed =
-      has_collapsed ? in_shape2.collapsed_from(Window::DimZ) : in_shape2;
-
-  Window slice = collapsed.first_slice_window_3D();
-  Window slice_input1 = slice.broadcast_if_dimension_le_one(in_shape1_collapsed);
-  Window slice_input2 = slice.broadcast_if_dimension_le_one(in_shape2_collapsed);
-
-  do
-  {
-    unsigned int idx = 0;
-    add_3D_tensor_argument(idx, _input, slice_input1);
-    add_3D_tensor_argument(idx, _alpha, slice_input2);
-    add_3D_tensor_argument(idx, _output, slice);
-
-    enqueue(queue, *this, slice);
-
-    collapsed.slide_window_slice_3D(slice_input1);
-    collapsed.slide_window_slice_3D(slice_input2);
-  } while (collapsed.slide_window_slice_3D(slice));
-}
-
-BorderSize CLPReLUKernel::border_size() const
-{
-  const unsigned int replicateSize =
-      _output->info()->dimension(0) -
-      std::min(_input->info()->dimension(0), _alpha->info()->dimension(0));
-  const unsigned int border =
-      std::min<unsigned int>(num_elems_processed_per_iteration - 1U, replicateSize);
-  return BorderSize(0, border, 0, 0);
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLPadLayerKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLPadLayerKernel.cpp
deleted file mode 100644
index 99b54c822..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLPadLayerKernel.cpp
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLPadLayerKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-namespace
-{
-Status validate_arguments(const ITensorInfo *input_info, const ITensorInfo *output_info,
-                          const ITensorInfo *pad_size_info)
-{
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input_info, 1, DataType::U8, DataType::QASYMM8,
-                                                DataType::S16, DataType::S32, DataType::F16,
-                                                DataType::F32);
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output_info, 1, DataType::U8, DataType::QASYMM8,
-                                                DataType::S16, DataType::S32, DataType::F16,
-                                                DataType::F32);
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(pad_size_info, 1, DataType::S32);
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(input_info->num_dimensions() > 0 &&
-                                      input_info->num_dimensions() <= 4,
-                                  "Pad kernel supports upto 4-D input tensor");
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(
-      input_info->num_dimensions() == output_info->num_dimensions(),
-      "output tensor should have same number of dimensions as input tensor");
-
-  if (input_info->data_type() == DataType::QASYMM8)
-  {
-    ARM_COMPUTE_RETURN_ERROR_ON_MSG(input_info->quantization_info() !=
-                                        output_info->quantization_info(),
-                                    "The input and output quantization info are different!");
-  }
-
-  return Status{};
-}
-
-} // namespace
-
-CLPadLayerKernel::CLPadLayerKernel() : _input(nullptr), _output(nullptr), _pad_size(nullptr) {}
-
-void CLPadLayerKernel::configure(const ICLTensor *input, ICLTensor *output, ICLTensor *pad_size)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output, pad_size);
-  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input->info(), output->info(), pad_size->info()));
-
-  _input = input;
-  _output = output;
-  _pad_size = pad_size;
-
-  // Set kernel build options
-  std::set<std::string> build_opts;
-  build_opts.emplace("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type()));
-  build_opts.emplace("-DDEPTH_OUT=" + support::cpp11::to_string(output->info()->dimension(2)));
-  build_opts.emplace("-DIB=" + support::cpp11::to_string(input->info()->dimension(3)));
-  build_opts.emplace("-DIW=" + support::cpp11::to_string(input->info()->dimension(0)));
-  build_opts.emplace("-DIH=" + support::cpp11::to_string(input->info()->dimension(1)));
-  build_opts.emplace("-DID=" + support::cpp11::to_string(input->info()->dimension(2)));
-  if (input->info()->data_type() == DataType::QASYMM8)
-  {
-    build_opts.emplace("-DZERO_VALUE=" +
-                       support::cpp11::to_string(input->info()->quantization_info().offset));
-  }
-  else
-  {
-    build_opts.emplace("-DZERO_VALUE=" + support::cpp11::to_string(0));
-  }
-
-  // Create kernel
-  _kernel = static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel("pad", build_opts));
-
-  // Configure  kernel window
-  Window win = calculate_max_window(*output->info(), Steps());
-
-  Coordinates coord;
-  coord.set_num_dimensions(output->info()->num_dimensions());
-  output->info()->set_valid_region(ValidRegion(coord, output->info()->tensor_shape()));
-
-  ICLKernel::configure_internal(win);
-}
-
-void CLPadLayerKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_WINDOWS(ICLKernel::window(), window);
-
-  _pad_size->map(queue);
-
-  // Padding values only for up, top, left and front are required based on the rank of tensor
-  int rank = _pad_size->info()->dimension(1);
-
-  auto pad_batch_up =
-      (rank == 4) ? *reinterpret_cast<const int32_t *>(_pad_size->ptr_to_element({0, 0})) : 0;
-  auto pad_height_top =
-      (rank >= 2)
-          ? *reinterpret_cast<const int32_t *>(_pad_size->ptr_to_element({0, (rank == 2) ? 0 : 1}))
-          : 0;
-  auto pad_width_left = (rank >= 1)
-                            ? *reinterpret_cast<const int32_t *>(
-                                  _pad_size->ptr_to_element({0, (rank == 4) ? 2 : rank - 1}))
-                            : 0;
-  auto pad_depth_front =
-      (rank >= 3)
-          ? *reinterpret_cast<const int32_t *>(_pad_size->ptr_to_element({0, (rank == 3) ? 0 : 3}))
-          : 0;
-
-  _pad_size->unmap(queue);
-
-  // Pad_values which needs to be passed
-  const cl_int4 paddingValues = {
-      {static_cast<cl_int>(pad_width_left), static_cast<cl_int>(pad_height_top),
-       static_cast<cl_int>(pad_depth_front), static_cast<cl_int>(pad_batch_up)}};
-
-  Window slice_out = window.first_slice_window_4D().collapse(ICLKernel::window(), 2, 4);
-
-  // Setup output slice
-  Window slice_in(slice_out);
-  slice_in.set(Window::DimX, Window::Dimension(0, 0, 0));
-  slice_in.set(Window::DimY, Window::Dimension(0, 0, 0));
-  slice_in.set(Window::DimZ, Window::Dimension(0, 0, 0));
-  slice_in.set(3, Window::Dimension(0, 0, 0));
-
-  do
-  {
-    unsigned int idx = 0;
-    add_4D_tensor_argument(idx, _input, slice_in);
-    add_4D_tensor_argument(idx, _output, slice_out);
-    _kernel.setArg<cl_int4>(idx++, paddingValues);
-    enqueue(queue, *this, slice_out);
-  } while (window.slide_window_slice_4D(slice_out) && window.slide_window_slice_4D(slice_in));
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLPermuteExKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLPermuteExKernel.cpp
deleted file mode 100644
index aa094761c..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLPermuteExKernel.cpp
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLPermuteExKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-#include "arm_compute/core/utils/misc/ShapeCalculator.h"
-
-using namespace arm_compute;
-
-namespace
-{
-TensorShape get_output_shape(const ITensorInfo *input, const PermutationVector &perm)
-{
-  TensorShape output_shape = input->tensor_shape();
-  permute(output_shape, perm);
-  return output_shape;
-}
-
-Status validate_arguments(const ITensorInfo *input, const ITensorInfo *output,
-                          const PermutationVector &perm)
-{
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(
-      input, 1, DataType::U8, DataType::S8, DataType::QASYMM8, DataType::U16, DataType::S16,
-      DataType::U32, DataType::S32, DataType::F16, DataType::F32);
-
-  const TensorShape output_shape =
-      misc::shape_calculator::compute_permutation_output_shape(*input, perm);
-
-  // Validate configured output
-  if (output->total_size() != 0)
-  {
-    ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DIMENSIONS(output->tensor_shape(), output_shape);
-    ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
-  }
-  return Status{};
-}
-} // namespace
-
-CLPermuteExKernel::CLPermuteExKernel() : _input(nullptr), _output(nullptr), _perm() {}
-
-void CLPermuteExKernel::configure(const ICLTensor *input, ICLTensor *output,
-                                  const PermutationVector &perm)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
-  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input->info(), output->info(), perm));
-
-  _input = input;
-  _output = output;
-  _perm = perm;
-
-  const TensorShape output_shape = get_output_shape(input->info(), perm);
-  // Output auto inizialitation if not yet initialized
-  auto_init_if_empty(*output->info(), input->info()->clone()->set_tensor_shape(output_shape));
-
-  // Create kernel
-  std::set<std::string> build_opts;
-
-  build_opts.emplace("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type()));
-  build_opts.emplace("-DDEPTH_IN=" + support::cpp11::to_string(input->info()->dimension(2)));
-
-  // New positions of batch(D), height(H), width(w) and channel(C) based on permutation vector
-  build_opts.emplace("-DP1=" + support::cpp11::to_string(perm[0]));
-  build_opts.emplace("-DP2=" + support::cpp11::to_string(perm[1]));
-  build_opts.emplace("-DP3=" + support::cpp11::to_string(perm[2]));
-  build_opts.emplace("-DP4=" + support::cpp11::to_string(perm[3]));
-  _kernel = static_cast<cl::Kernel>(
-      CLKernelLibraryEx::get().create_kernel("permute_generic", build_opts));
-
-  // Configure  kernel window
-  Window win = calculate_max_window(*input->info(), Steps());
-
-  // The CLPermute doesn't need padding so update_window_and_padding() can be skipped
-  Coordinates coord;
-  coord.set_num_dimensions(output->info()->num_dimensions());
-  output->info()->set_valid_region(ValidRegion(coord, output->info()->tensor_shape()));
-
-  ICLKernel::configure_internal(win);
-}
-
-Status CLPermuteExKernel::validate(const ITensorInfo *input, const ITensorInfo *output,
-                                   const PermutationVector &perm)
-{
-  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, output);
-  ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(input, output, perm));
-
-  return Status{};
-}
-
-void CLPermuteExKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_WINDOWS(ICLKernel::window(), window);
-
-  Window slice_in = window.first_slice_window_4D().collapse(ICLKernel::window(), 2, 4);
-
-  // Setup output slice
-  Window slice_out(slice_in);
-  slice_out.set(Window::DimX, Window::Dimension(0, 0, 0));
-  slice_out.set(Window::DimY, Window::Dimension(0, 0, 0));
-  slice_out.set(Window::DimZ, Window::Dimension(0, 0, 0));
-  slice_out.set(3, Window::Dimension(0, 0, 0));
-
-  do
-  {
-    unsigned int idx = 0;
-    add_4D_tensor_argument(idx, _input, slice_in);
-    add_4D_tensor_argument(idx, _output, slice_out);
-    enqueue(queue, *this, slice_in);
-  } while (window.slide_window_slice_4D(slice_in) && window.slide_window_slice_4D(slice_out));
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLPixelWiseDivisionKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLPixelWiseDivisionKernel.cpp
deleted file mode 100644
index b985aa737..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLPixelWiseDivisionKernel.cpp
+++ /dev/null
@@ -1,280 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLPixelWiseDivisionKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-namespace
-{
-constexpr unsigned int num_elems_processed_per_iteration = 16;
-
-Status validate_arguments(const ITensorInfo *input1, const ITensorInfo *input2,
-                          const ITensorInfo *output, float scale, ConvertPolicy overflow_policy,
-                          RoundingPolicy rounding_policy)
-{
-  ARM_COMPUTE_UNUSED(overflow_policy);
-  ARM_COMPUTE_UNUSED(rounding_policy);
-
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input1, 1, DataType::U8, DataType::S16,
-                                                       DataType::F16, DataType::F32);
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input2, 1, DataType::U8, DataType::S16,
-                                                       DataType::F16, DataType::F32);
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(scale < 0, "Scale cannot be negative.");
-
-  const TensorShape &out_shape =
-      TensorShape::broadcast_shape(input1->tensor_shape(), input2->tensor_shape());
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(out_shape.total_size() == 0,
-                                  "Inputs are not broadcast compatible");
-
-  // Validate in case of configured output
-  if (output->total_size() > 0)
-  {
-    ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::U8, DataType::S16,
-                                                         DataType::F16, DataType::F32);
-    ARM_COMPUTE_RETURN_ERROR_ON_MSG(
-        output->data_type() == DataType::U8 &&
-            (input1->data_type() != DataType::U8 || input2->data_type() != DataType::U8),
-        "Output can only be U8 if both inputs are U8");
-    ARM_COMPUTE_RETURN_ERROR_ON_MSG(
-        detail::have_different_dimensions(out_shape, output->tensor_shape(), 0),
-        "Wrong shape for output");
-  }
-
-  return Status{};
-}
-
-std::pair<Status, Window> validate_and_configure_window(ITensorInfo *input1, ITensorInfo *input2,
-                                                        ITensorInfo *output)
-{
-  const std::pair<TensorShape, ValidRegion> broadcast_pair =
-      ITensorInfo::broadcast_shape_and_valid_region(*input1, *input2);
-  const TensorShape &out_shape = broadcast_pair.first;
-  const ValidRegion &valid_region = broadcast_pair.second;
-
-  // Auto initialize output if not initialized
-  {
-    set_shape_if_empty(*output, out_shape);
-
-    if (input1->data_type() == DataType::S16 || input2->data_type() == DataType::S16)
-    {
-      set_format_if_unknown(*output, Format::S16);
-    }
-    else if (input1->data_type() == DataType::F32 || input2->data_type() == DataType::F32)
-    {
-      set_format_if_unknown(*output, Format::F32);
-    }
-  }
-
-  Window win = calculate_max_window(valid_region, Steps(num_elems_processed_per_iteration));
-  Window win_input1 = win.broadcast_if_dimension_le_one(*input1);
-  Window win_input2 = win.broadcast_if_dimension_le_one(*input2);
-
-  AccessWindowHorizontal input1_access(input1, 0, num_elems_processed_per_iteration);
-  AccessWindowHorizontal input2_access(input2, 0, num_elems_processed_per_iteration);
-  AccessWindowHorizontal output_access(output, 0, num_elems_processed_per_iteration);
-
-  bool window_changed = update_window_and_padding(win_input1, input1_access) ||
-                        update_window_and_padding(win_input2, input2_access) ||
-                        update_window_and_padding(win, output_access);
-
-  output_access.set_valid_region(win, valid_region);
-
-  Status err = (window_changed)
-                   ? ARM_COMPUTE_CREATE_ERROR(ErrorCode::RUNTIME_ERROR, "Insufficient Padding!")
-                   : Status{};
-  return std::make_pair(err, win);
-}
-} // namespace
-
-CLPixelWiseDivisionKernel::CLPixelWiseDivisionKernel()
-    : _input1(nullptr), _input2(nullptr), _output(nullptr)
-{
-}
-
-void CLPixelWiseDivisionKernel::configure(const ICLTensor *input1, const ICLTensor *input2,
-                                          ICLTensor *output, float scale,
-                                          ConvertPolicy overflow_policy,
-                                          RoundingPolicy rounding_policy)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input1, input2, output);
-  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input1->info(), input2->info(), output->info(),
-                                                scale, overflow_policy, rounding_policy));
-
-  // Configure kernel window
-  auto win_config = validate_and_configure_window(input1->info(), input2->info(), output->info());
-  ARM_COMPUTE_ERROR_THROW_ON(win_config.first);
-
-  _input1 = input1;
-  _input2 = input2;
-  _output = output;
-
-  int scale_int = -1;
-  // Extract sign, exponent and mantissa
-  int exponent = 0;
-  float normalized_mantissa = std::frexp(scale, &exponent);
-  // Use int scaling if factor is equal to 1/2^n for 0 <= n <= 15
-  // frexp returns 0.5 as mantissa which means that the exponent will be in the range of -1 <= e <=
-  // 14
-  // Moreover, it will be negative as we deal with 1/2^n
-  if ((normalized_mantissa == 0.5f) && (-14 <= exponent) && (exponent <= 1))
-  {
-    // Store the positive exponent. We know that we compute 1/2^n
-    // Additionally we need to subtract 1 to compensate that frexp used a mantissa of 0.5
-    scale_int = std::abs(exponent - 1);
-  }
-
-  std::string data_type;
-  std::string compute_type;
-  // Check if it has float inputs and output
-  if (is_data_type_float(input1->info()->data_type()) ||
-      is_data_type_float(input2->info()->data_type()))
-  {
-    scale_int = -1;
-    compute_type = (input1->info()->data_type() == DataType::F32 ||
-                    input2->info()->data_type() == DataType::F32)
-                       ? "float"
-                       : "half";
-    data_type = "DATA_TYPE_FLOAT";
-  }
-  else
-  {
-    if (input1->info()->data_type() == DataType::S16 ||
-        input2->info()->data_type() == DataType::S16)
-    {
-      compute_type = "int";
-    }
-    else
-    {
-      compute_type = "ushort";
-    }
-    data_type = "DATA_TYPE_INT";
-  }
-
-  // Construct kernel name
-  std::string kernel_name = "pixelwise_div";
-  kernel_name += (scale_int >= 0) ? "_int" : "_float";
-
-  // Set kernel build options
-  std::set<std::string> build_opts;
-  build_opts.emplace(
-      (overflow_policy == ConvertPolicy::WRAP || is_data_type_float(output->info()->data_type()))
-          ? "-DWRAP"
-          : "-DSATURATE");
-  build_opts.emplace((rounding_policy == RoundingPolicy::TO_ZERO) ? "-DROUND=_rtz"
-                                                                  : "-DROUND=_rte");
-  build_opts.emplace("-DDATA_TYPE_IN1=" + get_cl_type_from_data_type(input1->info()->data_type()));
-  build_opts.emplace("-DDATA_TYPE_IN2=" + get_cl_type_from_data_type(input2->info()->data_type()));
-  build_opts.emplace("-DDATA_TYPE_OUT=" + get_cl_type_from_data_type(output->info()->data_type()));
-  build_opts.emplace("-DDATA_TYPE_RES=" + compute_type);
-  build_opts.emplace("-D" + data_type);
-
-  // Create kernel
-  _kernel =
-      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel(kernel_name, build_opts));
-
-  // Set scale argument
-  unsigned int idx = 3 * num_arguments_per_3D_tensor(); // Skip the inputs and output parameters
-
-  if (scale_int >= 0)
-  {
-    _kernel.setArg(idx++, scale_int);
-  }
-  else
-  {
-    _kernel.setArg(idx++, scale);
-  }
-
-  ICLKernel::configure_internal(win_config.second);
-}
-
-Status CLPixelWiseDivisionKernel::validate(const ITensorInfo *input1, const ITensorInfo *input2,
-                                           const ITensorInfo *output, float scale,
-                                           ConvertPolicy overflow_policy,
-                                           RoundingPolicy rounding_policy)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input1, input2, output);
-  ARM_COMPUTE_RETURN_ON_ERROR(
-      validate_arguments(input1, input2, output, scale, overflow_policy, rounding_policy));
-  ARM_COMPUTE_RETURN_ON_ERROR(validate_and_configure_window(input1->clone().get(),
-                                                            input2->clone().get(),
-                                                            output->clone().get())
-                                  .first);
-
-  return Status{};
-}
-
-void CLPixelWiseDivisionKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
-
-  const TensorShape &in_shape1 = _input1->info()->tensor_shape();
-  const TensorShape &in_shape2 = _input2->info()->tensor_shape();
-  const TensorShape &out_shape = _output->info()->tensor_shape();
-
-  bool can_collapse = true;
-  if (std::min(in_shape1.total_size(), in_shape2.total_size()) > 1)
-  {
-    can_collapse =
-        (std::min(in_shape1.num_dimensions(), in_shape2.num_dimensions()) > Window::DimZ);
-    for (size_t d = Window::DimZ; can_collapse && (d < out_shape.num_dimensions()); ++d)
-    {
-      can_collapse = (in_shape1[d] == in_shape2[d]);
-    }
-  }
-
-  bool has_collapsed = false;
-  Window collapsed =
-      can_collapse ? window.collapse_if_possible(ICLKernel::window(), Window::DimZ, &has_collapsed)
-                   : window;
-
-  const TensorShape &in_shape1_collapsed =
-      has_collapsed ? in_shape1.collapsed_from(Window::DimZ) : in_shape1;
-  const TensorShape &in_shape2_collapsed =
-      has_collapsed ? in_shape2.collapsed_from(Window::DimZ) : in_shape2;
-
-  Window slice = collapsed.first_slice_window_3D();
-  Window slice_input1 = slice.broadcast_if_dimension_le_one(in_shape1_collapsed);
-  Window slice_input2 = slice.broadcast_if_dimension_le_one(in_shape2_collapsed);
-
-  do
-  {
-    unsigned int idx = 0;
-    add_3D_tensor_argument(idx, _input1, slice_input1);
-    add_3D_tensor_argument(idx, _input2, slice_input2);
-    add_3D_tensor_argument(idx, _output, slice);
-    enqueue(queue, *this, slice);
-
-    collapsed.slide_window_slice_3D(slice_input1);
-    collapsed.slide_window_slice_3D(slice_input2);
-  } while (collapsed.slide_window_slice_3D(slice));
-}
-
-BorderSize CLPixelWiseDivisionKernel::border_size() const
-{
-  const unsigned int replicateSize =
-      _output->info()->dimension(0) -
-      std::min(_input1->info()->dimension(0), _input2->info()->dimension(0));
-  const unsigned int border =
-      std::min<unsigned int>(num_elems_processed_per_iteration - 1U, replicateSize);
-  return BorderSize(0, border, 0, 0);
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLReduceOperationKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLReduceOperationKernel.cpp
deleted file mode 100644
index f581780e1..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLReduceOperationKernel.cpp
+++ /dev/null
@@ -1,181 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLReduceOperationKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-namespace
-{
-// NOTE This is necessary because it is not guaranteed that the axis positions of input and output
-// are the same.
-const TensorShape inferOutputShape(const TensorShape &input_shape, const uint32_t axis)
-{
-  TensorShape out_shape{input_shape};
-
-  out_shape.set(axis, 1);
-
-  return out_shape;
-}
-} // namespace
-
-namespace
-{
-Status validate_arguments(const ITensorInfo *input, const ITensorInfo *output, const uint32_t axis,
-                          ReduceOperation op)
-{
-  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, output);
-
-  if (output->total_size() != 0)
-  {
-    ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
-  }
-
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::QASYMM8, DataType::F16,
-                                                       DataType::F32, DataType::S32);
-  if (op == ReduceOperation::MEAN || op == ReduceOperation::SUM)
-  {
-    ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->data_type() == DataType::QASYMM8,
-                                    "Not support QASYMM8, yet");
-  }
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(output->tensor_shape().total_size() == 0,
-                                  "Inputs are not broadcast compatible");
-
-  const auto num_dimensions = input->tensor_shape().num_dimensions();
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(
-      axis >= 0 && axis < num_dimensions,
-      "axis must be greater than or equal to 0 and less than (input's rank).");
-
-  const TensorShape output_shape = inferOutputShape(input->tensor_shape(), axis);
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(output_shape.total_size() != output->tensor_shape().total_size(),
-                                  "output shape's size does not match axis");
-
-  return Status{};
-}
-} // namespace
-
-CLReduceOperationKernel::CLReduceOperationKernel() : _input(nullptr), _output(nullptr), _axis() {}
-
-void CLReduceOperationKernel::configure(const ICLTensor *input, ICLTensor *output,
-                                        const uint32_t axis, ReduceOperation op)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
-
-  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input->info(), output->info(), axis, op));
-
-  _input = input;
-  _output = output;
-  _axis = axis;
-
-  std::unique_ptr<ITensorInfo> output_info = output->info()->clone();
-  output_info->set_tensor_shape(inferOutputShape(input->info()->tensor_shape(), axis));
-
-  // Construct kernel name
-  std::string kernel_name;
-  int op_code = 0;
-  if (op == ReduceOperation::MAX)
-  {
-    kernel_name = "reduce_min_max";
-    op_code = 1;
-  }
-  else if (op == ReduceOperation::MIN)
-  {
-    kernel_name = "reduce_min_max";
-    op_code = 2;
-  }
-  else if (op == ReduceOperation::SUM)
-  {
-    kernel_name = "reduce_sum_mean";
-    op_code = 3;
-  }
-  else if (op == ReduceOperation::MEAN)
-  {
-    kernel_name = "reduce_sum_mean";
-    op_code = 4;
-  }
-  else
-    throw std::runtime_error("Operation not supported, yet");
-
-  // Set kernel build options
-  std::set<std::string> build_opts;
-  build_opts.emplace("-DDATA_TYPE=" + get_cl_type_from_data_type(output_info->data_type()));
-  build_opts.emplace("-DDEPTH_OUT=" + support::cpp11::to_string(output_info->dimension(2)));
-  build_opts.emplace("-DOP_CODE=" + support::cpp11::to_string(op_code));
-
-  // Create kernel
-  _kernel =
-      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel(kernel_name, build_opts));
-
-  // Configure  kernel window
-  Window win = calculate_max_window(*output_info, Steps());
-
-  Coordinates coord;
-  coord.set_num_dimensions(output_info->num_dimensions());
-  output->info()->set_valid_region(ValidRegion(coord, output_info->tensor_shape()));
-
-  ICLKernel::configure_internal(win);
-}
-
-Status CLReduceOperationKernel::validate(const ITensorInfo *input, const ITensorInfo *output,
-                                         const uint32_t axis, ReduceOperation op)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
-  ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(input, output, axis, op));
-
-  return Status{};
-}
-
-void CLReduceOperationKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
-
-  const TensorShape &shape_in = _input->info()->tensor_shape();
-
-  unsigned int idx = 2 * num_arguments_per_4D_tensor(); // Skip the input and output parameters
-
-  _kernel.setArg<cl_int>(idx++, _axis);
-  _kernel.setArg<cl_int>(idx++, shape_in[_axis]);
-
-  // Support dimensions up to 4
-  Window slice_out = window.collapse(ICLKernel::window(), 2, 4);
-
-  // Setup input slice
-  Window slice_in(slice_out);
-  slice_in.set(Window::DimX, Window::Dimension(0, 0, 0));
-  slice_in.set(Window::DimY, Window::Dimension(0, 0, 0));
-  slice_in.set(Window::DimZ, Window::Dimension(0, 0, 0));
-  slice_in.set(3, Window::Dimension(0, 0, 0));
-
-  // Copy output's shape in order to use for recovering at end of this method
-  // TODO Remove changing and recovering output's shape if it is guaranteed that the axis positions
-  // of input and output are the same
-  const TensorShape shape_out = _output->info()->tensor_shape();
-  _output->info()->set_tensor_shape(inferOutputShape(shape_in, _axis));
-
-  idx = 0;
-  add_4D_tensor_argument(idx, _input, slice_in);
-  add_4D_tensor_argument(idx, _output, slice_out);
-  enqueue(queue, *this, slice_out);
-
-  // Recover output's shape of output tensor
-  _output->info()->set_tensor_shape(shape_out);
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLSpaceToBatchNDKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLSpaceToBatchNDKernel.cpp
deleted file mode 100644
index 6b0697e89..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLSpaceToBatchNDKernel.cpp
+++ /dev/null
@@ -1,238 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLSpaceToBatchNDKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-namespace
-{
-constexpr unsigned int num_elems_processed_per_iteration = 16;
-
-Status validate_arguments(const ITensorInfo *input, const ITensorInfo *block_size,
-                          const ITensorInfo *padding_size, const ITensorInfo *output)
-{
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::U8, DataType::QASYMM8,
-                                                       DataType::S16, DataType::F16, DataType::S32,
-                                                       DataType::F32);
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(block_size, 1, DataType::S32);
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(padding_size, 1, DataType::S32);
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::U8, DataType::QASYMM8,
-                                                       DataType::S16, DataType::F16, DataType::S32,
-                                                       DataType::F32);
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->num_dimensions() != output->num_dimensions(),
-                                  "The number of dimensions of input should be equal to output");
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->data_layout() != output->data_layout(),
-                                  "The input and output layouts are different!");
-
-  // TODO Support other cases
-  if (input->num_dimensions() == 4 && input->data_layout() == DataLayout::NCHW)
-  {
-    ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->dimension(2) != output->dimension(2),
-                                    "Input Depth should be equal to Output Depth");
-    ARM_COMPUTE_RETURN_ERROR_ON_MSG(block_size->dimension(0) != 2 ||
-                                        padding_size->dimension(1) != 2,
-                                    "Only 2-dimensional spatial block's size was wrong");
-  }
-  else if (input->num_dimensions() == 4 && input->data_layout() == DataLayout::NHWC)
-  {
-    ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->dimension(0) != output->dimension(0),
-                                    "Input Depth should be equal to Output Depth");
-    ARM_COMPUTE_RETURN_ERROR_ON_MSG(block_size->dimension(0) != 2 ||
-                                        padding_size->dimension(1) != 2,
-                                    "Only 2-dimensional spatial block's size was wrong");
-  }
-  else
-  {
-    ARM_COMPUTE_RETURN_ERROR_MSG("CLSpaceToBatchNDKernel supports only 4-dimensional input");
-  }
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->num_dimensions() < 2 && input->num_dimensions() > 4,
-                                  "CLSpaceToBatchNDKernel supports dimensions up to 4");
-
-  if (input->data_type() == DataType::QASYMM8)
-  {
-    ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->quantization_info() != output->quantization_info(),
-                                    "The input and output quantization info are different!");
-  }
-
-  return Status{};
-}
-
-} // namespace
-
-CLSpaceToBatchNDKernel::CLSpaceToBatchNDKernel() : _input(nullptr), _output(nullptr) {}
-
-void CLSpaceToBatchNDKernel::configure(const ICLTensor *input, const ICLTensor *block_size,
-                                       const ICLTensor *padding_size, ICLTensor *output)
-{
-
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
-  ARM_COMPUTE_ERROR_THROW_ON(
-      validate_arguments(input->info(), block_size->info(), padding_size->info(), output->info()));
-
-  _input = input;
-  _block_size = block_size;
-  _padding_size = padding_size;
-  _output = output;
-
-  // Set kernel build options
-  // TODO Support other cases
-  std::string kernel_name = "space_to_batch_4d";
-  std::set<std::string> build_opts;
-  Window win;
-
-  if (input->info()->data_layout() == DataLayout::NCHW)
-  {
-    kernel_name += "_nchw";
-    build_opts.emplace("-DDEPTH_OUT=" + support::cpp11::to_string(output->info()->dimension(2)));
-    build_opts.emplace("-DHEIGHT_IN=" + support::cpp11::to_string(input->info()->dimension(1)));
-    build_opts.emplace("-DWIDTH_IN=" + support::cpp11::to_string(input->info()->dimension(0)));
-
-    win = calculate_max_window(*output->info(), Steps());
-
-    Coordinates coord;
-    coord.set_num_dimensions(output->info()->num_dimensions());
-    output->info()->set_valid_region(ValidRegion(coord, output->info()->tensor_shape()));
-  }
-  else if (input->info()->data_layout() == DataLayout::NHWC)
-  {
-    kernel_name += "_nhwc";
-    build_opts.emplace("-DHEIGHT_OUT=" + support::cpp11::to_string(output->info()->dimension(2)));
-    build_opts.emplace("-DHEIGHT_IN=" + support::cpp11::to_string(input->info()->dimension(2)));
-    build_opts.emplace("-DWIDTH_IN=" + support::cpp11::to_string(input->info()->dimension(1)));
-    build_opts.emplace("-DVEC_SIZE=" +
-                       support::cpp11::to_string(num_elems_processed_per_iteration));
-
-    win = calculate_max_window(*output->info(), Steps(num_elems_processed_per_iteration));
-    AccessWindowHorizontal input_access(input->info(), 0, num_elems_processed_per_iteration);
-    AccessWindowHorizontal output_access(output->info(), 0, num_elems_processed_per_iteration);
-
-    bool window_changed = update_window_and_padding(win, input_access, output_access);
-    input_access.set_valid_region(win, output->info()->valid_region());
-
-    if (window_changed)
-    {
-      ARM_COMPUTE_CREATE_ERROR(ErrorCode::RUNTIME_ERROR, "Insufficient Padding!");
-    }
-  }
-  else
-  {
-    ARM_COMPUTE_ERROR("Unsupported layout");
-  }
-
-  build_opts.emplace("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type()));
-  build_opts.emplace("-DBATCH_IN=" + support::cpp11::to_string(input->info()->dimension(3)));
-  if (input->info()->data_type() == DataType::QASYMM8)
-  {
-    build_opts.emplace("-DZERO_VALUE=" +
-                       support::cpp11::to_string(input->info()->quantization_info().offset));
-  }
-  else
-  {
-    build_opts.emplace("-DZERO_VALUE=" + support::cpp11::to_string(0));
-  }
-
-  // Create kernel
-  _kernel =
-      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel(kernel_name, build_opts));
-
-  // Configure kernel window
-  ICLKernel::configure_internal(win);
-}
-
-void CLSpaceToBatchNDKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_WINDOWS(ICLKernel::window(), window);
-
-#if defined(DEBUG)
-  const_cast<ICLTensor *>(_block_size)->map(queue);
-  const_cast<ICLTensor *>(_padding_size)->map(queue);
-
-  const size_t num_dimensions = _input->info()->num_dimensions();
-  const size_t num_spacial_dimensions = _block_size->info()->dimension(0);
-  int32_t batch_size = _input->info()->dimension(num_dimensions - 1);
-  for (size_t i = 0; i < num_spacial_dimensions; ++i)
-  {
-    const int32_t block_size = *reinterpret_cast<int32_t *>(_block_size->ptr_to_element({i}));
-    const int32_t padding_size_pre =
-        *reinterpret_cast<int32_t *>(_padding_size->ptr_to_element({0, i}));
-    const int32_t padding_size_post =
-        *reinterpret_cast<int32_t *>(_padding_size->ptr_to_element({1, i}));
-
-    ARM_COMPUTE_ERROR_ON_MSG(block_size < 1, "Block size should be greater than or equal to 1");
-    ARM_COMPUTE_ERROR_ON_MSG(padding_size_pre < 0 && padding_size_post < 0,
-                             "Padding size should be greater than or equal to 0");
-
-    if (num_dimensions == 4 && _input->info()->data_layout() == DataLayout::NCHW)
-    {
-      ARM_COMPUTE_ERROR_ON_MSG(
-          _output->info()->dimension(i) !=
-              (_input->info()->dimension(i) + padding_size_pre + padding_size_post) / block_size,
-          "Dimension value of spatial block does not match output's dimension value");
-    }
-    else
-    {
-      ARM_COMPUTE_ERROR_ON_MSG(
-          _output->info()->dimension(num_dimensions - num_spacial_dimensions - 1 + i) !=
-              (_input->info()->dimension(num_dimensions - num_spacial_dimensions - 1 + i) +
-               padding_size_pre + padding_size_post) /
-                  block_size,
-          "Dimension value of spatial block does not match output's dimension value");
-    }
-
-    batch_size *= block_size;
-  }
-  ARM_COMPUTE_ERROR_ON_MSG(
-      _output->info()->dimension(num_dimensions - 1) != batch_size,
-      "Output batch size should be equal to input batch size * (multiplication of all block size)");
-
-  const_cast<ICLTensor *>(_block_size)->unmap(queue);
-  const_cast<ICLTensor *>(_padding_size)->unmap(queue);
-#endif // defined(DEBUG)
-
-  Window slice_out = window.first_slice_window_4D().collapse(ICLKernel::window(), 2, 4);
-
-  // Setup output slice
-  Window slice_in(slice_out);
-  slice_in.set(Window::DimX, Window::Dimension(0, 0, 0));
-  slice_in.set(Window::DimY, Window::Dimension(0, 0, 0));
-  slice_in.set(Window::DimZ, Window::Dimension(0, 0, 0));
-  slice_in.set(3, Window::Dimension(0, 0, 0));
-
-  // Set block size window
-  Window win_block = calculate_max_window(*_block_size->info(), Steps());
-
-  // Set padding size window
-  Window win_padding = calculate_max_window(*_padding_size->info(), Steps());
-
-  do
-  {
-    unsigned int idx = 0;
-    add_4D_tensor_argument(idx, _input, slice_in);
-    add_4D_tensor_argument(idx, _output, slice_out);
-    add_1D_tensor_argument(idx, _block_size, win_block);
-    add_2D_tensor_argument(idx, _padding_size, win_padding);
-    enqueue(queue, *this, slice_out);
-  } while (window.slide_window_slice_4D(slice_out) && window.slide_window_slice_4D(slice_in));
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLSpaceToDepthKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLSpaceToDepthKernel.cpp
deleted file mode 100644
index 5d6329edc..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLSpaceToDepthKernel.cpp
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLSpaceToDepthKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-namespace
-{
-Status validate_arguments(const ITensorInfo *input, const ITensorInfo *output,
-                          const int32_t block_size)
-{
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::U8, DataType::QASYMM8,
-                                                DataType::S16, DataType::S32, DataType::F16,
-                                                DataType::F32);
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::U8, DataType::QASYMM8,
-                                                DataType::S16, DataType::S32, DataType::F16,
-                                                DataType::F32);
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(block_size >= 1,
-                                  "Block size should be greater than or equal to 1.");
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->dimension(3) == output->dimension(3),
-                                  "Input batch should be equal to Output batch");
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(
-      input->dimension(2) * block_size * block_size == output->dimension(2),
-      "Output depth should be equal to (input depth * block size *block size)");
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(!(input->dimension(0) % block_size) &&
-                                      !(input->dimension(1) % block_size),
-                                  "Input height and width should be divisible by block size");
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG((output->dimension(0) == (input->dimension(0) / block_size)) &&
-                                      (output->dimension(1) == (input->dimension(1) / block_size)),
-                                  "Output height and width should be equal to "
-                                  "input_height/blocksize and input_width/blocksize respectively");
-
-  return Status{};
-}
-
-} // namespace
-
-CLSpaceToDepthKernel::CLSpaceToDepthKernel() : _input(nullptr), _output(nullptr) {}
-
-void CLSpaceToDepthKernel::configure(const ICLTensor *input, ICLTensor *output,
-                                     const int32_t block_size)
-{
-
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
-  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input->info(), output->info(), block_size));
-
-  _input = input;
-  _output = output;
-
-  // Set kernel build options
-  std::set<std::string> build_opts;
-  build_opts.emplace("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type()));
-  build_opts.emplace("-DBLOCK_SIZE=" + support::cpp11::to_string(block_size));
-  build_opts.emplace("-DDEPTH_IN=" + support::cpp11::to_string(input->info()->dimension(2)));
-
-  // Create kernel
-  _kernel =
-      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel("space_to_depth", build_opts));
-
-  // Configure  kernel window
-  Window win = calculate_max_window(*input->info(), Steps());
-
-  Coordinates coord;
-  coord.set_num_dimensions(output->info()->num_dimensions());
-  output->info()->set_valid_region(ValidRegion(coord, output->info()->tensor_shape()));
-
-  ICLKernel::configure_internal(win);
-}
-
-void CLSpaceToDepthKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_WINDOWS(ICLKernel::window(), window);
-
-  Window slice_in = window.first_slice_window_4D().collapse(ICLKernel::window(), 2, 4);
-
-  // Setup output slice
-  Window slice_out(slice_in);
-  slice_out.set(Window::DimX, Window::Dimension(0, 0, 0));
-  slice_out.set(Window::DimY, Window::Dimension(0, 0, 0));
-  slice_out.set(Window::DimZ, Window::Dimension(0, 0, 0));
-  slice_out.set(3, Window::Dimension(0, 0, 0));
-
-  do
-  {
-    unsigned int idx = 0;
-    add_4D_tensor_argument(idx, _input, slice_in);
-    add_4D_tensor_argument(idx, _output, slice_out);
-    enqueue(queue, *this, slice_in);
-  } while (window.slide_window_slice_4D(slice_in) && window.slide_window_slice_4D(slice_out));
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLSquaredDifferenceKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLSquaredDifferenceKernel.cpp
deleted file mode 100644
index 260bc39f1..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLSquaredDifferenceKernel.cpp
+++ /dev/null
@@ -1,170 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLSquaredDifferenceKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-namespace
-{
-constexpr unsigned int num_elems_processed_per_iteration = 16;
-
-Status validate(const ITensorInfo *input1, const ITensorInfo *input2, const ITensorInfo *output)
-{
-  const TensorShape &out_shape =
-      TensorShape::broadcast_shape(input1->tensor_shape(), input2->tensor_shape());
-
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input1, 1, DataType::F16, DataType::F32);
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input2, 1, DataType::F16, DataType::F32);
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MSG(out_shape.total_size() == 0,
-                                  "Inputs are not broadcast compatible");
-  // Validate in case of configured output
-  if (output->total_size() > 0)
-  {
-    ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::F16, DataType::F32);
-    ARM_COMPUTE_RETURN_ERROR_ON_MSG(
-        detail::have_different_dimensions(out_shape, output->tensor_shape(), 0),
-        "Wrong shape for output");
-  }
-  return Status{};
-}
-} // namespace
-
-CLSquaredDifferenceKernel::CLSquaredDifferenceKernel()
-    : _input1(nullptr), _input2(nullptr), _output(nullptr)
-{
-}
-
-void CLSquaredDifferenceKernel::configure(const ICLTensor *input1, const ICLTensor *input2,
-                                          ICLTensor *output)
-{
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input1, input2);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input1, output);
-  ARM_COMPUTE_ERROR_THROW_ON(validate(input1->info(), input2->info(), output->info()));
-
-  _input1 = input1;
-  _input2 = input2;
-  _output = output;
-
-  // Create kernel
-  std::set<std::string> build_opts;
-  build_opts.emplace(("-DDATA_TYPE=" + get_cl_type_from_data_type(input1->info()->data_type())));
-  build_opts.emplace(
-      ("-DVEC_SIZE=" + support::cpp11::to_string(num_elems_processed_per_iteration)));
-  _kernel = static_cast<cl::Kernel>(
-      CLKernelLibraryEx::get().create_kernel("squared_difference", build_opts));
-
-  const std::pair<TensorShape, ValidRegion> broadcast_pair =
-      ITensorInfo::broadcast_shape_and_valid_region(*input1->info(), *input2->info());
-
-  const TensorShape &out_shape = broadcast_pair.first;
-  const ValidRegion &valid_region = broadcast_pair.second;
-
-  // Auto initialize output if not initialized
-  {
-    set_shape_if_empty(*output->info(), out_shape);
-
-    if (input1->info()->data_type() == DataType::F16 &&
-        input2->info()->data_type() == DataType::F16)
-    {
-      set_format_if_unknown(*output->info(), Format::F16);
-    }
-    else if (input1->info()->data_type() == DataType::F32 ||
-             input2->info()->data_type() == DataType::F32)
-    {
-      set_format_if_unknown(*output->info(), Format::F32);
-    }
-  }
-
-  Window win = calculate_max_window(valid_region, Steps(num_elems_processed_per_iteration));
-  Window win_input1 = win.broadcast_if_dimension_le_one(*input1->info());
-  Window win_input2 = win.broadcast_if_dimension_le_one(*input2->info());
-
-  AccessWindowHorizontal input1_access(input1->info(), 0, num_elems_processed_per_iteration);
-  AccessWindowHorizontal input2_access(input2->info(), 0, num_elems_processed_per_iteration);
-  AccessWindowHorizontal output_access(output->info(), 0, num_elems_processed_per_iteration);
-
-  bool window_changed = update_window_and_padding(win_input1, input1_access) ||
-                        update_window_and_padding(win_input2, input2_access) ||
-                        update_window_and_padding(win, output_access);
-
-  output_access.set_valid_region(win, valid_region);
-
-  ICLKernel::configure_internal(win);
-}
-
-void CLSquaredDifferenceKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
-
-  const TensorShape &in_shape1 = _input1->info()->tensor_shape();
-  const TensorShape &in_shape2 = _input2->info()->tensor_shape();
-  const TensorShape &out_shape = _output->info()->tensor_shape();
-
-  bool can_collapse = true;
-  if (std::min(in_shape1.total_size(), in_shape2.total_size()) > 1)
-  {
-    can_collapse =
-        (std::min(in_shape1.num_dimensions(), in_shape2.num_dimensions()) > Window::DimZ);
-    for (size_t d = Window::DimZ; can_collapse && (d < out_shape.num_dimensions()); d++)
-    {
-      can_collapse = (in_shape1[d] == in_shape2[d]);
-    }
-  }
-
-  bool has_collapsed = false;
-  Window collapsed =
-      can_collapse ? window.collapse_if_possible(ICLKernel::window(), Window::DimZ, &has_collapsed)
-                   : window;
-
-  const TensorShape &in_shape1_collapsed =
-      has_collapsed ? in_shape1.collapsed_from(Window::DimZ) : in_shape1;
-  const TensorShape &in_shape2_collapsed =
-      has_collapsed ? in_shape2.collapsed_from(Window::DimZ) : in_shape2;
-
-  Window slice = collapsed.first_slice_window_3D();
-  Window slice_input1 = slice.broadcast_if_dimension_le_one(in_shape1_collapsed);
-  Window slice_input2 = slice.broadcast_if_dimension_le_one(in_shape2_collapsed);
-
-  do
-  {
-    unsigned int idx = 0;
-    add_3D_tensor_argument(idx, _input1, slice_input1);
-    add_3D_tensor_argument(idx, _input2, slice_input2);
-    add_3D_tensor_argument(idx, _output, slice);
-
-    enqueue(queue, *this, slice);
-
-    collapsed.slide_window_slice_3D(slice_input1);
-    collapsed.slide_window_slice_3D(slice_input2);
-  } while (collapsed.slide_window_slice_3D(slice));
-}
-
-BorderSize CLSquaredDifferenceKernel::border_size() const
-{
-  const unsigned int replicateSize =
-      _output->info()->dimension(0) -
-      std::min(_input1->info()->dimension(0), _input2->info()->dimension(0));
-  const unsigned int border =
-      std::min<unsigned int>(num_elems_processed_per_iteration - 1U, replicateSize);
-  return BorderSize(0, border, 0, 0);
-}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLStridedSliceExKernel.cpp b/libs/ARMComputeEx/src/core/CL/kernels/CLStridedSliceExKernel.cpp
deleted file mode 100644
index 48146a43a..000000000
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLStridedSliceExKernel.cpp
+++ /dev/null
@@ -1,253 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/CL/kernels/CLStridedSliceExKernel.h"
-
-#include "arm_compute/core/CL/CLHelpers.h"
-#include "arm_compute/core/CL/CLKernelLibraryEx.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-#include "arm_compute/core/TensorInfo.h"
-
-using namespace arm_compute;
-
-CLStridedSliceExKernel::CLStridedSliceExKernel()
-    : _input(nullptr), _output(nullptr), _beginData(nullptr), _endData(nullptr),
-      _stridesData(nullptr), _beginMask(0), _endMask(0), _shrinkAxisMask(0)
-{
-}
-
-Status CLStridedSliceExKernel::validate(const ITensorInfo *input, const ITensorInfo *output,
-                                        const ITensorInfo *begin, const ITensorInfo *end,
-                                        const ITensorInfo *strides, int32_t beginMask,
-                                        int32_t endMask, int32_t shrinkAxisMask)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output, begin, end, strides);
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(
-      input, 1, DataType::U8, DataType::S8, DataType::QASYMM8, DataType::U16, DataType::S16,
-      DataType::U32, DataType::S32, DataType::F16, DataType::F32);
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(begin, 1, DataType::S32);
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(end, 1, DataType::S32);
-  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(strides, 1, DataType::S32);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
-
-  ARM_COMPUTE_ERROR_ON(begin->num_dimensions() != 1 || begin->dimension(0) > 4);
-  ARM_COMPUTE_ERROR_ON_MISMATCHING_DIMENSIONS(begin->tensor_shape(), end->tensor_shape(),
-                                              strides->tensor_shape());
-
-  return Status{};
-}
-
-// Return the index for the first element along that axis. This index will be a
-// positive integer between [0, axisSize - 1] that can be used to index
-// directly into the data.
-inline int32_t StartForAxis(int32_t beginMask, int32_t begin, int32_t stride,
-                            const TensorShape &inputShape, int32_t axis)
-{
-  // Begin with the specified index
-  int32_t start = begin;
-
-  // beginMask override
-  if (beginMask & 1 << axis)
-  {
-    if (stride > 0)
-    {
-      // Forward iteration - use the first element. These values will get
-      // clamped below (Note: We could have set them to 0 and axisSize-1, but
-      // use lowest() and max() to maintain symmetry with StopForAxis())
-      start = std::numeric_limits<int32_t>::lowest();
-    }
-    else
-    {
-      // Backward iteration - use the last element.
-      start = std::numeric_limits<int32_t>::max();
-    }
-  }
-
-  // Handle negative indices
-  int32_t axisSize = inputShape[axis];
-  if (start < 0)
-  {
-    start += axisSize;
-  }
-
-  // Clamping
-  start = arm_compute::utility::clamp(start, 0, axisSize - 1);
-
-  return start;
-}
-
-// Return the "real" index for the end of iteration along that axis. This is an
-// "end" in the traditional C sense, in that it points to one past the last
-// element. ie. So if you were iterating through all elements of a 1D array of
-// size 4, this function would return 4 as the stop, because it is one past the
-// "real" indices of 0, 1, 2 & 3.
-inline int32_t StopForAxis(int32_t endMask, int32_t end, int32_t stride,
-                           const TensorShape &inputShape, int32_t axis)
-{
-  // Begin with the specified index
-  int32_t stop = end;
-
-  // endMask override
-  if (endMask & (1 << axis))
-  {
-    if (stride > 0)
-    {
-      // Forward iteration - use the last element. These values will get
-      // clamped below
-      stop = std::numeric_limits<int32_t>::max();
-    }
-    else
-    {
-      // Backward iteration - use the first element.
-      stop = std::numeric_limits<int32_t>::lowest();
-    }
-  }
-
-  // Handle negative indices
-  int32_t axisSize = inputShape[axis];
-  if (stop < 0)
-  {
-    stop += axisSize;
-  }
-
-  // Clamping
-  // Because the end index points one past the last element, we need slightly
-  // different clamping ranges depending on the direction.
-  if (stride > 0)
-  {
-    // Forward iteration
-    stop = arm_compute::utility::clamp(stop, 0, axisSize);
-  }
-  else
-  {
-    // Backward iteration
-    stop = arm_compute::utility::clamp(stop, -1, axisSize - 1);
-  }
-
-  return stop;
-}
-
-inline int32_t getOutDim(int32_t start, int32_t stop, int32_t stride)
-{
-  int32_t ret = 0;
-  if (stride > 0)
-  {
-    ret = ((stop - start - 1) / stride) + 1;
-  }
-  else
-  {
-    ret = ((stop - start + 1) / stride) + 1;
-  }
-  ARM_COMPUTE_ERROR_ON_MSG(ret < 0, "The dimension must be the natural number");
-  return ret;
-}
-
-void CLStridedSliceExKernel::configure(const ICLTensor *input, ICLTensor *output,
-                                       ICLTensor *beginData, ICLTensor *endData,
-                                       ICLTensor *stridesData, int32_t beginMask, int32_t endMask,
-                                       int32_t shrinkAxisMask)
-{
-  ARM_COMPUTE_ERROR_THROW_ON(validate(input->info(), output->info(), beginData->info(),
-                                      endData->info(), stridesData->info(), beginMask, endMask,
-                                      shrinkAxisMask));
-
-  _input = input;
-  _output = output;
-  _beginData = beginData;
-  _endData = endData;
-  _stridesData = stridesData;
-  _beginMask = beginMask;
-  _endMask = endMask;
-  _shrinkAxisMask = shrinkAxisMask;
-
-  // Set kernel build options
-  std::set<std::string> build_opts;
-  build_opts.emplace("-DELEMENT_DATA_TYPE=" +
-                     get_cl_type_from_data_type(input->info()->data_type()));
-  build_opts.emplace("-DDEPTH_OUT=" + support::cpp11::to_string(output->info()->dimension(2)));
-
-  // Create kernel
-  _kernel = static_cast<cl::Kernel>(
-      CLKernelLibraryEx::get().create_kernel("strided_slice_ex", build_opts));
-
-  // Configure  kernel window
-  Window win = calculate_max_window(*output->info(), Steps());
-  ICLKernel::configure_internal(win);
-}
-
-void CLStridedSliceExKernel::run(const Window &window, cl::CommandQueue &queue)
-{
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(IKernel::window(), window);
-
-  _beginData->map(queue);
-  _endData->map(queue);
-  _stridesData->map(queue);
-
-  std::vector<int32_t> starts;
-  std::vector<int32_t> strides;
-
-  for (uint32_t n = 0; n < _beginData->info()->tensor_shape().total_size(); ++n)
-  {
-    const TensorShape shape = _input->info()->tensor_shape();
-    starts.emplace_back(
-        StartForAxis(_beginMask, reinterpret_cast<int32_t *>(_beginData->buffer())[n],
-                     reinterpret_cast<int32_t *>(_stridesData->buffer())[n], shape, n));
-
-    strides.emplace_back(reinterpret_cast<int32_t *>(_stridesData->buffer())[n]);
-  }
-
-  for (uint32_t n = _beginData->info()->tensor_shape().total_size(); n < 4; n++)
-  {
-    starts.emplace_back(0);
-    strides.emplace_back(1);
-  }
-  // TODO: Apply shrinkAxisMask
-
-  _beginData->unmap(queue);
-  _stridesData->unmap(queue);
-  _endData->unmap(queue);
-
-  unsigned int idx = 2 * num_arguments_per_4D_tensor(); // Skip the input and output parameters
-  const cl_int4 startsArg = {{
-      static_cast<cl_int>(starts[0]), static_cast<cl_int>(starts[1]),
-      static_cast<cl_int>(starts[2]), static_cast<cl_int>(starts[3]),
-  }};
-  _kernel.setArg<cl_int4>(idx++, startsArg);
-
-  const cl_int4 stridesArg = {{
-      static_cast<cl_int>(strides[0]), static_cast<cl_int>(strides[1]),
-      static_cast<cl_int>(strides[2]), static_cast<cl_int>(strides[3]),
-  }};
-  _kernel.setArg<cl_int4>(idx++, stridesArg);
-
-  Window slice_out = window.first_slice_window_4D().collapse(ICLKernel::window(), 2, 4);
-
-  // Setup output slice
-  Window slice_in(slice_out);
-  slice_in.set(Window::DimX, Window::Dimension(0, 0, 0));
-  slice_in.set(Window::DimY, Window::Dimension(0, 0, 0));
-  slice_in.set(Window::DimZ, Window::Dimension(0, 0, 0));
-  slice_in.set(3, Window::Dimension(0, 0, 0));
-
-  do
-  {
-    unsigned int idx = 0;
-    add_4D_tensor_argument(idx, _input, slice_in);
-    add_4D_tensor_argument(idx, _output, slice_out);
-    enqueue(queue, *this, slice_out);
-  } while (window.slide_window_slice_4D(slice_in) && window.slide_window_slice_4D(slice_out));
-}
diff --git a/libs/ARMComputeEx/src/core/NEON/kernels/NENormalizationLayerExKernel.cpp b/libs/ARMComputeEx/src/core/NEON/kernels/NENormalizationLayerExKernel.cpp
deleted file mode 100644
index 3b5782c25..000000000
--- a/libs/ARMComputeEx/src/core/NEON/kernels/NENormalizationLayerExKernel.cpp
+++ /dev/null
@@ -1,294 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/NEON/kernels/NENormalizationLayerExKernel.h"
-
-#include "arm_compute/core/Helpers.h"
-#include "arm_compute/core/NEON/NEMath.h"
-
-using namespace arm_compute;
-
-namespace
-{
-Status validate_arguments(const ITensorInfo *input, const ITensorInfo *input_squared,
-                          const ITensorInfo *output, const NormalizationLayerInfo &norm_info)
-{
-  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, input_squared, output);
-  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::F16, DataType::F32);
-
-  ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, input_squared);
-  ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_SHAPES(input, input_squared);
-
-  // Checks performed when output is configured
-  if (output->total_size() != 0)
-  {
-    ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
-    ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_SHAPES(input, output);
-  }
-
-  return Status{};
-}
-
-std::pair<Status, Window> validate_and_configure_window(ITensorInfo *input,
-                                                        ITensorInfo *input_squared,
-                                                        ITensorInfo *output,
-                                                        const NormalizationLayerInfo &norm_info)
-{
-  unsigned int num_elems_processed_per_iteration = 16 / input->element_size();
-  const unsigned int num_elems_read_per_iteration =
-      num_elems_processed_per_iteration + 2 * (norm_info.norm_size() / 2);
-  const unsigned int num_rows =
-      (norm_info.type() == NormType::IN_MAP_2D) ? norm_info.norm_size() : 1;
-  const unsigned int border_width =
-      (norm_info.is_cross_map()) ? 0 : std::min<unsigned int>(norm_info.norm_size() / 2, 3U);
-  BorderSize border_size = BorderSize(0, border_width);
-  bool window_changed = false;
-
-  // Configure window
-  Window win = calculate_max_window(*input, Steps(num_elems_processed_per_iteration));
-
-  AccessWindowRectangle input_access(input, -border_size.left, 0, num_elems_read_per_iteration,
-                                     num_rows);
-  AccessWindowRectangle input_squared_access(input_squared, -border_size.left, 0,
-                                             num_elems_read_per_iteration, num_rows);
-
-  if (output->total_size() != 0)
-  {
-    AccessWindowHorizontal output_access(output, 0, num_elems_processed_per_iteration);
-    window_changed =
-        update_window_and_padding(win, input_access, input_squared_access, output_access);
-    output_access.set_valid_region(win, input->valid_region());
-  }
-  else
-  {
-    window_changed = update_window_and_padding(win, input_access, input_squared_access);
-  }
-
-  Status err = (window_changed)
-                   ? ARM_COMPUTE_CREATE_ERROR(ErrorCode::RUNTIME_ERROR, "Insufficient Padding!")
-                   : Status{};
-  return std::make_pair(err, win);
-}
-} // namespace
-
-NENormalizationLayerExKernel::NENormalizationLayerExKernel()
-    : _func(nullptr), _input(nullptr), _input_squared(nullptr), _output(nullptr),
-      _norm_info(NormType::IN_MAP_1D), _border_size()
-{
-}
-
-BorderSize NENormalizationLayerExKernel::border_size() const { return _border_size; }
-
-void NENormalizationLayerExKernel::configure(const ITensor *input, const ITensor *input_squared,
-                                             ITensor *output, NormalizationLayerInfo norm_info)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input, input_squared, output);
-  // Output tensor auto initialization if not yet initialized
-  auto_init_if_empty(*output->info(), *input->info());
-
-  // Perform validation step
-  ARM_COMPUTE_ERROR_THROW_ON(
-      validate_arguments(input->info(), input_squared->info(), output->info(), norm_info));
-
-  const unsigned int border_width =
-      (norm_info.is_cross_map()) ? 0 : std::min<unsigned int>(norm_info.norm_size() / 2, 3U);
-
-  _input = input;
-  _input_squared = input_squared;
-  _output = output;
-  _norm_info = norm_info;
-  _border_size = BorderSize(0, border_width);
-
-  switch (_input->info()->data_type())
-  {
-    case DataType::F32:
-    {
-      switch (norm_info.type())
-      {
-        case NormType::IN_MAP_1D:
-          _func = &NENormalizationLayerExKernel::normalize_float<DataType::F32, 0, false>;
-          break;
-        case NormType::IN_MAP_2D:
-          // Normalize over X and Y
-          _func = &NENormalizationLayerExKernel::normalize_float<DataType::F32, 0, true>;
-          break;
-        case NormType::CROSS_MAP:
-          _func = &NENormalizationLayerExKernel::normalize_float<DataType::F32, 2, false>;
-          break;
-        default:
-          break;
-      }
-      break;
-    }
-    case DataType::F16:
-    {
-      switch (norm_info.type())
-      {
-        case NormType::IN_MAP_1D:
-          _func = &NENormalizationLayerExKernel::normalize_float<DataType::F16, 0, false>;
-          break;
-        case NormType::IN_MAP_2D:
-          // Normalize over X and Y
-          _func = &NENormalizationLayerExKernel::normalize_float<DataType::F16, 0, true>;
-          break;
-        case NormType::CROSS_MAP:
-          _func = &NENormalizationLayerExKernel::normalize_float<DataType::F16, 2, false>;
-          break;
-        default:
-          break;
-      }
-      break;
-    }
-    default:
-      ARM_COMPUTE_ERROR("NOT SUPPORTED!");
-  }
-
-  // Configure kernel window
-  auto win_config = validate_and_configure_window(input->info(), input_squared->info(),
-                                                  output->info(), norm_info);
-  ARM_COMPUTE_ERROR_THROW_ON(win_config.first);
-  INEKernel::configure(win_config.second);
-}
-
-template <DataType dt, unsigned int dim, bool do_2D_norm>
-void NENormalizationLayerExKernel::normalize_float(const Window &window)
-{
-  Iterator input(_input, window);
-  Iterator input_squared(_input_squared, window);
-  Iterator output(_output, window);
-
-  const int dim_y = 1;
-  const int radius = _norm_info.norm_size();
-  const int total_size = _input->info()->dimension(dim) - 1;
-  const int input_squared_stride = _input_squared->info()->strides_in_bytes()[dim];
-  // We account padding across X only and we iterate over rows
-  const int min_left = (dim == 2) ? 0 : -static_cast<int>(border_size().left);
-  const int max_right = (dim == 2) ? total_size : total_size + border_size().left;
-  const int min_top = 0;
-  const int max_bottom = _input->info()->dimension(dim_y) - 1;
-
-  if (dt == DataType::F32)
-  {
-    const float32x4_t coeff_vec = vdupq_n_f32(_norm_info.scale_coeff());
-    const float32x4_t beta_vec = vdupq_n_f32(_norm_info.beta());
-    const float32x4_t kappa_vec = vdupq_n_f32(_norm_info.kappa());
-
-    execute_window_loop(
-        window,
-        [&](const Coordinates &id) {
-          // Get range to normalize
-          const int current_row = do_2D_norm ? id[dim_y] : 0;
-          const int current_slice = id[dim];
-          const int first_row = do_2D_norm ? std::max(current_row - radius, min_top) : 0;
-          const int last_row = do_2D_norm ? std::min(current_row + radius, max_bottom) : 0;
-          const int first_slice = std::max(current_slice - radius, min_left);
-          const int last_slice = std::min(current_slice + radius, max_right);
-
-          // Accumulate 2D In-Map values
-          float32x4_t accu = vdupq_n_f32(0.f);
-          for (int j = first_row; j <= last_row; j++)
-          {
-            // Compute row displacement
-            const int row = (j - current_row) * _input_squared->info()->strides_in_bytes()[dim_y];
-            const uint8_t *const input_squared_ptr =
-                input_squared.ptr() + row - (current_slice * input_squared_stride);
-            for (int i = first_slice; i <= last_slice; ++i)
-            {
-              accu = vaddq_f32(accu, vld1q_f32(reinterpret_cast<const float *>(
-                                         input_squared_ptr + i * input_squared_stride)));
-            }
-          }
-
-          // Normalize
-          const float32x4_t normalized = vpowq_f32(vmlaq_f32(kappa_vec, coeff_vec, accu), beta_vec);
-          const float32x4_t normalized_pixel = vmulq_f32(
-              vld1q_f32(reinterpret_cast<const float *>(input.ptr())), vinvq_f32(normalized));
-          vst1q_f32(reinterpret_cast<float *>(output.ptr()), normalized_pixel);
-        },
-        input, input_squared, output);
-  }
-#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
-  else if (dt == DataType::F16)
-  {
-    const float16x8_t coeff_vec = vdupq_n_f16(_norm_info.scale_coeff());
-    const float16x8_t beta_vec_f16 = vdupq_n_f16(_norm_info.beta());
-    const float16x8_t kappa_vec = vdupq_n_f16(_norm_info.kappa());
-
-    execute_window_loop(
-        window,
-        [&](const Coordinates &id) {
-          // Get range to normalize
-          const int current_row = do_2D_norm ? id[dim_y] : 0;
-          const int current_slice = id[dim];
-          const int first_row = do_2D_norm ? std::max(current_row - radius, min_top) : 0;
-          const int last_row = do_2D_norm ? std::min(current_row + radius, max_bottom) : 0;
-          const int first_slice = std::max(current_slice - radius, min_left);
-          const int last_slice = std::min(current_slice + radius, max_right);
-
-          // Accumulate 2D In-Map values
-          float16x8_t accu = vdupq_n_f16(0.f);
-          for (int j = first_row; j <= last_row; j++)
-          {
-            // Compute row displacement
-            const int row = (j - current_row) * _input_squared->info()->strides_in_bytes()[dim_y];
-            const uint8_t *const input_squared_ptr =
-                input_squared.ptr() + row - (current_slice * input_squared_stride);
-            for (int i = first_slice; i <= last_slice; ++i)
-            {
-              accu = vaddq_f16(accu, vld1q_f16(reinterpret_cast<const float16_t *>(
-                                         input_squared_ptr + i * input_squared_stride)));
-            }
-          }
-
-          const float16x8_t norm_f16 =
-              vpowq_f16(vaddq_f16(kappa_vec, vmulq_f16(coeff_vec, accu)), beta_vec_f16);
-          const float16x8_t normalized_pixel = vmulq_f16(
-              vld1q_f16(reinterpret_cast<const float16_t *>(input.ptr())), vinvq_f16(norm_f16));
-          vst1q_f16(reinterpret_cast<float16_t *>(output.ptr()), normalized_pixel);
-        },
-        input, input_squared, output);
-  }
-#endif /* __ARM_FEATURE_FP16_VECTOR_ARITHMETIC */
-  else
-  {
-    ARM_COMPUTE_ERROR("Not supported");
-  }
-}
-
-Status NENormalizationLayerExKernel::validate(const ITensorInfo *input,
-                                              const ITensorInfo *input_squared,
-                                              const ITensorInfo *output,
-                                              const NormalizationLayerInfo norm_info)
-{
-  ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(input, input_squared, output, norm_info));
-  ARM_COMPUTE_RETURN_ON_ERROR(validate_and_configure_window(input->clone().get(),
-                                                            input_squared->clone().get(),
-                                                            output->clone().get(), norm_info)
-                                  .first);
-
-  return Status{};
-}
-
-void NENormalizationLayerExKernel::run(const Window &window, const ThreadInfo &info)
-{
-  ARM_COMPUTE_UNUSED(info);
-  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
-  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(INEKernel::window(), window);
-  ARM_COMPUTE_ERROR_ON(_func == nullptr);
-
-  // Run function
-  (this->*_func)(window);
-}
diff --git a/libs/ARMComputeEx/src/core/UtilsEx.cpp b/libs/ARMComputeEx/src/core/UtilsEx.cpp
deleted file mode 100644
index b63093bbb..000000000
--- a/libs/ARMComputeEx/src/core/UtilsEx.cpp
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/core/UtilsEx.h"
-
-#include <cstdint>
-#include <fstream>
-#include <map>
-#include <string>
-
-using namespace arm_compute;
-
-const std::string &
-arm_compute::string_from_activation_func_ex(ActivationLayerInfoEx::ActivationFunction act)
-{
-  static std::map<ActivationLayerInfoEx::ActivationFunction, const std::string> act_map = {
-      {ActivationLayerInfoEx::ActivationFunction::RSQRT, "RSQRT"},
-  };
-
-  return act_map[act];
-}
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLActivationLayerEx.cpp b/libs/ARMComputeEx/src/runtime/CL/functions/CLActivationLayerEx.cpp
deleted file mode 100644
index 1e52fc429..000000000
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLActivationLayerEx.cpp
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/runtime/CL/functions/CLActivationLayerEx.h"
-
-#include "arm_compute/core/CL/kernels/CLActivationLayerExKernel.h"
-
-using namespace arm_compute;
-
-void CLActivationLayerEx::configure(ICLTensor *input, ICLTensor *output,
-                                    ActivationLayerInfoEx act_info)
-{
-  auto k = arm_compute::support::cpp14::make_unique<CLActivationLayerExKernel>();
-  k->configure(input, output, act_info);
-  _kernel = std::move(k);
-}
-
-Status CLActivationLayerEx::validate(const ITensorInfo *input, const ITensorInfo *output,
-                                     const ActivationLayerInfoEx &act_info)
-{
-  return CLActivationLayerExKernel::validate(input, output, act_info);
-}
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLArgMinMax.cpp b/libs/ARMComputeEx/src/runtime/CL/functions/CLArgMinMax.cpp
deleted file mode 100644
index dff743e89..000000000
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLArgMinMax.cpp
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/runtime/CL/functions/CLArgMinMax.h"
-
-#include "arm_compute/core/CL/kernels/CLArgMinMaxKernel.h"
-#include "arm_compute/runtime/CL/CLScheduler.h"
-
-namespace arm_compute
-{
-
-CLArgMinMax::CLArgMinMax()
-    : _input(nullptr), _output(nullptr), _argminmax_axis(), _interm_tensors(), _argminmax_kernels(),
-      _num_of_kernels()
-{
-}
-
-void CLArgMinMax::configure(ICLTensor *input, ICLTensor *output, std::vector<uint32_t> axis,
-                            ArgOperation op)
-{
-  ARM_COMPUTE_ERROR_THROW_ON(validate(input->info(), output->info(), axis, op));
-  _input = input;
-  _output = output;
-  _argminmax_axis = axis;
-  _arg_op = op;
-  // NOTE The argminmax_axis must have no duplication.
-  _num_of_kernels = axis.size();
-  const size_t num_of_interm_tensors = _num_of_kernels - 1;
-
-  _interm_tensors = arm_compute::support::cpp14::make_unique<CLTensor[]>(num_of_interm_tensors);
-  _argminmax_kernels =
-      arm_compute::support::cpp14::make_unique<CLArgMinMaxKernel[]>(_num_of_kernels);
-
-  TensorShape shape{input->info()->tensor_shape()};
-  for (size_t i = 0; i < num_of_interm_tensors; i++)
-  {
-    shape.set(_argminmax_axis[i], 1);
-    _interm_tensors[i].allocator()->init(
-        TensorInfo(shape, input->info()->num_channels(), input->info()->data_type()));
-    _interm_tensors[i].allocator()->allocate();
-  }
-
-  // Set a vector that is ordered ICLTensors sequentially.
-  std::vector<ICLTensor *> tensors;
-  tensors.emplace_back(input);
-  for (size_t i = 0; i < num_of_interm_tensors; i++)
-  {
-    tensors.emplace_back(_interm_tensors.get() + i);
-  }
-  tensors.emplace_back(output);
-
-  // Apply ArgMinMax on all kernels
-  for (size_t i = 0; i < _num_of_kernels; i++)
-  {
-    _argminmax_kernels[i].configure(tensors[i], tensors[i + 1], _argminmax_axis[i], op);
-  }
-}
-
-Status CLArgMinMax::validate(const ITensorInfo *input, const std::vector<uint32_t> &argminmax_axis,
-                             const ITensorInfo *output, ArgOperation op)
-{
-  const size_t num_of_kernels = argminmax_axis.size();
-  const size_t num_of_interm_tensors = num_of_kernels - 1;
-
-  // Create temporary tensor infos
-  auto interm_tensors =
-      arm_compute::support::cpp14::make_unique<TensorInfo[]>(num_of_interm_tensors);
-
-  // Create intermediate tensor info
-  TensorShape shape{input->tensor_shape()};
-
-  for (size_t i = 0; i < num_of_interm_tensors; i++)
-  {
-    shape.set(argminmax_axis[i], 1);
-    interm_tensors[i].set_data_type(input->data_type());
-    interm_tensors[i].set_tensor_shape(shape);
-    interm_tensors[i].set_num_channels(input->num_channels());
-  }
-
-  // Set a vector that is ordered ITensorInfo sequentially.
-  std::vector<const ITensorInfo *> tensors;
-  tensors.emplace_back(input);
-  for (size_t i = 0; i < num_of_interm_tensors; i++)
-  {
-    tensors.emplace_back(interm_tensors.get() + i);
-  }
-  tensors.emplace_back(output);
-
-  // Validate argminmax only on all kernels
-  for (size_t i = 0; i < num_of_kernels; i++)
-  {
-    ARM_COMPUTE_RETURN_ON_ERROR(
-        CLArgMinMaxKernel::validate(tensors[i], tensors[i + 1], argminmax_axis[i], op));
-  }
-
-  return Status{};
-}
-
-void CLArgMinMax::run()
-{
-  for (size_t i = 0; i < _num_of_kernels; ++i)
-  {
-    CLScheduler::get().enqueue(_argminmax_kernels[i]);
-  }
-}
-
-} // namespace arm_compute
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLArithmeticSubtractionEx.cpp b/libs/ARMComputeEx/src/runtime/CL/functions/CLArithmeticSubtractionEx.cpp
deleted file mode 100644
index 3f403c80a..000000000
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLArithmeticSubtractionEx.cpp
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/runtime/CL/functions/CLArithmeticSubtractionEx.h"
-
-#include "arm_compute/core/CL/ICLTensor.h"
-#include "arm_compute/core/CL/kernels/CLArithmeticSubtractionExKernel.h"
-
-using namespace arm_compute;
-
-void CLArithmeticSubtractionEx::configure(ICLTensor *input1, ICLTensor *input2, ICLTensor *output,
-                                          ConvertPolicy policy)
-{
-  auto k = arm_compute::support::cpp14::make_unique<CLArithmeticSubtractionExKernel>();
-  k->configure(input1, input2, output, policy);
-  _kernel = std::move(k);
-
-  if (output->info()->dimension(0) > 1)
-  {
-    ICLTensor *broadcasted_info = (input1->info()->dimension(0) == 1) ? input1 : input2;
-
-    if (broadcasted_info->info()->dimension(0) == 1)
-    {
-      _border_handler.configure(broadcasted_info, _kernel->border_size(), BorderMode::REPLICATE);
-    }
-  }
-}
-
-Status CLArithmeticSubtractionEx::validate(const ITensorInfo *input1, const ITensorInfo *input2,
-                                           const ITensorInfo *output, ConvertPolicy policy)
-{
-  return CLArithmeticSubtractionExKernel::validate(input1, input2, output, policy);
-}
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLBatchToSpaceND.cpp b/libs/ARMComputeEx/src/runtime/CL/functions/CLBatchToSpaceND.cpp
deleted file mode 100644
index 26e3798cc..000000000
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLBatchToSpaceND.cpp
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/runtime/CL/functions/CLBatchToSpaceND.h"
-
-#include "arm_compute/core/CL/kernels/CLBatchToSpaceNDKernel.h"
-
-using namespace arm_compute;
-
-void CLBatchToSpaceND::configure(ICLTensor *input, ICLTensor *output, const int32_t *block_size)
-{
-  auto k = arm_compute::support::cpp14::make_unique<CLBatchToSpaceNDKernel>();
-  k->configure(input, output, block_size);
-  _kernel = std::move(k);
-}
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLComparisonOp.cpp b/libs/ARMComputeEx/src/runtime/CL/functions/CLComparisonOp.cpp
deleted file mode 100644
index f6a745a25..000000000
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLComparisonOp.cpp
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/runtime/CL/functions/CLComparisonOp.h"
-
-#include "arm_compute/core/CL/kernels/CLComparisonOpKernel.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-void CLComparisonOp::configure(ICLTensor *input1, ICLTensor *input2, ICLTensor *output,
-                               const ComparisonOperation &op)
-{
-  auto k = arm_compute::support::cpp14::make_unique<CLComparisonOpKernel>();
-  k->configure(input1, input2, output, op);
-  _kernel = std::move(k);
-
-  if (output->info()->dimension(0) > 1)
-  {
-    ICLTensor *broadcasted_info = (input1->info()->dimension(0) == 1) ? input1 : input2;
-
-    if (broadcasted_info->info()->dimension(0) == 1)
-    {
-      _border_handler.configure(broadcasted_info, _kernel->border_size(), BorderMode::REPLICATE);
-    }
-  }
-}
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLExp.cpp b/libs/ARMComputeEx/src/runtime/CL/functions/CLExp.cpp
deleted file mode 100644
index 411fa8700..000000000
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLExp.cpp
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/runtime/CL/functions/CLExp.h"
-
-#include "arm_compute/core/CL/kernels/CLExpKernel.h"
-
-using namespace arm_compute;
-
-void CLExp::configure(const ICLTensor *input, ICLTensor *output)
-{
-  auto k = arm_compute::support::cpp14::make_unique<CLExpKernel>();
-  k->configure(input, output);
-  _kernel = std::move(k);
-}
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLGather.cpp b/libs/ARMComputeEx/src/runtime/CL/functions/CLGather.cpp
deleted file mode 100644
index fb056fe45..000000000
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLGather.cpp
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/runtime/CL/functions/CLGather.h"
-
-#include "arm_compute/core/CL/kernels/CLGatherKernel.h"
-
-using namespace arm_compute;
-
-void CLGather::configure(ICLTensor *input1, ICLTensor *input2, ICLTensor *output)
-{
-  auto k = arm_compute::support::cpp14::make_unique<CLGatherKernel>();
-  k->configure(input1, input2, output);
-  _kernel = std::move(k);
-}
-
-Status CLGather::validate(const ITensorInfo *input1, const ITensorInfo *input2,
-                          const ITensorInfo *output)
-{
-  return CLGatherKernel::validate(input1, input2, output);
-}
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLNormalizationLayerEx.cpp b/libs/ARMComputeEx/src/runtime/CL/functions/CLNormalizationLayerEx.cpp
deleted file mode 100644
index 276c4557a..000000000
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLNormalizationLayerEx.cpp
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/runtime/CL/functions/CLNormalizationLayerEx.h"
-
-#include "arm_compute/runtime/CL/CLScheduler.h"
-
-using namespace arm_compute;
-
-CLNormalizationLayerEx::CLNormalizationLayerEx() : _norm_kernel(), _border_handler() {}
-
-void CLNormalizationLayerEx::configure(ICLTensor *input, ICLTensor *output,
-                                       const NormalizationLayerInfo &norm_info)
-{
-  ARM_COMPUTE_ERROR_ON(input == nullptr);
-
-  // Configure normalization kernel
-  _norm_kernel.configure(input, output, norm_info);
-
-  // Fill the border by 3 elements since we need vload4 in the IN_MAP normalization kernel
-  _border_handler.configure(input, _norm_kernel.border_size(), BorderMode::CONSTANT, PixelValue(0));
-}
-
-Status CLNormalizationLayerEx::validate(const ITensorInfo *input, const ITensorInfo *output,
-                                        const NormalizationLayerInfo &norm_info)
-{
-  return CLNormalizationLayerExKernel::validate(input, output, norm_info);
-}
-
-void CLNormalizationLayerEx::run()
-{
-  // Run border handler
-  CLScheduler::get().enqueue(_border_handler, false);
-
-  // Run normalization kernel
-  CLScheduler::get().enqueue(_norm_kernel);
-}
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLPadLayerEx.cpp b/libs/ARMComputeEx/src/runtime/CL/functions/CLPadLayerEx.cpp
deleted file mode 100644
index 5265b6c34..000000000
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLPadLayerEx.cpp
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
-* Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
-* Copyright (c) 2016-2018 ARM Limited.
-*
-* Licensed under the Apache License, Version 2.0 (the "License");
-* you may not use this file except in compliance with the License.
-* You may obtain a copy of the License at
-*
-*      http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing, software
-* distributed under the License is distributed on an "AS IS" BASIS,
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-* See the License for the specific language governing permissions and
-* limitations under the License.
-*/
-#include "arm_compute/runtime/CL/functions/CLPadLayerEx.h"
-
-#include "arm_compute/core/CL/kernels/CLPadLayerKernel.h"
-
-using namespace arm_compute;
-
-void CLPadLayerEx::configure(ICLTensor *input, ICLTensor *output, ICLTensor *pad_size)
-{
-  auto k = arm_compute::support::cpp14::make_unique<CLPadLayerKernel>();
-  k->configure(input, output, pad_size);
-  _kernel = std::move(k);
-}
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLPermuteEx.cpp b/libs/ARMComputeEx/src/runtime/CL/functions/CLPermuteEx.cpp
deleted file mode 100644
index fb363270d..000000000
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLPermuteEx.cpp
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/runtime/CL/functions/CLPermuteEx.h"
-
-#include "arm_compute/core/CL/kernels/CLPermuteExKernel.h"
-
-using namespace arm_compute;
-
-void CLPermuteEx::configure(const ICLTensor *input, ICLTensor *output,
-                            const PermutationVector &perm)
-{
-  auto k = arm_compute::support::cpp14::make_unique<CLPermuteExKernel>();
-  k->configure(input, output, perm);
-  _kernel = std::move(k);
-}
-
-Status CLPermuteEx::validate(const ITensorInfo *input, const ITensorInfo *output,
-                             const PermutationVector &perm)
-{
-  ARM_COMPUTE_RETURN_ON_ERROR(CLPermuteExKernel::validate(input, output, perm));
-  return Status{};
-}
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLPixelWiseDivision.cpp b/libs/ARMComputeEx/src/runtime/CL/functions/CLPixelWiseDivision.cpp
deleted file mode 100644
index dc0baa8dd..000000000
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLPixelWiseDivision.cpp
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/runtime/CL/functions/CLPixelWiseDivision.h"
-
-#include "arm_compute/core/CL/ICLTensor.h"
-#include "arm_compute/core/CL/kernels/CLPixelWiseDivisionKernel.h"
-
-using namespace arm_compute;
-
-void CLPixelWiseDivision::configure(ICLTensor *input1, ICLTensor *input2, ICLTensor *output,
-                                    float scale, ConvertPolicy overflow_policy,
-                                    RoundingPolicy rounding_policy)
-{
-  auto k = arm_compute::support::cpp14::make_unique<CLPixelWiseDivisionKernel>();
-  k->configure(input1, input2, output, scale, overflow_policy, rounding_policy);
-  _kernel = std::move(k);
-
-  if (output->info()->dimension(0) > 1)
-  {
-    ICLTensor *broadcasted_info = (input1->info()->dimension(0) == 1) ? input1 : input2;
-
-    if (broadcasted_info->info()->dimension(0) == 1)
-    {
-      _border_handler.configure(broadcasted_info, _kernel->border_size(), BorderMode::REPLICATE);
-    }
-  }
-}
-
-Status CLPixelWiseDivision::validate(const ITensorInfo *input1, const ITensorInfo *input2,
-                                     const ITensorInfo *output, float scale,
-                                     ConvertPolicy overflow_policy, RoundingPolicy rounding_policy)
-{
-  return CLPixelWiseDivisionKernel::validate(input1, input2, output, scale, overflow_policy,
-                                             rounding_policy);
-}
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLReduceOperation.cpp b/libs/ARMComputeEx/src/runtime/CL/functions/CLReduceOperation.cpp
deleted file mode 100644
index 2b8d82706..000000000
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLReduceOperation.cpp
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/runtime/CL/functions/CLReduceOperation.h"
-
-#include "arm_compute/core/CL/kernels/CLReduceOperationKernel.h"
-#include "arm_compute/runtime/CL/CLScheduler.h"
-
-using namespace arm_compute;
-
-CLReduceOperation::CLReduceOperation()
-    : _input(nullptr), _output(nullptr), _axis(), _interm_tensors(), _reduce_kernels()
-{
-}
-
-Status CLReduceOperation::validate(const ITensorInfo *input, const ITensorInfo *output,
-                                   const std::set<uint32_t> &axis, const ReduceOperation &op)
-{
-  const size_t num_of_kernels = axis.size();
-  const size_t num_of_interm_tensors = num_of_kernels - 1;
-
-  // Create temporary tensor infos
-  auto interm_tensors =
-      arm_compute::support::cpp14::make_unique<TensorInfo[]>(num_of_interm_tensors);
-
-  // Create intermediate tensor info
-  TensorShape shape{input->tensor_shape()};
-
-  auto it = axis.begin();
-  for (size_t i = 0; i < num_of_interm_tensors; ++i, ++it)
-  {
-    shape.set(*it, 1);
-    interm_tensors[i].set_data_type(input->data_type());
-    interm_tensors[i].set_tensor_shape(shape);
-    interm_tensors[i].set_num_channels(input->num_channels());
-  }
-
-  // Set a vector that is ordered ITensorInfo sequentially.
-  std::vector<const ITensorInfo *> tensors;
-  tensors.emplace_back(input);
-  for (size_t i = 0; i < num_of_interm_tensors; ++i)
-  {
-    tensors.emplace_back(interm_tensors.get() + i);
-  }
-  tensors.emplace_back(output);
-
-  // Validate ReduceOperation only on all kernels
-  it = axis.begin();
-  for (size_t i = 0; i < num_of_kernels; ++i, ++it)
-  {
-    ARM_COMPUTE_RETURN_ON_ERROR(
-        CLReduceOperationKernel::validate(tensors[i], tensors[i + 1], *it, op));
-  }
-
-  return Status{};
-}
-
-void CLReduceOperation::configure(ICLTensor *input, ICLTensor *output,
-                                  const std::set<uint32_t> &axis, ReduceOperation op)
-{
-  ARM_COMPUTE_ERROR_THROW_ON(validate(input->info(), output->info(), axis, op));
-
-  _axis = axis;
-
-  _input = input;
-  _output = output;
-
-  // NOTE The axis must have no duplication.
-  const size_t num_of_kernels = axis.size();
-  const size_t num_of_interm_tensors = num_of_kernels - 1;
-
-  _interm_tensors = arm_compute::support::cpp14::make_unique<CLTensor[]>(num_of_interm_tensors);
-  _reduce_kernels =
-      arm_compute::support::cpp14::make_unique<CLReduceOperationKernel[]>(num_of_kernels);
-
-  TensorShape shape{input->info()->tensor_shape()};
-  auto it = axis.begin();
-  for (size_t i = 0; i < num_of_interm_tensors; ++i, ++it)
-  {
-    shape.set(*it, 1);
-    _interm_tensors[i].allocator()->init(
-        TensorInfo(shape, input->info()->num_channels(), input->info()->data_type()));
-    _interm_tensors[i].allocator()->allocate();
-  }
-
-  // Set a vector that is ordered ICLTensors sequentially.
-  std::vector<ICLTensor *> tensors;
-  tensors.emplace_back(input);
-  for (size_t i = 0; i < num_of_interm_tensors; ++i)
-  {
-    tensors.emplace_back(_interm_tensors.get() + i);
-  }
-  tensors.emplace_back(output);
-
-  // Apply ReduceOperation on all kernels
-  it = axis.begin();
-  for (size_t i = 0; i < num_of_kernels; ++i, ++it)
-  {
-    _reduce_kernels[i].configure(tensors[i], tensors[i + 1], *it, op);
-  }
-}
-
-void CLReduceOperation::run()
-{
-  const size_t num_of_kernels = _axis.size();
-  for (size_t i = 0; i < num_of_kernels; ++i)
-  {
-    CLScheduler::get().enqueue(_reduce_kernels[i]);
-  }
-}
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLSquaredDifference.cpp b/libs/ARMComputeEx/src/runtime/CL/functions/CLSquaredDifference.cpp
deleted file mode 100644
index dc6e4af44..000000000
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLSquaredDifference.cpp
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/runtime/CL/functions/CLSquaredDifference.h"
-
-#include "arm_compute/core/CL/kernels/CLSquaredDifferenceKernel.h"
-#include "arm_compute/core/CL/ICLTensor.h"
-
-using namespace arm_compute;
-
-void CLSquaredDifference::configure(ICLTensor *input1, ICLTensor *input2, ICLTensor *output)
-{
-  auto k = arm_compute::support::cpp14::make_unique<CLSquaredDifferenceKernel>();
-  k->configure(input1, input2, output);
-  _kernel = std::move(k);
-
-  if (output->info()->dimension(0) > 1)
-  {
-    ICLTensor *broadcasted_info = (input1->info()->dimension(0) == 1) ? input1 : input2;
-
-    if (broadcasted_info->info()->dimension(0) == 1)
-    {
-      _border_handler.configure(broadcasted_info, _kernel->border_size(), BorderMode::REPLICATE);
-    }
-  }
-}
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLStridedSliceEx.cpp b/libs/ARMComputeEx/src/runtime/CL/functions/CLStridedSliceEx.cpp
deleted file mode 100644
index be7353493..000000000
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLStridedSliceEx.cpp
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2017 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/runtime/CL/functions/CLStridedSliceEx.h"
-
-#include "arm_compute/core/CL/kernels/CLStridedSliceExKernel.h"
-
-using namespace arm_compute;
-
-void CLStridedSliceEx::configure(const ICLTensor *input, ICLTensor *output, ICLTensor *beginData,
-                                 ICLTensor *endData, ICLTensor *stridesData, int32_t beginMask,
-                                 int32_t endMask, int32_t shrinkAxisMask)
-{
-  auto k = arm_compute::support::cpp14::make_unique<CLStridedSliceExKernel>();
-  k->configure(input, output, beginData, endData, stridesData, beginMask, endMask, shrinkAxisMask);
-  _kernel = std::move(k);
-}
diff --git a/libs/ARMComputeEx/src/runtime/NEON/functions/NENormalizationLayerEx.cpp b/libs/ARMComputeEx/src/runtime/NEON/functions/NENormalizationLayerEx.cpp
deleted file mode 100644
index 988e92715..000000000
--- a/libs/ARMComputeEx/src/runtime/NEON/functions/NENormalizationLayerEx.cpp
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (c) 2016-2018 ARM Limited.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "arm_compute/runtime/NEON/functions/NENormalizationLayerEx.h"
-#include "arm_compute/runtime/NEON/NEScheduler.h"
-
-using namespace arm_compute;
-
-NENormalizationLayerEx::NENormalizationLayerEx(std::shared_ptr<IMemoryManager> memory_manager)
-    : _memory_group(std::move(memory_manager)), _norm_kernel(), _multiply_kernel(),
-      _border_handler(), _input_squared()
-{
-}
-
-void NENormalizationLayerEx::configure(const ITensor *input, ITensor *output,
-                                       const NormalizationLayerInfo &norm_info)
-{
-  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
-
-  TensorInfo tensor_info(input->info()->tensor_shape(), 1, input->info()->data_type(),
-                         input->info()->quantization_info());
-  _input_squared.allocator()->init(tensor_info);
-
-  // Manage intermediate buffers
-  _memory_group.manage(&_input_squared);
-
-  // Configure kernels
-  _norm_kernel.configure(input, &_input_squared, output, norm_info);
-  _multiply_kernel.configure(input, input, &_input_squared, 1.0f, ConvertPolicy::SATURATE,
-                             RoundingPolicy::TO_ZERO);
-  _border_handler.configure(&_input_squared, _norm_kernel.border_size(), BorderMode::CONSTANT,
-                            PixelValue(0.0f));
-
-  // Allocate the tensor once the configure methods have been called
-  _input_squared.allocator()->allocate();
-}
-
-Status NENormalizationLayerEx::validate(const ITensorInfo *input, const ITensorInfo *output,
-                                        const NormalizationLayerInfo &norm_info)
-{
-  // Perform validation step
-  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, output);
-
-  ARM_COMPUTE_RETURN_ON_ERROR(
-      NENormalizationLayerExKernel::validate(input, input, output, norm_info));
-  ARM_COMPUTE_RETURN_ON_ERROR(NEPixelWiseMultiplicationKernel::validate(
-      input, input, output, 1.0f, ConvertPolicy::SATURATE, RoundingPolicy::TO_ZERO));
-
-  return Status{};
-}
-
-void NENormalizationLayerEx::run()
-{
-  _memory_group.acquire();
-
-  NEScheduler::get().schedule(&_multiply_kernel, Window::DimY);
-  NEScheduler::get().schedule(&_border_handler, Window::DimY);
-  NEScheduler::get().schedule(&_norm_kernel, Window::DimY);
-
-  _memory_group.release();
-}
diff --git a/libs/cpp14/include/cpp14/memory.h b/libs/cpp14/include/cpp14/memory.h
deleted file mode 100644
index b3e678baa..000000000
--- a/libs/cpp14/include/cpp14/memory.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/**
- * @file memory.h
- * @ingroup COM_AI_RUNTIME
- * @brief This file contains @c make_unique which is not supported by C++11
- */
-#ifndef __NNFW_CPP14_MEMORY_H__
-#define __NNFW_CPP14_MEMORY_H__
-
-#include <memory>
-
-namespace nnfw
-{
-namespace cpp14
-{
-/**
- * @brief Provide @c make_unique function supported from C++14
- * @param[in] args    List of arguments with which an instance of T will be constructed.
- * @return @c std::unique_ptr of an instance of type T
- */
-template <typename T, typename... Args> std::unique_ptr<T> make_unique(Args &&... args)
-{
-  // NOTE std::make_unique is missing in C++11 standard
-  return std::unique_ptr<T>(new T(std::forward<Args>(args)...));
-}
-
-} // napesapce cpp14
-} // namespace nnfw
-
-#endif // __NNFW_CPP14_MEMORY_H__
diff --git a/libs/misc/CMakeLists.txt b/libs/misc/CMakeLists.txt
deleted file mode 100644
index cd01695fb..000000000
--- a/libs/misc/CMakeLists.txt
+++ /dev/null
@@ -1,13 +0,0 @@
-# Library `nnfw_lib_misc`
-set(NNFW_UTILITY_SRCS src/environment.cpp)
-list(APPEND NNFW_UTILITY_SRCS src/tensor/Shape.cpp)
-list(APPEND NNFW_UTILITY_SRCS src/tensor/NonIncreasingStride.cpp)
-list(APPEND NNFW_UTILITY_SRCS src/tensor/IndexFormatter.cpp)
-list(APPEND NNFW_UTILITY_SRCS src/tensor/Comparator.cpp)
-
-add_library(nnfw_lib_misc STATIC ${NNFW_UTILITY_SRCS})
-target_include_directories(nnfw_lib_misc PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/include)
-set_target_properties(nnfw_lib_misc PROPERTIES POSITION_INDEPENDENT_CODE ON)
-
-add_executable(nnfw_tensor_index_iterator "examples/tensor_index_iterator.cpp")
-target_link_libraries(nnfw_tensor_index_iterator nnfw_lib_misc)
diff --git a/libs/misc/examples/tensor_index_iterator.cpp b/libs/misc/examples/tensor_index_iterator.cpp
deleted file mode 100644
index 8a19dac87..000000000
--- a/libs/misc/examples/tensor_index_iterator.cpp
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "misc/tensor/IndexIterator.h"
-
-#include <array>
-
-#include <iostream>
-#include <algorithm>
-
-#include <cassert>
-
-void test_iterate(void)
-{
-  const nnfw::misc::tensor::Shape shape{3, 4, 7};
-
-  std::array<int, 3 * 4 * 7> array;
-
-  array.fill(0);
-
-  using nnfw::misc::tensor::iterate;
-  using nnfw::misc::tensor::Index;
-
-  iterate(shape) << [&](const Index &index) {
-    assert(index.rank() == shape.rank());
-
-    const size_t rank = index.rank();
-
-    uint32_t offset = index.at(0);
-
-    for (size_t axis = 1; axis < rank; ++axis)
-    {
-      offset *= shape.dim(axis);
-      offset += index.at(axis);
-    }
-
-    array[offset] += 1;
-  };
-
-  assert(std::all_of(array.begin(), array.end(), [](int num) { return num == 1; }));
-}
-
-int main(int argc, char **argv)
-{
-  test_iterate();
-
-  nnfw::misc::tensor::Shape shape{3, 4, 3, 4};
-
-  std::cout << "Iterate over tensor{3, 4, 3, 4}" << std::endl;
-
-  nnfw::misc::tensor::iterate(shape) << [](const nnfw::misc::tensor::Index &index) {
-    std::cout << "rank: " << index.rank() << std::endl;
-
-    for (size_t d = 0; d < index.rank(); ++d)
-    {
-      std::cout << "  offset(" << d << ") = " << index.at(d) << std::endl;
-    }
-  };
-
-  return 0;
-}
diff --git a/libs/misc/include/misc/EnvVar.h b/libs/misc/include/misc/EnvVar.h
deleted file mode 100644
index 47206d4c0..000000000
--- a/libs/misc/include/misc/EnvVar.h
+++ /dev/null
@@ -1,107 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file EnvVar.h
- * @ingroup COM_AI_RUNTIME
- * @brief This file contains nnfw::misc::EnvVar class
- */
-
-#ifndef __NNFW_MISC_ENV_VAR__
-#define __NNFW_MISC_ENV_VAR__
-
-#include <algorithm>
-#include <array>
-#include <cstdlib>
-#include <string>
-
-namespace nnfw
-{
-namespace misc
-{
-/**
- * @brief Class to access environment variable
- */
-class EnvVar
-{
-public:
-  /**
-   * @brief Construct a new EnvVar object
-   * @param[in] key   environment variable
-   */
-  EnvVar(const std::string &key)
-  {
-    const char *value = std::getenv(key.c_str());
-    if (value == nullptr)
-    {
-      // An empty string is considered as an empty value
-      _value = "";
-    }
-    else
-    {
-      _value = value;
-    }
-  }
-
-  /**
-   * @brief Get environment variable of string type
-   * @param[in] def   Default value of environment variable
-   * @return Defaut value passed as a parameter when there is no environment variable,
-   *         otherwise the value of environment variable passed into constructor
-   */
-  std::string asString(const std::string &def) const
-  {
-    if (_value.empty())
-      return def;
-    return _value;
-  }
-
-  /**
-   * @brief Get environment variable of boolean type
-   * @param[in] def   Default value of environment variable
-   * @return Defaut value passed as a parameter when there is no environment variable,
-   *         otherwise the value of environment variable passed into constructor
-   */
-  bool asBool(bool def) const
-  {
-    if (_value.empty())
-      return def;
-    static const std::array<std::string, 5> false_list{"0", "OFF", "FALSE", "N", "NO"};
-    auto false_found = std::find(false_list.begin(), false_list.end(), _value);
-    return (false_found == false_list.end());
-  }
-
-  /**
-   * @brief Get environment variable of int type
-   * @param[in] def   Default value of environment variable
-   * @return Defaut value passed as a parameter when there is no environment variable,
-   *         otherwise the value of environment variable passed into constructor
-   */
-  int asInt(int def) const
-  {
-    if (_value.empty())
-      return def;
-    return std::stoi(_value);
-  }
-
-private:
-  std::string _value;
-};
-
-} // namespace misc
-} // namespace nnfw
-
-#endif // __NNFW_MISC_ENV_VAR__
diff --git a/libs/misc/include/misc/environment.h b/libs/misc/include/misc/environment.h
deleted file mode 100644
index 8e6bd00d5..000000000
--- a/libs/misc/include/misc/environment.h
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file environment.h
- * @ingroup COM_AI_RUNTIME
- * @brief This file contains utility functions and classes to access environment variables
- */
-
-#ifndef __UTIL_ENVIRONMENT_H__
-#define __UTIL_ENVIRONMENT_H__
-
-namespace nnfw
-{
-namespace misc
-{
-
-/**
- * @brief Get the environment variable of int type
- * @param[in] name            Name of the environment variable
- * @param[in] defaultValue    Default value when the value of environment variable does not exist
- * @return  The int value of the environment variable
- */
-int get_env_int(const char *name, int defaultValue = 0);
-
-/**
- * @brief Get the environment variable of bool type
- * @param[in] name            Name of the environment variable
- * @param[in] defaultValue    Default value when the value of environment variable does not exist
- * @return  @c 0 if the value of the environment variable is @c "0", @c 1 in case of other number
- */
-bool get_env_bool(const char *name, bool defaultValue = false);
-}
-}
-
-#include <string>
-
-namespace nnfw
-{
-namespace misc
-{
-namespace env
-{
-/**
- * @brief Parent struct of @ref IntAccessor and @ref FloatAccessor
- * @tparam T Type of the value of environment variable
- */
-template <typename T> struct Accessor
-{
-  /**
-   * @brief Destroy the Accessor object
-   */
-  virtual ~Accessor() = default;
-  /**
-   * @brief Read the value of environment variable
-   * @param[out] out    The value of environment variable
-   * @return     @c true if accessing environment variable is successful,
-   *             @c false if there is exist no such environment variable
-   */
-  virtual bool access(T &out) const = 0;
-};
-
-/**
- * @brief Class to read int environment variable
- */
-class IntAccessor : public Accessor<int>
-{
-public:
-  /**
-   * @brief Construct a new IntAccessor object
-   * @param[in] tag     Name of environment variable
-   */
-  IntAccessor(const std::string &tag);
-
-public:
-  /**
-   * @brief Read the value of environment variable
-   * @param[out] out    The value of environment variable
-   * @return     @c true if accessing environment variable is successful,
-   *             @c false if there is exist no such environment variable
-   */
-  bool access(int &out) const override;
-
-private:
-  std::string _tag;
-};
-
-/**
- * @brief Class to read float environment variable
- */
-class FloatAccessor : public Accessor<float>
-{
-public:
-  /**
-   * @brief Construct a new FloatAccessor object
-   * @param[in] tag     Name of environment variable
-   */
-  FloatAccessor(const std::string &tag);
-
-public:
-  /**
-   * @brief Read the value of environment variable
-   * @param[out] out    The value of environment variable
-   * @return     @c true if accessing environment variable is successful,
-   *             @c false if there is exist no such environment variable
-   */
-  bool access(float &out) const override;
-
-private:
-  std::string _tag;
-};
-
-} // namespace env
-} // namespace misc
-} // namespace nnfw
-
-#endif // __UTIL_ENVIRONMENT_H__
diff --git a/libs/misc/include/misc/kernel/RandomObject.h b/libs/misc/include/misc/kernel/RandomObject.h
deleted file mode 100644
index 4b58b0c7f..000000000
--- a/libs/misc/include/misc/kernel/RandomObject.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file     RandomObject.h
- * @brief    This file contains RandomObject class
- * @ingroup  COM_AI_RUNTIME
- */
-
-#ifndef __NNFW_MISC_KERNEL_RANDOM_OBJECT_H__
-#define __NNFW_MISC_KERNEL_RANDOM_OBJECT_H__
-
-#include "misc/kernel/Shape.h"
-#include "misc/kernel/Reader.h"
-
-#include <vector>
-
-namespace nnfw
-{
-namespace misc
-{
-namespace kernel
-{
-
-template <typename T> class RandomObject final : public Reader<T>
-{
-public:
-  RandomObject(const Shape &shape) : _shape{shape}
-  {
-    const uint32_t size = _shape.N * _shape.C * _shape.H * _shape.W;
-
-    // TODO Use random number
-    for (uint32_t off = 0; off < size; ++off)
-    {
-      _value.emplace_back(static_cast<float>(off));
-    }
-  }
-
-public:
-  const Shape &shape(void) const { return _shape; }
-
-public:
-  T at(uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) const override
-  {
-    uint32_t index = 0;
-
-    index += nth * _shape.C * _shape.H * _shape.W;
-    index += ch * _shape.H * _shape.W;
-    index += row * _shape.W;
-    index += col;
-
-    return _value.at(index);
-  }
-
-private:
-  const Shape _shape;
-  std::vector<T> _value;
-};
-
-} // namespace kernel
-} // namespace misc
-} // namespace nnfw
-
-#endif // __NNFW_MISC_KERNEL_RANDOM_OBJECT_H__
diff --git a/libs/misc/include/misc/tensor/Index.h b/libs/misc/include/misc/tensor/Index.h
deleted file mode 100644
index a08d7099e..000000000
--- a/libs/misc/include/misc/tensor/Index.h
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file Index.h
- * @ingroup COM_AI_RUNTIME
- * @brief This file contains nnfw::misc::tensor::Index struct
- */
-#ifndef __NNFW_MISC_TENSOR_INDEX_H__
-#define __NNFW_MISC_TENSOR_INDEX_H__
-
-#include <cstdint>
-#include <cstddef>
-
-#include <vector>
-#include <initializer_list>
-
-namespace nnfw
-{
-namespace misc
-{
-namespace tensor
-{
-
-/**
- * @brief Struct to represent index of each dimension of a tensor
- */
-struct Index
-{
-public:
-  /**
-   * @brief Construct a new @c Index object
-   * @param[in] rank    Rank of a tensor
-   */
-  Index(size_t rank) { _offsets.resize(rank); }
-
-public:
-  /**
-   * @brief Construct a new @c Index object
-   * @param[in] offsets    Rank of a tensor of @c std::initializer_list<int32_t> type
-   */
-  Index(std::initializer_list<int32_t> offsets) : _offsets{offsets}
-  {
-    // DO NOTHING
-  }
-
-public:
-  /**
-   * @brief Get the rank
-   * @return Rank that this @c Index object can handle
-   */
-  size_t rank(void) const { return _offsets.size(); }
-
-public:
-  /**
-   * @brief Get the index n'th dimension
-   * @param[in] n   Dimension
-   * @return index of n'th dimension
-   */
-  int32_t at(size_t n) const { return _offsets.at(n); }
-
-  /**
-   * @brief Get the reference of the index n'th dimension
-   * @param[in] n   Dimension
-   * @return reference of index of n'th dimension
-   */
-  int32_t &at(size_t n) { return _offsets.at(n); }
-
-private:
-  std::vector<int32_t> _offsets;
-};
-
-/**
- * @brief Copy an @c Index with reversed order
- * @param[in] origin    @c Index object to copy
- * @return  an @c Index object with reversed order
- * @note    This is used to convert NNAPI tensor index to ARM tensor index or vice versa
- */
-inline static Index copy_reverse(const Index &origin)
-{
-  size_t rank = origin.rank();
-  Index target(rank);
-  for (int i = 0; i < rank; i++)
-    target.at(i) = origin.at(rank - 1 - i);
-  return target;
-}
-
-} // namespace tensor
-} // namespace misc
-} // namespace nnfw
-
-#endif // __NNFW_MISC_TENSOR_INDEX_H__
diff --git a/libs/misc/include/misc/tensor/IndexEnumerator.h b/libs/misc/include/misc/tensor/IndexEnumerator.h
deleted file mode 100644
index 4912ea289..000000000
--- a/libs/misc/include/misc/tensor/IndexEnumerator.h
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file IndexEnumerator.h
- * @ingroup COM_AI_RUNTIME
- * @brief This file contains nnfw::misc::tensor::IndexEnumerator class
- */
-
-#ifndef __NNFW_MISC_TENSOR_INDEX_ENUMERATOR_H__
-#define __NNFW_MISC_TENSOR_INDEX_ENUMERATOR_H__
-
-#include "misc/tensor/Shape.h"
-#include "misc/tensor/Index.h"
-
-namespace nnfw
-{
-namespace misc
-{
-namespace tensor
-{
-/**
- * @brief Class to enumerate index of a tensor
- *
- */
-class IndexEnumerator
-{
-public:
-  /**
-   * @brief Construct a new @c IndexEnumerator object
-   * @param[in] shape   Shape of tensor of which index will be enumerate
-   */
-  explicit IndexEnumerator(const Shape &shape) : _shape(shape), _index(shape.rank()), _cursor(0)
-  {
-    const size_t rank = _shape.rank();
-
-    for (size_t axis = 0; axis < rank; ++axis)
-    {
-      _index.at(axis) = 0;
-    }
-
-    for (_cursor = 0; _cursor < rank; ++_cursor)
-    {
-      if (_index.at(_cursor) < _shape.dim(_cursor))
-      {
-        break;
-      }
-    }
-  }
-
-public:
-  /**
-   * @brief Prevent constructing @c IndexEnumerator object by using R-value reference
-   */
-  IndexEnumerator(IndexEnumerator &&) = delete;
-  /**
-   * @brief Prevent copy constructor
-   */
-  IndexEnumerator(const IndexEnumerator &) = delete;
-
-public:
-  /**
-   * @brief Check if more enumeration is available
-   * @return @c true if more @c advance() is available, otherwise @c false
-   */
-  bool valid(void) const { return _cursor < _shape.rank(); }
-
-public:
-  /**
-   * @brief Get the current index to enumerate
-   * @return Current index
-   */
-  const Index &curr(void) const { return _index; }
-
-public:
-  /**
-   * @brief Advance index by +1
-   */
-  void advance(void)
-  {
-    const size_t rank = _shape.rank();
-
-    // Find axis to be updated
-    while ((_cursor < rank) && !(_index.at(_cursor) + 1 < _shape.dim(_cursor)))
-    {
-      ++_cursor;
-    }
-
-    if (_cursor == rank)
-    {
-      return;
-    }
-
-    // Update index
-    _index.at(_cursor) += 1;
-
-    for (size_t axis = 0; axis < _cursor; ++axis)
-    {
-      _index.at(axis) = 0;
-    }
-
-    // Update cursor
-    _cursor = 0;
-  }
-
-public:
-  const Shape _shape; //!< Shape to enumerate
-
-private:
-  size_t _cursor;
-  Index _index;
-};
-
-} // namespace tensor
-} // namespace misc
-} // namespace nnfw
-
-#endif // __NNFW_MISC_TENSOR_INDEX_ENUMERATOR_H__
diff --git a/libs/misc/include/misc/tensor/Shape.h b/libs/misc/include/misc/tensor/Shape.h
deleted file mode 100644
index 6e6c23502..000000000
--- a/libs/misc/include/misc/tensor/Shape.h
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file Shape.h
- * @ingroup COM_AI_RUNTIME
- * @brief This file contains nnfw::misc::tensor::Shape class
- */
-
-#ifndef __NNFW_MISC_TENSOR_SHAPE_H__
-#define __NNFW_MISC_TENSOR_SHAPE_H__
-
-#include <cstdint>
-#include <cstddef>
-#include <deque>
-#include <initializer_list>
-#include <ostream>
-#include <string>
-
-namespace nnfw
-{
-namespace misc
-{
-namespace tensor
-{
-
-/**
- * @brief Class to represent shape of a tensor
- */
-class Shape
-{
-public:
-  /**
-   * @brief Construct a new Shape object
-   * @param[in] rank    Rank of a tensor
-   */
-  Shape(size_t rank) { _dimensions.resize(rank); }
-
-public:
-  /**
-   * @brief Construct a new Shape object
-   * @param[in] dimensions    @c initializer_list<int32_t> of dimensions of tensor
-   */
-  Shape(const std::initializer_list<int32_t> &dimensions) : _dimensions{dimensions}
-  {
-    // DO NOTHING
-  }
-
-  /**
-   * @brief Construct a new Shape object
-   * @param[in] origin    @c Shape object to copy
-   */
-  Shape(const Shape &origin) = default;
-
-public:
-  /**
-   * @brief Add dimension to the beginning
-   * @param[in] d     dimension to add to the beginning
-   * @return N/A
-   */
-  void prepend(int32_t d) { _dimensions.emplace_front(d); }
-
-  /**
-   * @brief Add dimension to the back
-   * @param[in] d     dimension to add to the back
-   * @return N/A
-   */
-  void append(int32_t d) { _dimensions.emplace_back(d); }
-
-public:
-  /**
-   * @brief Get the rank of this shape
-   * @return rank
-   */
-  size_t rank(void) const { return _dimensions.size(); }
-
-public:
-  /**
-   * @brief Get specific dimension
-   * @param[in] n  Index of dimension
-   * @return n'th dimension
-   */
-  int32_t dim(size_t n) const { return _dimensions.at(n); }
-
-  /**
-   * @brief Get the reference of specific dimension
-   * @param[in] n  Index of dimension
-   * @return Reference of n'th dimension
-   */
-  int32_t &dim(size_t n) { return _dimensions.at(n); }
-
-public:
-  /**
-   * @brief Get the number of elements specified by this shape
-   * @return The number of elements
-   */
-  size_t element_nums() const
-  {
-    size_t nums = 1;
-    for (auto d : _dimensions)
-    {
-      nums *= d;
-    }
-    return nums;
-  }
-
-private:
-  std::deque<int32_t> _dimensions;
-
-public:
-  /**
-   * @brief Get a @c Shape object after parsing string
-   * @param[in] s  String of dimension list. Accepted format is numbers separated by comma.
-   * @return @c Shape object
-   */
-  static Shape from(const std::string &s);
-};
-
-/**
- * @brief Check equality of two @c Shape
- * @param[in] Shape First shape to compare
- * @param[in] Shape Second shape to compare
- * @return @c true if both shapes are equal, otherwise @c false
- */
-bool operator==(const Shape &, const Shape &);
-
-/**
- * @brief Send @c Shape to @c std::ostream
- * @param[in] os        @c std::ostream to process this @c Shape
- * @param[in] shape     @c Shape to send to @c ostream
- * @return Reference of @c std::ostream
- */
-std::ostream &operator<<(std::ostream &os, const Shape &shape);
-
-} // namespace tensor
-} // namespace misc
-} // namespace nnfw
-
-#endif // __NNFW_MISC_TENSOR_SHAPE_H__
diff --git a/libs/misc/src/environment.cpp b/libs/misc/src/environment.cpp
deleted file mode 100644
index e39f18d62..000000000
--- a/libs/misc/src/environment.cpp
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <string.h>
-#include <cstdlib>
-#include <string>
-
-#include "misc/environment.h"
-
-namespace nnfw
-{
-namespace misc
-{
-
-int get_env_int(const char *name, int defaultValue)
-{
-  const char *value = std::getenv(name);
-  if (value != nullptr)
-    return std::stoi(value);
-  return defaultValue;
-}
-
-bool get_env_bool(const char *name, bool defaultValue)
-{
-  const char *value = std::getenv(name);
-  if (value != nullptr)
-  {
-    return std::stoi(value) != 0;
-  }
-
-  return defaultValue;
-}
-
-} // namespace misc
-} // namespace nnfw
-
-namespace nnfw
-{
-namespace misc
-{
-namespace env
-{
-
-IntAccessor::IntAccessor(const std::string &tag) : _tag{tag}
-{
-  // DO NOTHING
-}
-
-bool IntAccessor::access(int &out) const
-{
-  auto value = std::getenv(_tag.c_str());
-
-  if (value == nullptr)
-  {
-    return false;
-  }
-
-  out = std::stoi(value);
-  return true;
-}
-
-FloatAccessor::FloatAccessor(const std::string &tag) : _tag{tag}
-{
-  // DO NOTHING
-}
-
-bool FloatAccessor::access(float &out) const
-{
-  auto value = std::getenv(_tag.c_str());
-
-  if (value == nullptr)
-  {
-    return false;
-  }
-
-  out = std::stof(value);
-  return true;
-}
-
-} // namespace env
-} // namespace misc
-} // namespace nnfw
diff --git a/libs/misc/src/tensor/Comparator.cpp b/libs/misc/src/tensor/Comparator.cpp
deleted file mode 100644
index 013c9eed2..000000000
--- a/libs/misc/src/tensor/Comparator.cpp
+++ /dev/null
@@ -1,40 +0,0 @@
-#include "misc/tensor/Comparator.h"
-#include "misc/tensor/Zipper.h"
-
-#include "misc/fp32.h"
-
-namespace nnfw
-{
-namespace misc
-{
-namespace tensor
-{
-
-std::vector<Diff<float>> Comparator::compare(const Shape &shape, const Reader<float> &expected,
-                                             const Reader<float> &obtained,
-                                             Observer *observer) const
-{
-  std::vector<Diff<float>> res;
-
-  zip(shape, expected, obtained) <<
-      [&](const Index &index, float expected_value, float obtained_value) {
-        const auto relative_diff = nnfw::misc::fp32::relative_diff(expected_value, obtained_value);
-
-        if (!_compare_fn(expected_value, obtained_value))
-        {
-          res.emplace_back(index, expected_value, obtained_value);
-        }
-
-        // Update max_diff_index, if necessary
-        if (observer != nullptr)
-        {
-          observer->notify(index, expected_value, obtained_value);
-        }
-      };
-
-  return res;
-}
-
-} // namespace tensor
-} // namespace misc
-} // namespace nnfw
diff --git a/libs/misc/src/tensor/Shape.cpp b/libs/misc/src/tensor/Shape.cpp
deleted file mode 100644
index 675695e8e..000000000
--- a/libs/misc/src/tensor/Shape.cpp
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "misc/tensor/Shape.h"
-
-#include <cassert>
-
-namespace nnfw
-{
-namespace misc
-{
-namespace tensor
-{
-
-bool operator==(const Shape &lhs, const Shape &rhs)
-{
-  if (lhs.rank() != rhs.rank())
-  {
-    return false;
-  }
-
-  for (size_t axis = 0; axis < lhs.rank(); ++axis)
-  {
-    if (lhs.dim(axis) != rhs.dim(axis))
-    {
-      return false;
-    }
-  }
-
-  return true;
-}
-
-Shape Shape::from(const std::string &str)
-{
-  Shape shape(0);
-
-  bool pending = false;
-  int value = 0;
-
-  for (const char *cur = str.c_str(); true; ++cur)
-  {
-    if (*cur == ',' || *cur == '\0')
-    {
-      if (pending)
-      {
-        shape.append(value);
-      }
-
-      if (*cur == '\0')
-      {
-        break;
-      }
-
-      pending = false;
-      value = 0;
-      continue;
-    }
-
-    assert(*cur >= '0' && *cur <= '9');
-
-    pending = true;
-    value *= 10;
-    value += *cur - '0';
-  }
-
-  return shape;
-}
-
-std::ostream &operator<<(std::ostream &os, const Shape &shape)
-{
-  if (shape.rank() > 0)
-  {
-    os << shape.dim(0);
-
-    for (uint32_t axis = 1; axis < shape.rank(); ++axis)
-    {
-      os << "," << shape.dim(axis);
-    }
-  }
-
-  return os;
-}
-
-} // namespace tensor
-} // namespace misc
-} // namespace nnfw
diff --git a/libs/profiling/CMakeLists.txt b/libs/profiling/CMakeLists.txt
deleted file mode 100644
index 7169508a1..000000000
--- a/libs/profiling/CMakeLists.txt
+++ /dev/null
@@ -1,5 +0,0 @@
-file(GLOB_RECURSE SOURCES "src/*.cpp")
-
-add_library(nnfw_lib_profiling STATIC ${SOURCES})
-set_property(TARGET nnfw_lib_profiling PROPERTY POSITION_INDEPENDENT_CODE ON)
-target_include_directories(nnfw_lib_profiling PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/include)
diff --git a/libs/profiling/include/profiling/profile_buffer.h b/libs/profiling/include/profiling/profile_buffer.h
deleted file mode 100644
index 83cd3eb2b..000000000
--- a/libs/profiling/include/profiling/profile_buffer.h
+++ /dev/null
@@ -1,170 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* Copyright 2018 The TensorFlow Authors. All Rights Reserved.
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-==============================================================================*/
-
-// NOTE To minimize diff with upstream tensorflow, disable clang-format
-// clang-format off
-
-// NOTE This header is derived from the following file (in TensorFlow v1.12)
-//        'externals/tensorflow/tensorflow/contrib/lite/profiling/profile_buffer.h
-#ifndef TENSORFLOW_CONTRIB_LITE_PROFILING_PROFILE_BUFFER_H_
-#define TENSORFLOW_CONTRIB_LITE_PROFILING_PROFILE_BUFFER_H_
-
-#include <cstddef>
-#include <cstdint>
-
-#include "profiling/time.h"
-
-namespace tflite {
-namespace profiling {
-
-// A profiling event.
-struct ProfileEvent {
-  // Describes the type of event.
-  // The event_metadata field may contain additional data for interpreting
-  // the event.
-  enum class EventType {
-    // Default event type, the metadata field has no special significance.
-    DEFAULT = 0,
-    // The event is an operator invocation and the event_metadata field is the
-    // index of operator node.
-    OPERATOR_INVOKE_EVENT = 1
-  };
-
-  // Label of the event. This usually describes the event.
-  const char* tag;
-  // Timestamp in microseconds when the event began.
-  uint64_t begin_timestamp_us;
-  // Timestamp in microseconds when the event ended.
-  uint64_t end_timestamp_us;
-  // The field containing the type of event. This must be one of the event types
-  // in EventType.
-  EventType event_type;
-  // Extra data describing the details of the event.
-  uint32_t event_metadata;
-};
-}  // namespace profiling
-}  // namespace tflite
-
-#ifdef TFLITE_PROFILING_ENABLED
-
-#include <sys/time.h>
-#include <vector>
-
-namespace tflite {
-namespace profiling {
-constexpr uint32_t kInvalidEventHandle = static_cast<uint32_t>(~0) - 1;
-
-// A ring buffer of profile events.
-// This class is not thread safe.
-class ProfileBuffer {
- public:
-  ProfileBuffer(uint32_t max_num_entries, bool enabled)
-      : enabled_(enabled), current_index_(0), event_buffer_(max_num_entries) {}
-
-  // Adds an event to the buffer with begin timestamp set to the current
-  // timestamp. Returns a handle to event that can be used to call EndEvent. If
-  // buffer is disabled this has no affect.
-  // The tag of the event should remain valid till the buffer is valid.
-  uint32_t BeginEvent(const char* tag, ProfileEvent::EventType event_type,
-                      uint32_t event_metadata) {
-    if (!enabled_) {
-      return kInvalidEventHandle;
-    }
-    uint64_t timestamp = time::NowMicros();
-    int index = current_index_ % event_buffer_.size();
-    event_buffer_[index].tag = tag;
-    event_buffer_[index].event_type = event_type;
-    event_buffer_[index].event_metadata = event_metadata;
-    event_buffer_[index].begin_timestamp_us = timestamp;
-    event_buffer_[index].end_timestamp_us = 0;
-    current_index_++;
-    return index;
-  }
-
-  // Sets the enabled state of buffer to |enabled|
-  void SetEnabled(bool enabled) { enabled_ = enabled; }
-
-  // Sets the end timestamp for event for the handle to current time.
-  // If the buffer is disabled or previous event has been overwritten this
-  // operation has not effect.
-  void EndEvent(uint32_t event_handle) {
-    if (!enabled_ || event_handle == kInvalidEventHandle ||
-        event_handle > current_index_) {
-      return;
-    }
-    const uint32_t max_size = event_buffer_.size();
-    if (current_index_ > (max_size + event_handle)) {
-      // Ignore, buffer has already overflowed.
-      return;
-    }
-
-    int event_index = event_handle % max_size;
-    event_buffer_[event_index].end_timestamp_us = time::NowMicros();
-  }
-
-  // Returns the size of the buffer.
-  size_t Size() const {
-    return (current_index_ >= event_buffer_.size()) ? event_buffer_.size()
-                                                    : current_index_;
-  }
-
-  // Resets the buffer.
-  void Reset() {
-    enabled_ = false;
-    current_index_ = 0;
-  }
-
-  // Returns the profile event at the given index. If the index is invalid a
-  // nullptr is returned. The return event may get overwritten if more events
-  // are added to buffer.
-  const struct ProfileEvent* const At(int index) const {
-    size_t size = Size();
-    if (index >= size) {
-      return nullptr;
-    }
-    const uint32_t max_size = event_buffer_.size();
-    uint32_t start =
-        (current_index_ > max_size) ? current_index_ % max_size : max_size;
-    index = (index + start) % max_size;
-    return &event_buffer_[index];
-  }
-
- private:
-  bool enabled_;
-  uint32_t current_index_;
-  std::vector<ProfileEvent> event_buffer_;
-};
-}  // namespace profiling
-}  // namespace tflite
-#endif  // TFLITE_PROFILING_ENABLED
-#endif  // TENSORFLOW_CONTRIB_LITE_PROFILING_PROFILE_BUFFER_H_
-
-// clang-format on
diff --git a/libs/profiling/include/profiling/profiler.h b/libs/profiling/include/profiling/profiler.h
deleted file mode 100644
index 953042da3..000000000
--- a/libs/profiling/include/profiling/profiler.h
+++ /dev/null
@@ -1,203 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* Copyright 2018 The TensorFlow Authors. All Rights Reserved.
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-==============================================================================*/
-
-// NOTE To minimize diff with upstream tensorflow, disable clang-format
-// clang-format off
-
-// NOTE This header is derived from the following file (in TensorFlow v1.12)
-//        'externals/tensorflow/tensorflow/contrib/lite/profiling/profiler.h
-#ifndef TENSORFLOW_CONTRIB_LITE_PROFILING_PROFILER_H_
-#define TENSORFLOW_CONTRIB_LITE_PROFILING_PROFILER_H_
-
-#include <vector>
-
-#include "profiling/profile_buffer.h"
-
-#ifdef TFLITE_PROFILING_ENABLED
-
-namespace tflite {
-namespace profiling {
-class ScopedProfile;
-class ScopedOperatorProfile;
-
-// Controls whether profiling is enabled or disabled and collects profiles.
-// TFLite is used on platforms that don't have posix threads, so the profiler is
-// kept as simple as possible. It is designed to be used only on a single
-// thread.
-//
-// Profiles are collected using Scoped*Profile objects that begin and end a
-// profile event.
-// An example usage is shown in the example below:
-//
-// Say Worker class has a DoWork method and we are interested in profiling
-// the overall execution time for DoWork and time spent in Task1 and Task2
-// functions.
-//
-// class Worker {
-//  public:
-//   void DoWork() {
-//    ScopedProfile(&controller, "DoWork");
-//    Task1();
-//    Task2();
-//    .....
-//   }
-//
-//   void Task1() {
-//    ScopedProfile(&controller, "Task1");
-//    ....
-//   }
-//
-//   void Task2() {
-//    ScopedProfile(&controller, "Task2");
-//   }
-//
-//    Profiler profiler;
-// }
-//
-// We instrument the functions that need to be profiled.
-//
-// Profile can be collected by enable profiling and then getting profile
-// events.
-//
-//  void ProfileWorker() {
-//    Worker worker;
-//    worker.profiler.EnableProfiling();
-//    worker.DoWork();
-//    worker.profiler.DisableProfiling();
-//    // Profiling is complete, extract profiles.
-//    auto profile_events = worker.profiler.GetProfiles();
-//  }
-//
-//
-class Profiler {
- public:
-  Profiler() : buffer_(1024, false) {}
-
-  void StartProfiling() { buffer_.SetEnabled(true); }
-  void StopProfiling() { buffer_.SetEnabled(false); }
-  void Reset() { buffer_.Reset(); }
-  std::vector<const ProfileEvent*> GetProfileEvents() {
-    std::vector<const ProfileEvent*> profile_events;
-    profile_events.reserve(buffer_.Size());
-    for (size_t i = 0; i < buffer_.Size(); i++) {
-      profile_events.push_back(buffer_.At(i));
-    }
-    return profile_events;
-  }
-
- private:
-  friend class ScopedProfile;
-  friend class ScopedOperatorProfile;
-  ProfileBuffer* GetProfileBuffer() { return &buffer_; }
-  ProfileBuffer buffer_;
-};
-
-class ScopedProfile {
- public:
-  // Adds a profile event to profile that begins with the construction
-  // of object and ends when the object goes out of scope.
-  // The lifetime of tag should be at least the lifetime of profiler.
-
-  ScopedProfile(Profiler* profiler, const char* tag)
-      : buffer_(nullptr), event_handle_(0) {
-    if (profiler) {
-      buffer_ = profiler->GetProfileBuffer();
-      event_handle_ =
-          buffer_->BeginEvent(tag, ProfileEvent::EventType::DEFAULT, 0);
-    }
-  }
-  ~ScopedProfile() {
-    if (buffer_) {
-      buffer_->EndEvent(event_handle_);
-    }
-  }
-
- private:
-  ProfileBuffer* buffer_;
-  int32_t event_handle_;
-};
-
-class ScopedOperatorProfile {
- public:
-  // Adds a profile event to profile that begins with the construction
-  // of object and ends when the object goes out of scope.
-  // The lifetime of tag should be at least the lifetime of profiler.
-  ScopedOperatorProfile(Profiler* profiler, const char* tag, int node_index)
-      : buffer_(nullptr), event_handle_(0) {
-    if (profiler) {
-      buffer_ = profiler->GetProfileBuffer();
-      event_handle_ = buffer_->BeginEvent(
-          tag, ProfileEvent::EventType::OPERATOR_INVOKE_EVENT, node_index);
-    }
-  }
-
-  ~ScopedOperatorProfile() {
-    if (buffer_) {
-      buffer_->EndEvent(event_handle_);
-    }
-  }
-
- private:
-  ProfileBuffer* buffer_;
-  int32_t event_handle_;
-};
-
-}  // namespace profiling
-}  // namespace tflite
-
-#define VARNAME_UNIQ(name, ctr) name##ctr
-
-#define SCOPED_OPERATOR_PROFILE(profiler, node_index)    \
-  tflite::profiling::ScopedOperatorProfile VARNAME_UNIQ( \
-      _profile_, __COUNTER__)((profiler), "OpInvoke", (node_index))
-#else
-
-namespace tflite {
-namespace profiling {
-// A noop version of profiler when profiling is disabled.
-class Profiler {
- public:
-  Profiler() {}
-  void StartProfiling() {}
-  void StopProfiling() {}
-  void Reset() {}
-  std::vector<const ProfileEvent*> GetProfileEvents() { return {}; }
-};
-}  // namespace profiling
-}  // namespace tflite
-
-#define SCOPED_OPERATOR_PROFILE(profiler, node_index)
-
-#endif  // TFLITE_PROFILING_ENABLED
-
-#endif  // TENSORFLOW_CONTRIB_LITE_PROFILING_PROFILER_H_
-
-// clang-format on
diff --git a/libs/profiling/include/profiling/time.h b/libs/profiling/include/profiling/time.h
deleted file mode 100644
index 4b194944d..000000000
--- a/libs/profiling/include/profiling/time.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/* Copyright 2018 The TensorFlow Authors. All Rights Reserved.
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-==============================================================================*/
-
-// NOTE To minimize diff with upstream tensorflow, disable clang-format
-// clang-format off
-
-// NOTE This header is derived from the following file (in TensorFlow v1.12)
-//        'externals/tensorflow/tensorflow/contrib/lite/profiling/time.h
-#ifndef TENSORFLOW_CONTRIB_LITE_PROFILING_TIME_H_
-#define TENSORFLOW_CONTRIB_LITE_PROFILING_TIME_H_
-
-#include <cstdint>
-
-namespace tflite {
-namespace profiling {
-namespace time {
-uint64_t NowMicros();
-}  // namespace time
-}  // namespace profiling
-}  // namespace tflite
-#endif  // TENSORFLOW_CONTRIB_LITE_PROFILING_TIME_H_
-
-// clang-format on
diff --git a/libs/profiling/src/profiling/time.cpp b/libs/profiling/src/profiling/time.cpp
deleted file mode 100644
index 92d8595f8..000000000
--- a/libs/profiling/src/profiling/time.cpp
+++ /dev/null
@@ -1,55 +0,0 @@
-/* Copyright 2018 The TensorFlow Authors. All Rights Reserved.
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-==============================================================================*/
-
-// NOTE To minimize diff with upstream tensorflow, disable clang-format
-// clang-format off
-
-// NOTE This header is derived from the following file (in TensorFlow v1.12)
-//        'externals/tensorflow/tensorflow/contrib/lite/profiling/time.cpp
-#include "profiling/time.h"
-
-#if defined(_MSC_VER)
-#include <chrono>  // NOLINT(build/c++11)
-#else
-#include <sys/time.h>
-#endif
-
-namespace tflite {
-namespace profiling {
-namespace time {
-
-#if defined(_MSC_VER)
-
-uint64_t NowMicros() {
-  return std::chrono::duration_cast<std::chrono::microseconds>(
-             std::chrono::system_clock::now().time_since_epoch())
-      .count();
-}
-
-#else
-
-uint64_t NowMicros() {
-  struct timeval tv;
-  gettimeofday(&tv, nullptr);
-  return static_cast<uint64_t>(tv.tv_sec) * 1000000 + tv.tv_usec;
-}
-
-#endif  // defined(_MSC_VER)
-
-}  // namespace time
-}  // namespace profiling
-}  // namespace tflite
-
-// clang-format on
diff --git a/libs/tflite/CMakeLists.txt b/libs/tflite/CMakeLists.txt
deleted file mode 100644
index e844d1c68..000000000
--- a/libs/tflite/CMakeLists.txt
+++ /dev/null
@@ -1,12 +0,0 @@
-file(GLOB_RECURSE SOURCES "src/*.cpp")
-file(GLOB_RECURSE TESTS "src/*.test.cpp")
-list(REMOVE_ITEM SOURCES ${TESTS})
-
-add_library(nnfw_lib_tflite STATIC ${SOURCES})
-set_target_properties(nnfw_lib_tflite PROPERTIES POSITION_INDEPENDENT_CODE ON)
-target_include_directories(nnfw_lib_tflite PUBLIC ${NNFW_INCLUDE_DIR} ${CMAKE_CURRENT_SOURCE_DIR}/include)
-target_link_libraries(nnfw_lib_tflite tensorflow-lite ${LIB_PTHREAD} dl)
-target_link_libraries(nnfw_lib_tflite nnfw_lib_misc)
-
-add_executable(nnfw_lib_tflite_test_TensorView src/TensorView.test.cpp)
-target_link_libraries(nnfw_lib_tflite_test_TensorView nnfw_lib_tflite)
diff --git a/libs/tflite/include/tflite/Assert.h b/libs/tflite/include/tflite/Assert.h
deleted file mode 100644
index 6d12d37f6..000000000
--- a/libs/tflite/include/tflite/Assert.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file     Assert.h
- * @brief    This file contains helper function of assertion
- * @ingroup  COM_AI_RUNTIME
- */
-
-#ifndef __NNFW_TFLITE_ASSERT_H__
-#define __NNFW_TFLITE_ASSERT_H__
-
-#include "tensorflow/contrib/lite/context.h"
-
-#include <sstream>
-
-#define STR_DETAIL(value) #value
-#define STR(value) STR_DETAIL(value)
-
-#define TFLITE_ENSURE(exp)                                             \
-  {                                                                    \
-    const TfLiteStatus status = (exp);                                 \
-                                                                       \
-    if (status != kTfLiteOk)                                           \
-    {                                                                  \
-      std::ostringstream ss;                                           \
-      ss << #exp << " failed (" << __FILE__ << ":" << __LINE__ << ")"; \
-      throw std::runtime_error{ss.str()};                              \
-    }                                                                  \
-  }
-
-#endif // __NNFW_TFLITE_ASSERT_H__
diff --git a/libs/tflite/include/tflite/Diff.h b/libs/tflite/include/tflite/Diff.h
deleted file mode 100644
index 15c672831..000000000
--- a/libs/tflite/include/tflite/Diff.h
+++ /dev/null
@@ -1,199 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file     Diff.h
- * @brief    This file contains classes for testing correctess of implementation
- * @ingroup  COM_AI_RUNTIME
- */
-
-#ifndef __NNFW_TFLITE_DIFF_H__
-#define __NNFW_TFLITE_DIFF_H__
-
-#include "tensorflow/contrib/lite/interpreter.h"
-
-#include "misc/tensor/Index.h"
-#include "misc/tensor/Diff.h"
-#include "misc/tensor/Shape.h"
-#include "misc/tensor/Comparator.h"
-
-#include "tflite/TensorView.h"
-
-#include <functional>
-#include <vector>
-
-/**
- * @brief Class to define TfLite interpreter match application
- */
-class TfLiteInterpMatchApp
-{
-public:
-  /**
-   * @brief Construct a new TfLiteInterpMatchApp object with Comparator
-   * @param[in] comparator   Comparator object for tensor comparation
-   */
-  TfLiteInterpMatchApp(const nnfw::misc::tensor::Comparator &comparator)
-      : _verbose{false}, _comparator(comparator)
-  {
-    // DO NOTHING
-  }
-
-public:
-  /**
-   * @brief Get reference verbose for debugging information
-   * @return Reference of verbose value
-   */
-  int &verbose(void) { return _verbose; }
-
-private:
-  int _verbose;
-
-public:
-  /**
-   * @brief Run two interpreter and return the output matching
-   * @param[in] pure   Interpreter object of expected(with TfLite)
-   * @param[in] nnapi  Interpreter object of obtained(through NNAPI)
-   * @return  @c true if two Interpreter results are same, otherwise @c false
-   */
-  bool run(::tflite::Interpreter &pure, ::tflite::Interpreter &nnapi) const;
-  /**
-   * @brief Compare two TensorView values and return the match result
-   * @param[in] expected  TensorView object to read expected values
-   * @param[in] obtained  TensorView object to read obtained values
-   * @param[in] id        Tensor ID value used for debug message
-   * @return  @c true if two TensorView values are same, otherwise @c false
-   */
-  template <typename T>
-  bool compareSingleTensorView(const nnfw::tflite::TensorView<T> &expected,
-                               const nnfw::tflite::TensorView<T> &obtained, int id) const;
-
-private:
-  const nnfw::misc::tensor::Comparator &_comparator;
-};
-
-#include "tflite/interp/Builder.h"
-#include "tflite/Quantization.h"
-
-#include <random>
-
-/**
- * @brief Class to generate random values
- */
-class RandomGenerator
-{
-public:
-  /**
-   * @brief Construct a new RandomGenerator object
-   * @param[in] seed          Random seed value
-   * @param[in] mean          Mean value of normal random number generation
-   * @param[in] stddev        Standard deviation of random number generation
-   * @param[in] quantization  TfLiteQuantizationParams type to represent quantization value
-   *                          (not used yet)
-   */
-  RandomGenerator(int seed, float mean, float stddev,
-                  const TfLiteQuantizationParams quantization = make_default_quantization())
-      : _rand{seed}, _dist{mean, stddev}, _quantization{quantization}
-  {
-    // DO NOTHING
-  }
-
-public:
-  /**
-   * @brief  Generate random numbers for type T
-   * @param[in] s Shape value
-   * @param[in] i Index value
-   * @return Random generated value
-   * @note   This is same as T generate(void) as two input parameters are not used
-   */
-  template <typename T>
-  T generate(const ::nnfw::misc::tensor::Shape &, const ::nnfw::misc::tensor::Index &)
-  {
-    return generate<T>();
-  }
-
-  /**
-   * @brief  Generate random numbers for type T
-   * @return Random generated value
-   */
-  template <typename T> T generate(void) { return _dist(_rand); }
-
-private:
-  std::minstd_rand _rand;
-  std::normal_distribution<float> _dist;
-  const TfLiteQuantizationParams _quantization;
-};
-
-template <> uint8_t RandomGenerator::generate<uint8_t>(void);
-
-/**
- * @brief Structure for NNAPI correctness test
- */
-struct RandomTestParam
-{
-  int verbose;               //!< Verbosity of debug information
-  int tolerance;             //!< Torlerance of value difference
-  int tensor_logging = 0;    //!< Save logging to a file if not 0
-  std::string log_path = ""; //!< Path of log file, meaningful only when tensor_logging is 1
-};
-
-/**
- * @brief Class to define Random test runner
- */
-class RandomTestRunner
-{
-public:
-  /**
-   * @brief Construct a new RandomTestRunner object
-   * @param[in] seed          Random seed value
-   * @param[in] param         RandomTestParam object for test runner
-   * @param[in] quantization  TfLiteQuantizationParams type to represent quantization value
-   */
-  RandomTestRunner(int seed, const RandomTestParam &param,
-                   const TfLiteQuantizationParams quantization = make_default_quantization())
-      : _randgen{seed, 0.0f, 2.0f, quantization}, _param{param}
-  {
-    // DO NOTHING
-  }
-
-public:
-  /**
-   * @brief  Run the random test runner
-   * @param[in] builder  Interpreter Builder used to run
-   * @return 0 if test succeeds, otherwise failure
-   */
-  int run(const nnfw::tflite::Builder &builder);
-
-public:
-  /**
-   * @brief  Get RandomGenerator reference
-   * @return RandomGenerator reference
-   */
-  RandomGenerator &generator() { return _randgen; };
-
-private:
-  RandomGenerator _randgen;
-  const RandomTestParam _param;
-
-public:
-  /**
-   * @brief  Create a RandomTestRunner object
-   * @param[in] seed  Random seed value
-   * @return RandomGenerator object
-   */
-  static RandomTestRunner make(int seed);
-};
-
-#endif // __NNFW_TFLITE_DIFF_H__
diff --git a/libs/tflite/include/tflite/FeatureView.h b/libs/tflite/include/tflite/FeatureView.h
deleted file mode 100644
index 06cbf4b14..000000000
--- a/libs/tflite/include/tflite/FeatureView.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file     FeatureView.h
- * @brief    This file contains FeatureView class
- * @ingroup  COM_AI_RUNTIME
- */
-
-#ifndef __NNFW_TFLITE_FEATURE_VIEW_H__
-#define __NNFW_TFLITE_FEATURE_VIEW_H__
-
-#include "tensorflow/contrib/lite/interpreter.h"
-
-#include "tflite/InputIndex.h"
-#include "tflite/OutputIndex.h"
-
-#include "misc/feature/Shape.h"
-#include "misc/feature/Reader.h"
-
-namespace nnfw
-{
-namespace tflite
-{
-
-template <typename T> class FeatureView;
-
-/**
- * @brief Class to support reading element of float type feature
- */
-template <> class FeatureView<float> : public nnfw::misc::feature::Reader<float>
-{
-public:
-  /**
-   * @brief     Construct a new FeatureView object
-   * @param[in] interp  Interpreter to read from
-   * @param[in] index   InputIndex index of input
-   */
-  FeatureView(::tflite::Interpreter &interp, const InputIndex &index);
-  /**
-   * @brief     Construct a new FeatureView object
-   * @param[in] interp  Interpreter to read from
-   * @param[in] index   OutputIndex index of output
-   */
-  FeatureView(::tflite::Interpreter &interp, const OutputIndex &index);
-
-public:
-  /**
-   * @brief     Get value of element using channel, row and column index
-   * @param[in] ch    Channel index
-   * @param[in] row   Row index
-   * @param[in] col   Column index
-   * @return    Value of element
-   */
-  float at(uint32_t ch, uint32_t row, uint32_t col) const;
-  /**
-   * @brief     Get reference of element using channel, row and column index
-   * @param[in] ch  Channel index
-   * @param[in] row Row index
-   * @param[in] col Column index
-   * @return    Reference of element
-   */
-  float &at(uint32_t ch, uint32_t row, uint32_t col);
-
-private:
-  /**
-   * @brief     Get offset of element from channel, row and column index
-   * @param[in] ch  Channel index
-   * @param[in] row Row index
-   * @param[in] col Column index
-   * @return    Offset of element
-   */
-  uint32_t getElementOffset(uint32_t ch, uint32_t row, uint32_t col) const
-  {
-    uint32_t res = 0;
-
-    // TensorFlow Lite assumes that NHWC ordering for tessor
-    res += row * _shape.W * _shape.C;
-    res += col * _shape.C;
-    res += ch;
-
-    return res;
-  }
-
-private:
-  nnfw::misc::feature::Shape _shape;
-  float *_base;
-};
-
-} // namespace tflite
-} // namespace nnfw
-
-#endif // __NNFW_TFLITE_FEATURE_VIEW_H__
diff --git a/libs/tflite/include/tflite/Quantization.h b/libs/tflite/include/tflite/Quantization.h
deleted file mode 100644
index 4a8a0f1ac..000000000
--- a/libs/tflite/include/tflite/Quantization.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file     Quantization.h
- * @brief    This file contains BitwiseIntToFloat union and quantization related
- * @ingroup  COM_AI_RUNTIME
- */
-
-#ifndef __NNFW_TFLITE_QUANTIZATION_H__
-#define __NNFW_TFLITE_QUANTIZATION_H__
-
-/**
- * @brief Union to provide bitwise conversion of integer and float
- */
-union BitwiseIntToFloat {
-  int i;
-  float f;
-};
-
-static const float FLOAT_NEAREST_TO_1 = BitwiseIntToFloat{0x3f7fffff}.f;
-
-#include "tensorflow/contrib/lite/context.h"
-
-/**
- * @brief   Get TfLiteQuantizationParams object with default values
- * @return  TfLiteQuantizationParams object
- */
-TfLiteQuantizationParams make_default_quantization(void);
-
-#endif // __NNFW_TFLITE_QUANTIZATION_H__
diff --git a/libs/tflite/include/tflite/Session.h b/libs/tflite/include/tflite/Session.h
deleted file mode 100644
index 4f2e5c54d..000000000
--- a/libs/tflite/include/tflite/Session.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file     Session.h
- * @brief    This file contains Session class
- * @ingroup  COM_AI_RUNTIME
- */
-
-#ifndef __NNFW_TFLITE_SESSION_H__
-#define __NNFW_TFLITE_SESSION_H__
-
-#include <tensorflow/contrib/lite/interpreter.h>
-
-namespace nnfw
-{
-namespace tflite
-{
-
-/**
- * @brief Structure to provide interface methods of interpreter session
- */
-struct Session
-{
-  /**
-   * @brief  Destruct Session object using default destructor
-   */
-  virtual ~Session() = default;
-
-  /**
-   * @brief   Get the Interpreter object pointer
-   * @return  The Interpreter object pointer
-   */
-  virtual ::tflite::Interpreter *interp(void) = 0;
-
-  /**
-   * @brief   Prepare the session
-   * @return  @c true if prepare method succeeded, otherwise @c false
-   */
-  virtual bool prepare(void) = 0;
-  /**
-   * @brief   Run the session
-   * @return  @c true if run method succeeded, otherwise @c false
-   */
-  virtual bool run(void) = 0;
-  /**
-   * @brief   Teardown(release) the session
-   * @return  @c true if teardown method succeeded, otherwise @c false
-   */
-  virtual bool teardown(void) = 0;
-};
-
-} // namespace tflite
-} // namespace nnfw
-
-#endif // __NNFW_TFLITE_INTERP_SESSION_H__
diff --git a/libs/tflite/include/tflite/TensorLogger.h b/libs/tflite/include/tflite/TensorLogger.h
deleted file mode 100644
index e56a76b58..000000000
--- a/libs/tflite/include/tflite/TensorLogger.h
+++ /dev/null
@@ -1,168 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file     TensorLogger.h
- * @brief    This file contains TensorLogger class
- * @ingroup  COM_AI_RUNTIME
- */
-
-#ifndef __NNFW_TFLITE_TENSOR_LOGGER_H__
-#define __NNFW_TFLITE_TENSOR_LOGGER_H__
-
-#include "misc/tensor/IndexIterator.h"
-#include "tflite/TensorView.h"
-
-#include <tensorflow/contrib/lite/interpreter.h>
-#include <tensorflow/contrib/lite/context.h>
-#include <fstream>
-#include <iomanip>
-
-namespace nnfw
-{
-namespace tflite
-{
-
-/**
- * @brief Class to write input and output value / shape into a file in python form
- * @note This is a utility to write input and output value / shape into a file in python form.\n
- *       any python app can load this value by running the python code below:\n
- *       exec(open(filename).read())\n
- *       generated python code looks like the following: \n
- *       tensor_shape_gen = []\n
- *       tensor_value_gen = []\n\n
- *       tensor_shape_gen.append("{2, 1, 2}")\n
- *       tensor_value_gen.append([1, 2, 3, 4])\n\n
- *       tensor_shape_gen.append("{2}")\n
- *       tensor_value_gen.append([1, 2])\n\n
- *       tensor_shape_gen.append("{2, 1, 2}")\n
- *       tensor_value_gen.append([1, 4, 3, 8])\n
- */
-class TensorLogger
-{
-private:
-  std::ofstream _outfile;
-
-public:
-  /**
-   * @brief Get TensorLogger instance
-   * @return The TensorLogger instance
-   */
-  static TensorLogger &instance()
-  {
-    static TensorLogger instance;
-    return instance;
-  }
-
-  /**
-   * @brief Save the tensor details to file from interpreter
-   * @param[in] path The file path to save
-   * @param[in] interp The TfLite interpreter
-   */
-  void save(const std::string &path, ::tflite::Interpreter &interp)
-  {
-    open(path);
-
-    int log_index = 0;
-    for (const auto id : interp.inputs())
-    {
-      _outfile << "# input tensors" << std::endl;
-      printTensor(interp, id, log_index++);
-    }
-    for (const auto id : interp.outputs())
-    {
-      _outfile << "# output tensors" << std::endl;
-      printTensor(interp, id, log_index++);
-    }
-    close();
-  }
-
-private:
-  void open(const std::string &path)
-  {
-    if (!_outfile.is_open())
-      _outfile.open(path, std::ios_base::out);
-
-    _outfile << "# ------ file: " << path << " ------" << std::endl
-             << "tensor_shape_gen = []" << std::endl
-             << "tensor_value_gen = []" << std::endl
-             << std::endl;
-  }
-
-  void printTensor(::tflite::Interpreter &interp, const int id, const int log_index)
-  {
-    const TfLiteTensor *tensor = interp.tensor(id);
-
-    _outfile << "# tensor name: " << tensor->name << std::endl;
-    _outfile << "# tflite::interpreter.tensor(" << id << ") -> "
-                                                         "tensor_value_gen["
-             << log_index << "]" << std::endl;
-
-    if (tensor->type == kTfLiteInt32)
-    {
-      printTensorShape(tensor);
-      printTensorValue<int32_t>(tensor, tensor->data.i32);
-    }
-    else if (interp.tensor(id)->type == kTfLiteUInt8)
-    {
-      printTensorShape(tensor);
-      printTensorValue<uint8_t>(tensor, tensor->data.uint8);
-    }
-    else if (tensor->type == kTfLiteFloat32)
-    {
-      printTensorShape(tensor);
-      printTensorValue<float>(tensor, tensor->data.f);
-    }
-  }
-
-  void printTensorShape(const TfLiteTensor *tensor)
-  {
-    _outfile << "tensor_shape_gen.append('{";
-
-    size_t r = 0;
-    for (; r < tensor->dims->size - 1; r++)
-    {
-      _outfile << tensor->dims->data[r] << ", ";
-    }
-    _outfile << tensor->dims->data[r];
-
-    _outfile << "}')" << std::endl;
-  }
-
-  template <typename T> void printTensorValue(const TfLiteTensor *tensor, T *tensor_data_ptr)
-  {
-    _outfile << "tensor_value_gen.append([";
-
-    _outfile << std::fixed << std::setprecision(10);
-
-    const T *end = reinterpret_cast<const T *>(tensor->data.raw_const + tensor->bytes);
-    for (T *ptr = tensor_data_ptr; ptr < end; ptr++)
-      _outfile << *ptr << ", ";
-
-    _outfile << "])" << std::endl << std::endl;
-  }
-
-  void close()
-  {
-    _outfile << "# --------- tensor shape and value defined above ---------" << std::endl;
-    _outfile.close();
-  }
-};
-
-} // namespace tflite
-} // namespace nnfw
-
-#endif // __NNFW_TFLITE_TENSOR_LOGGER_H__
diff --git a/libs/tflite/include/tflite/TensorUtils.h b/libs/tflite/include/tflite/TensorUtils.h
deleted file mode 100644
index 6266c5dff..000000000
--- a/libs/tflite/include/tflite/TensorUtils.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file    TensorUtils.h
- * @brief   This file contains utilities function
- * @ingroup COM_AI_RUNTIME
- */
-
-#ifndef __NNFW_TFLITE_TENSOR_UTILS_H__
-#define __NNFW_TFLITE_TENSOR_UTILS_H__
-
-#include <tensorflow/contrib/lite/context.h>
-
-namespace nnfw
-{
-namespace tflite
-{
-
-/**
- * @brief Get @c true if tensor type is kTfLiteFloat32, otherwise @c false
- * @param[in] tensor The tensor object to be compared
- * @return @c true if tensor type is kTfLiteFloat32, otherwise @c false
- */
-inline bool isFloatTensor(const TfLiteTensor *tensor) { return tensor->type == kTfLiteFloat32; }
-
-/**
- * @brief Get @c true if tensor is 4-D tensor and the first dimension length is 1,
- *        otherwise @c false
- * @param[in] tensor The tensor object to be compared
- * @return @c true if tensor is 4-D tensor and the first dimension length is 1, otherwise @c false
- */
-inline bool isFeatureTensor(const TfLiteTensor *tensor)
-{
-  return (tensor->dims->size == 4) && (tensor->dims->data[0] == 1);
-}
-
-} // namespace tflite
-} // namespace nnfw
-
-#endif // __NNFW_TFLITE_TENSOR_UTILS_H__
diff --git a/libs/tflite/include/tflite/TensorView.h b/libs/tflite/include/tflite/TensorView.h
deleted file mode 100644
index 79c754c78..000000000
--- a/libs/tflite/include/tflite/TensorView.h
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file     TensorView.h
- * @brief    This file contains TensorView class
- * @ingroup  COM_AI_RUNTIME
- */
-
-#ifndef __NNFW_TFLITE_TENSOR_VIEW_H__
-#define __NNFW_TFLITE_TENSOR_VIEW_H__
-
-#include "tensorflow/contrib/lite/interpreter.h"
-
-#include "misc/tensor/Shape.h"
-#include "misc/tensor/Index.h"
-#include "misc/tensor/Reader.h"
-#include "misc/tensor/NonIncreasingStride.h"
-
-namespace nnfw
-{
-namespace tflite
-{
-
-/**
- * @brief Class to define TensorView which is inherited from nnfw::misc::tensor::Reader<T> class
- */
-template <typename T> class TensorView final : public nnfw::misc::tensor::Reader<T>
-{
-public:
-  /**
-   * @brief Construct a TensorView object with base and shape informations
-   * @param[in] shape The shape of a tensor
-   * @param[in] base The base address of a tensor
-   */
-  TensorView(const nnfw::misc::tensor::Shape &shape, T *base) : _shape{shape}, _base{base}
-  {
-    // Set 'stride'
-    _stride.init(_shape);
-  }
-
-public:
-  /**
-   * @brief Get shape of tensor
-   * @return Reference of shape
-   */
-  const nnfw::misc::tensor::Shape &shape(void) const { return _shape; }
-
-public:
-  /**
-   * @brief Get value of tensor index
-   * @param[in] index The tensor index
-   * @return The value at the index
-   */
-  T at(const nnfw::misc::tensor::Index &index) const override
-  {
-    const auto offset = _stride.offset(index);
-    return *(_base + offset);
-  }
-
-public:
-  /**
-   * @brief Get reference value of tensor index
-   * @param[in] index The tensor index
-   * @return The reference value at the index
-   */
-  T &at(const nnfw::misc::tensor::Index &index)
-  {
-    const auto offset = _stride.offset(index);
-    return *(_base + offset);
-  }
-
-private:
-  nnfw::misc::tensor::Shape _shape; /**< The tensor shape */
-
-public:
-  T *_base;                                        /**< The base address of tensor */
-  nnfw::misc::tensor::NonIncreasingStride _stride; /**< The NonIncreasingStride object */
-
-public:
-  // TODO Introduce Operand ID class
-  /**
-   * @brief Create TensorView object using given parameters
-   * @param[in] interp The TfLite interpreter
-   * @param[in] tensor_index The tensor index
-   * @return The new TensorView<T> object
-   */
-  static TensorView<T> make(::tflite::Interpreter &interp, int tensor_index)
-  {
-    auto tensor_ptr = interp.tensor(tensor_index);
-
-    // Set 'shape'
-    nnfw::misc::tensor::Shape shape(tensor_ptr->dims->size);
-
-    for (uint32_t axis = 0; axis < shape.rank(); ++axis)
-    {
-      shape.dim(axis) = tensor_ptr->dims->data[axis];
-    }
-
-    return TensorView<T>(shape, interp.typed_tensor<T>(tensor_index));
-  }
-};
-
-} // namespace tflite
-} // namespace nnfw
-
-#endif // __NNFW_TFLITE_TENSOR_VIEW_H__
diff --git a/libs/tflite/include/tflite/ext/kernels/Abs.h b/libs/tflite/include/tflite/ext/kernels/Abs.h
deleted file mode 100644
index 74e4aa658..000000000
--- a/libs/tflite/include/tflite/ext/kernels/Abs.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NNFW_TFLITE_EXT_KERNELS_ABS_H__
-#define __NNFW_TFLITE_EXT_KERNELS_ABS_H__
-
-#include "tensorflow/contrib/lite/context.h"
-
-namespace nnfw
-{
-namespace tflite
-{
-namespace custom
-{
-namespace Abs
-{
-
-void *InitAbs(TfLiteContext *context, const char *buffer, size_t length);
-void FreeAbs(TfLiteContext *context, void *buffer);
-TfLiteStatus PrepareAbs(TfLiteContext *context, TfLiteNode *node);
-TfLiteStatus EvalAbs(TfLiteContext *context, TfLiteNode *node);
-
-} // namespace Abs
-} // namespace custom
-} // namespace tflite
-} // namespace nnfw
-
-#endif // __NNFW_TFLITE_EXT_KERNELS_ABS_H__
diff --git a/libs/tflite/include/tflite/ext/kernels/CustomOps.h b/libs/tflite/include/tflite/ext/kernels/CustomOps.h
deleted file mode 100644
index 3f9459bb2..000000000
--- a/libs/tflite/include/tflite/ext/kernels/CustomOps.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file     CustomOps.h
- * @brief    This file contains registration of custom operands
- * @ingroup  COM_AI_RUNTIME
- */
-
-#ifndef __NNFW_TFLITE_EXT_KERNELS_CUSTOM_OP_H__
-#define __NNFW_TFLITE_EXT_KERNELS_CUSTOM_OP_H__
-
-#include "tensorflow/contrib/lite/context.h"
-#include "tflite/ext/kernels/TensorFlowMax.h"
-#include "tflite/ext/kernels/SquaredDifference.h"
-#include "tflite/ext/kernels/TensorFlowSum.h"
-#include "tflite/ext/kernels/Abs.h"
-
-namespace nnfw
-{
-namespace tflite
-{
-namespace custom
-{
-
-#define REGISTER_FUNCTION(Name)                                                    \
-  TfLiteRegistration *Register_##Name(void)                                        \
-  {                                                                                \
-    static TfLiteRegistration r = {                                                \
-        Name::Init##Name, Name::Free##Name, Name::Prepare##Name, Name::Eval##Name, \
-    };                                                                             \
-    r.custom_name = #Name;                                                         \
-    return &r;                                                                     \
-  }
-
-REGISTER_FUNCTION(TensorFlowMax)
-REGISTER_FUNCTION(SquaredDifference)
-REGISTER_FUNCTION(TensorFlowSum)
-REGISTER_FUNCTION(Abs)
-
-#undef REGISTER_FUNCTION
-
-} // namespace custom
-} // namespace tflite
-} // namespace nnfw
-
-#endif // __NNFW_TFLITE_EXT_KERNELS_CUSTOM_OP_H__
diff --git a/libs/tflite/include/tflite/ext/kernels/SquaredDifference.h b/libs/tflite/include/tflite/ext/kernels/SquaredDifference.h
deleted file mode 100644
index 492523c02..000000000
--- a/libs/tflite/include/tflite/ext/kernels/SquaredDifference.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file     SquaredDifference.h
- * @brief    This file contains SquaredDifference namespace and SquaredDifference function
- *           definitions
- * @ingroup  COM_AI_RUNTIME
- */
-
-#ifndef __NNFW_TFLITE_EXT_KERNELS_SQUARED_DIFFERENCE_H__
-#define __NNFW_TFLITE_EXT_KERNELS_SQUARED_DIFFERENCE_H__
-
-#include "tensorflow/contrib/lite/context.h"
-
-namespace nnfw
-{
-namespace tflite
-{
-namespace custom
-{
-namespace SquaredDifference
-{
-
-/**
- * @brief Initialize SquaredDifference operand using the contents of buffer
- * @param[in] context The TfLite context
- * @param[in] buffer The buffer with contents
- * @param[in] length The buffer length
- * @return The void pointer for user data
- */
-void *InitSquaredDifference(TfLiteContext *context, const char *buffer, size_t length);
-
-/**
- * @brief Release any memory it might have allocated via 'InitSquaredDifference'
- * @param[in] context The TfLite context
- * @param[in] buffer The buffer with contents
- * @return N/A
- */
-void FreeSquaredDifference(TfLiteContext *context, void *buffer);
-
-/**
- * @brief Prepare the SquaredDifference operand for execution
- * @param[in] context The TfLite context
- * @param[in] node The operand node
- * @return The TfLite status
- */
-TfLiteStatus PrepareSquaredDifference(TfLiteContext *context, TfLiteNode *node);
-
-/**
- * @brief Evaluation the SquaredDifference operand for execution
- * @param[in] context The TfLite context
- * @param[in] node The operand node
- * @return The TfLite status
- */
-TfLiteStatus EvalSquaredDifference(TfLiteContext *context, TfLiteNode *node);
-
-} // namespace SquaredDifference
-} // namespace custom
-} // namespace tflite
-} // namespace nnfw
-
-#endif // __NNFW_TFLITE_EXT_KERNELS_SQUARED_DIFFERENCE_H__
diff --git a/libs/tflite/include/tflite/ext/kernels/TensorFlowMax.h b/libs/tflite/include/tflite/ext/kernels/TensorFlowMax.h
deleted file mode 100644
index d31d76483..000000000
--- a/libs/tflite/include/tflite/ext/kernels/TensorFlowMax.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file     TensorFlowMax.h
- * @brief    This file contains TensorFlowMax namespace and TensorFlowMax function definitions
- * @ingroup  COM_AI_RUNTIME
- */
-
-#ifndef __NNFW_TFLITE_EXT_KERNELS_TENSORFLOW_MAX_H__
-#define __NNFW_TFLITE_EXT_KERNELS_TENSORFLOW_MAX_H__
-
-#include "tensorflow/contrib/lite/context.h"
-
-namespace nnfw
-{
-namespace tflite
-{
-namespace custom
-{
-namespace TensorFlowMax
-{
-
-/**
- * @brief Initialize TensorFlowMax operand using the contents of buffer
- * @param[in] context The TfLite context
- * @param[in] buffer The buffer with contents
- * @param[in] length The buffer length
- * @return The void pointer for user data
- */
-void *InitTensorFlowMax(TfLiteContext *context, const char *buffer, size_t length);
-
-/**
- * @brief Release any memory it might have allocated via 'InitTensorFlowMax'
- * @param[in] context The TfLite context
- * @param[in] buffer The buffer with contents
- * @return N/A
- */
-void FreeTensorFlowMax(TfLiteContext *context, void *buffer);
-
-/**
- * @brief Prepare the TensorFlowMax operand for execution
- * @param[in] context The TfLite context
- * @param[in] node The operand node
- * @return The TfLite status
- */
-TfLiteStatus PrepareTensorFlowMax(TfLiteContext *context, TfLiteNode *node);
-
-/**
- * @brief Evaluation the TensorFlowMax operand for execution
- * @param[in] context The TfLite context
- * @param[in] node The operand node
- * @return The TfLite status
- */
-TfLiteStatus EvalTensorFlowMax(TfLiteContext *context, TfLiteNode *node);
-
-} // namespace TensorFlowMax
-} // namespace custom
-} // namespace tflite
-} // namespace nnfw
-
-#endif // __NNFW_TFLITE_EXT_KERNELS_TENSORFLOW_MAX_H__
diff --git a/libs/tflite/include/tflite/ext/kernels/TensorFlowSum.h b/libs/tflite/include/tflite/ext/kernels/TensorFlowSum.h
deleted file mode 100644
index 66783cf41..000000000
--- a/libs/tflite/include/tflite/ext/kernels/TensorFlowSum.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NNFW_TFLITE_EXT_KERNELS_TENSORFLOW_SUM_H__
-#define __NNFW_TFLITE_EXT_KERNELS_TENSORFLOW_SUM_H__
-
-#include "tensorflow/contrib/lite/context.h"
-
-namespace nnfw
-{
-namespace tflite
-{
-namespace custom
-{
-namespace TensorFlowSum
-{
-
-void *InitTensorFlowSum(TfLiteContext *context, const char *buffer, size_t length);
-void FreeTensorFlowSum(TfLiteContext *context, void *buffer);
-TfLiteStatus PrepareTensorFlowSum(TfLiteContext *context, TfLiteNode *node);
-TfLiteStatus EvalTensorFlowSum(TfLiteContext *context, TfLiteNode *node);
-
-} // namespace TensorFlowSum
-} // namespace custom
-} // namespace tflite
-} // namespace nnfw
-
-#endif // __NNFW_TFLITE_EXT_KERNELS_TENSORFLOW_SUM_H__
diff --git a/libs/tflite/include/tflite/ext/kernels/register.h b/libs/tflite/include/tflite/ext/kernels/register.h
deleted file mode 100644
index 124af7abc..000000000
--- a/libs/tflite/include/tflite/ext/kernels/register.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/* Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
-   Copyright 2017 The TensorFlow Authors. All Rights Reserved.
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-==============================================================================*/
-
-// NOTE To minimize diff with upstream tensorflow, disable clang-format
-// clang-format off
-
-// NOTE This header is derived from the following file (in TensorFlow)
-//        'externals/tensorflow/tensorflow/contrib/lite/kernels/register.h'
-#ifndef __NNFW_TFLITE_EXT_KERNELS_REGISTER_H__
-#define __NNFW_TFLITE_EXT_KERNELS_REGISTER_H__
-
-#include <unordered_map>
-#include "tensorflow/contrib/lite/context.h"
-#include "tensorflow/contrib/lite/model.h"
-
-namespace nnfw {
-namespace tflite {
-
-class BuiltinOpResolver : public ::tflite::MutableOpResolver {
- public:
-  BuiltinOpResolver();
-};
-
-}  // namespace tflite
-}  // namespace nnfw
-
-#endif // __NNFW_TFLITE_EXT_KERNELS_REGISTER_H__
-
-// clang-format on
diff --git a/libs/tflite/include/tflite/ext/nnapi_delegate.h b/libs/tflite/include/tflite/ext/nnapi_delegate.h
deleted file mode 100644
index 3aac01af7..000000000
--- a/libs/tflite/include/tflite/ext/nnapi_delegate.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/* Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
-   Copyright 2017 The TensorFlow Authors. All Rights Reserved.
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-==============================================================================*/
-
-// NOTE To minimize diff with upstream tensorflow, disable clang-format
-// clang-format off
-
-// NOTE This header is derived from the following file (in TensorFlow v1.12)
-//        'externals/tensorflow/tensorflow/contrib/lite/nnapi_delegate.h'
-#ifndef __NNFW_TFLITE_EXT_NNAPI_DELEGATE_H__
-#define __NNFW_TFLITE_EXT_NNAPI_DELEGATE_H__
-
-#include "tensorflow/contrib/lite/allocation.h"
-#ifdef OBS_BUILD
-#include "tensorflow/contrib/lite/context.h"
-#include "tensorflow/contrib/lite/error_reporter.h"
-#else
-#include "tensorflow/contrib/lite/c/c_api_internal.h"
-#include "tensorflow/contrib/lite/core/api/error_reporter.h"
-#endif
-#include "tensorflow/contrib/lite/interpreter.h"
-#include "NeuralNetworksShim.h"
-
-class ANeuralNetworksModel;
-class ANeuralNetworksMemory;
-class ANeuralNetworksCompilation;
-
-namespace nnfw {
-namespace tflite {
-
-class NNAPIAllocation : public ::tflite::MMAPAllocation {
- public:
-  NNAPIAllocation(const char* filename, ::tflite::ErrorReporter* error_reporter);
-  ~NNAPIAllocation();
-
-  size_t offset(const void* ptr) const {
-    auto signed_offset = reinterpret_cast<const uint8_t*>(ptr) -
-                         reinterpret_cast<const uint8_t*>(mmapped_buffer_);
-
-    return static_cast<size_t>(signed_offset);
-  }
-
-  ANeuralNetworksMemory* memory() const { return handle_; }
-  bool valid() const override { return handle_ != nullptr; }
-
- private:
-  mutable ANeuralNetworksMemory* handle_ = nullptr;
-};
-
-class NNAPIDelegate {
- public:
-  ~NNAPIDelegate();
-
-  // Convert a tflite graph to NNAPI
-  TfLiteStatus BuildGraph(::tflite::Interpreter* interpreter);
-
-  // Run
-  TfLiteStatus Invoke(::tflite::Interpreter* interpreter);
-
-  // Whether the current platform supports NNAPI delegation.
-  static bool IsSupported();
-
- private:
-  // The NN API model handle
-  ANeuralNetworksModel* nn_model_ = nullptr;
-  // The NN API compilation handle
-  ANeuralNetworksCompilation* nn_compiled_model_ = nullptr;
-  // Model status
-  TfLiteStatus model_status_ = kTfLiteOk;
-
-  // List of state tensors for LSTM, RNN, SVDF.
-  // NN API does not allow ops to maintain states across multiple
-  // invocations. We need to manually create state input tensors from
-  // corresponding state output tensors of TFLite operations, and map them
-  // correctly.
-  std::vector<int> model_states_inputs_;   // holds NNAPI operand ids
-  std::vector<int> model_states_outputs_;  // holds TFLite tensor ids
-};
-
-} // namespace tflite
-} // namespace nnfw
-
-#endif  // __NNFW_TFLITE_EXT_NNAPI_DELEGATE_H__
-
-// clang-format on
diff --git a/libs/tflite/include/tflite/interp/Builder.h b/libs/tflite/include/tflite/interp/Builder.h
deleted file mode 100644
index b4d082419..000000000
--- a/libs/tflite/include/tflite/interp/Builder.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file     Builder.h
- * @brief    This file contains Builder structure
- * @ingroup  COM_AI_RUNTIME
- */
-
-#ifndef __NNFW_TFLITE_INTERP_BUILDER_H__
-#define __NNFW_TFLITE_INTERP_BUILDER_H__
-
-#include <tensorflow/contrib/lite/interpreter.h>
-
-namespace nnfw
-{
-namespace tflite
-{
-
-/**
- * @brief Structure to Builder
- */
-struct Builder
-{
-  /**
-   * @brief Destroy the Builder object
-   */
-  virtual ~Builder() = default;
-
-  /**
-   * @brief Build a FlatBuffer model
-   * @return The TfLite interpreter object
-   */
-  virtual std::unique_ptr<::tflite::Interpreter> build(void) const = 0;
-};
-
-} // namespace tflite
-} // namespace nnfw
-
-#endif // __NNFW_TFLITE_INTERP_BUILDER_H__
diff --git a/libs/tflite/include/tflite/interp/FlatBufferBuilder.h b/libs/tflite/include/tflite/interp/FlatBufferBuilder.h
deleted file mode 100644
index 13470b8c5..000000000
--- a/libs/tflite/include/tflite/interp/FlatBufferBuilder.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file     FlatBufferBuilder.h
- * @brief    This file contains FlatBufferBuilder class
- * @ingroup  COM_AI_RUNTIME
- */
-
-#ifndef __NNFW_TFLITE_INTERP_FLAT_BUFFER_BUILDER_H__
-#define __NNFW_TFLITE_INTERP_FLAT_BUFFER_BUILDER_H__
-
-#include <tensorflow/contrib/lite/model.h>
-
-#include "tflite/interp/Builder.h"
-
-namespace nnfw
-{
-namespace tflite
-{
-
-/**
- * @brief Class to define FlatBufferBuilder which is inherited from Builder
- */
-class FlatBufferBuilder final : public Builder
-{
-public:
-  /**
-   * @brief Construct a FlatBufferBuilder object with FlatBufferModel of TfLite
-   * @param[in] model The TfLite Flatbuffer model
-   */
-  FlatBufferBuilder(const ::tflite::FlatBufferModel &model) : _model{model}
-  {
-    // DO NOTHING
-  }
-
-public:
-  /**
-   * @brief Build a FlatBuffer model
-   * @return The TfLite interpreter pointer address
-   */
-  std::unique_ptr<::tflite::Interpreter> build(void) const override;
-
-private:
-  const ::tflite::FlatBufferModel &_model;
-};
-
-} // namespace tflite
-} // namespace nnfw
-
-#endif // __NNFW_TFLITE_INTERP_FLAT_BUFFER_BUILDER_H__
diff --git a/libs/tflite/include/tflite/interp/FunctionBuilder.h b/libs/tflite/include/tflite/interp/FunctionBuilder.h
deleted file mode 100644
index 064375939..000000000
--- a/libs/tflite/include/tflite/interp/FunctionBuilder.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file     FunctionBuilder.h
- * @brief    This file contains FunctionBuilder class
- * @ingroup  COM_AI_RUNTIME
- */
-
-#ifndef __NNFW_TFLITE_INTERP_FUNCTION_BUILDER_H__
-#define __NNFW_TFLITE_INTERP_FUNCTION_BUILDER_H__
-
-#include <tensorflow/contrib/lite/model.h>
-
-#include "tflite/interp/Builder.h"
-
-namespace nnfw
-{
-namespace tflite
-{
-
-/**
- * @brief Class to define FunctionBuilder which is inherited from Builder
- */
-class FunctionBuilder final : public Builder
-{
-public:
-  using SetupFunc = std::function<void(::tflite::Interpreter &)>;
-
-public:
-  /**
-   * @brief Construct a FunctionBuilder object with SetupFunction
-   * @param[in] fn The SetupFunc object
-   */
-  FunctionBuilder(const SetupFunc &fn) : _fn{fn}
-  {
-    // DO NOTHING
-  }
-
-public:
-  /**
-   * @brief Build a SetupFunc
-   * @return The TfLite interpreter pointer address
-   */
-  std::unique_ptr<::tflite::Interpreter> build(void) const override;
-
-private:
-  SetupFunc _fn;
-};
-
-} // namespace tflite
-} // namespace nnfw
-
-#endif // __NNFW_TFLITE_INTERP_FUNCTION_BUILDER_H__
diff --git a/libs/tflite/src/Diff.cpp b/libs/tflite/src/Diff.cpp
deleted file mode 100644
index 45ef06110..000000000
--- a/libs/tflite/src/Diff.cpp
+++ /dev/null
@@ -1,598 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "tflite/Diff.h"
-#include "tflite/ext/nnapi_delegate.h"
-
-#include "misc/fp32.h"
-
-#include "misc/tensor/IndexIterator.h"
-#include "misc/tensor/IndexFormatter.h"
-#include "misc/tensor/Zipper.h"
-#include "misc/tensor/Comparator.h"
-
-#include "misc/environment.h"
-
-#include <iostream>
-#include <cassert>
-
-class DiffSummary : public nnfw::misc::tensor::Comparator::Observer
-{
-public:
-  DiffSummary()
-      : max_abs_diff_index(0), max_abs_diff_expected{0.0f}, max_abs_diff_obtained{0.0f},
-        max_abs_diff_value{0.0f}, max_rel_diff_index(0), max_rel_diff_expected{0.0f},
-        max_rel_diff_obtained{0.0f}, max_rel_diff_value{0.0f}
-  {
-    // DO NOTHING
-  }
-
-public:
-  void notify(const nnfw::misc::tensor::Index &index, float expected, float obtained) override;
-
-public:
-  nnfw::misc::tensor::Index max_abs_diff_index;
-  float max_abs_diff_expected;
-  float max_abs_diff_obtained;
-  float max_abs_diff_value;
-
-  nnfw::misc::tensor::Index max_rel_diff_index;
-  float max_rel_diff_expected;
-  float max_rel_diff_obtained;
-  float max_rel_diff_value;
-};
-
-void DiffSummary::notify(const nnfw::misc::tensor::Index &index, float expected, float obtained)
-{
-  const auto abs_diff_value = std::fabs(expected - obtained);
-
-  if (max_abs_diff_value < abs_diff_value)
-  {
-    max_abs_diff_index = index;
-    max_abs_diff_value = abs_diff_value;
-    max_abs_diff_expected = expected;
-    max_abs_diff_obtained = obtained;
-  }
-
-  const auto rel_diff_value = nnfw::misc::fp32::relative_diff(expected, obtained);
-
-  if (max_rel_diff_value < rel_diff_value)
-  {
-    max_rel_diff_index = index;
-    max_rel_diff_value = rel_diff_value;
-    max_rel_diff_expected = expected;
-    max_rel_diff_obtained = obtained;
-  }
-}
-
-template <typename T>
-bool TfLiteInterpMatchApp::compareSingleTensorView(const nnfw::tflite::TensorView<T> &expected,
-                                                   const nnfw::tflite::TensorView<T> &obtained,
-                                                   int id) const
-{
-  std::vector<nnfw::misc::tensor::Diff<T>> diffs;
-  assert(expected.shape() == obtained.shape());
-
-  using nnfw::misc::tensor::zip;
-  using nnfw::misc::tensor::Index;
-
-  zip(expected.shape(), expected, obtained)
-      << [&](const Index &index, T expected_value, T obtained_value) {
-           if (expected_value != obtained_value)
-           {
-             diffs.emplace_back(index, expected_value, obtained_value);
-           }
-         };
-
-  // TODO Unify summary generation code
-  if (diffs.size() == 0)
-  {
-    std::cout << "  Tensor #" << id << ": MATCHED" << std::endl;
-  }
-  else
-  {
-    std::cout << "  Tensor #" << id << ": UNMATCHED" << std::endl;
-    std::cout << "    " << diffs.size() << " diffs are detected" << std::endl;
-  }
-
-  if (diffs.size() > 0 && _verbose != 0)
-  {
-    std::cout << "    ---- Details ---" << std::endl;
-    for (const auto &diff : diffs)
-    {
-      std::cout << "    Diff at [" << nnfw::misc::tensor::IndexFormatter(diff.index) << "]"
-                << std::endl;
-      std::cout << "      expected: " << diff.expected << std::endl;
-      std::cout << "      obtained: " << diff.obtained << std::endl;
-    }
-  }
-
-  return diffs.size() == 0;
-}
-
-template <>
-bool TfLiteInterpMatchApp::compareSingleTensorView<float>(
-    const nnfw::tflite::TensorView<float> &expected,
-    const nnfw::tflite::TensorView<float> &obtained, int id) const
-{
-  DiffSummary summary;
-
-  assert(expected.shape() == obtained.shape());
-  auto diffs = _comparator.compare(expected.shape(), expected, obtained, &summary);
-
-  // TODO Unify summary generation code
-  if (diffs.size() == 0)
-  {
-    std::cout << "  Tensor #" << id << ": MATCHED" << std::endl;
-  }
-  else
-  {
-    std::cout << "  Tensor #" << id << ": UNMATCHED" << std::endl;
-    std::cout << "    " << diffs.size() << " diffs are detected" << std::endl;
-  }
-
-  // Print out max_diff
-  if (summary.max_abs_diff_value > 0)
-  {
-    std::cout << "    Max absolute diff at ["
-              << nnfw::misc::tensor::IndexFormatter(summary.max_abs_diff_index) << "]" << std::endl;
-    std::cout << "       expected: " << summary.max_abs_diff_expected << std::endl;
-    std::cout << "       obtained: " << summary.max_abs_diff_obtained << std::endl;
-    std::cout << "       absolute diff: " << summary.max_abs_diff_value << std::endl;
-  }
-
-  if (summary.max_rel_diff_value > 0)
-  {
-    const auto tolerance_level = summary.max_rel_diff_value / FLT_EPSILON;
-
-    std::cout << "    Max relative diff at ["
-              << nnfw::misc::tensor::IndexFormatter(summary.max_rel_diff_index) << "]" << std::endl;
-    std::cout << "       expected: " << summary.max_rel_diff_expected << std::endl;
-    std::cout << "       obtained: " << summary.max_rel_diff_obtained << std::endl;
-    std::cout << "       relative diff: " << summary.max_rel_diff_value << std::endl;
-    std::cout << "         (tolerance level = " << tolerance_level << ")" << std::endl;
-  }
-
-  if (diffs.size() > 0)
-  {
-    if (_verbose != 0)
-    {
-      std::cout << "    ---- Details ---" << std::endl;
-      for (const auto &diff : diffs)
-      {
-        const auto absolute_diff = std::fabs(diff.expected - diff.obtained);
-        const auto relative_diff = nnfw::misc::fp32::relative_diff(diff.expected, diff.obtained);
-        const auto tolerance_level = relative_diff / FLT_EPSILON;
-
-        std::cout << "    Diff at [" << nnfw::misc::tensor::IndexFormatter(diff.index) << "]"
-                  << std::endl;
-        std::cout << "      expected: " << diff.expected << std::endl;
-        std::cout << "      obtained: " << diff.obtained << std::endl;
-        std::cout << "      absolute diff: " << absolute_diff << std::endl;
-        std::cout << "      relative diff: " << relative_diff << std::endl;
-        std::cout << "         (tolerance level = " << tolerance_level << ")" << std::endl;
-      }
-    }
-
-    return false;
-  }
-  return true;
-}
-
-#include <map>
-
-bool TfLiteInterpMatchApp::run(::tflite::Interpreter &interp, ::tflite::Interpreter &nnapi) const
-{
-  assert(interp.outputs() == nnapi.outputs());
-
-  bool all_matched = true;
-
-  using Comparator = std::function<bool(int id, ::tflite::Interpreter &, ::tflite::Interpreter &)>;
-
-  std::map<TfLiteType, Comparator> comparators;
-
-  comparators[kTfLiteUInt8] = [this](int id, ::tflite::Interpreter &interp,
-                                     ::tflite::Interpreter &nnapi) {
-    const auto expected = nnfw::tflite::TensorView<uint8_t>::make(interp, id);
-    const auto obtained = nnfw::tflite::TensorView<uint8_t>::make(nnapi, id);
-
-    return compareSingleTensorView(expected, obtained, id);
-  };
-
-  comparators[kTfLiteInt32] = [this](int id, ::tflite::Interpreter &interp,
-                                     ::tflite::Interpreter &nnapi) {
-    const auto expected = nnfw::tflite::TensorView<int32_t>::make(interp, id);
-    const auto obtained = nnfw::tflite::TensorView<int32_t>::make(nnapi, id);
-
-    return compareSingleTensorView(expected, obtained, id);
-  };
-
-  comparators[kTfLiteFloat32] = [this](int id, ::tflite::Interpreter &interp,
-                                       ::tflite::Interpreter &nnapi) {
-    const auto expected = nnfw::tflite::TensorView<float>::make(interp, id);
-    const auto obtained = nnfw::tflite::TensorView<float>::make(nnapi, id);
-
-    return compareSingleTensorView(expected, obtained, id);
-  };
-
-  comparators[kTfLiteBool] = [this](int id, ::tflite::Interpreter &interp,
-                                    ::tflite::Interpreter &nnapi) {
-    const auto expected = nnfw::tflite::TensorView<bool>::make(interp, id);
-    const auto obtained = nnfw::tflite::TensorView<bool>::make(nnapi, id);
-
-    return compareSingleTensorView(expected, obtained, id);
-  };
-
-  for (const auto &id : interp.outputs())
-  {
-    assert(interp.tensor(id)->type == nnapi.tensor(id)->type);
-
-    auto it = comparators.find(interp.tensor(id)->type);
-
-    if (it == comparators.end())
-    {
-      throw std::runtime_error{"Not supported output type"};
-    }
-
-    const auto &comparator = it->second;
-
-    if (!comparator(id, interp, nnapi))
-    {
-      all_matched = false;
-    }
-  }
-
-  return all_matched;
-}
-
-#include "misc/tensor/Object.h"
-
-using namespace std::placeholders;
-
-template <> uint8_t RandomGenerator::generate<uint8_t>(void)
-{
-  // The value of type_range is 255.
-  float type_range = static_cast<float>(std::numeric_limits<uint8_t>::max()) -
-                     static_cast<float>(std::numeric_limits<uint8_t>::min());
-  // Most _dist values range from -5.0 to 5.0.
-  float min_range = -5.0f;
-  float max_range = 5.0f;
-  return static_cast<uint8_t>((_dist(_rand) - min_range) * type_range / (max_range - min_range));
-}
-
-#include "tflite/TensorLogger.h"
-//
-// Random Test Runner
-//
-int RandomTestRunner::run(const nnfw::tflite::Builder &builder)
-{
-  auto tfl_interp = builder.build();
-  auto nnapi = builder.build();
-
-  tfl_interp->UseNNAPI(false);
-
-  // Allocate Tensors
-  tfl_interp->AllocateTensors();
-  nnapi->AllocateTensors();
-
-  assert(tfl_interp->inputs() == nnapi->inputs());
-
-  using ::tflite::Interpreter;
-  using Initializer = std::function<void(int id, Interpreter *, Interpreter *)>;
-
-  std::map<TfLiteType, Initializer> initializers;
-  std::map<TfLiteType, Initializer> reseters;
-
-  // Generate singed 32-bit integer (s32) input
-  initializers[kTfLiteInt32] = [&](int id, Interpreter *tfl_interp, Interpreter *nnapi) {
-    assert(tfl_interp->tensor(id)->type == kTfLiteInt32);
-    assert(nnapi->tensor(id)->type == kTfLiteInt32);
-
-    auto tfl_interp_view = nnfw::tflite::TensorView<int32_t>::make(*tfl_interp, id);
-    auto nnapi_view = nnfw::tflite::TensorView<int32_t>::make(*nnapi, id);
-
-    assert(tfl_interp_view.shape() == nnapi_view.shape());
-
-    int32_t value = 0;
-
-    nnfw::misc::tensor::iterate(tfl_interp_view.shape())
-        << [&](const nnfw::misc::tensor::Index &ind) {
-             // TODO Generate random values
-             tfl_interp_view.at(ind) = value;
-             nnapi_view.at(ind) = value;
-             ++value;
-           };
-  };
-
-  // Generate singed 32-bit integer (s32) input
-  reseters[kTfLiteInt32] = [&](int id, Interpreter *tfl_interp, Interpreter *nnapi) {
-    assert(tfl_interp->tensor(id)->type == kTfLiteInt32);
-    assert(nnapi->tensor(id)->type == kTfLiteInt32);
-
-    auto tfl_interp_view = nnfw::tflite::TensorView<int32_t>::make(*tfl_interp, id);
-    auto nnapi_view = nnfw::tflite::TensorView<int32_t>::make(*nnapi, id);
-
-    assert(tfl_interp_view.shape() == nnapi_view.shape());
-
-    int32_t value = 0;
-
-    nnfw::misc::tensor::iterate(tfl_interp_view.shape())
-        << [&](const nnfw::misc::tensor::Index &ind) {
-             // TODO Generate random values
-             tfl_interp_view.at(ind) = value;
-             nnapi_view.at(ind) = value;
-           };
-  };
-
-  initializers[kTfLiteUInt8] = [&](int id, Interpreter *tfl_interp, Interpreter *nnapi) {
-    assert(tfl_interp->tensor(id)->type == kTfLiteUInt8);
-    assert(nnapi->tensor(id)->type == kTfLiteUInt8);
-
-    auto tfl_interp_view = nnfw::tflite::TensorView<uint8_t>::make(*tfl_interp, id);
-    auto nnapi_view = nnfw::tflite::TensorView<uint8_t>::make(*nnapi, id);
-
-    assert(tfl_interp_view.shape() == nnapi_view.shape());
-
-    auto fp = static_cast<uint8_t (RandomGenerator::*)(const ::nnfw::misc::tensor::Shape &,
-                                                       const ::nnfw::misc::tensor::Index &)>(
-        &RandomGenerator::generate<uint8_t>);
-    const nnfw::misc::tensor::Object<uint8_t> data(tfl_interp_view.shape(),
-                                                   std::bind(fp, _randgen, _1, _2));
-    assert(tfl_interp_view.shape() == data.shape());
-
-    nnfw::misc::tensor::iterate(tfl_interp_view.shape())
-        << [&](const nnfw::misc::tensor::Index &ind) {
-             const auto value = data.at(ind);
-
-             tfl_interp_view.at(ind) = value;
-             nnapi_view.at(ind) = value;
-           };
-  };
-
-  reseters[kTfLiteUInt8] = [&](int id, Interpreter *tfl_interp, Interpreter *nnapi) {
-    assert(tfl_interp->tensor(id)->type == kTfLiteUInt8);
-    assert(nnapi->tensor(id)->type == kTfLiteUInt8);
-
-    auto tfl_interp_view = nnfw::tflite::TensorView<uint8_t>::make(*tfl_interp, id);
-    auto nnapi_view = nnfw::tflite::TensorView<uint8_t>::make(*nnapi, id);
-
-    assert(tfl_interp_view.shape() == nnapi_view.shape());
-
-    auto fp = static_cast<uint8_t (RandomGenerator::*)(const ::nnfw::misc::tensor::Shape &,
-                                                       const ::nnfw::misc::tensor::Index &)>(
-        &RandomGenerator::generate<uint8_t>);
-    const nnfw::misc::tensor::Object<uint8_t> data(tfl_interp_view.shape(),
-                                                   std::bind(fp, _randgen, _1, _2));
-    assert(tfl_interp_view.shape() == data.shape());
-
-    uint8_t value = 0;
-
-    nnfw::misc::tensor::iterate(tfl_interp_view.shape())
-        << [&](const nnfw::misc::tensor::Index &ind) {
-             tfl_interp_view.at(ind) = value;
-             nnapi_view.at(ind) = value;
-           };
-  };
-
-  initializers[kTfLiteFloat32] = [&](int id, Interpreter *tfl_interp, Interpreter *nnapi) {
-    assert(tfl_interp->tensor(id)->type == kTfLiteFloat32);
-    assert(nnapi->tensor(id)->type == kTfLiteFloat32);
-
-    auto tfl_interp_view = nnfw::tflite::TensorView<float>::make(*tfl_interp, id);
-    auto nnapi_view = nnfw::tflite::TensorView<float>::make(*nnapi, id);
-
-    assert(tfl_interp_view.shape() == nnapi_view.shape());
-
-    auto fp = static_cast<float (RandomGenerator::*)(const ::nnfw::misc::tensor::Shape &,
-                                                     const ::nnfw::misc::tensor::Index &)>(
-        &RandomGenerator::generate<float>);
-    const nnfw::misc::tensor::Object<float> data(tfl_interp_view.shape(),
-                                                 std::bind(fp, _randgen, _1, _2));
-
-    assert(tfl_interp_view.shape() == data.shape());
-
-    nnfw::misc::tensor::iterate(tfl_interp_view.shape())
-        << [&](const nnfw::misc::tensor::Index &ind) {
-             const auto value = data.at(ind);
-
-             tfl_interp_view.at(ind) = value;
-             nnapi_view.at(ind) = value;
-           };
-  };
-
-  reseters[kTfLiteFloat32] = [&](int id, Interpreter *tfl_interp, Interpreter *nnapi) {
-    assert(tfl_interp->tensor(id)->type == kTfLiteFloat32);
-    assert(nnapi->tensor(id)->type == kTfLiteFloat32);
-
-    auto tfl_interp_view = nnfw::tflite::TensorView<float>::make(*tfl_interp, id);
-    auto nnapi_view = nnfw::tflite::TensorView<float>::make(*nnapi, id);
-
-    assert(tfl_interp_view.shape() == nnapi_view.shape());
-
-    auto fp = static_cast<float (RandomGenerator::*)(const ::nnfw::misc::tensor::Shape &,
-                                                     const ::nnfw::misc::tensor::Index &)>(
-        &RandomGenerator::generate<float>);
-    const nnfw::misc::tensor::Object<float> data(tfl_interp_view.shape(),
-                                                 std::bind(fp, _randgen, _1, _2));
-
-    assert(tfl_interp_view.shape() == data.shape());
-
-    float value = 0;
-
-    nnfw::misc::tensor::iterate(tfl_interp_view.shape())
-        << [&](const nnfw::misc::tensor::Index &ind) {
-             tfl_interp_view.at(ind) = value;
-             nnapi_view.at(ind) = value;
-           };
-  };
-
-  initializers[kTfLiteBool] = [&](int id, Interpreter *tfl_interp, Interpreter *nnapi) {
-    assert(tfl_interp->tensor(id)->type == kTfLiteBool);
-    assert(nnapi->tensor(id)->type == kTfLiteBool);
-
-    auto tfl_interp_view = nnfw::tflite::TensorView<bool>::make(*tfl_interp, id);
-    auto nnapi_view = nnfw::tflite::TensorView<bool>::make(*nnapi, id);
-
-    assert(tfl_interp_view.shape() == nnapi_view.shape());
-
-    auto fp = static_cast<bool (RandomGenerator::*)(const ::nnfw::misc::tensor::Shape &,
-                                                    const ::nnfw::misc::tensor::Index &)>(
-        &RandomGenerator::generate<bool>);
-    const nnfw::misc::tensor::Object<bool> data(tfl_interp_view.shape(),
-                                                std::bind(fp, _randgen, _1, _2));
-
-    assert(tfl_interp_view.shape() == data.shape());
-
-    nnfw::misc::tensor::iterate(tfl_interp_view.shape())
-        << [&](const nnfw::misc::tensor::Index &ind) {
-             const auto value = data.at(ind);
-
-             tfl_interp_view.at(ind) = value;
-             nnapi_view.at(ind) = value;
-           };
-  };
-
-  reseters[kTfLiteBool] = [&](int id, Interpreter *tfl_interp, Interpreter *nnapi) {
-    assert(tfl_interp->tensor(id)->type == kTfLiteBool);
-    assert(nnapi->tensor(id)->type == kTfLiteBool);
-
-    auto tfl_interp_view = nnfw::tflite::TensorView<bool>::make(*tfl_interp, id);
-    auto nnapi_view = nnfw::tflite::TensorView<bool>::make(*nnapi, id);
-
-    assert(tfl_interp_view.shape() == nnapi_view.shape());
-
-    auto fp = static_cast<bool (RandomGenerator::*)(const ::nnfw::misc::tensor::Shape &,
-                                                    const ::nnfw::misc::tensor::Index &)>(
-        &RandomGenerator::generate<bool>);
-    const nnfw::misc::tensor::Object<bool> data(tfl_interp_view.shape(),
-                                                std::bind(fp, _randgen, _1, _2));
-
-    assert(tfl_interp_view.shape() == data.shape());
-
-    bool value = false;
-
-    nnfw::misc::tensor::iterate(tfl_interp_view.shape())
-        << [&](const nnfw::misc::tensor::Index &ind) {
-             tfl_interp_view.at(ind) = value;
-             nnapi_view.at(ind) = value;
-           };
-  };
-
-  // Fill IFM with random numbers
-  for (const auto id : tfl_interp->inputs())
-  {
-    assert(tfl_interp->tensor(id)->type == nnapi->tensor(id)->type);
-
-    auto it = initializers.find(tfl_interp->tensor(id)->type);
-
-    if (it == initializers.end())
-    {
-      throw std::runtime_error{"Not supported input type"};
-    }
-
-    it->second(id, tfl_interp.get(), nnapi.get());
-  }
-
-  // Fill OFM with 0
-  for (const auto id : tfl_interp->outputs())
-  {
-    assert(tfl_interp->tensor(id)->type == nnapi->tensor(id)->type);
-
-    auto it = reseters.find(tfl_interp->tensor(id)->type);
-
-    if (it == reseters.end())
-    {
-      throw std::runtime_error{"Not supported input type"};
-    }
-
-    it->second(id, tfl_interp.get(), nnapi.get());
-  }
-
-  std::cout << "[NNAPI TEST] Run T/F Lite Interpreter without NNAPI" << std::endl;
-  tfl_interp->Invoke();
-
-  std::cout << "[NNAPI TEST] Run T/F Lite Interpreter with NNAPI" << std::endl;
-
-  char *env = getenv("UPSTREAM_DELEGATE");
-
-  if (env && !std::string(env).compare("1"))
-  {
-    nnapi->UseNNAPI(true);
-    nnapi->Invoke();
-  }
-  else
-  {
-    nnfw::tflite::NNAPIDelegate d;
-
-    if (d.BuildGraph(nnapi.get()))
-    {
-      throw std::runtime_error{"Failed to BuildGraph"};
-    }
-
-    if (d.Invoke(nnapi.get()))
-    {
-      throw std::runtime_error{"Failed to BuildGraph"};
-    }
-  }
-
-  // Compare OFM
-  std::cout << "[NNAPI TEST] Compare the result" << std::endl;
-
-  const auto tolerance = _param.tolerance;
-
-  auto equals = [tolerance](float lhs, float rhs) {
-    // NOTE Hybrid approach
-    // TODO Allow users to set tolerance for absolute_epsilon_equal
-    if (nnfw::misc::fp32::absolute_epsilon_equal(lhs, rhs))
-    {
-      return true;
-    }
-
-    return nnfw::misc::fp32::epsilon_equal(lhs, rhs, tolerance);
-  };
-
-  nnfw::misc::tensor::Comparator comparator(equals);
-  TfLiteInterpMatchApp app(comparator);
-
-  app.verbose() = _param.verbose;
-
-  bool res = app.run(*tfl_interp, *nnapi);
-
-  if (!res)
-  {
-    return 255;
-  }
-
-  std::cout << "[NNAPI TEST] PASSED" << std::endl;
-
-  if (_param.tensor_logging)
-    nnfw::tflite::TensorLogger::instance().save(_param.log_path, *tfl_interp);
-
-  return 0;
-}
-
-RandomTestRunner RandomTestRunner::make(int seed)
-{
-  RandomTestParam param;
-
-  param.verbose = 0;
-  param.tolerance = 1;
-
-  nnfw::misc::env::IntAccessor("VERBOSE").access(param.verbose);
-  nnfw::misc::env::IntAccessor("TOLERANCE").access(param.tolerance);
-
-  return RandomTestRunner{seed, param};
-}
diff --git a/libs/tflite/src/TensorShapeUtils.cpp b/libs/tflite/src/TensorShapeUtils.cpp
deleted file mode 100644
index b5d906719..000000000
--- a/libs/tflite/src/TensorShapeUtils.cpp
+++ /dev/null
@@ -1,48 +0,0 @@
-#include "tflite/TensorShapeUtils.h"
-
-namespace nnfw
-{
-namespace tflite
-{
-
-nnfw::misc::tensor::Shape broadcast(const nnfw::misc::tensor::Shape &lhs_shape,
-                                    const nnfw::misc::tensor::Shape &rhs_shape)
-{
-  const uint32_t lhs_rank = lhs_shape.rank();
-  const uint32_t rhs_rank = rhs_shape.rank();
-  const uint32_t out_rank = std::max(lhs_rank, rhs_rank);
-
-  // TODO Simplify implementation
-  std::vector<int32_t> lhs_normalized_dims;
-  std::vector<int32_t> rhs_normalized_dims;
-
-  for (uint32_t n = 0; n < out_rank - lhs_rank; ++n)
-  {
-    lhs_normalized_dims.emplace_back(1);
-  }
-  for (uint32_t axis = 0; axis < lhs_rank; ++axis)
-  {
-    lhs_normalized_dims.emplace_back(lhs_shape.dim(axis));
-  }
-
-  for (uint32_t n = 0; n < out_rank - rhs_rank; ++n)
-  {
-    rhs_normalized_dims.emplace_back(1);
-  }
-  for (uint32_t axis = 0; axis < rhs_rank; ++axis)
-  {
-    rhs_normalized_dims.emplace_back(rhs_shape.dim(axis));
-  }
-
-  nnfw::misc::tensor::Shape out_shape(out_rank);
-
-  for (uint32_t axis = 0; axis < out_rank; ++axis)
-  {
-    out_shape.dim(axis) = std::max(lhs_normalized_dims.at(axis), rhs_normalized_dims.at(axis));
-  }
-
-  return out_shape;
-}
-
-} // namespace tflite
-} // namespace nnfw
diff --git a/libs/tflite/src/ext/kernels/Abs.cpp b/libs/tflite/src/ext/kernels/Abs.cpp
deleted file mode 100644
index 7e9c2338d..000000000
--- a/libs/tflite/src/ext/kernels/Abs.cpp
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "tflite/ext/kernels/Abs.h"
-#include "tensorflow/contrib/lite/kernels/kernel_util.h"
-
-#include <iostream>
-#include <cmath>
-
-namespace nnfw
-{
-namespace tflite
-{
-namespace custom
-{
-namespace Abs
-{
-
-void *InitAbs(TfLiteContext *context, const char *buffer, size_t length) { return nullptr; }
-
-void FreeAbs(TfLiteContext *context, void *buffer) {}
-
-TfLiteStatus PrepareAbs(TfLiteContext *context, TfLiteNode *node)
-{
-  TF_LITE_ENSURE_EQ(context, ::tflite::NumInputs(node), 1);
-  TF_LITE_ENSURE_EQ(context, ::tflite::NumOutputs(node), 1);
-
-  const TfLiteTensor *input = ::tflite::GetInput(context, node, 0);
-  TfLiteTensor *output = ::tflite::GetOutput(context, node, 0);
-
-  TF_LITE_ENSURE_EQ(context, input->type, output->type);
-
-  return context->ResizeTensor(context, output, TfLiteIntArrayCopy(input->dims));
-}
-
-TfLiteStatus EvalAbs(TfLiteContext *context, TfLiteNode *node)
-{
-  const TfLiteTensor *input = ::tflite::GetInput(context, node, 0);
-  TfLiteTensor *output = ::tflite::GetOutput(context, node, 0);
-  size_t elements = ::tflite::NumElements(input);
-  switch (input->type)
-  {
-    case kTfLiteFloat32:
-    {
-      auto *in = input->data.f;
-      auto *in_end = in + elements;
-      auto *out = output->data.f;
-      for (; in < in_end; in++, out++)
-        *out = std::abs(*in);
-      return kTfLiteOk;
-    }
-    case kTfLiteInt32:
-    {
-      auto *in = input->data.i32;
-      auto *in_end = in + elements;
-      auto *out = output->data.i32;
-      for (; in < in_end; in++, out++)
-        *out = std::abs(*in);
-      return kTfLiteOk;
-    }
-    case kTfLiteInt64:
-    {
-      auto *in = input->data.i64;
-      auto *in_end = in + elements;
-      auto *out = output->data.i64;
-      for (; in < in_end; in++, out++)
-        *out = std::abs(*in);
-      return kTfLiteOk;
-    }
-    case kTfLiteUInt8:
-    {
-      auto *in = input->data.uint8;
-      auto *in_end = in + elements;
-      auto *out = output->data.uint8;
-      for (; in < in_end; in++, out++)
-        *out = std::abs(*in);
-      return kTfLiteOk;
-    }
-    default:
-    {
-      context->ReportError(context, "Input type %d is not supported", input->type);
-      return kTfLiteError;
-    }
-  }
-}
-
-} // namespace Abs
-} // namespace custom
-} // namespace tflite
-} // namespace nnfw
diff --git a/libs/tflite/src/ext/kernels/SquaredDifference.cpp b/libs/tflite/src/ext/kernels/SquaredDifference.cpp
deleted file mode 100644
index 8ac2b1de0..000000000
--- a/libs/tflite/src/ext/kernels/SquaredDifference.cpp
+++ /dev/null
@@ -1,112 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "tflite/ext/kernels/SquaredDifference.h"
-#include "tensorflow/contrib/lite/kernels/kernel_util.h"
-
-#include <iostream>
-
-namespace nnfw
-{
-namespace tflite
-{
-namespace custom
-{
-namespace SquaredDifference
-{
-
-void *InitSquaredDifference(TfLiteContext *context, const char *buffer, size_t length)
-{
-  return nullptr;
-}
-
-void FreeSquaredDifference(TfLiteContext *context, void *buffer) {}
-
-TfLiteStatus PrepareSquaredDifference(TfLiteContext *context, TfLiteNode *node)
-{
-  TF_LITE_ENSURE_EQ(context, ::tflite::NumInputs(node), 2);
-  TF_LITE_ENSURE_EQ(context, ::tflite::NumOutputs(node), 1);
-
-  const TfLiteTensor *input1 = ::tflite::GetInput(context, node, 0);
-  const TfLiteTensor *input2 = ::tflite::GetInput(context, node, 1);
-  TfLiteTensor *output = ::tflite::GetOutput(context, node, 0);
-
-  TF_LITE_ENSURE_EQ(context, input1->type, input2->type);
-  TF_LITE_ENSURE_EQ(context, input1->type, output->type);
-
-  return context->ResizeTensor(context, output, TfLiteIntArrayCopy(input1->dims));
-}
-
-TfLiteStatus EvalSquaredDifference(TfLiteContext *context, TfLiteNode *node)
-{
-
-  const TfLiteTensor *input1 = ::tflite::GetInput(context, node, 0);
-  const TfLiteTensor *input2 = ::tflite::GetInput(context, node, 1);
-
-  TfLiteTensor *output = ::tflite::GetOutput(context, node, 0);
-
-  size_t elements = ::tflite::NumElements(input1);
-
-  switch (input1->type)
-  {
-    case kTfLiteFloat32:
-    {
-      const float *in1 = input1->data.f;
-      const float *in2 = input2->data.f;
-      const float *in_end1 = in1 + elements;
-      float *out = output->data.f;
-
-      for (; in1 < in_end1; in1++, in2++, out++)
-        *out = ((*in1 - *in2) * (*in1 - *in2));
-
-      return kTfLiteOk;
-    }
-    case kTfLiteInt32:
-    {
-      const int *in1 = input1->data.i32;
-      const int *in2 = input2->data.i32;
-      const int *in_end1 = in1 + elements;
-      int *out = output->data.i32;
-
-      for (; in1 < in_end1; in1++, in2++, out++)
-        *out = ((*in1 - *in2) * (*in1 - *in2));
-
-      return kTfLiteOk;
-    }
-    case kTfLiteInt64:
-    {
-      const int64_t *in1 = input1->data.i64;
-      const int64_t *in2 = input1->data.i64;
-      const int64_t *in_end1 = in1 + elements;
-      int64_t *out = output->data.i64;
-
-      for (; in1 < in_end1; in1++, in2++, out++)
-        *out = ((*in1 - *in2) * (*in1 - *in2));
-
-      return kTfLiteOk;
-    }
-    default:
-    {
-      context->ReportError(context, "InputType is %d Unsupported", input1->type);
-      return kTfLiteError;
-    }
-  }
-}
-
-} // namespace SquaredDifference
-} // namespace custom
-} // namespace tflite
-} // namespace nnfw
diff --git a/libs/tflite/src/ext/kernels/TensorFlowMax.cpp b/libs/tflite/src/ext/kernels/TensorFlowMax.cpp
deleted file mode 100644
index d72ad242c..000000000
--- a/libs/tflite/src/ext/kernels/TensorFlowMax.cpp
+++ /dev/null
@@ -1,405 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "tflite/ext/kernels/TensorFlowMax.h"
-#include "tensorflow/contrib/lite/kernels/kernel_util.h"
-
-#include <iostream>
-
-namespace nnfw
-{
-namespace tflite
-{
-namespace custom
-{
-namespace TensorFlowMax
-{
-
-struct TensorFlowMaxOp
-{
-  TensorFlowMaxOp(TfLiteContext *context, TfLiteNode *node)
-  {
-    input = ::tflite::GetInput(context, node, 0);
-    axis = ::tflite::GetInput(context, node, 1);
-    output = ::tflite::GetOutput(context, node, 0);
-  }
-  const TfLiteTensor *input;
-  const TfLiteTensor *axis;
-  TfLiteTensor *output;
-};
-
-void *InitTensorFlowMax(TfLiteContext *context, const char *buffer, size_t length)
-{
-  // Creates two temp tensors to store index and axis for internal
-  // implementation only.
-  auto *scratch_tensor_index = new int;
-  context->AddTensors(context, 2, scratch_tensor_index);
-  return scratch_tensor_index;
-}
-
-void FreeTensorFlowMax(TfLiteContext *context, void *buffer)
-{
-  delete static_cast<TensorFlowMaxOp *>(buffer);
-}
-
-// Resizes the temp tensor that stores resolved axis.
-TfLiteStatus ResizeTempAxis(TfLiteContext *context, TensorFlowMaxOp *op_context,
-                            TfLiteTensor *resolved_axis)
-{
-  TfLiteIntArray *axis_size = TfLiteIntArrayCreate(1);
-  axis_size->data[0] = static_cast<int>(::tflite::NumElements(op_context->axis));
-  return context->ResizeTensor(context, resolved_axis, axis_size);
-}
-
-// Resizes output array based on the input size and resolved axis.
-TfLiteStatus ResizeOutputTensor(TfLiteContext *context, TensorFlowMaxOp *op_context)
-{
-  size_t num_axis = ::tflite::NumElements(op_context->axis);
-  TfLiteIntArray *input_dims = op_context->input->dims;
-  int input_num_dims = ::tflite::NumDimensions(op_context->input);
-  const int *axis = op_context->axis->data.i32;
-
-  {
-    // Calculates size of reducing axis.
-    int num_reduce_axis = num_axis;
-    for (int i = 0; i < num_axis; ++i)
-    {
-      int current = axis[i];
-      if (current < 0)
-      {
-        current += input_num_dims;
-      }
-      TF_LITE_ENSURE(context, current >= 0 && current < input_num_dims);
-      for (int j = 0; j < i; ++j)
-      {
-        int previous = axis[j];
-        if (previous < 0)
-        {
-          previous += input_num_dims;
-        }
-        if (current == previous)
-        {
-          --num_reduce_axis;
-          break;
-        }
-      }
-    }
-    // Determines output dimensions.
-    int output_num_dims = ::tflite::NumDimensions(op_context->output);
-    TF_LITE_ENSURE(context, (input_num_dims == output_num_dims) ||
-                                (input_num_dims - num_reduce_axis == output_num_dims));
-
-    if (input_num_dims == output_num_dims)
-    {
-      TfLiteIntArray *output_dims = TfLiteIntArrayCopy(input_dims);
-      for (int axis_idx = 0; axis_idx < num_axis; ++axis_idx)
-      {
-        int current = axis[axis_idx];
-        output_dims->data[current] = 1;
-      }
-      return context->ResizeTensor(context, op_context->output, output_dims);
-    }
-    else
-    {
-      TfLiteIntArray *output_dims = TfLiteIntArrayCreate(output_num_dims);
-      int num_skip_axis = 0;
-      for (int idx = 0; idx < input_num_dims; ++idx)
-      {
-        bool is_axis = false;
-        for (int axis_idx = 0; axis_idx < num_axis; ++axis_idx)
-        {
-          if (axis[axis_idx] == idx || axis[axis_idx] + input_num_dims == idx)
-          {
-            ++num_skip_axis;
-            is_axis = true;
-            break;
-          }
-        }
-        if (!is_axis)
-        {
-          output_dims->data[idx - num_skip_axis] = input_dims->data[idx];
-        }
-      }
-      return context->ResizeTensor(context, op_context->output, output_dims);
-    }
-  }
-}
-
-// Initializes temp tensors to store index and resolved axis.
-TfLiteStatus InitializeTemporaries(TfLiteContext *context, TfLiteNode *node,
-                                   TensorFlowMaxOp *op_context)
-{
-  // Creates a temp index to iterate through input data.
-  int *scratch_tensor_index = reinterpret_cast<int *>(node->user_data);
-  TfLiteIntArrayFree(node->temporaries);
-  node->temporaries = TfLiteIntArrayCreate(2);
-  node->temporaries->data[0] = *scratch_tensor_index;
-  TfLiteTensor *scratch_tensor = &context->tensors[node->temporaries->data[0]];
-  scratch_tensor->type = kTfLiteInt32;
-  scratch_tensor->allocation_type = kTfLiteArenaRw;
-  TfLiteIntArray *index_size = TfLiteIntArrayCreate(1);
-  index_size->data[0] = ::tflite::NumDimensions(op_context->input);
-  TF_LITE_ENSURE_OK(context, context->ResizeTensor(context, scratch_tensor, index_size));
-
-  // Creates a temp tensor to store resolved axis given input data.
-  node->temporaries->data[1] = *scratch_tensor_index + 1;
-  TfLiteTensor *resolved_axis = &context->tensors[node->temporaries->data[1]];
-  resolved_axis->type = kTfLiteInt32;
-  return kTfLiteOk;
-}
-
-TfLiteStatus PrepareTensorFlowMax(TfLiteContext *context, TfLiteNode *node)
-{
-  TF_LITE_ENSURE_EQ(context, ::tflite::NumInputs(node), 2);
-  TF_LITE_ENSURE_EQ(context, ::tflite::NumOutputs(node), 1);
-
-  TensorFlowMaxOp op_context(context, node);
-  TF_LITE_ENSURE_OK(context, InitializeTemporaries(context, node, &op_context));
-
-  TfLiteTensor *resolved_axis = &context->tensors[node->temporaries->data[1]];
-  // Leaves work to Eval if axis is not constant; else resizes output.
-  if (!::tflite::IsConstantTensor(op_context.axis))
-  {
-    ::tflite::SetTensorToDynamic(op_context.output);
-    ::tflite::SetTensorToDynamic(resolved_axis);
-    return kTfLiteOk;
-  }
-  resolved_axis->allocation_type = kTfLiteArenaRw;
-  TF_LITE_ENSURE_OK(context, ResizeTempAxis(context, &op_context, resolved_axis));
-  return ResizeOutputTensor(context, &op_context);
-}
-
-// Gets offset of index if expanded on axis. When expanded, the flattened offset
-// will not change, if the output index changes on the given axis. For example,
-// if you have a 2D tensor and you are expanding to 3D on axis 0,
-// then index (0, 1, 2) and index (1, 1, 2) will map from the same flattened
-// offset.
-inline size_t ExpandedInputOffset(const int num_dims, const int *dims, const int *index,
-                                  const int num_axis, const int *axis)
-{
-  size_t offset = 0;
-  int out_idx = 0;
-  for (int in_idx = 0; in_idx < num_dims; ++in_idx)
-  {
-    // if we need to expand this axis
-    bool is_axis = false;
-    if (axis != nullptr)
-    {
-      for (int axis_idx = 0; axis_idx < num_axis; ++axis_idx)
-      {
-        if (in_idx == axis[axis_idx])
-        {
-          is_axis = true;
-          break;
-        }
-      }
-    }
-    if (!is_axis)
-    {
-      offset = offset * static_cast<size_t>(dims[in_idx]) + static_cast<size_t>(index[out_idx]);
-      out_idx++;
-    }
-    else
-    {
-      offset = offset * static_cast<size_t>(dims[in_idx]);
-    }
-  }
-  return offset;
-}
-
-// Gets offset of index if reducing on axis. When reducing, the flattened offset
-// will not change, if the input index changes on the given axis. For example,
-// if you have a 3D tensor and you are reducing to 2D by eliminating axis 0,
-// then index (0, 1, 2) and index (1, 1, 2) will map to the same flattened
-// offset.
-// TODO(kanlig): uses Dims to represent dimensions.
-inline size_t ReducedOutputOffset(const int num_dims, const int *dims, const int *index,
-                                  const int num_axis, const int *axis)
-{
-  size_t offset = 0;
-  for (int idx = 0; idx < num_dims; ++idx)
-  {
-    // if we need to skip this axis
-    bool is_axis = false;
-    if (axis != nullptr)
-    {
-      for (int axis_idx = 0; axis_idx < num_axis; ++axis_idx)
-      {
-        if (idx == axis[axis_idx])
-        {
-          is_axis = true;
-          break;
-        }
-      }
-    }
-    if (!is_axis)
-    {
-      offset = offset * static_cast<size_t>(dims[idx]) + static_cast<size_t>(index[idx]);
-    }
-  }
-  return offset;
-}
-
-// Gets next index to iterate through a multidimensional array.
-inline bool NextIndex(TfLiteContext *context, const int num_dims, const int *dims, int *current)
-{
-  int carry = 1;
-  for (int idx = num_dims - 1; idx >= 0; --idx)
-  {
-    int current_val = current[idx] + carry;
-    TF_LITE_ENSURE(context, (dims[idx] >= current_val));
-    if (dims[idx] == current_val)
-    {
-      current[idx] = 0;
-    }
-    else
-    {
-      current[idx] = current_val;
-      carry = 0;
-      break;
-    }
-  }
-  return (carry == 0);
-}
-
-template <typename T>
-inline TfLiteStatus
-CustomMax(TfLiteContext *context, T *input_data, const int *input_dims, const int input_num_dims,
-          T *output_data, const int *output_dims, const int output_num_dims, const int *axis,
-          const int num_axis_dimensions, bool keep_dims, int *temp_index, int *resolved_axis)
-{
-  // resolves axis.
-  int num_resolved_axis = 0;
-  for (int idx = 0; idx < num_axis_dimensions; ++idx)
-  {
-    int current = axis[idx];
-    TF_LITE_ENSURE(context, (current < input_num_dims && current + input_num_dims >= 0));
-    if (current < 0)
-    {
-      current += input_num_dims;
-    }
-    bool is_dup = false;
-    for (int j = 0; j < num_resolved_axis; ++j)
-    {
-      if (resolved_axis[j] == current)
-      {
-        is_dup = true;
-        break;
-      }
-    }
-    if (!is_dup)
-    {
-      resolved_axis[num_resolved_axis++] = current;
-    }
-  }
-
-  TF_LITE_ENSURE(context, (input_num_dims > 0));
-  TF_LITE_ENSURE(context, (input_dims != nullptr));
-  TF_LITE_ENSURE(context, (temp_index != nullptr));
-
-  // resets output data.
-  for (int idx = 0; idx < output_num_dims; ++idx)
-  {
-    temp_index[idx] = 0;
-  }
-  for (bool has_next = true; has_next;
-       has_next = NextIndex(context, output_num_dims, output_dims, temp_index))
-  {
-    size_t output_offset =
-        ReducedOutputOffset(output_num_dims, output_dims, temp_index, 0, nullptr);
-    size_t input_offset = ExpandedInputOffset(input_num_dims, input_dims, temp_index,
-                                              num_resolved_axis, resolved_axis);
-    output_data[output_offset] = input_data[input_offset];
-  }
-
-  // resets temp index.
-  for (int idx = 0; idx < input_num_dims; ++idx)
-  {
-    temp_index[idx] = 0;
-  }
-
-  // iterates through input_data.
-  for (bool has_next = true; has_next;
-       has_next = NextIndex(context, input_num_dims, input_dims, temp_index))
-  {
-    size_t input_offset = ReducedOutputOffset(input_num_dims, input_dims, temp_index, 0, nullptr);
-    size_t output_offset = ReducedOutputOffset(input_num_dims, input_dims, temp_index,
-                                               num_resolved_axis, resolved_axis);
-    if (output_data[output_offset] < input_data[input_offset])
-    {
-      output_data[output_offset] = input_data[input_offset];
-    }
-  }
-
-  return kTfLiteOk;
-}
-
-TfLiteStatus EvalTensorFlowMax(TfLiteContext *context, TfLiteNode *node)
-{
-
-  TensorFlowMaxOp op_context(context, node);
-  int num_axis = static_cast<int>(::tflite::NumElements(op_context.axis));
-  TfLiteTensor *temp_index = &context->tensors[node->temporaries->data[0]];
-  TfLiteTensor *resolved_axis = &context->tensors[node->temporaries->data[1]];
-  // Resize the output tensor if the output tensor is dynamic.
-  if (::tflite::IsDynamicTensor(op_context.output))
-  {
-    TF_LITE_ENSURE_OK(context, ResizeTempAxis(context, &op_context, resolved_axis));
-    TF_LITE_ENSURE_OK(context, ResizeOutputTensor(context, &op_context));
-  }
-
-  TfLiteStatus returnStatus = kTfLiteOk;
-  switch (op_context.input->type)
-  {
-    case kTfLiteFloat32:
-      returnStatus = CustomMax<float>(
-          context, op_context.input->data.f, op_context.input->dims->data,
-          op_context.input->dims->size, op_context.output->data.f, op_context.output->dims->data,
-          op_context.output->dims->size, op_context.axis->data.i32, num_axis, false,
-          temp_index->data.i32, resolved_axis->data.i32);
-      break;
-    case kTfLiteInt32:
-      returnStatus = CustomMax<int>(context, op_context.input->data.i32,
-                                    op_context.input->dims->data, op_context.input->dims->size,
-                                    op_context.output->data.i32, op_context.output->dims->data,
-                                    op_context.output->dims->size, op_context.axis->data.i32,
-                                    num_axis, false, temp_index->data.i32, resolved_axis->data.i32);
-      break;
-    case kTfLiteUInt8:
-      returnStatus = CustomMax<uint8_t>(
-          context, op_context.input->data.uint8, op_context.input->dims->data,
-          op_context.input->dims->size, op_context.output->data.uint8,
-          op_context.output->dims->data, op_context.output->dims->size, op_context.axis->data.i32,
-          num_axis, false, temp_index->data.i32, resolved_axis->data.i32);
-      break;
-    case kTfLiteInt64:
-      returnStatus = CustomMax<int64_t>(
-          context, op_context.input->data.i64, op_context.input->dims->data,
-          op_context.input->dims->size, op_context.output->data.i64, op_context.output->dims->data,
-          op_context.output->dims->size, op_context.axis->data.i32, num_axis, false,
-          temp_index->data.i32, resolved_axis->data.i32);
-      break;
-    default:
-      returnStatus = kTfLiteError;
-  }
-
-  return returnStatus;
-}
-
-} // namespace TensorFlowMax
-} // namespace custom
-} // namespace tflite
-} // namespace nnfw
diff --git a/libs/tflite/src/ext/kernels/TensorFlowSum.cpp b/libs/tflite/src/ext/kernels/TensorFlowSum.cpp
deleted file mode 100644
index cbf97970c..000000000
--- a/libs/tflite/src/ext/kernels/TensorFlowSum.cpp
+++ /dev/null
@@ -1,400 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "tflite/ext/kernels/TensorFlowSum.h"
-#include "tensorflow/contrib/lite/kernels/kernel_util.h"
-
-#include <iostream>
-
-namespace nnfw
-{
-namespace tflite
-{
-namespace custom
-{
-namespace TensorFlowSum
-{
-
-struct TensorFlowSumOp
-{
-  TensorFlowSumOp(TfLiteContext *context, TfLiteNode *node)
-  {
-    input = ::tflite::GetInput(context, node, 0);
-    axis = ::tflite::GetInput(context, node, 1);
-    output = ::tflite::GetOutput(context, node, 0);
-  }
-  const TfLiteTensor *input;
-  const TfLiteTensor *axis;
-  TfLiteTensor *output;
-};
-
-void *InitTensorFlowSum(TfLiteContext *context, const char *buffer, size_t length)
-{
-  // Creates two temp tensors to store index and axis for internal
-  // implementation only.
-  auto *scratch_tensor_index = new int;
-  context->AddTensors(context, 2, scratch_tensor_index);
-  return scratch_tensor_index;
-}
-
-void FreeTensorFlowSum(TfLiteContext *context, void *buffer)
-{
-  delete static_cast<TensorFlowSumOp *>(buffer);
-}
-
-// Resizes the temp tensor that stores resolved axis.
-TfLiteStatus ResizeTempAxis(TfLiteContext *context, TensorFlowSumOp *op_context,
-                            TfLiteTensor *resolved_axis)
-{
-  TfLiteIntArray *axis_size = TfLiteIntArrayCreate(1);
-  axis_size->data[0] = static_cast<int>(::tflite::NumElements(op_context->axis));
-  return context->ResizeTensor(context, resolved_axis, axis_size);
-}
-
-// Resizes output array based on the input size and resolved axis.
-TfLiteStatus ResizeOutputTensor(TfLiteContext *context, TensorFlowSumOp *op_context)
-{
-  size_t num_axis = ::tflite::NumElements(op_context->axis);
-  TfLiteIntArray *input_dims = op_context->input->dims;
-  int input_num_dims = ::tflite::NumDimensions(op_context->input);
-  const int *axis = op_context->axis->data.i32;
-
-  {
-    // Calculates size of reducing axis.
-    int num_reduce_axis = num_axis;
-    for (int i = 0; i < num_axis; ++i)
-    {
-      int current = axis[i];
-      if (current < 0)
-      {
-        current += input_num_dims;
-      }
-      TF_LITE_ENSURE(context, current >= 0 && current < input_num_dims);
-      for (int j = 0; j < i; ++j)
-      {
-        int previous = axis[j];
-        if (previous < 0)
-        {
-          previous += input_num_dims;
-        }
-        if (current == previous)
-        {
-          --num_reduce_axis;
-          break;
-        }
-      }
-    }
-    // Determines output dimensions.
-    int output_num_dims = ::tflite::NumDimensions(op_context->output);
-    TF_LITE_ENSURE(context, (input_num_dims == output_num_dims) ||
-                                (input_num_dims - num_reduce_axis == output_num_dims));
-
-    if (input_num_dims == output_num_dims)
-    {
-      TfLiteIntArray *output_dims = TfLiteIntArrayCopy(input_dims);
-      for (int axis_idx = 0; axis_idx < num_axis; ++axis_idx)
-      {
-        int current = axis[axis_idx];
-        output_dims->data[current] = 1;
-      }
-      return context->ResizeTensor(context, op_context->output, output_dims);
-    }
-    else
-    {
-      TfLiteIntArray *output_dims = TfLiteIntArrayCreate(output_num_dims);
-      int num_skip_axis = 0;
-      for (int idx = 0; idx < input_num_dims; ++idx)
-      {
-        bool is_axis = false;
-        for (int axis_idx = 0; axis_idx < num_axis; ++axis_idx)
-        {
-          if (axis[axis_idx] == idx || axis[axis_idx] + input_num_dims == idx)
-          {
-            ++num_skip_axis;
-            is_axis = true;
-            break;
-          }
-        }
-        if (!is_axis)
-        {
-          output_dims->data[idx - num_skip_axis] = input_dims->data[idx];
-        }
-      }
-      return context->ResizeTensor(context, op_context->output, output_dims);
-    }
-  }
-}
-
-// Initializes temp tensors to store index and resolved axis.
-TfLiteStatus InitializeTemporaries(TfLiteContext *context, TfLiteNode *node,
-                                   TensorFlowSumOp *op_context)
-{
-  // Creates a temp index to iterate through input data.
-  int *scratch_tensor_index = reinterpret_cast<int *>(node->user_data);
-  TfLiteIntArrayFree(node->temporaries);
-  node->temporaries = TfLiteIntArrayCreate(2);
-  node->temporaries->data[0] = *scratch_tensor_index;
-  TfLiteTensor *scratch_tensor = &context->tensors[node->temporaries->data[0]];
-  scratch_tensor->type = kTfLiteInt32;
-  scratch_tensor->allocation_type = kTfLiteArenaRw;
-  TfLiteIntArray *index_size = TfLiteIntArrayCreate(1);
-  index_size->data[0] = ::tflite::NumDimensions(op_context->input);
-  TF_LITE_ENSURE_OK(context, context->ResizeTensor(context, scratch_tensor, index_size));
-
-  // Creates a temp tensor to store resolved axis given input data.
-  node->temporaries->data[1] = *scratch_tensor_index + 1;
-  TfLiteTensor *resolved_axis = &context->tensors[node->temporaries->data[1]];
-  resolved_axis->type = kTfLiteInt32;
-  return kTfLiteOk;
-}
-
-TfLiteStatus PrepareTensorFlowSum(TfLiteContext *context, TfLiteNode *node)
-{
-  TF_LITE_ENSURE_EQ(context, ::tflite::NumInputs(node), 2);
-  TF_LITE_ENSURE_EQ(context, ::tflite::NumOutputs(node), 1);
-
-  TensorFlowSumOp op_context(context, node);
-  TF_LITE_ENSURE_OK(context, InitializeTemporaries(context, node, &op_context));
-
-  TfLiteTensor *resolved_axis = &context->tensors[node->temporaries->data[1]];
-  // Leaves work to Eval if axis is not constant; else resizes output.
-  if (!::tflite::IsConstantTensor(op_context.axis))
-  {
-    ::tflite::SetTensorToDynamic(op_context.output);
-    ::tflite::SetTensorToDynamic(resolved_axis);
-    return kTfLiteOk;
-  }
-  resolved_axis->allocation_type = kTfLiteArenaRw;
-  TF_LITE_ENSURE_OK(context, ResizeTempAxis(context, &op_context, resolved_axis));
-  return ResizeOutputTensor(context, &op_context);
-}
-
-// Gets offset of index if expanded on axis. When expanded, the flattened offset
-// will not change, if the output index changes on the given axis. For example,
-// if you have a 2D tensor and you are expanding to 3D on axis 0,
-// then index (0, 1, 2) and index (1, 1, 2) will map from the same flattened
-// offset.
-inline size_t ExpandedInputOffset(const int num_dims, const int *dims, const int *index,
-                                  const int num_axis, const int *axis)
-{
-  size_t offset = 0;
-  int out_idx = 0;
-  for (int in_idx = 0; in_idx < num_dims; ++in_idx)
-  {
-    // if we need to expand this axis
-    bool is_axis = false;
-    if (axis != nullptr)
-    {
-      for (int axis_idx = 0; axis_idx < num_axis; ++axis_idx)
-      {
-        if (in_idx == axis[axis_idx])
-        {
-          is_axis = true;
-          break;
-        }
-      }
-    }
-    if (!is_axis)
-    {
-      offset = offset * static_cast<size_t>(dims[in_idx]) + static_cast<size_t>(index[out_idx]);
-      out_idx++;
-    }
-    else
-    {
-      offset = offset * static_cast<size_t>(dims[in_idx]);
-    }
-  }
-  return offset;
-}
-
-// Gets offset of index if reducing on axis. When reducing, the flattened offset
-// will not change, if the input index changes on the given axis. For example,
-// if you have a 3D tensor and you are reducing to 2D by eliminating axis 0,
-// then index (0, 1, 2) and index (1, 1, 2) will map to the same flattened
-// offset.
-// TODO(kanlig): uses Dims to represent dimensions.
-inline size_t ReducedOutputOffset(const int num_dims, const int *dims, const int *index,
-                                  const int num_axis, const int *axis)
-{
-  size_t offset = 0;
-  for (int idx = 0; idx < num_dims; ++idx)
-  {
-    // if we need to skip this axis
-    bool is_axis = false;
-    if (axis != nullptr)
-    {
-      for (int axis_idx = 0; axis_idx < num_axis; ++axis_idx)
-      {
-        if (idx == axis[axis_idx])
-        {
-          is_axis = true;
-          break;
-        }
-      }
-    }
-    if (!is_axis)
-    {
-      offset = offset * static_cast<size_t>(dims[idx]) + static_cast<size_t>(index[idx]);
-    }
-  }
-  return offset;
-}
-
-// Gets next index to iterate through a multidimensional array.
-inline bool NextIndex(TfLiteContext *context, const int num_dims, const int *dims, int *current)
-{
-  int carry = 1;
-  for (int idx = num_dims - 1; idx >= 0; --idx)
-  {
-    int current_val = current[idx] + carry;
-    TF_LITE_ENSURE(context, (dims[idx] >= current_val));
-    if (dims[idx] == current_val)
-    {
-      current[idx] = 0;
-    }
-    else
-    {
-      current[idx] = current_val;
-      carry = 0;
-      break;
-    }
-  }
-  return (carry == 0);
-}
-
-template <typename T>
-inline TfLiteStatus
-CustomSum(TfLiteContext *context, T *input_data, const int *input_dims, const int input_num_dims,
-          T *output_data, const int *output_dims, const int output_num_dims, const int *axis,
-          const int num_axis_dimensions, bool keep_dims, int *temp_index, int *resolved_axis)
-{
-  // resolves axis.
-  int num_resolved_axis = 0;
-  for (int idx = 0; idx < num_axis_dimensions; ++idx)
-  {
-    int current = axis[idx];
-    TF_LITE_ENSURE(context, (current < input_num_dims && current + input_num_dims >= 0));
-    if (current < 0)
-    {
-      current += input_num_dims;
-    }
-    bool is_dup = false;
-    for (int j = 0; j < num_resolved_axis; ++j)
-    {
-      if (resolved_axis[j] == current)
-      {
-        is_dup = true;
-        break;
-      }
-    }
-    if (!is_dup)
-    {
-      resolved_axis[num_resolved_axis++] = current;
-    }
-  }
-
-  TF_LITE_ENSURE(context, (input_num_dims > 0));
-  TF_LITE_ENSURE(context, (input_dims != nullptr));
-  TF_LITE_ENSURE(context, (temp_index != nullptr));
-
-  // resets output data.
-  for (int idx = 0; idx < output_num_dims; ++idx)
-  {
-    temp_index[idx] = 0;
-  }
-  for (bool has_next = true; has_next;
-       has_next = NextIndex(context, output_num_dims, output_dims, temp_index))
-  {
-    size_t output_offset =
-        ReducedOutputOffset(output_num_dims, output_dims, temp_index, 0, nullptr);
-    output_data[output_offset] = 0;
-  }
-
-  // resets temp index.
-  for (int idx = 0; idx < input_num_dims; ++idx)
-  {
-    temp_index[idx] = 0;
-  }
-
-  // iterates through input_data.
-  for (bool has_next = true; has_next;
-       has_next = NextIndex(context, input_num_dims, input_dims, temp_index))
-  {
-    size_t input_offset = ReducedOutputOffset(input_num_dims, input_dims, temp_index, 0, nullptr);
-    size_t output_offset = ReducedOutputOffset(input_num_dims, input_dims, temp_index,
-                                               num_resolved_axis, resolved_axis);
-    output_data[output_offset] += input_data[input_offset];
-  }
-
-  return kTfLiteOk;
-}
-
-TfLiteStatus EvalTensorFlowSum(TfLiteContext *context, TfLiteNode *node)
-{
-
-  TensorFlowSumOp op_context(context, node);
-  int num_axis = static_cast<int>(::tflite::NumElements(op_context.axis));
-  TfLiteTensor *temp_index = &context->tensors[node->temporaries->data[0]];
-  TfLiteTensor *resolved_axis = &context->tensors[node->temporaries->data[1]];
-  // Resize the output tensor if the output tensor is dynamic.
-  if (::tflite::IsDynamicTensor(op_context.output))
-  {
-    TF_LITE_ENSURE_OK(context, ResizeTempAxis(context, &op_context, resolved_axis));
-    TF_LITE_ENSURE_OK(context, ResizeOutputTensor(context, &op_context));
-  }
-
-  TfLiteStatus returnStatus = kTfLiteOk;
-  switch (op_context.input->type)
-  {
-    case kTfLiteFloat32:
-      returnStatus = CustomSum<float>(
-          context, op_context.input->data.f, op_context.input->dims->data,
-          op_context.input->dims->size, op_context.output->data.f, op_context.output->dims->data,
-          op_context.output->dims->size, op_context.axis->data.i32, num_axis, false,
-          temp_index->data.i32, resolved_axis->data.i32);
-      break;
-    case kTfLiteInt32:
-      returnStatus = CustomSum<int>(context, op_context.input->data.i32,
-                                    op_context.input->dims->data, op_context.input->dims->size,
-                                    op_context.output->data.i32, op_context.output->dims->data,
-                                    op_context.output->dims->size, op_context.axis->data.i32,
-                                    num_axis, false, temp_index->data.i32, resolved_axis->data.i32);
-      break;
-    case kTfLiteUInt8:
-      returnStatus = CustomSum<uint8_t>(
-          context, op_context.input->data.uint8, op_context.input->dims->data,
-          op_context.input->dims->size, op_context.output->data.uint8,
-          op_context.output->dims->data, op_context.output->dims->size, op_context.axis->data.i32,
-          num_axis, false, temp_index->data.i32, resolved_axis->data.i32);
-      break;
-    case kTfLiteInt64:
-      returnStatus = CustomSum<int64_t>(
-          context, op_context.input->data.i64, op_context.input->dims->data,
-          op_context.input->dims->size, op_context.output->data.i64, op_context.output->dims->data,
-          op_context.output->dims->size, op_context.axis->data.i32, num_axis, false,
-          temp_index->data.i32, resolved_axis->data.i32);
-      break;
-    default:
-      returnStatus = kTfLiteError;
-  }
-
-  return returnStatus;
-}
-
-} // namespace TensorFlowSum
-} // namespace custom
-} // namespace tflite
-} // namespace nnfw
diff --git a/libs/tflite/src/ext/kernels/register.cpp b/libs/tflite/src/ext/kernels/register.cpp
deleted file mode 100644
index b822bd616..000000000
--- a/libs/tflite/src/ext/kernels/register.cpp
+++ /dev/null
@@ -1,221 +0,0 @@
-/* Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
-   Copyright 2017 The TensorFlow Authors. All Rights Reserved.
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-==============================================================================*/
-
-// NOTE To minimize diff with upstream tensorflow, disable clang-format
-// clang-format off
-
-// NOTE This code is derived from the following file (in TensorFlow)
-//        'externals/tensorflow/tensorflow/contrib/lite/kernels/register.cc'
-#include "tflite/ext/kernels/register.h"
-#include "tflite/ext/kernels/CustomOps.h"
-
-namespace tflite {
-namespace ops {
-namespace builtin {
-
-TfLiteRegistration *Register_RELU();
-TfLiteRegistration *Register_RELU_N1_TO_1();
-TfLiteRegistration *Register_RELU6();
-TfLiteRegistration *Register_TANH();
-TfLiteRegistration *Register_LOGISTIC();
-TfLiteRegistration *Register_AVERAGE_POOL_2D();
-TfLiteRegistration *Register_MAX_POOL_2D();
-TfLiteRegistration *Register_L2_POOL_2D();
-TfLiteRegistration *Register_CONV_2D();
-TfLiteRegistration *Register_DEPTHWISE_CONV_2D();
-TfLiteRegistration *Register_SVDF();
-TfLiteRegistration *Register_RNN();
-TfLiteRegistration *Register_BIDIRECTIONAL_SEQUENCE_RNN();
-TfLiteRegistration *Register_UNIDIRECTIONAL_SEQUENCE_RNN();
-TfLiteRegistration *Register_EMBEDDING_LOOKUP();
-TfLiteRegistration *Register_EMBEDDING_LOOKUP_SPARSE();
-TfLiteRegistration *Register_FULLY_CONNECTED();
-TfLiteRegistration *Register_LSH_PROJECTION();
-TfLiteRegistration *Register_HASHTABLE_LOOKUP();
-TfLiteRegistration *Register_SOFTMAX();
-TfLiteRegistration *Register_CONCATENATION();
-TfLiteRegistration *Register_ADD();
-TfLiteRegistration *Register_SPACE_TO_BATCH_ND();
-TfLiteRegistration *Register_DIV();
-TfLiteRegistration *Register_SUB();
-TfLiteRegistration *Register_BATCH_TO_SPACE_ND();
-TfLiteRegistration *Register_MUL();
-TfLiteRegistration *Register_L2_NORMALIZATION();
-TfLiteRegistration *Register_LOCAL_RESPONSE_NORMALIZATION();
-TfLiteRegistration *Register_LSTM();
-TfLiteRegistration *Register_BIDIRECTIONAL_SEQUENCE_LSTM();
-TfLiteRegistration *Register_UNIDIRECTIONAL_SEQUENCE_LSTM();
-TfLiteRegistration *Register_PAD();
-TfLiteRegistration *Register_PADV2();
-TfLiteRegistration *Register_RESHAPE();
-TfLiteRegistration *Register_RESIZE_BILINEAR();
-TfLiteRegistration *Register_SKIP_GRAM();
-TfLiteRegistration *Register_SPACE_TO_DEPTH();
-TfLiteRegistration *Register_GATHER();
-TfLiteRegistration *Register_TRANSPOSE();
-TfLiteRegistration *Register_MEAN();
-TfLiteRegistration *Register_SPLIT();
-TfLiteRegistration *Register_SQUEEZE();
-TfLiteRegistration *Register_STRIDED_SLICE();
-TfLiteRegistration *Register_EXP();
-TfLiteRegistration *Register_TOPK_V2();
-TfLiteRegistration *Register_LOG_SOFTMAX();
-TfLiteRegistration *Register_CAST();
-TfLiteRegistration *Register_DEQUANTIZE();
-TfLiteRegistration *Register_PRELU();
-TfLiteRegistration *Register_MAXIMUM();
-TfLiteRegistration *Register_MINIMUM();
-TfLiteRegistration *Register_ARG_MAX();
-TfLiteRegistration *Register_GREATER();
-TfLiteRegistration *Register_GREATER_EQUAL();
-TfLiteRegistration *Register_LESS();
-TfLiteRegistration *Register_LESS_EQUAL();
-TfLiteRegistration *Register_FLOOR();
-TfLiteRegistration *Register_NEG();
-TfLiteRegistration *Register_SELECT();
-TfLiteRegistration *Register_SLICE();
-TfLiteRegistration *Register_SIN();
-TfLiteRegistration *Register_TRANSPOSE_CONV();
-TfLiteRegistration *Register_SPARSE_TO_DENSE();
-#ifndef OBS_BUILD
-TfLiteRegistration *Register_SUM();
-TfLiteRegistration *Register_REDUCE_MAX();
-TfLiteRegistration *Register_REDUCE_MIN();
-TfLiteRegistration *Register_EQUAL();
-TfLiteRegistration *Register_NOT_EQUAL();
-TfLiteRegistration *Register_SQRT();
-TfLiteRegistration *Register_RSQRT();
-TfLiteRegistration *Register_SHAPE();
-TfLiteRegistration *Register_POW();
-TfLiteRegistration *Register_FAKE_QUANT();
-TfLiteRegistration *Register_PACK();
-TfLiteRegistration *Register_ONE_HOT();
-TfLiteRegistration *Register_LOGICAL_OR();
-TfLiteRegistration *Register_LOGICAL_AND();
-TfLiteRegistration *Register_LOGICAL_NOT();
-TfLiteRegistration *Register_UNPACK();
-TfLiteRegistration *Register_FLOOR_DIV();
-TfLiteRegistration *Register_SQUARE();
-TfLiteRegistration *Register_ZEROS_LIKE();
-#endif // OBS_BUILD
-
-}  // namespace builtin
-}  // namespace ops
-}  // namespace tflite
-
-namespace nnfw {
-namespace tflite {
-
-BuiltinOpResolver::BuiltinOpResolver()
-{
-  // Using namespace directive to minimize diff with upstream tensorflow
-  using namespace ::tflite::ops::builtin;
-  using namespace ::tflite;
-
-  AddBuiltin(BuiltinOperator_RELU, Register_RELU());
-  AddBuiltin(BuiltinOperator_RELU_N1_TO_1, Register_RELU_N1_TO_1());
-  AddBuiltin(BuiltinOperator_RELU6, Register_RELU6());
-  AddBuiltin(BuiltinOperator_TANH, Register_TANH());
-  AddBuiltin(BuiltinOperator_LOGISTIC, Register_LOGISTIC());
-  AddBuiltin(BuiltinOperator_AVERAGE_POOL_2D, Register_AVERAGE_POOL_2D());
-  AddBuiltin(BuiltinOperator_MAX_POOL_2D, Register_MAX_POOL_2D());
-  AddBuiltin(BuiltinOperator_L2_POOL_2D, Register_L2_POOL_2D());
-  AddBuiltin(BuiltinOperator_CONV_2D, Register_CONV_2D());
-  AddBuiltin(BuiltinOperator_DEPTHWISE_CONV_2D, Register_DEPTHWISE_CONV_2D());
-  AddBuiltin(BuiltinOperator_SVDF, Register_SVDF());
-  AddBuiltin(BuiltinOperator_RNN, Register_RNN());
-  AddBuiltin(BuiltinOperator_BIDIRECTIONAL_SEQUENCE_RNN, Register_BIDIRECTIONAL_SEQUENCE_RNN());
-  AddBuiltin(BuiltinOperator_UNIDIRECTIONAL_SEQUENCE_RNN, Register_UNIDIRECTIONAL_SEQUENCE_RNN());
-  AddBuiltin(BuiltinOperator_EMBEDDING_LOOKUP, Register_EMBEDDING_LOOKUP());
-  AddBuiltin(BuiltinOperator_EMBEDDING_LOOKUP_SPARSE, Register_EMBEDDING_LOOKUP_SPARSE());
-  AddBuiltin(BuiltinOperator_FULLY_CONNECTED, Register_FULLY_CONNECTED());
-  AddBuiltin(BuiltinOperator_LSH_PROJECTION, Register_LSH_PROJECTION());
-  AddBuiltin(BuiltinOperator_HASHTABLE_LOOKUP, Register_HASHTABLE_LOOKUP());
-  AddBuiltin(BuiltinOperator_SOFTMAX, Register_SOFTMAX());
-  AddBuiltin(BuiltinOperator_CONCATENATION, Register_CONCATENATION());
-  AddBuiltin(BuiltinOperator_ADD, Register_ADD());
-  AddBuiltin(BuiltinOperator_SPACE_TO_BATCH_ND, Register_SPACE_TO_BATCH_ND());
-  AddBuiltin(BuiltinOperator_BATCH_TO_SPACE_ND, Register_BATCH_TO_SPACE_ND());
-  AddBuiltin(BuiltinOperator_MUL, Register_MUL());
-  AddBuiltin(BuiltinOperator_L2_NORMALIZATION, Register_L2_NORMALIZATION());
-  AddBuiltin(BuiltinOperator_LOCAL_RESPONSE_NORMALIZATION, Register_LOCAL_RESPONSE_NORMALIZATION());
-  AddBuiltin(BuiltinOperator_LSTM, Register_LSTM());
-  AddBuiltin(BuiltinOperator_BIDIRECTIONAL_SEQUENCE_LSTM, Register_BIDIRECTIONAL_SEQUENCE_LSTM());
-  AddBuiltin(BuiltinOperator_UNIDIRECTIONAL_SEQUENCE_LSTM, Register_UNIDIRECTIONAL_SEQUENCE_LSTM());
-  AddBuiltin(BuiltinOperator_PAD, Register_PAD());
-  AddBuiltin(BuiltinOperator_PADV2, Register_PADV2());
-  AddBuiltin(BuiltinOperator_RESHAPE, Register_RESHAPE());
-  AddBuiltin(BuiltinOperator_RESIZE_BILINEAR, Register_RESIZE_BILINEAR());
-  AddBuiltin(BuiltinOperator_SKIP_GRAM, Register_SKIP_GRAM());
-  AddBuiltin(BuiltinOperator_SPACE_TO_DEPTH, Register_SPACE_TO_DEPTH());
-  AddBuiltin(BuiltinOperator_GATHER, Register_GATHER());
-  AddBuiltin(BuiltinOperator_TRANSPOSE, Register_TRANSPOSE());
-  AddBuiltin(BuiltinOperator_MEAN, Register_MEAN());
-  AddBuiltin(BuiltinOperator_DIV, Register_DIV());
-  AddBuiltin(BuiltinOperator_SUB, Register_SUB());
-  AddBuiltin(BuiltinOperator_SPLIT, Register_SPLIT());
-  AddBuiltin(BuiltinOperator_SQUEEZE, Register_SQUEEZE());
-  AddBuiltin(BuiltinOperator_STRIDED_SLICE, Register_STRIDED_SLICE());
-  AddBuiltin(BuiltinOperator_EXP, Register_EXP());
-  AddBuiltin(BuiltinOperator_TOPK_V2, Register_TOPK_V2());
-  AddBuiltin(BuiltinOperator_LOG_SOFTMAX, Register_LOG_SOFTMAX());
-  AddBuiltin(BuiltinOperator_CAST, Register_CAST());
-  AddBuiltin(BuiltinOperator_DEQUANTIZE, Register_DEQUANTIZE());
-  AddBuiltin(BuiltinOperator_PRELU, Register_PRELU());
-  AddBuiltin(BuiltinOperator_MAXIMUM, Register_MAXIMUM());
-  AddBuiltin(BuiltinOperator_MINIMUM, Register_MINIMUM());
-  AddBuiltin(BuiltinOperator_ARG_MAX, Register_ARG_MAX());
-  AddBuiltin(BuiltinOperator_GREATER, Register_GREATER());
-  AddBuiltin(BuiltinOperator_GREATER_EQUAL, Register_GREATER_EQUAL());
-  AddBuiltin(BuiltinOperator_LESS, Register_LESS());
-  AddBuiltin(BuiltinOperator_LESS_EQUAL, Register_LESS_EQUAL());
-  AddBuiltin(BuiltinOperator_FLOOR, Register_FLOOR());
-  AddBuiltin(BuiltinOperator_NEG, Register_NEG());
-  AddBuiltin(BuiltinOperator_SELECT, Register_SELECT());
-  AddBuiltin(BuiltinOperator_SLICE, Register_SLICE());
-  AddBuiltin(BuiltinOperator_SIN, Register_SIN());
-#ifndef OBS_BUILD
-  AddBuiltin(BuiltinOperator_SUM, Register_SUM());
-  AddBuiltin(BuiltinOperator_REDUCE_MAX, Register_REDUCE_MAX());
-  AddBuiltin(BuiltinOperator_REDUCE_MIN, Register_REDUCE_MIN());
-  AddBuiltin(BuiltinOperator_TRANSPOSE_CONV, Register_TRANSPOSE_CONV());
-  AddBuiltin(BuiltinOperator_SPARSE_TO_DENSE, Register_SPARSE_TO_DENSE());
-  AddBuiltin(BuiltinOperator_EQUAL, Register_EQUAL());
-  AddBuiltin(BuiltinOperator_NOT_EQUAL, Register_NOT_EQUAL());
-  AddBuiltin(BuiltinOperator_SQRT, Register_SQRT());
-  AddBuiltin(BuiltinOperator_RSQRT, Register_RSQRT());
-  AddBuiltin(BuiltinOperator_SHAPE, Register_SHAPE());
-  AddBuiltin(BuiltinOperator_POW, Register_POW());
-  AddBuiltin(BuiltinOperator_FAKE_QUANT, Register_FAKE_QUANT(), 1, 2);
-  AddBuiltin(BuiltinOperator_PACK, Register_PACK());
-  AddBuiltin(BuiltinOperator_ONE_HOT, Register_ONE_HOT());
-  AddBuiltin(BuiltinOperator_LOGICAL_OR, Register_LOGICAL_OR());
-  AddBuiltin(BuiltinOperator_LOGICAL_AND, Register_LOGICAL_AND());
-  AddBuiltin(BuiltinOperator_LOGICAL_NOT, Register_LOGICAL_NOT());
-  AddBuiltin(BuiltinOperator_UNPACK, Register_UNPACK());
-  AddBuiltin(BuiltinOperator_FLOOR_DIV, Register_FLOOR_DIV());
-  AddBuiltin(BuiltinOperator_SQUARE, Register_SQUARE());
-  AddBuiltin(BuiltinOperator_ZEROS_LIKE, Register_ZEROS_LIKE());
-#endif // OBS_BUILD
-
-  AddCustom("TensorFlowMax", nnfw::tflite::custom::Register_TensorFlowMax());
-  AddCustom("SquaredDifference", nnfw::tflite::custom::Register_SquaredDifference());
-  AddCustom("TensorFlowSum", nnfw::tflite::custom::Register_TensorFlowSum());
-  AddCustom("Abs", nnfw::tflite::custom::Register_Abs());
-}
-
-}  // namespace tflite
-}  // namespace nnfw
diff --git a/libs/tflite/src/ext/nnapi_delegate.cpp b/libs/tflite/src/ext/nnapi_delegate.cpp
deleted file mode 100644
index 25858a7b4..000000000
--- a/libs/tflite/src/ext/nnapi_delegate.cpp
+++ /dev/null
@@ -1,1209 +0,0 @@
-/* Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
-   Copyright 2017 The TensorFlow Authors. All Rights Reserved.
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-==============================================================================*/
-
-// NOTE To minimize diff with upstream tensorflow, disable clang-format
-// clang-format off
-
-// NOTE This code is derived from the following file (in TensorFlow v1.12)
-//        'externals/tensorflow/tensorflow/contrib/lite/nnapi_delegate.cc'
-#include "tflite/ext/nnapi_delegate.h"
-#include <fcntl.h>
-#include <sys/mman.h>
-#include <sys/stat.h>
-#include <sys/types.h>
-#ifdef OBS_BUILD
-#include "tensorflow/contrib/lite/builtin_op_data.h"
-#include "tensorflow/contrib/lite/error_reporter.h"
-#else
-#include "tensorflow/contrib/lite/c/builtin_op_data.h"
-#include "tensorflow/contrib/lite/core/api/error_reporter.h"
-#endif
-#include "tensorflow/contrib/lite/model.h"
-#include "NeuralNetworksShim.h"
-#include "NeuralNetworksExShim.h"
-
-#ifdef __ANDROID__
-#include <android/log.h>
-#include <sys/system_properties.h>
-#endif
-
-namespace nnfw {
-namespace tflite {
-
-void logError(const char* format, ...) {
-  // stderr is convenient for native tests, but is not captured for apps
-  va_list args_for_stderr;
-  va_start(args_for_stderr, format);
-  vfprintf(stderr, format, args_for_stderr);
-  va_end(args_for_stderr);
-  fprintf(stderr, "\n");
-  fflush(stderr);
-#ifdef __ANDROID__
-  // produce logcat output for general consumption
-  va_list args_for_log;
-  va_start(args_for_log, format);
-  __android_log_vprint(ANDROID_LOG_ERROR, "tflite", format, args_for_log);
-  va_end(args_for_log);
-#endif
-}
-
-#define FATAL(...)       \
-  logError(__VA_ARGS__); \
-  exit(1);
-
-// TODO(aselle): Change the error model to use status codes.
-#define CHECK_TFLITE_SUCCESS(x)                                           \
-  if (x != kTfLiteOk) {                                                   \
-    FATAL("Aborting since tflite returned failure nnapi_delegate.cc:%d.", \
-          __LINE__);                                                      \
-  }
-
-#define CHECK_NN(x)                                                     \
-  if (x != ANEURALNETWORKS_NO_ERROR) {                                  \
-    FATAL("Aborting since NNAPI returned failure nnapi_delegate.cc:%d", \
-          __LINE__);                                                    \
-  }
-
-#define RETURN_ERROR_IF_TFLITE_FAILED(x)                                       \
-  if (x != kTfLiteOk) {                                                        \
-    logError(                                                                  \
-        "Returning error since TFLite returned failure nnapi_delegate.cc:%d.", \
-        __LINE__);                                                             \
-    return kTfLiteError;                                                       \
-  }
-
-#define RETURN_ERROR_IF_NN_FAILED(x)                                          \
-  if (x != ANEURALNETWORKS_NO_ERROR) {                                        \
-    logError(                                                                 \
-        "Returning error since NNAPI returned failure nnapi_delegate.cc:%d.", \
-        __LINE__);                                                            \
-    return kTfLiteError;                                                      \
-  }
-
-// Tracking of NNAPI operand ids
-static const int64_t kOperandIdNotSet = -1;
-static const int64_t kOperandNotNeeded = -2;
-
-namespace {
-
-int32_t GetAndroidSdkVersion() {
-#ifdef __ANDROID__
-  const char* sdkProp = "ro.build.version.sdk";
-  char sdkVersion[PROP_VALUE_MAX];
-  int length = __system_property_get(sdkProp, sdkVersion);
-  if (length != 0) {
-    for (int i = 0; i < length; ++i) {
-      int digit = sdkVersion[i] - '0';
-      if (digit < 0 || digit > 9) {
-        // Non-numeric SDK version, assume it's higher then expected;
-        return 0xFFFF;
-      }
-    }
-    return atoi(sdkVersion);
-  }
-  FATAL("No %s prop", sdkProp);
-#endif  // __ANDROID__
-  return 0;
-}
-
-int32_t GetAndroidSdkVersionCached() {
-  static int32_t androidSdkVersion = GetAndroidSdkVersion();
-  return androidSdkVersion;
-}
-
-static const uint32_t dimension_for_scalar[1] = {1};
-
-}  // namespace
-
-NNAPIAllocation::NNAPIAllocation(const char* filename,
-                                 ::tflite::ErrorReporter* error_reporter)
-    : MMAPAllocation(filename, error_reporter) {
-  if (mmapped_buffer_ != MAP_FAILED)
-    CHECK_NN(ANeuralNetworksMemory_createFromFd(buffer_size_bytes_, PROT_READ,
-                                                mmap_fd_, 0, &handle_));
-}
-
-NNAPIAllocation::~NNAPIAllocation() {
-  if (handle_) {
-    ANeuralNetworksMemory_free(handle_);
-  }
-}
-
-NNAPIDelegate::~NNAPIDelegate() {
-  if (nn_compiled_model_) {
-    ANeuralNetworksCompilation_free(nn_compiled_model_);
-    nn_compiled_model_ = nullptr;
-  }
-  if (nn_model_) {
-    ANeuralNetworksModel_free(nn_model_);
-    nn_model_ = nullptr;
-    // TODO(aselle): Is this thread-safe and callable multiple times?
-  }
-  // ANeuralNetworksShutdown();
-}
-
-// Adds the tensors of the interpreter to the NN API model.
-TfLiteStatus addTensorOperands(::tflite::Interpreter* interpreter,
-                               ANeuralNetworksModel* nn_model,
-                               uint32_t* no_of_operands_added,
-                               std::vector<int64_t>* nnapi_ids) {
-  uint32_t next_id = 0;
-  for (size_t i = 0; i < interpreter->tensors_size(); i++) {
-    // Skip temporaries and RNN back-edges.
-    if ((*nnapi_ids)[i] == kOperandNotNeeded) continue;
-
-    (*nnapi_ids)[i] = int64_t(next_id);
-
-    int32_t nn_type = 0;
-    // NNAPI requires 32-bit float scale to be zero, tflite doesn't care
-    float scale = 0.0f;
-    int32_t zeroPoint = 0;
-    TfLiteTensor* tensor = interpreter->tensor(i);
-    switch (tensor->type) {
-      case kTfLiteNoType:
-        // Tensors added during initialization of Ops don't have a type yet and
-        // should not be registered with the NNAPI.
-        continue;
-      case kTfLiteFloat32:
-        nn_type = ANEURALNETWORKS_TENSOR_FLOAT32;
-        break;
-      case kTfLiteUInt8:
-        nn_type = ANEURALNETWORKS_TENSOR_QUANT8_ASYMM;
-        scale = tensor->params.scale;
-        // FIXME The next line is a workaround because currently zero scale is
-        // passed down from TF
-        //       Lite.  Note that the latest NeuralNetworks.h (see
-        //       https://android.googlesource.com/platform/frameworks/ml/+/master/nn/runtime/include/NeuralNetworks.h)
-        //       requires scale to be greater than zero.  Remove this workaround
-        //       when the scale
-        //       value is correctly passed.
-        scale = (scale == 0.0f) ? 1.0f : scale;
-        zeroPoint = tensor->params.zero_point;
-        break;
-      case kTfLiteInt32:
-        nn_type = ANEURALNETWORKS_TENSOR_INT32;
-        scale = tensor->params.scale;
-        zeroPoint = tensor->params.zero_point;
-        break;
-      case kTfLiteBool:
-        // Workaround to pass bool type under NNAPI
-        // Use bool type using ANEURALNETWORKS_TENSOR_QUANT8_ASYMM with scale = 1.0f and zero_point = 0
-        nn_type = ANEURALNETWORKS_TENSOR_QUANT8_ASYMM;
-        scale = 1.0f;
-        zeroPoint = 0;
-        break;
-      default:
-        logError("Unsupported tensor type %d", tensor->type);
-        return kTfLiteError;
-    }
-    if (tensor->dims->size == 0) {
-      // WORKAROUND Some model have dimension zero
-      switch (tensor->type) {
-        case kTfLiteFloat32:
-          nn_type = ANEURALNETWORKS_TENSOR_FLOAT32;
-          break;
-        case kTfLiteInt32:
-          nn_type = ANEURALNETWORKS_TENSOR_INT32;
-          break;
-        default:
-          logError("NNAPI doesn't support tensors with rank 0 (index %d name %s)",
-                   i, tensor->name);
-          return kTfLiteError;
-      }
-    }
-    if (tensor->dims->size > 4) {
-      logError("NNAPI doesn't support tensors with rank > 4 (index %d name %s)",
-               i, tensor->name);
-      return kTfLiteError;
-    }
-    // TODO(aselle): Note, many of these are intermediate results. Do I need
-    // to ever specify these sizes. I am currently below doing setValue
-    // on all of them, but I shouldn't in the future.
-    // Answer(jeanluc): If all the operators can set the dimension correctly,
-    // you won't need to.
-    ANeuralNetworksOperandType operand_type{
-        nn_type, static_cast<uint32_t>(tensor->dims->size),
-        reinterpret_cast<uint32_t*>(tensor->dims->data), scale, zeroPoint};
-    if (tensor->dims->size == 0) {
-      // WORKAROUND Some model have dimension zero
-      // Consider scalar as vector size 1
-      operand_type.dimensions = dimension_for_scalar;
-      operand_type.dimensionCount = 1;
-    }
-    RETURN_ERROR_IF_NN_FAILED(
-        ANeuralNetworksModel_addOperand(nn_model, &operand_type));
-    // TODO(aselle): Based on Michael's suggestion, limiting this to read
-    // only memory
-    if (tensor->allocation_type == kTfLiteMmapRo) {
-      if (const NNAPIAllocation* alloc = dynamic_cast<const NNAPIAllocation*>(
-              static_cast<const ::tflite::Allocation*>(tensor->allocation))) {
-        RETURN_ERROR_IF_NN_FAILED(
-            ANeuralNetworksModel_setOperandValueFromMemory(
-                nn_model, next_id, alloc->memory(),
-                alloc->offset(tensor->data.raw), tensor->bytes));
-      } else {
-        RETURN_ERROR_IF_NN_FAILED(ANeuralNetworksModel_setOperandValue(
-            nn_model, next_id, tensor->data.raw, tensor->bytes));
-      }
-    } else if (tensor->bytes == 0) {
-      // These size 0 tensors are optional tensors reserved.
-      RETURN_ERROR_IF_NN_FAILED(
-          ANeuralNetworksModel_setOperandValue(nn_model, next_id, nullptr, 0));
-    }
-
-    ++next_id;
-  }
-  *no_of_operands_added = next_id;
-  return kTfLiteOk;
-}
-
-void MapAndAddTensorIds(const int* from_ids_buf, size_t from_ids_count,
-                        std::vector<uint32_t>* into,
-                        const std::vector<int64_t>& map) {
-  for (size_t i = 0; i < from_ids_count; i++) {
-    int from_id = from_ids_buf[i];
-    if (from_id == kOptionalTensor) {
-      into->push_back(from_id);
-    } else {
-      into->push_back(map[from_id]);
-    }
-  }
-}
-
-// Adds the operations and their parameters to the NN API model.
-// 'next-id' is the operand ID of the next operand of the model.
-TfLiteStatus AddOpsAndParams(
-    ::tflite::Interpreter* interpreter, ANeuralNetworksModel* nn_model,
-    uint32_t next_id, std::vector<int>* model_state_inputs,
-    std::vector<int>* model_state_outputs,
-    const std::vector<int64_t>& tensor_id_to_nnapi_id) {
-  for (size_t i = 0; i < interpreter->nodes_size(); i++) {
-    const auto* node_and_registration = interpreter->node_and_registration(i);
-    const TfLiteNode& node = node_and_registration->first;
-    const TfLiteRegistration& registration = node_and_registration->second;
-    ::tflite::BuiltinOperator builtin =
-        static_cast<::tflite::BuiltinOperator>(registration.builtin_code);
-
-    // Add the parameters.
-    std::vector<uint32_t> augmented_inputs, augmented_outputs;
-    MapAndAddTensorIds(node.inputs->data, node.inputs->size, &augmented_inputs,
-                       tensor_id_to_nnapi_id);
-    MapAndAddTensorIds(node.outputs->data, node.outputs->size,
-                       &augmented_outputs, tensor_id_to_nnapi_id);
-
-    auto add_scalar_int32 = [&nn_model, &augmented_inputs,
-                             &next_id](int value) {
-      ANeuralNetworksOperandType operand_type{.type = ANEURALNETWORKS_INT32};
-      CHECK_NN(ANeuralNetworksModel_addOperand(nn_model, &operand_type))
-      CHECK_NN(ANeuralNetworksModel_setOperandValue(nn_model, next_id, &value,
-                                                    sizeof(int32_t)))
-      augmented_inputs.push_back(next_id++);
-    };
-
-    auto add_scalar_float32 = [&nn_model, &augmented_inputs,
-                               &next_id](float value) {
-      ANeuralNetworksOperandType operand_type{.type = ANEURALNETWORKS_FLOAT32};
-      CHECK_NN(ANeuralNetworksModel_addOperand(nn_model, &operand_type))
-      CHECK_NN(ANeuralNetworksModel_setOperandValue(nn_model, next_id, &value,
-                                                    sizeof(float)))
-      augmented_inputs.push_back(next_id++);
-    };
-
-    auto add_vector_int32 = [&](const int* values, uint32_t num_values) {
-      ANeuralNetworksOperandType operand_type{
-          .type = ANEURALNETWORKS_TENSOR_INT32,
-          .dimensionCount = 1,
-          .dimensions = &num_values};
-      CHECK_NN(ANeuralNetworksModel_addOperand(nn_model, &operand_type))
-      CHECK_NN(ANeuralNetworksModel_setOperandValue(
-          nn_model, next_id, values, sizeof(int32_t) * num_values));
-      augmented_inputs.push_back(next_id++);
-    };
-
-    // Handle state tensors of RNN, LSTM, SVDF.
-    // For each state_out tensor, a corresponding state_in operand needs to be
-    // created for NNAPI.
-    auto duplicate_state_tensor_float32 =
-        [interpreter, &nn_model, &next_id, &augmented_inputs,
-         &model_state_inputs, &model_state_outputs](int tensor_id) {
-          const TfLiteTensor* tensor = interpreter->tensor(tensor_id);
-          ANeuralNetworksOperandType operand_type{
-              ANEURALNETWORKS_TENSOR_FLOAT32,
-              static_cast<uint32_t>(tensor->dims->size),
-              reinterpret_cast<uint32_t*>(tensor->dims->data),
-              tensor->params.scale, tensor->params.zero_point};
-          CHECK_NN(ANeuralNetworksModel_addOperand(nn_model, &operand_type));
-          augmented_inputs.push_back(next_id);
-          model_state_inputs->push_back(next_id);
-          model_state_outputs->push_back(tensor_id);
-          next_id++;
-        };
-    auto check_and_add_activation = [&add_scalar_int32](int activation) {
-      if (activation > kTfLiteActRelu6) {
-        logError("NNAPI only supports RELU, RELU1 and RELU6 activations");
-        return kTfLiteError;
-      }
-      add_scalar_int32(activation);
-      return kTfLiteOk;
-    };
-
-    auto add_add_params = [&add_scalar_int32](void* data) {
-      auto* builtin = reinterpret_cast<TfLiteAddParams*>(data);
-      if (builtin->activation > kTfLiteActRelu6) {
-        logError("NNAPI only supports RELU, RELU1 and RELU6 activations");
-        return kTfLiteError;
-      }
-      add_scalar_int32(builtin->activation);
-      return kTfLiteOk;
-    };
-
-    auto add_pooling_params = [&add_scalar_int32,
-                               &check_and_add_activation](void* data) {
-      auto builtin = reinterpret_cast<TfLitePoolParams*>(data);
-      add_scalar_int32(builtin->padding);
-      add_scalar_int32(builtin->stride_width);
-      add_scalar_int32(builtin->stride_height);
-      add_scalar_int32(builtin->filter_width);
-      add_scalar_int32(builtin->filter_height);
-      return check_and_add_activation(builtin->activation);
-    };
-
-    auto add_convolution_params = [&add_scalar_int32,
-                                   &check_and_add_activation](void* data) {
-      auto builtin = reinterpret_cast<TfLiteConvParams*>(data);
-      add_scalar_int32(builtin->padding);
-      add_scalar_int32(builtin->stride_width);
-      add_scalar_int32(builtin->stride_height);
-      return check_and_add_activation(builtin->activation);
-    };
-
-    auto add_depthwise_conv_params = [&add_scalar_int32,
-                                      &check_and_add_activation](void* data) {
-      auto builtin = reinterpret_cast<TfLiteDepthwiseConvParams*>(data);
-      add_scalar_int32(builtin->padding);
-      add_scalar_int32(builtin->stride_width);
-      add_scalar_int32(builtin->stride_height);
-      add_scalar_int32(builtin->depth_multiplier);
-      return check_and_add_activation(builtin->activation);
-    };
-
-    auto add_fully_connected_params = [&check_and_add_activation](void* data) {
-      auto builtin = reinterpret_cast<TfLiteFullyConnectedParams*>(data);
-      return check_and_add_activation(builtin->activation);
-    };
-
-    auto add_concatenation_params = [&add_scalar_int32](void* data) {
-      auto builtin = reinterpret_cast<TfLiteConcatenationParams*>(data);
-      add_scalar_int32(builtin->axis);
-      if (builtin->activation != kTfLiteActNone) {
-        logError("Concatenation does not support fused activation in NNAPI");
-        return kTfLiteError;
-      }
-      return kTfLiteOk;
-    };
-
-    auto add_softmax_params = [&add_scalar_float32](void* data) {
-      auto builtin = reinterpret_cast<TfLiteSoftmaxParams*>(data);
-      add_scalar_float32(builtin->beta);
-    };
-
-    auto add_space_to_depth_params = [&add_scalar_int32](void* data) {
-      auto builtin = reinterpret_cast<TfLiteSpaceToDepthParams*>(data);
-      add_scalar_int32(builtin->block_size);
-    };
-
-    auto add_lstm_params = [&add_scalar_int32,
-                            &add_scalar_float32](void* data) {
-      auto builtin = reinterpret_cast<TfLiteLSTMParams*>(data);
-      add_scalar_int32(builtin->activation);
-      add_scalar_float32(builtin->cell_clip);
-      add_scalar_float32(builtin->proj_clip);
-    };
-
-    // LSTM in NNAPI requires scratch tensor as an output operand.
-    auto add_lstm_scratch_tensor_float32 = [interpreter, &node, &nn_model,
-                                            &next_id, &augmented_outputs]() {
-      if (node.temporaries->size == 0) return;
-      int scratch_buffer_index = node.temporaries->data[0];
-      const TfLiteTensor* tensor = interpreter->tensor(scratch_buffer_index);
-      ANeuralNetworksOperandType operand_type{
-          ANEURALNETWORKS_TENSOR_FLOAT32,
-          static_cast<uint32_t>(tensor->dims->size),
-          reinterpret_cast<uint32_t*>(tensor->dims->data), tensor->params.scale,
-          tensor->params.zero_point};
-      CHECK_NN(ANeuralNetworksModel_addOperand(nn_model, &operand_type));
-      augmented_outputs.insert(augmented_outputs.begin(), next_id++);
-    };
-
-    auto add_mean_params = [&add_scalar_int32](void* data) {
-#ifdef OBS_BUILD
-      auto builtin = reinterpret_cast<TfLiteMeanParams*>(data);
-#else
-      auto builtin = reinterpret_cast<TfLiteReducerParams*>(data);
-#endif
-      add_scalar_int32(builtin->keep_dims);
-    };
-
-    auto add_svdf_params = [&add_scalar_int32](void* data) {
-      auto builtin = reinterpret_cast<TfLiteSVDFParams*>(data);
-      add_scalar_int32(builtin->rank);
-      add_scalar_int32(builtin->activation);
-    };
-
-    auto add_rnn_params = [&add_scalar_int32](void* data) {
-      auto builtin = reinterpret_cast<TfLiteRNNParams*>(data);
-      add_scalar_int32(builtin->activation);
-    };
-
-    auto add_squeeze_params = [&](void* data) {
-      const auto* builtin = reinterpret_cast<TfLiteSqueezeParams*>(data);
-      // Note that we add the squeeze dimensions even if the dimensions were
-      // unspecified (empty), as NNAPI requires the operand.
-      add_vector_int32(builtin->squeeze_dims,
-                       static_cast<uint32_t>(builtin->num_squeeze_dims));
-    };
-
-    // Handle optional input tensors.
-    auto add_optional_tensors = [&nn_model, &augmented_inputs,
-                                 &next_id](int nn_type) {
-      for (size_t idx = 0; idx < augmented_inputs.size(); idx++) {
-        if (augmented_inputs[idx] == kOptionalTensor) {
-          const std::vector<uint32_t> dim = {0, 0};
-          ANeuralNetworksOperandType operand_type{nn_type, 2, dim.data(), 0, 0};
-          CHECK_NN(ANeuralNetworksModel_addOperand(nn_model, &operand_type))
-          CHECK_NN(ANeuralNetworksModel_setOperandValue(nn_model, next_id,
-                                                        nullptr, 0))
-          augmented_inputs[idx] = next_id++;
-        }
-      }
-    };
-
-    int nnapi_version = 10;
-#include "nnapi_delegate_ex_AddOpsAndParams_lambda.inc"
-
-    ANeuralNetworksOperationType nn_op_type;
-
-    // Using namespace directive to minimize diff with upstream tensorflow
-    namespace tflite = ::tflite;
-
-    switch (builtin) {
-      case tflite::BuiltinOperator_ADD:
-        nn_op_type = ANEURALNETWORKS_ADD;
-        RETURN_ERROR_IF_TFLITE_FAILED(add_add_params(node.builtin_data));
-        break;
-      case tflite::BuiltinOperator_MUL:
-        nn_op_type = ANEURALNETWORKS_MUL;
-        RETURN_ERROR_IF_TFLITE_FAILED(add_add_params(node.builtin_data));
-        break;
-      case tflite::BuiltinOperator_AVERAGE_POOL_2D:
-        RETURN_ERROR_IF_TFLITE_FAILED(add_pooling_params(node.builtin_data));
-        nn_op_type = ANEURALNETWORKS_AVERAGE_POOL_2D;
-        break;
-      case tflite::BuiltinOperator_MAX_POOL_2D:
-        RETURN_ERROR_IF_TFLITE_FAILED(add_pooling_params(node.builtin_data));
-        nn_op_type = ANEURALNETWORKS_MAX_POOL_2D;
-        break;
-      case tflite::BuiltinOperator_L2_POOL_2D:
-        RETURN_ERROR_IF_TFLITE_FAILED(add_pooling_params(node.builtin_data));
-        nn_op_type = ANEURALNETWORKS_L2_POOL_2D;
-        break;
-      case tflite::BuiltinOperator_CONV_2D: {
-        auto builtin = reinterpret_cast<TfLiteConvParams*>(node.builtin_data);
-        if (builtin->dilation_width_factor != 1 ||
-            builtin->dilation_height_factor != 1 || node.inputs->size != 3) {
-          logError("NNAPI does not support dilated Conv2D.");
-          return kTfLiteError;
-        }
-      }
-        RETURN_ERROR_IF_TFLITE_FAILED(
-            add_convolution_params(node.builtin_data));
-        nn_op_type = ANEURALNETWORKS_CONV_2D;
-        break;
-      case tflite::BuiltinOperator_RELU:
-        nn_op_type = ANEURALNETWORKS_RELU;
-        break;
-      case tflite::BuiltinOperator_RELU_N1_TO_1:
-        nn_op_type = ANEURALNETWORKS_RELU1;
-        break;
-      case tflite::BuiltinOperator_RELU6:
-        nn_op_type = ANEURALNETWORKS_RELU6;
-        break;
-      case tflite::BuiltinOperator_TANH:
-        nn_op_type = ANEURALNETWORKS_TANH;
-        break;
-      case tflite::BuiltinOperator_FLOOR:
-        nn_op_type = ANEURALNETWORKS_FLOOR;
-        break;
-      case tflite::BuiltinOperator_LOGISTIC:
-        nn_op_type = ANEURALNETWORKS_LOGISTIC;
-        break;
-      case tflite::BuiltinOperator_DEPTHWISE_CONV_2D:
-        RETURN_ERROR_IF_TFLITE_FAILED(
-            add_depthwise_conv_params(node.builtin_data));
-        nn_op_type = ANEURALNETWORKS_DEPTHWISE_CONV_2D;
-        break;
-      case tflite::BuiltinOperator_CONCATENATION:
-        RETURN_ERROR_IF_TFLITE_FAILED(
-            add_concatenation_params(node.builtin_data));
-        nn_op_type = ANEURALNETWORKS_CONCATENATION;
-        break;
-      case tflite::BuiltinOperator_SOFTMAX:
-        add_softmax_params(node.builtin_data);
-        nn_op_type = ANEURALNETWORKS_SOFTMAX;
-        break;
-      case tflite::BuiltinOperator_FULLY_CONNECTED:
-        RETURN_ERROR_IF_TFLITE_FAILED(
-            add_fully_connected_params(node.builtin_data));
-        nn_op_type = ANEURALNETWORKS_FULLY_CONNECTED;
-        break;
-      case tflite::BuiltinOperator_RESHAPE:
-        if (node.inputs->size != 2) {
-          logError("NNAPI only supports 2-input RESHAPE");
-          return kTfLiteError;
-        }
-        nn_op_type = ANEURALNETWORKS_RESHAPE;
-        // add_reshape_params(node.builtin_data);
-        break;
-      case tflite::BuiltinOperator_RESIZE_BILINEAR:
-        add_resize_bilinear_params(node.builtin_data);
-        nn_op_type = ANEURALNETWORKS_RESIZE_BILINEAR;
-        break;
-      case tflite::BuiltinOperator_SPACE_TO_DEPTH:
-        add_space_to_depth_params(node.builtin_data);
-        nn_op_type = ANEURALNETWORKS_SPACE_TO_DEPTH;
-        break;
-      case tflite::BuiltinOperator_LSTM: {
-        if (node.inputs->size + /* no of params */ 3 != 21) {
-          logError("NNAPI only supports 21-input LSTMs");
-          return kTfLiteError;
-        }
-        duplicate_state_tensor_float32(
-            node.outputs->data[/*kOutputStateTensor*/ 0]);
-        duplicate_state_tensor_float32(
-            node.outputs->data[/*kCellStateTensor*/ 1]);
-        add_lstm_params(node.builtin_data);
-        add_lstm_scratch_tensor_float32();
-        add_optional_tensors(ANEURALNETWORKS_TENSOR_FLOAT32);
-        nn_op_type = ANEURALNETWORKS_LSTM;
-        break;
-      }
-      case tflite::BuiltinOperator_DEQUANTIZE:
-        nn_op_type = ANEURALNETWORKS_DEQUANTIZE;
-        break;
-      case tflite::BuiltinOperator_SVDF: {
-        duplicate_state_tensor_float32(node.outputs->data[/*kStateTensor*/ 0]);
-        add_svdf_params(node.builtin_data);
-        nn_op_type = ANEURALNETWORKS_SVDF;
-        break;
-      }
-      case tflite::BuiltinOperator_RNN: {
-        duplicate_state_tensor_float32(
-            node.outputs->data[/*kHiddenStateTensor*/ 0]);
-        add_rnn_params(node.builtin_data);
-        nn_op_type = ANEURALNETWORKS_RNN;
-        break;
-      }
-      case tflite::BuiltinOperator_EMBEDDING_LOOKUP:
-        nn_op_type = ANEURALNETWORKS_EMBEDDING_LOOKUP;
-        break;
-      case tflite::BuiltinOperator_PAD:
-        nnapi_version = 11;  // require NNAPI 1.1
-        nn_op_type = ANEURALNETWORKS_PAD;
-        break;
-      case tflite::BuiltinOperator_MEAN:
-        nnapi_version = 11;  // require NNAPI 1.1
-        add_mean_params(node.builtin_data);
-        nn_op_type = ANEURALNETWORKS_MEAN;
-        break;
-      case tflite::BuiltinOperator_LOCAL_RESPONSE_NORMALIZATION:
-        nn_op_type = ANEURALNETWORKS_LOCAL_RESPONSE_NORMALIZATION;
-        add_lrn_params(node.builtin_data);
-        break;
-      case tflite::BuiltinOperator_DIV:
-        nnapi_version = 11;  // require NNAPI 1.1
-        nn_op_type = ANEURALNETWORKS_DIV;
-        RETURN_ERROR_IF_TFLITE_FAILED(check_and_add_activation(
-            reinterpret_cast<TfLiteDivParams*>(node.builtin_data)->activation));
-        break;
-      case tflite::BuiltinOperator_SUB:
-        nnapi_version = 11;  // require NNAPI 1.1
-        nn_op_type = ANEURALNETWORKS_SUB;
-        RETURN_ERROR_IF_TFLITE_FAILED(check_and_add_activation(
-            reinterpret_cast<TfLiteSubParams*>(node.builtin_data)->activation));
-        break;
-      case tflite::BuiltinOperator_SQUEEZE:
-        nnapi_version = 11;  // requires NNAPI 1.1
-        add_squeeze_params(node.builtin_data);
-        nn_op_type = ANEURALNETWORKS_SQUEEZE;
-        break;
-      case tflite::BuiltinOperator_TRANSPOSE:
-        // The permutation input tensor value dictates the output dimensions.
-        // TODO(b/110888333): Support dynamically-sized tensors in delegates.
-        if ((node.inputs->size > 1) &&
-            (interpreter->tensor(node.inputs->data[1])->allocation_type !=
-             kTfLiteMmapRo)) {
-          logError("NNAPI does not yet support dynamic tensors.");
-          return kTfLiteError;
-        }
-        nnapi_version = 11;  // require NNAPI 1.1
-        nn_op_type = ANEURALNETWORKS_TRANSPOSE;
-        break;
-      case tflite::BuiltinOperator_L2_NORMALIZATION:
-        nn_op_type = ANEURALNETWORKS_L2_NORMALIZATION;
-        if (reinterpret_cast<TfLiteL2NormParams*>(node.builtin_data)
-                ->activation != kTfLiteActNone) {
-          logError(
-              "NNAPI does not support L2Normalization with fused activations");
-          return kTfLiteError;
-        }
-        if ((node.inputs->size > 0) &&
-            (interpreter->tensor(node.inputs->data[0])->dims->size != 4)) {
-          logError("NNAPI only supports input rank 4 for L2Normalization");
-          return kTfLiteError;
-        }
-        break;
-      case tflite::BuiltinOperator_HASHTABLE_LOOKUP:
-        if (interpreter->tensor(node.outputs->data[0])->type !=
-            kTfLiteFloat32) {
-          logError("NNAPI only support HASHTABLE_LOOKUP with float32 output",
-                   builtin);
-          return kTfLiteError;
-        }
-        nn_op_type = ANEURALNETWORKS_HASHTABLE_LOOKUP;
-        break;
-      case tflite::BuiltinOperator_STRIDED_SLICE:
-        add_strided_slice_params(node.builtin_data);
-        nn_op_type = ANEURALNETWORKS_STRIDED_SLICE;
-        break;
-      case tflite::BuiltinOperator_SPACE_TO_BATCH_ND:
-        nnapi_version = 11;  // require NNAPI 1.1
-        nn_op_type = ANEURALNETWORKS_SPACE_TO_BATCH_ND;
-        break;
-      case tflite::BuiltinOperator_BATCH_TO_SPACE_ND:
-        nnapi_version = 11;  // require NNAPI 1.1
-        nn_op_type = ANEURALNETWORKS_BATCH_TO_SPACE_ND;
-        check_batch_to_space_params();
-        break;
-      case tflite::BuiltinOperator_CAST:
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_CAST_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-      case tflite::BuiltinOperator_TOPK_V2:
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_TOPK_V2_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-      case tflite::BuiltinOperator_GATHER:
-        add_gather_ex_params(node.builtin_data);
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_GATHER_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-      case tflite::BuiltinOperator_SPLIT:
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_SPLIT_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-      case tflite::BuiltinOperator_NEG:
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_NEG_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-      case tflite::BuiltinOperator_EXP:
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_EXP_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-      case tflite::BuiltinOperator_TRANSPOSE_CONV:
-        add_transpose_conv_params(node.builtin_data);
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_TRANSPOSE_CONV_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-      case tflite::BuiltinOperator_PRELU:
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_PRELU_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(),
-            static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-      case tflite::BuiltinOperator_ARG_MAX:
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_ARGMAX_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-#ifndef OBS_BUILD
- case tflite::BuiltinOperator_PACK:
-        add_pack_ex_params(node.builtin_data);
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_PACK_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-      case tflite::BuiltinOperator_UNPACK:
-        add_unpack_ex_params(node.builtin_data);
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_UNPACK_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-    case tflite::BuiltinOperator_SQRT:
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_SQRT_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(),
-            static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-      case tflite::BuiltinOperator_RSQRT:
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_RSQRT_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(),
-            static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-      case tflite::BuiltinOperator_EQUAL:
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_EQUAL_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-      case tflite::BuiltinOperator_NOT_EQUAL:
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_NOT_EQUAL_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-      case tflite::BuiltinOperator_SUM:
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_REDUCE_SUM_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(),
-            static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-      case tflite::BuiltinOperator_REDUCE_MAX:
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_TENSORFLOW_MAX_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(),
-            static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-      case tflite::BuiltinOperator_REDUCE_MIN:
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_REDUCE_MIN_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(),
-            static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-      case tflite::BuiltinOperator_LOGICAL_AND:
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_LOGICAL_AND_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(),
-            static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-      case tflite::BuiltinOperator_LOGICAL_OR:
-        CHECK_NN(ANeuralNetworksModel_addOperationEx(
-            nn_model, ANEURALNETWORKS_LOGICAL_OR_EX,
-            static_cast<uint32_t>(augmented_inputs.size()),
-            augmented_inputs.data(),
-            static_cast<uint32_t>(node.outputs->size),
-            reinterpret_cast<uint32_t*>(node.outputs->data)));
-        continue;
-#endif
-      case tflite::BuiltinOperator_CONCAT_EMBEDDINGS:
-      case tflite::BuiltinOperator_LSH_PROJECTION:
-      case tflite::BuiltinOperator_BIDIRECTIONAL_SEQUENCE_RNN:
-      case tflite::BuiltinOperator_UNIDIRECTIONAL_SEQUENCE_RNN:
-      case tflite::BuiltinOperator_EMBEDDING_LOOKUP_SPARSE:
-      case tflite::BuiltinOperator_BIDIRECTIONAL_SEQUENCE_LSTM:
-      case tflite::BuiltinOperator_UNIDIRECTIONAL_SEQUENCE_LSTM:
-      //case tflite::BuiltinOperator_LOCAL_RESPONSE_NORMALIZATION:
-      case tflite::BuiltinOperator_PADV2:
-      //case tflite::BuiltinOperator_RESIZE_BILINEAR:
-      case tflite::BuiltinOperator_CALL:
-      case tflite::BuiltinOperator_SKIP_GRAM:
-      //case tflite::BuiltinOperator_RELU_N1_TO_1:
-      //case tflite::BuiltinOperator_GATHER:
-      //case tflite::BuiltinOperator_SPACE_TO_BATCH_ND:
-      //case tflite::BuiltinOperator_BATCH_TO_SPACE_ND:
-      //case tflite::BuiltinOperator_TOPK_V2:
-      //case tflite::BuiltinOperator_SPLIT:
-      //case tflite::BuiltinOperator_STRIDED_SLICE:
-      //case tflite::BuiltinOperator_EXP:
-      case tflite::BuiltinOperator_LOG_SOFTMAX:
-      //case tflite::BuiltinOperator_DEQUANTIZE:
-      case tflite::BuiltinOperator_DELEGATE:
-      //case tflite::BuiltinOperator_CAST:
-      //case tflite::BuiltinOperator_PRELU:
-      case tflite::BuiltinOperator_MAXIMUM:
-      case tflite::BuiltinOperator_MINIMUM:
-#ifndef OBS_BUILD
-      case tflite::BuiltinOperator_ARG_MIN:
-#endif
-      case tflite::BuiltinOperator_GREATER:
-      case tflite::BuiltinOperator_GREATER_EQUAL:
-      case tflite::BuiltinOperator_LESS:
-      case tflite::BuiltinOperator_LESS_EQUAL:
-      //case tflite::BuiltinOperator_NEG:
-      case tflite::BuiltinOperator_SELECT:
-      case tflite::BuiltinOperator_SLICE:
-      case tflite::BuiltinOperator_SIN:
-      //case tflite::BuiltinOperator_LOG:
-      //case tflite::BuiltinOperator_TRANSPOSE_CONV:
-#ifndef OBS_BUILD
-      case tflite::BuiltinOperator_TILE:
-      case tflite::BuiltinOperator_EXPAND_DIMS:
-      case tflite::BuiltinOperator_SPARSE_TO_DENSE:
-      //case tflite::BuiltinOperator_EQUAL:
-      //case tflite::BuiltinOperator_NOT_EQUAL:
-      //case tflite::BuiltinOperator_SUM:
-      //case tflite::BuiltinOperator_REDUCE_MAX:
-      //case tflite::BuiltinOperator_REDUCE_MIN:
-      case tflite::BuiltinOperator_REDUCE_PROD:
-      //case tflite::BuiltinOperator_SQRT:
-      //case tflite::BuiltinOperator_RSQRT:
-      case tflite::BuiltinOperator_SHAPE:
-      case tflite::BuiltinOperator_POW:
-      case tflite::BuiltinOperator_FAKE_QUANT:
-      //case tflite::BuiltinOperator_PACK:
-      //case tflite::BuiltinOperator_LOGICAL_OR:
-      case tflite::BuiltinOperator_ONE_HOT:
-      //case tflite::BuiltinOperator_LOGICAL_AND:
-      case tflite::BuiltinOperator_LOGICAL_NOT:
-      //case tflite::BuiltinOperator_UNPACK:
-      case tflite::BuiltinOperator_FLOOR_DIV:
-      case tflite::BuiltinOperator_REDUCE_ANY:
-      case tflite::BuiltinOperator_SQUARE:
-      case tflite::BuiltinOperator_ZEROS_LIKE:
-      case tflite::BuiltinOperator_FILL:
-#endif
-        logError("Op code %d is currently not delegated to NNAPI", builtin);
-        return kTfLiteError;
-        break;
-      case tflite::BuiltinOperator_CUSTOM: {
-        std::string custom_name(registration.custom_name);
-        if (custom_name.compare("TensorFlowMax") == 0) {
-          CHECK_NN(ANeuralNetworksModel_addOperationEx(
-              nn_model, ANEURALNETWORKS_TENSORFLOW_MAX_EX,
-              static_cast<uint32_t>(augmented_inputs.size()),
-              augmented_inputs.data(),
-              static_cast<uint32_t>(node.outputs->size),
-              reinterpret_cast<uint32_t*>(node.outputs->data)));
-          continue;
-        }
-        else if (custom_name.compare("SquaredDifference") == 0) {
-          CHECK_NN(ANeuralNetworksModel_addOperationEx(
-              nn_model, ANEURALNETWORKS_SQUARED_DIFFERENCE_EX,
-              static_cast<uint32_t>(augmented_inputs.size()),
-              augmented_inputs.data(),
-              static_cast<uint32_t>(node.outputs->size),
-              reinterpret_cast<uint32_t*>(node.outputs->data)));
-          continue;
-        }
-        else if (custom_name.compare("TensorFlowSum") == 0) {
-          CHECK_NN(ANeuralNetworksModel_addOperationEx(
-              nn_model, ANEURALNETWORKS_REDUCE_SUM_EX,
-              static_cast<uint32_t>(augmented_inputs.size()),
-              augmented_inputs.data(),
-              static_cast<uint32_t>(node.outputs->size),
-              reinterpret_cast<uint32_t*>(node.outputs->data)));
-          continue;
-        }
-        logError("Custom operations are not supported when using NNAPI.");
-        return kTfLiteError;
-        break;
-      }
-#ifdef OBS_BUILD
-      default:
-        logError("Op code %d is currently not delegated to NNAPI", builtin);
-        return kTfLiteError;
-        break;
-#endif
-    }
-
-    //if (nnapi_version == 11 && GetAndroidSdkVersionCached() < 28) {
-    //  FATAL("Op %d needs NNAPI1.1", builtin);
-    //}
-
-    // Add the operation.
-    RETURN_ERROR_IF_NN_FAILED(ANeuralNetworksModel_addOperation(
-        nn_model, nn_op_type, static_cast<uint32_t>(augmented_inputs.size()),
-        augmented_inputs.data(),
-        static_cast<uint32_t>(augmented_outputs.size()),
-        reinterpret_cast<uint32_t*>(augmented_outputs.data())));
-  }
-  return kTfLiteOk;
-}
-
-TfLiteStatus NNAPIDelegate::BuildGraph(::tflite::Interpreter* interpreter) {
-  if (nn_model_ && nn_compiled_model_) return model_status_;
-
-  // TODO(aselle): This is not correct. need to handle resize invalidation.
-  if (!nn_model_) {
-    CHECK_NN(ANeuralNetworksModel_create(&nn_model_));
-
-    // Find which tensors should be added to NNAPI. TFLite has temporaries
-    // and RNN back-edges which are are not valid for NNAPI. We look through all
-    // inputs and outputs and mark the mapping in tensor_id_to_nnapi_id with
-    // kOperandIdNotSet. addTensorOperands will replace those with the
-    // corresponding NNAPI operand ids and skip kOperandNotNeeded entries.
-    std::vector<int64_t> tensor_id_to_nnapi_id(interpreter->tensors_size(),
-                                               kOperandNotNeeded);
-    auto set_ids_to_not_set = [&tensor_id_to_nnapi_id](const int* buf,
-                                                       size_t count) {
-      for (int j = 0; j < count; j++) {
-        auto tensor_id = buf[j];
-        if (tensor_id != kOptionalTensor) {
-          tensor_id_to_nnapi_id[tensor_id] = kOperandIdNotSet;
-        }
-      }
-    };
-    for (size_t i = 0; i < interpreter->nodes_size(); i++) {
-      const auto* node_and_registration = interpreter->node_and_registration(i);
-      const TfLiteNode& node = node_and_registration->first;
-      set_ids_to_not_set(node.inputs->data, node.inputs->size);
-      set_ids_to_not_set(node.outputs->data, node.outputs->size);
-    }
-    set_ids_to_not_set(interpreter->inputs().data(),
-                       interpreter->inputs().size());
-    set_ids_to_not_set(interpreter->outputs().data(),
-                       interpreter->outputs().size());
-
-    uint32_t next_id = 0;
-    RETURN_ERROR_IF_TFLITE_FAILED(addTensorOperands(
-        interpreter, nn_model_, &next_id, &tensor_id_to_nnapi_id));
-    RETURN_ERROR_IF_TFLITE_FAILED(
-        AddOpsAndParams(interpreter, nn_model_, next_id, &model_states_inputs_,
-                        &model_states_outputs_, tensor_id_to_nnapi_id));
-
-    std::vector<uint32_t> augmented_inputs;
-    MapAndAddTensorIds(interpreter->inputs().data(),
-                       interpreter->inputs().size(), &augmented_inputs,
-                       tensor_id_to_nnapi_id);
-    augmented_inputs.insert(augmented_inputs.end(),
-                            model_states_inputs_.begin(),
-                            model_states_inputs_.end());
-    std::vector<uint32_t> augmented_outputs;
-    MapAndAddTensorIds(interpreter->outputs().data(),
-                       interpreter->outputs().size(), &augmented_outputs,
-                       tensor_id_to_nnapi_id);
-    MapAndAddTensorIds(model_states_outputs_.data(),
-                       model_states_outputs_.size(), &augmented_outputs,
-                       tensor_id_to_nnapi_id);
-
-    CHECK_NN(ANeuralNetworksModel_identifyInputsAndOutputs(
-        nn_model_, static_cast<uint32_t>(augmented_inputs.size()),
-        reinterpret_cast<const uint32_t*>(augmented_inputs.data()),
-        static_cast<uint32_t>(augmented_outputs.size()),
-        reinterpret_cast<const uint32_t*>(augmented_outputs.data())));
-
-    // TODO Support ANeuralNetworksModel_relaxComputationFloat32toFloat16
-    //if (GetAndroidSdkVersionCached() >= 28) {
-    //  CHECK_NN(ANeuralNetworksModel_relaxComputationFloat32toFloat16(
-    //      nn_model_, interpreter->GetAllowFp16PrecisionForFp32()));
-    //}
-    CHECK_NN(ANeuralNetworksModel_finish(nn_model_));
-  }
-  if (!nn_compiled_model_) {
-    CHECK_NN(ANeuralNetworksCompilation_create(nn_model_, &nn_compiled_model_));
-    CHECK_NN(ANeuralNetworksCompilation_finish(nn_compiled_model_));
-  }
-  return kTfLiteOk;
-}
-
-#include <unordered_map>
-
-TfLiteStatus NNAPIDelegate::Invoke(::tflite::Interpreter* interpreter) {
-  if (!nn_model_) {
-    model_status_ = BuildGraph(interpreter);
-    if (model_status_ != kTfLiteOk) {
-      logError("Failed to build graph for NNAPI");
-    }
-  }
-  if (model_status_ != kTfLiteOk) {
-    return model_status_;
-  }
-
-  ANeuralNetworksExecution* execution = nullptr;
-  CHECK_NN(ANeuralNetworksExecution_create(nn_compiled_model_, &execution));
-
-  // Allocate temporary buffer to save casted boolean tensor
-  std::unordered_map<size_t, uint8_t*> input_boolean_tensors;
-  std::unordered_map<size_t, uint8_t*> output_boolean_tensors;
-  for (size_t i = 0; i < interpreter->inputs().size(); i++)
-  {
-    int input = interpreter->inputs()[i];
-    TfLiteTensor* tensor = interpreter->tensor(input);
-    if (tensor->type == kTfLiteBool)
-    {
-      size_t elements = tensor->bytes / sizeof(bool);
-      uint8_t* temp_tensor = new uint8_t[tensor->bytes / sizeof(bool)];
-      input_boolean_tensors[i] = temp_tensor;
-      for (size_t idx = 0; idx < elements; idx++)
-      {
-        temp_tensor[idx] = (tensor->data.b[idx] ? 0x00 : 0xff);
-      }
-    }
-  }
-  for (size_t i = 0; i < interpreter->outputs().size(); i++)
-  {
-    int output = interpreter->outputs()[i];
-    TfLiteTensor* tensor = interpreter->tensor(output);
-    if (tensor->type == kTfLiteBool)
-    {
-      uint8_t* temp_tensor = new uint8_t[tensor->bytes / sizeof(bool)];
-      output_boolean_tensors[i] = temp_tensor;
-    }
-  }
-
-  // Currently perform deep copy of input buffer
-  for (size_t i = 0; i < interpreter->inputs().size(); i++) {
-    int input = interpreter->inputs()[i];
-    // TODO(aselle): Is this what we want or do we want input instead?
-    // TODO(aselle): This should be called setInputValue maybe to be cons.
-    TfLiteTensor* tensor = interpreter->tensor(input);
-    if (tensor->type == kTfLiteBool)
-    {
-      CHECK_NN(ANeuralNetworksExecution_setInput(
-          execution, i, nullptr, input_boolean_tensors[i], tensor->bytes * sizeof(uint8_t) / sizeof(bool)));
-    }
-    else
-    {
-      CHECK_NN(ANeuralNetworksExecution_setInput(
-          execution, i, nullptr, tensor->data.raw, tensor->bytes));
-    }
-  }
-
-  // Tell nn api where to place final data.
-  for (size_t i = 0; i < interpreter->outputs().size(); i++) {
-    int output = interpreter->outputs()[i];
-    TfLiteTensor* tensor = interpreter->tensor(output);
-
-    if (tensor->type == kTfLiteBool)
-    {
-      CHECK_NN(ANeuralNetworksExecution_setOutput(
-          execution, i, nullptr, output_boolean_tensors[i], tensor->bytes * sizeof(uint8_t) / sizeof(bool)));
-    }
-    else
-    {
-      CHECK_NN(ANeuralNetworksExecution_setOutput(
-          execution, i, nullptr, tensor->data.raw, tensor->bytes));
-    }
-  }
-
-  // The state_out of previous invocation need to be mapped to state_in of
-  // current invocation.
-  for (size_t i = 0; i < model_states_outputs_.size(); i++) {
-    int state_tensor_idx = model_states_outputs_[i];
-    TfLiteTensor* tensor = interpreter->tensor(state_tensor_idx);
-    // Here we are using a deep copy for state_in tensors so that we are not
-    // reading and writing into the same buffer during a invocation.
-    // TODO(miaowang): using double shared buffer to minimize the copies.
-    CHECK_NN(ANeuralNetworksExecution_setInput(
-        execution, i + interpreter->inputs().size(), nullptr, tensor->data.raw,
-        tensor->bytes));
-    // Tell NNAPI where to output the state_out.
-    CHECK_NN(ANeuralNetworksExecution_setOutput(
-        execution, i + interpreter->outputs().size(), nullptr, tensor->data.raw,
-        tensor->bytes));
-  }
-
-  // Currently use blocking compute.
-  ANeuralNetworksEvent* event = nullptr;
-  CHECK_NN(ANeuralNetworksExecution_startCompute(execution, &event));
-  CHECK_NN(ANeuralNetworksEvent_wait(event));
-  ANeuralNetworksEvent_free(event);
-  ANeuralNetworksExecution_free(execution);
-
-  // Tell nn api where to place final data.
-  for (size_t i = 0; i < interpreter->inputs().size(); i++) {
-    int input = interpreter->inputs()[i];
-    TfLiteTensor* tensor = interpreter->tensor(input);
-
-    if (tensor->type == kTfLiteBool)
-    {
-      uint8_t* temp_tensor = input_boolean_tensors[i];
-      input_boolean_tensors[i] = nullptr;
-      delete temp_tensor;
-    }
-  }
-  for (size_t i = 0; i < interpreter->outputs().size(); i++) {
-    int output = interpreter->outputs()[i];
-    TfLiteTensor* tensor = interpreter->tensor(output);
-
-    if (tensor->type == kTfLiteBool)
-    {
-      uint8_t* temp_tensor = output_boolean_tensors[i];
-      size_t elements = tensor->bytes / sizeof(bool);
-      for (size_t idx = 0; idx < elements; idx++)
-      {
-        tensor->data.b[idx] = ((temp_tensor[idx] == 0x00) ? false : true);
-      }
-      output_boolean_tensors[i] = nullptr;
-      delete temp_tensor;
-    }
-  }
-
-#if 0
-  printf("From the NN API:\n");
-  TfLiteTensor* tensor = interpreter->tensor(interpreter->outputs()[0]);
-  if (float* data =
-          interpreter->typed_tensor<float>(interpreter->outputs()[0])) {
-    size_t num = tensor->bytes / sizeof(float);
-    for (float* p = data; p < data + num; p++) {
-      printf(" %f", *p);
-    }
-    printf("\n");
-  }
-#endif
-
-  return kTfLiteOk;
-}
-
-bool NNAPIDelegate::IsSupported() { return nnfw::NNAPIExists(); }
-
-} // namespace tflite
-} // namespace nnfw
-
-// clang-format on
diff --git a/libs/tflite/src/ext/nnapi_delegate_ex_AddOpsAndParams_lambda.inc b/libs/tflite/src/ext/nnapi_delegate_ex_AddOpsAndParams_lambda.inc
deleted file mode 100644
index a91e4de60..000000000
--- a/libs/tflite/src/ext/nnapi_delegate_ex_AddOpsAndParams_lambda.inc
+++ /dev/null
@@ -1,106 +0,0 @@
-// This file is included from AddOpsAndParams defined in nnapi_delegate.cc
-// and contains lambda for extened implementation to original Tensorflow Lite.
-    auto add_resize_bilinear_params = [&add_scalar_int32, &interpreter, &augmented_inputs](void* data) {
-      auto builtin = reinterpret_cast<TfLiteResizeBilinearParams*>(data);
-      if  (builtin->align_corners) {
-        FATAL("Resize bilinear does not support align corners in NNAPI");
-      }
-
-      TfLiteTensor* tensor = interpreter->tensor(augmented_inputs.back());
-      assert(tensor->type == kTfLiteInt32);
-      assert(tensor->bytes == sizeof(int)*2);
-      augmented_inputs.pop_back();
-
-      int height = ((int*)(tensor->data.raw))[1];
-      int width = ((int*)(tensor->data.raw))[0];
-      add_scalar_int32(height);
-      add_scalar_int32(width);
-    };
-
-    auto check_l2normalization_params = [interpreter, &node](void* data) {
-      auto builtin = reinterpret_cast<TfLiteL2NormParams*>(data);
-      if (builtin->activation != kTfLiteActNone) {
-        FATAL("NNAPI does not support L2Normalization with fused activations");
-      }
-      if ((node.inputs->size > 0) &&
-            (interpreter->tensor(node.inputs->data[0])->dims->size != 4)) {
-          FATAL("NNAPI only supports input rank 4 for L2Normalization");
-      }
-    };
-
-    auto add_transpose_conv_params = [&add_scalar_int32](void* data) {
-      auto builtin = reinterpret_cast<TfLiteTransposeConvParams*>(data);
-      add_scalar_int32(builtin->padding);
-      add_scalar_int32(builtin->stride_width);
-      add_scalar_int32(builtin->stride_height);
-    };
-
-    auto add_lrn_params = [&add_scalar_int32,
-                            &add_scalar_float32](void* data) {
-      auto builtin = reinterpret_cast<TfLiteLocalResponseNormParams*>(data);
-      add_scalar_int32(builtin->radius);
-      add_scalar_float32(builtin->bias);
-      add_scalar_float32(builtin->alpha);
-      add_scalar_float32(builtin->beta);
-    };
-
-    auto add_strided_slice_params = [&add_scalar_int32](void* data) {
-      auto builtin = reinterpret_cast<TfLiteStridedSliceParams*>(data);
-      add_scalar_int32(builtin->begin_mask);
-      add_scalar_int32(builtin->end_mask);
-      // ellipsis_mask and new_axis_mask are not supported on nn runtime
-      // cf) tflite interpreter supports both operations
-      if (builtin->ellipsis_mask) {
-        FATAL("STRIDE_SLICE does not support ellipsis_mask in NNAPI");
-      }
-      if (builtin->new_axis_mask) {
-        FATAL("STRIDE_SLICE does not support new_axis_mask in NNAPI");
-      }
-      add_scalar_int32(builtin->shrink_axis_mask);
-    };
-
-    auto add_gather_ex_params = [&add_scalar_int32](void* data) {
-      auto builtin = reinterpret_cast<TfLiteGatherParams*>(data);
-      add_scalar_int32(builtin->axis);
-      if (builtin->axis != 0) {
-        FATAL("GATHER does not support axis>0 in NNAPI");
-      }
-    };
-
-#ifndef OBS_BUILD
-    auto add_pack_ex_params = [&add_scalar_int32](void* data) {
-      auto builtin = reinterpret_cast<TfLitePackParams*>(data);
-      add_scalar_int32(builtin->values_count);
-      add_scalar_int32(builtin->axis);
-    };
-
-    auto add_unpack_ex_params = [&add_scalar_int32](void* data) {
-      auto builtin = reinterpret_cast<TfLiteUnpackParams*>(data);
-      add_scalar_int32(builtin->num);
-      add_scalar_int32(builtin->axis);
-    };
-#endif
-
-    auto check_batch_to_space_params = [interpreter, &node, &augmented_inputs]() {
-
-    //If there are 3 inputs, check if crops is having default values {0, 0, 0, 0}
-    //Else unsupported by NNAPI
-
-      if(augmented_inputs.size() == 3)
-      {
-        const uint32_t crops_buffer_index = node.inputs->data[2];
-        const TfLiteTensor* crops = interpreter->tensor(crops_buffer_index);
-        const int *crops_value = crops->data.i32;
-
-        //Check if crops is having default values {0, 0, 0, 0}
-        if(crops_value[0] != 0 || crops_value[1] != 0 || crops_value[2] != 0 || crops_value[3] != 0)
-        {
-          FATAL("BATCH_TO_SPACE_ND does not support Explicit crops in NNAPI");
-        }
-        else
-        {
-          //Restrict crops input and pass only other two inputs
-          augmented_inputs.pop_back();
-        }
-      }
-    };
diff --git a/libs/tflite/src/interp/FlatBufferBuilder.cpp b/libs/tflite/src/interp/FlatBufferBuilder.cpp
deleted file mode 100644
index 4b9cde719..000000000
--- a/libs/tflite/src/interp/FlatBufferBuilder.cpp
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "tflite/interp/FlatBufferBuilder.h"
-
-#include "tflite/ext/kernels/register.h"
-
-namespace nnfw
-{
-namespace tflite
-{
-
-std::unique_ptr<::tflite::Interpreter> FlatBufferBuilder::build(void) const
-{
-  std::unique_ptr<::tflite::Interpreter> interpreter;
-
-  nnfw::tflite::BuiltinOpResolver resolver;
-
-  ::tflite::InterpreterBuilder builder(_model, resolver);
-
-  builder(&interpreter);
-
-  return std::move(interpreter);
-}
-
-} // namespace tflite
-} // namespace nnfw
diff --git a/libs/tflite/src/interp/FunctionBuilder.cpp b/libs/tflite/src/interp/FunctionBuilder.cpp
deleted file mode 100644
index eab940c18..000000000
--- a/libs/tflite/src/interp/FunctionBuilder.cpp
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "tflite/interp/FunctionBuilder.h"
-
-namespace nnfw
-{
-namespace tflite
-{
-
-std::unique_ptr<::tflite::Interpreter> FunctionBuilder::build(void) const
-{
-  auto res = std::unique_ptr<::tflite::Interpreter>{new ::tflite::Interpreter};
-
-  _fn(*res);
-
-  return std::move(res);
-}
-
-} // namespace tflite
-} // namespace nnfw
diff --git a/nnas b/nnas
new file mode 100755
index 000000000..4445198ff
--- /dev/null
+++ b/nnas
@@ -0,0 +1,38 @@
+#!/bin/bash
+
+NNAS_CONFIG_RPATH="infra/config"
+NNAS_COMMAND_RPATH="infra/command"
+NNAS_PROJECT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+
+function Usage()
+{
+  echo "Usage: $0 [COMMAND] ..."
+  echo "Command:"
+  for file in "$NNAS_COMMAND_RPATH"/*;
+  do
+    echo "  $(basename "$file")"
+  done
+}
+
+function import()
+{
+  source "${NNAS_PROJECT_PATH}/${NNAS_CONFIG_RPATH}/$1"
+}
+
+COMMAND=$1; shift
+
+if [[ -z "${COMMAND}" ]]; then
+  Usage
+  exit 255
+fi
+
+COMMAND_FILE="${NNAS_PROJECT_PATH}/${NNAS_COMMAND_RPATH}/${COMMAND}"
+
+if [[ ! -f "${COMMAND_FILE}" ]]; then
+  echo "ERROR: '${COMMAND}' is not supported"
+  exit 255
+fi
+
+export NNAS_PROJECT_PATH
+
+source "${COMMAND_FILE}" "$@"
diff --git a/nncc b/nncc
new file mode 100755
index 000000000..23cfb5bd4
--- /dev/null
+++ b/nncc
@@ -0,0 +1,43 @@
+#!/bin/bash
+
+NNCC_SCRIPT_RPATH="scripts"
+NNCC_COMMAND_RPATH="infra/nncc/command"
+
+NNCC_PROJECT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+NNCC_SCRIPT_PATH="${NNCC_PROJECT_PATH}/${NNCC_SCRIPT_RPATH}"
+
+function Usage()
+{
+  echo "Usage: $0 [COMMAND] ..."
+  echo "Command:"
+  for file in "$NNCC_COMMAND_RPATH"/*;
+  do
+    echo "  $(basename "$file")"
+  done
+}
+
+# Get command from command-line
+COMMAND=$1; shift
+
+if [[ -z "${COMMAND}" ]]; then
+  Usage
+  exit 255
+fi
+
+COMMAND_FILE="${NNCC_PROJECT_PATH}/${NNCC_COMMAND_RPATH}/${COMMAND}"
+
+if [[ ! -f "${COMMAND_FILE}" ]]; then
+  echo "ERROR: '${COMMAND}' is not supported"
+  Usage
+  exit 255
+fi
+
+export NNCC_PROJECT_PATH
+export NNCC_SCRIPT_PATH
+
+function import()
+{
+  source "${NNCC_PROJECT_PATH}/infra/nncc/config/$1"
+}
+
+source "${COMMAND_FILE}" "$@"
diff --git a/nnfw b/nnfw
new file mode 100755
index 000000000..12e71e02e
--- /dev/null
+++ b/nnfw
@@ -0,0 +1,41 @@
+#!/bin/bash
+
+NNFW_SCRIPT_RPATH="infra/nnfw"
+NNFW_COMMAND_RPATH="${NNFW_SCRIPT_RPATH}/command"
+
+NNFW_PROJECT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
+NNFW_SCRIPT_PATH="${NNFW_PROJECT_PATH}/${NNFW_SCRIPT_RPATH}"
+
+function Usage()
+{
+  echo "Usage: $0 [COMMAND] ..."
+  echo "Command:"
+  for file in "$NNFW_COMMAND_RPATH"/*;
+  do
+    echo "  $(basename "$file")"
+  done
+}
+
+COMMAND=$1; shift
+
+if [[ -z "${COMMAND}" ]]; then
+  Usage
+  exit 255
+fi
+
+COMMAND_FILE="${NNFW_PROJECT_PATH}/${NNFW_COMMAND_RPATH}/${COMMAND}"
+
+if [[ ! -f "${COMMAND_FILE}" ]]; then
+  echo "ERROR: '${COMMAND}' is not supported"
+  exit 255
+fi
+
+export NNFW_PROJECT_PATH
+export NNFW_SCRIPT_PATH
+
+function import()
+{
+  source "${NNFW_PROJECT_PATH}/${NNFW_SCRIPT_RPATH}/config/$1"
+}
+
+source "${COMMAND_FILE}" "$@"
diff --git a/nnpackage/examples/one_op_in_tflite/add.tflite b/nnpackage/examples/one_op_in_tflite/add.tflite
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/nnpackage/examples/one_op_in_tflite/add.tflite
diff --git a/nnpackage/examples/one_op_in_tflite/metadata/MANIFEST b/nnpackage/examples/one_op_in_tflite/metadata/MANIFEST
new file mode 100644
index 000000000..1d96cce1b
--- /dev/null
+++ b/nnpackage/examples/one_op_in_tflite/metadata/MANIFEST
@@ -0,0 +1,7 @@
+{
+  "major-version" : "1",
+  "minor-version" : "0",
+  "patch-version" : "0",
+  "models"      : [ "add.tflite" ],
+  "model-types" : [ "tflite" ]
+}
diff --git a/nnpackage/schema/circle_schema.fbs b/nnpackage/schema/circle_schema.fbs
new file mode 100644
index 000000000..dbb0d3526
--- /dev/null
+++ b/nnpackage/schema/circle_schema.fbs
@@ -0,0 +1,804 @@
+// Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+// Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// Revision History
+// Version 0: Initial version. Based on TensorFlow Lite v1.13.1 schema.
+
+namespace circle;
+
+// This corresponds to the version.
+file_identifier "CIR0";
+// File extension of any written files.
+file_extension "circle";
+
+// IMPORTANT: All new members of tables, enums and unions must be added at the
+// end to ensure backwards compatibility.
+
+// The type of data stored in a tensor.
+enum TensorType : byte {
+  FLOAT32 = 0,
+  FLOAT16 = 1,
+  INT32 = 2,
+  UINT8 = 3,
+  INT64 = 4,
+  STRING = 5,
+  BOOL = 6,
+  INT16 = 7,
+  COMPLEX64 = 8,
+  INT8 = 9,
+}
+
+// Custom quantization parameters for experimenting with new quantization
+// techniques.
+table CustomQuantization {
+  custom:[ubyte] (force_align: 16);
+}
+
+// Represents a specific quantization technique's parameters.
+union QuantizationDetails {
+  CustomQuantization,
+}
+
+// Parameters for converting a quantized tensor back to float.
+table QuantizationParameters {
+  // These four parameters are the asymmetric linear quantization parameters.
+  // Given a quantized value q, the corresponding float value f should be:
+  //   f = scale * (q - zero_point)
+  // For other quantization types, the QuantizationDetails below is used.
+  min:[float];  // For importing back into tensorflow.
+  max:[float];  // For importing back into tensorflow.
+  scale:[float];  // For dequantizing the tensor's values.
+  zero_point:[long];
+
+  // If this is not none, the quantization parameters above are ignored and the
+  // value of the QuantizationDetails union below should be used.
+  details:QuantizationDetails;
+}
+
+table Tensor {
+  // The tensor shape. The meaning of each entry is operator-specific but
+  // builtin ops use: [batch size, height, width, number of channels] (That's
+  // Tensorflow's NHWC).
+  shape:[int];
+  type:TensorType;
+  // An index that refers to the buffers table at the root of the model. Or,
+  // if there is no data buffer associated (i.e. intermediate results), then
+  // this is 0 (which refers to an always existent empty buffer).
+  //
+  // The data_buffer itself is an opaque container, with the assumption that the
+  // target device is little-endian. In addition, all builtin operators assume
+  // the memory is ordered such that if `shape` is [4, 3, 2], then index
+  // [i, j, k] maps to data_buffer[i*3*2 + j*2 + k].
+  buffer:uint;
+  name:string;  // For debugging and importing back into tensorflow.
+  quantization:QuantizationParameters;  // Optional.
+
+  is_variable:bool = false;
+}
+
+// A list of builtin operators. Builtin operators are slightly faster than custom
+// ones, but not by much. Moreover, while custom operators accept an opaque
+// object containing configuration parameters, builtins have a predetermined
+// set of acceptable options.
+enum BuiltinOperator : byte {
+  ADD = 0,
+  AVERAGE_POOL_2D = 1,
+  CONCATENATION = 2,
+  CONV_2D = 3,
+  DEPTHWISE_CONV_2D = 4,
+  // DEPTH_TO_SPACE = 5,
+  DEQUANTIZE = 6,
+  EMBEDDING_LOOKUP = 7,
+  FLOOR = 8,
+  FULLY_CONNECTED = 9,
+  HASHTABLE_LOOKUP = 10,
+  L2_NORMALIZATION = 11,
+  L2_POOL_2D = 12,
+  LOCAL_RESPONSE_NORMALIZATION = 13,
+  LOGISTIC = 14,
+  LSH_PROJECTION = 15,
+  LSTM = 16,
+  MAX_POOL_2D = 17,
+  MUL = 18,
+  RELU = 19,
+  // NOTE(aselle): RELU_N1_TO_1 used to be called RELU1, but it was renamed
+  // since different model developers use RELU1 in different ways. Never
+  // create another op called RELU1.
+  RELU_N1_TO_1 = 20,
+  RELU6 = 21,
+  RESHAPE = 22,
+  RESIZE_BILINEAR = 23,
+  RNN = 24,
+  SOFTMAX = 25,
+  SPACE_TO_DEPTH = 26,
+  SVDF = 27,
+  TANH = 28,
+  // TODO(aselle): Consider rename to CONCATENATE_EMBEDDINGS
+  CONCAT_EMBEDDINGS = 29,
+  SKIP_GRAM = 30,
+  CALL = 31,
+  CUSTOM = 32,
+  EMBEDDING_LOOKUP_SPARSE = 33,
+  PAD = 34,
+  UNIDIRECTIONAL_SEQUENCE_RNN = 35,
+  GATHER = 36,
+  BATCH_TO_SPACE_ND = 37,
+  SPACE_TO_BATCH_ND = 38,
+  TRANSPOSE = 39,
+  MEAN = 40,
+  SUB = 41,
+  DIV = 42,
+  SQUEEZE = 43,
+  UNIDIRECTIONAL_SEQUENCE_LSTM = 44,
+  STRIDED_SLICE = 45,
+  BIDIRECTIONAL_SEQUENCE_RNN = 46,
+  EXP = 47,
+  TOPK_V2 = 48,
+  SPLIT = 49,
+  LOG_SOFTMAX = 50,
+  // DELEGATE is a special op type for the operations which are delegated to
+  // other backends.
+  // WARNING: Experimental interface, subject to change
+  DELEGATE = 51,
+  BIDIRECTIONAL_SEQUENCE_LSTM = 52,
+  CAST = 53,
+  PRELU = 54,
+  MAXIMUM = 55,
+  ARG_MAX = 56,
+  MINIMUM = 57,
+  LESS = 58,
+  NEG = 59,
+  PADV2 = 60,
+  GREATER = 61,
+  GREATER_EQUAL = 62,
+  LESS_EQUAL = 63,
+  SELECT = 64,
+  SLICE = 65,
+  SIN = 66,
+  TRANSPOSE_CONV = 67,
+  SPARSE_TO_DENSE = 68,
+  TILE = 69,
+  EXPAND_DIMS = 70,
+  EQUAL = 71,
+  NOT_EQUAL = 72,
+  LOG = 73,
+  SUM = 74,
+  SQRT = 75,
+  RSQRT = 76,
+  SHAPE = 77,
+  POW = 78,
+  ARG_MIN = 79,
+  FAKE_QUANT = 80,
+  REDUCE_PROD = 81,
+  REDUCE_MAX = 82,
+  PACK = 83,
+  LOGICAL_OR = 84,
+  ONE_HOT = 85,
+  LOGICAL_AND = 86,
+  LOGICAL_NOT = 87,
+  UNPACK = 88,
+  REDUCE_MIN = 89,
+  FLOOR_DIV = 90,
+  REDUCE_ANY = 91,
+  SQUARE = 92,
+  ZEROS_LIKE = 93,
+  FILL = 94,
+  FLOOR_MOD = 95,
+  RANGE = 96,
+  RESIZE_NEAREST_NEIGHBOR = 97,
+  LEAKY_RELU = 98,
+  SQUARED_DIFFERENCE = 99,
+  MIRROR_PAD = 100,
+  ABS = 101,
+  SPLIT_V = 102,
+}
+
+// Options for the builtin operators.
+union BuiltinOptions {
+  Conv2DOptions,
+  DepthwiseConv2DOptions,
+  ConcatEmbeddingsOptions,
+  LSHProjectionOptions,
+  Pool2DOptions,
+  SVDFOptions,
+  RNNOptions,
+  FullyConnectedOptions,
+  SoftmaxOptions,
+  ConcatenationOptions,
+  AddOptions,
+  L2NormOptions,
+  LocalResponseNormalizationOptions,
+  LSTMOptions,
+  ResizeBilinearOptions,
+  CallOptions,
+  ReshapeOptions,
+  SkipGramOptions,
+  SpaceToDepthOptions,
+  EmbeddingLookupSparseOptions,
+  MulOptions,
+  PadOptions,
+  GatherOptions,
+  BatchToSpaceNDOptions,
+  SpaceToBatchNDOptions,
+  TransposeOptions,
+  ReducerOptions,
+  SubOptions,
+  DivOptions,
+  SqueezeOptions,
+  SequenceRNNOptions,
+  StridedSliceOptions,
+  ExpOptions,
+  TopKV2Options,
+  SplitOptions,
+  LogSoftmaxOptions,
+  CastOptions,
+  DequantizeOptions,
+  MaximumMinimumOptions,
+  ArgMaxOptions,
+  LessOptions,
+  NegOptions,
+  PadV2Options,
+  GreaterOptions,
+  GreaterEqualOptions,
+  LessEqualOptions,
+  SelectOptions,
+  SliceOptions,
+  TransposeConvOptions,
+  SparseToDenseOptions,
+  TileOptions,
+  ExpandDimsOptions,
+  EqualOptions,
+  NotEqualOptions,
+  ShapeOptions,
+  PowOptions,
+  ArgMinOptions,
+  FakeQuantOptions,
+  PackOptions,
+  LogicalOrOptions,
+  OneHotOptions,
+  LogicalAndOptions,
+  LogicalNotOptions,
+  UnpackOptions,
+  FloorDivOptions,
+  SquareOptions,
+  ZerosLikeOptions,
+  FillOptions,
+  BidirectionalSequenceLSTMOptions,
+  BidirectionalSequenceRNNOptions,
+  UnidirectionalSequenceLSTMOptions,
+  FloorModOptions,
+  RangeOptions,
+  ResizeNearestNeighborOptions,
+  LeakyReluOptions,
+  SquaredDifferenceOptions,
+  MirrorPadOptions,
+  AbsOptions,
+  SplitVOptions,
+}
+
+enum Padding : byte { SAME, VALID }
+
+enum ActivationFunctionType : byte {
+  NONE = 0,
+  RELU = 1,
+  RELU_N1_TO_1 = 2,
+  RELU6 = 3,
+  TANH = 4,
+  SIGN_BIT = 5,
+}
+
+table Conv2DOptions {
+  padding:Padding;
+  stride_w:int;
+  stride_h:int;
+  fused_activation_function:ActivationFunctionType;
+  dilation_w_factor:int = 1;
+  dilation_h_factor:int = 1;
+}
+
+table Pool2DOptions {
+  padding:Padding;
+  stride_w:int;
+  stride_h:int;
+  filter_width:int;
+  filter_height:int;
+  fused_activation_function:ActivationFunctionType;
+}
+
+table DepthwiseConv2DOptions {
+  // Parameters for DepthwiseConv version 1 or above.
+  padding:Padding;
+  stride_w:int;
+  stride_h:int;
+  depth_multiplier:int;
+  fused_activation_function:ActivationFunctionType;
+  // Parameters for DepthwiseConv version 2 or above.
+  dilation_w_factor:int = 1;
+  dilation_h_factor:int = 1;
+}
+
+table ConcatEmbeddingsOptions {
+  num_channels:int;
+  num_columns_per_channel:[int];
+  embedding_dim_per_channel:[int]; // This could be inferred from parameters.
+}
+
+enum LSHProjectionType: byte {
+  UNKNOWN = 0,
+  SPARSE = 1,
+  DENSE = 2,
+}
+
+table LSHProjectionOptions {
+  type: LSHProjectionType;
+}
+
+table SVDFOptions {
+  rank:int;
+  fused_activation_function:ActivationFunctionType;
+}
+
+// An implementation of TensorFlow RNNCell.
+table RNNOptions {
+  fused_activation_function:ActivationFunctionType;
+}
+
+// An implementation of TensorFlow dynamic_rnn with RNNCell.
+table SequenceRNNOptions {
+  time_major:bool;
+  fused_activation_function:ActivationFunctionType;
+}
+
+// An implementation of TensorFlow bidrectional_dynamic_rnn with RNNCell.
+table BidirectionalSequenceRNNOptions {
+  time_major:bool;
+  fused_activation_function:ActivationFunctionType;
+  merge_outputs: bool;
+}
+
+enum FullyConnectedOptionsWeightsFormat: byte {
+  DEFAULT = 0,
+  SHUFFLED4x16INT8 = 1,
+}
+
+// An implementation of TensorFlow fully_connected (a.k.a Dense) layer.
+table FullyConnectedOptions {
+  // Parameters for FullyConnected version 1 or above.
+  fused_activation_function:ActivationFunctionType;
+
+  // Parameters for FullyConnected version 2 or above.
+  weights_format:FullyConnectedOptionsWeightsFormat = DEFAULT;
+}
+
+table SoftmaxOptions {
+  beta: float;
+}
+
+// An implementation of TensorFlow concat.
+table ConcatenationOptions {
+  axis:int;
+  fused_activation_function:ActivationFunctionType;
+}
+
+table AddOptions {
+  fused_activation_function:ActivationFunctionType;
+}
+
+table MulOptions {
+  fused_activation_function:ActivationFunctionType;
+}
+
+table L2NormOptions {
+  fused_activation_function:ActivationFunctionType;
+}
+
+table LocalResponseNormalizationOptions {
+  radius:int;
+  bias:float;
+  alpha:float;
+  beta:float;
+}
+
+enum LSTMKernelType : byte {
+  // Full LSTM kernel which supports peephole and projection.
+  FULL = 0,
+  // Basic LSTM kernels. Equivalent to TensorFlow BasicLSTMCell.
+  BASIC = 1,
+}
+
+// An implementation of TensorFlow LSTMCell and CoupledInputForgetGateLSTMCell
+table LSTMOptions {
+  // Parameters for LSTM version 1 or above.
+  fused_activation_function:ActivationFunctionType;
+  cell_clip: float; // Optional, 0.0 means no clipping
+  proj_clip: float; // Optional, 0.0 means no clipping
+
+  // Parameters for LSTM version 2 or above.
+  // Basic kernel is only supported in version 2 or above.
+  kernel_type: LSTMKernelType = FULL;
+}
+
+// An implementation of TensorFlow dynamic_rnn with LSTMCell.
+table UnidirectionalSequenceLSTMOptions {
+  fused_activation_function:ActivationFunctionType;
+  cell_clip: float; // Optional, 0.0 means no clipping
+  proj_clip: float; // Optional, 0.0 means no clipping
+
+  // If true then first dimension is sequence, otherwise batch.
+  time_major:bool;
+}
+
+table BidirectionalSequenceLSTMOptions {
+  fused_activation_function:ActivationFunctionType;
+  cell_clip: float; // Optional, 0.0 means no clipping
+  proj_clip: float; // Optional, 0.0 means no clipping
+
+  // If true, store the outputs of both directions into the first output.
+  merge_outputs: bool;
+}
+
+table ResizeBilinearOptions {
+  new_height: int (deprecated);
+  new_width: int (deprecated);
+  align_corners: bool;
+}
+
+table ResizeNearestNeighborOptions {
+  align_corners: bool;
+}
+
+// A call operation options
+table CallOptions {
+  // The subgraph index that needs to be called.
+  subgraph:uint;
+}
+
+table PadOptions {
+}
+
+table PadV2Options {
+}
+
+table ReshapeOptions {
+  new_shape:[int];
+}
+
+table SpaceToBatchNDOptions {
+}
+
+table BatchToSpaceNDOptions {
+}
+
+table SkipGramOptions {
+  ngram_size: int;
+  max_skip_size: int;
+  include_all_ngrams: bool;
+}
+
+table SpaceToDepthOptions {
+  block_size: int;
+}
+
+table SubOptions {
+  fused_activation_function:ActivationFunctionType;
+}
+
+table DivOptions {
+  fused_activation_function:ActivationFunctionType;
+}
+
+table TopKV2Options {
+}
+
+enum CombinerType : byte {
+  SUM = 0,
+  MEAN = 1,
+  SQRTN = 2,
+}
+
+table EmbeddingLookupSparseOptions {
+  combiner:CombinerType;
+}
+
+table GatherOptions {
+  axis: int;
+}
+
+table TransposeOptions {
+}
+
+table ExpOptions {
+}
+
+table ReducerOptions {
+  keep_dims: bool;
+}
+
+table SqueezeOptions {
+  squeeze_dims:[int];
+}
+
+table SplitOptions {
+  num_splits: int;
+}
+
+table SplitVOptions {
+  num_splits: int;
+}
+
+table StridedSliceOptions {
+  begin_mask: int;
+  end_mask: int;
+  ellipsis_mask: int;
+  new_axis_mask: int;
+  shrink_axis_mask: int;
+}
+
+table LogSoftmaxOptions {
+}
+
+table CastOptions {
+  in_data_type: TensorType;
+  out_data_type: TensorType;
+}
+
+table DequantizeOptions {
+}
+
+table MaximumMinimumOptions {
+}
+
+table TileOptions {
+}
+
+table ArgMaxOptions {
+  output_type : TensorType;
+}
+
+table ArgMinOptions {
+  output_type : TensorType;
+}
+
+table GreaterOptions {
+}
+
+table GreaterEqualOptions {
+}
+
+table LessOptions {
+}
+
+table LessEqualOptions {
+}
+
+table NegOptions {
+}
+
+table SelectOptions {
+}
+
+table SliceOptions {
+}
+
+table TransposeConvOptions {
+  padding:Padding;
+  stride_w:int;
+  stride_h:int;
+}
+
+table ExpandDimsOptions {
+}
+
+table SparseToDenseOptions {
+  validate_indices:bool;
+}
+
+table EqualOptions {
+}
+
+table NotEqualOptions {
+}
+
+table ShapeOptions {
+  // Optional output type of the operation (int32 or int64). Defaults to int32.
+  out_type : TensorType;
+}
+
+table PowOptions {
+}
+
+table FakeQuantOptions {
+  // Parameters supported by version 1:
+  min:float;
+  max:float;
+  num_bits:int;
+
+  // Parameters supported by version 2:
+  narrow_range:bool;
+}
+
+table PackOptions {
+  values_count:int;
+  axis:int;
+}
+
+table LogicalOrOptions {
+}
+
+table OneHotOptions {
+  axis:int;
+}
+
+table AbsOptions {
+}
+
+
+table LogicalAndOptions {
+}
+
+table LogicalNotOptions {
+}
+
+table UnpackOptions {
+  num:int;
+  axis:int;
+}
+
+table FloorDivOptions {
+}
+
+table SquareOptions {
+}
+
+table ZerosLikeOptions {
+}
+
+table FillOptions {
+}
+
+table FloorModOptions {
+}
+
+table RangeOptions {
+}
+
+table LeakyReluOptions {
+  alpha:float;
+}
+
+table SquaredDifferenceOptions {
+}
+
+enum MirrorPadMode : byte {
+  // Doesn't include borders.
+  REFLECT = 0,
+  // Includes borders.
+  SYMMETRIC = 1,
+}
+
+table MirrorPadOptions {
+  mode:MirrorPadMode;
+}
+
+// An OperatorCode can be an enum value (BuiltinOperator) if the operator is a
+// builtin, or a string if the operator is custom.
+table OperatorCode {
+  builtin_code:BuiltinOperator;
+  custom_code:string;
+
+  // The version of the operator. The version need to be bumped whenever new
+  // parameters are introduced into an op.
+  version:int = 1;
+}
+
+enum CustomOptionsFormat : byte {
+  FLEXBUFFERS = 0,
+}
+
+enum DataFormat : byte {
+  // For 2D data, NHWC(batch, height, width, channels)
+  // For 3D data, NDHWC(batch, depth, height, width, channels)
+  CHANNELS_LAST = 0,
+  // For 2D data, NCHW(batch, channels, height, width)
+  // For 3D data, NCDHW(batch, channels, depth, height, width)
+  CHANNELS_FIRST = 1,
+}
+
+// An operator takes tensors as inputs and outputs. The type of operation being
+// performed is determined by an index into the list of valid OperatorCodes,
+// while the specifics of each operations is configured using builtin_options
+// or custom_options.
+table Operator {
+  // Index into the operator_codes array. Using an integer here avoids
+  // complicate map lookups.
+  opcode_index:uint;
+
+  // Optional input and output tensors are indicated by -1.
+  inputs:[int];
+  outputs:[int];
+
+  builtin_options:BuiltinOptions;
+  custom_options:[ubyte];
+  custom_options_format:CustomOptionsFormat;
+
+  // A list of booleans indicating the input tensors which are being mutated by
+  // this operator.(e.g. used by RNN and LSTM).
+  // For example, if the "inputs" array refers to 5 tensors and the second and
+  // fifth are mutable variables, then this list will contain
+  // [false, true, false, false, true].
+  //
+  // If the list is empty, no variable is mutated in this operator.
+  // The list either has the same length as `inputs`, or is empty.
+  mutating_variable_inputs:[bool];
+}
+
+// The root type, defining a subgraph, which typically represents an entire
+// model.
+table SubGraph {
+  // A list of all tensors used in this subgraph.
+  tensors:[Tensor];
+
+  // Indices of the tensors that are inputs into this subgraph. Note this is
+  // the list of non-static tensors that feed into the subgraph for inference.
+  inputs:[int];
+
+  // Indices of the tensors that are outputs out of this subgraph. Note this is
+  // the list of output tensors that are considered the product of the
+  // subgraph's inference.
+  outputs:[int];
+
+  // All operators, in execution order.
+  operators:[Operator];
+
+  // Name of this subgraph (used for debugging).
+  name:string;
+
+  // Data format for input/output of SubGraph
+  data_format: DataFormat;
+}
+
+// Table of raw data buffers (used for constant tensors). Referenced by tensors
+// by index. The generous alignment accommodates mmap-friendly data structures.
+table Buffer {
+  data:[ubyte] (force_align: 16);
+}
+
+table Model {
+  // Version of the schema.
+  version:uint;
+
+  // A list of all operator codes used in this model. This is
+  // kept in order because operators carry an index into this
+  // vector.
+  operator_codes:[OperatorCode];
+
+  // All the subgraphs of the model. The 0th is assumed to be the main
+  // model.
+  subgraphs:[SubGraph];
+
+  // A description of the model.
+  description:string;
+
+  // Buffers of the model.
+  // Note the 0th entry of this array must be an empty buffer (sentinel).
+  // This is a convention so that tensors without a buffer can provide 0 as
+  // their buffer.
+  buffers:[Buffer];
+
+  // Metadata about the model.  Indirects into the existings buffers list.
+  metadata_buffer:[int];
+}
+
+root_type Model;
diff --git a/nnpackage/spec/00_requirement.md b/nnpackage/spec/00_requirement.md
new file mode 100644
index 000000000..035fc9856
--- /dev/null
+++ b/nnpackage/spec/00_requirement.md
@@ -0,0 +1,28 @@
+# Requirements (or Checkpoint)
+
+## Packaging
+
+### Packaging Format
+
+- [ ] PF1. support royalty free compression
+- [ ] PF2. compatible with low end devices
+
+### Manifest
+
+- [ ] MF1. human readable
+- [ ] MF2. easy to parse for several types of configuration variables.
+- [ ] MF3. small binary size for parsing (since the parser will be part of runtime)
+
+## Model
+
+- [ ] MD1. support multiple tensor layout (such as NHWC, NCHW, etc)
+  - define layout for model / submodel / other unit?
+  - use operator (such as loco)
+- [ ] MD2. describe operand?
+  - include in operator vs. independent field for operand
+  - support unspecified dimension value & unspecified rank?
+- [ ] MD3. describe operation type
+  - string vs. enum value?
+- [ ] MD4. support many quantization
+  - howto (ex. union type quantization parameter field, field handle quantization parameter table for quantization methodology)
+- [ ] MD5. backward-compatibility and maintainability
diff --git a/nnpackage/spec/10_packaging_and_manifest.md b/nnpackage/spec/10_packaging_and_manifest.md
new file mode 100644
index 000000000..1bc18ff30
--- /dev/null
+++ b/nnpackage/spec/10_packaging_and_manifest.md
@@ -0,0 +1,92 @@
+# Packaging and Manifest
+
+## 1. Overview
+
+`nnpackage` is the input of nnruntime(`neurun`), and the output of nncompiler(`nncc`).
+
+`nnpackage` contains all data (such as model, `MANIFEST`, custom_op) that requires to run a given model.
+
+The document will cover packaging and `MANIFEST` only.
+
+For `model` and `custom_op`, see [20_model_and_operators.md](20_model_and_operators.md) and [30_custom_op.md](30_custom_op.md).
+
+## 2. Packaging Structure
+
+`nnpackage` is a Zip archive in the following structure:
+
+```
+nnpackage
+├── custom_op
+├── metadata
+│   └── MANIFEST
+└── mymodel.model
+```
+
+- `mymodel.model` is a model file that has computation graph and weights.
+- `metadata` is a directory that contains all metadata including `MANIFEST`.
+- `MANIFEST` is a collection of attributes about this package.
+- `custom_op` is a directory that contains implementation objects.
+
+## 3. Packaging Format
+
+`nnpackage` is contained in `Zip Archive`, which could be either `compressed` or `stored` (no compression).
+
+## 4. Manifest
+
+`MANIFEST` is a collection of attributes about `nnpacakge`.
+
+### Attributes
+
+#### version
+
+`version` is composed of 3 numbers in `MAJOR`.`MINOR`.`PATCH`.
+
+Given a version number MAJOR.MINOR.PATCH, increment the:
+
+MAJOR version when you make incompatible/breaking changes,
+MINOR version when you add functionality in a backwards-compatible manner, and
+PATCH version when you make backwards-compatible bug fixes.
+
+For detail, see [semantic versioning 2.0.0](https://semver.org/)
+
+##### major-version
+
+`major-version` is the major version of `nnpackage`.
+
+##### minor-version
+
+`minor-version` is the minor version of `nnpackage`.
+
+##### patch-version
+
+`patch-version` is the patch version of `nnpackage`.
+
+#### models
+
+`models` is an array of path to model files, which is relative path from top level directory of this package.
+The first element from the array will be the default model to be executed.
+
+#### model-types
+
+`model-types` is an array of strings that describes the type of each model in `models`.
+
+It can have the values (case-sensitive) in following table.
+
+| name   | description            |
+|--------|------------------------|
+| tflite | tensorflow lite schema |
+| circle | nnpackage schema       |
+
+### Example
+
+Here is an example of `MANIFEST`.
+
+```
+{
+    "major-version" : "1",
+    "minor-version" : "0",
+    "patch-version" : "0",
+    "models"      : [ "mymodel.model", "yourmodel.model" ],
+    "model-types" : [ "tflite", "circle" ]
+}
+```
diff --git a/nnpackage/spec/20_model_and_operators.md b/nnpackage/spec/20_model_and_operators.md
new file mode 100644
index 000000000..fa4131645
--- /dev/null
+++ b/nnpackage/spec/20_model_and_operators.md
@@ -0,0 +1,90 @@
+# Model
+
+## Serialization Format
+
+`nnpackage` uses flatbuffers to store model.
+
+Rationale:
+
+1. `flatbuffers` is:
+
+- space-efficient
+- explicit-schema based
+- royalty-free license open-source library
+- header-only solution (unless we use flatbuffer's reflection)
+- proven solution (used by TensorFlow-Lite)
+
+2. We've checked other solutions:
+- [`bjson (binary JSON)`](http://bjson.org/)
+- `protocol buffers`
+
+## Baseline Schema
+
+`nnpackage` schema is based on tensorflow-lite schema.
+
+Rationale:
+
+- Fundamentally, `nnpackage` and `TFLite` have same aim:
+Running pre-trained models on a device, which has relatively low computing power and memory.
+TFLite's solution is acceptable, we don't need to create same thing again.
+- We can use several infra-structures and tools from TFLite.
+
+## Extensions
+
+`nnpackage` model has some extensions that are different or missing from TFLite.
+
+### Multiple Layout
+
+`nnpackage` can support multiple layouts.
+
+1. The layout is presented using `DataFormat` enumeration.
+
+`DataFormat` must be one of the enumeration defined in `nnpackage_schema.fbs`.
+
+For example, `CHANNELS_FIRST` or `CHANNELS_LAST` can be used.
+
+```
+  // For 2D data, NHWC(batch, height, width, channels)
+  // For 3D data, NDHWC(batch, depth, height, width, channels)
+  CHANNELS_LAST = 0,
+  // For 2D data, NCHW(batch, channels, height, width)
+  // For 3D data, NCDHW(batch, channels, depth, height, width)
+  CHANNELS_FIRST = 1,
+```
+
+2. `DataFormat` must be same within a submodel.
+
+Rationale:
+
+- frequent switching between different layout degrades the performance
+
+Under this assumption, We expect to
+
+- simplify the runtime implementation
+- accelerate the performance
+- reduce the memory usage
+
+### Unspecified Dimension
+
+`nnpackage` represents unspecified dimension with `-1`.
+
+Rationale:
+
+1. It should be `int` since dimension is int type flatbuffer schema. Thus '?' cannot be used.
+2. `0` is also a candidate, which is used for Android NN API.
+However, we would like to reserve `0` because `0` could be a valid dimension for a certain
+operator (e.g. `tflite.slice`).
+
+## Operator Reference
+
+All operators use same semantics of tensorflow lite operators.
+Refer tensorflow lite source code to understand what inputs, outputs and attributes
+are required and how they are interpretered.
+
+## Schema Source
+
+nnpackage supports two kinds of models: `tflite` and `circle`
+
+- For tflite, see `schema.fbs` from tensorflow lite source.
+
+- For circle, see [`../schema/circle_schema.fbs`](../schema/circle_schema.fbs).
diff --git a/nnpackage/spec/30_custom_op.md b/nnpackage/spec/30_custom_op.md
new file mode 100644
index 000000000..58e0acddb
--- /dev/null
+++ b/nnpackage/spec/30_custom_op.md
@@ -0,0 +1,86 @@
+# Custom Operators
+
+This document explains about custom operator and how custom op is represented in nnpackage.
+
+## What is custom operator?
+
+Custom operator(hereafter custom op) is used to provide a new operator implementation.
+It can be anything that does not exist in current runtime implementation.
+
+You can use custom operator for several use cases, possible use cases are:
+
+- when an operator in tensorflow is not supported in nnfw runtime
+- when an operator is supported, however, you would like to use your own implementation
+  - it may be for optimization, by grouping several operators into one super operator.
+
+## Custom op in model
+
+nnpackage will support several kinds of models.
+Currently the only type is tflite.
+
+### tflite
+
+If you're using `tflite` format, it is same format to tensorflow lite.
+
+You can generate `tflite` model with custom op using `tflite_convert`.
+Please find the documentation in tensorflow official site.
+
+## Custom op kernel implementation
+
+You need to provide the kernel of custom op in the following form:
+
+```
+/*
+ * Custom kernel evaluation function
+ *
+ * param[in] params custom operation parameters
+ * param[in] userdata pointer to user-specified buffer( kernel instance specific )
+ */
+typedef void (*nnfw_custom_eval)(nnfw_custom_kernel_params *params, char *userdata,
+                                 size_t userdata_size);
+
+```
+
+The structures and relevant APIs are defined in nnfw APIs.
+Please see `nnfw_dev.h` for detail.
+
+You can find example in `nnfw` repository.
+
+Custom op kernel implementation is stored in nnpackage in form of prebuilt library.
+
+It is example nnpackage structure for `FillFrom`:
+
+```
+FillFrom
+├── FillFrom.tflite
+├── custom_op
+│   ├── libFillFrom.armv7l-linux.debug.a
+│   └── libFillFrom.armv7l-linux.release.a
+└── metadata
+    └── MANIFEST
+```
+
+All custom operator libraries are put under `{nnpackage_root}/custom_op/lib{customop_name}.{arch}-{os}-{buildtype}.a`.
+
+## How to use custom op in app
+
+To use custom op, the app has to register the operators with `nnfw_register_custom_op_info`.
+
+
+```
+/*
+ * custom operation registration info
+ */
+typedef struct
+{
+  nnfw_custom_eval eval_function;
+} custom_kernel_registration_info;
+
+NNFW_STATUS nnfw_register_custom_op_info(nnfw_session *session, const char *id,
+                                         custom_kernel_registration_info *info)
+```
+
+Please find sample app in `nnfw` repository
+
+The `id` should be unique in an app.
+
diff --git a/packaging/flatbuffers.tar.gz b/packaging/flatbuffers.tar.gz
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/packaging/flatbuffers.tar.gz
diff --git a/packaging/nnfw.spec b/packaging/nnfw.spec
index 3649e8e20..475fb2e81 100644
--- a/packaging/nnfw.spec
+++ b/packaging/nnfw.spec
@@ -1,12 +1,13 @@
 Name:    nnfw
 Summary: nnfw
-Version: 0.2
+Version: 0.3
 Release: 1
 Group:   Development
-License: Apache-2.0 and MIT
+License: Apache-2.0 and MIT and BSD-2-Clause
 
 Source0: %{name}-%{version}.tar.gz
 Source1: %{name}.manifest
+Source1001: flatbuffers.tar.gz
 
 %ifarch arm armv7l aarch64
 BuildRequires:	cmake
@@ -27,6 +28,13 @@ nnfw is a high-performance, on-device neural network framework for Tizen
 
 %{!?build_type: %define build_type Release}
 
+%package devel
+Summary: NNFW Devel Package
+Requires: nnfw
+
+%description devel
+NNFW devel package.
+
 %package test
 Summary: NNFW Test
 Requires: nnfw
@@ -46,26 +54,41 @@ NNFW test rpm. It does not depends on nnfw rpm since it contains nnfw runtime.
 %define target_arch aarch64
 %endif
 
+# Execute gbs with --define "test_build 1" in case that you need to test with environment variable
+%{!?test_build: %define test_build 0}
 %{!?coverage_build: %define coverage_build 0}
 %if %{coverage_build} == 1
-%define build_options COVERAGE_BUILD=1 OBS_BUILD=1 BUILD_TYPE=Debug TARGET_ARCH=%{target_arch} TARGET_OS=tizen
+%define build_options COVERAGE_BUILD=1 OBS_BUILD=1 BUILD_TYPE=Debug TARGET_ARCH=%{target_arch} TARGET_OS=tizen TFLITE_MAJOR_VER=1 TFLITE_MINOR_VER=13 OPTIONS=-DENVVAR_NEURUN_CONFIG=ON
 %else
-%define build_options OBS_BUILD=1 BUILD_TYPE=%{build_type} INSTALL_PATH=%{buildroot}%{_prefix} TARGET_ARCH=%{target_arch} TARGET_OS=tizen
+%if %{test_build} == 1
+%define build_options OBS_BUILD=1 BUILD_TYPE=%{build_type} INSTALL_PATH=%{buildroot}%{_prefix} TARGET_ARCH=%{target_arch} TARGET_OS=tizen TFLITE_MAJOR_VER=1 TFLITE_MINOR_VER=13 OPTIONS=-DENVVAR_NEURUN_CONFIG=ON
+%else
+%define build_options OBS_BUILD=1 BUILD_TYPE=%{build_type} INSTALL_PATH=%{buildroot}%{_prefix} TARGET_ARCH=%{target_arch} TARGET_OS=tizen TFLITE_MAJOR_VER=1 TFLITE_MINOR_VER=13
+%endif
 %endif
 
 %prep
 %setup -q
 cp %{SOURCE1} .
+mkdir ./externals
+cp %{SOURCE1001} ./externals/.
+cd ./externals
+tar -xf %{SOURCE1001}
 
 %build
 %ifarch arm armv7l aarch64
-%{build_options} make %{?jobs:-j%jobs}
+cp -v Makefile.template Makefile
+%{build_options} make %{?jobs:-j%jobs} all
 %endif
 
 %install
 %ifarch arm armv7l aarch64
 %{build_options} make install
 
+# copy header's for devel
+mkdir -p %{buildroot}%{_includedir}
+cp -rf runtimes/include/* %{buildroot}%{_includedir}
+
 %ifarch aarch64
 mv %{buildroot}%{_prefix}/lib %{buildroot}%{_libdir}
 %endif
@@ -79,12 +102,16 @@ mv %{buildroot}%{_prefix}/bin %{buildroot}%{test_install_prefix}/Product/out
 cp -rf %{buildroot}%{_libdir} %{buildroot}%{test_install_prefix}/Product/out
 rm -rf %{buildroot}%{_libdir}/pureacl
 ## install tests
-cp -rf ./tests/framework %{buildroot}%{test_install_prefix}/framework
+mkdir -p %{buildroot}%{test_install_prefix}/tests
+cp -rf ./tests/framework %{buildroot}%{test_install_prefix}/tests
 ## install tools
 mkdir -p %{buildroot}%{test_install_prefix}/tools
-cp -rf ./tests/scripts %{buildroot}%{test_install_prefix}/tools
+cp -rf ./tests/scripts %{buildroot}%{test_install_prefix}/tests
+## install infra
+mkdir -p %{buildroot}%{test_install_prefix}/infra
+cp -rf ./infra/scripts/ %{buildroot}%{test_install_prefix}/infra
 %else
-%{build_options} make build_coverage_suite
+%{build_options}  make build_coverage_suite
 mkdir -p %{buildroot}%{test_install_prefix}
 cp -rf Product/out/coverage-suite.tar.gz %{buildroot}%{test_install_prefix}/.
 tar -zxf %{buildroot}%{test_install_prefix}/coverage-suite.tar.gz -C %{buildroot}%{test_install_prefix}
@@ -105,6 +132,13 @@ rm -rf %{buildroot}%{test_install_prefix}/coverage-suite.tar.gz
 %exclude %{_libdir}/debug
 %endif
 
+%files devel
+%manifest %{name}.manifest
+%defattr(-,root,root,-)
+%ifarch arm armv7l aarch64
+%{_includedir}/*
+%endif
+
 %files test
 %manifest %{name}.manifest
 %defattr(-,root,root,-)
diff --git a/res/BVLCCaffeTests/BatchNorm_000/INFERENCE b/res/BVLCCaffeTests/BatchNorm_000/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/BatchNorm_000/INFERENCE
diff --git a/res/BVLCCaffeTests/BatchNorm_000/test.prototxt b/res/BVLCCaffeTests/BatchNorm_000/test.prototxt
new file mode 100644
index 000000000..7c0f19ddf
--- /dev/null
+++ b/res/BVLCCaffeTests/BatchNorm_000/test.prototxt
@@ -0,0 +1,17 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param {
+    shape: { dim: 1 dim: 3 dim: 4 dim: 4 }
+  }
+}
+layer {
+  name: "batchnorm"
+  type: "BatchNorm"
+  bottom: "data"
+  top: "batchnorm"
+  batch_norm_param {
+    use_global_stats: true
+  }
+}
diff --git a/res/BVLCCaffeTests/Concat_000/INFERENCE b/res/BVLCCaffeTests/Concat_000/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Concat_000/INFERENCE
diff --git a/res/BVLCCaffeTests/Concat_000/test.prototxt b/res/BVLCCaffeTests/Concat_000/test.prototxt
new file mode 100644
index 000000000..0c2ee899c
--- /dev/null
+++ b/res/BVLCCaffeTests/Concat_000/test.prototxt
@@ -0,0 +1,23 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data1"
+  top: "data2"
+  top: "data3"
+  top: "data4"
+  input_param {
+    shape: { dim: 1 dim: 1 dim: 4 dim: 4 }
+    shape: { dim: 1 dim: 2 dim: 4 dim: 4 }
+    shape: { dim: 1 dim: 3 dim: 4 dim: 4 }
+    shape: { dim: 1 dim: 4 dim: 4 dim: 4 }
+  }
+}
+layer {
+  name: "concat"
+  type: "Concat"
+  bottom: "data1"
+  bottom: "data2"
+  bottom: "data3"
+  bottom: "data4"
+  top: "concat"
+}
diff --git a/res/BVLCCaffeTests/Convolution_000/INFERENCE b/res/BVLCCaffeTests/Convolution_000/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Convolution_000/INFERENCE
diff --git a/res/BVLCCaffeTests/Convolution_000/test.prototxt b/res/BVLCCaffeTests/Convolution_000/test.prototxt
new file mode 100644
index 000000000..b56731c06
--- /dev/null
+++ b/res/BVLCCaffeTests/Convolution_000/test.prototxt
@@ -0,0 +1,23 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param {
+    shape: { dim: 1 dim: 3 dim: 4 dim: 4 }
+  }
+}
+layer {
+  name: "conv"
+  type: "Convolution"
+  bottom: "data"
+  top: "conv"
+  convolution_param {
+    bias_term: false
+    num_output: 2
+    kernel_size: 1
+    weight_filler {
+      type: "gaussian"
+      std: 0.01
+    }
+  }
+}
diff --git a/res/BVLCCaffeTests/Convolution_001/INFERENCE b/res/BVLCCaffeTests/Convolution_001/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Convolution_001/INFERENCE
diff --git a/res/BVLCCaffeTests/Convolution_001/test.prototxt b/res/BVLCCaffeTests/Convolution_001/test.prototxt
new file mode 100644
index 000000000..5b6b5c811
--- /dev/null
+++ b/res/BVLCCaffeTests/Convolution_001/test.prototxt
@@ -0,0 +1,24 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param {
+    shape: { dim: 1 dim: 3 dim: 15 dim: 15 }
+  }
+}
+layer {
+  name: "conv"
+  type: "Convolution"
+  bottom: "data"
+  top: "conv"
+  convolution_param {
+    bias_term: false
+    num_output: 2
+    stride: 2
+    kernel_size: 3
+    weight_filler {
+      type: "gaussian"
+      std: 0.01
+    }
+  }
+}
diff --git a/res/BVLCCaffeTests/Convolution_002/INFERENCE b/res/BVLCCaffeTests/Convolution_002/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Convolution_002/INFERENCE
diff --git a/res/BVLCCaffeTests/Convolution_002/test.prototxt b/res/BVLCCaffeTests/Convolution_002/test.prototxt
new file mode 100644
index 000000000..7cd59be3e
--- /dev/null
+++ b/res/BVLCCaffeTests/Convolution_002/test.prototxt
@@ -0,0 +1,24 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param {
+    shape: { dim: 1 dim: 3 dim: 16 dim: 16 }
+  }
+}
+layer {
+  name: "conv"
+  type: "Convolution"
+  bottom: "data"
+  top: "conv"
+  convolution_param {
+    bias_term: false
+    num_output: 2
+    pad: 1
+    kernel_size: 3
+    weight_filler {
+      type: "gaussian"
+      std: 0.01
+    }
+  }
+}
diff --git a/res/BVLCCaffeTests/Convolution_003/INFERENCE b/res/BVLCCaffeTests/Convolution_003/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Convolution_003/INFERENCE
diff --git a/res/BVLCCaffeTests/Convolution_003/test.prototxt b/res/BVLCCaffeTests/Convolution_003/test.prototxt
new file mode 100644
index 000000000..38c4ebdf9
--- /dev/null
+++ b/res/BVLCCaffeTests/Convolution_003/test.prototxt
@@ -0,0 +1,25 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param {
+    shape: { dim: 1 dim: 3 dim: 16 dim: 16 }
+  }
+}
+layer {
+  name: "conv"
+  type: "Convolution"
+  bottom: "data"
+  top: "conv"
+  convolution_param {
+    bias_term: false
+    num_output: 2
+    pad: 1
+    pad: 2
+    kernel_size: 3
+    weight_filler {
+      type: "gaussian"
+      std: 0.01
+    }
+  }
+}
diff --git a/res/BVLCCaffeTests/Convolution_004/INFERENCE b/res/BVLCCaffeTests/Convolution_004/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Convolution_004/INFERENCE
diff --git a/res/BVLCCaffeTests/Convolution_004/test.prototxt b/res/BVLCCaffeTests/Convolution_004/test.prototxt
new file mode 100644
index 000000000..76b1039c5
--- /dev/null
+++ b/res/BVLCCaffeTests/Convolution_004/test.prototxt
@@ -0,0 +1,24 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param {
+    shape: { dim: 1 dim: 3 dim: 16 dim: 16 }
+  }
+}
+layer {
+  name: "conv"
+  type: "Convolution"
+  bottom: "data"
+  top: "conv"
+  convolution_param {
+    bias_term: false
+    num_output: 2
+    kernel_h: 3
+    kernel_w: 1
+    weight_filler {
+      type: "gaussian"
+      std: 0.01
+    }
+  }
+}
diff --git a/res/BVLCCaffeTests/Convolution_005/INFERENCE b/res/BVLCCaffeTests/Convolution_005/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Convolution_005/INFERENCE
diff --git a/res/BVLCCaffeTests/Convolution_005/test.prototxt b/res/BVLCCaffeTests/Convolution_005/test.prototxt
new file mode 100644
index 000000000..93104fee8
--- /dev/null
+++ b/res/BVLCCaffeTests/Convolution_005/test.prototxt
@@ -0,0 +1,21 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param {
+    shape: { dim: 1 dim: 3 dim: 15 dim: 15 }
+  }
+}
+layer {
+  name: "conv"
+  type: "Convolution"
+  bottom: "data"
+  top: "conv"
+  convolution_param {
+    bias_term: false
+    num_output: 2
+    pad_h: 0
+    pad_w: 3
+    kernel_size: 7
+  }
+}
diff --git a/res/BVLCCaffeTests/Convolution_006/INFERENCE b/res/BVLCCaffeTests/Convolution_006/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Convolution_006/INFERENCE
diff --git a/res/BVLCCaffeTests/Convolution_006/test.prototxt b/res/BVLCCaffeTests/Convolution_006/test.prototxt
new file mode 100644
index 000000000..f50a0070f
--- /dev/null
+++ b/res/BVLCCaffeTests/Convolution_006/test.prototxt
@@ -0,0 +1,24 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param {
+    shape: { dim: 1 dim: 3 dim: 16 dim: 16 }
+  }
+}
+layer {
+  name: "dconv"
+  type: "Convolution"
+  bottom: "data"
+  top: "dconv"
+  convolution_param {
+    group: 3
+    num_output: 3
+    bias_term: false
+    kernel_size: 3
+    weight_filler {
+      type: "gaussian"
+      std: 0.01
+    }
+  }
+}
diff --git a/res/BVLCCaffeTests/Convolution_007/INFERENCE b/res/BVLCCaffeTests/Convolution_007/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Convolution_007/INFERENCE
diff --git a/res/BVLCCaffeTests/Convolution_007/test.prototxt b/res/BVLCCaffeTests/Convolution_007/test.prototxt
new file mode 100644
index 000000000..78009fe27
--- /dev/null
+++ b/res/BVLCCaffeTests/Convolution_007/test.prototxt
@@ -0,0 +1,26 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param {
+    shape: { dim: 1 dim: 3 dim: 4 dim: 4 }
+  }
+}
+layer {
+  name: "conv"
+  type: "Convolution"
+  bottom: "data"
+  top: "conv"
+  convolution_param {
+    num_output: 2
+    kernel_size: 1
+    weight_filler {
+      type: "gaussian"
+      std: 0.01
+    }
+    bias_filler {
+      type: "gaussian"
+      std: 0.01
+    }
+  }
+}
diff --git a/res/BVLCCaffeTests/Eltwise_000/INFERENCE b/res/BVLCCaffeTests/Eltwise_000/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Eltwise_000/INFERENCE
diff --git a/res/BVLCCaffeTests/Eltwise_000/test.prototxt b/res/BVLCCaffeTests/Eltwise_000/test.prototxt
new file mode 100644
index 000000000..09b85c390
--- /dev/null
+++ b/res/BVLCCaffeTests/Eltwise_000/test.prototxt
@@ -0,0 +1,20 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "lhs"
+  top: "rhs"
+  input_param {
+    shape: { dim: 1 dim: 3 dim: 16 dim: 16 }
+    shape: { dim: 1 dim: 3 dim: 16 dim: 16 }
+  }
+}
+layer {
+  name: "sum"
+  type: "Eltwise"
+  bottom: "lhs"
+  bottom: "rhs"
+  top: "sum"
+  eltwise_param {
+    operation: SUM
+  }
+}
diff --git a/res/BVLCCaffeTests/Eltwise_001/INFERENCE b/res/BVLCCaffeTests/Eltwise_001/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Eltwise_001/INFERENCE
diff --git a/res/BVLCCaffeTests/Eltwise_001/test.prototxt b/res/BVLCCaffeTests/Eltwise_001/test.prototxt
new file mode 100644
index 000000000..3eef071f9
--- /dev/null
+++ b/res/BVLCCaffeTests/Eltwise_001/test.prototxt
@@ -0,0 +1,20 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "lhs"
+  top: "rhs"
+  input_param {
+    shape: { dim: 1 dim: 3 dim: 16 dim: 16 }
+    shape: { dim: 1 dim: 3 dim: 16 dim: 16 }
+  }
+}
+layer {
+  name: "prod"
+  type: "Eltwise"
+  bottom: "lhs"
+  bottom: "rhs"
+  top: "prod"
+  eltwise_param {
+    operation: PROD
+  }
+}
diff --git a/res/BVLCCaffeTests/Input_000/INFERENCE b/res/BVLCCaffeTests/Input_000/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Input_000/INFERENCE
diff --git a/res/BVLCCaffeTests/Input_000/test.prototxt b/res/BVLCCaffeTests/Input_000/test.prototxt
new file mode 100644
index 000000000..2d0571382
--- /dev/null
+++ b/res/BVLCCaffeTests/Input_000/test.prototxt
@@ -0,0 +1,8 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param {
+    shape: { dim: 1 dim: 3 dim: 244 dim: 244 }
+  }
+}
diff --git a/res/BVLCCaffeTests/Input_001/INFERENCE b/res/BVLCCaffeTests/Input_001/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Input_001/INFERENCE
diff --git a/res/BVLCCaffeTests/Input_001/test.prototxt b/res/BVLCCaffeTests/Input_001/test.prototxt
new file mode 100644
index 000000000..eece8b77c
--- /dev/null
+++ b/res/BVLCCaffeTests/Input_001/test.prototxt
@@ -0,0 +1,12 @@
+layer {
+  name: "data1"
+  type: "Input"
+  top: "data1"
+  input_param { shape: { dim: 1 dim: 3 dim: 15 dim: 15 } }
+}
+layer {
+  name: "data2"
+  type: "Input"
+  top: "data2"
+  input_param { shape: { dim: 1 dim: 3 dim: 15 dim: 15 } }
+}
diff --git a/res/BVLCCaffeTests/Pooling_000/INFERENCE b/res/BVLCCaffeTests/Pooling_000/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Pooling_000/INFERENCE
diff --git a/res/BVLCCaffeTests/Pooling_000/test.prototxt b/res/BVLCCaffeTests/Pooling_000/test.prototxt
new file mode 100644
index 000000000..8ed0c3828
--- /dev/null
+++ b/res/BVLCCaffeTests/Pooling_000/test.prototxt
@@ -0,0 +1,16 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param { shape: { dim: 1 dim: 3 dim: 16 dim: 16 } }
+}
+layer {
+  name: "pool"
+  type: "Pooling"
+  bottom: "data"
+  top: "pool"
+  pooling_param {
+    pool: MAX
+    kernel_size: 3
+  }
+}
diff --git a/res/BVLCCaffeTests/Pooling_001/INFERENCE b/res/BVLCCaffeTests/Pooling_001/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Pooling_001/INFERENCE
diff --git a/res/BVLCCaffeTests/Pooling_001/test.prototxt b/res/BVLCCaffeTests/Pooling_001/test.prototxt
new file mode 100644
index 000000000..1ecbb96bc
--- /dev/null
+++ b/res/BVLCCaffeTests/Pooling_001/test.prototxt
@@ -0,0 +1,17 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param { shape: { dim: 1 dim: 3 dim: 15 dim: 15 } }
+}
+layer {
+  name: "pool"
+  type: "Pooling"
+  bottom: "data"
+  top: "pool"
+  pooling_param {
+    pool: MAX
+    kernel_size: 3
+    stride: 2
+  }
+}
diff --git a/res/BVLCCaffeTests/Pooling_002/INFERENCE b/res/BVLCCaffeTests/Pooling_002/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Pooling_002/INFERENCE
diff --git a/res/BVLCCaffeTests/Pooling_002/test.prototxt b/res/BVLCCaffeTests/Pooling_002/test.prototxt
new file mode 100644
index 000000000..f199bdc60
--- /dev/null
+++ b/res/BVLCCaffeTests/Pooling_002/test.prototxt
@@ -0,0 +1,16 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param { shape: { dim: 1 dim: 3 dim: 16 dim: 16 } }
+}
+layer {
+  name: "pool"
+  type: "Pooling"
+  bottom: "data"
+  top: "pool"
+  pooling_param {
+    pool: AVE
+    kernel_size: 3
+  }
+}
diff --git a/res/BVLCCaffeTests/Pooling_003/INFERENCE b/res/BVLCCaffeTests/Pooling_003/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Pooling_003/INFERENCE
diff --git a/res/BVLCCaffeTests/Pooling_003/test.prototxt b/res/BVLCCaffeTests/Pooling_003/test.prototxt
new file mode 100644
index 000000000..e25855fa8
--- /dev/null
+++ b/res/BVLCCaffeTests/Pooling_003/test.prototxt
@@ -0,0 +1,17 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param { shape: { dim: 1 dim: 3 dim: 15 dim: 15 } }
+}
+layer {
+  name: "pool"
+  type: "Pooling"
+  bottom: "data"
+  top: "pool"
+  pooling_param {
+    pool: AVE
+    kernel_size: 3
+    stride: 2
+  }
+}
diff --git a/res/BVLCCaffeTests/Pooling_004/INFERENCE b/res/BVLCCaffeTests/Pooling_004/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Pooling_004/INFERENCE
diff --git a/res/BVLCCaffeTests/Pooling_004/test.prototxt b/res/BVLCCaffeTests/Pooling_004/test.prototxt
new file mode 100644
index 000000000..533a01c88
--- /dev/null
+++ b/res/BVLCCaffeTests/Pooling_004/test.prototxt
@@ -0,0 +1,17 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param { shape: { dim: 1 dim: 3 dim: 16 dim: 16 } }
+}
+layer {
+  name: "pool"
+  type: "Pooling"
+  bottom: "data"
+  top: "pool"
+  pooling_param {
+    pool: MAX
+    kernel_size: 3
+    pad: 1
+  }
+}
diff --git a/res/BVLCCaffeTests/Pooling_005/INFERENCE b/res/BVLCCaffeTests/Pooling_005/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Pooling_005/INFERENCE
diff --git a/res/BVLCCaffeTests/Pooling_005/test.prototxt b/res/BVLCCaffeTests/Pooling_005/test.prototxt
new file mode 100644
index 000000000..36475c71e
--- /dev/null
+++ b/res/BVLCCaffeTests/Pooling_005/test.prototxt
@@ -0,0 +1,17 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param { shape: { dim: 1 dim: 3 dim: 15 dim: 15 } }
+}
+layer {
+  name: "pool"
+  type: "Pooling"
+  bottom: "data"
+  top: "pool"
+  pooling_param {
+    pool: AVE
+    kernel_size: 3
+    pad: 1
+  }
+}
diff --git a/res/BVLCCaffeTests/ReLU_000/INFERENCE b/res/BVLCCaffeTests/ReLU_000/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/ReLU_000/INFERENCE
diff --git a/res/BVLCCaffeTests/ReLU_000/test.prototxt b/res/BVLCCaffeTests/ReLU_000/test.prototxt
new file mode 100644
index 000000000..5fe2a938e
--- /dev/null
+++ b/res/BVLCCaffeTests/ReLU_000/test.prototxt
@@ -0,0 +1,14 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param {
+    shape: { dim: 1 dim: 2 dim: 5 dim: 3 }
+  }
+}
+layer {
+  name: "relu"
+  type: "ReLU"
+  bottom: "data"
+  top: "data"
+}
diff --git a/res/BVLCCaffeTests/Regression_0000/INFERENCE b/res/BVLCCaffeTests/Regression_0000/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Regression_0000/INFERENCE
diff --git a/res/BVLCCaffeTests/Regression_0000/test.prototxt b/res/BVLCCaffeTests/Regression_0000/test.prototxt
new file mode 100644
index 000000000..5927d692f
--- /dev/null
+++ b/res/BVLCCaffeTests/Regression_0000/test.prototxt
@@ -0,0 +1,17 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param { shape: { dim: 1 dim: 3 dim: 15 dim: 15 } }
+}
+layer {
+  name: "pool"
+  type: "Pooling"
+  bottom: "data"
+  top: "pool"
+  pooling_param {
+    pool: AVE
+    kernel_h: 3
+    kernel_w: 1
+  }
+}
diff --git a/res/BVLCCaffeTests/Scale_000/INFERENCE b/res/BVLCCaffeTests/Scale_000/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Scale_000/INFERENCE
diff --git a/res/BVLCCaffeTests/Scale_000/test.prototxt b/res/BVLCCaffeTests/Scale_000/test.prototxt
new file mode 100644
index 000000000..2f628ec6c
--- /dev/null
+++ b/res/BVLCCaffeTests/Scale_000/test.prototxt
@@ -0,0 +1,16 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param { shape: { dim: 1 dim: 3 dim: 16 dim: 16 } }
+}
+layer {
+  name: "scale"
+  type: "Scale"
+  bottom: "data"
+  top: "scale"
+  scale_param {
+    filler { type: "gaussian" std: 0.01 }
+    bias_term: false
+  }
+}
diff --git a/res/BVLCCaffeTests/Scale_001/INFERENCE b/res/BVLCCaffeTests/Scale_001/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/Scale_001/INFERENCE
diff --git a/res/BVLCCaffeTests/Scale_001/test.prototxt b/res/BVLCCaffeTests/Scale_001/test.prototxt
new file mode 100644
index 000000000..d15be8ff3
--- /dev/null
+++ b/res/BVLCCaffeTests/Scale_001/test.prototxt
@@ -0,0 +1,17 @@
+layer {
+  name: "data"
+  type: "Input"
+  top: "data"
+  input_param { shape: { dim: 1 dim: 3 dim: 16 dim: 16 } }
+}
+layer {
+  name: "scale"
+  type: "Scale"
+  bottom: "data"
+  top: "scale"
+  scale_param {
+    filler { type: "gaussian" std: 0.01 }
+    bias_term: true
+    bias_filler { type: "gaussian" std: 0.01 }
+  }
+}
diff --git a/res/BVLCCaffeTests/inception_c1/INFERENCE b/res/BVLCCaffeTests/inception_c1/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/inception_c1/INFERENCE
diff --git a/res/BVLCCaffeTests/inception_c1/test.prototxt b/res/BVLCCaffeTests/inception_c1/test.prototxt
new file mode 100644
index 000000000..7f2df4571
--- /dev/null
+++ b/res/BVLCCaffeTests/inception_c1/test.prototxt
@@ -0,0 +1,252 @@
+name: "inception_c1"
+layer {
+  name: "input"
+  type: "Input"
+  top: "reduction_b_concat"
+  input_param {
+    shape {
+      dim: 1
+      dim: 3
+      dim: 32
+      dim: 32
+    }
+  }
+}
+layer {
+  name: "inception_c1_1x1_2"
+  type: "Convolution"
+  bottom: "reduction_b_concat"
+  top: "inception_c1_1x1_2"
+  convolution_param {
+    bias_term: false
+    num_output: 2
+    pad: 0
+    kernel_size: 1
+    stride: 1
+    weight_filler {
+      type: "gaussian"
+      std: 0.01
+    }
+  }
+}
+layer {
+  name: "inception_c1_1x1_2_relu"
+  type: "ReLU"
+  bottom: "inception_c1_1x1_2"
+  top: "inception_c1_1x1_2"
+}
+layer {
+  name: "inception_c1_1x3_reduce"
+  type: "Convolution"
+  bottom: "reduction_b_concat"
+  top: "inception_c1_1x3_reduce"
+  convolution_param {
+    bias_term: false
+    num_output: 3
+    pad: 0
+    kernel_size: 1
+    stride: 1
+    weight_filler {
+      type: "gaussian"
+      std: 0.01
+    }
+  }
+}
+layer {
+  name: "inception_c1_1x3_reduce_relu"
+  type: "ReLU"
+  bottom: "inception_c1_1x3_reduce"
+  top: "inception_c1_1x3_reduce"
+}
+layer {
+  name: "inception_c1_1x3"
+  type: "Convolution"
+  bottom: "inception_c1_1x3_reduce"
+  top: "inception_c1_1x3"
+  convolution_param {
+    bias_term: false
+    num_output: 4
+    stride: 1
+    pad_h: 0
+    pad_w: 1
+    kernel_h: 1
+    kernel_w: 3
+    weight_filler {
+      type: "gaussian"
+      std: 0.01
+    }
+  }
+}
+layer {
+  name: "inception_c1_1x3_relu"
+  type: "ReLU"
+  bottom: "inception_c1_1x3"
+  top: "inception_c1_1x3"
+}
+layer {
+  name: "inception_c1_3x1"
+  type: "Convolution"
+  bottom: "inception_c1_1x3_reduce"
+  top: "inception_c1_3x1"
+  convolution_param {
+    bias_term: false
+    num_output: 5
+    stride: 1
+    pad_h: 1
+    pad_w: 0
+    kernel_h: 3
+    kernel_w: 1
+    weight_filler {
+      type: "gaussian"
+      std: 0.01
+    }
+  }
+}
+layer {
+  name: "inception_c1_3x1_relu"
+  type: "ReLU"
+  bottom: "inception_c1_3x1"
+  top: "inception_c1_3x1"
+}
+layer {
+  name: "inception_c1_3x3_reduce"
+  type: "Convolution"
+  bottom: "reduction_b_concat"
+  top: "inception_c1_3x3_reduce"
+  convolution_param {
+    bias_term: false
+    num_output: 5
+    pad: 0
+    kernel_size: 1
+    stride: 1
+    weight_filler {
+      type: "gaussian"
+      std: 0.01
+    }
+  }
+}
+layer {
+  name: "inception_c1_3x3_reduce_relu"
+  type: "ReLU"
+  bottom: "inception_c1_3x3_reduce"
+  top: "inception_c1_3x3_reduce"
+}
+layer {
+  name: "inception_c1_3x3"
+  type: "Convolution"
+  bottom: "inception_c1_3x3_reduce"
+  top: "inception_c1_3x3"
+  convolution_param {
+    bias_term: false
+    num_output: 6
+    pad: 1
+    kernel_size: 3
+    stride: 1
+    weight_filler {
+      type: "gaussian"
+      std: 0.01
+    }
+  }
+}
+layer {
+  name: "inception_c1_3x3_relu"
+  type: "ReLU"
+  bottom: "inception_c1_3x3"
+  top: "inception_c1_3x3"
+}
+layer {
+  name: "inception_c1_1x3_2"
+  type: "Convolution"
+  bottom: "inception_c1_3x3"
+  top: "inception_c1_1x3_2"
+  convolution_param {
+    bias_term: false
+    num_output: 7
+    stride: 1
+    pad_h: 0
+    pad_w: 1
+    kernel_h: 1
+    kernel_w: 3
+    weight_filler {
+      type: "gaussian"
+      std: 0.01
+    }
+  }
+}
+layer {
+  name: "inception_c1_1x3_2_relu"
+  type: "ReLU"
+  bottom: "inception_c1_1x3_2"
+  top: "inception_c1_1x3_2"
+}
+layer {
+  name: "inception_c1_3x1_2"
+  type: "Convolution"
+  bottom: "inception_c1_3x3"
+  top: "inception_c1_3x1_2"
+  convolution_param {
+    bias_term: false
+    num_output: 8
+    stride: 1
+    pad_h: 1
+    pad_w: 0
+    kernel_h: 3
+    kernel_w: 1
+    weight_filler {
+      type: "gaussian"
+      std: 0.01
+    }
+  }
+}
+layer {
+  name: "inception_c1_3x1_2_relu"
+  type: "ReLU"
+  bottom: "inception_c1_3x1_2"
+  top: "inception_c1_3x1_2"
+}
+layer {
+  name: "inception_c1_pool"
+  type: "Pooling"
+  bottom: "reduction_b_concat"
+  top: "inception_c1_pool"
+  pooling_param {
+    pool: AVE
+    kernel_size: 3
+    stride: 1
+    pad: 1
+  }
+}
+layer {
+  name: "inception_c1_1x1"
+  type: "Convolution"
+  bottom: "inception_c1_pool"
+  top: "inception_c1_1x1"
+  convolution_param {
+    bias_term: false
+    num_output: 10
+    pad: 0
+    kernel_size: 1
+    stride: 1
+    weight_filler {
+      type: "gaussian"
+      std: 0.01
+    }
+  }
+}
+layer {
+  name: "inception_c1_1x1_relu"
+  type: "ReLU"
+  bottom: "inception_c1_1x1"
+  top: "inception_c1_1x1"
+}
+layer {
+  name: "inception_c1_concat"
+  type: "Concat"
+  bottom: "inception_c1_1x1_2"
+  bottom: "inception_c1_1x3"
+  bottom: "inception_c1_3x1"
+  bottom: "inception_c1_1x3_2"
+  bottom: "inception_c1_3x1_2"
+  bottom: "inception_c1_1x1"
+  top: "inception_c1_concat"
+}
diff --git a/res/BVLCCaffeTests/residual/INFERENCE b/res/BVLCCaffeTests/residual/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/residual/INFERENCE
diff --git a/res/BVLCCaffeTests/residual/test.prototxt b/res/BVLCCaffeTests/residual/test.prototxt
new file mode 100644
index 000000000..8ced8b6d5
--- /dev/null
+++ b/res/BVLCCaffeTests/residual/test.prototxt
@@ -0,0 +1,72 @@
+name: "residual"
+layer {
+  name: "input"
+  type: "Input"
+  top: "data"
+  input_param {
+    shape {
+      dim: 1
+      dim: 3
+      dim: 31
+      dim: 31
+    }
+  }
+}
+layer {
+  name: "MaxPool2dBackward4"
+  type: "Pooling"
+  bottom: "data"
+  top: "MaxPool2dBackward4"
+  pooling_param {
+    pool: MAX
+    kernel_size: 3
+    stride: 2
+    pad: 1
+  }
+}
+layer {
+  name: "ConvNdBackward5"
+  type: "Convolution"
+  bottom: "MaxPool2dBackward4"
+  top: "ConvNdBackward5"
+  convolution_param {
+    num_output: 5
+    pad_h: 1
+    pad_w: 1
+    kernel_h: 3
+    kernel_w: 3
+    stride: 1
+    bias_term: false
+  }
+}
+layer {
+  name: "ThresholdBackward7"
+  type: "ReLU"
+  bottom: "ConvNdBackward5"
+  top: "ConvNdBackward5"
+}
+layer {
+  name: "ConvNdBackward8"
+  type: "Convolution"
+  bottom: "ConvNdBackward5"
+  top: "ConvNdBackward8"
+  convolution_param {
+    num_output: 3
+    pad_h: 1
+    pad_w: 1
+    kernel_h: 3
+    kernel_w: 3
+    stride: 1
+    bias_term: false
+  }
+}
+layer {
+  name: "AddBackward11"
+  type: "Eltwise"
+  bottom: "ConvNdBackward8"
+  bottom: "MaxPool2dBackward4"
+  top: "AddBackward11"
+  eltwise_param {
+    operation: SUM
+  }
+}
diff --git a/res/BVLCCaffeTests/residual_bn/INFERENCE b/res/BVLCCaffeTests/residual_bn/INFERENCE
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/res/BVLCCaffeTests/residual_bn/INFERENCE
diff --git a/res/BVLCCaffeTests/residual_bn/test.prototxt b/res/BVLCCaffeTests/residual_bn/test.prototxt
new file mode 100644
index 000000000..eaa321e8d
--- /dev/null
+++ b/res/BVLCCaffeTests/residual_bn/test.prototxt
@@ -0,0 +1,110 @@
+name: "residual_bn"
+layer {
+  name: "input"
+  type: "Input"
+  top: "data"
+  input_param {
+    shape {
+      dim: 1
+      dim: 3
+      dim: 31
+      dim: 31
+    }
+  }
+}
+layer {
+  name: "MaxPool2dBackward4"
+  type: "Pooling"
+  bottom: "data"
+  top: "MaxPool2dBackward4"
+  pooling_param {
+    pool: MAX
+    kernel_size: 3
+    stride: 2
+    pad: 1
+  }
+}
+layer {
+  name: "ConvNdBackward5"
+  type: "Convolution"
+  bottom: "MaxPool2dBackward4"
+  top: "ConvNdBackward5"
+  convolution_param {
+    num_output: 5
+    pad_h: 1
+    pad_w: 1
+    kernel_h: 3
+    kernel_w: 3
+    stride: 1
+    bias_term: false
+  }
+}
+layer {
+  name: "BatchNormBackward6_bn"
+  type: "BatchNorm"
+  bottom: "ConvNdBackward5"
+  top: "BatchNormBackward6"
+  batch_norm_param {
+    use_global_stats: true
+    eps: 1e-05
+  }
+}
+layer {
+  name: "BatchNormBackward6_scale"
+  type: "Scale"
+  bottom: "BatchNormBackward6"
+  top: "BatchNormBackward6"
+  scale_param {
+    bias_term: true
+  }
+}
+layer {
+  name: "ThresholdBackward7"
+  type: "ReLU"
+  bottom: "BatchNormBackward6"
+  top: "BatchNormBackward6"
+}
+layer {
+  name: "ConvNdBackward8"
+  type: "Convolution"
+  bottom: "BatchNormBackward6"
+  top: "ConvNdBackward8"
+  convolution_param {
+    num_output: 3
+    pad_h: 1
+    pad_w: 1
+    kernel_h: 3
+    kernel_w: 3
+    stride: 1
+    bias_term: false
+  }
+}
+layer {
+  name: "BatchNormBackward9_bn"
+  type: "BatchNorm"
+  bottom: "ConvNdBackward8"
+  top: "BatchNormBackward9"
+  batch_norm_param {
+    use_global_stats: true
+    eps: 1e-05
+  }
+}
+layer {
+  name: "BatchNormBackward9_scale"
+  type: "Scale"
+  bottom: "BatchNormBackward9"
+  top: "BatchNormBackward9"
+  scale_param {
+    bias_term: true
+  }
+}
+layer {
+  name: "AddBackward11"
+  type: "Eltwise"
+  bottom: "BatchNormBackward9"
+  bottom: "MaxPool2dBackward4"
+  top: "AddBackward11"
+  eltwise_param {
+    operation: SUM
+  }
+}
diff --git a/res/TensorFlowTests/NET_0000/test.info b/res/TensorFlowTests/NET_0000/test.info
new file mode 100644
index 000000000..bdde9126b
--- /dev/null
+++ b/res/TensorFlowTests/NET_0000/test.info
@@ -0,0 +1,3 @@
+# conv2d with VALID, stride = 1, 1
+input,  ifm:0,  TF_FLOAT,  [1, 5, 5, 3]
+output, maxpool:0,  TF_FLOAT,  [1, 4, 4, 2]
diff --git a/res/TensorFlowTests/NET_0000/test.pbtxt b/res/TensorFlowTests/NET_0000/test.pbtxt
new file mode 100644
index 000000000..5aafa31db
--- /dev/null
+++ b/res/TensorFlowTests/NET_0000/test.pbtxt
@@ -0,0 +1,102 @@
+# Small Conv2D-MaxPool network
+node {
+  name: "ifm"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 5 }
+        dim { size: 5 }
+        dim { size: 3 }
+      }
+    }
+  }
+}
+node {
+  name: "ker"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim { size: 2 }
+          dim { size: 2 }
+          dim { size: 3 }
+          dim { size: 2 }
+        }
+        float_val: 1.1
+      }
+    }
+  }
+}
+node {
+  name: "ofm"
+  op: "Conv2D"
+  input: "ifm"
+  input: "ker"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+  attr {
+    key: "padding"
+    value { s: "VALID" }
+  }
+  attr {
+    key: "strides"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+}
+node {
+  name: "maxpool"
+  op: "MaxPool"
+  input: "ofm"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+  attr {
+    key: "ksize"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+  attr {
+    key: "padding"
+    value { s: "VALID" }
+  }
+  attr {
+    key: "strides"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0001/test.info b/res/TensorFlowTests/NET_0001/test.info
new file mode 100644
index 000000000..0e8caae1c
--- /dev/null
+++ b/res/TensorFlowTests/NET_0001/test.info
@@ -0,0 +1,2 @@
+input, in:0, TF_FLOAT, [1, 5, 5, 3]
+output, out:0, TF_FLOAT, [1, 4, 4, 5]
diff --git a/res/TensorFlowTests/NET_0001/test.pbtxt b/res/TensorFlowTests/NET_0001/test.pbtxt
new file mode 100644
index 000000000..fc84d61a6
--- /dev/null
+++ b/res/TensorFlowTests/NET_0001/test.pbtxt
@@ -0,0 +1,160 @@
+# Small Conv2D-BiasAdd-Conv2D network
+node {
+  name: "in"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 } # N
+        dim { size: 5 } # H
+        dim { size: 5 } # W
+        dim { size: 3 } # C
+      }
+    }
+  }
+}
+node {
+  name: "ker"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim { size: 2 } # H
+          dim { size: 2 } # W
+          dim { size: 3 } # I
+          dim { size: 2 } # O
+        }
+        float_val: 1.1
+      }
+    }
+  }
+}
+node {
+  name: "conv"
+  op: "Conv2D"
+  input: "in"
+  input: "ker"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+  attr {
+    key: "padding"
+    value { s: "VALID" }
+  }
+  attr {
+    key: "strides"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+}
+node {
+  name: "bias"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim { size: 2 }
+        }
+        float_val: 1.1
+      }
+    }
+  }
+}
+node {
+  name: "badd"
+  op: "BiasAdd"
+  input: "conv"
+  input: "bias"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+}
+node {
+  name: "ker1"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim { size: 1 } # H
+          dim { size: 1 } # W
+          dim { size: 2 } # I
+          dim { size: 5 } # O
+        }
+        float_val: 1.1
+      }
+    }
+  }
+}
+node {
+  name: "out"
+  op: "Conv2D"
+  input: "badd"
+  input: "ker1"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+  attr {
+    key: "padding"
+    value { s: "VALID" }
+  }
+  attr {
+    key: "strides"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0002/test.info b/res/TensorFlowTests/NET_0002/test.info
new file mode 100644
index 000000000..0e8caae1c
--- /dev/null
+++ b/res/TensorFlowTests/NET_0002/test.info
@@ -0,0 +1,2 @@
+input, in:0, TF_FLOAT, [1, 5, 5, 3]
+output, out:0, TF_FLOAT, [1, 4, 4, 5]
diff --git a/res/TensorFlowTests/NET_0002/test.pbtxt b/res/TensorFlowTests/NET_0002/test.pbtxt
new file mode 100644
index 000000000..692651aa4
--- /dev/null
+++ b/res/TensorFlowTests/NET_0002/test.pbtxt
@@ -0,0 +1,135 @@
+# Small Conv2D-ReLU-Conv2D network
+node {
+  name: "in"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 } # N
+        dim { size: 5 } # H
+        dim { size: 5 } # W
+        dim { size: 3 } # C
+      }
+    }
+  }
+}
+node {
+  name: "ker"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim { size: 2 } # H
+          dim { size: 2 } # W
+          dim { size: 3 } # I
+          dim { size: 2 } # O
+        }
+        float_val: 1.1
+      }
+    }
+  }
+}
+node {
+  name: "conv"
+  op: "Conv2D"
+  input: "in"
+  input: "ker"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+  attr {
+    key: "padding"
+    value { s: "VALID" }
+  }
+  attr {
+    key: "strides"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+}
+node {
+  name: "relu"
+  op: "Relu"
+  input: "conv"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+}
+node {
+  name: "ker1"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim { size: 1 } # H
+          dim { size: 1 } # W
+          dim { size: 2 } # I
+          dim { size: 5 } # O
+        }
+        float_val: 1.1
+      }
+    }
+  }
+}
+node {
+  name: "out"
+  op: "Conv2D"
+  input: "relu"
+  input: "ker1"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+  attr {
+    key: "padding"
+    value { s: "VALID" }
+  }
+  attr {
+    key: "strides"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0003/test.info b/res/TensorFlowTests/NET_0003/test.info
new file mode 100644
index 000000000..ee7d13cd1
--- /dev/null
+++ b/res/TensorFlowTests/NET_0003/test.info
@@ -0,0 +1,2 @@
+input, Placeholder:0, TF_FLOAT, [1, 3, 3, 5]
+output, FusedBatchNorm:0, TF_FLOAT, [1, 3, 3, 1]
diff --git a/res/TensorFlowTests/NET_0003/test.pbtxt b/res/TensorFlowTests/NET_0003/test.pbtxt
new file mode 100644
index 000000000..cf6b1a7db
--- /dev/null
+++ b/res/TensorFlowTests/NET_0003/test.pbtxt
@@ -0,0 +1,244 @@
+# Small Conv2D + FusedBatchNorm network
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1 # N
+        }
+        dim {
+          size: 3 # H
+        }
+        dim {
+          size: 3 # W
+        }
+        dim {
+          size: 5 # C
+        }
+      }
+    }
+  }
+}
+node {
+  name: "Const"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2 # H
+          }
+          dim {
+            size: 2 # W
+          }
+          dim {
+            size: 5 # I
+          }
+          dim {
+            size: 1 # O
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "Conv2D"
+  op: "Conv2D"
+  input: "Placeholder"
+  input: "Const"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "SAME"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "use_cudnn_on_gpu"
+    value {
+      b: true
+    }
+  }
+}
+node {
+  name: "scale"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 1
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "offset"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 1
+          }
+        }
+        float_val: 0.0
+      }
+    }
+  }
+}
+node {
+  name: "FusedBatchNorm/mean"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 1
+          }
+        }
+        float_val: 0.0
+      }
+    }
+  }
+}
+node {
+  name: "FusedBatchNorm/variance"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 1
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "FusedBatchNorm"
+  op: "FusedBatchNorm"
+  input: "Conv2D"
+  input: "scale"
+  input: "offset"
+  input: "FusedBatchNorm/mean"
+  input: "FusedBatchNorm/variance"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "epsilon"
+    value {
+      f: 0.0010000000474974513
+    }
+  }
+  attr {
+    key: "is_training"
+    value {
+      b: false
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0003/test.py b/res/TensorFlowTests/NET_0003/test.py
new file mode 100644
index 000000000..b5bad2dae
--- /dev/null
+++ b/res/TensorFlowTests/NET_0003/test.py
@@ -0,0 +1,15 @@
+# TF_SMALL_NET_0003/test.pbtxt is create with below script
+
+# Version info
+#  - Tensorflow : 1.13.1
+#  - Python : 3.5.2
+
+import tensorflow as tf
+
+input0 = tf.placeholder(tf.float32, [1, 3, 3, 5])
+filter0 = tf.constant(1.0, shape=[2, 2, 5, 1])
+conv = tf.nn.conv2d(input0, filter=filter0, strides=[1, 1, 1, 1], padding='SAME')
+fbn = tf.nn.fused_batch_norm(
+    conv, scale=[1.0], offset=[0.0], mean=[0.0], variance=[1.0], is_training=False)
+
+print(tf.get_default_graph().as_graph_def())
diff --git a/res/TensorFlowTests/NET_0004/test.info b/res/TensorFlowTests/NET_0004/test.info
new file mode 100644
index 000000000..75a892250
--- /dev/null
+++ b/res/TensorFlowTests/NET_0004/test.info
@@ -0,0 +1,2 @@
+input, Placeholder:0, TF_FLOAT, [1, 3, 3, 5]
+output, FusedBatchNorm:0, TF_FLOAT, [1, 3, 3, 10]
diff --git a/res/TensorFlowTests/NET_0004/test.pbtxt b/res/TensorFlowTests/NET_0004/test.pbtxt
new file mode 100644
index 000000000..18cdd65ff
--- /dev/null
+++ b/res/TensorFlowTests/NET_0004/test.pbtxt
@@ -0,0 +1,218 @@
+# Small DepthwiseConv2D + FusedBatchNorm network
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "Const"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 2
+          }
+          dim {
+            size: 5
+          }
+          dim {
+            size: 2
+          }
+        }
+        float_val: 1
+      }
+    }
+  }
+}
+node {
+  name: "depthwise/Shape"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_INT32
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+          dim {
+            size: 4
+          }
+        }
+        int_val: 2
+        int_val: 2
+        int_val: 5
+        int_val: 2
+      }
+    }
+  }
+}
+node {
+  name: "depthwise/dilation_rate"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_INT32
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+          dim {
+            size: 2
+          }
+        }
+        int_val: 1
+        int_val: 1
+      }
+    }
+  }
+}
+node {
+  name: "depthwise"
+  op: "DepthwiseConv2dNative"
+  input: "Placeholder"
+  input: "Const"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "SAME"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+}
+node {
+  name: "Const_1"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 10
+          }
+        }
+        float_val: 2
+      }
+    }
+  }
+}
+node {
+  name: "FusedBatchNorm"
+  op: "FusedBatchNorm"
+  input: "depthwise"
+  input: "Const_1"
+  input: "Const_1"
+  input: "Const_1"
+  input: "Const_1"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "epsilon"
+    value {
+      f: 0.001
+    }
+  }
+  attr {
+    key: "is_training"
+    value {
+      b: false
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0004/test.py b/res/TensorFlowTests/NET_0004/test.py
new file mode 100644
index 000000000..a0c790d79
--- /dev/null
+++ b/res/TensorFlowTests/NET_0004/test.py
@@ -0,0 +1,16 @@
+# TF_SMALL_NET_0004/test.pbtxt is create with below script
+
+# Version info
+#  - Tensorflow : 1.13.1
+#  - Python : 3.5.2
+
+import tensorflow as tf
+
+input0 = tf.placeholder(tf.float32, [1, 3, 3, 5])
+filter0 = tf.constant(1.0, shape=[2, 2, 5, 2])
+dconv = tf.nn.depthwise_conv2d(input0, filter0, [1, 1, 1, 1], 'SAME')
+const = tf.constant(2.0, shape=[10])
+fbn = tf.nn.fused_batch_norm(
+    x=dconv, scale=const, offset=const, mean=const, variance=const, is_training=False)
+
+print(tf.get_default_graph().as_graph_def())
diff --git a/res/TensorFlowTests/NET_0005/test.info b/res/TensorFlowTests/NET_0005/test.info
new file mode 100644
index 000000000..379959c05
--- /dev/null
+++ b/res/TensorFlowTests/NET_0005/test.info
@@ -0,0 +1,2 @@
+input, Placeholder:0, TF_FLOAT, [1, 2, 3, 2]
+output, Reshape2:0, TF_FLOAT, [1, 2, 3, 2]
diff --git a/res/TensorFlowTests/NET_0005/test.pbtxt b/res/TensorFlowTests/NET_0005/test.pbtxt
new file mode 100644
index 000000000..16cc44005
--- /dev/null
+++ b/res/TensorFlowTests/NET_0005/test.pbtxt
@@ -0,0 +1,120 @@
+# Small Shape + Reshape network
+# This test is quite similar with the last part of InceptionV3
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 2
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 2
+        }
+      }
+    }
+  }
+}
+node {
+  name: "Shape"
+  op: "Shape"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "out_type"
+    value {
+      type: DT_INT32
+    }
+  }
+}
+node {
+  name: "Const"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_INT32
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+          dim {
+            size: 2
+          }
+        }
+        int_val: 3
+        int_val: 4
+      }
+    }
+  }
+}
+node {
+  name: "Reshape1"
+  op: "Reshape"
+  input: "Placeholder"
+  input: "Const"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "Tshape"
+    value {
+      type: DT_INT32
+    }
+  }
+}
+node {
+  name: "Relu"
+  op: "Relu"
+  input: "Reshape1"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "Reshape2"
+  op: "Reshape"
+  input: "Relu"
+  input: "Shape"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "Tshape"
+    value {
+      type: DT_INT32
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0006/test.info b/res/TensorFlowTests/NET_0006/test.info
new file mode 100644
index 000000000..f0b1e20ea
--- /dev/null
+++ b/res/TensorFlowTests/NET_0006/test.info
@@ -0,0 +1,2 @@
+input, placeholder:0, TF_FLOAT, [1, 7, 7, 1]
+output, maxpool:0, TF_FLOAT, [1, 7, 7, 2]
diff --git a/res/TensorFlowTests/NET_0006/test.pbtxt b/res/TensorFlowTests/NET_0006/test.pbtxt
new file mode 100644
index 000000000..e92b60629
--- /dev/null
+++ b/res/TensorFlowTests/NET_0006/test.pbtxt
@@ -0,0 +1,149 @@
+# A simple network that has "Concat" in between feature operations.
+#
+#   Placeholder -+-> MaxPool2D -+-> Concat -> MaxPool2D
+#                |              |
+#                +-> MaxPool2D -+
+#
+node {
+  name: "placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 } # N
+        dim { size: 7 } # H
+        dim { size: 7 } # W
+        dim { size: 1 } # C
+      }
+    }
+  }
+}
+node {
+  name: "maxpool_1"
+  op: "MaxPool"
+  input: "placeholder"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+  attr {
+    key: "ksize"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+  attr {
+    key: "padding"
+    value { s: "VALID" }
+  }
+  attr {
+    key: "strides"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+}
+node {
+  name: "maxpool_2"
+  op: "MaxPool"
+  input: "placeholder"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+  attr {
+    key: "ksize"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+  attr {
+    key: "padding"
+    value { s: "VALID" }
+  }
+  attr {
+    key: "strides"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+}
+node {
+  name: "axis"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_INT32  }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape { }
+        int_val: 3
+      }
+    }
+  }
+}
+node {
+  name: "concat"
+  op: "ConcatV2"
+  input: "maxpool_1"
+  input: "maxpool_2"
+  input: "axis"
+  attr {
+    key: "N"
+    value { i: 2 }
+  }
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "Tidx"
+    value { type: DT_INT32 }
+  }
+}
+node {
+  name: "maxpool"
+  op: "MaxPool"
+  input: "concat"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+  attr {
+    key: "ksize"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+  attr {
+    key: "padding"
+    value { s: "VALID" }
+  }
+  attr {
+    key: "strides"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0007/test.info b/res/TensorFlowTests/NET_0007/test.info
new file mode 100644
index 000000000..59c3f6122
--- /dev/null
+++ b/res/TensorFlowTests/NET_0007/test.info
@@ -0,0 +1,2 @@
+input, Placeholder:0, TF_FLOAT, [1, 3, 3, 5]
+output, Mul:0, TF_FLOAT, [1, 3, 3, 2]
diff --git a/res/TensorFlowTests/NET_0007/test.pbtxt b/res/TensorFlowTests/NET_0007/test.pbtxt
new file mode 100644
index 000000000..10f9f35a5
--- /dev/null
+++ b/res/TensorFlowTests/NET_0007/test.pbtxt
@@ -0,0 +1,151 @@
+# A simple network that has "Conv2D" + "Mul"
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "weights"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 2
+          }
+          dim {
+            size: 5
+          }
+          dim {
+            size: 2
+          }
+        }
+        float_val: 1.100000023841858
+      }
+    }
+  }
+}
+node {
+  name: "Conv2D"
+  op: "Conv2D"
+  input: "Placeholder"
+  input: "weights"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "SAME"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "use_cudnn_on_gpu"
+    value {
+      b: true
+    }
+  }
+}
+node {
+  name: "mulparam"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+        }
+        float_val: 2.0
+      }
+    }
+  }
+}
+node {
+  name: "Mul"
+  op: "Mul"
+  input: "Conv2D"
+  input: "mulparam"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0008/test.info b/res/TensorFlowTests/NET_0008/test.info
new file mode 100644
index 000000000..ccdd6fd44
--- /dev/null
+++ b/res/TensorFlowTests/NET_0008/test.info
@@ -0,0 +1,2 @@
+input, Placeholder:0, TF_FLOAT, [1, 3, 3, 5]
+output, Add:0, TF_FLOAT, [1, 3, 3, 2]
diff --git a/res/TensorFlowTests/NET_0008/test.pbtxt b/res/TensorFlowTests/NET_0008/test.pbtxt
new file mode 100644
index 000000000..bbaba7ded
--- /dev/null
+++ b/res/TensorFlowTests/NET_0008/test.pbtxt
@@ -0,0 +1,151 @@
+# A simple network that has "Conv2D" + "Add"
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "weights"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 2
+          }
+          dim {
+            size: 5
+          }
+          dim {
+            size: 2
+          }
+        }
+        float_val: 1.100000023841858
+      }
+    }
+  }
+}
+node {
+  name: "Conv2D"
+  op: "Conv2D"
+  input: "Placeholder"
+  input: "weights"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "SAME"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "use_cudnn_on_gpu"
+    value {
+      b: true
+    }
+  }
+}
+node {
+  name: "addparam"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+        }
+        float_val: 2.0
+      }
+    }
+  }
+}
+node {
+  name: "Add"
+  op: "Add"
+  input: "Conv2D"
+  input: "addparam"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0009/test.info b/res/TensorFlowTests/NET_0009/test.info
new file mode 100644
index 000000000..ccdd6fd44
--- /dev/null
+++ b/res/TensorFlowTests/NET_0009/test.info
@@ -0,0 +1,2 @@
+input, Placeholder:0, TF_FLOAT, [1, 3, 3, 5]
+output, Add:0, TF_FLOAT, [1, 3, 3, 2]
diff --git a/res/TensorFlowTests/NET_0009/test.pbtxt b/res/TensorFlowTests/NET_0009/test.pbtxt
new file mode 100644
index 000000000..a4eee69ae
--- /dev/null
+++ b/res/TensorFlowTests/NET_0009/test.pbtxt
@@ -0,0 +1,194 @@
+# A simple network that has "Conv2D" + "BiasAdd" + "Add"
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "weights"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 2
+          }
+          dim {
+            size: 5
+          }
+          dim {
+            size: 2
+          }
+        }
+        float_val: 1.100000023841858
+      }
+    }
+  }
+}
+node {
+  name: "Conv2D"
+  op: "Conv2D"
+  input: "Placeholder"
+  input: "weights"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "SAME"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "use_cudnn_on_gpu"
+    value {
+      b: true
+    }
+  }
+}
+node {
+  name: "BiasAdd/bias"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+        }
+        float_val: 1.0
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "BiasAdd"
+  op: "BiasAdd"
+  input: "Conv2D"
+  input: "BiasAdd/bias"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+}
+node {
+  name: "addparam"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+        }
+        float_val: 2.0
+      }
+    }
+  }
+}
+node {
+  name: "Add"
+  op: "Add"
+  input: "BiasAdd"
+  input: "addparam"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0010/test.info b/res/TensorFlowTests/NET_0010/test.info
new file mode 100644
index 000000000..bcbc41892
--- /dev/null
+++ b/res/TensorFlowTests/NET_0010/test.info
@@ -0,0 +1,2 @@
+input, Placeholder:0, TF_FLOAT, [1, 3, 3, 2]
+output, Add:0, TF_FLOAT, [1, 3, 3, 2]
diff --git a/res/TensorFlowTests/NET_0010/test.pbtxt b/res/TensorFlowTests/NET_0010/test.pbtxt
new file mode 100644
index 000000000..b9c6c9987
--- /dev/null
+++ b/res/TensorFlowTests/NET_0010/test.pbtxt
@@ -0,0 +1,109 @@
+# A simple network that has "BiasAdd" + "Add"
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 2
+        }
+      }
+    }
+  }
+}
+node {
+  name: "bias_add_01/bias"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+        }
+        float_val: 1.0
+        float_val: -1.0
+      }
+    }
+  }
+}
+node {
+  name: "bias_add_01"
+  op: "BiasAdd"
+  input: "Placeholder"
+  input: "bias_add_01/bias"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+}
+node {
+  name: "addparam"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+        }
+        float_val: 2.0
+      }
+    }
+  }
+}
+node {
+  name: "Add"
+  op: "Add"
+  input: "bias_add_01"
+  input: "addparam"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0011/test.info b/res/TensorFlowTests/NET_0011/test.info
new file mode 100644
index 000000000..7fb5ec2c0
--- /dev/null
+++ b/res/TensorFlowTests/NET_0011/test.info
@@ -0,0 +1,2 @@
+input,  placeholder:0, TF_FLOAT, [2]
+output, concat_out:0, TF_FLOAT, [6]
diff --git a/res/TensorFlowTests/NET_0011/test.pbtxt b/res/TensorFlowTests/NET_0011/test.pbtxt
new file mode 100644
index 000000000..a44aba783
--- /dev/null
+++ b/res/TensorFlowTests/NET_0011/test.pbtxt
@@ -0,0 +1,129 @@
+# A simple network that includes constant foldable subgraph
+# (note: [] indicates shape, () indicates real value)
+#
+#       input1 (const) -- relu -+     placeholder --+
+#       (-1, 1)          (0, 1) |       shape [2]   |
+#                               |                   |
+#               input2 (const) -+-- concat -------- concat_out
+#               (2, 3)          |   (0, 1, 2, 3)    |
+#                               |                   |
+#                  axis (const)-+-------------------+
+#
+#  will be the following after constant folding:
+#
+#                                           Pull --+
+#                                      shape [2]   |
+#                                                  |
+#                                  ConstGen------- TensorConcat -- Push
+#                                  (0, 1, 2, 3)      shape [6]
+#
+node {
+  name: "input1"
+  op: "Const"
+  attr {
+    key: "dtype" value { type: DT_FLOAT }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape { dim { size: 2 } }
+        float_val: -1
+        float_val: 1
+      }
+    }
+  }
+}
+node {
+  name: "relu"
+  op: "Relu"
+  input: "input1"
+  attr { key: "T" value { type: DT_FLOAT } }
+}
+node {
+  name: "input2"
+  op: "Const"
+  attr {
+    key: "dtype" value { type: DT_FLOAT }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape { dim { size: 2 } }
+        float_val: 2
+        float_val: 3
+      }
+    }
+  }
+}
+node {
+  name: "axis"
+  op: "Const"
+  attr { key: "dtype" value { type: DT_INT32 } }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape { }
+        int_val: 0
+      }
+    }
+  }
+}
+node {
+  name: "concat"
+  op: "ConcatV2"
+  input: "relu"
+  input: "input2"
+  input: "axis"
+  attr {
+    key: "N"
+    value { i: 2 }
+  }
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "Tidx"
+    value { type: DT_INT32 }
+  }
+}
+node {
+  name: "placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype" value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 2 }
+      }
+    }
+  }
+}
+node {
+  name: "concat_out"
+  op: "ConcatV2"
+  input: "concat"
+  input: "placeholder"
+  input: "axis"
+  attr {
+    key: "N"
+    value { i: 2 }
+  }
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "Tidx"
+    value { type: DT_INT32 }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0012/test.info b/res/TensorFlowTests/NET_0012/test.info
new file mode 100644
index 000000000..b210407fb
--- /dev/null
+++ b/res/TensorFlowTests/NET_0012/test.info
@@ -0,0 +1,2 @@
+input,  placeholder:0, TF_FLOAT, [6]
+output, reshape:0,     TF_FLOAT, [3, 2]
diff --git a/res/TensorFlowTests/NET_0012/test.pbtxt b/res/TensorFlowTests/NET_0012/test.pbtxt
new file mode 100644
index 000000000..387dc92f6
--- /dev/null
+++ b/res/TensorFlowTests/NET_0012/test.pbtxt
@@ -0,0 +1,52 @@
+# Network with dynamic reshape which has resolvable wildcard dimension
+node {
+  name: "placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 6 }
+      }
+    }
+  }
+}
+node {
+  name: "shape"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_INT32 }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+          dim { size: 2 }
+        }
+        int_val: -1
+        int_val: 2
+      }
+    }
+  }
+}
+node {
+  name: "reshape"
+  op: "Reshape"
+  input: "placeholder"
+  input: "shape"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "Tshape"
+    value { type: DT_INT32 }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0013/test.info b/res/TensorFlowTests/NET_0013/test.info
new file mode 100644
index 000000000..137cdfa8c
--- /dev/null
+++ b/res/TensorFlowTests/NET_0013/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0,  TF_FLOAT,   [6]
+output, Reshape:0,      TF_FLOAT,   [2, 3]
diff --git a/res/TensorFlowTests/NET_0013/test.pbtxt b/res/TensorFlowTests/NET_0013/test.pbtxt
new file mode 100644
index 000000000..a9c6aff98
--- /dev/null
+++ b/res/TensorFlowTests/NET_0013/test.pbtxt
@@ -0,0 +1,72 @@
+# Network containing Shape node, which becomes Reshape's 'shape' input
+# Note that this is a work-around to test Shape
+#
+#                (tensor)
+#   Placeholder ---------- Reshape 
+#                        /
+#     Const --- Shape ---
+#                      (shape)
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 6 }
+      }
+    }
+  }
+}
+node {
+  name: "Const"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim { size: 2 }
+          dim { size: 3 }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "Shape"
+  op: "Shape"
+  input: "Const"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "out_type"
+    value { type: DT_INT32 }
+  }
+}
+node {
+  name: "Reshape"
+  op: "Reshape"
+  input: "Placeholder"
+  input: "Shape"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "Tshape"
+    value { type: DT_INT32 }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0014/test.info b/res/TensorFlowTests/NET_0014/test.info
new file mode 100644
index 000000000..d3ea85a10
--- /dev/null
+++ b/res/TensorFlowTests/NET_0014/test.info
@@ -0,0 +1,2 @@
+input,  placeholder:0,  TF_FLOAT,   [2, 1, 1, 3]
+output, reshape_2:0,    TF_FLOAT,   [2, 3]
diff --git a/res/TensorFlowTests/NET_0014/test.pbtxt b/res/TensorFlowTests/NET_0014/test.pbtxt
new file mode 100644
index 000000000..d4bc8e698
--- /dev/null
+++ b/res/TensorFlowTests/NET_0014/test.pbtxt
@@ -0,0 +1,106 @@
+# Mock of the Epilogue, using ReLU instead of Softmax
+node {
+  name: "placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 2 }
+        dim { size: 1 }
+        dim { size: 1 }
+        dim { size: 3 }
+      }
+    }
+  }
+}
+node {
+  name: "squeeze"
+  op: "Squeeze"
+  input: "placeholder"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "squeeze_dims"
+    value {
+      list { i: 1 i: 2 }
+    }
+  }
+}
+node {
+  name: "Reshape/shape"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_INT32 }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+          dim { size: 2 }
+        }
+        int_val: -1
+        int_val: 3
+      }
+    }
+  }
+}
+node {
+  name: "reshape_1"
+  op: "Reshape"
+  input: "squeeze"
+  input: "Reshape/shape"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "Tshape"
+    value { type: DT_INT32 }
+  }
+}
+node {
+  name: "relu"
+  op: "Relu"
+  input: "reshape_1"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+}
+node {
+  name: "shape"
+  op: "Shape"
+  input: "squeeze"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "out_type"
+    value { type: DT_INT32 }
+  }
+}
+node {
+  name: "reshape_2"
+  op: "Reshape"
+  input: "relu"
+  input: "shape"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "Tshape"
+    value { type: DT_INT32 }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0015/test.info b/res/TensorFlowTests/NET_0015/test.info
new file mode 100644
index 000000000..dbbef9b3a
--- /dev/null
+++ b/res/TensorFlowTests/NET_0015/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0,   TF_FLOAT,   [2, 3]
+output, as_rsqrt:0,      TF_FLOAT,   [2, 3]
diff --git a/res/TensorFlowTests/NET_0015/test.pbtxt b/res/TensorFlowTests/NET_0015/test.pbtxt
new file mode 100644
index 000000000..3d994e8d5
--- /dev/null
+++ b/res/TensorFlowTests/NET_0015/test.pbtxt
@@ -0,0 +1,74 @@
+# A simple network that simulates Rsqrt: 1.0 / Sqrt(input)
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 2
+        }
+        dim {
+          size: 3
+        }
+      }
+    }
+  }
+}
+node {
+  name: "SQRT_02"
+  op: "Sqrt"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "Const"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 3
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "as_rsqrt"
+  op: "RealDiv"
+  input: "Const"
+  input: "SQRT_02"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0016/test.info b/res/TensorFlowTests/NET_0016/test.info
new file mode 100644
index 000000000..ee7d13cd1
--- /dev/null
+++ b/res/TensorFlowTests/NET_0016/test.info
@@ -0,0 +1,2 @@
+input, Placeholder:0, TF_FLOAT, [1, 3, 3, 5]
+output, FusedBatchNorm:0, TF_FLOAT, [1, 3, 3, 1]
diff --git a/res/TensorFlowTests/NET_0016/test.pbtxt b/res/TensorFlowTests/NET_0016/test.pbtxt
new file mode 100644
index 000000000..64e5c4194
--- /dev/null
+++ b/res/TensorFlowTests/NET_0016/test.pbtxt
@@ -0,0 +1,271 @@
+# Small Conv2D + FusedBatchNorm network with Identity
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1 # N
+        }
+        dim {
+          size: 3 # H
+        }
+        dim {
+          size: 3 # W
+        }
+        dim {
+          size: 5 # C
+        }
+      }
+    }
+  }
+}
+node {
+  name: "Const"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2 # H
+          }
+          dim {
+            size: 2 # W
+          }
+          dim {
+            size: 5 # I
+          }
+          dim {
+            size: 1 # O
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "Conv2D"
+  op: "Conv2D"
+  input: "Placeholder"
+  input: "Const"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "SAME"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+}
+node {
+  name: "scale"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 1
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "offset"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 1
+          }
+        }
+        float_val: 0.0
+      }
+    }
+  }
+}
+node {
+  name: "FusedBatchNorm/mean"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 1
+          }
+        }
+        float_val: 0.0
+      }
+    }
+  }
+}
+node {
+  name: "FusedBatchNorm/variance"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 1
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "offset/id"
+  op: "Identity"
+  input: "offset"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "FusedBatchNorm/mean/id"
+  op: "Identity"
+  input: "FusedBatchNorm/mean"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "FusedBatchNorm/variance/id"
+  op: "Identity"
+  input: "FusedBatchNorm/variance"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "FusedBatchNorm"
+  op: "FusedBatchNorm"
+  input: "Conv2D"
+  input: "scale"
+  input: "offset/id"
+  input: "FusedBatchNorm/mean/id"
+  input: "FusedBatchNorm/variance/id"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "epsilon"
+    value {
+      f: 0.0010000000474974513
+    }
+  }
+  attr {
+    key: "is_training"
+    value {
+      b: false
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0017/test.info b/res/TensorFlowTests/NET_0017/test.info
new file mode 100644
index 000000000..e9413cb98
--- /dev/null
+++ b/res/TensorFlowTests/NET_0017/test.info
@@ -0,0 +1,2 @@
+input,  placeholder:0, TF_FLOAT, [1, 8, 8, 1]
+output, avgpool2d:0,   TF_FLOAT, [1, 1, 1, 1]
diff --git a/res/TensorFlowTests/NET_0017/test.pbtxt b/res/TensorFlowTests/NET_0017/test.pbtxt
new file mode 100644
index 000000000..e8cc76b70
--- /dev/null
+++ b/res/TensorFlowTests/NET_0017/test.pbtxt
@@ -0,0 +1,61 @@
+# HOW TO GENERATE:
+#
+#  import tensorflow as tf
+#  value = tf.placeholder(dtype=tf.float32, shape=[1, 8, 8, 1], name='placeholder')
+#  output = tf.nn.avg_pool(value, [1, 8, 8, 1], [1, 1, 1, 1], 'VALID', name='avgpool2d')
+#  tf.get_default_graph().as_graph_def()
+#
+# NOTE 1. The output shape is 1x1x1x1
+#
+# >>> tf.graph_util.tensor_shape_from_node_def_name(tf.get_default_graph(), 'avgpool2d')
+# TensorShape([Dimension(1), Dimension(1), Dimension(1), Dimension(1)])
+#
+# NOTE 2. This test corresponds to the last AvgPool node inception v3 2018.04.27.
+node {
+  name: "placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 8 }
+        dim { size: 8 }
+        dim { size: 1 }
+      }
+    }
+  }
+}
+node {
+  name: "avgpool2d"
+  op: "AvgPool"
+  input: "placeholder"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+  attr {
+    key: "ksize"
+    value {
+      list { i: 1 i: 8 i: 8 i: 1 }
+    }
+  }
+  attr {
+    key: "padding"
+    value { s: "VALID" }
+  }
+  attr {
+    key: "strides"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0018/test.info b/res/TensorFlowTests/NET_0018/test.info
new file mode 100644
index 000000000..87f6fa795
--- /dev/null
+++ b/res/TensorFlowTests/NET_0018/test.info
@@ -0,0 +1,2 @@
+input,  placeholder:0, TF_FLOAT, [1, 4, 4, 1]
+output, avgpool2d:0,   TF_FLOAT, [1, 4, 4, 1]
diff --git a/res/TensorFlowTests/NET_0018/test.pbtxt b/res/TensorFlowTests/NET_0018/test.pbtxt
new file mode 100644
index 000000000..3b8a15ef8
--- /dev/null
+++ b/res/TensorFlowTests/NET_0018/test.pbtxt
@@ -0,0 +1,63 @@
+# HOW TO GENERATE:
+#
+#  import tensorflow as tf
+#  value = tf.placeholder(dtype=tf.float32, shape=[1, 4, 4, 1], name='placeholder')
+#  output = tf.nn.avg_pool(value, [1, 3, 3, 1], [1, 1, 1, 1], 'SAME', name='avgpool2d')
+#  tf.get_default_graph().as_graph_def()
+#
+# NOTE 1. The output shape is 1x4x4x1
+#
+# >>> tf.graph_util.tensor_shape_from_node_def_name(tf.get_default_graph(), 'avgpool2d')
+# TensorShape([Dimension(1), Dimension(4), Dimension(4), Dimension(1)])
+#
+# NOTE 2. Almost all the AvgPool nodes in inception v3 2018.04.27 use this configuration.
+#
+# The only exception is "InceptionV3/Logits/AvgPool_1a_8x8/AvgPool" which performs global average pooling.
+node {
+  name: "placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 4 }
+        dim { size: 4 }
+        dim { size: 1 }
+      }
+    }
+  }
+}
+node {
+  name: "avgpool2d"
+  op: "AvgPool"
+  input: "placeholder"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+  attr {
+    key: "ksize"
+    value {
+      list { i: 1 i: 3 i: 3 i: 1 }
+    }
+  }
+  attr {
+    key: "padding"
+    value { s: "SAME" }
+  }
+  attr {
+    key: "strides"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0019/test.info b/res/TensorFlowTests/NET_0019/test.info
new file mode 100644
index 000000000..908883475
--- /dev/null
+++ b/res/TensorFlowTests/NET_0019/test.info
@@ -0,0 +1,2 @@
+input,  ifm:0,  TF_FLOAT,  [1, 7, 7, 4]
+output, ofm:0,  TF_FLOAT,  [1, 3, 3, 6]
diff --git a/res/TensorFlowTests/NET_0019/test.pbtxt b/res/TensorFlowTests/NET_0019/test.pbtxt
new file mode 100644
index 000000000..076f4f619
--- /dev/null
+++ b/res/TensorFlowTests/NET_0019/test.pbtxt
@@ -0,0 +1,89 @@
+# HOW TO GENERATE:
+#
+#  import tensorflow as tf
+#  I = 4
+#  O = 6
+#  ifm = tf.placeholder(dtype=tf.float32, shape=[1, 7, 7, I], name='ifm')
+#  ker = tf.constant(dtype=tf.float32, shape=[3, 3, I, O], name='ker', value=1.1)
+#  ofm = tf.nn.conv2d(input=ifm, filter=ker, strides=[1, 2, 2, 1], padding='VALID', name='ofm')
+#  tf.get_default_graph().as_graph_def()
+#
+# NOTE 1. The output shape is 1x3x3x6
+#
+# >>> tf.graph_util.tensor_shape_from_node_def_name(tf.get_default_graph(), 'ofm')
+# TensorShape([Dimension(1), Dimension(3), Dimension(3), Dimension(6)])
+#
+# NOTE 2. This test corresponds to "InceptionV3/InceptionV3/Conv2d_1a_3x3/Conv2D" node
+#
+node {
+  name: "ifm"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 7 }
+        dim { size: 7 }
+        dim { size: 4 }
+      }
+    }
+  }
+}
+node {
+  name: "ker"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim { size: 3 }
+          dim { size: 3 }
+          dim { size: 4 }
+          dim { size: 6 }
+        }
+        float_val: 1.1
+      }
+    }
+  }
+}
+node {
+  name: "ofm"
+  op: "Conv2D"
+  input: "ifm"
+  input: "ker"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+  attr {
+    key: "padding"
+    value { s: "VALID" }
+  }
+  attr {
+    key: "strides"
+    value {
+      list { i: 1 i: 2 i: 2 i: 1 }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0020/test.info b/res/TensorFlowTests/NET_0020/test.info
new file mode 100644
index 000000000..d3ea85a10
--- /dev/null
+++ b/res/TensorFlowTests/NET_0020/test.info
@@ -0,0 +1,2 @@
+input,  placeholder:0,  TF_FLOAT,   [2, 1, 1, 3]
+output, reshape_2:0,    TF_FLOAT,   [2, 3]
diff --git a/res/TensorFlowTests/NET_0020/test.pbtxt b/res/TensorFlowTests/NET_0020/test.pbtxt
new file mode 100644
index 000000000..efd18d132
--- /dev/null
+++ b/res/TensorFlowTests/NET_0020/test.pbtxt
@@ -0,0 +1,112 @@
+# The Epilogue, or endmost part of inception v3 comprised of Squeeze,
+# Reshape, Shape and Softmax
+#
+# Only difference from original is input shape:
+#   - original has unknown batch and 1001 channels [?, 1, 1, 1001]
+#   - this test has 2 batches and 3 channels [2, 1, 1, 3]
+
+node {
+  name: "placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 2 }
+        dim { size: 1 }
+        dim { size: 1 }
+        dim { size: 3 }
+      }
+    }
+  }
+}
+node {
+  name: "squeeze"
+  op: "Squeeze"
+  input: "placeholder"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "squeeze_dims"
+    value {
+      list { i: 1 i: 2 }
+    }
+  }
+}
+node {
+  name: "Reshape/shape"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_INT32 }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+          dim { size: 2 }
+        }
+        int_val: -1
+        int_val: 3
+      }
+    }
+  }
+}
+node {
+  name: "reshape_1"
+  op: "Reshape"
+  input: "squeeze"
+  input: "Reshape/shape"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "Tshape"
+    value { type: DT_INT32 }
+  }
+}
+node {
+  name: "softmax"
+  op: "Softmax"
+  input: "reshape_1"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+}
+node {
+  name: "shape"
+  op: "Shape"
+  input: "squeeze"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "out_type"
+    value { type: DT_INT32 }
+  }
+}
+node {
+  name: "reshape_2"
+  op: "Reshape"
+  input: "softmax"
+  input: "shape"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "Tshape"
+    value { type: DT_INT32 }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0021/test.info b/res/TensorFlowTests/NET_0021/test.info
new file mode 100644
index 000000000..059b21cca
--- /dev/null
+++ b/res/TensorFlowTests/NET_0021/test.info
@@ -0,0 +1,2 @@
+input,  placeholder:0,  TF_FLOAT,   [1, 7, 7, 1]
+output, maxpool2d:0,    TF_FLOAT,   [1, 3, 3, 1]
diff --git a/res/TensorFlowTests/NET_0021/test.pbtxt b/res/TensorFlowTests/NET_0021/test.pbtxt
new file mode 100644
index 000000000..b1eadccd9
--- /dev/null
+++ b/res/TensorFlowTests/NET_0021/test.pbtxt
@@ -0,0 +1,65 @@
+# HOW TO GENERATE:
+#
+#  import tensorflow as tf
+#  value = tf.placeholder(dtype=tf.float32, shape=[1, 7, 7, 1], name='placeholder')
+#  output = tf.nn.max_pool(value, [1, 3, 3, 1], [1, 2, 2, 1], 'VALID', name='maxpool2d')
+#  tf.get_default_graph().as_graph_def()
+#
+# NOTE 1. The output shape is 1x3x3x1
+#
+# >>> tf.graph_util.tensor_shape_from_node_def_name(tf.get_default_graph(), 'maxpool2d')
+# TensorShape([Dimension(1), Dimension(3), Dimension(3), Dimension(1)])
+#
+# NOTE 2. All the MaxPool nodes in inception v3 2018.04.27 use this configuration.
+# - InceptionV3/InceptionV3/MaxPool_3a_3x3/MaxPool
+# - InceptionV3/InceptionV3/MaxPool_5a_3x3/MaxPool
+# - InceptionV3/InceptionV3/Mixed_6a/Branch_2/MaxPool_1a_3x3/MaxPool
+# - InceptionV3/InceptionV3/Mixed_7a/Branch_2/MaxPool_1a_3x3/MaxPool
+node {
+  name: "placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 7 }
+        dim { size: 7 }
+        dim { size: 1 }
+      }
+    }
+  }
+}
+node {
+  name: "maxpool2d"
+  op: "MaxPool"
+  input: "placeholder"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+  attr {
+    key: "ksize"
+    value {
+      list { i: 1 i: 3 i: 3 i: 1 }
+    }
+  }
+  attr {
+    key: "padding"
+    value { s: "VALID" }
+  }
+  attr {
+    key: "strides"
+    value {
+      list { i: 1 i: 2 i: 2 i: 1 }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0022/test.info b/res/TensorFlowTests/NET_0022/test.info
new file mode 100644
index 000000000..89c33ee9c
--- /dev/null
+++ b/res/TensorFlowTests/NET_0022/test.info
@@ -0,0 +1,5 @@
+# this has two inputs and two outputs. Let's make our code to handle multiple inputs and outputs.
+input,   input_1:0,    TF_FLOAT,   [2, 2]
+input,   input_2:0,    TF_FLOAT,   [2, 2]
+output,  output_1:0,   TF_FLOAT,   [2, 2]
+output,  output_2:0,   TF_FLOAT,   [2, 2]
diff --git a/res/TensorFlowTests/NET_0022/test.pbtxt b/res/TensorFlowTests/NET_0022/test.pbtxt
new file mode 100644
index 000000000..c8879e84f
--- /dev/null
+++ b/res/TensorFlowTests/NET_0022/test.pbtxt
@@ -0,0 +1,70 @@
+node {
+  name: "input_1"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 2
+        }
+        dim {
+          size: 2
+        }
+      }
+    }
+  }
+}
+node {
+  name: "input_2"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 2
+        }
+        dim {
+          size: 2
+        }
+      }
+    }
+  }
+}
+node {
+  name: "output_1"
+  op: "Add"
+  input: "input_1"
+  input: "input_2"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "output_2"
+  op: "Add"
+  input: "input_1"
+  input: "input_2"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0023/test.info b/res/TensorFlowTests/NET_0023/test.info
new file mode 100644
index 000000000..856de94d4
--- /dev/null
+++ b/res/TensorFlowTests/NET_0023/test.info
@@ -0,0 +1,2 @@
+# this has no input
+output,  out:0,   TF_FLOAT,   [2, 2]
diff --git a/res/TensorFlowTests/NET_0023/test.pbtxt b/res/TensorFlowTests/NET_0023/test.pbtxt
new file mode 100644
index 000000000..2ef5a0b99
--- /dev/null
+++ b/res/TensorFlowTests/NET_0023/test.pbtxt
@@ -0,0 +1,72 @@
+node {
+  name: "Const"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 2
+          }
+        }
+        float_val: 1
+        float_val: 2
+        float_val: 3
+        float_val: 4
+      }
+    }
+  }
+}
+node {
+  name: "Const_1"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 2
+          }
+        }
+        float_val: 1
+        float_val: 2
+        float_val: 3
+        float_val: 4
+      }
+    }
+  }
+}
+node {
+  name: "out"
+  op: "Add"
+  input: "Const"
+  input: "Const_1"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0024/test.info b/res/TensorFlowTests/NET_0024/test.info
new file mode 100644
index 000000000..f049f9d43
--- /dev/null
+++ b/res/TensorFlowTests/NET_0024/test.info
@@ -0,0 +1,3 @@
+input, fst:0, TF_FLOAT, [1, 6, 1, 1]
+input, snd:0, TF_FLOAT, [1, 3, 1, 1]
+output, out:0, TF_FLOAT, [1, 9, 1, 1]
diff --git a/res/TensorFlowTests/NET_0024/test.pbtxt b/res/TensorFlowTests/NET_0024/test.pbtxt
new file mode 100644
index 000000000..ee3f99dd9
--- /dev/null
+++ b/res/TensorFlowTests/NET_0024/test.pbtxt
@@ -0,0 +1,76 @@
+# This example intentionally declares "snd" node before "fst" node
+node {
+  name: "snd"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 3 }
+        dim { size: 1 }
+        dim { size: 1 }
+      }
+    }
+  }
+}
+node {
+  name: "fst"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 6 }
+        dim { size: 1 }
+        dim { size: 1 }
+      }
+    }
+  }
+}
+node {
+  name: "axis"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_INT32 }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape { }
+        int_val: 1
+      }
+    }
+  }
+}
+node {
+  name: "out"
+  op: "ConcatV2"
+  input: "fst"
+  input: "snd"
+  input: "axis"
+  attr {
+    key: "N"
+    value { i: 2 }
+  }
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "Tidx"
+    value { type: DT_INT32 }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0025/test.info b/res/TensorFlowTests/NET_0025/test.info
new file mode 100644
index 000000000..6c5eafde7
--- /dev/null
+++ b/res/TensorFlowTests/NET_0025/test.info
@@ -0,0 +1,3 @@
+# This is a slim version of first 4 nodes in inception v3 (from Placeholder to the first RelU)
+input,  input:0,  TF_FLOAT,  [1, 5, 5, 3]
+output, InceptionV3/InceptionV3/Conv2d_1a_3x3/Relu:0,  TF_FLOAT,  [1, 2, 2, 4]
diff --git a/res/TensorFlowTests/NET_0025/test.pbtxt b/res/TensorFlowTests/NET_0025/test.pbtxt
new file mode 100644
index 000000000..9b3316dc4
--- /dev/null
+++ b/res/TensorFlowTests/NET_0025/test.pbtxt
@@ -0,0 +1,167 @@
+node {
+  name: "InceptionV3/Conv2d_1a_3x3/weights/read/_3__cf__3"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 3
+          }
+          dim {
+            size: 3
+          }
+          dim {
+            size: 3
+          }
+          dim {
+            size: 4
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "input"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 5
+        }
+        dim {
+          size: 5
+        }
+        dim {
+          size: 3
+        }
+      }
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_1a_3x3/Conv2D"
+  op: "Conv2D"
+  input: "input:0"
+  input: "InceptionV3/Conv2d_1a_3x3/weights/read/_3__cf__3"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "VALID"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 2
+        i: 2
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "use_cudnn_on_gpu"
+    value {
+      b: true
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_1a_3x3/Conv2D_bn_offset"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 4
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_1a_3x3/BatchNorm/FusedBatchNorm"
+  op: "BiasAdd"
+  input: "InceptionV3/InceptionV3/Conv2d_1a_3x3/Conv2D"
+  input: "InceptionV3/InceptionV3/Conv2d_1a_3x3/Conv2D_bn_offset"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_1a_3x3/Relu"
+  op: "Relu"
+  input: "InceptionV3/InceptionV3/Conv2d_1a_3x3/BatchNorm/FusedBatchNorm"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0026/test.info b/res/TensorFlowTests/NET_0026/test.info
new file mode 100644
index 000000000..b96ff35b8
--- /dev/null
+++ b/res/TensorFlowTests/NET_0026/test.info
@@ -0,0 +1,3 @@
+# This is a slim version of first 7 nodes in inception v3 (from Placeholder to the second ReLU)
+input,  input:0,  TF_FLOAT,  [1, 9, 9, 3]
+output, InceptionV3/InceptionV3/Conv2d_2a_3x3/Relu:0,  TF_FLOAT,  [1, 2, 2, 4]
diff --git a/res/TensorFlowTests/NET_0026/test.pbtxt b/res/TensorFlowTests/NET_0026/test.pbtxt
new file mode 100644
index 000000000..ea0262784
--- /dev/null
+++ b/res/TensorFlowTests/NET_0026/test.pbtxt
@@ -0,0 +1,305 @@
+node {
+  name: "InceptionV3/Conv2d_1a_3x3/weights/read/_3__cf__3"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 3
+          }
+          dim {
+            size: 3
+          }
+          dim {
+            size: 3
+          }
+          dim {
+            size: 4
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "input"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 9
+        }
+        dim {
+          size: 9
+        }
+        dim {
+          size: 3
+        }
+      }
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_1a_3x3/Conv2D"
+  op: "Conv2D"
+  input: "input:0"
+  input: "InceptionV3/Conv2d_1a_3x3/weights/read/_3__cf__3"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "VALID"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 2
+        i: 2
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "use_cudnn_on_gpu"
+    value {
+      b: true
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_1a_3x3/Conv2D_bn_offset"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 4
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_1a_3x3/BatchNorm/FusedBatchNorm"
+  op: "BiasAdd"
+  input: "InceptionV3/InceptionV3/Conv2d_1a_3x3/Conv2D"
+  input: "InceptionV3/InceptionV3/Conv2d_1a_3x3/Conv2D_bn_offset"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_1a_3x3/Relu"
+  op: "Relu"
+  input: "InceptionV3/InceptionV3/Conv2d_1a_3x3/BatchNorm/FusedBatchNorm"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "InceptionV3/Conv2d_2a_3x3/weights/read/_7__cf__7"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 3
+          }
+          dim {
+            size: 3
+          }
+          dim {
+            size: 4
+          }
+          dim {
+            size: 4
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_2a_3x3/Conv2D"
+  op: "Conv2D"
+  input: "InceptionV3/InceptionV3/Conv2d_1a_3x3/Relu"
+  input: "InceptionV3/Conv2d_2a_3x3/weights/read/_7__cf__7"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "VALID"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "use_cudnn_on_gpu"
+    value {
+      b: true
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_2a_3x3/Conv2D_bn_offset"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 4
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_2a_3x3/BatchNorm/FusedBatchNorm"
+  op: "BiasAdd"
+  input: "InceptionV3/InceptionV3/Conv2d_2a_3x3/Conv2D"
+  input: "InceptionV3/InceptionV3/Conv2d_2a_3x3/Conv2D_bn_offset"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_2a_3x3/Relu"
+  op: "Relu"
+  input: "InceptionV3/InceptionV3/Conv2d_2a_3x3/BatchNorm/FusedBatchNorm"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0027/test.info b/res/TensorFlowTests/NET_0027/test.info
new file mode 100644
index 000000000..db97c4603
--- /dev/null
+++ b/res/TensorFlowTests/NET_0027/test.info
@@ -0,0 +1,3 @@
+# This is a slim version of first 10 nodes in inception v3 (from Placeholder to MaxPool2D)
+input,  input:0,  TF_FLOAT,  [1, 15, 15, 3]
+output, InceptionV3/InceptionV3/MaxPool_3a_3x3/MaxPool:0,  TF_FLOAT,  [1, 2, 2, 5]
diff --git a/res/TensorFlowTests/NET_0027/test.pbtxt b/res/TensorFlowTests/NET_0027/test.pbtxt
new file mode 100644
index 000000000..af5fa9372
--- /dev/null
+++ b/res/TensorFlowTests/NET_0027/test.pbtxt
@@ -0,0 +1,488 @@
+node {
+  name: "InceptionV3/Conv2d_1a_3x3/weights/read/_3__cf__3"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 3
+          }
+          dim {
+            size: 3
+          }
+          dim {
+            size: 3
+          }
+          dim {
+            size: 4
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "input"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 15
+        }
+        dim {
+          size: 15
+        }
+        dim {
+          size: 3
+        }
+      }
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_1a_3x3/Conv2D"
+  op: "Conv2D"
+  input: "input:0"
+  input: "InceptionV3/Conv2d_1a_3x3/weights/read/_3__cf__3"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "VALID"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 2
+        i: 2
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "use_cudnn_on_gpu"
+    value {
+      b: true
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_1a_3x3/Conv2D_bn_offset"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 4
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_1a_3x3/BatchNorm/FusedBatchNorm"
+  op: "BiasAdd"
+  input: "InceptionV3/InceptionV3/Conv2d_1a_3x3/Conv2D"
+  input: "InceptionV3/InceptionV3/Conv2d_1a_3x3/Conv2D_bn_offset"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_1a_3x3/Relu"
+  op: "Relu"
+  input: "InceptionV3/InceptionV3/Conv2d_1a_3x3/BatchNorm/FusedBatchNorm"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "InceptionV3/Conv2d_2a_3x3/weights/read/_7__cf__7"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 3
+          }
+          dim {
+            size: 3
+          }
+          dim {
+            size: 4
+          }
+          dim {
+            size: 4
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_2a_3x3/Conv2D"
+  op: "Conv2D"
+  input: "InceptionV3/InceptionV3/Conv2d_1a_3x3/Relu"
+  input: "InceptionV3/Conv2d_2a_3x3/weights/read/_7__cf__7"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "VALID"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "use_cudnn_on_gpu"
+    value {
+      b: true
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_2a_3x3/Conv2D_bn_offset"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 4
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_2a_3x3/BatchNorm/FusedBatchNorm"
+  op: "BiasAdd"
+  input: "InceptionV3/InceptionV3/Conv2d_2a_3x3/Conv2D"
+  input: "InceptionV3/InceptionV3/Conv2d_2a_3x3/Conv2D_bn_offset"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_2a_3x3/Relu"
+  op: "Relu"
+  input: "InceptionV3/InceptionV3/Conv2d_2a_3x3/BatchNorm/FusedBatchNorm"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_2b_3x3/Conv2D"
+  op: "Conv2D"
+  input: "InceptionV3/InceptionV3/Conv2d_2a_3x3/Relu"
+  input: "InceptionV3/Conv2d_2b_3x3/weights/read/_11__cf__11"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "SAME"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "use_cudnn_on_gpu"
+    value {
+      b: true
+    }
+  }
+}
+node {
+  name: "InceptionV3/Conv2d_2b_3x3/weights/read/_11__cf__11"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 3
+          }
+          dim {
+            size: 3
+          }
+          dim {
+            size: 4
+          }
+          dim {
+            size: 5
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_2b_3x3/Conv2D_bn_offset"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 5
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_2b_3x3/BatchNorm/FusedBatchNorm"
+  op: "BiasAdd"
+  input: "InceptionV3/InceptionV3/Conv2d_2b_3x3/Conv2D"
+  input: "InceptionV3/InceptionV3/Conv2d_2b_3x3/Conv2D_bn_offset"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/Conv2d_2b_3x3/Relu"
+  op: "Relu"
+  input: "InceptionV3/InceptionV3/Conv2d_2b_3x3/BatchNorm/FusedBatchNorm"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "InceptionV3/InceptionV3/MaxPool_3a_3x3/MaxPool"
+  op: "MaxPool"
+  input: "InceptionV3/InceptionV3/Conv2d_2b_3x3/Relu"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "ksize"
+    value {
+      list {
+        i: 1
+        i: 3
+        i: 3
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "VALID"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 2
+        i: 2
+        i: 1
+      }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/NET_0028/test.info b/res/TensorFlowTests/NET_0028/test.info
new file mode 100644
index 000000000..d09ce02da
--- /dev/null
+++ b/res/TensorFlowTests/NET_0028/test.info
@@ -0,0 +1,3 @@
+# This is a slim version of Instance Normalizartion
+input,  Input:0,  TF_FLOAT,  [1, 8, 6, 12]
+output, Relu:0,   TF_FLOAT,  [1, 8, 6, 12]
diff --git a/res/TensorFlowTests/NET_0028/test.pbtxt b/res/TensorFlowTests/NET_0028/test.pbtxt
new file mode 100644
index 000000000..48a5bccd3
--- /dev/null
+++ b/res/TensorFlowTests/NET_0028/test.pbtxt
@@ -0,0 +1,373 @@
+node {
+  name: "Input"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 8
+        }
+        dim {
+          size: 6
+        }
+        dim {
+          size: 12
+        }
+      }
+    }
+  }
+}
+node {
+  name: "InstanceNorm/beta"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 12
+          }
+        }
+        float_val: 1.97139931
+        float_val: 1.45169675
+        float_val: 1.2031461
+        float_val: 0.287978739
+        float_val: 0.161815107
+        float_val: -0.281398058
+        float_val: 2.70276475
+        float_val: -0.166961521
+        float_val: 0.266388983
+        float_val: 0.890943348
+        float_val: -0.279832929
+        float_val: 1.82808423
+      }
+    }
+  }
+}
+node {
+  name: "InstanceNorm/beta/read"
+  op: "Identity"
+  input: "InstanceNorm/beta"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "_class"
+    value {
+      list {
+        s: "loc:@InstanceNorm/beta"
+      }
+    }
+  }
+}
+node {
+  name: "InstanceNorm/gamma"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 12
+          }
+        }
+        float_val: 0.574708045
+        float_val: 0.387735426
+        float_val: 0.899499536
+        float_val: 0.484296113
+        float_val: 2.35850787
+        float_val: 1.06661248
+        float_val: 0.343602151
+        float_val: 2.27582788
+        float_val: 1.14559281
+        float_val: 0.690169275
+        float_val: 1.20440173
+        float_val: 0.350952208
+      }
+    }
+  }
+}
+node {
+  name: "InstanceNorm/gamma/read"
+  op: "Identity"
+  input: "InstanceNorm/gamma"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "_class"
+    value {
+      list {
+        s: "loc:@InstanceNorm/gamma"
+      }
+    }
+  }
+}
+node {
+  name: "InstanceNorm/moments/mean/reduction_indices"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_INT32
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+          dim {
+            size: 2
+          }
+        }
+        int_val: 1
+        int_val: 2
+      }
+    }
+  }
+}
+node {
+  name: "InstanceNorm/moments/mean"
+  op: "Mean"
+  input: "Input"
+  input: "InstanceNorm/moments/mean/reduction_indices"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "Tidx"
+    value {
+      type: DT_INT32
+    }
+  }
+  attr {
+    key: "keep_dims"
+    value {
+      b: true
+    }
+  }
+}
+node {
+  name: "InstanceNorm/moments/StopGradient"
+  op: "StopGradient"
+  input: "InstanceNorm/moments/mean"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "InstanceNorm/moments/SquaredDifference"
+  op: "SquaredDifference"
+  input: "Input"
+  input: "InstanceNorm/moments/StopGradient"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "InstanceNorm/moments/variance/reduction_indices"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_INT32
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+          dim {
+            size: 2
+          }
+        }
+        int_val: 1
+        int_val: 2
+      }
+    }
+  }
+}
+node {
+  name: "InstanceNorm/moments/variance"
+  op: "Mean"
+  input: "InstanceNorm/moments/SquaredDifference"
+  input: "InstanceNorm/moments/variance/reduction_indices"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "Tidx"
+    value {
+      type: DT_INT32
+    }
+  }
+  attr {
+    key: "keep_dims"
+    value {
+      b: true
+    }
+  }
+}
+node {
+  name: "InstanceNorm/instancenorm/add/y"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+        }
+        float_val: 0.001
+      }
+    }
+  }
+}
+node {
+  name: "InstanceNorm/instancenorm/add"
+  op: "Add"
+  input: "InstanceNorm/moments/variance"
+  input: "InstanceNorm/instancenorm/add/y"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "InstanceNorm/instancenorm/Rsqrt"
+  op: "Rsqrt"
+  input: "InstanceNorm/instancenorm/add"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "InstanceNorm/instancenorm/mul"
+  op: "Mul"
+  input: "InstanceNorm/instancenorm/Rsqrt"
+  input: "InstanceNorm/gamma/read"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "InstanceNorm/instancenorm/mul_1"
+  op: "Mul"
+  input: "Input"
+  input: "InstanceNorm/instancenorm/mul"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "InstanceNorm/instancenorm/mul_2"
+  op: "Mul"
+  input: "InstanceNorm/moments/mean"
+  input: "InstanceNorm/instancenorm/mul"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "InstanceNorm/instancenorm/sub"
+  op: "Sub"
+  input: "InstanceNorm/beta/read"
+  input: "InstanceNorm/instancenorm/mul_2"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "InstanceNorm/instancenorm/add_1"
+  op: "Add"
+  input: "InstanceNorm/instancenorm/mul_1"
+  input: "InstanceNorm/instancenorm/sub"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
+node {
+  name: "Relu"
+  op: "Relu"
+  input: "InstanceNorm/instancenorm/add_1"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/REGRESSION_0000/test.info b/res/TensorFlowTests/REGRESSION_0000/test.info
new file mode 100644
index 000000000..1012f87e8
--- /dev/null
+++ b/res/TensorFlowTests/REGRESSION_0000/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0, TF_FLOAT, [2, 3]
+output, Add:0,         TF_FLOAT, [2, 3]
diff --git a/res/TensorFlowTests/REGRESSION_0000/test.pbtxt b/res/TensorFlowTests/REGRESSION_0000/test.pbtxt
new file mode 100644
index 000000000..aa552ce65
--- /dev/null
+++ b/res/TensorFlowTests/REGRESSION_0000/test.pbtxt
@@ -0,0 +1,68 @@
+# Add network with Placeholder and Const as arguments
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 2
+        }
+        dim {
+          size: 3
+        }
+      }
+    }
+  }
+}
+node {
+  name: "Const"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 3
+          }
+        }
+        float_val: 1.1
+        float_val: 2.2
+        float_val: 3.3
+        float_val: 4.4
+        float_val: 5.5
+        float_val: 6.6
+      }
+    }
+  }
+}
+node {
+  name: "Add"
+  op: "Add"
+  input: "Placeholder"
+  input: "Const"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Add_000/test.info b/res/TensorFlowTests/UNIT_Add_000/test.info
new file mode 100644
index 000000000..77c2dbe0d
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Add_000/test.info
@@ -0,0 +1,3 @@
+input, input_01:0,  TF_FLOAT,   [1, 3, 3, 1]
+input, input_02:0,  TF_FLOAT,   [1, 3, 3, 1]
+output, add:0,  TF_FLOAT,   [1, 3, 3, 1]
diff --git a/res/TensorFlowTests/UNIT_Add_000/test.pbtxt b/res/TensorFlowTests/UNIT_Add_000/test.pbtxt
new file mode 100644
index 000000000..b03826840
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Add_000/test.pbtxt
@@ -0,0 +1,70 @@
+node {
+  name: "input_01"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 1
+        }
+      }
+    }
+  }
+}
+node {
+  name: "input_02"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 1
+        }
+      }
+    }
+  }
+}
+node {
+  name: "add"
+  op: "Add"
+  input: "input_01"
+  input: "input_02"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Add_001/test.info b/res/TensorFlowTests/UNIT_Add_001/test.info
new file mode 100644
index 000000000..f99f0f808
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Add_001/test.info
@@ -0,0 +1,3 @@
+input, input_01:0,  TF_FLOAT,   [1, 3, 3, 5]
+input, input_02:0,  TF_FLOAT,   [1, 1, 1, 5]
+output, add:0,  TF_FLOAT,   [1, 3, 3, 5]
diff --git a/res/TensorFlowTests/UNIT_Add_001/test.pbtxt b/res/TensorFlowTests/UNIT_Add_001/test.pbtxt
new file mode 100644
index 000000000..ff89686b8
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Add_001/test.pbtxt
@@ -0,0 +1,70 @@
+node {
+  name: "input_01"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "input_02"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 1
+        }
+        dim {
+          size: 1
+        }
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "add"
+  op: "Add"
+  input: "input_01"
+  input: "input_02"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Add_002/test.info b/res/TensorFlowTests/UNIT_Add_002/test.info
new file mode 100644
index 000000000..4471cff17
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Add_002/test.info
@@ -0,0 +1,3 @@
+input, input_01:0,  TF_FLOAT,   [1, 3, 3, 5]
+input, input_02:0,  TF_FLOAT,   [5]
+output, add:0,  TF_FLOAT,   [1, 3, 3, 5]
diff --git a/res/TensorFlowTests/UNIT_Add_002/test.pbtxt b/res/TensorFlowTests/UNIT_Add_002/test.pbtxt
new file mode 100644
index 000000000..5e320a413
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Add_002/test.pbtxt
@@ -0,0 +1,61 @@
+node {
+  name: "input_01"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "input_02"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "add"
+  op: "Add"
+  input: "input_01"
+  input: "input_02"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Add_003/test.info b/res/TensorFlowTests/UNIT_Add_003/test.info
new file mode 100644
index 000000000..8c87db7ea
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Add_003/test.info
@@ -0,0 +1,3 @@
+input, input_01:0,  TF_FLOAT,   [1, 3, 3, 5]
+input, input_02:0,  TF_FLOAT,   []
+output, add:0,  TF_FLOAT,   [1, 3, 3, 5]
diff --git a/res/TensorFlowTests/UNIT_Add_003/test.pbtxt b/res/TensorFlowTests/UNIT_Add_003/test.pbtxt
new file mode 100644
index 000000000..96b9219af
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Add_003/test.pbtxt
@@ -0,0 +1,58 @@
+node {
+  name: "input_01"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "input_02"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+      }
+    }
+  }
+}
+node {
+  name: "add"
+  op: "Add"
+  input: "input_01"
+  input: "input_02"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Add_004/test.info b/res/TensorFlowTests/UNIT_Add_004/test.info
new file mode 100644
index 000000000..201dfd6fc
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Add_004/test.info
@@ -0,0 +1,2 @@
+input, input_01:0,  TF_FLOAT,   [1, 3, 3, 5]
+output, add:0,  TF_FLOAT,   [1, 3, 3, 5]
diff --git a/res/TensorFlowTests/UNIT_Add_004/test.pbtxt b/res/TensorFlowTests/UNIT_Add_004/test.pbtxt
new file mode 100644
index 000000000..ca9295022
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Add_004/test.pbtxt
@@ -0,0 +1,62 @@
+node {
+  name: "input_01"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "scala"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "add"
+  op: "Add"
+  input: "input_01"
+  input: "scala"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Add_005/test.info b/res/TensorFlowTests/UNIT_Add_005/test.info
new file mode 100644
index 000000000..7cd730ae6
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Add_005/test.info
@@ -0,0 +1,3 @@
+input, input_01:0, TF_FLOAT, [1, 1, 1, 5]
+input, input_02:0, TF_FLOAT, [1, 3, 3, 5]
+output, add:0, TF_FLOAT, [1, 3, 3, 5]
diff --git a/res/TensorFlowTests/UNIT_Add_005/test.pbtxt b/res/TensorFlowTests/UNIT_Add_005/test.pbtxt
new file mode 100644
index 000000000..cc28366b7
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Add_005/test.pbtxt
@@ -0,0 +1,49 @@
+# LHS broadcasting
+node {
+  name: "input_01"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 1 }
+        dim { size: 1 }
+        dim { size: 5 }
+      }
+    }
+  }
+}
+node {
+  name: "input_02"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 3 }
+        dim { size: 3 }
+        dim { size: 5 }
+      }
+    }
+  }
+}
+node {
+  name: "add"
+  op: "Add"
+  input: "input_01"
+  input: "input_02"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_AvgPool_000/test.info b/res/TensorFlowTests/UNIT_AvgPool_000/test.info
new file mode 100644
index 000000000..31c94cffa
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_AvgPool_000/test.info
@@ -0,0 +1,2 @@
+input, placeholder:0,  TF_FLOAT,   [1, 3, 3, 1]
+output, avgpool2d:0,  TF_FLOAT,   [1, 3, 3, 1]
diff --git a/res/TensorFlowTests/UNIT_AvgPool_000/test.pbtxt b/res/TensorFlowTests/UNIT_AvgPool_000/test.pbtxt
new file mode 100644
index 000000000..8c71f0b9e
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_AvgPool_000/test.pbtxt
@@ -0,0 +1,74 @@
+node {
+  name: "placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 1
+        }
+      }
+    }
+  }
+}
+node {
+  name: "avgpool2d"
+  op: "AvgPool"
+  input: "placeholder"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "ksize"
+    value {
+      list {
+        i: 1
+        i: 3
+        i: 3
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "SAME"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_AvgPool_001/test.info b/res/TensorFlowTests/UNIT_AvgPool_001/test.info
new file mode 100644
index 000000000..2cf5bfe34
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_AvgPool_001/test.info
@@ -0,0 +1,2 @@
+input, placeholder:0,  TF_FLOAT,   [1, 4, 4, 1]
+output, avgpool2d:0,  TF_FLOAT,   [1, 2, 2, 1]
diff --git a/res/TensorFlowTests/UNIT_AvgPool_001/test.pbtxt b/res/TensorFlowTests/UNIT_AvgPool_001/test.pbtxt
new file mode 100644
index 000000000..faf117ca4
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_AvgPool_001/test.pbtxt
@@ -0,0 +1,74 @@
+node {
+  name: "placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 4
+        }
+        dim {
+          size: 4
+        }
+        dim {
+          size: 1
+        }
+      }
+    }
+  }
+}
+node {
+  name: "avgpool2d"
+  op: "AvgPool"
+  input: "placeholder"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "ksize"
+    value {
+      list {
+        i: 1
+        i: 2
+        i: 2
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "VALID"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 2
+        i: 2
+        i: 1
+      }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_BiasAdd_000/test.info b/res/TensorFlowTests/UNIT_BiasAdd_000/test.info
new file mode 100644
index 000000000..cbb4f38dd
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_BiasAdd_000/test.info
@@ -0,0 +1 @@
+output, out:0,  TF_FLOAT,   [1, 5, 5, 3]
diff --git a/res/TensorFlowTests/UNIT_BiasAdd_000/test.pbtxt b/res/TensorFlowTests/UNIT_BiasAdd_000/test.pbtxt
new file mode 100644
index 000000000..642eac655
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_BiasAdd_000/test.pbtxt
@@ -0,0 +1,57 @@
+node {
+  name: "val"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim { size: 1 }
+          dim { size: 5 }
+          dim { size: 5 }
+          dim { size: 3 }
+        }
+        float_val: 2.1
+      }
+    }
+  }
+}
+node {
+  name: "bias"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim { size: 3 }
+        }
+        float_val: 1.1
+      }
+    }
+  }
+}
+node {
+  name: "out"
+  op: "BiasAdd"
+  input: "val"
+  input: "bias"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_BiasAdd_001/test.info b/res/TensorFlowTests/UNIT_BiasAdd_001/test.info
new file mode 100644
index 000000000..04c89d69c
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_BiasAdd_001/test.info
@@ -0,0 +1 @@
+output, out:0,  TF_FLOAT,   [1, 3, 4, 4]
diff --git a/res/TensorFlowTests/UNIT_BiasAdd_001/test.pbtxt b/res/TensorFlowTests/UNIT_BiasAdd_001/test.pbtxt
new file mode 100644
index 000000000..6b543084d
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_BiasAdd_001/test.pbtxt
@@ -0,0 +1,57 @@
+node {
+  name: "val"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim { size: 1 }
+          dim { size: 3 }
+          dim { size: 4 }
+          dim { size: 4 }
+        }
+        float_val: 2.1
+      }
+    }
+  }
+}
+node {
+  name: "bias"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim { size: 3 }
+        }
+        float_val: 1.1
+      }
+    }
+  }
+}
+node {
+  name: "out"
+  op: "BiasAdd"
+  input: "val"
+  input: "bias"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NCHW" }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_BiasAdd_002/test.info b/res/TensorFlowTests/UNIT_BiasAdd_002/test.info
new file mode 100644
index 000000000..2133df438
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_BiasAdd_002/test.info
@@ -0,0 +1,2 @@
+input,  input:0,  TF_FLOAT, [1, 16, 16, 2]
+output, output:0, TF_FLOAT, [1, 16, 16, 2]
diff --git a/res/TensorFlowTests/UNIT_BiasAdd_002/test.pbtxt b/res/TensorFlowTests/UNIT_BiasAdd_002/test.pbtxt
new file mode 100644
index 000000000..336a10338
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_BiasAdd_002/test.pbtxt
@@ -0,0 +1,51 @@
+node {
+  name: "input"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 16 }
+        dim { size: 16 }
+        dim { size: 2 }
+      }
+    }
+  }
+}
+node {
+  name: "bias"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape { dim { size: 2 } }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "output"
+  op: "BiasAdd"
+  input: "input"
+  input: "bias"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Concat_000/test.info b/res/TensorFlowTests/UNIT_Concat_000/test.info
new file mode 100644
index 000000000..9ea940f2a
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Concat_000/test.info
@@ -0,0 +1 @@
+output, Concat:0, TF_FLOAT, [4, 3]
diff --git a/res/TensorFlowTests/UNIT_Concat_000/test.pbtxt b/res/TensorFlowTests/UNIT_Concat_000/test.pbtxt
new file mode 100644
index 000000000..77dbea792
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Concat_000/test.pbtxt
@@ -0,0 +1,110 @@
+node {
+  name: "Input01"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 3
+          }
+        }
+        float_val: 1
+        float_val: 2
+        float_val: 3
+        float_val: 4
+        float_val: 5
+        float_val: 6
+      }
+    }
+  }
+}
+node {
+  name: "Input02"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 3
+          }
+        }
+        float_val: 7
+        float_val: 8
+        float_val: 9
+        float_val: 10
+        float_val: 11
+        float_val: 12
+      }
+    }
+  }
+}
+node {
+  name: "Axis"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_INT32
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+        }
+        int_val: 0
+      }
+    }
+  }
+}
+node {
+  name: "Concat"
+  op: "ConcatV2"
+  input: "Input01"
+  input: "Input02"
+  input: "Axis"
+  attr {
+    key: "N"
+    value {
+      i: 2
+    }
+  }
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "Tidx"
+    value {
+      type: DT_INT32
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Concat_001/test.info b/res/TensorFlowTests/UNIT_Concat_001/test.info
new file mode 100644
index 000000000..e2add430f
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Concat_001/test.info
@@ -0,0 +1 @@
+output, Concat:0, TF_FLOAT, [6, 3]
diff --git a/res/TensorFlowTests/UNIT_Concat_001/test.pbtxt b/res/TensorFlowTests/UNIT_Concat_001/test.pbtxt
new file mode 100644
index 000000000..ac3e85581
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Concat_001/test.pbtxt
@@ -0,0 +1,143 @@
+node {
+  name: "Input01"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 3
+          }
+        }
+        float_val: 1
+        float_val: 2
+        float_val: 3
+        float_val: 4
+        float_val: 5
+        float_val: 6
+      }
+    }
+  }
+}
+node {
+  name: "Input02"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 3
+          }
+        }
+        float_val: 7
+        float_val: 8
+        float_val: 9
+        float_val: 10
+        float_val: 11
+        float_val: 12
+      }
+    }
+  }
+}
+node {
+  name: "Input03"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 3
+          }
+        }
+        float_val: 13
+        float_val: 14
+        float_val: 15
+        float_val: 16
+        float_val: 17
+        float_val: 18
+      }
+    }
+  }
+}
+node {
+  name: "Axis"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_INT32
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+        }
+        int_val: 0
+      }
+    }
+  }
+}
+node {
+  name: "Concat"
+  op: "ConcatV2"
+  input: "Input01"
+  input: "Input02"
+  input: "Input03"
+  input: "Axis"
+  attr {
+    key: "N"
+    value {
+      i: 3
+    }
+  }
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "Tidx"
+    value {
+      type: DT_INT32
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Concat_002/test.info b/res/TensorFlowTests/UNIT_Concat_002/test.info
new file mode 100644
index 000000000..460093bd5
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Concat_002/test.info
@@ -0,0 +1,3 @@
+input,  Input01:0, TF_FLOAT, [2, 3]
+input,  Input02:0, TF_FLOAT, [2, 3]
+output, Concat:0,  TF_FLOAT, [2, 6]
diff --git a/res/TensorFlowTests/UNIT_Concat_002/test.pbtxt b/res/TensorFlowTests/UNIT_Concat_002/test.pbtxt
new file mode 100644
index 000000000..9a524040a
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Concat_002/test.pbtxt
@@ -0,0 +1,92 @@
+node {
+  name: "Input01"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 2
+        }
+        dim {
+          size: 3
+        }
+      }
+    }
+  }
+}
+node {
+  name: "Input02"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 2
+        }
+        dim {
+          size: 3
+        }
+      }
+    }
+  }
+}
+node {
+  name: "Axis"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_INT32
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+        }
+        int_val: -1
+      }
+    }
+  }
+}
+node {
+  name: "Concat"
+  op: "ConcatV2"
+  input: "Input01"
+  input: "Input02"
+  input: "Axis"
+  attr {
+    key: "N"
+    value {
+      i: 2
+    }
+  }
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "Tidx"
+    value {
+      type: DT_INT32
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Const_000/test.info b/res/TensorFlowTests/UNIT_Const_000/test.info
new file mode 100644
index 000000000..43b4f06a5
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Const_000/test.info
@@ -0,0 +1 @@
+output, const/float:0,  TF_FLOAT,   [2, 3]
diff --git a/res/TensorFlowTests/UNIT_Const_000/test.pbtxt b/res/TensorFlowTests/UNIT_Const_000/test.pbtxt
new file mode 100644
index 000000000..b91ade2f3
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Const_000/test.pbtxt
@@ -0,0 +1,32 @@
+node {
+  name: "const/float"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 3
+          }
+        }
+        float_val: 1.1
+        float_val: 2.2
+        float_val: 3.3
+        float_val: 4.4
+        float_val: 5.5
+        float_val: 6.6
+      }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Const_001/test.info b/res/TensorFlowTests/UNIT_Const_001/test.info
new file mode 100644
index 000000000..445b34b67
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Const_001/test.info
@@ -0,0 +1 @@
+output, const/int32:0,  TF_INT32,   [2, 3]
diff --git a/res/TensorFlowTests/UNIT_Const_001/test.pbtxt b/res/TensorFlowTests/UNIT_Const_001/test.pbtxt
new file mode 100644
index 000000000..bec7dfb92
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Const_001/test.pbtxt
@@ -0,0 +1,32 @@
+node {
+  name: "const/int32"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_INT32
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 3
+          }
+        }
+        int_val: 1
+        int_val: 2
+        int_val: 3
+        int_val: 4
+        int_val: 5
+        int_val: 6
+      }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Conv2DBackpropInput_001/test.info b/res/TensorFlowTests/UNIT_Conv2DBackpropInput_001/test.info
new file mode 100644
index 000000000..2537d0732
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Conv2DBackpropInput_001/test.info
@@ -0,0 +1,2 @@
+input,  ifm:0,  TF_FLOAT,  [1, 8, 6, 3]
+output, ofm:0,  TF_FLOAT,  [1, 16, 12, 2]
diff --git a/res/TensorFlowTests/UNIT_Conv2DBackpropInput_001/test.pbtxt b/res/TensorFlowTests/UNIT_Conv2DBackpropInput_001/test.pbtxt
new file mode 100644
index 000000000..8930c4221
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Conv2DBackpropInput_001/test.pbtxt
@@ -0,0 +1,136 @@
+node {
+  name: "ifm"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 8
+        }
+        dim {
+          size: 6
+        }
+        dim {
+          size: 3
+        }
+      }
+    }
+  }
+}
+node {
+  name: "weights"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 3
+          }
+          dim {
+            size: 3
+          }
+          dim {
+            size: 2
+          }
+          dim {
+            size: 3
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "outshape"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_INT32
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+          dim {
+            size: 4
+          }
+        }
+        int_val: 1
+        int_val: 16
+        int_val: 12
+        int_val: 2
+      }
+    }
+  }
+}
+node {
+  name: "ofm"
+  op: "Conv2DBackpropInput"
+  input: "outshape"
+  input: "weights"
+  input: "ifm"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "SAME"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 2
+        i: 2
+        i: 1
+      }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Conv2D_000/test.info b/res/TensorFlowTests/UNIT_Conv2D_000/test.info
new file mode 100644
index 000000000..22facc3fb
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Conv2D_000/test.info
@@ -0,0 +1,3 @@
+# conv2d with VALID, stride = 1, 1
+input,  ifm:0,  TF_FLOAT,  [1, 5, 5, 3]
+output, ofm:0,  TF_FLOAT,  [1, 4, 4, 2]
diff --git a/res/TensorFlowTests/UNIT_Conv2D_000/test.pbtxt b/res/TensorFlowTests/UNIT_Conv2D_000/test.pbtxt
new file mode 100644
index 000000000..3649aa827
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Conv2D_000/test.pbtxt
@@ -0,0 +1,76 @@
+node {
+  name: "ifm"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 5 }
+        dim { size: 5 }
+        dim { size: 3 }
+      }
+    }
+  }
+}
+node {
+  name: "ker"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim { size: 2 }
+          dim { size: 2 }
+          dim { size: 3 }
+          dim { size: 2 }
+        }
+        float_val: 1.1
+      }
+    }
+  }
+}
+node {
+  name: "ofm"
+  op: "Conv2D"
+  input: "ifm"
+  input: "ker"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+  attr {
+    key: "padding"
+    value { s: "VALID" }
+  }
+  attr {
+    key: "strides"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+  attr {
+    key: "use_cudnn_on_gpu"
+    value { b: false }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_CustomOp_000/customop.conf b/res/TensorFlowTests/UNIT_CustomOp_000/customop.conf
new file mode 100644
index 000000000..08ba0f09a
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_CustomOp_000/customop.conf
@@ -0,0 +1,22 @@
+# defining a list of custom ops for this compilation
+custom_op {
+  name: "my/customOp/000"
+  op: "new_custom_op"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "output_shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 2 }
+        dim { size: 1 }
+        dim { size: 2 }
+      }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_CustomOp_000/test.info b/res/TensorFlowTests/UNIT_CustomOp_000/test.info
new file mode 100644
index 000000000..e3e2b176e
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_CustomOp_000/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0,      TF_FLOAT,   [1, 2, 1, 2]
+output, output/relu:0,      TF_FLOAT,   [1, 2, 1, 2]
diff --git a/res/TensorFlowTests/UNIT_CustomOp_000/test.pbtxt b/res/TensorFlowTests/UNIT_CustomOp_000/test.pbtxt
new file mode 100644
index 000000000..373f5b845
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_CustomOp_000/test.pbtxt
@@ -0,0 +1,53 @@
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype" value { type: DT_FLOAT } }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 2 }
+        dim { size: 1 }
+        dim { size: 2 }
+      }
+    }
+  }
+}
+node {
+  name: "my/customOp/000"
+  op: "new_custom_op"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "my_string"
+    value { s: "Hello World" }
+  }
+  attr {
+    key: "my_float"
+    value { f: 0.001 }
+  }
+  attr {
+    key: "my_int"
+    value { i: 111 }
+  }
+  attr {
+    key: "my_bool"
+    value { b: false }
+  }
+}
+node {
+  name: "output/relu"
+  op: "Relu"
+  input: "my/customOp/000"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_CustomOp_001/customop.conf b/res/TensorFlowTests/UNIT_CustomOp_001/customop.conf
new file mode 100644
index 000000000..92c0dd2f2
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_CustomOp_001/customop.conf
@@ -0,0 +1,19 @@
+# defining a list of custom ops for this compilation
+custom_op {
+  name: "FillFrom"
+  op: "FillFrom"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "output_shape"
+    value {
+      shape {
+        dim { size: 10 }
+      }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_CustomOp_001/test.info b/res/TensorFlowTests/UNIT_CustomOp_001/test.info
new file mode 100644
index 000000000..473374cd1
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_CustomOp_001/test.info
@@ -0,0 +1,2 @@
+input,  input_00:0,      TF_FLOAT,   [10]
+output, FillFrom:0,      TF_FLOAT,   [10]
diff --git a/res/TensorFlowTests/UNIT_CustomOp_001/test.pbtxt b/res/TensorFlowTests/UNIT_CustomOp_001/test.pbtxt
new file mode 100644
index 000000000..ad673e0a7
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_CustomOp_001/test.pbtxt
@@ -0,0 +1,38 @@
+# test case discussed in https://github.sec.samsung.net/STAR/nnfw/issues/5607
+node {
+  name: "input_00"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 10
+        }
+      }
+    }
+  }
+}
+node {
+  name: "FillFrom"
+  op: "FillFrom"
+  input: "input_00"
+  attr {
+    key: "idx"
+    value {
+      i: 3
+    }
+  }
+  attr {
+    key: "val"
+    value {
+      f: 1.1
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_DepthwiseConv2D_000/test.info b/res/TensorFlowTests/UNIT_DepthwiseConv2D_000/test.info
new file mode 100644
index 000000000..96a2b1403
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_DepthwiseConv2D_000/test.info
@@ -0,0 +1,2 @@
+input, input:0,  TF_FLOAT,   [1, 11, 7, 3]
+output, DepthwiseConv2dNative:0,  TF_FLOAT,   [1, 6, 4, 12]
diff --git a/res/TensorFlowTests/UNIT_DepthwiseConv2D_000/test.pbtxt b/res/TensorFlowTests/UNIT_DepthwiseConv2D_000/test.pbtxt
new file mode 100644
index 000000000..1d8fcaa00
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_DepthwiseConv2D_000/test.pbtxt
@@ -0,0 +1,115 @@
+# A simple network that has DepthwiseConv2dNative with 'SAME' padding and strides.
+# HOW TO GENERATE:
+#  import tensorflow as tf
+#  input = tf.placeholder(tf.float32, shape=[1,11,7,3], name="input")
+#  filter = tf.constant(1.0, shape=[2,3,3,4], dtype=tf.float32)
+#  dwconv = tf.nn.depthwise_conv2d_native(input,filter,[1,2,2,1],'SAME')
+#  tf.get_default_graph().as_graph_def()
+node {
+  name: "input"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 11
+        }
+        dim {
+          size: 7
+        }
+        dim {
+          size: 3
+        }
+      }
+    }
+  }
+}
+node {
+  name: "Const"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 3
+          }
+          dim {
+            size: 3
+          }
+          dim {
+            size: 4
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "DepthwiseConv2dNative"
+  op: "DepthwiseConv2dNative"
+  input: "input"
+  input: "Const"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "SAME"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 2
+        i: 2
+        i: 1
+      }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_DepthwiseConv2D_001/test.info b/res/TensorFlowTests/UNIT_DepthwiseConv2D_001/test.info
new file mode 100644
index 000000000..c17595388
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_DepthwiseConv2D_001/test.info
@@ -0,0 +1,2 @@
+input, input:0,  TF_FLOAT,   [1, 4, 4, 3]
+output, DepthwiseConv2dNative:0,  TF_FLOAT,   [1, 3, 3, 6]
diff --git a/res/TensorFlowTests/UNIT_DepthwiseConv2D_001/test.pbtxt b/res/TensorFlowTests/UNIT_DepthwiseConv2D_001/test.pbtxt
new file mode 100644
index 000000000..9a9717611
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_DepthwiseConv2D_001/test.pbtxt
@@ -0,0 +1,115 @@
+# A simple network that has DepthwiseConv2dNative with input(Placeholder) and filter(Const)
+# HOW TO GENERATE:
+#  import tensorflow as tf
+#  input = tf.placeholder(tf.float32, shape=[1,4,4,3], name="input")
+#  filter = tf.constant(1.0, shape=[2,2,3,2], dtype=tf.float32)
+#  dwconv = tf.nn.depthwise_conv2d_native(input,filter,[1,1,1,1],'VALID')
+#  tf.get_default_graph().as_graph_def()
+node {
+  name: "input"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 4
+        }
+        dim {
+          size: 4
+        }
+        dim {
+          size: 3
+        }
+      }
+    }
+  }
+}
+node {
+  name: "Const"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 2
+          }
+          dim {
+            size: 3
+          }
+          dim {
+            size: 2
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "DepthwiseConv2dNative"
+  op: "DepthwiseConv2dNative"
+  input: "input"
+  input: "Const"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "dilations"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "VALID"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_FusedBatchNorm_000/test.info b/res/TensorFlowTests/UNIT_FusedBatchNorm_000/test.info
new file mode 100644
index 000000000..30840e8e3
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_FusedBatchNorm_000/test.info
@@ -0,0 +1,3 @@
+# FusedBatchNorm
+input,  placeholder:0,  TF_FLOAT,  [1, 4, 4, 1]
+output, FBN_01:0,  TF_FLOAT,  [1, 4, 4, 1]
diff --git a/res/TensorFlowTests/UNIT_FusedBatchNorm_000/test.pbtxt b/res/TensorFlowTests/UNIT_FusedBatchNorm_000/test.pbtxt
new file mode 100644
index 000000000..40cec4abc
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_FusedBatchNorm_000/test.pbtxt
@@ -0,0 +1,158 @@
+node {
+  name: "placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 4
+        }
+        dim {
+          size: 4
+        }
+        dim {
+          size: 1
+        }
+      }
+    }
+  }
+}
+node {
+  name: "scale"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 1
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "offset"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 1
+          }
+        }
+        float_val: 0.0
+      }
+    }
+  }
+}
+node {
+  name: "FBN_01/mean"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 1
+          }
+        }
+        float_val: 0.0
+      }
+    }
+  }
+}
+node {
+  name: "FBN_01/variance"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 1
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "FBN_01"
+  op: "FusedBatchNorm"
+  input: "placeholder"
+  input: "scale"
+  input: "offset"
+  input: "FBN_01/mean"
+  input: "FBN_01/variance"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "epsilon"
+    value {
+      f: 0.001
+    }
+  }
+  attr {
+    key: "is_training"
+    value {
+      b: false
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_FusedBatchNorm_001/test.info b/res/TensorFlowTests/UNIT_FusedBatchNorm_001/test.info
new file mode 100644
index 000000000..09141a44e
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_FusedBatchNorm_001/test.info
@@ -0,0 +1,3 @@
+# FusedBatchNorm
+input,  placeholder:0,  TF_FLOAT,  [1, 4, 4, 3]
+output, FBN_01:0,  TF_FLOAT,  [1, 4, 4, 3]
diff --git a/res/TensorFlowTests/UNIT_FusedBatchNorm_001/test.pbtxt b/res/TensorFlowTests/UNIT_FusedBatchNorm_001/test.pbtxt
new file mode 100644
index 000000000..9ebeadf70
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_FusedBatchNorm_001/test.pbtxt
@@ -0,0 +1,158 @@
+node {
+  name: "placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 4
+        }
+        dim {
+          size: 4
+        }
+        dim {
+          size: 3
+        }
+      }
+    }
+  }
+}
+node {
+  name: "scale"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 3
+          }
+        }
+        float_val: 1.5
+      }
+    }
+  }
+}
+node {
+  name: "offset"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 3
+          }
+        }
+        float_val: 2.5
+      }
+    }
+  }
+}
+node {
+  name: "FBN_01/mean"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 3
+          }
+        }
+        float_val: 3.5
+      }
+    }
+  }
+}
+node {
+  name: "FBN_01/variance"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 3
+          }
+        }
+        float_val: 4.5
+      }
+    }
+  }
+}
+node {
+  name: "FBN_01"
+  op: "FusedBatchNorm"
+  input: "placeholder"
+  input: "scale"
+  input: "offset"
+  input: "FBN_01/mean"
+  input: "FBN_01/variance"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "epsilon"
+    value {
+      f: 0.001
+    }
+  }
+  attr {
+    key: "is_training"
+    value {
+      b: false
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_MaxPool_000/test.info b/res/TensorFlowTests/UNIT_MaxPool_000/test.info
new file mode 100644
index 000000000..c94e2e7fb
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_MaxPool_000/test.info
@@ -0,0 +1,2 @@
+input, placeholder:0,  TF_FLOAT,   [1, 3, 3, 1]
+output, maxpool2d:0,  TF_FLOAT,   [1, 2, 2, 1]
diff --git a/res/TensorFlowTests/UNIT_MaxPool_000/test.pbtxt b/res/TensorFlowTests/UNIT_MaxPool_000/test.pbtxt
new file mode 100644
index 000000000..81da5bbd5
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_MaxPool_000/test.pbtxt
@@ -0,0 +1,74 @@
+node {
+  name: "placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 1
+        }
+      }
+    }
+  }
+}
+node {
+  name: "maxpool2d"
+  op: "MaxPool"
+  input: "placeholder"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "data_format"
+    value {
+      s: "NHWC"
+    }
+  }
+  attr {
+    key: "ksize"
+    value {
+      list {
+        i: 1
+        i: 2
+        i: 2
+        i: 1
+      }
+    }
+  }
+  attr {
+    key: "padding"
+    value {
+      s: "VALID"
+    }
+  }
+  attr {
+    key: "strides"
+    value {
+      list {
+        i: 1
+        i: 1
+        i: 1
+        i: 1
+      }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_MaxPool_001/test.info b/res/TensorFlowTests/UNIT_MaxPool_001/test.info
new file mode 100644
index 000000000..513a83c84
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_MaxPool_001/test.info
@@ -0,0 +1,2 @@
+input,  placeholder:0,  TF_FLOAT,   [1, 4, 4, 1]
+output, maxpool2d:0,    TF_FLOAT,   [1, 3, 3, 1]
diff --git a/res/TensorFlowTests/UNIT_MaxPool_001/test.pbtxt b/res/TensorFlowTests/UNIT_MaxPool_001/test.pbtxt
new file mode 100644
index 000000000..dfa58d440
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_MaxPool_001/test.pbtxt
@@ -0,0 +1,48 @@
+node {
+  name: "placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 4 }
+        dim { size: 4 }
+        dim { size: 1 }
+      }
+    }
+  }
+}
+node {
+  name: "maxpool2d"
+  op: "MaxPool"
+  input: "placeholder"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "data_format"
+    value { s: "NHWC" }
+  }
+  attr {
+    key: "ksize"
+    value {
+      list { i: 1 i: 2 i: 2 i: 1 }
+    }
+  }
+  attr {
+    key: "padding"
+    value { s: "VALID" }
+  }
+  attr {
+    key: "strides"
+    value {
+      list { i: 1 i: 1 i: 1 i: 1 }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Mean_000/test.info b/res/TensorFlowTests/UNIT_Mean_000/test.info
new file mode 100644
index 000000000..fed1cbd60
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Mean_000/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0,  TF_FLOAT,   [1, 3, 3, 2]
+output, Mean:0,         TF_FLOAT,   [1, 1, 1, 2]
diff --git a/res/TensorFlowTests/UNIT_Mean_000/test.pbtxt b/res/TensorFlowTests/UNIT_Mean_000/test.pbtxt
new file mode 100644
index 000000000..8a9f7848f
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Mean_000/test.pbtxt
@@ -0,0 +1,68 @@
+# Reference Python code:
+#
+# import tensorflow as tf
+#
+# inp = tf.placeholder(tf.float32, [1,3,3,2])
+# mean = tf.math.reduce_mean(inp, keepdims=True, axis=[1,2])
+#
+# print(tf.get_default_graph().as_graph_def())
+#
+# WARNING! Below GraphDef is modified to make it easy to read
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 3 }
+        dim { size: 3 }
+        dim { size: 2 }
+      }
+    }
+  }
+}
+node {
+  name: "Mean/reduction_indices"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_INT32 }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+          dim { size: 2 }
+        }
+        int_val: 1
+        int_val: 2
+      }
+    }
+  }
+}
+node {
+  name: "Mean"
+  op: "Mean"
+  input: "Placeholder"
+  input: "Mean/reduction_indices"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "Tidx"
+    value { type: DT_INT32 }
+  }
+  attr {
+    key: "keep_dims"
+    value { b: true }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Mean_001/test.info b/res/TensorFlowTests/UNIT_Mean_001/test.info
new file mode 100644
index 000000000..682e7cb20
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Mean_001/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0,  TF_FLOAT,   [1, 3, 3, 2]
+output, Mean:0,         TF_FLOAT,   [1, 2]
diff --git a/res/TensorFlowTests/UNIT_Mean_001/test.pbtxt b/res/TensorFlowTests/UNIT_Mean_001/test.pbtxt
new file mode 100644
index 000000000..a579b2c9b
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Mean_001/test.pbtxt
@@ -0,0 +1,68 @@
+# Reference Python code:
+#
+# import tensorflow as tf
+#
+# inp = tf.placeholder(tf.float32, [1,3,3,2])
+# mean = tf.math.reduce_mean(inp, keepdims=False, axis=[1,2])
+#
+# print(tf.get_default_graph().as_graph_def())
+#
+# WARNING! Below GraphDef is modified to make it easy to read
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 3 }
+        dim { size: 3 }
+        dim { size: 2 }
+      }
+    }
+  }
+}
+node {
+  name: "Mean/reduction_indices"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_INT32 }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+          dim { size: 2 }
+        }
+        int_val: 1
+        int_val: 2
+      }
+    }
+  }
+}
+node {
+  name: "Mean"
+  op: "Mean"
+  input: "Placeholder"
+  input: "Mean/reduction_indices"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "Tidx"
+    value { type: DT_INT32 }
+  }
+  attr {
+    key: "keep_dims"
+    value { b: false }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Mean_002/test.info b/res/TensorFlowTests/UNIT_Mean_002/test.info
new file mode 100644
index 000000000..682e7cb20
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Mean_002/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0,  TF_FLOAT,   [1, 3, 3, 2]
+output, Mean:0,         TF_FLOAT,   [1, 2]
diff --git a/res/TensorFlowTests/UNIT_Mean_002/test.pbtxt b/res/TensorFlowTests/UNIT_Mean_002/test.pbtxt
new file mode 100644
index 000000000..1d129f9a2
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Mean_002/test.pbtxt
@@ -0,0 +1,68 @@
+# Reference Python code:
+#
+# import tensorflow as tf
+#
+# inp = tf.placeholder(tf.float32, [1,3,3,2])
+# mean = tf.math.reduce_mean(inp, keepdims=False, axis=[-2,-3])
+#
+# print(tf.get_default_graph().as_graph_def())
+#
+# WARNING! Below GraphDef is modified to make it easy to read
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 3 }
+        dim { size: 3 }
+        dim { size: 2 }
+      }
+    }
+  }
+}
+node {
+  name: "Mean/reduction_indices"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_INT32 }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+          dim { size: 2 }
+        }
+        int_val: -2
+        int_val: -3
+      }
+    }
+  }
+}
+node {
+  name: "Mean"
+  op: "Mean"
+  input: "Placeholder"
+  input: "Mean/reduction_indices"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "Tidx"
+    value { type: DT_INT32 }
+  }
+  attr {
+    key: "keep_dims"
+    value { b: false }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Mean_003/test.info b/res/TensorFlowTests/UNIT_Mean_003/test.info
new file mode 100644
index 000000000..fed1cbd60
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Mean_003/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0,  TF_FLOAT,   [1, 3, 3, 2]
+output, Mean:0,         TF_FLOAT,   [1, 1, 1, 2]
diff --git a/res/TensorFlowTests/UNIT_Mean_003/test.pbtxt b/res/TensorFlowTests/UNIT_Mean_003/test.pbtxt
new file mode 100644
index 000000000..383a1f2ea
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Mean_003/test.pbtxt
@@ -0,0 +1,68 @@
+# Reference Python code:
+#
+# import tensorflow as tf
+#
+# inp = tf.placeholder(tf.float32, [1,3,3,2])
+# mean = tf.math.reduce_mean(inp, keepdims=True, axis=[-2,-3])
+#
+# print(tf.get_default_graph().as_graph_def())
+#
+# WARNING! Below GraphDef is modified to make it easy to read
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 3 }
+        dim { size: 3 }
+        dim { size: 2 }
+      }
+    }
+  }
+}
+node {
+  name: "Mean/reduction_indices"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value { type: DT_INT32 }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+          dim { size: 2 }
+        }
+        int_val: -2
+        int_val: -3
+      }
+    }
+  }
+}
+node {
+  name: "Mean"
+  op: "Mean"
+  input: "Placeholder"
+  input: "Mean/reduction_indices"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "Tidx"
+    value { type: DT_INT32 }
+  }
+  attr {
+    key: "keep_dims"
+    value { b: true }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Mul_000/test.info b/res/TensorFlowTests/UNIT_Mul_000/test.info
new file mode 100644
index 000000000..b3cb3ff70
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Mul_000/test.info
@@ -0,0 +1,3 @@
+input, input_01:0,  TF_FLOAT,   [1, 3, 3, 1]
+input, input_02:0,  TF_FLOAT,   [1, 3, 3, 1]
+output, mul:0,  TF_FLOAT,   [1, 3, 3, 1]
diff --git a/res/TensorFlowTests/UNIT_Mul_000/test.pbtxt b/res/TensorFlowTests/UNIT_Mul_000/test.pbtxt
new file mode 100644
index 000000000..fe6dbc330
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Mul_000/test.pbtxt
@@ -0,0 +1,70 @@
+node {
+  name: "input_01"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 1
+        }
+      }
+    }
+  }
+}
+node {
+  name: "input_02"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 1
+        }
+      }
+    }
+  }
+}
+node {
+  name: "mul"
+  op: "Mul"
+  input: "input_01"
+  input: "input_02"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Mul_001/test.info b/res/TensorFlowTests/UNIT_Mul_001/test.info
new file mode 100644
index 000000000..9de3a648a
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Mul_001/test.info
@@ -0,0 +1,3 @@
+input, input_01:0,  TF_FLOAT,   [1, 3, 3, 5]
+input, input_02:0,  TF_FLOAT,   [1, 1, 1, 5]
+output, mul:0,  TF_FLOAT,   [1, 3, 3, 5]
diff --git a/res/TensorFlowTests/UNIT_Mul_001/test.pbtxt b/res/TensorFlowTests/UNIT_Mul_001/test.pbtxt
new file mode 100644
index 000000000..a96c9ae5a
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Mul_001/test.pbtxt
@@ -0,0 +1,70 @@
+node {
+  name: "input_01"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "input_02"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 1
+        }
+        dim {
+          size: 1
+        }
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "mul"
+  op: "Mul"
+  input: "input_01"
+  input: "input_02"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Mul_002/test.info b/res/TensorFlowTests/UNIT_Mul_002/test.info
new file mode 100644
index 000000000..241ccd9df
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Mul_002/test.info
@@ -0,0 +1,3 @@
+input, input_01:0,  TF_FLOAT,   [1, 3, 3, 5]
+input, input_02:0,  TF_FLOAT,   [5]
+output, mul:0,  TF_FLOAT,   [1, 3, 3, 5]
diff --git a/res/TensorFlowTests/UNIT_Mul_002/test.pbtxt b/res/TensorFlowTests/UNIT_Mul_002/test.pbtxt
new file mode 100644
index 000000000..9ad65c9f5
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Mul_002/test.pbtxt
@@ -0,0 +1,61 @@
+node {
+  name: "input_01"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "input_02"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "mul"
+  op: "Mul"
+  input: "input_01"
+  input: "input_02"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Placeholder_000/test.info b/res/TensorFlowTests/UNIT_Placeholder_000/test.info
new file mode 100644
index 000000000..0d0a8ccc0
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Placeholder_000/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0,      TF_FLOAT,   [1, 2, 1, 2]
+output, output/identity:0,  TF_FLOAT,   [1, 2, 1, 2]
diff --git a/res/TensorFlowTests/UNIT_Placeholder_000/test.pbtxt b/res/TensorFlowTests/UNIT_Placeholder_000/test.pbtxt
new file mode 100644
index 000000000..593fbb2d4
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Placeholder_000/test.pbtxt
@@ -0,0 +1,40 @@
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 2
+        }
+        dim {
+          size: 1
+        }
+        dim {
+          size: 2
+        }
+      }
+    }
+  }
+}
+node {
+  name: "output/identity"
+  op: "Identity"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_RealDiv_000/test.info b/res/TensorFlowTests/UNIT_RealDiv_000/test.info
new file mode 100644
index 000000000..b98f2a338
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_RealDiv_000/test.info
@@ -0,0 +1,3 @@
+input, input_01:0,  TF_FLOAT,   [1, 3, 3, 1]
+input, input_02:0,  TF_FLOAT,   [1, 3, 3, 1]
+output, div:0,  TF_FLOAT,   [1, 3, 3, 1]
diff --git a/res/TensorFlowTests/UNIT_RealDiv_000/test.pbtxt b/res/TensorFlowTests/UNIT_RealDiv_000/test.pbtxt
new file mode 100644
index 000000000..e17d48326
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_RealDiv_000/test.pbtxt
@@ -0,0 +1,70 @@
+node {
+  name: "input_01"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 1
+        }
+      }
+    }
+  }
+}
+node {
+  name: "input_02"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 1
+        }
+      }
+    }
+  }
+}
+node {
+  name: "div"
+  op: "RealDiv"
+  input: "input_01"
+  input: "input_02"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_RealDiv_001/test.info b/res/TensorFlowTests/UNIT_RealDiv_001/test.info
new file mode 100644
index 000000000..ecc4cc5a3
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_RealDiv_001/test.info
@@ -0,0 +1,3 @@
+input, input_01:0,  TF_FLOAT,   [1, 3, 3, 5]
+input, input_02:0,  TF_FLOAT,   [5]
+output, div:0,  TF_FLOAT,   [1, 3, 3, 5]
diff --git a/res/TensorFlowTests/UNIT_RealDiv_001/test.pbtxt b/res/TensorFlowTests/UNIT_RealDiv_001/test.pbtxt
new file mode 100644
index 000000000..4ee3bb898
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_RealDiv_001/test.pbtxt
@@ -0,0 +1,61 @@
+node {
+  name: "input_01"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "input_02"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "div"
+  op: "RealDiv"
+  input: "input_01"
+  input: "input_02"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Relu6_000/test.info b/res/TensorFlowTests/UNIT_Relu6_000/test.info
new file mode 100644
index 000000000..329172400
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Relu6_000/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0, TF_FLOAT, [1, 4, 4, 3]
+output, Relu6:0,       TF_FLOAT, [1, 4, 4, 3]
diff --git a/res/TensorFlowTests/UNIT_Relu6_000/test.pbtxt b/res/TensorFlowTests/UNIT_Relu6_000/test.pbtxt
new file mode 100644
index 000000000..b2989916c
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Relu6_000/test.pbtxt
@@ -0,0 +1,30 @@
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 4 }
+        dim { size: 4 }
+        dim { size: 3 }
+      }
+    }
+  }
+}
+node {
+  name: "Relu6"
+  op: "Relu6"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Relu_000/test.info b/res/TensorFlowTests/UNIT_Relu_000/test.info
new file mode 100644
index 000000000..e3e2b176e
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Relu_000/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0,      TF_FLOAT,   [1, 2, 1, 2]
+output, output/relu:0,      TF_FLOAT,   [1, 2, 1, 2]
diff --git a/res/TensorFlowTests/UNIT_Relu_000/test.pbtxt b/res/TensorFlowTests/UNIT_Relu_000/test.pbtxt
new file mode 100644
index 000000000..96f21d5de
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Relu_000/test.pbtxt
@@ -0,0 +1,40 @@
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 2
+        }
+        dim {
+          size: 1
+        }
+        dim {
+          size: 2
+        }
+      }
+    }
+  }
+}
+node {
+  name: "output/relu"
+  op: "Relu"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Reshape_000/test.info b/res/TensorFlowTests/UNIT_Reshape_000/test.info
new file mode 100644
index 000000000..137cdfa8c
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Reshape_000/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0,  TF_FLOAT,   [6]
+output, Reshape:0,      TF_FLOAT,   [2, 3]
diff --git a/res/TensorFlowTests/UNIT_Reshape_000/test.pbtxt b/res/TensorFlowTests/UNIT_Reshape_000/test.pbtxt
new file mode 100644
index 000000000..a648fb43c
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Reshape_000/test.pbtxt
@@ -0,0 +1,63 @@
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 6
+        }
+      }
+    }
+  }
+}
+node {
+  name: "New_shape"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_INT32
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_INT32
+        tensor_shape {
+          dim {
+            size: 2
+          }
+        }
+        int_val: 2
+        int_val: 3
+      }
+    }
+  }
+}
+node {
+  name: "Reshape"
+  op: "Reshape"
+  input: "Placeholder"
+  input: "New_shape"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "Tshape"
+    value {
+      type: DT_INT32
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Rsqrt_000/test.info b/res/TensorFlowTests/UNIT_Rsqrt_000/test.info
new file mode 100644
index 000000000..b87da7e44
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Rsqrt_000/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0,      TF_FLOAT,   [1, 2, 1, 2]
+output, output/rsqrt:0,      TF_FLOAT,   [1, 2, 1, 2]
diff --git a/res/TensorFlowTests/UNIT_Rsqrt_000/test.pbtxt b/res/TensorFlowTests/UNIT_Rsqrt_000/test.pbtxt
new file mode 100644
index 000000000..babfc3702
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Rsqrt_000/test.pbtxt
@@ -0,0 +1,40 @@
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 2
+        }
+        dim {
+          size: 1
+        }
+        dim {
+          size: 2
+        }
+      }
+    }
+  }
+}
+node {
+  name: "output/rsqrt"
+  op: "Rsqrt"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Shape_000/test.info b/res/TensorFlowTests/UNIT_Shape_000/test.info
new file mode 100644
index 000000000..330c6c22c
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Shape_000/test.info
@@ -0,0 +1 @@
+output, Shape:0, TF_INT32, [2]
diff --git a/res/TensorFlowTests/UNIT_Shape_000/test.pbtxt b/res/TensorFlowTests/UNIT_Shape_000/test.pbtxt
new file mode 100644
index 000000000..7a6cab72b
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Shape_000/test.pbtxt
@@ -0,0 +1,41 @@
+# Simple Shape network
+node {
+  name: "Const"
+  op: "Const"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "value"
+    value {
+      tensor {
+        dtype: DT_FLOAT
+        tensor_shape {
+          dim {
+            size: 2
+          }
+          dim {
+            size: 3
+          }
+        }
+        float_val: 1.0
+      }
+    }
+  }
+}
+node {
+  name: "Shape"
+  op: "Shape"
+  input: "Const"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "out_type"
+    value { type: DT_INT32 }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Softmax_000/test.info b/res/TensorFlowTests/UNIT_Softmax_000/test.info
new file mode 100644
index 000000000..66536b561
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Softmax_000/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0, TF_FLOAT, [2]
+output, Softmax:0,     TF_FLOAT, [2]
diff --git a/res/TensorFlowTests/UNIT_Softmax_000/test.pbtxt b/res/TensorFlowTests/UNIT_Softmax_000/test.pbtxt
new file mode 100644
index 000000000..78451d0b3
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Softmax_000/test.pbtxt
@@ -0,0 +1,32 @@
+# Softmax with rank-1 tensor
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 2
+        }
+      }
+    }
+  }
+}
+node {
+  name: "Softmax"
+  op: "Softmax"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Softmax_001/test.info b/res/TensorFlowTests/UNIT_Softmax_001/test.info
new file mode 100644
index 000000000..fe582132c
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Softmax_001/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0, TF_FLOAT, [2, 3]
+output, Softmax:0,     TF_FLOAT, [2, 3]
diff --git a/res/TensorFlowTests/UNIT_Softmax_001/test.pbtxt b/res/TensorFlowTests/UNIT_Softmax_001/test.pbtxt
new file mode 100644
index 000000000..ec6e030bc
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Softmax_001/test.pbtxt
@@ -0,0 +1,35 @@
+# Softmax with rank-2 tensor
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 2
+        }
+        dim {
+          size: 3
+        }
+      }
+    }
+  }
+}
+node {
+  name: "Softmax"
+  op: "Softmax"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Softmax_002/test.info b/res/TensorFlowTests/UNIT_Softmax_002/test.info
new file mode 100644
index 000000000..ae4dcd6a4
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Softmax_002/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0, TF_FLOAT, [2, 3, 4]
+output, Softmax:0,     TF_FLOAT, [2, 3, 4]
diff --git a/res/TensorFlowTests/UNIT_Softmax_002/test.pbtxt b/res/TensorFlowTests/UNIT_Softmax_002/test.pbtxt
new file mode 100644
index 000000000..e84d73c78
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Softmax_002/test.pbtxt
@@ -0,0 +1,38 @@
+# Softmax with rank-3 tensor
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 2
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 4
+        }
+      }
+    }
+  }
+}
+node {
+  name: "Softmax"
+  op: "Softmax"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Softmax_003/test.info b/res/TensorFlowTests/UNIT_Softmax_003/test.info
new file mode 100644
index 000000000..97b3574f5
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Softmax_003/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0, TF_FLOAT, [2, 2, 3, 4]
+output, Softmax:0,     TF_FLOAT, [2, 2, 3, 4]
diff --git a/res/TensorFlowTests/UNIT_Softmax_003/test.pbtxt b/res/TensorFlowTests/UNIT_Softmax_003/test.pbtxt
new file mode 100644
index 000000000..c4b5ca27f
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Softmax_003/test.pbtxt
@@ -0,0 +1,41 @@
+# Softmax with rank-4 tensor
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 2
+        }
+        dim {
+          size: 2
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 4
+        }
+      }
+    }
+  }
+}
+node {
+  name: "Softmax"
+  op: "Softmax"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Sqrt_000/test.info b/res/TensorFlowTests/UNIT_Sqrt_000/test.info
new file mode 100644
index 000000000..9abb96a0c
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Sqrt_000/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0,      TF_FLOAT,   [1, 2, 1, 2]
+output, output/sqrt:0,      TF_FLOAT,   [1, 2, 1, 2]
diff --git a/res/TensorFlowTests/UNIT_Sqrt_000/test.pbtxt b/res/TensorFlowTests/UNIT_Sqrt_000/test.pbtxt
new file mode 100644
index 000000000..0324220e9
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Sqrt_000/test.pbtxt
@@ -0,0 +1,40 @@
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 2
+        }
+        dim {
+          size: 1
+        }
+        dim {
+          size: 2
+        }
+      }
+    }
+  }
+}
+node {
+  name: "output/sqrt"
+  op: "Sqrt"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_SquaredDifference_000/test.info b/res/TensorFlowTests/UNIT_SquaredDifference_000/test.info
new file mode 100644
index 000000000..cca181d7d
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_SquaredDifference_000/test.info
@@ -0,0 +1,3 @@
+input, input_01:0,  TF_FLOAT,   [1, 3, 3, 1]
+input, input_02:0,  TF_FLOAT,   [1, 3, 3, 1]
+output, squared_difference:0,  TF_FLOAT,   [1, 3, 3, 1]
diff --git a/res/TensorFlowTests/UNIT_SquaredDifference_000/test.pbtxt b/res/TensorFlowTests/UNIT_SquaredDifference_000/test.pbtxt
new file mode 100644
index 000000000..0fca18f0e
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_SquaredDifference_000/test.pbtxt
@@ -0,0 +1,70 @@
+node {
+  name: "input_01"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 1
+        }
+      }
+    }
+  }
+}
+node {
+  name: "input_02"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 1
+        }
+      }
+    }
+  }
+}
+node {
+  name: "squared_difference"
+  op: "SquaredDifference"
+  input: "input_01"
+  input: "input_02"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_SquaredDifference_001/test.info b/res/TensorFlowTests/UNIT_SquaredDifference_001/test.info
new file mode 100644
index 000000000..8dfd36065
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_SquaredDifference_001/test.info
@@ -0,0 +1,3 @@
+input, input_01:0,  TF_FLOAT,   [1, 3, 3, 5]
+input, input_02:0,  TF_FLOAT,   [1, 1, 1, 5]
+output, squared_difference:0,  TF_FLOAT,   [1, 3, 3, 5]
diff --git a/res/TensorFlowTests/UNIT_SquaredDifference_001/test.pbtxt b/res/TensorFlowTests/UNIT_SquaredDifference_001/test.pbtxt
new file mode 100644
index 000000000..5ef69e22f
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_SquaredDifference_001/test.pbtxt
@@ -0,0 +1,70 @@
+node {
+  name: "input_01"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "input_02"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 1
+        }
+        dim {
+          size: 1
+        }
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "squared_difference"
+  op: "SquaredDifference"
+  input: "input_01"
+  input: "input_02"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Squeeze_000/test.info b/res/TensorFlowTests/UNIT_Squeeze_000/test.info
new file mode 100644
index 000000000..fd07403f2
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Squeeze_000/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0, TF_FLOAT, [1, 4, 4, 3]
+output, Squeeze:0,     TF_FLOAT, [4, 4, 3]
diff --git a/res/TensorFlowTests/UNIT_Squeeze_000/test.pbtxt b/res/TensorFlowTests/UNIT_Squeeze_000/test.pbtxt
new file mode 100644
index 000000000..5ad75fca6
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Squeeze_000/test.pbtxt
@@ -0,0 +1,28 @@
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 1 }
+        dim { size: 4 }
+        dim { size: 4 }
+        dim { size: 3 }
+      }
+    }
+  }
+}
+node {
+  name: "Squeeze"
+  op: "Squeeze"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Squeeze_001/test.info b/res/TensorFlowTests/UNIT_Squeeze_001/test.info
new file mode 100644
index 000000000..f71e97f93
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Squeeze_001/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0, TF_FLOAT, [2, 1, 3, 1]
+output, Squeeze:0,     TF_FLOAT, [2, 3, 1]
diff --git a/res/TensorFlowTests/UNIT_Squeeze_001/test.pbtxt b/res/TensorFlowTests/UNIT_Squeeze_001/test.pbtxt
new file mode 100644
index 000000000..641300c10
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Squeeze_001/test.pbtxt
@@ -0,0 +1,35 @@
+# Network with Squeeze that has selective squeeze dimension
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 2 }
+        dim { size: 1 }
+        dim { size: 3 }
+        dim { size: 1 }
+      }
+    }
+  }
+}
+node {
+  name: "Squeeze"
+  op: "Squeeze"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "squeeze_dims"
+    value {
+      list { i: 1 }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Squeeze_002/test.info b/res/TensorFlowTests/UNIT_Squeeze_002/test.info
new file mode 100644
index 000000000..401e102aa
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Squeeze_002/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0, TF_FLOAT, [2, 1, 3, 1]
+output, Squeeze:0,     TF_FLOAT, [2, 1, 3]
diff --git a/res/TensorFlowTests/UNIT_Squeeze_002/test.pbtxt b/res/TensorFlowTests/UNIT_Squeeze_002/test.pbtxt
new file mode 100644
index 000000000..06d09014a
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Squeeze_002/test.pbtxt
@@ -0,0 +1,35 @@
+# Network with Squeeze that has negative squeeze dimension
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 2 }
+        dim { size: 1 }
+        dim { size: 3 }
+        dim { size: 1 }
+      }
+    }
+  }
+}
+node {
+  name: "Squeeze"
+  op: "Squeeze"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "squeeze_dims"
+    value {
+      list { i: -1 }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Squeeze_003/test.info b/res/TensorFlowTests/UNIT_Squeeze_003/test.info
new file mode 100644
index 000000000..7cc93f354
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Squeeze_003/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0, TF_FLOAT, [2, 1, 3, 1]
+output, Squeeze:0,     TF_FLOAT, [2, 3]
diff --git a/res/TensorFlowTests/UNIT_Squeeze_003/test.pbtxt b/res/TensorFlowTests/UNIT_Squeeze_003/test.pbtxt
new file mode 100644
index 000000000..1c760c87f
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Squeeze_003/test.pbtxt
@@ -0,0 +1,35 @@
+# Network with Squeeze that have multiple negative squeeze dimensions
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim { size: 2 }
+        dim { size: 1 }
+        dim { size: 3 }
+        dim { size: 1 }
+      }
+    }
+  }
+}
+node {
+  name: "Squeeze"
+  op: "Squeeze"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value { type: DT_FLOAT }
+  }
+  attr {
+    key: "squeeze_dims"
+    value {
+      list { i: -1 i: -3 }
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_StopGradient_000/test.info b/res/TensorFlowTests/UNIT_StopGradient_000/test.info
new file mode 100644
index 000000000..2315306d0
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_StopGradient_000/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0,   TF_FLOAT,   [2, 3]
+output, StopGradient:0,  TF_FLOAT,   [2, 3]
diff --git a/res/TensorFlowTests/UNIT_StopGradient_000/test.pbtxt b/res/TensorFlowTests/UNIT_StopGradient_000/test.pbtxt
new file mode 100644
index 000000000..dae572323
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_StopGradient_000/test.pbtxt
@@ -0,0 +1,34 @@
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 2
+        }
+        dim {
+          size: 3
+        }
+      }
+    }
+  }
+}
+node {
+  name: "StopGradient"
+  op: "StopGradient"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_StopGradient_001/test.info b/res/TensorFlowTests/UNIT_StopGradient_001/test.info
new file mode 100644
index 000000000..8f87a218f
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_StopGradient_001/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0,   TF_FLOAT,   [1, 3, 3, 2]
+output, StopGradient:0,  TF_FLOAT,   [1, 3, 3, 2]
diff --git a/res/TensorFlowTests/UNIT_StopGradient_001/test.pbtxt b/res/TensorFlowTests/UNIT_StopGradient_001/test.pbtxt
new file mode 100644
index 000000000..95e7c358c
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_StopGradient_001/test.pbtxt
@@ -0,0 +1,40 @@
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 2
+        }
+      }
+    }
+  }
+}
+node {
+  name: "StopGradient"
+  op: "StopGradient"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Sub_000/test.info b/res/TensorFlowTests/UNIT_Sub_000/test.info
new file mode 100644
index 000000000..4a6ba8b83
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Sub_000/test.info
@@ -0,0 +1,3 @@
+input, input_01:0,  TF_FLOAT,   [1, 3, 3, 1]
+input, input_02:0,  TF_FLOAT,   [1, 3, 3, 1]
+output, sub:0,  TF_FLOAT,   [1, 3, 3, 1]
diff --git a/res/TensorFlowTests/UNIT_Sub_000/test.pbtxt b/res/TensorFlowTests/UNIT_Sub_000/test.pbtxt
new file mode 100644
index 000000000..61ecd0221
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Sub_000/test.pbtxt
@@ -0,0 +1,70 @@
+node {
+  name: "input_01"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 1
+        }
+      }
+    }
+  }
+}
+node {
+  name: "input_02"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 1
+        }
+      }
+    }
+  }
+}
+node {
+  name: "sub"
+  op: "Sub"
+  input: "input_01"
+  input: "input_02"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Sub_001/test.info b/res/TensorFlowTests/UNIT_Sub_001/test.info
new file mode 100644
index 000000000..313581754
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Sub_001/test.info
@@ -0,0 +1,3 @@
+input, input_01:0,  TF_FLOAT,   [1, 3, 3, 5]
+input, input_02:0,  TF_FLOAT,   [5]
+output, sub:0,  TF_FLOAT,   [1, 3, 3, 5]
diff --git a/res/TensorFlowTests/UNIT_Sub_001/test.pbtxt b/res/TensorFlowTests/UNIT_Sub_001/test.pbtxt
new file mode 100644
index 000000000..a0ab396f9
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Sub_001/test.pbtxt
@@ -0,0 +1,61 @@
+node {
+  name: "input_01"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 3
+        }
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "input_02"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 5
+        }
+      }
+    }
+  }
+}
+node {
+  name: "sub"
+  op: "Sub"
+  input: "input_01"
+  input: "input_02"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/res/TensorFlowTests/UNIT_Tanh_000/test.info b/res/TensorFlowTests/UNIT_Tanh_000/test.info
new file mode 100644
index 000000000..6655a9ff6
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Tanh_000/test.info
@@ -0,0 +1,2 @@
+input,  Placeholder:0,      TF_FLOAT,   [1, 2, 1, 2]
+output, output/tanh:0,      TF_FLOAT,   [1, 2, 1, 2]
diff --git a/res/TensorFlowTests/UNIT_Tanh_000/test.pbtxt b/res/TensorFlowTests/UNIT_Tanh_000/test.pbtxt
new file mode 100644
index 000000000..7b3d28527
--- /dev/null
+++ b/res/TensorFlowTests/UNIT_Tanh_000/test.pbtxt
@@ -0,0 +1,40 @@
+node {
+  name: "Placeholder"
+  op: "Placeholder"
+  attr {
+    key: "dtype"
+    value {
+      type: DT_FLOAT
+    }
+  }
+  attr {
+    key: "shape"
+    value {
+      shape {
+        dim {
+          size: 1
+        }
+        dim {
+          size: 2
+        }
+        dim {
+          size: 1
+        }
+        dim {
+          size: 2
+        }
+      }
+    }
+  }
+}
+node {
+  name: "output/tanh"
+  op: "Tanh"
+  input: "Placeholder"
+  attr {
+    key: "T"
+    value {
+      type: DT_FLOAT
+    }
+  }
+}
diff --git a/run b/run
deleted file mode 100755
index fba47aa98..000000000
--- a/run
+++ /dev/null
@@ -1,36 +0,0 @@
-#!/bin/bash
-
-NNFW_SCRIPT_RPATH="scripts"
-NNFW_COMMAND_RPATH="${NNFW_SCRIPT_RPATH}/command"
-
-NNFW_PROJECT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
-NNFW_SCRIPT_PATH="${NNFW_PROJECT_PATH}/${NNFW_SCRIPT_RPATH}"
-
-function Usage()
-{
-  echo "Usage: $0 [COMMAND] ..."
-  echo "Command:"
-  for file in "$NNFW_COMMAND_RPATH"/*;
-  do
-    echo "  $(basename "$file")"
-  done
-}
-
-COMMAND=$1; shift
-
-if [[ -z "${COMMAND}" ]]; then
-  Usage
-  exit 255
-fi
-
-COMMAND_FILE="${NNFW_PROJECT_PATH}/${NNFW_COMMAND_RPATH}/${COMMAND}"
-
-if [[ ! -f "${COMMAND_FILE}" ]]; then
-  echo "ERROR: '${COMMAND}' is not supported"
-  exit 255
-fi
-
-export NNFW_PROJECT_PATH
-export NNFW_SCRIPT_PATH
-
-source "${COMMAND_FILE}" "$@"
diff --git a/runtimes/CMakeLists.txt b/runtimes/CMakeLists.txt
index e8ee9ffc7..2f1a972f3 100644
--- a/runtimes/CMakeLists.txt
+++ b/runtimes/CMakeLists.txt
@@ -8,6 +8,6 @@ if(BUILD_PURE_ARM_COMPUTE)
   add_subdirectory(pure_arm_compute)
 endif()
 
-if(NOT OBS_BUILD)
+if(BUILD_LOGGING)
   add_subdirectory(logging)
-endif(NOT OBS_BUILD)
+endif(BUILD_LOGGING)
diff --git a/runtimes/contrib/CMakeLists.txt b/runtimes/contrib/CMakeLists.txt
new file mode 100644
index 000000000..5ea6cdadd
--- /dev/null
+++ b/runtimes/contrib/CMakeLists.txt
@@ -0,0 +1 @@
+add_subdirectories()
diff --git a/contrib/README.md b/runtimes/contrib/README.md
index 2f8b709eb..2f8b709eb 100644
--- a/contrib/README.md
+++ b/runtimes/contrib/README.md
diff --git a/contrib/TFLiteSharp/README.md b/runtimes/contrib/TFLiteSharp/README.md
index 8e43be618..8e43be618 100644
--- a/contrib/TFLiteSharp/README.md
+++ b/runtimes/contrib/TFLiteSharp/README.md
diff --git a/contrib/TFLiteSharp/TFLiteNative/CMakeLists.txt b/runtimes/contrib/TFLiteSharp/TFLiteNative/CMakeLists.txt
index 8b58aac9c..8b58aac9c 100644
--- a/contrib/TFLiteSharp/TFLiteNative/CMakeLists.txt
+++ b/runtimes/contrib/TFLiteSharp/TFLiteNative/CMakeLists.txt
diff --git a/runtimes/contrib/TFLiteSharp/TFLiteNative/include/tflite_log.h b/runtimes/contrib/TFLiteSharp/TFLiteNative/include/tflite_log.h
new file mode 100644
index 000000000..405ca9879
--- /dev/null
+++ b/runtimes/contrib/TFLiteSharp/TFLiteNative/include/tflite_log.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the License);
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _TFLITE_LOG_H_
+#define _TFLITE_LOG_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif /*__cplusplus*/
+
+#define ERROR 1
+#define WARNING 2
+#define INFO 3
+#define DEBUG 4
+
+#ifdef __TIZEN__
+#include <dlog/dlog.h>
+#ifdef LOG_TAG
+#undef LOG_TAG
+#endif // LOG_TAG
+#define LOG_TAG "TFLITE_NATIVE"
+
+#define TFLITE_NATIVE_LOG(log_level, format, args...) \
+  do                                                  \
+  {                                                   \
+    switch (log_level)                                \
+    {                                                 \
+      case ERROR:                                     \
+        LOGE(format, ##args);                         \
+      case WARNING:                                   \
+        LOGE(format, ##args);                         \
+      default:                                        \
+        LOGI(format, ##args);                         \
+    }                                                 \
+  } while (0)
+#else // __TIZEN__
+#define LEVEL_TO_STR(level)   \
+  (((level) == ERROR)         \
+       ? "ERROR"              \
+       : ((level) == WARNING) \
+             ? "WARNING"      \
+             : ((level) == INFO) ? "INFO" : ((level) == DEBUG) ? "DEBUG" : "DEFAULT")
+#define TFLITE_NATIVE_LOG(log_level, format, args...)      \
+  do                                                       \
+  {                                                        \
+    printf("%s: %s: ", LEVEL_TO_STR(log_level), __FILE__); \
+    printf(format, ##args);                                \
+    printf("\n");                                          \
+  } while (0)
+#endif // __TIZEN__
+
+#ifdef __cplusplus
+}
+#endif /*__cplusplus*/
+
+#endif /*_TFLITE_LOG_H*/
diff --git a/runtimes/contrib/TFLiteSharp/TFLiteNative/include/tflite_nativewrapper.h b/runtimes/contrib/TFLiteSharp/TFLiteNative/include/tflite_nativewrapper.h
new file mode 100644
index 000000000..af1947ff0
--- /dev/null
+++ b/runtimes/contrib/TFLiteSharp/TFLiteNative/include/tflite_nativewrapper.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the License);
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _TFLITE_NATIVEWRAPPER_H_
+#define _TFLITE_NATIVEWRAPPER_H_
+
+#include "tensorflow/lite/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/string_util.h"
+#include "tensorflow/lite/tools/mutable_op_resolver.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif /*__cplusplus*/
+
+typedef enum {
+  /** 32-bit signed integer. */
+  INT32 = 1,
+
+  /** 32-bit single precision floating point. */
+  FLOAT32 = 2,
+
+  /** 8-bit unsigned integer. */
+  UINT8 = 3,
+
+  /** 64-bit signed integer. */
+  INT64 = 4
+} TFLiteNativeType;
+
+void tflite_interpreter_setNumThreads(long *interpreterHandle, int numThreads);
+
+long long tflite_flatbuffermodel_BuildFromFile(char *modelPath);
+
+long long tflite_builder_interpreterBuilder(long *modelHandle);
+
+void *tflite_interpreter_run(long *interpreterHandle, void *values, int inputLength, int dataType);
+
+#ifdef __cplusplus
+}
+#endif /*__cplusplus*/
+
+#endif /*_TFLITE_NATIVEWRAPPER_H_*/
diff --git a/runtimes/contrib/TFLiteSharp/TFLiteNative/src/tflite_nativewrapper.cpp b/runtimes/contrib/TFLiteSharp/TFLiteNative/src/tflite_nativewrapper.cpp
new file mode 100644
index 000000000..0304720f7
--- /dev/null
+++ b/runtimes/contrib/TFLiteSharp/TFLiteNative/src/tflite_nativewrapper.cpp
@@ -0,0 +1,142 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the License);
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <iostream>
+#include "tflite_nativewrapper.h"
+#include "tflite_log.h"
+#include <string.h>
+#include <unistd.h>
+#include <errno.h>
+#include <assert.h>
+
+int getNumBytes(TFLiteNativeType dataType)
+{
+  switch (dataType)
+  {
+    case INT32:
+      return 4;
+    case FLOAT32:
+      return 4;
+    case UINT8:
+      return 1;
+    case INT64:
+      return 8;
+    default:
+      return 1;
+  }
+}
+
+/// <summary>
+/// Set the number of threads available to the interpreter.
+/// </summary>
+/// <param name="interpreterHandle">Handle of the interpreter instance.</param>
+/// <param name="numThreads">Number of threads.</param>
+void tflite_interpreter_setNumThreads(long *interpreterHandle, int numThreads)
+{
+  assert(interpreterHandle != nullptr);
+  tflite::Interpreter *interpreter = reinterpret_cast<tflite::Interpreter *>(*interpreterHandle);
+
+  interpreter->SetNumThreads(numThreads);
+
+  TFLITE_NATIVE_LOG(DEBUG, "Number of threads: %d", numThreads);
+  return;
+}
+
+/// <summary>
+/// Creates a Flat Buffer Model from the given .tflite model.
+/// </summary>
+/// <param name="modelPath">Path of the model.</param>
+long long tflite_flatbuffermodel_BuildFromFile(char *modelPath)
+{
+  if (modelPath == nullptr)
+  {
+    TFLITE_NATIVE_LOG(ERROR, "Invalid parameter");
+    return 0;
+  }
+  TFLITE_NATIVE_LOG(ERROR, "Model Path: %s", modelPath);
+
+  if (access(modelPath, F_OK) == -1)
+  {
+    TFLITE_NATIVE_LOG(ERROR, "Failed to access model [%s]", strerror(errno));
+    return 0;
+  }
+
+  auto model = tflite::FlatBufferModel::BuildFromFile(modelPath);
+
+  TFLITE_NATIVE_LOG(DEBUG, "Successfully loaded model");
+  return reinterpret_cast<long>(model.release());
+}
+
+/// <summary>
+/// Creates an interpreter instance taking the flatbuffer model as input.
+/// </summary>
+/// <param name="modelHandle">Address of the flatbuffer model.</param>
+long long tflite_builder_interpreterBuilder(long *modelHandle)
+{
+  assert(modelHandle != nullptr);
+  tflite::FlatBufferModel *model = reinterpret_cast<tflite::FlatBufferModel *>(*modelHandle);
+
+  tflite::ops::builtin::BuiltinOpResolver resolver;
+  std::unique_ptr<tflite::Interpreter> interpreter;
+
+  TfLiteStatus status = tflite::InterpreterBuilder(*model, resolver)(&interpreter);
+
+  if (status != kTfLiteOk)
+  {
+    TFLITE_NATIVE_LOG(DEBUG, "Cannot create interpreter");
+    return 0;
+  }
+  TFLITE_NATIVE_LOG(DEBUG, "CheckPoint interpreter");
+  return reinterpret_cast<long>(interpreter.release());
+}
+
+/// <summary>
+/// Runs the inference given the inputs.
+/// </summary>
+/// <param name="interpreterHandle">Address of the interpreter instance.</param>
+/// <param name="values">Input values for the model.</param>
+/// <param name="inpLength">Length of the input.</param>
+/// <param name="dataType">Data type key of the input.</param>
+void *tflite_interpreter_run(long *interpreterHandle, void *values, int inputLength, int dataType)
+{
+  assert(interpreterHandle != nullptr);
+  tflite::Interpreter *interpreter = reinterpret_cast<tflite::Interpreter *>(*interpreterHandle);
+
+  int inputTensorIndex = interpreter->inputs()[0];
+
+  // TODO:: input tensor size will be passed as a parameter. It is hardcoded for now.
+  interpreter->ResizeInputTensor(inputTensorIndex, {1, 224, 224, 3});
+
+  if (interpreter->AllocateTensors() != kTfLiteOk)
+  {
+    TFLITE_NATIVE_LOG(ERROR, "Failed to allocate tensors!");
+    return nullptr;
+  }
+
+  float *inputTensorPointer = interpreter->typed_tensor<float>(inputTensorIndex);
+
+  int numBytes = getNumBytes((TFLiteNativeType)dataType);
+
+  memcpy(inputTensorPointer, values, inputLength * numBytes);
+
+  if (interpreter->Invoke() != kTfLiteOk)
+  {
+    TFLITE_NATIVE_LOG(ERROR, "Failed to invoke");
+  }
+
+  float *output = interpreter->typed_output_tensor<float>(0);
+  return output;
+}
diff --git a/contrib/TFLiteSharp/TFLiteNative/tflite-native.pc.in b/runtimes/contrib/TFLiteSharp/TFLiteNative/tflite-native.pc.in
index eec103acc..eec103acc 100644
--- a/contrib/TFLiteSharp/TFLiteNative/tflite-native.pc.in
+++ b/runtimes/contrib/TFLiteSharp/TFLiteNative/tflite-native.pc.in
diff --git a/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp.sln b/runtimes/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp.sln
index 985466cef..985466cef 100644
--- a/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp.sln
+++ b/runtimes/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp.sln
diff --git a/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/Interop/Interop.Libraries.cs b/runtimes/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/Interop/Interop.Libraries.cs
index db8d9f612..db8d9f612 100644
--- a/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/Interop/Interop.Libraries.cs
+++ b/runtimes/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/Interop/Interop.Libraries.cs
diff --git a/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/Interop/Interop.TFLite.cs b/runtimes/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/Interop/Interop.TFLite.cs
index c7c7b24aa..c7c7b24aa 100644
--- a/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/Interop/Interop.TFLite.cs
+++ b/runtimes/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/Interop/Interop.TFLite.cs
diff --git a/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/TFLiteSharp.csproj b/runtimes/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/TFLiteSharp.csproj
index e0490bfb8..e0490bfb8 100644
--- a/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/TFLiteSharp.csproj
+++ b/runtimes/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/TFLiteSharp.csproj
diff --git a/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/src/Datatype.cs b/runtimes/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/src/Datatype.cs
index 404d1663e..404d1663e 100644
--- a/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/src/Datatype.cs
+++ b/runtimes/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/src/Datatype.cs
diff --git a/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/src/Interpreter.cs b/runtimes/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/src/Interpreter.cs
index f1b4a8e07..f1b4a8e07 100644
--- a/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/src/Interpreter.cs
+++ b/runtimes/contrib/TFLiteSharp/TFLiteSharp/TFLiteSharp/src/Interpreter.cs
diff --git a/contrib/TFLiteSharp/TFLiteSharpTest/TFLiteSharpTest.sln b/runtimes/contrib/TFLiteSharp/TFLiteSharpTest/TFLiteSharpTest.sln
index e260a72c7..e260a72c7 100644
--- a/contrib/TFLiteSharp/TFLiteSharpTest/TFLiteSharpTest.sln
+++ b/runtimes/contrib/TFLiteSharp/TFLiteSharpTest/TFLiteSharpTest.sln
diff --git a/contrib/TFLiteSharp/TFLiteSharpTest/TFLiteSharpTest/Program.cs b/runtimes/contrib/TFLiteSharp/TFLiteSharpTest/TFLiteSharpTest/Program.cs
index e559bec36..e559bec36 100644
--- a/contrib/TFLiteSharp/TFLiteSharpTest/TFLiteSharpTest/Program.cs
+++ b/runtimes/contrib/TFLiteSharp/TFLiteSharpTest/TFLiteSharpTest/Program.cs
diff --git a/contrib/TFLiteSharp/TFLiteSharpTest/TFLiteSharpTest/TFLiteSharpTest.csproj b/runtimes/contrib/TFLiteSharp/TFLiteSharpTest/TFLiteSharpTest/TFLiteSharpTest.csproj
index b143ee598..b143ee598 100644
--- a/contrib/TFLiteSharp/TFLiteSharpTest/TFLiteSharpTest/TFLiteSharpTest.csproj
+++ b/runtimes/contrib/TFLiteSharp/TFLiteSharpTest/TFLiteSharpTest/TFLiteSharpTest.csproj
diff --git a/contrib/TFLiteSharp/TFLiteTestApp/TFLiteTestApp.csproj b/runtimes/contrib/TFLiteSharp/TFLiteTestApp/TFLiteTestApp.csproj
index 1c9ed6037..1c9ed6037 100644
--- a/contrib/TFLiteSharp/TFLiteTestApp/TFLiteTestApp.csproj
+++ b/runtimes/contrib/TFLiteSharp/TFLiteTestApp/TFLiteTestApp.csproj
diff --git a/contrib/TFLiteSharp/TFLiteTestApp/TFLiteTestApp_App.cs b/runtimes/contrib/TFLiteSharp/TFLiteTestApp/TFLiteTestApp_App.cs
index 49a08604d..49a08604d 100644
--- a/contrib/TFLiteSharp/TFLiteTestApp/TFLiteTestApp_App.cs
+++ b/runtimes/contrib/TFLiteSharp/TFLiteTestApp/TFLiteTestApp_App.cs
diff --git a/contrib/TFLiteSharp/TFLiteTestApp/TFLiteTestApp_Main.cs b/runtimes/contrib/TFLiteSharp/TFLiteTestApp/TFLiteTestApp_Main.cs
index 2a8f747a4..2a8f747a4 100644
--- a/contrib/TFLiteSharp/TFLiteTestApp/TFLiteTestApp_Main.cs
+++ b/runtimes/contrib/TFLiteSharp/TFLiteTestApp/TFLiteTestApp_Main.cs
diff --git a/runtimes/contrib/TFLiteSharp/TFLiteTestApp/res/mobilenet_v1_1.0_224.tflite b/runtimes/contrib/TFLiteSharp/TFLiteTestApp/res/mobilenet_v1_1.0_224.tflite
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/runtimes/contrib/TFLiteSharp/TFLiteTestApp/res/mobilenet_v1_1.0_224.tflite
diff --git a/runtimes/contrib/TFLiteSharp/TFLiteTestApp/res/mouse1.bmp b/runtimes/contrib/TFLiteSharp/TFLiteTestApp/res/mouse1.bmp
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/runtimes/contrib/TFLiteSharp/TFLiteTestApp/res/mouse1.bmp
diff --git a/runtimes/contrib/TFLiteSharp/TFLiteTestApp/res/mouse_224.bmp b/runtimes/contrib/TFLiteSharp/TFLiteTestApp/res/mouse_224.bmp
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/runtimes/contrib/TFLiteSharp/TFLiteTestApp/res/mouse_224.bmp
diff --git a/runtimes/contrib/TFLiteSharp/TFLiteTestApp/shared/res/TFLiteTestApp.png b/runtimes/contrib/TFLiteSharp/TFLiteTestApp/shared/res/TFLiteTestApp.png
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/runtimes/contrib/TFLiteSharp/TFLiteTestApp/shared/res/TFLiteTestApp.png
diff --git a/contrib/TFLiteSharp/TFLiteTestApp/tizen-manifest.xml b/runtimes/contrib/TFLiteSharp/TFLiteTestApp/tizen-manifest.xml
index 62a8d4c7c..62a8d4c7c 100644
--- a/contrib/TFLiteSharp/TFLiteTestApp/tizen-manifest.xml
+++ b/runtimes/contrib/TFLiteSharp/TFLiteTestApp/tizen-manifest.xml
diff --git a/contrib/TFLiteSharp/packaging/TFLiteSharp.manifest b/runtimes/contrib/TFLiteSharp/packaging/TFLiteSharp.manifest
index 75b0fa5e3..75b0fa5e3 100644
--- a/contrib/TFLiteSharp/packaging/TFLiteSharp.manifest
+++ b/runtimes/contrib/TFLiteSharp/packaging/TFLiteSharp.manifest
diff --git a/contrib/TFLiteSharp/packaging/TFLiteSharp.spec b/runtimes/contrib/TFLiteSharp/packaging/TFLiteSharp.spec
index dcb65a864..dcb65a864 100644
--- a/contrib/TFLiteSharp/packaging/TFLiteSharp.spec
+++ b/runtimes/contrib/TFLiteSharp/packaging/TFLiteSharp.spec
diff --git a/contrib/TFLiteSharp/packaging/tflite-native.manifest b/runtimes/contrib/TFLiteSharp/packaging/tflite-native.manifest
index 75b0fa5e3..75b0fa5e3 100644
--- a/contrib/TFLiteSharp/packaging/tflite-native.manifest
+++ b/runtimes/contrib/TFLiteSharp/packaging/tflite-native.manifest
diff --git a/runtimes/contrib/android_tflite/CMakeLists.txt b/runtimes/contrib/android_tflite/CMakeLists.txt
new file mode 100644
index 000000000..7e8d211cf
--- /dev/null
+++ b/runtimes/contrib/android_tflite/CMakeLists.txt
@@ -0,0 +1,45 @@
+if(NOT BUILD_ANDROID_TFLITE)
+  return()
+endif(NOT BUILD_ANDROID_TFLITE)
+
+nnfw_find_package(TensorFlowLite REQUIRED)
+
+# TODO Set this as system-level global configuration on android build
+if(NOT DEFINED NDK_DIR)
+  file(GLOB NDK_DIRS "${CMAKE_SOURCE_DIR}/tools/cross/ndk/*")
+  list(LENGTH NDK_DIRS NDK_DIRS_COUNT)
+  if (NDK_DIRS_COUNT EQUAL 1)
+    set(NDK_DIR "${NDK_DIRS}")
+  endif(NDK_DIRS_COUNT EQUAL 1)
+endif(NOT DEFINED NDK_DIR)
+
+if(NOT DEFINED NDK_DIR)
+  message(FATAL_ERROR "NDK_DIR should be specified via environment variable")
+endif()
+message(STATUS "Found NDK: ${NDK_DIR}")
+target_include_directories(tensorflow-lite SYSTEM PUBLIC "${NDK_DIR}")
+target_link_libraries(tensorflow-lite log)
+
+#
+# Tensorflow Lite JNI library
+#
+set(TFLITE_JNI_BASE ${TENSORFLOW_LITE_BASE}/java/src/main/native)
+set(TFLITE_JNI_SRCS ${TFLITE_JNI_BASE}/duration_utils_jni.cc
+                    ${TFLITE_JNI_BASE}/exception_jni.cc
+                    ${TFLITE_JNI_BASE}/nativeinterpreterwrapper_jni.cc
+                    ${TFLITE_JNI_BASE}/tensor_jni.cc
+                    ${TFLITE_JNI_BASE}/tensorflow_lite_jni.cc
+                    ${TFLITE_JNI_BASE}/builtin_ops_jni.cc
+                    )
+set(TFLITE_JNI_INCLUDES ${TENSORFLOW_LITE_BASE}/java/src/native)
+
+# We need this for running vanilla tflite
+# TODO remove this when nnfw is used
+set(TFLITE_SRCS_V ${TENSORFLOW_LITE_BASE}/kernels/register.cc)
+
+# TODO use tensorflow-lite static library instead of compiling all the sources again
+add_library(tensorflowlite_jni SHARED ${TFLITE_JNI_SRCS} ${TFLITE_SRCS} ${TFLITE_SRCS_V})
+target_include_directories(tensorflowlite_jni PUBLIC ${TFLITE_JNI_INCLUDES} ${TFLITE_INCLUDES})
+target_link_libraries(tensorflowlite_jni eigen ${LIB_PTHREAD} dl)
+target_link_libraries(tensorflowlite_jni log)
+install(TARGETS tensorflowlite_jni DESTINATION lib)
diff --git a/runtimes/contrib/benchmark_acl/.FORMATDENY b/runtimes/contrib/benchmark_acl/.FORMATDENY
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/runtimes/contrib/benchmark_acl/.FORMATDENY
diff --git a/contrib/benchmark_acl/CMakeLists.txt b/runtimes/contrib/benchmark_acl/CMakeLists.txt
index b5fa3e529..b5fa3e529 100644
--- a/contrib/benchmark_acl/CMakeLists.txt
+++ b/runtimes/contrib/benchmark_acl/CMakeLists.txt
diff --git a/runtimes/contrib/benchmark_acl/src/Benchmark.cpp b/runtimes/contrib/benchmark_acl/src/Benchmark.cpp
new file mode 100644
index 000000000..4a761ec76
--- /dev/null
+++ b/runtimes/contrib/benchmark_acl/src/Benchmark.cpp
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "Benchmark.h"
+
+#include <cstdlib>
+
+Count::Count() : _value(1)
+{
+  auto env = std::getenv("COUNT");
+
+  if (env)
+  {
+    _value = std::strtol(env, NULL, 0);
+  }
+}
+
+uint32_t Count::value(void) const { return _value; }
+
+#include <boost/accumulators/accumulators.hpp>
+#include <boost/accumulators/statistics/stats.hpp>
+#include <boost/accumulators/statistics/mean.hpp>
+
+#include <iostream>
+#include <chrono>
+
+using namespace boost::accumulators;
+
+void run_benchmark(arm_compute::graph::frontend::Stream &graph)
+{
+  // NOTE Here the number of warming-up iterations is hardcoded
+  // TODO Decide the number of warming-up iterations appropriately
+  for (uint32_t n = 0; n < 3; ++n)
+  {
+    auto beg = std::chrono::steady_clock::now();
+    graph.run();
+    auto end = std::chrono::steady_clock::now();
+    auto elapsed = std::chrono::duration_cast<std::chrono::milliseconds>(end - beg);
+
+    std::cout << "Warming-up " << n << ": " << elapsed.count() << "ms" << std::endl;
+  }
+
+  accumulator_set<double, stats<tag::mean>> acc;
+
+  const Count count;
+
+  for (uint32_t n = 0; n < count.value(); ++n)
+  {
+    auto beg = std::chrono::steady_clock::now();
+    graph.run();
+    auto end = std::chrono::steady_clock::now();
+    auto elapsed = std::chrono::duration_cast<std::chrono::milliseconds>(end - beg);
+
+    std::cout << "Iteration " << n << ": " << elapsed.count() << "ms" << std::endl;
+
+    acc(elapsed.count());
+  }
+
+  std::cout << "--------" << std::endl;
+  std::cout << "Mean: " << mean(acc) << "ms" << std::endl;
+}
diff --git a/contrib/benchmark_acl/src/Benchmark.h b/runtimes/contrib/benchmark_acl/src/Benchmark.h
index 200f40952..200f40952 100644
--- a/contrib/benchmark_acl/src/Benchmark.h
+++ b/runtimes/contrib/benchmark_acl/src/Benchmark.h
diff --git a/contrib/benchmark_acl/src/benchmark_googlenet.cpp b/runtimes/contrib/benchmark_acl/src/benchmark_googlenet.cpp
index 8b0fbfdac..8b0fbfdac 100644
--- a/contrib/benchmark_acl/src/benchmark_googlenet.cpp
+++ b/runtimes/contrib/benchmark_acl/src/benchmark_googlenet.cpp
diff --git a/contrib/benchmark_acl/src/benchmark_inception_v3.cpp b/runtimes/contrib/benchmark_acl/src/benchmark_inception_v3.cpp
index 382851f50..382851f50 100644
--- a/contrib/benchmark_acl/src/benchmark_inception_v3.cpp
+++ b/runtimes/contrib/benchmark_acl/src/benchmark_inception_v3.cpp
diff --git a/contrib/benchmark_acl/src/benchmark_mobilenet.cpp b/runtimes/contrib/benchmark_acl/src/benchmark_mobilenet.cpp
index 085be184e..085be184e 100644
--- a/contrib/benchmark_acl/src/benchmark_mobilenet.cpp
+++ b/runtimes/contrib/benchmark_acl/src/benchmark_mobilenet.cpp
diff --git a/runtimes/contrib/custom_op/README.md b/runtimes/contrib/custom_op/README.md
new file mode 100644
index 000000000..7815ce9d5
--- /dev/null
+++ b/runtimes/contrib/custom_op/README.md
@@ -0,0 +1,25 @@
+This document is about custom operators.
+
+# Introduction
+
+# Requirements
+
+- [ ] Support tizen in-house custom op developer
+- [ ] Minimiz exposed headers (structures and functions)
+- [ ] Provide acceptable performance
+
+# Design
+
+## Design
+
+### Workflow
+
+![](customOp-workflow.png)
+
+## Candidate Architecture 1
+
+## Candidate Architecture 2
+
+## Discussion
+
+# Conclusion
diff --git a/runtimes/contrib/custom_op/customOp-workflow.png b/runtimes/contrib/custom_op/customOp-workflow.png
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/runtimes/contrib/custom_op/customOp-workflow.png
diff --git a/contrib/detection/CMakeLists.txt b/runtimes/contrib/detection/CMakeLists.txt
index 37d91b527..37d91b527 100644
--- a/contrib/detection/CMakeLists.txt
+++ b/runtimes/contrib/detection/CMakeLists.txt
diff --git a/runtimes/contrib/detection/detection.cpp b/runtimes/contrib/detection/detection.cpp
new file mode 100644
index 000000000..8fe78ca57
--- /dev/null
+++ b/runtimes/contrib/detection/detection.cpp
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <tensorflow/core/public/session.h>
+
+#include <iostream>
+#include <stdexcept>
+
+#include <cassert>
+#include <cstring>
+
+#include "misc/benchmark.h"
+
+#define CHECK_TF(e)                                \
+  {                                                \
+    if (!(e).ok())                                 \
+    {                                              \
+      throw std::runtime_error{"'" #e "' FAILED"}; \
+    }                                              \
+  }
+
+int main(int argc, char **argv)
+{
+  if (argc < 2)
+  {
+    std::cerr << "USAGE: " << argv[0] << " [T/F model path] [output 0] [output 1] ..." << std::endl;
+    return 255;
+  }
+
+  std::vector<std::string> output_nodes;
+
+  for (int argn = 2; argn < argc; ++argn)
+  {
+    output_nodes.emplace_back(argv[argn]);
+  }
+
+  tensorflow::Session *sess;
+
+  CHECK_TF(tensorflow::NewSession(tensorflow::SessionOptions(), &sess));
+
+  tensorflow::GraphDef graph_def;
+
+  CHECK_TF(ReadBinaryProto(tensorflow::Env::Default(), argv[1], &graph_def));
+  CHECK_TF(sess->Create(graph_def));
+
+  tensorflow::Tensor input(tensorflow::DT_FLOAT, tensorflow::TensorShape({1, 320, 320, 3}));
+  std::vector<tensorflow::Tensor> outputs;
+
+  for (uint32_t n = 0; n < 5; ++n)
+  {
+    std::chrono::milliseconds elapsed(0);
+
+    nnfw::misc::benchmark::measure(elapsed) << [&](void) {
+      CHECK_TF(sess->Run({{"input_node", input}}, output_nodes, {}, &outputs));
+    };
+
+    std::cout << "Takes " << elapsed.count() << "ms" << std::endl;
+  }
+
+  return 0;
+}
diff --git a/contrib/labs/CMakeLists.txt b/runtimes/contrib/labs/CMakeLists.txt
index 57e28c11a..57e28c11a 100644
--- a/contrib/labs/CMakeLists.txt
+++ b/runtimes/contrib/labs/CMakeLists.txt
diff --git a/contrib/labs/jniacl/CMakeLists.txt b/runtimes/contrib/labs/jniacl/CMakeLists.txt
index f66127b84..f66127b84 100644
--- a/contrib/labs/jniacl/CMakeLists.txt
+++ b/runtimes/contrib/labs/jniacl/CMakeLists.txt
diff --git a/runtimes/contrib/labs/jniacl/src/io_accessor.cc b/runtimes/contrib/labs/jniacl/src/io_accessor.cc
new file mode 100644
index 000000000..076c93f3d
--- /dev/null
+++ b/runtimes/contrib/labs/jniacl/src/io_accessor.cc
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/*
+ * Copyright (c) 2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "io_accessor.h"
+#include <ostream>
+#include <android/log.h>
+
+bool InputAccessor::access_tensor(arm_compute::ITensor &tensor)
+{
+  // Subtract the mean value from each channel
+  arm_compute::Window window;
+  window.use_tensor_dimensions(tensor.info()->tensor_shape());
+
+  execute_window_loop(window, [&](const arm_compute::Coordinates &id) {
+    *reinterpret_cast<float *>(tensor.ptr_to_element(id)) = _test_input;
+    _test_input += _inc ? 1.0 : 0.0;
+
+    __android_log_print(ANDROID_LOG_DEBUG, "LOG_TAG", "Input %d, %d = %lf\r\n", id.y(), id.x(),
+                        *reinterpret_cast<float *>(tensor.ptr_to_element(id)));
+  });
+  return true;
+}
+
+bool OutputAccessor::access_tensor(arm_compute::ITensor &tensor)
+{
+  // Subtract the mean value from each channel
+  arm_compute::Window window;
+  window.use_tensor_dimensions(tensor.info()->tensor_shape());
+
+  execute_window_loop(window, [&](const arm_compute::Coordinates &id) {
+    __android_log_print(ANDROID_LOG_DEBUG, "Output", "Input %d, %d = %lf\r\n", id.y(), id.x(),
+                        *reinterpret_cast<float *>(tensor.ptr_to_element(id)));
+  });
+  return false; // end the network
+}
+
+bool WeightAccessor::access_tensor(arm_compute::ITensor &tensor)
+{
+  // Subtract the mean value from each channel
+  arm_compute::Window window;
+  window.use_tensor_dimensions(tensor.info()->tensor_shape());
+
+  execute_window_loop(window, [&](const arm_compute::Coordinates &id) {
+    *reinterpret_cast<float *>(tensor.ptr_to_element(id)) = _test_weight;
+    _test_weight += _inc ? 1.0 : 0.0;
+  });
+  return true;
+}
+
+bool BiasAccessor::access_tensor(arm_compute::ITensor &tensor)
+{
+  // Subtract the mean value from each channel
+  arm_compute::Window window;
+  window.use_tensor_dimensions(tensor.info()->tensor_shape());
+
+  execute_window_loop(window, [&](const arm_compute::Coordinates &id) {
+    *reinterpret_cast<float *>(tensor.ptr_to_element(id)) = 0.0;
+  });
+  return true;
+}
diff --git a/runtimes/contrib/labs/jniacl/src/io_accessor.h b/runtimes/contrib/labs/jniacl/src/io_accessor.h
new file mode 100644
index 000000000..bc4376644
--- /dev/null
+++ b/runtimes/contrib/labs/jniacl/src/io_accessor.h
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/*
+ * Copyright (c) 2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __IO_ACCESSOR_H__
+#define __IO_ACCESSOR_H__
+
+#include <arm_compute/graph/ITensorAccessor.h>
+
+class InputAccessor : public arm_compute::graph::ITensorAccessor
+{
+public:
+  InputAccessor(bool inc) : _inc(inc) { _test_input = 1.0; }
+  InputAccessor(InputAccessor &&) = default;
+
+  // Inherited methods overriden:
+  bool access_tensor(arm_compute::ITensor &tensor) override;
+
+private:
+  bool _inc;
+  float _test_input;
+};
+
+class OutputAccessor : public arm_compute::graph::ITensorAccessor
+{
+public:
+  OutputAccessor() = default;
+  OutputAccessor(OutputAccessor &&) = default;
+
+  // Inherited methods overriden:
+  bool access_tensor(arm_compute::ITensor &tensor) override;
+};
+
+class WeightAccessor : public arm_compute::graph::ITensorAccessor
+{
+public:
+  WeightAccessor(bool inc) : _inc(inc) { _test_weight = 1.0; }
+  WeightAccessor(WeightAccessor &&) = default;
+
+  // Inherited methods overriden:
+  bool access_tensor(arm_compute::ITensor &tensor) override;
+
+private:
+  bool _inc;
+  float _test_weight;
+};
+
+class BiasAccessor : public arm_compute::graph::ITensorAccessor
+{
+public:
+  BiasAccessor() = default;
+  BiasAccessor(BiasAccessor &&) = default;
+
+  // Inherited methods overriden:
+  bool access_tensor(arm_compute::ITensor &tensor) override;
+};
+
+#endif // __IO_ACCESSOR_H__
diff --git a/runtimes/contrib/labs/jniacl/src/jniacl_main.cc b/runtimes/contrib/labs/jniacl/src/jniacl_main.cc
new file mode 100644
index 000000000..4e5f10d1f
--- /dev/null
+++ b/runtimes/contrib/labs/jniacl/src/jniacl_main.cc
@@ -0,0 +1,37 @@
+#include <jni.h>
+#include <string>
+
+#include <arm_compute/graph/Graph.h>
+#include <arm_compute/graph/Nodes.h>
+
+#include "io_accessor.h"
+
+extern "C" JNIEXPORT jstring JNICALL
+Java_com_samsung_testaclexec_ActivityMain_RunACLJNI(JNIEnv *env, jobject)
+{
+  using arm_compute::DataType;
+  using arm_compute::graph::Tensor;
+  using arm_compute::graph::TargetHint;
+  using arm_compute::graph::Graph;
+  using arm_compute::TensorInfo;
+  using arm_compute::TensorShape;
+
+  arm_compute::graph::Graph graph;
+  TargetHint target_hint = TargetHint::OPENCL;
+  bool autoinc = true;
+
+  graph << target_hint << Tensor(TensorInfo(TensorShape(3U, 3U, 1U, 1U), 1, DataType::F32),
+                                 std::unique_ptr<InputAccessor>(new InputAccessor(autoinc)))
+        << arm_compute::graph::ConvolutionLayer(
+               3U, 3U, 1U, std::unique_ptr<WeightAccessor>(new WeightAccessor(autoinc)),
+               std::unique_ptr<BiasAccessor>(new BiasAccessor()),
+               arm_compute::PadStrideInfo(1, 1, 0, 0))
+        << Tensor(std::unique_ptr<OutputAccessor>(new OutputAccessor()));
+  ;
+
+  graph.run();
+
+  std::string hello = "SoftMax Run OK";
+
+  return env->NewStringUTF(hello.c_str());
+}
diff --git a/runtimes/contrib/labs/opencl_test/CMakeLists.txt b/runtimes/contrib/labs/opencl_test/CMakeLists.txt
new file mode 100644
index 000000000..dc8f5f661
--- /dev/null
+++ b/runtimes/contrib/labs/opencl_test/CMakeLists.txt
@@ -0,0 +1,11 @@
+if(NOT ${TARGET_ARCH_BASE} STREQUAL "arm")
+  return()
+endif(NOT ${TARGET_ARCH_BASE} STREQUAL "arm")
+
+list(APPEND OPENCL_INFO_SOURCE "src/opencl_test.cc")
+
+nnfw_find_package(ARMCompute REQUIRED)
+
+add_executable(opencl_test ${OPENCL_INFO_SOURCE})
+target_link_libraries(opencl_test arm_compute)
+target_link_libraries(opencl_test arm_compute_ex)
diff --git a/contrib/labs/opencl_test/README.md b/runtimes/contrib/labs/opencl_test/README.md
index 950528f81..950528f81 100644
--- a/contrib/labs/opencl_test/README.md
+++ b/runtimes/contrib/labs/opencl_test/README.md
diff --git a/runtimes/contrib/labs/opencl_test/src/opencl_test.cc b/runtimes/contrib/labs/opencl_test/src/opencl_test.cc
new file mode 100644
index 000000000..1faa91478
--- /dev/null
+++ b/runtimes/contrib/labs/opencl_test/src/opencl_test.cc
@@ -0,0 +1,386 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/*******************************************************************************
+ * Copyright (c) 2008-2015 The Khronos Group Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and/or associated documentation files (the
+ * "Materials"), to deal in the Materials without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Materials, and to
+ * permit persons to whom the Materials are furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Materials.
+ *
+ * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
+ ******************************************************************************/
+
+#include "arm_compute/core/CL/OpenCL.h"
+
+#include <iostream>
+#include <vector>
+
+void printDeviceInfo(int n, cl::Device &device, cl::Device &default_device)
+{
+  bool is_default = (device() == default_device());
+  std::cout << "\t\t\t#" << n << " Device: (id: " << device() << ") "
+            << (is_default ? " -> default" : "") << "\n";
+
+  const auto name = device.getInfo<CL_DEVICE_NAME>();
+  std::cout << "\t\t\t\tName: " << name << "\n";
+
+  const auto compute_unit = device.getInfo<CL_DEVICE_MAX_COMPUTE_UNITS>();
+  std::cout << "\t\t\t\tMax Compute Unit: " << compute_unit << "\n";
+
+  const auto max_work_item_size = device.getInfo<CL_DEVICE_MAX_WORK_ITEM_SIZES>();
+  std::cout << "\t\t\t\tMax Work Item Size: [";
+  for (auto size : max_work_item_size)
+    std::cout << size << ",";
+  std::cout << "]\n";
+
+  const auto max_work_group_size = device.getInfo<CL_DEVICE_MAX_WORK_GROUP_SIZE>();
+  std::cout << "\t\t\t\tMax Work Grpup Size: " << max_work_group_size << "\n";
+
+  const auto max_clock_frequency = device.getInfo<CL_DEVICE_MAX_CLOCK_FREQUENCY>();
+  std::cout << "\t\t\t\tMax Clock Frequency: " << max_clock_frequency << "\n";
+
+  std::cout << "\n";
+}
+
+class OpenCLGpu
+{
+public:
+  cl::Platform platform_;
+  cl::Context context_;
+  cl::vector<cl::Device> devices_;
+  std::vector<cl::CommandQueue *> q_;
+  cl::Program program_;
+
+  OpenCLGpu()
+  {
+    cl_int cl_error;
+
+    platform_ = cl::Platform::getDefault();
+
+    try
+    {
+      cl_context_properties properties[3] = {CL_CONTEXT_PLATFORM,
+                                             (cl_context_properties)platform_(), 0};
+
+      context_ = cl::Context(CL_DEVICE_TYPE_GPU, properties, NULL, NULL, &cl_error);
+    }
+    catch (cl::Error &err) // thrown when there is no Context for this platform
+    {
+      std::cout << "\t\t No Context Found\n";
+      return;
+    }
+
+    devices_ = context_.getInfo<CL_CONTEXT_DEVICES>();
+
+    for (int dev_id = 0; dev_id < devices_.size(); dev_id++)
+    {
+      cl::CommandQueue *que = new cl::CommandQueue(context_, devices_[dev_id]);
+      q_.emplace_back(que);
+    }
+  }
+
+  ~OpenCLGpu()
+  {
+    for (auto each_q : q_)
+      delete each_q;
+  }
+
+  void buildProgram(std::string &kernel_source_code)
+  {
+    std::vector<std::string> programStrings{kernel_source_code};
+
+    program_ = cl::Program(context_, programStrings);
+
+    try
+    {
+      program_.build("-cl-std=CL1.2");
+    }
+    catch (cl::Error &err)
+    {
+      cl_int buildErr = CL_SUCCESS;
+      auto buildInfo = program_.getBuildInfo<CL_PROGRAM_BUILD_LOG>(&buildErr);
+      for (auto &pair : buildInfo)
+      {
+        std::cerr << pair.second << std::endl << std::endl;
+      }
+    }
+  }
+};
+
+void checkContextMem()
+{
+  cl_int cl_error;
+
+  // get context, devices
+  //
+  std::cout << "\nChecking if devices in GPU shares the same memory address:\n\n";
+
+  OpenCLGpu gpu;
+
+  std::cout << "\nDevices in GPU:\n\n";
+
+  auto &devices = gpu.devices_;
+  auto default_device = cl::Device::getDefault();
+
+  int d = 0;
+  for (auto device : devices)
+    printDeviceInfo(++d, device, default_device);
+
+  if (d < 2)
+  {
+    std::cout << "\t\t This options works when there are n (>= 2) devices.\n";
+    return;
+  }
+
+  // allocate and map memory
+
+  typedef cl_int T;
+  const int items_per_device = 128;
+  const int length = items_per_device * devices.size();
+
+  std::vector<T> input(length);
+  std::vector<T> output(length, 0);
+
+  for (int i = 0; i < length; i++)
+    input[i] = i;
+
+  cl::Buffer input_buf(gpu.context_, (cl_mem_flags)CL_MEM_USE_HOST_PTR, length * sizeof(T),
+                       input.data(), &cl_error);
+  cl::Buffer output_buf(gpu.context_, (cl_mem_flags)CL_MEM_USE_HOST_PTR, length * sizeof(T),
+                        output.data(), &cl_error);
+
+  // compile test cl code
+
+  std::string kernel_source{"typedef int T;                                                 \n"
+                            "kernel void memory_test(                                       \n"
+                            "   const int dev_id,                                           \n"
+                            "   global T* input,                                            \n"
+                            "   global T* output,                                           \n"
+                            "   const int start_idx,                                        \n"
+                            "   const int count)                                            \n"
+                            "{                                                              \n"
+                            "   int input_idx = get_global_id(0);                           \n"
+                            "   if(input_idx < count)                                       \n"
+                            "   {                                                           \n"
+                            "       int output_idx = start_idx + input_idx;                 \n"
+                            "       output[output_idx] = input[input_idx] + dev_id;         \n"
+                            "   }                                                           \n"
+                            "}                                                              \n"};
+
+  gpu.buildProgram(kernel_source);
+
+  try
+  {
+    auto kernel_functor = cl::KernelFunctor<cl_int, cl::Buffer, cl::Buffer, cl_int, cl_int>(
+        gpu.program_, "memory_test"); // name should be same as cl function name
+
+    // create a queue per device and queue a kernel job
+
+    for (int dev_id = 0; dev_id < devices.size(); dev_id++)
+    {
+      kernel_functor(cl::EnqueueArgs(*(gpu.q_[dev_id]), cl::NDRange(items_per_device)),
+                     (cl_int)dev_id, // dev id
+                     input_buf, output_buf,
+                     (cl_int)(items_per_device * dev_id), // start index
+                     (cl_int)(items_per_device),          // count
+                     cl_error);
+    }
+
+    // sync
+
+    for (d = 0; d < devices.size(); d++)
+      (gpu.q_[d])->finish();
+
+    // check if memory state changed by all devices
+
+    cl::copy(*(gpu.q_[0]), output_buf, begin(output), end(output));
+
+    bool use_same_memory = true;
+
+    for (int dev_id = 0; dev_id < devices.size(); dev_id++)
+    {
+      for (int i = 0; i < items_per_device; ++i)
+      {
+        int output_idx = items_per_device * dev_id + i;
+        if (output[output_idx] != input[i] + dev_id)
+        {
+          std::cout << "Output[" << output_idx << "] : "
+                    << "expected = " << input[i] + dev_id << "; actual = " << output[output_idx]
+                    << "\n";
+          use_same_memory = false;
+          break;
+        }
+      }
+    }
+
+    if (use_same_memory)
+      std::cout << "\n=> Mapped memory addresses used by devices in GPU are same.\n\n";
+    else
+      std::cout << "\n=> Mapped memory addresses used by devices in GPU are different.\n\n";
+  }
+  catch (cl::Error &err)
+  {
+    std::cerr << "error: code: " << err.err() << ", what: " << err.what() << std::endl;
+  }
+}
+
+void printHelp()
+{
+  std::cout << "opencl information: \n\n";
+  std::cout << "\t -h : help\n";
+  std::cout
+      << "\t -g : print if memory map is shared among devices in GPU (in default platform)\n\n";
+  std::cout << "\t -s : test for synchronized work by two devices in a GPU\n\n";
+}
+
+#include <mutex>
+#include <chrono>
+#include <thread>
+#include <condition_variable>
+
+#define MAX_DEVICE_NUM 8 // just for testing
+
+int kernel_idx[MAX_DEVICE_NUM];
+unsigned char kernel_completed = 0x00; // bit 0 = 1 means kernel by device[0] was completed.
+unsigned char
+    kernel_completed_flag; // if comparing kernel_completed with this var, all kernels are completed
+int device_num;
+std::mutex kernel_complete_handler_mutex;
+
+std::condition_variable wakeup_main;
+std::mutex wakeup_main_mutex;
+
+void notifyKernelFinished(cl_event ev, cl_int ev_info, void *device_idx)
+{
+  std::cout << "callback from device[" << *((int *)device_idx) << "] : ==> completed.\n";
+
+  std::unique_lock<std::mutex> lock(kernel_complete_handler_mutex);
+
+  kernel_completed |= 0x01 << *((int *)device_idx);
+  if (kernel_completed == kernel_completed_flag)
+    wakeup_main.notify_one();
+}
+
+void testSync()
+{
+  OpenCLGpu gpu;
+
+  cl_int cl_error;
+  typedef cl_int T;
+  const int items_per_device = 1024 * 768;
+  const int length = items_per_device * gpu.devices_.size();
+
+  std::vector<T> output(length, 0);
+
+  cl::Buffer output_buf(gpu.context_, (cl_mem_flags)CL_MEM_USE_HOST_PTR, length * sizeof(T),
+                        output.data(), &cl_error);
+
+  std::string kernel_source{"kernel void test(global float* output, const int count)  \n"
+                            "{                                                        \n"
+                            "   int idx = get_global_id(0);                           \n"
+                            "   if(idx < count)                                       \n"
+                            "   {                                                     \n"
+                            "       float x = hypot(idx/1.111, idx*1.111);            \n"
+                            "       for (int y = 0; y < 200; y++)                     \n"
+                            "         x = rootn(log(pown(rootn(log(pown(x, 20)), 5), 20)), 5);  \n"
+                            "       output[idx] = x;                                  \n"
+                            "   }                                                     \n"
+                            "}                                                        \n"};
+
+  gpu.buildProgram(kernel_source);
+
+  try
+  {
+    auto kernel_functor = cl::KernelFunctor<cl::Buffer, cl_int>(
+        gpu.program_, "test"); // name should be same as cl function name
+
+    // variable init
+    cl::Event ev[MAX_DEVICE_NUM];
+
+    device_num = gpu.devices_.size();
+
+    kernel_completed = 0;
+    kernel_completed_flag = 0;
+    for (int i = 0; i < device_num; i++)
+    {
+      kernel_idx[i] = i;
+      kernel_completed_flag |= 0x01 << i;
+    }
+
+    // create a queue per device and queue a kernel job
+    // queueing with callback function
+    for (int dev_id = 0; dev_id < gpu.devices_.size(); dev_id++)
+    {
+      ev[dev_id] = kernel_functor(cl::EnqueueArgs(*(gpu.q_[dev_id]), cl::NDRange(items_per_device)),
+                                  output_buf,
+                                  (cl_int)(items_per_device), // count
+                                  cl_error);
+      ev[dev_id].setCallback(CL_COMPLETE, notifyKernelFinished, (void *)(kernel_idx + dev_id));
+
+      // how to check kernel execution status
+      //
+      // auto status  = ev[dev_id].getInfo<CL_EVENT_COMMAND_EXECUTION_STATUS>();
+      // std::cout << "Event status = " << (status == CL_QUEUED ? "CL_QUEUED" : status ==
+      // CL_SUBMITTED ? "CL_SUBMITTED" : status == CL_COMPLETE ? "CL_COMPLETE" : "unknown")
+      //           << std::endl;
+      // std::cout << "Event status code = " << status << std::endl;
+    }
+
+    // long wait until kernels are over
+    {
+      std::unique_lock<std::mutex> lk(wakeup_main_mutex);
+      wakeup_main.wait(lk, [] { return (kernel_completed == kernel_completed_flag); });
+
+      std::cout << "all devices were completed.\n";
+    }
+  }
+  catch (cl::Error &err)
+  {
+    std::cerr << "error: code: " << err.err() << ", what: " << err.what() << std::endl;
+  }
+}
+
+int main(const int argc, char **argv)
+{
+  if (argc < 2)
+    printHelp();
+  else
+  {
+    std::string option = argv[1];
+
+    if (option == "-h") // help
+      printHelp();
+    else if (option == "-g") // check if devices in GPU uses same memory address
+      checkContextMem();
+    else if (option == "-s") // check synchronization between devices in GPU
+      testSync();
+  }
+  return 0;
+}
diff --git a/contrib/labs/tflite_examples/CMakeLists.txt b/runtimes/contrib/labs/tflite_examples/CMakeLists.txt
index 463bc5531..463bc5531 100644
--- a/contrib/labs/tflite_examples/CMakeLists.txt
+++ b/runtimes/contrib/labs/tflite_examples/CMakeLists.txt
diff --git a/runtimes/contrib/labs/tflite_examples/src/conv.cpp b/runtimes/contrib/labs/tflite_examples/src/conv.cpp
new file mode 100644
index 000000000..3117c316c
--- /dev/null
+++ b/runtimes/contrib/labs/tflite_examples/src/conv.cpp
@@ -0,0 +1,330 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
+
+#include <iostream>
+
+using namespace tflite;
+using namespace nnfw::tflite;
+
+namespace vector
+{
+
+template <typename T> struct View
+{
+  virtual ~View() = default;
+
+  virtual int32_t size(void) const = 0;
+  virtual T at(uint32_t off) const = 0;
+};
+}
+
+namespace feature
+{
+
+struct Shape
+{
+  int32_t C;
+  int32_t H;
+  int32_t W;
+};
+
+template <typename T> struct View
+{
+  virtual ~View() = default;
+
+  virtual const Shape &shape(void) const = 0;
+  virtual T at(uint32_t ch, uint32_t row, uint32_t col) const = 0;
+};
+}
+
+namespace kernel
+{
+
+struct Shape
+{
+  int32_t N;
+  int32_t C;
+  int32_t H;
+  int32_t W;
+};
+
+template <typename T> struct View
+{
+  virtual ~View() = default;
+
+  virtual const Shape &shape(void) const = 0;
+  virtual T at(uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) const = 0;
+};
+}
+
+const int32_t N = 1;
+const int32_t C = 2;
+
+class SampleBiasObject final : public vector::View<float>
+{
+public:
+  SampleBiasObject() : _size(N)
+  {
+    // DO NOTHING
+  }
+
+public:
+  int32_t size(void) const override { return _size; }
+
+  float at(uint32_t off) const override { return 0.0f; }
+
+private:
+  int32_t _size;
+};
+
+class SampleFeatureObject final : public feature::View<float>
+{
+public:
+  SampleFeatureObject()
+  {
+    _shape.C = C;
+    _shape.H = 3;
+    _shape.W = 4;
+
+    const uint32_t size = _shape.C * _shape.H * _shape.W;
+
+    for (uint32_t off = 0; off < size; ++off)
+    {
+      _value.emplace_back(off);
+    }
+
+    assert(_value.size() == size);
+  }
+
+public:
+  const feature::Shape &shape(void) const override { return _shape; };
+
+  float at(uint32_t ch, uint32_t row, uint32_t col) const override
+  {
+    return _value.at(ch * _shape.H * _shape.W + row * _shape.W + col);
+  }
+
+public:
+  float &at(uint32_t ch, uint32_t row, uint32_t col)
+  {
+    return _value.at(ch * _shape.H * _shape.W + row * _shape.W + col);
+  }
+
+private:
+  feature::Shape _shape;
+  std::vector<float> _value;
+};
+
+class SampleKernelObject final : public kernel::View<float>
+{
+public:
+  SampleKernelObject()
+  {
+    _shape.N = N;
+    _shape.C = C;
+    _shape.H = 3;
+    _shape.W = 4;
+
+    const uint32_t size = _shape.N * _shape.C * _shape.H * _shape.W;
+
+    for (uint32_t off = 0; off < size; ++off)
+    {
+      _value.emplace_back(off);
+    }
+
+    assert(_value.size() == size);
+  }
+
+public:
+  const kernel::Shape &shape(void) const override { return _shape; };
+
+  float at(uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) const override
+  {
+    return _value.at(nth * _shape.C * _shape.H * _shape.W + ch * _shape.H * _shape.W +
+                     row * _shape.W + col);
+  }
+
+private:
+  kernel::Shape _shape;
+  std::vector<float> _value;
+};
+
+int main(int argc, char **argv)
+{
+  const SampleFeatureObject ifm;
+  const SampleKernelObject kernel;
+  const SampleBiasObject bias;
+
+  const int32_t IFM_C = ifm.shape().C;
+  const int32_t IFM_H = ifm.shape().H;
+  const int32_t IFM_W = ifm.shape().W;
+
+  const int32_t KER_N = kernel.shape().N;
+  const int32_t KER_C = kernel.shape().C;
+  const int32_t KER_H = kernel.shape().H;
+  const int32_t KER_W = kernel.shape().W;
+
+  const int32_t OFM_C = kernel.shape().N;
+  const int32_t OFM_H = (IFM_H - KER_H) + 1;
+  const int32_t OFM_W = (IFM_W - KER_W) + 1;
+
+  // Assumption on this example
+  assert(IFM_C == KER_C);
+  assert(KER_N == bias.size());
+
+  // Comment from 'context.h'
+  //
+  // Parameters for asymmetric quantization. Quantized values can be converted
+  // back to float using:
+  //    real_value = scale * (quantized_value - zero_point);
+  //
+  // Q: Is this necessary?
+  TfLiteQuantizationParams quantization;
+
+  quantization.scale = 1;
+  quantization.zero_point = 0;
+
+  Interpreter interp;
+
+  // On AddTensors(N) call, T/F Lite interpreter creates N tensors whose index is [0 ~ N)
+  interp.AddTensors(5);
+
+  // Configure OFM
+  interp.SetTensorParametersReadWrite(0, kTfLiteFloat32 /* type */, "output" /* name */,
+                                      {1 /*N*/, OFM_H, OFM_W, OFM_C} /* dims */, quantization);
+
+  // Configure IFM
+  interp.SetTensorParametersReadWrite(1, kTfLiteFloat32 /* type */, "input" /* name */,
+                                      {1 /*N*/, IFM_H, IFM_W, IFM_C} /* dims */, quantization);
+
+  // Configure Filter
+  const uint32_t kernel_size = KER_N * KER_C * KER_H * KER_W;
+  float kernel_data[kernel_size] = {
+      0.0f,
+  };
+
+  // Fill kernel data in NHWC order
+  {
+    uint32_t off = 0;
+
+    for (uint32_t nth = 0; nth < KER_N; ++nth)
+    {
+      for (uint32_t row = 0; row < KER_H; ++row)
+      {
+        for (uint32_t col = 0; col < KER_W; ++col)
+        {
+          for (uint32_t ch = 0; ch < KER_C; ++ch)
+          {
+            const auto value = kernel.at(nth, ch, row, col);
+            kernel_data[off++] = value;
+          }
+        }
+      }
+    }
+
+    assert(kernel_size == off);
+  }
+
+  interp.SetTensorParametersReadOnly(
+      2, kTfLiteFloat32 /* type */, "filter" /* name */, {KER_N, KER_H, KER_W, KER_C} /* dims */,
+      quantization, reinterpret_cast<const char *>(kernel_data), sizeof(kernel_data));
+
+  // Configure Bias
+  const uint32_t bias_size = bias.size();
+  float bias_data[bias_size] = {
+      0.0f,
+  };
+
+  // Fill bias data
+  for (uint32_t off = 0; off < bias.size(); ++off)
+  {
+    bias_data[off] = bias.at(off);
+  }
+
+  interp.SetTensorParametersReadOnly(3, kTfLiteFloat32 /* type */, "bias" /* name */,
+                                     {bias.size()} /* dims */, quantization,
+                                     reinterpret_cast<const char *>(bias_data), sizeof(bias_data));
+
+  // Add Convolution Node
+  //
+  // NOTE AddNodeWithParameters take the ownership of param, and deallocate it with free
+  //      So, param should be allocated with malloc
+  TfLiteConvParams *param = reinterpret_cast<TfLiteConvParams *>(malloc(sizeof(TfLiteConvParams)));
+
+  param->padding = kTfLitePaddingValid;
+  param->stride_width = 1;
+  param->stride_height = 1;
+  param->activation = kTfLiteActRelu;
+
+  // Run Convolution and store its result into Tensor #0
+  //  - Read IFM from Tensor #1
+  //  - Read Filter from Tensor #2,
+  //  - Read Bias from Tensor #3
+  interp.AddNodeWithParameters({1, 2, 3}, {0}, nullptr, 0, reinterpret_cast<void *>(param),
+                               BuiltinOpResolver().FindOp(BuiltinOperator_CONV_2D, 1));
+
+  // Set Tensor #1 as Input #0, and Tensor #0 as Output #0
+  interp.SetInputs({1});
+  interp.SetOutputs({0});
+
+  // Let's use NNAPI (if possible)
+  interp.UseNNAPI(true);
+
+  // Allocate Tensor
+  interp.AllocateTensors();
+
+  // Fill IFM data in HWC order
+  {
+    uint32_t off = 0;
+
+    for (uint32_t row = 0; row < ifm.shape().H; ++row)
+    {
+      for (uint32_t col = 0; col < ifm.shape().W; ++col)
+      {
+        for (uint32_t ch = 0; ch < ifm.shape().C; ++ch)
+        {
+          const auto value = ifm.at(ch, row, col);
+          interp.typed_input_tensor<float>(0)[off++] = value;
+        }
+      }
+    }
+  }
+
+  // Let's Rock-n-Roll!
+  interp.Invoke();
+
+  // Print OFM
+  {
+    uint32_t off = 0;
+
+    for (uint32_t row = 0; row < OFM_H; ++row)
+    {
+      for (uint32_t col = 0; col < OFM_W; ++col)
+      {
+        for (uint32_t ch = 0; ch < kernel.shape().N; ++ch)
+        {
+          std::cout << interp.typed_output_tensor<float>(0)[off++] << std::endl;
+        }
+      }
+    }
+  }
+
+  return 0;
+}
diff --git a/runtimes/contrib/mlapse/CMakeLists.txt b/runtimes/contrib/mlapse/CMakeLists.txt
new file mode 100644
index 000000000..bba79971a
--- /dev/null
+++ b/runtimes/contrib/mlapse/CMakeLists.txt
@@ -0,0 +1,8 @@
+if(NOT BUILD_MLAPSE)
+  return()
+endif(NOT BUILD_MLAPSE)
+
+message(STATUS "Build mlapse: TRUE")
+
+# TODO Add "core"
+add_subdirectory(tfl)
diff --git a/runtimes/contrib/mlapse/README.md b/runtimes/contrib/mlapse/README.md
new file mode 100644
index 000000000..36f14ac39
--- /dev/null
+++ b/runtimes/contrib/mlapse/README.md
@@ -0,0 +1,3 @@
+# mlapse
+
+_mlapse_ is a toolkit for model inference latency benchmark.
diff --git a/runtimes/contrib/mlapse/tfl/CMakeLists.txt b/runtimes/contrib/mlapse/tfl/CMakeLists.txt
new file mode 100644
index 000000000..36f32d7ef
--- /dev/null
+++ b/runtimes/contrib/mlapse/tfl/CMakeLists.txt
@@ -0,0 +1,12 @@
+message(STATUS "Build mlapse-tfl: TRUE")
+
+file(GLOB_RECURSE SOURCES "*.cc")
+
+add_executable(mlapse-tfl ${SOURCES})
+target_include_directories(mlapse-tfl PRIVATE ${CMAKE_CURRENT_SOURCE_DIR})
+target_link_libraries(mlapse-tfl nnfw_lib_tflite)
+target_link_libraries(mlapse-tfl nnfw_lib_misc)
+target_link_libraries(mlapse-tfl nnfw_lib_cpp14)
+target_link_libraries(mlapse-tfl tensorflow-lite)
+
+install(TARGETS mlapse-tfl DESTINATION bin)
diff --git a/runtimes/contrib/mlapse/tfl/driver.cc b/runtimes/contrib/mlapse/tfl/driver.cc
new file mode 100644
index 000000000..867a6051a
--- /dev/null
+++ b/runtimes/contrib/mlapse/tfl/driver.cc
@@ -0,0 +1,280 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "mlapse/benchmark_runner.h"
+#include "mlapse/multicast_observer.h"
+#include "mlapse/CSV_report_generator.h"
+
+#include "mlapse/tfl/load.h"
+
+// From 'nnfw_lib_tflite'
+#include <tflite/InterpreterSession.h>
+#include <tflite/NNAPISession.h>
+
+// From 'nnfw_lib_cpp14'
+#include <cpp14/memory.h>
+
+// From C++ Standard Library
+#include <cassert>
+#include <fstream>
+#include <iostream>
+#include <vector>
+
+namespace
+{
+
+using namespace mlapse;
+
+class ConsoleReporter final : public mlapse::BenchmarkObserver
+{
+public:
+  ConsoleReporter() = default;
+
+public:
+  void notify(const NotificationArg<PhaseBegin> &arg) final
+  {
+    _phase = arg.phase;
+    _count = arg.count;
+
+    std::cout << tag() << " BEGIN" << std::endl;
+  }
+
+  void notify(const NotificationArg<PhaseEnd> &arg) final
+  {
+    std::cout << tag() << " END" << std::endl;
+
+    _phase = mlapse::uninitialized_phase();
+    _count = 0;
+  }
+
+  void notify(const NotificationArg<IterationBegin> &arg) final { _index = arg.index; }
+
+  void notify(const NotificationArg<IterationEnd> &arg) final
+  {
+    std::cout << tag() << " " << progress() << " - " << arg.latency.count() << "ms" << std::endl;
+  }
+
+private:
+  std::string progress(void) const
+  {
+    return "[" + std::to_string(_index + 1) + "/" + std::to_string(_count) + "]";
+  }
+
+  std::string tag(void) const
+  {
+    switch (_phase)
+    {
+      case Phase::Warmup:
+        return "WARMUP";
+      case Phase::Record:
+        return "RECORD";
+      default:
+        break;
+    }
+
+    return "unknown";
+  }
+
+  Phase _phase = mlapse::uninitialized_phase();
+  uint32_t _count = 0;
+  uint32_t _index = 0;
+};
+
+} // namespace
+
+// Q. Is is worth to make a library for these routines?
+namespace
+{
+
+enum class SessionType
+{
+  Interp,
+  NNAPI,
+};
+
+class SessionBuilder
+{
+public:
+  SessionBuilder(const SessionType &type) : _type{type}
+  {
+    // DO NOTHING
+  }
+
+public:
+  std::unique_ptr<nnfw::tflite::Session> with(tflite::Interpreter *interp) const
+  {
+    switch (_type)
+    {
+      case SessionType::Interp:
+        return nnfw::cpp14::make_unique<nnfw::tflite::InterpreterSession>(interp);
+      case SessionType::NNAPI:
+        return nnfw::cpp14::make_unique<nnfw::tflite::NNAPISession>(interp);
+      default:
+        break;
+    }
+
+    return nullptr;
+  }
+
+  std::unique_ptr<nnfw::tflite::Session>
+  with(const std::unique_ptr<tflite::Interpreter> &interp) const
+  {
+    return with(interp.get());
+  }
+
+private:
+  SessionType _type;
+};
+
+SessionBuilder make_session(const SessionType &type) { return SessionBuilder{type}; }
+
+} // namespace
+
+namespace
+{
+
+// mlapse-tfl
+//  [REQUIRED] --model <path/to/tflite>
+//  [OPTIONAL] --warmup-count N (default = 3)
+//  [OPTIONAL] --record-count N (default = 10)
+//  [OPTIONAL] --thread N or auto (default = auto)
+//  [OPTIOANL] --nnapi (default = off)
+//  [OPTIONAL] --pause N (default = 0)
+//  [OPTIONAL] --csv-report <path/to/csv>
+int entry(const int argc, char **argv)
+{
+  // Create an observer
+  mlapse::MulticastObserver observer;
+
+  observer.append(nnfw::cpp14::make_unique<ConsoleReporter>());
+
+  // Set default parameters
+  std::string model_path;
+  bool model_path_initialized = false;
+
+  SessionType session_type = SessionType::Interp;
+  uint32_t warmup_count = 3;
+  uint32_t record_count = 10;
+  int num_thread = -1; // -1 means "auto"
+
+  // Read command-line arguments
+  std::map<std::string, std::function<uint32_t(const char *const *)>> opts;
+
+  opts["--model"] = [&model_path, &model_path_initialized](const char *const *tok) {
+    model_path = std::string{tok[0]};
+    model_path_initialized = true;
+    return 1; // # of arguments
+  };
+
+  opts["--record-count"] = [&record_count](const char *const *tok) {
+    record_count = std::stoi(tok[0]);
+    return 1; // # of arguments
+  };
+
+  opts["--thread"] = [](const char *const *tok) {
+    assert(std::string{tok[0]} == "auto");
+    return 1;
+  };
+
+  opts["--nnapi"] = [&session_type](const char *const *) {
+    session_type = SessionType::NNAPI;
+    return 0;
+  };
+
+  opts["--csv-report"] = [&observer](const char *const *tok) {
+    observer.append(nnfw::cpp14::make_unique<mlapse::CSVReportGenerator>(tok[0]));
+    return 1;
+  };
+
+  {
+    uint32_t offset = 1;
+
+    while (offset < argc)
+    {
+      auto opt = argv[offset];
+
+      auto it = opts.find(opt);
+
+      if (it == opts.end())
+      {
+        std::cout << "INVALID OPTION: " << opt << std::endl;
+        return 255;
+      }
+
+      auto func = it->second;
+
+      auto num_skip = func(argv + offset + 1);
+
+      offset += 1;
+      offset += num_skip;
+    }
+  }
+
+  // Check arguments
+  if (!model_path_initialized)
+  {
+    std::cerr << "ERROR: --model is missing" << std::endl;
+    return 255;
+  }
+
+  // Load T/F Lite model
+  auto model = mlapse::tfl::load_model(model_path);
+
+  if (model == nullptr)
+  {
+    std::cerr << "ERROR: Failed to load '" << model_path << "'" << std::endl;
+    return 255;
+  }
+
+  auto interp = mlapse::tfl::make_interpreter(model.get());
+
+  if (interp == nullptr)
+  {
+    std::cerr << "ERROR: Failed to create a T/F Lite interpreter" << std::endl;
+    return 255;
+  }
+
+  auto sess = make_session(session_type).with(interp);
+
+  if (sess == nullptr)
+  {
+    std::cerr << "ERROR: Failed to create a session" << std::endl;
+  }
+
+  // Run benchmark
+  mlapse::BenchmarkRunner benchmark_runner{warmup_count, record_count};
+
+  benchmark_runner.attach(&observer);
+  benchmark_runner.run(sess);
+
+  return 0;
+}
+
+} // namespace
+
+int main(int argc, char **argv)
+{
+  try
+  {
+    return entry(argc, argv);
+  }
+  catch (const std::exception &e)
+  {
+    std::cerr << e.what() << std::endl;
+  }
+
+  return 255;
+}
diff --git a/runtimes/contrib/mlapse/tfl/mlapse/CSV_report_generator.cc b/runtimes/contrib/mlapse/tfl/mlapse/CSV_report_generator.cc
new file mode 100644
index 000000000..c6237a04f
--- /dev/null
+++ b/runtimes/contrib/mlapse/tfl/mlapse/CSV_report_generator.cc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "mlapse/CSV_report_generator.h"
+
+#include <cassert>
+#include <stdexcept>
+
+namespace
+{
+
+std::string tag(const mlapse::Phase &phase)
+{
+  switch (phase)
+  {
+    case mlapse::Phase::Warmup:
+      return "WARMUP";
+    case mlapse::Phase::Record:
+      return "STEADY";
+    default:
+      break;
+  }
+
+  throw std::invalid_argument{"phase"};
+}
+
+} // namespace
+
+namespace mlapse
+{
+
+void CSVReportGenerator::notify(const NotificationArg<PhaseBegin> &arg)
+{
+  assert(_phase == uninitialized_phase());
+  _phase = arg.phase;
+}
+
+void CSVReportGenerator::notify(const NotificationArg<PhaseEnd> &arg)
+{
+  assert(_phase != uninitialized_phase());
+  _phase = uninitialized_phase();
+}
+
+void CSVReportGenerator::notify(const NotificationArg<IterationBegin> &arg)
+{
+  // DO NOTHING
+}
+
+void CSVReportGenerator::notify(const NotificationArg<IterationEnd> &arg)
+{
+  _ofs << tag(_phase) << "," << arg.latency.count() << std::endl;
+}
+
+} // namespace mlapse
diff --git a/runtimes/contrib/mlapse/tfl/mlapse/CSV_report_generator.h b/runtimes/contrib/mlapse/tfl/mlapse/CSV_report_generator.h
new file mode 100644
index 000000000..8842baf8e
--- /dev/null
+++ b/runtimes/contrib/mlapse/tfl/mlapse/CSV_report_generator.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __MLAPSE_CSV_REPORT_GENERATOR_H__
+#define __MLAPSE_CSV_REPORT_GENERATOR_H__
+
+#include "mlapse/benchmark_observer.h"
+
+#include <fstream>
+#include <string>
+
+namespace mlapse
+{
+
+class CSVReportGenerator final : public BenchmarkObserver
+{
+public:
+  CSVReportGenerator(const std::string &path) : _ofs{path, std::ofstream::out}
+  {
+    // DO NOTHING
+  }
+
+public:
+  void notify(const NotificationArg<PhaseBegin> &arg) final;
+  void notify(const NotificationArg<PhaseEnd> &arg) final;
+  void notify(const NotificationArg<IterationBegin> &arg) final;
+  void notify(const NotificationArg<IterationEnd> &arg);
+
+private:
+  std::ofstream _ofs;
+
+  Phase _phase = uninitialized_phase();
+};
+
+} // namespace mlapse
+
+#endif // __MLAPSE_MULTICAST_OBSERER_H__
diff --git a/runtimes/contrib/mlapse/tfl/mlapse/benchmark_observer.cc b/runtimes/contrib/mlapse/tfl/mlapse/benchmark_observer.cc
new file mode 100644
index 000000000..f6d596a7b
--- /dev/null
+++ b/runtimes/contrib/mlapse/tfl/mlapse/benchmark_observer.cc
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "mlapse/benchmark_observer.h"
+
+namespace mlapse
+{
+
+Phase uninitialized_phase(void) { return static_cast<Phase>(0); }
+
+} // namespace mlapse
diff --git a/runtimes/contrib/mlapse/tfl/mlapse/benchmark_observer.h b/runtimes/contrib/mlapse/tfl/mlapse/benchmark_observer.h
new file mode 100644
index 000000000..8fc570d24
--- /dev/null
+++ b/runtimes/contrib/mlapse/tfl/mlapse/benchmark_observer.h
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __MLAPSE_BENCHMARK_OBSERVER_H__
+#define __MLAPSE_BENCHMARK_OBSERVER_H__
+
+#include <cstdint>
+#include <chrono>
+
+namespace mlapse
+{
+
+enum Phase : int32_t
+{
+  // 0 denotes "uninitialized value"
+  Warmup = 1,
+  Record = 2,
+};
+
+Phase uninitialized_phase(void);
+
+enum Notification
+{
+  PhaseBegin,
+  PhaseEnd,
+  IterationBegin,
+  IterationEnd,
+};
+
+template <Notification N> struct NotificationArg;
+
+template <> struct NotificationArg<PhaseBegin>
+{
+  Phase phase;
+  uint32_t count;
+};
+
+template <> struct NotificationArg<PhaseEnd>
+{
+};
+
+template <> struct NotificationArg<IterationBegin>
+{
+  uint32_t index;
+};
+
+template <> struct NotificationArg<IterationEnd>
+{
+  std::chrono::milliseconds latency;
+};
+
+struct BenchmarkObserver
+{
+  virtual ~BenchmarkObserver() = default;
+
+  virtual void notify(const NotificationArg<PhaseBegin> &arg) = 0;
+  virtual void notify(const NotificationArg<PhaseEnd> &arg) = 0;
+  virtual void notify(const NotificationArg<IterationBegin> &arg) = 0;
+  virtual void notify(const NotificationArg<IterationEnd> &arg) = 0;
+};
+
+} // namespace mlpase
+
+#endif // __MLAPSE_BENCHMARK_OBSERVER_H__
diff --git a/runtimes/contrib/mlapse/tfl/mlapse/benchmark_runner.cc b/runtimes/contrib/mlapse/tfl/mlapse/benchmark_runner.cc
new file mode 100644
index 000000000..f5fc7302d
--- /dev/null
+++ b/runtimes/contrib/mlapse/tfl/mlapse/benchmark_runner.cc
@@ -0,0 +1,124 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "mlapse/benchmark_runner.h"
+
+// From 'nnfw_lib_misc'
+#include <misc/benchmark.h>
+
+// From C++ Standard Library
+#include <cassert>
+
+namespace mlapse
+{
+void BenchmarkRunner::attach(BenchmarkObserver *observer)
+{
+  assert(_observer == nullptr);
+  _observer = observer;
+}
+
+void BenchmarkRunner::run(nnfw::tflite::Session *sess) const
+{
+  for (auto phase : {Warmup, Record})
+  {
+    uint32_t const count = _count.at(phase);
+
+    // Notify when each phase begins
+    {
+      NotificationArg<PhaseBegin> arg;
+
+      arg.phase = phase;
+      arg.count = count;
+
+      notify(arg);
+    }
+
+    for (uint32_t n = 0; n < count; ++n)
+    {
+      std::chrono::milliseconds elapsed(0);
+
+      sess->prepare();
+
+      // Notify when each iteration begins
+      {
+        NotificationArg<IterationBegin> arg;
+
+        arg.index = n;
+
+        notify(arg);
+      };
+
+      nnfw::misc::benchmark::measure(elapsed) << [&](void) {
+        if (!sess->run())
+        {
+          throw std::runtime_error{"run failed"};
+        }
+      };
+
+      // Notify when each iteration ends
+      {
+        NotificationArg<IterationEnd> arg;
+
+        arg.latency = elapsed;
+
+        notify(arg);
+      };
+
+      sess->teardown();
+    }
+
+    // Notify when each phase ends
+    {
+      NotificationArg<PhaseEnd> arg;
+
+      notify(arg);
+    }
+  }
+}
+
+void BenchmarkRunner::notify(const NotificationArg<PhaseBegin> &arg) const
+{
+  if (_observer)
+  {
+    _observer->notify(arg);
+  }
+}
+
+void BenchmarkRunner::notify(const NotificationArg<PhaseEnd> &arg) const
+{
+  if (_observer)
+  {
+    _observer->notify(arg);
+  }
+}
+
+void BenchmarkRunner::notify(const NotificationArg<IterationBegin> &arg) const
+{
+  if (_observer)
+  {
+    _observer->notify(arg);
+  }
+}
+
+void BenchmarkRunner::notify(const NotificationArg<IterationEnd> &arg) const
+{
+  if (_observer)
+  {
+    _observer->notify(arg);
+  }
+}
+
+} // namespace mlapse
diff --git a/runtimes/contrib/mlapse/tfl/mlapse/benchmark_runner.h b/runtimes/contrib/mlapse/tfl/mlapse/benchmark_runner.h
new file mode 100644
index 000000000..fcbb41d1b
--- /dev/null
+++ b/runtimes/contrib/mlapse/tfl/mlapse/benchmark_runner.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __MLAPSE_BENCHMARK_RUNNER_H__
+#define __MLAPSE_BENCHMARK_RUNNER_H__
+
+#include "mlapse/benchmark_observer.h"
+
+#include <tflite/Session.h>
+
+#include <chrono>
+#include <map>
+
+namespace mlapse
+{
+
+class BenchmarkRunner final
+{
+public:
+  BenchmarkRunner(uint32_t warmup_count, uint32_t record_count)
+  {
+    _count[Warmup] = warmup_count;
+    _count[Record] = record_count;
+  }
+
+public:
+  void attach(BenchmarkObserver *observer);
+
+public:
+  void run(nnfw::tflite::Session *sess) const;
+
+public:
+  void run(const std::unique_ptr<nnfw::tflite::Session> &sess) const { run(sess.get()); }
+
+private:
+  void notify(const NotificationArg<PhaseBegin> &arg) const;
+  void notify(const NotificationArg<PhaseEnd> &arg) const;
+  void notify(const NotificationArg<IterationBegin> &arg) const;
+  void notify(const NotificationArg<IterationEnd> &arg) const;
+
+private:
+  std::map<Phase, uint32_t> _count;
+
+private:
+  BenchmarkObserver *_observer = nullptr;
+};
+
+} // namespace mlpase
+
+#endif // __MLAPSE_BENCHMARK_RUNNER_H__
diff --git a/runtimes/contrib/mlapse/tfl/mlapse/multicast_observer.cc b/runtimes/contrib/mlapse/tfl/mlapse/multicast_observer.cc
new file mode 100644
index 000000000..639acfe45
--- /dev/null
+++ b/runtimes/contrib/mlapse/tfl/mlapse/multicast_observer.cc
@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "mlapse/multicast_observer.h"
diff --git a/runtimes/contrib/mlapse/tfl/mlapse/multicast_observer.h b/runtimes/contrib/mlapse/tfl/mlapse/multicast_observer.h
new file mode 100644
index 000000000..e4aac50a9
--- /dev/null
+++ b/runtimes/contrib/mlapse/tfl/mlapse/multicast_observer.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __MLAPSE_MULTICAST_OBSERER_H__
+#define __MLAPSE_MULTICAST_OBSERER_H__
+
+#include "mlapse/benchmark_observer.h"
+
+#include <memory>
+#include <vector>
+
+namespace mlapse
+{
+
+class MulticastObserver final : public BenchmarkObserver
+{
+public:
+  MulticastObserver() = default;
+
+public:
+  void append(std::unique_ptr<BenchmarkObserver> &&o) { _observers.emplace_back(std::move(o)); }
+
+public:
+  void notify(const NotificationArg<PhaseBegin> &arg) final
+  {
+    for (const auto &o : _observers)
+    {
+      o->notify(arg);
+    }
+  }
+
+  void notify(const NotificationArg<PhaseEnd> &arg) final
+  {
+    for (const auto &o : _observers)
+    {
+      o->notify(arg);
+    }
+  }
+
+  void notify(const NotificationArg<IterationBegin> &arg) final
+  {
+    for (const auto &o : _observers)
+    {
+      o->notify(arg);
+    }
+  }
+
+  void notify(const NotificationArg<IterationEnd> &arg) final
+  {
+    for (const auto &o : _observers)
+    {
+      o->notify(arg);
+    }
+  }
+
+private:
+  std::vector<std::unique_ptr<BenchmarkObserver>> _observers;
+};
+
+} // namespace mlapse
+
+#endif // __MLAPSE_MULTICAST_OBSERER_H__
diff --git a/runtimes/contrib/mlapse/tfl/mlapse/tfl/load.cc b/runtimes/contrib/mlapse/tfl/mlapse/tfl/load.cc
new file mode 100644
index 000000000..9e770aecf
--- /dev/null
+++ b/runtimes/contrib/mlapse/tfl/mlapse/tfl/load.cc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "mlapse/tfl/load.h"
+
+#include <tflite/ext/kernels/register.h>
+
+namespace
+{
+
+tflite::StderrReporter error_reporter;
+
+} // namespace
+
+namespace mlapse
+{
+namespace tfl
+{
+
+std::unique_ptr<tflite::FlatBufferModel> load_model(const std::string &path)
+{
+  return tflite::FlatBufferModel::BuildFromFile(path.c_str(), &error_reporter);
+}
+
+std::unique_ptr<tflite::Interpreter> make_interpreter(const tflite::FlatBufferModel *model)
+{
+  // Let's use extended resolver!
+  nnfw::tflite::BuiltinOpResolver resolver;
+  tflite::InterpreterBuilder builder(*model, resolver);
+
+  std::unique_ptr<tflite::Interpreter> interpreter;
+
+  if (builder(&interpreter) != kTfLiteOk)
+  {
+    return nullptr;
+  }
+
+  return std::move(interpreter);
+}
+
+} // namespace tfl
+} // namespace mlapse
diff --git a/runtimes/contrib/mlapse/tfl/mlapse/tfl/load.h b/runtimes/contrib/mlapse/tfl/mlapse/tfl/load.h
new file mode 100644
index 000000000..6f5a8f1ea
--- /dev/null
+++ b/runtimes/contrib/mlapse/tfl/mlapse/tfl/load.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __MLAPSE_TFL_LOAD_H__
+#define __MLAPSE_TFL_LOAD_H__
+
+#include <tensorflow/lite/interpreter.h>
+#include <tensorflow/lite/model.h>
+
+#include <memory>
+
+namespace mlapse
+{
+namespace tfl
+{
+
+std::unique_ptr<tflite::FlatBufferModel> load_model(const std::string &path);
+
+// WARNING
+//
+//  model SHOULD outlive Interpreter
+std::unique_ptr<tflite::Interpreter> make_interpreter(const tflite::FlatBufferModel *model);
+
+} // namespace tfl
+} // namespace mlapse
+
+#endif // __MLAPSE_TFL_LOAD_H__
diff --git a/runtimes/contrib/tflite_classify/CMakeLists.txt b/runtimes/contrib/tflite_classify/CMakeLists.txt
new file mode 100644
index 000000000..c0bf62738
--- /dev/null
+++ b/runtimes/contrib/tflite_classify/CMakeLists.txt
@@ -0,0 +1,22 @@
+if(NOT BUILD_TFLITE_CLASSIFY_APP)
+  return()
+endif(NOT BUILD_TFLITE_CLASSIFY_APP)
+
+list(APPEND SOURCES "src/tflite_classify.cc")
+list(APPEND SOURCES "src/ImageClassifier.cc")
+list(APPEND SOURCES "src/InferenceInterface.cc")
+
+## Required package
+find_package(OpenCV REQUIRED)
+find_package(Boost REQUIRED COMPONENTS system filesystem)
+
+# Without this line, this appliation couldn't search the opencv library that were already installed in ${ROOTFS_DIR}/usr/lib/arm-linux-gnueabihf directory
+set(CMAKE_EXE_LINKER_FLAGS "-Wl,--as-needed -Wl,--rpath=${ROOTFS_DIR}/usr/lib/arm-linux-gnueabihf -Wl,--rpath=${ROOTFS_DIR}/lib/arm-linux-gnueabihf")
+
+add_executable(tflite_classify ${SOURCES})
+target_include_directories(tflite_classify PRIVATE src)
+target_link_libraries(tflite_classify tensorflow-lite ${LIB_PTHREAD} dl nnfw_lib_tflite)
+target_link_libraries(tflite_classify ${Boost_LIBRARIES})
+target_link_libraries(tflite_classify ${OpenCV_LIBRARIES})
+
+install(TARGETS tflite_classify DESTINATION bin)
diff --git a/contrib/tflite_classify/src/ImageClassifier.cc b/runtimes/contrib/tflite_classify/src/ImageClassifier.cc
index fae4f066c..fae4f066c 100644
--- a/contrib/tflite_classify/src/ImageClassifier.cc
+++ b/runtimes/contrib/tflite_classify/src/ImageClassifier.cc
diff --git a/contrib/tflite_classify/src/ImageClassifier.h b/runtimes/contrib/tflite_classify/src/ImageClassifier.h
index 1ba19afb0..1ba19afb0 100644
--- a/contrib/tflite_classify/src/ImageClassifier.h
+++ b/runtimes/contrib/tflite_classify/src/ImageClassifier.h
diff --git a/contrib/tflite_classify/src/InferenceInterface.cc b/runtimes/contrib/tflite_classify/src/InferenceInterface.cc
index 160943477..160943477 100644
--- a/contrib/tflite_classify/src/InferenceInterface.cc
+++ b/runtimes/contrib/tflite_classify/src/InferenceInterface.cc
diff --git a/runtimes/contrib/tflite_classify/src/InferenceInterface.h b/runtimes/contrib/tflite_classify/src/InferenceInterface.h
new file mode 100644
index 000000000..fe2c1aa6c
--- /dev/null
+++ b/runtimes/contrib/tflite_classify/src/InferenceInterface.h
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     InferenceInterface.h
+ * @brief    This file contains class for running the actual inference model
+ * @ingroup  COM_AI_RUNTIME
+ */
+
+#ifndef __TFLITE_CLASSIFY_INFERENCE_INTERFACE_H__
+#define __TFLITE_CLASSIFY_INFERENCE_INTERFACE_H__
+
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+
+#include "tflite/InterpreterSession.h"
+#include "tflite/NNAPISession.h"
+
+#include <iostream>
+#include <string>
+
+/**
+ * @brief Class to define a inference interface for recognizing data
+ */
+class InferenceInterface
+{
+public:
+  /**
+   * @brief Construct a new InferenceInterface object with parameters
+   * @param[in] model_file  The filepath of the model FlatBuffer protocol buffer
+   * @param[in] use_nnapi   The flag to distinguish between TfLite interpreter and NNFW runtime
+   */
+  InferenceInterface(const std::string &model_file, const bool use_nnapi);
+
+  /**
+   * @brief Destructor an InferenceInterface object
+   */
+  ~InferenceInterface();
+
+  /**
+   * @brief Copy the input data into model
+   * @param[in] input_name  The label of the image input node
+   * @param[in] data        The actual data to be copied into input tensor
+   * @param[in] batch       The number of batch size
+   * @param[in] height      The number of height size
+   * @param[in] width       The number of width size
+   * @param[in] channel     The number of channel size
+   * @return N/A
+   */
+  void feed(const std::string &input_name, const std::vector<float> &data, const int batch,
+            const int height, const int width, const int channel);
+  /**
+   * @brief Run the inference call
+   * @param[in] output_name The label of the output node
+   * @return N/A
+   */
+  void run(const std::string &output_name);
+
+  /**
+   * @brief Copy the output tensor back into the output array
+   * @param[in] output_node The label of the output node
+   * @param[in] outputs     The output data array
+   * @return N/A
+   */
+  void fetch(const std::string &output_name, std::vector<float> &outputs);
+
+  /**
+   * @brief Get tensor size
+   * @param[in] name  The label of the node
+   * @result The size of tensor
+   */
+  int getTensorSize(const std::string &name);
+
+private:
+  std::unique_ptr<tflite::Interpreter> _interpreter;
+  std::unique_ptr<tflite::FlatBufferModel> _model;
+  std::shared_ptr<nnfw::tflite::Session> _sess;
+};
+
+#endif // __TFLITE_CLASSIFY_INFERENCE_INTERFACE_H__
diff --git a/contrib/tflite_classify/src/tflite_classify.cc b/runtimes/contrib/tflite_classify/src/tflite_classify.cc
index 40c15f331..40c15f331 100644
--- a/contrib/tflite_classify/src/tflite_classify.cc
+++ b/runtimes/contrib/tflite_classify/src/tflite_classify.cc
diff --git a/contrib/tflite_test/CMakeLists.txt b/runtimes/contrib/tflite_test/CMakeLists.txt
index 760952a84..760952a84 100644
--- a/contrib/tflite_test/CMakeLists.txt
+++ b/runtimes/contrib/tflite_test/CMakeLists.txt
diff --git a/runtimes/contrib/tflite_test/tflite_test.cpp b/runtimes/contrib/tflite_test/tflite_test.cpp
new file mode 100644
index 000000000..80ba448c6
--- /dev/null
+++ b/runtimes/contrib/tflite_test/tflite_test.cpp
@@ -0,0 +1,239 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <tensorflow/lite/model.h>
+#include <tensorflow/core/public/session.h>
+
+#include "tflite/Assert.h"
+#include "tflite/Session.h"
+#include "tflite/InterpreterSession.h"
+#include "tflite/NNAPISession.h"
+#include "tflite/ext/kernels/register.h"
+
+#include "misc/fp32.h"
+
+#include <iostream>
+
+#include <string>
+#include <vector>
+
+#define TF_ENSURE(e)                               \
+  {                                                \
+    if (!(e).ok())                                 \
+    {                                              \
+      throw std::runtime_error{"'" #e "' FAILED"}; \
+    }                                              \
+  }
+
+using namespace tflite;
+using namespace tflite::ops::builtin;
+
+std::unique_ptr<FlatBufferModel> BuildModelFromFile(const std::string &path)
+{
+  static StderrReporter reporter;
+  return FlatBufferModel::BuildFromFile(path.c_str(), &reporter);
+}
+
+std::unique_ptr<Interpreter> BuildInterpFromModel(const std::unique_ptr<FlatBufferModel> &model)
+{
+  std::unique_ptr<Interpreter> interp;
+
+  BuiltinOpResolver resolver;
+  InterpreterBuilder builder(*model, resolver);
+
+  TFLITE_ENSURE(builder(&interp));
+
+  return std::move(interp);
+}
+
+tensorflow::TensorShape asTensorflowShape(const TfLiteTensor *tensor)
+{
+  tensorflow::TensorShape shape;
+
+  const int rank = tensor->dims->size;
+
+  for (int axis = 0; axis < rank; ++axis)
+  {
+    shape.AddDim(tensor->dims->data[axis]);
+  }
+
+  return shape;
+}
+
+uint32_t count_elements(const TfLiteTensor *tensor)
+{
+  const int rank = tensor->dims->size;
+
+  if (rank == 0)
+  {
+    return 0;
+  }
+
+  uint32_t res = 1;
+
+  for (int axis = 0; axis < rank; ++axis)
+  {
+    res *= tensor->dims->data[axis];
+  }
+
+  return res;
+}
+
+int main(int argc, char **argv)
+{
+  bool use_nnapi = false;
+
+  if (std::getenv("USE_NNAPI") != nullptr)
+  {
+    use_nnapi = true;
+  }
+
+  if (argc < 3)
+  {
+    std::cerr << "USAGE: " << argv[0] << " [T/F lite model] [T/F model]" << std::endl;
+    return 255;
+  }
+
+  //
+  // Prepare Tensorflow Lite session
+  //
+  const std::string lite_model_path{argv[1]};
+
+  auto lite_model = BuildModelFromFile(lite_model_path);
+  auto lite_interp = BuildInterpFromModel(lite_model);
+
+  std::shared_ptr<nnfw::tflite::Session> lite_sess;
+
+  if (use_nnapi)
+  {
+    lite_sess = std::make_shared<nnfw::tflite::NNAPISession>(lite_interp.get());
+  }
+  else
+  {
+    lite_sess = std::make_shared<nnfw::tflite::InterpreterSession>(lite_interp.get());
+  }
+
+  //
+  // Prepare Tensorflow session
+  //
+  const std::string full_model_path{argv[2]};
+
+  tensorflow::Session *full_sess;
+  tensorflow::GraphDef full_model;
+
+  TF_ENSURE(tensorflow::NewSession(tensorflow::SessionOptions(), &full_sess));
+  TF_ENSURE(ReadBinaryProto(tensorflow::Env::Default(), full_model_path, &full_model));
+  TF_ENSURE(full_sess->Create(full_model));
+
+  //
+  //
+  //
+  std::vector<tensorflow::Tensor> input_nodes;
+  std::vector<std::string> input_names;
+
+  for (uint32_t n = 0; n < lite_interp->inputs().size(); ++n)
+  {
+    const TfLiteTensor *tensor = lite_interp->tensor(lite_interp->inputs().at(n));
+
+    input_nodes.emplace_back(tensorflow::DT_FLOAT, asTensorflowShape(tensor));
+    input_names.emplace_back(tensor->name);
+  }
+
+  assert(input_nodes.size() == input_names.size());
+  assert(input_nodes.size() == lite_interp->inputs().size());
+
+  std::vector<std::string> output_names;
+  std::vector<tensorflow::Tensor> output_nodes;
+
+  for (uint32_t n = 0; n < lite_interp->outputs().size(); ++n)
+  {
+    const TfLiteTensor *tensor = lite_interp->tensor(lite_interp->outputs().at(n));
+
+    output_names.emplace_back(tensor->name);
+  }
+
+  assert(output_names.size() == lite_interp->outputs().size());
+  // output_nodes will be initialized after Tensorflow Session run
+  assert(output_nodes.size() == 0);
+
+  //
+  // Prepare inference
+  //
+  lite_sess->prepare();
+
+  // TODO Feed Inputs (for both Tensorflow and Tensorflow Lite)
+  std::vector<std::pair<std::string, tensorflow::Tensor>> inputs;
+
+  for (uint32_t n = 0; n < input_nodes.size(); ++n)
+  {
+    inputs.emplace_back(input_names.at(0), input_nodes.at(0));
+  }
+
+  //
+  // Run inference
+  //
+  TF_ENSURE(full_sess->Run(inputs, output_names, {}, &output_nodes));
+
+  lite_sess->run();
+
+  //
+  // Compare Output
+  //
+  auto equals = [](float lhs, float rhs) {
+    // TODO Allow users to set tolerance
+    if (nnfw::misc::fp32::absolute_epsilon_equal(lhs, rhs))
+    {
+      return true;
+    }
+
+    return nnfw::misc::fp32::epsilon_equal(lhs, rhs);
+  };
+
+  const uint32_t output_count = output_names.size();
+
+  bool matched = true;
+
+  for (uint32_t n = 0; n < output_count; ++n)
+  {
+    const TfLiteTensor *tensor = lite_interp->tensor(lite_interp->outputs().at(n));
+
+    // TODO Compare shape
+
+    const auto element_count = count_elements(tensor);
+
+    std::cout << "Compare output #" << n << "(" << tensor->name << ", " << element_count
+              << " elements)" << std::endl;
+    for (uint32_t index = 0; index < element_count; ++index)
+    {
+      const auto full_value = output_nodes.at(n).flat<float>().data()[index];
+      const auto lite_value = lite_sess->interp()->typed_output_tensor<float>(n)[index];
+
+      if (!equals(full_value, lite_value))
+      {
+        std::cerr << full_value << " is expected, but " << lite_value << " is obtaeind (at " << n
+                  << ":" << index << ")" << std::endl;
+        matched = false;
+      }
+    }
+  }
+
+  //
+  // Cleanup
+  //
+  lite_sess->teardown();
+
+  return matched ? 0 : 255;
+}
diff --git a/runtimes/contrib/uben/CMakeLists.txt b/runtimes/contrib/uben/CMakeLists.txt
new file mode 100644
index 000000000..747398aaf
--- /dev/null
+++ b/runtimes/contrib/uben/CMakeLists.txt
@@ -0,0 +1,29 @@
+if(NOT BUILD_UBEN)
+  return()
+endif(NOT BUILD_UBEN)
+
+nnfw_find_package(ARMCompute QUIET)
+nnfw_find_package(Nonius QUIET)
+
+if(NOT ARMCompute_FOUND)
+  return()
+endif(NOT ARMCompute_FOUND)
+
+if(NOT Nonius_FOUND)
+  return()
+endif(NOT Nonius_FOUND)
+
+# 3x3 Convolution with unit stride
+add_executable(uben_conv_3x3 Convolution.cpp)
+target_compile_definitions(uben_conv_3x3 PRIVATE KER_H=3 KER_W=3 STRIDE_H=1 STRIDE_W=1)
+target_compile_definitions(uben_conv_3x3 PRIVATE CL_DIRECT_CONVOLUTION=1)
+target_compile_definitions(uben_conv_3x3 PRIVATE CL_GEMM_CONVOLUTION=1)
+target_compile_definitions(uben_conv_3x3 PRIVATE CL_WINOGRAD_CONVOLUTION=1)
+target_link_libraries(uben_conv_3x3 PRIVATE nonius)
+target_link_libraries(uben_conv_3x3 PRIVATE arm_compute)
+target_link_libraries(uben_conv_3x3 PRIVATE pthread)
+
+add_executable(uben_softmax Softmax.cpp)
+target_link_libraries(uben_softmax PRIVATE nonius)
+target_link_libraries(uben_softmax PRIVATE nnfw_lib_cker)
+target_link_libraries(uben_softmax PRIVATE pthread)
diff --git a/runtimes/contrib/uben/Convolution.cpp b/runtimes/contrib/uben/Convolution.cpp
new file mode 100644
index 000000000..ad69f1cec
--- /dev/null
+++ b/runtimes/contrib/uben/Convolution.cpp
@@ -0,0 +1,429 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file Conv2D (with SAME padding) benchmark with various algorithms
+ */
+
+#ifndef KER_H
+#error "KER_H is undefined"
+#endif // KER_H
+#ifndef KER_W
+#error "KER_W is undefined"
+#endif // KER_W
+#ifndef STRIDE_H
+#error "STRIDE_H is undefined"
+#endif // STRIDE_H
+#ifndef STRIDE_W
+#error "STRIDE_W is undefined"
+#endif // STRIDE_W
+
+#define NONIUS_RUNNER
+#include <nonius/nonius_single.h++>
+
+#include <arm_compute/core/Types.h>
+#include <arm_compute/runtime/CL/CLScheduler.h>
+#include <arm_compute/runtime/CL/CLFunctions.h>
+
+#include <cstdint>
+#include <cassert>
+#include <stdexcept>
+
+using namespace arm_compute;
+
+//
+// Helpers
+//
+namespace
+{
+
+enum Layout
+{
+  NCHW,
+  NHWC
+};
+
+struct Initializer
+{
+  Initializer() { CLScheduler::get().default_init(); }
+};
+
+Initializer initializer;
+
+TensorInfo make_info(uint32_t N)
+{
+  TensorShape shape{N};
+  return TensorInfo{shape, 1, DataType::F32};
+}
+
+template <enum Layout> TensorInfo make_info(uint32_t N, uint32_t C, uint32_t H, uint32_t W);
+
+template <> TensorInfo make_info<NCHW>(uint32_t N, uint32_t C, uint32_t H, uint32_t W)
+{
+  TensorShape shape{W, H, C, N};
+  TensorInfo info{shape, 1, DataType::F32};
+  info.set_data_layout(DataLayout::NCHW);
+  return info;
+}
+
+template <> TensorInfo make_info<NHWC>(uint32_t N, uint32_t C, uint32_t H, uint32_t W)
+{
+  TensorShape shape{C, W, H, N};
+  TensorInfo info{shape, 1, DataType::F32};
+  info.set_data_layout(DataLayout::NHWC);
+  return info;
+}
+
+inline void check(const Status &status)
+{
+  if (!status)
+  {
+    std::cerr << status.error_description() << std::endl;
+    throw std::runtime_error{"ERROR"};
+  }
+}
+
+inline bool is_odd(uint32_t n) { return (n % 2 != 0) ? true : false; }
+
+} // namespace
+
+//
+// Benchmark Parameters
+//
+NONIUS_PARAM(BATCH, 1);
+
+NONIUS_PARAM(IFM_C, 3);
+NONIUS_PARAM(IFM_H, 244);
+NONIUS_PARAM(IFM_W, 244);
+
+NONIUS_PARAM(OFM_C, 3);
+NONIUS_PARAM(OFM_H, 244);
+NONIUS_PARAM(OFM_W, 244);
+
+//
+// Configuration Helpers
+//
+namespace
+{
+
+struct Configuration
+{
+  uint32_t ifm_N;
+  uint32_t ifm_C;
+  uint32_t ifm_H;
+  uint32_t ifm_W;
+
+  uint32_t ofm_N;
+  uint32_t ofm_C;
+  uint32_t ofm_H;
+  uint32_t ofm_W;
+
+  uint32_t ker_N;
+  uint32_t ker_C;
+  uint32_t ker_H;
+  uint32_t ker_W;
+
+  uint32_t vertical_stride;
+  uint32_t horizontal_stride;
+
+  uint32_t top_padding;
+  uint32_t bottom_padding;
+  uint32_t left_padding;
+  uint32_t right_padding;
+
+  Configuration(nonius::chronometer meter)
+  {
+    ifm_N = meter.param<BATCH>();
+    ifm_C = meter.param<IFM_C>();
+    ifm_H = meter.param<IFM_H>();
+    ifm_W = meter.param<IFM_W>();
+
+    ofm_N = meter.param<BATCH>();
+    ofm_C = meter.param<OFM_C>();
+    ofm_H = meter.param<OFM_H>();
+    ofm_W = meter.param<OFM_W>();
+
+    ker_N = meter.param<OFM_C>();
+    ker_C = meter.param<IFM_C>();
+    ker_H = KER_H;
+    ker_W = KER_W;
+
+    vertical_stride = STRIDE_H;
+    horizontal_stride = STRIDE_W;
+
+    assert((ifm_H - ker_H) % vertical_stride == 0);
+    assert((ifm_W - ker_H) % horizontal_stride == 0);
+
+    uint32_t const effective_ofm_H = (ifm_H - ker_H) / vertical_stride + 1;
+    uint32_t const effective_ofm_W = (ifm_W - ker_H) / horizontal_stride + 1;
+
+    assert(ofm_H >= effective_ofm_H);
+    assert(ofm_W >= effective_ofm_W);
+
+    uint32_t const pad_H = ofm_H - effective_ofm_H;
+    uint32_t const pad_W = ofm_W - effective_ofm_W;
+
+    top_padding = pad_H / 2;
+    bottom_padding = pad_H / 2;
+    left_padding = pad_W / 2;
+    right_padding = pad_W / 2;
+
+    if (is_odd(pad_H))
+      top_padding += 1;
+    if (is_odd(pad_W))
+      left_padding += 1;
+  }
+
+  template <Layout L> TensorInfo src_info() const
+  {
+    return make_info<L>(ifm_N, ifm_C, ifm_H, ifm_W);
+  }
+  template <Layout L> TensorInfo dst_info() const
+  {
+    return make_info<L>(ofm_N, ofm_C, ofm_H, ofm_W);
+  }
+  template <Layout L> TensorInfo ker_info() const
+  {
+    return make_info<L>(ker_N, ker_C, ker_H, ker_W);
+  }
+  TensorInfo bias_info(void) const { return make_info(ker_N); }
+
+  PadStrideInfo pad_stride_info(void) const
+  {
+    return PadStrideInfo{horizontal_stride,
+                         vertical_stride,
+                         left_padding,
+                         right_padding,
+                         top_padding,
+                         bottom_padding,
+                         DimensionRoundingType::FLOOR};
+  }
+};
+
+} // namespace
+
+//
+// Benchmakr Implementations
+//
+#ifndef CL_DIRECT_CONVOLUTION
+#error "CL_DIRECT_CONVOLUTION is undefined"
+#endif // CL_DIRECT_CONVOLUTION
+
+#if CL_DIRECT_CONVOLUTION
+NONIUS_BENCHMARK("CLDirectConvolutionLayer(NCHW)", [](nonius::chronometer meter) {
+  CLDirectConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  CLTensor src_tensor{};
+  CLTensor dst_tensor{};
+  CLTensor ker_tensor{};
+  CLTensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NCHW>());
+  dst_tensor.allocator()->init(p.dst_info<NCHW>());
+  ker_tensor.allocator()->init(p.ker_info<NCHW>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                      p.pad_stride_info()));
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run!
+  meter.measure([&](int) {
+    conv.run();
+    CLScheduler::get().sync();
+  });
+})
+
+NONIUS_BENCHMARK("CLDirectConvolutionLayer(NHWC)", [](nonius::chronometer meter) {
+  CLDirectConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  CLTensor src_tensor{};
+  CLTensor dst_tensor{};
+  CLTensor ker_tensor{};
+  CLTensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NHWC>());
+  dst_tensor.allocator()->init(p.dst_info<NHWC>());
+  ker_tensor.allocator()->init(p.ker_info<NHWC>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                      p.pad_stride_info()));
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run!
+  meter.measure([&](int) {
+    conv.run();
+    CLScheduler::get().sync();
+  });
+})
+#endif // CL_DIRECT_CONVOLUTION
+
+#ifndef CL_GEMM_CONVOLUTION
+#error "CL_GEMM_CONVOLUTION is undefined"
+#endif // CL_GEMM_CONVOLUTION
+
+#if CL_GEMM_CONVOLUTION
+NONIUS_BENCHMARK("CLGEMMConvolutionLayer(NCHW)", [](nonius::chronometer meter) {
+  CLGEMMConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  CLTensor src_tensor{};
+  CLTensor dst_tensor{};
+  CLTensor ker_tensor{};
+  CLTensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NCHW>());
+  dst_tensor.allocator()->init(p.dst_info<NCHW>());
+  ker_tensor.allocator()->init(p.ker_info<NCHW>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                      p.pad_stride_info()));
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run
+  meter.measure([&](int) {
+    conv.run();
+    CLScheduler::get().sync();
+  });
+})
+
+NONIUS_BENCHMARK("CLGEMMConvolutionLayer(NHWC)", [](nonius::chronometer meter) {
+  CLGEMMConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  CLTensor src_tensor{};
+  CLTensor dst_tensor{};
+  CLTensor ker_tensor{};
+  CLTensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NHWC>());
+  dst_tensor.allocator()->init(p.dst_info<NHWC>());
+  ker_tensor.allocator()->init(p.ker_info<NHWC>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                      p.pad_stride_info()));
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run
+  meter.measure([&](int) {
+    conv.run();
+    CLScheduler::get().sync();
+  });
+})
+#endif // CL_GEMM_CONVOLUTION
+
+#ifndef CL_WINOGRAD_CONVOLUTION
+#error "CL_WINOGRAD_CONVOLUTION is undefined"
+#endif // CL_WINOGRAD_CONVOLUTION
+
+#if CL_WINOGRAD_CONVOLUTION
+NONIUS_BENCHMARK("CLWinogradConvolutionLayer(NCHW)", [](nonius::chronometer meter) {
+  CLWinogradConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  CLTensor src_tensor{};
+  CLTensor dst_tensor{};
+  CLTensor ker_tensor{};
+  CLTensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NCHW>());
+  dst_tensor.allocator()->init(p.dst_info<NCHW>());
+  ker_tensor.allocator()->init(p.ker_info<NCHW>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                      p.pad_stride_info()));
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run
+  meter.measure([&](int) {
+    conv.run();
+    CLScheduler::get().sync();
+  });
+})
+
+NONIUS_BENCHMARK("CLWinogradConvolutionLayer(NHWC)", [](nonius::chronometer meter) {
+  CLWinogradConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  CLTensor src_tensor{};
+  CLTensor dst_tensor{};
+  CLTensor ker_tensor{};
+  CLTensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NHWC>());
+  dst_tensor.allocator()->init(p.dst_info<NHWC>());
+  ker_tensor.allocator()->init(p.ker_info<NHWC>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                      p.pad_stride_info()));
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run
+  meter.measure([&](int) {
+    conv.run();
+    CLScheduler::get().sync();
+  });
+})
+#endif // CL_WINOGRAD_CONVOLUTION
diff --git a/runtimes/contrib/uben/Softmax.cpp b/runtimes/contrib/uben/Softmax.cpp
new file mode 100644
index 000000000..1c4a6b197
--- /dev/null
+++ b/runtimes/contrib/uben/Softmax.cpp
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file Softmax benchmark
+ */
+
+#define NONIUS_RUNNER
+#include <nonius/nonius_single.h++>
+
+#include <cker/operation/SoftMax.h>
+
+#include <vector>
+
+//
+// Parameters
+//
+NONIUS_PARAM(LEN, 1000);
+
+//
+// Implementations
+//
+NONIUS_BENCHMARK("cker::Softmax(float)", [](nonius::chronometer meter) {
+  auto len = meter.param<LEN>();
+
+  nnfw::cker::SoftmaxParams params;
+  nnfw::cker::Shape shape{1, len};
+
+  params.beta = 1.0;
+
+  std::vector<float> input;
+  std::vector<float> output;
+
+  input.resize(len);
+  output.resize(len);
+
+  meter.measure([&](int) {
+    // Run!
+    nnfw::cker::Softmax(params, shape, input.data(), shape, output.data());
+  });
+})
diff --git a/runtimes/contrib/xtrace/CMakeLists.txt b/runtimes/contrib/xtrace/CMakeLists.txt
new file mode 100644
index 000000000..0c2748353
--- /dev/null
+++ b/runtimes/contrib/xtrace/CMakeLists.txt
@@ -0,0 +1,16 @@
+# Enable xtrace build only when there is an explicit user request
+option(BUILD_CONTRIB_XTRACE "Build xtrace" OFF)
+
+file(GLOB_RECURSE SOURCES "src/*.cc")
+
+add_executable(xtrace ${SOURCES})
+target_link_libraries(xtrace nnfw_lib_tflite)
+target_link_libraries(xtrace nnfw_lib_misc)
+target_link_libraries(xtrace nnfw_lib_cpp14)
+target_link_libraries(xtrace nnfw_lib_xray_pipe)
+target_link_libraries(xtrace nnfw_lib_xray_mux)
+target_link_libraries(xtrace nnfw_lib_xdata)
+target_link_libraries(xtrace ${LIB_PTHREAD})
+target_link_libraries(xtrace dl)
+
+install(TARGETS xtrace DESTINATION bin)
diff --git a/runtimes/contrib/xtrace/src/benchmark_event.cc b/runtimes/contrib/xtrace/src/benchmark_event.cc
new file mode 100644
index 000000000..54727d630
--- /dev/null
+++ b/runtimes/contrib/xtrace/src/benchmark_event.cc
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "benchmark_event.h"
+
+#include <xray/pipe.h>
+
+xray::event_code BMCategory::set(std::unique_ptr<BMEvent> &&event)
+{
+  _event = std::move(event);
+  return xray::event_code{0};
+}
+
+void BMCategory::reset(void) { _event.reset(); }
+
+void BMCategory::post(std::unique_ptr<BMEvent> &&evt_info)
+{
+  auto evt_cat = this;
+  auto evt_idx = set(std::move(evt_info));
+  const xray::event evt{evt_cat, evt_idx};
+  xray::pipe::post(&evt);
+  reset();
+}
diff --git a/runtimes/contrib/xtrace/src/benchmark_event.h b/runtimes/contrib/xtrace/src/benchmark_event.h
new file mode 100644
index 000000000..d544cb0c7
--- /dev/null
+++ b/runtimes/contrib/xtrace/src/benchmark_event.h
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __BENCHMARK_EVENT_H__
+#define __BENCHMARK_EVENT_H__
+
+#include <xray/event.h>
+#include <xray/event_code.h>
+#include <xray/event_category.h>
+
+#include <chrono>
+#include <memory>
+
+enum BMPhase
+{
+  Warmup,
+  Stable
+};
+
+struct BMEvent
+{
+  virtual ~BMEvent() = default;
+};
+
+struct BMBegin : public BMEvent
+{
+  BMPhase phase;
+  uint32_t cur_iter;
+};
+
+struct BMEnd : public BMEvent
+{
+  BMPhase phase;
+  uint32_t cur_iter;
+  std::chrono::milliseconds elapsed;
+};
+
+class BMCategory final : public xray::event_category
+{
+private:
+  BMCategory() = default;
+
+public:
+  xray::event_code set(std::unique_ptr<BMEvent> &&event);
+  void reset(void);
+
+public:
+  const BMEvent *event(void) const { return _event.get(); }
+
+private:
+  std::unique_ptr<BMEvent> _event;
+
+public:
+  static BMCategory *get(void)
+  {
+    static BMCategory cat;
+    return &cat;
+  }
+
+public:
+  void post(std::unique_ptr<BMEvent> &&event);
+};
+
+#endif // __BENCHMARK_EVENT_H__
diff --git a/runtimes/contrib/xtrace/src/benchmark_runner.cc b/runtimes/contrib/xtrace/src/benchmark_runner.cc
new file mode 100644
index 000000000..87ef1564f
--- /dev/null
+++ b/runtimes/contrib/xtrace/src/benchmark_runner.cc
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "benchmark_runner.h"
+#include "benchmark_event.h"
+
+#include <tensorflow/lite/model.h>
+
+#include <tflite/ext/kernels/register.h>
+#include <tflite/Assert.h>
+#include <tflite/NNAPISession.h>
+
+#include <misc/benchmark.h>
+
+#include <cpp14/memory.h>
+
+#include <iostream>
+
+using namespace tflite;
+using namespace nnfw::tflite;
+using namespace std::chrono;
+
+namespace
+{
+
+void notify(const BMBegin &event)
+{
+  BMCategory::get()->post(nnfw::cpp14::make_unique<BMBegin>(event));
+}
+
+void notify(const BMEnd &event) { BMCategory::get()->post(nnfw::cpp14::make_unique<BMEnd>(event)); }
+
+} // namespace
+
+void BMRunner<TFL_NNAPI_DELEGATE>::run(const std::string &filename) const
+{
+  BuiltinOpResolver op_resolver;
+  StderrReporter error_reporter;
+
+  auto model = FlatBufferModel::BuildFromFile(filename.c_str(), &error_reporter);
+
+  if (model == nullptr)
+  {
+    throw std::runtime_error{"Cannot create model"};
+  }
+
+  InterpreterBuilder builder(*model, op_resolver);
+
+  std::unique_ptr<Interpreter> interp;
+  TFLITE_ENSURE(builder(&interp));
+
+  auto sess = std::make_shared<nnfw::tflite::NNAPISession>(interp.release());
+
+  auto get_iteration_count = [](const BMPhase &phase) {
+    switch (phase)
+    {
+      case Warmup:
+        return 1; // Allow configuration
+      case Stable:
+        return 3;
+      default:
+        break;
+    }
+
+    throw std::runtime_error{"Error!"};
+  };
+
+  // Iteration!
+  for (auto phase : {Warmup, Stable})
+  {
+    uint32_t iteration_count = get_iteration_count(phase);
+
+    for (uint32_t n = 0; n < iteration_count; ++n)
+    {
+      // Notify event
+      {
+        BMBegin event;
+
+        event.phase = phase;
+        event.cur_iter = n;
+
+        notify(event);
+      }
+
+      sess->prepare();
+
+      std::chrono::milliseconds elapsed(0);
+      nnfw::misc::benchmark::measure(elapsed) << [&](void) {
+        if (!sess->run())
+        {
+          throw std::runtime_error{"run failed"};
+        }
+      };
+
+      sess->teardown();
+
+      // Notify
+      {
+        BMEnd event;
+
+        event.phase = phase;
+        event.cur_iter = n;
+        event.elapsed = elapsed;
+
+        notify(event);
+      }
+    }
+  }
+}
diff --git a/runtimes/contrib/xtrace/src/benchmark_runner.h b/runtimes/contrib/xtrace/src/benchmark_runner.h
new file mode 100644
index 000000000..40c5b510c
--- /dev/null
+++ b/runtimes/contrib/xtrace/src/benchmark_runner.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __BENCHMARK_RUNNER_H__
+#define __BENCHMARK_RUNNER_H__
+
+#include <string>
+
+using TFLModelPath = std::string;
+
+enum BMRunnerType
+{
+  // Use T/F Lite interpreter with Android NN API Delegate
+  TFL_NNAPI_DELEGATE
+};
+
+template <BMRunnerType E> struct BMRunner;
+
+template <> struct BMRunner<TFL_NNAPI_DELEGATE>
+{
+  void run(const TFLModelPath &filename) const;
+};
+
+#endif // __BENCHMARK_RUNNER_H__
diff --git a/runtimes/contrib/xtrace/src/event_collector.cc b/runtimes/contrib/xtrace/src/event_collector.cc
new file mode 100644
index 000000000..2b37bf460
--- /dev/null
+++ b/runtimes/contrib/xtrace/src/event_collector.cc
@@ -0,0 +1,157 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "event_collector.h"
+#include "benchmark_event.h"
+
+// xtrace-internal libraries
+#include "str.h"
+
+// NNFW-internal libraries
+#include <xdata.h>
+#include <cpp14/memory.h>
+
+// C++ standard libraries
+#include <chrono>
+#include <iostream>
+
+// POSIX standard libraries
+#include <sys/time.h>
+#include <sys/resource.h>
+
+using nnfw::cpp14::make_unique;
+
+namespace
+{
+
+std::string timestamp(void)
+{
+  auto now = std::chrono::steady_clock::now();
+  return std::to_string(
+      std::chrono::duration_cast<std::chrono::microseconds>(now.time_since_epoch()).count());
+}
+
+class DurationEventBuilder
+{
+public:
+  DurationEventBuilder(const std::string &ts) : _ts{ts} {}
+
+  DurationEvent build(const std::string &name, const std::string &ph) const
+  {
+    DurationEvent evt;
+
+    evt.name = name;
+    evt.ph = ph;
+    evt.ts = _ts;
+
+    return evt;
+  }
+
+private:
+  std::string _ts;
+};
+
+void emit_rusage(EventRecorder *rec, const std::string &ts)
+{
+  struct rusage ru;
+
+  getrusage(RUSAGE_SELF, &ru);
+  {
+    CounterEvent evt;
+
+    evt.name = "maxrss";
+    evt.ph = "C";
+    evt.ts = ts;
+    evt.values["value"] = std::to_string(ru.ru_maxrss);
+
+    rec->emit(evt);
+  }
+
+  {
+    CounterEvent evt;
+
+    evt.name = "minflt";
+    evt.ph = "C";
+    evt.ts = ts;
+    evt.values["value"] = std::to_string(ru.ru_minflt);
+
+    rec->emit(evt);
+  }
+}
+
+std::ostream &operator<<(std::ostream &os, const BMPhase &phase)
+{
+  os << ((phase == Warmup) ? "Warmup" : "Iteration");
+  return os;
+}
+
+std::ostream &operator<<(std::ostream &os, const std::chrono::milliseconds &dur)
+{
+  os << dur.count();
+  return os;
+}
+
+} // namespace
+
+void EventCollector::notify(const xray::event *e)
+{
+  auto ts = timestamp();
+
+  // Record trace events (region enter/leave)
+  if (e->cat() == xdata::trace::category::get())
+  {
+    auto info = xdata::trace::category::get()->info();
+
+    switch (info->action())
+    {
+      case xdata::trace::enter:
+        _rec->emit(DurationEventBuilder(ts).build(info->region()->name(), "B"));
+        break;
+
+      case xdata::trace::leave:
+        _rec->emit(DurationEventBuilder(ts).build(info->region()->name(), "E"));
+        break;
+    }
+  }
+
+  // Record benchmark events
+  if (e->cat() == BMCategory::get())
+  {
+    auto make_head = [](const BMPhase &phase, uint32_t iter) { return str(phase, " ", iter); };
+
+    if (auto info = dynamic_cast<const BMBegin *>(BMCategory::get()->event()))
+    {
+      auto name = str(info->phase, info->cur_iter);
+      _rec->emit(DurationEventBuilder(ts).build(name, "B"));
+
+      auto head = make_head(info->phase, info->cur_iter);
+      std::cout << head << std::endl;
+    }
+
+    if (auto info = dynamic_cast<const BMEnd *>(BMCategory::get()->event()))
+    {
+      auto name = str(info->phase, info->cur_iter);
+      _rec->emit(DurationEventBuilder(ts).build(name, "E"));
+
+      auto head = make_head(info->phase, info->cur_iter);
+      std::cout << head << " - done " << std::endl;
+      std::cout << head << " takes " << info->elapsed << "ms" << std::endl;
+    }
+  }
+
+  // Trace resource usage per each event notification
+  emit_rusage(_rec, ts);
+}
diff --git a/runtimes/contrib/xtrace/src/event_collector.h b/runtimes/contrib/xtrace/src/event_collector.h
new file mode 100644
index 000000000..f088ecd0b
--- /dev/null
+++ b/runtimes/contrib/xtrace/src/event_collector.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __EVENT_COLLECTOR_H__
+#define __EVENT_COLLECTOR_H__
+
+#include "event_recorder.h"
+
+#include <xray/mux.h>
+
+class EventCollector final : public xray::listener
+{
+public:
+  EventCollector(EventRecorder *rec) : _rec{rec}
+  {
+    // DO NOTHING
+  }
+
+public:
+  void notify(const xray::event *e) final;
+
+private:
+  EventRecorder *_rec = nullptr;
+};
+
+#endif // __EVENT_COLLECTOR_H__
diff --git a/runtimes/contrib/xtrace/src/event_recorder.cc b/runtimes/contrib/xtrace/src/event_recorder.cc
new file mode 100644
index 000000000..780eae19b
--- /dev/null
+++ b/runtimes/contrib/xtrace/src/event_recorder.cc
@@ -0,0 +1,130 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "event_recorder.h"
+#include "str.h"
+
+#include <vector>
+
+namespace
+{
+
+std::string quote(const std::string &value)
+{
+  std::stringstream ss;
+  ss << '"' << value << '"';
+  return ss.str();
+}
+
+std::string field(const std::string &k, const std::string &v)
+{
+  std::stringstream ss;
+  ss << quote(k) << " : " << quote(v);
+  return ss.str();
+}
+
+struct Content // One Entry in Chrome Event Trace
+{
+  std::vector<std::pair<std::string, std::string>> flds;
+  std::vector<std::pair<std::string, std::string>> args;
+};
+
+std::string object(const Content &content)
+{
+  std::stringstream ss;
+
+  ss << "{ ";
+
+  ss << field(content.flds[0].first, content.flds[0].second);
+
+  for (uint32_t n = 1; n < content.flds.size(); ++n)
+  {
+    ss << ", " << field(content.flds.at(n).first, content.flds.at(n).second);
+  }
+
+  if (content.args.size() > 0)
+  {
+    ss << ", " << quote("args") << " : { ";
+    ss << field(content.args.at(0).first, content.args.at(0).second);
+
+    for (uint32_t n = 1; n < content.args.size(); ++n)
+    {
+      ss << ", " << field(content.args.at(n).first, content.args.at(n).second);
+    }
+
+    ss << "}";
+  }
+
+  ss << " }";
+
+  return ss.str();
+}
+
+void fill(Content &content, const Event &evt)
+{
+  content.flds.emplace_back("name", evt.name);
+  content.flds.emplace_back("pid", "0");
+  content.flds.emplace_back("tid", "0");
+  content.flds.emplace_back("ph", evt.ph);
+  content.flds.emplace_back("ts", evt.ts);
+}
+
+std::string object(const DurationEvent &evt)
+{
+  Content content;
+
+  fill(content, evt);
+
+  return ::object(content);
+}
+
+std::string object(const CounterEvent &evt)
+{
+  Content content;
+
+  fill(content, evt);
+
+  for (auto it = evt.values.begin(); it != evt.values.end(); ++it)
+  {
+    content.args.emplace_back(it->first, it->second);
+  }
+
+  return ::object(content);
+}
+
+} // namespace
+
+void EventRecorder::init()
+{
+  _os << "{" << std::endl;
+  _os << "  " << quote("traceEvents") << ": [" << std::endl;
+}
+
+void EventRecorder::emit(const DurationEvent &evt)
+{
+  _os << "    " << object(evt) << "," << std::endl;
+}
+void EventRecorder::emit(const CounterEvent &evt)
+{
+  _os << "    " << object(evt) << "," << std::endl;
+}
+
+void EventRecorder::fini()
+{
+  _os << "    { }" << std::endl;
+  _os << "  ]" << std::endl;
+  _os << "}" << std::endl;
+}
diff --git a/runtimes/contrib/xtrace/src/event_recorder.h b/runtimes/contrib/xtrace/src/event_recorder.h
new file mode 100644
index 000000000..9cc992178
--- /dev/null
+++ b/runtimes/contrib/xtrace/src/event_recorder.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __EVENT_RECORDER_H__
+#define __EVENT_RECORDER_H__
+
+#include <map>
+#include <memory>
+
+#include <ostream>
+
+struct Event
+{
+  std::string name;
+  std::string ph; /* REQUIRED */
+  std::string ts; /* REQUIRED */
+};
+
+struct DurationEvent : public Event
+{
+  // TO BE FILLED
+};
+
+struct CounterEvent : public Event
+{
+  std::map<std::string, std::string> values;
+};
+
+//
+// Record Event as Chrome Trace Event File Format
+//
+// Refrence: https://docs.google.com/document/d/1CvAClvFfyA5R-PhYUmn5OOQtYMH4h6I0nSsKchNAySU/edit
+//
+class EventRecorder
+{
+public:
+  EventRecorder(std::ostream &os) : _os(os)
+  {
+    // DO NOTHING
+  }
+
+public:
+  void init();
+
+public:
+  void emit(const DurationEvent &evt);
+  void emit(const CounterEvent &evt);
+
+public:
+  void fini();
+
+private:
+  std::ostream &_os;
+};
+
+#endif // __EVENT_RECORDER_H__
diff --git a/runtimes/contrib/xtrace/src/str.h b/runtimes/contrib/xtrace/src/str.h
new file mode 100644
index 000000000..a6d53a535
--- /dev/null
+++ b/runtimes/contrib/xtrace/src/str.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __STR_H__
+#define __STR_H__
+
+#include <ostream>
+#include <sstream>
+
+template <typename Arg> void _str(std::ostream &os, Arg &&arg) { os << std::forward<Arg>(arg); }
+
+template <typename Arg, typename... Args> void _str(std::ostream &os, Arg &&arg, Args &&... args)
+{
+  _str(os, std::forward<Arg>(arg));
+  _str(os, std::forward<Args>(args)...);
+}
+
+template <typename... Args> std::string str(Args &&... args)
+{
+  std::stringstream ss;
+  _str(ss, std::forward<Args>(args)...);
+  return ss.str();
+}
+
+#endif // __STR_H__
diff --git a/runtimes/contrib/xtrace/src/xtrace.cc b/runtimes/contrib/xtrace/src/xtrace.cc
new file mode 100644
index 000000000..117a2e663
--- /dev/null
+++ b/runtimes/contrib/xtrace/src/xtrace.cc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "event_recorder.h"
+#include "event_collector.h"
+#include "benchmark_runner.h"
+
+#include <cassert>
+#include <fstream>
+#include <iostream>
+#include <string>
+
+// xtrace --out <output path> <T/F Lite model path)
+static int entry(int argc, char **argv)
+{
+  assert(argc == 4);
+  assert(std::string(argv[1]) == "--out");
+
+  // Create a file
+  std::ofstream ofs{argv[2], std::ofstream::out};
+
+  // Create an event recorder
+  EventRecorder recorder{ofs};
+
+  recorder.init();
+
+  EventCollector event_collector{&recorder};
+
+  xray::mux::get().attach(&event_collector);
+
+  BMRunner<TFL_NNAPI_DELEGATE>().run(argv[3]);
+
+  xray::mux::get().detach(&event_collector);
+
+  recorder.fini();
+
+  return 0;
+}
+
+int main(int argc, char **argv)
+{
+  try
+  {
+    return entry(argc, argv);
+  }
+  catch (const std::exception &e)
+  {
+    std::cerr << e.what() << std::endl;
+    return 255;
+  }
+}
diff --git a/runtimes/include/NeuralNetworks.h b/runtimes/include/NeuralNetworks.h
new file mode 100644
index 000000000..7400806d8
--- /dev/null
+++ b/runtimes/include/NeuralNetworks.h
@@ -0,0 +1,6444 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @addtogroup NeuralNetworks
+ * @{
+ */
+
+/**
+ * @file NeuralNetworks.h
+ */
+
+#ifndef ANDROID_ML_NN_RUNTIME_NEURAL_NETWORKS_H
+#define ANDROID_ML_NN_RUNTIME_NEURAL_NETWORKS_H
+
+/******************************************************************
+ *
+ * IMPORTANT NOTICE:
+ *
+ *   This file is part of Android's set of stable system headers
+ *   exposed by the Android NDK (Native Development Kit).
+ *
+ *   Third-party source AND binary code relies on the definitions
+ *   here to be FROZEN ON ALL UPCOMING PLATFORM RELEASES.
+ *
+ *   - DO NOT MODIFY ENUMS (EXCEPT IF YOU ADD NEW 32-BIT VALUES)
+ *   - DO NOT MODIFY CONSTANTS OR FUNCTIONAL MACROS
+ *   - DO NOT CHANGE THE SIGNATURE OF FUNCTIONS IN ANY WAY
+ *   - DO NOT CHANGE THE LAYOUT OR SIZE OF STRUCTURES
+ */
+
+// For compatibility with android, check __ANDROID_API__ is defined
+// If __ANDROID_API__ is pre-defined, this header may be used for android
+#ifndef __ANDROID_API__
+#define __ANDROID_API__ 29
+#define __ANDROID_API_Q__ 29
+#define __INTRODUCED_IN(api_level)
+typedef struct AHardwareBuffer AHardwareBuffer;
+#else
+#include <android/hardware_buffer.h>
+#endif // __ANDROID_API__
+#include <stddef.h>
+#include <stdint.h>
+#include <sys/cdefs.h>
+
+__BEGIN_DECLS
+
+/**
+ * Operand types.
+ *
+ * The type of operands that can be added to a model.
+ *
+ * Although we define many types, most operators accept just a few
+ * types. Most used are {@link ANEURALNETWORKS_TENSOR_FLOAT32},
+ * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+ * and {@link ANEURALNETWORKS_INT32}.
+ *
+ * Available since API level 27.
+ */
+typedef enum {
+    /** A 32 bit floating point scalar value. */
+    ANEURALNETWORKS_FLOAT32 = 0,
+    /** A signed 32 bit integer scalar value. */
+    ANEURALNETWORKS_INT32 = 1,
+    /** An unsigned 32 bit integer scalar value. */
+    ANEURALNETWORKS_UINT32 = 2,
+    /** A tensor of 32 bit floating point values. */
+    ANEURALNETWORKS_TENSOR_FLOAT32 = 3,
+    /** A tensor of 32 bit integer values. */
+    ANEURALNETWORKS_TENSOR_INT32 = 4,
+    /**
+     * A tensor of 8 bit unsigned integers that represent real numbers.
+     *
+     * Attached to this tensor are two numbers that can be used to convert the
+     * 8 bit integer to the real value and vice versa. These two numbers are:
+     * - scale: a 32 bit floating point value greater than zero.
+     * - zeroPoint: a 32 bit integer, in range [0, 255].
+     *
+     * The formula is:
+     *   real_value = (integer_value - zeroPoint) * scale.
+     */
+    ANEURALNETWORKS_TENSOR_QUANT8_ASYMM = 5,
+#if __ANDROID_API__ >= __ANDROID_API_Q__
+    /**
+     * An 8 bit boolean scalar value.
+     *
+     * Values of this operand type are either true or false. A zero value
+     * represents false; any other value represents true.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_BOOL = 6,
+    /**
+     * A tensor of 16 bit signed integers that represent real numbers.
+     *
+     * Attached to this tensor is a number representing real value scale that is
+     * used to convert the 16 bit number to a real value in the following way:
+     * realValue = integerValue * scale.
+     *
+     * scale is a 32 bit floating point with value greater than zero.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_TENSOR_QUANT16_SYMM = 7,
+    /**
+     * A tensor of IEEE 754 16 bit floating point values.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_TENSOR_FLOAT16 = 8,
+    /**
+     * A tensor of 8 bit boolean values.
+     *
+     * Values of this operand type are either true or false. A zero value
+     * represents false; any other value represents true.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_TENSOR_BOOL8 = 9,
+    /**
+     * An IEEE 754 16 bit floating point scalar value.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_FLOAT16 = 10,
+    /**
+     * A tensor of 8 bit signed integers that represent real numbers.
+     *
+     * This tensor is associated with additional fields that can
+     * be used to convert the 8 bit signed integer to the real value and vice versa.
+     * These fields are:
+     * - channelDim: a 32 bit unsigned integer indicating channel dimension.
+     * - scales: an array of positive 32 bit floating point values.
+     * The size of the scales array must be equal to dimensions[channelDim].
+     *
+     * {@link ANeuralNetworksModel_setOperandSymmPerChannelQuantParams} must be used
+     * to set the parameters for an Operand of this type.
+     *
+     * The channel dimension of this tensor must not be unknown (dimensions[channelDim] != 0).
+     *
+     * The formula is:
+     * realValue[..., C, ...] =
+     *     integerValue[..., C, ...] * scales[C]
+     * where C is an index in the Channel dimension.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL = 11,
+
+    /**
+     * A tensor of 16 bit unsigned integers that represent real numbers.
+     *
+     * Attached to this tensor are two numbers that can be used to convert the
+     * 16 bit integer to the real value and vice versa. These two numbers are:
+     * - scale: a 32 bit floating point value greater than zero.
+     * - zeroPoint: a 32 bit integer, in range [0, 65535].
+     *
+     * The formula is:
+     * real_value = (integer_value - zeroPoint) * scale.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_TENSOR_QUANT16_ASYMM = 12,
+
+    /**
+     * A tensor of 8 bit signed integers that represent real numbers.
+     *
+     * Attached to this tensor is a number representing real value scale that is
+     * used to convert the 8 bit number to a real value in the following way:
+     * realValue = integerValue * scale.
+     *
+     * scale is a 32 bit floating point with value greater than zero.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_TENSOR_QUANT8_SYMM = 13,
+#endif  // __ANDROID_API__ >= __ANDROID_API_Q__
+
+} OperandCode;
+
+/**
+ * Operation types.
+ *
+ * The type of operations that can be added to a model.
+ *
+ * Available since API level 27.
+ */
+typedef enum {
+    // Operations below are available since API level 27.
+
+    /**
+     * Adds two tensors, element-wise.
+     *
+     * Takes two input tensors of identical {@link OperandCode} and compatible
+     * dimensions. The output is the sum of both input tensors, optionally
+     * modified by an activation function.
+     *
+     * Two dimensions are compatible when:
+     *     1. they are equal, or
+     *     2. one of them is 1
+     *
+     * The size of the output is the maximum size along each dimension of the
+     * input operands. It starts with the trailing dimensions, and works its
+     * way forward.
+     *
+     * Example:
+     *
+     *     input1.dimension = {4, 1, 2}
+     *     input2.dimension = {5, 4, 3, 1}
+     *     output.dimension = {5, 4, 3, 2}
+     *
+     * Since API level 29, generic zero-sized input tensor is supported. Zero
+     * dimension is only compatible with 0 or 1. The size of the output
+     * dimension is zero if either of corresponding input dimension is zero.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: A tensor.
+     * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
+     *      as input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scales and zeroPoint can be different from input0 scale and zeroPoint.
+     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *      {@link FuseCode} values. Specifies the activation to
+     *      invoke on the result.
+     *
+     * Outputs:
+     * * 0: The sum, a tensor of the same {@link OperandCode} as input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint can be different from inputs' scale and zeroPoint.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_ADD = 0,
+
+    /**
+     * Performs a 2-D average pooling operation.
+     *
+     * The output dimensions are functions of the filter dimensions, stride, and
+     * padding.
+     *
+     * The values in the output tensor are computed as:
+     *
+     *     output[b, i, j, channel] =
+     *         sum_{di, dj}(
+     *             input[b, strides[1] * i + di, strides[2] * j + dj, channel]
+     *         ) / sum(1)
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: 4, with "NHWC" or "NCHW" data layout.
+     * With the default data layout NHWC, the data is stored in the order of:
+     * [batch, height, width, channels]. Alternatively, the data layout could
+     * be NCHW, the data storage order of: [batch, channels, height, width].
+     *
+     * Both explicit padding and implicit padding are supported.
+     *
+     * Inputs (explicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input. Since API level 29, zero batches is supported for this
+     *      tensor.
+     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the left, in the ‘width’ dimension.
+     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the right, in the ‘width’ dimension.
+     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the top, in the ‘height’ dimension.
+     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the bottom, in the ‘height’ dimension.
+     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
+     *      width.
+     * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
+     *      height.
+     * * 9: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *      {@link FuseCode} values. Specifies the activation to
+     *      invoke on the result.
+     * * 10: An optional {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *       Set to true to specify NCHW data layout for input0 and output0.
+     *       Available since API level 29.
+     *
+     * Inputs (implicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input. Since API level 29, zero batches is supported for this
+     *      tensor.
+     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the implicit
+     *      padding scheme, has to be one of the
+     *      {@link PaddingCode} values.
+     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
+     *      width.
+     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
+     *      height.
+     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *      {@link FuseCode} values. Specifies the activation to
+     *      invoke on the result.
+     * * 7: An optional {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *      Set to true to specify NCHW data layout for input0 and output0.
+     *      Available since API level 29.
+     *
+     * Outputs:
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, out_height, out_width, depth].
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_AVERAGE_POOL_2D = 1,
+
+    /**
+     * Concatenates the input tensors along the given dimension.
+     *
+     * The input tensors must have identical {@link OperandCode} and the same
+     * dimensions except the dimension along the concatenation axis.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} (full support since API
+     *   level 29, see the input section)
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0 ~ n-1: The list of n input tensors, of shape
+     *            [D0, D1, ..., Daxis(i), ..., Dm].
+     *            Before API level 29, all input tensors of
+     *            {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *            must have the same scale and zeroPoint as the output tensor.
+     *            Since API level 29, zero-sized tensors are supported.
+     * * n: An {@link ANEURALNETWORKS_INT32} scalar, specifying the
+     *      concatenation axis.
+     *
+     * Outputs:
+     * * 0: The output, a tensor of the same {@link OperandCode} as the input
+     *      tensors. The output shape is [D0, D1, ..., sum(Daxis(i)), ..., Dm].
+     *      Since API level 29, for a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint values can be different from
+     *      input tensors. Before API level 29 they have to be the same as for the input tensors.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_CONCATENATION = 2,
+
+    /**
+     * Performs an 2-D convolution operation.
+     *
+     * The CONV_2D op sweeps a 2-D filter that can mix channels together over a
+     * batch of images, applying the filter to each window of each image of the
+     * appropriate size.
+     *
+     * The output dimensions are functions of the filter dimensions, stride, and
+     * padding.
+     *
+     * The values in the output tensor are computed as:
+     *
+     *     output[b, i, j, channel] =
+     *         sum_{di, dj, k} (
+     *             input[b, strides[1] * i + di, strides[2] * j + dj, k] *
+     *             filter[channel, di, dj, k]
+     *         ) + bias[channel]
+     *
+     * Supported tensor {@link OperandCode} configurations:
+     * * 32 bit floating point:
+     * * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} for input, filter, output, and bias.
+     *
+     * * Quantized:
+     * * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} for input, filter, and output.
+     * * * {@link ANEURALNETWORKS_TENSOR_INT32} for bias (with scale set to
+     * * * input.scale * filter.scale).
+     *
+     * Available since API level 29:
+     * * 16 bit floating point:
+     * * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} for input, filter, output, and bias.
+     *
+     * * Quantized with symmetric per channel quantization for the filter:
+     * * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} for input, and output.
+     * * * {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL} for filter.
+     * * * {@link ANEURALNETWORKS_TENSOR_INT32} for bias (scale set to 0.0,
+     * * * each value scaling is separate and equal to input.scale * filter.scales[channel]).
+     *
+     * Supported tensor rank: 4, with "NHWC" or "NCHW" data layout.
+     * With the default data layout NHWC, the data is stored in the order of:
+     * [batch, height, width, channels]. Alternatively, the data layout could
+     * be NCHW, the data storage order of: [batch, channels, height, width].
+     *
+     * Both explicit padding and implicit padding are supported.
+     *
+     * Inputs (explicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input. Since API level 29, zero batches is supported
+     *      for this tensor.
+     * * 1: A 4-D tensor, of shape
+     *      [depth_out, filter_height, filter_width, depth_in], specifying the
+     *      filter. For tensor of type
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL} the channel
+     *      dimension (extraParams.channelQuant.channelDim) must be set to 0.
+     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
+     *      tensor of type {@link ANEURALNETWORKS_TENSOR_FLOAT32} or
+     *      {@link ANEURALNETWORKS_TENSOR_FLOAT16}, the bias must be of the same
+     *      type. For filter tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+     *      the bias should be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint
+     *      of 0 and bias_scale == input_scale * filter_scale. For filter tensor
+     *      of {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL}, the bias
+     *      should be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of
+     *      0 and bias_scale of 0. The actual scale of each value 'i' is equal to
+     *      bias_scale[i] = input_scale * filter_scale[i].
+     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the left, in the ‘width’ dimension.
+     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the right, in the ‘width’ dimension.
+     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the top, in the ‘height’ dimension.
+     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the bottom, in the ‘height’ dimension.
+     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 9: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *      {@link FuseCode} values. Specifies the activation to
+     *      invoke on the result.
+     * * 10: An optional {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *      Set to true to specify NCHW data layout for input0 and output0.
+     *      Available since API level 29.
+     * * 11: An optional {@link ANEURALNETWORKS_INT32} scalar, specifying the dilation
+     *      factor for width. Defaults to 1. If set to k > 1, there will be k-1 skipped
+     *      cells between each filter element on width dimension. If this input is set,
+     *      input 12 (dilation factor for height) must be specified as well.
+     *      Available since API level 29.
+     * * 12: An optional {@link ANEURALNETWORKS_INT32} scalar, specifying the dilation
+     *      factor for height. Defaults to 1. If set to k > 1, there will be k-1 skipped
+     *      cells between each filter element on height dimension. If this input is set,
+     *      input 11 (dilation factor for width) must be specified as well.
+     *      Available since API level 29.
+     *
+     * Inputs (implicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input. Since API level 29, zero batches is supported
+     *      for this tensor.
+     * * 1: A 4-D tensor, of shape
+     *      [depth_out, filter_height, filter_width, depth_in], specifying the
+     *      filter. For tensor of type
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL} the channel
+     *      dimension (extraParams.channelQuant.channelDim) must be set to 0.
+     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
+     *      tensor of type {@link ANEURALNETWORKS_TENSOR_FLOAT32} or
+     *      {@link ANEURALNETWORKS_TENSOR_FLOAT16}, the bias must be of the same
+     *      type. For filter tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+     *      the bias should be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint
+     *      of 0 and bias_scale == input_scale * filter_scale. For filter tensor
+     *      of {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL}, the bias
+     *      should be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of
+     *      0 and bias_scale of 0. The actual scale of each value 'i' is equal to
+     *      bias_scale[i] = input_scale * filter_scale[i].
+     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the implicit
+     *      padding scheme, has to be one of the
+     *      {@link PaddingCode} values.
+     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *      {@link FuseCode} values. Specifies the activation to
+     *      invoke on the result.
+     * * 7: An optional {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *      Set to true to specify NCHW data layout for input0 and output0.
+     *      Available since API level 29.
+     * * 8: An optional {@link ANEURALNETWORKS_INT32} scalar, specifying the dilation
+     *      factor for width. Defaults to 1. If set to k > 1, there will be k-1 skipped
+     *      cells between each filter element on width dimension. If this input is set,
+     *      input 9 (dilation factor for height) must be specified as well.
+     *      Available since API level 29.
+     * * 9: An optional {@link ANEURALNETWORKS_INT32} scalar, specifying the dilation
+     *      factor for height. Defaults to 1. If set to k > 1, there will be k-1 skipped
+     *      cells between each filter element on height dimension. If this input is set,
+     *      input 8 (dilation factor for width) must be specified as well.
+     *      Available since API level 29.
+     *
+     * Outputs:
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, out_height, out_width, depth_out]. Before API level 29,
+     *      for output tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+     *      the following condition must be satisfied:
+     *      output_scale > input_scale * filter_scale
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_CONV_2D = 3,
+
+    /**
+     * Performs a depthwise 2-D convolution operation.
+     *
+     * Given an input tensor of shape [batches, height, width, depth_in] and a
+     * filter tensor of shape [1, filter_height, filter_width, depth_out]
+     * containing depth_out convolutional filters of depth 1, DEPTHWISE_CONV
+     * applies a different filter to each input channel (expanding from 1
+     * channel to channel_multiplier channels for each), then concatenates the
+     * results together.
+     *
+     * The output has depth_out = depth_in * depth_multiplier channels.
+     * The output dimensions are functions of the filter dimensions, stride, and
+     * padding.
+     *
+     * The values in the output tensor are computed as:
+     *
+     *     output[b, i, j, k * channel_multiplier + q] =
+     *         sum_{di, dj} (
+     *             input[b, strides[1] * i + di, strides[2] * j + dj, k] *
+     *             filter[1, di, dj, k * channel_multiplier + q]
+     *         ) + bias[k * channel_multiplier + q]
+     *
+     * Supported tensor {@link OperandCode} configurations:
+     * * 32 bit floating point:
+     * * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} for input, filter, output, and bias.
+     *
+     * * Quantized:
+     * * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} for input, filter, and output.
+     * * * {@link ANEURALNETWORKS_TENSOR_INT32} for bias (with scale set to
+     * * * input.scale * filter.scale).
+     *
+     * Available since API level 29:
+     * * 16 bit floating point:
+     * * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} for input, filter, output, and bias.
+     *
+     * * Quantized with symmetric per channel quantization for the filter:
+     * * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} for input, and output.
+     * * * {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL} for filter.
+     * * * {@link ANEURALNETWORKS_TENSOR_INT32} for bias (scale set to 0.0,
+     * * * each value scaling is separate and equal to input.scale * filter.scales[channel]).
+     *
+     * Supported tensor rank: 4, with "NHWC" or "NCHW" data layout.
+     * With the default data layout NHWC, the data is stored in the order of:
+     * [batch, height, width, channels]. Alternatively, the data layout could
+     * be NCHW, the data storage order of: [batch, channels, height, width].
+     *
+     * Both explicit padding and implicit padding are supported.
+     *
+     * Inputs (explicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input.
+     * * 1: A 4-D tensor, of shape [1, filter_height, filter_width, depth_out],
+     *      specifying the filter. For tensor of type
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL} the channel
+     *      dimension (extraParams.channelQuant.channelDim) must be set to 3.
+     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
+     *      tensor of type {@link ANEURALNETWORKS_TENSOR_FLOAT32} or
+     *      {@link ANEURALNETWORKS_TENSOR_FLOAT16}, the bias must be of the same
+     *      type. For filter tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+     *      the bias should be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint
+     *      of 0 and bias_scale == input_scale * filter_scale. For filter tensor
+     *      of {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL}, the bias
+     *      should be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of
+     *      0 and bias_scale of 0. The actual scale of each value 'i' is equal to
+     *      bias_scale[i] = input_scale * filter_scale[i].
+     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the left, in the ‘width’ dimension.
+     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the right, in the ‘width’ dimension.
+     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the top, in the ‘height’ dimension.
+     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the bottom, in the ‘height’ dimension.
+     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 9: An {@link ANEURALNETWORKS_INT32} scalar, specifying the depthwise
+     *      multiplier.
+     * * 10: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *       {@link FuseCode} values. Specifies the activation to
+     *       invoke on the result.
+     * * 11: An optional {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *       Set to true to specify NCHW data layout for input0 and output0.
+     *       Available since API level 29.
+     * * 12: An optional {@link ANEURALNETWORKS_INT32} scalar, specifying the dilation
+     *      factor for width. Defaults to 1. If set to k > 1, there will be k-1 skipped
+     *      cells between each filter element on width dimension. If this input is set,
+     *      input 13 (dilation factor for height) must be specified as well.
+     *      Available since API level 29.
+     * * 13: An optional {@link ANEURALNETWORKS_INT32} scalar, specifying the dilation
+     *      factor for height. Defaults to 1. If set to k > 1, there will be k-1 skipped
+     *      cells between each filter element on height dimension. If this input is set,
+     *      input 12 (dilation factor for width) must be specified as well.
+     *      Available since API level 29.
+     *
+     * Inputs (implicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input.
+     * * 1: A 4-D tensor, of shape [1, filter_height, filter_width, depth_out],
+     *      specifying the filter.
+     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
+     *      tensor of type {@link ANEURALNETWORKS_TENSOR_FLOAT32} or
+     *      {@link ANEURALNETWORKS_TENSOR_FLOAT16}, the bias must be of the same
+     *      type. For filter tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+     *      the bias should be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint
+     *      of 0 and bias_scale == input_scale * filter_scale. For filter tensor
+     *      of {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL}, the bias
+     *      should be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of
+     *      0 and bias_scale of 0. The actual scale of each value 'i' is equal to
+     *      bias_scale[i] = input_scale * filter_scale[i].
+     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the implicit
+     *      padding scheme, has to be one of the
+     *      {@link PaddingCode} values.
+     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the depthwise
+     *      multiplier.
+     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *      {@link FuseCode} values. Specifies the activation to
+     *      invoke on the result.
+     * * 8: An optional {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *      Set to true to specify NCHW data layout for input0 and output0.
+     *      Available since API level 29.
+     * * 9: An optional {@link ANEURALNETWORKS_INT32} scalar, specifying the dilation
+     *      factor for width. Defaults to 1. If set to k > 1, there will be k-1 skipped
+     *      cells between each filter element on width dimension. If this input is set,
+     *      input 10 (dilation factor for height) must be specified as well.
+     *      Available since API level 29.
+     * * 10: An optional {@link ANEURALNETWORKS_INT32} scalar, specifying the dilation
+     *      factor for height. Defaults to 1. If set to k > 1, there will be k-1 skipped
+     *      cells between each filter element on height dimension. If this input is set,
+     *      input 9 (dilation factor for width) must be specified as well.
+     *      Available since API level 29.
+
+     *
+     * Outputs:
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, out_height, out_width, depth_out]. Before API level 29,
+     *      for output tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+     *      the following condition must be satisfied:
+     *      output_scale > input_scale * filter_scale
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_DEPTHWISE_CONV_2D = 4,
+
+    /**
+     * Rearranges data from depth into blocks of spatial data.
+     *
+     * More specifically, this op outputs a copy of the input tensor where
+     * values from the depth dimension are moved in spatial blocks to the height
+     * and width dimensions. The value block_size indicates the input block size
+     * and how the data is moved.
+     *
+     * Chunks of data of size block_size * block_size from depth are rearranged
+     * into non-overlapping blocks of size block_size x block_size.
+     *
+     * The width of the output tensor is input_depth * block_size, whereas the
+     * height is input_height * block_size. The depth of the input tensor must
+     * be divisible by block_size * block_size
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: 4, with "NHWC" or "NCHW" data layout.
+     * With the default data layout NHWC, the data is stored in the order of:
+     * [batch, height, width, channels]. Alternatively, the data layout could
+     * be NCHW, the data storage order of: [batch, channels, height, width].
+     *
+     * Inputs:
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input.
+     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the block_size.
+     *      block_size must be >=1 and block_size * block_size must be a divisor
+     *      of the input depth.
+     * * 2: An optional {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *      Set to true to specify NCHW data layout for input0 and output0.
+     *      Available since API level 29.
+     *
+     * Outputs:
+     * * 0: The output 4-D tensor, of shape [batch, height*block_size,
+     *      width*block_size, depth/(block_size*block_size)].
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_DEPTH_TO_SPACE = 5,
+
+    /**
+     * Dequantizes the input tensor.
+     *
+     * The formula is:
+     *
+     *     output = (input - zeroPoint) * scale.
+     *
+     * Supported input tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL} (since API level 29)
+     *
+     * Supported output tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}.
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: A tensor. Since API level 29, this tensor may be zero-sized.
+     *
+     * Outputs:
+     * * 0: A tensor with the same shape as input0.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_DEQUANTIZE = 6,
+
+    /**
+     * Looks up sub-tensors in the input tensor.
+     *
+     * This operator takes for input a tensor of values (Values) and
+     * a one-dimensional tensor of selection indices (Lookups).
+     * The output tensor is the concatenation of sub-tensors of Values as
+     * selected by Lookups.
+     *
+     * Think of Values as being sliced along its first dimension:
+     * The entries in Lookups select which slices are concatenated together
+     * to create the output tensor.
+     *
+     * For example, if Values has shape of [40, 200, 300] and
+     * Lookups has shape of [3], all three values found in Lookups are
+     * expected to be between 0 and 39. The resulting tensor must
+     * have shape of [3, 200, 300].
+     *
+     * If a value in Lookups is out of bounds, the operation must fail
+     * and an error must be reported.
+     *
+     * Supported value tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported value tensor rank: from 2
+     *
+     * Inputs:
+     * * 0: Lookups. A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}.
+     *      The values are indices into the first dimension of Values.
+     * * 1: Values. An n-D tensor, where n >= 2, from which sub-tensors are
+     *      extracted.
+     *
+     * Output:
+     * * 0: A n-D tensor with the same rank and shape as the Values
+     *      tensor, except for the first dimension which has the same size
+     *      as Lookups' only dimension.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input1.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_EMBEDDING_LOOKUP = 7,
+
+    /**
+     * Computes element-wise floor() on the input tensor.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: A tensor.
+     *
+     * Outputs:
+     * * 0: The output tensor, of the same {@link OperandCode} and dimensions as
+     *      the input tensor.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_FLOOR = 8,
+
+    /**
+     * Denotes a fully (densely) connected layer, which connects all elements
+     * in the input tensor with each element in the output tensor.
+     *
+     * This layer implements the operation:
+     *
+     *     outputs = activation(inputs * weights’ + bias)
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: up to 4.
+     *
+     * Inputs:
+     * * 0: A tensor of at least rank 2, specifying the input. If rank is
+     *      greater than 2, then it gets flattened to a 2-D Tensor. The
+     *      (flattened) 2-D Tensor is reshaped (if necessary) to
+     *      [batch_size, input_size], where "input_size" corresponds to the
+     *      number of inputs to the layer, matching the second dimension of
+     *      weights, and "batch_size" is calculated by dividing the number of
+     *      elements by "input_size". Since API level 29, zero batch_size is
+     *      supported for this tensor.
+     * * 1: A 2-D tensor, specifying the weights, of shape
+     *      [num_units, input_size], where "num_units" corresponds to the number
+     *      of output nodes.
+     * * 2: A 1-D tensor, of shape [num_units], specifying the bias. For input
+     *      tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, the bias should
+     *      also be of {@link ANEURALNETWORKS_TENSOR_FLOAT32}. For input tensor
+     *      of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the bias should be
+     *      of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of 0 and
+     *      bias_scale == input_scale * filter_scale.
+     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *      {@link FuseCode} values. Specifies the activation to
+     *      invoke on the result.
+     *
+     * Outputs:
+     * * 0: The output tensor, of shape [batch_size, num_units]. Before API
+     *      level 29, for output tensor of {@link
+     *      ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the following condition must
+     *      be satisfied: output_scale > input_scale * filter_scale.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_FULLY_CONNECTED = 9,
+
+    /**
+     * Looks up sub-tensors in the input tensor using a key-value map.
+     *
+     * This operator takes for input a tensor of values (Values),
+     * a one-dimensional tensor of selection values (Lookups) and
+     * a one-dimensional tensor that maps these values to Values
+     * indexes. The output tensor is the concatenation of sub-tensors of
+     * Values as selected by Lookups via Keys.
+     *
+     * Think of Values as being sliced along its outer-most dimension.
+     * The output is a concatenation of selected slices, with one slice
+     * for each entry of Lookups. The slice selected is the one at the
+     * same index as the Maps entry that matches the value in Lookups.
+     *
+     * For a hit, the corresponding sub-tensor of Values is included
+     * in the Output tensor. For a miss, the corresponding sub-tensor in
+     * Output must have zero values.
+     *
+     * For example, if Values has shape of [40, 200, 300],
+     * Keys should have a shape of [40]. If Lookups tensor has shape
+     * of [3], three slices are being concatenated, so the resulting tensor
+     * must have the shape of [3, 200, 300]. If the first entry in Lookups
+     * has the value 123456, that value must be located in Keys tensor.
+     * If the sixth entry of Keys contains 123456, the sixth slice of Values
+     * must be selected. If no entry in Keys has 123456, a slice of zeroes
+     * must be concatenated.
+     *
+     * Supported value tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported value tensor rank: from 2
+     *
+     * Inputs:
+     * * 0: Lookups. A 1-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor with
+     *      shape [ k ].
+     * * 1: Keys. A 1-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor with shape
+     *      [ n ]; Keys and Values pair represent a map, i.e., the ith element
+     *      in Keys (Keys[i]) is the key to select the ith sub-tensor in Values
+     *      (Values[i]), where 0 <= i <= n-1. Keys tensor *MUST* be sorted in
+     *      ascending order.
+     * * 2: Values. A tensor with shape of [ n, … ]; i.e., the first dimension
+     *      must be n.
+     *
+     * Outputs:
+     * * 0: Output. A tensor with shape [ k …].
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input2.
+     * * 1: Hits. A boolean tensor with shape [ k ] indicates whether the lookup
+     *      hits (True) or not (False).
+     *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
+     *      and scale 1.0f.
+     *      A non-zero byte represents True, a hit. A zero indicates otherwise.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_HASHTABLE_LOOKUP = 10,
+
+    /**
+     * Applies L2 normalization along the depth dimension.
+     *
+     * The values in the output tensor are computed as:
+     *
+     *     output[batch, row, col, channel] =
+     *         input[batch, row, col, channel] /
+     *         sqrt(sum_{c} pow(input[batch, row, col, c], 2))
+     *
+     * For input tensor with rank less than 4, independently normalizes each
+     * 1-D slice along dimension dim.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} (since API level 29)
+     *
+     * Supported tensor rank: up to 4
+     * Tensors with rank less than 4 are only supported since API level 29.
+     *
+     * Inputs:
+     * * 0: An n-D tensor, specifying the tensor to be normalized.
+     * * 1: An optional {@link ANEURALNETWORKS_INT32} scalar, default to -1,
+     *      specifying the dimension normalization would be performed on.
+     *      Negative index is used to specify axis from the end (e.g. -1 for
+     *      the last axis). Must be in the range [-n, n).
+     *      Available since API level 29.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} and same shape as input0.
+     *      For {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+     *      the scale must be 1.f / 128 and the zeroPoint must be 128.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_L2_NORMALIZATION = 11,
+
+    /**
+     * Performs an 2-D L2 pooling operation.
+     *
+     * The output dimensions are functions of the filter dimensions, stride, and
+     * padding.
+     *
+     * The values in the output tensor are computed as:
+     *
+     *     output[b, i, j, c] =
+     *         sqrt(sum_{di, dj} pow(input[b, strides[1] * i + di, strides[2] * j + dj, c], 2) /
+     *              sum(1))
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: 4, with "NHWC" or "NCHW" data layout.
+     * With the default data layout NHWC, the data is stored in the order of:
+     * [batch, height, width, channels]. Alternatively, the data layout could
+     * be NCHW, the data storage order of: [batch, channels, height, width].
+     *
+     * Both explicit padding and implicit padding are supported.
+     *
+     * Inputs (explicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input. Since API level 29, zero batches is supported for this
+     *      tensor.
+     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the left, in the ‘width’ dimension.
+     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the right, in the ‘width’ dimension.
+     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the top, in the ‘height’ dimension.
+     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the bottom, in the ‘height’ dimension.
+     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
+     *      width.
+     * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
+     *      height.
+     * * 9: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *      {@link FuseCode} values. Specifies the activation to
+     *      invoke on the result.
+     * * 10: An optional {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *       Set to true to specify NCHW data layout for input0 and output0.
+     *       Available since API level 29.
+     *
+     * Inputs (implicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input. Since API level 29, zero batches is supported for this
+     *      tensor.
+     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the implicit
+     *      padding scheme, has to be one of the
+     *      {@link PaddingCode} values.
+     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
+     *      width.
+     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
+     *      height.
+     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *      {@link FuseCode} values. Specifies the activation to
+     *      invoke on the result.
+     * * 7: An optional {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *      Set to true to specify NCHW data layout for input0 and output0.
+     *      Available since API level 29.
+     *
+     * Outputs:
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, out_height, out_width, depth].
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_L2_POOL_2D = 12,
+
+    /**
+     * Applies Local Response Normalization along the depth dimension.
+     *
+     * The 4-D input tensor is treated as a 3-D array of 1-D vectors (along the
+     * last dimension), and each vector is normalized independently. Within a
+     * given vector, each component is divided by the weighted, squared sum of
+     * inputs within depth_radius.
+     *
+     * The output is calculated using this formula:
+     *
+     *     sqr_sum[a, b, c, d] = sum(
+     *         pow(input[a, b, c, d - depth_radius : d + depth_radius + 1], 2))
+     *     output = input / pow((bias + alpha * sqr_sum), beta)
+     *
+     * For input tensor with rank less than 4, independently normalizes each
+     * 1-D slice along specified dimension.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: up to 4
+     * Tensors with rank less than 4 are only supported since API level 29.
+     *
+     * Inputs:
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input.
+     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the radius of
+     *      the normalization window.
+     * * 2: A scalar, specifying the bias, must not be zero.
+     *      For input tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT16}, the bias
+     *      value must be of {@link ANEURALNETWORKS_FLOAT16}.
+     *      For input tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, the bias
+     *      value must be of {@link ANEURALNETWORKS_FLOAT32}.
+     * * 3: A scalar, specifying the scale factor, alpha.
+     *      For input tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT16}, the
+     *      alpha value must be of {@link ANEURALNETWORKS_FLOAT16}.
+     *      For input tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, the
+     *      alpha value must be of {@link ANEURALNETWORKS_FLOAT32}.
+     * * 4: A scalar, specifying the exponent, beta.
+     *      For input tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT16}, the beta
+     *      value must be of {@link ANEURALNETWORKS_FLOAT16}.
+     *      For input tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, the beta
+     *      value must be of {@link ANEURALNETWORKS_FLOAT32}.
+     * * 5: An optional {@link ANEURALNETWORKS_INT32} scalar, default to -1,
+     *      specifying the dimension normalization would be performed on.
+     *      Negative index is used to specify axis from the end (e.g. -1 for
+     *      the last axis). Must be in the range [-n, n).
+     *      Available since API level 29.
+     *
+     * Outputs:
+     * * 0: The output tensor of same shape as input0.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_LOCAL_RESPONSE_NORMALIZATION = 13,
+
+    /**
+     * Computes sigmoid activation on the input tensor element-wise.
+     *
+     * The output is calculated using this formula:
+     *
+     *     output = 1 / (1 + exp(-input))
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: up to 4.
+     *
+     * Inputs:
+     * * 0: A tensor, specifying the input. Since API level 29, this tensor may
+     *      be zero-sized.
+     *
+     * Outputs:
+     * * 0: The output tensor of same shape as input0.
+     *      For {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+     *      the scale must be 1.f / 256 and the zeroPoint must be 0.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_LOGISTIC = 14,
+
+    /**
+     * Projects an input to a bit vector via locality senstive hashing.
+     *
+     * Supported input tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported input tensor rank: from 1
+     *
+     * Inputs:
+     * * 0: Hash functions. Dim.size == 2, DataType: Float.
+     *      Tensor[0].Dim[0]: Number of hash functions.
+     *      Tensor[0].Dim[1]: Number of projected output bits generated by each
+     *      hash function.
+     *      If the projection type is Sparse:
+     *      Tensor[0].Dim[1] + ceil(log2(Tensor[0].Dim[0])) <= 32
+     *
+     * * 1: Input. Dim.size >= 1, no restriction on DataType.
+     * * 2: Weight. Optional. Dim.size == 1, DataType: Float.
+     *      If not set, each input element is considered to have the same weight
+     *      of 1.0.
+     *      Tensor[1].Dim[0] == Tensor[2].Dim[0]
+     * * 3: Type:
+     *        Sparse:
+     *          Value LSHProjectionType_SPARSE(=3) (since API level 29).
+     *          Computed bit vector is considered to be sparse.
+     *          Each output element is an int32 made up of multiple bits
+     *          computed from hash functions.
+     *
+     *          NOTE: To avoid collisions across hash functions, an offset value
+     *          of k * (1 << Tensor[0].Dim[1]) will be added to each signature,
+     *          where k is the index of the hash function.
+     *
+     *          Value LSHProjectionType_SPARSE_DEPRECATED(=1).
+     *          Legacy behavior that does not include the offset value.
+     *
+     *        Dense:
+     *          Value LSHProjectionType_DENSE(=2).
+     *          Computed bit vector is considered to be dense. Each output
+     *          element represents a bit and can take the value of either
+     *          0 or 1.
+     *
+     * Outputs:
+     * * 0: If the projection type is Sparse:
+     *      Output.Dim == { Tensor[0].Dim[0] }
+     *      A tensor of int32 that represents hash signatures,
+     *
+     *      If the projection type is Dense:
+     *      Output.Dim == { Tensor[0].Dim[0] * Tensor[0].Dim[1] }
+     *      A flattened tensor that represents projected bit vectors.
+     *
+     * Available since API level 27.
+     * The offset value for sparse projections was added in API level 29.
+     */
+    ANEURALNETWORKS_LSH_PROJECTION = 15,
+
+    /**
+     * Performs a single time step in a Long Short-Term Memory (LSTM) layer
+     *
+     * The LSTM operation is described by the following equations.
+     *
+     * \f{eqnarray*}{
+     * i_t =& \sigma(W_{xi}x_t+W_{hi}h_{t-1}+W_{ci}C_{t-1}+b_i) & \\
+     * f_t =& \sigma(W_{xf}x_t+W_{hf}h_{t-1}+W_{cf}C_{t-1}+b_f) & \\
+     * C_t =& clip(f_t \odot C_{t-1} + i_t \odot
+     *        g(W_{xc}x_t+W_{hc}h_{t-1}+b_c),\ t_{cell}) & \\
+     * o_t =& \sigma(W_{xo}x_t+W_{ho}h_{t-1}+W_{co}C_t+b_o) & \\
+     *      & & \\
+     *      & clip(W_{proj}(o_t \odot g(C_t))+b_{proj},\ t_{proj})
+     *      & if\ there\ is\ a\ projection; \\
+     * h_t =& & \\
+     *      & o_t \odot g(C_t) & otherwise. \\
+     * \f}
+     * Where:
+     * * \f$x_t\f$ is the input,
+     * * \f$i_t\f$ is the input gate,
+     * * \f$f_t\f$ is the forget gate,
+     * * \f$C_t\f$ is the cell state,
+     * * \f$o_t\f$ is the output,
+     * * \f$h_t\f$ is the output state,
+     * * \f$\sigma\f$ is the logistic sigmoid function,
+     * * \f$g\f$ is the cell input and cell output activation function, usually
+     *   \f$tahn\f$,
+     * * \f$W_{xi}\f$ is the input-to-input weight matrix,
+     * * \f$W_{hi}\f$ is the recurrent to input weight matrix,
+     * * \f$W_{ci}\f$ is the cell-to-input weight matrix,
+     * * \f$b_i\f$ is the input gate bias,
+     * * \f$W_{xf}\f$ is the input-to-forget weight matrix,
+     * * \f$W_{hf}\f$ is the recurrent-to-forget weight matrix,
+     * * \f$W_{cf}\f$ is the cell-to-forget weight matrix,
+     * * \f$b_f\f$ is the forget gate bias,
+     * * \f$W_{xc}\f$ is the input-to-cell weight matrix,
+     * * \f$W_{hc}\f$ is the recurrent-to-cell weight matrix,
+     * * \f$b_c\f$ is the cell bias,
+     * * \f$W_{xo}\f$ is the input-to-output weight matrix,
+     * * \f$W_{ho}\f$ is the recurrent-to-output weight matrix,
+     * * \f$W_{co}\f$ is the cell-to-output weight matrix,
+     * * \f$b_o\f$ is the output gate bias,
+     * * \f$W_{proj}\f$ is the projection weight matrix,
+     * * \f$b_{proj}\f$ is the projection bias,
+     * * \f$t_{cell}\f$ is the threshold for clipping the cell state, and
+     * * \f$t_{proj}\f$ is the threshold for clipping the projected output.
+     * * \f$\odot\f$ is the
+     *   <a href="https://en.wikipedia.org/wiki/Hadamard_product_(matrices)">
+     *   Hadamard product</a> that takes two matrices and produces another
+     *   matrix, each element of which is the product of the corresponding
+     *   elements of the input matrices.
+     *
+     * Since API level 29 LSTM supports layer normalization.
+     * In case layer normalization is used, the inputs to internal activation
+     * functions (sigmoid and \f$g\f$) are normalized, rescaled and recentered
+     * following an approach from section 3.1 from
+     * https://arxiv.org/pdf/1607.06450.pdf
+     *
+     * The operation has the following independently optional inputs:
+     * * The cell-to-input weights (\f$W_{ci}\f$), cell-to-forget weights
+     *   (\f$W_{cf}\f$) and cell-to-output weights (\f$W_{co}\f$) either all
+     *   have values or neither of them have values (i.e., all set to null). If
+     *   they have values, the peephole optimization is used.
+     * * The input-to-input weights (\f$W_{xi}\f$), recurrent-to-input weights
+     *   (\f$W_{hi}\f$) and input gate bias (\f$b_i\f$) either all have values,
+     *   or none of them have values. If they have no values, coupling of input
+     *   and forget gates (CIFG) is used, in which case the input gate
+     *   (\f$i_t\f$) is calculated using the following equation instead.
+     *   \f{eqnarray*}{
+     *   i_t = 1 - f_t
+     *   \f}
+     *   In case peephole optimization is used and CIFG is not used
+     *   cell-to-input (\f$W_{ci}\f$) weights must be present. Otherwise, the
+     *   cell-to-input weights must have no value.
+     * * The projection weights (\f$W_{proj}\f$) is required only for the
+     *   recurrent projection layer, and should otherwise have no value.
+     * * The projection bias (\f$b_{proj}\f$) may (but not required to) have a
+     *   value if the recurrent projection layer exists, and should otherwise
+     *   have no value.
+     * * (API level >= 29) The four layer normalization weights either all have
+     *   values or none of them have values. Additionally, if CIFG is used,
+     *   input layer normalization weights tensor is omitted and the other layer
+     *   normalization weights either all have values or none of them have
+     *   values. Layer normalization is used when the values of all the layer
+     *   normalization weights are present.
+     *
+     * References:
+     *
+     * The default non-peephole non-CIFG implementation is based on:
+     * http://www.bioinf.jku.at/publications/older/2604.pdf
+     * S. Hochreiter and J. Schmidhuber. "Long Short-Term Memory". Neural
+     * Computation, 9(8):1735-1780, 1997.
+     *
+     * The peephole implementation and projection layer is based on:
+     * https://research.google.com/pubs/archive/43905.pdf
+     * Hasim Sak, Andrew Senior, and Francoise Beaufays. "Long short-term memory
+     * recurrent neural network architectures for large scale acoustic
+     * modeling." INTERSPEECH, 2014.
+     * (However, the concept of peephole optimization was introduced in work
+     * prior to this paper.)
+     *
+     * The coupling of input and forget gate (CIFG) is based on:
+     * http://arxiv.org/pdf/1503.04069.pdf
+     * Greff et al. "LSTM: A Search Space Odyssey"
+     *
+     * The layer normalization is based on:
+     * https://arxiv.org/pdf/1607.06450.pdf
+     * Jimmy Ba et al. "Layer Normalization"
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * All input and output tensors must be of the same type.
+     *
+     * Inputs:
+     * * 0: The input (\f$x_t\f$).
+     *      A 2-D tensor of shape [batch_size, input_size], where “batch_size”
+     *      corresponds to the batching dimension, and “input_size” is the size
+     *      of the input.
+     * * 1: The input-to-input weights (\f$W_{xi}\f$). Optional.
+     *      A 2-D tensor of shape [num_units, input_size], where “num_units”
+     *      corresponds to the number of cell units.
+     * * 2: The input-to-forget weights (\f$W_{xf}\f$).
+     *      A 2-D tensor of shape [num_units, input_size].
+     * * 3: The input-to-cell weights (\f$W_{xc}\f$).
+     *      A 2-D tensor of shape [num_units, input_size].
+     * * 4: The input-to-output weights (\f$W_{xo}\f$).
+     *      A 2-D tensor of shape [num_units, input_size].
+     * * 5: The recurrent-to-input weights (\f$W_{hi}\f$). Optional.
+     *      A 2-D tensor of shape [num_units, output_size], where “output_size”
+     *      corresponds to either the number of cell units (i.e., “num_units”),
+     *      or the second dimension of the “projection_weights”, if defined.
+     * * 6: The recurrent-to-forget weights (\f$W_{hf}\f$).
+     *      A 2-D tensor of shape [num_units, output_size].
+     * * 7: The recurrent-to-cell weights (\f$W_{hc}\f$).
+     *      A 2-D tensor of shape [num_units, output_size].
+     * * 8: The recurrent-to-output weights (\f$W_{ho}\f$).
+     *      A 2-D tensor of shape [num_units, output_size].
+     * * 9: The cell-to-input weights (\f$W_{ci}\f$). Optional.
+     *      A 1-D tensor of shape [num_units].
+     * * 10:The cell-to-forget weights (\f$W_{cf}\f$). Optional.
+     *      A 1-D tensor of shape [num_units].
+     * * 11:The cell-to-output weights (\f$W_{co}\f$). Optional.
+     *      A 1-D tensor of shape [num_units].
+     * * 12:The input gate bias (\f$b_i\f$). Optional.
+     *      A 1-D tensor of shape [num_units].
+     * * 13:The forget gate bias (\f$b_f\f$).
+     *      A 1-D tensor of shape [num_units].
+     * * 14:The cell bias (\f$b_c\f$).
+     *      A 1-D tensor of shape [num_units].
+     * * 15:The output gate bias (\f$b_o\f$).
+     *      A 1-D tensor of shape [num_units].
+     * * 16:The projection weights (\f$W_{proj}\f$). Optional.
+     *      A 2-D tensor of shape [output_size, num_units].
+     * * 17:The projection bias (\f$b_{proj}\f$). Optional.
+     *      A 1-D tensor of shape [output_size].
+     * * 18:The output state (in) (\f$h_{t-1}\f$).
+     *      A 2-D tensor of shape [batch_size, output_size].
+     * * 19:The cell state (in) (\f$C_{t-1}\f$).
+     *      A 2-D tensor of shape [batch_size, num_units].
+     * * 20:The activation function (\f$g\f$).
+     *      A value indicating the activation function:
+     *      <ul>
+     *      <li>0: None;
+     *      <li>1: Relu;
+     *      <li>3: Relu6;
+     *      <li>4: Tanh;
+     *      <li>6: Sigmoid.
+     *      </ul>
+     * * 21:The clipping threshold (\f$t_{cell}\f$) for the cell state, such
+     *      that values are bound within [-cell_clip, cell_clip]. If set to 0.0
+     *      then clipping is disabled.
+     *      Until API level 29 this scalar must be of type {@link
+     *      ANEURALNETWORKS_FLOAT32}. Since API level 29, if all the input
+     *      tensors have type {@link ANEURALNETWORKS_TENSOR_FLOAT32}, this
+     *      scalar must be of the type {@link ANEURALNETWORKS_FLOAT32},
+     *      otherwise if all the input tensors have the type {@link
+     *      ANEURALNETWORKS_TENSOR_FLOAT16}, this scalar must be of type {@link
+     *      ANEURALNETWORKS_FLOAT16}.
+     * * 22:The clipping threshold (\f$t_{proj}\f$) for the output from the
+     *      projection layer, such that values are bound within
+     *      [-proj_clip, proj_clip]. If set to 0.0 then clipping is disabled.
+     *      Until API level 29 this scalar must be of type {@link
+     *      ANEURALNETWORKS_FLOAT32}. Since API level 29, if all the input
+     *      tensors have type {@link ANEURALNETWORKS_TENSOR_FLOAT32}, this
+     *      scalar must be of the type {@link ANEURALNETWORKS_FLOAT32},
+     *      otherwise if all the input tensors have the type {@link
+     *      ANEURALNETWORKS_TENSOR_FLOAT16}, this scalar must be of type {@link
+     *      ANEURALNETWORKS_FLOAT16}.
+     * Since API level 29 there are additional inputs to this op:
+     * * 23:The input layer normalization weights.
+     *      A 1-D tensor of shape [num_units]. Used to rescale normalized inputs
+     *      to activation at input gate.
+     * * 24:The forget layer normalization weights.
+     *      A 1-D tensor of shape [num_units]. Used to rescale normalized inputs
+     *      to activation at forget gate.
+     * * 25:The cell layer normalization weights.
+     *      A 1-D tensor of shape [num_units]. Used to rescale normalized inputs
+     *      to activation at cell gate.
+     * * 26:The output layer normalization weights.
+     *      A 1-D tensor of shape [num_units]. Used to rescale normalized inputs
+     *      to activation at output gate.
+     *
+     * Outputs:
+     * * 0: The scratch buffer.
+     *      A 2-D tensor of shape [batch_size, num_units * 3] with CIFG, or
+     *      [batch_size, num_units * 4] without CIFG.
+     * * 1: The output state (out) (\f$h_t\f$).
+     *      A 2-D tensor of shape [batch_size, output_size].
+     * * 2: The cell state (out) (\f$C_t\f$).
+     *      A 2-D tensor of shape [batch_size, num_units].
+     * * 3: The output (\f$o_t\f$).
+     *      A 2-D tensor of shape [batch_size, output_size]. This is effectively
+     *      the same as the current “output state (out)” value.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_LSTM = 16,
+
+    /**
+     * Performs an 2-D max pooling operation.
+     *
+     * The output dimensions are functions of the filter dimensions, stride, and
+     * padding.
+     *
+     * The values in the output tensor are computed as:
+     *
+     *     output[b, i, j, channel] =
+     *         max_{di, dj} (
+     *             input[b, strides[1] * i + di, strides[2] * j + dj, channel]
+     *         )
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: 4, with "NHWC" or "NCHW" data layout.
+     * With the default data layout NHWC, the data is stored in the order of:
+     * [batch, height, width, channels]. Alternatively, the data layout could
+     * be NCHW, the data storage order of: [batch, channels, height, width].
+     *
+     * Both explicit padding and implicit padding are supported.
+     *
+     * Inputs (explicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input. Since API level 29, zero batches is supported for this
+     *      tensor.
+     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the left, in the ‘width’ dimension.
+     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the right, in the ‘width’ dimension.
+     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the top, in the ‘height’ dimension.
+     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the bottom, in the ‘height’ dimension.
+     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
+     *      width.
+     * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
+     *      height.
+     * * 9: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *      {@link FuseCode} values. Specifies the activation to
+     *      invoke on the result.
+     * * 10: An optional {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *       Set to true to specify NCHW data layout for input0 and output0.
+     *       Available since API level 29.
+     *
+     * Inputs (implicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input. Since API level 29, zero batches is supported for this
+     *      tensor.
+     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the implicit
+     *      padding scheme, has to be one of the
+     *      {@link PaddingCode} values.
+     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
+     *      width.
+     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter
+     *      height.
+     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *      {@link FuseCode} values. Specifies the activation to
+     *      invoke on the result.
+     * * 7: An optional {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *      Set to true to specify NCHW data layout for input0 and output0.
+     *      Available since API level 29.
+     *
+     * Outputs:
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, out_height, out_width, depth].
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_MAX_POOL_2D = 17,
+
+    /**
+     * Multiplies two tensors, element-wise.
+     *
+     * Takes two input tensors of identical {@link OperandCode} and compatible
+     * dimensions. The output is the product of both input tensors, optionally
+     * modified by an activation function.
+     *
+     * Two dimensions are compatible when:
+     *     1. they are equal, or
+     *     2. one of them is 1
+     *
+     * The size of the resulting output is the maximum size along each dimension
+     * of the input operands. It starts with the trailing dimensions, and works
+     * its way forward.
+     *
+     * Since API level 29, generic zero-sized input tensor is supported. Zero
+     * dimension is only compatible with 0 or 1. The size of the output
+     * dimension is zero if either of corresponding input dimension is zero.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: A tensor.
+     * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
+     *      as input0.
+     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *      {@link FuseCode} values. Specifies the activation to
+     *      invoke on the result.
+     *
+     * Outputs:
+     * * 0: The product, a tensor of the same {@link OperandCode} as input0.
+     *      For output tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+     *      the following condition must be satisfied:
+     *      output_scale > input1_scale * input2_scale.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_MUL = 18,
+
+    /**
+     * Computes rectified linear activation on the input tensor element-wise.
+     *
+     * The output is calculated using this formula:
+     *
+     *     output = max(0, input)
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: up to 4.
+     *
+     * Inputs:
+     * * 0: A tensor, specifying the input. Since API level 29, this tensor may
+     *      be zero-sized.
+     *
+     * Outputs:
+     * * 0: The output tensor of same shape as input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_RELU = 19,
+
+    /**
+     * Computes rectified linear 1 activation on the input tensor element-wise.
+     *
+     * The output is calculated using this formula:
+     *
+     *     output = min(1.f, max(-1.f, input))
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: up to 4.
+     *
+     * Inputs:
+     * * 0: A tensor, specifying the input. Since API level 29, this tensor may
+     *      be zero-sized.
+     *
+     * Outputs:
+     * * 0: The output tensor of the same shape as input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_RELU1 = 20,
+
+    /**
+     * Computes rectified linear 6 activation on the input tensor element-wise.
+     *
+     * The output is calculated using this formula:
+     *
+     *     output = min(6, max(0, input))
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: up to 4.
+     *
+     * Inputs:
+     * * 0: A tensor, specifying the input. Since API level 29, this tensor may
+     *      be zero-sized.
+     *
+     * Outputs:
+     * * 0: The output tensor of same shape as input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_RELU6 = 21,
+
+    /**
+     * Reshapes a tensor.
+     *
+     * Given tensor, this operation returns a tensor that has the same values as
+     * tensor, but with a newly specified shape.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: up to 4.
+     *
+     * Inputs:
+     * * 0: A tensor, specifying the tensor to be reshaped.
+     * * 1: A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, defining the
+     *      shape of the output tensor. The number of elements implied by shape
+     *      must be the same as the number of elements in the input tensor.
+     *
+     *      If one component of shape is the special value -1, the size of that
+     *      dimension is computed so that the total size remains constant. In
+     *      particular, a shape of [-1] flattens into 1-D. At most one component
+     *      of shape can be -1.
+     *
+     * Outputs:
+     * * 0: The output tensor, of shape specified by the input shape.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_RESHAPE = 22,
+
+    /**
+     * Resizes images to given size using the bilinear interpretation.
+     *
+     * Resized images must be distorted if their output aspect ratio is not the
+     * same as input aspect ratio. The corner pixels of output may not be the
+     * same as corner pixels of input.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} (since API level 29)
+     *
+     * Supported tensor rank: 4, with "NHWC" or "NCHW" data layout.
+     * With the default data layout NHWC, the data is stored in the order of:
+     * [batch, height, width, channels]. Alternatively, the data layout could
+     * be NCHW, the data storage order of: [batch, channels, height, width].
+     *
+     * Both resizing by shape and resizing by scale are supported.
+     *
+     * Inputs (resizing by shape):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input. Since API level 29, zero batches is supported for this
+     *      tensor.
+     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the output
+     *      width of the output tensor.
+     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the output
+     *      height of the output tensor.
+     * * 3: An optional {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *      Set to true to specify NCHW data layout for input0 and output0.
+     *      Available since API level 29.
+     *
+     * Inputs (resizing by scale, since API level 29):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input. Zero batches is supported for this tensor.
+     * * 1: A scalar, specifying width_scale, the scaling factor of the width
+     *      dimension from the input tensor to the output tensor. The output
+     *      width is calculated as new_width = floor(width * width_scale).
+     *      The scalar must be of {@link ANEURALNETWORKS_FLOAT16} if input0 is
+     *      of {@link ANEURALNETWORKS_TENSOR_FLOAT16} and of
+     *      {@link ANEURALNETWORKS_FLOAT32} otherwise.
+     * * 2: A scalar, specifying height_scale, the scaling factor of the height
+     *      dimension from the input tensor to the output tensor. The output
+     *      height is calculated as new_height = floor(height * height_scale).
+     *      The scalar must be of {@link ANEURALNETWORKS_FLOAT16} if input0 is
+     *      of {@link ANEURALNETWORKS_TENSOR_FLOAT16} and of
+     *      {@link ANEURALNETWORKS_FLOAT32} otherwise.
+     * * 3: An optional {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *      Set to true to specify NCHW data layout for input0 and output0.
+     *
+     * Outputs:
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, new_height, new_width, depth].
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_RESIZE_BILINEAR = 23,
+
+    /**
+     * A basic recurrent neural network layer.
+     *
+     * This layer implements the operation:
+     * outputs = state = activation(inputs * input_weights +
+     *                              state * recurrent_weights + bias)
+     *
+     * Where:
+     * * “input_weights” is a weight matrix that multiplies the inputs;
+     * * “recurrent_weights” is a weight matrix that multiplies the current
+     *    “state” which itself is the output from the previous time step
+     *    computation;
+     * * “bias” is a bias vector (added to each output vector in the batch);
+     * * “activation” is the function passed as the “fused_activation_function”
+     *   argument (if not “NONE”).
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * The input tensors must all be the same type.
+     *
+     * Inputs:
+     * * 0: input.
+     *      A 2-D tensor of shape [batch_size, input_size], where “batch_size”
+     *      corresponds to the batching dimension, and “input_size” is the size
+     *      of the input.
+     * * 1: weights.
+     *      A 2-D tensor of shape [num_units, input_size], where “num_units”
+     *      corresponds to the number of units.
+     * * 2: recurrent_weights.
+     *      A 2-D tensor of shape [num_units, num_units], with columns
+     *      corresponding to the weights from each unit.
+     * * 3: bias.
+     *      A 1-D tensor of shape [num_units].
+     * * 4: hidden state (in).
+     *      A 2-D tensor of shape [batch_size, num_units].
+     * * 5: fused_activation_function.
+     *      An optional {@link FuseCode} value indicating the
+     *      activation function. If “NONE” is specified then it results in a
+     *      linear activation.
+     *
+     * Outputs:
+     * * 0: hidden state (out).
+     *      A 2-D tensor of shape [batch_size, num_units].
+     *
+     * * 1: output.
+     *      A 2-D tensor of shape [batch_size, num_units]. This is effectively
+     *      the same as the current state value.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_RNN = 24,
+
+    /**
+     * Computes the softmax activation on the input tensor element-wise, per
+     * batch, by normalizing the input vector so the maximum coefficient is
+     * zero.
+     *
+     * The output is calculated using this formula:
+     *
+     *     output[batch, i] =
+     *         exp((input[batch, i] - max(input[batch, :])) * beta) /
+     *         sum_{k}{exp((input[batch, k] - max(input[batch, :])) * beta)}
+     *
+     * For input tensor with rank other than 2, the activation will be applied
+     * independently on each 1-D slice along specified dimension.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: up to 4.
+     * Tensors with rank other than 2 or 4 are only supported since API level 29.
+     *
+     * Inputs:
+     * * 0: A 2-D or 4-D tensor, specifying the tensor to be reshaped. Since
+     *      API level 29, this tensor may be zero-sized.
+     * * 1: A scalar, specifying the positive scaling factor for the exponent,
+     *      beta. If input0 is of {@link ANEURALNETWORKS_TENSOR_FLOAT32} or
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the scalar must be of
+     *      {@link ANEURALNETWORKS_FLOAT32}. If input0 is of {@link
+     *      ANEURALNETWORKS_TENSOR_FLOAT16}, then the scalar must be of {@link
+     *      ANEURALNETWORKS_FLOAT16}.
+     * * 2: An optional {@link ANEURALNETWORKS_INT32} scalar, default to -1,
+     *      specifying the dimension the activation would be performed on.
+     *      Negative index is used to specify axis from the end (e.g. -1 for
+     *      the last axis). Must be in the range [-n, n).
+     *      Available since API level 29.
+     *
+     * Outputs:
+     * * 0: The output tensor of same shape as input0.
+     *      For {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+     *      the scale must be 1.f / 256 and the zeroPoint must be 0.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_SOFTMAX = 25,
+
+    /**
+     * Rearranges blocks of spatial data, into depth.
+     *
+     * More specifically, this op outputs a copy of the input tensor where
+     * values from the height and width dimensions are moved to the depth
+     * dimension. The value block_size indicates the input block size and how
+     * the data is moved.
+     *
+     * Chunks of data of size block_size * block_size from depth are rearranged
+     * into non-overlapping blocks of size block_size x block_size.
+     *
+     * The depth of the output tensor is input_depth * block_size * block_size.
+     * The input tensor's height and width must be divisible by block_size.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: 4, with "NHWC" or "NCHW" data layout.
+     * With the default data layout NHWC, the data is stored in the order of:
+     * [batch, height, width, channels]. Alternatively, the data layout could
+     * be NCHW, the data storage order of: [batch, channels, height, width].
+     *
+     * Inputs:
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input.
+     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the block_size.
+     *      block_size must be >=1 and block_size must be a divisor of both the
+     *      input height and width.
+     * * 2: An optional {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *      Set to true to specify NCHW data layout for input0 and output0.
+     *      Available since API level 29.
+     *
+     * Outputs:
+     * * 0: The output 4-D tensor, of shape [batches, height/block_size,
+     *      width/block_size, depth_in*block_size*block_size].
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_SPACE_TO_DEPTH = 26,
+
+    /**
+     * SVDF op is a kind of stateful layer derived from the notion that a
+     * densely connected layer that's processing a sequence of input frames can
+     * be approximated by using a singular value decomposition of each of its
+     * nodes. The implementation is based on:
+     *
+     * https://research.google.com/pubs/archive/43813.pdf
+     *
+     * P. Nakkiran, R. Alvarez, R. Prabhavalkar, C. Parada.
+     * “Compressing Deep Neural Networks using a Rank-Constrained Topology”.
+     * INTERSPEECH, 2015.
+     *
+     * It processes the incoming input using a 2-stage filtering mechanism:
+     * * stage 1 performs filtering on the "features" dimension, whose outputs
+     *   get pushed into a memory of fixed-size memory_size.
+     * * stage 2 performs filtering on the "time" dimension of the memory_size
+     *   memoized outputs of stage 1.
+     *
+     * Specifically, for rank 1, this layer implements the operation:
+     *
+     *     memory = push(conv1d(inputs, weights_feature, feature_dim,
+     *                          "ANEURALNETWORKS_PADDING_VALID"));
+     *     outputs = activation(memory * weights_time + bias);
+     *
+     * Where:
+     * * “weights_feature” is a weights matrix that processes the inputs (by
+     *   convolving the input with every “feature filter”), and whose outputs
+     *   get pushed, stacked in order, into the fixed-size “memory” (the oldest
+     *   entry gets dropped);
+     * * “weights_time” is a weights matrix that processes the “memory” (by a
+     *   batched matrix multiplication on the num_units);
+     * * “bias” is an optional bias vector (added to each output vector in the
+     *   batch); and
+     * * “activation” is the function passed as the “fused_activation_function”
+     *   argument (if not “NONE”).
+     *
+     * Each rank adds a dimension to the weights matrices by means of stacking
+     * the filters.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * All input tensors must be the same type.
+     *
+     * Inputs:
+     * * 0: input.
+     *      A 2-D tensor of shape [batch_size, input_size], where “batch_size”
+     *      corresponds to the batching dimension, and “input_size” is the size
+     *      of the input.
+     * * 1: weights_feature.
+     *      A 2-D tensor of shape [num_units, input_size], where “num_units”
+     *      corresponds to the number of units.
+     * * 2: weights_time.
+     *      A 2-D tensor of shape [num_units, memory_size], where “memory_size”
+     *      corresponds to the fixed-size of the memory.
+     * * 3: bias.
+     *      An optional 1-D tensor of shape [num_units].
+     * * 4: state (in).
+     *      A 2-D tensor of shape [batch_size, (memory_size - 1) * num_units * rank].
+     * * 5: rank.
+     *      The rank of the SVD approximation.
+     * * 6: fused_activation_function.
+     *      An optional {@link FuseCode} value indicating the
+     *      activation function. If “NONE” is specified then it results in a
+     *      linear activation.
+     *
+     * Outputs:
+     * * 0: state (out).
+     *      A 2-D tensor of the same {@link OperandCode} as the inputs, with shape
+     *      [batch_size, (memory_size - 1) * num_units * rank].
+     * * 1: output.
+     *      A 2-D tensor of the same {@link OperandCode} as the inputs, with shape
+     *      [batch_size, num_units].
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_SVDF = 27,
+
+    /**
+     * Computes hyperbolic tangent of input tensor element-wise.
+     *
+     * The output is calculated using this formula:
+     *
+     *     output = tanh(input)
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} (since API level 29)
+     *
+     * Supported tensor rank: up to 4.
+     *
+     * Inputs:
+     * * 0: A tensor, specifying the input. Since API level 29, this tensor may
+     *      be zero-sized.
+     *
+     * Outputs:
+     * * 0: The output tensor of same shape as input0.
+     *      For {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+     *      the scale must be 1.f / 128 and the zeroPoint must be 128.
+     *
+     * Available since API level 27.
+     */
+    ANEURALNETWORKS_TANH = 28,
+
+    // Operations below are available since API level 28.
+
+    // TODO: make the description easier to understand.
+    /**
+     * BatchToSpace for N-dimensional tensors.
+     *
+     * This operation reshapes the batch dimension (dimension 0) into M + 1
+     * dimensions of shape block_shape + [batch], interleaves these blocks back
+     * into the grid defined by the spatial dimensions [1, ..., M], to obtain a
+     * result with the same rank as the input.
+     *
+     * This is the reverse of SpaceToBatch.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: 4, with "NHWC" or "NCHW" data layout.
+     * With the default data layout NHWC, the data is stored in the order of:
+     * [batch, height, width, channels]. Alternatively, the data layout could
+     * be NCHW, the data storage order of: [batch, channels, height, width].
+     *
+     * Inputs:
+     * * 0: An n-D tensor, specifying the tensor to be reshaped
+     * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the block
+     *      sizes for each spatial dimension of the input tensor. All values
+     *      must be >= 1.
+     * * 2: An optional {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *      Set to true to specify NCHW data layout for input0 and output0.
+     *      Available since API level 29.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 28.
+     */
+    ANEURALNETWORKS_BATCH_TO_SPACE_ND = 29,
+
+    /**
+     * Element-wise division of two tensors.
+     *
+     * Takes two input tensors of identical {@link OperandCode} and compatible
+     * dimensions. The output is the result of dividing the first input tensor
+     * by the second, optionally modified by an activation function.
+     *
+     * Two dimensions are compatible when:
+     *     1. they are equal, or
+     *     2. one of them is 1
+     *
+     * The size of the output is the maximum size along each dimension of the
+     * input operands. It starts with the trailing dimensions, and works its way
+     * forward.
+     *
+     * Example:
+     *     input1.dimension =    {4, 1, 2}
+     *     input2.dimension = {5, 4, 3, 1}
+     *     output.dimension = {5, 4, 3, 2}
+     *
+     * Since API level 29, generic zero-sized input tensor is supported. Zero
+     * dimension is only compatible with 0 or 1. The size of the output
+     * dimension is zero if either of corresponding input dimension is zero.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: An n-D tensor, specifying the first input.
+     * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
+     *      as input0.
+     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *      {@link FuseCode} values. Specifies the activation to
+     *      invoke on the result.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0.
+     *
+     * Available since API level 28.
+     */
+    ANEURALNETWORKS_DIV = 30,
+
+    /**
+     * Computes the mean of elements across dimensions of a tensor.
+     *
+     * Reduces the input tensor along the given dimensions to reduce. Unless
+     * keep_dims is true, the rank of the tensor is reduced by 1 for each entry
+     * in axis. If keep_dims is true, the reduced dimensions are retained with
+     * length 1.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: A tensor, specifying the input.
+     * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The dimensions
+     *      to reduce. Must be in the range
+     *      [-rank(input_tensor), rank(input_tensor)).
+     *
+     *      NOTE: When the operation was introduced, the documentation
+     *      incorrectly stated that if dimensions were empty, the operation
+     *      would reduce across all dimensions. This behavior was never
+     *      implemented.
+     *
+     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, keep_dims. If positive,
+     *      retains reduced dimensions with length 1.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be same as input0.
+     *
+     * Available since API level 28.
+     */
+    ANEURALNETWORKS_MEAN = 31,
+
+    /**
+     * Pads a tensor with zeros.
+     *
+     * This operation pads a tensor according to the specified paddings.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} (full support since API
+     *   level 29, see the output section)
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: An n-D tensor, specifying the tensor to be padded.
+     * * 1: A 2-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the paddings
+     *      for each spatial dimension of the input tensor. The shape of the
+     *      tensor must be {rank(input0), 2}.
+     *      padding[i, 0] specifies the number of elements to be padded in the
+     *      front of dimension i.
+     *      padding[i, 1] specifies the number of elements to be padded after the
+     *      end of dimension i.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0. The
+     *      output tensor has the same rank as input0, and each
+     *      dimension of the output tensor has the same size as the
+     *      corresponding dimension of the input tensor plus the size
+     *      of the padding:
+     *          output0.dimension[i] =
+     *              padding[i, 0] + input0.dimension[i] + padding[i, 1]
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     *      NOTE: Before API level 29, the pad value for
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} is undefined.
+     *      Since API level 29, the pad value is always the logical zero.
+     *
+     * Available since API level 28.
+     */
+    ANEURALNETWORKS_PAD = 32,
+
+    // TODO: make the description easier to understand.
+    /**
+     * SpaceToBatch for N-Dimensional tensors.
+     *
+     * This operation divides "spatial" dimensions [1, ..., M] of the input into
+     * a grid of blocks of shape block_shape, and interleaves these blocks with
+     * the "batch" dimension (0) such that in the output, the spatial dimensions
+     * [1, ..., M] correspond to the position within the grid, and the batch
+     * dimension combines both the position within a spatial block and the
+     * original batch position. Prior to division into blocks, the spatial
+     * dimensions of the input are optionally zero padded according to paddings.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} (full support since API
+     *   level 29, see the output section)
+     *
+     * Supported tensor rank: 4, with "NHWC" or "NCHW" data layout.
+     * With the default data layout NHWC, the data is stored in the order of:
+     * [batch, height, width, channels]. Alternatively, the data layout could
+     * be NCHW, the data storage order of: [batch, channels, height, width].
+     *
+     * Inputs:
+     * * 0: An n-D tensor, specifying the input.
+     * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the block
+     *      sizes for each spatial dimension of the input tensor. All values
+     *      must be >= 1.
+     * * 2: A 2-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the paddings
+     *      for each spatial dimension of the input tensor. All values must be
+     *      >= 0. The shape of the tensor must be {M, 2}, where M is the number
+     *      of spatial dimensions.
+     *      padding[i, 0] specifies the number of element to be padded in the
+     *      front of dimension i.
+     *      padding[i, 1] specifies the number of element to be padded after the
+     *      end of dimension i.
+     * * 3: An optional {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *      Set to true to specify NCHW data layout for input0 and output0.
+     *      Available since API level 29.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     *      NOTE: Before API level 29, the pad value for
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} is undefined.
+     *      Since API level 29, the pad value is always the logical zero.
+     *
+     * Available since API level 28.
+     */
+    ANEURALNETWORKS_SPACE_TO_BATCH_ND = 33,
+
+    /**
+     * Removes dimensions of size 1 from the shape of a tensor.
+     *
+     * Given a tensor input, this operation returns a tensor of the same
+     * {@link OperandCode} with all dimensions of size 1 removed. If you don't
+     * want to remove all size 1 dimensions, you can remove specific size 1
+     * dimensions by specifying the axes (input1).
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: An n-D tensor, the tensor to be squeezed.
+     * * 1: An optional 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The
+     *      dimensions to squeeze. If specified only squeezes the dimensions
+     *      listed. Otherwise, squeezes all dimensions. The dimension index
+     *      starts at 0. An error must be reported if squeezing a dimension that
+     *      is not 1.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0. Contains the
+     *      same data as input, but has one or more dimensions of size 1
+     *      removed.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 28.
+     */
+    ANEURALNETWORKS_SQUEEZE = 34,
+
+    /**
+     * Extracts a strided slice of a tensor.
+     *
+     * Roughly speaking, this op extracts a slice of size (end - begin) / stride
+     * from the given input tensor. Starting at the location specified by begin
+     * the slice continues by adding stride to the index until all dimensions
+     * are not less than end. Note that a stride can be negative, which causes a
+     * reverse slice.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: An n-D tensor, specifying the tensor to be sliced.
+     * * 1: begin, a 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The
+     *      starts of the dimensions of the input tensor to be sliced. The
+     *      length must be of rank(input0).
+     * * 2: end, a 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The
+     *      ends of the dimensions of the input tensor to be sliced. The length
+     *      must be of rank(input0).
+     * * 3: strides, a 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The
+     *      strides of the dimensions of the input tensor to be sliced. The
+     *      length must be of rank(input0). The entries must be non-zero.
+     * * 4: begin_mask, an {@link ANEURALNETWORKS_INT32} scalar. If the ith bit
+     *      of begin_mask is set, begin[i] is ignored and the fullest possible
+     *      range in that dimension is used instead.
+     * * 5: end_mask, an {@link ANEURALNETWORKS_INT32} scalar. If the ith bit of
+     *      end_mask is set, end[i] is ignored and the fullest possible range in
+     *      that dimension is used instead.
+     * * 6: shrink_axis_mask, an {@link ANEURALNETWORKS_INT32} scalar. If the
+     *      ith bit of shrink_axis_mask is set, the ith dimension specification
+     *      shrinks the dimensionality by 1, taking on the value at index
+     *      begin[i]. In this case, the ith specification must define a
+     *      slice of size 1, e.g. begin[i] = x, end[i] = x + 1.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0 and rank (n - k),
+     *      where k is the number of bits set in shrink_axis_mask.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 28.
+     */
+    ANEURALNETWORKS_STRIDED_SLICE = 35,
+
+    /**
+     * Element-wise subtraction of two tensors.
+     *
+     * Takes two input tensors of identical {@link OperandCode} and compatible
+     * dimensions. The output is the result of subtracting the second input
+     * tensor from the first one, optionally modified by an activation function.
+     *
+     * Two dimensions are compatible when:
+     *     1. they are equal, or
+     *     2. one of them is 1
+     *
+     * The size of the output is the maximum size along each dimension of the
+     * input operands. It starts with the trailing dimensions, and works its way
+     * forward.
+     *
+     * Example:
+     *     input1.dimension =    {4, 1, 2}
+     *     input2.dimension = {5, 4, 3, 1}
+     *     output.dimension = {5, 4, 3, 2}
+     *
+     * Since API level 29, generic zero-sized input tensor is supported. Zero
+     * dimension is only compatible with 0 or 1. The size of the output
+     * dimension is zero if either of corresponding input dimension is zero.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} (since API level 29)
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: An n-D tensor, specifying the first input.
+     * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
+     *      as input0.
+     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *      {@link FuseCode} values. Specifies the activation to
+     *      invoke on the result.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint can be different from inputs' scale and zeroPoint.
+     *
+     * Available since API level 28.
+     */
+    ANEURALNETWORKS_SUB = 36,
+
+    /**
+     * Transposes the input tensor, permuting the dimensions according to the
+     * perm tensor.
+     *
+     * The returned tensor's dimension i corresponds to the input dimension
+     * perm[i]. If perm is not given, it is set to (n-1...0), where n is the
+     * rank of the input tensor. Hence by default, this operation performs a
+     * regular matrix transpose on 2-D input Tensors.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: An n-D tensor, specifying the tensor to be transposed.
+     *      Since API level 29, this tensor may be zero-sized.
+     * * 1: An optional 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32},
+     *      the permutation of the dimensions of the input tensor.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 28.
+     */
+    ANEURALNETWORKS_TRANSPOSE = 37,
+
+    // Operations below are available since API level 29.
+
+    /**
+     * Computes the absolute value of a tensor, element-wise.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: from 1.
+     *
+     * Inputs:
+     * * 0: A tensor.
+     *
+     * Outputs:
+     * * 0: The output tensor of same shape as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_ABS = 38,
+
+    /**
+     * Returns the index of the largest element along an axis.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1
+     *
+     * Inputs:
+     * * 0: An n-D tensor specifying the input. Must be non-empty.
+     * * 1: An {@link ANEURALNETWORKS_INT32} scalar specifying the axis to
+     *      reduce across. Negative index is used to specify axis from the
+     *      end (e.g. -1 for the last axis). Must be in the range [-n, n).
+     *
+     * Outputs:
+     * * 0: An (n - 1)-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor.
+     *
+     * Available since API level 29.
+     */
+    // There is no underscore in ARG_MAX to avoid name conflict with
+    // the macro defined in libc/kernel/uapi/linux/limits.h.
+    ANEURALNETWORKS_ARGMAX = 39,
+
+    /**
+     * Returns the index of the smallest element along an axis.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1
+     *
+     * Inputs:
+     * * 0: An n-D tensor specifying the input. Must be non-empty.
+     * * 1: An {@link ANEURALNETWORKS_INT32} scalar specifying the axis to
+     *      reduce across. Negative index is used to specify axis from the
+     *      end (e.g. -1 for the last axis). Must be in the range [-n, n).
+     *
+     * Outputs:
+     * * 0: An (n - 1)-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_ARGMIN = 40,  // See ARGMAX for naming discussion.
+
+    /**
+     * Transform axis-aligned bounding box proposals using bounding box deltas.
+     *
+     * Given the positions of bounding box proposals and the corresponding
+     * bounding box deltas for each class, return the refined bounding box
+     * regions. The resulting bounding boxes are cliped against the edges of
+     * the image.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT16_ASYMM}
+     *
+     * Inputs:
+     * * 0: A 2-D Tensor of shape [num_rois, 4], specifying the locations of the
+     *      bounding box proposals, each line with format [x1, y1, x2, y2].
+     *      For tensor of type {@link ANEURALNETWORKS_TENSOR_QUANT16_ASYMM},
+     *      the zeroPoint must be 0 and the scale must be 0.125. Zero num_rois
+     *      is supported for this tensor.
+     * * 1: A 2-D Tensor of shape [num_rois, num_classes * 4], specifying the
+     *      bounding box delta for each region of interest and each class. The
+     *      bounding box deltas are organized in the following order
+     *      [dx, dy, dw, dh], where dx and dy is the relative correction factor
+     *      for the center position of the bounding box with respect to the width
+     *      and height, dw and dh is the log-scale relative correction factor
+     *      for the width and height. For input0 of type
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT16_ASYMM}, this tensor should be
+     *      of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}. Zero num_rois is
+     *      supported for this tensor.
+     * * 2: An 1-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor, of shape
+     *      [num_rois], specifying the batch index of each box. Boxes with
+     *      the same batch index are grouped together. Zero num_rois is
+     *      supported for this tensor.
+     * * 3: A 2-D Tensor of shape [batches, 2], specifying the information of
+     *      each image in the batch, each line with format
+     *      [image_height, image_width].
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0, with shape
+     *      [num_rois, num_classes * 4], specifying the coordinates of each
+     *      output bounding box for each class, with format [x1, y1, x2, y2].
+     *      For type of {@link ANEURALNETWORKS_TENSOR_QUANT16_ASYMM}, the
+     *      scale must be 0.125 and the zero point must be 0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_AXIS_ALIGNED_BBOX_TRANSFORM = 41,
+
+    /**
+     * Performs a forward LSTM on the input followed by a backward LSTM.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: 3, either time-major or batch-major.
+     *
+     * All input and output tensors must be of the same type.
+     *
+     *
+     * Inputs:
+     * * 0: The input.
+     *      A 3-D tensor of shape:
+     *        If time-major: [max_time, batch_size, input_size]
+     *        If batch-major: [batch_size, max_time, input_size]
+     *      where "max_time" is the number of timesteps (sequence length),
+     *      "batch_size" corresponds to the batching dimension, and
+     *      "input_size" is the size of the input.
+     * * 1: The forward input-to-input weights. Optional.
+     *      A 2-D tensor of shape [fw_num_units, input_size], where “fw_num_units”
+     *      corresponds to the number of forward cell units.
+     * * 2: The forward input-to-forget weights.
+     *      A 2-D tensor of shape [fw_num_units, input_size].
+     * * 3: The forward input-to-cell weights.
+     *      A 2-D tensor of shape [fw_num_units, input_size].
+     * * 4: The forward input-to-output weights.
+     *      A 2-D tensor of shape [fw_num_units, input_size].
+     * * 5: The forward recurrent-to-input weights. Optional.
+     *      A 2-D tensor of shape [fw_num_units, fw_output_size], where “fw_output_size”
+     *      corresponds to either the number of cell units (i.e., fw_num_units),
+     *      or the second dimension of the “fw_projection_weights”, if defined.
+     * * 6: The forward recurrent-to-forget weights.
+     *      A 2-D tensor of shape [fw_num_units, fw_output_size].
+     * * 7: The forward recurrent-to-cell weights.
+     *      A 2-D tensor of shape [fw_num_units, fw_output_size].
+     * * 8: The forward recurrent-to-output weights.
+     *      A 2-D tensor of shape [fw_num_units, fw_output_size].
+     * * 9: The forward cell-to-input weights. Optional.
+     *      A 1-D tensor of shape [fw_num_units].
+     * * 10: The forward cell-to-forget weights. Optional.
+     *       A 1-D tensor of shape [fw_num_units].
+     * * 11: The forward cell-to-output weights. Optional.
+     *       A 1-D tensor of shape [fw_num_units].
+     * * 12: The forward input gate bias. Optional.
+     *       A 1-D tensor of shape [fw_num_units].
+     * * 13: The forward forget gate bias.
+     *       A 1-D tensor of shape [fw_num_units].
+     * * 14: The forward cell gate bias.
+     *       A 1-D tensor of shape [fw_num_units].
+     * * 15: The forward output gate bias.
+     *       A 1-D tensor of shape [fw_num_units].
+     * * 16: The forward projection weights. Optional.
+     *       A 2-D tensor of shape [fw_output_size, fw_num_units].
+     * * 17: The forward projection bias. Optional.
+     *       A 1-D tensor of shape [fw_output_size].
+     * * 18: The backward input-to-input weights. Optional.
+     *       A 2-D tensor of shape [bw_num_units, input_size], where “bw_num_units”
+     *       corresponds to the number of backward cell units.
+     * * 19: The backward input-to-forget weights.
+     *       A 2-D tensor of shape [bw_num_units, input_size].
+     * * 20: The backward input-to-cell weights.
+     *       A 2-D tensor of shape [bw_num_units, input_size].
+     * * 21: The backward input-to-output weights.
+     *       A 2-D tensor of shape [bw_num_units, input_size].
+     * * 22: The backward recurrent-to-input weights. Optional.
+     *       A 2-D tensor of shape [bw_num_units, bw_output_size], where “bw_output_size”
+     *       corresponds to either the number of cell units (i.e., “bw_num_units”),
+     *       or the second dimension of the “bw_projection_weights”, if defined.
+     * * 23: The backward recurrent-to-forget weights.
+     *       A 2-D tensor of shape [bw_num_units, bw_output_size].
+     * * 24: The backward recurrent-to-cell weights.
+     *       A 2-D tensor of shape [bw_num_units, bw_output_size].
+     * * 25: The backward recurrent-to-output weights.
+     *       A 2-D tensor of shape [bw_num_units, bw_output_size].
+     * * 26: The backward cell-to-input weights. Optional.
+     *       A 1-D tensor of shape [bw_num_units].
+     * * 27: The backward cell-to-forget weights. Optional.
+     *       A 1-D tensor of shape [bw_num_units].
+     * * 28: The backward cell-to-output weights. Optional.
+     *       A 1-D tensor of shape [bw_num_units].
+     * * 29: The backward input gate bias. Optional.
+     *       A 1-D tensor of shape [bw_num_units].
+     * * 30: The backward forget gate bias.
+     *       A 1-D tensor of shape [bw_num_units].
+     * * 31: The backward cell gate bias.
+     *       A 1-D tensor of shape [bw_num_units].
+     * * 32: The backward output gate bias.
+     *       A 1-D tensor of shape [bw_num_units].
+     * * 33: The backward projection weights. Optional.
+     *       A 2-D tensor of shape [bw_output_size, bw_num_units].
+     * * 34: The backward projection bias. Optional.
+     *       A 1-D tensor of shape [bw_output_size].
+     * * 35: The forward input activation state.
+     *       A 2-D tensor of shape [batch_size, bw_output_size].
+     * * 36: The forward input cell state.
+     *       A 2-D tensor of shape [batch_size, bw_num_units].
+     * * 37: The backward input activation state.
+     *       A 2-D tensor of shape [batch_size, bw_output_size].
+     * * 38: The backward input cell state.
+     *       A 2-D tensor of shape [batch_size, bw_num_units].
+     * * 39: The auxiliary input. Optional.
+     *       A 3-D tensor of shape [max_time, batch_size, input_size], where “batch_size”
+     *       corresponds to the batching dimension, and “input_size” is the size
+     *       of the input.
+     * * 40: The forward auxiliary input-to-input weights. Optional.
+     *       A 2-D tensor of shape [fw_num_units, input_size].
+     * * 41: The forward auxiliary input-to-forget weights. Optional.
+     *       A 2-D tensor of shape [fw_num_units, input_size].
+     * * 42: The forward auxiliary input-to-cell weights. Optional.
+     *       A 2-D tensor of shape [fw_num_units, input_size].
+     * * 43: The forward auxiliary input-to-output weights. Optional.
+     *       A 2-D tensor of shape [fw_num_units, input_size].
+     * * 44: The backward auxiliary input-to-input weights. Optional.
+     *       A 2-D tensor of shape [bw_num_units, input_size].
+     * * 45: The backward auxiliary input-to-forget weights. Optional.
+     *       A 2-D tensor of shape [bw_num_units, input_size].
+     * * 46: The backward auxiliary input-to-cell weights. Optional.
+     *       A 2-D tensor of shape [bw_num_units, input_size].
+     * * 47: The backward auxiliary input-to-output weights. Optional.
+     *       A 2-D tensor of shape [bw_num_units, input_size].
+     * * 48: The activation function.
+     *       A value indicating the activation function:
+     *       <ul>
+     *       <li>0: None;
+     *       <li>1: Relu;
+     *       <li>3: Relu6;
+     *       <li>4: Tanh;
+     *       <li>6: Sigmoid.
+     *       </ul>
+     * * 49: The clipping threshold for the cell state, such
+     *       that values are bound within [-cell_clip, cell_clip]. If set to 0.0
+     *       then clipping is disabled.
+     *       If all the input tensors have type {@link ANEURALNETWORKS_TENSOR_FLOAT32},
+     *       this scalar must be of the type {@link ANEURALNETWORKS_FLOAT32},
+     *       otherwise if all the input tensors have the type {@link
+     *       ANEURALNETWORKS_TENSOR_FLOAT16}, this scalar must be of type {@link
+     *       ANEURALNETWORKS_FLOAT16}.
+     * * 50: The clipping threshold for the output from the
+     *       projection layer, such that values are bound within
+     *       [-proj_clip, proj_clip]. If set to 0.0 then clipping is disabled.
+     *       If all the input tensors have type {@link ANEURALNETWORKS_TENSOR_FLOAT32},
+     *       this scalar must be of the type {@link ANEURALNETWORKS_FLOAT32},
+     *       otherwise if all the input tensors have the type {@link
+     *       ANEURALNETWORKS_TENSOR_FLOAT16}, this scalar must be of type {@link
+     *       ANEURALNETWORKS_FLOAT16}.
+     * * 51: merge_outputs
+     *       An {@link ANEURALNETWORKS_BOOL} scalar specifying if the outputs
+     *       from forward and backward cells should be merged.
+     * * 52: time_major
+     *       An {@link ANEURALNETWORKS_BOOL} scalar specifying the shape format
+     *       of input and output tensors.
+     * * 53: The forward input layer normalization weights. Optional.
+     *       A 1-D tensor of shape [fw_num_units]. Used to rescale normalized inputs
+     *       to activation at input gate.
+     * * 54: The forward forget layer normalization weights. Optional.
+     *       A 1-D tensor of shape [fw_num_units]. Used to rescale normalized inputs
+     *       to activation at forget gate.
+     * * 55: The forward cell layer normalization weights. Optional.
+     *       A 1-D tensor of shape [fw_num_units]. Used to rescale normalized inputs
+     *       to activation at cell gate.
+     * * 56: The forward output layer normalization weights. Optional.
+     *       A 1-D tensor of shape [fw_num_units]. Used to rescale normalized inputs
+     *       to activation at output gate.
+     * * 57: The backward input layer normalization weights. Optional.
+     *       A 1-D tensor of shape [bw_num_units]. Used to rescale normalized inputs
+     *       to activation at input gate.
+     * * 58: The backward forget layer normalization weights. Optional.
+     *       A 1-D tensor of shape [bw_num_units]. Used to rescale normalized inputs
+     *       to activation at forget gate.
+     * * 59: The backward cell layer normalization weights. Optional.
+     *       A 1-D tensor of shape [bw_num_units]. Used to rescale normalized inputs
+     *       to activation at cell gate.
+     * * 60: The backward output layer normalization weights. Optional.
+     *       A 1-D tensor of shape [bw_num_units]. Used to rescale normalized inputs
+     *       to activation at output gate.
+     *
+     * Outputs:
+     * * 0: The forward output.
+     *      A 3-D tensor of shape:
+     *        If time-major and not merge_outputs:
+     *          [max_time, batch_size, fw_output_size]
+     *        If time-major and merge_outputs:
+     *          [max_time, batch_size, fw_output_size + bw_output_size]
+     *        If batch-major and not merge_outputs:
+     *          [batch_size, max_time, fw_output_size]
+     *        If batch-major and merge_outputs:
+     *          [batch_size, max_time, fw_output_size + bw_output_size]
+     * * 1: The backward output.  Unused if merge_outputs is true.
+     *      A 3-D tensor of shape:
+     *        If time-major: [max_time, batch_size, bw_output_size]
+     *        If batch-major: [batch_size, max_time, bw_output_size]
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_BIDIRECTIONAL_SEQUENCE_LSTM = 42,
+
+    /**
+     * A recurrent neural network layer that applies a basic RNN cell to a
+     * sequence of inputs in forward and backward directions.
+     *
+     * This Op unrolls the input along the sequence dimension, and implements
+     * the following operation for each element in the sequence s =
+     * 1...sequence_length:
+     *   fw_outputs[s] = fw_state = activation(inputs[s] * fw_input_weights’ +
+     *          fw_state * fw_recurrent_weights’ + fw_bias)
+     *
+     * And for each element in sequence t = sequence_length : 1
+     *   bw_outputs[t] = bw_state = activation(inputs[t] * bw_input_weights’ +
+     *          bw_state * bw_recurrent_weights’ + bw_bias)
+     *
+     * Where:
+     * * “{fw,bw}_input_weights” is a weight matrix that multiplies the inputs;
+     * * “{fw,bw}_recurrent_weights” is a weight matrix that multiplies the
+     *    current “state” which itself is the output from the previous time step
+     *    computation;
+     * * “{fw,bw}_bias” is a bias vector (added to each output vector in the
+     *    batch);
+     * * “activation” is the function passed as the “fused_activation_function”
+     *   argument (if not “NONE”).
+     *
+     * The op also supports an auxiliary input. Regular cell feeds one input
+     * into the two RNN cells in the following way:
+     *
+     *       INPUT  (INPUT_REVERSED)
+     *         |         |
+     *    ---------------------
+     *    | FW_RNN     BW_RNN |
+     *    ---------------------
+     *         |         |
+     *      FW_OUT     BW_OUT
+     *
+     * An op with an auxiliary input takes two inputs and feeds them into the
+     * RNN cells in the following way:
+     *
+     *       AUX_INPUT   (AUX_INPUT_REVERSED)
+     *           |             |
+     *     INPUT | (INPUT_R'D.)|
+     *       |   |       |     |
+     *    -----------------------
+     *    |  \  /        \    / |
+     *    | FW_RNN       BW_RNN |
+     *    -----------------------
+     *         |           |
+     *      FW_OUT      BW_OUT
+     *
+     * While stacking this op on top of itself, this allows to connect both
+     * forward and backward outputs from previous cell to the next cell's
+     * inputs.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * The input tensors must all be the same type.
+     *
+     * Inputs:
+     * * 0: input.
+     *      A 3-D tensor. The shape is defined by the input 6 (timeMajor). If
+     *      it is set to true, then the input has a shape [maxTime, batchSize,
+     *      inputSize], otherwise the input has a shape [batchSize, maxTime,
+     *      inputSize].
+     * * 1: fwWeights.
+     *      A 2-D tensor of shape [fwNumUnits, inputSize].
+     * * 2: fwRecurrentWeights.
+     *      A 2-D tensor of shape [fwNumUnits, fwNumUnits].
+     * * 3: fwBias.
+     *      A 1-D tensor of shape [fwNumUnits].
+     * * 4: fwHiddenState.
+     *      A 2-D tensor of shape [batchSize, fwNumUnits]. Specifies a hidden
+     *      state input for the first time step of the computation.
+     * * 5: bwWeights.
+     *      A 2-D tensor of shape [bwNumUnits, inputSize].
+     * * 6: bwRecurrentWeights.
+     *      A 2-D tensor of shape [bwNumUnits, bwNumUnits].
+     * * 7: bwBias.
+     *      A 1-D tensor of shape [bwNumUnits].
+     * * 8: bwHiddenState
+     *      A 2-D tensor of shape [batchSize, bwNumUnits]. Specifies a hidden
+     *      state input for the first time step of the computation.
+     * * 9: auxInput.
+     *      A 3-D tensor. The shape is the same as of the input 0.
+     * * 10:fwAuxWeights.
+     *      A 2-D tensor of shape [fwNumUnits, inputSize].
+     * * 11:bwAuxWeights.
+     *      A 2-D tensor of shape [bwNumUnits, inputSize].
+     * * 12:fusedActivationFunction.
+     *      A {@link FuseCode} value indicating the activation function. If
+     *      “NONE” is specified then it results in a linear activation.
+     * * 13:timeMajor
+     *      An {@link ANEURALNETWORKS_BOOL} scalar specifying the shape format
+     *      of input and output tensors.
+     * * 14:mergeOutputs
+     *      An {@link ANEURALNETWORKS_BOOL} scalar specifying if the outputs
+     *      from forward and backward cells are separate (if set to false) or
+     *      concatenated (if set to true).
+     * Outputs:
+     * * 0: fwOutput.
+     *      A 3-D tensor. The first two dimensions of the shape are defined by
+     *      the input 6 (timeMajor) and the third dimension is defined by the
+     *      input 14 (mergeOutputs). If timeMajor is set to true, then the first
+     *      two dimensions are [maxTime, batchSize], otherwise they are set to
+     *      [batchSize, maxTime]. If mergeOutputs is set to true, then the third
+     *      dimension is equal to (fwNumUnits + bwNumUnits), otherwise it is set
+     *      to fwNumUnits.
+     * * 1: bwOutput.
+     *      A 3-D tensor. If the input 14 (mergeOutputs) is set to true, then
+     *      this tensor is not produced. The shape is defined by the input 6
+     *      (timeMajor). If it is set to true, then the shape is set to
+     *      [maxTime, batchSize, bwNumUnits], otherwise the shape is set to
+     *      [batchSize, maxTime, bwNumUnits].
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_BIDIRECTIONAL_SEQUENCE_RNN = 43,
+
+    /**
+     * Greedily selects a subset of bounding boxes in descending order of score.
+     *
+     * This op applies NMS algorithm to each class. In each loop of execution,
+     * the box with maximum score gets selected and removed from the pending set.
+     * The scores of the rest of boxes are lowered according to the
+     * intersection-over-union (IOU) overlapping with the previously selected
+     * boxes and a specified NMS kernel method. Any boxes with score less
+     * than a threshold are removed from the pending set.
+     *
+     * Three NMS kernels are supported:
+     * * Hard:     score_new = score_old * (1 if IoU < threshold else 0)
+     * * Linear:   score_new = score_old * (1 if IoU < threshold else 1 - IoU)
+     * * Gaussian: score_new = score_old * exp(- IoU^2 / sigma)
+     *
+     * Axis-aligned bounding boxes are represented by its upper-left corner
+     * coordinate (x1,y1) and lower-right corner coordinate (x2,y2). A valid
+     * bounding box should satisfy x1 <= x2 and y1 <= y2.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Inputs:
+     * * 0: A 2-D Tensor of shape [num_rois, num_classes], specifying the score
+     *      of each bounding box proposal. The boxes are grouped by batches in the
+     *      first dimension. Zero num_rois is supported for this tensor.
+     * * 1: A 2-D Tensor specifying the bounding boxes of shape
+     *      [num_rois, num_classes * 4], organized in the order [x1, y1, x2, y2].
+     *      The boxes are grouped by batches in the first dimension. The sequential
+     *      order of the boxes corresponds with input0. For input0 of type
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, this tensor should be of
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT16_ASYMM}, with zeroPoint of 0 and
+     *      scale of 0.125. Zero num_rois is supported for this tensor.
+     * * 2: A 1-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor, of shape
+     *      [num_rois], specifying the batch index of each box. Boxes with
+     *      the same batch index are grouped together.
+     * * 3: An {@link ANEURALNETWORKS_FLOAT32} scalar, score_threshold. Boxes
+     *      with scores lower than the threshold are filtered before sending
+     *      to the NMS algorithm.
+     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the maximum
+     *      number of selected bounding boxes for each image. Set to a negative
+     *      value for unlimited number of output bounding boxes.
+     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the NMS
+     *      kernel method, options are 0:hard, 1:linear, 2:gaussian.
+     * * 6: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the IoU
+     *      threshold in hard and linear NMS kernel. This field is ignored if
+     *      gaussian kernel is selected.
+     * * 7: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the sigma in
+     *      gaussian NMS kernel. This field is ignored if gaussian kernel is
+     *      not selected.
+     * * 8: An {@link ANEURALNETWORKS_FLOAT32} scalar, nms_score_threshold.
+     *      Boxes with scores lower than the threshold are dropped during the
+     *      score updating phase in soft NMS.
+     *
+     * Outputs:
+     * * 0: A 1-D Tensor of the same {@link OperandCode} as input0, with shape
+     *      [num_output_rois], specifying the score of each output box. The boxes
+     *      are grouped by batches, but the sequential order in each batch is not
+     *      guaranteed. For type of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+     *      the scale and zero point must be the same as input0.
+     * * 1: A 2-D Tensor of the same {@link OperandCode} as input1, with shape
+     *      [num_output_rois, 4], specifying the coordinates of each
+     *      output bounding box with the same format as input1. The sequential
+     *      order of the boxes corresponds with output0. For type of
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT16_ASYMM}, the scale must be
+     *      0.125 and the zero point must be 0.
+     * * 2: A 1-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor, of shape
+     *      [num_output_rois], specifying the class of each output box. The
+     *      sequential order of the boxes corresponds with output0.
+     * * 3: A 1-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor, of shape
+     *      [num_output_rois], specifying the batch index of each box. Boxes
+     *      with the same batch index are grouped together.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_BOX_WITH_NMS_LIMIT = 44,
+
+    /**
+     * Casts a tensor to a new type.
+     *
+     * This operation ignores the scale and zeroPoint of quanized tensors,
+     * e.g. it treats a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} input
+     * as a tensor of uint8 values.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1
+     *
+     * Inputs:
+     * * 0: A tensor.
+     *
+     * Outputs:
+     * * 0: A tensor with the same shape as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_CAST = 45,
+
+    /**
+     * Shuffle the channels of the input tensor.
+     *
+     * Given an input tensor and a integer value of num_groups, CHANNEL_SHUFFLE
+     * divide the channel dimension into num_groups groups, and reorganize the
+     * channels by grouping channels with the same index in each group.
+     *
+     * Along the channel dimension, the output is calculated using this formula:
+     *
+     *     output_channel[k * num_groups + g] = input_channel[g * group_size + k]
+     *
+     * where group_size = num_channels / num_groups
+     *
+     * The number of channels must be divisible by num_groups.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: An n-D tensor, specifying the tensor to be shuffled.
+     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the number of
+     *      groups.
+     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the dimension
+     *      channel shuffle would be performed on. Negative index is used to
+     *      specify axis from the end (e.g. -1 for the last axis). Must be in
+     *      the range [-n, n).
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} and same shape as input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_CHANNEL_SHUFFLE = 46,
+
+    /**
+     * Apply postprocessing steps to bounding box detections.
+     *
+     * Bounding box detections are generated by applying transformation on a set
+     * of predefined anchors with the bounding box deltas from bounding box
+     * regression. A final step of hard NMS is applied to limit the number of
+     * returned boxes.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Inputs:
+     * * 0: A 3-D Tensor of shape [batches, num_anchors, num_classes], specifying
+     *      the score of each anchor with each class. Class 0 for each
+     *      [batches, num_anchors, 0] is background and will be ignored.
+     * * 1: A 3-D Tensor of shape [batches, num_anchors, length_box_encoding], with
+     *      the first four values in length_box_encoding specifying the bounding
+     *      box deltas. The box deltas are encoded in the order of [dy, dx, dh, dw],
+     *      where dy and dx is the linear-scale relative correction factor for the
+     *      center position of the bounding box with respect to the width and height,
+     *      dh and dw is the log-scale relative correction factor for the width and
+     *      height. All the entries in length_box_encoding beyond the first four
+     *      values are ignored in this operation.
+     * * 2: A 2-D Tensor of shape [num_anchors, 4], specifying the shape of each
+     *      predefined anchor, with format [ctr_y, ctr_x, h, w], where ctr_y and
+     *      ctr_x are the center position of the box, and h and w are the height
+     *      and the width.
+     * * 3: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the scaling
+     *      factor for dy in bounding box deltas.
+     * * 4: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the scaling
+     *      factor for dx in bounding box deltas.
+     * * 5: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the scaling
+     *      factor for dh in bounding box deltas.
+     * * 6: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the scaling
+     *      factor for dw in bounding box deltas.
+     * * 7: An {@link ANEURALNETWORKS_BOOL} scalar, set to true to use regular
+     *      multi-class NMS algorithm that do NMS separately for each class,
+     *      set to false for a faster algorithm that only do one single NMS
+     *      using the highest class score..
+     * * 8: An {@link ANEURALNETWORKS_INT32} scalar, max_num_detections, specifying
+     *      the maximum number of boxes for the output. Boxes with the lowest
+     *      scores are discarded to meet the limit.
+     * * 9: An {@link ANEURALNETWORKS_INT32} scalar, only used when input7 is
+     *      set to false, specifying the maximum number of classes per detection.
+     * * 10: An {@link ANEURALNETWORKS_INT32} scalar, only used when input7 is
+     *       set to true, specifying the maximum number of detections when
+     *       applying NMS algorithm for each single class.
+     * * 11: A scalar, score_threshold. Boxes with scores lower than the
+     *       threshold are filtered before sending to the NMS algorithm. The
+     *       scalar must be of {@link ANEURALNETWORKS_FLOAT16} if input0 is of
+     *       {@link ANEURALNETWORKS_TENSOR_FLOAT16} and of {@link
+     *       ANEURALNETWORKS_FLOAT32} if input0 is of {@link
+     *       ANEURALNETWORKS_TENSOR_FLOAT32}.
+     * * 12: A scalar, specifying the IoU threshold for hard NMS. The scalar
+     *       must be of {@link ANEURALNETWORKS_FLOAT16} if input0 is of {@link
+     *       ANEURALNETWORKS_TENSOR_FLOAT16} and of {@link
+     *       ANEURALNETWORKS_FLOAT32} if input0 is of {@link
+     *       ANEURALNETWORKS_TENSOR_FLOAT32}.
+     * * 13: An {@link ANEURALNETWORKS_BOOL} scalar, set to true to include
+     *       background class in the list of label map for the output, set
+     *       to false to not include the background. When the background
+     *       class is included, it has label 0 and the output classes start
+     *       at 1 in the label map, otherwise, the output classes start at 0.
+     *
+     * Outputs:
+     * * 0: A 2-D tensor of the same {@link OperandCode} as input0, with shape
+     *      [batches, max_num_detections], specifying the score of each output
+     *      detections.
+     * * 1: A 3-D tensor of shape [batches, max_num_detections, 4], specifying the
+     *      coordinates of each output bounding box, with format
+     *      [y1, x1, y2, x2].
+     * * 2: A 2-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor, of shape
+     *      [batches, max_num_detections], specifying the class label for each
+     *      output detection.
+     * * 3: An 1-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor, of shape [batches],
+     *      specifying the number of valid output detections for each batch.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_DETECTION_POSTPROCESSING = 47,
+
+    /**
+     * For input tensors x and y, computes x == y elementwise.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_BOOL8}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1
+     *
+     * This operation supports broadcasting.
+     *
+     * Inputs:
+     * * 0: A tensor.
+     * * 1: A tensor of the same {@link OperandCode} and dimensions compatible
+     *      with input0.
+     *
+     * Outputs:
+     * * 0: A tensor of {@link ANEURALNETWORKS_TENSOR_BOOL8}.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_EQUAL = 48,
+
+    /**
+     * Computes exponential of x element-wise.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: from 1.
+     *
+     * Inputs:
+     * * 0: A tensor.
+     *
+     * Outputs:
+     * * 0: The output tensor of same shape as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_EXP = 49,
+
+    /**
+     * Inserts a dimension of 1 into a tensor's shape.
+     *
+     * Given a tensor input, this operation inserts a dimension of 1 at the
+     * given dimension index of input's shape. The dimension index starts at
+     * zero; if you specify a negative dimension index, it is counted backward
+     * from the end.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1
+     *
+     * Inputs:
+     * * 0: An n-D tensor.
+     * * 1: An {@link ANEURALNETWORKS_INT32} scalar specifying the dimension
+     *      index to expand. Must be in the range [-(n + 1), (n + 1)).
+     *
+     * Outputs:
+     * * 0: An (n + 1)-D tensor with the same {@link OperandCode} and data as
+     *      input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_EXPAND_DIMS = 50,
+
+    /**
+     * Gathers values along an axis.
+     *
+     * Produces an output tensor with shape
+     *     input0.dimension[:axis] + indices.dimension + input0.dimension[axis + 1:]
+     * where:
+     *     # Vector indices (output is rank(input0)).
+     *     output[a_0, ..., a_n, i, b_0, ..., b_n] =
+     *       input0[a_0, ..., a_n, indices[i], b_0, ..., b_n]
+     *
+     *     # Higher rank indices (output is rank(input0) + rank(indices) - 1).
+     *     output[a_0, ..., a_n, i, ..., j, b_0, ... b_n] =
+     *       input0[a_0, ..., a_n, indices[i, ..., j], b_0, ..., b_n]
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1
+     *
+     * Inputs:
+     * * 0: An n-D tensor from which to gather values.
+     * * 1: An {@link ANEURALNETWORKS_INT32} scalar specifying the axis.
+     *      Negative index is used to specify axis from the end
+     *      (e.g. -1 for the last axis). Must be in the range [-n, n).
+     * * 2: A k-D tensor {@link ANEURALNETWORKS_TENSOR_INT32} of indices.
+     *      The values must be in the bounds of the corresponding dimensions
+     *      of input0.
+     *
+     * Outputs:
+     * * 0: An (n + k - 1)-D tensor with the same {@link OperandCode} as input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_GATHER = 51,
+
+    /**
+     * Generate aixs-aligned bounding box proposals.
+     *
+     * Bounding box proposals are generated by applying transformation on a set
+     * of predefined anchors with the bounding box deltas from bounding box
+     * regression. A final step of hard NMS is applied to limit the number of
+     * returned boxes.
+     *
+     * Axis-aligned bounding boxes are represented by its upper-left corner
+     * coordinate (x1,y1) and lower-right corner coordinate (x2,y2). A valid
+     * bounding box should satisfy x1 <= x2 and y1 <= y2.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Inputs:
+     * * 0: A 4-D Tensor specifying the score of each anchor at each
+     *      location. With "NHWC" data layout, the tensor shape is
+     *      [batches, height, width, num_anchors]. With "NCHW" data layout,
+     *      the tensor shape is [batches, num_anchors, height, width].
+     * * 1: A 4-D Tensor specifying the bounding box deltas. With "NHWC" data
+     *      layout, the tensor shape is [batches, height, width, num_anchors * 4].
+     *      With "NCHW" data layout, the tensor shape is
+     *      [batches, num_anchors * 4, height, width]. The box deltas are encoded
+     *      in the order of [dx, dy, dw, dh], where dx and dy is the linear-scale
+     *      relative correction factor for the center position of the bounding box
+     *      with respect to the width and height, dw and dh is the log-scale
+     *      relative correction factor for the width and height. The last
+     *      dimensions is the channel dimension.
+     * * 2: A 2-D Tensor of shape [num_anchors, 4], specifying the shape of each
+     *      predefined anchor, with format [x1, y1, x2, y2]. For input0 of type
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, this tensor should be of
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT16_SYMM}, with scale of 0.125.
+     * * 3: A 2-D Tensor of shape [batches, 2], specifying the size of
+     *      each image in the batch, with format [image_height, image_width].
+     *      For input0 of type {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, this
+     *      tensor should be of {@link ANEURALNETWORKS_TENSOR_QUANT16_SYMM}, with
+     *      scale of 0.125.
+     * * 4: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the ratio
+     *      from the height of original image to the height of feature map.
+     * * 5: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the ratio
+     *      from the width of original image to the width of feature map.
+     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the maximum
+     *      number of boxes before going into the hard NMS algorithm. Boxes
+     *      with the lowest scores are discarded to meet the limit. Set to
+     *      a non-positive value for unlimited number.
+     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the maximum
+     *      number of boxes returning from the hard NMS algorithm. Boxes
+     *      with the lowest scores are discarded to meet the limit. Set to
+     *      a non-positive value for unlimited number.
+     * * 8: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the IoU
+     *      threshold for hard NMS.
+     * * 9: An {@link ANEURALNETWORKS_FLOAT32} scalar, min_size. Boxes with
+     *      height or width lower than the absolute threshold are filtered out.
+     * * 10: An {@link ANEURALNETWORKS_BOOL} scalar, set to true to specify
+     *       NCHW data layout for input0 and input1. Set to false for NHWC.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0, of shape
+     *      [num_output_rois], specifying the score of each output box.
+     *      The boxes are grouped by batches, but the sequential order in
+     *      each batch is not guaranteed. For type of
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the scale and zero
+     *      point must be the same as input0.
+     * * 1: A tensor of the same {@link OperandCode} as input3, of shape
+     *      [num_output_rois, 4], specifying the coordinates of each output
+     *      bounding box for each class, with format [x1, y1, x2, y2].
+     *      The sequential order of the boxes corresponds with output0.
+     *      For type of {@link ANEURALNETWORKS_TENSOR_QUANT16_ASYMM}, the
+     *      scale must be 0.125 and the zero point must be 0.
+     * * 2: A 1-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor, of shape
+     *      [num_output_rois], specifying the batch index of each box. Boxes
+     *      with the same batch index are grouped together.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_GENERATE_PROPOSALS = 52,
+
+    /**
+     * For input tensors x and y, computes x > y elementwise.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_BOOL8}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1
+     *
+     * This operation supports broadcasting.
+     *
+     * Inputs:
+     * * 0: A tensor.
+     * * 1: A tensor of the same {@link OperandCode} and dimensions compatible
+     *      with input0.
+     *
+     * Outputs:
+     * * 0: A tensor of {@link ANEURALNETWORKS_TENSOR_BOOL8}.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_GREATER = 53,
+    /**
+     * For input tensors x and y, computes x >= y elementwise.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_BOOL8}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1
+     *
+     * This operation supports broadcasting.
+     *
+     * Inputs:
+     * * 0: A tensor.
+     * * 1: A tensor of the same {@link OperandCode} and dimensions compatible
+     *      with input0.
+     *
+     * Outputs:
+     * * 0: A tensor of {@link ANEURALNETWORKS_TENSOR_BOOL8}.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_GREATER_EQUAL = 54,
+
+    /**
+     * Performs a grouped 2-D convolution operation.
+     *
+     * Given an input tensor of shape [batches, height, width, depth_in] and a
+     * filter tensor of shape [depth_out, filter_height, filter_width, depth_group]
+     * containing depth_out convolutional filters of depth depth_group, GROUPED_CONV
+     * applies a group of different filters to each input channel group, then
+     * concatenates the results together.
+     *
+     * Specifically, the input channels are divided into num_groups groups, each with
+     * depth depth_group, i.e. depth_in = num_groups * depth_group. The convolutional
+     * filters are also divided into num_groups groups, i.e. depth_out is divisible
+     * by num_groups. GROUPED_CONV applies each group of filters to the corresponding
+     * input channel group, and the result are concatenated together.
+     *
+     * The output dimensions are functions of the filter dimensions, stride, and
+     * padding.
+     *
+     * The values in the output tensor are computed as:
+     *
+     *     output[b, i, j, g * channel_multiplier + q] =
+     *         sum_{di, dj, dk} (
+     *             input[b, strides[1] * i + di, strides[2] * j + dj,
+     *                   g * depth_group + dk] *
+     *             filter[g * channel_multiplier + q, di, dj, dk]
+     *         ) + bias[channel]
+     *
+     * where channel_multiplier = depth_out / num_groups
+     *
+     * Supported tensor {@link OperandCode} configurations:
+     * * 16 bit floating point:
+     * * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} for input, filter, output, and bias.
+     *
+     * * 32 bit floating point:
+     * * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} for input, filter, output, and bias.
+     *
+     * * Quantized:
+     * * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} for input, filter, and output.
+     * * * {@link ANEURALNETWORKS_TENSOR_INT32} for bias (with scale set to
+     * * * input.scale * filter.scale).
+     *
+     * * Quantized with symmetric per channel quantization for the filter:
+     * * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} for input, and output.
+     * * * {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL} for filter.
+     * * * {@link ANEURALNETWORKS_TENSOR_INT32} for bias (scale set to 0.0,
+     * * * each value scaling is separate and equal to input.scale * filter.scales[channel]).
+     *
+     * Supported tensor rank: 4, with "NHWC" or "NCHW" data layout.
+     * With the default data layout NHWC, the data is stored in the order of:
+     * [batch, height, width, channels]. Alternatively, the data layout could
+     * be NCHW, the data storage order of: [batch, channels, height, width].
+     *
+     * Both explicit padding and implicit padding are supported.
+     *
+     * Inputs (explicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input, where depth_in = num_groups * depth_group.
+     * * 1: A 4-D tensor, of shape
+     *      [depth_out, filter_height, filter_width, depth_group], specifying
+     *      the filter, where depth_out must be divisible by num_groups.  For
+     *      tensor of type {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL}
+     *      the channel dimension (channelDim at
+     *      {@link ANeuralNetworksSymmPerChannelQuantParams}) must be set to 0.
+     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
+     *      tensor of type {@link ANEURALNETWORKS_TENSOR_FLOAT32} or
+     *      {@link ANEURALNETWORKS_TENSOR_FLOAT16}, the bias must be of the same
+     *      type. For filter tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+     *      the bias should be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint
+     *      of 0 and bias_scale == input_scale * filter_scale. For filter tensor
+     *      of {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL}, the bias
+     *      should be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of
+     *      0 and bias_scale of 0. The actual scale of each value 'i' is equal to
+     *      bias_scale[i] = input_scale * filter_scale[i].
+     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the left, in the ‘width’ dimension.
+     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the right, in the ‘width’ dimension.
+     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the top, in the ‘height’ dimension.
+     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the bottom, in the ‘height’ dimension.
+     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 9: An {@link ANEURALNETWORKS_INT32} scalar, specifying the number of
+            groups.
+     * * 10: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *       {@link FuseCode} values. Specifies the activation to
+     *       invoke on the result.
+     * * 11: An {@link ANEURALNETWORKS_BOOL} scalar, set to true to specify
+     *       NCHW data layout for input0 and output0. Set to false for NHWC.
+     *
+     * Inputs (implicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input, where depth_in = num_groups * depth_group.
+     * * 1: A 4-D tensor, of shape
+     *      [depth_out, filter_height, filter_width, depth_group], specifying
+     *      the filter, where depth_out must be divisible by num_groups.  For
+     *      tensor of type {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL}
+     *      the channel dimension (channelDim at
+     *      {@link ANeuralNetworksSymmPerChannelQuantParams}) must be set to 0.
+     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
+     *      tensor of type {@link ANEURALNETWORKS_TENSOR_FLOAT32} or
+     *      {@link ANEURALNETWORKS_TENSOR_FLOAT16}, the bias must be of the same
+     *      type. For filter tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+     *      the bias should be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint
+     *      of 0 and bias_scale == input_scale * filter_scale. For filter tensor
+     *      of {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL}, the bias
+     *      should be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of
+     *      0 and bias_scale of 0. The actual scale of each value 'i' is equal to
+     *      bias_scale[i] = input_scale * filter_scale[i].
+     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the implicit
+     *      padding scheme, has to be one of the
+     *      {@link PaddingCode} values.
+     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the number of
+     *      groups.
+     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *      {@link FuseCode} values. Specifies the activation to
+     *      invoke on the result.
+     * * 8: An {@link ANEURALNETWORKS_BOOL} scalar, set to true to specify
+     *      NCHW data layout for input0 and output0. Set to false for NHWC.
+     *
+     * Outputs:
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, out_height, out_width, depth_out].
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint can be different from inputs' scale and zeroPoint.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_GROUPED_CONV_2D = 55,
+
+    /**
+     * Localize the maximum keypoints from heatmaps.
+     *
+     * This operation approximates the accurate maximum keypoint scores and
+     * indices after bicubic upscaling by using Taylor expansion up to the
+     * quadratic term.
+     *
+     * The bounding box is represented by its upper-left corner coordinate
+     * (x1,y1) and lower-right corner coordinate (x2,y2) in the original image.
+     * A valid bounding box should satisfy x1 <= x2 and y1 <= y2.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: 4, with "NHWC" or "NCHW" data layout.
+     * With the default data layout NHWC, the data is stored in the order of:
+     * [batch, height, width, channels]. Alternatively, the data layout could
+     * be NCHW, the data storage order of: [batch, channels, height, width].
+     *
+     * Inputs:
+     * * 0: A 4-D Tensor of shape
+     *      [num_boxes, heatmap_size, heatmap_size, num_keypoints],
+     *      specifying the heatmaps, the height and width of heatmaps should
+     *      be the same, and must be greater than or equal to 2.
+     * * 1: A 2-D Tensor of shape [num_boxes, 4], specifying the bounding boxes,
+     *      each with format [x1, y1, x2, y2]. For input0 of type
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, this tensor should
+     *      be of {@link ANEURALNETWORKS_TENSOR_QUANT16_ASYMM}, with zeroPoint
+     *      of 0 and scale of 0.125.
+     * * 2: An {@link ANEURALNETWORKS_BOOL} scalar, set to true to specify
+     *      NCHW data layout for input0. Set to false for NHWC.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0, with shape
+     *      [num_boxes, num_keypoints], specifying score of the keypoints.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint can be different from input0 scale and zeroPoint.
+     * * 1: A tensor of the same {@link OperandCode} as input1, with shape
+     *      [num_boxes, num_keypoints, 2], specifying the location of
+     *      the keypoints, the second dimension is organized as
+     *      [keypoint_x, keypoint_y].
+     *      For type of {@link ANEURALNETWORKS_TENSOR_QUANT16_ASYMM}, the
+     *      scale must be 0.125 and the zero point must be 0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_HEATMAP_MAX_KEYPOINT = 56,
+
+    /**
+     * Applies instance normalization to the input tensor.
+     *
+     * The values in the output tensor are computed as:
+     *
+     *     output[b, h, w, c] =
+     *         (input[b, h, w, c] - mean[b, c]) * gamma /
+     *         sqrt(var[b, c] + epsilon) + beta
+     *
+     * Where the mean and variance are computed across the spatial dimensions:
+     *
+     *     mean[b, c] =
+     *         sum_{h, w}(input[b, h, w, c]) / sum(1)
+     *
+     *     var[b, c] =
+     *         sum_{h, w}(pow(input[b, h, w, c] - mean[b, c], 2)) / sum(1)
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: 4, with "NHWC" or "NCHW" data layout.
+     * With the default data layout NHWC, the data is stored in the order of:
+     * [batch, height, width, channels]. Alternatively, the data layout could
+     * be NCHW, the data storage order of: [batch, channels, height, width].
+     *
+     * Inputs:
+     * * 0: An n-D tensor, specifying the tensor to be normalized.
+     * * 1: A scalar, specifying gamma, the scale applied to the normalized
+     *      tensor. The scalar must be of {@link ANEURALNETWORKS_FLOAT16} if
+     *      input0 is of {@link ANEURALNETWORKS_TENSOR_FLOAT16} and of {@link
+     *      ANEURALNETWORKS_FLOAT32} if input0 is of {@link
+     *      ANEURALNETWORKS_TENSOR_FLOAT32}.
+     * * 2: A scalar, specifying beta, the offset applied to the normalized
+     *      tensor. The scalar must be of {@link ANEURALNETWORKS_FLOAT16} if
+     *      input0 is of {@link ANEURALNETWORKS_TENSOR_FLOAT16} and of {@link
+     *      ANEURALNETWORKS_FLOAT32} if input0 is of {@link
+     *      ANEURALNETWORKS_TENSOR_FLOAT32}.
+     * * 3: A scalar, specifying epsilon, the small value added to variance to
+     *      avoid dividing by zero. The scalar must be of {@link ANEURALNETWORKS_FLOAT16} if
+     *      input0 is of {@link ANEURALNETWORKS_TENSOR_FLOAT16} and of {@link
+     *      ANEURALNETWORKS_FLOAT32} if input0 is of {@link
+     *      ANEURALNETWORKS_TENSOR_FLOAT32}.
+     * * 4: An {@link ANEURALNETWORKS_BOOL} scalar, set to true to specify
+     *      NCHW data layout for input0 and output0. Set to false for NHWC.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} and same shape as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_INSTANCE_NORMALIZATION = 57,
+
+    /**
+     * For input tensors x and y, computes x < y elementwise.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_BOOL8}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1
+     *
+     * This operation supports broadcasting.
+     *
+     * Inputs:
+     * * 0: A tensor.
+     * * 1: A tensor of the same {@link OperandCode} and dimensions compatible
+     *      with input0.
+     *
+     * Outputs:
+     * * 0: A tensor of {@link ANEURALNETWORKS_TENSOR_BOOL8}.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_LESS = 58,
+
+    /**
+     * For input tensors x and y, computes x <= y elementwise.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_BOOL8}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1
+     *
+     * This operation supports broadcasting.
+     *
+     * Inputs:
+     * * 0: A tensor.
+     * * 1: A tensor of the same {@link OperandCode} and dimensions compatible
+     *      with input0.
+     *
+     * Outputs:
+     * * 0: A tensor of {@link ANEURALNETWORKS_TENSOR_BOOL8}.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_LESS_EQUAL = 59,
+
+    /**
+     * Computes natural logarithm of x element-wise.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: from 1.
+     *
+     * Inputs:
+     * * 0: A tensor.
+     *
+     * Outputs:
+     * * 0: The output tensor of same shape as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_LOG = 60,
+
+    /**
+     * Returns the truth value of x AND y element-wise.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_BOOL8}
+     *
+     * Supported tensor rank: from 1
+     *
+     * This operation supports broadcasting.
+     *
+     * Inputs:
+     * * 0: A tensor of {@link ANEURALNETWORKS_TENSOR_BOOL8}.
+     * * 1: A tensor of {@link ANEURALNETWORKS_TENSOR_BOOL8} and dimensions
+     *      compatible with input0.
+     *
+     * Outputs:
+     * * 0: A tensor of {@link ANEURALNETWORKS_TENSOR_BOOL8}.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_LOGICAL_AND = 61,
+
+    /**
+     * Computes the truth value of NOT x element-wise.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_BOOL8}
+     *
+     * Supported tensor rank: from 1.
+     *
+     * Inputs:
+     * * 0: A tensor.
+     *
+     * Outputs:
+     * * 0: The output tensor of same shape as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_LOGICAL_NOT = 62,
+
+    /**
+     * Returns the truth value of x OR y element-wise.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_BOOL8}
+     *
+     * Supported tensor rank: from 1
+     *
+     * This operation supports broadcasting.
+     *
+     * Inputs:
+     * * 0: A tensor of {@link ANEURALNETWORKS_TENSOR_BOOL8}.
+     * * 1: A tensor of {@link ANEURALNETWORKS_TENSOR_BOOL8} and dimensions
+     *      compatible with input0.
+     *
+     * Outputs:
+     * * 0: A tensor of {@link ANEURALNETWORKS_TENSOR_BOOL8}.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_LOGICAL_OR = 63,
+
+    /**
+     * Computes the log softmax activations given logits.
+     *
+     * The output is calculated using this formula:
+     *
+     *     output = logits * beta - log(reduce_sum(exp(logits * beta), axis))
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: from 1.
+     *
+     * Inputs:
+     * * 0: A tensor specifying the input logits.
+     * * 1: A scalar, specifying the positive scaling factor for the exponent,
+     *      beta.
+     *      For input tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT16}, the beta
+     *      value must be of {@link ANEURALNETWORKS_FLOAT16}.
+     *      For input tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, the beta
+     *      value must be of {@link ANEURALNETWORKS_FLOAT32}.
+     * * 2: An {@link ANEURALNETWORKS_INT32} scalar specifying the axis to
+     *      reduce across. Negative index is used to specify axis from the
+     *      end (e.g. -1 for the last axis). Must be in the range [-n, n).
+     *
+     * Outputs:
+     * * 0: The output tensor of the same {@link OperandCode} and shape as
+     *      input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_LOG_SOFTMAX = 64,
+
+    /**
+     * Returns the element-wise maximum of two tensors.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1.
+     *
+     * Inputs:
+     * * 0: A tensor.
+     * * 1: A tensor of the same {@link OperandCode} and compatible dimensions
+     *      with input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scales and zeroPoint can be different from input0 scale and zeroPoint.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint can be different from inputs' scale and zeroPoint.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_MAXIMUM = 65,
+
+    /**
+     * Returns the element-wise minimum of two tensors.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1.
+     *
+     * Inputs:
+     * * 0: A tensor.
+     * * 1: A tensor of the same {@link OperandCode} and compatible dimensions
+     *      with input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scales and zeroPoint can be different from input0 scale and zeroPoint.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint can be different from inputs' scale and zeroPoint.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_MINIMUM = 66,
+
+    /**
+     * Computes numerical negative value element-wise.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     *
+     * Supported tensor rank: from 1.
+     *
+     * Inputs:
+     * * 0: A tensor.
+     *
+     * Outputs:
+     * * 0: The output tensor of same shape as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_NEG = 67,
+
+    /**
+     * For input tensors x and y, computes x != y elementwise.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_BOOL8}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1
+     *
+     * This operation supports broadcasting.
+     *
+     * Inputs:
+     * * 0: A tensor.
+     * * 1: A tensor of the same {@link OperandCode} and dimensions compatible
+     *      with input0.
+     *
+     * Outputs:
+     * * 0: A tensor of {@link ANEURALNETWORKS_TENSOR_BOOL8}.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_NOT_EQUAL = 68,
+
+    /**
+     * Pads a tensor with the given constant value according to the specified
+     * paddings.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: An n-D tensor, specifying the tensor to be padded.
+     * * 1: A 2-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the paddings
+     *      for each spatial dimension of the input tensor. The shape of the
+     *      tensor must be {rank(input0), 2}.
+     *      padding[i, 0] specifies the number of elements to be padded in the
+     *      front of dimension i.
+     *      padding[i, 1] specifies the number of elements to be padded after
+     *      the end of dimension i.
+     * * 2: An scalar specifying the value to use for padding input0.
+     *      For input tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT16}, the
+     *      pad value must be of {@link ANEURALNETWORKS_FLOAT16}.
+     *      For input tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, the
+     *      pad value must be of {@link ANEURALNETWORKS_FLOAT32}.
+     *      For input tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+     *      the pad value must be of {@link ANEURALNETWORKS_INT32}. The
+     *      scale and zeroPoint are assumed to be the same as in input0.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0. The
+     *      output tensor has the same rank as input0, and each
+     *      dimension of the output tensor has the same size as the
+     *      corresponding dimension of the input tensor plus the size
+     *      of the padding:
+     *          output0.dimension[i] =
+     *              padding[i, 0] + input0.dimension[i] + padding[i, 1]
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_PAD_V2 = 69,
+
+    /**
+     * Computes the power of one value to another.
+     *
+     * Given a tensor base and a tensor exponent, this operation computes
+     * base^exponent elementwise.
+     *
+     * This operations supports broadcasting. The size of the output is the
+     * maximum size along each dimension of the input operands. It starts with
+     * the trailing dimensions, and works its way forward.
+     *
+     * For example:
+     *     base.dimension     =    {4, 1, 2}
+     *     exponent.dimension = {5, 4, 3, 1}
+     *     output.dimension   = {5, 4, 3, 2}
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: from 1
+     *
+     * Inputs:
+     * * 0: A tensor specifying the base.
+     * * 1: A tensor specifying the exponent.
+     *
+     * Outputs:
+     * * 0: An output tensor.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_POW = 70,
+
+    /**
+     * Parametric Rectified Linear Unit.
+     *
+     * It follows: f(x) = alpha * x for x < 0, f(x) = x for x >= 0, where alpha
+     * is a learned array with the same {@link OperandCode} and compatible
+     * dimensions as input x.
+     *
+     * Two dimensions are compatible when:
+     *     1. they are equal, or
+     *     2. one of them is 1
+     *
+     * The size of the output is the maximum size along each dimension of the
+     * input operands. It starts with the trailing dimensions, and works its way
+     * forward.
+     *
+     * Example:
+     *     input.dimension  =    {4, 1, 2}
+     *     alpha.dimension  = {5, 4, 3, 1}
+     *     output.dimension = {5, 4, 3, 2}
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1
+     *
+     * Inputs:
+     * * 0: A tensor, specifying the input.
+     * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
+     *      as input0, specifying the alpha.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint can be diffent from the input0 scale and zeroPoint.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_PRELU = 71,
+
+    /**
+     * Quantizes the input tensor.
+     *
+     * The formula is:
+     *
+     *     output = max(0, min(255, round(input / scale) + zeroPoint)
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: from 1
+     *
+     * Inputs:
+     * * 0: A tensor, may be zero-sized.
+     *
+     * Outputs:
+     * * 0: The output tensor of same shape as input0, but with
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_QUANTIZE = 72,
+
+    /**
+     * A version of quantized LSTM, using 16 bit quantization for internal
+     * state.
+     *
+     * There is no projection layer, so cell state size is equal to the output
+     * size.
+     *
+     * Inputs:
+     * * 0: A 2-D tensor of type {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *      and shape [numBatches, inputSize] specifying the input to the LSTM
+     *      cell. Tensor is quantized with a fixed quantization range of
+     *      [-1, 127/128] (scale = 1/128, zeroPoint = 128).
+     * * 1: The input-to-input weights.
+     *      A 2-D tensor of type {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *      and shape [outputSize, inputSize] specifying input-to-input part of
+     *      weights for fully-connected layer inside the LSTM cell.
+     *      Quantization zero point and scale must be the same across all the
+     *      weights.
+     * * 2: The input-to-forget weights.
+     *      A 2-D tensor of type {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *      and shape [outputSize, inputSize] specifying input-to-forget part of
+     *      weights for fully-connected layer inside the LSTM cell.
+     *      Quantization zero point and scale must be the same across all the
+     *      weights.
+     * * 3: The input-to-cell weights.
+     *      A 2-D tensor of type {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *      and shape [outputSize, inputSize] specifying input-to-cell part of
+     *      weights for fully-connected layer inside the LSTM cell.
+     *      Quantization zero point and scale must be the same across all the
+     *      weights.
+     * * 4: The input-to-output weights.
+     *      A 2-D tensor of type {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *      and shape [outputSize, inputSize] specifying input-to-output part of
+     *      weights for fully-connected layer inside the LSTM cell.
+     *      Quantization zero point and scale must be the same across all the
+     *      weights.
+     * * 5: The recurrent-to-input weights.
+     *      A 2-D tensor of type {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *      and shape [outputSize, outputSize] specifying recurrent-to-input part
+     *      of weights for fully-connected layer inside the LSTM cell.
+     *      Quantization zero point and scale must be the same across all the
+     *      weights.
+     * * 6: The recurrent-to-forget weights.
+     *      A 2-D tensor of type {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *      and shape [outputSize, outputSize] specifying recurrent-to-forget
+     *      part of weights for fully-connected layer inside the LSTM cell.
+     *      Quantization zero point and scale must be the same across all the
+     *      weights.
+     * * 7: The recurrent-to-cell weights.
+     *      A 2-D tensor of type {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *      and shape [outputSize, outputSize] specifying recurrent-to-cell part
+     *      of weights for fully-connected layer inside the LSTM cell.
+     *      Quantization zero point and scale must be the same across all the
+     *      weights.
+     * * 8: The recurrent-to-output weights.
+     *      A 2-D tensor of type {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *      and shape [outputSize, outputSize] specifying recurrent-to-output
+     *      part of weights for fully-connected layer inside the LSTM cell.
+     *      Quantization zero point and scale must be the same across all the
+     *      weights.
+     * * 9: The input gate bias.
+     *      A 1-D tensor of type {@link ANEURALNETWORKS_TENSOR_INT32} and shape
+     *      [outputSize] specifying the bias for the fully-connected layer
+     *      inside the LSTM cell. Bias is quantized with scale being a product
+     *      of input and weights scales and zeroPoint equal to 0.
+     * * 10:The forget gate bias.
+     *      A 1-D tensor of type {@link ANEURALNETWORKS_TENSOR_INT32} and shape
+     *      [outputSize] specifying the bias for the fully-connected layer
+     *      inside the LSTM cell. Bias is quantized with scale being a product
+     *      of input and weights scales and zeroPoint equal to 0.
+     * * 11:The cell bias.
+     *      A 1-D tensor of type {@link ANEURALNETWORKS_TENSOR_INT32} and shape
+     *      [outputSize] specifying the bias for the fully-connected layer
+     *      inside the LSTM cell. Bias is quantized with scale being a product
+     *      of input and weights scales and zeroPoint equal to 0.
+     * * 12:The output gate bias.
+     *      A 1-D tensor of type {@link ANEURALNETWORKS_TENSOR_INT32} and shape
+     *      [outputSize] specifying the bias for the fully-connected layer
+     *      inside the LSTM cell. Bias is quantized with scale being a product
+     *      of input and weights scales and zeroPoint equal to 0.
+     * * 13: A 2-D tensor of type {@link ANEURALNETWORKS_TENSOR_QUANT16_SYMM}
+     *       and shape [numBatches, outputSize] specifying the cell state from the
+     *       previous time step of the LSTM cell. It is quantized using a
+     *       quantization range of [-2^4, 2^4 * 32767/32768] (scale = 2^4 /
+     *       32768, zeroPoint = 0).
+     * * 14: A 2-D tensor of type {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *       and shape [numBathes, outputSize] specifying the output of the LSTM
+     *       cell from previous time-step. Tensor is quantized with a fixed
+     *       quantization range of [-1, 127/128] (scale = 1/128, zeroPoint =
+     *       128).
+     *
+     *
+     * Outputs:
+     * * 0: A 2-D tensor of type {@link ANEURALNETWORKS_TENSOR_QUANT16_SYMM}
+     *      and shape [numBatches, outputSize] which contains a cell state from
+     *      the current time step. Tensor is quantized using a quantization
+     *      range of [-2^4, 2^4 * 32767/32768] (scale = 2^4 / 32768, zeroPoint =
+     *      0).
+     * * 1: A 2-D tensor of type {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *      and shape [numBathes, outputSize] which contains the output value.
+     *      Tensor is quantized with a fixed quantization range of [-1, 127/128]
+     *      (scale = 1/128, zeroPoint = 128).
+     */
+    ANEURALNETWORKS_QUANTIZED_16BIT_LSTM = 73,
+
+    /**
+     * Draws samples from a multinomial distribution.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Inputs:
+     * * 0: A 2-D tensor with shape [batches, classes], specifying the
+     *      unnormalized log-probabilities for all classes.
+     * * 1: A scalar {@link ANEURALNETWORKS_INT32}, specifying the number of
+     *      independent samples to draw for each row slice.
+     * * 2: A 1-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor with shape [2],
+     *      specifying seeds used to initialize the random distribution.
+     * Outputs:
+     * * 0: A 2-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor with shape
+     *      [batches, samples], containing the drawn samples.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_RANDOM_MULTINOMIAL = 74,
+
+    /**
+     * Reduces a tensor by computing the "logical and" of elements along given
+     * dimensions.
+     *
+     * If keep_dims is true, the reduced dimensions are
+     * retained with length 1. Otherwise, the rank of the tensor is reduced by
+     * 1 for each entry in dimensions.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_BOOL8}
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: An n-D tensor.
+     * * 1: A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The dimensions
+     *      to reduce. Dimension values must be in the range [-n, n).
+     * * 2: An {@link ANEURALNETWORKS_BOOL} scalar, keep_dims. If true,
+     *      retains reduced dimensions with length 1.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_REDUCE_ALL = 75,
+
+    /**
+     * Reduces a tensor by computing the "logical or" of elements along given
+     * dimensions.
+     *
+     * If keep_dims is true, the reduced dimensions are
+     * retained with length 1. Otherwise, the rank of the tensor is reduced by
+     * 1 for each entry in dimensions.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_BOOL8}
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: An n-D tensor.
+     * * 1: A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The dimensions
+     *      to reduce. Dimension values must be in the range [-n, n).
+     * * 2: An {@link ANEURALNETWORKS_BOOL} scalar, keep_dims. If true,
+     *      retains reduced dimensions with length 1.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_REDUCE_ANY = 76,
+
+    /**
+     * Reduces a tensor by computing the maximum of elements along given
+     * dimensions.
+     *
+     * If keep_dims is true, the reduced dimensions are
+     * retained with length 1. Otherwise, the rank of the tensor is reduced by
+     * 1 for each entry in dimensions.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: An n-D tensor.
+     * * 1: A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The dimensions
+     *      to reduce. Dimension values must be in the range [-n, n).
+     * * 2: An {@link ANEURALNETWORKS_BOOL} scalar, keep_dims. If true,
+     *      retains reduced dimensions with length 1.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_REDUCE_MAX = 77,
+
+    /**
+     * Reduces a tensor by computing the minimum of elements along given
+     * dimensions.
+     *
+     * If keep_dims is true, the reduced dimensions are
+     * retained with length 1. Otherwise, the rank of the tensor is reduced by
+     * 1 for each entry in dimensions.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: An n-D tensor.
+     * * 1: A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The dimensions
+     *      to reduce. Dimension values must be in the range [-n, n).
+     * * 2: An {@link ANEURALNETWORKS_BOOL} scalar, keep_dims. If true,
+     *      retains reduced dimensions with length 1.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_REDUCE_MIN = 78,
+
+    /**
+     * Reduces a tensor by multiplying elements along given dimensions.
+     *
+     * If keep_dims is true, the reduced dimensions are
+     * retained with length 1. Otherwise, the rank of the tensor is reduced by
+     * 1 for each entry in dimensions.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: An n-D tensor.
+     * * 1: A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The dimensions
+     *      to reduce. Dimension values must be in the range [-n, n).
+     * * 2: An {@link ANEURALNETWORKS_BOOL} scalar, keep_dims. If true,
+     *      retains reduced dimensions with length 1.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_REDUCE_PROD = 79,
+
+    /**
+     * Reduces a tensor by summing elements along given dimensions.
+     *
+     * If keep_dims is true, the reduced dimensions are
+     * retained with length 1. Otherwise, the rank of the tensor is reduced by
+     * 1 for each entry in dimensions.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: up to 4
+     *
+     * Inputs:
+     * * 0: An n-D tensor.
+     * * 1: A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The dimensions
+     *      to reduce. Dimension values must be in the range [-n, n).
+     * * 2: An {@link ANEURALNETWORKS_BOOL} scalar, keep_dims. If true,
+     *      retains reduced dimensions with length 1.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_REDUCE_SUM = 80,
+
+    /**
+     * Select and scale the feature map of each region of interest to a unified
+     * output size by average pooling sampling points from bilinear interpolation.
+     *
+     * The region of interest is represented by its upper-left corner coordinate
+     * (x1,y1) and lower-right corner coordinate (x2,y2) in the original image.
+     * A spatial scaling factor is applied to map into feature map coordinate.
+     * A valid region of interest should satisfy x1 <= x2 and y1 <= y2.
+     *
+     * No rounding is applied in this operation. The sampling points are unified
+     * distributed in the pooling bin and their values are calculated by bilinear
+     * interpolation.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} (since API level 29)
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: 4, with "NHWC" or "NCHW" data layout.
+     * With the default data layout NHWC, the data is stored in the order of:
+     * [batch, height, width, channels]. Alternatively, the data layout could
+     * be NCHW, the data storage order of: [batch, channels, height, width].
+     *
+     * Inputs:
+     * * 0: A 4-D tensor, specifying the feature map.
+     * * 1: A 2-D Tensor of shape [num_rois, 4], specifying the locations of
+     *      the regions of interest, each line with format [x1, y1, x2, y2].
+     *      For input0 of type {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+     *      this tensor should be of {@link ANEURALNETWORKS_TENSOR_QUANT16_ASYMM},
+     *      with zeroPoint of 0 and scale of 0.125. Zero num_rois is
+     *      supported for this tensor.
+     * * 2: An 1-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor, of shape
+     *      [num_rois], specifying the batch index of each box. Boxes with
+     *      the same batch index are grouped together. Zero num_rois is
+     *      supported for this tensor.
+     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the output
+     *      height of the output tensor.
+     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the output
+     *      width of the output tensor.
+     * * 5: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the ratio
+     *      from the height of original image to the height of feature map.
+     * * 6: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the ratio
+     *      from the width of original image to the width of feature map.
+     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the number of
+     *      sampling points in height dimension used to compute the output.
+     *      Set to 0 for adaptive value of ceil(roi_height/out_height).
+     * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the number of
+     *      sampling points in width dimension used to compute the output.
+     *      Set to 0 for adaptive value of ceil(roi_width/out_width).
+     * * 9: An {@link ANEURALNETWORKS_BOOL} scalar, set to true to specify
+     *      NCHW data layout for input0 and output0. Set to false for NHWC.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0. The output
+     *      shape is [num_rois, out_height, out_width, depth].
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint can be different from the input0 scale and zeroPoint.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_ROI_ALIGN = 81,
+
+    /**
+     * Select and scale the feature map of each region of interest to a unified
+     * output size by max-pooling.
+     *
+     * The region of interest is represented by its upper-left corner coordinate
+     * (x1,y1) and lower-right corner coordinate (x2,y2) in the original image.
+     * A spatial scaling factor is applied to map into feature map coordinate.
+     * A valid region of interest should satisfy x1 <= x2 and y1 <= y2.
+     *
+     * Rounding is applied in this operation to ensure integer boundary for
+     * regions of interest and pooling bins.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: 4, with "NHWC" or "NCHW" data layout.
+     * With the default data layout NHWC, the data is stored in the order of:
+     * [batch, height, width, channels]. Alternatively, the data layout could
+     * be NCHW, the data storage order of: [batch, channels, height, width].
+     *
+     * Inputs:
+     * * 0: A 4-D tensor, specifying the feature map.
+     * * 1: A 2-D Tensor of shape [num_rois, 4], specifying the locations of
+     *      the regions of interest, each line with format [x1, y1, x2, y2].
+     *      For input0 of type {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM},
+     *      this tensor should be of {@link ANEURALNETWORKS_TENSOR_QUANT16_ASYMM},
+     *      with zeroPoint of 0 and scale of 0.125.
+     * * 2: An 1-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor, of shape
+     *      [num_rois], specifying the batch index of each box. Boxes with
+     *      the same batch index are grouped together.
+     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the output
+     *      height of the output tensor.
+     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the output
+     *      width of the output tensor.
+     * * 5: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the ratio
+     *      from the height of original image to the height of feature map.
+     * * 6: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the ratio
+     *      from the width of original image to the width of feature map.
+     * * 7: An {@link ANEURALNETWORKS_BOOL} scalar, set to true to specify
+     *      NCHW data layout for input0 and output0. Set to false for NHWC.
+     *
+     * Outputs:
+     * * 0: A tensor of the same {@link OperandCode} as input0. The output
+     *      shape is [num_rois, out_height, out_width, depth].
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_ROI_POOLING = 82,
+
+    /**
+     * Computes reciprocal of square root of x element-wise.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: from 1.
+     *
+     * Inputs:
+     * * 0: A tensor.
+     *
+     * Outputs:
+     * * 0: The output tensor of same shape as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_RSQRT = 83,
+
+    /**
+     * Using a tensor of booleans c and input tensors x and y select values
+     * elementwise from both input tensors:
+     *
+     * O[i] = C[i] ? x[i] : y[i].
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1
+     *
+     * Inputs:
+     * * 0: A tensor of type {@link ANEURALNETWORKS_TENSOR_BOOL8} acting as a
+     *      mask that chooses, based on the value at each element, whether the
+     *      corresponding element in the output should be taken from input1 (if
+     *      true) or input2 (if false).
+     * * 1: An input tensor of the same shape as input0.
+     * * 2: An input tensor of the same shape and type as input1.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scales and zeroPoint can be different from input1 scale and zeroPoint.
+     *
+     * Outputs:
+     * * 0: A tensor of the same type and shape as input1 and input2.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint can be different from inputs' scale and zeroPoint.
+     *
+     */
+    ANEURALNETWORKS_SELECT = 84,
+
+    /**
+     * Computes sin of x element-wise.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: from 1.
+     *
+     * Inputs:
+     * * 0: A tensor.
+     *
+     * Outputs:
+     * * 0: The output tensor of same shape as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_SIN = 85,
+
+    /**
+     * Extracts a slice of specified size from the input tensor starting at a
+     * specified location.
+     *
+     * The starting location is specified as a 1-D tensor containing offsets
+     * for each dimension. The size is specified as a 1-D tensor containing
+     * either size of a slice along corresponding dimension or -1. In the latter
+     * case, all the remaining elements in dimension are included in the slice.
+     *
+     * A sum of begin offset and a size of a slice must not exceed size of a
+     * corresponding dimension.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1
+     *
+     * Inputs:
+     * * 0: An n-D tensor to take slice from, may be zero-sized.
+     * * 1: A 1-D tensor of type {@link ANEURALNETWORKS_TENSOR_INT32} specifying
+     *      the beginning indices of the slice in each dimension.
+     * * 2: A 1-D tensor of type {@link ANEURALNETWORKS_TENSOR_INT32} specifying
+     *      the size of the slice in each dimension.
+     *
+     * Outputs:
+     * * 0: An n-D tensor of the same type as the input containing the slice.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      its scale and zeroPoint has to be same as the input0 scale and zeroPoint.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_SLICE = 86,
+
+    /**
+     * Splits a tensor along a given axis into num_splits subtensors.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1
+     *
+     * Inputs:
+     * * 0: An n-D tensor to split.
+     * * 1: An {@link ANEURALNETWORKS_INT32} scalar specifying the axis along
+     *      which to split.
+     * * 2: An {@link ANEURALNETWORKS_INT32} scalar indicating the number of
+     *      splits along given axis. Must evenly divide axis size.
+     *
+     * Outputs:
+     * * 0 ~ (num_splits - 1): Resulting subtensors.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_SPLIT = 87,
+
+    /**
+     * Computes square root of x element-wise.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: from 1.
+     *
+     * Inputs:
+     * * 0: A tensor.
+     *
+     * Outputs:
+     * * 0: The output tensor of same shape as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_SQRT = 88,
+
+    /**
+     * Constructs a tensor by tiling a given tensor.
+     *
+     * This operation creates a new tensor by replicating `input` `multiples`
+     * times. The output tensor's i-th dimension has `input.dims(i) * multiples[i]`
+     * elements, and the values of `input` are replicated `multiples[i]` times
+     * along the i-th dimension.
+     * For example, tiling `[a b c d]` by `[2]` produces `[a b c d a b c d]`.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1
+     *
+     * Inputs:
+     * * 0: input, an n-D tensor specifying the input.
+     * * 1: multiples, a 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}.
+     *      The length of multiples must be n.
+     *
+     * Outputs:
+     * * 0: A tiled tensor of the same {@link OperandCode} and rank as `input`.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_TILE = 89,
+
+    /**
+     * Finds values and indices of the k largest entries for the last dimension.
+     *
+     * Resulting values in each dimensions are sorted in descending order. If
+     * two values are equal, the one with larger index appears first.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_INT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: from 1
+     *
+     * Inputs:
+     * * 0: input, an n-D tensor specifying the input.
+     * * 1: k, an {@link ANEURALNETWORKS_INT32} scalar, specifying the number of
+     *      top elements to look for along the last dimension.
+     *
+     * Outputs:
+     * * 0: An n-D tensor of the same type as the input, containing the k
+     *      largest elements along each last dimensional slice.
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     * * 1: An n-D tensor of type {@link ANEURALNETWORKS_TENSOR_INT32}
+     *      containing the indices of values within the last dimension of input.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_TOPK_V2 = 90,
+
+    /**
+     * Performs the transpose of 2-D convolution operation.
+     *
+     * This operation is sometimes called "deconvolution" after Deconvolutional
+     * Networks, but is actually the transpose (gradient) of
+     * {@link ANEURALNETWORKS_CONV_2D} rather than an actual deconvolution.
+     *
+     * The output dimensions are functions of the filter dimensions, stride, and
+     * padding.
+     *
+     * Supported tensor {@link OperandCode} configurations:
+     * * 16 bit floating point:
+     * * * {@link ANEURALNETWORKS_TENSOR_FLOAT16} for input, filter, output, and bias.
+     *
+     * * 32 bit floating point:
+     * * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} for input, filter, output, and bias.
+     *
+     * * Quantized:
+     * * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} for input, filter, and output.
+     * * * {@link ANEURALNETWORKS_TENSOR_INT32} for bias (with scale set to
+     * * * input.scale * filter.scale).
+     *
+     * * Quantized with symmetric per channel quantization for the filter:
+     * * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} for input, and output.
+     * * * {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL} for filter.
+     * * * {@link ANEURALNETWORKS_TENSOR_INT32} for bias (scale set to 0.0,
+     * * * each value scaling is separate and equal to input.scale * filter.scales[channel]).
+     *
+     * Supported tensor rank: 4, with "NHWC" or "NCHW" data layout.
+     * With the default data layout NHWC, the data is stored in the order of:
+     * [batch, height, width, channels]. Alternatively, the data layout could
+     * be NCHW, the data storage order of: [batch, channels, height, width].
+     *
+     * Both explicit padding and implicit padding are supported.
+     *
+     * Inputs (explicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input. Since API level 29, zero batches is supported
+     *      for this tensor.
+     * * 1: A 4-D tensor, of shape
+     *      [depth_out, filter_height, filter_width, depth_in], specifying the
+     *      filter. For tensor of type
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL} the channel
+     *      dimension (extraParams.channelQuant.channelDim) must be set to 0.
+     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
+     *      tensor of type {@link ANEURALNETWORKS_TENSOR_FLOAT32} or
+     *      {@link ANEURALNETWORKS_TENSOR_FLOAT16}, the bias should be of the
+     *      same type. For input tensor of type
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the bias should be
+     *      of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of 0 and
+     *      bias_scale == input_scale * filter_scale. For filter tensor of
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL}, the bias
+     *      must be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of
+     *      0 and bias_scale of 0. The actual scale of each value 'i' is equal
+     *      to bias_scale[i] = input_scale * filter_scale[i].
+     * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the left, in the ‘width’ dimension.
+     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the right, in the ‘width’ dimension.
+     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the top, in the ‘height’ dimension.
+     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on
+     *      the bottom, in the ‘height’ dimension.
+     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 9: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *      {@link FuseCode} values. Specifies the activation to
+     *      invoke on the result.
+     * * 10: An {@link ANEURALNETWORKS_BOOL} scalar, set to true to specify
+     *       NCHW data layout for input0 and output0. Set to false for NHWC.
+     *
+     * Inputs (implicit padding):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth_in],
+     *      specifying the input. Since API level 29, zero batches is supported
+     *      for this tensor.
+     * * 1: A 4-D tensor, of shape
+     *      [depth_out, filter_height, filter_width, depth_in], specifying the
+     *      filter. For tensor of type
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL} the channel
+     *      dimension (extraParams.channelQuant.channelDim) must be set to 0.
+     * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input
+     *      tensor of type {@link ANEURALNETWORKS_TENSOR_FLOAT32} or
+     *      {@link ANEURALNETWORKS_TENSOR_FLOAT16}, the bias should be of the
+     *      same type. For input tensor of type
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the bias should be
+     *      of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of 0 and
+     *      bias_scale == input_scale * filter_scale. For filter tensor of
+     *      {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL}, the bias
+     *      must be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of
+     *      0 and bias_scale of 0. The actual scale of each value 'i' is equal
+     *      to bias_scale[i] = input_scale * filter_scale[i].
+     * * 3: An {@link ANEURALNETWORKS_TENSOR_INT32} tensor, specifying the output
+     *      tensor shape.
+     * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the implicit
+     *      padding scheme, has to be one of the
+     *      {@link PaddingCode} values.
+     * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘width’ dimension.
+     * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+     *      walking through input in the ‘height’ dimension.
+     * * 7: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the
+     *      {@link FuseCode} values. Specifies the activation to
+     *      invoke on the result.
+     * * 8: An {@link ANEURALNETWORKS_BOOL} scalar, set to true to specify
+     *      NCHW data layout for input0 and output0. Set to false for NHWC.
+     *
+     * Outputs:
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, out_height, out_width, depth_out].
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint can be different from inputs' scale and zeroPoint.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_TRANSPOSE_CONV_2D = 91,
+
+    /**
+     * A recurrent neural network specified by an LSTM cell.
+     *
+     * Performs (fully) dynamic unrolling of input.
+     *
+     * This Op unrolls the input along the time dimension, and implements the
+     * following operation for each element in the sequence
+     * s = 1...sequence_length:
+     *   outputs[s] = projection(state = activation(LSTMOp(inputs[s])))
+     *
+     * Where LSTMOp is the LSTM op as in {@link ANEURALNETWORKS_LSTM},
+     * the "projection" is an optional projection layer from state and output
+     * and the “activation” is the function passed as the
+     * “fused_activation_function” argument (if not “NONE”).
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * Supported tensor rank: 3, either time-major or batch-major.
+     *
+     * All input and output tensors must be of the same type.
+     *
+     * Inputs:
+     * * 0: The input (\f$x_t\f$).
+     *      A 3-D tensor of shape:
+     *        If time-major: [max_time, batch_size, input_size]
+     *        If batch-major: [batch_size, max_time, input_size]
+     *      where “max_time” is the number of timesteps (sequence length),
+     *      “batch_size” corresponds to the batching dimension, and
+     *      “input_size” is the size of the input.
+     * * 1: The input-to-input weights (\f$W_{xi}\f$). Optional.
+     *      A 2-D tensor of shape [num_units, input_size], where “num_units”
+     *      corresponds to the number of cell units.
+     * * 2: The input-to-forget weights (\f$W_{xf}\f$).
+     *      A 2-D tensor of shape [num_units, input_size].
+     * * 3: The input-to-cell weights (\f$W_{xc}\f$).
+     *      A 2-D tensor of shape [num_units, input_size].
+     * * 4: The input-to-output weights (\f$W_{xo}\f$).
+     *      A 2-D tensor of shape [num_units, input_size].
+     * * 5: The recurrent-to-input weights (\f$W_{hi}\f$). Optional.
+     *      A 2-D tensor of shape [num_units, output_size], where “output_size”
+     *      corresponds to either the number of cell units (i.e., “num_units”),
+     *      or the second dimension of the “projection_weights”, if defined.
+     * * 6: The recurrent-to-forget weights (\f$W_{hf}\f$).
+     *      A 2-D tensor of shape [num_units, output_size].
+     * * 7: The recurrent-to-cell weights (\f$W_{hc}\f$).
+     *      A 2-D tensor of shape [num_units, output_size].
+     * * 8: The recurrent-to-output weights (\f$W_{ho}\f$).
+     *      A 2-D tensor of shape [num_units, output_size].
+     * * 9: The cell-to-input weights (\f$W_{ci}\f$). Optional.
+     *      A 1-D tensor of shape [num_units].
+     * * 10:The cell-to-forget weights (\f$W_{cf}\f$). Optional.
+     *      A 1-D tensor of shape [num_units].
+     * * 11:The cell-to-output weights (\f$W_{co}\f$). Optional.
+     *      A 1-D tensor of shape [num_units].
+     * * 12:The input gate bias (\f$b_i\f$). Optional.
+     *      A 1-D tensor of shape [num_units].
+     * * 13:The forget gate bias (\f$b_f\f$).
+     *      A 1-D tensor of shape [num_units].
+     * * 14:The cell bias (\f$b_c\f$).
+     *      A 1-D tensor of shape [num_units].
+     * * 15:The output gate bias (\f$b_o\f$).
+     *      A 1-D tensor of shape [num_units].
+     * * 16:The projection weights (\f$W_{proj}\f$). Optional.
+     *      A 2-D tensor of shape [output_size, num_units].
+     * * 17:The projection bias (\f$b_{proj}\f$). Optional.
+     *      A 1-D tensor of shape [output_size].
+     * * 18:The output state (in) (\f$h_{t-1}\f$).
+     *      A 2-D tensor of shape [batch_size, output_size].
+     * * 19:The cell state (in) (\f$C_{t-1}\f$).
+     *      A 2-D tensor of shape [batch_size, num_units].
+     * * 20:The activation function (\f$g\f$).
+     *      A value indicating the activation function:
+     *      <ul>
+     *      <li>0: None;
+     *      <li>1: Relu;
+     *      <li>3: Relu6;
+     *      <li>4: Tanh;
+     *      <li>6: Sigmoid.
+     *      </ul>
+     * * 21:The clipping threshold (\f$t_{cell}\f$) for the cell state, such
+     *      that values are bound within [-cell_clip, cell_clip]. If set to 0.0
+     *      then clipping is disabled.
+     * * 22:The clipping threshold (\f$t_{proj}\f$) for the output from the
+     *      projection layer, such that values are bound within
+     *      [-proj_clip, proj_clip]. If set to 0.0 then clipping is disabled.
+     * * 23:Time-major if true, batch-major if false.
+     * * 24:The input layer normalization weights. Optional.
+     *      A 1-D tensor of shape [num_units]. Used to rescale normalized inputs
+     *      to activation at input gate.
+     * * 25:The forget layer normalization weights. Optional.
+     *      A 1-D tensor of shape [num_units]. Used to rescale normalized inputs
+     *      to activation at forget gate.
+     * * 26:The cell layer normalization weights. Optional.
+     *      A 1-D tensor of shape [num_units]. Used to rescale normalized inputs
+     *      to activation at cell gate.
+     * * 27:The output layer normalization weights. Optional.
+     *      A 1-D tensor of shape [num_units]. Used to rescale normalized inputs
+     *      to activation at output gate.
+     *
+     * Outputs:
+     * * 0: The output (\f$o_t\f$).
+     *      A 3-D tensor of shape:
+     *        If time-major: [max_time, batch_size, output_size]
+     *        If batch-major: [batch_size, max_time, output_size]
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_UNIDIRECTIONAL_SEQUENCE_LSTM = 92,
+
+    /**
+     * A recurrent neural network layer that applies a basic RNN cell to a
+     * sequence of inputs.
+     *
+     * This layer unrolls the input along the sequence dimension, and implements
+     * the following operation
+     * for each element in the sequence s = 1...sequence_length:
+     *   outputs[s] = state = activation(inputs[s] * input_weights’ + state *
+     *   recurrent_weights’ + bias)
+     *
+     * Where:
+     * * “input_weights” is a weight matrix that multiplies the inputs;
+     * * “recurrent_weights” is a weight matrix that multiplies the current
+     *    “state” which itself is the output from the previous time step
+     *    computation;
+     * * “bias” is a bias vector (added to each output vector in the batch);
+     * * “activation” is the function passed as the “fused_activation_function”
+     *   argument (if not “NONE”).
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     *
+     * The input tensors must all be the same type.
+     *
+     * Inputs:
+     * * 0: input.
+     *      A 3-D tensor. The shape is defined by the input 6 (timeMajor). If
+     *      it is set to 1, then the input has a shape [maxTime, batchSize,
+     *      inputSize], otherwise the input has a shape [batchSize, maxTime,
+     *      inputSize].
+     * * 1: weights.
+     *      A 2-D tensor of shape [numUnits, inputSize].
+     * * 2: recurrent_weights.
+     *      A 2-D tensor of shape [numUnits, numUnits].
+     * * 3: bias.
+     *      A 1-D tensor of shape [numUnits].
+     * * 4: hidden state
+     *      A 2-D tensor of shape [batchSize, numUnits]. Specifies a hidden
+     *      state input for the first time step of the computation.
+     * * 5: fusedActivationFunction.
+     *      A {@link FuseCode} value indicating the activation function. If
+     *      “NONE” is specified then it results in a linear activation.
+     * * 6: timeMajor
+     *      An {@link ANEURALNETWORKS_INT32} scalar specifying the shape format
+     *      of input and output tensors. Must be set to either 0 or 1.
+     * Outputs:
+     * * 0: output.
+     *      A 3-D tensor. The shape is defined by the input 6 (timeMajor). If
+     *      it is set to 1, then the output has a shape [maxTime, batchSize,
+     *      numUnits], otherwise the output has a shape [batchSize, maxTime,
+     *      numUnits].
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_UNIDIRECTIONAL_SEQUENCE_RNN = 93,
+
+    /**
+     * Resizes images to given size using the nearest neighbor interpretation.
+     *
+     * Resized images must be distorted if their output aspect ratio is not the
+     * same as input aspect ratio. The corner pixels of output may not be the
+     * same as corner pixels of input.
+     *
+     * Supported tensor {@link OperandCode}:
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT16}
+     * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+     * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+     *
+     * Supported tensor rank: 4, with "NHWC" or "NCHW" data layout.
+     * With the default data layout NHWC, the data is stored in the order of:
+     * [batch, height, width, channels]. Alternatively, the data layout could
+     * be NCHW, the data storage order of: [batch, channels, height, width].
+     *
+     * Both resizing by shape and resizing by scale are supported.
+     *
+     * Inputs (resizing by shape):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input. Zero batches is supported for this tensor.
+     * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the output
+     *      width of the output tensor.
+     * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the output
+     *      height of the output tensor.
+     * * 3: An {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *      Set to true to specify NCHW data layout for input0 and output0.
+     *
+     * Inputs (resizing by scale):
+     * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying
+     *      the input. Zero batches is supported for this tensor.
+     * * 1: A scalar, specifying width_scale, the scaling factor of the width
+     *      dimension from the input tensor to the output tensor. The output
+     *      width is calculated as new_width = floor(width * width_scale).
+     *      The scalar must be of {@link ANEURALNETWORKS_FLOAT16} if input0 is
+     *      of {@link ANEURALNETWORKS_TENSOR_FLOAT16} and of
+     *      {@link ANEURALNETWORKS_FLOAT32} otherwise.
+     * * 2: A scalar, specifying height_scale, the scaling factor of the height
+     *      dimension from the input tensor to the output tensor. The output
+     *      height is calculated as new_height = floor(height * height_scale).
+     *      The scalar must be of {@link ANEURALNETWORKS_FLOAT16} if input0 is
+     *      of {@link ANEURALNETWORKS_TENSOR_FLOAT16} and of
+     *      {@link ANEURALNETWORKS_FLOAT32} otherwise.
+     * * 3: An {@link ANEURALNETWORKS_BOOL} scalar, default to false.
+     *      Set to true to specify NCHW data layout for input0 and output0.
+     *
+     * Outputs:
+     * * 0: The output 4-D tensor, of shape
+     *      [batches, new_height, new_width, depth].
+     *      For a {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} tensor,
+     *      the scale and zeroPoint must be the same as input0.
+     *
+     * Available since API level 29.
+     */
+    ANEURALNETWORKS_RESIZE_NEAREST_NEIGHBOR = 94,
+} OperationCode;
+
+/**
+ * Fused activation function types.
+ *
+ *
+ * Available since API level 27.
+ */
+typedef enum {
+    /** NO fused activation function. */
+    ANEURALNETWORKS_FUSED_NONE = 0,
+    /** Fused ReLU activation function. */
+    ANEURALNETWORKS_FUSED_RELU = 1,
+    /** Fused ReLU1 activation function. */
+    ANEURALNETWORKS_FUSED_RELU1 = 2,
+    /** Fused ReLU6 activation function. */
+    ANEURALNETWORKS_FUSED_RELU6 = 3,
+} FuseCode;
+
+/**
+ * Implicit padding algorithms.
+ *
+ *
+ * Available since API level 27.
+ */
+typedef enum {
+    /**
+     * SAME padding.
+     * Padding on both ends are the "same":
+     *     padding_to_beginning =  total_padding / 2
+     *     padding_to_end       = (total_padding + 1)/2.
+     * i.e., for even number of padding, padding to both ends are exactly
+     * the same; for odd number of padding, padding to the ending is bigger
+     * than the padding to the beginning by 1.
+     *
+     * total_padding is a function of input, stride and filter size.
+     * It could be computed as follows:
+     *    out_size = (input + stride - 1) / stride;
+     *    needed_input = (out_size - 1) * stride + filter_size
+     *    total_padding = max(0, needed_input - input_size)
+     *  The computation is the same for the horizontal and vertical directions.
+     */
+    ANEURALNETWORKS_PADDING_SAME = 1,
+
+    /**
+     * VALID padding.
+     * No padding. When the input size is not evenly divisible by
+     * the filter size, the input at the end that could not fill
+     * the whole filter tile will simply be ignored.
+     */
+    ANEURALNETWORKS_PADDING_VALID = 2,
+} PaddingCode;
+
+/**
+ * Execution preferences.
+ *
+ * Available since API level 27.
+ */
+typedef enum {
+    /**
+     * Prefer executing in a way that minimizes battery drain.
+     * This is desirable for compilations that will be executed often.
+     */
+    ANEURALNETWORKS_PREFER_LOW_POWER = 0,
+    /**
+     * Prefer returning a single answer as fast as possible, even if this causes
+     * more power consumption.
+     */
+    ANEURALNETWORKS_PREFER_FAST_SINGLE_ANSWER = 1,
+    /**
+     * Prefer maximizing the throughput of successive frames, for example when
+     * processing successive frames coming from the camera.
+     */
+    ANEURALNETWORKS_PREFER_SUSTAINED_SPEED = 2,
+} PreferenceCode;
+
+/**
+ * Device types.
+ *
+ * The type of NNAPI device.
+ */
+typedef enum {
+    /** The device type cannot be provided. */
+    ANEURALNETWORKS_DEVICE_UNKNOWN = 0,
+    /** The device does not fall into any category below. */
+    ANEURALNETWORKS_DEVICE_OTHER = 1,
+    /** The device runs NNAPI models on single or multi-core CPU. */
+    ANEURALNETWORKS_DEVICE_CPU = 2,
+    /** The device can run NNAPI models and also accelerate graphics APIs such
+     * as OpenGL ES and Vulkan. */
+    ANEURALNETWORKS_DEVICE_GPU = 3,
+    /** Dedicated accelerator for Machine Learning workloads. */
+    ANEURALNETWORKS_DEVICE_ACCELERATOR = 4,
+} DeviceTypeCode;
+
+/**
+ * Result codes.
+ *
+ * <p>Any NNAPI function can return any result code, including result codes not
+ * currently documented. Any value other than {@link ANEURALNETWORKS_NO_ERROR}
+ * indicates a failure of some kind.</p>
+ *
+ * <p>Additional information about the nature of a failure can be obtained from
+ * the device log after enabling NNAPI debugging by setting the debug.nn.vlog
+ * property to 1, e.g., by calling "adb shell setprop debug.nn.vlog 1".</p>
+ *
+ * Available since API level 27.
+ */
+typedef enum {
+    /**
+     * Operation was succesful.
+     */
+    ANEURALNETWORKS_NO_ERROR = 0,
+
+    /**
+     * Failure caused by not enough available memory.
+     */
+    ANEURALNETWORKS_OUT_OF_MEMORY = 1,
+
+    ANEURALNETWORKS_INCOMPLETE = 2,
+
+    /**
+     * Failure caused by unexpected null argument.
+     */
+    ANEURALNETWORKS_UNEXPECTED_NULL = 3,
+
+    /**
+     * Failure caused by invalid function arguments, invalid model definition,
+     * invalid execution definition or invalid data at execution time.
+     */
+    ANEURALNETWORKS_BAD_DATA = 4,
+
+    /**
+     * Failure caused by failed model execution.
+     */
+    ANEURALNETWORKS_OP_FAILED = 5,
+
+    /**
+     * Failure caused by object being in the wrong state.
+     */
+    ANEURALNETWORKS_BAD_STATE = 6,
+
+    /**
+     * Failure caused by not being able to map a file into memory.
+     * This may be caused by a file descriptor not being mappable, or an AHardwareBuffer
+     * not supported by the device.
+     * Mitigate by reading its content into memory.
+     */
+    ANEURALNETWORKS_UNMAPPABLE = 7,
+
+    /**
+     * Failure caused by insufficient buffer size provided to a model output.
+     */
+    ANEURALNETWORKS_OUTPUT_INSUFFICIENT_SIZE = 8,
+
+    /**
+     * Failure caused by a device not being available.
+     */
+    ANEURALNETWORKS_UNAVAILABLE_DEVICE = 9,
+} ResultCode;
+
+/**
+ * For {@link ANeuralNetworksModel_setOperandValue}, values with a
+ * length smaller or equal to this will be immediately copied into
+ * the model. The size is in bytes.
+ *
+ * Available since API level 27.
+ */
+enum { ANEURALNETWORKS_MAX_SIZE_OF_IMMEDIATELY_COPIED_VALUES = 128 };
+
+/**
+ * For {@link ANeuralNetworksCompilation_setCaching}, specify the size
+ * of the cache token required from the application. The size is in bytes.
+ *
+ * Available since API level 29.
+ */
+enum { ANEURALNETWORKS_BYTE_SIZE_OF_CACHE_TOKEN = 32 };
+
+/**
+ * ANeuralNetworksMemory is an opaque type that represents memory.
+ *
+ * This type is used to represent shared memory, memory mapped files,
+ * and similar memories.
+ *
+ * By using shared memory, a program can efficiently communicate to the
+ * runtime and drivers the tensors that define a model. See
+ * {@link ANeuralNetworksModel_setOperandValueFromMemory}. An application
+ * should typically create one shared memory object that contains every constant tensor
+ * needed to define a model. {@link ANeuralNetworksMemory_createFromFd} can be used to
+ * create shared memory from a file handle.
+ * {@link ANeuralNetworksMemory_createFromAHardwareBuffer} can be used to
+ * create shared memory from an AHardwareBuffer handle.
+ *
+ * Memory objects can also be used to specify the input and output arguments of
+ * an execution. See {@link ANeuralNetworksExecution_setInputFromMemory}
+ * and {@link ANeuralNetworksExecution_setOutputFromMemory}.
+ *
+ * When calling {@link ANeuralNetworksModel_setOperandValueFromMemory},
+ * {@link ANeuralNetworksExecution_setInputFromMemory} and
+ * {@link ANeuralNetworksExecution_setOutputFromMemory}, each operand in the shared
+ * memory object must be aligned on a boundary of a byte size that is a multiple
+ * of the element type byte size, e.g., a tensor with
+ * {@link ANEURALNETWORKS_TENSOR_FLOAT32} type must be aligned on 4-byte boundary.
+ *
+ * Available since API level 27.
+ */
+typedef struct ANeuralNetworksMemory ANeuralNetworksMemory;
+
+/**
+ * ANeuralNetworksModel is an opaque type that contains a description of the
+ * mathematical operations that constitute the model.
+ *
+ * <p>Build the model by calling<ul>
+ * <li>{@link ANeuralNetworksModel_create}</li>
+ * <li>{@link ANeuralNetworksModel_addOperation}</li>
+ * <li>{@link ANeuralNetworksModel_addOperand}</li>
+ * </ul>
+ *
+ * This forms a graph in which each operation and operand is a node, a
+ * directed edge from an operand to an operation indicates that the
+ * operand is an input to the operation, and a directed edge from an
+ * operation to an operand indicates that the operand is an output
+ * from the operation. This graph must be acyclic.
+ *
+ * A model is completed by calling {@link ANeuralNetworksModel_finish}.
+ * A model is destroyed by calling {@link ANeuralNetworksModel_free}.
+ *
+ * <p>A model cannot be modified once {@link ANeuralNetworksModel_finish}
+ * has been called on it.</p>
+ *
+ * <p>It is the application's responsibility to make sure that only one thread
+ * modifies a model at a given time. It is however safe for more than one
+ * thread to use the model once {@link ANeuralNetworksModel_finish} has returned.</p>
+ *
+ * <p>It is also the application's responsibility to ensure that there are no other
+ * uses of the model after calling {@link ANeuralNetworksModel_free}.
+ * This includes any compilation or execution object created using the model.</p>
+ *
+ * Available since API level 27.
+ */
+typedef struct ANeuralNetworksModel ANeuralNetworksModel;
+
+/**
+ * ANeuralNetworksCompilation is an opaque type that can be used to compile
+ * a machine learning model.
+ *
+ * <p>To use:<ul>
+ *    <li>Create a new compilation instance by calling the
+ *        {@link ANeuralNetworksCompilation_create} function or
+ *        {@link ANeuralNetworksCompilation_createForDevices}.</li>
+ *    <li>Set any desired properties on the compilation (for example,
+ *        {@link ANeuralNetworksCompilation_setPreference}).</li>
+ *    <li>Optionally, set the caching signature and the cache directory on the
+ *        compilation by calling {@link ANeuralNetworksCompilation_setCaching}.</li>
+ *    <li>Complete the compilation with {@link ANeuralNetworksCompilation_finish}.</li>
+ *    <li>Use the compilation as many times as needed
+ *        with {@link ANeuralNetworksExecution_create} and
+ *        {@link ANeuralNetworksBurst_create}.</li>
+ *    <li>Destroy the compilation with {@link ANeuralNetworksCompilation_free}
+ *        once all executions using the compilation have completed.</li></ul></p>
+ *
+ * A compilation is completed by calling {@link ANeuralNetworksCompilation_finish}.
+ * A compilation is destroyed by calling {@link ANeuralNetworksCompilation_free}.
+ *
+ * <p>A compilation cannot be modified once {@link ANeuralNetworksCompilation_finish}
+ * has been called on it.</p>
+ *
+ * <p>It is the application's responsibility to make sure that only
+ * one thread modifies a compilation at a given time. It is however
+ * safe for more than one thread to use the compilation once
+ * {@link ANeuralNetworksCompilation_finish} has returned.</p>
+ *
+ * <p>It is also the application's responsibility to ensure that there are no other
+ * uses of the compilation after calling {@link ANeuralNetworksCompilation_free}.
+ * This includes any execution object created using the compilation.</p>
+ *
+ * Available since API level 27.
+ */
+typedef struct ANeuralNetworksCompilation ANeuralNetworksCompilation;
+
+/**
+ * ANeuralNetworksExecution is an opaque type that can be used to apply a machine
+ * learning model to a set of inputs.
+ *
+ * <p>To use:<ul>
+ *    <li>Create a new execution instance by calling the
+ *        {@link ANeuralNetworksExecution_create} function.</li>
+ *    <li>Associate input buffers or memory regions to the model inputs with
+ *        {@link ANeuralNetworksExecution_setInput} or
+ *        {@link ANeuralNetworksExecution_setInputFromMemory}.</li>
+ *    <li>Associate output buffers or memory regions to the model outputs with
+ *        {@link ANeuralNetworksExecution_setOutput} or
+ *        {@link ANeuralNetworksExecution_setOutputFromMemory}.</li>
+ *    <li>Apply the model with one of the following:</li><ul>
+ *        <li>Asynchronously with {@link ANeuralNetworksExecution_startCompute},
+ *            waiting for the execution to complete with
+ *            {@link ANeuralNetworksEvent_wait}.</li>
+ *        <li>Synchronously with {@link ANeuralNetworksExecution_compute}.</li>
+ *        <li>Synchronously as part of an execution burst with
+ *            {@link ANeuralNetworksExecution_burstCompute}.</li></ul>
+ *    <li>Destroy the execution with
+ *        {@link ANeuralNetworksExecution_free}.</li></ul></p>
+ *
+ * <p>An output buffer or memory region must not overlap with any
+ * other output buffer or memory region, with an input buffer or
+ * memory region, or with an operand value in a memory object
+ * ({@link ANeuralNetworksModel_setOperandValueFromMemory}).</p>
+ *
+ * <p>An execution cannot be modified once
+ * {@link ANeuralNetworksExecution_compute} or
+ * {@link ANeuralNetworksExecution_startCompute} has been called on it.</p>
+ *
+ * <p>An execution can be applied to a model with
+ * {@link ANeuralNetworksExecution_compute} or
+ * {@link ANeuralNetworksExecution_startCompute} only once. Create new
+ * executions to do new evaluations of the model.</p>
+ *
+ * <p>It is the application's responsibility to make sure that only one thread
+ * modifies an execution at a given time. It is however safe for more than one
+ * thread to use {@link ANeuralNetworksEvent_wait} at the same time.</p>
+ *
+ * <p>It is also the application's responsibility to ensure that there are no other
+ * uses of the execution after calling {@link ANeuralNetworksExecution_free}.</p>
+ *
+ * <p>Multiple executions can be scheduled and evaluated concurrently, either by
+ * means of {@link ANeuralNetworksExecution_compute} (which is synchronous) in
+ * different threads or by means of
+ * {@link ANeuralNetworksExecution_startCompute} (which is asynchronous). The
+ * runtime makes no guarantee on the ordering of completion of executions. If
+ * it's important to the application, the application should enforce the
+ * ordering by ensuring that one execution completes before the next is
+ * scheduled (for example, by scheduling all executions synchronously within a
+ * single thread, or by scheduling all executions asynchronously and using
+ * {@link ANeuralNetworksEvent_wait} between calls to
+ * {@link ANeuralNetworksExecution_startCompute}).</p>
+ *
+ * Available since API level 27.
+ */
+typedef struct ANeuralNetworksExecution ANeuralNetworksExecution;
+
+#if __ANDROID_API__ >= __ANDROID_API_Q__
+/**
+ * Parameters for ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL operand.
+ */
+typedef struct ANeuralNetworksSymmPerChannelQuantParams {
+    /* The index of the channel dimension. */
+    uint32_t channelDim;
+    /** The size of the scale array. Should be equal to dimension[channelDim] of the Operand. */
+    uint32_t scaleCount;
+    /** The array of scaling values for each channel. Each value must be greater than zero. */
+    const float* scales;
+} ANeuralNetworksSymmPerChannelQuantParams;
+
+/**
+ * ANeuralNetworksBurst is an opaque type that can be used to reduce the latency
+ * of a rapid sequence of executions. It will likely cause overhead if only used
+ * for a single execution.
+ *
+ * ANeuralNetworksBurst serves as a context object for any number of inferences
+ * using {@link ANeuralNetworksExecution} objects. An ANeuralNetworksBurst
+ * object and the {@link ANeuralNetworksExecution} objects used with it must all
+ * have been created from the same {@link ANeuralNetworksCompilation} object.
+ *
+ * This object is also used as a hint to drivers, providing insight to the
+ * lifetime of a rapid sequence of executions. For example, a driver may choose
+ * to increase the clock frequency of its accelerator for the lifetime of a
+ * burst object.
+ *
+ * <p>To use:<ul>
+ *    <li>Create a new burst object by calling the
+ *        {@link ANeuralNetworksBurst_create} function.</li>
+ *    <li>For each execution:</li><ul>
+ *        <li>Create {@link ANeuralNetworksExecution} and configure its
+ *            properties (see {@link ANeuralNetworksExecution} for details).</li>
+ *        <li>Apply the model synchronously with
+ *            {@link ANeuralNetworksExecution_burstCompute}, reusing the same
+ *            {@link ANeuralNetworksBurst} with the new
+ *            {@link ANeuralNetworksExecution}.</li>
+ *        <li>Use and free the {@link ANeuralNetworksExecution}.</li></ul>
+ *    <li>Destroy the burst with
+ *        {@link ANeuralNetworksBurst_free}.</li></ul></p>
+ *
+ * Available since API level 29.
+ */
+typedef struct ANeuralNetworksBurst ANeuralNetworksBurst;
+#endif  //  __ANDROID_API__ >= __ANDROID_API_Q__
+
+/**
+ * ANeuralNetworksOperandType describes the type of an operand.
+ *
+ * This structure is used to describe both scalars and tensors.
+ *
+ * A tensor operand type with all dimensions specified is "fully
+ * specified".  Whenever possible (i.e., whenever the dimensions are
+ * known at model construction time), a tensor operand type should be
+ * (but is not required to be) fully specified, in order to enable the
+ * best possible performance.
+ *
+ * If a tensor operand's type is not fully specified, the dimensions
+ * of the operand are deduced from the operand types and values of the
+ * operation for which that operand is an output.
+ *
+ * <p>In the following situations, a tensor operand type must be fully
+ * specified:<ul>
+ *     <li>The operand has a constant value, set by
+ *         {@link ANeuralNetworksModel_setOperandValue} (with a
+ *         non-nullptr buffer) or
+ *         {@link ANeuralNetworksModel_setOperandValueFromMemory}.</li>
+ *     <li>The operand is a model input (see
+ *         {@link ANeuralNetworksModel_identifyInputsAndOutputs}).  A
+ *         fully specified tensor operand type must either be provided
+ *         to {@link ANeuralNetworksModel_addOperand}; or it must be
+ *         provided to the corresponding
+ *         {@link ANeuralNetworksExecution_setInput}, or
+ *         {@link ANeuralNetworksExecution_setInputFromMemory}.
+ *         EXCEPTION: If the input is optional and omitted
+ *         (by passing nullptr for buffer to
+ *         {@link ANeuralNetworksExecution_setInput}) then it need
+ *         not have a fully specified tensor operand type.</li></ul>
+ *
+ * A tensor operand type of specified rank but some number of
+ * unspecified dimensions is represented by setting dimensionCount to
+ * the rank and each unspecified dimension to 0.
+ *
+ * Available since API level 27.
+ *
+ * Starting at API level 29, a tensor operand type of unspecified rank is
+ * represented by setting dimensionCount to 0 and dimensions to NULL (just as if
+ * it were a scalar operand type).
+ */
+typedef struct ANeuralNetworksOperandType {
+    /**
+     * The data type, e.g ANEURALNETWORKS_FLOAT32.
+     */
+    int32_t type;
+
+    /**
+     * The number of dimensions (rank).
+     *
+     * Must be 0 for scalars.
+     */
+    uint32_t dimensionCount;
+
+    /**
+     * The dimensions of the tensor.
+     *
+     * Must be nullptr for scalars.
+     */
+    const uint32_t* dimensions;
+
+    /**
+     * These two fields are only used for quantized tensors.
+     * They must be zero for all other types.
+     * The dequantized value of each entry is (value - zeroPoint) * scale.
+     */
+    float scale;
+    int32_t zeroPoint;
+} ANeuralNetworksOperandType;
+
+typedef int32_t ANeuralNetworksOperationType;
+
+/**
+ * ANeuralNetworksEvent is an opaque type that represents an event
+ * that will be signaled once an execution completes.
+ *
+ * Available since API level 27.
+ */
+typedef struct ANeuralNetworksEvent ANeuralNetworksEvent;
+
+#if __ANDROID_API__ >= __ANDROID_API_Q__
+
+/**
+ * ANeuralNetworksDevice is an opaque type that represents a device.
+ *
+ * This type is used to query basic properties and supported operations of the corresponding
+ * device, and control which device(s) a model is to be run on.
+ *
+ * Available since API level 29.
+ */
+typedef struct ANeuralNetworksDevice ANeuralNetworksDevice;
+
+/**
+ * Get the number of available devices.
+ *
+ * @param numDevices Used to return the number of devices.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ *
+ * Available since API level 29.
+ */
+int ANeuralNetworks_getDeviceCount(uint32_t* numDevices) __INTRODUCED_IN(29);
+
+/**
+ * Get the representation of the specified device.
+ *
+ * @param devIndex The index of the specified device. Must be less than the
+                   number of available devices.
+ * @param device The representation of the specified device.
+ *               The same representation will always be returned for the specified
+ *               device.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ *
+ * Available since API level 29.
+ */
+int ANeuralNetworks_getDevice(uint32_t devIndex, ANeuralNetworksDevice** device)
+        __INTRODUCED_IN(29);
+
+/**
+ * Get the name of the specified device.
+ *
+ * @param device The representation of the specified device.
+ * @param name   The returned name of the specified device. The name will be in UTF-8
+ *               and will be null-terminated. It will be recognizable as a known device name
+ *               rather than a cryptic string. For devices with feature level 29 and above, the
+ *               format of the name is {VENDOR}-{DEVICE}. For devices with feature level 28
+ *               or lower, the format of the name is undefined.
+ *               The name will remain valid for the duration of the application.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ *
+ * Available since API level 29.
+ */
+int ANeuralNetworksDevice_getName(const ANeuralNetworksDevice* device, const char** name)
+        __INTRODUCED_IN(29);
+
+/**
+ * Get the type of a given device.
+ *
+ * The device type can be used to help application developers to distribute Machine Learning
+ * workloads and other workloads such as graphical rendering.
+ * E.g., for an app which renders AR scenes based on real time object detection results,
+ * the developer could choose an ACCELERATOR type device for ML workloads, and reserve GPU
+ * for graphical rendering.
+ *
+ * @param device The representation of the specified device.
+ * @param type The returned {@link DeviceTypeCode} of the specified device.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ *
+ * Available since API level 29.
+ */
+int ANeuralNetworksDevice_getType(const ANeuralNetworksDevice* device, int32_t* type)
+        __INTRODUCED_IN(29);
+
+/**
+ * Get the version of the driver implementation of the specified device.
+ *
+ * It’s the responsibility of the driver implementor to insure that this version string
+ * uniquely distinguishes this implementation from all previous implementations.
+ *
+ * This version string must not be confused with the feature level which is solely defined
+ * by {@link ANeuralNetworksDevice_getFeatureLevel}. There is no implicit ordering of the versions.
+ * For example, it is not possible to filter all drivers older than a certain version.
+ *
+ * Application developers may use this version string to avoid or prefer specific driver
+ * implementations. For example, an application may want to do so because:
+ *     - A specific version of the driver does not provide the required performance,
+ *       perhaps because of a performance regression.
+ *     - A specific version of the driver has a bug or returns results that don’t match
+ *       the minimum precision requirement for the application.
+ *
+ * @param device The representation of the specified device.
+ * @param version The returned version string of the driver for the specified device. The
+ *                string will be in UTF-8 and will be null-terminated. For devices with feature
+ *                level 28 or lower, "UNKNOWN" will be returned. The version string will remain
+ *                valid for the duration of the application.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ *
+ * Available since API level 29.
+ */
+int ANeuralNetworksDevice_getVersion(const ANeuralNetworksDevice* device, const char** version)
+        __INTRODUCED_IN(29);
+
+/**
+ * Get the supported NNAPI version of the specified device.
+ *
+ * Each device has a supported feature level, which is the most advanced feature this driver
+ * implements. For example, if the driver implements the features introduced in Android P,
+ * but does not implement the features introduced after Android P, the value would be 28.
+ * Developers could decide whether or not the specified device should be used for a Model that
+ * has certain feature requirements.
+ *
+ * @param device The representation of the specified device.
+ * @param featureLevel The API level of the most advanced feature this driver implements.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ *
+ * Available since API level 29.
+ */
+int ANeuralNetworksDevice_getFeatureLevel(const ANeuralNetworksDevice* device,
+                                          int64_t* featureLevel) __INTRODUCED_IN(29);
+
+/**
+ * Get the supported operations for a specified set of devices. If multiple devices
+ * are selected, the supported operation list is a union of supported operations of all
+ * selected devices.
+ *
+ * @param model The model to be queried.
+ * @param devices The set of devices. Must not contain duplicates.
+ * @param numDevices The number of devices in the set.
+ * @param supportedOps The boolean array to be filled. True means supported. The size of the
+ *                     boolean array must be at least as large as the number of operations
+ *                     in the model. The order of elements in the supportedOps array matches
+ *                     the order in which the corresponding operations were added to the model.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ *
+ * Available since API level 29.
+ */
+int ANeuralNetworksModel_getSupportedOperationsForDevices(
+        const ANeuralNetworksModel* model, const ANeuralNetworksDevice* const* devices,
+        uint32_t numDevices, bool* supportedOps) __INTRODUCED_IN(29);
+
+/**
+ * Create a {@link ANeuralNetworksCompilation} to compile the given model for a specified set
+ * of devices. If more than one device is specified, the compilation will
+ * distribute the workload automatically across the devices. The model must be fully
+ * supported by the specified set of devices. This means that
+ * ANeuralNetworksModel_getSupportedOperationsForDevices() must have returned true for every
+ * operation for that model/devices pair.
+ *
+ * The user must handle all compilation and execution failures from the
+ * specified set of devices. This is in contrast to a use of {@link
+ * ANeuralNetworksCompilation_create}, where the runtime will attempt to recover
+ * from such failures.
+ *
+ * @param model The {@link ANeuralNetworksModel} to be compiled.
+ * @param devices The set of devices. Must not contain duplicates.
+ * @param numDevices The number of devices in the set.
+ * @param compilation The newly created object or NULL if unsuccessful.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA
+ *         if the model is invalid.
+ *
+ * Available since API level 29.
+ */
+int ANeuralNetworksCompilation_createForDevices(ANeuralNetworksModel* model,
+                                                const ANeuralNetworksDevice* const* devices,
+                                                uint32_t numDevices,
+                                                ANeuralNetworksCompilation** compilation)
+        __INTRODUCED_IN(29);
+
+/**
+ * Sets the compilation caching signature and the cache directory.
+ *
+ * Provides optional caching information to the runtime for faster repeated
+ * compilation.
+ *
+ * See {@link ANeuralNetworksCompilation} for information on multithreaded usage.
+ *
+ * @param compilation The compilation to be modified.
+ * @param cacheDir The cache directory for the runtime to store and retrieve caching
+ *                 data. It is recommended to use the code cache directory provided
+ *                 by the Android runtime. If not using the code cache directory, the
+ *                 user should choose a directory local to the application, and is
+ *                 responsible to managing the cache entries.
+ * @param token The token provided by the user to specify a model must be of length
+ *              ANEURALNETWORKS_BYTE_SIZE_OF_CACHE_TOKEN. The user should ensure that
+ *              the token is unique to a model within the application. The NNAPI
+ *              runtime cannot detect token collisions; a collision will result in a
+ *              failed execution or in a successful execution that produces incorrect
+ *              output values.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ *
+ * Available since API level 29.
+ */
+int ANeuralNetworksCompilation_setCaching(ANeuralNetworksCompilation* compilation,
+                                          const char* cacheDir, const uint8_t* token)
+        __INTRODUCED_IN(29);
+
+/**
+ * Schedule synchronous evaluation of the execution.
+ *
+ * <p>Schedules synchronous evaluation of the execution. Returns once the
+ * execution has completed and the outputs are ready to be consumed.
+ * </p>
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * See {@link ANeuralNetworksExecution_startCompute} for asynchronous execution.
+ * Synchronous execution incurs lower overhead than asynchronous execution.
+ *
+ * Available since API level 29.
+ *
+ * @param execution The execution to be scheduled and executed.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if the execution completed normally.
+ *         ANEURALNETWORKS_UNMAPPABLE if the execution input or output memory cannot
+ *         be properly mapped.
+ */
+int ANeuralNetworksExecution_compute(ANeuralNetworksExecution* execution) __INTRODUCED_IN(29);
+
+/**
+ * Get the dimensional information of the specified output operand of the model of the
+ * {@link ANeuralNetworksExecution}.
+ *
+ * On asynchronous execution initiated by {@link ANeuralNetworksExecution_startCompute},
+ * {@link ANeuralNetworksEvent_wait} must be called prior to this function to recuperate
+ * the resources used by the execution.
+ *
+ * @param execution The execution to be queried.
+ * @param index The index of the output argument we are querying. It is
+ *              an index into the lists passed to
+ *              {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not
+ *              the index associated with {@link ANeuralNetworksModel_addOperand}.
+ * @param rank The rank of the output operand.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_OUTPUT_INSUFFICIENT_SIZE
+ *         if the target output is provided an insufficient buffer at execution time,
+ *         ANEURALNETWORKS_BAD_DATA if the index is invalid.
+ *
+ * Available since API level 29.
+ */
+int ANeuralNetworksExecution_getOutputOperandRank(ANeuralNetworksExecution* execution,
+                                                  int32_t index, uint32_t* rank)
+        __INTRODUCED_IN(29);
+
+/**
+ * Get the dimensional information of the specified output operand of the model of the
+ * {@link ANeuralNetworksExecution}. The target output operand cannot be a scalar.
+ *
+ * On asynchronous execution initiated by {@link ANeuralNetworksExecution_startCompute},
+ * {@link ANeuralNetworksEvent_wait} must be called prior to this function to recuperate
+ * the resources used by the execution.
+ *
+ * @param execution The execution to be queried.
+ * @param index The index of the output argument we are querying. It is an index into the lists
+ *              passed to {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not
+ *              the index associated with {@link ANeuralNetworksModel_addOperand}.
+ * @param dimensions The dimension array to be filled. The size of the array must be exactly as
+ *                   large as the rank of the output operand to be queried in the model.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_OUTPUT_INSUFFICIENT_SIZE
+ *         if the target output is provided an insufficient buffer at execution time,
+ *         ANEURALNETWORKS_BAD_DATA if the index is invalid or if the target is a scalar.
+ *
+ * Available since API level 29.
+ */
+int ANeuralNetworksExecution_getOutputOperandDimensions(ANeuralNetworksExecution* execution,
+                                                        int32_t index, uint32_t* dimensions)
+        __INTRODUCED_IN(29);
+
+/**
+ * Create a {@link ANeuralNetworksBurst} to apply the given compilation.
+ * This only creates the burst object. Computation is only performed once
+ * {@link ANeuralNetworksExecution_burstCompute} is invoked with a valid
+ * {@link ANeuralNetworksExecution} and {@link ANeuralNetworksBurst}.
+ *
+ * <p>The provided compilation must outlive the burst object.</p>
+ *
+ * Available since API level 29.
+ *
+ * @param compilation The {@link ANeuralNetworksCompilation} to be evaluated.
+ * @param burst The newly created object or NULL if unsuccessful.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA
+ *         if the compilation is invalid.
+ */
+int ANeuralNetworksBurst_create(ANeuralNetworksCompilation* compilation,
+                                ANeuralNetworksBurst** burst) __INTRODUCED_IN(29);
+
+/**
+ * Destroys the burst object.
+ *
+ * Available since API level 29.
+ *
+ * @param burst The burst object to be destroyed. Passing NULL is acceptable and
+ *              results in no operation.
+ */
+void ANeuralNetworksBurst_free(ANeuralNetworksBurst* burst) __INTRODUCED_IN(29);
+
+/**
+ * Schedule synchronous evaluation of the execution on a burst object.
+ *
+ * <p>Schedules synchronous evaluation of the execution. Returns once the
+ * execution has completed and the outputs are ready to be consumed.</p>
+ *
+ * <p>There must be at most one {@link ANeuralNetworksExecution} processing at
+ * any given time for any given burst object. Any
+ * {@link ANeuralNetworksExecution} launched before the previous has finished
+ * will result in ANEURALNETWORKS_BAD_STATE.</p>
+ *
+ * Available since API level 29.
+ *
+ * @param burst The burst object to execute on.
+ * @param execution The execution to be scheduled and executed. The execution
+ *                  must be created from the same {@link
+ *                  ANeuralNetworksCompilation} as the burst object.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if the execution completed normally.
+ */
+int ANeuralNetworksExecution_burstCompute(ANeuralNetworksExecution* execution,
+                                          ANeuralNetworksBurst* burst) __INTRODUCED_IN(29);
+
+/**
+ * Creates a shared memory object from an AHardwareBuffer handle.
+ *
+ * If the shared memory is backed by an AHardwareBuffer of AHARDWAREBUFFER_FORMAT_BLOB
+ * format, it can be used the same way as shared memory created from a file handle. See
+ * {@link ANeuralNetworksMemory} for a description on how to use this shared memory.
+ *
+ * If the shared memory is backed by an AHardwareBuffer of a format other than
+ * AHARDWAREBUFFER_FORMAT_BLOB, it can only be used for Model inputs and outputs.
+ * When calling {@link ANeuralNetworksExecution_setInputFromMemory} or
+ * {@link ANeuralNetworksExecution_setOutputFromMemory} with the shared memory, both
+ * offset and length must be set to zero and the entire memory region will be
+ * associated with the specified input or output operand. There is no guarantee
+ * that an arbitrary AHardwareBuffer_Format and AHardwareBuffer_UsageFlags combination
+ * can be used by arbitrary devices. The execution will fail if selected set of devices
+ * cannot consume the buffer.
+ *
+ * Calling {@link ANeuralNetworksModel_setOperandValueFromMemory} with shared memory
+ * backed by an AHardwareBuffer of a format other than AHARDWAREBUFFER_FORMAT_BLOB is
+ * disallowed.
+ *
+ * TODO(miaowang): add documentation about intended usage with introspection API.
+ *
+ * Available since API level 29.
+ *
+ * @param ahwb The AHardwareBuffer handle.
+ * @param memory The memory object to be created.
+ *               Set to NULL if unsuccessful.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if the request completed normally.
+ *
+ * @see AHardwareBuffer
+ */
+int ANeuralNetworksMemory_createFromAHardwareBuffer(const AHardwareBuffer* ahwb,
+                                                    ANeuralNetworksMemory** memory)
+        __INTRODUCED_IN(29);
+
+/**
+
+ * Specifies whether duration of the {@link ANeuralNetworksExecution} is to be
+ * measured. Evaluation of the execution must not have been scheduled.
+ *
+ * By default, duration is not measured.
+ *
+ * The {@link ANeuralNetworksExecution} must have been created with
+ * {@link ANeuralNetworksCompilation_createForDevices} with numDevices = 1.
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * Available since API level 29.
+ *
+ * @param execution The execution to be modified.
+ * @param measure 'true' if duration is to be measured, 'false' if not.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+int ANeuralNetworksExecution_setMeasureTiming(ANeuralNetworksExecution* execution, bool measure)
+        __INTRODUCED_IN(29);
+
+/**
+ * Different duration measurements.
+ *
+ * Durations are measured in nanoseconds.
+ *
+ * Available since API level 29.
+ */
+typedef enum {
+    // Execution time on hardware (not driver, which runs on host processor).
+    ANEURALNETWORKS_DURATION_ON_HARDWARE = 0,
+    // Execution time in driver (including time on hardware).  Excludes overhead
+    // such as that of the runtime itself and the IPC needed for the runtime to
+    // communicate with the driver.
+    ANEURALNETWORKS_DURATION_IN_DRIVER = 1,
+} DurationCode;
+
+/**
+ * Get the time spent in the specified {@link ANeuralNetworksExecution}, in nanoseconds.
+ * The execution must have completed.
+ *
+ * Available since API level 29.
+ *
+ * @param execution The execution to be queried.
+ * @param durationCode The measurement to be queried, specified by {@link DurationCode}.
+ * @param duration The returned duration. If no measurement was requested by
+ *                 {@link ANeuralNetworksExecution_setMeasureTiming}, or for some other
+ *                 reason the duration is not available, UINT64_MAX will be returned.
+ *                 A particular device need not support any given measurement.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+int ANeuralNetworksExecution_getDuration(const ANeuralNetworksExecution* execution,
+                                         int32_t durationCode, uint64_t* duration)
+        __INTRODUCED_IN(29);
+
+#endif  // __ANDROID_API__ >= __ANDROID_API_Q__
+
+#if __ANDROID_API__ >= 27
+
+/**
+ * Creates a shared memory object from a file descriptor.
+ *
+ * The shared memory is backed by a file descriptor via mmap.
+ * See {@link ANeuralNetworksMemory} for a description on how to use
+ * this shared memory.
+ *
+ * Available since API level 27.
+ *
+ * @param size The requested size in bytes.
+ *             Must not be larger than the file size.
+ * @param prot The desired memory protection for the mapping.
+ *             It is either PROT_NONE or the bitwise OR of one or
+ *             more of the following flags: PROT_READ, PROT_WRITE.
+ * @param fd The requested file descriptor.
+ *           The file descriptor has to be mmap-able. The file
+ *           descriptor will be duplicated.
+ * @param offset The offset to the beginning of the file of the area to map.
+ *               The offset has to be aligned to a page size.
+ * @param memory The memory object to be created.
+ *               Set to NULL if unsuccessful.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if the request completed normally.
+ */
+int ANeuralNetworksMemory_createFromFd(size_t size, int protect, int fd, size_t offset,
+                                       ANeuralNetworksMemory** memory) __INTRODUCED_IN(27);
+
+/**
+ * Delete a memory object.
+ *
+ * Destroys the object used by the run time to keep track of the memory.
+ * This will free the underlying actual memory if no other code has open
+ * handles to this memory.
+ *
+ * Available since API level 27.
+ *
+ * @param memory The memory object to be freed.
+ */
+void ANeuralNetworksMemory_free(ANeuralNetworksMemory* memory) __INTRODUCED_IN(27);
+
+/**
+ * Create an empty {@link ANeuralNetworksModel}.
+ *
+ * <p>This only creates the object. Computation is performed once
+ * {@link ANeuralNetworksExecution_compute} or
+ * {@link ANeuralNetworksExecution_startCompute} is invoked.
+ *
+ * The model should be constructed with calls to
+ * {@link ANeuralNetworksModel_addOperation} and
+ * {@link ANeuralNetworksModel_addOperand}
+ *
+ * <p>{@link ANeuralNetworksModel_finish} should be called once the model
+ * has been fully constructed.</p>
+ *
+ * <p>{@link ANeuralNetworksModel_free} should be called once the model
+ * is no longer needed.</p>
+ *
+ * Available since API level 27.
+ *
+ * @param model The {@link ANeuralNetworksModel} to be created.
+ *              Set to NULL if unsuccessful.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+int ANeuralNetworksModel_create(ANeuralNetworksModel** model) __INTRODUCED_IN(27);
+
+/**
+ * Destroy a model.
+ *
+ * The model need not have been finished by a call to
+ * {@link ANeuralNetworksModel_finish}.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ *
+ * Available since API level 27.
+ *
+ * @param model The model to be destroyed. Passing NULL is acceptable and
+ *              results in no operation.
+ */
+void ANeuralNetworksModel_free(ANeuralNetworksModel* model) __INTRODUCED_IN(27);
+
+/**
+ * Indicate that we have finished modifying a model. Required before
+ * calling {@link ANeuralNetworksCompilation_create} and
+ * {@link ANeuralNetworksCompilation_createForDevices}.
+ *
+ * An application is responsible to make sure that no other thread uses
+ * the model at the same time.
+ *
+ * This function must only be called once for a given model.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ *
+ * Available since API level 27.
+ *
+ * @param model The model to be finished.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+int ANeuralNetworksModel_finish(ANeuralNetworksModel* model) __INTRODUCED_IN(27);
+
+/**
+ * Add an operand to a model.
+ *
+ * The order in which the operands are added is important. The first one added
+ * to a model will have the index value 0, the second 1, etc. These indexes are
+ * used as operand identifiers in
+ * {@link ANeuralNetworksModel_addOperation},
+ * {@link ANeuralNetworksModel_identifyInputsAndOutputs},
+ * {@link ANeuralNetworksModel_setOperandValue},
+ * {@link ANeuralNetworksModel_setOperandValueFromMemory},
+ * {@link ANeuralNetworksExecution_setInput},
+ * {@link ANeuralNetworksExecution_setInputFromMemory},
+ * {@link ANeuralNetworksExecution_setOutput},
+ * {@link ANeuralNetworksExecution_setOutputFromMemory} and
+ * {@link ANeuralNetworksExecution_setOperandValue}.
+ *
+ * <p>Every operand must be referenced in exactly one of the following
+ * ways:<ul>
+ *    <li>It is identified as a model input with
+ *        {@link ANeuralNetworksModel_identifyInputsAndOutputs}.</li>
+ *    <li>It is identified as a constant with
+ *        {@link ANeuralNetworksModel_setOperandValue} or
+ *        {@link ANeuralNetworksModel_setOperandValueFromMemory}.</li>
+ *    <li>It is identified as an output of exactly one operation with
+ *        {@link ANeuralNetworksModel_addOperation}.</li></p>
+ * <p>An operand that is identified as a model input or as a constant
+ * must not also be identified as a model output with
+ * {@link ANeuralNetworksModel_identifyInputsAndOutputs}.</p>
+ *
+ * To build a model that can accommodate inputs of various sizes, as
+ * you may want to do for a CNN, leave unspecified the dimensions that
+ * will vary at run time.  If you do so, fully specify dimensions
+ * when calling {@link ANeuralNetworksExecution_setInput} or
+ * {@link ANeuralNetworksExecution_setInputFromMemory}.
+ *
+ * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been
+ * called will return an error.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ *
+ * Available since API level 27.
+ *
+ * @param model The model to be modified.
+ * @param type The {@link ANeuralNetworksOperandType} that describes the shape
+ *             of the operand.  Neither the {@link ANeuralNetworksOperandType}
+ *             nor the dimensions it points to need to outlive the call to
+ *             {@link ANeuralNetworksModel_addOperand}.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+int ANeuralNetworksModel_addOperand(ANeuralNetworksModel* model,
+                                    const ANeuralNetworksOperandType* type) __INTRODUCED_IN(27);
+
+/**
+ * Sets an operand to a constant value.
+ *
+ * Values of length smaller or equal to
+ * {@link ANEURALNETWORKS_MAX_SIZE_OF_IMMEDIATELY_COPIED_VALUES}
+ * are immediately copied into the model.
+ *
+ * For values of length greater than {@link ANEURALNETWORKS_MAX_SIZE_OF_IMMEDIATELY_COPIED_VALUES},
+ * a pointer to the buffer is stored within the model. The application is responsible
+ * for not changing the content of this region until all executions using this model
+ * have completed. As the data may be copied during processing, modifying the data
+ * after this call yields undefined results.
+ *
+ * For large tensors, using {@link ANeuralNetworksModel_setOperandValueFromMemory}
+ * is likely to be more efficient.
+ *
+ * To indicate that an optional operand should be considered missing,
+ * pass nullptr for buffer and 0 for length.
+ *
+ * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been
+ * called will return an error.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ *
+ * Available since API level 27.
+ *
+ * @param model The model to be modified.
+ * @param index The index of the model operand we're setting.
+ * @param buffer A pointer to the data to use.
+ * @param length The size in bytes of the data value.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+int ANeuralNetworksModel_setOperandValue(ANeuralNetworksModel* model, int32_t index,
+                                         const void* buffer, size_t length) __INTRODUCED_IN(27);
+
+#if __ANDROID_API__ >= __ANDROID_API_Q__
+
+/**
+ * Sets an operand's per channel quantization parameters.
+ *
+ * Sets parameters required by a tensor of type
+ * {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL}.
+ * This function must be called for every tensor of type
+ * {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL} before
+ * calling {@link ANeuralNetworksModel_finish}.
+ *
+ * Available since API level 29.
+ *
+ * @param model The model to be modified.
+ * @param index The index of the model operand we're setting.
+ * @param channelQuant The per channel quantization parameters for the operand.
+ *                    No memory in this struct needs to outlive the call to
+ *                    this function.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+int ANeuralNetworksModel_setOperandSymmPerChannelQuantParams(
+        ANeuralNetworksModel* model, int32_t index,
+        const ANeuralNetworksSymmPerChannelQuantParams* channelQuant) __INTRODUCED_IN(29);
+
+#endif  // __ANDROID_API__ >= __ANDROID_API_Q__
+
+/**
+ * Sets an operand to a value stored in a memory object.
+ *
+ * The content of the memory is not copied. A reference to that memory is stored
+ * inside the model. The application is responsible for not changing the content
+ * of the memory region until all executions using this model have completed.
+ * As the data may be copied during processing, modifying the data after this call
+ * yields undefined results.
+ *
+ * To indicate that an optional operand should be considered missing,
+ * use {@link ANeuralNetworksModel_setOperandValue} instead, passing nullptr for buffer.
+ *
+ * Is disallowed to set an operand value with shared memory backed by an AHardwareBuffer
+ * of a format other than AHARDWAREBUFFER_FORMAT_BLOB.
+ *
+ * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been
+ * called will return an error.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ * See {@link ANeuralNetworksMemory_createFromAHardwarBuffer} for information on
+ * AHardwareBuffer usage.
+ *
+ * Available since API level 27.
+ *
+ * @param model The model to be modified.
+ * @param index The index of the model operand we're setting.
+ * @param buffer A pointer to the data to use.
+ * @param memory The memory containing the data.
+ * @param offset This specifies the location of the data within the memory.
+ *               The offset is in bytes from the start of memory.
+ * @param length The size in bytes of the data value.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+int ANeuralNetworksModel_setOperandValueFromMemory(ANeuralNetworksModel* model, int32_t index,
+                                                   const ANeuralNetworksMemory* memory,
+                                                   size_t offset, size_t length)
+        __INTRODUCED_IN(27);
+
+/**
+ * Add an operation to a model.
+ *
+ * @param model The model to be modified.
+ * @param type The {@link ANeuralNetworksOperationType} of the operation.
+ * @param inputCount The number of entries in the inputs array.
+ * @param inputs An array of indexes identifying each operand.
+ * @param outputCount The number of entries in the outputs array.
+ * @param outputs An array of indexes identifying each operand.
+ *
+ * The operands specified by inputs and outputs must have been
+ * previously added by calls to {@link ANeuralNetworksModel_addOperand}.
+ *
+ * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been
+ * called will return an error.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ *
+ * Available since API level 27.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+int ANeuralNetworksModel_addOperation(ANeuralNetworksModel* model,
+                                      ANeuralNetworksOperationType type, uint32_t inputCount,
+                                      const uint32_t* inputs, uint32_t outputCount,
+                                      const uint32_t* outputs) __INTRODUCED_IN(27);
+
+/**
+ * Specifies which operands will be the model's inputs and
+ * outputs. Every model must have at least one input and one output.
+ *
+ * An operand cannot be used for both input and output. Doing so will
+ * return an error.
+ *
+ * @param model The model to be modified.
+ * @param inputCount The number of entries in the inputs array.
+ * @param inputs An array of indexes identifying the input operands.
+ * @param outputCount The number of entries in the outputs array.
+ * @param outputs An array of indexes identifying the output operands.
+ *
+ * The operands specified by inputs and outputs must have been
+ * previously added by calls to {@link ANeuralNetworksModel_addOperand}.
+ *
+ * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been
+ * called will return an error.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ *
+ * Available since API level 27.
+ *
+ */
+int ANeuralNetworksModel_identifyInputsAndOutputs(ANeuralNetworksModel* model, uint32_t inputCount,
+                                                  const uint32_t* inputs, uint32_t outputCount,
+                                                  const uint32_t* outputs) __INTRODUCED_IN(27);
+
+#if __ANDROID_API__ >= 28
+
+/**
+ * Specifies whether {@link ANEURALNETWORKS_TENSOR_FLOAT32} is allowed to be
+ * calculated with range and/or precision as low as that of the IEEE 754 16-bit
+ * floating-point format. By default, {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+ * must be calculated using at least the range and precision of the IEEE 754
+ * 32-bit floating-point format.
+ *
+ * @param model The model to be modified.
+ * @param allow 'true' indicates {@link ANEURALNETWORKS_TENSOR_FLOAT32} may be
+ *              calculated with range and/or precision as low as that of the
+ *              IEEE 754 16-bit floating point format. 'false' indicates
+ *              {@link ANEURALNETWORKS_TENSOR_FLOAT32} must be calculated using
+ *              at least the range and precision of the IEEE 754 32-bit floating
+ *              point format.
+ *
+ * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been
+ * called will return an error.
+ *
+ * Available since API level 28.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ */
+int ANeuralNetworksModel_relaxComputationFloat32toFloat16(ANeuralNetworksModel* model, bool allow)
+        __INTRODUCED_IN(28);
+
+#endif  // __ANDROID_API__ >= 28
+
+/**
+ * Create a {@link ANeuralNetworksCompilation} to compile the given model.
+ *
+ * <p>This only creates the object. Compilation is only performed once
+ * {@link ANeuralNetworksCompilation_finish} is invoked.</p>
+ *
+ * <p>{@link ANeuralNetworksCompilation_finish} should be called once
+ * all desired properties have been set on the compilation.</p>
+ *
+ * <p>{@link ANeuralNetworksModel_free} should be called once the compilation
+ * is no longer needed.</p>
+ *
+ * <p>The provided model must outlive the compilation.</p>
+ *
+ * The model must already have been finished by a call to
+ * {@link ANeuralNetworksModel_finish}.
+ *
+ * See {@link ANeuralNetworksCompilation} for information on multithreaded usage.
+ *
+ * Available since API level 27.
+ *
+ * @param model The {@link ANeuralNetworksModel} to be compiled.
+ * @param compilation The newly created object or NULL if unsuccessful.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA
+ *         if the model is invalid.
+ */
+int ANeuralNetworksCompilation_create(ANeuralNetworksModel* model,
+                                      ANeuralNetworksCompilation** compilation) __INTRODUCED_IN(27);
+
+/**
+ * Destroy a compilation.
+ *
+ * The compilation need not have been finished by a call to
+ * {@link ANeuralNetworksModel_finish}.
+ *
+ * See {@link ANeuralNetworksCompilation} for information on multithreaded usage.
+ *
+ * Available since API level 27.
+ *
+ * @param compilation The compilation to be destroyed. Passing NULL is acceptable and
+ *                    results in no operation.
+ */
+void ANeuralNetworksCompilation_free(ANeuralNetworksCompilation* compilation) __INTRODUCED_IN(27);
+
+/**
+ * Sets the execution preference.
+ *
+ * <p>Provides guidance to the runtime when trade-offs are possible.</p>
+ *
+ * See {@link ANeuralNetworksCompilation} for information on multithreaded usage.
+ *
+ * Available since API level 27.
+ *
+ * @param compilation The compilation to be modified.
+ * @param preference Either {@link PREFER_LOW_POWER},
+ *                  {@link PREFER_SINGLE_FAST_ANSWER}, or
+ *                  {@link PREFER_SUSTAINED_SPEED}.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+int ANeuralNetworksCompilation_setPreference(ANeuralNetworksCompilation* compilation,
+                                             int32_t preference) __INTRODUCED_IN(27);
+
+/**
+ * Indicate that we have finished modifying a compilation. Required before
+ * calling {@link ANeuralNetworksExecution_create}.
+ *
+ * An application is responsible to make sure that no other thread uses
+ * the compilation at the same time.
+ *
+ * This function must only be called once for a given compilation.
+ *
+ * See {@link ANeuralNetworksCompilation} for information on multithreaded usage.
+ *
+ * Available since API level 27.
+ *
+ * @param compilation The compilation to be finished.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+int ANeuralNetworksCompilation_finish(ANeuralNetworksCompilation* compilation) __INTRODUCED_IN(27);
+
+/**
+ * Create a {@link ANeuralNetworksExecution} to apply the given compilation.
+ * This only creates the object. Computation is only performed once
+ * {@link ANeuralNetworksExecution_compute} or
+ * {@link ANeuralNetworksExecution_startCompute} is invoked.
+ *
+ * <p>The provided compilation must outlive the execution.</p>
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * Available since API level 27.
+ *
+ * @param compilation The {@link ANeuralNetworksCompilation} to be evaluated.
+ * @param execution The newly created object or NULL if unsuccessful.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA
+ *         if the compilation is invalid.
+ */
+int ANeuralNetworksExecution_create(ANeuralNetworksCompilation* compilation,
+                                    ANeuralNetworksExecution** execution) __INTRODUCED_IN(27);
+
+/**
+ * Destroy an execution.
+ *
+ * <p>If called on an execution for which
+ * {@link ANeuralNetworksExecution_startCompute} has been called, the
+ * function will return immediately but will mark the execution to be deleted
+ * once the computation completes. The related {@link ANeuralNetworksEvent}
+ * will be signaled and the {@link ANeuralNetworksEvent_wait} will return
+ * ANEURALNETWORKS_ERROR_DELETED.
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * Available since API level 27.
+ *
+ * @param execution The execution to be destroyed. Passing NULL is acceptable and
+ *                  results in no operation.
+ */
+void ANeuralNetworksExecution_free(ANeuralNetworksExecution* execution) __INTRODUCED_IN(27);
+
+/**
+ * Associate a user buffer with an input of the model of the
+ * {@link ANeuralNetworksExecution}. Evaluation of the execution must not have
+ * been scheduled.
+ *
+ * <p>The provided buffer must outlive the execution.</p>
+ *
+ * If the input is optional, you can indicate that it is omitted by
+ * passing nullptr for buffer and 0 for length.
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * Available since API level 27.
+ *
+ * @param execution The execution to be modified.
+ * @param index The index of the input argument we are setting. It is
+ *              an index into the lists passed to
+ *              {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not
+ *              the index associated with
+ *              {@link ANeuralNetworksModel_addOperand}.
+ * @param type The {@link ANeuralNetworksOperandType} of the
+ *             operand. Unless the input is omitted, this should be
+ *             used to specify the dimensions that were left
+ *             unspecified when the operand was added to the
+ *             model. All other properties of the type must be the
+ *             same as specified in the model. If the type is the same
+ *             as specified when the model was built, NULL can be
+ *             passed. Neither the {@link ANeuralNetworksOperandType}
+ *             nor the dimensions it points to need to outlive the call
+ *             to {@link ANeuralNetworksExecution_setInput}.
+ * @param buffer The buffer containing the data.
+ * @param length The length in bytes of the buffer.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA if the
+ *         name is not recognized or the buffer is too small for the input.
+ */
+int ANeuralNetworksExecution_setInput(ANeuralNetworksExecution* execution, int32_t index,
+                                      const ANeuralNetworksOperandType* type, const void* buffer,
+                                      size_t length) __INTRODUCED_IN(27);
+
+/**
+ * Associate part of a memory object with an input of the model of the
+ * {@link ANeuralNetworksExecution}. Evaluation of the execution must not have
+ * been scheduled.
+ *
+ * <p>The provided memory must outlive the execution.</p>
+ *
+ * If the input is optional, you can indicate that it is omitted by
+ * using {@link ANeuralNetworksExecution_setInput} instead, passing nullptr for
+ * buffer and 0 for length.
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ * See {@link ANeuralNetworksMemory_createFromAHardwarBuffer} for information on
+ * AHardwareBuffer usage.
+ *
+ * Available since API level 27.
+ *
+ * @param execution The execution to be modified.
+ * @param index The index of the input argument we are setting. It is
+ *              an index into the lists passed to
+ *              {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not
+ *              the index associated with {@link ANeuralNetworksModel_addOperand}.
+ * @param type The {@link ANeuralNetworksOperandType} of the
+ *             operand. This should be used to specify the dimensions
+ *             that were left unspecified when the operand was added
+ *             to the model. All other properties of the type must be
+ *             the same as specified in the model. If the type is the
+ *             same as specified when the model was built, NULL can be
+ *             passed. Neither the {@link ANeuralNetworksOperandType}
+ *             nor the dimensions it points to need to outlive the call
+ *             to {@link ANeuralNetworksExecution_setInputFromMemory}.
+ * @param memory The memory containing the data.
+ * @param offset This specifies the location of the data within the memory.
+ *               The offset is in bytes from the start of memory.
+ * @param length The size in bytes of the data value.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA if the
+ *         name is not recognized or the buffer is too small for the input.
+ */
+int ANeuralNetworksExecution_setInputFromMemory(ANeuralNetworksExecution* execution, int32_t index,
+                                                const ANeuralNetworksOperandType* type,
+                                                const ANeuralNetworksMemory* memory, size_t offset,
+                                                size_t length) __INTRODUCED_IN(27);
+
+/**
+ * Associate a user buffer with an output of the model of the
+ * {@link ANeuralNetworksExecution}. Evaluation of the execution must not have
+ * been scheduled.
+ *
+ * If the output is optional, you can indicate that it is omitted by
+ * passing nullptr for buffer and 0 for length.
+ *
+ * <p>The provided buffer must outlive the execution.</p>
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * Available since API level 27.
+ *
+ * @param execution The execution to be modified.
+ * @param index The index of the output argument we are setting. It is
+ *              an index into the lists passed to
+ *              {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not
+ *              the index associated with {@link ANeuralNetworksModel_addOperand}.
+ * @param type The {@link ANeuralNetworksOperandType} of the
+ *             operand. Unless the output is omitted, this should be
+ *             used to specify the dimensions that were left
+ *             unspecified when the operand was added to the
+ *             model. All other properties of the type must be the
+ *             same as specified in the model. If the type is the same
+ *             as specified when the model was built, NULL can be
+ *             passed. Neither the {@link ANeuralNetworksOperandType}
+ *             nor the dimensions it points to need to outlive the call
+ *             to {@link ANeuralNetworksExecution_setOutput}.
+ *             Since API level 29, the output operand can have unspecified
+ *             dimensions or rank to be deduced dynamically during the execution.
+ *             However, the user must provide a large enough buffer. The user
+ *             can retrieve the output dimensional information after the execution
+ *             by {@link ANeuralNetworksExecution_getOutputOperandRank} and
+ *             {@link ANeuralNetworksExecution_getOutputOperandDimensions}.
+ * @param buffer The buffer where the data is to be written.
+ * @param length The length in bytes of the buffer.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA if the
+ *         name is not recognized or the buffer is too small for the output.
+ */
+int ANeuralNetworksExecution_setOutput(ANeuralNetworksExecution* execution, int32_t index,
+                                       const ANeuralNetworksOperandType* type, void* buffer,
+                                       size_t length) __INTRODUCED_IN(27);
+
+/**
+ * Associate part of a memory object with an output of the model of the
+ * {@link ANeuralNetworksExecution}. Evaluation of the execution must not have
+ * been scheduled.
+ *
+ * If the output is optional, you can indicate that it is omitted by
+ * using {@link ANeuralNetworksExecution_setOutput} instead, passing nullptr for
+ * buffer and 0 for length.
+ *
+ * <p>The provided memory must outlive the execution.</p>
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ * See {@link ANeuralNetworksMemory_createFromAHardwarBuffer} for information on
+ * AHardwareBuffer usage.
+ *
+ * Available since API level 27.
+ *
+ * @param execution The execution to be modified.
+ * @param index The index of the output argument we are setting. It is
+ *              an index into the lists passed to
+ *              {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not
+ *              the index associated with {@link ANeuralNetworksModel_addOperand}.
+ * @param type The {@link ANeuralNetworksOperandType} of the operand. This should be
+ *             used to specify the dimensions that were left
+ *             unspecified when the operand was added to the
+ *             model. All other properties of the type must be the
+ *             same as specified in the model. If the type is the same
+ *             as specified when the model was built, NULL can be
+ *             passed. Neither the {@link ANeuralNetworksOperandType}
+ *             nor the dimensions it points to need to outlive the call
+ *             to {@link ANeuralNetworksExecution_setOutputFromMemory}.
+ *             Since API level 29, the output operand can have unspecified
+ *             dimensions or rank to be deduced dynamically during the execution.
+ *             However, the user must provide a large enough memory. The user
+ *             can retrieve the output dimensional information after the execution
+ *             by {@link ANeuralNetworksExecution_getOutputOperandRank} and
+ *             {@link ANeuralNetworksExecution_getOutputOperandDimensions}.
+ * @param memory The memory where the data is to be stored.
+ * @param offset This specifies the location of the data within the memory.
+ *               The offset is in bytes from the start of memory.
+ * @param length The length in bytes of the data value.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA if the
+ *         name is not recognized or the buffer is too small for the output.
+ */
+int ANeuralNetworksExecution_setOutputFromMemory(ANeuralNetworksExecution* execution, int32_t index,
+                                                 const ANeuralNetworksOperandType* type,
+                                                 const ANeuralNetworksMemory* memory, size_t offset,
+                                                 size_t length) __INTRODUCED_IN(27);
+
+/**
+ * Schedule asynchronous evaluation of the execution.
+ *
+ * <p>Schedules asynchronous evaluation of the execution. Once the model has
+ * been applied and the outputs are ready to be consumed, the returned event
+ * will be signaled. Use {@link ANeuralNetworksEvent_wait} to wait for that
+ * event.
+ * </p>
+ *
+ * ANeuralNetworksEvent_wait must be called to recuperate the resources used
+ * by the execution.
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * See {@link ANeuralNetworksExecution_compute} for synchronous execution.
+ * Synchronous execution incurs lower overhead than asynchronous execution.
+ *
+ * Available since API level 27.
+ *
+ * @param execution The execution to be scheduled and executed.
+ * @param event The event that will be signaled on completion. event is set to
+ *              NULL if there's an error.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+int ANeuralNetworksExecution_startCompute(ANeuralNetworksExecution* execution,
+                                          ANeuralNetworksEvent** event) __INTRODUCED_IN(27);
+
+/**
+ * Waits until the execution completes.
+ *
+ * More than one thread can wait on an event. When the execution completes,
+ * all threads will be released.
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * Available since API level 27.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if the execution completed normally.
+ *         ANEURALNETWORKS_UNMAPPABLE if the execution input or output memory cannot
+ *         be properly mapped.
+ */
+int ANeuralNetworksEvent_wait(ANeuralNetworksEvent* event) __INTRODUCED_IN(27);
+
+/**
+ * Destroys the event.
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * Available since API level 27.
+ */
+void ANeuralNetworksEvent_free(ANeuralNetworksEvent* event) __INTRODUCED_IN(27);
+
+#endif  // __ANDROID_API__ >= 27
+
+__END_DECLS
+
+#endif  // ANDROID_ML_NN_RUNTIME_NEURAL_NETWORKS_H
+
+/** @} */
diff --git a/runtimes/include/NeuralNetworksEx.h b/runtimes/include/NeuralNetworksEx.h
new file mode 100644
index 000000000..601bb2cf7
--- /dev/null
+++ b/runtimes/include/NeuralNetworksEx.h
@@ -0,0 +1,747 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     NeuralNetworksEx.h
+ * @brief    This file contains ANeuralNetworksModel_addOperationEx function definition
+ * @note     This header describes experimental feature,
+ *           so specification here can be changed or/and removed
+ */
+#ifndef NN_RUNTIME_NEURAL_NETWORKS_EX_H
+#define NN_RUNTIME_NEURAL_NETWORKS_EX_H
+
+#include <sys/cdefs.h>
+
+__BEGIN_DECLS
+
+/**
+ * @brief Extended operation types
+ */
+typedef enum {
+  /** extends operation. */
+
+  /**
+   * Casts a tensor/tensor-values to a new type
+   *
+   * The output value is calucated as:
+   *
+   *     output =  new_type(input)
+   *
+   * Ex:
+   * X = {1.8,2.2}, dtype of X = float32
+   * Y = Cast(X), dtype of Y = int32
+   * then Y = {1,2}
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   * * {@link ANEURALNETWORKS_TENSOR_INT32}
+   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *
+   * Supported tensor rank: up to 4
+   *
+   * Inputs:
+   * * 0: An n-D tensor, specifying the first input.
+   *
+   * Outputs:
+   * * 0: The output tensor, of the same {@link OperandCode} and shape as input0.
+   */
+  ANEURALNETWORKS_CAST_EX = 50000,
+
+  /**
+   * Gathers values along an axis.
+   *
+   * Produces an output tensor with shape
+   *     input0.dimension[:axis] + indices.dimension + input0.dimension[axis + 1:]
+   * where:
+   *     # Vector indices (output is rank(input0)).
+   *     output[a_0, ..., a_n, i, b_0, ..., b_n] =
+   *       input0[a_0, ..., a_n, indices[i], b_0, ..., b_n]
+   *
+   *     # Higher rank indices (output is rank(input0) + rank(indices) - 1).
+   *     output[a_0, ..., a_n, i, ..., j, b_0, ... b_n] =
+   *       input0[a_0, ..., a_n, indices[i, ..., j], b_0, ..., b_n]
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   * * {@link ANEURALNETWORKS_TENSOR_INT32}
+   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *
+   * Supported tensor rank: from 1
+   *
+   * Inputs:
+   * * 0: An n-D tensor from which to gather values.
+   * * 1: A k-D tensor {@link ANEURALNETWORKS_TENSOR_INT32} of indices.
+   *      The values must be in the bounds of the corresponding dimensions
+   *      of input0.
+   * * 2: An {@link ANEURALNETWORKS_INT32} scalar specifying the axis.
+   *      Negative index is used to specify axis from the end
+   *      (e.g. -1 for the last axis). Must be in the range [-n, n).
+   *
+   * Outputs:
+   * * 0: An (n + k - 1)-D tensor with the same {@link OperandCode} as input0.
+   */
+  ANEURALNETWORKS_GATHER_EX = 50001, /**< Gather slices according to indexes and axis */
+
+  /**
+   * Finds values and indices of the k largest entries for the last dimension.
+   *
+   * Resulting values in each dimensions are sorted in descending order. If
+   * two values are equal, the one with larger index appears first.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   * * {@link ANEURALNETWORKS_TENSOR_INT32}
+   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *
+   * Supported tensor rank: from 1
+   *
+   * Inputs:
+   * * 0: input, an n-D tensor specifying the input.
+   * * 1: k, an {@link ANEURALNETWORKS_INT32} scalar, specifying the number of
+   *      top elements to look for along the last dimension.
+   *
+   * Outputs:
+   * * 0: An n-D tensor of the same type as the input, containing the k
+   *      largest elements along each last dimensional slice.
+   * * 1: An n-D tensor of type {@link ANEURALNETWORKS_TENSOR_INT32}
+   *      containing the indices of values within the last dimension of input.
+   */
+  ANEURALNETWORKS_TOPK_V2_EX = 50002,
+
+  /**
+   * Computes the maximum of elements across dimensions of a tensor.
+   *
+   * Reduces the input tensor along the given dimensions to reduce.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   * * {@link ANEURALNETWORKS_TENSOR_INT32}
+   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *
+   * Supported tensor rank: up to 4
+   *
+   * Inputs:
+   * * 0: A tensor, specifying the input.
+   * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The dimensions
+   *      to reduce.
+   *
+   * Outputs:
+   * * 0: A tensor of the same {@link OperandCode} as input0.
+   */
+  ANEURALNETWORKS_REDUCE_MAX_EX = 50003,
+
+  /**
+   * Splits a tensor along a given axis into num_splits subtensors.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   * * {@link ANEURALNETWORKS_TENSOR_INT32}
+   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *
+   * Supported tensor rank: from 1
+   *
+   * Inputs:
+   * * 0: An n-D tensor to split.
+   * * 1: An {@link ANEURALNETWORKS_INT32} scalar specifying the axis along
+   *      which to split.
+   * * 2: An {@link ANEURALNETWORKS_INT32} scalar indicating the number of
+   *      splits along given axis. Must evenly divide axis size.
+   *
+   * Outputs:
+   * * 0 ~ (num_splits - 1): Resulting subtensors.
+   */
+  ANEURALNETWORKS_SPLIT_EX = 50004, /**< Splits a tensor into sub tensors */
+
+  /**
+   * Computes element-wise reciprocal of square root of the input tensor.
+   *
+   * The output is calculated using this formula:
+   *
+   *      output = 1/sqrt(input)
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   *
+   * Supported tensor rank: up to 4
+   *
+   * Inputs:
+   * * 0: An n-D tensor, specifying the first input.
+   *
+   * Outputs:
+   * * 0: The output tensor, of the same {@link OperandCode} and shape as input0.
+   */
+  ANEURALNETWORKS_RSQRT_EX = 50005,
+
+  /**
+   * Computes element-wise squared difference on the input tensors.
+   *
+   * Takes two input tensors of identical {@link OperandCode} and compatible dimensions.
+   * The output is the result of squaring of difference given by subtracting the second input tensor
+   * from the first one.
+   *
+   * Two dimensions are compatible when:
+   *     1. they are equal, or
+   *     2. one of them is 1
+   *
+   * The size of the output is the maximum size along each dimension of the
+   * input operands. It starts with the trailing dimensions, and works its way
+   * forward.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   *
+   * Supported tensor rank: up to 4
+   *
+   * Inputs:
+   * * 0: An n-D tensor, specifying the first input.
+   * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
+   *      as input0.
+   *
+   * Outputs:
+   * * 0: The output tensor, of the same {@link OperandCode} as input0.
+   */
+  ANEURALNETWORKS_SQUARED_DIFFERENCE_EX = 50006,
+
+  /**
+   * Computes numerical negative value element-wise on the input tensor.
+   *
+   * Given an input tensor of {@link OperandCode},
+   * The output is the numerical negative value element-wise on the input tensor.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   * * {@link ANEURALNETWORKS_TENSOR_INT32}
+   *
+   * Supported tensor rank: up to 4
+   *
+   * Inputs:
+   * * 0: An n-D tensor, specifying the input.
+   *
+   * Outputs:
+   * * 0: The output tensor, of the same {@link OperandCode} and shape as input0.
+   */
+  ANEURALNETWORKS_NEG_EX = 50007,
+
+  /**
+   * Computes exponential value element-wise on the input tensor.
+   *
+   * Given an input tensor of {@link OperandCode},
+   * The output is the exponential value element-wise on the input tensor.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   *
+   * Supported tensor rank: up to 4
+   *
+   * Inputs:
+   * * 0: An n-D tensor, specifying the input.
+   *
+   * Outputs:
+   * * 0: The output tensor, of the same {@link OperandCode} and shape as input0.
+   */
+  ANEURALNETWORKS_EXP_EX = 50008,
+
+  /**
+   * Computes the sum of elements across dimensions of a tensor.
+   *
+   * Reduces the input tensor along the given dimensions to reduce.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   *
+   * Supported tensor rank: up to 4
+   *
+   * Inputs:
+   * * 0: A tensor, specifying the input.
+   * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The dimensions
+   *      to reduce.
+   *
+   * Outputs:
+   * * 0: A tensor of the same {@link OperandCode} as input0.
+   */
+  ANEURALNETWORKS_REDUCE_SUM_EX = 50009,
+
+  /**
+   * A transposed convolutional layer carries out a regular convolution
+   * but reverts its spatial transformation.
+   * Transpose convolution basically performs convolution with transposed weights.
+   *
+   * Supported tensor {@link OperandCode}:
+   * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *
+   * Supported tensor rank: only 4
+   *
+   * Inputs:
+   *   0: An {@link ANEURALNETWORKS_INT32} 1-D four element tensor, specifying the output shape.
+   *   1: A 4-D tensor, of shape [depth_out, filter_height, filter_width, depth_in],
+   *      specifying the filter.
+   *   2: A 4-D tensor, of shape [batches, height, width, depth_in], specifying the input.
+   *   3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding type.
+   *   4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+   *      walking through input in the ‘width’ dimension.
+   *   5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when
+   *      walking through input in the height dimension.
+   *
+   * Outputs:
+   *   0: The output 4-D tensor, of shape [batches, out_height, out_width, depth_out].
+   */
+  ANEURALNETWORKS_TRANSPOSE_CONV_EX = 50010,
+
+  /**
+   * Computes element-wise truth value by comparing the two input tensors for equality.
+   *
+   * Takes two input tensors of identical {@link OperandCode} and compatible dimensions.
+   * The output is the result of comparison of two input tensors.
+   *
+   * Two dimensions are compatible when:
+   *     1. they are equal, or
+   *     2. one of them is 1
+   *
+   * The size of the output is the maximum size along each dimension of the
+   * input operands. It starts with the trailing dimensions, and works its way
+   * forward.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   * * {@link ANEURALNETWORKS_TENSOR_INT32}
+   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *
+   * Supported tensor rank: up to 4
+   *
+   * Inputs:
+   * * 0: An n-D tensor, specifying the first input.
+   * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
+   *      as input0.
+   *
+   * Outputs:
+   * * 0: A boolean tensor indicating the truth value of (x == y)
+   *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
+   *      and scale 1.0f.
+   *      A non-zero byte represents True, a hit. A zero indicates otherwise.
+   */
+  ANEURALNETWORKS_EQUAL_EX = 50011,
+
+  /**
+   * Computes element-wise absolute value of the input tensor.
+   *
+   * The output is calculated using this formula:
+   *
+   *      output = fabs(input)
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   * * {@link ANEURALNETWORKS_TENSOR_INT32}
+   *
+   * Supported tensor rank: up to 4
+   *
+   * Inputs:
+   * * 0: An n-D tensor, specifying the first input.
+   *
+   * Outputs:
+   * * 0: The output tensor, of the same {@link OperandCode} and shape as input0.
+   */
+  ANEURALNETWORKS_ABS_EX = 50012,
+  /**
+   * Packs a list of rank-R tensors into one rank- (R+1) tensor along the axis dimension.
+   *
+   * The input tensors must have identical {@link OperandCode} and the same
+   * dimensions.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   * * {@link ANEURALNETWORKS_TENSOR_INT32}
+   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *
+   * Supported tensor rank: up to 3
+   *
+   * Inputs:
+   * * 0 ~ n-1: The list of n input tensors, of shape
+   *            [D0, D1, ..., Daxis(i), ..., Dm]. For inputs of
+   *            {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, all input tensors
+   *            must have the same scale and zeroPoint.
+   * * n: An {@link ANEURALNETWORKS_INT32} scalar, specifying the
+   *      number of input tensors.
+   * * n+1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the
+   *        pack axis.
+   *
+   * Outputs:
+   * * 0: The output, a tensor of the same {@link OperandCode} as the input
+   *      tensors. The output shape is [D0, D1, ..., N at Daxis(i), ..., Dm+1]
+   *      where N is the number of tensors to be packed.
+   */
+  ANEURALNETWORKS_PACK_EX = 50013,
+  /**
+   * Unpacks a given rank-R tensors into num_splits rank- (R-1) tensors along the axis dimension.
+   * num_splits has to respect integral divisibility of dimension value along axis dimension
+   * of the input.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   * * {@link ANEURALNETWORKS_TENSOR_INT32}
+   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *
+   * Supported tensor rank: up to 4
+   *
+   * Inputs:
+   * * 0: The input shape is [D0, D1, ..., N at Daxis(i), ..., Dm+1].
+   * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the
+   *      number of splits along unpack axis.
+   * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the
+   *      unpack axis.
+   *
+   * Outputs:
+   * * 0 ~ n-1: The list of n output tensors, of shape
+   *            [D0, D1, ..., Daxis(i), ..., Dm]. The output tensors are of the same
+   *            {@link OperandCode} as the input tensor 0.
+   */
+  ANEURALNETWORKS_UNPACK_EX = 50014,
+
+  /**
+   * Returns the index of the largest element along an axis.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   * * {@link ANEURALNETWORKS_TENSOR_INT32}
+   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *
+   * Supported tensor rank: from 1
+   *
+   * Inputs:
+   * * 0: An n-D tensor, specifying the input.
+   * * 1: An {@link ANEURALNETWORKS_INT32} scalar specifying the axis to
+   *      reduce across. Negative index is used to specify axis from the
+   *      end (e.g. -1 for the last axis). Must be in the range [-n, n).
+   *
+   * Outputs:
+   * * 0: An (n - 1)-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor.
+   */
+  ANEURALNETWORKS_ARGMAX_EX = 50015,
+
+  /**
+   * Element-wise square root computation of the input tensor.
+   *
+   * The output is calculated using this formula:
+   *
+   *     output = sqrt(input)
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   *
+   * Supported tensor rank: up to 4
+   *
+   * Inputs:
+   * * 0: An n-D tensor, specifying the first input.
+   *
+   * Outputs:
+   * * 0: The output tensor, of the same {@link OperandCode} and shape as input0.
+   */
+  ANEURALNETWORKS_SQRT_EX = 50016,
+
+  /**
+  * Computes element-wise truth value by comparing the input tensors for non-equality.
+  *
+  * Takes two input tensors of identical {@link OperandCode} and compatible dimensions.
+  * The output is the result of comparison of two input tensors.
+  *
+  * Two dimensions are compatible when:
+  *     1. they are equal, or
+  *     2. one of them is 1
+  *
+  * The size of the output is the maximum size along each dimension of the
+  * input operands. It starts with the trailing dimensions, and works its way
+  * forward.
+  *
+  * Supported tensor {@link OperandCode}:
+  * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+  * * {@link ANEURALNETWORKS_TENSOR_INT32}
+  * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+  *
+  * Supported tensor rank: up to 4
+  *
+  * Inputs:
+  * * 0: An n-D tensor, specifying the first input.
+  * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
+  *      as input0.
+  *
+  * Outputs:
+  * * 0: A boolean tensor indicating the truth value of non-equality of input tensors
+  *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
+  *      and scale 1.0f.
+  *      A non-zero byte represents True, a hit. A zero indicates otherwise.
+  */
+  ANEURALNETWORKS_NOT_EQUAL_EX = 50017,
+
+  /**
+   * Computes element-wise truth value of the input tensor negation.
+   *
+   * Takes one input tensor.
+   * The output is the negation, which is logical complement, of the input tensor.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *
+   * Supported tensor rank: up to 4
+   *
+   * Inputs:
+   * * 0: An n-D boolean tensor, specifying the input.
+   *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
+   *      and scale 1.0f.
+   *      A non-zero byte represents True. A zero indicates otherwise.
+   *
+   * Outputs:
+   * * 0: A boolean tensor of the same size as input indicating the truth value of (NOT x)
+   *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
+   *      and scale 1.0f.
+   *      A non-zero byte represents True. A zero indicates otherwise.
+   */
+  ANEURALNETWORKS_LOGICAL_NOT_EX = 50018,
+
+  /**
+   * Computes element-wise truth value of two input tensors for LOGICAL AND.
+   *
+   * Takes two input tensors of identical {@link OperandCode} and compatible dimensions.
+   * The output is the result of comparison of two input tensors.
+   *
+   * Two dimensions are compatible when:
+   *     1. they are equal, or
+   *     2. one of them is 1
+   *
+   * The size of the output is the maximum size along each dimension of the
+   * input operands. It starts with the trailing dimensions, and works its way
+   * forward.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *
+   * Supported tensor rank: up to 4
+   *
+   * Inputs:
+   * * 0: An n-D boolean tensor, specifying the first input.
+   *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
+   *      and scale 1.0f.
+   *      A non-zero byte represents True, a hit. A zero indicates otherwise.
+   * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
+   *      as input0.
+   *
+   * Outputs:
+   * * 0: A boolean tensor indicating the truth value of two input tensors for LOGICAL AND.
+   *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
+   *      and scale 1.0f.
+   *      A non-zero byte represents True, a hit. A zero indicates otherwise.
+   */
+  ANEURALNETWORKS_LOGICAL_AND_EX = 50019,
+
+  /**
+   * Computes element-wise truth value of two input tensors for LOGICAL OR.
+   *
+   * Takes two input tensors of identical {@link OperandCode} and compatible dimensions.
+   * The output is the result of comparison of two input tensors.
+   *
+   * Two dimensions are compatible when:
+   *     1. they are equal, or
+   *     2. one of them is 1
+   *
+   * The size of the output is the maximum size along each dimension of the
+   * input operands. It starts with the trailing dimensions, and works its way
+   * forward.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *
+   * Supported tensor rank: up to 4
+   *
+   * Inputs:
+   * * 0: An n-D boolean tensor, specifying the first input.
+   *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
+   *      and scale 1.0f.
+   *      A non-zero byte represents True, a hit. A zero indicates otherwise.
+   * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
+   *      as input0.
+   *
+   * Outputs:
+   * * 0: A boolean tensor indicating the truth value of two input tensors for LOGICAL OR.
+   *      Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0
+   *      and scale 1.0f.
+   *      A non-zero byte represents True, a hit. A zero indicates otherwise.
+   */
+  ANEURALNETWORKS_LOGICAL_OR_EX = 50020,
+
+  /**
+   * Computes the minimum of elements across dimensions of a tensor.
+   *
+   * Reduces the input tensor along the given dimensions to reduce.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   * * {@link ANEURALNETWORKS_TENSOR_INT32}
+   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *
+   * Supported tensor rank: up to 4
+   *
+   * Inputs:
+   * * 0: A tensor, specifying the input.
+   * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The dimensions
+   *      to reduce.
+   *
+   * Outputs:
+   * * 0: A tensor of the same {@link OperandCode} as input0.
+   */
+  ANEURALNETWORKS_REDUCE_MIN_EX = 50021,
+
+  /**
+   * Parametric Rectified Linear Unit.
+   *
+   * It follows: f(x) = alpha * x for x < 0, f(x) = x for x >= 0, where alpha
+   * is a learned array with the same {@link OperandCode} and compatible
+   * dimensions as input x.
+   *
+   * Two dimensions are compatible when:
+   *     1. they are equal, or
+   *     2. one of them is 1
+   *
+   * The size of the output is the maximum size along each dimension of the
+   * input operands. It starts with the trailing dimensions, and works its way
+   * forward.
+   *
+   * Example:
+   *     input.dimension  =    {4, 1, 2}
+   *     alpha.dimension  = {5, 4, 3, 1}
+   *     output.dimension = {5, 4, 3, 2}
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *
+   * Supported tensor rank: up to 4
+   *
+   * Inputs:
+   * * 0: A tensor, specifying the input.
+   * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions
+   *      as input0, specifying the alpha.
+   *
+   * Outputs:
+   * * 0: A tensor of the same {@link OperandCode} as input0.
+   */
+  ANEURALNETWORKS_PRELU_EX = 50022,
+
+  /**
+   * Returns a one-hot tensor.
+   *
+   * The locations represented by indices in indices take value on_value, while all other locations
+   * take value off_value.
+   * The on_value and off_value must have matching data types. They must be the same data type as
+   * specified by the data type of output.
+   *
+   * If the input indices is rank N, the output will have rank N+1. The new axis is created at
+   * dimension axis.
+   * If indices is a scalar the output shape will be a vector of length depth.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   * * {@link ANEURALNETWORKS_TENSOR_INT32}
+   *
+   * Supported tensor rank: up to 4
+   *
+   * Inputs:
+   * * 0: An {@link ANEURALNETWORKS_INT32} tensor, specifying the indices.
+   * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the depth.
+   * * 2: A scalar, specifying the on_value.
+   * * 3: A scalar, specifying the off_value.
+   * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the axis to fill. Optional.
+   *      (default: -1, a new inner-most axis).
+   *
+   * Outputs:
+   * * 0: The one-hot tensor.
+   */
+  ANEURALNETWORKS_ONE_HOT_EX = 50023,
+
+  /**
+   * For input tensors x and y, computes x >= y elementwise.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   * * {@link ANEURALNETWORKS_TENSOR_INT32}
+   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *
+   * Supported tensor rank: from 1
+   *
+   * This operation supports broadcasting.
+   *
+   * Inputs:
+   * * 0: A tensor.
+   * * 1: A tensor of the same {@link OperandCode} and dimensions compatible
+   *      with input0.
+   *
+   * Outputs:
+   * * 0: A boolean tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *      with offset 0 and scale 1.0f.
+   */
+  ANEURALNETWORKS_GREATER_EQUAL_EX = 50024,
+
+  /**
+   * For input tensors x and y, computes x < y elementwise.
+   *
+   * Supported tensor {@link OperandCode}:
+   * * {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+   * * {@link ANEURALNETWORKS_TENSOR_INT32}
+   * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *
+   * Supported tensor rank: from 1
+   *
+   * This operation supports broadcasting.
+   *
+   * Inputs:
+   * * 0: A tensor.
+   * * 1: A tensor of the same {@link OperandCode} and dimensions compatible
+   *      with input0.
+   *
+   * Outputs:
+   * * 0: A tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}
+   *      with offset 0 and scale 1.0f.
+   */
+  ANEURALNETWORKS_LESS_EX = 50025,
+} OperationCodeEx; // extends OperationCode
+
+typedef OperationCodeEx ANeuralNetworksOperationTypeEx;
+
+/**
+ * @brief Add an extended operation to a model.
+ *
+ * @param[in] model The model to be modified.
+ * @param[in] type The type of extended operation.
+ * @param[in] inputCount The number of entries in the inputs array.
+ * @param[in] inputs An array of indexes identifying each operand.
+ * @param[in] outputCount The number of entries in the outputs array.
+ * @param[in] outputs An array of indexes identifying each operand.
+ *
+ * @note The operands specified by inputs and outputs must have been
+ *       previously added by calls to {@link ANeuralNetworksModel_addOperand}.\n
+ *       Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been
+ *       called will return an error.\n
+ *       See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+int ANeuralNetworksModel_addOperationEx(ANeuralNetworksModel *model,
+                                        ANeuralNetworksOperationTypeEx type, uint32_t inputCount,
+                                        const uint32_t *inputs, uint32_t outputCount,
+                                        const uint32_t *outputs);
+
+__END_DECLS
+
+#endif // NN_RUNTIME_NEURAL_NETWORKS_EX_H
diff --git a/runtimes/include/NeuralNetworksExtensions.h b/runtimes/include/NeuralNetworksExtensions.h
new file mode 100644
index 000000000..ca2e04567
--- /dev/null
+++ b/runtimes/include/NeuralNetworksExtensions.h
@@ -0,0 +1,117 @@
+/*
+ * Copyright (C) 2019 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef ANDROID_ML_NN_RUNTIME_NEURAL_NETWORKS_EXTENSIONS_H
+#define ANDROID_ML_NN_RUNTIME_NEURAL_NETWORKS_EXTENSIONS_H
+
+#include "NeuralNetworks.h"
+
+/******************************************************************
+ *
+ * IMPORTANT NOTICE:
+ *
+ *   This file is not intended for use by general developers -- only
+ *   by OEM applications.
+ *
+ *   Extensions source AND binary code relies on the definitions
+ *   here to be FROZEN ON ALL UPCOMING PLATFORM RELEASES.
+ *
+ *   - DO NOT MODIFY ENUMS (EXCEPT IF YOU ADD NEW 32-BIT VALUES)
+ *   - DO NOT MODIFY CONSTANTS OR FUNCTIONAL MACROS
+ *   - DO NOT CHANGE THE SIGNATURE OF FUNCTIONS IN ANY WAY
+ *   - DO NOT CHANGE THE LAYOUT OR SIZE OF STRUCTURES
+ */
+
+__BEGIN_DECLS
+
+#if __ANDROID_API__ >= __ANDROID_API_Q__
+
+/**
+ * Queries whether an extension is supported by the driver implementation of the specified device.
+ *
+ * @param device The representation of the specified device.
+ * @param extension The extension name.
+ * @param isExtensionSupported The boolean value indicating whether the extension is supported.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ *
+ * Available since API level 29.
+ */
+int ANeuralNetworksDevice_getExtensionSupport(const ANeuralNetworksDevice* device,
+                                              const char* extensionName, bool* isExtensionSupported)
+        __INTRODUCED_IN(29);
+
+/**
+ * Creates an operand type from an extension name and an extension operand code.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ *
+ * Available since API level 29.
+ *
+ * @param model The model to contain the operand.
+ * @param extensionName The extension name.
+ * @param operandCodeWithinExtension The extension operand code.
+ * @param type The operand type.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+int ANeuralNetworksModel_getExtensionOperandType(ANeuralNetworksModel* model,
+                                                 const char* extensionName,
+                                                 uint16_t operandCodeWithinExtension, int32_t* type)
+        __INTRODUCED_IN(29);
+
+/**
+ * Creates an operation type from an extension name and an extension operation code.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ *
+ * Available since API level 29.
+ *
+ * @param model The model to contain the operation.
+ * @param extensionName The extension name.
+ * @param operationCodeWithinExtension The extension operation code.
+ * @param type The operation type.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+int ANeuralNetworksModel_getExtensionOperationType(ANeuralNetworksModel* model,
+                                                   const char* extensionName,
+                                                   uint16_t operationCodeWithinExtension,
+                                                   ANeuralNetworksOperationType* type)
+        __INTRODUCED_IN(29);
+
+/**
+ * Sets extension operand parameters.
+ *
+ * Available since API level 29.
+ *
+ * @param model The model to be modified.
+ * @param index The index of the model operand we're setting.
+ * @param data A pointer to the extension operand data.
+ *             The data does not have to outlive the call to this function.
+ * @param length The size in bytes of the data value.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+int ANeuralNetworksModel_setOperandExtensionData(ANeuralNetworksModel* model, int32_t index,
+                                                 const void* data, size_t length)
+        __INTRODUCED_IN(29);
+
+#endif  // __ANDROID_API__ >= __ANDROID_API_Q__
+
+__END_DECLS
+
+#endif  // ANDROID_ML_NN_RUNTIME_NEURAL_NETWORKS_EXTENSIONS_H
diff --git a/runtimes/include/nnfw.h b/runtimes/include/nnfw.h
new file mode 100644
index 000000000..456781e70
--- /dev/null
+++ b/runtimes/include/nnfw.h
@@ -0,0 +1,200 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_H__
+#define __NNFW_H__
+
+#include <stddef.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct nnfw_session nnfw_session;
+typedef struct nnfw_tensorinfo nnfw_tensorinfo;
+
+typedef enum {
+  NNFW_TYPE_TENSOR_FLOAT32 = 0,
+  NNFW_TYPE_TENSOR_INT32 = 1,
+  /**
+   * A tensor of 8 bit integers that represent real numbers.
+   *
+   * real_value = (integer_value - zeroPoint) * scale.
+   */
+  NNFW_TYPE_TENSOR_QUANT8_ASYMM = 2,
+  NNFW_TYPE_TENSOR_BOOL = 3,
+} NNFW_TYPE;
+
+/**
+ * Result Values
+ */
+typedef enum {
+  NNFW_STATUS_NO_ERROR = 0,
+  NNFW_STATUS_ERROR = 1,
+} NNFW_STATUS;
+
+/**
+ * tensor_info
+ */
+struct nnfw_tensorinfo
+{
+  NNFW_TYPE dtype;
+  int rank;
+  int dims[6]; // MAX rank is 6
+};
+
+/*
+ * Create a new session instance
+ *
+ * @param[out] session the session to be created
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_create_session(nnfw_session **session);
+
+/*
+ * Close a session instance
+ *
+ * @param[in] session the session to be closed
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_close_session(nnfw_session *session);
+
+/*
+ * Load model from nnpackage file or directory
+ *
+ * @param[in] session nnfw_session loading the given nnpackage file/dir
+ * @param[in] package_file_path path to the nnpackage file or unzipped directory to be loaded
+ *
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_load_model_from_file(nnfw_session *session, const char *package_file_path);
+
+/*
+ * Prepare session to be ready for inference
+ * This phase may finalize model compilation, scheduling, and additional settings.
+ *
+ * @param[in] session the session to be prepared
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_prepare(nnfw_session *session);
+
+/*
+ * Run inference
+ *
+ * @param[in] session the session to run inference
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_run(nnfw_session *session);
+
+/*
+ * Set input
+ *
+ * @param[in] session session to the input is to be set
+ * @param[in] index index of input to be set (0-indexed)
+ * @param[in] type type of the input
+ * @param[in] buffer raw buffer for input
+ * @param[in] length size of bytes of output
+ *
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+
+NNFW_STATUS nnfw_set_input(nnfw_session *session, uint32_t index, NNFW_TYPE type,
+                           const void *buffer, size_t length);
+
+/*
+ * Set output
+ *
+ * @param[in] session session from inference output is to be extracted
+ * @param[in] index index of output to be set (0-indexed)
+ * @param[in] type type of the output
+ * @param[out] buffer raw buffer for output
+ * @param[in] length size of bytes of output
+ *
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+
+NNFW_STATUS nnfw_set_output(nnfw_session *session, uint32_t index, NNFW_TYPE type, void *buffer,
+                            size_t length);
+
+/*
+ * Get the number of inputs
+ *
+ * @param[in] session session from input information is to be extracted
+ * @param[out] number variable which the number of inputs is put into
+ *
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_input_size(nnfw_session *session, uint32_t *number);
+
+/*
+ * Get the number of outputs
+ *
+ * @param[in] session session from output information is to be extracted
+ * @param[out] number variable which the number of outputs is put into
+ *
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_output_size(nnfw_session *session, uint32_t *number);
+
+/*
+ * Get i-th input tensor info
+ *
+ * @param[in] session session from input information is to be extracted
+ * @param[in] index index of input
+ * @param[out] tensor_info nnfw_tensor_info
+ *
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_input_tensorinfo(nnfw_session *session, uint32_t index,
+                                  nnfw_tensorinfo *tensor_info);
+
+/*
+ * Get i-th output tensor info
+ *
+ * @param[in] session session from output information is to be extracted
+ * @param[in] index index of output
+ * @param[out] tensor_info nnfw_tensor_info
+ *
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_output_tensorinfo(nnfw_session *session, uint32_t index,
+                                   nnfw_tensorinfo *tensor_info);
+
+/*
+ * Set default backend
+ *
+ * @param[in] session session to which a default backend is set
+ * @param[in] backend default backend
+ */
+NNFW_STATUS nnfw_set_default_backend(nnfw_session *session, const char *backend);
+
+/*
+ * Set the operation's backend
+ *
+ * @param[in] session session to be modified
+ * @param[in] op operation to be set
+ * @param[in] backend bakcend on which operation run
+ *
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_set_op_backend(nnfw_session *session, const char *op, const char *backend);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/runtimes/include/nnfw_dev.h b/runtimes/include/nnfw_dev.h
new file mode 100644
index 000000000..ecf0597cf
--- /dev/null
+++ b/runtimes/include/nnfw_dev.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_DEV_H__
+#define __NNFW_DEV_H__
+
+#include "nnfw.h"
+
+// Used for custom kernel development
+
+/*
+ * operand type, used only for custom operations
+ */
+typedef struct
+{
+  nnfw_tensorinfo type;
+  void *allocation;
+} nnfw_operand;
+
+/*
+ * Used as input to custom operation eval function
+ */
+typedef struct
+{
+  size_t ninputs;
+  nnfw_operand *inputs;
+
+  size_t noutputs;
+  nnfw_operand *outputs;
+} nnfw_custom_kernel_params;
+
+/*
+ * Custom kernel evaluation function
+ *
+ * param[in] params custom operation parameters
+ * param[in] userdata pointer to user-specified buffer( kernel instance specific )
+ */
+typedef void (*nnfw_custom_eval)(nnfw_custom_kernel_params *params, char *userdata,
+                                 size_t userdata_size);
+
+/*
+ * custom operation registration info
+ */
+typedef struct
+{
+  nnfw_custom_eval eval_function;
+} custom_kernel_registration_info;
+
+NNFW_STATUS nnfw_register_custom_op_info(nnfw_session *session, const char *id,
+                                         custom_kernel_registration_info *info);
+
+#endif // __NNFW_DEV_H__
diff --git a/runtimes/libs/ARMComputeEx/CMakeLists.txt b/runtimes/libs/ARMComputeEx/CMakeLists.txt
new file mode 100644
index 000000000..ba1536dfe
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/CMakeLists.txt
@@ -0,0 +1,32 @@
+nnfw_find_package(ARMCompute QUIET)
+
+if(NOT ARMCompute_FOUND)
+  message(STATUS "Check ARM Compute library extension build: need ARM Compute library")
+  return()
+else(NOT ARMCompute_FOUND)
+  message(STATUS "Check ARM Compute library extension build: OK")
+endif(NOT ARMCompute_FOUND)
+
+set(ACL_EX_BASE ${CMAKE_CURRENT_SOURCE_DIR})
+
+file(GLOB_RECURSE ACL_EX_SRCS "${ACL_EX_BASE}/*.cpp")
+
+# generate embeded cl_kernel
+execute_process (
+    WORKING_DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}"
+    COMMAND bash -c "python resolve_includes.py"
+)
+
+add_library(arm_compute_ex SHARED ${ACL_EX_SRCS})
+target_include_directories(arm_compute_ex PUBLIC ${ACL_EX_BASE})
+target_link_libraries(arm_compute_ex PRIVATE arm_compute_core)
+target_link_libraries(arm_compute_ex PRIVATE nnfw_common)
+target_link_libraries(arm_compute_ex PRIVATE nnfw_coverage)
+# Defines to enable validate check in debug build
+target_compile_definitions(arm_compute_ex PRIVATE EMBEDDED_KERNELS
+                                                  $<$<CONFIG:Debug>:ARM_COMPUTE_DEBUG_ENABLED ARM_COMPUTE_ASSERTS_ENABLED
+                                                                    ARM_COMPUTE_LOGGING_ENABLED>)
+# Validate check functions are not used on release build
+# Some parameter are used for validate check function call, and these parameter may not used on release build
+target_compile_options(arm_compute_ex PRIVATE $<$<NOT:$<CONFIG:Debug>>:-Wno-unused-parameter -Wno-unused-function>)
+install(TARGETS arm_compute_ex DESTINATION lib)
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/CLKernelLibraryEx.h b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/CLKernelLibraryEx.h
index e4e752ef9..e4e752ef9 100644
--- a/libs/ARMComputeEx/arm_compute/core/CL/CLKernelLibraryEx.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/CLKernelLibraryEx.h
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLArgOperationKernel.h b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLArgOperationKernel.h
new file mode 100644
index 000000000..b98b174f7
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLArgOperationKernel.h
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file CLArgOperationKernel.h
+ * @brief This file defines CLArgOperationKernel
+ * @ingroup COM_AI_RUNTIME
+ */
+
+#ifndef __ARM_COMPUTE_CLARGOPERATIONKERNEL_H__
+#define __ARM_COMPUTE_CLARGOPERATIONKERNEL_H__
+
+#include "arm_compute/core/CL/ICLKernel.h"
+#include "arm_compute/core/TypesEx.h"
+
+namespace arm_compute
+{
+class ICLTensor;
+
+/**
+ * @brief Class to define interface for the argop kernel.
+ */
+class CLArgOperationKernel : public ICLKernel
+{
+public:
+  /**
+   * @brief Default constructor.
+   */
+  CLArgOperationKernel();
+  /**
+   * @brief Prevent instances of this class from being copied (As this class contains pointers).
+   * @param [in] copiedInstance Const reference of CLArgOperationKernel to be copied
+   */
+  CLArgOperationKernel(const CLArgOperationKernel &) = delete;
+  /**
+   * @brief Prevent instances of this class from being copied (As this class contains pointers).
+   * @param [in] copiedInstance Const reference of CLArgOperationKernel to be copied
+   * @return Reference of this instance
+   */
+  CLArgOperationKernel &operator=(const CLArgOperationKernel &) = delete;
+  /**
+   * @brief Allow instances of this class to be moved
+   * @param [in] movedInstance Rvalue reference of CLArgOperationKernel to be moved
+   */
+  CLArgOperationKernel(CLArgOperationKernel &&) = default;
+  /**
+   * @brief Allow instances of this class to be moved
+   * @param [in] movedInstance Rvalue reference of CLArgOperationKernel to be moved
+   * @return Reference of this instance
+   */
+  CLArgOperationKernel &operator=(CLArgOperationKernel &&) = default;
+  /**
+   * @brief Initialise the kernel's input, output and border mode.
+   * @param[in]  input          An input tensor. Data types supported: U8/QASYMM8/S32/F32.
+   * @param[out] output         The output tensor, Data types supported: S32.
+   * @param[in]  axis           Axis along which to reduce. It must be sorted and no duplicates.
+   * @param[in]  op             Arg operation to perform.
+   * return N/A
+   */
+  void configure(const ICLTensor *input, ICLTensor *output, const uint32_t axis, ArgOperation op);
+  /**
+   * @brief Static function to check if given info will lead to a valid configuration of @ref
+   * CLArgOperationKernel
+   * @param[in] input           An input tensor info. Data types supported: U8/QASYMM8/S32/F32.
+   * @param[in] output          The output tensor info, Data types supported: S32.
+   * @param[in] axis            Axis along which to reduce. It must be sorted and no duplicates.
+   * @param[in] op              Arg operation to perform.
+   * @return a status
+   */
+  static Status validate(const ITensorInfo *input, const ITensorInfo *output, const uint32_t axis,
+                         ArgOperation op);
+
+  /*
+   * @brief Run CLArgOperationKernel op
+   * @param[in] window  Window to be used for in_slice
+   * @param[in] queue   cl::CommandQueue
+   * @return N/A
+   */
+  void run(const Window &window, cl::CommandQueue &queue) override;
+
+private:
+  const ICLTensor *_input;
+  ICLTensor *_output;
+  uint32_t _axis;
+};
+} // namespace arm_compute
+#endif /*__ARM_COMPUTE_CLARGOPERATIONKERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLBinaryLogicalOpKernel.h b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLBinaryLogicalOpKernel.h
index ab33d9d3a..ab33d9d3a 100644
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLBinaryLogicalOpKernel.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLBinaryLogicalOpKernel.h
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLCastKernel.h b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLCastKernel.h
index 4c2feb903..4c2feb903 100644
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLCastKernel.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLCastKernel.h
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLDepthToSpaceKernel.h b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLDepthToSpaceKernel.h
index 60ec7a82a..60ec7a82a 100644
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLDepthToSpaceKernel.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLDepthToSpaceKernel.h
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLEmbeddingLookupKernel.h b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLEmbeddingLookupKernel.h
index da075db69..da075db69 100644
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLEmbeddingLookupKernel.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLEmbeddingLookupKernel.h
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLGatherExKernel.h b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLGatherExKernel.h
new file mode 100644
index 000000000..aa81a1efa
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLGatherExKernel.h
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file      CLGatherExKernel.h
+ * @ingroup   COM_AI_RUNTIME
+ * @brief     This file defines CLGatherExKernel class
+ */
+
+#ifndef __ARM_COMPUTE_CLGATHEREXKERNEL_H__
+#define __ARM_COMPUTE_CLGATHEREXKERNEL_H__
+
+#include "arm_compute/core/CL/ICLKernel.h"
+
+namespace arm_compute
+{
+class ICLTensor;
+
+/**
+ * @brief Class to define an interface for the gather kernel.
+ */
+class CLGatherExKernel : public ICLKernel
+{
+public:
+  /**
+   * @brief Construct CLGatherExKernel object
+   * */
+  CLGatherExKernel();
+
+  /**
+   * @brief Prevent instances of this class from being copied (As this class contains pointers).
+   */
+  CLGatherExKernel(const CLGatherExKernel &) = delete;
+
+  /**
+   * @brief Prevent instances of this class from being copied (As this class contains pointers).
+   */
+  CLGatherExKernel &operator=(const CLGatherExKernel &) = delete;
+
+  /**
+   * @brief Construct CLGatherExKernel object by using default move constructor
+   * @param[in] CLGatherExKernel object to move
+   */
+  CLGatherExKernel(CLGatherExKernel &&) = default;
+
+  /**
+   * @brief Move assignment operator
+   * @param[in] CLGatherExKernel object to move
+   */
+  CLGatherExKernel &operator=(CLGatherExKernel &&) = default;
+
+  /**
+   * @brief Initialise the kernel's input, output and border mode.
+   * @param[in]  input           An input tensor. Data types supported: U8/QASYMM8/S32/F32.
+   * @param[in]  indices         Indices tensor. Data types supported: S32.
+   * @param[out] output          The output tensor, Data types supported: same as @p input1.
+   * @param[in]  axis            (Optional) The axis in @p input to gather @p indices from. Negative
+   * values wrap around. Defaults to 0
+   * @return N/A
+   */
+  void configure(const ICLTensor *input, const ICLTensor *indices, ICLTensor *output, int axis = 0);
+
+  /**
+   * @brief Static function to check if given info will lead to a valid configuration of @ref
+   * CLGatherExKernel
+   * @param[in]  input           An input tensor. Data types supported: U8/QASYMM8/S32/F32.
+   * @param[in]  indices         Indices tensor. Data types supported: S32.
+   * @param[out] output          The output tensor, Data types supported: same as @p input1.
+   * @param[in]  axis            (Optional) The axis in @p input to gather @p indices from. Negative
+   * values wrap around. Defaults to 0
+   * @return a status
+   */
+  static Status validate(const ITensorInfo *input, const ITensorInfo *indices,
+                         const ITensorInfo *output, int axis = 0);
+
+  /**
+   * @brief Enqueue the OpenCL kernel to process the given window on the passed OpenCL command
+   *        queue.
+   * @note  The queue is *not* flushed by this method, and therefore the kernel will not have
+   *        been executed by the time this method returns.
+   * @param[in] window      Region on which to execute the kernel. (Must be a valid region of
+   *                        the window returned by window()).
+   * @param[in,out] queue   Command queue on which to enqueue the kernel.@return N/A
+   * @return N/A
+   */
+  void run(const Window &window, cl::CommandQueue &queue) override;
+
+private:
+  const ICLTensor *_input;
+  const ICLTensor *_indices;
+  ICLTensor *_output;
+  int _axis;
+};
+} // namespace arm_compute
+#endif /*__ARM_COMPUTE_CLGATHEREXKERNEL_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLHashtableLookupKernel.h b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLHashtableLookupKernel.h
new file mode 100644
index 000000000..8269e5a7a
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLHashtableLookupKernel.h
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file      CLHashtableLookupKernel.h
+ * @ingroup   COM_AI_RUNTIME
+ * @brief     This file defines CLHashtableLookupKernel class
+ */
+
+#ifndef __ARM_COMPUTE_CLHASHTABLELOOKUPKERNEL_H__
+#define __ARM_COMPUTE_CLHASHTABLELOOKUPKERNEL_H__
+
+#include "arm_compute/core/CL/ICLKernel.h"
+#include "arm_compute/runtime/CL/CLTensor.h"
+
+namespace arm_compute
+{
+class ICLTensor;
+
+/**
+* @brief Class to perform HashtableLookup operation with opencl kernel
+*/
+class CLHashtableLookupKernel : public ICLKernel
+{
+public:
+  /**
+   * @brief Construct a CLHashtableLookupKernel object
+   * */
+  CLHashtableLookupKernel();
+
+  /**
+   * @brief Prevent instances of this class from being copied (As this class contains pointers)
+   * */
+  CLHashtableLookupKernel(const CLHashtableLookupKernel &) = delete;
+
+  /**
+   * @brief Prevent instances of this class from being copied (As this class contains pointers)
+   * */
+  CLHashtableLookupKernel &operator=(const CLHashtableLookupKernel &) = delete;
+
+  /**
+   * @brief Construct a CLHashtableLookupKernel object by using default move constructor
+   * @param[in] CLHashtableLookupKernel object to move
+   * */
+  CLHashtableLookupKernel(CLHashtableLookupKernel &&) = default;
+
+  /**
+   * @brief Move assignment operator
+   * @param[in] CLHashtableLookupKernel object to move
+   * */
+  CLHashtableLookupKernel &operator=(CLHashtableLookupKernel &&) = default;
+
+  /**
+   * @brief Destruct this object
+   * */
+  ~CLHashtableLookupKernel() = default;
+
+  /**
+   * @brief Set the input and output of the kernel
+   * @param[in]  lookups  Lookups 1D tensor that values are indices into the first dimension of
+   *                      input.
+   * @param[in]  keys     Keys 1D tensor. keys and input pair represent a map.
+   *                      Data types supported: S32
+   * @param[in]  input    Source tensor.
+   *                      Data types supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32
+   * @param[out] output   Destination tensor. Data types and data layouts supported: Same as @p
+   *                      input.
+   * @param[out] hits     Hits 1D tensor. A boolean tensor that indicates whether the lookup hits
+   *                      (True) or not (False). Data types supported: U8/QASYMM8
+   * @return N/A
+   */
+  void configure(const ICLTensor *lookups, const ICLTensor *keys, const ICLTensor *input,
+                 ICLTensor *output, ICLTensor *hits);
+
+  /**
+   * @brief Static function to check if given info will lead to a valid configuration of @ref
+   *        CLHashtableLookupKernel
+   * @param[in]  lookups  The lookups tensor info. Data types supported: S32.
+   * @param[in]  keys     The keys tensor info. keys and input pair represent a map.
+   *                      Data types supported: S32
+   * @param[in]  input    The input tensor info.
+   *                      Data types supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32
+   * @param[out] output   The output tensor. Data types and data layouts supported: Same as @p
+   *                      input.
+   * @param[out] hits     The hits tensor info. A boolean tensor that indicates whether the lookup
+   *                      hits
+   *                      (True) or not (False). Data types supported: U8/QASYMM8
+   * @return a status
+   */
+  static Status validate(const ITensorInfo *lookups, const ITensorInfo *keys,
+                         const ITensorInfo *input, const ITensorInfo *output,
+                         const ITensorInfo *hits);
+
+  /**
+   * @brief Enqueue the OpenCL kernel to process the given window on the passed OpenCL command
+   *        queue.
+   * @note  The queue is *not* flushed by this method, and therefore the kernel will not have
+   *        been executed by the time this method returns.
+   * @param[in]     window  Region on which to execute the kernel. (Must be a valid region of
+   *                        the window returned by window()).
+   * @param[in,out] queue   Command queue on which to enqueue the kernel.@return N/A
+   * @return N/A
+   */
+  void run(const Window &window, cl::CommandQueue &queue) override;
+
+private:
+  const ICLTensor *_lookups{nullptr};                 /** Lookups tensor */
+  const ICLTensor *_keys{nullptr};                    /** Keys tensor */
+  const ICLTensor *_input{nullptr};                   /** Source tensor */
+  ICLTensor *_output{nullptr};                        /** Destination tensor */
+  ICLTensor *_hits{nullptr};                          /** Hits tensor */
+  std::unique_ptr<CLTensor> _lookup_indices{nullptr}; /** Lookup indices tensor */
+};
+} // namespace arm_compute
+#endif /*__ARM_COMPUTE_CLHASHTABLELOOKUPKERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLNegKernel.h b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLNegKernel.h
index ccbea147e..ccbea147e 100644
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLNegKernel.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLNegKernel.h
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLPReLUKernel.h b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLPReLUKernel.h
index eff1b8bd5..eff1b8bd5 100644
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLPReLUKernel.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLPReLUKernel.h
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLReduceOperationKernel.h b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLReduceOperationKernel.h
index a26a4a7fc..a26a4a7fc 100644
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLReduceOperationKernel.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLReduceOperationKernel.h
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLSpaceToBatchNDKernel.h b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLSpaceToBatchNDKernel.h
new file mode 100644
index 000000000..577e38cc4
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLSpaceToBatchNDKernel.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef __ARM_COMPUTE_CLSPACE_TO_BATCH_ND_KERNEL_H__
+#define __ARM_COMPUTE_CLSPACE_TO_BATCH_ND_KERNEL_H__
+
+#include "arm_compute/core/CL/ICLKernel.h"
+
+namespace arm_compute
+{
+class ICLTensor;
+
+/** OpenCL kernel to perform SPACE_TO_BATCH_ND operation */
+class CLSpaceToBatchNDKernel final : public ICLKernel
+{
+public:
+  /** Default constructor */
+  CLSpaceToBatchNDKernel();
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  CLSpaceToBatchNDKernel(const CLSpaceToBatchNDKernel &) = delete;
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  CLSpaceToBatchNDKernel &operator=(const CLSpaceToBatchNDKernel &) = delete;
+  /** Allow instances of this class to be moved */
+  CLSpaceToBatchNDKernel(CLSpaceToBatchNDKernel &&) = default;
+  /** Allow instances of this class to be moved */
+  CLSpaceToBatchNDKernel &operator=(CLSpaceToBatchNDKernel &&) = default;
+  /** Default destructor */
+  ~CLSpaceToBatchNDKernel() = default;
+  /** Initialise the kernel's input and output.
+   *
+   * @note       The data layout of input and output must be the same.
+   * @note       The number of dimensions of input and output must be 4, and `spatial` dimensions
+   *             are height and width.
+   * @param[in]  input         Input tensor. Data types supported: U8/QASYMM8/S16/F16/S32/F32.
+   *                           Data layout supported: NCHW/NHWC
+   * @param[in]  block_size    Block size tensor. Data types supported: S32.
+   * @param[in]  padding_size  Padding size tensor. Data types supported: S32.
+   * @param[out]  output        Output tensor. Data types supported: U8/QASYMM8/S16/F16/S32/F32.
+   *                            Data layout supported: NCHW/NHWC
+   */
+  void configure(const ICLTensor *input, const ICLTensor *block_size, const ICLTensor *padding_size,
+                 ICLTensor *output);
+
+  // Inherited methods overridden:
+  void run(const Window &window, cl::CommandQueue &queue) override;
+
+private:
+  const ICLTensor *_input{nullptr};        /**< Source tensor */
+  const ICLTensor *_block_size{nullptr};   /**< Block size tensor */
+  const ICLTensor *_padding_size{nullptr}; /**< Padding size tensor */
+  ICLTensor *_output{nullptr};             /**< Destination tensor */
+};
+
+} // namespace arm_compute
+
+#endif /* __ARM_COMPUTE_CLSPACE_TO_BATCH_ND_KERNEL_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLSpaceToDepthKernel.h b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLSpaceToDepthKernel.h
index be845a549..be845a549 100644
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLSpaceToDepthKernel.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLSpaceToDepthKernel.h
diff --git a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLTopKV2Kernel.h b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLTopKV2Kernel.h
index eb2bad254..eb2bad254 100644
--- a/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLTopKV2Kernel.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLTopKV2Kernel.h
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLTransposeConvLayerUpsampleKernel.h b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLTransposeConvLayerUpsampleKernel.h
new file mode 100644
index 000000000..c5ef730b6
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/CL/kernels/CLTransposeConvLayerUpsampleKernel.h
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef __ARM_COMPUTE_CLTRANSPOSECONVLAYERUPSAMPLEKERNEL_H__
+#define __ARM_COMPUTE_CLTRANSPOSECONVLAYERUPSAMPLEKERNEL_H__
+
+#include "arm_compute/core/CL/ICLKernel.h"
+
+namespace arm_compute
+{
+class ICLTensor;
+
+/** Interface for the Upsampling layer kernel for transpose convolution on OpenCL.
+ */
+class CLTransposeConvLayerUpsampleKernel : public ICLKernel
+{
+public:
+  /** Constructor */
+  CLTransposeConvLayerUpsampleKernel();
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  CLTransposeConvLayerUpsampleKernel(const CLTransposeConvLayerUpsampleKernel &) = delete;
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  CLTransposeConvLayerUpsampleKernel &
+  operator=(const CLTransposeConvLayerUpsampleKernel &) = delete;
+  /** Default Move Constructor. */
+  CLTransposeConvLayerUpsampleKernel(CLTransposeConvLayerUpsampleKernel &&) = default;
+  /** Default move assignment operator */
+  CLTransposeConvLayerUpsampleKernel &operator=(CLTransposeConvLayerUpsampleKernel &&) = default;
+  /** Default destructor */
+  ~CLTransposeConvLayerUpsampleKernel() = default;
+
+  /** Initialise the kernel's input and output.
+   *
+   * @param[in]  input        Source tensor. Data types supported: QASYMM8/F16/F32.
+   * @param[out] output       Destination tensor. Data types supported: same as @p input. All but
+   * the lowest two dimensions must be the same size as in the input tensor, i.e. scaling is only
+   * performed within the XY-plane.
+   * @param[in]  inner_border Top and right inner border sizes. These rows and columns will be
+   * filled with zero.
+   * @param[in]  info         Contains padding and stride information described in @ref
+   * PadStrideInfo.
+   */
+  void configure(const ICLTensor *input, ICLTensor *output, const BorderSize &inner_border,
+                 const PadStrideInfo &info);
+  /** Static function to check if given info will lead to a valid configuration of @ref
+   * CLTransposeConvLayerUpsample
+   *
+   * @param[in] input        Source tensor info. Data types supported: QASYMM8/F16/F32.
+   * @param[in] output       Destination tensor info. Data types supported: same as @p input. All
+   * but the lowest two dimensions must be the same size as in the input tensor, i.e. scaling is
+   * only performed within the XY-plane.
+   * @param[in] inner_border Top and right inner border sizes. These rows and columns will be filled
+   * with zero.
+   * @param[in] info         Contains padding and stride information described in @ref
+   * PadStrideInfo.
+   *
+   * @return a status
+   */
+  static Status validate(const ITensorInfo *input, const ITensorInfo *output,
+                         const BorderSize &inner_border, const PadStrideInfo &info);
+
+  // Inherited methods overridden:
+  void run(const Window &window, cl::CommandQueue &queue) override;
+
+private:
+  const ICLTensor *_input;
+  ICLTensor *_output;
+  BorderSize _inner_border;
+  PadStrideInfo _info;
+};
+} // namespace arm_compute
+#endif /*__ARM_COMPUTE_CLTRANSPOSECONVLAYERUPSAMPLEKERNEL_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/core/CPP/kernels/CPPUpsampleKernelEx.h b/runtimes/libs/ARMComputeEx/arm_compute/core/CPP/kernels/CPPUpsampleKernelEx.h
new file mode 100644
index 000000000..d093c22cb
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/CPP/kernels/CPPUpsampleKernelEx.h
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_CPPUPSAMPLEKERNEL_EX_H__
+#define __ARM_COMPUTE_CPPUPSAMPLEKERNEL_EX_H__
+
+#include "arm_compute/core/CPP/ICPPKernel.h"
+
+namespace arm_compute
+{
+class ITensor;
+
+/** CPP kernel to perform tensor upsample.
+ *
+ */
+class CPPUpsampleKernelEx : public ICPPKernel
+{
+public:
+  const char *name() const override { return "CPPUpsampleKernelEx"; }
+  /** Default constructor */
+  CPPUpsampleKernelEx();
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  CPPUpsampleKernelEx(const CPPUpsampleKernelEx &) = delete;
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  CPPUpsampleKernelEx &operator=(const CPPUpsampleKernelEx &) = delete;
+  /** Allow instances of this class to be moved */
+  CPPUpsampleKernelEx(CPPUpsampleKernelEx &&) = default;
+  /** Allow instances of this class to be moved */
+  CPPUpsampleKernelEx &operator=(CPPUpsampleKernelEx &&) = default;
+  /** Default destructor */
+  ~CPPUpsampleKernelEx() = default;
+
+  /** Set the input and output of the kernel.
+   *
+   * @param[in]  input  The input tensor to upsample. Data types supported: F32/F16/QASYMM8
+   * @param[out] output The output tensor. Data types supported: Same as @p input
+   * @param[in]  info   Padding info.
+   */
+  void configure(const ITensor *input, ITensor *output, const PadStrideInfo &info);
+
+  // Inherited methods overridden:
+  void run(const Window &window, const ThreadInfo &info) override;
+  bool is_parallelisable() const override;
+
+private:
+  const ITensor *_input;
+  ITensor *_output;
+  PadStrideInfo _info;
+};
+} // namespace arm_compute
+#endif /*__ARM_COMPUTE_CPPUPSAMPLEKERNEL_EX_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/core/NEON/NEElementwiseOperationFuncs.h b/runtimes/libs/ARMComputeEx/arm_compute/core/NEON/NEElementwiseOperationFuncs.h
new file mode 100644
index 000000000..358e0ebc6
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/NEON/NEElementwiseOperationFuncs.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef __ARM_COMPUTE_NEELEMENTWISEOPERATIONFUNCS_H__
+#define __ARM_COMPUTE_NEELEMENTWISEOPERATIONFUNCS_H__
+
+#include <arm_neon.h>
+
+namespace arm_compute
+{
+class ITensor;
+class Window;
+class QuantizationInfo;
+} // namespace arm_compute
+
+namespace arm_compute
+{
+
+float32x4x4_t load_quantized(const uint8_t *input1_ptr, const int32x4_t &offset,
+                             const float32x4_t &scale);
+
+void store_quantized(uint8_t *output_ptr, const float32x4x4_t &rf, const float32x4_t &offset,
+                     const float32x4_t &invscale);
+
+float32x4x4_t dup_quantized(uint8_t broadcast_value, int offset, float scale);
+
+void elementwise_op_quantized(
+    const ITensor *in1, const ITensor *in2, ITensor *out, const Window &window,
+    uint8_t (*scalar_func)(const float &, const float &, QuantizationInfo),
+    int (*broadcast_func)(int, int, int, const uint8_t *, float32x4x4_t, uint8_t *, int32x4_t,
+                          float32x4_t, float32x4_t, float32x4_t, const bool),
+    int (*neon_func)(int, int, int, const uint8_t *, const uint8_t *, uint8_t *, int32x4_t,
+                     int32x4_t, float32x4_t, float32x4_t, float32x4_t, float32x4_t));
+
+void elementwise_op(const ITensor *in1, const ITensor *in2, ITensor *out, const Window &window,
+                    float (*scalar_func)(const float &, const float &),
+                    int (*broadcast_func)(int, int, int, const float *, const float &, float *,
+                                          const bool),
+                    int (*neon_func)(int, int, int, const float *, const float *, float *));
+
+void elementwise_op(const ITensor *in1, const ITensor *in2, ITensor *out, const Window &window,
+                    uint8_t (*scalar_func)(const uint8_t &, const uint8_t &),
+                    int (*broadcast_func)(int, int, int, const uint8_t *, const uint8_t &,
+                                          uint8_t *, const bool),
+                    int (*neon_func)(int, int, int, const uint8_t *, const uint8_t *, uint8_t *));
+} // namespace arm_compute
+#endif // __ARM_COMPUTE_NEELEMENTWISEOPERATIONFUNCS_H__
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/core/NEON/kernels/NEBinaryLogicalOperationKernel.h b/runtimes/libs/ARMComputeEx/arm_compute/core/NEON/kernels/NEBinaryLogicalOperationKernel.h
new file mode 100644
index 000000000..61992bd50
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/NEON/kernels/NEBinaryLogicalOperationKernel.h
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_NEBINARYLOGICALOPERATIONKERNEL_H__
+#define __ARM_COMPUTE_NEBINARYLOGICALOPERATIONKERNEL_H__
+
+#include "arm_compute/core/NEON/kernels/NEElementwiseOperationKernel.h"
+#include "arm_compute/core/TypesEx.h"
+
+namespace arm_compute
+{
+
+class NEBinaryLogicalOperationKernel : public NEElementwiseOperationKernel
+{
+public:
+  /** Default destructor */
+  ~NEBinaryLogicalOperationKernel() = default;
+
+  /** Static function to check if given info will lead to a valid configuration of @ref
+   * NEBinaryLogicalOperationKernel
+   *
+   * @param[in] op     Binary logical operation to be executed.
+   * @param[in] input1 First tensor input. Data types supported: QASYMM8/U8.
+   * @param[in] input2 Second tensor input. Data types supported: Same as @p input1.
+   * @param[in] output Output tensor. Data types supported: Same as @p input1.
+   */
+  void configure(BinaryLogicalOperation op, const ITensor *input1, const ITensor *input2,
+                 ITensor *output);
+
+  /** Static function to check if given info will lead to a valid configuration of @ref
+   * NEBinaryLogicalOperationKernel
+   *
+   * @param[in] op     Binary logical operation to be executed.
+   * @param[in] input1 First tensor input info. Data types supported: QASYMM8/U8.
+   * @param[in] input2 Second tensor input info. Data types supported: Same as @p input1.
+   * @param[in] output Output tensor info. Data types supported: Same as @p input1.
+   *
+   * @return a Status
+   */
+  static Status validate(BinaryLogicalOperation op, const ITensorInfo *input1,
+                         const ITensorInfo *input2, const ITensorInfo *output);
+
+protected:
+  // Inherited methods overridden:
+  static Status validate_arguments(const ITensorInfo &input1, const ITensorInfo &input2,
+                                   const ITensorInfo &output);
+};
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_NEBINARYLOGICALOPERATIONKERNEL_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/core/NEON/kernels/NEElementwiseUnaryKernelEx.h b/runtimes/libs/ARMComputeEx/arm_compute/core/NEON/kernels/NEElementwiseUnaryKernelEx.h
new file mode 100644
index 000000000..d6fad1155
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/NEON/kernels/NEElementwiseUnaryKernelEx.h
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_NEELEMENTWISEUNARYKERNELEX_H__
+#define __ARM_COMPUTE_NEELEMENTWISEUNARYKERNELEX_H__
+
+#include "arm_compute/core/NEON/INEKernel.h"
+#include "arm_compute/core/TypesEx.h"
+
+namespace arm_compute
+{
+class ITensor;
+
+/** Interface for an element-wise unary operation kernel
+ *
+ * Element-wise operation is computed by:
+ * @f[ output(x) = OP(input(x))@f]
+ *
+ */
+class NEElementwiseUnaryKernelEx : public INEKernel
+{
+public:
+  const char *name() const override { return "NEElementwiseUnaryKernelEx"; }
+  /** Default constructor */
+  NEElementwiseUnaryKernelEx();
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  NEElementwiseUnaryKernelEx(const NEElementwiseUnaryKernelEx &) = delete;
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  NEElementwiseUnaryKernelEx &operator=(const NEElementwiseUnaryKernelEx &) = delete;
+  /** Allow instances of this class to be moved */
+  NEElementwiseUnaryKernelEx(NEElementwiseUnaryKernelEx &&) = default;
+  /** Allow instances of this class to be moved */
+  NEElementwiseUnaryKernelEx &operator=(NEElementwiseUnaryKernelEx &&) = default;
+  /** Default destructor */
+  ~NEElementwiseUnaryKernelEx() = default;
+
+  /** Static function to check if given info will lead to a valid configuration of @ref
+   * NEElementwiseUnaryKernelEx
+   *
+   * @param[in] op     Arithmetic operation to be executed.
+   * @param[in] input  First tensor input. Data types supported: F16/F32/S32.
+   * @param[in] output Output tensor. Data types supported: Same as @p input.
+   */
+  void configure(ElementWiseUnaryEx op, const ITensor *input, ITensor *output);
+
+  /** Static function to check if given info will lead to a valid configuration of @ref
+   * NEElementwiseUnaryKernelEx
+   *
+   * @param[in] op     Arithmetic operation to be executed.
+   * @param[in] input  First tensor input info. Data types supported: F16/F32/S32.
+   * @param[in] output Output tensor info. Data types supported: Same as @p input.
+   *
+   * @return a Status
+   */
+  static Status validate(ElementWiseUnaryEx op, const ITensorInfo *input,
+                         const ITensorInfo *output);
+
+  // Inherited methods overridden:
+  void run(const Window &window, const ThreadInfo &info) override;
+
+  /** Common signature for all the specialised arithmetic functions
+   *
+   * @param[in]  input  An input tensor. Data types supported: F16/F32/S32.
+   * @param[out] output The output tensor. Data types supported: Same as @p input.
+   * @param[in]  window Region on which to execute the kernel.
+   */
+  using ElementwiseUnaryFunction = void(const ITensor *input, ITensor *output,
+                                        const Window &window);
+
+protected:
+  // Inherited methods overridden:
+  static Status validate_arguments(const ITensorInfo &input, const ITensorInfo &output);
+
+  /** Function to use for the particular tensor types passed to configure() */
+  std::function<void(const ITensor *input, ITensor *output, const Window &window)> _function;
+
+  const ITensor *_input;
+  ITensor *_output;
+};
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_NEELEMENTWISEUNARYKERNELEX_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/core/NEON/kernels/NEPReLUKernel.h b/runtimes/libs/ARMComputeEx/arm_compute/core/NEON/kernels/NEPReLUKernel.h
new file mode 100644
index 000000000..79bb78661
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/NEON/kernels/NEPReLUKernel.h
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_NEPRELUKERNEL_H__
+#define __ARM_COMPUTE_NEPRELUKERNEL_H__
+
+#include "arm_compute/core/NEON/INEKernel.h"
+
+namespace arm_compute
+{
+class ITensor;
+
+/** Interface for the kernel to perform Parametric Rectified Linear Unit
+ *
+ * Result is computed by:
+ * @f[ output(x) = alpha * x for x < 0, output(x) = x for x >= 0 @f]
+ */
+class NEPReLUKernel : public INEKernel
+{
+public:
+  const char *name() const override { return "NEPReLUKernel"; }
+  /** Default constructor */
+  NEPReLUKernel();
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  NEPReLUKernel(const NEPReLUKernel &) = delete;
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  NEPReLUKernel &operator=(const NEPReLUKernel &) = delete;
+  /** Allow instances of this class to be moved */
+  NEPReLUKernel(NEPReLUKernel &&) = default;
+  /** Allow instances of this class to be moved */
+  NEPReLUKernel &operator=(NEPReLUKernel &&) = default;
+  /** Initialise the kernel's inputs and output
+   *
+   * @param[in]  input Input tensor. Data type supported: QASYMM8/F32
+   * @param[in]  alpha Alpha tensor. Data types supported: Same as @p input
+   * @param[out] output Output tensor. Data types supported: Same as @p input
+   */
+  void configure(const ITensor *input, const ITensor *alpha, ITensor *output);
+
+  // Inherited methods overridden:
+  void run(const Window &window, const ThreadInfo &info) override;
+
+  /** Static function to check if given info will lead to a valid configuration of @ref
+   * NEPReLUKernel.h
+   *
+   * @param[in] input  Input tensor input info. Data types supported: QASYMM8/F32.
+   * @param[in] alpha  Alpha tensor input info. Data types supported: Same as @p input.
+   * @param[in] output Output tensor info. Data types supported: Same as @p input.
+   *
+   * @return a Status
+   */
+  static Status validate(const ITensorInfo *input, const ITensorInfo *alpha,
+                         const ITensorInfo *output);
+  static Status validate_arguments(const ITensorInfo &input, const ITensorInfo &alpha,
+                                   const ITensorInfo &output);
+
+private:
+  const ITensor *_input; /**< Source tensor */
+  const ITensor *_alpha; /**< Alpha tensor */
+  ITensor *_output;      /**< Destination tensor */
+};
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_NEPRELUKERNEL_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/core/TypesEx.h b/runtimes/libs/ARMComputeEx/arm_compute/core/TypesEx.h
new file mode 100644
index 000000000..41754632d
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/TypesEx.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef __ARM_COMPUTE_TYPESEX_H__
+#define __ARM_COMPUTE_TYPESEX_H__
+
+namespace arm_compute
+{
+
+/** Available ArgIndex operations **/
+enum class ArgOperation
+{
+  MAX,
+  MIN,
+};
+
+/** Available reduce operations */
+enum class ReduceOperation
+{
+  MAX,  /**< Max */
+  MEAN, /**< Mean */
+  SUM,  /**< Sum */
+  MIN,  /**< Min */
+};
+
+/** Available binary logical operations */
+enum class BinaryLogicalOperation
+{
+  AND, /**< AND */
+  OR,  /**< OR */
+};
+
+enum class ComparisonOperationEx
+{
+  EQUAL,     /**< EQUAL */
+  NOT_EQUAL, /**< NOT_EQUAL */
+};
+
+enum class ElementWiseUnaryEx
+{
+  NEG, /**< NEG */
+};
+
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_TYPESEX_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/core/UtilsEx.h b/runtimes/libs/ARMComputeEx/arm_compute/core/UtilsEx.h
new file mode 100644
index 000000000..39026e6bb
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/UtilsEx.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef __ARM_COMPUTE_UTILSEX_H__
+#define __ARM_COMPUTE_UTILSEX_H__
+
+#include <utility>
+
+#include "arm_compute/core/Types.h"
+
+namespace arm_compute
+{
+
+/** Returns expected width and height of the transpose convolution's output tensor.
+ *
+ * @note This function was copied in order to fix a bug computing to wrong output dimensions.
+ *
+ * @param[in] in_width      Width of input tensor (Number of columns)
+ * @param[in] in_height     Height of input tensor (Number of rows)
+ * @param[in] kernel_width  Kernel width.
+ * @param[in] kernel_height Kernel height.
+ * @param[in] info          padding and stride info.
+ * @param[in] invalid_right The number of zeros added to right edge of the output.
+ * @param[in] invalid_top   The number of zeros added to bottom edge of the output.
+ *
+ * @return A pair with the new width in the first position and the new height in the second.
+ */
+const std::pair<unsigned int, unsigned int>
+transposeconv_output_dimensions(unsigned int in_width, unsigned int in_height,
+                                unsigned int kernel_width, unsigned int kernel_height,
+                                const PadStrideInfo &info, unsigned int invalid_right,
+                                unsigned int invalid_top);
+}
+#endif /*__ARM_COMPUTE_UTILSEX_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/core/utils/misc/ShapeCalculatorEx.h b/runtimes/libs/ARMComputeEx/arm_compute/core/utils/misc/ShapeCalculatorEx.h
new file mode 100644
index 000000000..bacb1140c
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/core/utils/misc/ShapeCalculatorEx.h
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __ARM_COMPUTE_MISC_SHAPE_CALCULATOR_EX_H__
+#define __ARM_COMPUTE_MISC_SHAPE_CALCULATOR_EX_H__
+
+#include "arm_compute/core/Helpers.h"
+#include "arm_compute/core/ITensorInfo.h"
+#include "arm_compute/core/Utils.h"
+
+#include "arm_compute/core/utils/helpers/tensor_transform.h"
+
+#include <cmath>
+
+namespace arm_compute
+{
+namespace misc
+{
+namespace shape_calculator
+{
+
+/** Calculate the upsampled output shape used for transpose convolution
+ *
+ * @param[in] input              Input tensor info
+ * @param[in] weights            Weights tensor shape
+ * @param[in] info               Padding and stride info
+ * @param[in] out_dims           Output shape dimensions
+ * @param[in] invalid_right      The number of zeros added to right edge of the output.
+ * @param[in] invalid_bottom     The number of zeros added to bottom edge of the output.
+ * @param[out] pad_left          Padding on left
+ * @param[out] pad_right         Padding on right
+ * @param[out] pad_top           Padding on top
+ * @param[out] pad_bottom        Padding on bottom
+ *
+ * @return the calculated shape
+ */
+inline TensorShape compute_transposeconv_upsampled_shape(
+    const ITensorInfo &input, const ITensorInfo &weights, const PadStrideInfo &info,
+    std::pair<unsigned int, unsigned int> &out_dims, unsigned int invalid_right,
+    unsigned int invalid_bottom, unsigned int &pad_left, unsigned int &pad_right,
+    unsigned int &pad_top, unsigned int &pad_bottom)
+{
+  unsigned int sx = info.stride().first;
+  unsigned int sy = info.stride().second;
+  const DataLayout data_layout = input.data_layout();
+  const size_t idx_w = get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH);
+  const size_t idx_h = get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT);
+
+  // Find the upsampled dimensions
+  // transpose conv out:
+  //    tconv_out + pad = 1 + (in - 1) * stride + invalid
+  //    tconv_out = 1 + (in - 1) * stride + invalid - pad
+  // upsample out:
+  //    upsample_out = 1 + (in - 1) * stride
+  unsigned int out_x = (input.dimension(idx_w) - 1) * sx + 1;
+  unsigned int out_y = (input.dimension(idx_h) - 1) * sy + 1;
+
+  // Find the padding needed for the convolution with stride 1 in order to match output shape
+  // upsample+pad out:
+  //    upsample_out + pad = tconv_out + kernel - 1
+  //    pad = tconv_out + kernel - 1 - upsample_out
+  unsigned int padx = out_dims.first - (out_x - weights.dimension(idx_w) + 1);
+  unsigned int pady = out_dims.second - (out_y - weights.dimension(idx_h) + 1);
+  out_x += padx;
+  out_y += pady;
+
+  unsigned int padx_all_except_invallid = padx + info.pad_left() + info.pad_right() - invalid_right;
+  unsigned int pady_all_except_invallid =
+      pady + info.pad_top() + info.pad_bottom() - invalid_bottom;
+  pad_left = (padx_all_except_invallid + 1) / 2 - info.pad_left();
+  pad_right = pady_all_except_invallid / 2 - info.pad_right() + invalid_right;
+  pad_top = (padx_all_except_invallid + 1) / 2 - info.pad_top();
+  pad_bottom = pady_all_except_invallid / 2 - info.pad_bottom() + invalid_bottom;
+
+  TensorShape scale_out_shape(input.tensor_shape());
+  scale_out_shape.set(idx_w, out_x);
+  scale_out_shape.set(idx_h, out_y);
+
+  return scale_out_shape;
+}
+
+/** Calculate the output shape of the transpose convolution layer
+ *
+ * @param[in] out_dims Output x and y shape dimensions
+ * @param[in] input    Input tensor info
+ * @param[in] weights  Weights tensor shape
+ *
+ * @return the calculated shape
+ */
+inline TensorShape
+compute_transposeconv_output_shape(const std::pair<unsigned int, unsigned int> &out_dims,
+                                   const ITensorInfo &input, const ITensorInfo &weights)
+{
+  const TensorShape input_shape{input.tensor_shape()};
+  const TensorShape weights_shape{weights.tensor_shape()};
+
+  const DataLayout data_layout = input.data_layout();
+  const int width_idx = get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH);
+  const int height_idx = get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT);
+  const int channel_idx =
+      get_data_layout_dimension_index(data_layout, DataLayoutDimension::CHANNEL);
+  const int batch_idx = get_data_layout_dimension_index(data_layout, DataLayoutDimension::BATCHES);
+
+  TensorShape out_shape{input_shape};
+  out_shape.set(width_idx, out_dims.first);
+  out_shape.set(height_idx, out_dims.second);
+  out_shape.set(channel_idx, weights_shape[batch_idx]);
+  return out_shape;
+}
+
+} // namespace shape_calculator
+} // namespace misc
+} // namespace arm_compute
+
+#endif // __ARM_COMPUTE_MISC_SHAPE_CALCULATOR_EX_H__
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/CLFunctionsEx.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/CLFunctionsEx.h
new file mode 100644
index 000000000..5fbbb2556
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/CLFunctionsEx.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef __ARM_COMPUTE_CLFUNCTIONSEX_H__
+#define __ARM_COMPUTE_CLFUNCTIONSEX_H__
+
+#include <arm_compute/runtime/CL/functions/CLArgOperation.h>
+#include <arm_compute/runtime/CL/functions/CLBatchToSpaceND.h>
+#include <arm_compute/runtime/CL/functions/CLBinaryLogicalOp.h>
+#include <arm_compute/runtime/CL/functions/CLCast.h>
+#include <arm_compute/runtime/CL/functions/CLDepthToSpace.h>
+#include <arm_compute/runtime/CL/functions/CLEmbeddingLookup.h>
+#include <arm_compute/runtime/CL/functions/CLFullyConnectedReshapingLayer.h>
+#include <arm_compute/runtime/CL/functions/CLGatherEx.h>
+#include <arm_compute/runtime/CL/functions/CLHashtableLookup.h>
+#include <arm_compute/runtime/CL/functions/CLLogicalNot.h>
+#include <arm_compute/runtime/CL/functions/CLNeg.h>
+#include <arm_compute/runtime/CL/functions/CLPixelWiseDivision.h>
+#include <arm_compute/runtime/CL/functions/CLPReLU.h>
+#include <arm_compute/runtime/CL/functions/CLReduceOperation.h>
+#include <arm_compute/runtime/CL/functions/CLRNNLayerEx.h>
+#include <arm_compute/runtime/CL/functions/CLSpaceToBatchND.h>
+#include <arm_compute/runtime/CL/functions/CLSpaceToDepth.h>
+#include <arm_compute/runtime/CL/functions/CLSplit.h>
+#include <arm_compute/runtime/CL/functions/CLStridedSliceEx.h>
+#include <arm_compute/runtime/CL/functions/CLTopKV2.h>
+#include <arm_compute/runtime/CL/functions/CLTransposeConvLayer.h>
+
+#endif // __ARM_COMPUTE_CLFUNCTIONSEX_H__
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLArgOperation.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLArgOperation.h
new file mode 100644
index 000000000..d9d0d4d35
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLArgOperation.h
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file CLArgOperation.h
+ * @ingroup COM_AI_RUNTIME
+ * @brief This file contains arm_compute::CLArgOperation class
+ */
+
+#ifndef __ARM_COMPUTE_CLARGOPERATION_H__
+#define __ARM_COMPUTE_CLARGOPERATION_H__
+
+#include "arm_compute/core/CL/kernels/CLArgOperationKernel.h"
+#include "arm_compute/runtime/CL/CLTensor.h"
+#include "arm_compute/runtime/IFunction.h"
+#include "arm_compute/core/TypesEx.h"
+
+namespace arm_compute
+{
+class ICLTensor;
+
+/**
+ * @brief Class to execute CLArgOperation operation
+ */
+class CLArgOperation : public IFunction
+{
+public:
+  /**
+   * @brief Construct a new CLArgOperation object
+   */
+  CLArgOperation();
+
+  /**
+   * @brief Prevent instances of this class from being copied (As this class contains pointers)
+   */
+  CLArgOperation(const CLArgOperation &) = delete;
+
+  /**
+   * @brief Prevent instances of this class from being copied (As this class contains pointers)
+   */
+  CLArgOperation &operator=(const CLArgOperation &) = delete;
+
+  /**
+   * @brief Construct a new CLArgOperation object by using copy constructor
+   * @param[in] CLArgOperation object to move
+   */
+  CLArgOperation(CLArgOperation &&) = default;
+
+  /**
+   * @brief Assign a CLArgOperation object.
+   * @param[in] CLArgOperation object to assign. This object will be moved.
+   */
+  CLArgOperation &operator=(CLArgOperation &&) = default;
+
+  /**
+   * @brief Initialise the kernel's inputs and outputs.
+   * @param[in]  input     Input tensor. Data types supported: U8/QASYMM8/S32/F32.
+   * @param[out] output    The result of arg operation. Data types supported: S32.
+   * @param[in]  axis      Axis along which to reduce. It must be sorted and no duplicates.
+   * @param[in]  op        Arg operation to perform.
+   * @return N/A
+   */
+  void configure(ICLTensor *input, ICLTensor *output, std::vector<uint32_t> axis, ArgOperation op);
+
+  /**
+   * @brief Static function to check if given info will lead to a valid configuration
+   * @param[in]  input     Input tensor. Data types supported: U8/QASYMM8/S32/F32.
+   * @param[in]  axis      Axis along which to reduce. It must be sorted and no duplicates.
+   * @param[out] output    The result of arg operation. Data types supported: S32.
+   * @param[in]  op        Arg operation to perform.
+   * @return a status
+   */
+  static Status validate(const ITensorInfo *input, const std::vector<uint32_t> &axis,
+                         const ITensorInfo *output, ArgOperation op);
+  /**
+   * @brief Run the OpenCL kernel for this operation
+   * @return N/A
+   */
+  void run() override;
+
+private:
+  ICLTensor *_input{nullptr};
+  ICLTensor *_output{nullptr};
+  std::vector<uint32_t> _axis{};
+  ArgOperation _arg_op{ArgOperation::MAX};
+
+  std::unique_ptr<CLTensor[]> _interm_tensors{nullptr};
+  std::unique_ptr<CLArgOperationKernel[]> _argop_kernels{nullptr};
+  size_t _num_of_kernels{0};
+};
+}
+#endif /*__ARM_COMPUTE_CLARGOPERATION_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLBatchToSpaceND.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLBatchToSpaceND.h
index d16a0762d..d16a0762d 100644
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLBatchToSpaceND.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLBatchToSpaceND.h
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLBinaryLogicalOp.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLBinaryLogicalOp.h
index 061e34f26..061e34f26 100644
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLBinaryLogicalOp.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLBinaryLogicalOp.h
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLCast.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLCast.h
index 56b8408e2..56b8408e2 100644
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLCast.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLCast.h
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLDepthToSpace.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLDepthToSpace.h
index d78a6ada4..d78a6ada4 100644
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLDepthToSpace.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLDepthToSpace.h
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLEmbeddingLookup.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLEmbeddingLookup.h
index 257772a89..257772a89 100644
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLEmbeddingLookup.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLEmbeddingLookup.h
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLFullyConnectedReshapingLayer.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLFullyConnectedReshapingLayer.h
new file mode 100644
index 000000000..0867cf6bb
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLFullyConnectedReshapingLayer.h
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file        CLFullyConnectedReshapingLayer.h
+ * @brief       This file contains CLFullyConnectedReshapingLayer class
+ * @ingroup     COM_AI_RUNTIME
+ */
+
+#ifndef __ARM_COMPUTE_CL_FULLY_CONNECTED_RESHAPING_LAYER_H__
+#define __ARM_COMPUTE_CL_FULLY_CONNECTED_RESHAPING_LAYER_H__
+
+#include <arm_compute/runtime/CL/functions/CLFullyConnectedLayer.h>
+#include <arm_compute/runtime/misc/functions/GenericReshapeLayer.h>
+#include <arm_compute/runtime/IMemoryManager.h>
+
+namespace arm_compute
+{
+/**
+ * @brief Class to run FullyConnected Layer after reshaping input tensor
+ */
+class CLFullyConnectedReshapingLayer : public arm_compute::IFunction
+{
+public:
+  CLFullyConnectedReshapingLayer(std::shared_ptr<IMemoryManager> memory_manager = nullptr)
+      : _input(nullptr), _weights(nullptr), _biases(nullptr), _output(nullptr), _cl_buffer{},
+        _cl_fc{memory_manager}, _cl_reshape{}, _needs_reshape(false)
+  {
+    // DO NOTHING
+  }
+
+public:
+  /**
+   * @brief Configure the layer
+   * @param[in] input The source tensor
+   * @param[in] weights The tensor that is filled with weight values
+   * @param[in] biases The tensor that is filled with biase values
+   * @param[in] output The destination tensor
+   * @param[in] needs_reshape Whether it needs to be reshaped or not
+   * @param[in] reshape The tensor shape to be reshaped. Only valid when needs_reshape is true.
+   * @return N/A
+   */
+  void configure(const arm_compute::ICLTensor *input, const arm_compute::ICLTensor *weights,
+                 const arm_compute::ICLTensor *biases, arm_compute::ICLTensor *output,
+                 bool needs_reshape, const arm_compute::TensorShape &reshape);
+
+public:
+  /**
+   * @brief Run the operation. Must be called after configure().
+   * @return N/A
+   */
+  void run(void) override;
+
+private:
+  const arm_compute::ICLTensor *_input;
+  const arm_compute::ICLTensor *_weights;
+  const arm_compute::ICLTensor *_biases;
+  arm_compute::ICLTensor *_output;
+
+  // buffer for reshaping input tensor
+  arm_compute::CLTensor _cl_buffer;
+
+private:
+  arm_compute::CLFullyConnectedLayer _cl_fc;
+  // TODO Change to CLReshapeLayer
+  arm_compute::misc::GenericReshapeLayer _cl_reshape;
+  bool _needs_reshape;
+};
+} // namespace arm_compute
+
+#endif // __ARM_COMPUTE_CL_FULLY_CONNECTED_RESHAPING_LAYER_H__
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLGatherEx.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLGatherEx.h
new file mode 100644
index 000000000..04d227aa7
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLGatherEx.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file CLGatherEx.h
+ * @brief       This file contains CLGatherEx class
+ * @ingroup     COM_AI_RUNTIME
+ */
+
+#ifndef __ARM_COMPUTE_CLGATHEREX_H__
+#define __ARM_COMPUTE_CLGATHEREX_H__
+
+#include "arm_compute/runtime/CL/ICLSimpleFunction.h"
+
+namespace arm_compute
+{
+class ICLTensor;
+
+/**
+ * @brief Class to to run @ref CLGatherKernel.
+ */
+class CLGatherEx : public ICLSimpleFunction
+{
+public:
+  /**
+   * @brief Initialise the kernel's inputs, output and convertion policy.
+   * @param[in]  input   An input tensor. Data types supported: U8/QASYMM8/S32/F32.
+   * @param[in]  indices An indexes tensor. Data types supported: S32.
+   * @param[out] output  The output tensor, Data types supported: same as @p input.
+   * @param[in]  axis    (Optional) The axis in @p input to gather @p indices from. Defaults to 0
+   * @return N/A
+ */
+  void configure(const ICLTensor *input, const ICLTensor *indices, ICLTensor *output, int axis = 0);
+
+  /**
+   * @brief Static function to check if given info will lead to a valid configuration
+   *        of @ref CLGatherEx
+   * @param[in]  input   An input tensor. Data types supported: U8/QASYMM8/S32/F32.
+   * @param[in]  indices An indexes tensor. Data types supported: S32.
+   * @param[out] output  The output tensor, Data types supported: same as @p input.
+   * @param[in]  axis    (Optional) The axis in @p input to gather @p indices from. Defaults to 0
+   * @return a status
+   */
+  static Status validate(const ITensorInfo *input, const ITensorInfo *indices,
+                         const ITensorInfo *output, int axis = 0);
+};
+}
+#endif /*__ARM_COMPUTE_CLGATHEREX_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLHashtableLookup.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLHashtableLookup.h
index 65aa6cbd5..65aa6cbd5 100644
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLHashtableLookup.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLHashtableLookup.h
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLLogicalNot.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLLogicalNot.h
new file mode 100644
index 000000000..4bf203c5a
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLLogicalNot.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef __ARM_COMPUTE_CLLOGICALNOT_H__
+#define __ARM_COMPUTE_CLLOGICALNOT_H__
+
+#include "arm_compute/runtime/CL/ICLSimpleFunction.h"
+
+namespace arm_compute
+{
+class ICLTensor;
+
+class CLLogicalNot : public ICLSimpleFunction
+{
+public:
+  /** Initialise the function's source and destination.
+   *
+   * @param[in]  input  Source tensor. Data types supported: QASYMM8.
+   * @param[out] output Output tensor. Data types supported: QASYMM8.
+   */
+  void configure(ICLTensor *input, ICLTensor *output);
+};
+
+} // namespace arm_compute
+#endif /*__ARM_COMPUTE_CLLOGICALNOT_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLNeg.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLNeg.h
index 198a0fd4e..198a0fd4e 100644
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLNeg.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLNeg.h
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLPReLU.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLPReLU.h
index 622a61b5e..622a61b5e 100644
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLPReLU.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLPReLU.h
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLPixelWiseDivision.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLPixelWiseDivision.h
index b142d3a2e..b142d3a2e 100644
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLPixelWiseDivision.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLPixelWiseDivision.h
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLRNNLayerEx.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLRNNLayerEx.h
new file mode 100644
index 000000000..7e88cb369
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLRNNLayerEx.h
@@ -0,0 +1,104 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_CLRNN_LAYER_EX_H__
+#define __ARM_COMPUTE_CLRNN_LAYER_EX_H__
+
+#include "arm_compute/core/CL/kernels/CLActivationLayerKernel.h"
+#include "arm_compute/core/CL/kernels/CLCopyKernel.h"
+#include "arm_compute/core/CL/kernels/CLElementwiseOperationKernel.h"
+#include "arm_compute/runtime/CL/ICLSimpleFunction.h"
+#include "arm_compute/runtime/CL/functions/CLFullyConnectedLayer.h"
+#include "arm_compute/runtime/CL/functions/CLGEMM.h"
+
+namespace arm_compute
+{
+class ICLTensor;
+
+/** Basic function to run @ref CLRNNLayerEx */
+class CLRNNLayerEx : public IFunction
+{
+public:
+  /** Default constructor */
+  CLRNNLayerEx(std::shared_ptr<IMemoryManager> memory_manager = nullptr);
+  /** Initialize the function
+   *
+   * @param[in]     input             Input is a 2-D tensor of shape [input_size, batch_size]. Data
+   * types supported: F16/F32
+   * @param[in]     weights           Weights tensor of shape [input_size, num_units] that
+   * multiplies the input. Data types supported: Same as @p input
+   * @param[in]     recurrent_weights Weights tensor of shape [num_units, num_units] that multiplies
+   * the current 'state'. Data types supported: Same as @p input
+   * @param[in]     bias              Bias vector of shape [num_units]. Data types supported: Same
+   * as @p input
+   * @param[out]    output            Output tensor of shape [num_units, batch_size]. Data types
+   * supported: Same as @p input
+   * @param[in,out] hidden_state      Output tensor of shape [num_units, batch_size]. Data types
+   * supported: Same as @p input
+   * @param[in]     info              Activation layer parameter.
+   */
+  void configure(const ICLTensor *input, const ICLTensor *weights,
+                 const ICLTensor *recurrent_weights, const ICLTensor *bias, ICLTensor *hidden_state,
+                 ICLTensor *output, ActivationLayerInfo &info);
+  /** Initialize the function
+   *
+   * @param[in] input             Input is a 2-D tensor of shape [input_size, batch_size]. Data
+   * types supported: F16/F32
+   * @param[in] weights           Weights tensor of shape [input_size, num_units] that multiplies
+   * the input. Data types supported: Same as @p input
+   * @param[in] recurrent_weights Weights tensor of shape [num_units, num_units] that multiplies the
+   * current 'state'. Data types supported: Same as @p input
+   * @param[in] bias              Bias vector of shape [num_units]. Data types supported: Same as @p
+   * input
+   * @param[in] output            Output tensor of shape [num_units, batch_size]. Data types
+   * supported: Same as @p input
+   * @param[in] hidden_state      Output tensor of shape [num_units, batch_size]. Data types
+   * supported: Same as @p input
+   * @param[in] info              Activation layer parameter.
+   *
+   * @return a status
+   */
+  static Status validate(const ITensorInfo *input, const ITensorInfo *weights,
+                         const ITensorInfo *recurrent_weights, const ITensorInfo *bias,
+                         const ITensorInfo *hidden_state, const ITensorInfo *output,
+                         const ActivationLayerInfo &info);
+
+  // Inherited methods overridden:
+  void run() override;
+  void prepare() override;
+
+private:
+  CLMemoryGroup _memory_group;
+  CLGEMM _gemm_state_f;
+  CLSaturatedArithmeticOperationKernel _add_kernel;
+  CLActivationLayerKernel _activation_kernel;
+  CLFullyConnectedLayer _fully_connected_kernel;
+  CLCopyKernel _copy_kernel;
+  CLTensor _fully_connected_out;
+  CLTensor _gemm_output;
+  CLTensor _add_output;
+  bool _is_prepared;
+};
+}
+#endif /* __ARM_COMPUTE_CLRNN_LAYER_EX_H__ */
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLReduceOperation.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLReduceOperation.h
index e1a6f6ab4..e1a6f6ab4 100644
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLReduceOperation.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLReduceOperation.h
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLSpaceToBatchND.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLSpaceToBatchND.h
index 7e2df8986..7e2df8986 100644
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLSpaceToBatchND.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLSpaceToBatchND.h
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLSpaceToDepth.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLSpaceToDepth.h
index 17f762092..17f762092 100644
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLSpaceToDepth.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLSpaceToDepth.h
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLStridedSliceEx.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLStridedSliceEx.h
index 6b26a85c8..6b26a85c8 100644
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLStridedSliceEx.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLStridedSliceEx.h
diff --git a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLTopKV2.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLTopKV2.h
index 5327e016f..5327e016f 100644
--- a/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLTopKV2.h
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLTopKV2.h
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLTransposeConvLayer.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLTransposeConvLayer.h
new file mode 100644
index 000000000..340a7bfe9
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLTransposeConvLayer.h
@@ -0,0 +1,157 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017-2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_CLTRANSPOSECONVLAYER_H__
+#define __ARM_COMPUTE_CLTRANSPOSECONVLAYER_H__
+
+#include "arm_compute/runtime/CL/functions/CLConvolutionLayer.h"
+#include "arm_compute/runtime/CL/functions/CLTransposeConvLayerUpsample.h"
+
+#include "arm_compute/core/CPP/kernels/CPPFlipWeightsKernel.h"
+
+#include "arm_compute/runtime/CL/CLMemoryGroup.h"
+#include "arm_compute/runtime/CL/CLTensor.h"
+#include "arm_compute/runtime/IFunction.h"
+#include "arm_compute/runtime/IMemoryManager.h"
+
+#include <memory>
+
+namespace arm_compute
+{
+class ICLTensor;
+/** Function to run the transpose convolution layer.
+ *
+ * @note This layer was copied in order to fix a bug computing to wrong output dimensions.
+ *
+ * TransposeConv Layer is the backward pass of Convolution Layer. First we transform the input
+ * depending on the stride and pad info and then perform a 1x1
+ * convolution pass. Input stride defines how many zeroes we should put between each element of the
+ * input, pad is the amount of padding and finally a is a user
+ * specified value where a < stride - 1, that increases the padding top and right of the input
+ * image.
+ *
+ *  The relation between input to output is as follows:
+ *  \f[
+ *       width\_output = (width\_input - 1) \cdot stride\_x - \cdot padding\_x + kernel\_x
+ *  \f]
+ *  \f[
+ *       height\_output = (height\_input - 1) \cdot stride\_y - \cdot padding\_y + kernel\_y
+ *  \f]
+ *
+ *  where:
+ *      width_input is the size of the first input dimension.
+ *      height_input is the size of the second input dimension.
+ *      width_output is the size of the first output dimension.
+ *      height_output is the size of the second output dimension.
+ *      kernel_x and kernel_y are the convolution sizes in x and y.
+ *      stride_x and stride_y is the input stride of the first and second dimension.
+ *
+ * The weights used by Deconvolution are supposed to be the same as the ones used for Convolution.
+ * Therefore, it will be necessary to use the weights in the
+ * reverse order to perform an actual convolution. This is achieved by using the @ref
+ * CPPFlipWeightsKernel.
+ *
+ * This function calls the following OpenCL kernels/functions:
+ *
+ * -# @ref CLTransposeConvLayerUpsample
+ * -# @ref CLConvolutionLayer
+ *
+ */
+class CLTransposeConvLayer : public IFunction
+{
+public:
+  /** Constructor */
+  CLTransposeConvLayer(std::shared_ptr<IMemoryManager> memory_manager = nullptr);
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  CLTransposeConvLayer(const CLTransposeConvLayer &) = delete;
+  /** Default move constructor */
+  CLTransposeConvLayer(CLTransposeConvLayer &&) = default;
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  CLTransposeConvLayer &operator=(const CLTransposeConvLayer &) = delete;
+  /** Default move assignment operator */
+  CLTransposeConvLayer &operator=(CLTransposeConvLayer &&) = default;
+  /** Set the input, weights, biases and output tensors.
+   *
+   * @param[in,out] input          Input tensor. 3 lower dimensions represent a single input,
+   *                               and an optional 4th dimension for batch of inputs.
+   *                               Data types supported: QASYMM8/F16/F32.
+   * @param[in]     weights        The 4d weights with dimensions [width, height, IFM, OFM].
+   *                               Data type supported: Same as @p input.
+   * @param[in]     bias           (Optional) The biases have one dimension. Data type supported:
+   *                               Same as @p input.
+   * @param[out]    output         Output tensor. The output has the same number of dimensions
+   *                               as the @p input.
+   * @param[in]     info           Contains padding and policies to be used in the
+   *                               transpose convolution, this is decribed in @ref PadStrideInfo.
+   * @param[in]     invalid_right  The number of zeros added to right edge of the output.
+   * @param[in]     invalid_bottom The number of zeros added to top edge of the output.
+   * @param[in]     weights_info   (Optional) Weights information needed for @ref
+   *                               CLConvolutionLayer, specifies if the weights tensor has been
+   *                               reshaped with @ref CLWeightsReshapeKernel.
+   */
+  void configure(ICLTensor *input, ICLTensor *weights, const ICLTensor *bias, ICLTensor *output,
+                 const PadStrideInfo &info, unsigned int invalid_right, unsigned int invalid_bottom,
+                 const WeightsInfo &weights_info = WeightsInfo());
+  /** Static function to check if given info will lead to a valid configuration of @ref
+   * CLTransposeConvLayer
+   *
+   * @param[in] input           Input tensor info. 3 lower dimensions represent a single input,
+   *                            and an optional 4th dimension for batch of inputs.
+   *                            Data types supported: QASYMM8/F16/F32.
+   * @param[in] weights         The 4d weights info with dimensions [width, height, IFM, OFM].
+   *                            Data type supported: Same as @p input.
+   * @param[in] bias            (Optional) The biases have one dimension. Data type supported:
+   *                            Same as @p input.
+   * @param[in] output          Output tensor info. The output has the same number of dimensions
+   *                            as the @p input.
+   * @param[in] info            Contains padding and policies to be used in the
+   *                            transpose convolution, this is decribed in @ref PadStrideInfo.
+   * @param[in] innvalid_right  The number of zeros added to right edge of the output.
+   * @param[in] invalid_bottom  The number of zeros added to top edge of the output.
+   * @param[in] weights_info    (Optional) Weights information needed for @ref CLConvolutionLayer,
+   *                            specifies if the weights tensor has been reshaped with @ref
+   *                            CLWeightsReshapeKernel.
+   * @return a status
+   */
+  static Status validate(const ITensorInfo *input, const ITensorInfo *weights,
+                         const ITensorInfo *bias, ITensorInfo *output, const PadStrideInfo &info,
+                         unsigned int innvalid_right, unsigned int invalid_bottom,
+                         const WeightsInfo &weights_info = WeightsInfo());
+
+  // Inherited methods overridden:
+  void run() override;
+  void prepare() override;
+
+private:
+  CLMemoryGroup _memory_group;
+  CLTransposeConvLayerUpsample _scale_f;
+  CLConvolutionLayer _conv_f;
+  CPPFlipWeightsKernel _flip_weights;
+  CLTensor _scaled_output;
+  ICLTensor *_original_weights;
+  CLTensor _weights_flipped;
+  bool _is_prepared;
+};
+}
+#endif /* __ARM_COMPUTE_CLTRANSPOSECONVLAYER_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLTransposeConvLayerUpsample.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLTransposeConvLayerUpsample.h
new file mode 100644
index 000000000..4ae0e1830
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CL/functions/CLTransposeConvLayerUpsample.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef __ARM_COMPUTE_CLTRANSPOSECONVLAYERUPSAMPLE_H__
+#define __ARM_COMPUTE_CLTRANSPOSECONVLAYERUPSAMPLE_H__
+
+#include "arm_compute/runtime/IFunction.h"
+
+#include "arm_compute/core/CL/kernels/CLTransposeConvLayerUpsampleKernel.h"
+#include "arm_compute/core/Types.h"
+#include "arm_compute/runtime/CL/CLMemoryGroup.h"
+#include "arm_compute/runtime/IFunction.h"
+#include "arm_compute/runtime/IMemoryManager.h"
+
+namespace arm_compute
+{
+class ICLTensor;
+
+/** Basic function to run @ref CLTransposeConvLayerUpsampleKernel */
+class CLTransposeConvLayerUpsample : public IFunction
+{
+public:
+  /** Default constructor */
+  CLTransposeConvLayerUpsample();
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  CLTransposeConvLayerUpsample(const CLTransposeConvLayerUpsample &) = delete;
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  CLTransposeConvLayerUpsample &operator=(const CLTransposeConvLayerUpsample &) = delete;
+  /** Allow instances of this class to be moved */
+  CLTransposeConvLayerUpsample(CLTransposeConvLayerUpsample &&) = default;
+  /** Allow instances of this class to be moved */
+  CLTransposeConvLayerUpsample &operator=(CLTransposeConvLayerUpsample &&) = default;
+  /** Default destructor */
+  virtual ~CLTransposeConvLayerUpsample() = default;
+
+  /** Initialize the function's source, destination, interpolation type and border_mode.
+   *
+   * @param[in, out] input        Source tensor. Data type supported: QASYMM8/F16/F32.
+   * @param[out]     output       Destination tensor. Data type supported: same as @p input.
+   * @param[in]      inner_border The number of zeros added to right and top edges of the input.
+   * @param[in]      info         Contains padding and policies to be used in the deconvolution.
+   */
+  void configure(ICLTensor *input, ICLTensor *output, const BorderSize &inner_border,
+                 const PadStrideInfo &info);
+  /** Static function to check if given info will lead to a valid configuration of @ref
+   * CLTransposeConvLayerUpsample
+   *
+   * @param[in] input        Source tensor info. Data type supported: QASYMM8/F16/F32.
+   * @param[in] output       Destination tensor info. Data type supported: same as @p input.
+   * @param[in] inner_border The number of zeros added to right and top edges of the input.
+   * @param[in] info         Contains padding and policies to be used in the deconvolution.
+   *
+   * @return a status
+   */
+  static Status validate(const ITensorInfo *input, const ITensorInfo *output,
+                         const BorderSize &inner_border, const PadStrideInfo &info);
+
+  // Inherited methods overridden:
+  void run() override;
+
+private:
+  CLTransposeConvLayerUpsampleKernel _upsample;
+  ICLTensor *_output;
+};
+}
+#endif /* __ARM_COMPUTE_CLTRANSPOSECONVLAYERUPSAMPLE_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/CPP/functions/CPPUpsampleEx.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CPP/functions/CPPUpsampleEx.h
new file mode 100644
index 000000000..8e7e2f937
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/CPP/functions/CPPUpsampleEx.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_CPPUPSAMPLE_EX_H__
+#define __ARM_COMPUTE_CPPUPSAMPLE_EX_H__
+
+#include "arm_compute/runtime/CPP/ICPPSimpleFunction.h"
+
+#include "arm_compute/core/Types.h"
+
+namespace arm_compute
+{
+class ITensor;
+
+/** Basic function to run @ref CPPUpsample */
+class CPPUpsampleEx : public ICPPSimpleFunction
+{
+public:
+  /** Configure the upsample CPP kernel
+   *
+   * @param[in]  input  The input tensor to upsample. Data types supported: F32/F16/QASYMM8
+   * @param[out] output The output tensor. Data types supported: Same as @p input
+   * @param[in]  info   Padding information
+   */
+  void configure(const ITensor *input, ITensor *output, const PadStrideInfo &info);
+};
+}
+#endif /* __ARM_COMPUTE_CPPUPSAMPLE_EX_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/NEFunctionsEx.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/NEFunctionsEx.h
new file mode 100644
index 000000000..af1adea62
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/NEFunctionsEx.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef __ARM_COMPUTE_NEFUNCTIONSEX_H__
+#define __ARM_COMPUTE_NEFUNCTIONSEX_H__
+
+#include <arm_compute/runtime/NEON/functions/NEArgMinMax.h>
+#include <arm_compute/runtime/NEON/functions/NEBinaryLogicalOperation.h>
+#include <arm_compute/runtime/NEON/functions/NEElementwiseUnaryLayerEx.h>
+#include <arm_compute/runtime/NEON/functions/NEFullyConnectedReshapingLayer.h>
+#include <arm_compute/runtime/NEON/functions/NEPReLU.h>
+#include <arm_compute/runtime/NEON/functions/NEReduceMeanEx.h>
+#include <arm_compute/runtime/NEON/functions/NEReduceSum.h>
+#include <arm_compute/runtime/NEON/functions/NERNNLayerEx.h>
+#include <arm_compute/runtime/NEON/functions/NETransposeConvLayer.h>
+
+#endif // __ARM_COMPUTE_NEFUNCTIONSEX_H__
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEArgMinMax.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEArgMinMax.h
new file mode 100644
index 000000000..604cd93c4
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEArgMinMax.h
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_NEON_ARG_MIN_MAX_H__
+#define __ARM_COMPUTE_NEON_ARG_MIN_MAX_H__
+
+#include "arm_compute/runtime/IFunction.h"
+
+#include "arm_compute/core/NEON/kernels/NEFillBorderKernel.h"
+#include "arm_compute/core/Types.h"
+#include "arm_compute/runtime/MemoryGroup.h"
+#include "arm_compute/runtime/NEON/functions/NEArgMinMaxLayer.h"
+#include "arm_compute/runtime/NEON/functions/NEReshapeLayer.h"
+
+namespace arm_compute
+{
+class ITensor;
+
+/** Basic function to perform reduce min/max operation */
+template <ReductionOperation op> class NEArgMinMaxStatic : public IFunction
+{
+public:
+  /** Constructor */
+  NEArgMinMaxStatic(std::shared_ptr<IMemoryManager> memory_manager = nullptr);
+  /** Configure kernel
+   *
+   * @note Supported tensor rank: up to 4
+   *
+   * @param[in]  input          Source tensor. Data type supported: QASYMM8/F16/F32
+   * @param[in]  axis           Reduction axis.
+   * @param[out] output         Destination tensor. Data type supported: Same as @p input
+   */
+  void configure(ITensor *input, int axis, ITensor *output);
+
+  /** Static function to check if given info will lead to a valid configuration of @ref NEArgMinMax
+   *
+   * @param[in] input          Source tensor. Data type supported: QASYMM8/F16/F32
+   * @param[in] axis Reduction axis.
+   * @param[in] output         Destination tensor. Data type supported: Same as @p input
+   *
+   * @return A status
+   */
+  static Status validate(const ITensorInfo *input, int axis, const ITensorInfo *output);
+
+  // Inherited methods overridden:
+  void run() override;
+
+private:
+  MemoryGroup _memory_group;
+  NEArgMinMaxLayer _reduction_kernel;
+  Tensor _reduced_out;
+  NEReshapeLayer _reshape;
+};
+
+/** Basic function to run arg max. */
+using NEArgMax = NEArgMinMaxStatic<ReductionOperation::ARG_IDX_MAX>;
+/** Basic function to run arg min. */
+using NEArgMin = NEArgMinMaxStatic<ReductionOperation::ARG_IDX_MIN>;
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_NEON_ARG_MIN_MAX_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEBinaryLogicalOperation.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEBinaryLogicalOperation.h
new file mode 100644
index 000000000..2a624656d
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEBinaryLogicalOperation.h
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_NEBINARYLOGICALOPERATION_H__
+#define __ARM_COMPUTE_NEBINARYLOGICALOPERATION_H__
+
+#include "arm_compute/core/TypesEx.h"
+#include "arm_compute/runtime/NEON/INESimpleFunction.h"
+
+namespace arm_compute
+{
+class ITensor;
+
+/** Basic function to run @ref NEBinaryLogicalOperationKernel.
+ *
+ * @note The tensor data type for the inputs must be QASYMM8/U8.
+ * @note The function performs a binary logical operation between two tensors.
+ */
+class NEBinaryLogicalOperation : public INESimpleFunction
+{
+public:
+  /** Initialise the kernel's inputs, output and conversion policy.
+   *
+   * @param[in, out] input1 First tensor input. Data types supported: QASYMM8/U8.
+   * @param[in, out] input2 Second tensor input. Data types supported: Same as @p input1.
+   * @param[out]     output Output tensor. Data types supported: Same as @p input1.
+   * @param[in]      op     Binary Logical Operation to be performed.
+   */
+  void configure(ITensor *input1, ITensor *input2, ITensor *output, BinaryLogicalOperation op);
+  /** Static function to check if given info will lead to a valid configuration of @ref
+   * NEBinaryLogicalOperationKernel
+   *
+   * @param[in] input1 First tensor input info. Data types supported: QASYMM8/U8.
+   * @param[in] input2 Second tensor input info. Data types supported: Same as @p input1.
+   * @param[in] output Output tensor info. Data types supported: Same as @p input1.
+   * @param[in] op     Binary Logical Operation to be performed.
+   *
+   * @return a status
+   */
+  static Status validate(const ITensorInfo *input1, const ITensorInfo *input2,
+                         const ITensorInfo *output, BinaryLogicalOperation op);
+};
+
+/** Basic function to run @ref NEBinaryLogicalOperationKernel
+ *
+ * @note The tensor data type for the inputs must be QASYMM8/U8.
+ * @note The function performs a binary logical operation between two tensors.
+ */
+template <BinaryLogicalOperation op> class NEBinaryLogicalOperationStatic : public INESimpleFunction
+{
+public:
+  /** Initialise the kernel's inputs, output and conversion policy.
+   *
+   * @param[in, out] input1 First tensor input. Data types supported: QASYMM8/U8
+   * @param[in, out] input2 Second tensor input. Data types supported: Same as @p input1.
+   * @param[out]     output Output tensor. Data types supported: Same as @p input1.
+   */
+  void configure(ITensor *input1, ITensor *input2, ITensor *output);
+  /** Static function to check if given info will lead to a valid configuration of @ref
+   * NEBinaryLogicalOperationKernel
+   *
+   * @param[in] input1 First tensor input info. Data types supported: QASYMM8/U8
+   * @param[in] input2 Second tensor input info. Data types supported: Same as @p input1.
+   * @param[in] output Output tensor info. Data types supported: Same as @p input1.
+   *
+   * @return a status
+   */
+  static Status validate(const ITensorInfo *input1, const ITensorInfo *input2,
+                         const ITensorInfo *output);
+};
+
+/** Basic function to run equal comparison. */
+using NELogicalAnd = NEBinaryLogicalOperationStatic<BinaryLogicalOperation::AND>;
+/** Basic function to run not equal comparison. */
+using NELogicalOr = NEBinaryLogicalOperationStatic<BinaryLogicalOperation::OR>;
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_NEBINARYLOGICALOPERATION_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEElementwiseUnaryLayerEx.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEElementwiseUnaryLayerEx.h
new file mode 100644
index 000000000..f0c8ecdb5
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEElementwiseUnaryLayerEx.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_NEELEMENTWISEUNARYLAYEREX_H__
+#define __ARM_COMPUTE_NEELEMENTWISEUNARYLAYEREX_H__
+
+#include "arm_compute/runtime/NEON/INESimpleFunction.h"
+
+namespace arm_compute
+{
+class ITensor;
+
+/** Basic function to perform negative on an input tensor. */
+class NENegLayer : public INESimpleFunction
+{
+public:
+  /** Initialize the function
+   *
+   * @param[in]  input  Input tensor. Data types supported: F16/F32/S32.
+   * @param[out] output Output tensor. Data types supported: same as @p input.
+   */
+  void configure(const ITensor *input, ITensor *output);
+  /** Static function to check if given info will lead to a valid configuration of @ref NERsqrtLayer
+   *
+   * @param[in] input  First tensor input info. Data types supported: F16/F32/S32.
+   * @param[in] output Output tensor info. Data types supported: Same as @p input.
+   *
+   * @return a status
+   */
+  static Status validate(const ITensorInfo *input, const ITensorInfo *output);
+};
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_NEELEMENTWISEUNARYLAYEREX_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEFullyConnectedReshapingLayer.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEFullyConnectedReshapingLayer.h
new file mode 100644
index 000000000..21352ff8b
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEFullyConnectedReshapingLayer.h
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file        NEFullyConnectedReshapingLayer.h
+ * @brief       This file contains NEFullyConnectedReshapingLayer class
+ * @ingroup     COM_AI_RUNTIME
+ */
+
+#ifndef __ARM_COMPUTE_NE_FULLY_CONNECTED_RESHAPING_LAYER_H__
+#define __ARM_COMPUTE_NE_FULLY_CONNECTED_RESHAPING_LAYER_H__
+
+#include <arm_compute/runtime/NEON/functions/NEReshapeLayer.h>
+#include <arm_compute/runtime/NEON/functions/NEFullyConnectedLayer.h>
+#include <arm_compute/runtime/IMemoryManager.h>
+
+namespace arm_compute
+{
+/**
+ * @brief Class to run FullyConnected Layer after reshaping input tensor
+ */
+class NEFullyConnectedReshapingLayer : public arm_compute::IFunction
+{
+public:
+  NEFullyConnectedReshapingLayer(std::shared_ptr<IMemoryManager> memory_manager = nullptr)
+      : _input(nullptr), _weights(nullptr), _biases(nullptr), _output(nullptr), _neon_buffer{},
+        _neon_fc{memory_manager}, _neon_reshape{}, _needs_reshape(false)
+  {
+    // DO NOTHING
+  }
+
+public:
+  /**
+   * @brief Configure the layer
+   * @param[in] input The source tensor
+   * @param[in] weights The tensor that is filled with weight values
+   * @param[in] biases The tensor that is filled with biase values
+   * @param[in] output The destination tensor
+   * @param[in] needs_reshape Whether it needs to be reshaped or not
+   * @param[in] reshape The tensor shape to be reshaped. Only valid when needs_reshape is true.
+   * @return N/A
+   */
+  void configure(const arm_compute::ITensor *input, const arm_compute::ITensor *weights,
+                 const arm_compute::ITensor *biases, arm_compute::ITensor *output,
+                 bool needs_reshape, const arm_compute::TensorShape &reshape);
+
+public:
+  /**
+   * @brief Run the operation. Must be called after configure().
+   * @return N/A
+   */
+  void run(void) override;
+
+private:
+  const arm_compute::ITensor *_input;
+  const arm_compute::ITensor *_weights;
+  const arm_compute::ITensor *_biases;
+  arm_compute::ITensor *_output;
+
+  // buffer for reshaping input tensor
+  arm_compute::Tensor _neon_buffer;
+
+private:
+  arm_compute::NEFullyConnectedLayer _neon_fc;
+  NEReshapeLayer _neon_reshape;
+  bool _needs_reshape;
+};
+} // namespace arm_compute
+
+#endif // __ARM_COMPUTE_NE_FULLY_CONNECTED_RESHAPING_LAYER_H__
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEPReLU.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEPReLU.h
new file mode 100644
index 000000000..5664c57cb
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEPReLU.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_NEPRELU_H__
+#define __ARM_COMPUTE_NEPRELU_H__
+
+#include "arm_compute/runtime/NEON/INESimpleFunctionNoBorder.h"
+
+namespace arm_compute
+{
+class ITensor;
+
+/** Basic function to run @ref NEPReLUKernel */
+class NEPReLU : public INESimpleFunctionNoBorder
+{
+public:
+  /** Initialise the kernel's inputs and output
+   *
+   * @param[in]  input. Data types supported: QASYMM8/F32.
+   * @param[in]  alpha. Data types supported: Same as @p input.
+   * @param[out] output Output tensor. Data types supported: Same as @p input.
+   */
+  void configure(const ITensor *input, const ITensor *alpha, ITensor *output);
+};
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_NEPRELU_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NERNNLayerEx.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NERNNLayerEx.h
new file mode 100644
index 000000000..17c37d806
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NERNNLayerEx.h
@@ -0,0 +1,114 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_NERNNLAYER_EX_H__
+#define __ARM_COMPUTE_NERNNLAYER_EX_H__
+
+#include "arm_compute/core/NEON/kernels/NEActivationLayerKernel.h"
+#include "arm_compute/core/NEON/kernels/NEArithmeticAdditionKernel.h"
+#include "arm_compute/core/NEON/kernels/NECopyKernel.h"
+
+#include "arm_compute/core/Types.h"
+#include "arm_compute/runtime/NEON/functions/NEFullyConnectedLayer.h"
+#include "arm_compute/runtime/NEON/functions/NEGEMM.h"
+
+namespace arm_compute
+{
+// Forward declarations
+class ITensor;
+
+/** Basic function to run @ref NERNNLayerEx */
+class NERNNLayerEx : public IFunction
+{
+public:
+  /** Default constructor */
+  NERNNLayerEx(std::shared_ptr<IMemoryManager> memory_manager = nullptr);
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  NERNNLayerEx(const NERNNLayerEx &) = delete;
+  /** Default move constructor */
+  NERNNLayerEx(NERNNLayerEx &&) = default;
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  NERNNLayerEx &operator=(const NERNNLayerEx &) = delete;
+  /** Default move assignment operator */
+  NERNNLayerEx &operator=(NERNNLayerEx &&) = default;
+  /** Initialize the function
+   *
+   * @param[in]     input             Input is a 2-D tensor of shape [input_size, batch_size]. Data
+   * types supported: F16/F32
+   * @param[in]     weights           Weights tensor of shape [input_size, num_units] that
+   * multiplies the input. Data types supported: Same as @p input
+   * @param[in]     recurrent_weights Weights tensor of shape [num_units, num_units] that multiplies
+   * the current 'state'. Data types supported: Same as @p input
+   * @param[in]     bias              Bias vector of shape [num_units]. Data types supported: Same
+   * as @p input
+   * @param[out]    output            Output tensor of shape [num_units, batch_size]. Data types
+   * supported: Same as @p input
+   * @param[in,out] hidden_state      Output tensor of shape [num_units, batch_size]. Data types
+   * supported: Same as @p input
+   * @param[in]     info              Activation layer parameter.
+   */
+  void configure(const ITensor *input, const ITensor *weights, const ITensor *recurrent_weights,
+                 const ITensor *bias, ITensor *hidden_state, ITensor *output,
+                 ActivationLayerInfo &info);
+  /** Initialize the function
+   *
+   * @param[in] input             Input is a 2-D tensor of shape [input_size, batch_size]. Data
+   * types supported: F16/F32
+   * @param[in] weights           Weights tensor of shape [input_size, num_units] that multiplies
+   * the input. Data types supported: Same as @p input
+   * @param[in] recurrent_weights Weights tensor of shape [num_units, num_units] that multiplies the
+   * current 'state'. Data types supported: Same as @p input
+   * @param[in] bias              Bias vector of shape [num_units]. Data types supported: Same as @p
+   * input
+   * @param[in] output            Output tensor of shape [num_units, batch_size]. Data types
+   * supported: Same as @p input
+   * @param[in] hidden_state      Output tensor of shape [num_units, batch_size]. Data types
+   * supported: Same as @p input
+   * @param[in] info              Activation layer parameter.
+   *
+   * @return a status
+   */
+  static Status validate(const ITensorInfo *input, const ITensorInfo *weights,
+                         const ITensorInfo *recurrent_weights, const ITensorInfo *bias,
+                         const ITensorInfo *hidden_state, const ITensorInfo *output,
+                         const ActivationLayerInfo &info);
+
+  // Inherited methods overridden:
+  void run() override;
+  void prepare() override;
+
+private:
+  MemoryGroup _memory_group;
+  NEGEMM _gemm_state_f;
+  NEArithmeticAdditionKernel _add_kernel;
+  NEActivationLayerKernel _activation_kernel;
+  NEFullyConnectedLayer _fully_connected_kernel;
+  NECopyKernel _copy_kernel;
+  Tensor _fully_connected_out;
+  Tensor _gemm_output;
+  Tensor _add_output;
+  bool _is_prepared;
+};
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_NERNNLAYER_EX_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEReduceMeanEx.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEReduceMeanEx.h
new file mode 100644
index 000000000..7209acf19
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEReduceMeanEx.h
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_NEON_REDUCE_MEAN_EX_H__
+#define __ARM_COMPUTE_NEON_REDUCE_MEAN_EX_H__
+
+#include "arm_compute/runtime/IFunction.h"
+
+#include "arm_compute/core/NEON/kernels/NEFillBorderKernel.h"
+#include "arm_compute/core/Types.h"
+#include "arm_compute/runtime/MemoryGroup.h"
+#include "arm_compute/runtime/NEON/functions/NEReductionOperation.h"
+#include "arm_compute/runtime/NEON/functions/NEReshapeLayer.h"
+
+namespace arm_compute
+{
+class ITensor;
+
+/** Basic function to perform reduce operation */
+class NEReduceMeanEx : public IFunction
+{
+public:
+  /** Constructor */
+  NEReduceMeanEx(std::shared_ptr<IMemoryManager> memory_manager = nullptr);
+  /** Configure kernel
+   *
+   * @note Supported tensor rank: up to 4
+   *
+   * @param[in]  input          Source tensor. Data type supported: QASYMM8/F16/F32
+   * @param[in]  reduction_axis Reduction axis vector.
+   * @param[in]  keep_dims      If positive, retains reduced dimensions with length 1.
+   * @param[out] output         Destination tensor. Data type supported: Same as @p input
+   */
+  void configure(ITensor *input, const Coordinates &reduction_axis, bool keep_dims,
+                 ITensor *output);
+
+  /** Static function to check if given info will lead to a valid configuration of @ref
+   * NEReduceMeanEx
+   *
+   * @param[in] input          Source tensor. Data type supported: QASYMM8/F16/F32
+   * @param[in] reduction_axis Reduction axis vector.
+   * @param[in] keep_dims      If positive, retains reduced dimensions with length 1.
+   * @param[in] output         Destination tensor. Data type supported: Same as @p input
+   *
+   * @return A status
+   */
+  static Status validate(const ITensorInfo *input, const Coordinates &reduction_axis,
+                         bool keep_dims, const ITensorInfo *output);
+
+  // Inherited methods overridden:
+  void run() override;
+
+private:
+  MemoryGroup _memory_group;
+  std::unique_ptr<NEReductionOperation[]> _reduction_kernels{nullptr};
+  std::unique_ptr<Tensor[]> _reduced_outs{nullptr};
+  NEReshapeLayer _reshape;
+  unsigned int _reduction_ops;
+  bool _keep_dims;
+};
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_NEON_REDUCE_MEAN_EX_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEReduceSum.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEReduceSum.h
new file mode 100644
index 000000000..c028ea658
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NEReduceSum.h
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_NEON_REDUCE_SUM_H__
+#define __ARM_COMPUTE_NEON_REDUCE_SUM_H__
+
+#include "arm_compute/runtime/IFunction.h"
+
+#include "arm_compute/core/NEON/kernels/NEFillBorderKernel.h"
+#include "arm_compute/core/Types.h"
+#include "arm_compute/runtime/MemoryGroup.h"
+#include "arm_compute/runtime/NEON/functions/NEReductionOperation.h"
+#include "arm_compute/runtime/NEON/functions/NEReshapeLayer.h"
+
+namespace arm_compute
+{
+class ITensor;
+
+/** Basic function to perform reduce operation */
+class NEReduceSum : public IFunction
+{
+public:
+  /** Constructor */
+  NEReduceSum(std::shared_ptr<IMemoryManager> memory_manager = nullptr);
+  /** Configure kernel
+   *
+   * @note Supported tensor rank: up to 4
+   *
+   * @param[in]  input          Source tensor. Data type supported: QASYMM8/F16/F32
+   * @param[in]  reduction_axis Reduction axis vector.
+   * @param[in]  keep_dims      If positive, retains reduced dimensions with length 1.
+   * @param[out] output         Destination tensor. Data type supported: Same as @p input
+   */
+  void configure(ITensor *input, const Coordinates &reduction_axis, bool keep_dims,
+                 ITensor *output);
+
+  /** Static function to check if given info will lead to a valid configuration of @ref NEReduceSum
+   *
+   * @param[in] input          Source tensor. Data type supported: QASYMM8/F16/F32
+   * @param[in] reduction_axis Reduction axis vector.
+   * @param[in] keep_dims      If positive, retains reduced dimensions with length 1.
+   * @param[in] output         Destination tensor. Data type supported: Same as @p input
+   *
+   * @return A status
+   */
+  static Status validate(const ITensorInfo *input, const Coordinates &reduction_axis,
+                         bool keep_dims, const ITensorInfo *output);
+
+  // Inherited methods overridden:
+  void run() override;
+
+private:
+  MemoryGroup _memory_group;
+  std::vector<NEReductionOperation> _reduction_kernels;
+  std::vector<Tensor> _reduced_outs;
+  NEReshapeLayer _reshape;
+  unsigned int _reduction_ops;
+  bool _keep_dims;
+};
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_NEON_REDUCE_SUM_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NETransposeConvLayer.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NETransposeConvLayer.h
new file mode 100644
index 000000000..a50b9ea60
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/NEON/functions/NETransposeConvLayer.h
@@ -0,0 +1,162 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_NETRANSPOSECONVLAYER_H__
+#define __ARM_COMPUTE_NETRANSPOSECONVLAYER_H__
+
+#include "arm_compute/runtime/CPP/functions/CPPUpsampleEx.h"
+#include "arm_compute/runtime/NEON/functions/NEConvolutionLayer.h"
+#include "arm_compute/runtime/NEON/functions/NEDirectConvolutionLayer.h"
+#include "arm_compute/runtime/NEON/functions/NEPermute.h"
+
+#include "arm_compute/core/CPP/kernels/CPPFlipWeightsKernel.h"
+#include "arm_compute/core/Types.h"
+#include "arm_compute/runtime/IFunction.h"
+#include "arm_compute/runtime/IMemoryManager.h"
+#include "arm_compute/runtime/MemoryGroup.h"
+#include "arm_compute/runtime/Tensor.h"
+
+#include <memory>
+
+namespace arm_compute
+{
+/** Function to run the deconvolution layer.
+ *
+ * Transpose convolution Layer is the backward pass of Convolution Layer. First we transform the
+ * input depending on the stride and pad info and then perfrom a 1x1
+ * convolution pass. Input stride defines how many zeroes we should put between each element of the
+ * input, pad is the amount of padding and finaly a is a user
+ * specified value where a < stride - 1 that increases the padding top and right of the input image.
+ *
+ *  The relation between input to output is as follows:
+ *  \f[
+ *       width\_output = (width\_input - 1) \cdot stride\_x - 2 \cdot padding\_x + kernel\_x
+ *  \f]
+ *  \f[
+ *       height\_output = (height\_input - 1) \cdot stride\_y - 2 \cdot padding\_y + kernel\_y
+ *  \f]
+ *
+ *  where
+ *      width is the size of the first input dimension.
+ *      height is the size of the second input dimension.
+ *      width_output is the size of the first output dimension.
+ *      height_output is the size of the second output dimension.
+ *      kernel_x and kernel_y are the convolution sizes in x and y.
+ *      stride_x and stride_y is the input stride of the first and second dimension.
+ *
+ * The weights used by Transpose convolution are supposed to be the same as the ones used for
+ * Convolution. Therefore, it will be necessary to use the weights in the
+ * reverse order to perform an actual convolution. This is achieved by using the @ref
+ * CPPFlipWeightsKernel.
+ *
+ * This function calls the following NEON kernels/functions:
+ *
+ * -# @ref CPPUpsample
+ * -# @ref NEConvolutionLayer
+ *
+ */
+class NETransposeConvLayer : public IFunction
+{
+public:
+  /** Default constructor */
+  NETransposeConvLayer(std::shared_ptr<IMemoryManager> memory_manager = nullptr);
+
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  NETransposeConvLayer(const NETransposeConvLayer &) = delete;
+  /** Prevent instances of this class from being copied (As this class contains pointers) */
+  NETransposeConvLayer &operator=(const NETransposeConvLayer &) = delete;
+  /** Allow instances of this class to be moved */
+  NETransposeConvLayer(NETransposeConvLayer &&) = default;
+  /** Allow instances of this class to be moved */
+  NETransposeConvLayer &operator=(NETransposeConvLayer &&) = default;
+  /** Default destructor */
+  virtual ~NETransposeConvLayer() = default;
+
+  /** Set the input, weights, biases and output tensors.
+   *
+   * @param[in,out] input   Input tensor. 3 lower dimensions represent a single input, and an
+   * optional 4th dimension for batch of inputs. Data types supported: F32/F16/QASYMM8.
+   * @param[in]     weights The 4d weights with dimensions [width, height, IFM, OFM]. Data type
+   * supported: Same as @p input.
+   * @param[in]     bias    Optional, ignored if NULL. The biases have one dimension. Data type
+   * supported: Data types supported: S32 for QASYMM8 input, F32 for F32 input, F16 for F16 input.
+   * @param[out]    output  Output tensor. The output has the same number of dimensions as the @p
+   * input.
+   * @param[in]     info    Contains padding and policies to be used in the deconvolution, this is
+   * decribed in @ref PadStrideInfo.
+   * @param[in]     invalid_right  The number of zeros added to right edge of the output.
+   * @param[in]     invalid_bottom The number of zeros added to top edge of the output.
+   *
+   */
+  void configure(ITensor *input, const ITensor *weights, const ITensor *bias, ITensor *output,
+                 const PadStrideInfo &info, unsigned int invalid_right,
+                 unsigned int invalid_bottom);
+  /** Static function to check if given info will lead to a valid configuration of @ref
+   * NETransposeConvLayer
+   *
+   * @param[in] input   Input tensor info. 3 lower dimensions represent a single input, and an
+   * optional 4th dimension for batch of inputs. Data types supported: F32/F16/QASYMM8.
+   * @param[in] weights The 4d weights info with dimensions [width, height, IFM, OFM]. Data type
+   * supported: Same as @p input.
+   * @param[in] bias    (Optional) The biases have one dimension. Data type supported: Data types
+   * supported: S32 for QASYMM8 input, F32 for F32 input, F16 for F16 input.
+   * @param[in] output  Output tensor info. The output has the same number of dimensions as the @p
+   * input.
+   * @param[in] info    Contains padding and policies to be used in the deconvolution, this is
+   * decribed in @ref PadStrideInfo.
+   * @param[in] innvalid_right  The number of zeros added to right edge of the output.
+   * @param[in] invalid_bottom  The number of zeros added to top edge of the output.
+   *
+   * @return a status
+   */
+  static Status validate(const ITensorInfo *input, const ITensorInfo *weights,
+                         const ITensorInfo *bias, const ITensorInfo *output,
+                         const PadStrideInfo &info, unsigned int invalid_right,
+                         unsigned int invalid_bottom);
+
+  // Inherited methods overridden:
+  void run() override;
+  void prepare() override;
+
+private:
+  MemoryGroup _memory_group;
+  NEConvolutionLayer _conv_f;
+  CPPUpsampleEx _upsample_f;
+  CPPFlipWeightsKernel _flip_weights;
+  NEPermute _permute_input;
+  NEPermute _permute_weights;
+  NEPermute _permute_output;
+  Tensor _scaled_output;
+  Tensor _weights_flipped;
+  Tensor _permuted_input;
+  Tensor _permuted_weights;
+  Tensor _permuted_output;
+  bool _is_nchw;
+  const ITensor *_original_weights;
+  ITensor *_input;
+  PadStrideInfo _info;
+  bool _is_prepared;
+};
+} // arm_compute
+#endif /* __ARM_COMPUTE_NETRANSPOSECONVLAYER_H__ */
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/misc/functions/GenericGather.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/misc/functions/GenericGather.h
new file mode 100644
index 000000000..3db0c7e5e
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/misc/functions/GenericGather.h
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file        GenericGather.h
+ * @brief       This file contains GenericGather class
+ * @ingroup     COM_AI_RUNTIME
+ */
+
+#ifndef __ARM_COMPUTE_MISC_GENERIC_GATHER_H__
+#define __ARM_COMPUTE_MISC_GENERIC_GATHER_H__
+
+#include <arm_compute/runtime/Tensor.h>
+#include <arm_compute/runtime/CL/CLTensor.h>
+
+#include <arm_compute/runtime/CL/functions/CLPermute.h>
+#include <arm_compute/runtime/CL/functions/CLGatherEx.h>
+
+#include "Utils.h"
+
+namespace arm_compute
+{
+namespace misc
+{
+
+/**
+ * @brief Class to run Gather with both CPU and GPU
+ */
+class GenericGather : public arm_compute::IFunction
+{
+public:
+  GenericGather(void)
+  {
+    // DO NOTHING
+  }
+
+public:
+  /**
+   * @brief Configure the layer
+   * @param[in] input The source tensor
+   * @param[in] indices The indices tensor
+   * @param[in] output The destination tensor
+   * @param[in] axis (Optional) The axis in input to gather indices from
+   * @return N/A
+   */
+  void configure(arm_compute::ITensor *input, arm_compute::ITensor *indices,
+                 arm_compute::ITensor *output, int axis = 0);
+
+public:
+  /**
+   * @brief Run the operation. Must be called after configure().
+   * @return N/A
+   */
+  void run(void) override;
+
+private:
+  arm_compute::ITensor *_input{nullptr};
+  arm_compute::ITensor *_indices{nullptr};
+  arm_compute::ITensor *_output{nullptr};
+  int _axis{0};
+  arm_compute::CLTensor _cl_permuted;
+
+private:
+  arm_compute::CLPermute _cl_permute;
+  arm_compute::CLGatherEx _cl_gather;
+};
+
+} // namespace misc
+} // namespace arm_compute
+
+#endif // __ARM_COMPUTE_MISC_GENERIC_GATHER_H__
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/misc/functions/GenericReshapeLayer.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/misc/functions/GenericReshapeLayer.h
new file mode 100644
index 000000000..ab2fdc71d
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/misc/functions/GenericReshapeLayer.h
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file        GenericReshapeLayer.h
+ * @brief       This file contains GenericReshapeLayer class
+ * @ingroup     COM_AI_RUNTIME
+ */
+
+#ifndef __ARM_COMPUTE_MISC_GENERIC_RESHAPE_LAYER_H__
+#define __ARM_COMPUTE_MISC_GENERIC_RESHAPE_LAYER_H__
+
+#include <arm_compute/runtime/Tensor.h>
+#include <arm_compute/runtime/CL/CLTensor.h>
+
+#include <arm_compute/runtime/CL/functions/CLPermute.h>
+#include <arm_compute/runtime/CL/functions/CLReshapeLayer.h>
+#include <arm_compute/runtime/NEON/functions/NEPermute.h>
+#include <arm_compute/runtime/NEON/functions/NEReshapeLayer.h>
+
+#include "Utils.h"
+
+namespace arm_compute
+{
+namespace misc
+{
+
+/**
+ * @brief Class to run Reshape Layer with both CPU and GPU
+ */
+class GenericReshapeLayer : public arm_compute::IFunction
+{
+public:
+  GenericReshapeLayer(void)
+      : _input(nullptr), _output(nullptr), _cl_permuted{}, _neon_permuted{}, _cl_permute{},
+        _cl_reshape{}, _neon_permute{}, _neon_reshape{}
+  {
+    // DO NOTHING
+  }
+
+public:
+  /**
+   * @brief Configure the layer
+   * @param[in] input The source tensor
+   * @param[in] output The destination tensor
+   * @return N/A
+   */
+  void configure(const arm_compute::ITensor *input, arm_compute::ITensor *output);
+
+public:
+  /**
+   * @brief Run the operation. Must be called after configure().
+   * @return N/A
+   */
+  void run(void) override;
+
+private:
+  const arm_compute::ITensor *_input;
+  arm_compute::ITensor *_output;
+  arm_compute::CLTensor _cl_permuted;
+  arm_compute::Tensor _neon_permuted;
+
+private:
+  arm_compute::CLPermute _cl_permute;
+  arm_compute::CLReshapeLayer _cl_reshape;
+
+  arm_compute::NEPermute _neon_permute;
+  arm_compute::NEReshapeLayer _neon_reshape;
+};
+
+} // namespace misc
+} // namespace arm_compute
+
+#endif // __ARM_COMPUTE_MISC_GENERIC_RESHAPE_LAYER_H__
diff --git a/runtimes/libs/ARMComputeEx/arm_compute/runtime/misc/functions/Utils.h b/runtimes/libs/ARMComputeEx/arm_compute/runtime/misc/functions/Utils.h
new file mode 100644
index 000000000..53736f55f
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/arm_compute/runtime/misc/functions/Utils.h
@@ -0,0 +1,112 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file utils.h
+ * @ingroup COM_AI_RUNTIME
+ * @brief This file contains utils for arm compute library
+ */
+#ifndef __ARM_COMPUTE_MISC_UTILS_H__
+#define __ARM_COMPUTE_MISC_UTILS_H__
+
+#include <string>
+#include <cassert>
+#include <arm_compute/runtime/CL/CLTensor.h>
+
+#include <arm_compute/core/Coordinates.h>
+#include <arm_compute/core/TensorInfo.h>
+#include <arm_compute/core/TensorShape.h>
+#include <arm_compute/core/Types.h>
+
+// TODO : It should be extracted to independent module.
+
+namespace arm_compute
+{
+namespace misc
+{
+namespace utils
+{
+
+/**
+ * @brief Check if this runtime runs on GPU or NEON
+ * @return @c true if GPU mode, otherwise @c false
+ */
+bool isGpuMode();
+
+#ifndef CAST_CL
+#define CAST_CL(tensor) static_cast<::arm_compute::CLTensor *>(tensor)
+#endif
+
+#ifndef CAST_NE
+#define CAST_NE(tensor) static_cast<::arm_compute::Tensor *>(tensor)
+#endif
+
+/**
+* @brief      Generate arm compute permutation vector from runtime permutation vector
+* @param[in]  rank                 Rank number supported upto 4
+* @param[in]  runtime_pv           Integer array for runtime permutation vector
+* @return     Permutation vector of arm compute
+*/
+arm_compute::PermutationVector getARMComputePermutationVector(uint32_t rank,
+                                                              const int32_t *runtime_pv);
+
+/**
+ * @brief       Set value to arm compute tensor with casting
+ * @param[in]   value Value to set
+ * @param[out]  to    Target tensor of arm compute
+ * @param[in]   id    Position of element
+ * @return      N/A
+ */
+template <typename FromT>
+void copyCast(const FromT value, arm_compute::ITensor *to, const arm_compute::Coordinates &id)
+{
+  switch (to->info()->data_type())
+  {
+    case arm_compute::DataType::F32:
+    {
+      *reinterpret_cast<float *>(to->ptr_to_element(id)) = static_cast<float>(value);
+      break;
+    }
+    case arm_compute::DataType::S32:
+    {
+      *reinterpret_cast<int32_t *>(to->ptr_to_element(id)) = static_cast<int32_t>(value);
+      break;
+    }
+    case arm_compute::DataType::U32:
+    {
+      *reinterpret_cast<uint32_t *>(to->ptr_to_element(id)) = static_cast<uint32_t>(value);
+      break;
+    }
+    case arm_compute::DataType::QASYMM8:
+    {
+      float realValue = static_cast<float>(value);
+      // NOTE We haven't known the policy of rounding for quantization.
+      //      So this is set to a temporary value.
+      *(to->ptr_to_element(id)) =
+          to->info()->quantization_info().quantize(realValue, arm_compute::RoundingPolicy::TO_ZERO);
+      break;
+    }
+    default:
+      throw std::runtime_error("Not supported, yet");
+      break;
+  }
+}
+
+} // namespace utils
+} // namespace misc
+} // namespace arm_compute
+
+#endif // __ARM_COMPUTE_MISC_UTILS_H__
diff --git a/libs/ARMComputeEx/resolve_includes.py b/runtimes/libs/ARMComputeEx/resolve_includes.py
index b3e252892..b3e252892 100644
--- a/libs/ARMComputeEx/resolve_includes.py
+++ b/runtimes/libs/ARMComputeEx/resolve_includes.py
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/CLKernelLibrary.cpp b/runtimes/libs/ARMComputeEx/src/core/CL/CLKernelLibrary.cpp
new file mode 100644
index 000000000..808125645
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/CLKernelLibrary.cpp
@@ -0,0 +1,354 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/core/CL/CLKernelLibrary.h"
+#include "arm_compute/core/CL/CLKernelLibraryEx.h"
+
+#include "arm_compute/core/CL/CLHelpers.h"
+#include "arm_compute/core/Error.h"
+#include "arm_compute/core/Utils.h"
+
+#include <algorithm>
+#include <fstream>
+#include <iostream>
+#include <utility>
+#include <vector>
+
+using namespace arm_compute;
+
+const std::map<std::string, std::string> CLKernelLibraryEx::_kernel_program_map = {
+    // ARMComputeEx kernels
+    {"arg_op", "arg_operation.cl"},
+    {"arithmetic_add_qasymm8", "arithmetic_op_quantized.cl"},
+    {"binary_logical_op", "binary_logical_op.cl"},
+    {"cast", "cast.cl"},
+    {"cast_qasymm_in", "cast.cl"},
+    {"cast_qasymm_out", "cast.cl"},
+    {"comparison_op", "comparison_op.cl"},
+    {"comparison_op_qasymm8", "comparison_op_quantized.cl"},
+    {"depth_to_space_nchw", "depth_to_space.cl"},
+    {"depth_to_space_nhwc", "depth_to_space.cl"},
+    {"embedding_lookup", "embedding_lookup.cl"},
+    {"gather_ex", "gather_ex.cl"},
+    {"gather_ex_1d", "gather_ex.cl"},
+    {"gather_ex_1d_out", "gather_ex.cl"},
+    {"hashtable_lookup", "hashtable_lookup.cl"},
+    {"neg_tensor", "neg_tensor.cl"},
+    {"permute_generic", "permute_ex.cl"},
+    {"pixelwise_mul_qasymm8", "pixelwise_mul_quantized.cl"},
+    {"prelu", "prelu.cl"},
+    {"prelu_qasymm8", "prelu_quantized.cl"},
+    {"reduce_min_max", "reduce_operation.cl"},
+    {"reduce_sum_mean", "reduce_operation.cl"},
+    {"topkv2_init", "topkv2.cl"},
+    {"topkv2_find_first_negative", "topkv2.cl"},
+    {"topkv2_reorder_negatives", "topkv2.cl"},
+    {"topkv2_store", "topkv2.cl"},
+    {"radixsort_histogram", "topkv2_radixsort.cl"},
+    {"radixsort_scanhistograms", "topkv2_radixsort.cl"},
+    {"radixsort_pastehistograms", "topkv2_radixsort.cl"},
+    {"radixsort_reorder", "topkv2_radixsort.cl"},
+    {"topkv2_quicksort", "topkv2_quicksort.cl"},
+    {"space_to_batch_4d_nchw", "space_to_batch.cl"},
+    {"space_to_batch_4d_nhwc", "space_to_batch.cl"},
+    {"space_to_depth_nchw", "space_to_depth.cl"},
+    {"space_to_depth_nhwc", "space_to_depth.cl"},
+};
+
+const std::map<std::string, std::string> CLKernelLibraryEx::_program_source_map = {
+#ifdef EMBEDDED_KERNELS
+    {
+        "arg_operation.cl",
+#include "./cl_kernels/arg_operation.clembed"
+    },
+    {
+        "cast.cl",
+#include "./cl_kernels/cast.clembed"
+    },
+    {
+        "embedding_lookup.cl",
+#include "./cl_kernels/embedding_lookup.clembed"
+    },
+    {
+        "depth_to_space.cl",
+#include "./cl_kernels/depth_to_space.clembed"
+    },
+    {
+        "gather_ex.cl",
+#include "./cl_kernels/gather_ex.clembed"
+    },
+    {
+        "hashtable_lookup.cl",
+#include "./cl_kernels/hashtable_lookup.clembed"
+    },
+    {
+        "helpers.h",
+#include "./cl_kernels/helpers.hembed"
+    },
+    {
+        "helpers_asymm.h",
+#include "./cl_kernels/helpers_asymm.hembed"
+    },
+    {
+        "binary_logical_op.cl",
+#include "./cl_kernels/binary_logical_op.clembed"
+    },
+    {
+        "neg_tensor.cl",
+#include "./cl_kernels/neg_tensor.clembed"
+    },
+    {
+        "prelu.cl",
+#include "./cl_kernels/prelu.clembed"
+    },
+    {
+        "prelu_quantized.cl",
+#include "./cl_kernels/prelu_quantized.clembed"
+    },
+    {
+        "reduce_operation.cl",
+#include "./cl_kernels/reduce_operation.clembed"
+    },
+    {
+        "space_to_batch.cl",
+#include "./cl_kernels/space_to_batch.clembed"
+    },
+    {
+        "space_to_depth.cl",
+#include "./cl_kernels/space_to_depth.clembed"
+    },
+    {
+        "topkv2.cl",
+#include "./cl_kernels/topkv2.clembed"
+    },
+    {
+        "topkv2_radixsort.cl",
+#include "./cl_kernels/topkv2_radixsort.clembed"
+    },
+    {
+        "topkv2_quicksort.cl",
+#include "./cl_kernels/topkv2_quicksort.clembed"
+    },
+
+#endif /* EMBEDDED_KERNELS */
+};
+
+CLKernelLibraryEx::CLKernelLibraryEx()
+    : _context(), _device(), _kernel_path("."), _programs_map(), _built_programs_map()
+{
+  opencl_is_available(); // Make sure the OpenCL symbols are initialised *before* the
+                         // CLKernelLibraryEx is built
+}
+
+CLKernelLibraryEx &CLKernelLibraryEx::get()
+{
+  static CLKernelLibraryEx _kernel_library;
+  return _kernel_library;
+}
+
+Kernel CLKernelLibraryEx::create_kernel(const std::string &kernel_name,
+                                        const StringSet &build_options_set) const
+{
+  // Find which program contains the kernel
+  auto kernel_program_it = _kernel_program_map.find(kernel_name);
+
+  if (_kernel_program_map.end() == kernel_program_it)
+  {
+    ARM_COMPUTE_ERROR("Kernel %s not found in the CLKernelLibrary", kernel_name.c_str());
+  }
+  std::string concat_str;
+
+  if (fp16_supported())
+  {
+    concat_str += " -DARM_COMPUTE_OPENCL_FP16_ENABLED=1 ";
+  }
+
+  if (get_cl_version(_device) == CLVersion::CL20)
+  {
+    concat_str += " -cl-std=CL2.0 ";
+  }
+  else if (arm_non_uniform_workgroup_supported(_device))
+  {
+    concat_str += " -cl-arm-non-uniform-work-group-size ";
+  }
+  else
+  {
+    ARM_COMPUTE_ERROR("Non uniform workgroup size is not supported!!");
+  }
+
+  // Check if the program has been built before with same build options.
+  const std::string program_name = kernel_program_it->second;
+  const std::string build_options = stringify_set(build_options_set) + concat_str;
+
+  const std::string built_program_name = program_name + "_" + build_options;
+  auto built_program_it = _built_programs_map.find(built_program_name);
+
+  cl::Program cl_program;
+
+  if (_built_programs_map.end() != built_program_it)
+  {
+    // If program has been built, retrieve to create kernel from it
+    cl_program = built_program_it->second;
+  }
+  else
+  {
+    // Get program
+    Program program = load_program(program_name);
+
+    // Build program
+    cl_program = program.build(build_options);
+
+    // Add built program to internal map
+    _built_programs_map.emplace(built_program_name, cl_program);
+  }
+
+  // Create and return kernel
+  return Kernel(kernel_name, cl_program);
+}
+
+void CLKernelLibraryEx::add_built_program(const std::string &built_program_name,
+                                          cl::Program program)
+{
+  _built_programs_map.emplace(built_program_name, program);
+}
+
+bool CLKernelLibraryEx::fp16_supported() const { return ::fp16_supported(_device); }
+
+bool CLKernelLibraryEx::int64_base_atomics_supported() const
+{
+  return device_supports_extension(_device, "cl_khr_int64_base_atomics");
+}
+
+const Program &CLKernelLibraryEx::load_program(const std::string &program_name) const
+{
+  const auto program_it = _programs_map.find(program_name);
+
+  if (program_it != _programs_map.end())
+  {
+    return program_it->second;
+  }
+
+  Program program;
+
+#ifdef EMBEDDED_KERNELS
+  const auto program_source_it = _program_source_map.find(program_name);
+
+  if (_program_source_map.end() == program_source_it)
+  {
+    ARM_COMPUTE_ERROR("Embedded program for %s does not exist.", program_name.c_str());
+  }
+
+  program = Program(_context, program_name, program_source_it->second);
+#else  /* EMBEDDED_KERNELS */
+  // Check for binary
+  std::string source_name = _kernel_path + program_name;
+  std::string binary_name = source_name + "bin";
+
+  if (std::ifstream(binary_name).is_open())
+  {
+    const std::string program_binary = read_file(binary_name, true);
+    program = Program(_context, _device, program_name,
+                      std::vector<unsigned char>(program_binary.begin(), program_binary.end()));
+  }
+  else if (std::ifstream(source_name).is_open())
+  {
+    program = Program(_context, program_name, read_file(source_name, false));
+  }
+  else
+  {
+    ARM_COMPUTE_ERROR("Kernel file %s does not exist.", source_name.c_str());
+  }
+#endif /* EMBEDDED_KERNELS */
+
+  // Insert program to program map
+  const auto new_program = _programs_map.emplace(program_name, std::move(program));
+
+  return new_program.first->second;
+}
+
+std::string CLKernelLibraryEx::stringify_set(const StringSet &s) const
+{
+  std::string concat_set;
+
+#ifndef EMBEDDED_KERNELS
+  concat_set += "-I" + _kernel_path + " ";
+#endif /* EMBEDDED_KERNELS */
+
+  // Concatenate set
+  for (const auto &el : s)
+  {
+    concat_set += " " + el;
+  }
+
+  return concat_set;
+}
+
+std::string CLKernelLibraryEx::get_program_source(const std::string &program_name)
+{
+  const auto program_source_it = _program_source_map.find(program_name);
+
+  if (program_source_it == _program_source_map.end())
+  {
+    ARM_COMPUTE_ERROR("Embedded program for %s does not exist.", program_name.c_str());
+  }
+
+  return program_source_it->second;
+}
+
+size_t CLKernelLibraryEx::max_local_workgroup_size(const cl::Kernel &kernel) const
+{
+  size_t result;
+
+  size_t err = kernel.getWorkGroupInfo(_device, CL_KERNEL_WORK_GROUP_SIZE, &result);
+  ARM_COMPUTE_ERROR_ON_MSG(
+      err != 0,
+      "clGetKernelWorkGroupInfo failed to return the maximum workgroup size for the kernel");
+  ARM_COMPUTE_UNUSED(err);
+
+  return result;
+}
+
+cl::NDRange CLKernelLibraryEx::default_ndrange() const
+{
+  //    GPUTarget   _target = get_target_from_device(_device);
+  cl::Device device = cl::Device::getDefault();
+  GPUTarget _target = get_target_from_device(device);
+  cl::NDRange default_range;
+
+  switch (_target)
+  {
+    case GPUTarget::MIDGARD:
+    case GPUTarget::T600:
+    case GPUTarget::T700:
+    case GPUTarget::T800:
+      default_range = cl::NDRange(128u, 1);
+      break;
+    default:
+      default_range = cl::NullRange;
+  }
+
+  return default_range;
+}
+
+std::string CLKernelLibraryEx::get_device_version() { return _device.getInfo<CL_DEVICE_VERSION>(); }
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/arg_operation.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/arg_operation.cl
new file mode 100644
index 000000000..2a6dfc91f
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/arg_operation.cl
@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "helpers.h"
+
+#if defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(OP_CODE)
+/** Perform arg_max/arg_min
+ *
+ * @note Datatype should be given as a preprocessor argument using -DDATA_TYPE=type.
+ *       e.g. -DDATA_TYPE=short
+ * @attention Output tensor depth should be given as a preprocessor argument using -DDEPTH_OUT=size.
+ *            e.g. -DDEPTH_OUT=16
+ * @attention Operation type(code) specifying which operation to perform should be passed as
+ *            preprocessor argument using -DOP_CODE = number. e.g. -DOP_CODE=1
+ *
+ * @param[in]  input_ptr                            Pointer to the source image. Supported data
+ * types:
+ *                                                  U8/QASYMM8/S8/U16/S16/F16/U32/S32/F32
+ * @param[in]  input_stride_x                       Stride of the source image in X dimension
+ *                                                  (in bytes)
+ * @param[in]  input_step_x                         input_stride_x * number of elements along X
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_stride_y                       Stride of the source image in Y dimension
+ *                                                  (in bytes)
+ * @param[in]  input_step_y                         input_stride_y * number of elements along Y
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension
+ *                                                  (in bytes)
+ * @param[in]  input_step_z                         input_stride_z * number of elements along Z
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_offset_first_element_in_bytes  The offset of the first element
+ *                                                  in the source image
+ * @param[in]  input_stride_w                       Stride of the source tensor in W dimension
+ *                                                  (in bytes)
+ * @param[in]  input_step_w                         output_stride_w * number of elements along W
+ *                                                  processed per workitem(in bytes)
+ * @param[out] output_ptr                           Pointer to the destination image.
+ *                                                  Supported data types: U32
+ * @param[in]  output_stride_x                      Stride of the destination image in X dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_x                        output_stride_x * number of elements along X
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_y                      Stride of the destination image in Y dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_y                        output_stride_y * number of elements along Y
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_z                        output_stride_z * number of elements along Z
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_w                      Stride of the source tensor in W dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_w                        output_stride_w * number of elements along W
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the
+ *                                                  destination image
+ * @param[in]  axis                                 Axis through which reduction occurs
+ * @param[in]  dim                                  Dimension across the axis to be reduced.
+ */
+
+__kernel void arg_op(TENSOR4D_DECLARATION(input), TENSOR4D_DECLARATION(output), const int axis,
+                     const int dim)
+{
+  Tensor4D in = CONVERT_TO_TENSOR4D_STRUCT(input, 0);
+  Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, DEPTH_OUT);
+
+  int indices[4] = {
+      get_global_id(0), get_global_id(1), get_global_id(2) % DEPTH_OUT,
+      get_global_id(2) / DEPTH_OUT,
+  };
+
+  DATA_TYPE value =
+      *((__global DATA_TYPE *)tensor4D_offset(&in, indices[0], indices[1], indices[2], indices[3]));
+  DATA_TYPE tval = value;
+  int idx = 0;
+  for (int i = 1; i < dim; ++i)
+  {
+    indices[axis] = i;
+
+#if OP_CODE == 1 // ArgMax
+    value = max(value, *((__global DATA_TYPE *)tensor4D_offset(&in, indices[0], indices[1],
+                                                               indices[2], indices[3])));
+#elif OP_CODE == 2 // ArgMin
+    value = min(value, *((__global DATA_TYPE *)tensor4D_offset(&in, indices[0], indices[1],
+                                                               indices[2], indices[3])));
+#else
+    return;
+
+#endif
+
+    if (tval != value)
+    {
+      idx = indices[axis];
+      tval = value;
+    }
+  }
+
+  *((__global uint *)out.ptr) = idx;
+}
+#endif // defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(OP_CODE)
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/arithmetic_op_quantized.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/arithmetic_op_quantized.cl
new file mode 100644
index 000000000..77e239f55
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/arithmetic_op_quantized.cl
@@ -0,0 +1,167 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016, 2017 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "helpers_asymm.h"
+
+#ifdef SATURATE
+#define ADD(x, y) add_sat((x), (y))
+#define SUB(x, y) sub_sat((x), (y))
+#else /* SATURATE */
+#define ADD(x, y) (x) + (y)
+#define SUB(x, y) (x) - (y)
+#endif /* SATURATE */
+
+/** Performs a pixelwise addition used to quantize down the int32 accumulator values of GEMMLowp to
+ *  QASYMM8
+ *
+ * The following computations will be performed:
+ *
+ *  -# Add offset terms to inputs
+    -# Get scaled value of two inputs
+ *  -# Add inputs
+ *  -# Add offset terms to final result
+ *  -# Multiply each entry of result by result_mult_int
+ *  -# Shift the int32 accumulator by result_shift
+ *  -# Clamp the resulting int32 values to the [0..255] range and cast to QASYMM8.
+ *
+ * @attention The inputs and output data types need to be passed at compile time using
+ *            -DDATA_TYPE_IN1, -DDATA_TYPE_IN2 and -DDATA_TYPE_OUT:
+ *            e.g. -DDATA_TYPE_IN1=uchar -DDATA_TYPE_IN2=uchar -DDATA_TYPE_OUT=uchar
+ * @attention The number of bits to shift left of input tensors must be passed at compile time using
+ *            -DLEFT_SHIFT
+ * @attention The offset, scalar scale factor and number of bits to shift right of input tensors
+ *            must be passed at compile time using -DIN1_OFFSET, -RIN1_MULT_INT, -DIN1_SHIFT,
+ -DIN2_OFFSET,
+ *            -RIN2_MULT_INT and -DIN2_SHIFT
+ * @attention The offset, scalar scale factor and number of bits to shift right of output tensor
+ *            must be passed at compile time using -DRESULT_OFFSET, -RESULT_MULT_INT and
+ -DRESULT_SHIFT
+ *
+ * @attention The input and output data_types need to be passed at compile time using
+ *            -DDATA_TYPE_IN1, -DDATA_TYPE_IN2 and -DDATA_TYPE_OUT:
+ *            e.g. -DDATA_TYPE_IN1=uchar -DDATA_TYPE_IN2=uchar -DDATA_TYPE_OUT=uchar
+ * @attention The inputs and output scale information of qasymm8 need to be passed at compile time
+ *            using -DSCALE_IN1, -DSCALE_IN2 and -DSCALE_OUT:
+ *            e.g. -DSCALE_IN1=1.f -DSCALE_IN2=1.f -DSCALE_OUT=2.f
+ * @attention The inputs and output scale offset need to be passed at compile time using
+ *            -DOFFSET_IN1, -DOFFSET_IN2 and -DOFFSET_OUT:
+ *            e.g. -DOFFSET_IN1=0 -DOFFSET_IN2=0 -DOFFSET_OUT=0
+ * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g.
+ *            -DVEC_SIZE=16
+ * @attention To perform saturating operation -DSATURATE has to be passed to the compiler otherwise
+ *            wrapping policy will be used.
+ *
+ * @param[in]  in1_ptr                           Pointer to the source tensor.
+ *                                               Supported data types: QASYMM8
+ * @param[in]  in1_stride_x                      Stride of the source tensor in X dimension
+ *                                               (in bytes)
+ * @param[in]  in1_step_x                        in1_stride_x * number of elements along X processed
+ *                                               per workitem(in bytes)
+ * @param[in]  in1_stride_y                      Stride of the source tensor in Y dimension
+ *                                               (in bytes)
+ * @param[in]  in1_step_y                        in1_stride_y * number of elements along Y processed
+ *                                               per workitem(in bytes)
+ * @param[in]  in1_stride_z                      Stride of the source tensor in Z dimension
+ *                                               (in bytes)
+ * @param[in]  in1_step_z                        in1_stride_z * number of elements along Z processed
+ *                                               per workitem(in bytes)
+ * @param[in]  in1_offset_first_element_in_bytes The offset of the first element in the source
+ *                                               tensor
+ * @param[in]  in2_ptr                           Pointer to the source tensor. Supported data types:
+ *                                               QASYMM8
+ * @param[in]  in2_stride_x                      Stride of the source tensor in X dimension
+ *                                               (in bytes)
+ * @param[in]  in2_step_x                        in2_stride_x * number of elements along X processed
+ *                                               per workitem(in bytes)
+ * @param[in]  in2_stride_y                      Stride of the source tensor in Y dimension
+ *                                               (in bytes)
+ * @param[in]  in2_step_y                        in2_stride_y * number of elements along Y processed
+ *                                               per workitem(in bytes)
+ * @param[in]  in2_stride_z                      Stride of the source tensor in Z dimension
+ *                                               (in bytes)
+ * @param[in]  in2_step_z                        in2_stride_z * number of elements along Z processed
+ *                                               per workitem(in bytes)
+ * @param[in]  in2_offset_first_element_in_bytes The offset of the first element in the source
+ *                                               tensor
+ * @param[out] out_ptr                           Pointer to the destination tensor.
+ *                                               Supported data types: QASYMM8
+ * @param[in]  out_stride_x                      Stride of the destination tensor in X dimension
+ *                                               (in bytes)
+ * @param[in]  out_step_x                        out_stride_x * number of elements along X processed
+ *                                               per workitem(in bytes)
+ * @param[in]  out_stride_y                      Stride of the destination tensor in Y dimension
+ *                                               (in bytes)
+ * @param[in]  out_step_y                        out_stride_y * number of elements along Y processed
+ *                                               per workitem(in bytes)
+ * @param[in]  out_stride_z                      Stride of the source tensor in Z dimension
+ *                                               (in bytes)
+ * @param[in]  out_step_z                        out_stride_z * number of elements along Z processed
+ *                                               per workitem(in bytes)
+ * @param[in]  out_offset_first_element_in_bytes The offset of the first element in the destination
+ *                                               tensor
+ */
+__kernel void arithmetic_add_qasymm8(TENSOR3D_DECLARATION(in1), TENSOR3D_DECLARATION(in2),
+                                     TENSOR3D_DECLARATION(out))
+{
+  // Get pixels pointer
+  Tensor3D in1 = CONVERT_TO_TENSOR3D_STRUCT(in1);
+  Tensor3D in2 = CONVERT_TO_TENSOR3D_STRUCT(in2);
+  Tensor3D out = CONVERT_TO_TENSOR3D_STRUCT(out);
+
+  // Load data
+  VEC_DATA_TYPE(int, 16)
+  in1_data = CONVERT(vload16(0, (__global DATA_TYPE_IN1 *)in1.ptr), VEC_DATA_TYPE(int, 16));
+  VEC_DATA_TYPE(int, 16)
+  in2_data = CONVERT(vload16(0, (__global DATA_TYPE_IN2 *)in2.ptr), VEC_DATA_TYPE(int, 16));
+
+  // Get scaled value of two inputs
+  VEC_DATA_TYPE(int, 16) in1_val = in1_data + (VEC_DATA_TYPE(int, 16))(IN1_OFFSET);
+  VEC_DATA_TYPE(int, 16) in2_val = in2_data + (VEC_DATA_TYPE(int, 16))(IN2_OFFSET);
+
+  VEC_DATA_TYPE(int, 16)
+  left_shift = (VEC_DATA_TYPE(int, 16))1 << (VEC_DATA_TYPE(int, 16))(LEFT_SHIFT);
+  VEC_DATA_TYPE(int, 16) shifted_in1_val = in1_val * left_shift;
+  VEC_DATA_TYPE(int, 16) shifted_in2_val = in2_val * left_shift;
+
+  VEC_DATA_TYPE(int, 16)
+  scaled_in1_val =
+      ASYMM_MULT_BY_QUANT_MULTIPLIER_LESS_THAN_ONE(shifted_in1_val, IN1_MULT_INT, IN1_SHIFT, 16);
+  VEC_DATA_TYPE(int, 16)
+  scaled_in2_val =
+      ASYMM_MULT_BY_QUANT_MULTIPLIER_LESS_THAN_ONE(shifted_in2_val, IN2_MULT_INT, IN2_SHIFT, 16);
+
+  // Add inputs and multiply with a multiplier smaller than 1
+  VEC_DATA_TYPE(int, 16) sum_val = scaled_in1_val + scaled_in2_val;
+  VEC_DATA_TYPE(int, 16)
+  out_val =
+      ASYMM_MULT_BY_QUANT_MULTIPLIER_LESS_THAN_ONE(sum_val, RESULT_MULT_INT, RESULT_SHIFT, 16);
+  out_val += (VEC_DATA_TYPE(int, 16))(RESULT_OFFSET);
+
+  VEC_DATA_TYPE(uchar, 16) res = CONVERT(out_val, VEC_DATA_TYPE(uchar, 16));
+
+  // TODO: Apply min-max BOUND to support fuse with relu.
+  /*
+  #if defined(MIN_BOUND)
+      res = max(res, (uchar16)MIN_BOUND);
+  #endif // defined(MIN_BOUND)
+  #if defined(MAX_BOUND)
+      res = min(res, (uchar16)MAX_BOUND);
+  #endif // defined(MAX_BOUND)
+  */
+
+  // Store result
+  VSTORE(16)(CONVERT(res, VEC_DATA_TYPE(DATA_TYPE_OUT, 16)), 0, (__global DATA_TYPE_OUT *)out.ptr);
+}
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/binary_logical_op.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/binary_logical_op.cl
new file mode 100644
index 000000000..8c875516d
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/binary_logical_op.cl
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "helpers.h"
+
+#ifndef VEC_SIZE
+#define VEC_SIZE 1
+#endif
+
+#if defined(OP_CODE) && defined(DATA_TYPE)
+/** returns truth value of the two input tensors for BINARY LOGICAL OP.
+ *  where BINARY LOGICAL OP can be AND, OR.
+ *
+ * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=uchar
+ * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size.
+ *            e.g. -DVEC_SIZE=16
+ * @attention Operation type(code) specifying which operation to perform should be passed as
+ *            preprocessor argument using -DOP_CODE = number. e.g. -DOP_CODE=1
+ *
+ * @param[in]  input1_ptr                            Pointer to the source tensor.
+ *                                                   Supported data types: QASYMM8
+ * @param[in]  input1_stride_x                       Stride of the source tensor in X dimension
+ *                                                   (in bytes)
+ * @param[in]  input1_step_x                         input1_stride_x * number of elements along X
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input1_stride_y                       Stride of the source tensor in Y dimension
+ *                                                   (in bytes)
+ * @param[in]  input1_step_y                         input1_stride_y * number of elements along Y
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input1_stride_z                       Stride of the source tensor in Z dimension
+ *                                                   (in bytes)
+ * @param[in]  input1_step_z                         input1_stride_z * number of elements along Z
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input1_offset_first_element_in_bytes  The offset of the first element in the source
+ *                                                   tensor
+ * @param[in]  input2_ptr                            Pointer to the source tensor.
+ *                                                   Supported data types: QASYMM8
+ * @param[in]  input2_stride_x                       Stride of the source tensor in X dimension
+ *                                                   (in bytes)
+ * @param[in]  input2_step_x                         input2_stride_x * number of elements along X
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input2_stride_y                       Stride of the source tensor in Y dimension
+ *                                                   (in bytes)
+ * @param[in]  input2_step_y                         input2_stride_y * number of elements along Y
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input2_stride_z                       Stride of the source tensor in Z dimension
+ *                                                   (in bytes)
+ * @param[in]  input2_step_z                         input2_stride_z * number of elements along Z
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input2_offset_first_element_in_bytes  The offset of the first element in the source
+ *                                                   tensor
+ * @param[out] output_ptr                            Pointer to the destination tensor.
+ *                                                   Supported data types: QASYMM8
+ * @param[in]  output_stride_x                       Stride of the destination tensor in X dimension
+ *                                                   (in bytes)
+ * @param[in]  output_step_x                         output_stride_x * number of elements along X
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  output_stride_y                       Stride of the destination tensor in Y dimension
+ *                                                   (in bytes)
+ * @param[in]  output_step_y                         output_stride_y * number of elements along Y
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  output_stride_z                       Stride of the destination tensor in Z dimension
+ *                                                   (in bytes)
+ * @param[in]  output_step_z                         output_stride_z * number of elements along Z
+ *                                                   processed per workitem(in bytes)
+ */
+__kernel void binary_logical_op(TENSOR3D_DECLARATION(input1), TENSOR3D_DECLARATION(input2),
+                                TENSOR3D_DECLARATION(output))
+{
+  Tensor3D input1 = CONVERT_TO_TENSOR3D_STRUCT(input1);
+  Tensor3D input2 = CONVERT_TO_TENSOR3D_STRUCT(input2);
+  Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
+
+#if OP_CODE == 1 // LOGICAL AND
+  VSTORE(VEC_SIZE)
+  (CONVERT(VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input1.ptr) &&
+               VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input2.ptr),
+           VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE)),
+   0, (__global DATA_TYPE *)output.ptr);
+
+#elif OP_CODE == 2 // LOGICAL OR
+  VSTORE(VEC_SIZE)
+  (CONVERT(VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input1.ptr) ||
+               VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input2.ptr),
+           VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE)),
+   0, (__global DATA_TYPE *)output.ptr);
+
+#else // OP NOT SUPPORTED
+  return
+
+#endif
+}
+#endif // if defined(OP_CODE) && defined(DATA_TYPE)
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/cast.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/cast.cl
new file mode 100644
index 000000000..d5a07476a
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/cast.cl
@@ -0,0 +1,198 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "helpers.h"
+
+#ifndef SCALE
+#define SCALE 1.0f
+#endif
+#ifndef OFFSET
+#define OFFSET 0
+#endif
+#ifndef VEC_SIZE
+#define VEC_SIZE 1
+#endif
+
+#if defined(DATA_TYPE_IN) && defined(DATA_TYPE_OUT)
+/** Perform a cast operation on an input tensor.
+ *
+ * @attention Data types of both input and output can be passed using the -DDATA_TYPE_IN and
+ *            -DDATA_TYPE_OUT compile flag, e.g. -DDATA_TYPE_IN=float, -DDATA_TYPE_OUT=int
+ * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g.
+ *            -DVEC_SIZE=16
+ *
+ * @param[in]  input_ptr                            Pointer to the source image. Supported data
+ *                                                  types: F16/F32
+ * @param[in]  input_stride_x                       Stride of the source image in X dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_x                         input_stride_x * number of elements along X
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_y                         input_stride_y * number of elements along Y
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_z                         input_stride_z * number of elements along Z
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source
+ *                                                  image
+ * @param[out] output_ptr                           Pointer to the destination image. Supported data
+ *                                                  types: same as @p input_ptr
+ * @param[in]  output_stride_x                      Stride of the destination image in X dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_x                        output_stride_x * number of elements along X
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_y                      Stride of the destination image in Y dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_y                        output_stride_y * number of elements along Y
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  output_step_z                        output_stride_z * number of elements along Z
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the
+ *                                                  destination image
+ */
+__kernel void cast(TENSOR3D_DECLARATION(input), TENSOR3D_DECLARATION(output))
+{
+  Tensor3D input = CONVERT_TO_TENSOR3D_STRUCT(input);
+  Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
+
+  VSTORE(VEC_SIZE)
+  (CONVERT(VLOAD(VEC_SIZE)(0, (__global DATA_TYPE_IN *)input.ptr),
+           VEC_DATA_TYPE(DATA_TYPE_OUT, VEC_SIZE)),
+   0, (__global DATA_TYPE_OUT *)output.ptr);
+}
+
+/** Perform a cast operation on an QASYMM8 input tensor.
+ * @attention Data types of both input and output can be passed using the -DDATA_TYPE_IN and
+ *            -DDATA_TYPE_OUT compile flag, e.g. -DDATA_TYPE_IN=float, -DDATA_TYPE_OUT=int
+ * @attention Offset and Scale of input should be given as a preprocessor argument using
+ *            -DOFFSET=int, -DSCALE=float. e.g. -DOFFSET=1, -DSCALE=0.5
+ * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g.
+ *            -DVEC_SIZE=16
+ *
+ * @param[in]  input_ptr                            Pointer to the source image. Supported data
+ *                                                  types: F16/F32
+ * @param[in]  input_stride_x                       Stride of the source image in X dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_x                         input_stride_x * number of elements along X
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_y                         input_stride_y * number of elements along Y
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_z                         input_stride_z * number of elements along Z
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source
+ *                                                  image
+ * @param[out] output_ptr                           Pointer to the destination image. Supported data
+ *                                                  types: same as @p input_ptr
+ * @param[in]  output_stride_x                      Stride of the destination image in X dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_x                        output_stride_x * number of elements along X
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_y                      Stride of the destination image in Y dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_y                        output_stride_y * number of elements along Y
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  output_step_z                        output_stride_z * number of elements along Z
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the
+ *                                                  destination image
+ */
+__kernel void cast_qasymm_in(TENSOR3D_DECLARATION(input), TENSOR3D_DECLARATION(output))
+{
+  Tensor3D input = CONVERT_TO_TENSOR3D_STRUCT(input);
+  Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
+
+  VEC_DATA_TYPE(DATA_TYPE_IN, VEC_SIZE)
+  in_data = VLOAD(VEC_SIZE)(0, (__global DATA_TYPE_IN *)input.ptr);
+  VEC_DATA_TYPE(int, VEC_SIZE) offset = (VEC_DATA_TYPE(int, VEC_SIZE))(OFFSET);
+  VEC_DATA_TYPE(float, VEC_SIZE) scale = (VEC_DATA_TYPE(float, VEC_SIZE))(SCALE);
+
+  VEC_DATA_TYPE(int, VEC_SIZE) tmp = CONVERT(in_data, VEC_DATA_TYPE(int, VEC_SIZE)) - offset;
+  VEC_DATA_TYPE(float, VEC_SIZE) out_data = CONVERT(tmp, VEC_DATA_TYPE(float, VEC_SIZE)) * scale;
+
+  VSTORE(VEC_SIZE)
+  (CONVERT(out_data, VEC_DATA_TYPE(DATA_TYPE_OUT, VEC_SIZE)), 0,
+   (__global DATA_TYPE_OUT *)output.ptr);
+}
+
+/** Perform a cast operation on an QASYMM8 output tensor.
+ * @attention Data types of both input and output can be passed using the -DDATA_TYPE_IN and
+ *            -DDATA_TYPE_OUT compile flag, e.g. -DDATA_TYPE_IN=float, -DDATA_TYPE_OUT=int
+ * @attention Offset and Scale of output should be given as a preprocessor argument using
+ *            -DOFFSET=int, -DSCALE=float. e.g. -DOFFSET=1, -DSCALE=0.5
+ * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g.
+ *            -DVEC_SIZE=16
+ *
+ * @param[in]  input_ptr                            Pointer to the source image. Supported data
+ *                                                  types: F16/F32
+ * @param[in]  input_stride_x                       Stride of the source image in X dimension (in
+ *                                                 bytes)
+ * @param[in]  input_step_x                         input_stride_x * number of elements along X
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_y                         input_stride_y * number of elements along Y
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_z                         input_stride_z * number of elements along Z
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source
+ *                                                  image
+ * @param[out] output_ptr                           Pointer to the destination image. Supported data
+ *                                                  types: U8
+ * @param[in]  output_stride_x                      Stride of the destination image in X dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_x                        output_stride_x * number of elements along X
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_y                      Stride of the destination image in Y dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_y                        output_stride_y * number of elements along Y
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  output_step_z                        output_stride_z * number of elements along Z
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the
+ *                                                  destination image
+ */
+__kernel void cast_qasymm_out(TENSOR3D_DECLARATION(input), TENSOR3D_DECLARATION(output))
+{
+  Tensor3D input = CONVERT_TO_TENSOR3D_STRUCT(input);
+  Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
+
+  VEC_DATA_TYPE(DATA_TYPE_IN, VEC_SIZE)
+  in_data = VLOAD(VEC_SIZE)(0, (__global DATA_TYPE_IN *)input.ptr);
+  VEC_DATA_TYPE(int, VEC_SIZE) offset = (VEC_DATA_TYPE(int, VEC_SIZE))(OFFSET);
+  VEC_DATA_TYPE(float, VEC_SIZE) scale = (VEC_DATA_TYPE(float, VEC_SIZE))(SCALE);
+
+  VEC_DATA_TYPE(float, VEC_SIZE) tmp = CONVERT(in_data, VEC_DATA_TYPE(float, VEC_SIZE)) / scale;
+  VEC_DATA_TYPE(float, VEC_SIZE) out_data = tmp + CONVERT(offset, VEC_DATA_TYPE(float, VEC_SIZE));
+
+  VSTORE(VEC_SIZE)
+  (CONVERT(out_data, VEC_DATA_TYPE(DATA_TYPE_OUT, VEC_SIZE)), 0,
+   (__global DATA_TYPE_OUT *)output.ptr);
+}
+#endif // defined(DATA_TYPE_IN) && defined(DATA_TYPE_OUT)
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/depth_to_space.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/depth_to_space.cl
new file mode 100644
index 000000000..e005322f7
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/depth_to_space.cl
@@ -0,0 +1,161 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016, 2017 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "helpers.h"
+
+#if defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(BLOCK_SIZE) && defined(Z_OUT)
+/** Perform space to depth rearrangement of tensor
+ *
+ * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
+ * @attention Input tensor depth should be given as a preprocessor argument using -DDEPTH_OUT=size.
+ *            e.g. -DDEPTH_OUT=16
+ * @attention The value of the z-axis of output tensor should be given as a preprocessor argument
+ *            using -DZ_OUT=size. e.g. -DZ_OUT=16
+ * @attention block size should be given as a preprocessor argument using -DBLOCK_SIZE=size. e.g.
+ *            -DBLOCK_SIZE=1
+ *
+ * @param[in]  input_ptr                            Pointer to the source image. Supported data
+ *                                                  types: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
+ * @param[in]  input_stride_x                       Stride of the source image in X dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_x                         input_stride_x * number of elements along X
+ *                                                  processed per workitem(in  bytes)
+ * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_y                         input_stride_y * number of elements along Y
+ *                                                  processed per workitem(in  bytes)
+ * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_z                         input_stride_z * number of elements along Z
+ *                                                  processed per workitem(in  bytes)
+ * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source
+ *                                                  image
+ * @param[out] output_ptr                           Pointer to the destination image. Supported data
+ *                                                  types: same as @p input_ptr
+ * @param[in]  output_stride_x                      Stride of the destination image in X dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_x                        output_stride_x * number of elements along X
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_y                      Stride of the destination image in Y dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_y                        output_stride_y * number of elements along Y
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  output_step_z                        output_stride_z * number of elements along Z
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_w                      Stride of the source tensor in W dimension (in
+ *                                                  bytes)
+ * @param[in]  output_step_w                        output_stride_w * number of elements along W
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the
+ *                                                  destination image
+ */
+__kernel void depth_to_space_nchw(TENSOR4D_DECLARATION(input), TENSOR4D_DECLARATION(output))
+{
+  Tensor4D in = CONVERT_TO_TENSOR4D_STRUCT_NO_STEP(input, 0);
+  Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, Z_OUT);
+
+  int out_index[4] = {0};
+  int in_index[4] = {0};
+
+  out_index[0] = get_global_id(0);         // W
+  out_index[1] = get_global_id(1);         // H
+  out_index[2] = get_global_id(2) % Z_OUT; // C
+  out_index[3] = get_global_id(2) / Z_OUT; // B
+
+  in_index[0] = out_index[0] / BLOCK_SIZE;
+  in_index[1] = out_index[1] / BLOCK_SIZE;
+  in_index[2] = out_index[2] +
+                ((out_index[1] % BLOCK_SIZE) * BLOCK_SIZE + out_index[0] % BLOCK_SIZE) * DEPTH_OUT;
+  in_index[3] = out_index[3];
+
+  *((__global DATA_TYPE *)out.ptr) = *((__global DATA_TYPE *)tensor4D_offset(
+      &in, in_index[0], in_index[1], in_index[2], in_index[3]));
+}
+#endif // defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(BLOCK_SIZE) && defined(Z_OUT)
+
+#if defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(BLOCK_SIZE) && defined(Z_OUT)
+/** Perform space to depth rearrangement of tensor (NHWC)
+ *
+ * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
+ * @attention Output tensor depth should be given as a preprocessor argument using -DDEPTH_OUT=size.
+ *            e.g. -DDEPTH_OUT=16
+ * @attention The value of the z-axis of output tensor should be given as a preprocessor argument
+ *            using -DZ_OUT=size. e.g. -DZ_OUT=16
+ * @attention block size should be given as a preprocessor argument using -DBLOCK_SIZE=size. e.g.
+ *            -DBLOCK_SIZE=1
+ *
+ * @param[in]  input_ptr                            Pointer to the source image. Supported data
+ *                                                  types: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
+ * @param[in]  input_stride_x                       Stride of the source image in X dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_x                         input_stride_x * number of elements along X
+ *                                                  processed per workitem(in  bytes)
+ * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_y                         input_stride_y * number of elements along Y
+ *                                                  processed per workitem(in  bytes)
+ * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_z                         input_stride_z * number of elements along Z
+ *                                                  processed per workitem(in  bytes)
+ * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source
+ *                                                  image
+ * @param[out] output_ptr                           Pointer to the destination image. Supported data
+ *                                                  types: same as @p input_ptr
+ * @param[in]  output_stride_x                      Stride of the destination image in X dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_x                        output_stride_x * number of elements along X
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_y                      Stride of the destination image in Y dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_y                        output_stride_y * number of elements along Y
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  output_step_z                        output_stride_z * number of elements along Z
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_w                      Stride of the source tensor in W dimension (in
+ *                                                  bytes)
+ * @param[in]  output_step_w                        output_stride_w * number of elements along W
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the
+ *                                                  destination image
+ */
+__kernel void depth_to_space_nhwc(TENSOR4D_DECLARATION(input), TENSOR4D_DECLARATION(output))
+{
+  Tensor4D in = CONVERT_TO_TENSOR4D_STRUCT_NO_STEP(input, 0);
+  Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, Z_OUT);
+
+  int out_index[4] = {0};
+  int in_index[4] = {0};
+
+  out_index[0] = get_global_id(0);         // C
+  out_index[1] = get_global_id(1);         // W
+  out_index[2] = get_global_id(2) % Z_OUT; // H
+  out_index[3] = get_global_id(2) / Z_OUT; // B
+
+  in_index[0] = out_index[0] +
+                ((out_index[2] % BLOCK_SIZE) * BLOCK_SIZE + out_index[1] % BLOCK_SIZE) * DEPTH_OUT;
+  in_index[1] = out_index[1] / BLOCK_SIZE;
+  in_index[2] = out_index[2] / BLOCK_SIZE;
+  in_index[3] = out_index[3];
+
+  *((__global DATA_TYPE *)out.ptr) = *((__global DATA_TYPE *)tensor4D_offset(
+      &in, in_index[0], in_index[1], in_index[2], in_index[3]));
+}
+#endif // defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(BLOCK_SIZE) && defined(Z_OUT)
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/embedding_lookup.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/embedding_lookup.cl
new file mode 100644
index 000000000..dd8cb6d93
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/embedding_lookup.cl
@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "helpers.h"
+
+#ifndef VEC_SIZE
+#define VEC_SIZE 1
+#endif
+
+#if defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(NUM_DIMS)
+/** Perform embedding_lookup of input tensor
+ *
+ * @note Datatype should be given as a preprocessor argument using -DDATA_TYPE=type. e.g.
+ *       -DDATA_TYPE=short
+ * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g.
+ *            -DVEC_SIZE=16
+ * @attention Output tensor depth should be given as a preprocessor argument using
+ *            -DDEPTH_OUT=depth. e.g. -DDEPTH_OUT=16
+ * @attention Number of input dimensions are passed as a preprocessor argument using
+ *            -DNUM_DIMS=size, e.g. -DNUM_DIMS=4
+ *
+ * @param[in]  input_ptr                             Pointer to the source tensor. Supported data
+ *                                                   types: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
+ * @param[in]  input_stride_x                        Stride of the source tensor in X dimension (in
+ *                                                   bytes)
+ * @param[in]  input_step_x                          input_stride_x * number of elements along X
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input_stride_y                        Stride of the source tensor in Y dimension (in
+ *                                                   bytes)
+ * @param[in]  input_step_y                          input_stride_y * number of elements along Y
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input_stride_z                        Stride of the source tensor in Z dimension (in
+ *                                                   bytes)
+ * @param[in]  input_step_z                          input_stride_z * number of elements along Z
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input_offset_first_element_in_bytes   The offset of the first element in the source
+ *                                                   tensor
+ * @param[in]  input_stride_w                        Stride of the source tensor in W dimension (in
+ *                                                   bytes)
+ * @param[in]  input_step_w                          output_stride_w * number of elements along W
+ *                                                   processed per workitem(in bytes)
+ * @param[out] output_ptr                            Pointer to the destination tensor. Supported
+ *                                                   data types: same as @p input_ptr
+ * @param[in]  output_stride_x                       Stride of the destination tensor in X dimension
+ *                                                   (in bytes)
+ * @param[in]  output_step_x                         output_stride_x * number of elements along X
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  output_stride_y                       Stride of the destination tensor in Y dimension
+ *                                                   (in bytes)
+ * @param[in]  output_step_y                         output_stride_y * number of elements along Y
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  output_stride_z                       Stride of the source tensor in Z dimension (in
+ *                                                   bytes)
+ * @param[in]  output_step_z                         output_stride_z * number of elements along Z
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  output_stride_w                       Stride of the source tensor in W dimension (in
+ *                                                   bytes)
+ * @param[in]  output_step_w                         output_stride_w * number of elements along W
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  output_offset_first_element_in_bytes  The offset of the first element in the
+ *                                                   destination tensor
+ * @param[in]  lookups_ptr                           Pointer to the lookups vector. Supported data
+ *                                                   types: S32
+ * @param[in]  lookups_stride_x                      Stride of the lookups vector in X dimension (in
+ *                                                   bytes)
+ * @param[in]  lookups_step_x                        lookups_stride_x * number of elements along X
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  lookups_offset_first_element_in_bytes The offset of the first element in the lookups
+ *                                                   vector
+ */
+
+__kernel void embedding_lookup(TENSOR4D_DECLARATION(input), TENSOR4D_DECLARATION(output),
+                               VECTOR_DECLARATION(lookups))
+{
+  Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, DEPTH_OUT);
+  Tensor4D in = CONVERT_TO_TENSOR4D_STRUCT_NO_STEP(input, DEPTH_OUT);
+
+  Vector lups = CONVERT_TO_VECTOR_STRUCT_NO_STEP(lookups);
+
+  // lookup ids for based on the tensor dimensions
+  int lup_id[4] = {0};
+
+  lup_id[0] = (NUM_DIMS == 1) ? *((__global int *)vector_offset(&lups, get_global_id(0)))
+                              : get_global_id(0);
+  lup_id[1] = (NUM_DIMS == 2) ? *((__global int *)vector_offset(&lups, get_global_id(1)))
+                              : get_global_id(1);
+  lup_id[2] = (NUM_DIMS == 3) ? *((__global int *)vector_offset(&lups, get_global_id(2)))
+                              : get_global_id(2) % DEPTH_OUT;
+  lup_id[3] = (NUM_DIMS == 4)
+                  ? *((__global int *)vector_offset(&lups, get_global_id(2) / DEPTH_OUT))
+                  : get_global_id(2) / DEPTH_OUT;
+
+  in.ptr += input_offset_first_element_in_bytes + lup_id[0] * input_step_x +
+            lup_id[1] * input_step_y + lup_id[2] * input_step_z + lup_id[3] * input_step_w;
+
+  VSTORE(VEC_SIZE)
+  (CONVERT(VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)in.ptr), VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE)), 0,
+   (__global DATA_TYPE *)out.ptr);
+}
+#endif // defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(NUM_DIMS)
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/gather_ex.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/gather_ex.cl
new file mode 100644
index 000000000..09f776156
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/gather_ex.cl
@@ -0,0 +1,139 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "helpers.h"
+
+#if defined(DATA_TYPE) && defined(AXIS) && defined(INDICES_DIM)
+
+/** Performs the Gather operation along the chosen axis
+ * @note Datatype should be given as a preprocessor argument using -DDATA_TYPE=type. e.g.
+ *       -DDATA_TYPE=short
+ * @note Axis should be given as a preprocessor argument using -DAXIS=axis. e.g. -DAXIS=1
+ * @attention Output tensor depth should be given as a preprocessor argument using
+ *            -DOUTPUT_DIM_Z=size. e.g. -DOUTPUT_DIM_Z=16
+ * @attention Input tensor depth should be given as a preprocessor argument using
+ *            -DINPUT_DIM_Z=size. e.g. -DINPUT_DIM_Z=16
+ *
+ * @param[in]  input_ptr                             Pointer to the source tensor. Supported data
+ *                                                   types: U8/S8/U16/S16/U32/S32/F16/F32
+ * @param[in]  input_stride_x                        Stride of the source tensor in X dimension (in
+ *                                                   bytes)
+ * @param[in]  input_step_x                          input_stride_x * number of elements along X
+ *                                                   processed per work item (in bytes)
+ * @param[in]  input_stride_y                        Stride of the source tensor in Y dimension (in
+ *                                                   bytes)
+ * @param[in]  input_step_y                          input_stride_y * number of elements along Y
+ *                                                   processed per work item (in bytes)
+ * @param[in]  input_stride_z                        Stride of the source tensor in Y dimension (in
+ *                                                   bytes)
+ * @param[in]  input_step_z                          input_stride_z * number of elements along Z
+ *                                                   processed per work item (in bytes)
+ * @param[in]  input_stride_w                        Stride of the source tensor in Z dimension (in
+ *                                                   bytes)
+ * @param[in]  input_step_w                          input_stride_w * number of elements along W
+ *                                                   processed per work item (in bytes)
+ * @param[in]  input_offset_first_element_in_bytes   Offset of the first element in the source
+ *                                                   tensor
+ * @param[in]  indices_ptr                           Pointer to the source tensor. Supported data
+ *                                                   types: S32
+ * @param[in]  indices_stride_x                      Stride of the source tensor in X dimension (in
+ *                                                   bytes)
+ * @param[in]  indices_step_x                        indices_stride_x * number of elements along X
+ *                                                   processed per workitem(in  bytes)
+ * @param[in]  indices_stride_y                      Stride of the source tensor in Y dimension (in
+ *                                                   bytes)
+ * @param[in]  indices_step_y                        indices_stride_y * number of elements along Y
+ *                                                   processed per workitem(in  bytes)
+ * @param[in]  indices_stride_z                      Stride of the source tensor in Z dimension (in
+ *                                                   bytes)
+ * @param[in]  indices_step_z                        indices_stride_z * number of elements along Z
+ *                                                   processed per workitem(in  bytes)
+ * @param[in]  indices_offset_first_element_in_bytes The offset of the first element in the
+ *                                                   destination tensor
+ * @param[out] output_ptr                            Pointer to the destination tensor. Supported
+ *                                                   data types: same as @p input_ptr
+ * @param[in]  output_stride_x                       Stride of the destination tensor in X dimension
+ *                                                   (in bytes)
+ * @param[in]  output_step_x                         output_stride_x * number of elements along X
+ *                                                   processed per work item (in bytes)
+ * @param[in]  output_stride_y                       Stride of the destination tensor in Y dimension
+ *                                                   (in bytes)
+ * @param[in]  output_step_y                         output_stride_y * number of elements along Y
+ *                                                   processed per work item (in bytes)
+ * @param[in]  output_stride_z                       Stride of the destination tensor in Z dimension
+ *                                                   (in bytes)
+ * @param[in]  output_step_z                         output_stride_z * number of elements along Z
+ *                                                   processed per work item (in bytes)
+ * @param[in]  output_stride_w                       Stride of the destination tensor in W dimension
+ *                                                   (in bytes)
+ * @param[in]  output_step_w                         output_stride_w * number of elements along W
+ *                                                   processed per work item (in bytes)
+ * @param[in]  output_offset_first_element_in_bytes  Offset of the first element in the destination
+ *                                                   tensor
+ */
+__kernel void gather_ex(TENSOR4D_DECLARATION(input), TENSOR3D_DECLARATION(indices),
+                        TENSOR4D_DECLARATION(output))
+{
+  const int px = get_global_id(0);
+  const int py = get_global_id(1);
+  const int pz = get_global_id(2) % OUTPUT_DIM_Z;
+  const int pw = get_global_id(2) / OUTPUT_DIM_Z;
+
+  const Tensor4D input = CONVERT_TO_TENSOR4D_STRUCT_NO_STEP(input, INPUT_DIM_Z);
+  const Tensor3D indices = CONVERT_TO_TENSOR3D_STRUCT_NO_STEP(indices);
+  Tensor4D output = CONVERT_TO_TENSOR4D_STRUCT(output, OUTPUT_DIM_Z);
+
+#if AXIS == 0
+#if INDICES_DIM == 1
+  const uint index = *(__global const uint *)tensor3D_offset(&indices, px, 0, 0);
+  __global const uchar *input_addr = tensor4D_offset(&input, index, py, pz, pw);
+#elif INDICES_DIM == 2
+  const uint index = *(__global const uint *)tensor3D_offset(&indices, px, py, 0);
+  __global const uchar *input_addr = tensor4D_offset(&input, index, pz, pw, 0);
+#elif INDICES_DIM == 3
+  const uint index = *(__global const uint *)tensor3D_offset(&indices, px, py, pz);
+  __global const uchar *input_addr = tensor4D_offset(&input, index, pw, 0, 0);
+#endif
+#elif AXIS == 1
+#if INDICES_DIM == 1
+  const uint index = *(__global const uint *)tensor3D_offset(&indices, py, 0, 0);
+  __global const uchar *input_addr = tensor4D_offset(&input, px, index, pz, pw);
+#elif INDICES_DIM == 2
+  const uint index = *(__global const uint *)tensor3D_offset(&indices, py, pz, 0);
+  __global const uchar *input_addr = tensor4D_offset(&input, px, index, pw, 0);
+#elif INDICES_DIM == 3
+  const uint index = *(__global const uint *)tensor3D_offset(&indices, py, pz, pw);
+  __global const uchar *input_addr = tensor4D_offset(&input, px, index, 0, 0);
+#endif
+#elif AXIS == 2
+#if INDICES_DIM == 1
+  const uint index = *(__global const uint *)tensor3D_offset(&indices, pz, 0, 0);
+  __global const uchar *input_addr = tensor4D_offset(&input, px, py, index, pw);
+#elif INDICES_DIM == 2
+  const uint index = *(__global const uint *)tensor3D_offset(&indices, pz, pw, 0);
+  __global const uchar *input_addr = tensor4D_offset(&input, px, py, index, 0);
+#endif
+#elif AXIS == 3
+#if INDICES_DIM == 1
+  const uint index = *(__global const uint *)tensor3D_offset(&indices, pw, 0, 0);
+  __global const uchar *input_addr = tensor4D_offset(&input, px, py, pz, index);
+#endif
+#endif // AXIS
+
+  *(__global DATA_TYPE *)output.ptr = *((__global const DATA_TYPE *)input_addr);
+}
+
+#endif // defined(DATA_TYPE) && defined(AXIS) && defined(INDICES_DIM)
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/hashtable_lookup.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/hashtable_lookup.cl
new file mode 100644
index 000000000..73f29e3e5
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/hashtable_lookup.cl
@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "helpers.h"
+
+#ifndef VEC_SIZE
+#define VEC_SIZE 1
+#endif
+
+#if defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(NUM_DIMS)
+/** Perform hashtable_lookup of input tensor
+ *
+ * @note Datatype should be given as a preprocessor argument using -DDATA_TYPE=type. e.g.
+ *       -DDATA_TYPE=short
+ * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g.
+ *            -DVEC_SIZE=16
+ * @attention Output tensor depth should be given as a preprocessor argument using
+ *            -DDEPTH_OUT=depth. e.g. -DDEPTH_OUT=16
+ * @attention Number of input dimensions are passed as a preprocessor argument using
+ *            -DNUM_DIMS=size, e.g. -DNUM_DIMS=4
+ *
+ * @param[in]  input_ptr                             Pointer to the source tensor. Supported data
+ *                                                   types: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
+ * @param[in]  input_stride_x                        Stride of the source tensor in X dimension (in
+ *                                                   bytes)
+ * @param[in]  input_step_x                          input_stride_x * number of elements along X
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input_stride_y                        Stride of the source tensor in Y dimension (in
+ *                                                   bytes)
+ * @param[in]  input_step_y                          input_stride_y * number of elements along Y
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input_stride_z                        Stride of the source tensor in Z dimension (in
+ *                                                   bytes)
+ * @param[in]  input_step_z                          input_stride_z * number of elements along Z
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input_offset_first_element_in_bytes   The offset of the first element in the source
+ *                                                   tensor
+ * @param[in]  input_stride_w                        Stride of the source tensor in W dimension (in
+ *                                                   bytes)
+ * @param[in]  input_step_w                          output_stride_w * number of elements along W
+ *                                                   processed per workitem(in bytes)
+ * @param[out] output_ptr                            Pointer to the destination tensor. Supported
+ *                                                   data types: same as @p input_ptr
+ * @param[in]  output_stride_x                       Stride of the destination tensor in X dimension
+ *                                                   (in bytes)
+ * @param[in]  output_step_x                         output_stride_x * number of elements along X
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  output_stride_y                       Stride of the destination tensor in Y dimension
+ *                                                   (in bytes)
+ * @param[in]  output_step_y                         output_stride_y * number of elements along Y
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  output_stride_z                       Stride of the source tensor in Z dimension (in
+ *                                                   bytes)
+ * @param[in]  output_step_z                         output_stride_z * number of elements along Z
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  output_stride_w                       Stride of the source tensor in W dimension (in
+ *                                                   bytes)
+ * @param[in]  output_step_w                         output_stride_w * number of elements along W
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  output_offset_first_element_in_bytes  The offset of the first element in the
+ *                                                   destination tensor
+ * @param[in]  lookups_ptr                           Pointer to the lookups vector. Supported data
+ *                                                   types: S32
+ * @param[in]  lookups_stride_x                      Stride of the lookups vector in X dimension (in
+ *                                                   bytes)
+ * @param[in]  lookups_step_x                        lookups_stride_x * number of elements along X
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  lookups_offset_first_element_in_bytes The offset of the first element in the lookups
+ *                                                   vector
+ */
+__kernel void hashtable_lookup(TENSOR4D_DECLARATION(input), TENSOR4D_DECLARATION(output),
+                               VECTOR_DECLARATION(lookups))
+{
+  Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, DEPTH_OUT);
+  Tensor4D in = CONVERT_TO_TENSOR4D_STRUCT_NO_STEP(input, DEPTH_OUT);
+
+  Vector lups = CONVERT_TO_VECTOR_STRUCT_NO_STEP(lookups);
+
+  int lup_id[4] = {0};
+
+  lup_id[0] = (NUM_DIMS == 1) ? *((__global int *)vector_offset(&lups, get_global_id(0)))
+                              : get_global_id(0);
+  lup_id[1] = (NUM_DIMS == 2) ? *((__global int *)vector_offset(&lups, get_global_id(1)))
+                              : get_global_id(1);
+  lup_id[2] = (NUM_DIMS == 3) ? *((__global int *)vector_offset(&lups, get_global_id(2)))
+                              : get_global_id(2) % DEPTH_OUT;
+  lup_id[3] = (NUM_DIMS == 4)
+                  ? *((__global int *)vector_offset(&lups, get_global_id(2) / DEPTH_OUT))
+                  : get_global_id(2) / DEPTH_OUT;
+
+  if (lup_id[NUM_DIMS - 1] < 0)
+  {
+    VSTORE(VEC_SIZE)((VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE))0, 0, (__global DATA_TYPE *)out.ptr);
+    return;
+  }
+
+  in.ptr += input_offset_first_element_in_bytes + lup_id[0] * input_step_x +
+            lup_id[1] * input_step_y + lup_id[2] * input_step_z + lup_id[3] * input_step_w;
+
+  VSTORE(VEC_SIZE)
+  (CONVERT(VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)in.ptr), VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE)), 0,
+   (__global DATA_TYPE *)out.ptr);
+}
+#endif // defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(NUM_DIMS)
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/helpers.h b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/helpers.h
index 0e123ae0a..0e123ae0a 100644
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/helpers.h
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/helpers.h
diff --git a/libs/ARMComputeEx/src/core/CL/cl_kernels/helpers_asymm.h b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/helpers_asymm.h
index c39138caa..c39138caa 100644
--- a/libs/ARMComputeEx/src/core/CL/cl_kernels/helpers_asymm.h
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/helpers_asymm.h
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/neg_tensor.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/neg_tensor.cl
new file mode 100644
index 000000000..4aa7883c3
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/neg_tensor.cl
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "helpers.h"
+
+#ifndef VEC_SIZE
+#define VEC_SIZE 1
+#endif
+
+#if defined(DATA_TYPE)
+/** Performs a negation of input tensor.
+ *
+ * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g.
+ *            -DVEC_SIZE=16
+ * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
+ *
+ * @param[in]  in_ptr                            Pointer to the source image. Supported data types:
+ *                                               S16/S32/F16/F32.
+ * @param[in]  in_stride_x                       Stride of the source image in X dimension (in
+ *                                               bytes)
+ * @param[in]  in_step_x                         in_stride_x * number of elements along X processed
+ *                                               per work item (in bytes)
+ * @param[in]  in_offset_first_element_in_bytes  Offset of the first element in the source image
+ * @param[out] out_ptr                           Pointer to the destination image. Supported data
+ *                                               types: same as @p input_ptr
+ * @param[in]  out_stride_x                      Stride of the destination image in X dimension (in
+ *                                               bytes)
+ * @param[in]  out_step_x                        out_stride_x * number of elements along X processed
+ *                                               per work item (in bytes)
+ * @param[in]  out_offset_first_element_in_bytes Offset of the first element in the destination
+ * image
+ *
+ */
+__kernel void neg_tensor(TENSOR3D_DECLARATION(input), TENSOR3D_DECLARATION(output))
+{
+  Tensor3D input = CONVERT_TO_TENSOR3D_STRUCT(input);
+  Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
+
+  VSTORE(VEC_SIZE)
+  (-VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input.ptr), 0, (__global DATA_TYPE *)output.ptr);
+}
+#endif // defined(DATA_TYPE)
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/pixelwise_mul_quantized.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/pixelwise_mul_quantized.cl
new file mode 100644
index 000000000..2074d3ceb
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/pixelwise_mul_quantized.cl
@@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016, 2017 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "helpers_asymm.h"
+
+#ifdef SATURATE
+#define CONVERT_OP_FLOAT_STR(x, type, round) (convert_##type##_sat##round(x))
+#else /* SATURATE */
+#define CONVERT_OP_FLOAT_STR(x, type, round) (convert_##type##round(x))
+#endif /* SATURATE */
+#define CONVERT_OP_FLOAT(x, type, round) CONVERT_OP_FLOAT_STR(x, type, round)
+
+#if defined(RESULT_OFFSET) && defined(RESULT_MULT_INT) && defined(RESULT_SHIFT)
+/** Performs a pixelwise multiplication used to quantize down the int32 accumulator values of
+ *  GEMMLowp to QASYMM8
+ *
+ * The following computations will be performed by the kernel:
+ *
+ *  -# Add offset terms to inputs
+ *  -# Multiply inputs
+ *  -# Add offset terms to final result
+ *  -# Multiply each entry of result by result_mult_int
+ *  -# Shift the int32 accumulator by result_shift
+ *  -# Clamp the resulting int32 values to the [0..255] range and cast to QASYMM8.
+ *
+ * @attention The inputs and output data types need to be passed at compile time using
+ *            -DDATA_TYPE_IN1, -DDATA_TYPE_IN2 and -DDATA_TYPE_OUT:
+ *            e.g. -DDATA_TYPE_IN1=uchar -DDATA_TYPE_IN2=uchar -DDATA_TYPE_OUT=uchar
+ * @attention The offset factor of inputs must be passed at compile time using -DIN1_OFFSET and
+ *            -DIN2_OFFSET
+ * @attention The offset, scalar scale factor and number of bits to shift right of output tensor
+ *            must be passed at compile time using -DRESULT_OFFSET, -RESULT_MULT_INT and
+ *            -DRESULT_SHIFT
+ *
+ * @param[in]  in1_ptr                           Pointer to the source image. Supported data types:
+ *                                               U8
+ * @param[in]  in1_stride_x                      Stride of the source image in X dimension (in
+ *                                               bytes)
+ * @param[in]  in1_step_x                        in1_stride_x * number of elements along X processed
+ *                                               per workitem(in bytes)
+ * @param[in]  in1_stride_y                      Stride of the source image in Y dimension (in
+ *                                               bytes)
+ * @param[in]  in1_step_y                        in1_stride_y * number of elements along Y processed
+ *                                               per workitem(in bytes)
+ * @param[in]  in1_stride_z                      Stride of the source image in Y dimension (in
+ *                                               bytes)
+ * @param[in]  in1_step_z                        in1_stride_z * number of elements along Y processed
+ *                                               per workitem(in bytes)
+ * @param[in]  in1_offset_first_element_in_bytes The offset of the first element in the source image
+ * @param[in]  in2_ptr                           Pointer to the source image. Supported data types:
+ *                                               U8
+ * @param[in]  in2_stride_x                      Stride of the source image in X dimension (in
+ *                                               bytes)
+ * @param[in]  in2_step_x                        in2_stride_x * number of elements along X processed
+ *                                               per workitem(in bytes)
+ * @param[in]  in2_stride_y                      Stride of the source image in Y dimension (in
+ *                                               bytes)
+ * @param[in]  in2_step_y                        in2_stride_y * number of elements along Y processed
+ *                                               per workitem(in bytes)
+ * @param[in]  in2_stride_z                      Stride of the source image in Y dimension (in
+ *                                               bytes)
+ * @param[in]  in2_step_z                        in2_stride_z * number of elements along Y processed
+ *                                               per workitem(in bytes)
+ * @param[in]  in2_offset_first_element_in_bytes The offset of the first element in the source image
+ * @param[out] out_ptr                           Pointer to the destination image. Supported data
+ *                                               types: U8
+ * @param[in]  out_stride_x                      Stride of the destination image in X dimension (in
+ *                                               bytes)
+ * @param[in]  out_step_x                        out_stride_x * number of elements along X processed
+ *                                               per workitem(in bytes)
+ * @param[in]  out_stride_y                      Stride of the destination image in Y dimension (in
+ *                                              bytes)
+ * @param[in]  out_step_y                        out_stride_y * number of elements along Y processed
+ *                                               per workitem(in bytes)
+ * @param[in]  out_stride_z                      Stride of the destination image in Y dimension (in
+ *                                               bytes)
+ * @param[in]  out_step_z                        out_stride_z * number of elements along Y processed
+ *                                               per workitem(in bytes)
+ * @param[in]  out_offset_first_element_in_bytes The offset of the first element in the destination
+ *                                               image
+ * @param[in]  scale                             Float scaling factor. Supported data types: F32
+ */
+__kernel void pixelwise_mul_qasymm8(TENSOR3D_DECLARATION(in1), TENSOR3D_DECLARATION(in2),
+                                    TENSOR3D_DECLARATION(out), const float scale)
+{
+  // Get pixels pointer
+  Tensor3D in1 = CONVERT_TO_TENSOR3D_STRUCT(in1);
+  Tensor3D in2 = CONVERT_TO_TENSOR3D_STRUCT(in2);
+  Tensor3D out = CONVERT_TO_TENSOR3D_STRUCT(out);
+
+  // Load data
+  VEC_DATA_TYPE(int, 16)
+  in1_data = CONVERT(vload16(0, (__global DATA_TYPE_IN1 *)in1.ptr), VEC_DATA_TYPE(int, 16));
+  VEC_DATA_TYPE(int, 16)
+  in2_data = CONVERT(vload16(0, (__global DATA_TYPE_IN2 *)in2.ptr), VEC_DATA_TYPE(int, 16));
+
+  // Perform multiplication of two inputs
+  VEC_DATA_TYPE(int, 16) in1_val = in1_data + (VEC_DATA_TYPE(int, 16))(IN1_OFFSET);
+  VEC_DATA_TYPE(int, 16) in2_val = in2_data + (VEC_DATA_TYPE(int, 16))(IN2_OFFSET);
+  VEC_DATA_TYPE(int, 16) out_val = in1_val * in2_val;
+
+  // Multiply with a multiplier smaller than 1
+  out_val =
+      ASYMM_MULT_BY_QUANT_MULTIPLIER_LESS_THAN_ONE(out_val, RESULT_MULT_INT, RESULT_SHIFT, 16);
+  out_val += (VEC_DATA_TYPE(int, 16))(RESULT_OFFSET);
+
+  VEC_DATA_TYPE(uchar, 16) res = CONVERT(out_val, VEC_DATA_TYPE(uchar, 16));
+
+  // TODO: Apply min-max BOUND to support fuse with relu.
+  /*
+  #if defined(MIN_BOUND)
+      res = max(res, (uchar16)MIN_BOUND);
+  #endif // defined(MIN_BOUND)
+  #if defined(MAX_BOUND)
+      res = min(res, (uchar16)MAX_BOUND);
+  #endif // defined(MAX_BOUND)
+  */
+
+  // Store result
+  VSTORE(16)(CONVERT(res, VEC_DATA_TYPE(DATA_TYPE_OUT, 16)), 0, (__global DATA_TYPE_OUT *)out.ptr);
+}
+#endif // defined(RESULT_OFFSET) && defined(RESULT_MULT_INT) && defined(RESULT_SHIFT)
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/prelu.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/prelu.cl
new file mode 100644
index 000000000..62a8901f6
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/prelu.cl
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "helpers.h"
+
+#ifndef VEC_SIZE
+#define VEC_SIZE 1
+#endif
+
+#if defined(DATA_TYPE)
+/** Returns result of prelu function implemented as below:
+ * f(input) = alpha * input for input < 0, f(input) = input for input >= 0.
+ *
+ * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
+ * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g.
+ *            -DVEC_SIZE=16
+ * @note Can only take floating point data types.
+ *
+ * @param[in]  input1_ptr                            Pointer to the source image. Supported Data
+ *                                                   types : F16/F32
+ * @param[in]  input1_stride_x                       Stride of the source image in X dimension (in
+ *                                                   bytes)
+ * @param[in]  input1_step_x                         input1_stride_x * number of elements along X
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input1_stride_y                       Stride of the source image in Y dimension (in
+ *                                                   bytes)
+ * @param[in]  input1_step_y                         input1_stride_y * number of elements along Y
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input1_stride_z                       Stride of the source tensor in Z dimension (in
+ *                                                   bytes)
+ * @param[in]  input1_step_z                         input1_stride_z * number of elements along Z
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input1_offset_first_element_in_bytes  The offset of the first element in the source
+ *                                                   image
+ * @param[in]  alpha_ptr                             Pointer to the source image. Supported Data
+ *                                                   types : F16/F32
+ * @param[in]  alpha_stride_x                        Stride of the source image in X dimension (in
+ *                                                   bytes)
+ * @param[in]  alpha_step_x                          input2_stride_x * number of elements along X
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  alpha_stride_y                        Stride of the source image in Y dimension (in
+ *                                                   bytes)
+ * @param[in]  alpha_step_y                          input2_stride_y * number of elements along Y
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  alpha_stride_z                        Stride of the source tensor in Z dimension (in
+ *                                                   bytes)
+ * @param[in]  alpha_step_z                          input2_stride_z * number of elements along Z
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  alpha_offset_first_element_in_bytes   The offset of the first element in the source
+ *                                                   image
+ *
+ * @param[out] output_ptr                            Pointer to the destination image. Supported
+ *                                                   data types: same as @p input_ptr
+ * @param[in]  output_stride_x                       Stride of the destination image in X dimension
+ *                                                   (in bytes)
+ * @param[in]  output_step_x                         output_stride_x * number of elements along X
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  output_stride_y                       Stride of the destination image in Y dimension
+ *                                                   (in bytes)
+ * @param[in]  output_step_y                         output_stride_y * number of elements along Y
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  output_stride_z                       Stride of the source tensor in Z dimension (in
+ *                                                   bytes)
+ * @param[in]  output_step_z                         output_stride_z * number of elements along Z
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  output_offset_first_element_in_bytes  The offset of the first element in the
+ *                                                   destination image
+ */
+__kernel void prelu(TENSOR3D_DECLARATION(input), TENSOR3D_DECLARATION(alpha),
+                    TENSOR3D_DECLARATION(output))
+{
+  Tensor3D input = CONVERT_TO_TENSOR3D_STRUCT(input);
+  Tensor3D alpha = CONVERT_TO_TENSOR3D_STRUCT(alpha);
+  Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
+
+  VSTORE(VEC_SIZE)
+  (VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input.ptr) < 0
+       ? VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input.ptr) *
+             VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)alpha.ptr)
+       : VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)input.ptr),
+   0, (__global DATA_TYPE *)output.ptr);
+}
+#endif // defined(DATA_TYPE)
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/prelu_quantized.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/prelu_quantized.cl
new file mode 100644
index 000000000..5e0abd585
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/prelu_quantized.cl
@@ -0,0 +1,114 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "helpers.h"
+#define SUB(x, y) (x) - (y)
+
+#if defined(OFF_IN) && defined(OFF_ALPHA) && defined(OFF_OUT) && defined(SCALE_IN) && \
+    defined(SCALE_ALPHA) && defined(SCALE_OUT) && defined(VEC_SIZE)
+
+#define VEC_FLOAT VEC_DATA_TYPE(float, VEC_SIZE)
+#define VEC_INT VEC_DATA_TYPE(int, VEC_SIZE)
+#define VEC_UCHAR VEC_DATA_TYPE(uchar, VEC_SIZE)
+#define CONVERT_RTE(x, type) (convert_##type##_rte((x)))
+#define CONVERT_DOWN(x, type) CONVERT_RTE(x, type)
+#define SELECT_TYPE VEC_INT
+
+/** Returns result of prelu function implemented as below:
+ *  f(input) = alpha * input for input < 0, f(input) = input for input >= 0.
+ *
+ * @attention Data type can be passed using the -DDATA_TYPE_IN compile flag, e.g.
+ *            -DDATA_TYPE_IN=uchar
+ * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g.
+ *            -DVEC_SIZE=16
+ * @note Can only take uchar data types.
+ *
+ * @param[in]  input1_ptr                            Pointer to the source image. Supported Data
+ *                                                   types : QASYMM8
+ * @param[in]  input1_stride_x                       Stride of the source image in X dimension (in
+ *                                                   bytes)
+ * @param[in]  input1_step_x                         input1_stride_x * number of elements along X
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input1_stride_y                       Stride of the source image in Y dimension (in
+ *                                                   bytes)
+ * @param[in]  input1_step_y                         input1_stride_y * number of elements along Y
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input1_stride_z                       Stride of the source tensor in Z dimension (in
+ *                                                   bytes)
+ * @param[in]  input1_step_z                         input1_stride_z * number of elements along Z
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  input1_offset_first_element_in_bytes  The offset of the first element in the source
+ *                                                   image
+ * @param[in]  alpha_ptr                             Pointer to the source image. Supported Data
+ *                                                   types : QASYMM8
+ * @param[in]  alpha_stride_x                        Stride of the source image in X dimension (in
+ *                                                   bytes)
+ * @param[in]  alpha_step_x                          input2_stride_x * number of elements along X
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  alpha_stride_y                        Stride of the source image in Y dimension (in
+ *                                                   bytes)
+ * @param[in]  alpha_step_y                          input2_stride_y * number of elements along Y
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  alpha_stride_z                        Stride of the source tensor in Z dimension (in
+ *                                                   bytes)
+ * @param[in]  alpha_step_z                          input2_stride_z * number of elements along Z
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  alpha_offset_first_element_in_bytes   The offset of the first element in the source
+ *                                                   image
+ * @param[out] output_ptr                            Pointer to the destination image. Supported
+ *                                                   data types: same as @p input_ptr
+ * @param[in]  output_stride_x                       Stride of the destination image in X dimension
+ *                                                   (in bytes)
+ * @param[in]  output_step_x                         output_stride_x * number of elements along X
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  output_stride_y                       Stride of the destination image in Y dimension
+ *                                                   (in bytes)
+ * @param[in]  output_step_y                         output_stride_y * number of elements along Y
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  output_stride_z                       Stride of the source tensor in Z dimension (in
+ *                                                   bytes)
+ * @param[in]  output_step_z                         output_stride_z * number of elements along Z
+ *                                                   processed per workitem(in bytes)
+ * @param[in]  output_offset_first_element_in_bytes  The offset of the first element in the
+ *                                                   destination image
+ */
+__kernel void prelu_qasymm8(TENSOR3D_DECLARATION(input), TENSOR3D_DECLARATION(alpha),
+                            TENSOR3D_DECLARATION(output))
+{
+  // Get pixels pointer
+  Tensor3D input = CONVERT_TO_TENSOR3D_STRUCT(input);
+  Tensor3D alpha = CONVERT_TO_TENSOR3D_STRUCT(alpha);
+  Tensor3D output = CONVERT_TO_TENSOR3D_STRUCT(output);
+
+  VEC_INT in_vec = CONVERT(VLOAD(VEC_SIZE)(0, (__global uchar *)input.ptr), VEC_INT);
+  VEC_INT alpha_vec = CONVERT(VLOAD(VEC_SIZE)(0, (__global uchar *)alpha.ptr), VEC_INT);
+
+  in_vec = SUB(in_vec, (VEC_INT)((int)OFF_IN));
+  alpha_vec = SUB(alpha_vec, (VEC_INT)((int)OFF_ALPHA));
+
+  const VEC_FLOAT inf32 = CONVERT(in_vec, VEC_FLOAT) * (VEC_FLOAT)((float)SCALE_IN);
+  const VEC_FLOAT alphaf32 = CONVERT(alpha_vec, VEC_FLOAT) * (VEC_FLOAT)((float)SCALE_ALPHA);
+  const VEC_FLOAT outf32 =
+      select(inf32, inf32 * alphaf32, CONVERT(inf32 < (VEC_FLOAT)0, SELECT_TYPE));
+  const VEC_FLOAT qresf32 = outf32 / ((VEC_FLOAT)(float)SCALE_OUT) + ((VEC_FLOAT)((float)OFF_OUT));
+  const VEC_UCHAR res = CONVERT_SAT(CONVERT_DOWN(qresf32, VEC_INT), VEC_UCHAR);
+
+  VSTORE(VEC_SIZE)
+  (res, 0, (__global uchar *)output.ptr);
+}
+
+#endif // defined(OFF_IN) && defined(OFF_ALPHA) && defined(OFF_OUT) && defined(SCALE_IN) &&
+       // defined(SCALE_ALPHA) && defined(SCALE_OUT) && defined(VEC_SIZE)
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/reduce_operation.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/reduce_operation.cl
new file mode 100644
index 000000000..d7ea2e2c4
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/reduce_operation.cl
@@ -0,0 +1,188 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016, 2017 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "helpers.h"
+
+#if defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(OP_CODE)
+/** Perform reduce max/min
+ *
+ * @note Datatype should be given as a preprocessor argument using -DDATA_TYPE=type. e.g.
+ *       -DDATA_TYPE=short
+ * @attention Output tensor depth should be given as a preprocessor argument using -DDEPTH_OUT=size.
+ *            e.g. -DDEPTH_OUT=16
+ * @attention Operation type(code) specifying which operation to perform should be passed as
+ *            preprocessor argument using -DOP_CODE = number. e.g. -DOP_CODE=1
+ *
+ * @param[in]  input_ptr                            Pointer to the source image. Supported data
+ *                                                  types: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
+ * @param[in]  input_stride_x                       Stride of the source image in X dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_x                         input_stride_x * number of elements along X
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_y                         input_stride_y * number of elements along Y
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_z                         input_stride_z * number of elements along Z
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source
+ *                                                  image
+ * @param[in]  input_stride_w                       Stride of the source tensor in W dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_w                         output_stride_w * number of elements along W
+ *                                                  processed per workitem(in bytes)
+ * @param[out] output_ptr                           Pointer to the destination image. Supported data
+ *                                                  types: same as @p input_ptr
+ * @param[in]  output_stride_x                      Stride of the destination image in X dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_x                        output_stride_x * number of elements along X
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_y                      Stride of the destination image in Y dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_y                        output_stride_y * number of elements along Y
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  output_step_z                        output_stride_z * number of elements along Z
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_w                      Stride of the source tensor in W dimension (in
+ *                                                  bytes)
+ * @param[in]  output_step_w                        output_stride_w * number of elements along W
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the
+ *                                                  destination image
+ * @param[in]  axis                                 Axis through which reduction occurs
+ * @param[in]  dim                                  Dimension across the axis to be reduced.
+ */
+__kernel void reduce_min_max(TENSOR4D_DECLARATION(input), TENSOR4D_DECLARATION(output),
+                             const int axis, const int dim)
+{
+  Tensor4D in = CONVERT_TO_TENSOR4D_STRUCT(input, 0);
+  Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, DEPTH_OUT);
+
+  int indices[4] = {
+      get_global_id(0), get_global_id(1), get_global_id(2) % DEPTH_OUT,
+      get_global_id(2) / DEPTH_OUT,
+  };
+
+  DATA_TYPE value =
+      *((__global DATA_TYPE *)tensor4D_offset(&in, indices[0], indices[1], indices[2], indices[3]));
+  for (int i = 1; i < dim; ++i)
+  {
+    indices[axis] = i;
+
+#if OP_CODE == 1 // REDUCE_MAX
+    value = max(value, *((__global DATA_TYPE *)tensor4D_offset(&in, indices[0], indices[1],
+                                                               indices[2], indices[3])));
+
+#elif OP_CODE == 2 // REDUCE_MIN
+    value = min(value, *((__global DATA_TYPE *)tensor4D_offset(&in, indices[0], indices[1],
+                                                               indices[2], indices[3])));
+
+#else // OP NOT SUPPORTED
+    return;
+
+#endif
+  }
+
+  *((__global DATA_TYPE *)out.ptr) = value;
+}
+
+/** Perform reduce sum/mean
+ *
+ * @note Datatype should be given as a preprocessor argument using -DDATA_TYPE=type. e.g.
+ *       -DDATA_TYPE=short
+ * @attention Output tensor depth should be given as a preprocessor argument using -DDEPTH_OUT=size.
+ *            e.g. -DDEPTH_OUT=16
+ * @attention Operation type(code) specifying which operation to perform should be passed as
+ *            preprocessor argument using -DOP_CODE = number. e.g. -DOP_CODE=1
+ *
+ * @param[in]  input_ptr                            Pointer to the source image. Supported data
+ *                                                  types: U8/S8/U16/S16/F16/U32/S32/F32
+ * @param[in]  input_stride_x                       Stride of the source image in X dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_x                         input_stride_x * number of elements along X
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_y                         input_stride_y * number of elements along Y
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_z                         input_stride_z * number of elements along Z
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source
+ *                                                  image
+ * @param[in]  input_stride_w                       Stride of the source tensor in W dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_w                         output_stride_w * number of elements along W
+ *                                                  processed per workitem(in bytes)
+ * @param[out] output_ptr                           Pointer to the destination image. Supported data
+ *                                                  types: same as @p input_ptr
+ * @param[in]  output_stride_x                      Stride of the destination image in X dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_x                        output_stride_x * number of elements along X
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_y                      Stride of the destination image in Y dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_y                        output_stride_y * number of elements along Y
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  output_step_z                        output_stride_z * number of elements along Z
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_w                      Stride of the source tensor in W dimension (in
+ *                                                  bytes)
+ * @param[in]  output_step_w                        output_stride_w * number of elements along W
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the
+ *                                                  destination image
+ * @param[in]  axis                                 Axis through which reduction occurs
+ * @param[in]  dim                                  Dimension across the axis to be reduced.
+ */
+__kernel void reduce_sum_mean(TENSOR4D_DECLARATION(input), TENSOR4D_DECLARATION(output),
+                              const int axis, const int dim)
+{
+  Tensor4D in = CONVERT_TO_TENSOR4D_STRUCT(input, 0);
+  Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, DEPTH_OUT);
+
+  int indices[4] = {
+      get_global_id(0), get_global_id(1), get_global_id(2) % DEPTH_OUT,
+      get_global_id(2) / DEPTH_OUT,
+  };
+
+  DATA_TYPE sum_value = (DATA_TYPE)0;
+  for (int i = 0; i < dim; ++i)
+  {
+    indices[axis] = i;
+    sum_value += *(
+        (__global DATA_TYPE *)tensor4D_offset(&in, indices[0], indices[1], indices[2], indices[3]));
+  }
+
+#if OP_CODE == 3 // REDUCE_SUM
+  *((__global DATA_TYPE *)out.ptr) = sum_value;
+
+#elif OP_CODE == 4 // REDUCE_MEAN
+  *((__global DATA_TYPE *)out.ptr) = sum_value / CONVERT(dim, DATA_TYPE);
+
+#else // OP NOT SUPPORTED
+  return;
+
+#endif
+}
+#endif // defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(OP_CODE)
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/space_to_batch.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/space_to_batch.cl
new file mode 100644
index 000000000..7367da7fb
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/space_to_batch.cl
@@ -0,0 +1,250 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016, 2017 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "helpers.h"
+
+#if defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(BATCH_IN) && defined(HEIGHT_IN) && \
+    defined(WIDTH_IN) && defined(ZERO_VALUE)
+/** Perform space to batch with input of 4D and NCHW format
+ *
+ * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
+ * @attention Output tensor depth should be given as a preprocessor argument using -DDEPTH_OUT=size.
+ *            e.g. -DDEPTH_OUT=16
+ * @attention Input tensor batch should be given as a preprocessor argument using -DBATCH_IN=size.
+ *            e.g. -DBATCH_IN=16
+ * @attention Input tensor height should be given as a preprocessor argument using -DHEIGHT_IN=size.
+ *            e.g. -DHEIGHT_IN=16
+ * @attention Input tensor width should be given as a preprocessor argument using -DHEIGHT_IN=size.
+ *            e.g. -DWIDTH_IN=16
+ * @attention The value to be set by pad value using -DZERO_VALUE=value. e.g. -DZERO_VALUE=0
+ *
+ * @param[in]  input_ptr                                   Pointer to the source tensor. Supported
+ *                                                         data types: U8/S8/U16/S16/F16/U32/S32/F32
+ * @param[in]  input_stride_x                              Stride of the source tensor in X
+ *                                                         dimension (in bytes)
+ * @param[in]  input_step_x                                input_stride_x * number of elements along
+ *                                                         X processed per workitem(in  bytes)
+ * @param[in]  input_stride_y                              Stride of the source tensor in Y
+ *                                                         dimension (in bytes)
+ * @param[in]  input_step_y                                input_stride_y * number of elements along
+ *                                                         Y processed per workitem(in  bytes)
+ * @param[in]  input_stride_z                              Stride of the source tensor in Z
+ *                                                         dimension (in bytes)
+ * @param[in]  input_step_z                                input_stride_z * number of elements along
+ *                                                         Z processed per workitem(in  bytes)
+ * @param[in]  input_stride_w                              Stride of the destination tensor in W
+ *                                                         dimension (in bytes)
+ * @param[in]  input_step_w                                input_stride_w * number of elements along
+ *                                                         W processed per workitem(in bytes)
+ * @param[in]  input_offset_first_element_in_bytes         The offset of the first element in the
+ *                                                         source tensor
+ * @param[out] output_ptr                                  Pointer to the destination tensor.
+ *                                                         Supported data types: same as @p
+ *                                                         input_ptr
+ * @param[in]  output_stride_x                             Stride of the destination tensor in X
+ *                                                         dimension (in bytes)
+ * @param[in]  output_step_x                               output_stride_x * number of elements
+ *                                                         along X processed per workitem(in bytes)
+ * @param[in]  output_stride_y                             Stride of the destination tensor in Y
+ * dimension (in bytes)
+ * @param[in]  output_step_y                               output_stride_y * number of elements
+ *                                                         along Y processed per workitem(in bytes)
+ * @param[in]  output_stride_z                             Stride of the destination tensor in Z
+ *                                                         dimension (in bytes)
+ * @param[in]  output_step_z                               output_stride_z * number of elements
+ *                                                         along Z processed per workitem(in bytes)
+ * @param[in]  output_stride_w                             Stride of the destination tensor in W
+ *                                                         dimension (in bytes)
+ * @param[in]  output_step_w                               output_stride_w * number of elements
+ *                                                         along W processed per workitem(in bytes)
+ * @param[in]  output_offset_first_element_in_bytes        The offset of the first element in the
+ *                                                         destination tensor
+ * @param[in]  block_size_ptr                              Pointer to the source tensor. Supported
+ *                                                         data types: S32
+ * @param[in]  block_size_stride_x                         Stride of the source tensor in X
+ *                                                         dimension (in bytes)
+ * @param[in]  block_size_step_x                           block_size_stride_x * number of elements
+ *                                                         along X processed per workitem(in  bytes)
+ * @param[in]  block_size_offset_first_element_in_bytes    The offset of the first element in the
+ *                                                         destination tensor
+ * @param[in]  padding_size_ptr                            Pointer to the source tensor. Supported
+ *                                                         data types: S32
+ * @param[in]  padding_size_stride_x                       Stride of the source tensor in X
+ *                                                         dimension (in bytes)
+ * @param[in]  padding_size_step_x                         padding_size_stride_x * number of
+ *                                                         elements along X processed per workitem
+ *                                                         (in bytes)
+ * @param[in]  padding_size_stride_y                       Stride of the source tensor in Y
+ *                                                         dimension (in bytes)
+ * @param[in]  padding_size_step_y                         padding_size_stride_y * number of
+ *                                                         elements along Y processed per workitem
+ *                                                         (in  bytes)
+ * @param[in]  padding_size_offset_first_element_in_bytes  The offset of the first element in the
+ *                                                         destination tensor
+ */
+__kernel void space_to_batch_4d_nchw(TENSOR4D_DECLARATION(input), TENSOR4D_DECLARATION(output),
+                                     VECTOR_DECLARATION(block_size),
+                                     IMAGE_DECLARATION(padding_size))
+{
+  Tensor4D in = CONVERT_TO_TENSOR4D_STRUCT(input, 0);
+  Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, DEPTH_OUT);
+
+  int block_size_x = *((__global int *)(block_size_ptr));
+  int block_size_y = *((__global int *)(block_size_ptr + block_size_stride_x));
+  int shift_x = (get_global_id(2) / DEPTH_OUT / BATCH_IN) % block_size_x;
+  int shift_y = (get_global_id(2) / DEPTH_OUT / BATCH_IN) / block_size_x;
+
+  int in_index[4] = {
+      0,
+  };
+  in_index[0] = get_global_id(0) * block_size_x + shift_x - *((__global int *)(padding_size_ptr));
+  in_index[1] = get_global_id(1) * block_size_y + shift_y -
+                *((__global int *)(padding_size_ptr + padding_size_stride_y));
+  in_index[2] = get_global_id(2) % DEPTH_OUT;
+  in_index[3] = (get_global_id(2) / DEPTH_OUT) % BATCH_IN;
+
+  if (in_index[0] < 0 || in_index[0] >= WIDTH_IN || in_index[1] < 0 || in_index[1] >= HEIGHT_IN)
+  {
+    *((__global DATA_TYPE *)out.ptr) = (DATA_TYPE)ZERO_VALUE;
+  }
+  else
+  {
+    *((__global DATA_TYPE *)out.ptr) = *((__global DATA_TYPE *)tensor4D_offset(
+        &in, in_index[0], in_index[1], in_index[2], in_index[3]));
+  }
+}
+#endif // defined(DATA_TYPE) && defined(DEPTH_OUT) && defined(BATCH_IN) && defined(HEIGHT_IN) &&
+       // defined(WIDTH_IN) && defined(ZERO_VALUE)
+
+#if defined(DATA_TYPE) && defined(HEIGHT_OUT) && defined(BATCH_IN) && defined(HEIGHT_IN) && \
+    defined(WIDTH_IN) && defined(ZERO_VALUE) && defined(VEC_SIZE)
+/** Perform space to batch with input of 4D and NHWC format
+ *
+ * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
+ * @attention Output tensor depth should be given as a preprocessor argument using
+ *            -DHEIGHT_OUT=size. e.g. -DHEIGHT_OUT=16
+ * @attention Input tensor batch should be given as a preprocessor argument using -DBATCH_IN=size.
+ *            e.g. -DBATCH_IN=16
+ * @attention Input tensor height should be given as a preprocessor argument using -DHEIGHT_IN=size.
+ *            e.g. -DHEIGHT_IN=16
+ * @attention Input tensor width should be given as a preprocessor argument using -DHEIGHT_IN=size.
+ *            e.g. -DWIDTH_IN=16
+ * @attention The value to be set by pad value using -DZERO_VALUE=value. e.g. -DZERO_VALUE=0
+ * @attention Vector size should be given as a preprocessor argument using -DVEC_SIZE=size. e.g.
+ *            -DVEC_SIZE=16
+ *
+ * @param[in]  input_ptr                                   Pointer to the source tensor. Supported
+ *                                                         data types: U8/S8/U16/S16/F16/U32/S32/F32
+ * @param[in]  input_stride_x                              Stride of the source tensor in X
+ *                                                         dimension (in bytes)
+ * @param[in]  input_step_x                                input_stride_x * number of elements along
+ *                                                         X processed per workitem(in  bytes)
+ * @param[in]  input_stride_y                              Stride of the source tensor in Y
+ *                                                         dimension (in bytes)
+ * @param[in]  input_step_y                                input_stride_y * number of elements along
+ *                                                         Y processed per workitem(in  bytes)
+ * @param[in]  input_stride_z                              Stride of the source tensor in Z
+ *                                                         dimension (in bytes)
+ * @param[in]  input_step_z                                input_stride_z * number of elements along
+ *                                                         Z processed per workitem(in  bytes)
+ * @param[in]  input_stride_w                              Stride of the destination tensor in W
+ *                                                         dimension (in bytes)
+ * @param[in]  input_step_w                                input_stride_w * number of elements along
+ *                                                         W processed per workitem(in bytes)
+ * @param[in]  input_offset_first_element_in_bytes         The offset of the first element in the
+ *                                                         source tensor
+ * @param[out] output_ptr                                  Pointer to the destination tensor.
+ *                                                         Supported data types: same as @p
+ *                                                         input_ptr
+ * @param[in]  output_stride_x                             Stride of the destination tensor in X
+ *                                                         dimension (in bytes)
+ * @param[in]  output_step_x                               output_stride_x * number of elements
+ *                                                         along X processed per workitem(in bytes)
+ * @param[in]  output_stride_y                             Stride of the destination tensor in Y
+ *                                                         dimension (in bytes)
+ * @param[in]  output_step_y                               output_stride_y * number of elements
+ *                                                         along Y processed per workitem(in bytes)
+ * @param[in]  output_stride_z                             Stride of the destination tensor in Z
+ *                                                         dimension (in bytes)
+ * @param[in]  output_step_z                               output_stride_z * number of elements
+ *                                                         along Z processed per workitem(in bytes)
+ * @param[in]  output_stride_w                             Stride of the destination tensor in W
+ *                                                         dimension (in bytes)
+ * @param[in]  output_step_w                               output_stride_w * number of elements
+ *                                                         along W processed per workitem(in bytes)
+ * @param[in]  output_offset_first_element_in_bytes        The offset of the first element in the
+ *                                                         destination tensor
+ * @param[in]  block_size_ptr                              Pointer to the source tensor. Supported
+ *                                                         data types: S32
+ * @param[in]  block_size_stride_x                         Stride of the source tensor in X
+ *                                                         dimension (in bytes)
+ * @param[in]  block_size_step_x                           block_size_stride_x * number of elements
+ *                                                         along X processed per workitem(in  bytes)
+ * @param[in]  block_size_offset_first_element_in_bytes    The offset of the first element in the
+ *                                                         destination tensor
+ * @param[in]  padding_size_ptr                            Pointer to the source tensor. Supported
+ *                                                         data types: S32
+ * @param[in]  padding_size_stride_x                       Stride of the source tensor in X
+ *                                                         dimension (in bytes)
+ * @param[in]  padding_size_step_x                         padding_size_stride_x * number of
+ *                                                         elements along X processed per workitem
+ *                                                         (in  bytes)
+ * @param[in]  padding_size_stride_y                       Stride of the source tensor in Y
+ *                                                         dimension (in bytes)
+ * @param[in]  padding_size_step_y                         padding_size_stride_y * number of
+ *                                                         elements along Y processed per workitem
+ *                                                         (in bytes)
+ * @param[in]  padding_size_offset_first_element_in_bytes  The offset of the first element in the
+ *                                                         destination tensor
+ */
+__kernel void space_to_batch_4d_nhwc(TENSOR4D_DECLARATION(input), TENSOR4D_DECLARATION(output),
+                                     VECTOR_DECLARATION(block_size),
+                                     IMAGE_DECLARATION(padding_size))
+{
+  Tensor4D in = CONVERT_TO_TENSOR4D_STRUCT(input, 0);
+  Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT(output, HEIGHT_OUT);
+
+  int block_size_x = *((__global int *)(block_size_ptr));
+  int block_size_y = *((__global int *)(block_size_ptr + block_size_stride_x));
+  int shift_x = (get_global_id(2) / HEIGHT_OUT / BATCH_IN) % block_size_x;
+  int shift_y = (get_global_id(2) / HEIGHT_OUT / BATCH_IN) / block_size_x;
+
+  int in_index[4] = {
+      0,
+  };
+  in_index[0] = get_global_id(0) * VEC_SIZE;
+  in_index[1] = get_global_id(1) * block_size_x + shift_x - *((__global int *)(padding_size_ptr));
+  in_index[2] = get_global_id(2) % HEIGHT_OUT * block_size_y + shift_y -
+                *((__global int *)(padding_size_ptr + padding_size_stride_y));
+  in_index[3] = (get_global_id(2) / HEIGHT_OUT) % BATCH_IN;
+
+  if (in_index[1] < 0 || in_index[1] >= WIDTH_IN || in_index[2] < 0 || in_index[2] >= HEIGHT_IN)
+  {
+    VSTORE(VEC_SIZE)
+    ((VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE))ZERO_VALUE, 0, (__global DATA_TYPE *)out.ptr);
+  }
+  else
+  {
+    VSTORE(VEC_SIZE)
+    (CONVERT(VLOAD(VEC_SIZE)(0, (__global DATA_TYPE *)tensor4D_offset(&in, in_index[0], in_index[1],
+                                                                      in_index[2], in_index[3])),
+             VEC_DATA_TYPE(DATA_TYPE, VEC_SIZE)),
+     0, (__global DATA_TYPE *)out.ptr);
+  }
+}
+
+#endif // defined(DATA_TYPE) && defined(HEIGHT_OUT) && defined(BATCH_IN) && defined(HEIGHT_IN) &&
+       // defined(WIDTH_IN) && defined(ZERO_VALUE) && defined(VEC_SIZE)
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/space_to_depth.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/space_to_depth.cl
new file mode 100644
index 000000000..a26e762e8
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/space_to_depth.cl
@@ -0,0 +1,161 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016, 2017 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "helpers.h"
+
+#if defined(DATA_TYPE) && defined(DEPTH_IN) && defined(BLOCK_SIZE) && defined(Z_IN)
+/** Perform space to depth rearrangement of tensor
+ *
+ * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
+ * @attention Input tensor depth should be given as a preprocessor argument using -DDEPTH_IN=size.
+ *            e.g. -DDEPTH_IN=16
+ * @attention The value of the z-axis of input tensor depth should be given as a preprocessor
+ *            argument using -DZ_IN=size. e.g. -DZ_IN=16
+ * @attention block size should be given as a preprocessor argument using -DBLOCK_SIZE=size. e.g.
+ *            -DBLOCK_SIZE=1
+ *
+ * @param[in]  input_ptr                            Pointer to the source image. Supported data
+ *                                                  types: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
+ * @param[in]  input_stride_x                       Stride of the source image in X dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_x                         input_stride_x * number of elements along X
+ *                                                  processed per workitem(in  bytes)
+ * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_y                         input_stride_y * number of elements along Y
+ *                                                  processed per workitem(in  bytes)
+ * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_z                         input_stride_z * number of elements along Z
+ *                                                  processed per workitem(in  bytes)
+ * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source
+ *                                                  image
+ * @param[out] output_ptr                           Pointer to the destination image. Supported data
+ *                                                  types: same as @p input_ptr
+ * @param[in]  output_stride_x                      Stride of the destination image in X dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_x                        output_stride_x * number of elements along X
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_y                      Stride of the destination image in Y dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_y                        output_stride_y * number of elements along Y
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  output_step_z                        output_stride_z * number of elements along Z
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_w                      Stride of the source tensor in W dimension (in
+ *                                                  bytes)
+ * @param[in]  output_step_w                        output_stride_w * number of elements along W
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the
+ *                                                  destination image
+ */
+__kernel void space_to_depth_nchw(TENSOR4D_DECLARATION(input), TENSOR4D_DECLARATION(output))
+{
+  Tensor4D in = CONVERT_TO_TENSOR4D_STRUCT(input, Z_IN);
+  Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT_NO_STEP(output, 0);
+
+  int out_index[4] = {0};
+  int in_index[4] = {0};
+
+  in_index[0] = get_global_id(0);        // W
+  in_index[1] = get_global_id(1);        // H
+  in_index[2] = get_global_id(2) % Z_IN; // C
+  in_index[3] = get_global_id(2) / Z_IN; // B
+
+  out_index[0] = in_index[0] / BLOCK_SIZE;
+  out_index[1] = in_index[1] / BLOCK_SIZE;
+  out_index[2] =
+      in_index[2] + ((in_index[1] % BLOCK_SIZE) * BLOCK_SIZE + in_index[0] % BLOCK_SIZE) * DEPTH_IN;
+  out_index[3] = in_index[3];
+
+  *((__global DATA_TYPE *)tensor4D_offset(&out, out_index[0], out_index[1], out_index[2],
+                                          out_index[3])) = *((__global DATA_TYPE *)in.ptr);
+}
+#endif // defined(DATA_TYPE) && defined(Z_IN) && defined(BLOCK_SIZE) && defined(Z_IN)
+
+#if defined(DATA_TYPE) && defined(Z_IN) && defined(BLOCK_SIZE) && defined(Z_IN)
+/** Perform space to depth rearrangement of tensor
+ *
+ * @attention Data type can be passed using the -DDATA_TYPE compile flag, e.g. -DDATA_TYPE=float
+ * @attention Input tensor depth should be given as a preprocessor argument using -DDEPTH_IN=size.
+ *            e.g. -DDEPTH_IN=16
+ * @attention The value of the z-axis of input tensor depth should be given as a preprocessor
+ *            argument using -DZ_IN=size. e.g. -DZ_IN=16
+ * @attention block size should be given as a preprocessor argument using -DBLOCK_SIZE=size. e.g.
+ *            -DBLOCK_SIZE=1
+ *
+ * @param[in]  input_ptr                            Pointer to the source image. Supported data
+ *                                                  types: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
+ * @param[in]  input_stride_x                       Stride of the source image in X dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_x                         input_stride_x * number of elements along X
+ *                                                  processed per workitem(in  bytes)
+ * @param[in]  input_stride_y                       Stride of the source image in Y dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_y                         input_stride_y * number of elements along Y
+ *                                                  processed per workitem(in  bytes)
+ * @param[in]  input_stride_z                       Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  input_step_z                         input_stride_z * number of elements along Z
+ *                                                  processed per workitem(in  bytes)
+ * @param[in]  input_offset_first_element_in_bytes  The offset of the first element in the source
+ *                                                  image
+ * @param[out] output_ptr                           Pointer to the destination image. Supported data
+ *                                                  types: same as @p input_ptr
+ * @param[in]  output_stride_x                      Stride of the destination image in X dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_x                        output_stride_x * number of elements along X
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_y                      Stride of the destination image in Y dimension
+ *                                                  (in bytes)
+ * @param[in]  output_step_y                        output_stride_y * number of elements along Y
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_z                      Stride of the source tensor in Z dimension (in
+ *                                                  bytes)
+ * @param[in]  output_step_z                        output_stride_z * number of elements along Z
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_stride_w                      Stride of the source tensor in W dimension (in
+ *                                                  bytes)
+ * @param[in]  output_step_w                        output_stride_w * number of elements along W
+ *                                                  processed per workitem(in bytes)
+ * @param[in]  output_offset_first_element_in_bytes The offset of the first element in the
+ *                                                  destination image
+ */
+__kernel void space_to_depth_nhwc(TENSOR4D_DECLARATION(input), TENSOR4D_DECLARATION(output))
+{
+  Tensor4D in = CONVERT_TO_TENSOR4D_STRUCT(input, Z_IN);
+  Tensor4D out = CONVERT_TO_TENSOR4D_STRUCT_NO_STEP(output, 0);
+
+  int out_index[4] = {0};
+  int in_index[4] = {0};
+
+  in_index[0] = get_global_id(0);        // C
+  in_index[1] = get_global_id(1);        // W
+  in_index[2] = get_global_id(2) % Z_IN; // H
+  in_index[3] = get_global_id(2) / Z_IN; // B
+
+  out_index[0] =
+      in_index[0] + ((in_index[2] % BLOCK_SIZE) * BLOCK_SIZE + in_index[1] % BLOCK_SIZE) * DEPTH_IN;
+  out_index[1] = in_index[1] / BLOCK_SIZE;
+  out_index[2] = in_index[2] / BLOCK_SIZE;
+  out_index[3] = in_index[3];
+
+  *((__global DATA_TYPE *)tensor4D_offset(&out, out_index[0], out_index[1], out_index[2],
+                                          out_index[3])) = *((__global DATA_TYPE *)in.ptr);
+}
+#endif // defined(DATA_TYPE) && defined(DEPTH_IN) && defined(BLOCK_SIZE) && defined(Z_IN)
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2.cl
new file mode 100644
index 000000000..50472e4f9
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2.cl
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "helpers.h"
+
+__kernel void topkv2_init(VECTOR_DECLARATION(input), __global float *in_key_buf,
+                          __global int *in_ind_buf, const int n)
+{
+  int gid = get_global_id(0);
+  int lws = get_local_size(0);
+  int groups = get_num_groups(0);
+  int gws = lws * groups;
+  int iter = n / gws;
+
+  Vector input = CONVERT_TO_VECTOR_STRUCT_NO_STEP(input);
+
+  for (int i = 0; i < iter; ++i)
+  {
+    int idx = i * gws + gid;
+    in_key_buf[idx] = *(__global float *)(input.ptr + idx * input.stride_x);
+    in_ind_buf[idx] = idx;
+  }
+}
+
+__kernel void topkv2_find_first_negative(__global float *out_key_buf,
+                                         __global int *first_negative_idx, int n)
+{
+  int gid = get_global_id(0);
+
+  if (gid == n - 1)
+  {
+    // if the last item is positive, the first negative index is n.
+    if (out_key_buf[gid] > 0.f)
+      *first_negative_idx = n;
+  }
+  else if (gid == 0)
+  {
+    // if the first item is negative, set it 0.
+    if (out_key_buf[gid] < 0.f)
+      *first_negative_idx = 0;
+  }
+  else
+  {
+    // if its left is positive and it is negative, then it is the first negative item.
+    if (out_key_buf[gid - 1] > 0.f && out_key_buf[gid] < 0.f)
+      *first_negative_idx = gid;
+  }
+}
+
+__kernel void topkv2_reorder_negatives(__global float *in_key_buf, __global float *out_key_buf,
+                                       __global float *in_ind_buf, __global float *out_ind_buf,
+                                       __global int *first_negative_idx, int n)
+{
+  int gid = get_global_id(0);
+
+  int num_negs = n - *first_negative_idx;
+  int in_idx;
+
+  if (gid < num_negs)
+  {
+    in_idx = n - 1 - gid;
+  }
+  else
+  {
+    in_idx = gid - num_negs;
+  }
+
+  out_key_buf[gid] = in_key_buf[in_idx];
+  out_ind_buf[gid] = in_ind_buf[in_idx];
+}
+
+__kernel void topkv2_store(VECTOR_DECLARATION(values), VECTOR_DECLARATION(indices),
+                           __global float *out_key_buf, __global int *out_ind_buf, int n)
+{
+  int gid = get_global_id(0);
+
+  Vector values = CONVERT_TO_VECTOR_STRUCT_NO_STEP(values);
+  Vector indices = CONVERT_TO_VECTOR_STRUCT_NO_STEP(indices);
+
+  int idx = n - 1 - gid;
+
+  *(__global float *)(values.ptr + gid * values.stride_x) = out_key_buf[idx];
+  *(__global int *)(indices.ptr + gid * indices.stride_x) = out_ind_buf[idx];
+}
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2_quicksort.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2_quicksort.cl
new file mode 100644
index 000000000..9594daf19
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2_quicksort.cl
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "helpers.h"
+
+__global inline float *get_vec_elem(Vector *vec, int idx)
+{
+  return (__global float *)(vec->ptr + idx * vec->stride_x);
+}
+
+__global inline int *get_vec_elem_int(Vector *vec, int idx)
+{
+  return (__global int *)(vec->ptr + idx * vec->stride_x);
+}
+
+// A utility function to swap two elements
+void swap(__global float *a, __global float *b)
+{
+  float t = *a;
+  *a = *b;
+  *b = t;
+}
+
+void swap_idx(__global int *a, __global int *b)
+{
+  int t = *a;
+  *a = *b;
+  *b = t;
+}
+
+/* This function is same in both iterative and recursive*/
+int partition(Vector *arr, __global int *indices, int l, int h)
+{
+  float x = *get_vec_elem(arr, h);
+  int i = (l - 1);
+
+  for (int j = l; j <= h - 1; j++)
+  {
+    if (*get_vec_elem(arr, j) >= x)
+    {
+      i++;
+      swap(get_vec_elem(arr, i), get_vec_elem(arr, j));
+      swap_idx(&indices[i], &indices[j]);
+    }
+  }
+  swap(get_vec_elem(arr, i + 1), get_vec_elem(arr, h));
+  swap_idx(&indices[i + 1], &indices[h]);
+  return (i + 1);
+}
+
+/* A[] --> Array to be sorted,
+   l  --> Starting index,
+   h  --> Ending index */
+void quickSortIterative(Vector *arr, __global int *indices, __global int *stack, int l, int h)
+{
+  // Create an auxiliary stack
+
+  // initialize top of stack
+  int top = -1;
+
+  // push initial values of l and h to stack
+  stack[++top] = l;
+  stack[++top] = h;
+
+  // Keep popping from stack while is not empty
+  while (top >= 0)
+  {
+    // Pop h and l
+    h = stack[top--];
+    l = stack[top--];
+
+    // Set pivot element at its correct position
+    // in sorted array
+    int p = partition(arr, indices, l, h);
+
+    // If there are elements on left side of pivot,
+    // then push left side to stack
+    if (p - 1 > l)
+    {
+      stack[++top] = l;
+      stack[++top] = p - 1;
+    }
+
+    // If there are elements on right side of pivot,
+    // then push right side to stack
+    if (p + 1 < h)
+    {
+      stack[++top] = p + 1;
+      stack[++top] = h;
+    }
+  }
+}
+
+__kernel void topkv2_quicksort(VECTOR_DECLARATION(input), VECTOR_DECLARATION(topk_values),
+                               VECTOR_DECLARATION(topk_indices), __global int *indices,
+                               __global int *temp_stack, int k, int n)
+{
+  Vector input = CONVERT_TO_VECTOR_STRUCT_NO_STEP(input);
+  Vector topk_values = CONVERT_TO_VECTOR_STRUCT_NO_STEP(topk_values);
+  Vector topk_indices = CONVERT_TO_VECTOR_STRUCT_NO_STEP(topk_indices);
+
+  for (int i = 0; i < n; ++i)
+  {
+    indices[i] = i;
+  }
+
+  quickSortIterative(&input, indices, temp_stack, 0, n - 1);
+
+  // extract k items.
+  for (int i = 0; i < k; ++i)
+  {
+    *get_vec_elem(&topk_values, i) = *get_vec_elem(&input, i);
+    *get_vec_elem_int(&topk_indices, i) = indices[i];
+  }
+}
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2_radixsort.cl b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2_radixsort.cl
new file mode 100644
index 000000000..f6830d229
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/cl_kernels/topkv2_radixsort.cl
@@ -0,0 +1,269 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+// reference:
+// https://code.google.com/archive/p/ocl-radix-sort/source/default/source
+// OpenCL kernel sources for the CLRadixSort class
+// the #include does not exist in OpenCL
+// Copyright Philippe Helluy, Université de Strasbourg, France, 2011, helluy@math.unistra.fr
+// licensed under the GNU Lesser General Public License see http://www.gnu.org/copyleft/lesser.html
+// if you find this software usefull you can cite the following work in your reports or articles:
+// Philippe HELLUY, A portable implementation of the radix sort algorithm in OpenCL, 2011.
+// http://hal.archives-ouvertes.fr/hal-00596730
+
+// Reference for floating point radix sort:
+// http://www.codercorner.com/RadixSortRevisited.htm
+
+// compute the histogram for each radix and each virtual processor for the pass
+__kernel void radixsort_histogram(__global float *in_key_buf, __global int *d_Histograms,
+                                  const int pass, __local int *loc_histo, const int n)
+{
+  int it = get_local_id(0);  // i local number of the processor
+  int ig = get_global_id(0); // global number = i + g I
+
+  int gr = get_group_id(0); // g group number
+
+  int groups = get_num_groups(0);
+  int items = get_local_size(0);
+
+  // set the local histograms to zero
+  for (int ir = 0; ir < _RADIX; ir++)
+  {
+    loc_histo[ir * items + it] = 0;
+  }
+
+  barrier(CLK_LOCAL_MEM_FENCE);
+
+  // range of keys that are analyzed by the work item
+  int size = n / groups / items; // size of the sub-list
+  int start = ig * size;         // beginning of the sub-list
+
+  unsigned int key;
+  int shortkey, k;
+
+  // compute the index
+  // the computation depends on the transposition
+  for (int j = 0; j < size; j++)
+  {
+#ifdef TRANSPOSE
+    k = groups * items * j + ig;
+#else
+    k = j + start;
+#endif
+
+    key = *((__global unsigned int *)(in_key_buf + k));
+
+    // extract the group of _BITS bits of the pass
+    // the result is in the range 0.._RADIX-1
+    shortkey = ((key >> (pass * _BITS)) & (_RADIX - 1));
+
+    // increment the local histogram
+    loc_histo[shortkey * items + it]++;
+  }
+
+  barrier(CLK_LOCAL_MEM_FENCE);
+
+  // copy the local histogram to the global one
+  for (int ir = 0; ir < _RADIX; ir++)
+  {
+    d_Histograms[items * (ir * groups + gr) + it] = loc_histo[ir * items + it];
+  }
+
+  barrier(CLK_GLOBAL_MEM_FENCE);
+}
+
+// initial transpose of the list for improving
+// coalescent memory access
+__kernel void transpose(const __global int *invect, __global int *outvect, const int nbcol,
+                        const int nbrow, const __global int *inperm, __global int *outperm,
+                        __local int *blockmat, __local int *blockperm, const int tilesize)
+{
+
+  int i0 = get_global_id(0) * tilesize; // first row index
+  int j = get_global_id(1);             // column index
+
+  int jloc = get_local_id(1); // local column index
+
+  // fill the cache
+  for (int iloc = 0; iloc < tilesize; iloc++)
+  {
+    int k = (i0 + iloc) * nbcol + j; // position in the matrix
+    blockmat[iloc * tilesize + jloc] = invect[k];
+#ifdef PERMUT
+    blockperm[iloc * tilesize + jloc] = inperm[k];
+#endif
+  }
+
+  barrier(CLK_LOCAL_MEM_FENCE);
+
+  // first row index in the transpose
+  int j0 = get_group_id(1) * tilesize;
+
+  // put the cache at the good place
+  for (int iloc = 0; iloc < tilesize; iloc++)
+  {
+    int kt = (j0 + iloc) * nbrow + i0 + jloc; // position in the transpose
+    outvect[kt] = blockmat[jloc * tilesize + iloc];
+#ifdef PERMUT
+    outperm[kt] = blockperm[jloc * tilesize + iloc];
+#endif
+  }
+}
+
+// each virtual processor reorders its data using the scanned histogram
+__kernel void radixsort_reorder(__global float *in_key, __global float *out_key,
+                                __global int *d_Histograms, const int pass,
+                                __global int *indices_in, __global int *indices_out,
+                                __local int *loc_histo, const int n)
+{
+
+  int it = get_local_id(0);
+  int ig = get_global_id(0);
+
+  int gr = get_group_id(0);
+  int groups = get_num_groups(0);
+  int items = get_local_size(0);
+
+  int start = ig * (n / groups / items);
+  int size = n / groups / items;
+
+  // take the histogram in the cache
+  for (int ir = 0; ir < _RADIX; ir++)
+  {
+    loc_histo[ir * items + it] = d_Histograms[items * (ir * groups + gr) + it];
+  }
+  barrier(CLK_LOCAL_MEM_FENCE);
+
+  int newpos, shortkey, k, newpost;
+  unsigned int key;
+
+  for (int j = 0; j < size; j++)
+  {
+#ifdef TRANSPOSE
+    k = groups * items * j + ig;
+#else
+    k = j + start;
+#endif
+    float org_value = in_key[k];
+    key = *(__global unsigned int *)(in_key + k);
+    shortkey = ((key >> (pass * _BITS)) & (_RADIX - 1));
+
+    newpos = loc_histo[shortkey * items + it];
+
+#ifdef TRANSPOSE
+    int ignew, jnew;
+    ignew = newpos / (n / groups / items);
+    jnew = newpos % (n / groups / items);
+    newpost = jnew * (groups * items) + ignew;
+#else
+    newpost = newpos;
+#endif
+
+    // d_outKeys[newpost]= key;  // killing line !!!
+    out_key[newpost] = org_value;
+
+#ifdef PERMUT
+    indices_out[newpost] = indices_in[k];
+#endif
+
+    newpos++;
+    loc_histo[shortkey * items + it] = newpos;
+  }
+}
+
+// perform a parallel prefix sum (a scan) on the local histograms
+// (see Blelloch 1990) each workitem worries about two memories
+// see also http://http.developer.nvidia.com/GPUGems3/gpugems3_ch39.html
+__kernel void radixsort_scanhistograms(__global int *histo, __local int *temp,
+                                       __global int *globsum)
+{
+  int it = get_local_id(0);
+  int ig = get_global_id(0);
+  int decale = 1;
+  int n = get_local_size(0) * 2;
+  int gr = get_group_id(0);
+
+  // load input into local memory
+  // up sweep phase
+  temp[2 * it] = histo[2 * ig];
+  temp[2 * it + 1] = histo[2 * ig + 1];
+
+  // parallel prefix sum (algorithm of Blelloch 1990)
+  for (int d = n >> 1; d > 0; d >>= 1)
+  {
+    barrier(CLK_LOCAL_MEM_FENCE);
+    if (it < d)
+    {
+      int ai = decale * (2 * it + 1) - 1;
+      int bi = decale * (2 * it + 2) - 1;
+      temp[bi] += temp[ai];
+    }
+    decale *= 2;
+  }
+
+  // store the last element in the global sum vector
+  // (maybe used in the next step for constructing the global scan)
+  // clear the last element
+  if (it == 0)
+  {
+    globsum[gr] = temp[n - 1];
+    temp[n - 1] = 0;
+  }
+
+  // down sweep phase
+  for (int d = 1; d < n; d *= 2)
+  {
+    decale >>= 1;
+    barrier(CLK_LOCAL_MEM_FENCE);
+
+    if (it < d)
+    {
+      int ai = decale * (2 * it + 1) - 1;
+      int bi = decale * (2 * it + 2) - 1;
+
+      int t = temp[ai];
+      temp[ai] = temp[bi];
+      temp[bi] += t;
+    }
+  }
+  barrier(CLK_LOCAL_MEM_FENCE);
+
+  // write results to device memory
+
+  histo[2 * ig] = temp[2 * it];
+  histo[2 * ig + 1] = temp[2 * it + 1];
+
+  barrier(CLK_GLOBAL_MEM_FENCE);
+}
+
+// use the global sum for updating the local histograms
+// each work item updates two values
+__kernel void radixsort_pastehistograms(__global int *histo, __global int *globsum)
+{
+  int ig = get_global_id(0);
+  int gr = get_group_id(0);
+
+  int s;
+
+  s = globsum[gr];
+
+  // write results to device memory
+  histo[2 * ig] += s;
+  histo[2 * ig + 1] += s;
+
+  barrier(CLK_GLOBAL_MEM_FENCE);
+}
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLArgOperationKernel.cpp b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLArgOperationKernel.cpp
new file mode 100644
index 000000000..7f4b5b0df
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLArgOperationKernel.cpp
@@ -0,0 +1,157 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_compute/core/CL/kernels/CLArgOperationKernel.h"
+
+#include "arm_compute/core/CL/CLHelpers.h"
+#include "arm_compute/core/CL/CLKernelLibraryEx.h"
+#include "arm_compute/core/CL/ICLTensor.h"
+
+using namespace arm_compute;
+
+namespace
+{
+const TensorShape inferOutputShape(const TensorShape &input_shape, const uint32_t axis)
+{
+  TensorShape out_shape{input_shape};
+
+  out_shape.set(axis, 1);
+
+  return out_shape;
+}
+} // namespace
+
+namespace
+{
+Status validate_arguments(const ITensorInfo *input, const ITensorInfo *output, const uint32_t axis,
+                          ArgOperation /*op*/)
+{
+  ARM_COMPUTE_ERROR_ON_DATA_TYPE_NOT_IN(input, DataType::S32, DataType::F32, DataType::U8,
+                                        DataType::QASYMM8);
+  ARM_COMPUTE_ERROR_ON_DATA_TYPE_NOT_IN(output, DataType::S32);
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG((input->tensor_shape().num_dimensions() - 1) !=
+                                      output->tensor_shape().num_dimensions(),
+                                  "Input's rank is not same with output");
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(output->tensor_shape().total_size() == 0,
+                                  "Inputs are not broadcast compatible");
+
+  const TensorShape output_shape = inferOutputShape(input->tensor_shape(), axis);
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(output_shape.total_size() != output->tensor_shape().total_size(),
+                                  "output shape's size does not match axis");
+
+  const auto num_dimensions = input->tensor_shape().num_dimensions();
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(axis >= num_dimensions, "axis must be less than (input's rank).");
+  return Status{};
+}
+
+} // namespace
+
+CLArgOperationKernel::CLArgOperationKernel() : _input(nullptr), _output(nullptr), _axis() {}
+
+void CLArgOperationKernel::configure(const ICLTensor *input, ICLTensor *output, const uint32_t axis,
+                                     ArgOperation op)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
+  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input->info(), output->info(), axis, op));
+
+  _input = input;
+  _output = output;
+  _axis = axis;
+
+  std::unique_ptr<ITensorInfo> output_info = output->info()->clone();
+  output_info->set_tensor_shape(inferOutputShape(input->info()->tensor_shape(), axis));
+
+  // Construct kernel and set op_code based on type of ArgOperation as specified by object op
+  std::string kernel_name = "arg_op";
+  int op_code = 0;
+  if (op == ArgOperation::MAX)
+  {
+    op_code = 1;
+  }
+  else if (op == ArgOperation::MIN)
+  {
+    op_code = 2;
+  }
+  else
+    throw std::runtime_error("Operation not supported, yet");
+
+  // Set kernel build options
+  std::set<std::string> build_opts;
+  build_opts.emplace("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type()));
+  build_opts.emplace("-DDEPTH_OUT=" + support::cpp11::to_string(output_info->dimension(2)));
+  build_opts.emplace("-DOP_CODE=" + support::cpp11::to_string(op_code));
+
+  // Create kernel
+  _kernel =
+      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel(kernel_name, build_opts));
+
+  // Configure  kernel window
+  Window win = calculate_max_window(*output_info, Steps());
+
+  Coordinates coord;
+  coord.set_num_dimensions(output_info->num_dimensions());
+  output->info()->set_valid_region(ValidRegion(coord, output_info->tensor_shape()));
+
+  ICLKernel::configure_internal(win);
+}
+
+Status CLArgOperationKernel::validate(const ITensorInfo *input, const ITensorInfo *output,
+                                      const uint32_t axis, ArgOperation op)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
+  ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(input, output, axis, op));
+
+  return Status{};
+}
+
+void CLArgOperationKernel::run(const Window &window, cl::CommandQueue &queue)
+{
+  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
+  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
+
+  const TensorShape &shape_in = _input->info()->tensor_shape();
+
+  unsigned int idx = 2 * num_arguments_per_4D_tensor(); // Skip the input and output parameters
+
+  _kernel.setArg<cl_int>(idx++, _axis);
+  _kernel.setArg<cl_int>(idx++, shape_in[_axis]);
+
+  Window slice_out = window.first_slice_window_4D().collapse(ICLKernel::window(), 2, 4);
+
+  // Setup input slice
+  Window slice_in(slice_out);
+  slice_in.set(Window::DimX, Window::Dimension(0, 0, 0));
+  slice_in.set(Window::DimY, Window::Dimension(0, 0, 0));
+  slice_in.set(Window::DimZ, Window::Dimension(0, 0, 0));
+  slice_in.set(3, Window::Dimension(0, 0, 0));
+
+  // Copy output's shape in order to use for recovering at end of this method
+  const TensorShape shape_out = _output->info()->tensor_shape();
+  _output->info()->set_tensor_shape(inferOutputShape(shape_in, _axis));
+
+  do
+  {
+    unsigned int idx = 0;
+    add_4D_tensor_argument(idx, _input, slice_in);
+    add_4D_tensor_argument(idx, _output, slice_out);
+    enqueue(queue, *this, slice_out);
+  } while (window.slide_window_slice_4D(slice_in) && window.slide_window_slice_4D(slice_out));
+
+  // Recover output's shape of output tensor
+  _output->info()->set_tensor_shape(shape_out);
+}
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLBinaryLogicalOpKernel.cpp b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLBinaryLogicalOpKernel.cpp
new file mode 100644
index 000000000..c14e73634
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLBinaryLogicalOpKernel.cpp
@@ -0,0 +1,172 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_compute/core/CL/kernels/CLBinaryLogicalOpKernel.h"
+
+#include "arm_compute/core/CL/CLHelpers.h"
+#include "arm_compute/core/CL/CLKernelLibraryEx.h"
+#include "arm_compute/core/CL/ICLTensor.h"
+
+using namespace arm_compute;
+
+namespace
+{
+constexpr unsigned int num_elems_processed_per_iteration = 16;
+
+Status validate_parameters(const ITensorInfo *input1, const ITensorInfo *input2,
+                           const ITensorInfo *output)
+{
+  const TensorShape &out_shape =
+      TensorShape::broadcast_shape(input1->tensor_shape(), input2->tensor_shape());
+
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input1, 1, DataType::U8, DataType::QASYMM8);
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input2, 1, DataType::U8, DataType::QASYMM8);
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(out_shape.total_size() == 0,
+                                  "Inputs are not broadcast compatible");
+  // Validate in case of configured output
+  if (output->total_size() > 0)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::U8,
+                                                         DataType::QASYMM8);
+    ARM_COMPUTE_RETURN_ERROR_ON_MSG(
+        detail::have_different_dimensions(out_shape, output->tensor_shape(), 0),
+        "Wrong shape for output");
+  }
+  return Status{};
+}
+} // namespace
+
+CLBinaryLogicalOpKernel::CLBinaryLogicalOpKernel()
+    : _input1(nullptr), _input2(nullptr), _output(nullptr)
+{
+}
+
+void CLBinaryLogicalOpKernel::configure(const ICLTensor *input1, const ICLTensor *input2,
+                                        ICLTensor *output, BinaryLogicalOperation op)
+{
+  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input1, input2);
+  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input1, output);
+  ARM_COMPUTE_ERROR_THROW_ON(validate_parameters(input1->info(), input2->info(), output->info()));
+
+  _input1 = input1;
+  _input2 = input2;
+  _output = output;
+
+  // Create kernel
+  std::string kernel_name = "binary_logical_op";
+  std::set<std::string> build_opts;
+  build_opts.emplace(("-DDATA_TYPE=" + get_cl_type_from_data_type(input1->info()->data_type())));
+
+  int op_code = 0;
+  switch (op)
+  {
+    case BinaryLogicalOperation::AND:
+      op_code = 1;
+      break;
+    case BinaryLogicalOperation::OR:
+      op_code = 2;
+      break;
+    default:
+      throw std::runtime_error("Operation not supported, yet");
+  }
+
+  build_opts.emplace(("-DOP_CODE=" + support::cpp11::to_string(op_code)));
+  build_opts.emplace(
+      ("-DVEC_SIZE=" + support::cpp11::to_string(num_elems_processed_per_iteration)));
+
+  _kernel =
+      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel(kernel_name, build_opts));
+
+  const std::pair<TensorShape, ValidRegion> broadcast_pair =
+      ITensorInfo::broadcast_shape_and_valid_region(*input1->info(), *input2->info());
+
+  const ValidRegion &valid_region = broadcast_pair.second;
+
+  Window win = calculate_max_window(valid_region, Steps(num_elems_processed_per_iteration));
+  Window win_input1 = win.broadcast_if_dimension_le_one(*input1->info());
+  Window win_input2 = win.broadcast_if_dimension_le_one(*input2->info());
+
+  AccessWindowHorizontal input1_access(input1->info(), 0, num_elems_processed_per_iteration);
+  AccessWindowHorizontal input2_access(input2->info(), 0, num_elems_processed_per_iteration);
+  AccessWindowHorizontal output_access(output->info(), 0, num_elems_processed_per_iteration);
+
+  update_window_and_padding(win_input1, input1_access) ||
+      update_window_and_padding(win_input2, input2_access) ||
+      update_window_and_padding(win, output_access);
+
+  output_access.set_valid_region(win, valid_region);
+
+  ICLKernel::configure_internal(win);
+}
+
+void CLBinaryLogicalOpKernel::run(const Window &window, cl::CommandQueue &queue)
+{
+  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
+  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
+
+  const TensorShape &in_shape1 = _input1->info()->tensor_shape();
+  const TensorShape &in_shape2 = _input2->info()->tensor_shape();
+  const TensorShape &out_shape = _output->info()->tensor_shape();
+
+  bool can_collapse = true;
+  if (std::min(in_shape1.total_size(), in_shape2.total_size()) > 1)
+  {
+    can_collapse =
+        (std::min(in_shape1.num_dimensions(), in_shape2.num_dimensions()) > Window::DimZ);
+    for (size_t d = Window::DimZ; can_collapse && (d < out_shape.num_dimensions()); d++)
+    {
+      can_collapse = (in_shape1[d] == in_shape2[d]);
+    }
+  }
+
+  bool has_collapsed = false;
+  Window collapsed =
+      can_collapse ? window.collapse_if_possible(ICLKernel::window(), Window::DimZ, &has_collapsed)
+                   : window;
+
+  const TensorShape &in_shape1_collapsed =
+      has_collapsed ? in_shape1.collapsed_from(Window::DimZ) : in_shape1;
+  const TensorShape &in_shape2_collapsed =
+      has_collapsed ? in_shape2.collapsed_from(Window::DimZ) : in_shape2;
+
+  Window slice = collapsed.first_slice_window_3D();
+  Window slice_input1 = slice.broadcast_if_dimension_le_one(in_shape1_collapsed);
+  Window slice_input2 = slice.broadcast_if_dimension_le_one(in_shape2_collapsed);
+
+  do
+  {
+    unsigned int idx = 0;
+    add_3D_tensor_argument(idx, _input1, slice_input1);
+    add_3D_tensor_argument(idx, _input2, slice_input2);
+    add_3D_tensor_argument(idx, _output, slice);
+
+    enqueue(queue, *this, slice);
+
+    collapsed.slide_window_slice_3D(slice_input1);
+    collapsed.slide_window_slice_3D(slice_input2);
+  } while (collapsed.slide_window_slice_3D(slice));
+}
+
+BorderSize CLBinaryLogicalOpKernel::border_size() const
+{
+  const unsigned int replicateSize =
+      _output->info()->dimension(0) -
+      std::min(_input1->info()->dimension(0), _input2->info()->dimension(0));
+  const unsigned int border =
+      std::min<unsigned int>(num_elems_processed_per_iteration - 1U, replicateSize);
+  return BorderSize(0, border, 0, 0);
+}
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLCastKernel.cpp b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLCastKernel.cpp
new file mode 100644
index 000000000..ac2963f38
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLCastKernel.cpp
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_compute/core/CL/kernels/CLCastKernel.h"
+
+#include "arm_compute/core/CL/CLHelpers.h"
+#include "arm_compute/core/CL/CLKernelLibraryEx.h"
+#include "arm_compute/core/CL/ICLTensor.h"
+
+using namespace arm_compute;
+
+CLCastKernel::CLCastKernel() : _input(nullptr), _output(nullptr) {}
+
+void CLCastKernel::configure(const ICLTensor *input, ICLTensor *output)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
+
+  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::U8, DataType::QASYMM8,
+                                                DataType::S16, DataType::S32, DataType::F16,
+                                                DataType::F32);
+  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::U8, DataType::QASYMM8,
+                                                DataType::S16, DataType::S32, DataType::F16,
+                                                DataType::F32);
+  ARM_COMPUTE_ERROR_ON_MISMATCHING_SHAPES(input, output);
+
+  _input = input;
+  _output = output;
+
+  constexpr unsigned int num_elems_processed_per_iteration = 16;
+
+  // Set kernel build options
+  std::set<std::string> build_opts;
+  build_opts.emplace("-DDATA_TYPE_IN=" + get_cl_type_from_data_type(input->info()->data_type()));
+  build_opts.emplace("-DDATA_TYPE_OUT=" + get_cl_type_from_data_type(output->info()->data_type()));
+  build_opts.emplace(
+      ("-DVEC_SIZE=" + support::cpp11::to_string(num_elems_processed_per_iteration)));
+
+  // Create kernel
+  if (is_data_type_quantized_asymmetric(input->info()->data_type()))
+  {
+    const float scale_in = input->info()->quantization_info().scale;
+    const int offset_in = input->info()->quantization_info().offset;
+    build_opts.emplace("-DSCALE=" + float_to_string_with_full_precision(scale_in));
+    build_opts.emplace("-DOFFSET=" + support::cpp11::to_string(offset_in));
+
+    _kernel = static_cast<cl::Kernel>(
+        CLKernelLibraryEx::get().create_kernel("cast_qasymm_in", build_opts));
+  }
+  else if (is_data_type_quantized_asymmetric(output->info()->data_type()))
+  {
+    const float scale_in = output->info()->quantization_info().scale;
+    const int offset_in = output->info()->quantization_info().offset;
+    build_opts.emplace("-DSCALE=" + float_to_string_with_full_precision(scale_in));
+    build_opts.emplace("-DOFFSET=" + support::cpp11::to_string(offset_in));
+
+    _kernel = static_cast<cl::Kernel>(
+        CLKernelLibraryEx::get().create_kernel("cast_qasymm_out", build_opts));
+  }
+  else
+  {
+    _kernel = static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel("cast", build_opts));
+  }
+
+  // Configure kernel window
+  Window win = calculate_max_window(*input->info(), Steps(num_elems_processed_per_iteration));
+  AccessWindowHorizontal input_access(input->info(), 0, num_elems_processed_per_iteration);
+  AccessWindowHorizontal output_access(output->info(), 0, num_elems_processed_per_iteration);
+  update_window_and_padding(win, input_access, output_access);
+  output_access.set_valid_region(win, input->info()->valid_region());
+
+  ICLKernel::configure_internal(win);
+}
+
+void CLCastKernel::run(const Window &window, cl::CommandQueue &queue)
+{
+  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
+  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
+
+  Window collapsed = window.collapse_if_possible(ICLKernel::window(), Window::DimZ);
+  Window slice = collapsed.first_slice_window_3D();
+
+  do
+  {
+    unsigned int idx = 0;
+    add_3D_tensor_argument(idx, _input, slice);
+    add_3D_tensor_argument(idx, _output, slice);
+    enqueue(queue, *this, slice, lws_hint());
+  } while (collapsed.slide_window_slice_3D(slice));
+}
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLDepthToSpaceKernel.cpp b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLDepthToSpaceKernel.cpp
new file mode 100644
index 000000000..2a3433c2b
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLDepthToSpaceKernel.cpp
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_compute/core/CL/kernels/CLDepthToSpaceKernel.h"
+
+#include "arm_compute/core/CL/CLHelpers.h"
+#include "arm_compute/core/CL/CLKernelLibraryEx.h"
+#include "arm_compute/core/CL/ICLTensor.h"
+
+using namespace arm_compute;
+
+namespace
+{
+// TODO Use this validation function
+#if 0
+Status validate_arguments(const ITensorInfo *input, const ITensorInfo *output,
+                          const int32_t block_size)
+{
+  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::U8, DataType::QASYMM8,
+                                                DataType::S16, DataType::S32, DataType::F16,
+                                                DataType::F32);
+  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::U8, DataType::QASYMM8,
+                                                DataType::S16, DataType::S32, DataType::F16,
+                                                DataType::F32);
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(block_size < 1,
+                                  "Block size should be greater than or equal to 1.");
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(output->dimension(0) != input->dimension(0) * block_size,
+                                  "Output width should be equal to (Input width * block size)");
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(output->dimension(1) != input->dimension(1) * block_size,
+                                  "Output height should be equal to (Input height * block size)");
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->dimension(2) % (block_size * block_size) != 0,
+                                  "Input depth should be divisible by (block size * block size)");
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(
+      output->dimension(2) != input->dimension(2) / (block_size * block_size),
+      "Output depth should be equal to (Input depth / (block size * block size))");
+
+  return Status{};
+}
+#endif
+} // namespace
+
+CLDepthToSpaceKernel::CLDepthToSpaceKernel() : _input(nullptr), _output(nullptr)
+{
+  // DO NOTHING
+}
+
+void CLDepthToSpaceKernel::configure(const ICLTensor *input, ICLTensor *output,
+                                     const int32_t block_size)
+{
+  // TODO Add validation of data_layout
+  _input = input;
+  _output = output;
+
+  // Set kernel build options
+  auto layout_out = output->info()->data_layout();
+  std::set<std::string> build_opts;
+  build_opts.emplace("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type()));
+  build_opts.emplace("-DBLOCK_SIZE=" + support::cpp11::to_string(block_size));
+  auto index_depth = get_data_layout_dimension_index(layout_out, DataLayoutDimension::CHANNEL);
+  auto depth = output->info()->dimension(index_depth);
+  build_opts.emplace("-DDEPTH_OUT=" + support::cpp11::to_string(depth));
+  build_opts.emplace("-DZ_OUT=" + support::cpp11::to_string(output->info()->tensor_shape().z()));
+
+  // Create kernel
+  _kernel = static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel(
+      "depth_to_space_" + lower_string(string_from_data_layout(layout_out)), build_opts));
+
+  // Configure  kernel window
+  Window win = calculate_max_window(*output->info(), Steps());
+
+  Coordinates coord;
+  coord.set_num_dimensions(output->info()->num_dimensions());
+  output->info()->set_valid_region(ValidRegion(coord, output->info()->tensor_shape()));
+
+  ICLKernel::configure_internal(win);
+}
+
+void CLDepthToSpaceKernel::run(const Window &window, cl::CommandQueue &queue)
+{
+  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
+  ARM_COMPUTE_ERROR_ON_MISMATCHING_WINDOWS(ICLKernel::window(), window);
+
+  Window slice_out = window.first_slice_window_4D().collapse(ICLKernel::window(), 2, 4);
+
+  // Setup input slice
+  Window slice_in(slice_out);
+  slice_in.set(Window::DimX, Window::Dimension(0, 0, 0));
+  slice_in.set(Window::DimY, Window::Dimension(0, 0, 0));
+  slice_in.set(Window::DimZ, Window::Dimension(0, 0, 0));
+  slice_in.set(3, Window::Dimension(0, 0, 0));
+
+  do
+  {
+    unsigned int idx = 0;
+    add_4D_tensor_argument(idx, _input, slice_in);
+    add_4D_tensor_argument(idx, _output, slice_out);
+    enqueue(queue, *this, slice_out);
+  } while (window.slide_window_slice_4D(slice_in) && window.slide_window_slice_4D(slice_out));
+}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLEmbeddingLookupKernel.cpp b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLEmbeddingLookupKernel.cpp
index 0862b78bf..0862b78bf 100644
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLEmbeddingLookupKernel.cpp
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLEmbeddingLookupKernel.cpp
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLGatherExKernel.cpp b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLGatherExKernel.cpp
new file mode 100644
index 000000000..c83ece0e9
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLGatherExKernel.cpp
@@ -0,0 +1,181 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_compute/core/CL/kernels/CLGatherExKernel.h"
+
+#include "arm_compute/core/CL/CLHelpers.h"
+#include "arm_compute/core/CL/CLKernelLibraryEx.h"
+#include "arm_compute/core/CL/ICLTensor.h"
+#include "arm_compute/core/UtilsEx.h"
+
+using namespace arm_compute;
+
+namespace
+{
+
+inline TensorShape compute_gather_shape(const TensorShape &input_shape,
+                                        const TensorShape &indices_shape, uint32_t actual_axis)
+{
+  ARM_COMPUTE_ERROR_ON(indices_shape.num_dimensions() > 3);
+  ARM_COMPUTE_ERROR_ON(input_shape.num_dimensions() > 4);
+  ARM_COMPUTE_ERROR_ON(input_shape.num_dimensions() + indices_shape.num_dimensions() - 1 > 4);
+  ARM_COMPUTE_ERROR_ON(actual_axis >= input_shape.num_dimensions());
+
+  TensorShape output_shape = input_shape;
+  if (indices_shape.num_dimensions() == 1)
+  {
+    output_shape[actual_axis] = indices_shape[0];
+  }
+  else if (indices_shape.num_dimensions() > 1)
+  {
+    output_shape.shift_right(indices_shape.num_dimensions() - 1);
+
+    for (uint32_t i = 0, o = 0; o < output_shape.num_dimensions(); ++o, ++i)
+    {
+      if (o == actual_axis)
+      {
+        ++i;
+        for (uint32_t in = 0; in < indices_shape.num_dimensions(); ++in, ++o)
+        {
+          output_shape[o] = indices_shape[in];
+        }
+      }
+      else
+      {
+        output_shape[o] = input_shape[i];
+      }
+    }
+  }
+  return output_shape;
+}
+
+/** Wrap-around a number within the range 0 <= x < m
+ *
+ * @param[in] x Input value
+ * @param[in] m Range
+ *
+ * @return the wrapped-around number
+ */
+template <typename T> inline T wrap_around(T x, T m) { return x >= 0 ? x % m : (x % m + m) % m; }
+
+inline Status validate_arguments(const ITensorInfo *input, const ITensorInfo *indices,
+                                 const ITensorInfo *output, int axis)
+{
+  const uint32_t actual_axis = wrap_around(axis, static_cast<int>(input->num_dimensions()));
+  ARM_COMPUTE_RETURN_ERROR_ON(indices->num_dimensions() > 3);
+  ARM_COMPUTE_RETURN_ERROR_ON(input->num_dimensions() > 4);
+  ARM_COMPUTE_ERROR_ON(input->num_dimensions() + indices->num_dimensions() - 1 > 4);
+  ARM_COMPUTE_RETURN_ERROR_ON(actual_axis >= input->num_dimensions());
+  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(output);
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(
+      input, 1, DataType::U8, DataType::S8, DataType::QASYMM8, DataType::U16, DataType::S16,
+      DataType::U32, DataType::S32, DataType::F16, DataType::F32);
+
+  if (output->total_size() != 0)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
+    ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_QUANTIZATION_INFO(input, output);
+    TensorShape output_shape =
+        compute_gather_shape(input->tensor_shape(), indices->tensor_shape(), actual_axis);
+    ARM_COMPUTE_RETURN_ERROR_ON(output_shape.total_size() != output->tensor_shape().total_size());
+  }
+
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(indices, 1, DataType::U32, DataType::S32);
+
+  return Status{};
+}
+
+std::pair<Status, Window> validate_and_configure_window(ITensorInfo *input, ITensorInfo *indices,
+                                                        ITensorInfo *output, int axis)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output, indices);
+  const uint32_t actual_axis = wrap_around(axis, static_cast<int>(input->num_dimensions()));
+  std::unique_ptr<ITensorInfo> output_info = input->clone();
+  output_info->set_tensor_shape(
+      compute_gather_shape(input->tensor_shape(), indices->tensor_shape(), actual_axis));
+  // Output auto initialization if not yet initialized
+  auto_init_if_empty((*output), output_info->tensor_shape(), 1, input->data_type());
+
+  // Create window
+  Window win = calculate_max_window(*output, Steps());
+  output->set_valid_region(ValidRegion(Coordinates(), output->tensor_shape()));
+
+  return std::make_pair(Status{}, win);
+}
+
+} // namespace
+
+CLGatherExKernel::CLGatherExKernel()
+    : _input(nullptr), _indices(nullptr), _output(nullptr), _axis(0)
+{
+}
+
+void CLGatherExKernel::configure(const ICLTensor *input, const ICLTensor *indices,
+                                 ICLTensor *output, int axis)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output, indices);
+  ARM_COMPUTE_ERROR_THROW_ON(
+      validate_arguments(input->info(), indices->info(), output->info(), axis));
+
+  // Configure kernel window
+  auto win_config =
+      validate_and_configure_window(input->info(), indices->info(), output->info(), axis);
+  ARM_COMPUTE_ERROR_THROW_ON(win_config.first);
+
+  _input = input;
+  _output = output;
+  _indices = indices;
+  _axis = wrap_around(axis, static_cast<int>(input->info()->num_dimensions()));
+
+  // Set build options
+  CLBuildOptions build_opts;
+  build_opts.add_option("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type()));
+  build_opts.add_option("-DOUTPUT_DIM_Z=" +
+                        support::cpp11::to_string(output->info()->dimension(2)));
+  build_opts.add_option("-DINPUT_DIM_Z=" + support::cpp11::to_string(input->info()->dimension(2)));
+  build_opts.add_option("-DAXIS=" + support::cpp11::to_string(_axis));
+  build_opts.add_option("-DINDICES_DIM=" +
+                        support::cpp11::to_string(indices->info()->num_dimensions()));
+
+  // Create kernel
+  _kernel = static_cast<cl::Kernel>(
+      CLKernelLibraryEx::get().create_kernel("gather_ex", build_opts.options()));
+  ICLKernel::configure_internal(win_config.second);
+}
+
+Status CLGatherExKernel::validate(const ITensorInfo *input, const ITensorInfo *indices,
+                                  const ITensorInfo *output, int axis)
+{
+  ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(input, indices, output, axis));
+  ARM_COMPUTE_RETURN_ON_ERROR(validate_and_configure_window(input->clone().get(),
+                                                            indices->clone().get(),
+                                                            output->clone().get(), axis)
+                                  .first);
+  return Status{};
+}
+
+void CLGatherExKernel::run(const Window &window, cl::CommandQueue &queue)
+{
+  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
+  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(IKernel::window(), window);
+
+  Window window_collapsed = window.collapse_if_possible(ICLKernel::window(), Window::DimZ, 4);
+  unsigned int idx = 0;
+  add_4D_tensor_argument(idx, _input, window_collapsed);
+  add_3D_tensor_argument(idx, _indices, window_collapsed);
+  add_4D_tensor_argument(idx, _output, window_collapsed);
+  enqueue(queue, *this, window_collapsed, lws_hint());
+}
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLHashtableLookupKernel.cpp b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLHashtableLookupKernel.cpp
new file mode 100644
index 000000000..31e98c9a8
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLHashtableLookupKernel.cpp
@@ -0,0 +1,178 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_compute/core/CL/kernels/CLHashtableLookupKernel.h"
+
+#include "arm_compute/core/CL/CLHelpers.h"
+#include "arm_compute/core/CL/CLKernelLibraryEx.h"
+#include "arm_compute/core/CL/ICLTensor.h"
+
+using namespace arm_compute;
+
+namespace
+{
+constexpr unsigned int num_elems_processed_per_iteration = 16;
+
+std::pair<Status, Window> validate_and_configure_window(ITensorInfo *input, ITensorInfo *output)
+{
+  Window win = calculate_max_window(*output, Steps(num_elems_processed_per_iteration));
+  AccessWindowHorizontal input_access(input, 0, num_elems_processed_per_iteration);
+  AccessWindowHorizontal output_access(output, 0, num_elems_processed_per_iteration);
+
+  bool window_changed = update_window_and_padding(win, input_access, output_access);
+  input_access.set_valid_region(win, output->valid_region());
+
+  Status err = (window_changed)
+                   ? ARM_COMPUTE_CREATE_ERROR(ErrorCode::RUNTIME_ERROR, "Insufficient Padding!")
+                   : Status{};
+  return std::make_pair(err, win);
+}
+} // namespace
+
+CLHashtableLookupKernel::CLHashtableLookupKernel()
+{
+  // DO NOTHING
+}
+
+Status CLHashtableLookupKernel::validate(const ITensorInfo *lookups, const ITensorInfo *keys,
+                                         const ITensorInfo *input, const ITensorInfo *output,
+                                         const ITensorInfo *hits)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(lookups, keys, input, output, hits);
+  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(
+      input, 1, DataType::U8, DataType::S8, DataType::QASYMM8, DataType::U16, DataType::S16,
+      DataType::U32, DataType::S32, DataType::F16, DataType::F32);
+  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(lookups, 1, DataType::S32);
+  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(keys, 1, DataType::S32);
+  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(hits, 1, DataType::U8, DataType::QASYMM8);
+  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(output->tensor_shape().total_size() == 0,
+                                  "Output's shape was not set");
+
+  ARM_COMPUTE_ERROR_ON(lookups->dimension(0) != hits->dimension(0) ||
+                       output->dimension(output->num_dimensions() - 1) != lookups->dimension(0));
+  ARM_COMPUTE_ERROR_ON(input->num_dimensions() < 2 && input->num_dimensions() > 4);
+  ARM_COMPUTE_ERROR_ON(lookups->num_dimensions() > 1);
+  ARM_COMPUTE_ERROR_ON(keys->num_dimensions() > 1);
+  ARM_COMPUTE_ERROR_ON(hits->num_dimensions() > 1);
+
+  return Status{};
+}
+
+void CLHashtableLookupKernel::configure(const ICLTensor *lookups, const ICLTensor *keys,
+                                        const ICLTensor *input, ICLTensor *output, ICLTensor *hits)
+{
+  ARM_COMPUTE_ERROR_THROW_ON(
+      validate(lookups->info(), keys->info(), input->info(), output->info(), hits->info()));
+
+  _lookups = lookups;
+  _keys = keys;
+  _input = input;
+  _output = output;
+  _hits = hits;
+
+  // Make _lookup_indices tensor
+  _lookup_indices = arm_compute::support::cpp14::make_unique<CLTensor>();
+  _lookup_indices->allocator()->init(
+      TensorInfo(lookups->info()->tensor_shape(), lookups->info()->num_channels(), DataType::S32));
+  _lookup_indices->allocator()->allocate();
+
+  // Set kernel build options
+  std::stringstream kernel_name;
+  std::set<std::string> build_opts;
+  kernel_name << "hashtable_lookup";
+
+  build_opts.emplace("-DDEPTH_OUT=" + support::cpp11::to_string(output->info()->dimension(2)));
+  build_opts.emplace("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type()));
+  build_opts.emplace("-DVEC_SIZE=" + support::cpp11::to_string(num_elems_processed_per_iteration));
+  build_opts.emplace("-DNUM_DIMS=" + support::cpp11::to_string(_input->info()->num_dimensions()));
+
+  // Create kernel
+  _kernel = static_cast<cl::Kernel>(
+      CLKernelLibraryEx::get().create_kernel(kernel_name.str(), build_opts));
+
+  // Configure kernel window
+  auto win_config = validate_and_configure_window(input->info(), output->info());
+  ARM_COMPUTE_ERROR_THROW_ON(win_config.first);
+  ICLKernel::configure_internal(win_config.second);
+}
+
+void CLHashtableLookupKernel::run(const Window &window, cl::CommandQueue &queue)
+{
+  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
+  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(IKernel::window(), window);
+
+  const_cast<ICLTensor *>(_lookups)->map(queue);
+  const_cast<ICLTensor *>(_keys)->map(queue);
+  _hits->map(queue);
+  _lookup_indices->map(queue);
+
+  // Set values of hits
+  const int32_t *lookups_buf =
+      reinterpret_cast<int32_t *>(const_cast<ICLTensor *>(_lookups)->buffer());
+  const int32_t *keys_buf = reinterpret_cast<int32_t *>(const_cast<ICLTensor *>(_keys)->buffer());
+  uint8_t *hits_buf = reinterpret_cast<uint8_t *>(_hits->buffer());
+  int32_t *lookup_indices_buf = reinterpret_cast<int32_t *>(_lookup_indices->buffer());
+
+  std::map<int32_t, size_t> key_map;
+  const size_t keys_num = _keys->info()->dimension(0);
+  for (size_t key_index = 0; key_index < keys_num; key_index++)
+  {
+    key_map[keys_buf[key_index]] = key_index;
+  }
+
+  const size_t lookups_num = _lookups->info()->dimension(0);
+  for (size_t i = 0; i < lookups_num; ++i)
+  {
+    const auto lookup_value = lookups_buf[i];
+    const auto it = key_map.find(lookup_value);
+    if (it != key_map.end())
+    {
+#if defined(ARM_COMPUTE_DEBUG_ENABLED)
+      if (it->second >= lookups_num)
+        ARM_COMPUTE_ERROR("HashTable Lookup: index out of bounds.");
+#endif // defined(ARM_COMPUTE_DEBUG_ENABLED)
+      lookup_indices_buf[i] = static_cast<int32_t>(it->second);
+      hits_buf[i] = static_cast<uint8_t>(1);
+    }
+    else
+    {
+      lookup_indices_buf[i] = -1;
+      hits_buf[i] = static_cast<uint8_t>(0);
+    }
+  }
+
+  const_cast<ICLTensor *>(_lookups)->unmap(queue);
+  const_cast<ICLTensor *>(_keys)->unmap(queue);
+  _hits->unmap(queue);
+  _lookup_indices->unmap(queue);
+
+  Window win = window.collapse(ICLKernel::window(), 2, 4);
+
+  Window win_lookup;
+  win_lookup.set(Window::DimX, Window::Dimension(0, 0, 0));
+
+  do
+  {
+    unsigned int idx = 0;
+    add_4D_tensor_argument(idx, _input, win);
+    add_4D_tensor_argument(idx, _output, win);
+    add_1D_tensor_argument(idx, _lookup_indices.get(), win_lookup);
+
+    enqueue(queue, *this, win);
+  } while (window.slide_window_slice_4D(win) && window.slide_window_slice_1D(win_lookup));
+}
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLNegKernel.cpp b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLNegKernel.cpp
new file mode 100644
index 000000000..ecfe05a51
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLNegKernel.cpp
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_compute/core/CL/kernels/CLNegKernel.h"
+
+#include "arm_compute/core/CL/CLHelpers.h"
+#include "arm_compute/core/CL/CLKernelLibraryEx.h"
+#include "arm_compute/core/CL/ICLTensor.h"
+
+using namespace arm_compute;
+
+namespace
+{
+Status validate_arguments(const ITensorInfo *input, const ITensorInfo *output)
+{
+  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::S16, DataType::S32,
+                                                DataType::F16, DataType::F32);
+  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::S16, DataType::S32,
+                                                DataType::F16, DataType::F32);
+  ARM_COMPUTE_ERROR_ON_MISMATCHING_DIMENSIONS(input->tensor_shape(), output->tensor_shape());
+  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
+
+  return Status{};
+}
+
+} // namespace
+
+CLNegKernel::CLNegKernel() : _input(nullptr), _output(nullptr) {}
+
+void CLNegKernel::configure(const ICLTensor *input, ICLTensor *output)
+{
+
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
+  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input->info(), output->info()));
+
+  _input = input;
+  _output = output;
+
+  constexpr unsigned int num_elems_processed_per_iteration = 16;
+
+  // Create kernel
+  std::set<std::string> build_opts;
+  build_opts.emplace(("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type())));
+  build_opts.emplace(
+      ("-DVEC_SIZE=" + support::cpp11::to_string(num_elems_processed_per_iteration)));
+  _kernel =
+      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel("neg_tensor", build_opts));
+
+  // Configure window
+  Window win = calculate_max_window(*input->info(), Steps(num_elems_processed_per_iteration));
+
+  AccessWindowHorizontal input_access(input->info(), 0, num_elems_processed_per_iteration);
+  AccessWindowHorizontal output_access(output->info(), 0, num_elems_processed_per_iteration);
+  update_window_and_padding(win, input_access, output_access);
+  output_access.set_valid_region(win, input->info()->valid_region());
+
+  ICLKernel::configure_internal(win);
+}
+
+void CLNegKernel::run(const Window &window, cl::CommandQueue &queue)
+{
+  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
+  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
+
+  Window collapsed = window.collapse_if_possible(ICLKernel::window(), Window::DimZ);
+  Window slice = collapsed.first_slice_window_3D();
+
+  do
+  {
+    unsigned int idx = 0;
+    add_3D_tensor_argument(idx, _input, slice);
+    add_3D_tensor_argument(idx, _output, slice);
+    enqueue(queue, *this, slice, lws_hint());
+  } while (collapsed.slide_window_slice_3D(slice));
+}
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLPReLUKernel.cpp b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLPReLUKernel.cpp
new file mode 100644
index 000000000..e7d587029
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLPReLUKernel.cpp
@@ -0,0 +1,186 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_compute/core/CL/kernels/CLPReLUKernel.h"
+
+#include "arm_compute/core/CL/CLHelpers.h"
+#include "arm_compute/core/CL/CLKernelLibraryEx.h"
+#include "arm_compute/core/CL/ICLTensor.h"
+
+using namespace arm_compute;
+
+namespace
+{
+constexpr unsigned int num_elems_processed_per_iteration = 16;
+
+Status validate_info(const ITensorInfo *input, const ITensorInfo *alpha, const ITensorInfo *output)
+{
+  const TensorShape &out_shape =
+      TensorShape::broadcast_shape(input->tensor_shape(), alpha->tensor_shape());
+
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::F16, DataType::F32,
+                                                       DataType::QASYMM8);
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(alpha, 1, DataType::F16, DataType::F32,
+                                                       DataType::QASYMM8);
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(out_shape.total_size() == 0,
+                                  "Inputs are not broadcast compatible");
+  // Validate in case of configured output
+  if (output->total_size() > 0)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::F16, DataType::F32,
+                                                         DataType::QASYMM8);
+    ARM_COMPUTE_RETURN_ERROR_ON_MSG(
+        detail::have_different_dimensions(out_shape, output->tensor_shape(), 0),
+        "Wrong shape for output");
+  }
+  return Status{};
+}
+} // namespace
+
+CLPReLUKernel::CLPReLUKernel() : _input(nullptr), _alpha(nullptr), _output(nullptr) {}
+
+void CLPReLUKernel::configure(const ICLTensor *input, const ICLTensor *alpha, ICLTensor *output)
+{
+  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input, alpha);
+  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
+  ARM_COMPUTE_ERROR_THROW_ON(validate_info(input->info(), alpha->info(), output->info()));
+
+  _input = input;
+  _alpha = alpha;
+  _output = output;
+
+  // Create kernel
+  std::string kernel_name = "prelu";
+  std::set<std::string> build_opts;
+  build_opts.emplace(("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type())));
+  build_opts.emplace(
+      ("-DVEC_SIZE=" + support::cpp11::to_string(num_elems_processed_per_iteration)));
+
+  if (is_data_type_quantized_asymmetric(input->info()->data_type()))
+  {
+    build_opts.emplace("-DOFF_IN=" +
+                       support::cpp11::to_string(input->info()->quantization_info().offset));
+    build_opts.emplace("-DOFF_ALPHA=" +
+                       support::cpp11::to_string(alpha->info()->quantization_info().offset));
+    build_opts.emplace("-DOFF_OUT=" +
+                       support::cpp11::to_string(output->info()->quantization_info().offset));
+    build_opts.emplace("-DSCALE_IN=" +
+                       support::cpp11::to_string(input->info()->quantization_info().scale));
+    build_opts.emplace("-DSCALE_ALPHA=" +
+                       support::cpp11::to_string(alpha->info()->quantization_info().scale));
+    build_opts.emplace("-DSCALE_OUT=" +
+                       support::cpp11::to_string(output->info()->quantization_info().scale));
+    kernel_name += "_qasymm8";
+  }
+  _kernel =
+      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel(kernel_name, build_opts));
+
+  const std::pair<TensorShape, ValidRegion> broadcast_pair =
+      ITensorInfo::broadcast_shape_and_valid_region(*input->info(), *alpha->info());
+
+  const TensorShape &out_shape = broadcast_pair.first;
+  const ValidRegion &valid_region = broadcast_pair.second;
+
+  // Auto initialize output if not initialized
+  {
+    set_shape_if_empty(*output->info(), out_shape);
+
+    if (input->info()->data_type() == DataType::F16 && alpha->info()->data_type() == DataType::F16)
+    {
+      set_format_if_unknown(*output->info(), Format::F16);
+    }
+    else if (input->info()->data_type() == DataType::F32 ||
+             alpha->info()->data_type() == DataType::F32)
+    {
+      set_format_if_unknown(*output->info(), Format::F32);
+    }
+  }
+
+  Window win = calculate_max_window(valid_region, Steps(num_elems_processed_per_iteration));
+  Window win_input1 = win.broadcast_if_dimension_le_one(*input->info());
+  Window win_input2 = win.broadcast_if_dimension_le_one(*alpha->info());
+
+  AccessWindowHorizontal input1_access(input->info(), 0, num_elems_processed_per_iteration);
+  AccessWindowHorizontal input2_access(alpha->info(), 0, num_elems_processed_per_iteration);
+  AccessWindowHorizontal output_access(output->info(), 0, num_elems_processed_per_iteration);
+
+  update_window_and_padding(win_input1, input1_access) ||
+      update_window_and_padding(win_input2, input2_access) ||
+      update_window_and_padding(win, output_access);
+
+  output_access.set_valid_region(win, valid_region);
+
+  ICLKernel::configure_internal(win);
+}
+
+void CLPReLUKernel::run(const Window &window, cl::CommandQueue &queue)
+{
+  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
+  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
+
+  const TensorShape &in_shape1 = _input->info()->tensor_shape();
+  const TensorShape &in_shape2 = _alpha->info()->tensor_shape();
+  const TensorShape &out_shape = _output->info()->tensor_shape();
+
+  bool can_collapse = true;
+  if (std::min(in_shape1.total_size(), in_shape2.total_size()) > 1)
+  {
+    can_collapse =
+        (std::min(in_shape1.num_dimensions(), in_shape2.num_dimensions()) > Window::DimZ);
+    for (size_t d = Window::DimZ; can_collapse && (d < out_shape.num_dimensions()); d++)
+    {
+      can_collapse = (in_shape1[d] == in_shape2[d]);
+    }
+  }
+
+  bool has_collapsed = false;
+  Window collapsed =
+      can_collapse ? window.collapse_if_possible(ICLKernel::window(), Window::DimZ, &has_collapsed)
+                   : window;
+
+  const TensorShape &in_shape1_collapsed =
+      has_collapsed ? in_shape1.collapsed_from(Window::DimZ) : in_shape1;
+  const TensorShape &in_shape2_collapsed =
+      has_collapsed ? in_shape2.collapsed_from(Window::DimZ) : in_shape2;
+
+  Window slice = collapsed.first_slice_window_3D();
+  Window slice_input1 = slice.broadcast_if_dimension_le_one(in_shape1_collapsed);
+  Window slice_input2 = slice.broadcast_if_dimension_le_one(in_shape2_collapsed);
+
+  do
+  {
+    unsigned int idx = 0;
+    add_3D_tensor_argument(idx, _input, slice_input1);
+    add_3D_tensor_argument(idx, _alpha, slice_input2);
+    add_3D_tensor_argument(idx, _output, slice);
+
+    enqueue(queue, *this, slice);
+
+    collapsed.slide_window_slice_3D(slice_input1);
+    collapsed.slide_window_slice_3D(slice_input2);
+  } while (collapsed.slide_window_slice_3D(slice));
+}
+
+BorderSize CLPReLUKernel::border_size() const
+{
+  const unsigned int replicateSize =
+      _output->info()->dimension(0) -
+      std::min(_input->info()->dimension(0), _alpha->info()->dimension(0));
+  const unsigned int border =
+      std::min<unsigned int>(num_elems_processed_per_iteration - 1U, replicateSize);
+  return BorderSize(0, border, 0, 0);
+}
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLReduceOperationKernel.cpp b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLReduceOperationKernel.cpp
new file mode 100644
index 000000000..24e89db28
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLReduceOperationKernel.cpp
@@ -0,0 +1,179 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_compute/core/CL/kernels/CLReduceOperationKernel.h"
+
+#include "arm_compute/core/CL/CLHelpers.h"
+#include "arm_compute/core/CL/CLKernelLibraryEx.h"
+#include "arm_compute/core/CL/ICLTensor.h"
+
+using namespace arm_compute;
+namespace
+{
+// NOTE This is necessary because it is not guaranteed that the axis positions of input and output
+// are the same.
+const TensorShape inferOutputShape(const TensorShape &input_shape, const uint32_t axis)
+{
+  TensorShape out_shape{input_shape};
+
+  out_shape.set(axis, 1);
+
+  return out_shape;
+}
+} // namespace
+
+namespace
+{
+Status validate_arguments(const ITensorInfo *input, const ITensorInfo *output, const uint32_t axis,
+                          ReduceOperation op)
+{
+  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, output);
+
+  if (output->total_size() != 0)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
+  }
+
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::QASYMM8, DataType::F16,
+                                                       DataType::F32, DataType::S32);
+  if (op == ReduceOperation::SUM)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->data_type() == DataType::QASYMM8,
+                                    "Not support QASYMM8, yet");
+  }
+  ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(output->tensor_shape().total_size() == 0,
+                                  "Inputs are not broadcast compatible");
+
+  const auto num_dimensions = input->tensor_shape().num_dimensions();
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(axis >= num_dimensions, "axis must be less than (input's rank).");
+
+  const TensorShape output_shape = inferOutputShape(input->tensor_shape(), axis);
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(output_shape.total_size() != output->tensor_shape().total_size(),
+                                  "output shape's size does not match axis");
+
+  return Status{};
+}
+} // namespace
+
+CLReduceOperationKernel::CLReduceOperationKernel() : _input(nullptr), _output(nullptr), _axis() {}
+
+void CLReduceOperationKernel::configure(const ICLTensor *input, ICLTensor *output,
+                                        const uint32_t axis, ReduceOperation op)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
+
+  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input->info(), output->info(), axis, op));
+
+  _input = input;
+  _output = output;
+  _axis = axis;
+
+  std::unique_ptr<ITensorInfo> output_info = output->info()->clone();
+  output_info->set_tensor_shape(inferOutputShape(input->info()->tensor_shape(), axis));
+
+  // Construct kernel name
+  std::string kernel_name;
+  int op_code = 0;
+  if (op == ReduceOperation::MAX)
+  {
+    kernel_name = "reduce_min_max";
+    op_code = 1;
+  }
+  else if (op == ReduceOperation::MIN)
+  {
+    kernel_name = "reduce_min_max";
+    op_code = 2;
+  }
+  else if (op == ReduceOperation::SUM)
+  {
+    kernel_name = "reduce_sum_mean";
+    op_code = 3;
+  }
+  else if (op == ReduceOperation::MEAN)
+  {
+    kernel_name = "reduce_sum_mean";
+    op_code = 4;
+  }
+  else
+    throw std::runtime_error("Operation not supported, yet");
+
+  // Set kernel build options
+  std::set<std::string> build_opts;
+  build_opts.emplace("-DDATA_TYPE=" + get_cl_type_from_data_type(output_info->data_type()));
+  build_opts.emplace("-DDEPTH_OUT=" + support::cpp11::to_string(output_info->dimension(2)));
+  build_opts.emplace("-DOP_CODE=" + support::cpp11::to_string(op_code));
+
+  // Create kernel
+  _kernel =
+      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel(kernel_name, build_opts));
+
+  // Configure  kernel window
+  Window win = calculate_max_window(*output_info, Steps());
+
+  Coordinates coord;
+  coord.set_num_dimensions(output_info->num_dimensions());
+  output->info()->set_valid_region(ValidRegion(coord, output_info->tensor_shape()));
+
+  ICLKernel::configure_internal(win);
+}
+
+Status CLReduceOperationKernel::validate(const ITensorInfo *input, const ITensorInfo *output,
+                                         const uint32_t axis, ReduceOperation op)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
+  ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(input, output, axis, op));
+
+  return Status{};
+}
+
+void CLReduceOperationKernel::run(const Window &window, cl::CommandQueue &queue)
+{
+  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
+  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
+
+  const TensorShape &shape_in = _input->info()->tensor_shape();
+
+  unsigned int idx = 2 * num_arguments_per_4D_tensor(); // Skip the input and output parameters
+
+  _kernel.setArg<cl_int>(idx++, _axis);
+  _kernel.setArg<cl_int>(idx++, shape_in[_axis]);
+
+  // Support dimensions up to 4
+  Window slice_out = window.collapse(ICLKernel::window(), 2, 4);
+
+  // Setup input slice
+  Window slice_in(slice_out);
+  slice_in.set(Window::DimX, Window::Dimension(0, 0, 0));
+  slice_in.set(Window::DimY, Window::Dimension(0, 0, 0));
+  slice_in.set(Window::DimZ, Window::Dimension(0, 0, 0));
+  slice_in.set(3, Window::Dimension(0, 0, 0));
+
+  // Copy output's shape in order to use for recovering at end of this method
+  // TODO Remove changing and recovering output's shape if it is guaranteed that the axis positions
+  // of input and output are the same
+  const TensorShape shape_out = _output->info()->tensor_shape();
+  _output->info()->set_tensor_shape(inferOutputShape(shape_in, _axis));
+
+  idx = 0;
+  add_4D_tensor_argument(idx, _input, slice_in);
+  add_4D_tensor_argument(idx, _output, slice_out);
+  enqueue(queue, *this, slice_out, lws_hint());
+
+  // Recover output's shape of output tensor
+  _output->info()->set_tensor_shape(shape_out);
+}
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLSpaceToBatchNDKernel.cpp b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLSpaceToBatchNDKernel.cpp
new file mode 100644
index 000000000..f7836b6cd
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLSpaceToBatchNDKernel.cpp
@@ -0,0 +1,241 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_compute/core/CL/kernels/CLSpaceToBatchNDKernel.h"
+
+#include "arm_compute/core/CL/CLHelpers.h"
+#include "arm_compute/core/CL/CLKernelLibraryEx.h"
+#include "arm_compute/core/CL/ICLTensor.h"
+
+using namespace arm_compute;
+
+namespace
+{
+constexpr unsigned int num_elems_processed_per_iteration = 16;
+
+Status validate_arguments(const ITensorInfo *input, const ITensorInfo *block_size,
+                          const ITensorInfo *padding_size, const ITensorInfo *output)
+{
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::U8, DataType::QASYMM8,
+                                                       DataType::S16, DataType::F16, DataType::S32,
+                                                       DataType::F32);
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(block_size, 1, DataType::S32);
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(padding_size, 1, DataType::S32);
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::U8, DataType::QASYMM8,
+                                                       DataType::S16, DataType::F16, DataType::S32,
+                                                       DataType::F32);
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->num_dimensions() != output->num_dimensions(),
+                                  "The number of dimensions of input should be equal to output");
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->data_layout() != output->data_layout(),
+                                  "The input and output layouts are different!");
+
+  // TODO Support other cases
+  if (input->num_dimensions() == 4 && input->data_layout() == DataLayout::NCHW)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->dimension(2) != output->dimension(2),
+                                    "Input Depth should be equal to Output Depth");
+    ARM_COMPUTE_RETURN_ERROR_ON_MSG(block_size->dimension(0) != 2 ||
+                                        padding_size->dimension(1) != 2,
+                                    "Only 2-dimensional spatial block's size was wrong");
+  }
+  else if (input->num_dimensions() == 4 && input->data_layout() == DataLayout::NHWC)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->dimension(0) != output->dimension(0),
+                                    "Input Depth should be equal to Output Depth");
+    ARM_COMPUTE_RETURN_ERROR_ON_MSG(block_size->dimension(0) != 2 ||
+                                        padding_size->dimension(1) != 2,
+                                    "Only 2-dimensional spatial block's size was wrong");
+  }
+  else
+  {
+    ARM_COMPUTE_RETURN_ERROR_MSG("CLSpaceToBatchNDKernel supports only 4-dimensional input");
+  }
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->num_dimensions() < 2 && input->num_dimensions() > 4,
+                                  "CLSpaceToBatchNDKernel supports dimensions up to 4");
+
+  if (input->data_type() == DataType::QASYMM8)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->quantization_info() != output->quantization_info(),
+                                    "The input and output quantization info are different!");
+  }
+
+  return Status{};
+}
+
+} // namespace
+
+CLSpaceToBatchNDKernel::CLSpaceToBatchNDKernel()
+{
+  // DO NOTHING
+}
+
+void CLSpaceToBatchNDKernel::configure(const ICLTensor *input, const ICLTensor *block_size,
+                                       const ICLTensor *padding_size, ICLTensor *output)
+{
+
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
+  ARM_COMPUTE_ERROR_THROW_ON(
+      validate_arguments(input->info(), block_size->info(), padding_size->info(), output->info()));
+
+  _input = input;
+  _block_size = block_size;
+  _padding_size = padding_size;
+  _output = output;
+
+  // Set kernel build options
+  // TODO Support other cases
+  std::string kernel_name = "space_to_batch_4d";
+  std::set<std::string> build_opts;
+  Window win;
+
+  if (input->info()->data_layout() == DataLayout::NCHW)
+  {
+    kernel_name += "_nchw";
+    build_opts.emplace("-DDEPTH_OUT=" + support::cpp11::to_string(output->info()->dimension(2)));
+    build_opts.emplace("-DHEIGHT_IN=" + support::cpp11::to_string(input->info()->dimension(1)));
+    build_opts.emplace("-DWIDTH_IN=" + support::cpp11::to_string(input->info()->dimension(0)));
+
+    win = calculate_max_window(*output->info(), Steps());
+
+    Coordinates coord;
+    coord.set_num_dimensions(output->info()->num_dimensions());
+    output->info()->set_valid_region(ValidRegion(coord, output->info()->tensor_shape()));
+  }
+  else if (input->info()->data_layout() == DataLayout::NHWC)
+  {
+    kernel_name += "_nhwc";
+    build_opts.emplace("-DHEIGHT_OUT=" + support::cpp11::to_string(output->info()->dimension(2)));
+    build_opts.emplace("-DHEIGHT_IN=" + support::cpp11::to_string(input->info()->dimension(2)));
+    build_opts.emplace("-DWIDTH_IN=" + support::cpp11::to_string(input->info()->dimension(1)));
+    build_opts.emplace("-DVEC_SIZE=" +
+                       support::cpp11::to_string(num_elems_processed_per_iteration));
+
+    win = calculate_max_window(*output->info(), Steps(num_elems_processed_per_iteration));
+    AccessWindowHorizontal input_access(input->info(), 0, num_elems_processed_per_iteration);
+    AccessWindowHorizontal output_access(output->info(), 0, num_elems_processed_per_iteration);
+
+    bool window_changed = update_window_and_padding(win, input_access, output_access);
+    input_access.set_valid_region(win, output->info()->valid_region());
+
+    if (window_changed)
+    {
+      ARM_COMPUTE_CREATE_ERROR(ErrorCode::RUNTIME_ERROR, "Insufficient Padding!");
+    }
+  }
+  else
+  {
+    ARM_COMPUTE_ERROR("Unsupported layout");
+  }
+
+  build_opts.emplace("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type()));
+  build_opts.emplace("-DBATCH_IN=" + support::cpp11::to_string(input->info()->dimension(3)));
+  if (input->info()->data_type() == DataType::QASYMM8)
+  {
+    build_opts.emplace("-DZERO_VALUE=" +
+                       support::cpp11::to_string(input->info()->quantization_info().offset));
+  }
+  else
+  {
+    build_opts.emplace("-DZERO_VALUE=" + support::cpp11::to_string(0));
+  }
+
+  // Create kernel
+  _kernel =
+      static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel(kernel_name, build_opts));
+
+  // Configure kernel window
+  ICLKernel::configure_internal(win);
+}
+
+void CLSpaceToBatchNDKernel::run(const Window &window, cl::CommandQueue &queue)
+{
+  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
+  ARM_COMPUTE_ERROR_ON_MISMATCHING_WINDOWS(ICLKernel::window(), window);
+
+#if defined(ARM_COMPUTE_DEBUG_ENABLED)
+  const_cast<ICLTensor *>(_block_size)->map(queue);
+  const_cast<ICLTensor *>(_padding_size)->map(queue);
+
+  const size_t num_dimensions = _input->info()->num_dimensions();
+  const size_t num_spacial_dimensions = _block_size->info()->dimension(0);
+  uint32_t batch_size = _input->info()->dimension(num_dimensions - 1);
+  for (size_t i = 0; i < num_spacial_dimensions; ++i)
+  {
+    const int32_t block_size = *reinterpret_cast<int32_t *>(_block_size->ptr_to_element({i}));
+    const int32_t padding_size_pre =
+        *reinterpret_cast<int32_t *>(_padding_size->ptr_to_element({0, i}));
+    const int32_t padding_size_post =
+        *reinterpret_cast<int32_t *>(_padding_size->ptr_to_element({1, i}));
+
+    ARM_COMPUTE_ERROR_ON_MSG(block_size < 1, "Block size should be greater than or equal to 1");
+    ARM_COMPUTE_ERROR_ON_MSG(padding_size_pre < 0 && padding_size_post < 0,
+                             "Padding size should be greater than or equal to 0");
+
+    if (num_dimensions == 4 && _input->info()->data_layout() == DataLayout::NCHW)
+    {
+      ARM_COMPUTE_ERROR_ON_MSG(
+          _output->info()->dimension(i) !=
+              (_input->info()->dimension(i) + padding_size_pre + padding_size_post) / block_size,
+          "Dimension value of spatial block does not match output's dimension value");
+    }
+    else
+    {
+      ARM_COMPUTE_ERROR_ON_MSG(
+          _output->info()->dimension(num_dimensions - num_spacial_dimensions - 1 + i) !=
+              (_input->info()->dimension(num_dimensions - num_spacial_dimensions - 1 + i) +
+               padding_size_pre + padding_size_post) /
+                  block_size,
+          "Dimension value of spatial block does not match output's dimension value");
+    }
+
+    batch_size *= block_size;
+  }
+  ARM_COMPUTE_ERROR_ON_MSG(
+      _output->info()->dimension(num_dimensions - 1) != batch_size,
+      "Output batch size should be equal to input batch size * (multiplication of all block size)");
+
+  const_cast<ICLTensor *>(_block_size)->unmap(queue);
+  const_cast<ICLTensor *>(_padding_size)->unmap(queue);
+#endif // defined(ARM_COMPUTE_DEBUG_ENABLED)
+
+  Window slice_out = window.first_slice_window_4D().collapse(ICLKernel::window(), 2, 4);
+
+  // Setup output slice
+  Window slice_in(slice_out);
+  slice_in.set(Window::DimX, Window::Dimension(0, 0, 0));
+  slice_in.set(Window::DimY, Window::Dimension(0, 0, 0));
+  slice_in.set(Window::DimZ, Window::Dimension(0, 0, 0));
+  slice_in.set(3, Window::Dimension(0, 0, 0));
+
+  // Set block size window
+  Window win_block = calculate_max_window(*_block_size->info(), Steps());
+
+  // Set padding size window
+  Window win_padding = calculate_max_window(*_padding_size->info(), Steps());
+
+  do
+  {
+    unsigned int idx = 0;
+    add_4D_tensor_argument(idx, _input, slice_in);
+    add_4D_tensor_argument(idx, _output, slice_out);
+    add_1D_tensor_argument(idx, _block_size, win_block);
+    add_2D_tensor_argument(idx, _padding_size, win_padding);
+    enqueue(queue, *this, slice_out);
+  } while (window.slide_window_slice_4D(slice_out) && window.slide_window_slice_4D(slice_in));
+}
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLSpaceToDepthKernel.cpp b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLSpaceToDepthKernel.cpp
new file mode 100644
index 000000000..b085192a2
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLSpaceToDepthKernel.cpp
@@ -0,0 +1,124 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_compute/core/CL/kernels/CLSpaceToDepthKernel.h"
+
+#include "arm_compute/core/CL/CLHelpers.h"
+#include "arm_compute/core/CL/CLKernelLibraryEx.h"
+#include "arm_compute/core/CL/ICLTensor.h"
+
+using namespace arm_compute;
+
+namespace
+{
+Status validate_arguments(const ITensorInfo *input, const ITensorInfo *output,
+                          const int32_t block_size)
+{
+  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::U8, DataType::QASYMM8,
+                                                DataType::S16, DataType::S32, DataType::F16,
+                                                DataType::F32);
+  ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::U8, DataType::QASYMM8,
+                                                DataType::S16, DataType::S32, DataType::F16,
+                                                DataType::F32);
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(block_size < 1,
+                                  "Block size should be greater than or equal to 1.");
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(input->dimension(3) != output->dimension(3),
+                                  "Input batch should be equal to Output batch");
+
+  auto layout_out = input->data_layout();
+  ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_LAYOUT(input, output);
+
+  auto index_depth = get_data_layout_dimension_index(layout_out, DataLayoutDimension::CHANNEL);
+  auto index_height = get_data_layout_dimension_index(layout_out, DataLayoutDimension::HEIGHT);
+  auto index_width = get_data_layout_dimension_index(layout_out, DataLayoutDimension::WIDTH);
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(
+      input->dimension(index_depth) * block_size * block_size != output->dimension(index_depth),
+      "Output depth should be equal to (input depth * block size *block size)");
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG((input->dimension(index_width) % block_size) ||
+                                      (input->dimension(index_height) % block_size),
+                                  "Input height and width should be divisible by block size");
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(
+      (output->dimension(index_width) != (input->dimension(index_width) / block_size)) ||
+          (output->dimension(index_height) != (input->dimension(index_height) / block_size)),
+      "Output height and width should be equal to "
+      "input_height/blocksize and input_width/blocksize respectively");
+
+  return Status{};
+}
+
+} // namespace
+
+CLSpaceToDepthKernel::CLSpaceToDepthKernel() : _input(nullptr), _output(nullptr) {}
+
+void CLSpaceToDepthKernel::configure(const ICLTensor *input, ICLTensor *output,
+                                     const int32_t block_size)
+{
+
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
+  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input->info(), output->info(), block_size));
+
+  _input = input;
+  _output = output;
+
+  // Set kernel build options
+  auto layout_out = input->info()->data_layout();
+  std::set<std::string> build_opts;
+  build_opts.emplace("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type()));
+  build_opts.emplace("-DBLOCK_SIZE=" + support::cpp11::to_string(block_size));
+  auto index_depth = get_data_layout_dimension_index(layout_out, DataLayoutDimension::CHANNEL);
+  auto depth = input->info()->dimension(index_depth);
+  build_opts.emplace("-DDEPTH_IN=" + support::cpp11::to_string(depth));
+  build_opts.emplace("-DZ_IN=" + support::cpp11::to_string(input->info()->tensor_shape().z()));
+
+  // Create kernel
+  _kernel = static_cast<cl::Kernel>(CLKernelLibraryEx::get().create_kernel(
+      "space_to_depth_" + lower_string(string_from_data_layout(layout_out)), build_opts));
+
+  // Configure  kernel window
+  Window win = calculate_max_window(*input->info(), Steps());
+
+  Coordinates coord;
+  coord.set_num_dimensions(output->info()->num_dimensions());
+  output->info()->set_valid_region(ValidRegion(coord, output->info()->tensor_shape()));
+
+  ICLKernel::configure_internal(win);
+}
+
+void CLSpaceToDepthKernel::run(const Window &window, cl::CommandQueue &queue)
+{
+  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
+  ARM_COMPUTE_ERROR_ON_MISMATCHING_WINDOWS(ICLKernel::window(), window);
+
+  Window slice_in = window.first_slice_window_4D().collapse(ICLKernel::window(), 2, 4);
+
+  // Setup output slice
+  Window slice_out(slice_in);
+  slice_out.set(Window::DimX, Window::Dimension(0, 0, 0));
+  slice_out.set(Window::DimY, Window::Dimension(0, 0, 0));
+  slice_out.set(Window::DimZ, Window::Dimension(0, 0, 0));
+  slice_out.set(3, Window::Dimension(0, 0, 0));
+
+  do
+  {
+    unsigned int idx = 0;
+    add_4D_tensor_argument(idx, _input, slice_in);
+    add_4D_tensor_argument(idx, _output, slice_out);
+    enqueue(queue, *this, slice_in);
+  } while (window.slide_window_slice_4D(slice_in) && window.slide_window_slice_4D(slice_out));
+}
diff --git a/libs/ARMComputeEx/src/core/CL/kernels/CLTopKV2Kernel.cpp b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLTopKV2Kernel.cpp
index 073c2f7bb..073c2f7bb 100644
--- a/libs/ARMComputeEx/src/core/CL/kernels/CLTopKV2Kernel.cpp
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLTopKV2Kernel.cpp
diff --git a/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLTransposeConvLayerUpsampleKernel.cpp b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLTransposeConvLayerUpsampleKernel.cpp
new file mode 100644
index 000000000..6cc8d9d13
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CL/kernels/CLTransposeConvLayerUpsampleKernel.cpp
@@ -0,0 +1,164 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017-2019 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_compute/core/CL/kernels/CLTransposeConvLayerUpsampleKernel.h"
+
+#include "arm_compute/core/CL/CLHelpers.h"
+#include "arm_compute/core/CL/CLKernelLibrary.h"
+#include "arm_compute/core/CL/CLValidate.h"
+#include "arm_compute/core/CL/ICLTensor.h"
+#include "arm_compute/core/Error.h"
+#include "arm_compute/core/Helpers.h"
+#include "arm_compute/core/Validate.h"
+#include "arm_compute/core/Window.h"
+
+using namespace arm_compute;
+
+CLTransposeConvLayerUpsampleKernel::CLTransposeConvLayerUpsampleKernel()
+    : _input(nullptr), _output(nullptr), _inner_border(), _info()
+{
+}
+
+Status CLTransposeConvLayerUpsampleKernel::validate(const ITensorInfo *input,
+                                                    const ITensorInfo *output,
+                                                    const BorderSize &inner_border,
+                                                    const PadStrideInfo &info)
+{
+  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, output);
+  ARM_COMPUTE_RETURN_ERROR_ON_F16_UNSUPPORTED(input);
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::QASYMM8, DataType::F16,
+                                                       DataType::F32);
+  ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
+  ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_QUANTIZATION_INFO(input, output);
+
+  const DataLayout data_layout = input->data_layout();
+
+  const size_t idx_w = get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH);
+  const size_t idx_h = get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT);
+  const size_t idx_c = get_data_layout_dimension_index(data_layout, DataLayoutDimension::CHANNEL);
+
+  ARM_COMPUTE_RETURN_ERROR_ON(output->dimension(idx_w) == 0);
+  ARM_COMPUTE_RETURN_ERROR_ON(output->dimension(idx_h) == 0);
+
+  ARM_COMPUTE_RETURN_ERROR_ON(input->dimension(idx_c) != output->dimension(idx_c));
+  for (size_t i = 3; i < Coordinates::num_max_dimensions; ++i)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON(input->dimension(i) != output->dimension(i));
+  }
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(inner_border.right > info.stride().first - 1,
+                                  "inner_border_right must be smaller that stride_x");
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(inner_border.top > info.stride().second - 1,
+                                  "inner_border_top must be smaller that stride_y");
+
+  return Status{};
+}
+
+void CLTransposeConvLayerUpsampleKernel::configure(const ICLTensor *input, ICLTensor *output,
+                                                   const BorderSize &inner_border,
+                                                   const PadStrideInfo &info)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
+
+  _input = input;
+  _output = output;
+  _inner_border = inner_border;
+  _info = info;
+
+  // Perform validation step
+  ARM_COMPUTE_ERROR_THROW_ON(CLTransposeConvLayerUpsampleKernel::validate(
+      input->info(), output->info(), inner_border, info));
+
+  // Create kernel
+  CLBuildOptions build_opts;
+  build_opts.add_option(("-DDATA_TYPE=" + get_cl_type_from_data_type(input->info()->data_type())));
+  _kernel = static_cast<cl::Kernel>(
+      CLKernelLibrary::get().create_kernel("deconvolution_upsample", build_opts.options()));
+
+  constexpr unsigned int num_elems_processed_per_iteration = 1;
+
+  // Configure kernel window
+  Window win = calculate_max_window(*output->info(), Steps(num_elems_processed_per_iteration));
+  AccessWindowHorizontal output_access(output->info(), 0, num_elems_processed_per_iteration);
+  output_access.set_valid_region(win, ValidRegion(Coordinates(), output->info()->tensor_shape()));
+
+  ICLKernel::configure_internal(win);
+}
+
+void CLTransposeConvLayerUpsampleKernel::run(const Window &window, cl::CommandQueue &queue)
+{
+  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
+  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICLKernel::window(), window);
+
+  const DataLayout data_layout = _input->info()->data_layout();
+
+  const size_t idx_w = get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH);
+  const size_t idx_h = get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT);
+
+  const int out_start_x = _info.pad_left();
+  const int out_end_x = _output->info()->dimension(idx_w) - _inner_border.right -
+                        _info.pad_right() + _info.stride().first - 1;
+  const int out_step_x = _info.stride().first;
+
+  const int out_start_y = _inner_border.top + _info.pad_top();
+  const int out_end_y =
+      _output->info()->dimension(idx_h) - _info.pad_bottom() + _info.stride().second - 1;
+  const int out_step_y = _info.stride().second;
+
+  switch (data_layout)
+  {
+    case DataLayout::NCHW:
+    {
+      Window collapsed = window.collapse_if_possible(ICLKernel::window(), Window::DimZ);
+
+      Window slice_out = collapsed.first_slice_window_3D();
+      slice_out.set(Window::DimX, Window::Dimension(out_start_x, out_end_x, out_step_x));
+      slice_out.set(Window::DimY, Window::Dimension(out_start_y, out_end_y, out_step_y));
+
+      Window slice_in = collapsed.first_slice_window_3D();
+
+      do
+      {
+        unsigned int idx = 0;
+        add_3D_tensor_argument(idx, _input, slice_in);
+        add_3D_tensor_argument(idx, _output, slice_out);
+        enqueue(queue, *this, slice_out);
+      } while (collapsed.slide_window_slice_3D(slice_in) &&
+               collapsed.slide_window_slice_3D(slice_out));
+      break;
+    }
+    case DataLayout::NHWC:
+    {
+      // NOTE: not collapsing in NHWC
+      Window slice_out = window.first_slice_window_3D();
+      slice_out.set(Window::DimY, Window::Dimension(out_start_x, out_end_x, out_step_x));
+      slice_out.set(Window::DimZ, Window::Dimension(out_start_y, out_end_y, out_step_y));
+
+      Window slice_in = window.first_slice_window_3D();
+
+      do
+      {
+        unsigned int idx = 0;
+        add_3D_tensor_argument(idx, _input, slice_in);
+        add_3D_tensor_argument(idx, _output, slice_out);
+        enqueue(queue, *this, slice_out);
+      } while (window.slide_window_slice_3D(slice_in) && window.slide_window_slice_3D(slice_out));
+      break;
+    }
+    default:
+      ARM_COMPUTE_ERROR("Unsupported data layout");
+  }
+}
diff --git a/runtimes/libs/ARMComputeEx/src/core/CPP/kernels/CPPUpsampleKernelEx.cpp b/runtimes/libs/ARMComputeEx/src/core/CPP/kernels/CPPUpsampleKernelEx.cpp
new file mode 100644
index 000000000..8ac667ceb
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/CPP/kernels/CPPUpsampleKernelEx.cpp
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/core/CPP/kernels/CPPUpsampleKernelEx.h"
+
+#include "arm_compute/core/Error.h"
+#include "arm_compute/core/Helpers.h"
+#include "arm_compute/core/ITensor.h"
+#include "arm_compute/core/TensorInfo.h"
+#include "arm_compute/core/Types.h"
+#include "arm_compute/core/Validate.h"
+#include "arm_compute/core/utils/misc/ShapeCalculator.h"
+
+#include <cstddef>
+#include <cstdint>
+
+namespace arm_compute
+{
+CPPUpsampleKernelEx::CPPUpsampleKernelEx() : _input(nullptr), _output(nullptr), _info() {}
+
+bool CPPUpsampleKernelEx::is_parallelisable() const { return false; }
+
+void CPPUpsampleKernelEx::configure(const ITensor *input, ITensor *output,
+                                    const PadStrideInfo &info)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
+
+  _input = input;
+  _output = output;
+  _info = info;
+
+  // Configure kernel window
+  Window win = calculate_max_window(*input->info(), Steps());
+
+  // The CPPUpsampleKernelEx doesn't need padding so update_window_and_padding() can be skipped
+  Coordinates coord;
+  coord.set_num_dimensions(output->info()->num_dimensions());
+  output->info()->set_valid_region(ValidRegion(coord, output->info()->tensor_shape()));
+
+  ICPPKernel::configure(win);
+}
+
+void CPPUpsampleKernelEx::run(const Window &window, const ThreadInfo &info)
+{
+  ARM_COMPUTE_UNUSED(info);
+  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
+  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICPPKernel::window(), window);
+
+  // Initialize _scaled_output buffer
+  const int width_scaled = _output->info()->dimension(0);
+  const int height_scaled = _output->info()->dimension(1);
+  const int stride_x = _info.stride().first;
+  const int stride_y = _info.stride().second;
+  const int start_x = _info.pad_left();
+  const int start_y = _info.pad_top();
+  const int end_y = height_scaled - _info.pad_bottom();
+  const int end_x = width_scaled - _info.pad_top();
+  const size_t element_size = _input->info()->element_size();
+
+  // The fill value is normally 0, but for QASYMM8 the '0' corresponds to the offset
+  const uint8_t fill_value =
+      _output->info()->data_type() == DataType::QASYMM8
+          ? utility::clamp<uint8_t>(_output->info()->quantization_info().offset)
+          : 0;
+  // Filling a value different than 0 works only for QASYMM8 datatype since we are filling 1byte
+  // values in a buffer of uint8_ts
+  std::fill_n(_output->buffer(), _output->info()->total_size(), fill_value);
+
+  // Create window
+  Window window_out(window);
+  window_out.set(Window::DimX, Window::Dimension(start_x, end_x, stride_x));
+  window_out.set(Window::DimY, Window::Dimension(start_y, end_y, stride_y));
+
+  // Create iterators
+  Iterator in(_input, window);
+  Iterator out(_output, window_out);
+
+  execute_window_loop(
+      window, [&](const Coordinates &) { memcpy(out.ptr(), in.ptr(), element_size); }, in, out);
+}
+} // namespace arm_compute
diff --git a/runtimes/libs/ARMComputeEx/src/core/NEON/NEElementwiseOperationFuncs.cpp b/runtimes/libs/ARMComputeEx/src/core/NEON/NEElementwiseOperationFuncs.cpp
new file mode 100644
index 000000000..4508f5800
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/NEON/NEElementwiseOperationFuncs.cpp
@@ -0,0 +1,346 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include "arm_compute/core/NEON/NEElementwiseOperationFuncs.h"
+
+#include <algorithm>
+#include "arm_compute/core/Types.h"
+#include "arm_compute/core/NEON/NEAsymm.h"
+#include "arm_compute/core/ITensor.h"
+#include "arm_compute/core/Helpers.h"
+#include "arm_compute/core/Window.h"
+
+namespace
+{
+void store_quantized_int32(uint8_t *output_ptr, const int32x4x4_t &out)
+{
+  const uint8x8_t pa = vqmovun_s16(vcombine_s16(vqmovn_s32(out.val[0]), vqmovn_s32(out.val[1])));
+  const uint8x8_t pb = vqmovun_s16(vcombine_s16(vqmovn_s32(out.val[2]), vqmovn_s32(out.val[3])));
+  vst1q_u8(output_ptr, vcombine_u8(pa, pb));
+}
+
+using namespace arm_compute;
+template <typename InputScalarType, typename OutputScalarType, typename InputVectorType>
+void elementwise_op_templ(
+    const ITensor *in1, const ITensor *in2, ITensor *out, const Window &window,
+    OutputScalarType (*scalar_func)(const InputScalarType &, const InputScalarType &),
+    int (*broadcast_func)(int, int, int, const InputScalarType *, const InputScalarType &,
+                          OutputScalarType *, const bool),
+    int (*neon_func)(int, int, int, const InputScalarType *, const InputScalarType *,
+                     OutputScalarType *))
+{
+  // Create input windows
+  Window input1_win = window.broadcast_if_dimension_le_one(in1->info()->tensor_shape());
+  Window input2_win = window.broadcast_if_dimension_le_one(in2->info()->tensor_shape());
+
+  // Clear X Dimension on execution window as we handle manually
+  Window win = window;
+  win.set(Window::DimX, Window::Dimension(0, 1, 1));
+
+  const int window_step_x = std::min(16 / static_cast<int>(sizeof(OutputScalarType)), 8);
+  const auto window_start_x = static_cast<int>(window.x().start());
+  const auto window_end_x = static_cast<int>(window.x().end());
+  const bool is_broadcast_across_x = (input1_win.x().step() == 0) || (input2_win.x().step() == 0);
+
+  if (is_broadcast_across_x)
+  {
+    const bool is_broadcast_input_2 = input2_win.x().step() == 0;
+    Window broadcast_win = is_broadcast_input_2 ? input2_win : input1_win;
+    Window non_broadcast_win = !is_broadcast_input_2 ? input2_win : input1_win;
+    const ITensor *broadcast_tensor = is_broadcast_input_2 ? in2 : in1;
+    const ITensor *non_broadcast_tensor = !is_broadcast_input_2 ? in2 : in1;
+
+    // Clear X Dimension on execution window as we handle manually
+    non_broadcast_win.set(Window::DimX, Window::Dimension(0, 1, 1));
+
+    Iterator broadcast_input(broadcast_tensor, broadcast_win);
+    Iterator non_broadcast_input(non_broadcast_tensor, non_broadcast_win);
+    Iterator output(out, win);
+
+    execute_window_loop(win,
+                        [&](const Coordinates &) {
+                          auto output_ptr = reinterpret_cast<OutputScalarType *>(output.ptr());
+                          const auto non_broadcast_input_ptr =
+                              reinterpret_cast<const InputScalarType *>(non_broadcast_input.ptr());
+                          const InputScalarType broadcast_value =
+                              *reinterpret_cast<const InputScalarType *>(broadcast_input.ptr());
+
+                          int x = (*broadcast_func)(window_start_x, window_end_x, window_step_x,
+                                                    non_broadcast_input_ptr, broadcast_value,
+                                                    output_ptr, !is_broadcast_input_2);
+                          for (; x < window_end_x; ++x)
+                          {
+                            const auto a = *(non_broadcast_input_ptr + x);
+                            *(output_ptr + x) =
+                                (*scalar_func)(!is_broadcast_input_2 ? broadcast_value : a,
+                                               !is_broadcast_input_2 ? a : broadcast_value);
+                          }
+                        },
+                        broadcast_input, non_broadcast_input, output);
+  }
+  else
+  {
+    // Clear X Dimension on execution window as we handle manually
+    input1_win.set(Window::DimX, Window::Dimension(0, 1, 1));
+    input2_win.set(Window::DimX, Window::Dimension(0, 1, 1));
+
+    Iterator input1(in1, input1_win);
+    Iterator input2(in2, input2_win);
+    Iterator output(out, win);
+
+    execute_window_loop(win,
+                        [&](const Coordinates &) {
+                          auto output_ptr = reinterpret_cast<OutputScalarType *>(output.ptr());
+                          const auto input1_ptr =
+                              reinterpret_cast<const InputScalarType *>(input1.ptr());
+                          const auto input2_ptr =
+                              reinterpret_cast<const InputScalarType *>(input2.ptr());
+
+                          int x = (*neon_func)(window_start_x, window_end_x, window_step_x,
+                                               input1_ptr, input2_ptr, output_ptr);
+                          for (; x < window_end_x; ++x)
+                          {
+                            const auto a = *(input1_ptr + x);
+                            const auto b = *(input2_ptr + x);
+                            *(output_ptr + x) = (*scalar_func)(a, b);
+                          }
+                        },
+                        input1, input2, output);
+  }
+}
+
+} // namespace
+
+namespace arm_compute
+{
+
+float32x4x4_t load_quantized(const uint8_t *input1_ptr, const int32x4_t &offset,
+                             const float32x4_t &scale)
+{
+  qasymm8x16_t x = vld1q_u8(input1_ptr);
+  const float32x4x4_t out = {{
+      vmulq_f32(
+          vcvtq_f32_s32(vsubq_s32(
+              vreinterpretq_s32_u32(vmovl_u16(vget_low_u16(vmovl_u8(vget_low_u8(x))))), offset)),
+          scale),
+      vmulq_f32(
+          vcvtq_f32_s32(vsubq_s32(
+              vreinterpretq_s32_u32(vmovl_u16(vget_high_u16(vmovl_u8(vget_low_u8(x))))), offset)),
+          scale),
+      vmulq_f32(
+          vcvtq_f32_s32(vsubq_s32(
+              vreinterpretq_s32_u32(vmovl_u16(vget_low_u16(vmovl_u8(vget_high_u8(x))))), offset)),
+          scale),
+      vmulq_f32(
+          vcvtq_f32_s32(vsubq_s32(
+              vreinterpretq_s32_u32(vmovl_u16(vget_high_u16(vmovl_u8(vget_high_u8(x))))), offset)),
+          scale),
+  }};
+  return out;
+}
+
+void store_quantized(uint8_t *output_ptr, const float32x4x4_t &rf, const float32x4_t &offset,
+                     const float32x4_t &invscale)
+{
+  int32x4x4_t out = {{
+      vcvtq_s32_f32(vmlaq_f32(offset, rf.val[0], invscale)),
+      vcvtq_s32_f32(vmlaq_f32(offset, rf.val[1], invscale)),
+      vcvtq_s32_f32(vmlaq_f32(offset, rf.val[2], invscale)),
+      vcvtq_s32_f32(vmlaq_f32(offset, rf.val[3], invscale)),
+  }};
+  store_quantized_int32(output_ptr, out);
+}
+
+float32x4x4_t dup_quantized(uint8_t broadcast_value, int offset, float scale)
+{
+  const qasymm8x16_t broadcast_value_vec = vdupq_n_u8(broadcast_value);
+  const int32x4_t voffset = vdupq_n_s32(offset);
+  const float32x4_t vscale = vdupq_n_f32(scale);
+
+  const float32x4x4_t broadcast_vector = {{
+      vmulq_f32(vcvtq_f32_s32(vsubq_s32(vreinterpretq_s32_u32(vmovl_u16(vget_low_u16(
+                                            vmovl_u8(vget_low_u8(broadcast_value_vec))))),
+                                        voffset)),
+                vscale),
+      vmulq_f32(vcvtq_f32_s32(vsubq_s32(vreinterpretq_s32_u32(vmovl_u16(vget_high_u16(
+                                            vmovl_u8(vget_low_u8(broadcast_value_vec))))),
+                                        voffset)),
+                vscale),
+      vmulq_f32(vcvtq_f32_s32(vsubq_s32(vreinterpretq_s32_u32(vmovl_u16(vget_low_u16(
+                                            vmovl_u8(vget_high_u8(broadcast_value_vec))))),
+                                        voffset)),
+                vscale),
+      vmulq_f32(vcvtq_f32_s32(vsubq_s32(vreinterpretq_s32_u32(vmovl_u16(vget_high_u16(
+                                            vmovl_u8(vget_high_u8(broadcast_value_vec))))),
+                                        voffset)),
+                vscale),
+  }};
+  return broadcast_vector;
+}
+
+void elementwise_op_quantized(
+    const ITensor *in1, const ITensor *in2, ITensor *out, const Window &window,
+    uint8_t (*scalar_func)(const float &, const float &, QuantizationInfo),
+    int (*broadcast_func)(int, int, int, const uint8_t *, float32x4x4_t, uint8_t *, int32x4_t,
+                          float32x4_t, float32x4_t, float32x4_t, const bool),
+    int (*neon_func)(int, int, int, const uint8_t *, const uint8_t *, uint8_t *, int32x4_t,
+                     int32x4_t, float32x4_t, float32x4_t, float32x4_t, float32x4_t))
+{
+  // Create input windows
+  Window input1_win = window.broadcast_if_dimension_le_one(in1->info()->tensor_shape());
+  Window input2_win = window.broadcast_if_dimension_le_one(in2->info()->tensor_shape());
+
+  // Clear X Dimension on execution window as we handle manually
+  Window win = window;
+  win.set(Window::DimX, Window::Dimension(0, 1, 1));
+
+  const int window_step_x = 16;
+  const auto window_start_x = static_cast<int>(window.x().start());
+  const auto window_end_x = static_cast<int>(window.x().end());
+  const bool is_broadcast_across_x = (input1_win.x().step() == 0) || (input2_win.x().step() == 0);
+
+  const float output_scale = out->info()->quantization_info().scale;
+  const int output_offset = out->info()->quantization_info().offset;
+
+  // Output quantization info (add 0.5 to round toward the nearest integer - 0.5 rounds away from
+  // zero)
+  const float32x4_t voffseto = vdupq_n_f32(output_offset + 0.5f);
+  const float32x4_t invvscaleo = vdupq_n_f32(1.f / output_scale);
+
+  if (is_broadcast_across_x)
+  {
+    // Select the broadcast input on the X axis
+    const bool is_broadcast_input_2 = input2_win.x().step() == 0;
+    Window broadcast_win = is_broadcast_input_2 ? input2_win : input1_win;
+    Window non_broadcast_win = !is_broadcast_input_2 ? input2_win : input1_win;
+    const ITensor *broadcast_tensor = is_broadcast_input_2 ? in2 : in1;
+    const ITensor *non_broadcast_tensor = !is_broadcast_input_2 ? in2 : in1;
+
+    const QuantizationInfo broadcast_qinfo = broadcast_tensor->info()->quantization_info();
+    const QuantizationInfo non_broadcast_qinfo = non_broadcast_tensor->info()->quantization_info();
+
+    const int32x4_t voffset_non_broadcast = vdupq_n_s32(non_broadcast_qinfo.offset);
+    const float32x4_t vscale_non_broadcast = vdupq_n_f32(non_broadcast_qinfo.scale);
+
+    // Clear X Dimension on execution window as we handle manually
+    non_broadcast_win.set(Window::DimX, Window::Dimension(0, 1, 1));
+
+    Iterator broadcast_input(broadcast_tensor, broadcast_win);
+    Iterator non_broadcast_input(non_broadcast_tensor, non_broadcast_win);
+    Iterator output(out, win);
+
+    execute_window_loop(
+        win,
+        [&](const Coordinates &) {
+          const auto non_broadcast_input_ptr =
+              reinterpret_cast<const uint8_t *>(non_broadcast_input.ptr());
+          const auto output_ptr = reinterpret_cast<uint8_t *>(output.ptr());
+
+          const uint8_t broadcast_value = *reinterpret_cast<const uint8_t *>(broadcast_input.ptr());
+          const float32x4x4_t broadcast_vector =
+              dup_quantized(broadcast_value, broadcast_qinfo.offset, broadcast_qinfo.scale);
+
+          int x = (*broadcast_func)(window_start_x, window_end_x, window_step_x,
+                                    non_broadcast_input_ptr, broadcast_vector, output_ptr,
+                                    voffset_non_broadcast, vscale_non_broadcast, voffseto,
+                                    invvscaleo, !is_broadcast_input_2);
+          for (; x < window_end_x; ++x)
+          {
+            const float afs =
+                scvt_f32_qasymm8(*(non_broadcast_input_ptr + x), non_broadcast_qinfo.scale,
+                                 non_broadcast_qinfo.offset);
+            const float bfs =
+                scvt_f32_qasymm8(broadcast_value, broadcast_qinfo.scale, broadcast_qinfo.offset);
+            *(output_ptr + x) =
+                (*scalar_func)(!is_broadcast_input_2 ? bfs : afs, !is_broadcast_input_2 ? afs : bfs,
+                               out->info()->quantization_info());
+          }
+        },
+        broadcast_input, non_broadcast_input, output);
+  }
+  else
+  {
+    // Input1 quantization info
+    const int32x4_t voffset1 = vdupq_n_s32(in1->info()->quantization_info().offset);
+    const float32x4_t vscale1 = vdupq_n_f32(in1->info()->quantization_info().scale);
+
+    // Input2 quantization info
+    const int32x4_t voffset2 = vdupq_n_s32(in2->info()->quantization_info().offset);
+    const float32x4_t vscale2 = vdupq_n_f32(in2->info()->quantization_info().scale);
+
+    // Clear X Dimension on execution window as we handle manually
+    input1_win.set(Window::DimX, Window::Dimension(0, 1, 1));
+    input2_win.set(Window::DimX, Window::Dimension(0, 1, 1));
+
+    const QuantizationInfo input1_qinfo = in1->info()->quantization_info();
+    const QuantizationInfo input2_qinfo = in2->info()->quantization_info();
+
+    Iterator input1(in1, input1_win);
+    Iterator input2(in2, input2_win);
+    Iterator output(out, win);
+
+    execute_window_loop(
+        win,
+        [&](const Coordinates &) {
+          const auto input1_ptr = reinterpret_cast<const uint8_t *>(input1.ptr());
+          const auto input2_ptr = reinterpret_cast<const uint8_t *>(input2.ptr());
+          const auto output_ptr = reinterpret_cast<uint8_t *>(output.ptr());
+
+          int x =
+              (*neon_func)(window_start_x, window_end_x, window_step_x, input1_ptr, input2_ptr,
+                           output_ptr, voffset1, voffset2, vscale1, vscale2, voffseto, invvscaleo);
+          for (; x < window_end_x; ++x)
+          {
+            const float afs =
+                scvt_f32_qasymm8(*(input1_ptr + x), input1_qinfo.scale, input1_qinfo.offset);
+            const float bfs =
+                scvt_f32_qasymm8(*(input2_ptr + x), input2_qinfo.scale, input2_qinfo.offset);
+            *(output_ptr + x) = (*scalar_func)(afs, bfs, out->info()->quantization_info());
+          }
+        },
+        input1, input2, output);
+  }
+}
+
+void elementwise_op(const ITensor *in1, const ITensor *in2, ITensor *out, const Window &window,
+                    float (*scalar_func)(const float &, const float &),
+                    int (*broadcast_func)(int, int, int, const float *, const float &, float *,
+                                          const bool),
+                    int (*neon_func)(int, int, int, const float *, const float *, float *))
+{
+  elementwise_op_templ<float, float, float32x4_t>(in1, in2, out, window, scalar_func,
+                                                  broadcast_func, neon_func);
+}
+
+void elementwise_op(const ITensor *in1, const ITensor *in2, ITensor *out, const Window &window,
+                    uint8_t (*scalar_func)(const uint8_t &, const uint8_t &),
+                    int (*broadcast_func)(int, int, int, const uint8_t *, const uint8_t &,
+                                          uint8_t *, const bool),
+                    int (*neon_func)(int, int, int, const uint8_t *, const uint8_t *, uint8_t *))
+{
+  elementwise_op_templ<uint8_t, uint8_t, uint8x16_t>(in1, in2, out, window, scalar_func,
+                                                     broadcast_func, neon_func);
+}
+} // namespace arm_compute
diff --git a/runtimes/libs/ARMComputeEx/src/core/NEON/kernels/NEBinaryLogicalOperationKernel.cpp b/runtimes/libs/ARMComputeEx/src/core/NEON/kernels/NEBinaryLogicalOperationKernel.cpp
new file mode 100644
index 000000000..d2f42de53
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/NEON/kernels/NEBinaryLogicalOperationKernel.cpp
@@ -0,0 +1,237 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/core/NEON/kernels/NEBinaryLogicalOperationKernel.h"
+
+#include "arm_compute/core/Error.h"
+#include "arm_compute/core/Helpers.h"
+#include "arm_compute/core/ITensor.h"
+#include "arm_compute/core/NEON/wrapper/wrapper.h"
+#include "arm_compute/core/NEON/NEElementwiseOperationFuncs.h"
+#include "arm_compute/core/TensorInfo.h"
+#include "arm_compute/core/Validate.h"
+
+#include <algorithm>
+#include <arm_neon.h>
+#include <map>
+#include <string>
+
+namespace arm_compute
+{
+class Coordinates;
+} // namespace arm_compute
+
+namespace arm_compute
+{
+
+template <BinaryLogicalOperation op, typename ScalarType>
+inline ScalarType elementwise_logic_op_scalar(const ScalarType &a, const ScalarType &b)
+{
+  auto res = ScalarType(0);
+
+  switch (op)
+  {
+    case BinaryLogicalOperation::AND:
+      res = a & b;
+      break;
+    case BinaryLogicalOperation::OR:
+      res = a | b;
+      break;
+    default:
+      ARM_COMPUTE_ERROR("NOT_SUPPORTED!");
+  }
+  return res;
+}
+
+template <BinaryLogicalOperation op, typename VectorType>
+inline VectorType elementwise_logic_op(const VectorType &a, const VectorType &b)
+{
+  VectorType res = {0, 0, 0, 0};
+
+  switch (op)
+  {
+    case BinaryLogicalOperation::AND:
+      res = wrapper::vand(a, b);
+      break;
+    case BinaryLogicalOperation::OR:
+      res = wrapper::vorr(a, b);
+      break;
+    default:
+      ARM_COMPUTE_ERROR("NOT_SUPPORTED!");
+  }
+  return res;
+}
+
+template <BinaryLogicalOperation op>
+inline uint8x16x4_t elementwise_logic_op(const uint8x16x4_t &a, const uint8x16x4_t &b)
+{
+  uint8x16x4_t out = {{
+      elementwise_logic_op<op>(a.val[0], b.val[0]), elementwise_logic_op<op>(a.val[1], b.val[1]),
+      elementwise_logic_op<op>(a.val[2], b.val[2]), elementwise_logic_op<op>(a.val[3], b.val[3]),
+  }};
+  return out;
+}
+
+template <BinaryLogicalOperation op, typename ScalarType, typename VectorType>
+inline VectorType elementwise_logic_op_broadcast(const VectorType &a,
+                                                 const ScalarType &broadcast_value,
+                                                 const bool reorder)
+{
+  VectorType broadcast_vector = wrapper::vdup_n(broadcast_value, wrapper::traits::vector_128_tag());
+  return elementwise_logic_op<op>(reorder ? broadcast_vector : a, reorder ? a : broadcast_vector);
+}
+
+template <BinaryLogicalOperation op, typename ScalarType, typename VectorType>
+inline int elementwise_logic_op_loop(int window_start_x, int window_end_x, int window_step_x,
+                                     const ScalarType *input1_ptr, const ScalarType *input2_ptr,
+                                     ScalarType *output_ptr)
+{
+  int x = window_start_x;
+  for (; x <= (window_end_x - window_step_x); x += window_step_x)
+  {
+    const auto a = wrapper::vloadq(input1_ptr + x);
+    const auto b = wrapper::vloadq(input2_ptr + x);
+    wrapper::vstore(output_ptr + x, elementwise_logic_op<op>(a, b));
+  }
+  return x;
+}
+
+template <BinaryLogicalOperation op, typename ScalarType, typename VectorType>
+inline int elementwise_logic_op_broadcast_loop(int window_start_x, int window_end_x,
+                                               int window_step_x,
+                                               const ScalarType *non_broadcast_input_ptr,
+                                               const ScalarType &broadcast_value,
+                                               ScalarType *output_ptr, const bool reorder)
+{
+  int x = window_start_x;
+  for (; x <= (window_end_x - window_step_x); x += window_step_x)
+  {
+    const auto a = wrapper::vloadq((non_broadcast_input_ptr + x));
+    wrapper::vstore(output_ptr + x,
+                    elementwise_logic_op_broadcast<op>(a, broadcast_value, reorder));
+  }
+  return x;
+}
+
+template <BinaryLogicalOperation op, typename ScalarType, typename VectorType>
+void elementwise_logic_op(const ITensor *in1, const ITensor *in2, ITensor *out,
+                          const Window &window)
+{
+  elementwise_op(in1, in2, out, window, &elementwise_logic_op_scalar<op, ScalarType>,
+                 &elementwise_logic_op_broadcast_loop<op, ScalarType, VectorType>,
+                 &elementwise_logic_op_loop<op, ScalarType, VectorType>);
+}
+
+std::function<void(const ITensor *, const ITensor *, ITensor *, const Window &)> configure_func(
+    const ITensor *input1, const ITensor *input2, ITensor *output,
+    std::map<std::string, NEElementwiseOperationKernel::ElementwiseFunction *> map_function)
+{
+  std::string function_to_call("op_");
+  function_to_call += string_from_data_type(input1->info()->data_type()) + "_";
+  function_to_call += string_from_data_type(input2->info()->data_type()) + "_";
+  function_to_call += string_from_data_type(output->info()->data_type());
+
+  auto it = map_function.find(function_to_call);
+
+  if (it != map_function.end())
+  {
+    auto func = it->second;
+    return [func](const ITensor *input1, const ITensor *input2, ITensor *output,
+                  const Window &window) { func(input1, input2, output, window); };
+  }
+  return nullptr;
+}
+
+template <BinaryLogicalOperation op>
+std::function<void(const ITensor *, const ITensor *, ITensor *, const Window &)>
+configure_logic_func(const ITensor *input1, const ITensor *input2, ITensor *output)
+{
+  static std::map<std::string, NEElementwiseOperationKernel::ElementwiseFunction *> map_function = {
+      {"op_U8_U8_U8", &elementwise_logic_op<op, uint8_t, uint8x16_t>},
+      {"op_QASYMM8_QASYMM8_QASYMM8", &elementwise_logic_op<op, uint8_t, uint8x16_t>}};
+
+  return configure_func(input1, input2, output, map_function);
+}
+
+void NEBinaryLogicalOperationKernel::configure(BinaryLogicalOperation op, const ITensor *input1,
+                                               const ITensor *input2, ITensor *output)
+{
+  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(*input1->info(), *input2->info(), *output->info()));
+  configure_common(input1, input2, output);
+  switch (op)
+  {
+    case BinaryLogicalOperation::AND:
+      _function = configure_logic_func<BinaryLogicalOperation::AND>(input1, input2, output);
+      break;
+    case BinaryLogicalOperation::OR:
+      _function = configure_logic_func<BinaryLogicalOperation::OR>(input1, input2, output);
+      break;
+    default:
+      ARM_COMPUTE_ERROR("NOT_SUPPORTED!");
+  }
+}
+
+Status NEBinaryLogicalOperationKernel::validate_arguments(const ITensorInfo &input1,
+                                                          const ITensorInfo &input2,
+                                                          const ITensorInfo &output)
+{
+  // Validate in case of configured output
+  if (output.total_size() > 0)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(&output, 1, DataType::U8,
+                                                         DataType::QASYMM8);
+  }
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(&input1, 1, DataType::U8, DataType::QASYMM8);
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(&input2, 1, DataType::U8, DataType::QASYMM8);
+  ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(&input1, &input2);
+
+  const TensorShape out_shape =
+      TensorShape::broadcast_shape(input1.tensor_shape(), input2.tensor_shape());
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(out_shape.total_size() == 0,
+                                  "Inputs are not broadcast compatible");
+
+  // Validate in case of configured output
+  if (output.total_size() > 0)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON_MSG(
+        detail::have_different_dimensions(out_shape, output.tensor_shape(), 0),
+        "Wrong shape for output");
+  }
+
+  return Status{};
+}
+
+Status NEBinaryLogicalOperationKernel::validate(BinaryLogicalOperation op,
+                                                const ITensorInfo *input1,
+                                                const ITensorInfo *input2,
+                                                const ITensorInfo *output)
+{
+  ARM_COMPUTE_UNUSED(op);
+  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input1, input2, output);
+  ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(*input1, *input2, *output));
+  return Status{};
+}
+
+} // namespace arm_compute
diff --git a/runtimes/libs/ARMComputeEx/src/core/NEON/kernels/NEElementwiseUnaryKernelEx.cpp b/runtimes/libs/ARMComputeEx/src/core/NEON/kernels/NEElementwiseUnaryKernelEx.cpp
new file mode 100644
index 000000000..cebd614df
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/NEON/kernels/NEElementwiseUnaryKernelEx.cpp
@@ -0,0 +1,205 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/core/NEON/kernels/NEElementwiseUnaryKernelEx.h"
+
+#include "arm_compute/core/CPP/Validate.h"
+#include "arm_compute/core/Error.h"
+#include "arm_compute/core/Helpers.h"
+#include "arm_compute/core/IAccessWindow.h"
+#include "arm_compute/core/ITensor.h"
+#include "arm_compute/core/NEON/NEAsymm.h"
+#include "arm_compute/core/NEON/NEFixedPoint.h"
+#include "arm_compute/core/NEON/wrapper/wrapper.h"
+#include "arm_compute/core/TensorInfo.h"
+#include "arm_compute/core/Validate.h"
+
+#include <algorithm>
+#include <arm_neon.h>
+#include <cstdint>
+#include <map>
+#include <string>
+
+namespace arm_compute
+{
+class Coordinates;
+
+namespace
+{
+template <ElementWiseUnaryEx op, typename ScalarType>
+inline ScalarType elementwise_op_scalar(const ScalarType &a)
+{
+  switch (op)
+  {
+    case ElementWiseUnaryEx::NEG:
+      return -a;
+    default:
+      ARM_COMPUTE_ERROR("NOT_SUPPORTED!");
+  }
+}
+
+template <ElementWiseUnaryEx op, typename VectorType>
+inline VectorType elementwise_op(const VectorType &a)
+{
+  switch (op)
+  {
+    case ElementWiseUnaryEx::NEG:
+      return wrapper::vneg(a);
+    default:
+      ARM_COMPUTE_ERROR("NOT_SUPPORTED!");
+  }
+}
+
+template <ElementWiseUnaryEx op, typename ScalarType>
+void elementwise_op(const ITensor *in, ITensor *out, const Window &window)
+{
+  const int window_step_x = 16 / sizeof(ScalarType);
+  const auto window_start_x = static_cast<int>(window.x().start());
+  const auto window_end_x = static_cast<int>(window.x().end());
+
+  Window win = window;
+  win.set(Window::DimX, Window::Dimension(0, 1, 1));
+
+  Iterator input(in, win);
+  Iterator output(out, win);
+
+  execute_window_loop(win,
+                      [&](const Coordinates &) {
+                        auto output_ptr = reinterpret_cast<ScalarType *>(output.ptr());
+                        const auto input_ptr = reinterpret_cast<const ScalarType *>(input.ptr());
+
+                        int x = window_start_x;
+                        for (; x <= window_end_x - window_step_x; x += window_step_x)
+                        {
+                          wrapper::vstore(output_ptr + x,
+                                          elementwise_op<op>(wrapper::vloadq(input_ptr + x)));
+                        }
+                        for (; x < window_end_x; ++x)
+                        {
+                          *(output_ptr + x) = elementwise_op_scalar<op>(*(input_ptr + x));
+                        }
+                      },
+                      input, output);
+}
+
+template <ElementWiseUnaryEx op>
+std::function<void(const ITensor *input, ITensor *output, const Window &window)>
+configure_func(const ITensor *input, ITensor *output)
+{
+  std::string function_to_call("op_");
+  function_to_call += string_from_data_type(input->info()->data_type()) + "_";
+  function_to_call += string_from_data_type(output->info()->data_type());
+
+  static std::map<std::string, NEElementwiseUnaryKernelEx::ElementwiseUnaryFunction *>
+      map_function = {
+          {"op_F32_F32", &elementwise_op<op, float>}, {"op_S32_S32", &elementwise_op<op, int32_t>},
+      };
+#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+  map_function["op_F16_F16"] = &elementwise_op<op, float16_t>;
+#endif /* __ARM_FEATURE_FP16_VECTOR_ARITHMETIC */
+
+  auto it = map_function.find(function_to_call);
+
+  if (it != map_function.end())
+  {
+    auto func = it->second;
+    return [func](const ITensor *input, ITensor *output, const Window &window) {
+      func(input, output, window);
+    };
+  }
+  return nullptr;
+}
+} // namespace
+
+NEElementwiseUnaryKernelEx::NEElementwiseUnaryKernelEx()
+    : _function(nullptr), _input(nullptr), _output(nullptr)
+{
+}
+
+void NEElementwiseUnaryKernelEx::configure(ElementWiseUnaryEx op, const ITensor *input,
+                                           ITensor *output)
+{
+  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(*input->info(), *output->info()));
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
+
+  // Configure kernel window
+  const std::pair<TensorShape, ValidRegion> broadcast_pair =
+      ITensorInfo::broadcast_shape_and_valid_region(*input->info());
+  const TensorShape &out_shape = broadcast_pair.first;
+  const ValidRegion &valid_region = broadcast_pair.second;
+
+  // Auto initialize output if not initialized
+  auto_init_if_empty(*output->info(), out_shape, 1, input->info()->data_type());
+
+  Window win = calculate_max_window(valid_region);
+
+  _input = input;
+  _output = output;
+
+  INEKernel::configure(win);
+
+  switch (op)
+  {
+    case ElementWiseUnaryEx::NEG:
+      _function = configure_func<ElementWiseUnaryEx::NEG>(input, output);
+      break;
+    default:
+      ARM_COMPUTE_ERROR("NOT_SUPPORTED!");
+  }
+}
+
+Status NEElementwiseUnaryKernelEx::validate_arguments(const ITensorInfo &input,
+                                                      const ITensorInfo &output)
+{
+  ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(&input);
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(&input, 1, DataType::F16, DataType::F32,
+                                                       DataType::S32);
+
+  // Validate in case of configured output
+  if (output.total_size() > 0)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(&input, &output);
+  }
+
+  return Status{};
+}
+
+Status NEElementwiseUnaryKernelEx::validate(ElementWiseUnaryEx op, const ITensorInfo *input,
+                                            const ITensorInfo *output)
+{
+  ARM_COMPUTE_UNUSED(op);
+  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, output);
+  ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(*input, *output));
+  return Status{};
+}
+
+void NEElementwiseUnaryKernelEx::run(const Window &window, const ThreadInfo &info)
+{
+  ARM_COMPUTE_UNUSED(info);
+  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
+  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(INEKernel::window(), window);
+  ARM_COMPUTE_ERROR_ON(_function == nullptr);
+  _function(_input, _output, window);
+}
+} // namespace arm_compute
diff --git a/runtimes/libs/ARMComputeEx/src/core/NEON/kernels/NEPReLUKernel.cpp b/runtimes/libs/ARMComputeEx/src/core/NEON/kernels/NEPReLUKernel.cpp
new file mode 100644
index 000000000..ad1bb9051
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/NEON/kernels/NEPReLUKernel.cpp
@@ -0,0 +1,274 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/core/NEON/kernels/NEPReLUKernel.h"
+
+#include "arm_compute/core/ITensor.h"
+#include "arm_compute/core/NEON/NEAsymm.h"
+#include "arm_compute/core/NEON/NEElementwiseOperationFuncs.h"
+#include "arm_compute/core/NEON/wrapper/wrapper.h"
+#include "arm_compute/core/TensorInfo.h"
+#include "arm_compute/core/Window.h"
+
+#include <arm_neon.h>
+
+using namespace arm_compute;
+namespace
+{
+
+/** Conditional element-wise operations */
+enum class ConditionalOperation
+{
+  PRELU, /**< (x * y) for x < 0, x for x >= 0 */
+};
+
+template <ConditionalOperation op, typename ScalarType>
+inline ScalarType elementwise_conditional_op_scalar(const ScalarType &a, const ScalarType &b)
+{
+  auto res = ScalarType(0);
+
+  switch (op)
+  {
+    case ConditionalOperation::PRELU:
+      res = a < 0 ? a * b : a;
+      break;
+    default:
+      ARM_COMPUTE_ERROR("NOT_SUPPORTED!");
+  }
+  return res;
+}
+
+template <ConditionalOperation op>
+inline uint8_t elementwise_conditional_op_quantized_scalar(const float &a, const float &b,
+                                                           QuantizationInfo qinfo)
+{
+  return qinfo.quantize(elementwise_conditional_op_scalar<op>(a, b), RoundingPolicy::TO_NEAREST_UP);
+}
+
+template <ConditionalOperation op, typename VectorType>
+inline VectorType elementwise_conditional_op(const VectorType &a, const VectorType &b)
+{
+  VectorType res = {0, 0, 0, 0};
+  VectorType const_0 = {0, 0, 0, 0};
+
+  switch (op)
+  {
+    case ConditionalOperation::PRELU:
+      res = wrapper::vbsl(wrapper::vcgt(a, const_0), a, wrapper::vmul(a, b));
+      ;
+      break;
+    default:
+      ARM_COMPUTE_ERROR("NOT_SUPPORTED!");
+  }
+  return res;
+}
+
+template <ConditionalOperation op>
+inline float32x4x4_t elementwise_conditional_op(const float32x4x4_t &a, const float32x4x4_t &b)
+{
+  float32x4x4_t out = {{
+      elementwise_conditional_op<op>(a.val[0], b.val[0]),
+      elementwise_conditional_op<op>(a.val[1], b.val[1]),
+      elementwise_conditional_op<op>(a.val[2], b.val[2]),
+      elementwise_conditional_op<op>(a.val[3], b.val[3]),
+  }};
+  return out;
+}
+
+template <ConditionalOperation op, typename ScalarType, typename VectorType>
+inline VectorType elementwise_conditional_op_broadcast(const VectorType &a,
+                                                       const ScalarType &broadcast_value,
+                                                       const bool reorder)
+{
+  VectorType broadcast_vector = wrapper::vdup_n(broadcast_value, wrapper::traits::vector_128_tag());
+  return elementwise_conditional_op<op>(reorder ? broadcast_vector : a,
+                                        reorder ? a : broadcast_vector);
+}
+
+template <ConditionalOperation op, typename ScalarType, typename VectorType>
+inline int elementwise_conditional_op_loop(int window_start_x, int window_end_x, int window_step_x,
+                                           const ScalarType *input1_ptr,
+                                           const ScalarType *input2_ptr, ScalarType *output_ptr)
+{
+  int x = window_start_x;
+  for (; x <= (window_end_x - window_step_x); x += window_step_x)
+  {
+    const auto a = wrapper::vloadq(input1_ptr + x);
+    const auto b = wrapper::vloadq(input2_ptr + x);
+    wrapper::vstore(output_ptr + x, elementwise_conditional_op<op>(a, b));
+  }
+  return x;
+}
+
+template <ConditionalOperation op>
+inline int elementwise_conditional_op_quantized_loop(int window_start_x, int window_end_x,
+                                                     int window_step_x, const uint8_t *input1_ptr,
+                                                     const uint8_t *input2_ptr, uint8_t *output_ptr,
+                                                     int32x4_t voffset1, int32x4_t voffset2,
+                                                     float32x4_t vscale1, float32x4_t vscale2,
+                                                     float32x4_t voffseto, float32x4_t invvscaleo)
+{
+  int x = window_start_x;
+  for (; x <= (window_end_x - window_step_x); x += window_step_x)
+  {
+    // Get inputs and compute output
+    const float32x4x4_t af = load_quantized(input1_ptr + x, voffset1, vscale1);
+    const float32x4x4_t bf = load_quantized(input2_ptr + x, voffset2, vscale2);
+    const float32x4x4_t rf = elementwise_conditional_op<op>(af, bf);
+    store_quantized(output_ptr + x, rf, voffseto, invvscaleo);
+  }
+  return x;
+}
+
+template <ConditionalOperation op, typename ScalarType, typename VectorType>
+inline int elementwise_conditional_op_broadcast_loop(int window_start_x, int window_end_x,
+                                                     int window_step_x,
+                                                     const ScalarType *non_broadcast_input_ptr,
+                                                     const ScalarType &broadcast_value,
+                                                     ScalarType *output_ptr, const bool reorder)
+{
+  int x = window_start_x;
+  for (; x <= (window_end_x - window_step_x); x += window_step_x)
+  {
+    const auto a = wrapper::vloadq((non_broadcast_input_ptr + x));
+    wrapper::vstore(output_ptr + x,
+                    elementwise_conditional_op_broadcast<op>(a, broadcast_value, reorder));
+  }
+  return x;
+}
+
+template <ConditionalOperation op>
+inline int elementwise_conditional_op_quantized_broadcast_loop(
+    int window_start_x, int window_end_x, int window_step_x, const uint8_t *non_broadcast_input_ptr,
+    float32x4x4_t broadcast_vector, uint8_t *output_ptr, int32x4_t voffset_non_broadcast,
+    float32x4_t vscale_non_broadcast, float32x4_t voffseto, float32x4_t invvscaleo, bool reorder)
+{
+  int x = window_start_x;
+  for (; x <= (window_end_x - window_step_x); x += window_step_x)
+  {
+    const float32x4x4_t af =
+        load_quantized(non_broadcast_input_ptr + x, voffset_non_broadcast, vscale_non_broadcast);
+    const float32x4x4_t rf = elementwise_conditional_op<op>(reorder ? broadcast_vector : af,
+                                                            reorder ? af : broadcast_vector);
+    store_quantized(output_ptr + x, rf, voffseto, invvscaleo);
+  }
+  return x;
+}
+
+template <ConditionalOperation op, typename ScalarType, typename VectorType>
+void elementwise_conditional_op(const ITensor *in1, const ITensor *in2, ITensor *out,
+                                const Window &window)
+{
+  elementwise_op(in1, in2, out, window, &elementwise_conditional_op_scalar<op, ScalarType>,
+                 &elementwise_conditional_op_broadcast_loop<op, ScalarType, VectorType>,
+                 &elementwise_conditional_op_loop<op, ScalarType, VectorType>);
+}
+
+template <ConditionalOperation op>
+void elementwise_conditional_op_quantized(const ITensor *in1, const ITensor *in2, ITensor *out,
+                                          const Window &window)
+{
+  elementwise_op_quantized(in1, in2, out, window, &elementwise_conditional_op_quantized_scalar<op>,
+                           &elementwise_conditional_op_quantized_broadcast_loop<op>,
+                           &elementwise_conditional_op_quantized_loop<op>);
+}
+} // namespace
+
+NEPReLUKernel::NEPReLUKernel() : _input(nullptr), _alpha(nullptr), _output(nullptr) {}
+
+void NEPReLUKernel::configure(const ITensor *input, const ITensor *alpha, ITensor *output)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, alpha, output);
+  ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(*input->info(), *alpha->info(), *output->info()));
+
+  // Configure kernel window
+  const std::pair<TensorShape, ValidRegion> broadcast_pair =
+      ITensorInfo::broadcast_shape_and_valid_region(*input->info(), *alpha->info());
+  const TensorShape &out_shape = broadcast_pair.first;
+  const ValidRegion &valid_region = broadcast_pair.second;
+
+  // Auto initialize output if not initialized
+  auto_init_if_empty(*output->info(), out_shape, 1, input->info()->data_type());
+
+  Window win = calculate_max_window(valid_region);
+
+  _input = input;
+  _alpha = alpha;
+  _output = output;
+  INEKernel::configure(win);
+}
+
+void NEPReLUKernel::run(const Window &window, const ThreadInfo &info)
+{
+  ARM_COMPUTE_UNUSED(info);
+  ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
+  ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(IKernel::window(), window);
+
+  if (_input->info()->data_type() == DataType::F32)
+  {
+    elementwise_conditional_op<ConditionalOperation::PRELU, float, float32x4_t>(_input, _alpha,
+                                                                                _output, window);
+  }
+  else if (_input->info()->data_type() == DataType::QASYMM8)
+  {
+    elementwise_conditional_op_quantized<ConditionalOperation::PRELU>(_input, _alpha, _output,
+                                                                      window);
+  }
+  else
+  {
+    ARM_COMPUTE_ERROR("Wrong Type");
+  }
+}
+
+Status NEPReLUKernel::validate_arguments(const ITensorInfo &input, const ITensorInfo &alpha,
+                                         const ITensorInfo &output)
+{
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(&input, 1, DataType::QASYMM8, DataType::F32);
+  ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(&input, &alpha, &output);
+
+  const TensorShape out_shape =
+      TensorShape::broadcast_shape(input.tensor_shape(), alpha.tensor_shape());
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(out_shape.total_size() == 0,
+                                  "Inputs are not broadcast compatible");
+
+  // Checks performed when output is configured
+  if (output.total_size() > 0)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON_MSG(
+        detail::have_different_dimensions(out_shape, output.tensor_shape(), 0),
+        "Wrong shape for output");
+  }
+
+  return Status{};
+}
+
+Status NEPReLUKernel::validate(const ITensorInfo *input, const ITensorInfo *alpha,
+                               const ITensorInfo *output)
+{
+  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, alpha, output);
+  ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(*input, *alpha, *output));
+
+  return Status{};
+}
diff --git a/runtimes/libs/ARMComputeEx/src/core/UtilsEx.cpp b/runtimes/libs/ARMComputeEx/src/core/UtilsEx.cpp
new file mode 100644
index 000000000..94242b56b
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/core/UtilsEx.cpp
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_compute/core/UtilsEx.h"
+#include "arm_compute/core/Error.h"
+
+using namespace arm_compute;
+
+const std::pair<unsigned int, unsigned int>
+arm_compute::transposeconv_output_dimensions(unsigned int in_width, unsigned int in_height,
+                                             unsigned int kernel_width, unsigned int kernel_height,
+                                             const PadStrideInfo &info, unsigned int invalid_right,
+                                             unsigned int invalid_bottom)
+{
+  const unsigned int stride_x = info.stride().first;
+  const unsigned int stride_y = info.stride().second;
+  const unsigned int padx = info.pad_left() + info.pad_right();
+  const unsigned int pady = info.pad_top() + info.pad_bottom();
+
+  ARM_COMPUTE_ERROR_ON(in_width < 1 || in_height < 1);
+  ARM_COMPUTE_ERROR_ON(kernel_width <= padx);
+  ARM_COMPUTE_ERROR_ON(kernel_height <= pady);
+
+  // Find the transpose conv out dimensions
+  // transpose conv out:
+  //    tconv_out + pad = 1 + (in - 1) * stride + invalid
+  //    tconv_out = 1 + (in - 1) * stride + invalid - pad
+  const int w = stride_x * (in_width - 1) + kernel_width - padx + invalid_right;
+  const int h = stride_y * (in_height - 1) + kernel_height - pady + invalid_bottom;
+
+  return std::make_pair<unsigned int, unsigned int>(w, h);
+}
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/CL/CLFunctionsEx.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/CLFunctionsEx.cpp
new file mode 100644
index 000000000..158fe0b0c
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/CLFunctionsEx.cpp
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_compute/runtime/CL/CLFunctionsEx.h"
+
+// NOTE This empty file aims to validate "CLFunctionsEx.h".
+//      DO NOT REMOVE this file.
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLArgOperation.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLArgOperation.cpp
new file mode 100644
index 000000000..ae64a6edd
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLArgOperation.cpp
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_compute/runtime/CL/functions/CLArgOperation.h"
+
+#include "arm_compute/core/CL/kernels/CLArgOperationKernel.h"
+#include "arm_compute/runtime/CL/CLScheduler.h"
+
+namespace arm_compute
+{
+
+CLArgOperation::CLArgOperation()
+{
+  // DO NOTHING
+}
+
+void CLArgOperation::configure(ICLTensor *input, ICLTensor *output, std::vector<uint32_t> axis,
+                               ArgOperation op)
+{
+  ARM_COMPUTE_ERROR_THROW_ON(validate(input->info(), axis, output->info(), op));
+  _input = input;
+  _output = output;
+  _axis = axis;
+  _arg_op = op;
+  // NOTE The argminmax_axis must have no duplication.
+  _num_of_kernels = axis.size();
+  const size_t num_of_interm_tensors = _num_of_kernels - 1;
+
+  _interm_tensors = arm_compute::support::cpp14::make_unique<CLTensor[]>(num_of_interm_tensors);
+  _argop_kernels =
+      arm_compute::support::cpp14::make_unique<CLArgOperationKernel[]>(_num_of_kernels);
+
+  TensorShape shape{input->info()->tensor_shape()};
+  for (size_t i = 0; i < num_of_interm_tensors; i++)
+  {
+    shape.set(_axis[i], 1);
+    _interm_tensors[i].allocator()->init(
+        TensorInfo(shape, input->info()->num_channels(), input->info()->data_type())
+            .set_data_layout(input->info()->data_layout()));
+    _interm_tensors[i].allocator()->allocate();
+  }
+
+  // Set a vector that is ordered ICLTensors sequentially.
+  std::vector<ICLTensor *> tensors;
+  tensors.emplace_back(input);
+  for (size_t i = 0; i < num_of_interm_tensors; i++)
+  {
+    tensors.emplace_back(_interm_tensors.get() + i);
+  }
+  tensors.emplace_back(output);
+
+  // Apply ArgMinMax on all kernels
+  for (size_t i = 0; i < _num_of_kernels; i++)
+  {
+    _argop_kernels[i].configure(tensors[i], tensors[i + 1], _axis[i], op);
+  }
+}
+
+Status CLArgOperation::validate(const ITensorInfo *input, const std::vector<uint32_t> &axis,
+                                const ITensorInfo *output, ArgOperation op)
+{
+  const size_t num_of_kernels = axis.size();
+  const size_t num_of_interm_tensors = num_of_kernels - 1;
+
+  // Create temporary tensor infos
+  auto interm_tensors =
+      arm_compute::support::cpp14::make_unique<TensorInfo[]>(num_of_interm_tensors);
+
+  // Create intermediate tensor info
+  TensorShape shape{input->tensor_shape()};
+
+  for (size_t i = 0; i < num_of_interm_tensors; i++)
+  {
+    shape.set(axis[i], 1);
+    interm_tensors[i].set_data_type(input->data_type());
+    interm_tensors[i].set_tensor_shape(shape);
+    interm_tensors[i].set_num_channels(input->num_channels());
+  }
+
+  // Set a vector that is ordered ITensorInfo sequentially.
+  std::vector<const ITensorInfo *> tensors;
+  tensors.emplace_back(input);
+  for (size_t i = 0; i < num_of_interm_tensors; i++)
+  {
+    tensors.emplace_back(interm_tensors.get() + i);
+  }
+  tensors.emplace_back(output);
+
+  // Validate argminmax only on all kernels
+  for (size_t i = 0; i < num_of_kernels; i++)
+  {
+    ARM_COMPUTE_RETURN_ON_ERROR(
+        CLArgOperationKernel::validate(tensors[i], tensors[i + 1], axis[i], op));
+  }
+
+  return Status{};
+}
+
+void CLArgOperation::run()
+{
+  for (size_t i = 0; i < _num_of_kernels; ++i)
+  {
+    CLScheduler::get().enqueue(_argop_kernels[i]);
+  }
+}
+
+} // namespace arm_compute
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLBinaryLogicalOp.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLBinaryLogicalOp.cpp
index 7c5fe5eda..7c5fe5eda 100644
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLBinaryLogicalOp.cpp
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLBinaryLogicalOp.cpp
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLCast.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLCast.cpp
index 8e106737c..8e106737c 100644
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLCast.cpp
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLCast.cpp
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLDepthToSpace.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLDepthToSpace.cpp
index c2e4ca9ff..c2e4ca9ff 100644
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLDepthToSpace.cpp
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLDepthToSpace.cpp
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLEmbeddingLookup.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLEmbeddingLookup.cpp
index 2781784ca..2781784ca 100644
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLEmbeddingLookup.cpp
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLEmbeddingLookup.cpp
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLFullyConnectedReshapingLayer.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLFullyConnectedReshapingLayer.cpp
new file mode 100644
index 000000000..938852e5b
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLFullyConnectedReshapingLayer.cpp
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_compute/runtime/CL/functions/CLFullyConnectedReshapingLayer.h"
+
+using namespace arm_compute;
+
+void CLFullyConnectedReshapingLayer::configure(const arm_compute::ICLTensor *input,
+                                               const arm_compute::ICLTensor *weights,
+                                               const arm_compute::ICLTensor *biases,
+                                               arm_compute::ICLTensor *output, bool needs_reshape,
+                                               const arm_compute::TensorShape &reshape)
+{
+  _input = input;
+  _weights = weights;
+  _biases = biases;
+  _output = output;
+  _needs_reshape = needs_reshape;
+
+  if (_needs_reshape)
+  {
+    // reshape
+    auto_init_if_empty(*_cl_buffer.info(),
+                       _input->info()->clone()->set_tensor_shape(reshape).set_data_layout(
+                           _input->info()->data_layout()));
+    _cl_reshape.configure(_input, &_cl_buffer);
+
+    _cl_fc.configure(&_cl_buffer, _weights, _biases, _output);
+
+    // NOTE _cl_buffer is inaccessible from outside, and thus it is safe to invoke allocate here.
+    _cl_buffer.allocator()->allocate();
+  }
+  else
+  {
+    _cl_fc.configure(_input, _weights, _biases, _output);
+  }
+}
+
+void CLFullyConnectedReshapingLayer::run(void)
+{
+  if (_needs_reshape)
+    _cl_reshape.run();
+
+  _cl_fc.run();
+}
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLGatherEx.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLGatherEx.cpp
new file mode 100644
index 000000000..6cad9bd2e
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLGatherEx.cpp
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2016-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_compute/runtime/CL/functions/CLGatherEx.h"
+
+#include "arm_compute/core/CL/ICLTensor.h"
+#include "arm_compute/core/CL/kernels/CLGatherExKernel.h"
+
+using namespace arm_compute;
+
+void CLGatherEx::configure(const ICLTensor *input, const ICLTensor *indices, ICLTensor *output,
+                           int axis)
+{
+  auto k = arm_compute::support::cpp14::make_unique<CLGatherExKernel>();
+  k->configure(input, indices, output, axis);
+  _kernel = std::move(k);
+}
+
+Status CLGatherEx::validate(const ITensorInfo *input, const ITensorInfo *indices,
+                            const ITensorInfo *output, int axis)
+{
+  return CLGatherExKernel::validate(input, indices, output, axis);
+}
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLHashtableLookup.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLHashtableLookup.cpp
index 7180e9356..7180e9356 100644
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLHashtableLookup.cpp
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLHashtableLookup.cpp
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLNeg.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLNeg.cpp
index be35ea732..be35ea732 100644
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLNeg.cpp
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLNeg.cpp
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLPReLU.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLPReLU.cpp
index 38adedd10..38adedd10 100644
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLPReLU.cpp
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLPReLU.cpp
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLRNNLayerEx.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLRNNLayerEx.cpp
new file mode 100644
index 000000000..2a34c0664
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLRNNLayerEx.cpp
@@ -0,0 +1,147 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/runtime/CL/functions/CLRNNLayerEx.h"
+
+#include "arm_compute/core/Helpers.h"
+#include "arm_compute/core/Types.h"
+#include "arm_compute/core/Utils.h"
+#include "arm_compute/core/utils/misc/ShapeCalculator.h"
+#include "arm_compute/runtime/CL/CLScheduler.h"
+#include "support/ToolchainSupport.h"
+
+#include <utility>
+
+using namespace arm_compute;
+using namespace arm_compute::misc::shape_calculator;
+
+CLRNNLayerEx::CLRNNLayerEx(std::shared_ptr<IMemoryManager> memory_manager)
+    : _memory_group(std::move(memory_manager)), _gemm_state_f(), _add_kernel(),
+      _activation_kernel(), _fully_connected_kernel(), _copy_kernel(), _fully_connected_out(),
+      _gemm_output(), _add_output(), _is_prepared(false)
+{
+}
+
+Status CLRNNLayerEx::validate(const ITensorInfo *input, const ITensorInfo *weights,
+                              const ITensorInfo *recurrent_weights, const ITensorInfo *bias,
+                              const ITensorInfo *hidden_state, const ITensorInfo *output,
+                              const ActivationLayerInfo &info)
+{
+  const int idx_width = 0;
+  const int idx_height = 1;
+  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, weights, recurrent_weights, bias, hidden_state,
+                                      output);
+  ARM_COMPUTE_RETURN_ERROR_ON(input->dimension(idx_width) != weights->dimension(idx_width));
+  ARM_COMPUTE_RETURN_ERROR_ON(weights->dimension(idx_height) !=
+                              recurrent_weights->dimension(idx_width));
+  ARM_COMPUTE_RETURN_ERROR_ON(recurrent_weights->dimension(idx_width) !=
+                              recurrent_weights->dimension(1));
+  ARM_COMPUTE_RETURN_ERROR_ON(bias->num_dimensions() != 1);
+  ARM_COMPUTE_RETURN_ERROR_ON(bias->dimension(idx_width) != weights->dimension(idx_height));
+  ARM_COMPUTE_RETURN_ERROR_ON(hidden_state->dimension(idx_width) != weights->dimension(idx_height));
+  ARM_COMPUTE_RETURN_ERROR_ON(hidden_state->dimension(idx_height) != input->dimension(idx_height));
+  ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DIMENSIONS(output->tensor_shape(),
+                                                     hidden_state->tensor_shape());
+
+  auto shape_info =
+      TensorInfo(compute_rnn_shape(recurrent_weights, hidden_state->dimension(idx_height)), 1,
+                 input->data_type());
+
+  ARM_COMPUTE_RETURN_ON_ERROR(CLFullyConnectedLayer::validate(input, weights, bias, &shape_info));
+  ARM_COMPUTE_RETURN_ON_ERROR(
+      CLGEMM::validate(hidden_state, recurrent_weights, nullptr, &shape_info, 1.f, 0.f));
+  ARM_COMPUTE_RETURN_ON_ERROR(CLSaturatedArithmeticOperationKernel::validate(
+      ArithmeticOperation::ADD, &shape_info, &shape_info, &shape_info, ConvertPolicy::SATURATE));
+  ARM_COMPUTE_RETURN_ON_ERROR(CLActivationLayerKernel::validate(&shape_info, &shape_info, info));
+
+  return Status{};
+}
+
+void CLRNNLayerEx::configure(const ICLTensor *input, const ICLTensor *weights,
+                             const ICLTensor *recurrent_weights, const ICLTensor *bias,
+                             ICLTensor *hidden_state, ICLTensor *output, ActivationLayerInfo &info)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, weights, recurrent_weights, bias, hidden_state, output);
+  ARM_COMPUTE_ERROR_THROW_ON(CLRNNLayerEx::validate(input->info(), weights->info(),
+                                                    recurrent_weights->info(), bias->info(),
+                                                    hidden_state->info(), output->info(), info));
+
+  const int idx_height = 1;
+  TensorShape shape =
+      compute_rnn_shape(recurrent_weights->info(), hidden_state->info()->dimension(idx_height));
+
+  _is_prepared = false;
+
+  _fully_connected_out.allocator()->init(TensorInfo(shape, 1, input->info()->data_type()));
+  _gemm_output.allocator()->init(TensorInfo(shape, 1, input->info()->data_type()));
+
+  // Manage intermediate buffers and configure
+  _memory_group.manage(&_fully_connected_out);
+  _fully_connected_kernel.configure(input, weights, bias, &_fully_connected_out);
+
+  _memory_group.manage(&_gemm_output);
+  _gemm_state_f.configure(hidden_state, recurrent_weights, nullptr, &_gemm_output, 1.f, 0.f);
+
+  _add_output.allocator()->init(TensorInfo(shape, 1, input->info()->data_type()));
+  _memory_group.manage(&_add_output);
+
+  _add_kernel.configure(ArithmeticOperation::ADD, &_fully_connected_out, &_gemm_output,
+                        &_add_output, ConvertPolicy::SATURATE);
+
+  _fully_connected_out.allocator()->allocate();
+  _gemm_output.allocator()->allocate();
+
+  _activation_kernel.configure(&_add_output, hidden_state, info);
+  _add_output.allocator()->allocate();
+
+  _copy_kernel.configure(hidden_state, output);
+}
+
+void CLRNNLayerEx::run()
+{
+  prepare();
+
+  _memory_group.acquire();
+
+  _fully_connected_kernel.run();
+  _gemm_state_f.run();
+  CLScheduler::get().enqueue(_add_kernel);
+  CLScheduler::get().enqueue(_activation_kernel);
+
+  // copy hidden out to output
+  CLScheduler::get().enqueue(_copy_kernel);
+
+  _memory_group.release();
+}
+
+void CLRNNLayerEx::prepare()
+{
+  if (!_is_prepared)
+  {
+    _fully_connected_kernel.prepare();
+    _gemm_state_f.prepare();
+
+    _is_prepared = true;
+  }
+}
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLReduceOperation.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLReduceOperation.cpp
new file mode 100644
index 000000000..1727ec66b
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLReduceOperation.cpp
@@ -0,0 +1,125 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_compute/runtime/CL/functions/CLReduceOperation.h"
+
+#include "arm_compute/core/CL/kernels/CLReduceOperationKernel.h"
+#include "arm_compute/runtime/CL/CLScheduler.h"
+
+using namespace arm_compute;
+
+CLReduceOperation::CLReduceOperation()
+    : _input(nullptr), _output(nullptr), _axis(), _interm_tensors(), _reduce_kernels()
+{
+}
+
+Status CLReduceOperation::validate(const ITensorInfo *input, const ITensorInfo *output,
+                                   const std::set<uint32_t> &axis, const ReduceOperation &op)
+{
+  const size_t num_of_kernels = axis.size();
+  const size_t num_of_interm_tensors = num_of_kernels - 1;
+
+  // Create temporary tensor infos
+  auto interm_tensors =
+      arm_compute::support::cpp14::make_unique<TensorInfo[]>(num_of_interm_tensors);
+
+  // Create intermediate tensor info
+  TensorShape shape{input->tensor_shape()};
+
+  auto it = axis.begin();
+  for (size_t i = 0; i < num_of_interm_tensors; ++i, ++it)
+  {
+    shape.set(*it, 1);
+    interm_tensors[i].set_data_type(input->data_type());
+    interm_tensors[i].set_tensor_shape(shape);
+    interm_tensors[i].set_num_channels(input->num_channels());
+    interm_tensors[i].set_data_layout(input->data_layout());
+  }
+
+  // Set a vector that is ordered ITensorInfo sequentially.
+  std::vector<const ITensorInfo *> tensors;
+  tensors.emplace_back(input);
+  for (size_t i = 0; i < num_of_interm_tensors; ++i)
+  {
+    tensors.emplace_back(interm_tensors.get() + i);
+  }
+  tensors.emplace_back(output);
+
+  // Validate ReduceOperation only on all kernels
+  it = axis.begin();
+  for (size_t i = 0; i < num_of_kernels; ++i, ++it)
+  {
+    ARM_COMPUTE_RETURN_ON_ERROR(
+        CLReduceOperationKernel::validate(tensors[i], tensors[i + 1], *it, op));
+  }
+
+  return Status{};
+}
+
+void CLReduceOperation::configure(ICLTensor *input, ICLTensor *output,
+                                  const std::set<uint32_t> &axis, ReduceOperation op)
+{
+  ARM_COMPUTE_ERROR_THROW_ON(validate(input->info(), output->info(), axis, op));
+
+  _axis = axis;
+
+  _input = input;
+  _output = output;
+
+  // NOTE The axis must have no duplication.
+  const size_t num_of_kernels = axis.size();
+  const size_t num_of_interm_tensors = num_of_kernels - 1;
+
+  _interm_tensors = arm_compute::support::cpp14::make_unique<CLTensor[]>(num_of_interm_tensors);
+  _reduce_kernels =
+      arm_compute::support::cpp14::make_unique<CLReduceOperationKernel[]>(num_of_kernels);
+
+  TensorShape shape{input->info()->tensor_shape()};
+  auto it = axis.begin();
+  for (size_t i = 0; i < num_of_interm_tensors; ++i, ++it)
+  {
+    shape.set(*it, 1);
+    _interm_tensors[i].allocator()->init(
+        TensorInfo(shape, input->info()->num_channels(), input->info()->data_type())
+            .set_data_layout(input->info()->data_layout()));
+    _interm_tensors[i].allocator()->allocate();
+  }
+
+  // Set a vector that is ordered ICLTensors sequentially.
+  std::vector<ICLTensor *> tensors;
+  tensors.emplace_back(input);
+  for (size_t i = 0; i < num_of_interm_tensors; ++i)
+  {
+    tensors.emplace_back(_interm_tensors.get() + i);
+  }
+  tensors.emplace_back(output);
+
+  // Apply ReduceOperation on all kernels
+  it = axis.begin();
+  for (size_t i = 0; i < num_of_kernels; ++i, ++it)
+  {
+    _reduce_kernels[i].configure(tensors[i], tensors[i + 1], *it, op);
+  }
+}
+
+void CLReduceOperation::run()
+{
+  const size_t num_of_kernels = _axis.size();
+  for (size_t i = 0; i < num_of_kernels; ++i)
+  {
+    CLScheduler::get().enqueue(_reduce_kernels[i]);
+  }
+}
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLSpaceToBatchND.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLSpaceToBatchND.cpp
index c03826891..c03826891 100644
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLSpaceToBatchND.cpp
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLSpaceToBatchND.cpp
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLSpaceToDepth.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLSpaceToDepth.cpp
index 0f455f96f..0f455f96f 100644
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLSpaceToDepth.cpp
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLSpaceToDepth.cpp
diff --git a/libs/ARMComputeEx/src/runtime/CL/functions/CLTopKV2.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLTopKV2.cpp
index 19177497c..19177497c 100644
--- a/libs/ARMComputeEx/src/runtime/CL/functions/CLTopKV2.cpp
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLTopKV2.cpp
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLTransposeConvLayer.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLTransposeConvLayer.cpp
new file mode 100644
index 000000000..40e21671d
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLTransposeConvLayer.cpp
@@ -0,0 +1,238 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017-2018 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/runtime/CL/functions/CLTransposeConvLayer.h"
+#include "arm_compute/core/utils/misc/ShapeCalculatorEx.h"
+
+#include "arm_compute/core/Helpers.h"
+#include "arm_compute/core/Utils.h"
+#include "arm_compute/core/UtilsEx.h"
+#include "arm_compute/core/Validate.h"
+#include "arm_compute/core/utils/misc/ShapeCalculator.h"
+#include "arm_compute/runtime/CL/CLScheduler.h"
+#include "arm_compute/runtime/CPP/CPPScheduler.h"
+
+#include <memory>
+#include <tuple>
+
+using namespace arm_compute;
+using namespace arm_compute::misc::shape_calculator;
+
+CLTransposeConvLayer::CLTransposeConvLayer(std::shared_ptr<IMemoryManager> memory_manager) // NOLINT
+    : _memory_group(std::move(memory_manager)),
+      _scale_f(),
+      _conv_f(),
+      _flip_weights(),
+      _scaled_output(),
+      _original_weights(nullptr),
+      _weights_flipped(),
+      _is_prepared(false)
+{
+}
+
+Status CLTransposeConvLayer::validate(const ITensorInfo *input, const ITensorInfo *weights,
+                                      const ITensorInfo *bias, ITensorInfo *output,
+                                      const PadStrideInfo &info, unsigned int invalid_right,
+                                      unsigned int invalid_bottom, const WeightsInfo &weights_info)
+{
+  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, weights, output);
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::QASYMM8, DataType::F16,
+                                                       DataType::F32);
+  ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_LAYOUT(input, weights);
+
+  const DataLayout data_layout = input->data_layout();
+
+  const size_t idx_w = get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH);
+  const size_t idx_h = get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT);
+  const size_t idx_c = get_data_layout_dimension_index(data_layout, DataLayoutDimension::CHANNEL);
+
+  ARM_COMPUTE_RETURN_ERROR_ON(weights->dimension(idx_w) != weights->dimension(idx_h));
+  ARM_COMPUTE_RETURN_ERROR_ON(weights->dimension(idx_w) < 1);
+
+  const unsigned int kernel_x = weights->dimension(idx_w);
+  const unsigned int kernel_y = weights->dimension(idx_h);
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(invalid_right > kernel_x - 1,
+                                  "invalid_right must be smaller than kernel_x");
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(invalid_bottom > kernel_y - 1,
+                                  "inner_border_top must be smaller than kernel_y");
+
+  // NOTE From the existing CLDeconvolutionLayer, invalid_right and invalid_bottom were added.
+  auto out_dims = transposeconv_output_dimensions(
+      input->dimension(idx_w), input->dimension(idx_h), weights->dimension(idx_w),
+      weights->dimension(idx_h), info, invalid_right, invalid_bottom);
+
+  const TensorShape output_shape = compute_transposeconv_output_shape(out_dims, *input, *weights);
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, output, weights);
+
+  if (bias != nullptr)
+  {
+    if (is_data_type_quantized_asymmetric(input->data_type()))
+    {
+      ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(bias, 1, DataType::S32);
+    }
+    else
+    {
+      ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, bias);
+    }
+    ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_LAYOUT(input, bias);
+  }
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(output->dimension(idx_w) != output_shape[idx_w],
+                                  "Output's width is invalid.");
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(output->dimension(idx_h) != output_shape[idx_h],
+                                  "Output's height is invalid.");
+  ARM_COMPUTE_RETURN_ERROR_ON_MSG(output->dimension(idx_c) != output_shape[idx_c],
+                                  "Output's depth is invalid.");
+
+  unsigned int pad_left = 0;
+  unsigned int pad_right = 0;
+  unsigned int pad_top = 0;
+  unsigned int pad_bottom = 0;
+  const TensorShape scale_out_shape = compute_transposeconv_upsampled_shape(
+      *input, *weights, info, out_dims, invalid_right, invalid_bottom, pad_left, pad_right, pad_top,
+      pad_bottom);
+  TensorInfo scale_out_info(input->clone()
+                                ->set_is_resizable(true)
+                                .reset_padding()
+                                .set_tensor_shape(scale_out_shape)
+                                .set_data_layout(data_layout));
+  const PadStrideInfo conv_info(1, 1, 0, 0, 0, 0, DimensionRoundingType::CEIL);
+
+  ARM_COMPUTE_RETURN_ON_ERROR(
+      CLTransposeConvLayerUpsample::validate(input, &scale_out_info, BorderSize(0, 0), info));
+  ARM_COMPUTE_RETURN_ON_ERROR(CLConvolutionLayer::validate(&scale_out_info, weights, bias, output,
+                                                           conv_info, weights_info));
+
+  return Status{};
+}
+
+void CLTransposeConvLayer::configure(ICLTensor *input, ICLTensor *weights, const ICLTensor *bias,
+                                     ICLTensor *output, const PadStrideInfo &info,
+                                     unsigned int invalid_right, unsigned int invalid_bottom,
+                                     const WeightsInfo &weights_info)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, weights, output);
+
+  const unsigned int stride_x = info.stride().first;
+  const unsigned int stride_y = info.stride().second;
+
+  const DataLayout data_layout = input->info()->data_layout();
+
+  const size_t idx_w = get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH);
+  const size_t idx_h = get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT);
+
+  _original_weights = weights;
+  _weights_flipped.allocator()->init(weights->info()->clone()->set_data_layout(data_layout));
+  _flip_weights.configure(weights, &_weights_flipped);
+
+  // NOTE From the existing CLDeconvolutionLayer, invalid_right and invalid_bottom were
+  // added.
+  auto out_dims = transposeconv_output_dimensions(
+      input->info()->dimension(idx_w), input->info()->dimension(idx_h),
+      weights->info()->dimension(idx_w), weights->info()->dimension(idx_h), info, invalid_right,
+      invalid_bottom);
+
+  const TensorShape output_shape =
+      compute_transposeconv_output_shape(out_dims, *input->info(), *weights->info());
+
+  // Output auto initialization if not yet initialized
+  auto_init_if_empty(
+      *output->info(),
+      input->info()->clone()->set_tensor_shape(output_shape).set_data_layout(data_layout));
+
+  // Perform validation step
+  ARM_COMPUTE_ERROR_THROW_ON(CLTransposeConvLayer::validate(
+      input->info(), weights->info(), bias == nullptr ? nullptr : bias->info(), output->info(),
+      info, invalid_right, invalid_bottom));
+
+  _is_prepared = weights_info.retain_internal_weights();
+
+  _memory_group.manage(&_scaled_output);
+
+  // Find the upsampled dimensions and the padding needed for the convolution with stride 1 in order
+  // to match output shape
+  unsigned int pad_left = 0;
+  unsigned int pad_right = 0;
+  unsigned int pad_top = 0;
+  unsigned int pad_bottom = 0;
+  const TensorShape scale_out_shape = compute_transposeconv_upsampled_shape(
+      *input->info(), *weights->info(), info, out_dims, invalid_right, invalid_bottom, pad_left,
+      pad_right, pad_top, pad_bottom);
+
+  TensorInfo scale_out_info(scale_out_shape, 1, input->info()->data_type(),
+                            input->info()->quantization_info());
+  scale_out_info.set_data_layout(data_layout);
+  _scaled_output.allocator()->init(scale_out_info);
+
+  // configure scale function
+  const PadStrideInfo upsample_info(stride_x, stride_y, pad_left, pad_right, pad_top, pad_bottom,
+                                    DimensionRoundingType::FLOOR);
+  _scale_f.configure(input, &_scaled_output, BorderSize(0, 0), upsample_info);
+
+  // setup the function to convolve the upscaled output
+  const PadStrideInfo conv_info(1, 1, 0, 0, 0, 0, DimensionRoundingType::CEIL);
+  _conv_f.configure(&_scaled_output, &_weights_flipped, bias, output, conv_info, weights_info);
+  _scaled_output.allocator()->allocate();
+}
+
+void CLTransposeConvLayer::run()
+{
+  prepare();
+
+  _memory_group.acquire();
+
+  _scale_f.run();
+  _conv_f.run();
+
+  _memory_group.release();
+}
+
+void CLTransposeConvLayer::prepare()
+{
+  if (!_is_prepared)
+  {
+    ARM_COMPUTE_ERROR_ON(!_original_weights->is_used());
+
+    // Run weights flipping and mark original weights tensor as unused
+    _weights_flipped.allocator()->allocate();
+    _weights_flipped.map(true);
+    _original_weights->map(CLScheduler::get().queue(), true);
+    CPPScheduler::get().schedule(&_flip_weights, Window::DimZ);
+    _weights_flipped.unmap();
+    _original_weights->unmap(CLScheduler::get().queue());
+    _original_weights->mark_as_unused();
+
+    // Prepare convolution
+    _conv_f.prepare();
+
+    if (!_weights_flipped.is_used())
+    {
+      _weights_flipped.allocator()->free();
+    }
+
+    _is_prepared = true;
+  }
+}
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLTransposeConvLayerUpsample.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLTransposeConvLayerUpsample.cpp
new file mode 100644
index 000000000..0ce3e6700
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CL/functions/CLTransposeConvLayerUpsample.cpp
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017-2018 ARM Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "arm_compute/runtime/CL/functions/CLTransposeConvLayerUpsample.h"
+
+#include "arm_compute/core/CL/OpenCL.h"
+#include "arm_compute/core/Utils.h"
+#include "arm_compute/runtime/CL/CLScheduler.h"
+
+#include <cmath>
+#include <memory>
+#include <tuple>
+
+using namespace arm_compute;
+
+CLTransposeConvLayerUpsample::CLTransposeConvLayerUpsample() // NOLINT
+    : _upsample(),
+      _output(nullptr)
+{
+}
+
+Status CLTransposeConvLayerUpsample::validate(const ITensorInfo *input, const ITensorInfo *output,
+                                              const BorderSize &inner_border,
+                                              const PadStrideInfo &info)
+{
+  return CLTransposeConvLayerUpsampleKernel::validate(input, output, inner_border, info);
+}
+
+void CLTransposeConvLayerUpsample::configure(ICLTensor *input, ICLTensor *output,
+                                             const BorderSize &inner_border,
+                                             const PadStrideInfo &info)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, output);
+
+  _output = output;
+  _upsample.configure(input, _output, inner_border, info);
+}
+
+void CLTransposeConvLayerUpsample::run()
+{
+  _output->map(CLScheduler::get().queue(), true);
+  if (is_data_type_quantized_asymmetric(_output->info()->data_type()))
+  {
+    const uint8_t quantized_zero = _output->info()->quantization_info().offset;
+    std::fill_n(_output->buffer(), _output->info()->total_size(), quantized_zero);
+  }
+  else
+  {
+    memset(_output->buffer(), 0, _output->info()->total_size());
+  }
+  _output->unmap(CLScheduler::get().queue());
+
+  CLScheduler::get().enqueue(_upsample, false);
+}
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/CPP/functions/CPPUpsampleEx.cpp b/runtimes/libs/ARMComputeEx/src/runtime/CPP/functions/CPPUpsampleEx.cpp
new file mode 100644
index 000000000..f8e0ef8a6
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/CPP/functions/CPPUpsampleEx.cpp
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/runtime/CPP/functions/CPPUpsampleEx.h"
+
+#include "arm_compute/core/CPP/kernels/CPPUpsampleKernelEx.h"
+#include "support/ToolchainSupport.h"
+
+using namespace arm_compute;
+
+void CPPUpsampleEx::configure(const ITensor *input, ITensor *output, const PadStrideInfo &info)
+{
+  auto k = arm_compute::support::cpp14::make_unique<CPPUpsampleKernelEx>();
+  k->configure(input, output, info);
+  _kernel = std::move(k);
+}
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/NEON/NEFunctionsEx.cpp b/runtimes/libs/ARMComputeEx/src/runtime/NEON/NEFunctionsEx.cpp
new file mode 100644
index 000000000..80fbf359d
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/NEON/NEFunctionsEx.cpp
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_compute/runtime/NEON/NEFunctionsEx.h"
+
+// NOTE This empty file aims to validate "NEFunctionsEx.h".
+//      DO NOT REMOVE this file.
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEArgMinMax.cpp b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEArgMinMax.cpp
new file mode 100644
index 000000000..5ba465b61
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEArgMinMax.cpp
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/runtime/NEON/functions/NEArgMinMax.h"
+
+#include "arm_compute/core/CPP/Validate.h"
+#include "arm_compute/core/Helpers.h"
+#include "arm_compute/runtime/NEON/NEScheduler.h"
+
+namespace arm_compute
+{
+
+template <ReductionOperation OP>
+NEArgMinMaxStatic<OP>::NEArgMinMaxStatic(std::shared_ptr<IMemoryManager> memory_manager)
+    : _memory_group(std::move(memory_manager)), _reduction_kernel(), _reduced_out(), _reshape()
+{
+}
+
+template <ReductionOperation OP>
+Status NEArgMinMaxStatic<OP>::validate(const ITensorInfo *input, int axis,
+                                       const ITensorInfo *output)
+{
+  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input);
+  ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(input);
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::QASYMM8, DataType::F16,
+                                                       DataType::F32);
+
+  TensorShape out_shape = input->tensor_shape();
+  const int input_dims = input->num_dimensions();
+  int axis_local = axis;
+
+  // Convert negative axis
+  axis_local = wrap_around(axis_local, input_dims);
+
+  ARM_COMPUTE_RETURN_ERROR_ON(axis_local > 3);
+  ARM_COMPUTE_RETURN_ERROR_ON(static_cast<unsigned int>(axis_local) > input->num_dimensions() - 1);
+  out_shape.remove_dimension(axis_local);
+
+  const TensorInfo out_info = output->clone()->set_tensor_shape(out_shape);
+  ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_SHAPES(output, &out_info);
+
+  return Status{};
+}
+
+template <ReductionOperation OP>
+void NEArgMinMaxStatic<OP>::configure(ITensor *input, int axis, ITensor *output)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input);
+
+  int axis_local = axis;
+  const int input_dims = input->info()->num_dimensions();
+
+  // Convert negative axis
+  axis_local = wrap_around(axis_local, input_dims);
+
+  // Perform reduction for axis
+  TensorShape intermediate_shape = input->info()->tensor_shape();
+  intermediate_shape.set(axis_local, 1);
+  auto in = input;
+
+  _reduced_out.allocator()->init(TensorInfo(intermediate_shape, output->info()->num_channels(),
+                                            output->info()->data_type(),
+                                            output->info()->quantization_info()));
+  _memory_group.manage(&_reduced_out);
+  _reduction_kernel.configure(in, axis_local, &_reduced_out, OP);
+
+  // Allocate intermediate tensor
+  _reduced_out.allocator()->allocate();
+
+  // Configure reshape layer if we want to drop the dimensions
+  TensorShape out_shape = input->info()->tensor_shape();
+  out_shape.remove_dimension(axis_local);
+  auto_init_if_empty(*output->info(), output->info()->clone()->set_tensor_shape(out_shape));
+  _reshape.configure(&_reduced_out, output);
+}
+
+template <ReductionOperation OP> void NEArgMinMaxStatic<OP>::run()
+{
+  MemoryGroupResourceScope scope_mg(_memory_group);
+
+  _reduction_kernel.run();
+  _reshape.run();
+}
+
+// Supported Specializations
+template class NEArgMinMaxStatic<ReductionOperation::ARG_IDX_MAX>;
+template class NEArgMinMaxStatic<ReductionOperation::ARG_IDX_MIN>;
+} // namespace arm_compute
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEBinaryLogicalOperation.cpp b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEBinaryLogicalOperation.cpp
new file mode 100644
index 000000000..7c15fc453
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEBinaryLogicalOperation.cpp
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/runtime/NEON/functions/NEBinaryLogicalOperation.h"
+#include <arm_compute/core/NEON/kernels/NEBinaryLogicalOperationKernel.h>
+
+#include "arm_compute/core/ITensor.h"
+#include "support/ToolchainSupport.h"
+
+#include <utility>
+
+namespace arm_compute
+{
+
+template <BinaryLogicalOperation COP>
+void NEBinaryLogicalOperationStatic<COP>::configure(ITensor *input1, ITensor *input2,
+                                                    ITensor *output)
+{
+  auto k = arm_compute::support::cpp14::make_unique<NEBinaryLogicalOperationKernel>();
+  k->configure(COP, input1, input2, output);
+  _kernel = std::move(k);
+}
+
+template <BinaryLogicalOperation COP>
+Status NEBinaryLogicalOperationStatic<COP>::validate(const ITensorInfo *input1,
+                                                     const ITensorInfo *input2,
+                                                     const ITensorInfo *output)
+{
+  return NEBinaryLogicalOperationKernel::validate(COP, input1, input2, output);
+}
+
+void NEBinaryLogicalOperation::configure(ITensor *input1, ITensor *input2, ITensor *output,
+                                         BinaryLogicalOperation op)
+{
+  auto k = arm_compute::support::cpp14::make_unique<NEBinaryLogicalOperationKernel>();
+  k->configure(op, input1, input2, output);
+  _kernel = std::move(k);
+}
+
+Status NEBinaryLogicalOperation::validate(const ITensorInfo *input1, const ITensorInfo *input2,
+                                          const ITensorInfo *output, BinaryLogicalOperation op)
+{
+  return NEBinaryLogicalOperationKernel::validate(op, input1, input2, output);
+}
+
+// Supported Specializations
+template class NEBinaryLogicalOperationStatic<BinaryLogicalOperation::AND>;
+template class NEBinaryLogicalOperationStatic<BinaryLogicalOperation::OR>;
+} // namespace arm_compute
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEElementwiseUnaryLayerEx.cpp b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEElementwiseUnaryLayerEx.cpp
new file mode 100644
index 000000000..a95018a28
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEElementwiseUnaryLayerEx.cpp
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/runtime/NEON/functions/NEElementwiseUnaryLayerEx.h"
+
+#include "arm_compute/core/NEON/kernels/NEElementwiseUnaryKernelEx.h"
+#include "support/ToolchainSupport.h"
+
+#include <utility>
+
+namespace arm_compute
+{
+void NENegLayer::configure(const ITensor *input, ITensor *output)
+{
+  auto k = arm_compute::support::cpp14::make_unique<NEElementwiseUnaryKernelEx>();
+  k->configure(ElementWiseUnaryEx::NEG, input, output);
+  _kernel = std::move(k);
+}
+Status NENegLayer::validate(const ITensorInfo *input, const ITensorInfo *output)
+{
+  return NEElementwiseUnaryKernelEx::validate(ElementWiseUnaryEx::NEG, input, output);
+}
+} // namespace arm_compute
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEFullyConnectedReshapingLayer.cpp b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEFullyConnectedReshapingLayer.cpp
new file mode 100644
index 000000000..6649aa6e9
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEFullyConnectedReshapingLayer.cpp
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_compute/runtime/NEON/functions/NEFullyConnectedReshapingLayer.h"
+
+using namespace arm_compute;
+
+void NEFullyConnectedReshapingLayer::configure(const arm_compute::ITensor *input,
+                                               const arm_compute::ITensor *weights,
+                                               const arm_compute::ITensor *biases,
+                                               arm_compute::ITensor *output, bool needs_reshape,
+                                               const arm_compute::TensorShape &reshape)
+{
+  _input = input;
+  _weights = weights;
+  _biases = biases;
+  _output = output;
+  _needs_reshape = needs_reshape;
+
+  if (_needs_reshape)
+  {
+    // reshape
+    auto_init_if_empty(*_neon_buffer.info(), _input->info()->clone()->set_tensor_shape(reshape));
+    _neon_reshape.configure(_input, &_neon_buffer);
+
+    _neon_fc.configure(&_neon_buffer, _weights, _biases, _output);
+
+    // NOTE _neon_buffer is inaccessible from outside, and thus it is safe to invoke allocate here.
+    _neon_buffer.allocator()->allocate();
+  }
+  else
+  {
+    _neon_fc.configure(_input, _weights, _biases, _output);
+  }
+}
+
+void NEFullyConnectedReshapingLayer::run(void)
+{
+  if (_needs_reshape)
+    _neon_reshape.run();
+
+  _neon_fc.run();
+}
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEPReLU.cpp b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEPReLU.cpp
new file mode 100644
index 000000000..1150cef76
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEPReLU.cpp
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/runtime/NEON/functions/NEPReLU.h"
+
+#include "arm_compute/core/NEON/kernels/NEPReLUKernel.h"
+#include "support/ToolchainSupport.h"
+
+#include <utility>
+
+using namespace arm_compute;
+
+void NEPReLU::configure(const ITensor *input, const ITensor *alpha, ITensor *output)
+{
+  auto k = arm_compute::support::cpp14::make_unique<NEPReLUKernel>();
+  k->configure(input, alpha, output);
+  _kernel = std::move(k);
+}
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NERNNLayerEx.cpp b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NERNNLayerEx.cpp
new file mode 100644
index 000000000..84411c266
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NERNNLayerEx.cpp
@@ -0,0 +1,146 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include "arm_compute/runtime/NEON/functions/NERNNLayerEx.h"
+
+#include "arm_compute/core/Error.h"
+#include "arm_compute/core/TensorInfo.h"
+#include "arm_compute/core/Types.h"
+#include "arm_compute/core/Validate.h"
+#include "arm_compute/core/utils/misc/ShapeCalculator.h"
+#include "arm_compute/runtime/NEON/NEScheduler.h"
+
+namespace arm_compute
+{
+NERNNLayerEx::NERNNLayerEx(std::shared_ptr<IMemoryManager> memory_manager)
+    : _memory_group(std::move(memory_manager)), _gemm_state_f(), _add_kernel(),
+      _activation_kernel(), _fully_connected_kernel(), _copy_kernel(), _fully_connected_out(),
+      _gemm_output(), _add_output(), _is_prepared(false)
+{
+}
+
+Status NERNNLayerEx::validate(const ITensorInfo *input, const ITensorInfo *weights,
+                              const ITensorInfo *recurrent_weights, const ITensorInfo *bias,
+                              const ITensorInfo *hidden_state, const ITensorInfo *output,
+                              const ActivationLayerInfo &info)
+{
+  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, weights, recurrent_weights, bias, hidden_state,
+                                      output);
+
+  const int idx_width = 0;
+  const int idx_height = 1;
+  ARM_COMPUTE_RETURN_ERROR_ON(input->dimension(idx_width) != weights->dimension(idx_width));
+  ARM_COMPUTE_RETURN_ERROR_ON(weights->dimension(idx_height) !=
+                              recurrent_weights->dimension(idx_width));
+  ARM_COMPUTE_RETURN_ERROR_ON(recurrent_weights->dimension(idx_width) !=
+                              recurrent_weights->dimension(idx_height));
+  ARM_COMPUTE_RETURN_ERROR_ON(bias->num_dimensions() != 1);
+  ARM_COMPUTE_RETURN_ERROR_ON(bias->dimension(idx_width) != weights->dimension(idx_height));
+  ARM_COMPUTE_RETURN_ERROR_ON(hidden_state->dimension(idx_width) != weights->dimension(idx_height));
+  ARM_COMPUTE_RETURN_ERROR_ON(hidden_state->dimension(idx_height) != input->dimension(idx_height));
+  ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DIMENSIONS(output->tensor_shape(),
+                                                     hidden_state->tensor_shape());
+
+  auto shape_info = TensorInfo(misc::shape_calculator::compute_rnn_shape(
+                                   recurrent_weights, hidden_state->dimension(idx_height)),
+                               1, input->data_type());
+
+  ARM_COMPUTE_RETURN_ON_ERROR(NEFullyConnectedLayer::validate(input, weights, bias, &shape_info));
+  ARM_COMPUTE_RETURN_ON_ERROR(NEArithmeticAdditionKernel::validate(
+      &shape_info, &shape_info, &shape_info, ConvertPolicy::SATURATE));
+  ARM_COMPUTE_RETURN_ON_ERROR(NEActivationLayerKernel::validate(&shape_info, &shape_info, info));
+
+  return Status{};
+}
+
+void NERNNLayerEx::configure(const ITensor *input, const ITensor *weights,
+                             const ITensor *recurrent_weights, const ITensor *bias,
+                             ITensor *hidden_state, ITensor *output, ActivationLayerInfo &info)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, weights, recurrent_weights, bias, hidden_state, output);
+  ARM_COMPUTE_ERROR_THROW_ON(NERNNLayerEx::validate(input->info(), weights->info(),
+                                                    recurrent_weights->info(), bias->info(),
+                                                    hidden_state->info(), output->info(), info));
+
+  const int idx_height = 1;
+  TensorShape shape = misc::shape_calculator::compute_rnn_shape(
+      recurrent_weights->info(), hidden_state->info()->dimension(idx_height));
+
+  _is_prepared = false;
+
+  // Manage intermediate buffers and configure
+  _fully_connected_out.allocator()->init(TensorInfo(shape, 1, input->info()->data_type()));
+  _gemm_output.allocator()->init(TensorInfo(shape, 1, input->info()->data_type()));
+
+  // Manage intermediate buffers and configure
+  _memory_group.manage(&_fully_connected_out);
+  _fully_connected_kernel.configure(input, weights, bias, &_fully_connected_out);
+
+  _memory_group.manage(&_gemm_output);
+  _gemm_state_f.configure(hidden_state, recurrent_weights, nullptr, &_gemm_output, 1.f, 0.f);
+
+  _add_output.allocator()->init(TensorInfo(shape, 1, input->info()->data_type()));
+  _memory_group.manage(&_add_output);
+
+  _add_kernel.configure(&_fully_connected_out, &_gemm_output, &_add_output,
+                        ConvertPolicy::SATURATE);
+
+  _fully_connected_out.allocator()->allocate();
+  _gemm_output.allocator()->allocate();
+
+  _activation_kernel.configure(&_add_output, hidden_state, info);
+  _add_output.allocator()->allocate();
+
+  _copy_kernel.configure(hidden_state, output);
+}
+
+void NERNNLayerEx::run()
+{
+  prepare();
+
+  MemoryGroupResourceScope scope_mg(_memory_group);
+
+  _fully_connected_kernel.run();
+
+  _gemm_state_f.run();
+
+  NEScheduler::get().schedule(&_add_kernel, Window::DimY);
+  NEScheduler::get().schedule(&_activation_kernel, Window::DimY);
+
+  // copy hidden out to output
+  NEScheduler::get().schedule(&_copy_kernel, Window::DimY);
+}
+
+void NERNNLayerEx::prepare()
+{
+  if (!_is_prepared)
+  {
+    _fully_connected_kernel.prepare();
+    _gemm_state_f.prepare();
+
+    _is_prepared = true;
+  }
+}
+} // namespace arm_compute
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEReduceMeanEx.cpp b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEReduceMeanEx.cpp
new file mode 100644
index 000000000..c65e93570
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEReduceMeanEx.cpp
@@ -0,0 +1,164 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/runtime/NEON/functions/NEReduceMeanEx.h"
+
+#include "arm_compute/core/Helpers.h"
+#include "arm_compute/runtime/NEON/NEScheduler.h"
+
+using namespace arm_compute;
+
+NEReduceMeanEx::NEReduceMeanEx(std::shared_ptr<IMemoryManager> memory_manager)
+    : _memory_group(std::move(memory_manager)), _reduction_kernels(), _reduced_outs(), _reshape(),
+      _reduction_ops(), _keep_dims()
+{
+}
+
+Status NEReduceMeanEx::validate(const ITensorInfo *input, const Coordinates &reduction_axis,
+                                bool keep_dims, const ITensorInfo *output)
+{
+  ARM_COMPUTE_UNUSED(keep_dims);
+  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input);
+  ARM_COMPUTE_RETURN_ERROR_ON(reduction_axis.num_dimensions() > input->num_dimensions());
+
+  TensorShape out_shape = input->tensor_shape();
+  const unsigned int reduction_ops = reduction_axis.num_dimensions();
+  const int input_dims = input->num_dimensions();
+  Coordinates axis_local = reduction_axis;
+
+  // Convert negative axis
+  for (unsigned int i = 0; i < reduction_ops; ++i)
+  {
+    axis_local[i] = wrap_around(axis_local[i], input_dims);
+  }
+
+  std::sort(axis_local.begin(), axis_local.begin() + reduction_ops);
+  for (unsigned int i = 0; i < reduction_ops; ++i)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON(axis_local[i] > 3);
+    ARM_COMPUTE_RETURN_ERROR_ON(static_cast<unsigned int>(axis_local[i]) >
+                                input->num_dimensions() - 1);
+    if (output->total_size() > 0 && keep_dims)
+    {
+      ARM_COMPUTE_RETURN_ERROR_ON(output->dimension(axis_local[i]) != 1);
+    }
+    if (keep_dims)
+    {
+      out_shape.set(axis_local[i], 1);
+    }
+    else
+    {
+      out_shape.remove_dimension(axis_local[i] - i);
+    }
+  }
+  const TensorInfo out_info = input->clone()->set_tensor_shape(out_shape);
+  ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_SHAPES(output, &out_info);
+
+  return Status{};
+}
+
+void NEReduceMeanEx::configure(ITensor *input, const Coordinates &reduction_axis, bool keep_dims,
+                               ITensor *output)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input);
+
+  _reduction_ops = reduction_axis.num_dimensions();
+  _reduction_kernels =
+      arm_compute::support::cpp14::make_unique<NEReductionOperation[]>(_reduction_ops);
+  _reduced_outs =
+      arm_compute::support::cpp14::make_unique<Tensor[]>(_reduction_ops - (keep_dims ? 1 : 0));
+  _keep_dims = keep_dims;
+
+  Coordinates axis_local = reduction_axis;
+  const int input_dims = input->info()->num_dimensions();
+  const unsigned int reduction_ops = reduction_axis.num_dimensions();
+
+  // Convert negative axis
+  for (unsigned int i = 0; i < reduction_ops; ++i)
+  {
+    axis_local[i] = wrap_around(axis_local[i], input_dims);
+  }
+
+  // Perform reduction for every axis
+  for (unsigned int i = 0; i < _reduction_ops; ++i)
+  {
+    TensorShape out_shape = i == 0 ? input->info()->tensor_shape()
+                                   : (_reduced_outs.get() + i - 1)->info()->tensor_shape();
+    out_shape.set(axis_local[i], 1);
+    auto in = (i == 0) ? input : (_reduced_outs.get() + i - 1);
+
+    if (i == _reduction_ops - 1 && keep_dims)
+    {
+      _reduction_kernels[i].configure(in, output, axis_local[i], ReductionOperation::MEAN_SUM);
+    }
+    else
+    {
+      _reduced_outs[i].allocator()->init(TensorInfo(out_shape, input->info()->num_channels(),
+                                                    input->info()->data_type(),
+                                                    input->info()->quantization_info())
+                                             .set_data_layout(output->info()->data_layout()));
+      _memory_group.manage(_reduced_outs.get() + i);
+      _reduction_kernels[i].configure(in, _reduced_outs.get() + i, axis_local[i],
+                                      ReductionOperation::MEAN_SUM);
+    }
+  }
+
+  // Allocate intermediate tensors
+  for (unsigned int i = 0; i < _reduction_ops - (keep_dims ? 1 : 0); ++i)
+  {
+    _reduced_outs[i].allocator()->allocate();
+  }
+
+  // Configure reshape layer if we want to drop the dimensions
+  if (!keep_dims)
+  {
+    TensorShape out_shape = input->info()->tensor_shape();
+
+    // We have to sort the reduction axis vectors in order for remove_dimension
+    // to work properly
+    std::sort(axis_local.begin(), axis_local.begin() + _reduction_ops);
+    for (unsigned int i = 0; i < _reduction_ops; ++i)
+    {
+      out_shape.remove_dimension(axis_local[i] - i);
+    }
+    auto_init_if_empty(*output->info(), input->info()->clone()->set_tensor_shape(out_shape));
+    _reshape.configure(_reduced_outs.get() + _reduction_ops - 1, output);
+  }
+}
+
+void NEReduceMeanEx::run()
+{
+  _memory_group.acquire();
+
+  for (unsigned int i = 0; i < _reduction_ops; ++i)
+  {
+    _reduction_kernels[i].run();
+  }
+
+  if (!_keep_dims)
+  {
+    _reshape.run();
+  }
+  _memory_group.release();
+}
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEReduceSum.cpp b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEReduceSum.cpp
new file mode 100644
index 000000000..3c18217ef
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NEReduceSum.cpp
@@ -0,0 +1,165 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/runtime/NEON/functions/NEReduceSum.h"
+
+#include "arm_compute/core/CPP/Validate.h"
+#include "arm_compute/core/Helpers.h"
+#include "arm_compute/runtime/NEON/NEScheduler.h"
+
+using namespace arm_compute;
+
+NEReduceSum::NEReduceSum(std::shared_ptr<IMemoryManager> memory_manager)
+    : _memory_group(std::move(memory_manager)), _reduction_kernels(), _reduced_outs(), _reshape(),
+      _reduction_ops(), _keep_dims()
+{
+}
+
+Status NEReduceSum::validate(const ITensorInfo *input, const Coordinates &reduction_axis,
+                             bool keep_dims, const ITensorInfo *output)
+{
+  ARM_COMPUTE_UNUSED(keep_dims);
+  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input);
+  ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(input);
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::QASYMM8, DataType::F16,
+                                                       DataType::F32);
+  ARM_COMPUTE_RETURN_ERROR_ON(reduction_axis.num_dimensions() > input->num_dimensions());
+
+  TensorShape out_shape = input->tensor_shape();
+  const unsigned int reduction_ops = reduction_axis.num_dimensions();
+  const int input_dims = input->num_dimensions();
+  Coordinates axis_local = reduction_axis;
+
+  // Convert negative axis
+  for (unsigned int i = 0; i < reduction_ops; ++i)
+  {
+    axis_local[i] = wrap_around(axis_local[i], input_dims);
+  }
+
+  std::sort(axis_local.begin(), axis_local.begin() + reduction_ops);
+  for (unsigned int i = 0; i < reduction_ops; ++i)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON(axis_local[i] > 3);
+    ARM_COMPUTE_RETURN_ERROR_ON(static_cast<unsigned int>(axis_local[i]) >
+                                input->num_dimensions() - 1);
+    if (output->total_size() > 0 && keep_dims)
+    {
+      ARM_COMPUTE_RETURN_ERROR_ON(output->dimension(axis_local[i]) != 1);
+    }
+    if (keep_dims)
+    {
+      out_shape.set(axis_local[i], 1);
+    }
+    else
+    {
+      out_shape.remove_dimension(axis_local[i] - i);
+    }
+  }
+  const TensorInfo out_info = input->clone()->set_tensor_shape(out_shape);
+  ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_SHAPES(output, &out_info);
+
+  return Status{};
+}
+
+void NEReduceSum::configure(ITensor *input, const Coordinates &reduction_axis, bool keep_dims,
+                            ITensor *output)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input);
+
+  _reduction_ops = reduction_axis.num_dimensions();
+  _reduction_kernels.resize(_reduction_ops);
+  _reduced_outs.resize(_reduction_ops - (keep_dims ? 1 : 0));
+  _keep_dims = keep_dims;
+
+  Coordinates axis_local = reduction_axis;
+  const int input_dims = input->info()->num_dimensions();
+  const unsigned int reduction_ops = reduction_axis.num_dimensions();
+
+  // Convert negative axis
+  for (unsigned int i = 0; i < reduction_ops; ++i)
+  {
+    axis_local[i] = wrap_around(axis_local[i], input_dims);
+  }
+
+  // Perform reduction for every axis
+  for (unsigned int i = 0; i < _reduction_ops; ++i)
+  {
+    TensorShape out_shape =
+        i == 0 ? input->info()->tensor_shape() : (&_reduced_outs[i - 1])->info()->tensor_shape();
+    out_shape.set(axis_local[i], 1);
+    auto in = (i == 0) ? input : (&_reduced_outs[i - 1]);
+
+    if (i == _reduction_ops - 1 && keep_dims)
+    {
+      _reduction_kernels[i].configure(in, output, axis_local[i], ReductionOperation::SUM);
+    }
+    else
+    {
+      _reduced_outs[i].allocator()->init(TensorInfo(out_shape, input->info()->num_channels(),
+                                                    input->info()->data_type(),
+                                                    input->info()->quantization_info())
+                                             .set_data_layout(input->info()->data_layout()));
+      _memory_group.manage(&_reduced_outs[i]);
+      _reduction_kernels[i].configure(in, &_reduced_outs[i], axis_local[i],
+                                      ReductionOperation::SUM);
+    }
+  }
+
+  // Allocate intermediate tensors
+  for (unsigned int i = 0; i < _reduction_ops - (keep_dims ? 1 : 0); ++i)
+  {
+    _reduced_outs[i].allocator()->allocate();
+  }
+
+  // Configure reshape layer if we want to drop the dimensions
+  if (!keep_dims)
+  {
+    TensorShape out_shape = input->info()->tensor_shape();
+
+    // We have to sort the reduction axis vectors in order for remove_dimension
+    // to work properly
+    std::sort(axis_local.begin(), axis_local.begin() + _reduction_ops);
+    for (unsigned int i = 0; i < _reduction_ops; ++i)
+    {
+      out_shape.remove_dimension(axis_local[i] - i);
+    }
+    auto_init_if_empty(*output->info(), input->info()->clone()->set_tensor_shape(out_shape));
+    _reshape.configure(&_reduced_outs[_reduction_ops - 1], output);
+  }
+}
+
+void NEReduceSum::run()
+{
+  MemoryGroupResourceScope scope_mg(_memory_group);
+
+  for (unsigned int i = 0; i < _reduction_ops; ++i)
+  {
+    _reduction_kernels[i].run();
+  }
+
+  if (!_keep_dims)
+  {
+    _reshape.run();
+  }
+}
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NETransposeConvLayer.cpp b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NETransposeConvLayer.cpp
new file mode 100644
index 000000000..fd15ef05f
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/NEON/functions/NETransposeConvLayer.cpp
@@ -0,0 +1,307 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (c) 2017-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/runtime/NEON/functions/NETransposeConvLayer.h"
+
+#include "arm_compute/core/Helpers.h"
+#include "arm_compute/core/Utils.h"
+#include "arm_compute/core/UtilsEx.h"
+#include "arm_compute/core/Validate.h"
+#include "arm_compute/core/utils/misc/ShapeCalculator.h"
+#include "arm_compute/core/utils/misc/ShapeCalculatorEx.h"
+#include "arm_compute/runtime/NEON/NEScheduler.h"
+
+using namespace arm_compute::misc::shape_calculator;
+
+namespace arm_compute
+{
+NETransposeConvLayer::NETransposeConvLayer(std::shared_ptr<IMemoryManager> memory_manager) // NOLINT
+    : _memory_group(std::move(memory_manager)),
+      _conv_f(),
+      _upsample_f(),
+      _flip_weights(),
+      _permute_input(),
+      _permute_weights(),
+      _permute_output(),
+      _scaled_output(),
+      _weights_flipped(),
+      _permuted_input(),
+      _permuted_weights(),
+      _permuted_output(),
+      _is_nchw(false),
+      _original_weights(nullptr),
+      _input(nullptr),
+      _info(),
+      _is_prepared(false)
+{
+}
+
+Status NETransposeConvLayer::validate(const ITensorInfo *input, const ITensorInfo *weights,
+                                      const ITensorInfo *bias, const ITensorInfo *output,
+                                      const PadStrideInfo &info, unsigned int invalid_right,
+                                      unsigned int invalid_bottom)
+{
+  ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, weights, output);
+  ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::F32, DataType::F16,
+                                                       DataType::QASYMM8);
+  ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(weights, input);
+  ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_LAYOUT(weights, input);
+  const unsigned int width_idx =
+      get_data_layout_dimension_index(weights->data_layout(), DataLayoutDimension::WIDTH);
+  const unsigned int height_idx =
+      get_data_layout_dimension_index(weights->data_layout(), DataLayoutDimension::HEIGHT);
+  ARM_COMPUTE_RETURN_ERROR_ON(weights->dimension(width_idx) != weights->dimension(height_idx));
+  ARM_COMPUTE_RETURN_ERROR_ON(weights->dimension(width_idx) < 1);
+
+  auto out_dims = transposeconv_output_dimensions(
+      input->dimension(width_idx), input->dimension(height_idx), weights->dimension(width_idx),
+      weights->dimension(height_idx), info, invalid_right, invalid_bottom);
+
+  ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, weights);
+  if (is_data_type_quantized_asymmetric(input->data_type()) && bias)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(bias, 1, DataType::S32);
+  }
+  else if (bias)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, bias);
+  }
+
+  if (output->tensor_shape().total_size() > 0)
+  {
+    ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, output);
+
+    const TensorShape output_shape = compute_transposeconv_output_shape(out_dims, *input, *weights);
+
+    ARM_COMPUTE_RETURN_ERROR_ON_MSG(output->dimension(Window::DimX) < output_shape.x(),
+                                    "Output's dim 0 is invalid.");
+    ARM_COMPUTE_RETURN_ERROR_ON_MSG(output->dimension(Window::DimY) < output_shape.y(),
+                                    "Output's dim 1 is invalid.");
+    ARM_COMPUTE_RETURN_ERROR_ON_MSG(output->dimension(Window::DimZ) < output_shape.z(),
+                                    "Output's dim 2 is invalid.");
+  }
+
+  unsigned int pad_left = 0;
+  unsigned int pad_right = 0;
+  unsigned int pad_top = 0;
+  unsigned int pad_bottom = 0;
+  const TensorShape scale_out_shape = compute_transposeconv_upsampled_shape(
+      *input, *weights, info, out_dims, invalid_right, invalid_bottom, pad_left, pad_right, pad_top,
+      pad_bottom);
+  TensorInfo scale_out_info(
+      input->clone()->set_is_resizable(true).reset_padding().set_tensor_shape(scale_out_shape));
+  scale_out_info.set_data_layout(input->data_layout());
+  const PadStrideInfo conv_info(1, 1, 0, 0, 0, 0, DimensionRoundingType::CEIL);
+
+  const unsigned int batches_idx =
+      get_data_layout_dimension_index(weights->data_layout(), DataLayoutDimension::BATCHES);
+  const unsigned int channel_idx =
+      get_data_layout_dimension_index(weights->data_layout(), DataLayoutDimension::CHANNEL);
+  ARM_COMPUTE_RETURN_ERROR_ON(input->dimension(batches_idx) !=
+                              scale_out_info.dimension(batches_idx));
+  ARM_COMPUTE_RETURN_ERROR_ON(input->dimension(channel_idx) !=
+                              scale_out_info.dimension(channel_idx));
+
+  ARM_COMPUTE_RETURN_ON_ERROR(NEConvolutionLayer::validate(&scale_out_info, weights, bias, output,
+                                                           conv_info, WeightsInfo()));
+
+  return Status{};
+}
+
+void NETransposeConvLayer::configure(ITensor *input, const ITensor *weights, const ITensor *bias,
+                                     ITensor *output, const PadStrideInfo &info,
+                                     unsigned int invalid_right, unsigned int invalid_bottom)
+{
+  ARM_COMPUTE_ERROR_ON_NULLPTR(input, weights, output);
+
+  const DataLayout data_layout = input->info()->data_layout();
+
+  _input = input;
+  _original_weights = weights;
+  _info = info;
+  _is_prepared = false;
+  _is_nchw = data_layout == DataLayout::NCHW;
+
+  const unsigned int stride_x = info.stride().first;
+  const unsigned int stride_y = info.stride().second;
+
+  const unsigned int width_idx =
+      get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH);
+  const unsigned int height_idx =
+      get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT);
+  auto out_dims = transposeconv_output_dimensions(
+      input->info()->dimension(width_idx), input->info()->dimension(height_idx),
+      weights->info()->dimension(width_idx), weights->info()->dimension(height_idx), info,
+      invalid_right, invalid_bottom);
+
+  const TensorShape output_shape =
+      compute_transposeconv_output_shape(out_dims, *input->info(), *weights->info());
+  // Output auto initialization if not yet initialized
+  auto_init_if_empty(*output->info(), output_shape, 1, input->info()->data_type(),
+                     input->info()->quantization_info());
+
+  // Perform validation step
+  ARM_COMPUTE_ERROR_THROW_ON(NETransposeConvLayer::validate(
+      input->info(), weights->info(), bias == nullptr ? nullptr : bias->info(), output->info(),
+      info, invalid_right, invalid_bottom));
+
+  _memory_group.manage(&_scaled_output);
+
+  if (!_is_nchw)
+  {
+    _memory_group.manage(&_permuted_input);
+    _memory_group.manage(&_permuted_weights);
+    _memory_group.manage(&_permuted_output);
+
+    // Configure the function to transform the input tensor from NHWC -> NCHW
+    _permuted_input.info()->set_quantization_info(input->info()->quantization_info());
+    _permute_input.configure(input, &_permuted_input, PermutationVector(1U, 2U, 0U));
+    _permuted_input.info()->set_data_layout(DataLayout::NCHW);
+
+    // Configure the function to transform the weights tensor from NHWC -> NCHW
+    _permuted_weights.info()->set_quantization_info(weights->info()->quantization_info());
+    _permute_weights.configure(weights, &_permuted_weights, PermutationVector(1U, 2U, 0U));
+    _permuted_weights.info()->set_data_layout(DataLayout::NCHW);
+
+    // Find the upsampled dimensions and the padding needed for the convolution with stride 1 in
+    // order to match output shape
+
+    unsigned int pad_left = 0;
+    unsigned int pad_right = 0;
+    unsigned int pad_top = 0;
+    unsigned int pad_bottom = 0;
+    const TensorShape scale_out_shape = compute_transposeconv_upsampled_shape(
+        *_permuted_input.info(), *_permuted_weights.info(), info, out_dims, invalid_right,
+        invalid_bottom, pad_left, pad_right, pad_top, pad_bottom);
+
+    TensorInfo scale_out_info(scale_out_shape, 1, _permuted_input.info()->data_type(),
+                              _permuted_input.info()->quantization_info());
+    scale_out_info.set_data_layout(DataLayout::NCHW);
+    _scaled_output.allocator()->init(scale_out_info);
+
+    const PadStrideInfo upsample_info(stride_x, stride_y, pad_left, pad_right, pad_top, pad_bottom,
+                                      DimensionRoundingType::CEIL);
+    _upsample_f.configure(&_permuted_input, &_scaled_output, upsample_info);
+
+    _weights_flipped.allocator()->init(*_permuted_weights.info()->clone());
+    _weights_flipped.info()->set_quantization_info(weights->info()->quantization_info());
+    _flip_weights.configure(&_permuted_weights, &_weights_flipped);
+
+    // setup the function to convolve the upscaled output
+    const PadStrideInfo conv_info(1, 1, 0, 0, 0, 0, DimensionRoundingType::CEIL);
+
+    const auto out_shape = output->info()->tensor_shape();
+    TensorShape permuted_out_shape{out_shape[1], out_shape[2], out_shape[0], out_shape[3]};
+    TensorInfo permuted_out_info(permuted_out_shape, 1, output->info()->data_type(),
+                                 output->info()->quantization_info());
+    _permuted_output.allocator()->init(permuted_out_info);
+    _permuted_output.info()->set_data_layout(DataLayout::NCHW);
+    _conv_f.configure(&_scaled_output, &_weights_flipped, bias, &_permuted_output, conv_info);
+
+    // Configure the function to transform the convoluted output to NHWC
+    _permute_output.configure(&_permuted_output, output, PermutationVector(2U, 0U, 1U));
+
+    _permuted_input.allocator()->allocate();
+    _permuted_weights.allocator()->allocate();
+    _permuted_output.allocator()->allocate();
+  }
+  else
+  {
+    // Find the upsampled dimensions and the padding needed for the convolution with stride 1 in
+    // order to match output shape
+    unsigned int pad_left = 0;
+    unsigned int pad_right = 0;
+    unsigned int pad_top = 0;
+    unsigned int pad_bottom = 0;
+    const TensorShape scale_out_shape = compute_transposeconv_upsampled_shape(
+        *input->info(), *weights->info(), info, out_dims, invalid_right, invalid_bottom, pad_left,
+        pad_right, pad_top, pad_bottom);
+
+    TensorInfo scale_out_info(scale_out_shape, 1, input->info()->data_type(),
+                              input->info()->quantization_info());
+    _scaled_output.allocator()->init(scale_out_info);
+    const PadStrideInfo upsample_info(stride_x, stride_y, pad_left, pad_right, pad_top, pad_bottom,
+                                      DimensionRoundingType::FLOOR);
+    _upsample_f.configure(input, &_scaled_output, upsample_info);
+
+    _weights_flipped.allocator()->init(weights->info()->clone()->set_data_layout(data_layout));
+    _flip_weights.configure(weights, &_weights_flipped);
+
+    // setup the function to convolve the upscaled output
+    const PadStrideInfo conv_info(1, 1, 0, 0, 0, 0, DimensionRoundingType::CEIL);
+    _conv_f.configure(&_scaled_output, &_weights_flipped, bias, output, conv_info);
+  }
+  _scaled_output.allocator()->allocate();
+}
+
+void NETransposeConvLayer::run()
+{
+  prepare();
+
+  // MemoryGroupResourceScope scope_mg(_memory_group);
+
+  // Permute input
+  if (!_is_nchw)
+  {
+    _permute_input.run();
+  }
+
+  _upsample_f.run();
+  _conv_f.run();
+
+  // Permute output
+  if (!_is_nchw)
+  {
+    _permute_output.run();
+  }
+}
+
+void NETransposeConvLayer::prepare()
+{
+  if (!_is_prepared)
+  {
+    ARM_COMPUTE_ERROR_ON(!_original_weights->is_used());
+
+    // Run weights flipping and mark original weights tensor as unused
+    _weights_flipped.allocator()->allocate();
+    // Permute weights
+    if (!_is_nchw)
+    {
+      _permute_weights.run();
+    }
+    NEScheduler::get().schedule(&_flip_weights, Window::DimZ);
+    _original_weights->mark_as_unused();
+
+    // Prepare convolution
+    _conv_f.prepare();
+
+    if (!_weights_flipped.is_used())
+    {
+      _weights_flipped.allocator()->free();
+    }
+
+    _is_prepared = true;
+  }
+}
+} // namespace arm_compute
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/misc/functions/GenericGather.cpp b/runtimes/libs/ARMComputeEx/src/runtime/misc/functions/GenericGather.cpp
new file mode 100644
index 000000000..67e1bfb02
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/misc/functions/GenericGather.cpp
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_compute/runtime/misc/functions/GenericGather.h"
+
+namespace arm_compute
+{
+namespace misc
+{
+
+bool shouldPermute(arm_compute::ITensorInfo *input, arm_compute::ITensorInfo *output)
+{
+  return (input->num_dimensions() != 4 && output->num_dimensions() == 4 &&
+          input->data_layout() == DataLayout::NCHW);
+}
+
+void GenericGather::configure(arm_compute::ITensor *input, arm_compute::ITensor *indices,
+                              arm_compute::ITensor *output, int axis)
+{
+  _input = input;
+  _indices = indices;
+  _output = output;
+  _axis = axis;
+
+  arm_compute::PermutationVector pv;
+  if (shouldPermute(input->info(), output->info()))
+  {
+    // NOTE This vector comes from CLPermuteKernel implementation
+    //
+    // This implementation permutes a tensor of shape C / W / H into another tensor of shape W / H /
+    // C
+    //
+    //     Original | Permuted
+    // 0 | C        | W (from 1)
+    // 1 | W        | H (from 2)
+    // 2 | H        | C (from 0)
+    //
+    pv = arm_compute::PermutationVector{1, 2, 0};
+  }
+
+  if (utils::isGpuMode())
+  {
+    if (shouldPermute(input->info(), output->info()))
+    {
+      _cl_gather.configure(CAST_CL(input), CAST_CL(indices), &_cl_permuted, axis);
+      _cl_permute.configure(&_cl_permuted, CAST_CL(output), pv);
+
+      // NOTE _permuted is inaccessible from outside, and thus it is safe to invoke allocate here.
+      _cl_permuted.allocator()->allocate();
+    }
+    else
+    {
+      _cl_gather.configure(CAST_CL(input), CAST_CL(indices), CAST_CL(output), axis);
+    }
+  }
+  else
+  {
+    throw std::runtime_error("Not supported, yet");
+  }
+}
+
+void GenericGather::run(void)
+{
+  if (utils::isGpuMode())
+  {
+    _cl_gather.run();
+    if (shouldPermute(_input->info(), _output->info()))
+    {
+      _cl_permute.run();
+    }
+  }
+  else
+  {
+    throw std::runtime_error("Not supported, yet");
+  }
+}
+
+} // namespace misc
+} // namespace arm_compute
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/misc/functions/GenericReshapeLayer.cpp b/runtimes/libs/ARMComputeEx/src/runtime/misc/functions/GenericReshapeLayer.cpp
new file mode 100644
index 000000000..8025ae28e
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/misc/functions/GenericReshapeLayer.cpp
@@ -0,0 +1,128 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_compute/core/ITensorInfo.h"
+#include "arm_compute/runtime/misc/functions/GenericReshapeLayer.h"
+
+namespace arm_compute
+{
+namespace misc
+{
+
+namespace
+{
+
+bool shouldPermute(const arm_compute::ITensorInfo *input, arm_compute::ITensorInfo *output)
+{
+  return (input->num_dimensions() == 4 || output->num_dimensions() == 4) &&
+         (input->num_dimensions() != output->num_dimensions() &&
+          input->data_layout() == DataLayout::NCHW);
+}
+
+} // namespace
+
+void GenericReshapeLayer::configure(const arm_compute::ITensor *input, arm_compute::ITensor *output)
+{
+  _input = input;
+  _output = output;
+
+  arm_compute::PermutationVector pv;
+  if (input->info()->data_layout() == DataLayout::NCHW && input->info()->num_dimensions() == 4 &&
+      output->info()->num_dimensions() != 4)
+  {
+    // NOTE This vector comes from CLPermuteKernel implementation
+    //
+    // This implementation permutes a tensor of shape W / H / C into another tensor of shape
+    // C / W / H
+    //
+    //     Original | Permuted
+    // 0 | W        | C (from 2)
+    // 1 | H        | W (from 0)
+    // 2 | C        | H (from 1)
+    //
+    pv = arm_compute::PermutationVector{2, 0, 1};
+  }
+  else if (input->info()->data_layout() == DataLayout::NCHW &&
+           input->info()->num_dimensions() != 4 && output->info()->num_dimensions() == 4)
+  {
+    // NOTE This vector comes from CLPermuteKernel implementation
+    //
+    // This implementation permutes a tensor of shape C / W / H into another tensor of shape
+    // W / H / C
+    //
+    //     Original | Permuted
+    // 0 | C        | W (from 1)
+    // 1 | W        | H (from 2)
+    // 2 | H        | C (from 0)
+    //
+    pv = arm_compute::PermutationVector{1, 2, 0};
+  }
+
+  if (utils::isGpuMode())
+  {
+    const auto const_input = CAST_CL(const_cast<arm_compute::ITensor *>(input));
+    if (shouldPermute(input->info(), output->info()))
+    {
+      _cl_permute.configure(const_input, &_cl_permuted, pv);
+      _cl_reshape.configure(&_cl_permuted, CAST_CL(output));
+
+      // NOTE _permuted is inaccessible from outside, and thus it is safe to invoke allocate here.
+      _cl_permuted.allocator()->allocate();
+    }
+    else
+    {
+      _cl_reshape.configure(const_input, CAST_CL(output));
+    }
+  }
+  else
+  {
+    if (shouldPermute(input->info(), output->info()))
+    {
+      _neon_permute.configure(input, &_neon_permuted, pv);
+      _neon_reshape.configure(&_neon_permuted, output);
+
+      // NOTE _permuted is inaccessible from outside, and thus it is safe to invoke allocate here.
+      _neon_permuted.allocator()->allocate();
+    }
+    else
+    {
+      _neon_reshape.configure(input, output);
+    }
+  }
+}
+
+void GenericReshapeLayer::run(void)
+{
+  if (utils::isGpuMode())
+  {
+    if (shouldPermute(_input->info(), _output->info()))
+    {
+      _cl_permute.run();
+    }
+    _cl_reshape.run();
+  }
+  else
+  {
+    if (shouldPermute(_input->info(), _output->info()))
+    {
+      _neon_permute.run();
+    }
+    _neon_reshape.run();
+  }
+}
+
+} // namespace misc
+} // namespace arm_compute
diff --git a/runtimes/libs/ARMComputeEx/src/runtime/misc/functions/Utils.cpp b/runtimes/libs/ARMComputeEx/src/runtime/misc/functions/Utils.cpp
new file mode 100644
index 000000000..44a4bb9ed
--- /dev/null
+++ b/runtimes/libs/ARMComputeEx/src/runtime/misc/functions/Utils.cpp
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_compute/runtime/misc/functions/Utils.h"
+
+namespace arm_compute
+{
+namespace misc
+{
+namespace utils
+{
+
+bool isGpuMode()
+{
+  char *neon = std::getenv("NEON");
+  if (neon == nullptr)
+    return true;
+  else if (neon[0] == '1')
+    return false;
+  return true;
+}
+
+} // namespace utils
+} // namespace misc
+} // namespace arm_compute
diff --git a/libs/ARMComputeEx/src/runtime/topk_v2.h b/runtimes/libs/ARMComputeEx/src/runtime/topk_v2.h
index f94effea1..f94effea1 100644
--- a/libs/ARMComputeEx/src/runtime/topk_v2.h
+++ b/runtimes/libs/ARMComputeEx/src/runtime/topk_v2.h
diff --git a/libs/CMakeLists.txt b/runtimes/libs/CMakeLists.txt
index 99d2028f4..99d2028f4 100644
--- a/libs/CMakeLists.txt
+++ b/runtimes/libs/CMakeLists.txt
diff --git a/runtimes/libs/cker/CMakeLists.txt b/runtimes/libs/cker/CMakeLists.txt
new file mode 100644
index 000000000..16a13f5dd
--- /dev/null
+++ b/runtimes/libs/cker/CMakeLists.txt
@@ -0,0 +1,2 @@
+add_library(nnfw_lib_cker INTERFACE)
+target_include_directories(nnfw_lib_cker INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}/include)
diff --git a/runtimes/libs/cker/README.md b/runtimes/libs/cker/README.md
new file mode 100644
index 000000000..149320ffc
--- /dev/null
+++ b/runtimes/libs/cker/README.md
@@ -0,0 +1,7 @@
+# cker
+
+cker - Portable CPU kernel library
+
+__cker__ means `CPU kernel`
+
+Current __cker__ is porting of Tensorflow lite's reference_op kernel (Tensorflow 1.12) and gemmlow
diff --git a/runtimes/libs/cker/include/cker/Shape.h b/runtimes/libs/cker/include/cker/Shape.h
new file mode 100644
index 000000000..39449c68f
--- /dev/null
+++ b/runtimes/libs/cker/include/cker/Shape.h
@@ -0,0 +1,286 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright 2018 The TensorFlow Authors. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_CKER_SHAPE_H__
+#define __NNFW_CKER_SHAPE_H__
+
+#include <algorithm>
+#include <cstring>
+#include <cassert>
+#include <vector>
+
+#define UNUSED_RELEASE(a) (void)(a)
+
+namespace nnfw
+{
+namespace cker
+{
+
+class Shape
+{
+public:
+  // Shapes with dimensions up to 4 are stored directly in the structure, while
+  // larger shapes are separately allocated.
+  static constexpr int kMaxSmallSize = 4;
+
+  Shape &operator=(Shape const &) = delete;
+
+  Shape() : _size(0) {}
+
+  explicit Shape(int dimensions_count) : _size(dimensions_count)
+  {
+    if (dimensions_count > kMaxSmallSize)
+    {
+      _dims_pointer = new int32_t[dimensions_count];
+    }
+  }
+
+  Shape(int shape_size, int32_t value) : _size(0)
+  {
+    Resize(shape_size);
+    for (int i = 0; i < shape_size; ++i)
+    {
+      SetDim(i, value);
+    }
+  }
+
+  Shape(int dimensions_count, const int32_t *dims_data) : _size(0)
+  {
+    ReplaceWith(dimensions_count, dims_data);
+  }
+
+  Shape(const std::initializer_list<int> init_list) : _size(0) { BuildFrom(init_list); }
+
+  // Avoid using this constructor.  We should be able to delete it when C++17
+  // rolls out.
+  Shape(Shape const &other) : _size(other.DimensionsCount())
+  {
+    if (_size > kMaxSmallSize)
+    {
+      _dims_pointer = new int32_t[_size];
+    }
+    std::memcpy(DimsData(), other.DimsData(), sizeof(int32_t) * _size);
+  }
+
+  bool operator==(const Shape &comp) const
+  {
+    return this->_size == comp._size &&
+           std::memcmp(DimsData(), comp.DimsData(), _size * sizeof(int32_t)) == 0;
+  }
+
+  ~Shape()
+  {
+    if (_size > kMaxSmallSize)
+    {
+      delete[] _dims_pointer;
+    }
+  }
+
+  inline int32_t DimensionsCount() const { return _size; }
+  inline int32_t Dims(int i) const
+  {
+    assert(i >= 0);
+    assert(i < _size);
+    return _size > kMaxSmallSize ? _dims_pointer[i] : _dims[i];
+  }
+  inline void SetDim(int i, int32_t val)
+  {
+    assert(i >= 0);
+    assert(i < _size);
+    if (_size > kMaxSmallSize)
+    {
+      _dims_pointer[i] = val;
+    }
+    else
+    {
+      _dims[i] = val;
+    }
+  }
+
+  inline int32_t *DimsData() { return _size > kMaxSmallSize ? _dims_pointer : _dims; }
+  inline const int32_t *DimsData() const { return _size > kMaxSmallSize ? _dims_pointer : _dims; }
+  // The caller must ensure that the shape is no bigger than 4-D.
+  inline const int32_t *DimsDataUpTo4D() const { return _dims; }
+
+  inline void Resize(int dimensions_count)
+  {
+    if (_size > kMaxSmallSize)
+    {
+      delete[] _dims_pointer;
+    }
+    _size = dimensions_count;
+    if (dimensions_count > kMaxSmallSize)
+    {
+      _dims_pointer = new int32_t[dimensions_count];
+    }
+  }
+
+  inline void ReplaceWith(int dimensions_count, const int32_t *dims_data)
+  {
+    Resize(dimensions_count);
+    int32_t *dst_dims = DimsData();
+    std::memcpy(dst_dims, dims_data, dimensions_count * sizeof(int32_t));
+  }
+
+  template <typename T> inline void BuildFrom(const T &src_iterable)
+  {
+    const int dimensions_count = std::distance(src_iterable.begin(), src_iterable.end());
+    Resize(dimensions_count);
+    int32_t *data = DimsData();
+    for (auto it : src_iterable)
+    {
+      *data = it;
+      ++data;
+    }
+  }
+
+  // This will probably be factored out. Old code made substantial use of 4-D
+  // shapes, and so this function is used to extend smaller shapes. Note that
+  // (a) as Dims<4>-dependent code is eliminated, the reliance on this should be
+  // reduced, and (b) some kernels are stricly 4-D, but then the shapes of their
+  // inputs should already be 4-D, so this function should not be needed.
+  inline static Shape ExtendedShape(int new_shape_size, const Shape &shape)
+  {
+    return Shape(new_shape_size, shape, 1);
+  }
+
+  inline void BuildFrom(const std::initializer_list<int> init_list)
+  {
+    BuildFrom<const std::initializer_list<int>>(init_list);
+  }
+
+  // Returns the total count of elements, that is the size when flattened into a
+  // vector.
+  inline int FlatSize() const
+  {
+    int buffer_size = 1;
+    const int *dims_data = DimsData();
+    for (int i = 0; i < _size; i++)
+    {
+      const int dim = dims_data[i];
+      assert(dim >= 1);
+      buffer_size *= dim;
+    }
+    return buffer_size;
+  }
+
+  bool operator!=(const Shape &comp) const { return !((*this) == comp); }
+
+private:
+  // For use only by ExtendedShape(), written to guarantee (return-value) copy
+  // elision in C++17.
+  // This creates a shape padded to the desired size with the specified value.
+  Shape(int new_shape_size, const Shape &shape, int pad_value) : _size(0)
+  {
+    assert(new_shape_size >= shape.DimensionsCount());
+    assert(new_shape_size <= kMaxSmallSize);
+    Resize(new_shape_size);
+    const int size_increase = new_shape_size - shape.DimensionsCount();
+    for (int i = 0; i < size_increase; ++i)
+    {
+      SetDim(i, pad_value);
+    }
+    std::memcpy(DimsData() + size_increase, shape.DimsData(),
+                sizeof(int32_t) * shape.DimensionsCount());
+  }
+
+  int32_t _size;
+  union {
+    int32_t _dims[kMaxSmallSize];
+    int32_t *_dims_pointer;
+  };
+};
+
+inline int MatchingDim(const Shape &shape1, int index1, const Shape &shape2, int index2)
+{
+  UNUSED_RELEASE(shape2);
+  UNUSED_RELEASE(index2);
+  assert(shape1.Dims(index1) == shape2.Dims(index2));
+  return shape1.Dims(index1);
+}
+
+inline Shape GetShape(const std::vector<int32_t> &data) { return Shape(data.size(), data.data()); }
+
+inline int Offset(const Shape &shape, int i0, int i1, int i2, int i3)
+{
+  assert(shape.DimensionsCount() == 4);
+  const int *dims_data = shape.DimsDataUpTo4D();
+  assert(i0 >= 0 && i0 < dims_data[0]);
+  assert(i1 >= 0 && i1 < dims_data[1]);
+  assert(i2 >= 0 && i2 < dims_data[2]);
+  assert(i3 >= 0 && i3 < dims_data[3]);
+  return ((i0 * dims_data[1] + i1) * dims_data[2] + i2) * dims_data[3] + i3;
+}
+
+inline int FlatSizeSkipDim(const Shape &shape, int skip_dim)
+{
+  const int dims_count = shape.DimensionsCount();
+  assert(skip_dim >= 0 && skip_dim < dims_count);
+  const auto *dims_data = shape.DimsData();
+  int flat_size = 1;
+  for (int i = 0; i < dims_count; ++i)
+  {
+    flat_size *= (i == skip_dim) ? 1 : dims_data[i];
+  }
+  return flat_size;
+}
+
+// Flat size calculation, checking that dimensions match with one or more other
+// arrays.
+inline int MatchingFlatSize(const Shape &shape, const Shape &check_shape_0)
+{
+  UNUSED_RELEASE(check_shape_0);
+  assert(shape.DimensionsCount() == check_shape_0.DimensionsCount());
+  const int dims_count = shape.DimensionsCount();
+  for (int i = 0; i < dims_count; ++i)
+  {
+    assert(shape.Dims(i) == check_shape_0.Dims(i));
+  }
+  return shape.FlatSize();
+}
+
+inline int MatchingFlatSize(const Shape &shape, const Shape &check_shape_0,
+                            const Shape &check_shape_1)
+{
+  UNUSED_RELEASE(check_shape_0);
+  assert(shape.DimensionsCount() == check_shape_0.DimensionsCount());
+  const int dims_count = shape.DimensionsCount();
+  for (int i = 0; i < dims_count; ++i)
+  {
+    assert(shape.Dims(i) == check_shape_0.Dims(i));
+  }
+  return MatchingFlatSize(shape, check_shape_1);
+}
+
+inline int MatchingFlatSizeSkipDim(const Shape &shape, int skip_dim, const Shape &check_shape_0)
+{
+  UNUSED_RELEASE(check_shape_0);
+  const int dims_count = shape.DimensionsCount();
+  for (int i = 0; i < dims_count; ++i)
+  {
+    if (i != skip_dim)
+    {
+      assert(shape.Dims(i) == check_shape_0.Dims(i));
+    }
+  }
+  return FlatSizeSkipDim(shape, skip_dim);
+}
+
+} // namespace cker
+} // namespace nnfw
+
+#endif // __NNFW_CKER_SHAPE_H__
diff --git a/runtimes/libs/cker/include/cker/Types.h b/runtimes/libs/cker/include/cker/Types.h
new file mode 100644
index 000000000..d8dedbd9c
--- /dev/null
+++ b/runtimes/libs/cker/include/cker/Types.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright 2018 The TensorFlow Authors. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_CKER_TYPES_H__
+#define __NNFW_CKER_TYPES_H__
+
+#include <cstdint>
+
+namespace nnfw
+{
+namespace cker
+{
+
+enum class FusedActivationFunctionType
+{
+  kNone = 0,
+  kRelu6 = 1,
+  kRelu1 = 2,
+  kRelu = 3,
+};
+enum class PaddingType
+{
+  kNone = 0,
+  kSame = 1,
+  kValid = 2,
+};
+
+struct PaddingValues
+{
+  int16_t width;
+  int16_t height;
+};
+
+} // namespace cker
+} // namespace nnfw
+
+#endif // __NNFW_CKER_TYPES_H__
diff --git a/runtimes/libs/cker/include/cker/Utils.h b/runtimes/libs/cker/include/cker/Utils.h
new file mode 100644
index 000000000..84bbbc3c6
--- /dev/null
+++ b/runtimes/libs/cker/include/cker/Utils.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright 2018 The TensorFlow Authors. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_CKER_UTILS_H__
+#define __NNFW_CKER_UTILS_H__
+
+#include <algorithm>
+#include <cstdint>
+
+#include "cker/gemmlowp/FixedPoint.h"
+
+namespace nnfw
+{
+namespace cker
+{
+
+template <typename T>
+inline T ActivationFunctionWithMinMax(T x, T output_activation_min, T output_activation_max)
+{
+  return std::min<T>(std::max<T>(x, output_activation_min), output_activation_max);
+}
+
+inline int32_t MultiplyByQuantizedMultiplier(int32_t x, int32_t quantized_multiplier, int shift)
+{
+  int left_shift = shift > 0 ? shift : 0;
+  int right_shift = shift > 0 ? 0 : -shift;
+  return gemmlowp::RoundingDivideByPOT(
+      gemmlowp::SaturatingRoundingDoublingHighMul(x * (1 << left_shift), quantized_multiplier),
+      right_shift);
+}
+
+inline int32_t MultiplyByQuantizedMultiplierGreaterThanOne(int32_t x, int32_t quantized_multiplier,
+                                                           int left_shift)
+{
+  return gemmlowp::SaturatingRoundingDoublingHighMul(x * (1 << left_shift), quantized_multiplier);
+}
+
+inline int CountLeadingZeros(uint32_t integer_input)
+{
+  const uint32_t one_in_leading_positive = 1U << 31;
+  int leading_zeros = 0;
+  while (integer_input < one_in_leading_positive)
+  {
+    integer_input <<= 1;
+    ++leading_zeros;
+  }
+  return leading_zeros;
+}
+
+} // namespace cker
+} // namespace nnfw
+
+#endif // __NNFW_CKER_UTILS_H__
diff --git a/runtimes/libs/cker/include/cker/gemmlowp/FixedPoint.h b/runtimes/libs/cker/include/cker/gemmlowp/FixedPoint.h
new file mode 100644
index 000000000..159e01a22
--- /dev/null
+++ b/runtimes/libs/cker/include/cker/gemmlowp/FixedPoint.h
@@ -0,0 +1,289 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright 2015 The Gemmlowp Authors. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_CKER_GEMMLOWP_FIXED_POINT_H__
+#define __NNFW_CKER_GEMMLOWP_FIXED_POINT_H__
+
+#include <algorithm>
+#include <cassert>
+
+namespace nnfw
+{
+namespace cker
+{
+namespace gemmlowp
+{
+
+inline int32_t RoundingHalfSum(int32_t a, int32_t b)
+{
+  int64_t a64 = a;
+  int64_t b64 = b;
+  int64_t sum = a64 + b64;
+  int64_t sign = sum >= 0 ? 1 : -1;
+  return static_cast<int32_t>((sum + sign) / 2);
+}
+
+inline int32_t SaturatingRoundingDoublingHighMul(int32_t a, int32_t b)
+{
+  bool overflow = a == b && a == std::numeric_limits<int32_t>::min();
+  int64_t a_64(a);
+  int64_t b_64(b);
+  int64_t ab_64 = a_64 * b_64;
+  int32_t nudge = ab_64 >= 0 ? (1 << 30) : (1 - (1 << 30));
+  int32_t ab_x2_high32 = static_cast<int32_t>((ab_64 + nudge) / (1ll << 31));
+  return overflow ? std::numeric_limits<int32_t>::max() : ab_x2_high32;
+}
+
+// Correctly-rounded-to-nearest division by a power-of-two.
+// Also known as a rounding arithmetic right shift.
+inline int32_t RoundingDivideByPOT(int32_t x, int exponent)
+{
+  assert(exponent >= 0);
+  assert(exponent <= 31);
+  const int32_t mask = ((1ll << exponent) - 1);
+  const int32_t zero = 0;
+  const int32_t one = 1;
+  const int32_t remainder = x & mask;
+  const int32_t threshold = (mask >> 1) + ((x < zero) ? one : zero);
+  return ((x >> exponent) + ((remainder > threshold) ? one : zero));
+}
+
+// Returns the product of a run-time integer value by a compile-time power
+// of two, with either a positive exponent (equivalent to an arithmetic
+// left shift, saturating) or a negative exponent (equivalent to an arithmetic
+// right shift, rounding to nearest).
+template <int Exponent, int ExponentSign = (Exponent > 0 ? 1 : Exponent < 0 ? -1 : 0)>
+struct ImplSaturatingRoundingMultiplyByPOT
+{
+};
+
+template <int Exponent> struct ImplSaturatingRoundingMultiplyByPOT<Exponent, 0>
+{
+  static int32_t eval(int32_t x) { return x; }
+};
+
+template <int Exponent> struct ImplSaturatingRoundingMultiplyByPOT<Exponent, 1>
+{
+  static int32_t eval(int32_t x)
+  {
+    const int32_t min = (std::numeric_limits<int32_t>::min());
+    const int32_t max = (std::numeric_limits<int32_t>::max());
+    const int32_t threshold = ((1 << (31 - Exponent)) - 1);
+    const int32_t zero = 0;
+    const int32_t one = 1;
+
+    const int32_t positive_mask = ((x > threshold) ? ~zero : zero);
+    const int32_t negative_mask = ((x < -threshold) ? ~zero : zero);
+
+    int32_t result = (x * (one << Exponent));
+    result = (positive_mask ? max : result);
+    result = (negative_mask ? min : result);
+    return result;
+  }
+};
+
+template <int Exponent> struct ImplSaturatingRoundingMultiplyByPOT<Exponent, -1>
+{
+  static int32_t eval(int32_t x) { return RoundingDivideByPOT(x, -Exponent); }
+};
+
+template <int Exponent> int32_t SaturatingRoundingMultiplyByPOT(int32_t x)
+{
+  return ImplSaturatingRoundingMultiplyByPOT<Exponent>::eval(x);
+}
+
+template <int tIntegerBits> class FixedPoint
+{
+public:
+  static constexpr int kTotalBits = 8 * sizeof(int32_t);
+  static constexpr int kIntegerBits = tIntegerBits;
+  static constexpr int kFractionalBits = kTotalBits - 1 - kIntegerBits;
+  static_assert(kIntegerBits >= 0 && kIntegerBits < kTotalBits, "bad IntegerBits");
+
+  static int32_t ScalarRawMax() { return std::numeric_limits<int32_t>::max(); }
+
+  static FixedPoint FromRaw(int32_t x)
+  {
+    FixedPoint retval;
+    retval.raw() = x;
+    return retval;
+  }
+
+  static FixedPoint FromScalarRaw(int32_t x) { return FromRaw(x); }
+
+  template <int Exponent> static FixedPoint ConstantPOT()
+  {
+    static constexpr int kOffset = kFractionalBits + Exponent;
+    static_assert(kOffset < 31, "Constant not exactly representable in this fixed-point format");
+    return FromScalarRaw((int32_t)1 << kOffset);
+  }
+
+  static FixedPoint Zero() { return FromScalarRaw(0); }
+
+  static FixedPoint One()
+  {
+    return FromScalarRaw(kIntegerBits == 0 ? ScalarRawMax() : ((int32_t)1 << kFractionalBits));
+  }
+
+  int32_t raw() const { return i_; }
+  int32_t &raw() { return i_; }
+
+private:
+  int32_t i_;
+};
+
+// A FixedPoint multiplication is just a
+// SaturatingRoundingDoublingHighMul operation on the underlying
+// raw integer values. The IntegerBits simply add up, as is obvious
+// from the fact that the range is [-2^IntegerBits, 2^IntegerBits).
+template <int tIntegerBits_a, int tIntegerBits_b>
+FixedPoint<tIntegerBits_a + tIntegerBits_b> operator*(FixedPoint<tIntegerBits_a> a,
+                                                      FixedPoint<tIntegerBits_b> b)
+{
+  FixedPoint<tIntegerBits_a + tIntegerBits_b> c;
+  c.raw() = SaturatingRoundingDoublingHighMul(a.raw(), b.raw());
+  return c;
+}
+
+// Tweaking IntegerBits gives exact multiplication by a power of two.
+template <int tExponent, int tIntegerBits>
+FixedPoint<tExponent + tIntegerBits> ExactMulByPot(FixedPoint<tIntegerBits> a)
+{
+  FixedPoint<tExponent + tIntegerBits> c;
+  c.raw() = a.raw();
+  return c;
+}
+
+template <int tIntegerBits>
+FixedPoint<tIntegerBits> operator+(FixedPoint<tIntegerBits> a, FixedPoint<tIntegerBits> b)
+{
+  return FixedPoint<tIntegerBits>::FromRaw((a.raw() + b.raw()));
+}
+template <int tIntegerBits>
+FixedPoint<tIntegerBits> operator-(FixedPoint<tIntegerBits> a, FixedPoint<tIntegerBits> b)
+{
+  return FixedPoint<tIntegerBits>::FromRaw((a.raw() - b.raw()));
+}
+template <int tIntegerBits>
+FixedPoint<tIntegerBits> operator&(FixedPoint<tIntegerBits> a, FixedPoint<tIntegerBits> b)
+{
+  return FixedPoint<tIntegerBits>::FromRaw((a.raw() & b.raw()));
+}
+
+// Rescale changes the number of IntegerBits and updates the underlying
+// raw integer value accordingly.
+template <int tIntegerBitsDst, int tIntegerBitsSrc>
+FixedPoint<tIntegerBitsDst> Rescale(FixedPoint<tIntegerBitsSrc> x)
+{
+  static constexpr int kExponent = tIntegerBitsSrc - tIntegerBitsDst;
+  FixedPoint<tIntegerBitsDst> result;
+  result.raw() = SaturatingRoundingMultiplyByPOT<kExponent>(x.raw());
+  return result;
+}
+
+// Implementation of exponential function.
+
+// Returns exp(x) for x in [-1/4, 0).
+inline FixedPoint<0> exp_on_interval_between_negative_one_quarter_and_0_excl(FixedPoint<0> a)
+{
+  typedef FixedPoint<0> F;
+  const F constant_term = F::FromScalarRaw(RoundingDivideByPOT(1895147668, 0));
+  const F constant_1_over_3 = F::FromScalarRaw(RoundingDivideByPOT(715827883, 0));
+  // We're evaluating a Taylor expansion around -1/8, so we do the change of
+  // variable: x = a + 1/8.
+  // In fixed-point with 0 integer bits, 1/8 is represented by 1 << 28.
+  F x = a + F::template ConstantPOT<-3>();
+  F x2 = x * x;
+  F x3 = x2 * x;
+  F x4 = x2 * x2;
+  F x4_over_4 = F::FromScalarRaw(SaturatingRoundingMultiplyByPOT<-2>(x4.raw()));
+  F x4_over_24_plus_x3_over_6_plus_x2_over_2 = F::FromScalarRaw(
+      SaturatingRoundingMultiplyByPOT<-1>((((x4_over_4 + x3) * constant_1_over_3) + x2).raw()));
+  return (constant_term + constant_term * (x + x4_over_24_plus_x3_over_6_plus_x2_over_2));
+}
+
+// Returns exp(x) for x < 0.
+template <int tIntegerBits> FixedPoint<0> exp_on_negative_values(FixedPoint<tIntegerBits> a)
+{
+  typedef FixedPoint<tIntegerBits> InputF;
+  typedef FixedPoint<0> ResultF;
+  static constexpr int kFractionalBits = InputF::kFractionalBits;
+  static constexpr int kIntegerBits = InputF::kIntegerBits;
+  const InputF kOneQuarter = InputF::template ConstantPOT<-2>();
+  InputF mask = kOneQuarter - InputF::FromScalarRaw(1);
+  InputF a_mod_quarter_minus_one_quarter = (a & mask) - kOneQuarter;
+  ResultF result = exp_on_interval_between_negative_one_quarter_and_0_excl(
+      Rescale<0>(a_mod_quarter_minus_one_quarter));
+  int32_t remainder = (a_mod_quarter_minus_one_quarter - a).raw();
+
+#define GEMMLOWP_EXP_BARREL_SHIFTER(Exponent, FixedPointMultiplier)                 \
+  if (kIntegerBits > Exponent)                                                      \
+  {                                                                                 \
+    const ResultF kMultiplier =                                                     \
+        ResultF::FromScalarRaw(RoundingDivideByPOT(FixedPointMultiplier, 0));       \
+    static constexpr int kShiftAmount =                                             \
+        ((kIntegerBits > Exponent) ? (kFractionalBits + Exponent) : 0);             \
+    result = ((remainder & (1 << kShiftAmount)) ? (result * kMultiplier) : result); \
+  }
+
+  GEMMLOWP_EXP_BARREL_SHIFTER(-2, 1672461947);
+  GEMMLOWP_EXP_BARREL_SHIFTER(-1, 1302514674);
+  GEMMLOWP_EXP_BARREL_SHIFTER(+0, 790015084);
+  GEMMLOWP_EXP_BARREL_SHIFTER(+1, 290630308);
+  GEMMLOWP_EXP_BARREL_SHIFTER(+2, 39332535);
+  GEMMLOWP_EXP_BARREL_SHIFTER(+3, 720401);
+  GEMMLOWP_EXP_BARREL_SHIFTER(+4, 242);
+
+#undef GEMMLOWP_EXP_BARREL_SHIFTER
+
+  static constexpr int clampB = ((kIntegerBits > 5) ? (36 - kIntegerBits) : 0);
+  if (kIntegerBits > 5)
+  {
+    const InputF clamp = InputF::FromScalarRaw(RoundingDivideByPOT(-(1 << clampB), 0));
+    result.raw() = ((a.raw() < clamp.raw()) ? ResultF::Zero().raw() : result.raw());
+  }
+
+  result.raw() = (a.raw() ? result.raw() : ResultF::One().raw());
+  return result;
+}
+
+// Returns 1 / (1 + x) for x in (0, 1).
+inline FixedPoint<0> one_over_one_plus_x_for_x_in_0_1(FixedPoint<0> a)
+{
+  typedef FixedPoint<0> F0;
+  typedef FixedPoint<2> F2;
+  F0 half_denominator = F0::FromScalarRaw(RoundingHalfSum(a.raw(), F0::One().raw()));
+  // Newton-Raphson division
+  // https://en.wikipedia.org/wiki/Division_algorithm#Newton.E2.80.93Raphson_division
+  // Refer to that page for the logic behind the 48/17 and 32/17 constants.
+  const F2 constant_48_over_17 = F2::FromScalarRaw(RoundingDivideByPOT(1515870810, 0));
+  const F2 constant_neg_32_over_17 = F2::FromScalarRaw(RoundingDivideByPOT(-1010580540, 0));
+  F2 x = constant_48_over_17 + half_denominator * constant_neg_32_over_17;
+  for (int i = 0; i < 3; i++)
+  {
+    F2 half_denominator_times_x = half_denominator * x;
+    F2 one_minus_half_denominator_times_x = F2::One() - half_denominator_times_x;
+    x = x + Rescale<2>(x * one_minus_half_denominator_times_x);
+  }
+  return Rescale<0>(ExactMulByPot<-1>(x));
+}
+
+} // namespace gemmlowp
+} // namespace cker
+} // namespace nnfw
+
+#endif // __NNFW_CKER_GEMMLOWP_FIXED_POINT_H__
diff --git a/runtimes/libs/cker/include/cker/operation/Add.h b/runtimes/libs/cker/include/cker/operation/Add.h
new file mode 100644
index 000000000..703d617f8
--- /dev/null
+++ b/runtimes/libs/cker/include/cker/operation/Add.h
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_CKER_ADD_H__
+#define __NNFW_CKER_ADD_H__
+
+#include "cker/Shape.h"
+#include "cker/Types.h"
+#include "cker/Utils.h"
+
+namespace nnfw
+{
+namespace cker
+{
+
+struct AddParam
+{
+  // Shape dependent / common to data / op types.
+  // BroadcastableOpCategory broadcast_category;
+  // uint8 inference params.
+  int32_t input1_offset;
+  int32_t input2_offset;
+  int32_t output_offset;
+  int32_t output_multiplier;
+  int32_t output_shift;
+  // Add / Sub, not Mul, uint8 inference params.
+  int32_t left_shift;
+  int32_t input1_multiplier;
+  int32_t input1_shift;
+  int32_t input2_multiplier;
+  int32_t input2_shift;
+  // uint8, etc, activation params.
+  int32_t quantized_activation_min;
+  int32_t quantized_activation_max;
+  // float activation params.
+  float float_activation_min;
+  float float_activation_max;
+
+  // Processed output dimensions.
+  // Let input "a" be the one that broadcasts in the faster-changing dimension.
+  // Then, after coalescing, for shapes {a0, a1, a2, a3, a4} and
+  // {b0, b1, b2, b3, b4},
+  // broadcast_shape[4] = b0 = a0.
+  // broadcast_shape[3] = b1; a1 = 1.
+  // broadcast_shape[2] = b2 = a2.
+  // broadcast_shape[1] = a3; b3 = 1.
+  // broadcast_shape[0] = b4 = a4.
+  // int broadcast_shape[5];
+};
+
+template <typename T>
+inline void Add(const AddParam &params, const Shape &input1_shape, const T *input1_data,
+                const Shape &input2_shape, const T *input2_data, const Shape &output_shape,
+                T *output_data)
+{
+  const int32_t flat_size = MatchingFlatSize(input1_shape, input2_shape, output_shape);
+  for (int i = 0; i < flat_size; ++i)
+  {
+    output_data[i] = ActivationFunctionWithMinMax(input1_data[i] + input2_data[i],
+                                                  params.quantized_activation_min,
+                                                  params.quantized_activation_max);
+  }
+}
+
+inline void Add(const AddParam &params, const Shape &input1_shape, const float *input1_data,
+                const Shape &input2_shape, const float *input2_data, const Shape &output_shape,
+                float *output_data)
+{
+  const int size = MatchingFlatSize(input1_shape, input2_shape, output_shape);
+  for (int i = 0; i < size; i++)
+  {
+    auto x = input1_data[i] + input2_data[i];
+    output_data[i] =
+        ActivationFunctionWithMinMax(x, params.float_activation_min, params.float_activation_max);
+  }
+}
+
+} // namespace cker
+} // namespace nnfw
+
+#endif // __NNFW_CKER_ADD_H__
diff --git a/runtimes/libs/cker/include/cker/operation/AveragePool.h b/runtimes/libs/cker/include/cker/operation/AveragePool.h
new file mode 100644
index 000000000..81e99336f
--- /dev/null
+++ b/runtimes/libs/cker/include/cker/operation/AveragePool.h
@@ -0,0 +1,160 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_CKER_AVERAGE_POOL_H__
+#define __NNFW_CKER_AVERAGE_POOL_H__
+
+#include "cker/Shape.h"
+#include "cker/Types.h"
+#include "cker/Utils.h"
+
+namespace nnfw
+{
+namespace cker
+{
+
+struct AveragePoolParams
+{
+  FusedActivationFunctionType activation;
+  PaddingType padding_type;
+  PaddingValues padding_values;
+  int stride_height;
+  int stride_width;
+  int filter_height;
+  int filter_width;
+  // uint8, etc, activation params.
+  int32_t quantized_activation_min;
+  int32_t quantized_activation_max;
+  // float activation params.
+  float float_activation_min;
+  float float_activation_max;
+};
+
+inline void AveragePool(const AveragePoolParams &params, const Shape &input_shape,
+                        const float *input_data, const Shape &output_shape, float *output_data)
+{
+  assert(input_shape.DimensionsCount() == 4);
+  assert(output_shape.DimensionsCount() == 4);
+  const int batches = MatchingDim(input_shape, 0, output_shape, 0);
+  const int depth = MatchingDim(input_shape, 3, output_shape, 3);
+  const int input_height = input_shape.Dims(1);
+  const int input_width = input_shape.Dims(2);
+  const int output_height = output_shape.Dims(1);
+  const int output_width = output_shape.Dims(2);
+  const int stride_height = params.stride_height;
+  const int stride_width = params.stride_width;
+  for (int batch = 0; batch < batches; ++batch)
+  {
+    for (int out_y = 0; out_y < output_height; ++out_y)
+    {
+      for (int out_x = 0; out_x < output_width; ++out_x)
+      {
+        const int in_x_origin = (out_x * stride_width) - params.padding_values.width;
+        const int in_y_origin = (out_y * stride_height) - params.padding_values.height;
+        // Compute the boundaries of the filter region clamped so as to
+        // ensure that the filter window fits in the input array.
+        const int filter_x_start = std::max(0, -in_x_origin);
+        const int filter_x_end = std::min(params.filter_width, input_width - in_x_origin);
+        const int filter_y_start = std::max(0, -in_y_origin);
+        const int filter_y_end = std::min(params.filter_height, input_height - in_y_origin);
+        int filter_count = (filter_y_end - filter_y_start) * (filter_x_end - filter_x_start);
+        if (filter_count <= 0)
+        {
+          continue;
+        }
+        for (int channel = 0; channel < depth; ++channel)
+        {
+          float total = 0.f;
+          for (int filter_y = filter_y_start; filter_y < filter_y_end; ++filter_y)
+          {
+            for (int filter_x = filter_x_start; filter_x < filter_x_end; ++filter_x)
+            {
+              const int in_x = in_x_origin + filter_x;
+              const int in_y = in_y_origin + filter_y;
+              total += input_data[Offset(input_shape, batch, in_y, in_x, channel)];
+            }
+          }
+          const float average = total / (float)filter_count;
+          output_data[Offset(output_shape, batch, out_y, out_x, channel)] =
+              ActivationFunctionWithMinMax(average, params.float_activation_min,
+                                           params.float_activation_max);
+        }
+      }
+    }
+  }
+}
+
+inline void AveragePool(const AveragePoolParams &params, const Shape &input_shape,
+                        const uint8_t *input_data, const Shape &output_shape, uint8_t *output_data)
+{
+  assert(params.quantized_activation_min <= params.quantized_activation_max);
+  assert(input_shape.DimensionsCount() == 4);
+  assert(output_shape.DimensionsCount() == 4);
+  const int batches = MatchingDim(input_shape, 0, output_shape, 0);
+  const int depth = MatchingDim(input_shape, 3, output_shape, 3);
+  const int input_height = input_shape.Dims(1);
+  const int input_width = input_shape.Dims(2);
+  const int output_height = output_shape.Dims(1);
+  const int output_width = output_shape.Dims(2);
+  const int stride_height = params.stride_height;
+  const int stride_width = params.stride_width;
+  for (int batch = 0; batch < batches; ++batch)
+  {
+    for (int out_y = 0; out_y < output_height; ++out_y)
+    {
+      for (int out_x = 0; out_x < output_width; ++out_x)
+      {
+        const int in_x_origin = (out_x * stride_width) - params.padding_values.width;
+        const int in_y_origin = (out_y * stride_height) - params.padding_values.height;
+        // Compute the boundaries of the filter region clamped so as to
+        // ensure that the filter window fits in the input array.
+        const int filter_x_start = std::max(0, -in_x_origin);
+        const int filter_x_end = std::min(params.filter_width, input_width - in_x_origin);
+        const int filter_y_start = std::max(0, -in_y_origin);
+        const int filter_y_end = std::min(params.filter_height, input_height - in_y_origin);
+        int filter_count = (filter_y_end - filter_y_start) * (filter_x_end - filter_x_start);
+        if (filter_count <= 0)
+        {
+          continue;
+        }
+        for (int channel = 0; channel < depth; ++channel)
+        {
+          int32_t acc = 0;
+          for (int filter_y = filter_y_start; filter_y < filter_y_end; ++filter_y)
+          {
+            for (int filter_x = filter_x_start; filter_x < filter_x_end; ++filter_x)
+            {
+              const int in_x = in_x_origin + filter_x;
+              const int in_y = in_y_origin + filter_y;
+              acc += input_data[Offset(input_shape, batch, in_y, in_x, channel)];
+            }
+          }
+          acc = (acc + filter_count / 2) / filter_count;
+          acc = std::max(acc, params.quantized_activation_min);
+          acc = std::min(acc, params.quantized_activation_max);
+          output_data[Offset(output_shape, batch, out_y, out_x, channel)] =
+              static_cast<uint8_t>(acc);
+        }
+      }
+    }
+  }
+}
+
+} // namespace cker
+} // namespace nnfw
+
+#endif // __NNFW_CKER_AVERAGE_POOL_H__
diff --git a/runtimes/libs/cker/include/cker/operation/Concatenation.h b/runtimes/libs/cker/include/cker/operation/Concatenation.h
new file mode 100644
index 000000000..69a179c8c
--- /dev/null
+++ b/runtimes/libs/cker/include/cker/operation/Concatenation.h
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_CKER_CONCATENATION_H__
+#define __NNFW_CKER_CONCATENATION_H__
+
+#include <cstdint>
+
+#include "cker/Shape.h"
+
+namespace nnfw
+{
+namespace cker
+{
+
+struct ConcatenationParams
+{
+  int8_t axis;
+  const int32_t *input_zeropoint;
+  const float *input_scale;
+  uint16_t inputs_count;
+  int32_t output_zeropoint;
+  float output_scale;
+};
+
+template <typename Scalar>
+inline void Concatenation(const ConcatenationParams &params, const Shape *const *input_shapes,
+                          const Scalar *const *input_data, const Shape &output_shape,
+                          Scalar *output_data)
+{
+  int axis = params.axis;
+  int inputs_count = params.inputs_count;
+  const int concat_dimensions = output_shape.DimensionsCount();
+  assert(axis < concat_dimensions);
+
+  int64_t concat_size = 0;
+  for (int i = 0; i < inputs_count; i++)
+  {
+    assert(input_shapes[i]->DimensionsCount() == concat_dimensions);
+    for (int j = 0; j < concat_dimensions; j++)
+    {
+      if (j != axis)
+      {
+        auto dim_checked = MatchingDim(*input_shapes[i], j, output_shape, j);
+        UNUSED_RELEASE(dim_checked);
+      }
+    }
+    concat_size += input_shapes[i]->Dims(axis);
+  }
+  assert(concat_size == output_shape.Dims(axis));
+  int64_t outer_size = 1;
+  for (int i = 0; i < axis; ++i)
+  {
+    outer_size *= output_shape.Dims(i);
+  }
+  // For all input arrays,
+  // FlatSize() = outer_size * Dims(axis) * base_inner_size;
+  int64_t base_inner_size = 1;
+  for (int i = axis + 1; i < concat_dimensions; ++i)
+  {
+    base_inner_size *= output_shape.Dims(i);
+  }
+
+  Scalar *output_ptr = output_data;
+  for (int k = 0; k < outer_size; k++)
+  {
+    for (int i = 0; i < inputs_count; ++i)
+    {
+      const int copy_size = input_shapes[i]->Dims(axis) * base_inner_size;
+      memcpy(output_ptr, input_data[i] + k * copy_size, copy_size * sizeof(Scalar));
+      output_ptr += copy_size;
+    }
+  }
+}
+
+} // namespace cker
+} // namespace nnfw
+
+#endif // __NNFW_CKER_CONCATENATION_H__
diff --git a/runtimes/libs/cker/include/cker/operation/Conv.h b/runtimes/libs/cker/include/cker/operation/Conv.h
new file mode 100644
index 000000000..35b0336fa
--- /dev/null
+++ b/runtimes/libs/cker/include/cker/operation/Conv.h
@@ -0,0 +1,217 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_CKER_CONV_H__
+#define __NNFW_CKER_CONV_H__
+
+#include "cker/Types.h"
+#include "cker/Shape.h"
+#include "cker/Utils.h"
+
+namespace nnfw
+{
+namespace cker
+{
+
+struct ConvParams
+{
+  PaddingType padding_type;
+  PaddingValues padding_values;
+  // TODO(starka): This was just "stride", so check that width+height is OK.
+  int16_t stride_width;
+  int16_t stride_height;
+  int16_t dilation_width_factor;
+  int16_t dilation_height_factor;
+  // uint8_t inference params.
+  // TODO(b/65838351): Use smaller types if appropriate.
+  int32_t input_offset;
+  int32_t weights_offset;
+  int32_t output_offset;
+  int32_t output_multiplier;
+  int output_shift;
+  // uint8_t, etc, activation params.
+  int32_t quantized_activation_min;
+  int32_t quantized_activation_max;
+  // float activation params.
+  float float_activation_min;
+  float float_activation_max;
+};
+
+inline void Conv(const ConvParams &params, const Shape &input_shape, const float *input_data,
+                 const Shape &filter_shape, const float *filter_data, const Shape &bias_shape,
+                 const float *bias_data, const Shape &output_shape, float *output_data)
+{
+  const int stride_width = params.stride_width;
+  const int stride_height = params.stride_height;
+  const int dilation_width_factor = params.dilation_width_factor;
+  const int dilation_height_factor = params.dilation_height_factor;
+  const int pad_width = params.padding_values.width;
+  const int pad_height = params.padding_values.height;
+  const float output_activation_min = params.float_activation_min;
+  const float output_activation_max = params.float_activation_max;
+  assert(input_shape.DimensionsCount() == 4);
+  assert(filter_shape.DimensionsCount() == 4);
+  assert(output_shape.DimensionsCount() == 4);
+  UNUSED_RELEASE(bias_shape);
+
+  const int batches = MatchingDim(input_shape, 0, output_shape, 0);
+  const int input_depth = MatchingDim(input_shape, 3, filter_shape, 3);
+  const int output_depth = MatchingDim(filter_shape, 0, output_shape, 3);
+  if (bias_data)
+  {
+    assert(bias_shape.FlatSize() == output_depth);
+  }
+  const int input_height = input_shape.Dims(1);
+  const int input_width = input_shape.Dims(2);
+  const int filter_height = filter_shape.Dims(1);
+  const int filter_width = filter_shape.Dims(2);
+  const int output_height = output_shape.Dims(1);
+  const int output_width = output_shape.Dims(2);
+  for (int batch = 0; batch < batches; ++batch)
+  {
+    for (int out_y = 0; out_y < output_height; ++out_y)
+    {
+      for (int out_x = 0; out_x < output_width; ++out_x)
+      {
+        for (int out_channel = 0; out_channel < output_depth; ++out_channel)
+        {
+          const int in_x_origin = (out_x * stride_width) - pad_width;
+          const int in_y_origin = (out_y * stride_height) - pad_height;
+          float total = 0.f;
+          for (int filter_y = 0; filter_y < filter_height; ++filter_y)
+          {
+            for (int filter_x = 0; filter_x < filter_width; ++filter_x)
+            {
+              const int in_x = in_x_origin + dilation_width_factor * filter_x;
+              const int in_y = in_y_origin + dilation_height_factor * filter_y;
+              // If the location is outside the bounds of the input image,
+              // use zero as a default value.
+              if ((in_x >= 0) && (in_x < input_width) && (in_y >= 0) && (in_y < input_height))
+              {
+                const int in_offset = Offset(input_shape, batch, in_y, in_x, 0);
+                const int filter_offset = Offset(filter_shape, out_channel, filter_y, filter_x, 0);
+                for (int in_channel = 0; in_channel < input_depth; ++in_channel)
+                {
+                  float input_value = input_data[in_offset + in_channel];
+                  float filter_value = filter_data[filter_offset + in_channel];
+                  total += (input_value * filter_value);
+                }
+              }
+            }
+          }
+          float bias_value = 0.0f;
+          if (bias_data)
+          {
+            bias_value = bias_data[out_channel];
+          }
+          output_data[Offset(output_shape, batch, out_y, out_x, out_channel)] =
+              ActivationFunctionWithMinMax(total + bias_value, output_activation_min,
+                                           output_activation_max);
+        }
+      }
+    }
+  }
+}
+
+inline void Conv(const ConvParams &params, const Shape &input_shape, const uint8_t *input_data,
+                 const Shape &filter_shape, const uint8_t *filter_data, const Shape &bias_shape,
+                 const int32_t *bias_data, const Shape &output_shape, uint8_t *output_data)
+{
+  const int stride_width = params.stride_width;
+  const int stride_height = params.stride_height;
+  const int dilation_width_factor = params.dilation_width_factor;
+  const int dilation_height_factor = params.dilation_height_factor;
+  const int pad_width = params.padding_values.width;
+  const int pad_height = params.padding_values.height;
+  const int32_t input_offset = params.input_offset;
+  const int32_t filter_offset = params.weights_offset;
+  const int32_t output_offset = params.output_offset;
+  const int32_t output_multiplier = params.output_multiplier;
+  const int output_shift = params.output_shift;
+  const int32_t output_activation_min = params.quantized_activation_min;
+  const int32_t output_activation_max = params.quantized_activation_max;
+  assert(output_activation_min <= output_activation_max);
+
+  assert(input_shape.DimensionsCount() == 4);
+  assert(filter_shape.DimensionsCount() == 4);
+  assert(output_shape.DimensionsCount() == 4);
+  UNUSED_RELEASE(bias_shape);
+  const int batches = MatchingDim(input_shape, 0, output_shape, 0);
+  const int input_depth = MatchingDim(input_shape, 3, filter_shape, 3);
+  const int output_depth = MatchingDim(filter_shape, 0, output_shape, 3);
+  if (bias_data)
+  {
+    assert(bias_shape.FlatSize() == output_depth);
+  }
+  const int input_height = input_shape.Dims(1);
+  const int input_width = input_shape.Dims(2);
+  const int filter_height = filter_shape.Dims(1);
+  const int filter_width = filter_shape.Dims(2);
+  const int output_height = output_shape.Dims(1);
+  const int output_width = output_shape.Dims(2);
+  for (int batch = 0; batch < batches; ++batch)
+  {
+    for (int out_y = 0; out_y < output_height; ++out_y)
+    {
+      for (int out_x = 0; out_x < output_width; ++out_x)
+      {
+        for (int out_channel = 0; out_channel < output_depth; ++out_channel)
+        {
+          const int in_x_origin = (out_x * stride_width) - pad_width;
+          const int in_y_origin = (out_y * stride_height) - pad_height;
+          int32_t acc = 0;
+          for (int filter_y = 0; filter_y < filter_height; ++filter_y)
+          {
+            for (int filter_x = 0; filter_x < filter_width; ++filter_x)
+            {
+              const int in_x = in_x_origin + dilation_width_factor * filter_x;
+              const int in_y = in_y_origin + dilation_height_factor * filter_y;
+              // If the location is outside the bounds of the input image,
+              // use zero as a default value.
+              const int in_base = Offset(input_shape, batch, in_y, in_x, 0);
+              const int filter_base = Offset(filter_shape, out_channel, filter_y, filter_x, 0);
+              if ((in_x >= 0) && (in_x < input_width) && (in_y >= 0) && (in_y < input_height))
+              {
+                for (int in_channel = 0; in_channel < input_depth; in_channel++)
+                {
+                  int32_t input_val = input_data[in_channel + in_base];
+                  int32_t filter_val = filter_data[in_channel + filter_base];
+                  acc += (filter_val + filter_offset) * (input_val + input_offset);
+                }
+              }
+            }
+          }
+          if (bias_data)
+          {
+            acc += bias_data[out_channel];
+          }
+          acc = MultiplyByQuantizedMultiplier(acc, output_multiplier, output_shift);
+          acc += output_offset;
+          acc = std::max(acc, output_activation_min);
+          acc = std::min(acc, output_activation_max);
+          output_data[Offset(output_shape, batch, out_y, out_x, out_channel)] =
+              static_cast<uint8_t>(acc);
+        }
+      }
+    }
+  }
+}
+
+} // namespace cker
+} // namespace nnfw
+
+#endif // __NNFW_CKER_CONCATENATION_H_
diff --git a/runtimes/libs/cker/include/cker/operation/DepthwiseConv.h b/runtimes/libs/cker/include/cker/operation/DepthwiseConv.h
new file mode 100644
index 000000000..7d022477d
--- /dev/null
+++ b/runtimes/libs/cker/include/cker/operation/DepthwiseConv.h
@@ -0,0 +1,217 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_CKER_DEPTHWISE_CONV_H__
+#define __NNFW_CKER_DEPTHWISE_CONV_H__
+
+#include "cker/Shape.h"
+#include "cker/Types.h"
+#include "cker/Utils.h"
+
+namespace nnfw
+{
+namespace cker
+{
+
+struct DepthwiseConvParams
+{
+  PaddingType padding_type;
+  PaddingValues padding_values;
+  int16_t stride_width;
+  int16_t stride_height;
+  int16_t dilation_width_factor;
+  int16_t dilation_height_factor;
+  int16_t depth_multiplier;
+  // uint8 inference params.
+  // TODO(b/65838351): Use smaller types if appropriate.
+  int32_t input_offset;
+  int32_t weights_offset;
+  int32_t output_offset;
+  int32_t output_multiplier;
+  int output_shift;
+  // uint8, etc, activation params.
+  int32_t quantized_activation_min;
+  int32_t quantized_activation_max;
+  // float activation params.
+  float float_activation_min;
+  float float_activation_max;
+};
+
+inline void DepthwiseConv(const DepthwiseConvParams &params, const Shape &input_shape,
+                          const uint8_t *input_data, const Shape &filter_shape,
+                          const uint8_t *filter_data, const Shape &bias_shape,
+                          const int32_t *bias_data, const Shape &output_shape, uint8_t *output_data)
+{
+  const int stride_width = params.stride_width;
+  const int stride_height = params.stride_height;
+  const int dilation_width_factor = params.dilation_width_factor;
+  const int dilation_height_factor = params.dilation_height_factor;
+  const int pad_width = params.padding_values.width;
+  const int pad_height = params.padding_values.height;
+  const int depth_multiplier = params.depth_multiplier;
+  const int32_t output_activation_min = params.quantized_activation_min;
+  const int32_t output_activation_max = params.quantized_activation_max;
+  const int32_t input_offset = params.input_offset;
+  const int32_t filter_offset = params.weights_offset;
+  const int32_t output_offset = params.output_offset;
+  const int32_t output_multiplier = params.output_multiplier;
+  const int output_shift = params.output_shift;
+  assert(input_shape.DimensionsCount() == 4);
+  assert(filter_shape.DimensionsCount() == 4);
+  assert(output_shape.DimensionsCount() == 4);
+
+  assert(output_activation_min <= output_activation_max);
+  const int batches = MatchingDim(input_shape, 0, output_shape, 0);
+  const int output_depth = MatchingDim(filter_shape, 3, output_shape, 3);
+  const int input_height = input_shape.Dims(1);
+  const int input_width = input_shape.Dims(2);
+  const int input_depth = input_shape.Dims(3);
+  const int filter_height = filter_shape.Dims(1);
+  const int filter_width = filter_shape.Dims(2);
+  const int output_height = output_shape.Dims(1);
+  const int output_width = output_shape.Dims(2);
+  assert(output_depth == input_depth * depth_multiplier);
+  assert(bias_shape.FlatSize() == output_depth);
+  UNUSED_RELEASE(output_depth);
+  UNUSED_RELEASE(bias_shape);
+
+  for (int b = 0; b < batches; ++b)
+  {
+    for (int out_y = 0; out_y < output_height; ++out_y)
+    {
+      for (int out_x = 0; out_x < output_width; ++out_x)
+      {
+        for (int ic = 0; ic < input_depth; ++ic)
+        {
+          for (int m = 0; m < depth_multiplier; m++)
+          {
+            const int oc = m + ic * depth_multiplier;
+            const int in_x_origin = (out_x * stride_width) - pad_width;
+            const int in_y_origin = (out_y * stride_height) - pad_height;
+            int32_t acc = 0;
+            for (int filter_y = 0; filter_y < filter_height; ++filter_y)
+            {
+              for (int filter_x = 0; filter_x < filter_width; ++filter_x)
+              {
+                const int in_x = in_x_origin + dilation_width_factor * filter_x;
+                const int in_y = in_y_origin + dilation_height_factor * filter_y;
+                // If the location is outside the bounds of the input image,
+                // use zero as a default value.
+                if ((in_x >= 0) && (in_x < input_width) && (in_y >= 0) && (in_y < input_height))
+                {
+                  int32_t input_val = input_data[Offset(input_shape, b, in_y, in_x, ic)];
+                  int32_t filter_val = filter_data[Offset(filter_shape, 0, filter_y, filter_x, oc)];
+                  acc += (filter_val + filter_offset) * (input_val + input_offset);
+                }
+              }
+            }
+            if (bias_data)
+            {
+              acc += bias_data[oc];
+            }
+            acc = MultiplyByQuantizedMultiplier(acc, output_multiplier, output_shift);
+            acc += output_offset;
+            acc = std::max(acc, output_activation_min);
+            acc = std::min(acc, output_activation_max);
+            output_data[Offset(output_shape, b, out_y, out_x, oc)] = static_cast<uint8_t>(acc);
+          }
+        }
+      }
+    }
+  }
+}
+
+inline void DepthwiseConv(const DepthwiseConvParams &params, const Shape &input_shape,
+                          const float *input_data, const Shape &filter_shape,
+                          const float *filter_data, const Shape &bias_shape, const float *bias_data,
+                          const Shape &output_shape, float *output_data)
+{
+  const int stride_width = params.stride_width;
+  const int stride_height = params.stride_height;
+  const int dilation_width_factor = params.dilation_width_factor;
+  const int dilation_height_factor = params.dilation_height_factor;
+  const int pad_width = params.padding_values.width;
+  const int pad_height = params.padding_values.height;
+  const int depth_multiplier = params.depth_multiplier;
+  const float output_activation_min = params.float_activation_min;
+  const float output_activation_max = params.float_activation_max;
+  assert(input_shape.DimensionsCount() == 4);
+  assert(filter_shape.DimensionsCount() == 4);
+  assert(output_shape.DimensionsCount() == 4);
+
+  const int batches = MatchingDim(input_shape, 0, output_shape, 0);
+  const int output_depth = MatchingDim(filter_shape, 3, output_shape, 3);
+  const int input_height = input_shape.Dims(1);
+  const int input_width = input_shape.Dims(2);
+  const int input_depth = input_shape.Dims(3);
+  const int filter_height = filter_shape.Dims(1);
+  const int filter_width = filter_shape.Dims(2);
+  const int output_height = output_shape.Dims(1);
+  const int output_width = output_shape.Dims(2);
+  assert(output_depth == input_depth * depth_multiplier);
+  assert(bias_shape.FlatSize() == output_depth);
+  UNUSED_RELEASE(output_depth);
+  UNUSED_RELEASE(bias_shape);
+
+  for (int b = 0; b < batches; ++b)
+  {
+    for (int out_y = 0; out_y < output_height; ++out_y)
+    {
+      for (int out_x = 0; out_x < output_width; ++out_x)
+      {
+        for (int ic = 0; ic < input_depth; ++ic)
+        {
+          for (int m = 0; m < depth_multiplier; m++)
+          {
+            const int oc = m + ic * depth_multiplier;
+            const int in_x_origin = (out_x * stride_width) - pad_width;
+            const int in_y_origin = (out_y * stride_height) - pad_height;
+            float total = 0.f;
+            for (int filter_y = 0; filter_y < filter_height; ++filter_y)
+            {
+              for (int filter_x = 0; filter_x < filter_width; ++filter_x)
+              {
+                const int in_x = in_x_origin + dilation_width_factor * filter_x;
+                const int in_y = in_y_origin + dilation_height_factor * filter_y;
+                // If the location is outside the bounds of the input image,
+                // use zero as a default value.
+                if ((in_x >= 0) && (in_x < input_width) && (in_y >= 0) && (in_y < input_height))
+                {
+                  float input_value = input_data[Offset(input_shape, b, in_y, in_x, ic)];
+                  float filter_value = filter_data[Offset(filter_shape, 0, filter_y, filter_x, oc)];
+                  total += (input_value * filter_value);
+                }
+              }
+            }
+            float bias_value = 0.0f;
+            if (bias_data)
+            {
+              bias_value = bias_data[oc];
+            }
+            output_data[Offset(output_shape, b, out_y, out_x, oc)] = ActivationFunctionWithMinMax(
+                total + bias_value, output_activation_min, output_activation_max);
+          }
+        }
+      }
+    }
+  }
+}
+
+} // namespace cker
+} // namespace nnfw
+
+#endif // __NNFW_CKER_DEPTHWISE_CONV_H__
diff --git a/runtimes/libs/cker/include/cker/operation/FullyConnected.h b/runtimes/libs/cker/include/cker/operation/FullyConnected.h
new file mode 100644
index 000000000..428fb1b53
--- /dev/null
+++ b/runtimes/libs/cker/include/cker/operation/FullyConnected.h
@@ -0,0 +1,144 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_CKER_FULLY_CONNECTED_H__
+#define __NNFW_CKER_FULLY_CONNECTED_H__
+
+#include "cker/Shape.h"
+#include "cker/Utils.h"
+
+namespace nnfw
+{
+namespace cker
+{
+
+struct FullyConnectedParams
+{
+  // uint8 inference params.
+  // TODO(b/65838351): Use smaller types if appropriate.
+  int32_t input_offset;
+  int32_t weights_offset;
+  int32_t output_offset;
+  int32_t output_multiplier;
+  int output_shift;
+  // uint8, etc, activation params.
+  int32_t quantized_activation_min;
+  int32_t quantized_activation_max;
+  // float activation params.
+  float float_activation_min;
+  float float_activation_max;
+  // FullyConnectedWeightsFormat weights_format;
+};
+
+inline void FullyConnected(const FullyConnectedParams &params, const Shape &input_shape,
+                           const float *input_data, const Shape &weights_shape,
+                           const float *weights_data, const Shape &bias_shape,
+                           const float *bias_data, const Shape &output_shape, float *output_data)
+{
+  UNUSED_RELEASE(input_shape);
+  UNUSED_RELEASE(bias_shape);
+  const float output_activation_min = params.float_activation_min;
+  const float output_activation_max = params.float_activation_max;
+  // TODO(benoitjacob): This really should be:
+  //     const int batches = ArraySize(output_dims, 1);
+  // but the current --variable_batch hack consists in overwriting the 3rd
+  // dimension with the runtime batch size, as we don't keep track for each
+  // array of which dimension is the batch dimension in it.
+  const int output_dims_count = output_shape.DimensionsCount();
+  const int weights_dims_count = weights_shape.DimensionsCount();
+  const int batches = FlatSizeSkipDim(output_shape, output_dims_count - 1);
+  const int output_depth =
+      MatchingDim(weights_shape, weights_dims_count - 2, output_shape, output_dims_count - 1);
+  const int accum_depth = weights_shape.Dims(weights_dims_count - 1);
+  for (int b = 0; b < batches; ++b)
+  {
+    for (int out_c = 0; out_c < output_depth; ++out_c)
+    {
+      float total = 0.f;
+      for (int d = 0; d < accum_depth; ++d)
+      {
+        total += input_data[b * accum_depth + d] * weights_data[out_c * accum_depth + d];
+      }
+      float bias_value = 0.0f;
+      if (bias_data)
+      {
+        bias_value = bias_data[out_c];
+      }
+      output_data[out_c + output_depth * b] = ActivationFunctionWithMinMax(
+          total + bias_value, output_activation_min, output_activation_max);
+    }
+  }
+}
+
+inline void FullyConnected(const FullyConnectedParams &params, const Shape &input_shape,
+                           const uint8_t *input_data, const Shape &filter_shape,
+                           const uint8_t *filter_data, const Shape &bias_shape,
+                           const int32_t *bias_data, const Shape &output_shape,
+                           uint8_t *output_data)
+{
+  UNUSED_RELEASE(input_shape);
+  UNUSED_RELEASE(bias_shape);
+  const int32_t input_offset = params.input_offset;
+  const int32_t filter_offset = params.weights_offset;
+  const int32_t output_offset = params.output_offset;
+  const int32_t output_multiplier = params.output_multiplier;
+  const int output_shift = params.output_shift;
+  const int32_t output_activation_min = params.quantized_activation_min;
+  const int32_t output_activation_max = params.quantized_activation_max;
+  assert(filter_shape.DimensionsCount() >= 2);
+  assert(output_shape.DimensionsCount() >= 1);
+
+  assert(output_activation_min <= output_activation_max);
+  // TODO(benoitjacob): This really should be:
+  //     const int batches = ArraySize(output_dims, 1);
+  // but the current --variable_batch hack consists in overwriting the 3rd
+  // dimension with the runtime batch size, as we don't keep track for each
+  // array of which dimension is the batch dimension in it.
+  const int output_dim_count = output_shape.DimensionsCount();
+  const int filter_dim_count = filter_shape.DimensionsCount();
+  const int batches = FlatSizeSkipDim(output_shape, output_dim_count - 1);
+  const int output_depth =
+      MatchingDim(filter_shape, filter_dim_count - 2, output_shape, output_dim_count - 1);
+  const int accum_depth = filter_shape.Dims(filter_dim_count - 1);
+  for (int b = 0; b < batches; ++b)
+  {
+    for (int out_c = 0; out_c < output_depth; ++out_c)
+    {
+      int32_t acc = 0;
+      for (int d = 0; d < accum_depth; ++d)
+      {
+        int32_t input_val = input_data[b * accum_depth + d];
+        int32_t filter_val = filter_data[out_c * accum_depth + d];
+        acc += (filter_val + filter_offset) * (input_val + input_offset);
+      }
+      if (bias_data)
+      {
+        acc += bias_data[out_c];
+      }
+      acc = MultiplyByQuantizedMultiplier(acc, output_multiplier, output_shift);
+      acc += output_offset;
+      acc = std::max(acc, output_activation_min);
+      acc = std::min(acc, output_activation_max);
+      output_data[out_c + output_depth * b] = static_cast<uint8_t>(acc);
+    }
+  }
+}
+
+} // namespace cker
+} // namespace nnfw
+
+#endif // __NNFW_CKER_FULLY_CONNECTED_H__
diff --git a/runtimes/libs/cker/include/cker/operation/MaxPool.h b/runtimes/libs/cker/include/cker/operation/MaxPool.h
new file mode 100644
index 000000000..9619e26c2
--- /dev/null
+++ b/runtimes/libs/cker/include/cker/operation/MaxPool.h
@@ -0,0 +1,150 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_CKER_MAX_POOL_H__
+#define __NNFW_CKER_MAX_POOL_H__
+
+#include "cker/Shape.h"
+#include "cker/Types.h"
+#include "cker/Utils.h"
+
+namespace nnfw
+{
+namespace cker
+{
+
+struct MaxPoolParams
+{
+  FusedActivationFunctionType activation;
+  PaddingType padding_type;
+  PaddingValues padding_values;
+  int stride_height;
+  int stride_width;
+  int filter_height;
+  int filter_width;
+  // uint8, etc, activation params.
+  int32_t quantized_activation_min;
+  int32_t quantized_activation_max;
+  // float activation params.
+  float float_activation_min;
+  float float_activation_max;
+};
+
+inline void MaxPool(const MaxPoolParams &params, const Shape &input_shape, const float *input_data,
+                    const Shape &output_shape, float *output_data)
+{
+  assert(input_shape.DimensionsCount() == 4);
+  assert(output_shape.DimensionsCount() == 4);
+  const int batches = MatchingDim(input_shape, 0, output_shape, 0);
+  const int depth = MatchingDim(input_shape, 3, output_shape, 3);
+  const int input_height = input_shape.Dims(1);
+  const int input_width = input_shape.Dims(2);
+  const int output_height = output_shape.Dims(1);
+  const int output_width = output_shape.Dims(2);
+  const int stride_height = params.stride_height;
+  const int stride_width = params.stride_width;
+  for (int batch = 0; batch < batches; ++batch)
+  {
+    for (int out_y = 0; out_y < output_height; ++out_y)
+    {
+      for (int out_x = 0; out_x < output_width; ++out_x)
+      {
+        for (int channel = 0; channel < depth; ++channel)
+        {
+          const int in_x_origin = (out_x * stride_width) - params.padding_values.width;
+          const int in_y_origin = (out_y * stride_height) - params.padding_values.height;
+          // Compute the boundaries of the filter region clamped so as to
+          // ensure that the filter window fits in the input array.
+          const int filter_x_start = std::max(0, -in_x_origin);
+          const int filter_x_end = std::min(params.filter_width, input_width - in_x_origin);
+          const int filter_y_start = std::max(0, -in_y_origin);
+          const int filter_y_end = std::min(params.filter_height, input_height - in_y_origin);
+          float max = std::numeric_limits<float>::lowest();
+          for (int filter_y = filter_y_start; filter_y < filter_y_end; ++filter_y)
+          {
+            for (int filter_x = filter_x_start; filter_x < filter_x_end; ++filter_x)
+            {
+              const int in_x = in_x_origin + filter_x;
+              const int in_y = in_y_origin + filter_y;
+              max = std::max(max, input_data[Offset(input_shape, batch, in_y, in_x, channel)]);
+            }
+          }
+          output_data[Offset(output_shape, batch, out_y, out_x, channel)] =
+              ActivationFunctionWithMinMax(max, params.float_activation_min,
+                                           params.float_activation_max);
+        }
+      }
+    }
+  }
+}
+
+inline void MaxPool(const MaxPoolParams &params, const Shape &input_shape,
+                    const uint8_t *input_data, const Shape &output_shape, uint8_t *output_data)
+{
+  assert(params.quantized_activation_min <= params.quantized_activation_max);
+  assert(params.quantized_activation_min >= 0);
+  assert(params.quantized_activation_max <= 255);
+  assert(input_shape.DimensionsCount() == 4);
+  assert(output_shape.DimensionsCount() == 4);
+  const int batches = MatchingDim(input_shape, 0, output_shape, 0);
+  const int depth = MatchingDim(input_shape, 3, output_shape, 3);
+  const int input_height = input_shape.Dims(1);
+  const int input_width = input_shape.Dims(2);
+  const int output_height = output_shape.Dims(1);
+  const int output_width = output_shape.Dims(2);
+  const int stride_height = params.stride_height;
+  const int stride_width = params.stride_width;
+  for (int batch = 0; batch < batches; ++batch)
+  {
+    for (int out_y = 0; out_y < output_height; ++out_y)
+    {
+      for (int out_x = 0; out_x < output_width; ++out_x)
+      {
+        for (int channel = 0; channel < depth; ++channel)
+        {
+          const int in_x_origin = (out_x * stride_width) - params.padding_values.width;
+          const int in_y_origin = (out_y * stride_height) - params.padding_values.height;
+          // Compute the boundaries of the filter region clamped so as to
+          // ensure that the filter window fits in the input array.
+          const int filter_x_start = std::max(0, -in_x_origin);
+          const int filter_x_end = std::min(params.filter_width, input_width - in_x_origin);
+          const int filter_y_start = std::max(0, -in_y_origin);
+          const int filter_y_end = std::min(params.filter_height, input_height - in_y_origin);
+          uint8_t max = 0;
+          for (int filter_y = filter_y_start; filter_y < filter_y_end; ++filter_y)
+          {
+            for (int filter_x = filter_x_start; filter_x < filter_x_end; ++filter_x)
+            {
+              const int in_x = in_x_origin + filter_x;
+              const int in_y = in_y_origin + filter_y;
+              max = std::max(max, input_data[Offset(input_shape, batch, in_y, in_x, channel)]);
+            }
+          }
+          max = std::max<uint8_t>(max, params.quantized_activation_min);
+          max = std::min<uint8_t>(max, params.quantized_activation_max);
+          output_data[Offset(output_shape, batch, out_y, out_x, channel)] =
+              static_cast<uint8_t>(max);
+        }
+      }
+    }
+  }
+}
+
+} // namespace cker
+} // namespace nnfw
+
+#endif // __NNFW_CKER_MAX_POOL_H__
diff --git a/runtimes/libs/cker/include/cker/operation/SoftMax.h b/runtimes/libs/cker/include/cker/operation/SoftMax.h
new file mode 100644
index 000000000..322f5d5a2
--- /dev/null
+++ b/runtimes/libs/cker/include/cker/operation/SoftMax.h
@@ -0,0 +1,164 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_CKER_SOFTMAX_H__
+#define __NNFW_CKER_SOFTMAX_H__
+
+#include "cker/Shape.h"
+#include "cker/Utils.h"
+#include "cker/gemmlowp/FixedPoint.h"
+
+#include <cmath>
+
+namespace nnfw
+{
+namespace cker
+{
+
+struct SoftmaxParams
+{
+  // beta is not really used (not a Tensorflow parameter) and not implemented
+  // for LogSoftmax.
+  double beta;
+  // uint8 inference params.  Used even when beta defaults to 1.0.
+  int32_t input_multiplier;
+  int32_t input_left_shift;
+  // Reverse scaling is only used by LogSoftmax.
+  int32_t reverse_scaling_divisor;
+  int32_t reverse_scaling_right_shift;
+  int diff_min;
+};
+
+inline void Softmax(const SoftmaxParams &params, const Shape &input_shape, const float *input_data,
+                    const Shape &output_shape, float *output_data)
+{
+  const int trailing_dim = input_shape.DimensionsCount() - 1;
+  const int outer_size = MatchingFlatSizeSkipDim(input_shape, trailing_dim, output_shape);
+  const int depth = MatchingDim(input_shape, trailing_dim, output_shape, trailing_dim);
+
+  for (int i = 0; i < outer_size; ++i)
+  {
+    // Find max element value which we'll use to ensure numerical stability
+    // taking advantage of the following equality:
+    // exp(x[i])/sum(exp(x[i])) == exp(x[i]+C)/sum(exp(x[i]+C))
+    float max = std::numeric_limits<float>::lowest();
+    for (int c = 0; c < depth; ++c)
+    {
+      max = std::max(max, input_data[i * depth + c]);
+    }
+
+    // Compute sum.
+    float sum = 0.f;
+    for (int c = 0; c < depth; ++c)
+    {
+      sum += std::exp((input_data[i * depth + c] - max) * params.beta);
+    }
+
+    // Compute result.
+    for (int c = 0; c < depth; ++c)
+    {
+      output_data[i * depth + c] = std::exp((input_data[i * depth + c] - max) * params.beta) / sum;
+    }
+  }
+}
+
+inline void Softmax(const SoftmaxParams &params, const Shape &input_shape,
+                    const uint8_t *input_data, const Shape &output_shape, uint8_t *output_data)
+{
+  const int32_t input_beta_multiplier = params.input_multiplier;
+  const int32_t input_beta_left_shift = params.input_left_shift;
+  const int diff_min = params.diff_min;
+  // The representation chosen for the input to the exp() function is Q5.26.
+  // We need to leave extra space since values that we skip might be as large as
+  // -32 before multiplying by input_beta_multiplier, and therefore as large as
+  // -16 afterwards.  Note that exp(-8) is definitely not insignificant to
+  // accumulation, but exp(-16) definitely is.
+  static const int kScaledDiffIntegerBits = 5;
+  static const int kAccumulationIntegerBits = 12;
+  using FixedPointScaledDiff = gemmlowp::FixedPoint<kScaledDiffIntegerBits>;
+  using FixedPointAccum = gemmlowp::FixedPoint<kAccumulationIntegerBits>;
+  using FixedPoint0 = gemmlowp::FixedPoint<0>;
+
+  const int trailing_dim = input_shape.DimensionsCount() - 1;
+  const int outer_size = MatchingFlatSizeSkipDim(input_shape, trailing_dim, output_shape);
+  const int depth = MatchingDim(input_shape, trailing_dim, output_shape, trailing_dim);
+
+  for (int i = 0; i < outer_size; ++i)
+  {
+    uint8_t max_in_row = 0;
+    for (int c = 0; c < depth; ++c)
+    {
+      max_in_row = std::max(max_in_row, input_data[i * depth + c]);
+    }
+
+    FixedPointAccum sum_of_exps = FixedPointAccum::Zero();
+    for (int c = 0; c < depth; ++c)
+    {
+      int32_t input_diff = static_cast<int32_t>(input_data[i * depth + c]) - max_in_row;
+      if (input_diff >= diff_min)
+      {
+        const int32_t input_diff_rescaled = MultiplyByQuantizedMultiplierGreaterThanOne(
+            input_diff, input_beta_multiplier, input_beta_left_shift);
+        const FixedPointScaledDiff scaled_diff_f8 =
+            FixedPointScaledDiff::FromRaw(input_diff_rescaled);
+        sum_of_exps = sum_of_exps + gemmlowp::Rescale<kAccumulationIntegerBits>(
+                                        exp_on_negative_values(scaled_diff_f8));
+      }
+    }
+
+    int32_t fixed_sum_of_exps = sum_of_exps.raw();
+    int headroom_plus_one = CountLeadingZeros(static_cast<uint32_t>(fixed_sum_of_exps));
+    // This is the number of bits to the left of the binary point above 1.0.
+    // Consider fixed_sum_of_exps=1.25.  In that case shifted_scale=0.8 and
+    // no later adjustment will be needed.
+    int num_bits_over_unit = kAccumulationIntegerBits - headroom_plus_one;
+    int32_t shifted_sum_minus_one =
+        static_cast<int32_t>((static_cast<uint32_t>(fixed_sum_of_exps) << headroom_plus_one) -
+                             (static_cast<uint32_t>(1) << 31));
+
+    FixedPoint0 shifted_scale =
+        one_over_one_plus_x_for_x_in_0_1(FixedPoint0::FromRaw(shifted_sum_minus_one));
+
+    for (int c = 0; c < depth; ++c)
+    {
+      int32_t input_diff = static_cast<int32_t>(input_data[i * depth + c]) - max_in_row;
+      if (input_diff >= diff_min)
+      {
+        const int32_t input_diff_rescaled = MultiplyByQuantizedMultiplierGreaterThanOne(
+            input_diff, input_beta_multiplier, input_beta_left_shift);
+        const FixedPointScaledDiff scaled_diff_f8 =
+            FixedPointScaledDiff::FromRaw(input_diff_rescaled);
+
+        FixedPoint0 exp_in_0 = exp_on_negative_values(scaled_diff_f8);
+        int32_t unsat_output = gemmlowp::RoundingDivideByPOT((shifted_scale * exp_in_0).raw(),
+                                                             num_bits_over_unit + 31 - 8);
+
+        output_data[i * depth + c] = static_cast<uint8_t>(
+            std::max(std::min(unsat_output, static_cast<int32_t>(255)), static_cast<int32_t>(0)));
+      }
+      else
+      {
+        output_data[i * depth + c] = 0;
+      }
+    }
+  }
+}
+
+} // namespace cker
+} // namespace nnfw
+
+#endif // __NNFW_CKER_SOFTMAX_H__
diff --git a/libs/cpp14/CMakeLists.txt b/runtimes/libs/cpp14/CMakeLists.txt
index bba9e132d..bba9e132d 100644
--- a/libs/cpp14/CMakeLists.txt
+++ b/runtimes/libs/cpp14/CMakeLists.txt
diff --git a/runtimes/libs/cpp14/include/cpp14/memory.h b/runtimes/libs/cpp14/include/cpp14/memory.h
new file mode 100644
index 000000000..7070e1c99
--- /dev/null
+++ b/runtimes/libs/cpp14/include/cpp14/memory.h
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file memory.h
+ * @ingroup COM_AI_RUNTIME
+ * @brief This file contains @c make_unique which is not supported by C++11
+ * @details Implementation is based on http://isocpp.org/files/papers/N3656.txt
+ */
+#ifndef __NNFW_CPP14_MEMORY_H__
+#define __NNFW_CPP14_MEMORY_H__
+
+#include <memory>
+
+namespace nnfw
+{
+namespace cpp14
+{
+
+template <typename T> struct _Unique_if
+{
+  typedef std::unique_ptr<T> _Single_object;
+};
+
+template <typename T> struct _Unique_if<T[]>
+{
+  typedef std::unique_ptr<T[]> _Unknown_bound;
+};
+
+template <typename T, size_t N> struct _Unique_if<T[N]>
+{
+  typedef void _Known_bound;
+};
+
+template <typename T, typename... Args>
+typename _Unique_if<T>::_Single_object make_unique(Args &&... args)
+{
+  return std::unique_ptr<T>(new T(std::forward<Args>(args)...));
+}
+
+template <typename T> typename _Unique_if<T>::_Unknown_bound make_unique(size_t n)
+{
+  typedef typename std::remove_extent<T>::type U;
+  return std::unique_ptr<T>(new U[n]());
+}
+
+template <typename T, typename... Args>
+typename _Unique_if<T>::_Known_bound make_unique(Args &&...) = delete;
+
+} // namespace cpp14
+} // namespace nnfw
+
+#endif // __NNFW_CPP14_MEMORY_H__
diff --git a/runtimes/libs/jsoncpp/CMakeLists.txt b/runtimes/libs/jsoncpp/CMakeLists.txt
new file mode 100644
index 000000000..5720cec5b
--- /dev/null
+++ b/runtimes/libs/jsoncpp/CMakeLists.txt
@@ -0,0 +1,6 @@
+file(GLOB_RECURSE SRCS "*.cpp")
+
+add_library(jsoncpp STATIC ${SRCS})
+set_property(TARGET jsoncpp PROPERTY POSITION_INDEPENDENT_CODE ON)
+set_property(TARGET jsoncpp APPEND PROPERTY INTERFACE_INCLUDE_DIRECTORIES
+  $<BUILD_INTERFACE:${CMAKE_CURRENT_SOURCE_DIR}>)
diff --git a/runtimes/libs/jsoncpp/README.md b/runtimes/libs/jsoncpp/README.md
new file mode 100644
index 000000000..da5a06d71
--- /dev/null
+++ b/runtimes/libs/jsoncpp/README.md
@@ -0,0 +1,11 @@
+# Origin of source code
+
+This library is based on Json-cpp amalgated header and cpp files(https://github.com/open-source-parsers/jsoncpp/wiki/Amalgamated)
+
+# Background
+
+Since jsoncpp on tizen does not support static jsoncpp library, nnfw project will link this local library.
+
+# Version
+
+- 1.7.7 : https://github.com/open-source-parsers/jsoncpp/archive/1.7.7.tar.gz
diff --git a/runtimes/libs/jsoncpp/json/json-forwards.h b/runtimes/libs/jsoncpp/json/json-forwards.h
new file mode 100644
index 000000000..9fe95c055
--- /dev/null
+++ b/runtimes/libs/jsoncpp/json/json-forwards.h
@@ -0,0 +1,315 @@
+/// Json-cpp amalgated forward header (http://jsoncpp.sourceforge.net/).
+/// It is intended to be used with #include "json/json-forwards.h"
+/// This header provides forward declaration for all JsonCpp types.
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: LICENSE
+// //////////////////////////////////////////////////////////////////////
+
+/*
+The JsonCpp library's source code, including accompanying documentation,
+tests and demonstration applications, are licensed under the following
+conditions...
+
+The author (Baptiste Lepilleur) explicitly disclaims copyright in all
+jurisdictions which recognize such a disclaimer. In such jurisdictions,
+this software is released into the Public Domain.
+
+In jurisdictions which do not recognize Public Domain property (e.g. Germany as of
+2010), this software is Copyright (c) 2007-2010 by Baptiste Lepilleur, and is
+released under the terms of the MIT License (see below).
+
+In jurisdictions which recognize Public Domain property, the user of this
+software may choose to accept it either as 1) Public Domain, 2) under the
+conditions of the MIT License (see below), or 3) under the terms of dual
+Public Domain/MIT License conditions described here, as they choose.
+
+The MIT License is about as close to Public Domain as a license can get, and is
+described in clear, concise terms at:
+
+   http://en.wikipedia.org/wiki/MIT_License
+
+The full text of the MIT License follows:
+
+========================================================================
+Copyright (c) 2007-2010 Baptiste Lepilleur
+
+Permission is hereby granted, free of charge, to any person
+obtaining a copy of this software and associated documentation
+files (the "Software"), to deal in the Software without
+restriction, including without limitation the rights to use, copy,
+modify, merge, publish, distribute, sublicense, and/or sell copies
+of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be
+included in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.
+========================================================================
+(END LICENSE TEXT)
+
+The MIT license is compatible with both the GPL and commercial
+software, affording one all of the rights of Public Domain with the
+minor nuisance of being required to keep the above copyright notice
+and license text in the source code. Note also that by accepting the
+Public Domain "license" you can re-license your copy using whatever
+license you like.
+
+*/
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: LICENSE
+// //////////////////////////////////////////////////////////////////////
+
+#ifndef JSON_FORWARD_AMALGATED_H_INCLUDED
+#define JSON_FORWARD_AMALGATED_H_INCLUDED
+/// If defined, indicates that the source file is amalgated
+/// to prevent private header inclusion.
+#define JSON_IS_AMALGAMATION
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: include/json/config.h
+// //////////////////////////////////////////////////////////////////////
+
+// Copyright 2007-2010 Baptiste Lepilleur
+// Distributed under MIT license, or public domain if desired and
+// recognized in your jurisdiction.
+// See file LICENSE for detail or copy at http://jsoncpp.sourceforge.net/LICENSE
+
+#ifndef JSON_CONFIG_H_INCLUDED
+#define JSON_CONFIG_H_INCLUDED
+#include <stddef.h>
+#include <string>   //typedef String
+#include <stdint.h> //typedef int64_t, uint64_t
+
+/// If defined, indicates that json library is embedded in CppTL library.
+//# define JSON_IN_CPPTL 1
+
+/// If defined, indicates that json may leverage CppTL library
+//#  define JSON_USE_CPPTL 1
+/// If defined, indicates that cpptl vector based map should be used instead of
+/// std::map
+/// as Value container.
+//#  define JSON_USE_CPPTL_SMALLMAP 1
+
+// If non-zero, the library uses exceptions to report bad input instead of C
+// assertion macros. The default is to use exceptions.
+#ifndef JSON_USE_EXCEPTION
+#define JSON_USE_EXCEPTION 1
+#endif
+
+/// If defined, indicates that the source file is amalgated
+/// to prevent private header inclusion.
+/// Remarks: it is automatically defined in the generated amalgated header.
+// #define JSON_IS_AMALGAMATION
+
+#ifdef JSON_IN_CPPTL
+#include <cpptl/config.h>
+#ifndef JSON_USE_CPPTL
+#define JSON_USE_CPPTL 1
+#endif
+#endif
+
+#ifdef JSON_IN_CPPTL
+#define JSON_API CPPTL_API
+#elif defined(JSON_DLL_BUILD)
+#if defined(_MSC_VER) || defined(__MINGW32__)
+#define JSON_API __declspec(dllexport)
+#define JSONCPP_DISABLE_DLL_INTERFACE_WARNING
+#endif // if defined(_MSC_VER)
+#elif defined(JSON_DLL)
+#if defined(_MSC_VER) || defined(__MINGW32__)
+#define JSON_API __declspec(dllimport)
+#define JSONCPP_DISABLE_DLL_INTERFACE_WARNING
+#endif // if defined(_MSC_VER)
+#endif // ifdef JSON_IN_CPPTL
+#if !defined(JSON_API)
+#define JSON_API
+#endif
+
+// If JSON_NO_INT64 is defined, then Json only support C++ "int" type for
+// integer
+// Storages, and 64 bits integer support is disabled.
+// #define JSON_NO_INT64 1
+
+#if defined(_MSC_VER) // MSVC
+#if _MSC_VER <= 1200  // MSVC 6
+                      // Microsoft Visual Studio 6 only support conversion from __int64 to double
+                      // (no conversion from unsigned __int64).
+#define JSON_USE_INT64_DOUBLE_CONVERSION 1
+// Disable warning 4786 for VS6 caused by STL (identifier was truncated to '255'
+// characters in the debug information)
+// All projects I've ever seen with VS6 were using this globally (not bothering
+// with pragma push/pop).
+#pragma warning(disable : 4786)
+#endif // MSVC 6
+
+#if _MSC_VER >= 1500 // MSVC 2008
+                     /// Indicates that the following function is deprecated.
+#define JSONCPP_DEPRECATED(message) __declspec(deprecated(message))
+#endif
+
+#endif // defined(_MSC_VER)
+
+// In c++11 the override keyword allows you to explicity define that a function
+// is intended to override the base-class version.  This makes the code more
+// managable and fixes a set of common hard-to-find bugs.
+#if __cplusplus >= 201103L
+#define JSONCPP_OVERRIDE override
+#elif defined(_MSC_VER) && _MSC_VER > 1600
+#define JSONCPP_OVERRIDE override
+#else
+#define JSONCPP_OVERRIDE
+#endif
+
+#ifndef JSON_HAS_RVALUE_REFERENCES
+
+#if defined(_MSC_VER) && _MSC_VER >= 1600 // MSVC >= 2010
+#define JSON_HAS_RVALUE_REFERENCES 1
+#endif // MSVC >= 2010
+
+#ifdef __clang__
+#if __has_feature(cxx_rvalue_references)
+#define JSON_HAS_RVALUE_REFERENCES 1
+#endif // has_feature
+
+#elif defined __GNUC__ // not clang (gcc comes later since clang emulates gcc)
+#if defined(__GXX_EXPERIMENTAL_CXX0X__) || (__cplusplus >= 201103L)
+#define JSON_HAS_RVALUE_REFERENCES 1
+#endif // GXX_EXPERIMENTAL
+
+#endif // __clang__ || __GNUC__
+
+#endif // not defined JSON_HAS_RVALUE_REFERENCES
+
+#ifndef JSON_HAS_RVALUE_REFERENCES
+#define JSON_HAS_RVALUE_REFERENCES 0
+#endif
+
+#ifdef __clang__
+#elif defined __GNUC__ // not clang (gcc comes later since clang emulates gcc)
+#if (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5))
+#define JSONCPP_DEPRECATED(message) __attribute__((deprecated(message)))
+#elif (__GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 1))
+#define JSONCPP_DEPRECATED(message) __attribute__((__deprecated__))
+#endif // GNUC version
+#endif // __clang__ || __GNUC__
+
+#if !defined(JSONCPP_DEPRECATED)
+#define JSONCPP_DEPRECATED(message)
+#endif // if !defined(JSONCPP_DEPRECATED)
+
+#if __GNUC__ >= 6
+#define JSON_USE_INT64_DOUBLE_CONVERSION 1
+#endif
+
+#if !defined(JSON_IS_AMALGAMATION)
+
+#include "version.h"
+
+#if JSONCPP_USING_SECURE_MEMORY
+#include "allocator.h" //typedef Allocator
+#endif
+
+#endif // if !defined(JSON_IS_AMALGAMATION)
+
+namespace Json
+{
+typedef int Int;
+typedef unsigned int UInt;
+#if defined(JSON_NO_INT64)
+typedef int LargestInt;
+typedef unsigned int LargestUInt;
+#undef JSON_HAS_INT64
+#else                 // if defined(JSON_NO_INT64)
+// For Microsoft Visual use specific types as long long is not supported
+#if defined(_MSC_VER) // Microsoft Visual Studio
+typedef __int64 Int64;
+typedef unsigned __int64 UInt64;
+#else                 // if defined(_MSC_VER) // Other platforms, use long long
+typedef int64_t Int64;
+typedef uint64_t UInt64;
+#endif                // if defined(_MSC_VER)
+typedef Int64 LargestInt;
+typedef UInt64 LargestUInt;
+#define JSON_HAS_INT64
+#endif // if defined(JSON_NO_INT64)
+#if JSONCPP_USING_SECURE_MEMORY
+#define JSONCPP_STRING std::basic_string<char, std::char_traits<char>, Json::SecureAllocator<char>>
+#define JSONCPP_OSTRINGSTREAM \
+  std::basic_ostringstream<char, std::char_traits<char>, Json::SecureAllocator<char>>
+#define JSONCPP_OSTREAM std::basic_ostream<char, std::char_traits<char>>
+#define JSONCPP_ISTRINGSTREAM \
+  std::basic_istringstream<char, std::char_traits<char>, Json::SecureAllocator<char>>
+#define JSONCPP_ISTREAM std::istream
+#else
+#define JSONCPP_STRING std::string
+#define JSONCPP_OSTRINGSTREAM std::ostringstream
+#define JSONCPP_OSTREAM std::ostream
+#define JSONCPP_ISTRINGSTREAM std::istringstream
+#define JSONCPP_ISTREAM std::istream
+#endif // if JSONCPP_USING_SECURE_MEMORY
+} // end namespace Json
+
+#endif // JSON_CONFIG_H_INCLUDED
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: include/json/config.h
+// //////////////////////////////////////////////////////////////////////
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: include/json/forwards.h
+// //////////////////////////////////////////////////////////////////////
+
+// Copyright 2007-2010 Baptiste Lepilleur
+// Distributed under MIT license, or public domain if desired and
+// recognized in your jurisdiction.
+// See file LICENSE for detail or copy at http://jsoncpp.sourceforge.net/LICENSE
+
+#ifndef JSON_FORWARDS_H_INCLUDED
+#define JSON_FORWARDS_H_INCLUDED
+
+#if !defined(JSON_IS_AMALGAMATION)
+#include "config.h"
+#endif // if !defined(JSON_IS_AMALGAMATION)
+
+namespace Json
+{
+
+// writer.h
+class FastWriter;
+class StyledWriter;
+
+// reader.h
+class Reader;
+
+// features.h
+class Features;
+
+// value.h
+typedef unsigned int ArrayIndex;
+class StaticString;
+class Path;
+class PathArgument;
+class Value;
+class ValueIteratorBase;
+class ValueIterator;
+class ValueConstIterator;
+
+} // namespace Json
+
+#endif // JSON_FORWARDS_H_INCLUDED
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: include/json/forwards.h
+// //////////////////////////////////////////////////////////////////////
+
+#endif // ifndef JSON_FORWARD_AMALGATED_H_INCLUDED
diff --git a/runtimes/libs/jsoncpp/json/json.h b/runtimes/libs/jsoncpp/json/json.h
new file mode 100644
index 000000000..19c591267
--- /dev/null
+++ b/runtimes/libs/jsoncpp/json/json.h
@@ -0,0 +1,2133 @@
+/// Json-cpp amalgated header (http://jsoncpp.sourceforge.net/).
+/// It is intended to be used with #include "json/json.h"
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: LICENSE
+// //////////////////////////////////////////////////////////////////////
+
+/*
+The JsonCpp library's source code, including accompanying documentation,
+tests and demonstration applications, are licensed under the following
+conditions...
+
+The author (Baptiste Lepilleur) explicitly disclaims copyright in all
+jurisdictions which recognize such a disclaimer. In such jurisdictions,
+this software is released into the Public Domain.
+
+In jurisdictions which do not recognize Public Domain property (e.g. Germany as of
+2010), this software is Copyright (c) 2007-2010 by Baptiste Lepilleur, and is
+released under the terms of the MIT License (see below).
+
+In jurisdictions which recognize Public Domain property, the user of this
+software may choose to accept it either as 1) Public Domain, 2) under the
+conditions of the MIT License (see below), or 3) under the terms of dual
+Public Domain/MIT License conditions described here, as they choose.
+
+The MIT License is about as close to Public Domain as a license can get, and is
+described in clear, concise terms at:
+
+   http://en.wikipedia.org/wiki/MIT_License
+
+The full text of the MIT License follows:
+
+========================================================================
+Copyright (c) 2007-2010 Baptiste Lepilleur
+
+Permission is hereby granted, free of charge, to any person
+obtaining a copy of this software and associated documentation
+files (the "Software"), to deal in the Software without
+restriction, including without limitation the rights to use, copy,
+modify, merge, publish, distribute, sublicense, and/or sell copies
+of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be
+included in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.
+========================================================================
+(END LICENSE TEXT)
+
+The MIT license is compatible with both the GPL and commercial
+software, affording one all of the rights of Public Domain with the
+minor nuisance of being required to keep the above copyright notice
+and license text in the source code. Note also that by accepting the
+Public Domain "license" you can re-license your copy using whatever
+license you like.
+
+*/
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: LICENSE
+// //////////////////////////////////////////////////////////////////////
+
+#ifndef JSON_AMALGATED_H_INCLUDED
+#define JSON_AMALGATED_H_INCLUDED
+/// If defined, indicates that the source file is amalgated
+/// to prevent private header inclusion.
+#define JSON_IS_AMALGAMATION
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: include/json/version.h
+// //////////////////////////////////////////////////////////////////////
+
+// DO NOT EDIT. This file (and "version") is generated by CMake.
+// Run CMake configure step to update it.
+#ifndef JSON_VERSION_H_INCLUDED
+#define JSON_VERSION_H_INCLUDED
+
+#define JSONCPP_VERSION_STRING "1.7.7"
+#define JSONCPP_VERSION_MAJOR 1
+#define JSONCPP_VERSION_MINOR 7
+#define JSONCPP_VERSION_PATCH 7
+#define JSONCPP_VERSION_QUALIFIER
+#define JSONCPP_VERSION_HEXA \
+  ((JSONCPP_VERSION_MAJOR << 24) | (JSONCPP_VERSION_MINOR << 16) | (JSONCPP_VERSION_PATCH << 8))
+
+#ifdef JSONCPP_USING_SECURE_MEMORY
+#undef JSONCPP_USING_SECURE_MEMORY
+#endif
+#define JSONCPP_USING_SECURE_MEMORY 0
+// If non-zero, the library zeroes any memory that it has allocated before
+// it frees its memory.
+
+#endif // JSON_VERSION_H_INCLUDED
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: include/json/version.h
+// //////////////////////////////////////////////////////////////////////
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: include/json/config.h
+// //////////////////////////////////////////////////////////////////////
+
+// Copyright 2007-2010 Baptiste Lepilleur
+// Distributed under MIT license, or public domain if desired and
+// recognized in your jurisdiction.
+// See file LICENSE for detail or copy at http://jsoncpp.sourceforge.net/LICENSE
+
+#ifndef JSON_CONFIG_H_INCLUDED
+#define JSON_CONFIG_H_INCLUDED
+#include <stddef.h>
+#include <string>   //typedef String
+#include <stdint.h> //typedef int64_t, uint64_t
+
+/// If defined, indicates that json library is embedded in CppTL library.
+//# define JSON_IN_CPPTL 1
+
+/// If defined, indicates that json may leverage CppTL library
+//#  define JSON_USE_CPPTL 1
+/// If defined, indicates that cpptl vector based map should be used instead of
+/// std::map
+/// as Value container.
+//#  define JSON_USE_CPPTL_SMALLMAP 1
+
+// If non-zero, the library uses exceptions to report bad input instead of C
+// assertion macros. The default is to use exceptions.
+#ifndef JSON_USE_EXCEPTION
+#define JSON_USE_EXCEPTION 1
+#endif
+
+/// If defined, indicates that the source file is amalgated
+/// to prevent private header inclusion.
+/// Remarks: it is automatically defined in the generated amalgated header.
+// #define JSON_IS_AMALGAMATION
+
+#ifdef JSON_IN_CPPTL
+#include <cpptl/config.h>
+#ifndef JSON_USE_CPPTL
+#define JSON_USE_CPPTL 1
+#endif
+#endif
+
+#ifdef JSON_IN_CPPTL
+#define JSON_API CPPTL_API
+#elif defined(JSON_DLL_BUILD)
+#if defined(_MSC_VER) || defined(__MINGW32__)
+#define JSON_API __declspec(dllexport)
+#define JSONCPP_DISABLE_DLL_INTERFACE_WARNING
+#endif // if defined(_MSC_VER)
+#elif defined(JSON_DLL)
+#if defined(_MSC_VER) || defined(__MINGW32__)
+#define JSON_API __declspec(dllimport)
+#define JSONCPP_DISABLE_DLL_INTERFACE_WARNING
+#endif // if defined(_MSC_VER)
+#endif // ifdef JSON_IN_CPPTL
+#if !defined(JSON_API)
+#define JSON_API
+#endif
+
+// If JSON_NO_INT64 is defined, then Json only support C++ "int" type for
+// integer
+// Storages, and 64 bits integer support is disabled.
+// #define JSON_NO_INT64 1
+
+#if defined(_MSC_VER) // MSVC
+#if _MSC_VER <= 1200  // MSVC 6
+                      // Microsoft Visual Studio 6 only support conversion from __int64 to double
+                      // (no conversion from unsigned __int64).
+#define JSON_USE_INT64_DOUBLE_CONVERSION 1
+// Disable warning 4786 for VS6 caused by STL (identifier was truncated to '255'
+// characters in the debug information)
+// All projects I've ever seen with VS6 were using this globally (not bothering
+// with pragma push/pop).
+#pragma warning(disable : 4786)
+#endif // MSVC 6
+
+#if _MSC_VER >= 1500 // MSVC 2008
+                     /// Indicates that the following function is deprecated.
+#define JSONCPP_DEPRECATED(message) __declspec(deprecated(message))
+#endif
+
+#endif // defined(_MSC_VER)
+
+// In c++11 the override keyword allows you to explicity define that a function
+// is intended to override the base-class version.  This makes the code more
+// managable and fixes a set of common hard-to-find bugs.
+#if __cplusplus >= 201103L
+#define JSONCPP_OVERRIDE override
+#elif defined(_MSC_VER) && _MSC_VER > 1600
+#define JSONCPP_OVERRIDE override
+#else
+#define JSONCPP_OVERRIDE
+#endif
+
+#ifndef JSON_HAS_RVALUE_REFERENCES
+
+#if defined(_MSC_VER) && _MSC_VER >= 1600 // MSVC >= 2010
+#define JSON_HAS_RVALUE_REFERENCES 1
+#endif // MSVC >= 2010
+
+#ifdef __clang__
+#if __has_feature(cxx_rvalue_references)
+#define JSON_HAS_RVALUE_REFERENCES 1
+#endif // has_feature
+
+#elif defined __GNUC__ // not clang (gcc comes later since clang emulates gcc)
+#if defined(__GXX_EXPERIMENTAL_CXX0X__) || (__cplusplus >= 201103L)
+#define JSON_HAS_RVALUE_REFERENCES 1
+#endif // GXX_EXPERIMENTAL
+
+#endif // __clang__ || __GNUC__
+
+#endif // not defined JSON_HAS_RVALUE_REFERENCES
+
+#ifndef JSON_HAS_RVALUE_REFERENCES
+#define JSON_HAS_RVALUE_REFERENCES 0
+#endif
+
+#ifdef __clang__
+#elif defined __GNUC__ // not clang (gcc comes later since clang emulates gcc)
+#if (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5))
+#define JSONCPP_DEPRECATED(message) __attribute__((deprecated(message)))
+#elif (__GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 1))
+#define JSONCPP_DEPRECATED(message) __attribute__((__deprecated__))
+#endif // GNUC version
+#endif // __clang__ || __GNUC__
+
+#if !defined(JSONCPP_DEPRECATED)
+#define JSONCPP_DEPRECATED(message)
+#endif // if !defined(JSONCPP_DEPRECATED)
+
+#if __GNUC__ >= 6
+#define JSON_USE_INT64_DOUBLE_CONVERSION 1
+#endif
+
+#if !defined(JSON_IS_AMALGAMATION)
+
+#include "version.h"
+
+#if JSONCPP_USING_SECURE_MEMORY
+#include "allocator.h" //typedef Allocator
+#endif
+
+#endif // if !defined(JSON_IS_AMALGAMATION)
+
+namespace Json
+{
+typedef int Int;
+typedef unsigned int UInt;
+#if defined(JSON_NO_INT64)
+typedef int LargestInt;
+typedef unsigned int LargestUInt;
+#undef JSON_HAS_INT64
+#else                 // if defined(JSON_NO_INT64)
+// For Microsoft Visual use specific types as long long is not supported
+#if defined(_MSC_VER) // Microsoft Visual Studio
+typedef __int64 Int64;
+typedef unsigned __int64 UInt64;
+#else                 // if defined(_MSC_VER) // Other platforms, use long long
+typedef int64_t Int64;
+typedef uint64_t UInt64;
+#endif                // if defined(_MSC_VER)
+typedef Int64 LargestInt;
+typedef UInt64 LargestUInt;
+#define JSON_HAS_INT64
+#endif // if defined(JSON_NO_INT64)
+#if JSONCPP_USING_SECURE_MEMORY
+#define JSONCPP_STRING std::basic_string<char, std::char_traits<char>, Json::SecureAllocator<char>>
+#define JSONCPP_OSTRINGSTREAM \
+  std::basic_ostringstream<char, std::char_traits<char>, Json::SecureAllocator<char>>
+#define JSONCPP_OSTREAM std::basic_ostream<char, std::char_traits<char>>
+#define JSONCPP_ISTRINGSTREAM \
+  std::basic_istringstream<char, std::char_traits<char>, Json::SecureAllocator<char>>
+#define JSONCPP_ISTREAM std::istream
+#else
+#define JSONCPP_STRING std::string
+#define JSONCPP_OSTRINGSTREAM std::ostringstream
+#define JSONCPP_OSTREAM std::ostream
+#define JSONCPP_ISTRINGSTREAM std::istringstream
+#define JSONCPP_ISTREAM std::istream
+#endif // if JSONCPP_USING_SECURE_MEMORY
+} // end namespace Json
+
+#endif // JSON_CONFIG_H_INCLUDED
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: include/json/config.h
+// //////////////////////////////////////////////////////////////////////
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: include/json/forwards.h
+// //////////////////////////////////////////////////////////////////////
+
+// Copyright 2007-2010 Baptiste Lepilleur
+// Distributed under MIT license, or public domain if desired and
+// recognized in your jurisdiction.
+// See file LICENSE for detail or copy at http://jsoncpp.sourceforge.net/LICENSE
+
+#ifndef JSON_FORWARDS_H_INCLUDED
+#define JSON_FORWARDS_H_INCLUDED
+
+#if !defined(JSON_IS_AMALGAMATION)
+#include "config.h"
+#endif // if !defined(JSON_IS_AMALGAMATION)
+
+namespace Json
+{
+
+// writer.h
+class FastWriter;
+class StyledWriter;
+
+// reader.h
+class Reader;
+
+// features.h
+class Features;
+
+// value.h
+typedef unsigned int ArrayIndex;
+class StaticString;
+class Path;
+class PathArgument;
+class Value;
+class ValueIteratorBase;
+class ValueIterator;
+class ValueConstIterator;
+
+} // namespace Json
+
+#endif // JSON_FORWARDS_H_INCLUDED
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: include/json/forwards.h
+// //////////////////////////////////////////////////////////////////////
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: include/json/features.h
+// //////////////////////////////////////////////////////////////////////
+
+// Copyright 2007-2010 Baptiste Lepilleur
+// Distributed under MIT license, or public domain if desired and
+// recognized in your jurisdiction.
+// See file LICENSE for detail or copy at http://jsoncpp.sourceforge.net/LICENSE
+
+#ifndef CPPTL_JSON_FEATURES_H_INCLUDED
+#define CPPTL_JSON_FEATURES_H_INCLUDED
+
+#if !defined(JSON_IS_AMALGAMATION)
+#include "forwards.h"
+#endif // if !defined(JSON_IS_AMALGAMATION)
+
+namespace Json
+{
+
+/** \brief Configuration passed to reader and writer.
+ * This configuration object can be used to force the Reader or Writer
+ * to behave in a standard conforming way.
+ */
+class JSON_API Features
+{
+public:
+  /** \brief A configuration that allows all features and assumes all strings
+   * are UTF-8.
+   * - C & C++ comments are allowed
+   * - Root object can be any JSON value
+   * - Assumes Value strings are encoded in UTF-8
+   */
+  static Features all();
+
+  /** \brief A configuration that is strictly compatible with the JSON
+   * specification.
+   * - Comments are forbidden.
+   * - Root object must be either an array or an object value.
+   * - Assumes Value strings are encoded in UTF-8
+   */
+  static Features strictMode();
+
+  /** \brief Initialize the configuration like JsonConfig::allFeatures;
+   */
+  Features();
+
+  /// \c true if comments are allowed. Default: \c true.
+  bool allowComments_;
+
+  /// \c true if root must be either an array or an object value. Default: \c
+  /// false.
+  bool strictRoot_;
+
+  /// \c true if dropped null placeholders are allowed. Default: \c false.
+  bool allowDroppedNullPlaceholders_;
+
+  /// \c true if numeric object key are allowed. Default: \c false.
+  bool allowNumericKeys_;
+};
+
+} // namespace Json
+
+#endif // CPPTL_JSON_FEATURES_H_INCLUDED
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: include/json/features.h
+// //////////////////////////////////////////////////////////////////////
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: include/json/value.h
+// //////////////////////////////////////////////////////////////////////
+
+// Copyright 2007-2010 Baptiste Lepilleur
+// Distributed under MIT license, or public domain if desired and
+// recognized in your jurisdiction.
+// See file LICENSE for detail or copy at http://jsoncpp.sourceforge.net/LICENSE
+
+#ifndef CPPTL_JSON_H_INCLUDED
+#define CPPTL_JSON_H_INCLUDED
+
+#if !defined(JSON_IS_AMALGAMATION)
+#include "forwards.h"
+#endif // if !defined(JSON_IS_AMALGAMATION)
+#include <string>
+#include <vector>
+#include <exception>
+
+#ifndef JSON_USE_CPPTL_SMALLMAP
+#include <map>
+#else
+#include <cpptl/smallmap.h>
+#endif
+#ifdef JSON_USE_CPPTL
+#include <cpptl/forwards.h>
+#endif
+
+// Conditional NORETURN attribute on the throw functions would:
+// a) suppress false positives from static code analysis
+// b) possibly improve optimization opportunities.
+#if !defined(JSONCPP_NORETURN)
+#if defined(_MSC_VER)
+#define JSONCPP_NORETURN __declspec(noreturn)
+#elif defined(__GNUC__)
+#define JSONCPP_NORETURN __attribute__((__noreturn__))
+#else
+#define JSONCPP_NORETURN
+#endif
+#endif
+
+// Disable warning C4251: <data member>: <type> needs to have dll-interface to
+// be used by...
+#if defined(JSONCPP_DISABLE_DLL_INTERFACE_WARNING)
+#pragma warning(push)
+#pragma warning(disable : 4251)
+#endif // if defined(JSONCPP_DISABLE_DLL_INTERFACE_WARNING)
+
+/** \brief JSON (JavaScript Object Notation).
+ */
+namespace Json
+{
+
+/** Base class for all exceptions we throw.
+ *
+ * We use nothing but these internally. Of course, STL can throw others.
+ */
+class JSON_API Exception : public std::exception
+{
+public:
+  Exception(JSONCPP_STRING const &msg);
+  ~Exception() throw() JSONCPP_OVERRIDE;
+  char const *what() const throw() JSONCPP_OVERRIDE;
+
+protected:
+  JSONCPP_STRING msg_;
+};
+
+/** Exceptions which the user cannot easily avoid.
+ *
+ * E.g. out-of-memory (when we use malloc), stack-overflow, malicious input
+ *
+ * \remark derived from Json::Exception
+ */
+class JSON_API RuntimeError : public Exception
+{
+public:
+  RuntimeError(JSONCPP_STRING const &msg);
+};
+
+/** Exceptions thrown by JSON_ASSERT/JSON_FAIL macros.
+ *
+ * These are precondition-violations (user bugs) and internal errors (our bugs).
+ *
+ * \remark derived from Json::Exception
+ */
+class JSON_API LogicError : public Exception
+{
+public:
+  LogicError(JSONCPP_STRING const &msg);
+};
+
+/// used internally
+JSONCPP_NORETURN void throwRuntimeError(JSONCPP_STRING const &msg);
+/// used internally
+JSONCPP_NORETURN void throwLogicError(JSONCPP_STRING const &msg);
+
+/** \brief Type of the value held by a Value object.
+ */
+enum ValueType
+{
+  nullValue = 0, ///< 'null' value
+  intValue,      ///< signed integer value
+  uintValue,     ///< unsigned integer value
+  realValue,     ///< double value
+  stringValue,   ///< UTF-8 string value
+  booleanValue,  ///< bool value
+  arrayValue,    ///< array value (ordered list)
+  objectValue    ///< object value (collection of name/value pairs).
+};
+
+enum CommentPlacement
+{
+  commentBefore = 0,      ///< a comment placed on the line before a value
+  commentAfterOnSameLine, ///< a comment just after a value on the same line
+  commentAfter,           ///< a comment on the line after a value (only make sense for
+  /// root value)
+  numberOfCommentPlacement
+};
+
+//# ifdef JSON_USE_CPPTL
+//   typedef CppTL::AnyEnumerator<const char *> EnumMemberNames;
+//   typedef CppTL::AnyEnumerator<const Value &> EnumValues;
+//# endif
+
+/** \brief Lightweight wrapper to tag static string.
+ *
+ * Value constructor and objectValue member assignement takes advantage of the
+ * StaticString and avoid the cost of string duplication when storing the
+ * string or the member name.
+ *
+ * Example of usage:
+ * \code
+ * Json::Value aValue( StaticString("some text") );
+ * Json::Value object;
+ * static const StaticString code("code");
+ * object[code] = 1234;
+ * \endcode
+ */
+class JSON_API StaticString
+{
+public:
+  explicit StaticString(const char *czstring) : c_str_(czstring) {}
+
+  operator const char *() const { return c_str_; }
+
+  const char *c_str() const { return c_str_; }
+
+private:
+  const char *c_str_;
+};
+
+/** \brief Represents a <a HREF="http://www.json.org">JSON</a> value.
+ *
+ * This class is a discriminated union wrapper that can represents a:
+ * - signed integer [range: Value::minInt - Value::maxInt]
+ * - unsigned integer (range: 0 - Value::maxUInt)
+ * - double
+ * - UTF-8 string
+ * - boolean
+ * - 'null'
+ * - an ordered list of Value
+ * - collection of name/value pairs (javascript object)
+ *
+ * The type of the held value is represented by a #ValueType and
+ * can be obtained using type().
+ *
+ * Values of an #objectValue or #arrayValue can be accessed using operator[]()
+ * methods.
+ * Non-const methods will automatically create the a #nullValue element
+ * if it does not exist.
+ * The sequence of an #arrayValue will be automatically resized and initialized
+ * with #nullValue. resize() can be used to enlarge or truncate an #arrayValue.
+ *
+ * The get() methods can be used to obtain default value in the case the
+ * required element does not exist.
+ *
+ * It is possible to iterate over the list of a #objectValue values using
+ * the getMemberNames() method.
+ *
+ * \note #Value string-length fit in size_t, but keys must be < 2^30.
+ * (The reason is an implementation detail.) A #CharReader will raise an
+ * exception if a bound is exceeded to avoid security holes in your app,
+ * but the Value API does *not* check bounds. That is the responsibility
+ * of the caller.
+ */
+class JSON_API Value
+{
+  friend class ValueIteratorBase;
+
+public:
+  typedef std::vector<JSONCPP_STRING> Members;
+  typedef ValueIterator iterator;
+  typedef ValueConstIterator const_iterator;
+  typedef Json::UInt UInt;
+  typedef Json::Int Int;
+#if defined(JSON_HAS_INT64)
+  typedef Json::UInt64 UInt64;
+  typedef Json::Int64 Int64;
+#endif // defined(JSON_HAS_INT64)
+  typedef Json::LargestInt LargestInt;
+  typedef Json::LargestUInt LargestUInt;
+  typedef Json::ArrayIndex ArrayIndex;
+
+  static const Value
+      &null; ///< We regret this reference to a global instance; prefer the simpler Value().
+  static const Value &nullRef;         ///< just a kludge for binary-compatibility; same as null
+  static Value const &nullSingleton(); ///< Prefer this to null or nullRef.
+
+  /// Minimum signed integer value that can be stored in a Json::Value.
+  static const LargestInt minLargestInt;
+  /// Maximum signed integer value that can be stored in a Json::Value.
+  static const LargestInt maxLargestInt;
+  /// Maximum unsigned integer value that can be stored in a Json::Value.
+  static const LargestUInt maxLargestUInt;
+
+  /// Minimum signed int value that can be stored in a Json::Value.
+  static const Int minInt;
+  /// Maximum signed int value that can be stored in a Json::Value.
+  static const Int maxInt;
+  /// Maximum unsigned int value that can be stored in a Json::Value.
+  static const UInt maxUInt;
+
+#if defined(JSON_HAS_INT64)
+  /// Minimum signed 64 bits int value that can be stored in a Json::Value.
+  static const Int64 minInt64;
+  /// Maximum signed 64 bits int value that can be stored in a Json::Value.
+  static const Int64 maxInt64;
+  /// Maximum unsigned 64 bits int value that can be stored in a Json::Value.
+  static const UInt64 maxUInt64;
+#endif // defined(JSON_HAS_INT64)
+
+private:
+#ifndef JSONCPP_DOC_EXCLUDE_IMPLEMENTATION
+  class CZString
+  {
+  public:
+    enum DuplicationPolicy
+    {
+      noDuplication = 0,
+      duplicate,
+      duplicateOnCopy
+    };
+    CZString(ArrayIndex index);
+    CZString(char const *str, unsigned length, DuplicationPolicy allocate);
+    CZString(CZString const &other);
+#if JSON_HAS_RVALUE_REFERENCES
+    CZString(CZString &&other);
+#endif
+    ~CZString();
+    CZString &operator=(CZString other);
+    bool operator<(CZString const &other) const;
+    bool operator==(CZString const &other) const;
+    ArrayIndex index() const;
+    // const char* c_str() const; ///< \deprecated
+    char const *data() const;
+    unsigned length() const;
+    bool isStaticString() const;
+
+  private:
+    void swap(CZString &other);
+
+    struct StringStorage
+    {
+      unsigned policy_ : 2;
+      unsigned length_ : 30; // 1GB max
+    };
+
+    char const *cstr_; // actually, a prefixed string, unless policy is noDup
+    union {
+      ArrayIndex index_;
+      StringStorage storage_;
+    };
+  };
+
+public:
+#ifndef JSON_USE_CPPTL_SMALLMAP
+  typedef std::map<CZString, Value> ObjectValues;
+#else
+  typedef CppTL::SmallMap<CZString, Value> ObjectValues;
+#endif // ifndef JSON_USE_CPPTL_SMALLMAP
+#endif // ifndef JSONCPP_DOC_EXCLUDE_IMPLEMENTATION
+
+public:
+  /** \brief Create a default Value of the given type.
+
+    This is a very useful constructor.
+    To create an empty array, pass arrayValue.
+    To create an empty object, pass objectValue.
+    Another Value can then be set to this one by assignment.
+This is useful since clear() and resize() will not alter types.
+
+    Examples:
+\code
+Json::Value null_value; // null
+Json::Value arr_value(Json::arrayValue); // []
+Json::Value obj_value(Json::objectValue); // {}
+\endcode
+  */
+  Value(ValueType type = nullValue);
+  Value(Int value);
+  Value(UInt value);
+#if defined(JSON_HAS_INT64)
+  Value(Int64 value);
+  Value(UInt64 value);
+#endif // if defined(JSON_HAS_INT64)
+  Value(double value);
+  Value(const char *value);                  ///< Copy til first 0. (NULL causes to seg-fault.)
+  Value(const char *begin, const char *end); ///< Copy all, incl zeroes.
+  /** \brief Constructs a value from a static string.
+
+   * Like other value string constructor but do not duplicate the string for
+   * internal storage. The given string must remain alive after the call to this
+   * constructor.
+   * \note This works only for null-terminated strings. (We cannot change the
+   *   size of this class, so we have nowhere to store the length,
+   *   which might be computed later for various operations.)
+   *
+   * Example of usage:
+   * \code
+   * static StaticString foo("some text");
+   * Json::Value aValue(foo);
+   * \endcode
+   */
+  Value(const StaticString &value);
+  Value(const JSONCPP_STRING &value); ///< Copy data() til size(). Embedded zeroes too.
+#ifdef JSON_USE_CPPTL
+  Value(const CppTL::ConstString &value);
+#endif
+  Value(bool value);
+  /// Deep copy.
+  Value(const Value &other);
+#if JSON_HAS_RVALUE_REFERENCES
+  /// Move constructor
+  Value(Value &&other);
+#endif
+  ~Value();
+
+  /// Deep copy, then swap(other).
+  /// \note Over-write existing comments. To preserve comments, use #swapPayload().
+  Value &operator=(Value other);
+  /// Swap everything.
+  void swap(Value &other);
+  /// Swap values but leave comments and source offsets in place.
+  void swapPayload(Value &other);
+
+  ValueType type() const;
+
+  /// Compare payload only, not comments etc.
+  bool operator<(const Value &other) const;
+  bool operator<=(const Value &other) const;
+  bool operator>=(const Value &other) const;
+  bool operator>(const Value &other) const;
+  bool operator==(const Value &other) const;
+  bool operator!=(const Value &other) const;
+  int compare(const Value &other) const;
+
+  const char *asCString() const; ///< Embedded zeroes could cause you trouble!
+#if JSONCPP_USING_SECURE_MEMORY
+  unsigned getCStringLength() const; // Allows you to understand the length of the CString
+#endif
+  JSONCPP_STRING asString() const; ///< Embedded zeroes are possible.
+  /** Get raw char* of string-value.
+   *  \return false if !string. (Seg-fault if str or end are NULL.)
+   */
+  bool getString(char const **begin, char const **end) const;
+#ifdef JSON_USE_CPPTL
+  CppTL::ConstString asConstString() const;
+#endif
+  Int asInt() const;
+  UInt asUInt() const;
+#if defined(JSON_HAS_INT64)
+  Int64 asInt64() const;
+  UInt64 asUInt64() const;
+#endif // if defined(JSON_HAS_INT64)
+  LargestInt asLargestInt() const;
+  LargestUInt asLargestUInt() const;
+  float asFloat() const;
+  double asDouble() const;
+  bool asBool() const;
+
+  bool isNull() const;
+  bool isBool() const;
+  bool isInt() const;
+  bool isInt64() const;
+  bool isUInt() const;
+  bool isUInt64() const;
+  bool isIntegral() const;
+  bool isDouble() const;
+  bool isNumeric() const;
+  bool isString() const;
+  bool isArray() const;
+  bool isObject() const;
+
+  bool isConvertibleTo(ValueType other) const;
+
+  /// Number of values in array or object
+  ArrayIndex size() const;
+
+  /// \brief Return true if empty array, empty object, or null;
+  /// otherwise, false.
+  bool empty() const;
+
+  /// Return isNull()
+  bool operator!() const;
+
+  /// Remove all object members and array elements.
+  /// \pre type() is arrayValue, objectValue, or nullValue
+  /// \post type() is unchanged
+  void clear();
+
+  /// Resize the array to size elements.
+  /// New elements are initialized to null.
+  /// May only be called on nullValue or arrayValue.
+  /// \pre type() is arrayValue or nullValue
+  /// \post type() is arrayValue
+  void resize(ArrayIndex size);
+
+  /// Access an array element (zero based index ).
+  /// If the array contains less than index element, then null value are
+  /// inserted
+  /// in the array so that its size is index+1.
+  /// (You may need to say 'value[0u]' to get your compiler to distinguish
+  ///  this from the operator[] which takes a string.)
+  Value &operator[](ArrayIndex index);
+
+  /// Access an array element (zero based index ).
+  /// If the array contains less than index element, then null value are
+  /// inserted
+  /// in the array so that its size is index+1.
+  /// (You may need to say 'value[0u]' to get your compiler to distinguish
+  ///  this from the operator[] which takes a string.)
+  Value &operator[](int index);
+
+  /// Access an array element (zero based index )
+  /// (You may need to say 'value[0u]' to get your compiler to distinguish
+  ///  this from the operator[] which takes a string.)
+  const Value &operator[](ArrayIndex index) const;
+
+  /// Access an array element (zero based index )
+  /// (You may need to say 'value[0u]' to get your compiler to distinguish
+  ///  this from the operator[] which takes a string.)
+  const Value &operator[](int index) const;
+
+  /// If the array contains at least index+1 elements, returns the element
+  /// value,
+  /// otherwise returns defaultValue.
+  Value get(ArrayIndex index, const Value &defaultValue) const;
+  /// Return true if index < size().
+  bool isValidIndex(ArrayIndex index) const;
+  /// \brief Append value to array at the end.
+  ///
+  /// Equivalent to jsonvalue[jsonvalue.size()] = value;
+  Value &append(const Value &value);
+
+  /// Access an object value by name, create a null member if it does not exist.
+  /// \note Because of our implementation, keys are limited to 2^30 -1 chars.
+  ///  Exceeding that will cause an exception.
+  Value &operator[](const char *key);
+  /// Access an object value by name, returns null if there is no member with
+  /// that name.
+  const Value &operator[](const char *key) const;
+  /// Access an object value by name, create a null member if it does not exist.
+  /// \param key may contain embedded nulls.
+  Value &operator[](const JSONCPP_STRING &key);
+  /// Access an object value by name, returns null if there is no member with
+  /// that name.
+  /// \param key may contain embedded nulls.
+  const Value &operator[](const JSONCPP_STRING &key) const;
+  /** \brief Access an object value by name, create a null member if it does not
+   exist.
+
+   * If the object has no entry for that name, then the member name used to store
+   * the new entry is not duplicated.
+   * Example of use:
+   * \code
+   * Json::Value object;
+   * static const StaticString code("code");
+   * object[code] = 1234;
+   * \endcode
+   */
+  Value &operator[](const StaticString &key);
+#ifdef JSON_USE_CPPTL
+  /// Access an object value by name, create a null member if it does not exist.
+  Value &operator[](const CppTL::ConstString &key);
+  /// Access an object value by name, returns null if there is no member with
+  /// that name.
+  const Value &operator[](const CppTL::ConstString &key) const;
+#endif
+  /// Return the member named key if it exist, defaultValue otherwise.
+  /// \note deep copy
+  Value get(const char *key, const Value &defaultValue) const;
+  /// Return the member named key if it exist, defaultValue otherwise.
+  /// \note deep copy
+  /// \note key may contain embedded nulls.
+  Value get(const char *begin, const char *end, const Value &defaultValue) const;
+  /// Return the member named key if it exist, defaultValue otherwise.
+  /// \note deep copy
+  /// \param key may contain embedded nulls.
+  Value get(const JSONCPP_STRING &key, const Value &defaultValue) const;
+#ifdef JSON_USE_CPPTL
+  /// Return the member named key if it exist, defaultValue otherwise.
+  /// \note deep copy
+  Value get(const CppTL::ConstString &key, const Value &defaultValue) const;
+#endif
+  /// Most general and efficient version of isMember()const, get()const,
+  /// and operator[]const
+  /// \note As stated elsewhere, behavior is undefined if (end-begin) >= 2^30
+  Value const *find(char const *begin, char const *end) const;
+  /// Most general and efficient version of object-mutators.
+  /// \note As stated elsewhere, behavior is undefined if (end-begin) >= 2^30
+  /// \return non-zero, but JSON_ASSERT if this is neither object nor nullValue.
+  Value const *demand(char const *begin, char const *end);
+  /// \brief Remove and return the named member.
+  ///
+  /// Do nothing if it did not exist.
+  /// \return the removed Value, or null.
+  /// \pre type() is objectValue or nullValue
+  /// \post type() is unchanged
+  /// \deprecated
+  Value removeMember(const char *key);
+  /// Same as removeMember(const char*)
+  /// \param key may contain embedded nulls.
+  /// \deprecated
+  Value removeMember(const JSONCPP_STRING &key);
+  /// Same as removeMember(const char* begin, const char* end, Value* removed),
+  /// but 'key' is null-terminated.
+  bool removeMember(const char *key, Value *removed);
+  /** \brief Remove the named map member.
+
+      Update 'removed' iff removed.
+      \param key may contain embedded nulls.
+      \return true iff removed (no exceptions)
+  */
+  bool removeMember(JSONCPP_STRING const &key, Value *removed);
+  /// Same as removeMember(JSONCPP_STRING const& key, Value* removed)
+  bool removeMember(const char *begin, const char *end, Value *removed);
+  /** \brief Remove the indexed array element.
+
+      O(n) expensive operations.
+      Update 'removed' iff removed.
+      \return true iff removed (no exceptions)
+  */
+  bool removeIndex(ArrayIndex i, Value *removed);
+
+  /// Return true if the object has a member named key.
+  /// \note 'key' must be null-terminated.
+  bool isMember(const char *key) const;
+  /// Return true if the object has a member named key.
+  /// \param key may contain embedded nulls.
+  bool isMember(const JSONCPP_STRING &key) const;
+  /// Same as isMember(JSONCPP_STRING const& key)const
+  bool isMember(const char *begin, const char *end) const;
+#ifdef JSON_USE_CPPTL
+  /// Return true if the object has a member named key.
+  bool isMember(const CppTL::ConstString &key) const;
+#endif
+
+  /// \brief Return a list of the member names.
+  ///
+  /// If null, return an empty list.
+  /// \pre type() is objectValue or nullValue
+  /// \post if type() was nullValue, it remains nullValue
+  Members getMemberNames() const;
+
+  //# ifdef JSON_USE_CPPTL
+  //      EnumMemberNames enumMemberNames() const;
+  //      EnumValues enumValues() const;
+  //# endif
+
+  /// \deprecated Always pass len.
+  JSONCPP_DEPRECATED("Use setComment(JSONCPP_STRING const&) instead.")
+  void setComment(const char *comment, CommentPlacement placement);
+  /// Comments must be //... or /* ... */
+  void setComment(const char *comment, size_t len, CommentPlacement placement);
+  /// Comments must be //... or /* ... */
+  void setComment(const JSONCPP_STRING &comment, CommentPlacement placement);
+  bool hasComment(CommentPlacement placement) const;
+  /// Include delimiters and embedded newlines.
+  JSONCPP_STRING getComment(CommentPlacement placement) const;
+
+  JSONCPP_STRING toStyledString() const;
+
+  const_iterator begin() const;
+  const_iterator end() const;
+
+  iterator begin();
+  iterator end();
+
+  // Accessors for the [start, limit) range of bytes within the JSON text from
+  // which this value was parsed, if any.
+  void setOffsetStart(ptrdiff_t start);
+  void setOffsetLimit(ptrdiff_t limit);
+  ptrdiff_t getOffsetStart() const;
+  ptrdiff_t getOffsetLimit() const;
+
+private:
+  void initBasic(ValueType type, bool allocated = false);
+
+  Value &resolveReference(const char *key);
+  Value &resolveReference(const char *key, const char *end);
+
+  struct CommentInfo
+  {
+    CommentInfo();
+    ~CommentInfo();
+
+    void setComment(const char *text, size_t len);
+
+    char *comment_;
+  };
+
+  // struct MemberNamesTransform
+  //{
+  //   typedef const char *result_type;
+  //   const char *operator()( const CZString &name ) const
+  //   {
+  //      return name.c_str();
+  //   }
+  //};
+
+  union ValueHolder {
+    LargestInt int_;
+    LargestUInt uint_;
+    double real_;
+    bool bool_;
+    char *string_; // actually ptr to unsigned, followed by str, unless !allocated_
+    ObjectValues *map_;
+  } value_;
+  ValueType type_ : 8;
+  unsigned int allocated_ : 1; // Notes: if declared as bool, bitfield is useless.
+                               // If not allocated_, string_ must be null-terminated.
+  CommentInfo *comments_;
+
+  // [start, limit) byte offsets in the source JSON text from which this Value
+  // was extracted.
+  ptrdiff_t start_;
+  ptrdiff_t limit_;
+};
+
+/** \brief Experimental and untested: represents an element of the "path" to
+ * access a node.
+ */
+class JSON_API PathArgument
+{
+public:
+  friend class Path;
+
+  PathArgument();
+  PathArgument(ArrayIndex index);
+  PathArgument(const char *key);
+  PathArgument(const JSONCPP_STRING &key);
+
+private:
+  enum Kind
+  {
+    kindNone = 0,
+    kindIndex,
+    kindKey
+  };
+  JSONCPP_STRING key_;
+  ArrayIndex index_;
+  Kind kind_;
+};
+
+/** \brief Experimental and untested: represents a "path" to access a node.
+ *
+ * Syntax:
+ * - "." => root node
+ * - ".[n]" => elements at index 'n' of root node (an array value)
+ * - ".name" => member named 'name' of root node (an object value)
+ * - ".name1.name2.name3"
+ * - ".[0][1][2].name1[3]"
+ * - ".%" => member name is provided as parameter
+ * - ".[%]" => index is provied as parameter
+ */
+class JSON_API Path
+{
+public:
+  Path(const JSONCPP_STRING &path, const PathArgument &a1 = PathArgument(),
+       const PathArgument &a2 = PathArgument(), const PathArgument &a3 = PathArgument(),
+       const PathArgument &a4 = PathArgument(), const PathArgument &a5 = PathArgument());
+
+  const Value &resolve(const Value &root) const;
+  Value resolve(const Value &root, const Value &defaultValue) const;
+  /// Creates the "path" to access the specified node and returns a reference on
+  /// the node.
+  Value &make(Value &root) const;
+
+private:
+  typedef std::vector<const PathArgument *> InArgs;
+  typedef std::vector<PathArgument> Args;
+
+  void makePath(const JSONCPP_STRING &path, const InArgs &in);
+  void addPathInArg(const JSONCPP_STRING &path, const InArgs &in, InArgs::const_iterator &itInArg,
+                    PathArgument::Kind kind);
+  void invalidPath(const JSONCPP_STRING &path, int location);
+
+  Args args_;
+};
+
+/** \brief base class for Value iterators.
+ *
+ */
+class JSON_API ValueIteratorBase
+{
+public:
+  typedef std::bidirectional_iterator_tag iterator_category;
+  typedef unsigned int size_t;
+  typedef int difference_type;
+  typedef ValueIteratorBase SelfType;
+
+  bool operator==(const SelfType &other) const { return isEqual(other); }
+
+  bool operator!=(const SelfType &other) const { return !isEqual(other); }
+
+  difference_type operator-(const SelfType &other) const { return other.computeDistance(*this); }
+
+  /// Return either the index or the member name of the referenced value as a
+  /// Value.
+  Value key() const;
+
+  /// Return the index of the referenced Value, or -1 if it is not an arrayValue.
+  UInt index() const;
+
+  /// Return the member name of the referenced Value, or "" if it is not an
+  /// objectValue.
+  /// \note Avoid `c_str()` on result, as embedded zeroes are possible.
+  JSONCPP_STRING name() const;
+
+  /// Return the member name of the referenced Value. "" if it is not an
+  /// objectValue.
+  /// \deprecated This cannot be used for UTF-8 strings, since there can be embedded nulls.
+  JSONCPP_DEPRECATED("Use `key = name();` instead.")
+  char const *memberName() const;
+  /// Return the member name of the referenced Value, or NULL if it is not an
+  /// objectValue.
+  /// \note Better version than memberName(). Allows embedded nulls.
+  char const *memberName(char const **end) const;
+
+protected:
+  Value &deref() const;
+
+  void increment();
+
+  void decrement();
+
+  difference_type computeDistance(const SelfType &other) const;
+
+  bool isEqual(const SelfType &other) const;
+
+  void copy(const SelfType &other);
+
+private:
+  Value::ObjectValues::iterator current_;
+  // Indicates that iterator is for a null value.
+  bool isNull_;
+
+public:
+  // For some reason, BORLAND needs these at the end, rather
+  // than earlier. No idea why.
+  ValueIteratorBase();
+  explicit ValueIteratorBase(const Value::ObjectValues::iterator &current);
+};
+
+/** \brief const iterator for object and array value.
+ *
+ */
+class JSON_API ValueConstIterator : public ValueIteratorBase
+{
+  friend class Value;
+
+public:
+  typedef const Value value_type;
+  // typedef unsigned int size_t;
+  // typedef int difference_type;
+  typedef const Value &reference;
+  typedef const Value *pointer;
+  typedef ValueConstIterator SelfType;
+
+  ValueConstIterator();
+  ValueConstIterator(ValueIterator const &other);
+
+private:
+  /*! \internal Use by Value to create an iterator.
+   */
+  explicit ValueConstIterator(const Value::ObjectValues::iterator &current);
+
+public:
+  SelfType &operator=(const ValueIteratorBase &other);
+
+  SelfType operator++(int)
+  {
+    SelfType temp(*this);
+    ++*this;
+    return temp;
+  }
+
+  SelfType operator--(int)
+  {
+    SelfType temp(*this);
+    --*this;
+    return temp;
+  }
+
+  SelfType &operator--()
+  {
+    decrement();
+    return *this;
+  }
+
+  SelfType &operator++()
+  {
+    increment();
+    return *this;
+  }
+
+  reference operator*() const { return deref(); }
+
+  pointer operator->() const { return &deref(); }
+};
+
+/** \brief Iterator for object and array value.
+ */
+class JSON_API ValueIterator : public ValueIteratorBase
+{
+  friend class Value;
+
+public:
+  typedef Value value_type;
+  typedef unsigned int size_t;
+  typedef int difference_type;
+  typedef Value &reference;
+  typedef Value *pointer;
+  typedef ValueIterator SelfType;
+
+  ValueIterator();
+  explicit ValueIterator(const ValueConstIterator &other);
+  ValueIterator(const ValueIterator &other);
+
+private:
+  /*! \internal Use by Value to create an iterator.
+   */
+  explicit ValueIterator(const Value::ObjectValues::iterator &current);
+
+public:
+  SelfType &operator=(const SelfType &other);
+
+  SelfType operator++(int)
+  {
+    SelfType temp(*this);
+    ++*this;
+    return temp;
+  }
+
+  SelfType operator--(int)
+  {
+    SelfType temp(*this);
+    --*this;
+    return temp;
+  }
+
+  SelfType &operator--()
+  {
+    decrement();
+    return *this;
+  }
+
+  SelfType &operator++()
+  {
+    increment();
+    return *this;
+  }
+
+  reference operator*() const { return deref(); }
+
+  pointer operator->() const { return &deref(); }
+};
+
+} // namespace Json
+
+namespace std
+{
+/// Specialize std::swap() for Json::Value.
+template <> inline void swap(Json::Value &a, Json::Value &b) { a.swap(b); }
+}
+
+#if defined(JSONCPP_DISABLE_DLL_INTERFACE_WARNING)
+#pragma warning(pop)
+#endif // if defined(JSONCPP_DISABLE_DLL_INTERFACE_WARNING)
+
+#endif // CPPTL_JSON_H_INCLUDED
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: include/json/value.h
+// //////////////////////////////////////////////////////////////////////
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: include/json/reader.h
+// //////////////////////////////////////////////////////////////////////
+
+// Copyright 2007-2010 Baptiste Lepilleur
+// Distributed under MIT license, or public domain if desired and
+// recognized in your jurisdiction.
+// See file LICENSE for detail or copy at http://jsoncpp.sourceforge.net/LICENSE
+
+#ifndef CPPTL_JSON_READER_H_INCLUDED
+#define CPPTL_JSON_READER_H_INCLUDED
+
+#if !defined(JSON_IS_AMALGAMATION)
+#include "features.h"
+#include "value.h"
+#endif // if !defined(JSON_IS_AMALGAMATION)
+#include <deque>
+#include <iosfwd>
+#include <stack>
+#include <string>
+#include <istream>
+
+// Disable warning C4251: <data member>: <type> needs to have dll-interface to
+// be used by...
+#if defined(JSONCPP_DISABLE_DLL_INTERFACE_WARNING)
+#pragma warning(push)
+#pragma warning(disable : 4251)
+#endif // if defined(JSONCPP_DISABLE_DLL_INTERFACE_WARNING)
+
+namespace Json
+{
+
+/** \brief Unserialize a <a HREF="http://www.json.org">JSON</a> document into a
+ *Value.
+ *
+ * \deprecated Use CharReader and CharReaderBuilder.
+ */
+class JSON_API Reader
+{
+public:
+  typedef char Char;
+  typedef const Char *Location;
+
+  /** \brief An error tagged with where in the JSON text it was encountered.
+   *
+   * The offsets give the [start, limit) range of bytes within the text. Note
+   * that this is bytes, not codepoints.
+   *
+   */
+  struct StructuredError
+  {
+    ptrdiff_t offset_start;
+    ptrdiff_t offset_limit;
+    JSONCPP_STRING message;
+  };
+
+  /** \brief Constructs a Reader allowing all features
+   * for parsing.
+   */
+  Reader();
+
+  /** \brief Constructs a Reader allowing the specified feature set
+   * for parsing.
+   */
+  Reader(const Features &features);
+
+  /** \brief Read a Value from a <a HREF="http://www.json.org">JSON</a>
+   * document.
+   * \param document UTF-8 encoded string containing the document to read.
+   * \param root [out] Contains the root value of the document if it was
+   *             successfully parsed.
+   * \param collectComments \c true to collect comment and allow writing them
+   * back during
+   *                        serialization, \c false to discard comments.
+   *                        This parameter is ignored if
+   * Features::allowComments_
+   *                        is \c false.
+   * \return \c true if the document was successfully parsed, \c false if an
+   * error occurred.
+   */
+  bool parse(const std::string &document, Value &root, bool collectComments = true);
+
+  /** \brief Read a Value from a <a HREF="http://www.json.org">JSON</a>
+   document.
+   * \param beginDoc Pointer on the beginning of the UTF-8 encoded string of the
+   document to read.
+   * \param endDoc Pointer on the end of the UTF-8 encoded string of the
+   document to read.
+   *               Must be >= beginDoc.
+   * \param root [out] Contains the root value of the document if it was
+   *             successfully parsed.
+   * \param collectComments \c true to collect comment and allow writing them
+   back during
+   *                        serialization, \c false to discard comments.
+   *                        This parameter is ignored if
+   Features::allowComments_
+   *                        is \c false.
+   * \return \c true if the document was successfully parsed, \c false if an
+   error occurred.
+   */
+  bool parse(const char *beginDoc, const char *endDoc, Value &root, bool collectComments = true);
+
+  /// \brief Parse from input stream.
+  /// \see Json::operator>>(std::istream&, Json::Value&).
+  bool parse(JSONCPP_ISTREAM &is, Value &root, bool collectComments = true);
+
+  /** \brief Returns a user friendly string that list errors in the parsed
+   * document.
+   * \return Formatted error message with the list of errors with their location
+   * in
+   *         the parsed document. An empty string is returned if no error
+   * occurred
+   *         during parsing.
+   * \deprecated Use getFormattedErrorMessages() instead (typo fix).
+   */
+  JSONCPP_DEPRECATED("Use getFormattedErrorMessages() instead.")
+  JSONCPP_STRING getFormatedErrorMessages() const;
+
+  /** \brief Returns a user friendly string that list errors in the parsed
+   * document.
+   * \return Formatted error message with the list of errors with their location
+   * in
+   *         the parsed document. An empty string is returned if no error
+   * occurred
+   *         during parsing.
+   */
+  JSONCPP_STRING getFormattedErrorMessages() const;
+
+  /** \brief Returns a vector of structured erros encounted while parsing.
+   * \return A (possibly empty) vector of StructuredError objects. Currently
+   *         only one error can be returned, but the caller should tolerate
+   * multiple
+   *         errors.  This can occur if the parser recovers from a non-fatal
+   *         parse error and then encounters additional errors.
+   */
+  std::vector<StructuredError> getStructuredErrors() const;
+
+  /** \brief Add a semantic error message.
+   * \param value JSON Value location associated with the error
+   * \param message The error message.
+   * \return \c true if the error was successfully added, \c false if the
+   * Value offset exceeds the document size.
+   */
+  bool pushError(const Value &value, const JSONCPP_STRING &message);
+
+  /** \brief Add a semantic error message with extra context.
+   * \param value JSON Value location associated with the error
+   * \param message The error message.
+   * \param extra Additional JSON Value location to contextualize the error
+   * \return \c true if the error was successfully added, \c false if either
+   * Value offset exceeds the document size.
+   */
+  bool pushError(const Value &value, const JSONCPP_STRING &message, const Value &extra);
+
+  /** \brief Return whether there are any errors.
+   * \return \c true if there are no errors to report \c false if
+   * errors have occurred.
+   */
+  bool good() const;
+
+private:
+  enum TokenType
+  {
+    tokenEndOfStream = 0,
+    tokenObjectBegin,
+    tokenObjectEnd,
+    tokenArrayBegin,
+    tokenArrayEnd,
+    tokenString,
+    tokenNumber,
+    tokenTrue,
+    tokenFalse,
+    tokenNull,
+    tokenArraySeparator,
+    tokenMemberSeparator,
+    tokenComment,
+    tokenError
+  };
+
+  class Token
+  {
+  public:
+    TokenType type_;
+    Location start_;
+    Location end_;
+  };
+
+  class ErrorInfo
+  {
+  public:
+    Token token_;
+    JSONCPP_STRING message_;
+    Location extra_;
+  };
+
+  typedef std::deque<ErrorInfo> Errors;
+
+  bool readToken(Token &token);
+  void skipSpaces();
+  bool match(Location pattern, int patternLength);
+  bool readComment();
+  bool readCStyleComment();
+  bool readCppStyleComment();
+  bool readString();
+  void readNumber();
+  bool readValue();
+  bool readObject(Token &token);
+  bool readArray(Token &token);
+  bool decodeNumber(Token &token);
+  bool decodeNumber(Token &token, Value &decoded);
+  bool decodeString(Token &token);
+  bool decodeString(Token &token, JSONCPP_STRING &decoded);
+  bool decodeDouble(Token &token);
+  bool decodeDouble(Token &token, Value &decoded);
+  bool decodeUnicodeCodePoint(Token &token, Location &current, Location end, unsigned int &unicode);
+  bool decodeUnicodeEscapeSequence(Token &token, Location &current, Location end,
+                                   unsigned int &unicode);
+  bool addError(const JSONCPP_STRING &message, Token &token, Location extra = 0);
+  bool recoverFromError(TokenType skipUntilToken);
+  bool addErrorAndRecover(const JSONCPP_STRING &message, Token &token, TokenType skipUntilToken);
+  void skipUntilSpace();
+  Value &currentValue();
+  Char getNextChar();
+  void getLocationLineAndColumn(Location location, int &line, int &column) const;
+  JSONCPP_STRING getLocationLineAndColumn(Location location) const;
+  void addComment(Location begin, Location end, CommentPlacement placement);
+  void skipCommentTokens(Token &token);
+
+  typedef std::stack<Value *> Nodes;
+  Nodes nodes_;
+  Errors errors_;
+  JSONCPP_STRING document_;
+  Location begin_;
+  Location end_;
+  Location current_;
+  Location lastValueEnd_;
+  Value *lastValue_;
+  JSONCPP_STRING commentsBefore_;
+  Features features_;
+  bool collectComments_;
+}; // Reader
+
+/** Interface for reading JSON from a char array.
+ */
+class JSON_API CharReader
+{
+public:
+  virtual ~CharReader() {}
+  /** \brief Read a Value from a <a HREF="http://www.json.org">JSON</a>
+   document.
+   * The document must be a UTF-8 encoded string containing the document to read.
+   *
+   * \param beginDoc Pointer on the beginning of the UTF-8 encoded string of the
+   document to read.
+   * \param endDoc Pointer on the end of the UTF-8 encoded string of the
+   document to read.
+   *        Must be >= beginDoc.
+   * \param root [out] Contains the root value of the document if it was
+   *             successfully parsed.
+   * \param errs [out] Formatted error messages (if not NULL)
+   *        a user friendly string that lists errors in the parsed
+   * document.
+   * \return \c true if the document was successfully parsed, \c false if an
+   error occurred.
+   */
+  virtual bool parse(char const *beginDoc, char const *endDoc, Value *root,
+                     JSONCPP_STRING *errs) = 0;
+
+  class JSON_API Factory
+  {
+  public:
+    virtual ~Factory() {}
+    /** \brief Allocate a CharReader via operator new().
+     * \throw std::exception if something goes wrong (e.g. invalid settings)
+     */
+    virtual CharReader *newCharReader() const = 0;
+  }; // Factory
+};   // CharReader
+
+/** \brief Build a CharReader implementation.
+
+Usage:
+\code
+  using namespace Json;
+  CharReaderBuilder builder;
+  builder["collectComments"] = false;
+  Value value;
+  JSONCPP_STRING errs;
+  bool ok = parseFromStream(builder, std::cin, &value, &errs);
+\endcode
+*/
+class JSON_API CharReaderBuilder : public CharReader::Factory
+{
+public:
+  // Note: We use a Json::Value so that we can add data-members to this class
+  // without a major version bump.
+  /** Configuration of this builder.
+    These are case-sensitive.
+    Available settings (case-sensitive):
+    - `"collectComments": false or true`
+      - true to collect comment and allow writing them
+        back during serialization, false to discard comments.
+        This parameter is ignored if allowComments is false.
+    - `"allowComments": false or true`
+      - true if comments are allowed.
+    - `"strictRoot": false or true`
+      - true if root must be either an array or an object value
+    - `"allowDroppedNullPlaceholders": false or true`
+      - true if dropped null placeholders are allowed. (See StreamWriterBuilder.)
+    - `"allowNumericKeys": false or true`
+      - true if numeric object keys are allowed.
+    - `"allowSingleQuotes": false or true`
+      - true if '' are allowed for strings (both keys and values)
+    - `"stackLimit": integer`
+      - Exceeding stackLimit (recursive depth of `readValue()`) will
+        cause an exception.
+      - This is a security issue (seg-faults caused by deeply nested JSON),
+        so the default is low.
+    - `"failIfExtra": false or true`
+      - If true, `parse()` returns false when extra non-whitespace trails
+        the JSON value in the input string.
+    - `"rejectDupKeys": false or true`
+      - If true, `parse()` returns false when a key is duplicated within an object.
+    - `"allowSpecialFloats": false or true`
+      - If true, special float values (NaNs and infinities) are allowed
+        and their values are lossfree restorable.
+
+    You can examine 'settings_` yourself
+    to see the defaults. You can also write and read them just like any
+    JSON Value.
+    \sa setDefaults()
+    */
+  Json::Value settings_;
+
+  CharReaderBuilder();
+  ~CharReaderBuilder() JSONCPP_OVERRIDE;
+
+  CharReader *newCharReader() const JSONCPP_OVERRIDE;
+
+  /** \return true if 'settings' are legal and consistent;
+   *   otherwise, indicate bad settings via 'invalid'.
+   */
+  bool validate(Json::Value *invalid) const;
+
+  /** A simple way to update a specific setting.
+   */
+  Value &operator[](JSONCPP_STRING key);
+
+  /** Called by ctor, but you can use this to reset settings_.
+   * \pre 'settings' != NULL (but Json::null is fine)
+   * \remark Defaults:
+   * \snippet src/lib_json/json_reader.cpp CharReaderBuilderDefaults
+   */
+  static void setDefaults(Json::Value *settings);
+  /** Same as old Features::strictMode().
+   * \pre 'settings' != NULL (but Json::null is fine)
+   * \remark Defaults:
+   * \snippet src/lib_json/json_reader.cpp CharReaderBuilderStrictMode
+   */
+  static void strictMode(Json::Value *settings);
+};
+
+/** Consume entire stream and use its begin/end.
+  * Someday we might have a real StreamReader, but for now this
+  * is convenient.
+  */
+bool JSON_API parseFromStream(CharReader::Factory const &, JSONCPP_ISTREAM &, Value *root,
+                              std::string *errs);
+
+/** \brief Read from 'sin' into 'root'.
+
+ Always keep comments from the input JSON.
+
+ This can be used to read a file into a particular sub-object.
+ For example:
+ \code
+ Json::Value root;
+ cin >> root["dir"]["file"];
+ cout << root;
+ \endcode
+ Result:
+ \verbatim
+ {
+ "dir": {
+     "file": {
+     // The input stream JSON would be nested here.
+     }
+ }
+ }
+ \endverbatim
+ \throw std::exception on parse error.
+ \see Json::operator<<()
+*/
+JSON_API JSONCPP_ISTREAM &operator>>(JSONCPP_ISTREAM &, Value &);
+
+} // namespace Json
+
+#if defined(JSONCPP_DISABLE_DLL_INTERFACE_WARNING)
+#pragma warning(pop)
+#endif // if defined(JSONCPP_DISABLE_DLL_INTERFACE_WARNING)
+
+#endif // CPPTL_JSON_READER_H_INCLUDED
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: include/json/reader.h
+// //////////////////////////////////////////////////////////////////////
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: include/json/writer.h
+// //////////////////////////////////////////////////////////////////////
+
+// Copyright 2007-2010 Baptiste Lepilleur
+// Distributed under MIT license, or public domain if desired and
+// recognized in your jurisdiction.
+// See file LICENSE for detail or copy at http://jsoncpp.sourceforge.net/LICENSE
+
+#ifndef JSON_WRITER_H_INCLUDED
+#define JSON_WRITER_H_INCLUDED
+
+#if !defined(JSON_IS_AMALGAMATION)
+#include "value.h"
+#endif // if !defined(JSON_IS_AMALGAMATION)
+#include <vector>
+#include <string>
+#include <ostream>
+
+// Disable warning C4251: <data member>: <type> needs to have dll-interface to
+// be used by...
+#if defined(JSONCPP_DISABLE_DLL_INTERFACE_WARNING)
+#pragma warning(push)
+#pragma warning(disable : 4251)
+#endif // if defined(JSONCPP_DISABLE_DLL_INTERFACE_WARNING)
+
+namespace Json
+{
+
+class Value;
+
+/**
+
+Usage:
+\code
+  using namespace Json;
+  void writeToStdout(StreamWriter::Factory const& factory, Value const& value) {
+    std::unique_ptr<StreamWriter> const writer(
+      factory.newStreamWriter());
+    writer->write(value, &std::cout);
+    std::cout << std::endl;  // add lf and flush
+  }
+\endcode
+*/
+class JSON_API StreamWriter
+{
+protected:
+  JSONCPP_OSTREAM *sout_; // not owned; will not delete
+public:
+  StreamWriter();
+  virtual ~StreamWriter();
+  /** Write Value into document as configured in sub-class.
+      Do not take ownership of sout, but maintain a reference during function.
+      \pre sout != NULL
+      \return zero on success (For now, we always return zero, so check the stream instead.)
+      \throw std::exception possibly, depending on configuration
+   */
+  virtual int write(Value const &root, JSONCPP_OSTREAM *sout) = 0;
+
+  /** \brief A simple abstract factory.
+   */
+  class JSON_API Factory
+  {
+  public:
+    virtual ~Factory();
+    /** \brief Allocate a CharReader via operator new().
+     * \throw std::exception if something goes wrong (e.g. invalid settings)
+     */
+    virtual StreamWriter *newStreamWriter() const = 0;
+  }; // Factory
+};   // StreamWriter
+
+/** \brief Write into stringstream, then return string, for convenience.
+ * A StreamWriter will be created from the factory, used, and then deleted.
+ */
+JSONCPP_STRING JSON_API writeString(StreamWriter::Factory const &factory, Value const &root);
+
+/** \brief Build a StreamWriter implementation.
+
+Usage:
+\code
+  using namespace Json;
+  Value value = ...;
+  StreamWriterBuilder builder;
+  builder["commentStyle"] = "None";
+  builder["indentation"] = "   ";  // or whatever you like
+  std::unique_ptr<Json::StreamWriter> writer(
+      builder.newStreamWriter());
+  writer->write(value, &std::cout);
+  std::cout << std::endl;  // add lf and flush
+\endcode
+*/
+class JSON_API StreamWriterBuilder : public StreamWriter::Factory
+{
+public:
+  // Note: We use a Json::Value so that we can add data-members to this class
+  // without a major version bump.
+  /** Configuration of this builder.
+    Available settings (case-sensitive):
+    - "commentStyle": "None" or "All"
+    - "indentation":  "<anything>"
+    - "enableYAMLCompatibility": false or true
+      - slightly change the whitespace around colons
+    - "dropNullPlaceholders": false or true
+      - Drop the "null" string from the writer's output for nullValues.
+        Strictly speaking, this is not valid JSON. But when the output is being
+        fed to a browser's Javascript, it makes for smaller output and the
+        browser can handle the output just fine.
+    - "useSpecialFloats": false or true
+      - If true, outputs non-finite floating point values in the following way:
+        NaN values as "NaN", positive infinity as "Infinity", and negative infinity
+        as "-Infinity".
+
+    You can examine 'settings_` yourself
+    to see the defaults. You can also write and read them just like any
+    JSON Value.
+    \sa setDefaults()
+    */
+  Json::Value settings_;
+
+  StreamWriterBuilder();
+  ~StreamWriterBuilder() JSONCPP_OVERRIDE;
+
+  /**
+   * \throw std::exception if something goes wrong (e.g. invalid settings)
+   */
+  StreamWriter *newStreamWriter() const JSONCPP_OVERRIDE;
+
+  /** \return true if 'settings' are legal and consistent;
+   *   otherwise, indicate bad settings via 'invalid'.
+   */
+  bool validate(Json::Value *invalid) const;
+  /** A simple way to update a specific setting.
+   */
+  Value &operator[](JSONCPP_STRING key);
+
+  /** Called by ctor, but you can use this to reset settings_.
+   * \pre 'settings' != NULL (but Json::null is fine)
+   * \remark Defaults:
+   * \snippet src/lib_json/json_writer.cpp StreamWriterBuilderDefaults
+   */
+  static void setDefaults(Json::Value *settings);
+};
+
+/** \brief Abstract class for writers.
+ * \deprecated Use StreamWriter. (And really, this is an implementation detail.)
+ */
+class JSON_API Writer
+{
+public:
+  virtual ~Writer();
+
+  virtual JSONCPP_STRING write(const Value &root) = 0;
+};
+
+/** \brief Outputs a Value in <a HREF="http://www.json.org">JSON</a> format
+ *without formatting (not human friendly).
+ *
+ * The JSON document is written in a single line. It is not intended for 'human'
+ *consumption,
+ * but may be usefull to support feature such as RPC where bandwith is limited.
+ * \sa Reader, Value
+ * \deprecated Use StreamWriterBuilder.
+ */
+class JSON_API FastWriter : public Writer
+{
+
+public:
+  FastWriter();
+  ~FastWriter() JSONCPP_OVERRIDE {}
+
+  void enableYAMLCompatibility();
+
+  /** \brief Drop the "null" string from the writer's output for nullValues.
+   * Strictly speaking, this is not valid JSON. But when the output is being
+   * fed to a browser's Javascript, it makes for smaller output and the
+   * browser can handle the output just fine.
+   */
+  void dropNullPlaceholders();
+
+  void omitEndingLineFeed();
+
+public: // overridden from Writer
+  JSONCPP_STRING write(const Value &root) JSONCPP_OVERRIDE;
+
+private:
+  void writeValue(const Value &value);
+
+  JSONCPP_STRING document_;
+  bool yamlCompatiblityEnabled_;
+  bool dropNullPlaceholders_;
+  bool omitEndingLineFeed_;
+};
+
+/** \brief Writes a Value in <a HREF="http://www.json.org">JSON</a> format in a
+ *human friendly way.
+ *
+ * The rules for line break and indent are as follow:
+ * - Object value:
+ *     - if empty then print {} without indent and line break
+ *     - if not empty the print '{', line break & indent, print one value per
+ *line
+ *       and then unindent and line break and print '}'.
+ * - Array value:
+ *     - if empty then print [] without indent and line break
+ *     - if the array contains no object value, empty array or some other value
+ *types,
+ *       and all the values fit on one lines, then print the array on a single
+ *line.
+ *     - otherwise, it the values do not fit on one line, or the array contains
+ *       object or non empty array, then print one value per line.
+ *
+ * If the Value have comments then they are outputed according to their
+ *#CommentPlacement.
+ *
+ * \sa Reader, Value, Value::setComment()
+ * \deprecated Use StreamWriterBuilder.
+ */
+class JSON_API StyledWriter : public Writer
+{
+public:
+  StyledWriter();
+  ~StyledWriter() JSONCPP_OVERRIDE {}
+
+public: // overridden from Writer
+  /** \brief Serialize a Value in <a HREF="http://www.json.org">JSON</a> format.
+   * \param root Value to serialize.
+   * \return String containing the JSON document that represents the root value.
+   */
+  JSONCPP_STRING write(const Value &root) JSONCPP_OVERRIDE;
+
+private:
+  void writeValue(const Value &value);
+  void writeArrayValue(const Value &value);
+  bool isMultineArray(const Value &value);
+  void pushValue(const JSONCPP_STRING &value);
+  void writeIndent();
+  void writeWithIndent(const JSONCPP_STRING &value);
+  void indent();
+  void unindent();
+  void writeCommentBeforeValue(const Value &root);
+  void writeCommentAfterValueOnSameLine(const Value &root);
+  bool hasCommentForValue(const Value &value);
+  static JSONCPP_STRING normalizeEOL(const JSONCPP_STRING &text);
+
+  typedef std::vector<JSONCPP_STRING> ChildValues;
+
+  ChildValues childValues_;
+  JSONCPP_STRING document_;
+  JSONCPP_STRING indentString_;
+  unsigned int rightMargin_;
+  unsigned int indentSize_;
+  bool addChildValues_;
+};
+
+/** \brief Writes a Value in <a HREF="http://www.json.org">JSON</a> format in a
+ human friendly way,
+     to a stream rather than to a string.
+ *
+ * The rules for line break and indent are as follow:
+ * - Object value:
+ *     - if empty then print {} without indent and line break
+ *     - if not empty the print '{', line break & indent, print one value per
+ line
+ *       and then unindent and line break and print '}'.
+ * - Array value:
+ *     - if empty then print [] without indent and line break
+ *     - if the array contains no object value, empty array or some other value
+ types,
+ *       and all the values fit on one lines, then print the array on a single
+ line.
+ *     - otherwise, it the values do not fit on one line, or the array contains
+ *       object or non empty array, then print one value per line.
+ *
+ * If the Value have comments then they are outputed according to their
+ #CommentPlacement.
+ *
+ * \param indentation Each level will be indented by this amount extra.
+ * \sa Reader, Value, Value::setComment()
+ * \deprecated Use StreamWriterBuilder.
+ */
+class JSON_API StyledStreamWriter
+{
+public:
+  StyledStreamWriter(JSONCPP_STRING indentation = "\t");
+  ~StyledStreamWriter() {}
+
+public:
+  /** \brief Serialize a Value in <a HREF="http://www.json.org">JSON</a> format.
+   * \param out Stream to write to. (Can be ostringstream, e.g.)
+   * \param root Value to serialize.
+   * \note There is no point in deriving from Writer, since write() should not
+   * return a value.
+   */
+  void write(JSONCPP_OSTREAM &out, const Value &root);
+
+private:
+  void writeValue(const Value &value);
+  void writeArrayValue(const Value &value);
+  bool isMultineArray(const Value &value);
+  void pushValue(const JSONCPP_STRING &value);
+  void writeIndent();
+  void writeWithIndent(const JSONCPP_STRING &value);
+  void indent();
+  void unindent();
+  void writeCommentBeforeValue(const Value &root);
+  void writeCommentAfterValueOnSameLine(const Value &root);
+  bool hasCommentForValue(const Value &value);
+  static JSONCPP_STRING normalizeEOL(const JSONCPP_STRING &text);
+
+  typedef std::vector<JSONCPP_STRING> ChildValues;
+
+  ChildValues childValues_;
+  JSONCPP_OSTREAM *document_;
+  JSONCPP_STRING indentString_;
+  unsigned int rightMargin_;
+  JSONCPP_STRING indentation_;
+  bool addChildValues_ : 1;
+  bool indented_ : 1;
+};
+
+#if defined(JSON_HAS_INT64)
+JSONCPP_STRING JSON_API valueToString(Int value);
+JSONCPP_STRING JSON_API valueToString(UInt value);
+#endif // if defined(JSON_HAS_INT64)
+JSONCPP_STRING JSON_API valueToString(LargestInt value);
+JSONCPP_STRING JSON_API valueToString(LargestUInt value);
+JSONCPP_STRING JSON_API valueToString(double value);
+JSONCPP_STRING JSON_API valueToString(bool value);
+JSONCPP_STRING JSON_API valueToQuotedString(const char *value);
+
+/// \brief Output using the StyledStreamWriter.
+/// \see Json::operator>>()
+JSON_API JSONCPP_OSTREAM &operator<<(JSONCPP_OSTREAM &, const Value &root);
+
+} // namespace Json
+
+#if defined(JSONCPP_DISABLE_DLL_INTERFACE_WARNING)
+#pragma warning(pop)
+#endif // if defined(JSONCPP_DISABLE_DLL_INTERFACE_WARNING)
+
+#endif // JSON_WRITER_H_INCLUDED
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: include/json/writer.h
+// //////////////////////////////////////////////////////////////////////
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: include/json/assertions.h
+// //////////////////////////////////////////////////////////////////////
+
+// Copyright 2007-2010 Baptiste Lepilleur
+// Distributed under MIT license, or public domain if desired and
+// recognized in your jurisdiction.
+// See file LICENSE for detail or copy at http://jsoncpp.sourceforge.net/LICENSE
+
+#ifndef CPPTL_JSON_ASSERTIONS_H_INCLUDED
+#define CPPTL_JSON_ASSERTIONS_H_INCLUDED
+
+#include <stdlib.h>
+#include <sstream>
+
+#if !defined(JSON_IS_AMALGAMATION)
+#include "config.h"
+#endif // if !defined(JSON_IS_AMALGAMATION)
+
+/** It should not be possible for a maliciously designed file to
+ *  cause an abort() or seg-fault, so these macros are used only
+ *  for pre-condition violations and internal logic errors.
+ */
+#if JSON_USE_EXCEPTION
+
+// @todo <= add detail about condition in exception
+#define JSON_ASSERT(condition)                     \
+  {                                                \
+    if (!(condition))                              \
+    {                                              \
+      Json::throwLogicError("assert json failed"); \
+    }                                              \
+  }
+
+#define JSON_FAIL_MESSAGE(message)    \
+  {                                   \
+    JSONCPP_OSTRINGSTREAM oss;        \
+    oss << message;                   \
+    Json::throwLogicError(oss.str()); \
+    abort();                          \
+  }
+
+#else // JSON_USE_EXCEPTION
+
+#define JSON_ASSERT(condition) assert(condition)
+
+// The call to assert() will show the failure message in debug builds. In
+// release builds we abort, for a core-dump or debugger.
+#define JSON_FAIL_MESSAGE(message)      \
+  {                                     \
+    JSONCPP_OSTRINGSTREAM oss;          \
+    oss << message;                     \
+    assert(false && oss.str().c_str()); \
+    abort();                            \
+  }
+
+#endif
+
+#define JSON_ASSERT_MESSAGE(condition, message) \
+  if (!(condition))                             \
+  {                                             \
+    JSON_FAIL_MESSAGE(message);                 \
+  }
+
+#endif // CPPTL_JSON_ASSERTIONS_H_INCLUDED
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: include/json/assertions.h
+// //////////////////////////////////////////////////////////////////////
+
+#endif // ifndef JSON_AMALGATED_H_INCLUDED
diff --git a/runtimes/libs/jsoncpp/jsoncpp.cpp b/runtimes/libs/jsoncpp/jsoncpp.cpp
new file mode 100644
index 000000000..5b3cd691d
--- /dev/null
+++ b/runtimes/libs/jsoncpp/jsoncpp.cpp
@@ -0,0 +1,5651 @@
+/// Json-cpp amalgated source (http://jsoncpp.sourceforge.net/).
+/// It is intended to be used with #include "json/json.h"
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: LICENSE
+// //////////////////////////////////////////////////////////////////////
+
+/*
+The JsonCpp library's source code, including accompanying documentation,
+tests and demonstration applications, are licensed under the following
+conditions...
+
+The author (Baptiste Lepilleur) explicitly disclaims copyright in all
+jurisdictions which recognize such a disclaimer. In such jurisdictions,
+this software is released into the Public Domain.
+
+In jurisdictions which do not recognize Public Domain property (e.g. Germany as of
+2010), this software is Copyright (c) 2007-2010 by Baptiste Lepilleur, and is
+released under the terms of the MIT License (see below).
+
+In jurisdictions which recognize Public Domain property, the user of this
+software may choose to accept it either as 1) Public Domain, 2) under the
+conditions of the MIT License (see below), or 3) under the terms of dual
+Public Domain/MIT License conditions described here, as they choose.
+
+The MIT License is about as close to Public Domain as a license can get, and is
+described in clear, concise terms at:
+
+   http://en.wikipedia.org/wiki/MIT_License
+
+The full text of the MIT License follows:
+
+========================================================================
+Copyright (c) 2007-2010 Baptiste Lepilleur
+
+Permission is hereby granted, free of charge, to any person
+obtaining a copy of this software and associated documentation
+files (the "Software"), to deal in the Software without
+restriction, including without limitation the rights to use, copy,
+modify, merge, publish, distribute, sublicense, and/or sell copies
+of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be
+included in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.
+========================================================================
+(END LICENSE TEXT)
+
+The MIT license is compatible with both the GPL and commercial
+software, affording one all of the rights of Public Domain with the
+minor nuisance of being required to keep the above copyright notice
+and license text in the source code. Note also that by accepting the
+Public Domain "license" you can re-license your copy using whatever
+license you like.
+
+*/
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: LICENSE
+// //////////////////////////////////////////////////////////////////////
+
+#include "json/json.h"
+
+#ifndef JSON_IS_AMALGAMATION
+#error "Compile with -I PATH_TO_JSON_DIRECTORY"
+#endif
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: src/lib_json/json_tool.h
+// //////////////////////////////////////////////////////////////////////
+
+// Copyright 2007-2010 Baptiste Lepilleur
+// Distributed under MIT license, or public domain if desired and
+// recognized in your jurisdiction.
+// See file LICENSE for detail or copy at http://jsoncpp.sourceforge.net/LICENSE
+
+#ifndef LIB_JSONCPP_JSON_TOOL_H_INCLUDED
+#define LIB_JSONCPP_JSON_TOOL_H_INCLUDED
+
+#ifndef NO_LOCALE_SUPPORT
+#include <clocale>
+#endif
+
+/* This header provides common string manipulation support, such as UTF-8,
+ * portable conversion from/to string...
+ *
+ * It is an internal header that must not be exposed.
+ */
+
+namespace Json
+{
+static char getDecimalPoint()
+{
+#ifdef NO_LOCALE_SUPPORT
+  return '\0';
+#else
+  struct lconv *lc = localeconv();
+  return lc ? *(lc->decimal_point) : '\0';
+#endif
+}
+
+/// Converts a unicode code-point to UTF-8.
+static inline JSONCPP_STRING codePointToUTF8(unsigned int cp)
+{
+  JSONCPP_STRING result;
+
+  // based on description from http://en.wikipedia.org/wiki/UTF-8
+
+  if (cp <= 0x7f)
+  {
+    result.resize(1);
+    result[0] = static_cast<char>(cp);
+  }
+  else if (cp <= 0x7FF)
+  {
+    result.resize(2);
+    result[1] = static_cast<char>(0x80 | (0x3f & cp));
+    result[0] = static_cast<char>(0xC0 | (0x1f & (cp >> 6)));
+  }
+  else if (cp <= 0xFFFF)
+  {
+    result.resize(3);
+    result[2] = static_cast<char>(0x80 | (0x3f & cp));
+    result[1] = static_cast<char>(0x80 | (0x3f & (cp >> 6)));
+    result[0] = static_cast<char>(0xE0 | (0xf & (cp >> 12)));
+  }
+  else if (cp <= 0x10FFFF)
+  {
+    result.resize(4);
+    result[3] = static_cast<char>(0x80 | (0x3f & cp));
+    result[2] = static_cast<char>(0x80 | (0x3f & (cp >> 6)));
+    result[1] = static_cast<char>(0x80 | (0x3f & (cp >> 12)));
+    result[0] = static_cast<char>(0xF0 | (0x7 & (cp >> 18)));
+  }
+
+  return result;
+}
+
+/// Returns true if ch is a control character (in range [1,31]).
+static inline bool isControlCharacter(char ch) { return ch > 0 && ch <= 0x1F; }
+
+enum
+{
+  /// Constant that specify the size of the buffer that must be passed to
+  /// uintToString.
+  uintToStringBufferSize = 3 * sizeof(LargestUInt) + 1
+};
+
+// Defines a char buffer for use with uintToString().
+typedef char UIntToStringBuffer[uintToStringBufferSize];
+
+/** Converts an unsigned integer to string.
+ * @param value Unsigned interger to convert to string
+ * @param current Input/Output string buffer.
+ *        Must have at least uintToStringBufferSize chars free.
+ */
+static inline void uintToString(LargestUInt value, char *&current)
+{
+  *--current = 0;
+  do
+  {
+    *--current = static_cast<char>(value % 10U + static_cast<unsigned>('0'));
+    value /= 10;
+  } while (value != 0);
+}
+
+/** Change ',' to '.' everywhere in buffer.
+ *
+ * We had a sophisticated way, but it did not work in WinCE.
+ * @see https://github.com/open-source-parsers/jsoncpp/pull/9
+ */
+static inline void fixNumericLocale(char *begin, char *end)
+{
+  while (begin < end)
+  {
+    if (*begin == ',')
+    {
+      *begin = '.';
+    }
+    ++begin;
+  }
+}
+
+static inline void fixNumericLocaleInput(char *begin, char *end)
+{
+  char decimalPoint = getDecimalPoint();
+  if (decimalPoint != '\0' && decimalPoint != '.')
+  {
+    while (begin < end)
+    {
+      if (*begin == '.')
+      {
+        *begin = decimalPoint;
+      }
+      ++begin;
+    }
+  }
+}
+
+} // namespace Json {
+
+#endif // LIB_JSONCPP_JSON_TOOL_H_INCLUDED
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: src/lib_json/json_tool.h
+// //////////////////////////////////////////////////////////////////////
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: src/lib_json/json_reader.cpp
+// //////////////////////////////////////////////////////////////////////
+
+// Copyright 2007-2011 Baptiste Lepilleur
+// Distributed under MIT license, or public domain if desired and
+// recognized in your jurisdiction.
+// See file LICENSE for detail or copy at http://jsoncpp.sourceforge.net/LICENSE
+
+#if !defined(JSON_IS_AMALGAMATION)
+#include <json/assertions.h>
+#include <json/reader.h>
+#include <json/value.h>
+#include "json_tool.h"
+#endif // if !defined(JSON_IS_AMALGAMATION)
+#include <utility>
+#include <cstdio>
+#include <cassert>
+#include <cstring>
+#include <istream>
+#include <sstream>
+#include <memory>
+#include <set>
+#include <limits>
+
+#if defined(_MSC_VER)
+#if !defined(WINCE) && defined(__STDC_SECURE_LIB__) && _MSC_VER >= 1500 // VC++ 9.0 and above
+#define snprintf sprintf_s
+#elif _MSC_VER >= 1900 // VC++ 14.0 and above
+#define snprintf std::snprintf
+#else
+#define snprintf _snprintf
+#endif
+#elif defined(__ANDROID__) || defined(__QNXNTO__)
+#define snprintf snprintf
+#elif __cplusplus >= 201103L
+#if !defined(__MINGW32__) && !defined(__CYGWIN__)
+#define snprintf std::snprintf
+#endif
+#endif
+
+#if defined(__QNXNTO__)
+#define sscanf std::sscanf
+#endif
+
+#if defined(_MSC_VER) && _MSC_VER >= 1400 // VC++ 8.0
+// Disable warning about strdup being deprecated.
+#pragma warning(disable : 4996)
+#endif
+
+static int const stackLimit_g = 1000;
+static int stackDepth_g = 0; // see readValue()
+
+namespace Json
+{
+
+#if __cplusplus >= 201103L || (defined(_CPPLIB_VER) && _CPPLIB_VER >= 520)
+typedef std::unique_ptr<CharReader> CharReaderPtr;
+#else
+typedef std::auto_ptr<CharReader> CharReaderPtr;
+#endif
+
+// Implementation of class Features
+// ////////////////////////////////
+
+Features::Features()
+    : allowComments_(true), strictRoot_(false), allowDroppedNullPlaceholders_(false),
+      allowNumericKeys_(false)
+{
+}
+
+Features Features::all() { return Features(); }
+
+Features Features::strictMode()
+{
+  Features features;
+  features.allowComments_ = false;
+  features.strictRoot_ = true;
+  features.allowDroppedNullPlaceholders_ = false;
+  features.allowNumericKeys_ = false;
+  return features;
+}
+
+// Implementation of class Reader
+// ////////////////////////////////
+
+static bool containsNewLine(Reader::Location begin, Reader::Location end)
+{
+  for (; begin < end; ++begin)
+    if (*begin == '\n' || *begin == '\r')
+      return true;
+  return false;
+}
+
+// Class Reader
+// //////////////////////////////////////////////////////////////////
+
+Reader::Reader()
+    : errors_(), document_(), begin_(), end_(), current_(), lastValueEnd_(), lastValue_(),
+      commentsBefore_(), features_(Features::all()), collectComments_()
+{
+}
+
+Reader::Reader(const Features &features)
+    : errors_(), document_(), begin_(), end_(), current_(), lastValueEnd_(), lastValue_(),
+      commentsBefore_(), features_(features), collectComments_()
+{
+}
+
+bool Reader::parse(const std::string &document, Value &root, bool collectComments)
+{
+  JSONCPP_STRING documentCopy(document.data(), document.data() + document.capacity());
+  std::swap(documentCopy, document_);
+  const char *begin = document_.c_str();
+  const char *end = begin + document_.length();
+  return parse(begin, end, root, collectComments);
+}
+
+bool Reader::parse(std::istream &sin, Value &root, bool collectComments)
+{
+  // std::istream_iterator<char> begin(sin);
+  // std::istream_iterator<char> end;
+  // Those would allow streamed input from a file, if parse() were a
+  // template function.
+
+  // Since JSONCPP_STRING is reference-counted, this at least does not
+  // create an extra copy.
+  JSONCPP_STRING doc;
+  std::getline(sin, doc, (char)EOF);
+  return parse(doc.data(), doc.data() + doc.size(), root, collectComments);
+}
+
+bool Reader::parse(const char *beginDoc, const char *endDoc, Value &root, bool collectComments)
+{
+  if (!features_.allowComments_)
+  {
+    collectComments = false;
+  }
+
+  begin_ = beginDoc;
+  end_ = endDoc;
+  collectComments_ = collectComments;
+  current_ = begin_;
+  lastValueEnd_ = 0;
+  lastValue_ = 0;
+  commentsBefore_ = "";
+  errors_.clear();
+  while (!nodes_.empty())
+    nodes_.pop();
+  nodes_.push(&root);
+
+  stackDepth_g = 0; // Yes, this is bad coding, but options are limited.
+  bool successful = readValue();
+  Token token;
+  skipCommentTokens(token);
+  if (collectComments_ && !commentsBefore_.empty())
+    root.setComment(commentsBefore_, commentAfter);
+  if (features_.strictRoot_)
+  {
+    if (!root.isArray() && !root.isObject())
+    {
+      // Set error location to start of doc, ideally should be first token found
+      // in doc
+      token.type_ = tokenError;
+      token.start_ = beginDoc;
+      token.end_ = endDoc;
+      addError("A valid JSON document must be either an array or an object value.", token);
+      return false;
+    }
+  }
+  return successful;
+}
+
+bool Reader::readValue()
+{
+  // This is a non-reentrant way to support a stackLimit. Terrible!
+  // But this deprecated class has a security problem: Bad input can
+  // cause a seg-fault. This seems like a fair, binary-compatible way
+  // to prevent the problem.
+  if (stackDepth_g >= stackLimit_g)
+    throwRuntimeError("Exceeded stackLimit in readValue().");
+  ++stackDepth_g;
+
+  Token token;
+  skipCommentTokens(token);
+  bool successful = true;
+
+  if (collectComments_ && !commentsBefore_.empty())
+  {
+    currentValue().setComment(commentsBefore_, commentBefore);
+    commentsBefore_ = "";
+  }
+
+  switch (token.type_)
+  {
+    case tokenObjectBegin:
+      successful = readObject(token);
+      currentValue().setOffsetLimit(current_ - begin_);
+      break;
+    case tokenArrayBegin:
+      successful = readArray(token);
+      currentValue().setOffsetLimit(current_ - begin_);
+      break;
+    case tokenNumber:
+      successful = decodeNumber(token);
+      break;
+    case tokenString:
+      successful = decodeString(token);
+      break;
+    case tokenTrue:
+    {
+      Value v(true);
+      currentValue().swapPayload(v);
+      currentValue().setOffsetStart(token.start_ - begin_);
+      currentValue().setOffsetLimit(token.end_ - begin_);
+    }
+    break;
+    case tokenFalse:
+    {
+      Value v(false);
+      currentValue().swapPayload(v);
+      currentValue().setOffsetStart(token.start_ - begin_);
+      currentValue().setOffsetLimit(token.end_ - begin_);
+    }
+    break;
+    case tokenNull:
+    {
+      Value v;
+      currentValue().swapPayload(v);
+      currentValue().setOffsetStart(token.start_ - begin_);
+      currentValue().setOffsetLimit(token.end_ - begin_);
+    }
+    break;
+    case tokenArraySeparator:
+    case tokenObjectEnd:
+    case tokenArrayEnd:
+      if (features_.allowDroppedNullPlaceholders_)
+      {
+        // "Un-read" the current token and mark the current value as a null
+        // token.
+        current_--;
+        Value v;
+        currentValue().swapPayload(v);
+        currentValue().setOffsetStart(current_ - begin_ - 1);
+        currentValue().setOffsetLimit(current_ - begin_);
+        break;
+      } // Else, fall through...
+    default:
+      currentValue().setOffsetStart(token.start_ - begin_);
+      currentValue().setOffsetLimit(token.end_ - begin_);
+      return addError("Syntax error: value, object or array expected.", token);
+  }
+
+  if (collectComments_)
+  {
+    lastValueEnd_ = current_;
+    lastValue_ = &currentValue();
+  }
+
+  --stackDepth_g;
+  return successful;
+}
+
+void Reader::skipCommentTokens(Token &token)
+{
+  if (features_.allowComments_)
+  {
+    do
+    {
+      readToken(token);
+    } while (token.type_ == tokenComment);
+  }
+  else
+  {
+    readToken(token);
+  }
+}
+
+bool Reader::readToken(Token &token)
+{
+  skipSpaces();
+  token.start_ = current_;
+  Char c = getNextChar();
+  bool ok = true;
+  switch (c)
+  {
+    case '{':
+      token.type_ = tokenObjectBegin;
+      break;
+    case '}':
+      token.type_ = tokenObjectEnd;
+      break;
+    case '[':
+      token.type_ = tokenArrayBegin;
+      break;
+    case ']':
+      token.type_ = tokenArrayEnd;
+      break;
+    case '"':
+      token.type_ = tokenString;
+      ok = readString();
+      break;
+    case '/':
+      token.type_ = tokenComment;
+      ok = readComment();
+      break;
+    case '0':
+    case '1':
+    case '2':
+    case '3':
+    case '4':
+    case '5':
+    case '6':
+    case '7':
+    case '8':
+    case '9':
+    case '-':
+      token.type_ = tokenNumber;
+      readNumber();
+      break;
+    case 't':
+      token.type_ = tokenTrue;
+      ok = match("rue", 3);
+      break;
+    case 'f':
+      token.type_ = tokenFalse;
+      ok = match("alse", 4);
+      break;
+    case 'n':
+      token.type_ = tokenNull;
+      ok = match("ull", 3);
+      break;
+    case ',':
+      token.type_ = tokenArraySeparator;
+      break;
+    case ':':
+      token.type_ = tokenMemberSeparator;
+      break;
+    case 0:
+      token.type_ = tokenEndOfStream;
+      break;
+    default:
+      ok = false;
+      break;
+  }
+  if (!ok)
+    token.type_ = tokenError;
+  token.end_ = current_;
+  return true;
+}
+
+void Reader::skipSpaces()
+{
+  while (current_ != end_)
+  {
+    Char c = *current_;
+    if (c == ' ' || c == '\t' || c == '\r' || c == '\n')
+      ++current_;
+    else
+      break;
+  }
+}
+
+bool Reader::match(Location pattern, int patternLength)
+{
+  if (end_ - current_ < patternLength)
+    return false;
+  int index = patternLength;
+  while (index--)
+    if (current_[index] != pattern[index])
+      return false;
+  current_ += patternLength;
+  return true;
+}
+
+bool Reader::readComment()
+{
+  Location commentBegin = current_ - 1;
+  Char c = getNextChar();
+  bool successful = false;
+  if (c == '*')
+    successful = readCStyleComment();
+  else if (c == '/')
+    successful = readCppStyleComment();
+  if (!successful)
+    return false;
+
+  if (collectComments_)
+  {
+    CommentPlacement placement = commentBefore;
+    if (lastValueEnd_ && !containsNewLine(lastValueEnd_, commentBegin))
+    {
+      if (c != '*' || !containsNewLine(commentBegin, current_))
+        placement = commentAfterOnSameLine;
+    }
+
+    addComment(commentBegin, current_, placement);
+  }
+  return true;
+}
+
+static JSONCPP_STRING normalizeEOL(Reader::Location begin, Reader::Location end)
+{
+  JSONCPP_STRING normalized;
+  normalized.reserve(static_cast<size_t>(end - begin));
+  Reader::Location current = begin;
+  while (current != end)
+  {
+    char c = *current++;
+    if (c == '\r')
+    {
+      if (current != end && *current == '\n')
+        // convert dos EOL
+        ++current;
+      // convert Mac EOL
+      normalized += '\n';
+    }
+    else
+    {
+      normalized += c;
+    }
+  }
+  return normalized;
+}
+
+void Reader::addComment(Location begin, Location end, CommentPlacement placement)
+{
+  assert(collectComments_);
+  const JSONCPP_STRING &normalized = normalizeEOL(begin, end);
+  if (placement == commentAfterOnSameLine)
+  {
+    assert(lastValue_ != 0);
+    lastValue_->setComment(normalized, placement);
+  }
+  else
+  {
+    commentsBefore_ += normalized;
+  }
+}
+
+bool Reader::readCStyleComment()
+{
+  while ((current_ + 1) < end_)
+  {
+    Char c = getNextChar();
+    if (c == '*' && *current_ == '/')
+      break;
+  }
+  return getNextChar() == '/';
+}
+
+bool Reader::readCppStyleComment()
+{
+  while (current_ != end_)
+  {
+    Char c = getNextChar();
+    if (c == '\n')
+      break;
+    if (c == '\r')
+    {
+      // Consume DOS EOL. It will be normalized in addComment.
+      if (current_ != end_ && *current_ == '\n')
+        getNextChar();
+      // Break on Moc OS 9 EOL.
+      break;
+    }
+  }
+  return true;
+}
+
+void Reader::readNumber()
+{
+  const char *p = current_;
+  char c = '0'; // stopgap for already consumed character
+  // integral part
+  while (c >= '0' && c <= '9')
+    c = (current_ = p) < end_ ? *p++ : '\0';
+  // fractional part
+  if (c == '.')
+  {
+    c = (current_ = p) < end_ ? *p++ : '\0';
+    while (c >= '0' && c <= '9')
+      c = (current_ = p) < end_ ? *p++ : '\0';
+  }
+  // exponential part
+  if (c == 'e' || c == 'E')
+  {
+    c = (current_ = p) < end_ ? *p++ : '\0';
+    if (c == '+' || c == '-')
+      c = (current_ = p) < end_ ? *p++ : '\0';
+    while (c >= '0' && c <= '9')
+      c = (current_ = p) < end_ ? *p++ : '\0';
+  }
+}
+
+bool Reader::readString()
+{
+  Char c = '\0';
+  while (current_ != end_)
+  {
+    c = getNextChar();
+    if (c == '\\')
+      getNextChar();
+    else if (c == '"')
+      break;
+  }
+  return c == '"';
+}
+
+bool Reader::readObject(Token &tokenStart)
+{
+  Token tokenName;
+  JSONCPP_STRING name;
+  Value init(objectValue);
+  currentValue().swapPayload(init);
+  currentValue().setOffsetStart(tokenStart.start_ - begin_);
+  while (readToken(tokenName))
+  {
+    bool initialTokenOk = true;
+    while (tokenName.type_ == tokenComment && initialTokenOk)
+      initialTokenOk = readToken(tokenName);
+    if (!initialTokenOk)
+      break;
+    if (tokenName.type_ == tokenObjectEnd && name.empty()) // empty object
+      return true;
+    name = "";
+    if (tokenName.type_ == tokenString)
+    {
+      if (!decodeString(tokenName, name))
+        return recoverFromError(tokenObjectEnd);
+    }
+    else if (tokenName.type_ == tokenNumber && features_.allowNumericKeys_)
+    {
+      Value numberName;
+      if (!decodeNumber(tokenName, numberName))
+        return recoverFromError(tokenObjectEnd);
+      name = JSONCPP_STRING(numberName.asCString());
+    }
+    else
+    {
+      break;
+    }
+
+    Token colon;
+    if (!readToken(colon) || colon.type_ != tokenMemberSeparator)
+    {
+      return addErrorAndRecover("Missing ':' after object member name", colon, tokenObjectEnd);
+    }
+    Value &value = currentValue()[name];
+    nodes_.push(&value);
+    bool ok = readValue();
+    nodes_.pop();
+    if (!ok) // error already set
+      return recoverFromError(tokenObjectEnd);
+
+    Token comma;
+    if (!readToken(comma) || (comma.type_ != tokenObjectEnd && comma.type_ != tokenArraySeparator &&
+                              comma.type_ != tokenComment))
+    {
+      return addErrorAndRecover("Missing ',' or '}' in object declaration", comma, tokenObjectEnd);
+    }
+    bool finalizeTokenOk = true;
+    while (comma.type_ == tokenComment && finalizeTokenOk)
+      finalizeTokenOk = readToken(comma);
+    if (comma.type_ == tokenObjectEnd)
+      return true;
+  }
+  return addErrorAndRecover("Missing '}' or object member name", tokenName, tokenObjectEnd);
+}
+
+bool Reader::readArray(Token &tokenStart)
+{
+  Value init(arrayValue);
+  currentValue().swapPayload(init);
+  currentValue().setOffsetStart(tokenStart.start_ - begin_);
+  skipSpaces();
+  if (current_ != end_ && *current_ == ']') // empty array
+  {
+    Token endArray;
+    readToken(endArray);
+    return true;
+  }
+  int index = 0;
+  for (;;)
+  {
+    Value &value = currentValue()[index++];
+    nodes_.push(&value);
+    bool ok = readValue();
+    nodes_.pop();
+    if (!ok) // error already set
+      return recoverFromError(tokenArrayEnd);
+
+    Token token;
+    // Accept Comment after last item in the array.
+    ok = readToken(token);
+    while (token.type_ == tokenComment && ok)
+    {
+      ok = readToken(token);
+    }
+    bool badTokenType = (token.type_ != tokenArraySeparator && token.type_ != tokenArrayEnd);
+    if (!ok || badTokenType)
+    {
+      return addErrorAndRecover("Missing ',' or ']' in array declaration", token, tokenArrayEnd);
+    }
+    if (token.type_ == tokenArrayEnd)
+      break;
+  }
+  return true;
+}
+
+bool Reader::decodeNumber(Token &token)
+{
+  Value decoded;
+  if (!decodeNumber(token, decoded))
+    return false;
+  currentValue().swapPayload(decoded);
+  currentValue().setOffsetStart(token.start_ - begin_);
+  currentValue().setOffsetLimit(token.end_ - begin_);
+  return true;
+}
+
+bool Reader::decodeNumber(Token &token, Value &decoded)
+{
+  // Attempts to parse the number as an integer. If the number is
+  // larger than the maximum supported value of an integer then
+  // we decode the number as a double.
+  Location current = token.start_;
+  bool isNegative = *current == '-';
+  if (isNegative)
+    ++current;
+  // TODO: Help the compiler do the div and mod at compile time or get rid of them.
+  Value::LargestUInt maxIntegerValue =
+      isNegative ? Value::LargestUInt(Value::maxLargestInt) + 1 : Value::maxLargestUInt;
+  Value::LargestUInt threshold = maxIntegerValue / 10;
+  Value::LargestUInt value = 0;
+  while (current < token.end_)
+  {
+    Char c = *current++;
+    if (c < '0' || c > '9')
+      return decodeDouble(token, decoded);
+    Value::UInt digit(static_cast<Value::UInt>(c - '0'));
+    if (value >= threshold)
+    {
+      // We've hit or exceeded the max value divided by 10 (rounded down). If
+      // a) we've only just touched the limit, b) this is the last digit, and
+      // c) it's small enough to fit in that rounding delta, we're okay.
+      // Otherwise treat this number as a double to avoid overflow.
+      if (value > threshold || current != token.end_ || digit > maxIntegerValue % 10)
+      {
+        return decodeDouble(token, decoded);
+      }
+    }
+    value = value * 10 + digit;
+  }
+  if (isNegative && value == maxIntegerValue)
+    decoded = Value::minLargestInt;
+  else if (isNegative)
+    decoded = -Value::LargestInt(value);
+  else if (value <= Value::LargestUInt(Value::maxInt))
+    decoded = Value::LargestInt(value);
+  else
+    decoded = value;
+  return true;
+}
+
+bool Reader::decodeDouble(Token &token)
+{
+  Value decoded;
+  if (!decodeDouble(token, decoded))
+    return false;
+  currentValue().swapPayload(decoded);
+  currentValue().setOffsetStart(token.start_ - begin_);
+  currentValue().setOffsetLimit(token.end_ - begin_);
+  return true;
+}
+
+bool Reader::decodeDouble(Token &token, Value &decoded)
+{
+  double value = 0;
+  JSONCPP_STRING buffer(token.start_, token.end_);
+  JSONCPP_ISTRINGSTREAM is(buffer);
+  if (!(is >> value))
+    return addError("'" + JSONCPP_STRING(token.start_, token.end_) + "' is not a number.", token);
+  decoded = value;
+  return true;
+}
+
+bool Reader::decodeString(Token &token)
+{
+  JSONCPP_STRING decoded_string;
+  if (!decodeString(token, decoded_string))
+    return false;
+  Value decoded(decoded_string);
+  currentValue().swapPayload(decoded);
+  currentValue().setOffsetStart(token.start_ - begin_);
+  currentValue().setOffsetLimit(token.end_ - begin_);
+  return true;
+}
+
+bool Reader::decodeString(Token &token, JSONCPP_STRING &decoded)
+{
+  decoded.reserve(static_cast<size_t>(token.end_ - token.start_ - 2));
+  Location current = token.start_ + 1; // skip '"'
+  Location end = token.end_ - 1;       // do not include '"'
+  while (current != end)
+  {
+    Char c = *current++;
+    if (c == '"')
+      break;
+    else if (c == '\\')
+    {
+      if (current == end)
+        return addError("Empty escape sequence in string", token, current);
+      Char escape = *current++;
+      switch (escape)
+      {
+        case '"':
+          decoded += '"';
+          break;
+        case '/':
+          decoded += '/';
+          break;
+        case '\\':
+          decoded += '\\';
+          break;
+        case 'b':
+          decoded += '\b';
+          break;
+        case 'f':
+          decoded += '\f';
+          break;
+        case 'n':
+          decoded += '\n';
+          break;
+        case 'r':
+          decoded += '\r';
+          break;
+        case 't':
+          decoded += '\t';
+          break;
+        case 'u':
+        {
+          unsigned int unicode;
+          if (!decodeUnicodeCodePoint(token, current, end, unicode))
+            return false;
+          decoded += codePointToUTF8(unicode);
+        }
+        break;
+        default:
+          return addError("Bad escape sequence in string", token, current);
+      }
+    }
+    else
+    {
+      decoded += c;
+    }
+  }
+  return true;
+}
+
+bool Reader::decodeUnicodeCodePoint(Token &token, Location &current, Location end,
+                                    unsigned int &unicode)
+{
+
+  if (!decodeUnicodeEscapeSequence(token, current, end, unicode))
+    return false;
+  if (unicode >= 0xD800 && unicode <= 0xDBFF)
+  {
+    // surrogate pairs
+    if (end - current < 6)
+      return addError("additional six characters expected to parse unicode surrogate pair.", token,
+                      current);
+    unsigned int surrogatePair;
+    if (*(current++) == '\\' && *(current++) == 'u')
+    {
+      if (decodeUnicodeEscapeSequence(token, current, end, surrogatePair))
+      {
+        unicode = 0x10000 + ((unicode & 0x3FF) << 10) + (surrogatePair & 0x3FF);
+      }
+      else
+        return false;
+    }
+    else
+      return addError("expecting another \\u token to begin the second half of "
+                      "a unicode surrogate pair",
+                      token, current);
+  }
+  return true;
+}
+
+bool Reader::decodeUnicodeEscapeSequence(Token &token, Location &current, Location end,
+                                         unsigned int &ret_unicode)
+{
+  if (end - current < 4)
+    return addError("Bad unicode escape sequence in string: four digits expected.", token, current);
+  int unicode = 0;
+  for (int index = 0; index < 4; ++index)
+  {
+    Char c = *current++;
+    unicode *= 16;
+    if (c >= '0' && c <= '9')
+      unicode += c - '0';
+    else if (c >= 'a' && c <= 'f')
+      unicode += c - 'a' + 10;
+    else if (c >= 'A' && c <= 'F')
+      unicode += c - 'A' + 10;
+    else
+      return addError("Bad unicode escape sequence in string: hexadecimal digit expected.", token,
+                      current);
+  }
+  ret_unicode = static_cast<unsigned int>(unicode);
+  return true;
+}
+
+bool Reader::addError(const JSONCPP_STRING &message, Token &token, Location extra)
+{
+  ErrorInfo info;
+  info.token_ = token;
+  info.message_ = message;
+  info.extra_ = extra;
+  errors_.push_back(info);
+  return false;
+}
+
+bool Reader::recoverFromError(TokenType skipUntilToken)
+{
+  size_t const errorCount = errors_.size();
+  Token skip;
+  for (;;)
+  {
+    if (!readToken(skip))
+      errors_.resize(errorCount); // discard errors caused by recovery
+    if (skip.type_ == skipUntilToken || skip.type_ == tokenEndOfStream)
+      break;
+  }
+  errors_.resize(errorCount);
+  return false;
+}
+
+bool Reader::addErrorAndRecover(const JSONCPP_STRING &message, Token &token,
+                                TokenType skipUntilToken)
+{
+  addError(message, token);
+  return recoverFromError(skipUntilToken);
+}
+
+Value &Reader::currentValue() { return *(nodes_.top()); }
+
+Reader::Char Reader::getNextChar()
+{
+  if (current_ == end_)
+    return 0;
+  return *current_++;
+}
+
+void Reader::getLocationLineAndColumn(Location location, int &line, int &column) const
+{
+  Location current = begin_;
+  Location lastLineStart = current;
+  line = 0;
+  while (current < location && current != end_)
+  {
+    Char c = *current++;
+    if (c == '\r')
+    {
+      if (*current == '\n')
+        ++current;
+      lastLineStart = current;
+      ++line;
+    }
+    else if (c == '\n')
+    {
+      lastLineStart = current;
+      ++line;
+    }
+  }
+  // column & line start at 1
+  column = int(location - lastLineStart) + 1;
+  ++line;
+}
+
+JSONCPP_STRING Reader::getLocationLineAndColumn(Location location) const
+{
+  int line, column;
+  getLocationLineAndColumn(location, line, column);
+  char buffer[18 + 16 + 16 + 1];
+  snprintf(buffer, sizeof(buffer), "Line %d, Column %d", line, column);
+  return buffer;
+}
+
+// Deprecated. Preserved for backward compatibility
+JSONCPP_STRING Reader::getFormatedErrorMessages() const { return getFormattedErrorMessages(); }
+
+JSONCPP_STRING Reader::getFormattedErrorMessages() const
+{
+  JSONCPP_STRING formattedMessage;
+  for (Errors::const_iterator itError = errors_.begin(); itError != errors_.end(); ++itError)
+  {
+    const ErrorInfo &error = *itError;
+    formattedMessage += "* " + getLocationLineAndColumn(error.token_.start_) + "\n";
+    formattedMessage += "  " + error.message_ + "\n";
+    if (error.extra_)
+      formattedMessage += "See " + getLocationLineAndColumn(error.extra_) + " for detail.\n";
+  }
+  return formattedMessage;
+}
+
+std::vector<Reader::StructuredError> Reader::getStructuredErrors() const
+{
+  std::vector<Reader::StructuredError> allErrors;
+  for (Errors::const_iterator itError = errors_.begin(); itError != errors_.end(); ++itError)
+  {
+    const ErrorInfo &error = *itError;
+    Reader::StructuredError structured;
+    structured.offset_start = error.token_.start_ - begin_;
+    structured.offset_limit = error.token_.end_ - begin_;
+    structured.message = error.message_;
+    allErrors.push_back(structured);
+  }
+  return allErrors;
+}
+
+bool Reader::pushError(const Value &value, const JSONCPP_STRING &message)
+{
+  ptrdiff_t const length = end_ - begin_;
+  if (value.getOffsetStart() > length || value.getOffsetLimit() > length)
+    return false;
+  Token token;
+  token.type_ = tokenError;
+  token.start_ = begin_ + value.getOffsetStart();
+  token.end_ = end_ + value.getOffsetLimit();
+  ErrorInfo info;
+  info.token_ = token;
+  info.message_ = message;
+  info.extra_ = 0;
+  errors_.push_back(info);
+  return true;
+}
+
+bool Reader::pushError(const Value &value, const JSONCPP_STRING &message, const Value &extra)
+{
+  ptrdiff_t const length = end_ - begin_;
+  if (value.getOffsetStart() > length || value.getOffsetLimit() > length ||
+      extra.getOffsetLimit() > length)
+    return false;
+  Token token;
+  token.type_ = tokenError;
+  token.start_ = begin_ + value.getOffsetStart();
+  token.end_ = begin_ + value.getOffsetLimit();
+  ErrorInfo info;
+  info.token_ = token;
+  info.message_ = message;
+  info.extra_ = begin_ + extra.getOffsetStart();
+  errors_.push_back(info);
+  return true;
+}
+
+bool Reader::good() const { return !errors_.size(); }
+
+// exact copy of Features
+class OurFeatures
+{
+public:
+  static OurFeatures all();
+  bool allowComments_;
+  bool strictRoot_;
+  bool allowDroppedNullPlaceholders_;
+  bool allowNumericKeys_;
+  bool allowSingleQuotes_;
+  bool failIfExtra_;
+  bool rejectDupKeys_;
+  bool allowSpecialFloats_;
+  int stackLimit_;
+}; // OurFeatures
+
+// exact copy of Implementation of class Features
+// ////////////////////////////////
+
+OurFeatures OurFeatures::all() { return OurFeatures(); }
+
+// Implementation of class Reader
+// ////////////////////////////////
+
+// exact copy of Reader, renamed to OurReader
+class OurReader
+{
+public:
+  typedef char Char;
+  typedef const Char *Location;
+  struct StructuredError
+  {
+    ptrdiff_t offset_start;
+    ptrdiff_t offset_limit;
+    JSONCPP_STRING message;
+  };
+
+  OurReader(OurFeatures const &features);
+  bool parse(const char *beginDoc, const char *endDoc, Value &root, bool collectComments = true);
+  JSONCPP_STRING getFormattedErrorMessages() const;
+  std::vector<StructuredError> getStructuredErrors() const;
+  bool pushError(const Value &value, const JSONCPP_STRING &message);
+  bool pushError(const Value &value, const JSONCPP_STRING &message, const Value &extra);
+  bool good() const;
+
+private:
+  OurReader(OurReader const &);      // no impl
+  void operator=(OurReader const &); // no impl
+
+  enum TokenType
+  {
+    tokenEndOfStream = 0,
+    tokenObjectBegin,
+    tokenObjectEnd,
+    tokenArrayBegin,
+    tokenArrayEnd,
+    tokenString,
+    tokenNumber,
+    tokenTrue,
+    tokenFalse,
+    tokenNull,
+    tokenNaN,
+    tokenPosInf,
+    tokenNegInf,
+    tokenArraySeparator,
+    tokenMemberSeparator,
+    tokenComment,
+    tokenError
+  };
+
+  class Token
+  {
+  public:
+    TokenType type_;
+    Location start_;
+    Location end_;
+  };
+
+  class ErrorInfo
+  {
+  public:
+    Token token_;
+    JSONCPP_STRING message_;
+    Location extra_;
+  };
+
+  typedef std::deque<ErrorInfo> Errors;
+
+  bool readToken(Token &token);
+  void skipSpaces();
+  bool match(Location pattern, int patternLength);
+  bool readComment();
+  bool readCStyleComment();
+  bool readCppStyleComment();
+  bool readString();
+  bool readStringSingleQuote();
+  bool readNumber(bool checkInf);
+  bool readValue();
+  bool readObject(Token &token);
+  bool readArray(Token &token);
+  bool decodeNumber(Token &token);
+  bool decodeNumber(Token &token, Value &decoded);
+  bool decodeString(Token &token);
+  bool decodeString(Token &token, JSONCPP_STRING &decoded);
+  bool decodeDouble(Token &token);
+  bool decodeDouble(Token &token, Value &decoded);
+  bool decodeUnicodeCodePoint(Token &token, Location &current, Location end, unsigned int &unicode);
+  bool decodeUnicodeEscapeSequence(Token &token, Location &current, Location end,
+                                   unsigned int &unicode);
+  bool addError(const JSONCPP_STRING &message, Token &token, Location extra = 0);
+  bool recoverFromError(TokenType skipUntilToken);
+  bool addErrorAndRecover(const JSONCPP_STRING &message, Token &token, TokenType skipUntilToken);
+  void skipUntilSpace();
+  Value &currentValue();
+  Char getNextChar();
+  void getLocationLineAndColumn(Location location, int &line, int &column) const;
+  JSONCPP_STRING getLocationLineAndColumn(Location location) const;
+  void addComment(Location begin, Location end, CommentPlacement placement);
+  void skipCommentTokens(Token &token);
+
+  typedef std::stack<Value *> Nodes;
+  Nodes nodes_;
+  Errors errors_;
+  JSONCPP_STRING document_;
+  Location begin_;
+  Location end_;
+  Location current_;
+  Location lastValueEnd_;
+  Value *lastValue_;
+  JSONCPP_STRING commentsBefore_;
+  int stackDepth_;
+
+  OurFeatures const features_;
+  bool collectComments_;
+}; // OurReader
+
+// complete copy of Read impl, for OurReader
+
+OurReader::OurReader(OurFeatures const &features)
+    : errors_(), document_(), begin_(), end_(), current_(), lastValueEnd_(), lastValue_(),
+      commentsBefore_(), stackDepth_(0), features_(features), collectComments_()
+{
+}
+
+bool OurReader::parse(const char *beginDoc, const char *endDoc, Value &root, bool collectComments)
+{
+  if (!features_.allowComments_)
+  {
+    collectComments = false;
+  }
+
+  begin_ = beginDoc;
+  end_ = endDoc;
+  collectComments_ = collectComments;
+  current_ = begin_;
+  lastValueEnd_ = 0;
+  lastValue_ = 0;
+  commentsBefore_ = "";
+  errors_.clear();
+  while (!nodes_.empty())
+    nodes_.pop();
+  nodes_.push(&root);
+
+  stackDepth_ = 0;
+  bool successful = readValue();
+  Token token;
+  skipCommentTokens(token);
+  if (features_.failIfExtra_)
+  {
+    if ((features_.strictRoot_ || token.type_ != tokenError) && token.type_ != tokenEndOfStream)
+    {
+      addError("Extra non-whitespace after JSON value.", token);
+      return false;
+    }
+  }
+  if (collectComments_ && !commentsBefore_.empty())
+    root.setComment(commentsBefore_, commentAfter);
+  if (features_.strictRoot_)
+  {
+    if (!root.isArray() && !root.isObject())
+    {
+      // Set error location to start of doc, ideally should be first token found
+      // in doc
+      token.type_ = tokenError;
+      token.start_ = beginDoc;
+      token.end_ = endDoc;
+      addError("A valid JSON document must be either an array or an object value.", token);
+      return false;
+    }
+  }
+  return successful;
+}
+
+bool OurReader::readValue()
+{
+  if (stackDepth_ >= features_.stackLimit_)
+    throwRuntimeError("Exceeded stackLimit in readValue().");
+  ++stackDepth_;
+  Token token;
+  skipCommentTokens(token);
+  bool successful = true;
+
+  if (collectComments_ && !commentsBefore_.empty())
+  {
+    currentValue().setComment(commentsBefore_, commentBefore);
+    commentsBefore_ = "";
+  }
+
+  switch (token.type_)
+  {
+    case tokenObjectBegin:
+      successful = readObject(token);
+      currentValue().setOffsetLimit(current_ - begin_);
+      break;
+    case tokenArrayBegin:
+      successful = readArray(token);
+      currentValue().setOffsetLimit(current_ - begin_);
+      break;
+    case tokenNumber:
+      successful = decodeNumber(token);
+      break;
+    case tokenString:
+      successful = decodeString(token);
+      break;
+    case tokenTrue:
+    {
+      Value v(true);
+      currentValue().swapPayload(v);
+      currentValue().setOffsetStart(token.start_ - begin_);
+      currentValue().setOffsetLimit(token.end_ - begin_);
+    }
+    break;
+    case tokenFalse:
+    {
+      Value v(false);
+      currentValue().swapPayload(v);
+      currentValue().setOffsetStart(token.start_ - begin_);
+      currentValue().setOffsetLimit(token.end_ - begin_);
+    }
+    break;
+    case tokenNull:
+    {
+      Value v;
+      currentValue().swapPayload(v);
+      currentValue().setOffsetStart(token.start_ - begin_);
+      currentValue().setOffsetLimit(token.end_ - begin_);
+    }
+    break;
+    case tokenNaN:
+    {
+      Value v(std::numeric_limits<double>::quiet_NaN());
+      currentValue().swapPayload(v);
+      currentValue().setOffsetStart(token.start_ - begin_);
+      currentValue().setOffsetLimit(token.end_ - begin_);
+    }
+    break;
+    case tokenPosInf:
+    {
+      Value v(std::numeric_limits<double>::infinity());
+      currentValue().swapPayload(v);
+      currentValue().setOffsetStart(token.start_ - begin_);
+      currentValue().setOffsetLimit(token.end_ - begin_);
+    }
+    break;
+    case tokenNegInf:
+    {
+      Value v(-std::numeric_limits<double>::infinity());
+      currentValue().swapPayload(v);
+      currentValue().setOffsetStart(token.start_ - begin_);
+      currentValue().setOffsetLimit(token.end_ - begin_);
+    }
+    break;
+    case tokenArraySeparator:
+    case tokenObjectEnd:
+    case tokenArrayEnd:
+      if (features_.allowDroppedNullPlaceholders_)
+      {
+        // "Un-read" the current token and mark the current value as a null
+        // token.
+        current_--;
+        Value v;
+        currentValue().swapPayload(v);
+        currentValue().setOffsetStart(current_ - begin_ - 1);
+        currentValue().setOffsetLimit(current_ - begin_);
+        break;
+      } // else, fall through ...
+    default:
+      currentValue().setOffsetStart(token.start_ - begin_);
+      currentValue().setOffsetLimit(token.end_ - begin_);
+      return addError("Syntax error: value, object or array expected.", token);
+  }
+
+  if (collectComments_)
+  {
+    lastValueEnd_ = current_;
+    lastValue_ = &currentValue();
+  }
+
+  --stackDepth_;
+  return successful;
+}
+
+void OurReader::skipCommentTokens(Token &token)
+{
+  if (features_.allowComments_)
+  {
+    do
+    {
+      readToken(token);
+    } while (token.type_ == tokenComment);
+  }
+  else
+  {
+    readToken(token);
+  }
+}
+
+bool OurReader::readToken(Token &token)
+{
+  skipSpaces();
+  token.start_ = current_;
+  Char c = getNextChar();
+  bool ok = true;
+  switch (c)
+  {
+    case '{':
+      token.type_ = tokenObjectBegin;
+      break;
+    case '}':
+      token.type_ = tokenObjectEnd;
+      break;
+    case '[':
+      token.type_ = tokenArrayBegin;
+      break;
+    case ']':
+      token.type_ = tokenArrayEnd;
+      break;
+    case '"':
+      token.type_ = tokenString;
+      ok = readString();
+      break;
+    case '\'':
+      if (features_.allowSingleQuotes_)
+      {
+        token.type_ = tokenString;
+        ok = readStringSingleQuote();
+        break;
+      } // else continue
+    case '/':
+      token.type_ = tokenComment;
+      ok = readComment();
+      break;
+    case '0':
+    case '1':
+    case '2':
+    case '3':
+    case '4':
+    case '5':
+    case '6':
+    case '7':
+    case '8':
+    case '9':
+      token.type_ = tokenNumber;
+      readNumber(false);
+      break;
+    case '-':
+      if (readNumber(true))
+      {
+        token.type_ = tokenNumber;
+      }
+      else
+      {
+        token.type_ = tokenNegInf;
+        ok = features_.allowSpecialFloats_ && match("nfinity", 7);
+      }
+      break;
+    case 't':
+      token.type_ = tokenTrue;
+      ok = match("rue", 3);
+      break;
+    case 'f':
+      token.type_ = tokenFalse;
+      ok = match("alse", 4);
+      break;
+    case 'n':
+      token.type_ = tokenNull;
+      ok = match("ull", 3);
+      break;
+    case 'N':
+      if (features_.allowSpecialFloats_)
+      {
+        token.type_ = tokenNaN;
+        ok = match("aN", 2);
+      }
+      else
+      {
+        ok = false;
+      }
+      break;
+    case 'I':
+      if (features_.allowSpecialFloats_)
+      {
+        token.type_ = tokenPosInf;
+        ok = match("nfinity", 7);
+      }
+      else
+      {
+        ok = false;
+      }
+      break;
+    case ',':
+      token.type_ = tokenArraySeparator;
+      break;
+    case ':':
+      token.type_ = tokenMemberSeparator;
+      break;
+    case 0:
+      token.type_ = tokenEndOfStream;
+      break;
+    default:
+      ok = false;
+      break;
+  }
+  if (!ok)
+    token.type_ = tokenError;
+  token.end_ = current_;
+  return true;
+}
+
+void OurReader::skipSpaces()
+{
+  while (current_ != end_)
+  {
+    Char c = *current_;
+    if (c == ' ' || c == '\t' || c == '\r' || c == '\n')
+      ++current_;
+    else
+      break;
+  }
+}
+
+bool OurReader::match(Location pattern, int patternLength)
+{
+  if (end_ - current_ < patternLength)
+    return false;
+  int index = patternLength;
+  while (index--)
+    if (current_[index] != pattern[index])
+      return false;
+  current_ += patternLength;
+  return true;
+}
+
+bool OurReader::readComment()
+{
+  Location commentBegin = current_ - 1;
+  Char c = getNextChar();
+  bool successful = false;
+  if (c == '*')
+    successful = readCStyleComment();
+  else if (c == '/')
+    successful = readCppStyleComment();
+  if (!successful)
+    return false;
+
+  if (collectComments_)
+  {
+    CommentPlacement placement = commentBefore;
+    if (lastValueEnd_ && !containsNewLine(lastValueEnd_, commentBegin))
+    {
+      if (c != '*' || !containsNewLine(commentBegin, current_))
+        placement = commentAfterOnSameLine;
+    }
+
+    addComment(commentBegin, current_, placement);
+  }
+  return true;
+}
+
+void OurReader::addComment(Location begin, Location end, CommentPlacement placement)
+{
+  assert(collectComments_);
+  const JSONCPP_STRING &normalized = normalizeEOL(begin, end);
+  if (placement == commentAfterOnSameLine)
+  {
+    assert(lastValue_ != 0);
+    lastValue_->setComment(normalized, placement);
+  }
+  else
+  {
+    commentsBefore_ += normalized;
+  }
+}
+
+bool OurReader::readCStyleComment()
+{
+  while ((current_ + 1) < end_)
+  {
+    Char c = getNextChar();
+    if (c == '*' && *current_ == '/')
+      break;
+  }
+  return getNextChar() == '/';
+}
+
+bool OurReader::readCppStyleComment()
+{
+  while (current_ != end_)
+  {
+    Char c = getNextChar();
+    if (c == '\n')
+      break;
+    if (c == '\r')
+    {
+      // Consume DOS EOL. It will be normalized in addComment.
+      if (current_ != end_ && *current_ == '\n')
+        getNextChar();
+      // Break on Moc OS 9 EOL.
+      break;
+    }
+  }
+  return true;
+}
+
+bool OurReader::readNumber(bool checkInf)
+{
+  const char *p = current_;
+  if (checkInf && p != end_ && *p == 'I')
+  {
+    current_ = ++p;
+    return false;
+  }
+  char c = '0'; // stopgap for already consumed character
+  // integral part
+  while (c >= '0' && c <= '9')
+    c = (current_ = p) < end_ ? *p++ : '\0';
+  // fractional part
+  if (c == '.')
+  {
+    c = (current_ = p) < end_ ? *p++ : '\0';
+    while (c >= '0' && c <= '9')
+      c = (current_ = p) < end_ ? *p++ : '\0';
+  }
+  // exponential part
+  if (c == 'e' || c == 'E')
+  {
+    c = (current_ = p) < end_ ? *p++ : '\0';
+    if (c == '+' || c == '-')
+      c = (current_ = p) < end_ ? *p++ : '\0';
+    while (c >= '0' && c <= '9')
+      c = (current_ = p) < end_ ? *p++ : '\0';
+  }
+  return true;
+}
+bool OurReader::readString()
+{
+  Char c = 0;
+  while (current_ != end_)
+  {
+    c = getNextChar();
+    if (c == '\\')
+      getNextChar();
+    else if (c == '"')
+      break;
+  }
+  return c == '"';
+}
+
+bool OurReader::readStringSingleQuote()
+{
+  Char c = 0;
+  while (current_ != end_)
+  {
+    c = getNextChar();
+    if (c == '\\')
+      getNextChar();
+    else if (c == '\'')
+      break;
+  }
+  return c == '\'';
+}
+
+bool OurReader::readObject(Token &tokenStart)
+{
+  Token tokenName;
+  JSONCPP_STRING name;
+  Value init(objectValue);
+  currentValue().swapPayload(init);
+  currentValue().setOffsetStart(tokenStart.start_ - begin_);
+  while (readToken(tokenName))
+  {
+    bool initialTokenOk = true;
+    while (tokenName.type_ == tokenComment && initialTokenOk)
+      initialTokenOk = readToken(tokenName);
+    if (!initialTokenOk)
+      break;
+    if (tokenName.type_ == tokenObjectEnd && name.empty()) // empty object
+      return true;
+    name = "";
+    if (tokenName.type_ == tokenString)
+    {
+      if (!decodeString(tokenName, name))
+        return recoverFromError(tokenObjectEnd);
+    }
+    else if (tokenName.type_ == tokenNumber && features_.allowNumericKeys_)
+    {
+      Value numberName;
+      if (!decodeNumber(tokenName, numberName))
+        return recoverFromError(tokenObjectEnd);
+      name = numberName.asString();
+    }
+    else
+    {
+      break;
+    }
+
+    Token colon;
+    if (!readToken(colon) || colon.type_ != tokenMemberSeparator)
+    {
+      return addErrorAndRecover("Missing ':' after object member name", colon, tokenObjectEnd);
+    }
+    if (name.length() >= (1U << 30))
+      throwRuntimeError("keylength >= 2^30");
+    if (features_.rejectDupKeys_ && currentValue().isMember(name))
+    {
+      JSONCPP_STRING msg = "Duplicate key: '" + name + "'";
+      return addErrorAndRecover(msg, tokenName, tokenObjectEnd);
+    }
+    Value &value = currentValue()[name];
+    nodes_.push(&value);
+    bool ok = readValue();
+    nodes_.pop();
+    if (!ok) // error already set
+      return recoverFromError(tokenObjectEnd);
+
+    Token comma;
+    if (!readToken(comma) || (comma.type_ != tokenObjectEnd && comma.type_ != tokenArraySeparator &&
+                              comma.type_ != tokenComment))
+    {
+      return addErrorAndRecover("Missing ',' or '}' in object declaration", comma, tokenObjectEnd);
+    }
+    bool finalizeTokenOk = true;
+    while (comma.type_ == tokenComment && finalizeTokenOk)
+      finalizeTokenOk = readToken(comma);
+    if (comma.type_ == tokenObjectEnd)
+      return true;
+  }
+  return addErrorAndRecover("Missing '}' or object member name", tokenName, tokenObjectEnd);
+}
+
+bool OurReader::readArray(Token &tokenStart)
+{
+  Value init(arrayValue);
+  currentValue().swapPayload(init);
+  currentValue().setOffsetStart(tokenStart.start_ - begin_);
+  skipSpaces();
+  if (current_ != end_ && *current_ == ']') // empty array
+  {
+    Token endArray;
+    readToken(endArray);
+    return true;
+  }
+  int index = 0;
+  for (;;)
+  {
+    Value &value = currentValue()[index++];
+    nodes_.push(&value);
+    bool ok = readValue();
+    nodes_.pop();
+    if (!ok) // error already set
+      return recoverFromError(tokenArrayEnd);
+
+    Token token;
+    // Accept Comment after last item in the array.
+    ok = readToken(token);
+    while (token.type_ == tokenComment && ok)
+    {
+      ok = readToken(token);
+    }
+    bool badTokenType = (token.type_ != tokenArraySeparator && token.type_ != tokenArrayEnd);
+    if (!ok || badTokenType)
+    {
+      return addErrorAndRecover("Missing ',' or ']' in array declaration", token, tokenArrayEnd);
+    }
+    if (token.type_ == tokenArrayEnd)
+      break;
+  }
+  return true;
+}
+
+bool OurReader::decodeNumber(Token &token)
+{
+  Value decoded;
+  if (!decodeNumber(token, decoded))
+    return false;
+  currentValue().swapPayload(decoded);
+  currentValue().setOffsetStart(token.start_ - begin_);
+  currentValue().setOffsetLimit(token.end_ - begin_);
+  return true;
+}
+
+bool OurReader::decodeNumber(Token &token, Value &decoded)
+{
+  // Attempts to parse the number as an integer. If the number is
+  // larger than the maximum supported value of an integer then
+  // we decode the number as a double.
+  Location current = token.start_;
+  bool isNegative = *current == '-';
+  if (isNegative)
+    ++current;
+  // TODO: Help the compiler do the div and mod at compile time or get rid of them.
+  Value::LargestUInt maxIntegerValue =
+      isNegative ? Value::LargestUInt(-Value::minLargestInt) : Value::maxLargestUInt;
+  Value::LargestUInt threshold = maxIntegerValue / 10;
+  Value::LargestUInt value = 0;
+  while (current < token.end_)
+  {
+    Char c = *current++;
+    if (c < '0' || c > '9')
+      return decodeDouble(token, decoded);
+    Value::UInt digit(static_cast<Value::UInt>(c - '0'));
+    if (value >= threshold)
+    {
+      // We've hit or exceeded the max value divided by 10 (rounded down). If
+      // a) we've only just touched the limit, b) this is the last digit, and
+      // c) it's small enough to fit in that rounding delta, we're okay.
+      // Otherwise treat this number as a double to avoid overflow.
+      if (value > threshold || current != token.end_ || digit > maxIntegerValue % 10)
+      {
+        return decodeDouble(token, decoded);
+      }
+    }
+    value = value * 10 + digit;
+  }
+  if (isNegative)
+    decoded = -Value::LargestInt(value);
+  else if (value <= Value::LargestUInt(Value::maxInt))
+    decoded = Value::LargestInt(value);
+  else
+    decoded = value;
+  return true;
+}
+
+bool OurReader::decodeDouble(Token &token)
+{
+  Value decoded;
+  if (!decodeDouble(token, decoded))
+    return false;
+  currentValue().swapPayload(decoded);
+  currentValue().setOffsetStart(token.start_ - begin_);
+  currentValue().setOffsetLimit(token.end_ - begin_);
+  return true;
+}
+
+bool OurReader::decodeDouble(Token &token, Value &decoded)
+{
+  double value = 0;
+  const int bufferSize = 32;
+  int count;
+  ptrdiff_t const length = token.end_ - token.start_;
+
+  // Sanity check to avoid buffer overflow exploits.
+  if (length < 0)
+  {
+    return addError("Unable to parse token length", token);
+  }
+  size_t const ulength = static_cast<size_t>(length);
+
+  // Avoid using a string constant for the format control string given to
+  // sscanf, as this can cause hard to debug crashes on OS X. See here for more
+  // info:
+  //
+  //     http://developer.apple.com/library/mac/#DOCUMENTATION/DeveloperTools/gcc-4.0.1/gcc/Incompatibilities.html
+  char format[] = "%lf";
+
+  if (length <= bufferSize)
+  {
+    Char buffer[bufferSize + 1];
+    memcpy(buffer, token.start_, ulength);
+    buffer[length] = 0;
+    fixNumericLocaleInput(buffer, buffer + length);
+    count = sscanf(buffer, format, &value);
+  }
+  else
+  {
+    JSONCPP_STRING buffer(token.start_, token.end_);
+    count = sscanf(buffer.c_str(), format, &value);
+  }
+
+  if (count != 1)
+    return addError("'" + JSONCPP_STRING(token.start_, token.end_) + "' is not a number.", token);
+  decoded = value;
+  return true;
+}
+
+bool OurReader::decodeString(Token &token)
+{
+  JSONCPP_STRING decoded_string;
+  if (!decodeString(token, decoded_string))
+    return false;
+  Value decoded(decoded_string);
+  currentValue().swapPayload(decoded);
+  currentValue().setOffsetStart(token.start_ - begin_);
+  currentValue().setOffsetLimit(token.end_ - begin_);
+  return true;
+}
+
+bool OurReader::decodeString(Token &token, JSONCPP_STRING &decoded)
+{
+  decoded.reserve(static_cast<size_t>(token.end_ - token.start_ - 2));
+  Location current = token.start_ + 1; // skip '"'
+  Location end = token.end_ - 1;       // do not include '"'
+  while (current != end)
+  {
+    Char c = *current++;
+    if (c == '"')
+      break;
+    else if (c == '\\')
+    {
+      if (current == end)
+        return addError("Empty escape sequence in string", token, current);
+      Char escape = *current++;
+      switch (escape)
+      {
+        case '"':
+          decoded += '"';
+          break;
+        case '/':
+          decoded += '/';
+          break;
+        case '\\':
+          decoded += '\\';
+          break;
+        case 'b':
+          decoded += '\b';
+          break;
+        case 'f':
+          decoded += '\f';
+          break;
+        case 'n':
+          decoded += '\n';
+          break;
+        case 'r':
+          decoded += '\r';
+          break;
+        case 't':
+          decoded += '\t';
+          break;
+        case 'u':
+        {
+          unsigned int unicode;
+          if (!decodeUnicodeCodePoint(token, current, end, unicode))
+            return false;
+          decoded += codePointToUTF8(unicode);
+        }
+        break;
+        default:
+          return addError("Bad escape sequence in string", token, current);
+      }
+    }
+    else
+    {
+      decoded += c;
+    }
+  }
+  return true;
+}
+
+bool OurReader::decodeUnicodeCodePoint(Token &token, Location &current, Location end,
+                                       unsigned int &unicode)
+{
+
+  if (!decodeUnicodeEscapeSequence(token, current, end, unicode))
+    return false;
+  if (unicode >= 0xD800 && unicode <= 0xDBFF)
+  {
+    // surrogate pairs
+    if (end - current < 6)
+      return addError("additional six characters expected to parse unicode surrogate pair.", token,
+                      current);
+    unsigned int surrogatePair;
+    if (*(current++) == '\\' && *(current++) == 'u')
+    {
+      if (decodeUnicodeEscapeSequence(token, current, end, surrogatePair))
+      {
+        unicode = 0x10000 + ((unicode & 0x3FF) << 10) + (surrogatePair & 0x3FF);
+      }
+      else
+        return false;
+    }
+    else
+      return addError("expecting another \\u token to begin the second half of "
+                      "a unicode surrogate pair",
+                      token, current);
+  }
+  return true;
+}
+
+bool OurReader::decodeUnicodeEscapeSequence(Token &token, Location &current, Location end,
+                                            unsigned int &ret_unicode)
+{
+  if (end - current < 4)
+    return addError("Bad unicode escape sequence in string: four digits expected.", token, current);
+  int unicode = 0;
+  for (int index = 0; index < 4; ++index)
+  {
+    Char c = *current++;
+    unicode *= 16;
+    if (c >= '0' && c <= '9')
+      unicode += c - '0';
+    else if (c >= 'a' && c <= 'f')
+      unicode += c - 'a' + 10;
+    else if (c >= 'A' && c <= 'F')
+      unicode += c - 'A' + 10;
+    else
+      return addError("Bad unicode escape sequence in string: hexadecimal digit expected.", token,
+                      current);
+  }
+  ret_unicode = static_cast<unsigned int>(unicode);
+  return true;
+}
+
+bool OurReader::addError(const JSONCPP_STRING &message, Token &token, Location extra)
+{
+  ErrorInfo info;
+  info.token_ = token;
+  info.message_ = message;
+  info.extra_ = extra;
+  errors_.push_back(info);
+  return false;
+}
+
+bool OurReader::recoverFromError(TokenType skipUntilToken)
+{
+  size_t errorCount = errors_.size();
+  Token skip;
+  for (;;)
+  {
+    if (!readToken(skip))
+      errors_.resize(errorCount); // discard errors caused by recovery
+    if (skip.type_ == skipUntilToken || skip.type_ == tokenEndOfStream)
+      break;
+  }
+  errors_.resize(errorCount);
+  return false;
+}
+
+bool OurReader::addErrorAndRecover(const JSONCPP_STRING &message, Token &token,
+                                   TokenType skipUntilToken)
+{
+  addError(message, token);
+  return recoverFromError(skipUntilToken);
+}
+
+Value &OurReader::currentValue() { return *(nodes_.top()); }
+
+OurReader::Char OurReader::getNextChar()
+{
+  if (current_ == end_)
+    return 0;
+  return *current_++;
+}
+
+void OurReader::getLocationLineAndColumn(Location location, int &line, int &column) const
+{
+  Location current = begin_;
+  Location lastLineStart = current;
+  line = 0;
+  while (current < location && current != end_)
+  {
+    Char c = *current++;
+    if (c == '\r')
+    {
+      if (*current == '\n')
+        ++current;
+      lastLineStart = current;
+      ++line;
+    }
+    else if (c == '\n')
+    {
+      lastLineStart = current;
+      ++line;
+    }
+  }
+  // column & line start at 1
+  column = int(location - lastLineStart) + 1;
+  ++line;
+}
+
+JSONCPP_STRING OurReader::getLocationLineAndColumn(Location location) const
+{
+  int line, column;
+  getLocationLineAndColumn(location, line, column);
+  char buffer[18 + 16 + 16 + 1];
+  snprintf(buffer, sizeof(buffer), "Line %d, Column %d", line, column);
+  return buffer;
+}
+
+JSONCPP_STRING OurReader::getFormattedErrorMessages() const
+{
+  JSONCPP_STRING formattedMessage;
+  for (Errors::const_iterator itError = errors_.begin(); itError != errors_.end(); ++itError)
+  {
+    const ErrorInfo &error = *itError;
+    formattedMessage += "* " + getLocationLineAndColumn(error.token_.start_) + "\n";
+    formattedMessage += "  " + error.message_ + "\n";
+    if (error.extra_)
+      formattedMessage += "See " + getLocationLineAndColumn(error.extra_) + " for detail.\n";
+  }
+  return formattedMessage;
+}
+
+std::vector<OurReader::StructuredError> OurReader::getStructuredErrors() const
+{
+  std::vector<OurReader::StructuredError> allErrors;
+  for (Errors::const_iterator itError = errors_.begin(); itError != errors_.end(); ++itError)
+  {
+    const ErrorInfo &error = *itError;
+    OurReader::StructuredError structured;
+    structured.offset_start = error.token_.start_ - begin_;
+    structured.offset_limit = error.token_.end_ - begin_;
+    structured.message = error.message_;
+    allErrors.push_back(structured);
+  }
+  return allErrors;
+}
+
+bool OurReader::pushError(const Value &value, const JSONCPP_STRING &message)
+{
+  ptrdiff_t length = end_ - begin_;
+  if (value.getOffsetStart() > length || value.getOffsetLimit() > length)
+    return false;
+  Token token;
+  token.type_ = tokenError;
+  token.start_ = begin_ + value.getOffsetStart();
+  token.end_ = end_ + value.getOffsetLimit();
+  ErrorInfo info;
+  info.token_ = token;
+  info.message_ = message;
+  info.extra_ = 0;
+  errors_.push_back(info);
+  return true;
+}
+
+bool OurReader::pushError(const Value &value, const JSONCPP_STRING &message, const Value &extra)
+{
+  ptrdiff_t length = end_ - begin_;
+  if (value.getOffsetStart() > length || value.getOffsetLimit() > length ||
+      extra.getOffsetLimit() > length)
+    return false;
+  Token token;
+  token.type_ = tokenError;
+  token.start_ = begin_ + value.getOffsetStart();
+  token.end_ = begin_ + value.getOffsetLimit();
+  ErrorInfo info;
+  info.token_ = token;
+  info.message_ = message;
+  info.extra_ = begin_ + extra.getOffsetStart();
+  errors_.push_back(info);
+  return true;
+}
+
+bool OurReader::good() const { return !errors_.size(); }
+
+class OurCharReader : public CharReader
+{
+  bool const collectComments_;
+  OurReader reader_;
+
+public:
+  OurCharReader(bool collectComments, OurFeatures const &features)
+      : collectComments_(collectComments), reader_(features)
+  {
+  }
+  bool parse(char const *beginDoc, char const *endDoc, Value *root,
+             JSONCPP_STRING *errs) JSONCPP_OVERRIDE
+  {
+    bool ok = reader_.parse(beginDoc, endDoc, *root, collectComments_);
+    if (errs)
+    {
+      *errs = reader_.getFormattedErrorMessages();
+    }
+    return ok;
+  }
+};
+
+CharReaderBuilder::CharReaderBuilder() { setDefaults(&settings_); }
+CharReaderBuilder::~CharReaderBuilder() {}
+CharReader *CharReaderBuilder::newCharReader() const
+{
+  bool collectComments = settings_["collectComments"].asBool();
+  OurFeatures features = OurFeatures::all();
+  features.allowComments_ = settings_["allowComments"].asBool();
+  features.strictRoot_ = settings_["strictRoot"].asBool();
+  features.allowDroppedNullPlaceholders_ = settings_["allowDroppedNullPlaceholders"].asBool();
+  features.allowNumericKeys_ = settings_["allowNumericKeys"].asBool();
+  features.allowSingleQuotes_ = settings_["allowSingleQuotes"].asBool();
+  features.stackLimit_ = settings_["stackLimit"].asInt();
+  features.failIfExtra_ = settings_["failIfExtra"].asBool();
+  features.rejectDupKeys_ = settings_["rejectDupKeys"].asBool();
+  features.allowSpecialFloats_ = settings_["allowSpecialFloats"].asBool();
+  return new OurCharReader(collectComments, features);
+}
+static void getValidReaderKeys(std::set<JSONCPP_STRING> *valid_keys)
+{
+  valid_keys->clear();
+  valid_keys->insert("collectComments");
+  valid_keys->insert("allowComments");
+  valid_keys->insert("strictRoot");
+  valid_keys->insert("allowDroppedNullPlaceholders");
+  valid_keys->insert("allowNumericKeys");
+  valid_keys->insert("allowSingleQuotes");
+  valid_keys->insert("stackLimit");
+  valid_keys->insert("failIfExtra");
+  valid_keys->insert("rejectDupKeys");
+  valid_keys->insert("allowSpecialFloats");
+}
+bool CharReaderBuilder::validate(Json::Value *invalid) const
+{
+  Json::Value my_invalid;
+  if (!invalid)
+    invalid = &my_invalid; // so we do not need to test for NULL
+  Json::Value &inv = *invalid;
+  std::set<JSONCPP_STRING> valid_keys;
+  getValidReaderKeys(&valid_keys);
+  Value::Members keys = settings_.getMemberNames();
+  size_t n = keys.size();
+  for (size_t i = 0; i < n; ++i)
+  {
+    JSONCPP_STRING const &key = keys[i];
+    if (valid_keys.find(key) == valid_keys.end())
+    {
+      inv[key] = settings_[key];
+    }
+  }
+  return 0u == inv.size();
+}
+Value &CharReaderBuilder::operator[](JSONCPP_STRING key) { return settings_[key]; }
+// static
+void CharReaderBuilder::strictMode(Json::Value *settings)
+{
+  //! [CharReaderBuilderStrictMode]
+  (*settings)["allowComments"] = false;
+  (*settings)["strictRoot"] = true;
+  (*settings)["allowDroppedNullPlaceholders"] = false;
+  (*settings)["allowNumericKeys"] = false;
+  (*settings)["allowSingleQuotes"] = false;
+  (*settings)["stackLimit"] = 1000;
+  (*settings)["failIfExtra"] = true;
+  (*settings)["rejectDupKeys"] = true;
+  (*settings)["allowSpecialFloats"] = false;
+  //! [CharReaderBuilderStrictMode]
+}
+// static
+void CharReaderBuilder::setDefaults(Json::Value *settings)
+{
+  //! [CharReaderBuilderDefaults]
+  (*settings)["collectComments"] = true;
+  (*settings)["allowComments"] = true;
+  (*settings)["strictRoot"] = false;
+  (*settings)["allowDroppedNullPlaceholders"] = false;
+  (*settings)["allowNumericKeys"] = false;
+  (*settings)["allowSingleQuotes"] = false;
+  (*settings)["stackLimit"] = 1000;
+  (*settings)["failIfExtra"] = false;
+  (*settings)["rejectDupKeys"] = false;
+  (*settings)["allowSpecialFloats"] = false;
+  //! [CharReaderBuilderDefaults]
+}
+
+//////////////////////////////////
+// global functions
+
+bool parseFromStream(CharReader::Factory const &fact, JSONCPP_ISTREAM &sin, Value *root,
+                     JSONCPP_STRING *errs)
+{
+  JSONCPP_OSTRINGSTREAM ssin;
+  ssin << sin.rdbuf();
+  JSONCPP_STRING doc = ssin.str();
+  char const *begin = doc.data();
+  char const *end = begin + doc.size();
+  // Note that we do not actually need a null-terminator.
+  CharReaderPtr const reader(fact.newCharReader());
+  return reader->parse(begin, end, root, errs);
+}
+
+JSONCPP_ISTREAM &operator>>(JSONCPP_ISTREAM &sin, Value &root)
+{
+  CharReaderBuilder b;
+  JSONCPP_STRING errs;
+  bool ok = parseFromStream(b, sin, &root, &errs);
+  if (!ok)
+  {
+    fprintf(stderr, "Error from reader: %s", errs.c_str());
+
+    throwRuntimeError(errs);
+  }
+  return sin;
+}
+
+} // namespace Json
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: src/lib_json/json_reader.cpp
+// //////////////////////////////////////////////////////////////////////
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: src/lib_json/json_valueiterator.inl
+// //////////////////////////////////////////////////////////////////////
+
+// Copyright 2007-2010 Baptiste Lepilleur
+// Distributed under MIT license, or public domain if desired and
+// recognized in your jurisdiction.
+// See file LICENSE for detail or copy at http://jsoncpp.sourceforge.net/LICENSE
+
+// included by json_value.cpp
+
+namespace Json
+{
+
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// class ValueIteratorBase
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+
+ValueIteratorBase::ValueIteratorBase() : current_(), isNull_(true) {}
+
+ValueIteratorBase::ValueIteratorBase(const Value::ObjectValues::iterator &current)
+    : current_(current), isNull_(false)
+{
+}
+
+Value &ValueIteratorBase::deref() const { return current_->second; }
+
+void ValueIteratorBase::increment() { ++current_; }
+
+void ValueIteratorBase::decrement() { --current_; }
+
+ValueIteratorBase::difference_type ValueIteratorBase::computeDistance(const SelfType &other) const
+{
+#ifdef JSON_USE_CPPTL_SMALLMAP
+  return other.current_ - current_;
+#else
+  // Iterator for null value are initialized using the default
+  // constructor, which initialize current_ to the default
+  // std::map::iterator. As begin() and end() are two instance
+  // of the default std::map::iterator, they can not be compared.
+  // To allow this, we handle this comparison specifically.
+  if (isNull_ && other.isNull_)
+  {
+    return 0;
+  }
+
+  // Usage of std::distance is not portable (does not compile with Sun Studio 12
+  // RogueWave STL,
+  // which is the one used by default).
+  // Using a portable hand-made version for non random iterator instead:
+  //   return difference_type( std::distance( current_, other.current_ ) );
+  difference_type myDistance = 0;
+  for (Value::ObjectValues::iterator it = current_; it != other.current_; ++it)
+  {
+    ++myDistance;
+  }
+  return myDistance;
+#endif
+}
+
+bool ValueIteratorBase::isEqual(const SelfType &other) const
+{
+  if (isNull_)
+  {
+    return other.isNull_;
+  }
+  return current_ == other.current_;
+}
+
+void ValueIteratorBase::copy(const SelfType &other)
+{
+  current_ = other.current_;
+  isNull_ = other.isNull_;
+}
+
+Value ValueIteratorBase::key() const
+{
+  const Value::CZString czstring = (*current_).first;
+  if (czstring.data())
+  {
+    if (czstring.isStaticString())
+      return Value(StaticString(czstring.data()));
+    return Value(czstring.data(), czstring.data() + czstring.length());
+  }
+  return Value(czstring.index());
+}
+
+UInt ValueIteratorBase::index() const
+{
+  const Value::CZString czstring = (*current_).first;
+  if (!czstring.data())
+    return czstring.index();
+  return Value::UInt(-1);
+}
+
+JSONCPP_STRING ValueIteratorBase::name() const
+{
+  char const *keey;
+  char const *end;
+  keey = memberName(&end);
+  if (!keey)
+    return JSONCPP_STRING();
+  return JSONCPP_STRING(keey, end);
+}
+
+char const *ValueIteratorBase::memberName() const
+{
+  const char *cname = (*current_).first.data();
+  return cname ? cname : "";
+}
+
+char const *ValueIteratorBase::memberName(char const **end) const
+{
+  const char *cname = (*current_).first.data();
+  if (!cname)
+  {
+    *end = NULL;
+    return NULL;
+  }
+  *end = cname + (*current_).first.length();
+  return cname;
+}
+
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// class ValueConstIterator
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+
+ValueConstIterator::ValueConstIterator() {}
+
+ValueConstIterator::ValueConstIterator(const Value::ObjectValues::iterator &current)
+    : ValueIteratorBase(current)
+{
+}
+
+ValueConstIterator::ValueConstIterator(ValueIterator const &other) : ValueIteratorBase(other) {}
+
+ValueConstIterator &ValueConstIterator::operator=(const ValueIteratorBase &other)
+{
+  copy(other);
+  return *this;
+}
+
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// class ValueIterator
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+
+ValueIterator::ValueIterator() {}
+
+ValueIterator::ValueIterator(const Value::ObjectValues::iterator &current)
+    : ValueIteratorBase(current)
+{
+}
+
+ValueIterator::ValueIterator(const ValueConstIterator &other) : ValueIteratorBase(other)
+{
+  throwRuntimeError("ConstIterator to Iterator should never be allowed.");
+}
+
+ValueIterator::ValueIterator(const ValueIterator &other) : ValueIteratorBase(other) {}
+
+ValueIterator &ValueIterator::operator=(const SelfType &other)
+{
+  copy(other);
+  return *this;
+}
+
+} // namespace Json
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: src/lib_json/json_valueiterator.inl
+// //////////////////////////////////////////////////////////////////////
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: src/lib_json/json_value.cpp
+// //////////////////////////////////////////////////////////////////////
+
+// Copyright 2011 Baptiste Lepilleur
+// Distributed under MIT license, or public domain if desired and
+// recognized in your jurisdiction.
+// See file LICENSE for detail or copy at http://jsoncpp.sourceforge.net/LICENSE
+
+#if !defined(JSON_IS_AMALGAMATION)
+#include <json/assertions.h>
+#include <json/value.h>
+#include <json/writer.h>
+#endif // if !defined(JSON_IS_AMALGAMATION)
+#include <math.h>
+#include <sstream>
+#include <utility>
+#include <cstring>
+#include <cassert>
+#ifdef JSON_USE_CPPTL
+#include <cpptl/conststring.h>
+#endif
+#include <cstddef>   // size_t
+#include <algorithm> // min()
+
+#define JSON_ASSERT_UNREACHABLE assert(false)
+
+namespace Json
+{
+
+// This is a walkaround to avoid the static initialization of Value::null.
+// kNull must be word-aligned to avoid crashing on ARM.  We use an alignment of
+// 8 (instead of 4) as a bit of future-proofing.
+#if defined(__ARMEL__)
+#define ALIGNAS(byte_alignment) __attribute__((aligned(byte_alignment)))
+#else
+#define ALIGNAS(byte_alignment)
+#endif
+// static const unsigned char ALIGNAS(8) kNull[sizeof(Value)] = { 0 };
+// const unsigned char& kNullRef = kNull[0];
+// const Value& Value::null = reinterpret_cast<const Value&>(kNullRef);
+// const Value& Value::nullRef = null;
+
+// static
+Value const &Value::nullSingleton()
+{
+  static Value const nullStatic;
+  return nullStatic;
+}
+
+// for backwards compatibility, we'll leave these global references around, but DO NOT
+// use them in JSONCPP library code any more!
+Value const &Value::null = Value::nullSingleton();
+Value const &Value::nullRef = Value::nullSingleton();
+
+const Int Value::minInt = Int(~(UInt(-1) / 2));
+const Int Value::maxInt = Int(UInt(-1) / 2);
+const UInt Value::maxUInt = UInt(-1);
+#if defined(JSON_HAS_INT64)
+const Int64 Value::minInt64 = Int64(~(UInt64(-1) / 2));
+const Int64 Value::maxInt64 = Int64(UInt64(-1) / 2);
+const UInt64 Value::maxUInt64 = UInt64(-1);
+// The constant is hard-coded because some compiler have trouble
+// converting Value::maxUInt64 to a double correctly (AIX/xlC).
+// Assumes that UInt64 is a 64 bits integer.
+static const double maxUInt64AsDouble = 18446744073709551615.0;
+#endif // defined(JSON_HAS_INT64)
+const LargestInt Value::minLargestInt = LargestInt(~(LargestUInt(-1) / 2));
+const LargestInt Value::maxLargestInt = LargestInt(LargestUInt(-1) / 2);
+const LargestUInt Value::maxLargestUInt = LargestUInt(-1);
+
+#if !defined(JSON_USE_INT64_DOUBLE_CONVERSION)
+template <typename T, typename U> static inline bool InRange(double d, T min, U max)
+{
+  // The casts can lose precision, but we are looking only for
+  // an approximate range. Might fail on edge cases though. ~cdunn
+  // return d >= static_cast<double>(min) && d <= static_cast<double>(max);
+  return d >= min && d <= max;
+}
+#else  // if !defined(JSON_USE_INT64_DOUBLE_CONVERSION)
+static inline double integerToDouble(Json::UInt64 value)
+{
+  return static_cast<double>(Int64(value / 2)) * 2.0 + static_cast<double>(Int64(value & 1));
+}
+
+template <typename T> static inline double integerToDouble(T value)
+{
+  return static_cast<double>(value);
+}
+
+template <typename T, typename U> static inline bool InRange(double d, T min, U max)
+{
+  return d >= integerToDouble(min) && d <= integerToDouble(max);
+}
+#endif // if !defined(JSON_USE_INT64_DOUBLE_CONVERSION)
+
+/** Duplicates the specified string value.
+ * @param value Pointer to the string to duplicate. Must be zero-terminated if
+ *              length is "unknown".
+ * @param length Length of the value. if equals to unknown, then it will be
+ *               computed using strlen(value).
+ * @return Pointer on the duplicate instance of string.
+ */
+static inline char *duplicateStringValue(const char *value, size_t length)
+{
+  // Avoid an integer overflow in the call to malloc below by limiting length
+  // to a sane value.
+  if (length >= static_cast<size_t>(Value::maxInt))
+    length = Value::maxInt - 1;
+
+  char *newString = static_cast<char *>(malloc(length + 1));
+  if (newString == NULL)
+  {
+    throwRuntimeError("in Json::Value::duplicateStringValue(): "
+                      "Failed to allocate string value buffer");
+  }
+  memcpy(newString, value, length);
+  newString[length] = 0;
+  return newString;
+}
+
+/* Record the length as a prefix.
+ */
+static inline char *duplicateAndPrefixStringValue(const char *value, unsigned int length)
+{
+  // Avoid an integer overflow in the call to malloc below by limiting length
+  // to a sane value.
+  JSON_ASSERT_MESSAGE(length <= static_cast<unsigned>(Value::maxInt) - sizeof(unsigned) - 1U,
+                      "in Json::Value::duplicateAndPrefixStringValue(): "
+                      "length too big for prefixing");
+  unsigned actualLength = length + static_cast<unsigned>(sizeof(unsigned)) + 1U;
+  char *newString = static_cast<char *>(malloc(actualLength));
+  if (newString == 0)
+  {
+    throwRuntimeError("in Json::Value::duplicateAndPrefixStringValue(): "
+                      "Failed to allocate string value buffer");
+  }
+  *reinterpret_cast<unsigned *>(newString) = length;
+  memcpy(newString + sizeof(unsigned), value, length);
+  newString[actualLength - 1U] = 0; // to avoid buffer over-run accidents by users later
+  return newString;
+}
+inline static void decodePrefixedString(bool isPrefixed, char const *prefixed, unsigned *length,
+                                        char const **value)
+{
+  if (!isPrefixed)
+  {
+    *length = static_cast<unsigned>(strlen(prefixed));
+    *value = prefixed;
+  }
+  else
+  {
+    *length = *reinterpret_cast<unsigned const *>(prefixed);
+    *value = prefixed + sizeof(unsigned);
+  }
+}
+/** Free the string duplicated by duplicateStringValue()/duplicateAndPrefixStringValue().
+ */
+#if JSONCPP_USING_SECURE_MEMORY
+static inline void releasePrefixedStringValue(char *value)
+{
+  unsigned length = 0;
+  char const *valueDecoded;
+  decodePrefixedString(true, value, &length, &valueDecoded);
+  size_t const size = sizeof(unsigned) + length + 1U;
+  memset(value, 0, size);
+  free(value);
+}
+static inline void releaseStringValue(char *value, unsigned length)
+{
+  // length==0 => we allocated the strings memory
+  size_t size = (length == 0) ? strlen(value) : length;
+  memset(value, 0, size);
+  free(value);
+}
+#else  // !JSONCPP_USING_SECURE_MEMORY
+static inline void releasePrefixedStringValue(char *value) { free(value); }
+static inline void releaseStringValue(char *value, unsigned) { free(value); }
+#endif // JSONCPP_USING_SECURE_MEMORY
+
+} // namespace Json
+
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// ValueInternals...
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+#if !defined(JSON_IS_AMALGAMATION)
+
+#include "json_valueiterator.inl"
+#endif // if !defined(JSON_IS_AMALGAMATION)
+
+namespace Json
+{
+
+Exception::Exception(JSONCPP_STRING const &msg) : msg_(msg) {}
+Exception::~Exception() throw() {}
+char const *Exception::what() const throw() { return msg_.c_str(); }
+RuntimeError::RuntimeError(JSONCPP_STRING const &msg) : Exception(msg) {}
+LogicError::LogicError(JSONCPP_STRING const &msg) : Exception(msg) {}
+JSONCPP_NORETURN void throwRuntimeError(JSONCPP_STRING const &msg) { throw RuntimeError(msg); }
+JSONCPP_NORETURN void throwLogicError(JSONCPP_STRING const &msg) { throw LogicError(msg); }
+
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// class Value::CommentInfo
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+
+Value::CommentInfo::CommentInfo() : comment_(0) {}
+
+Value::CommentInfo::~CommentInfo()
+{
+  if (comment_)
+    releaseStringValue(comment_, 0u);
+}
+
+void Value::CommentInfo::setComment(const char *text, size_t len)
+{
+  if (comment_)
+  {
+    releaseStringValue(comment_, 0u);
+    comment_ = 0;
+  }
+  JSON_ASSERT(text != 0);
+  JSON_ASSERT_MESSAGE(text[0] == '\0' || text[0] == '/',
+                      "in Json::Value::setComment(): Comments must start with /");
+  // It seems that /**/ style comments are acceptable as well.
+  comment_ = duplicateStringValue(text, len);
+}
+
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// class Value::CZString
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+
+// Notes: policy_ indicates if the string was allocated when
+// a string is stored.
+
+Value::CZString::CZString(ArrayIndex aindex) : cstr_(0), index_(aindex) {}
+
+Value::CZString::CZString(char const *str, unsigned ulength, DuplicationPolicy allocate)
+    : cstr_(str)
+{
+  // allocate != duplicate
+  storage_.policy_ = allocate & 0x3;
+  storage_.length_ = ulength & 0x3FFFFFFF;
+}
+
+Value::CZString::CZString(const CZString &other)
+{
+  cstr_ = (other.storage_.policy_ != noDuplication && other.cstr_ != 0
+               ? duplicateStringValue(other.cstr_, other.storage_.length_)
+               : other.cstr_);
+  storage_.policy_ =
+      static_cast<unsigned>(
+          other.cstr_ ? (static_cast<DuplicationPolicy>(other.storage_.policy_) == noDuplication
+                             ? noDuplication
+                             : duplicate)
+                      : static_cast<DuplicationPolicy>(other.storage_.policy_)) &
+      3U;
+  storage_.length_ = other.storage_.length_;
+}
+
+#if JSON_HAS_RVALUE_REFERENCES
+Value::CZString::CZString(CZString &&other) : cstr_(other.cstr_), index_(other.index_)
+{
+  other.cstr_ = nullptr;
+}
+#endif
+
+Value::CZString::~CZString()
+{
+  if (cstr_ && storage_.policy_ == duplicate)
+  {
+    releaseStringValue(const_cast<char *>(cstr_), storage_.length_ + 1u); //+1 for null terminating
+                                                                          // character for sake of
+    // completeness but not
+    // actually necessary
+  }
+}
+
+void Value::CZString::swap(CZString &other)
+{
+  std::swap(cstr_, other.cstr_);
+  std::swap(index_, other.index_);
+}
+
+Value::CZString &Value::CZString::operator=(CZString other)
+{
+  swap(other);
+  return *this;
+}
+
+bool Value::CZString::operator<(const CZString &other) const
+{
+  if (!cstr_)
+    return index_ < other.index_;
+  // return strcmp(cstr_, other.cstr_) < 0;
+  // Assume both are strings.
+  unsigned this_len = this->storage_.length_;
+  unsigned other_len = other.storage_.length_;
+  unsigned min_len = std::min(this_len, other_len);
+  JSON_ASSERT(this->cstr_ && other.cstr_);
+  int comp = memcmp(this->cstr_, other.cstr_, min_len);
+  if (comp < 0)
+    return true;
+  if (comp > 0)
+    return false;
+  return (this_len < other_len);
+}
+
+bool Value::CZString::operator==(const CZString &other) const
+{
+  if (!cstr_)
+    return index_ == other.index_;
+  // return strcmp(cstr_, other.cstr_) == 0;
+  // Assume both are strings.
+  unsigned this_len = this->storage_.length_;
+  unsigned other_len = other.storage_.length_;
+  if (this_len != other_len)
+    return false;
+  JSON_ASSERT(this->cstr_ && other.cstr_);
+  int comp = memcmp(this->cstr_, other.cstr_, this_len);
+  return comp == 0;
+}
+
+ArrayIndex Value::CZString::index() const { return index_; }
+
+// const char* Value::CZString::c_str() const { return cstr_; }
+const char *Value::CZString::data() const { return cstr_; }
+unsigned Value::CZString::length() const { return storage_.length_; }
+bool Value::CZString::isStaticString() const { return storage_.policy_ == noDuplication; }
+
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// class Value::Value
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+// //////////////////////////////////////////////////////////////////
+
+/*! \internal Default constructor initialization must be equivalent to:
+ * memset( this, 0, sizeof(Value) )
+ * This optimization is used in ValueInternalMap fast allocator.
+ */
+Value::Value(ValueType vtype)
+{
+  static char const empty[] = "";
+  initBasic(vtype);
+  switch (vtype)
+  {
+    case nullValue:
+      break;
+    case intValue:
+    case uintValue:
+      value_.int_ = 0;
+      break;
+    case realValue:
+      value_.real_ = 0.0;
+      break;
+    case stringValue:
+      // allocated_ == false, so this is safe.
+      value_.string_ = const_cast<char *>(static_cast<char const *>(empty));
+      break;
+    case arrayValue:
+    case objectValue:
+      value_.map_ = new ObjectValues();
+      break;
+    case booleanValue:
+      value_.bool_ = false;
+      break;
+    default:
+      JSON_ASSERT_UNREACHABLE;
+  }
+}
+
+Value::Value(Int value)
+{
+  initBasic(intValue);
+  value_.int_ = value;
+}
+
+Value::Value(UInt value)
+{
+  initBasic(uintValue);
+  value_.uint_ = value;
+}
+#if defined(JSON_HAS_INT64)
+Value::Value(Int64 value)
+{
+  initBasic(intValue);
+  value_.int_ = value;
+}
+Value::Value(UInt64 value)
+{
+  initBasic(uintValue);
+  value_.uint_ = value;
+}
+#endif // defined(JSON_HAS_INT64)
+
+Value::Value(double value)
+{
+  initBasic(realValue);
+  value_.real_ = value;
+}
+
+Value::Value(const char *value)
+{
+  initBasic(stringValue, true);
+  value_.string_ = duplicateAndPrefixStringValue(value, static_cast<unsigned>(strlen(value)));
+}
+
+Value::Value(const char *beginValue, const char *endValue)
+{
+  initBasic(stringValue, true);
+  value_.string_ =
+      duplicateAndPrefixStringValue(beginValue, static_cast<unsigned>(endValue - beginValue));
+}
+
+Value::Value(const JSONCPP_STRING &value)
+{
+  initBasic(stringValue, true);
+  value_.string_ =
+      duplicateAndPrefixStringValue(value.data(), static_cast<unsigned>(value.length()));
+}
+
+Value::Value(const StaticString &value)
+{
+  initBasic(stringValue);
+  value_.string_ = const_cast<char *>(value.c_str());
+}
+
+#ifdef JSON_USE_CPPTL
+Value::Value(const CppTL::ConstString &value)
+{
+  initBasic(stringValue, true);
+  value_.string_ = duplicateAndPrefixStringValue(value, static_cast<unsigned>(value.length()));
+}
+#endif
+
+Value::Value(bool value)
+{
+  initBasic(booleanValue);
+  value_.bool_ = value;
+}
+
+Value::Value(Value const &other)
+    : type_(other.type_), allocated_(false), comments_(0), start_(other.start_),
+      limit_(other.limit_)
+{
+  switch (type_)
+  {
+    case nullValue:
+    case intValue:
+    case uintValue:
+    case realValue:
+    case booleanValue:
+      value_ = other.value_;
+      break;
+    case stringValue:
+      if (other.value_.string_ && other.allocated_)
+      {
+        unsigned len;
+        char const *str;
+        decodePrefixedString(other.allocated_, other.value_.string_, &len, &str);
+        value_.string_ = duplicateAndPrefixStringValue(str, len);
+        allocated_ = true;
+      }
+      else
+      {
+        value_.string_ = other.value_.string_;
+        allocated_ = false;
+      }
+      break;
+    case arrayValue:
+    case objectValue:
+      value_.map_ = new ObjectValues(*other.value_.map_);
+      break;
+    default:
+      JSON_ASSERT_UNREACHABLE;
+  }
+  if (other.comments_)
+  {
+    comments_ = new CommentInfo[numberOfCommentPlacement];
+    for (int comment = 0; comment < numberOfCommentPlacement; ++comment)
+    {
+      const CommentInfo &otherComment = other.comments_[comment];
+      if (otherComment.comment_)
+        comments_[comment].setComment(otherComment.comment_, strlen(otherComment.comment_));
+    }
+  }
+}
+
+#if JSON_HAS_RVALUE_REFERENCES
+// Move constructor
+Value::Value(Value &&other)
+{
+  initBasic(nullValue);
+  swap(other);
+}
+#endif
+
+Value::~Value()
+{
+  switch (type_)
+  {
+    case nullValue:
+    case intValue:
+    case uintValue:
+    case realValue:
+    case booleanValue:
+      break;
+    case stringValue:
+      if (allocated_)
+        releasePrefixedStringValue(value_.string_);
+      break;
+    case arrayValue:
+    case objectValue:
+      delete value_.map_;
+      break;
+    default:
+      JSON_ASSERT_UNREACHABLE;
+  }
+
+  delete[] comments_;
+
+  value_.uint_ = 0;
+}
+
+Value &Value::operator=(Value other)
+{
+  swap(other);
+  return *this;
+}
+
+void Value::swapPayload(Value &other)
+{
+  ValueType temp = type_;
+  type_ = other.type_;
+  other.type_ = temp;
+  std::swap(value_, other.value_);
+  int temp2 = allocated_;
+  allocated_ = other.allocated_;
+  other.allocated_ = temp2 & 0x1;
+}
+
+void Value::swap(Value &other)
+{
+  swapPayload(other);
+  std::swap(comments_, other.comments_);
+  std::swap(start_, other.start_);
+  std::swap(limit_, other.limit_);
+}
+
+ValueType Value::type() const { return type_; }
+
+int Value::compare(const Value &other) const
+{
+  if (*this < other)
+    return -1;
+  if (*this > other)
+    return 1;
+  return 0;
+}
+
+bool Value::operator<(const Value &other) const
+{
+  int typeDelta = type_ - other.type_;
+  if (typeDelta)
+    return typeDelta < 0 ? true : false;
+  switch (type_)
+  {
+    case nullValue:
+      return false;
+    case intValue:
+      return value_.int_ < other.value_.int_;
+    case uintValue:
+      return value_.uint_ < other.value_.uint_;
+    case realValue:
+      return value_.real_ < other.value_.real_;
+    case booleanValue:
+      return value_.bool_ < other.value_.bool_;
+    case stringValue:
+    {
+      if ((value_.string_ == 0) || (other.value_.string_ == 0))
+      {
+        if (other.value_.string_)
+          return true;
+        else
+          return false;
+      }
+      unsigned this_len;
+      unsigned other_len;
+      char const *this_str;
+      char const *other_str;
+      decodePrefixedString(this->allocated_, this->value_.string_, &this_len, &this_str);
+      decodePrefixedString(other.allocated_, other.value_.string_, &other_len, &other_str);
+      unsigned min_len = std::min(this_len, other_len);
+      JSON_ASSERT(this_str && other_str);
+      int comp = memcmp(this_str, other_str, min_len);
+      if (comp < 0)
+        return true;
+      if (comp > 0)
+        return false;
+      return (this_len < other_len);
+    }
+    case arrayValue:
+    case objectValue:
+    {
+      int delta = int(value_.map_->size() - other.value_.map_->size());
+      if (delta)
+        return delta < 0;
+      return (*value_.map_) < (*other.value_.map_);
+    }
+    default:
+      JSON_ASSERT_UNREACHABLE;
+  }
+  return false; // unreachable
+}
+
+bool Value::operator<=(const Value &other) const { return !(other < *this); }
+
+bool Value::operator>=(const Value &other) const { return !(*this < other); }
+
+bool Value::operator>(const Value &other) const { return other < *this; }
+
+bool Value::operator==(const Value &other) const
+{
+  // if ( type_ != other.type_ )
+  // GCC 2.95.3 says:
+  // attempt to take address of bit-field structure member `Json::Value::type_'
+  // Beats me, but a temp solves the problem.
+  int temp = other.type_;
+  if (type_ != temp)
+    return false;
+  switch (type_)
+  {
+    case nullValue:
+      return true;
+    case intValue:
+      return value_.int_ == other.value_.int_;
+    case uintValue:
+      return value_.uint_ == other.value_.uint_;
+    case realValue:
+      return value_.real_ == other.value_.real_;
+    case booleanValue:
+      return value_.bool_ == other.value_.bool_;
+    case stringValue:
+    {
+      if ((value_.string_ == 0) || (other.value_.string_ == 0))
+      {
+        return (value_.string_ == other.value_.string_);
+      }
+      unsigned this_len;
+      unsigned other_len;
+      char const *this_str;
+      char const *other_str;
+      decodePrefixedString(this->allocated_, this->value_.string_, &this_len, &this_str);
+      decodePrefixedString(other.allocated_, other.value_.string_, &other_len, &other_str);
+      if (this_len != other_len)
+        return false;
+      JSON_ASSERT(this_str && other_str);
+      int comp = memcmp(this_str, other_str, this_len);
+      return comp == 0;
+    }
+    case arrayValue:
+    case objectValue:
+      return value_.map_->size() == other.value_.map_->size() &&
+             (*value_.map_) == (*other.value_.map_);
+    default:
+      JSON_ASSERT_UNREACHABLE;
+  }
+  return false; // unreachable
+}
+
+bool Value::operator!=(const Value &other) const { return !(*this == other); }
+
+const char *Value::asCString() const
+{
+  JSON_ASSERT_MESSAGE(type_ == stringValue, "in Json::Value::asCString(): requires stringValue");
+  if (value_.string_ == 0)
+    return 0;
+  unsigned this_len;
+  char const *this_str;
+  decodePrefixedString(this->allocated_, this->value_.string_, &this_len, &this_str);
+  return this_str;
+}
+
+#if JSONCPP_USING_SECURE_MEMORY
+unsigned Value::getCStringLength() const
+{
+  JSON_ASSERT_MESSAGE(type_ == stringValue, "in Json::Value::asCString(): requires stringValue");
+  if (value_.string_ == 0)
+    return 0;
+  unsigned this_len;
+  char const *this_str;
+  decodePrefixedString(this->allocated_, this->value_.string_, &this_len, &this_str);
+  return this_len;
+}
+#endif
+
+bool Value::getString(char const **str, char const **cend) const
+{
+  if (type_ != stringValue)
+    return false;
+  if (value_.string_ == 0)
+    return false;
+  unsigned length;
+  decodePrefixedString(this->allocated_, this->value_.string_, &length, str);
+  *cend = *str + length;
+  return true;
+}
+
+JSONCPP_STRING Value::asString() const
+{
+  switch (type_)
+  {
+    case nullValue:
+      return "";
+    case stringValue:
+    {
+      if (value_.string_ == 0)
+        return "";
+      unsigned this_len;
+      char const *this_str;
+      decodePrefixedString(this->allocated_, this->value_.string_, &this_len, &this_str);
+      return JSONCPP_STRING(this_str, this_len);
+    }
+    case booleanValue:
+      return value_.bool_ ? "true" : "false";
+    case intValue:
+      return valueToString(value_.int_);
+    case uintValue:
+      return valueToString(value_.uint_);
+    case realValue:
+      return valueToString(value_.real_);
+    default:
+      JSON_FAIL_MESSAGE("Type is not convertible to string");
+  }
+}
+
+#ifdef JSON_USE_CPPTL
+CppTL::ConstString Value::asConstString() const
+{
+  unsigned len;
+  char const *str;
+  decodePrefixedString(allocated_, value_.string_, &len, &str);
+  return CppTL::ConstString(str, len);
+}
+#endif
+
+Value::Int Value::asInt() const
+{
+  switch (type_)
+  {
+    case intValue:
+      JSON_ASSERT_MESSAGE(isInt(), "LargestInt out of Int range");
+      return Int(value_.int_);
+    case uintValue:
+      JSON_ASSERT_MESSAGE(isInt(), "LargestUInt out of Int range");
+      return Int(value_.uint_);
+    case realValue:
+      JSON_ASSERT_MESSAGE(InRange(value_.real_, minInt, maxInt), "double out of Int range");
+      return Int(value_.real_);
+    case nullValue:
+      return 0;
+    case booleanValue:
+      return value_.bool_ ? 1 : 0;
+    default:
+      break;
+  }
+  JSON_FAIL_MESSAGE("Value is not convertible to Int.");
+}
+
+Value::UInt Value::asUInt() const
+{
+  switch (type_)
+  {
+    case intValue:
+      JSON_ASSERT_MESSAGE(isUInt(), "LargestInt out of UInt range");
+      return UInt(value_.int_);
+    case uintValue:
+      JSON_ASSERT_MESSAGE(isUInt(), "LargestUInt out of UInt range");
+      return UInt(value_.uint_);
+    case realValue:
+      JSON_ASSERT_MESSAGE(InRange(value_.real_, 0, maxUInt), "double out of UInt range");
+      return UInt(value_.real_);
+    case nullValue:
+      return 0;
+    case booleanValue:
+      return value_.bool_ ? 1 : 0;
+    default:
+      break;
+  }
+  JSON_FAIL_MESSAGE("Value is not convertible to UInt.");
+}
+
+#if defined(JSON_HAS_INT64)
+
+Value::Int64 Value::asInt64() const
+{
+  switch (type_)
+  {
+    case intValue:
+      return Int64(value_.int_);
+    case uintValue:
+      JSON_ASSERT_MESSAGE(isInt64(), "LargestUInt out of Int64 range");
+      return Int64(value_.uint_);
+    case realValue:
+      JSON_ASSERT_MESSAGE(InRange(value_.real_, minInt64, maxInt64), "double out of Int64 range");
+      return Int64(value_.real_);
+    case nullValue:
+      return 0;
+    case booleanValue:
+      return value_.bool_ ? 1 : 0;
+    default:
+      break;
+  }
+  JSON_FAIL_MESSAGE("Value is not convertible to Int64.");
+}
+
+Value::UInt64 Value::asUInt64() const
+{
+  switch (type_)
+  {
+    case intValue:
+      JSON_ASSERT_MESSAGE(isUInt64(), "LargestInt out of UInt64 range");
+      return UInt64(value_.int_);
+    case uintValue:
+      return UInt64(value_.uint_);
+    case realValue:
+      JSON_ASSERT_MESSAGE(InRange(value_.real_, 0, maxUInt64), "double out of UInt64 range");
+      return UInt64(value_.real_);
+    case nullValue:
+      return 0;
+    case booleanValue:
+      return value_.bool_ ? 1 : 0;
+    default:
+      break;
+  }
+  JSON_FAIL_MESSAGE("Value is not convertible to UInt64.");
+}
+#endif // if defined(JSON_HAS_INT64)
+
+LargestInt Value::asLargestInt() const
+{
+#if defined(JSON_NO_INT64)
+  return asInt();
+#else
+  return asInt64();
+#endif
+}
+
+LargestUInt Value::asLargestUInt() const
+{
+#if defined(JSON_NO_INT64)
+  return asUInt();
+#else
+  return asUInt64();
+#endif
+}
+
+double Value::asDouble() const
+{
+  switch (type_)
+  {
+    case intValue:
+      return static_cast<double>(value_.int_);
+    case uintValue:
+#if !defined(JSON_USE_INT64_DOUBLE_CONVERSION)
+      return static_cast<double>(value_.uint_);
+#else  // if !defined(JSON_USE_INT64_DOUBLE_CONVERSION)
+      return integerToDouble(value_.uint_);
+#endif // if !defined(JSON_USE_INT64_DOUBLE_CONVERSION)
+    case realValue:
+      return value_.real_;
+    case nullValue:
+      return 0.0;
+    case booleanValue:
+      return value_.bool_ ? 1.0 : 0.0;
+    default:
+      break;
+  }
+  JSON_FAIL_MESSAGE("Value is not convertible to double.");
+}
+
+float Value::asFloat() const
+{
+  switch (type_)
+  {
+    case intValue:
+      return static_cast<float>(value_.int_);
+    case uintValue:
+#if !defined(JSON_USE_INT64_DOUBLE_CONVERSION)
+      return static_cast<float>(value_.uint_);
+#else  // if !defined(JSON_USE_INT64_DOUBLE_CONVERSION)
+      // This can fail (silently?) if the value is bigger than MAX_FLOAT.
+      return static_cast<float>(integerToDouble(value_.uint_));
+#endif // if !defined(JSON_USE_INT64_DOUBLE_CONVERSION)
+    case realValue:
+      return static_cast<float>(value_.real_);
+    case nullValue:
+      return 0.0;
+    case booleanValue:
+      return value_.bool_ ? 1.0f : 0.0f;
+    default:
+      break;
+  }
+  JSON_FAIL_MESSAGE("Value is not convertible to float.");
+}
+
+bool Value::asBool() const
+{
+  switch (type_)
+  {
+    case booleanValue:
+      return value_.bool_;
+    case nullValue:
+      return false;
+    case intValue:
+      return value_.int_ ? true : false;
+    case uintValue:
+      return value_.uint_ ? true : false;
+    case realValue:
+      // This is kind of strange. Not recommended.
+      return (value_.real_ != 0.0) ? true : false;
+    default:
+      break;
+  }
+  JSON_FAIL_MESSAGE("Value is not convertible to bool.");
+}
+
+bool Value::isConvertibleTo(ValueType other) const
+{
+  switch (other)
+  {
+    case nullValue:
+      return (isNumeric() && asDouble() == 0.0) ||
+             (type_ == booleanValue && value_.bool_ == false) ||
+             (type_ == stringValue && asString() == "") ||
+             (type_ == arrayValue && value_.map_->size() == 0) ||
+             (type_ == objectValue && value_.map_->size() == 0) || type_ == nullValue;
+    case intValue:
+      return isInt() || (type_ == realValue && InRange(value_.real_, minInt, maxInt)) ||
+             type_ == booleanValue || type_ == nullValue;
+    case uintValue:
+      return isUInt() || (type_ == realValue && InRange(value_.real_, 0, maxUInt)) ||
+             type_ == booleanValue || type_ == nullValue;
+    case realValue:
+      return isNumeric() || type_ == booleanValue || type_ == nullValue;
+    case booleanValue:
+      return isNumeric() || type_ == booleanValue || type_ == nullValue;
+    case stringValue:
+      return isNumeric() || type_ == booleanValue || type_ == stringValue || type_ == nullValue;
+    case arrayValue:
+      return type_ == arrayValue || type_ == nullValue;
+    case objectValue:
+      return type_ == objectValue || type_ == nullValue;
+  }
+  JSON_ASSERT_UNREACHABLE;
+  return false;
+}
+
+/// Number of values in array or object
+ArrayIndex Value::size() const
+{
+  switch (type_)
+  {
+    case nullValue:
+    case intValue:
+    case uintValue:
+    case realValue:
+    case booleanValue:
+    case stringValue:
+      return 0;
+    case arrayValue: // size of the array is highest index + 1
+      if (!value_.map_->empty())
+      {
+        ObjectValues::const_iterator itLast = value_.map_->end();
+        --itLast;
+        return (*itLast).first.index() + 1;
+      }
+      return 0;
+    case objectValue:
+      return ArrayIndex(value_.map_->size());
+  }
+  JSON_ASSERT_UNREACHABLE;
+  return 0; // unreachable;
+}
+
+bool Value::empty() const
+{
+  if (isNull() || isArray() || isObject())
+    return size() == 0u;
+  else
+    return false;
+}
+
+bool Value::operator!() const { return isNull(); }
+
+void Value::clear()
+{
+  JSON_ASSERT_MESSAGE(type_ == nullValue || type_ == arrayValue || type_ == objectValue,
+                      "in Json::Value::clear(): requires complex value");
+  start_ = 0;
+  limit_ = 0;
+  switch (type_)
+  {
+    case arrayValue:
+    case objectValue:
+      value_.map_->clear();
+      break;
+    default:
+      break;
+  }
+}
+
+void Value::resize(ArrayIndex newSize)
+{
+  JSON_ASSERT_MESSAGE(type_ == nullValue || type_ == arrayValue,
+                      "in Json::Value::resize(): requires arrayValue");
+  if (type_ == nullValue)
+    *this = Value(arrayValue);
+  ArrayIndex oldSize = size();
+  if (newSize == 0)
+    clear();
+  else if (newSize > oldSize)
+    (*this)[newSize - 1];
+  else
+  {
+    for (ArrayIndex index = newSize; index < oldSize; ++index)
+    {
+      value_.map_->erase(index);
+    }
+    JSON_ASSERT(size() == newSize);
+  }
+}
+
+Value &Value::operator[](ArrayIndex index)
+{
+  JSON_ASSERT_MESSAGE(type_ == nullValue || type_ == arrayValue,
+                      "in Json::Value::operator[](ArrayIndex): requires arrayValue");
+  if (type_ == nullValue)
+    *this = Value(arrayValue);
+  CZString key(index);
+  ObjectValues::iterator it = value_.map_->lower_bound(key);
+  if (it != value_.map_->end() && (*it).first == key)
+    return (*it).second;
+
+  ObjectValues::value_type defaultValue(key, nullSingleton());
+  it = value_.map_->insert(it, defaultValue);
+  return (*it).second;
+}
+
+Value &Value::operator[](int index)
+{
+  JSON_ASSERT_MESSAGE(index >= 0,
+                      "in Json::Value::operator[](int index): index cannot be negative");
+  return (*this)[ArrayIndex(index)];
+}
+
+const Value &Value::operator[](ArrayIndex index) const
+{
+  JSON_ASSERT_MESSAGE(type_ == nullValue || type_ == arrayValue,
+                      "in Json::Value::operator[](ArrayIndex)const: requires arrayValue");
+  if (type_ == nullValue)
+    return nullSingleton();
+  CZString key(index);
+  ObjectValues::const_iterator it = value_.map_->find(key);
+  if (it == value_.map_->end())
+    return nullSingleton();
+  return (*it).second;
+}
+
+const Value &Value::operator[](int index) const
+{
+  JSON_ASSERT_MESSAGE(index >= 0,
+                      "in Json::Value::operator[](int index) const: index cannot be negative");
+  return (*this)[ArrayIndex(index)];
+}
+
+void Value::initBasic(ValueType vtype, bool allocated)
+{
+  type_ = vtype;
+  allocated_ = allocated;
+  comments_ = 0;
+  start_ = 0;
+  limit_ = 0;
+}
+
+// Access an object value by name, create a null member if it does not exist.
+// @pre Type of '*this' is object or null.
+// @param key is null-terminated.
+Value &Value::resolveReference(const char *key)
+{
+  JSON_ASSERT_MESSAGE(type_ == nullValue || type_ == objectValue,
+                      "in Json::Value::resolveReference(): requires objectValue");
+  if (type_ == nullValue)
+    *this = Value(objectValue);
+  CZString actualKey(key, static_cast<unsigned>(strlen(key)), CZString::noDuplication); // NOTE!
+  ObjectValues::iterator it = value_.map_->lower_bound(actualKey);
+  if (it != value_.map_->end() && (*it).first == actualKey)
+    return (*it).second;
+
+  ObjectValues::value_type defaultValue(actualKey, nullSingleton());
+  it = value_.map_->insert(it, defaultValue);
+  Value &value = (*it).second;
+  return value;
+}
+
+// @param key is not null-terminated.
+Value &Value::resolveReference(char const *key, char const *cend)
+{
+  JSON_ASSERT_MESSAGE(type_ == nullValue || type_ == objectValue,
+                      "in Json::Value::resolveReference(key, end): requires objectValue");
+  if (type_ == nullValue)
+    *this = Value(objectValue);
+  CZString actualKey(key, static_cast<unsigned>(cend - key), CZString::duplicateOnCopy);
+  ObjectValues::iterator it = value_.map_->lower_bound(actualKey);
+  if (it != value_.map_->end() && (*it).first == actualKey)
+    return (*it).second;
+
+  ObjectValues::value_type defaultValue(actualKey, nullSingleton());
+  it = value_.map_->insert(it, defaultValue);
+  Value &value = (*it).second;
+  return value;
+}
+
+Value Value::get(ArrayIndex index, const Value &defaultValue) const
+{
+  const Value *value = &((*this)[index]);
+  return value == &nullSingleton() ? defaultValue : *value;
+}
+
+bool Value::isValidIndex(ArrayIndex index) const { return index < size(); }
+
+Value const *Value::find(char const *key, char const *cend) const
+{
+  JSON_ASSERT_MESSAGE(type_ == nullValue || type_ == objectValue,
+                      "in Json::Value::find(key, end, found): requires objectValue or nullValue");
+  if (type_ == nullValue)
+    return NULL;
+  CZString actualKey(key, static_cast<unsigned>(cend - key), CZString::noDuplication);
+  ObjectValues::const_iterator it = value_.map_->find(actualKey);
+  if (it == value_.map_->end())
+    return NULL;
+  return &(*it).second;
+}
+const Value &Value::operator[](const char *key) const
+{
+  Value const *found = find(key, key + strlen(key));
+  if (!found)
+    return nullSingleton();
+  return *found;
+}
+Value const &Value::operator[](JSONCPP_STRING const &key) const
+{
+  Value const *found = find(key.data(), key.data() + key.length());
+  if (!found)
+    return nullSingleton();
+  return *found;
+}
+
+Value &Value::operator[](const char *key) { return resolveReference(key, key + strlen(key)); }
+
+Value &Value::operator[](const JSONCPP_STRING &key)
+{
+  return resolveReference(key.data(), key.data() + key.length());
+}
+
+Value &Value::operator[](const StaticString &key) { return resolveReference(key.c_str()); }
+
+#ifdef JSON_USE_CPPTL
+Value &Value::operator[](const CppTL::ConstString &key)
+{
+  return resolveReference(key.c_str(), key.end_c_str());
+}
+Value const &Value::operator[](CppTL::ConstString const &key) const
+{
+  Value const *found = find(key.c_str(), key.end_c_str());
+  if (!found)
+    return nullSingleton();
+  return *found;
+}
+#endif
+
+Value &Value::append(const Value &value) { return (*this)[size()] = value; }
+
+Value Value::get(char const *key, char const *cend, Value const &defaultValue) const
+{
+  Value const *found = find(key, cend);
+  return !found ? defaultValue : *found;
+}
+Value Value::get(char const *key, Value const &defaultValue) const
+{
+  return get(key, key + strlen(key), defaultValue);
+}
+Value Value::get(JSONCPP_STRING const &key, Value const &defaultValue) const
+{
+  return get(key.data(), key.data() + key.length(), defaultValue);
+}
+
+bool Value::removeMember(const char *key, const char *cend, Value *removed)
+{
+  if (type_ != objectValue)
+  {
+    return false;
+  }
+  CZString actualKey(key, static_cast<unsigned>(cend - key), CZString::noDuplication);
+  ObjectValues::iterator it = value_.map_->find(actualKey);
+  if (it == value_.map_->end())
+    return false;
+  *removed = it->second;
+  value_.map_->erase(it);
+  return true;
+}
+bool Value::removeMember(const char *key, Value *removed)
+{
+  return removeMember(key, key + strlen(key), removed);
+}
+bool Value::removeMember(JSONCPP_STRING const &key, Value *removed)
+{
+  return removeMember(key.data(), key.data() + key.length(), removed);
+}
+Value Value::removeMember(const char *key)
+{
+  JSON_ASSERT_MESSAGE(type_ == nullValue || type_ == objectValue,
+                      "in Json::Value::removeMember(): requires objectValue");
+  if (type_ == nullValue)
+    return nullSingleton();
+
+  Value removed; // null
+  removeMember(key, key + strlen(key), &removed);
+  return removed; // still null if removeMember() did nothing
+}
+Value Value::removeMember(const JSONCPP_STRING &key) { return removeMember(key.c_str()); }
+
+bool Value::removeIndex(ArrayIndex index, Value *removed)
+{
+  if (type_ != arrayValue)
+  {
+    return false;
+  }
+  CZString key(index);
+  ObjectValues::iterator it = value_.map_->find(key);
+  if (it == value_.map_->end())
+  {
+    return false;
+  }
+  *removed = it->second;
+  ArrayIndex oldSize = size();
+  // shift left all items left, into the place of the "removed"
+  for (ArrayIndex i = index; i < (oldSize - 1); ++i)
+  {
+    CZString keey(i);
+    (*value_.map_)[keey] = (*this)[i + 1];
+  }
+  // erase the last one ("leftover")
+  CZString keyLast(oldSize - 1);
+  ObjectValues::iterator itLast = value_.map_->find(keyLast);
+  value_.map_->erase(itLast);
+  return true;
+}
+
+#ifdef JSON_USE_CPPTL
+Value Value::get(const CppTL::ConstString &key, const Value &defaultValue) const
+{
+  return get(key.c_str(), key.end_c_str(), defaultValue);
+}
+#endif
+
+bool Value::isMember(char const *key, char const *cend) const
+{
+  Value const *value = find(key, cend);
+  return NULL != value;
+}
+bool Value::isMember(char const *key) const { return isMember(key, key + strlen(key)); }
+bool Value::isMember(JSONCPP_STRING const &key) const
+{
+  return isMember(key.data(), key.data() + key.length());
+}
+
+#ifdef JSON_USE_CPPTL
+bool Value::isMember(const CppTL::ConstString &key) const
+{
+  return isMember(key.c_str(), key.end_c_str());
+}
+#endif
+
+Value::Members Value::getMemberNames() const
+{
+  JSON_ASSERT_MESSAGE(type_ == nullValue || type_ == objectValue,
+                      "in Json::Value::getMemberNames(), value must be objectValue");
+  if (type_ == nullValue)
+    return Value::Members();
+  Members members;
+  members.reserve(value_.map_->size());
+  ObjectValues::const_iterator it = value_.map_->begin();
+  ObjectValues::const_iterator itEnd = value_.map_->end();
+  for (; it != itEnd; ++it)
+  {
+    members.push_back(JSONCPP_STRING((*it).first.data(), (*it).first.length()));
+  }
+  return members;
+}
+//
+//# ifdef JSON_USE_CPPTL
+// EnumMemberNames
+// Value::enumMemberNames() const
+//{
+//   if ( type_ == objectValue )
+//   {
+//      return CppTL::Enum::any(  CppTL::Enum::transform(
+//         CppTL::Enum::keys( *(value_.map_), CppTL::Type<const CZString &>() ),
+//         MemberNamesTransform() ) );
+//   }
+//   return EnumMemberNames();
+//}
+//
+//
+// EnumValues
+// Value::enumValues() const
+//{
+//   if ( type_ == objectValue  ||  type_ == arrayValue )
+//      return CppTL::Enum::anyValues( *(value_.map_),
+//                                     CppTL::Type<const Value &>() );
+//   return EnumValues();
+//}
+//
+//# endif
+
+static bool IsIntegral(double d)
+{
+  double integral_part;
+  return modf(d, &integral_part) == 0.0;
+}
+
+bool Value::isNull() const { return type_ == nullValue; }
+
+bool Value::isBool() const { return type_ == booleanValue; }
+
+bool Value::isInt() const
+{
+  switch (type_)
+  {
+    case intValue:
+      return value_.int_ >= minInt && value_.int_ <= maxInt;
+    case uintValue:
+      return value_.uint_ <= UInt(maxInt);
+    case realValue:
+      return value_.real_ >= minInt && value_.real_ <= maxInt && IsIntegral(value_.real_);
+    default:
+      break;
+  }
+  return false;
+}
+
+bool Value::isUInt() const
+{
+  switch (type_)
+  {
+    case intValue:
+      return value_.int_ >= 0 && LargestUInt(value_.int_) <= LargestUInt(maxUInt);
+    case uintValue:
+      return value_.uint_ <= maxUInt;
+    case realValue:
+      return value_.real_ >= 0 && value_.real_ <= maxUInt && IsIntegral(value_.real_);
+    default:
+      break;
+  }
+  return false;
+}
+
+bool Value::isInt64() const
+{
+#if defined(JSON_HAS_INT64)
+  switch (type_)
+  {
+    case intValue:
+      return true;
+    case uintValue:
+      return value_.uint_ <= UInt64(maxInt64);
+    case realValue:
+      // Note that maxInt64 (= 2^63 - 1) is not exactly representable as a
+      // double, so double(maxInt64) will be rounded up to 2^63. Therefore we
+      // require the value to be strictly less than the limit.
+      return value_.real_ >= double(minInt64) && value_.real_ < double(maxInt64) &&
+             IsIntegral(value_.real_);
+    default:
+      break;
+  }
+#endif // JSON_HAS_INT64
+  return false;
+}
+
+bool Value::isUInt64() const
+{
+#if defined(JSON_HAS_INT64)
+  switch (type_)
+  {
+    case intValue:
+      return value_.int_ >= 0;
+    case uintValue:
+      return true;
+    case realValue:
+      // Note that maxUInt64 (= 2^64 - 1) is not exactly representable as a
+      // double, so double(maxUInt64) will be rounded up to 2^64. Therefore we
+      // require the value to be strictly less than the limit.
+      return value_.real_ >= 0 && value_.real_ < maxUInt64AsDouble && IsIntegral(value_.real_);
+    default:
+      break;
+  }
+#endif // JSON_HAS_INT64
+  return false;
+}
+
+bool Value::isIntegral() const
+{
+#if defined(JSON_HAS_INT64)
+  return isInt64() || isUInt64();
+#else
+  return isInt() || isUInt();
+#endif
+}
+
+bool Value::isDouble() const { return type_ == realValue || isIntegral(); }
+
+bool Value::isNumeric() const { return isIntegral() || isDouble(); }
+
+bool Value::isString() const { return type_ == stringValue; }
+
+bool Value::isArray() const { return type_ == arrayValue; }
+
+bool Value::isObject() const { return type_ == objectValue; }
+
+void Value::setComment(const char *comment, size_t len, CommentPlacement placement)
+{
+  if (!comments_)
+    comments_ = new CommentInfo[numberOfCommentPlacement];
+  if ((len > 0) && (comment[len - 1] == '\n'))
+  {
+    // Always discard trailing newline, to aid indentation.
+    len -= 1;
+  }
+  comments_[placement].setComment(comment, len);
+}
+
+void Value::setComment(const char *comment, CommentPlacement placement)
+{
+  setComment(comment, strlen(comment), placement);
+}
+
+void Value::setComment(const JSONCPP_STRING &comment, CommentPlacement placement)
+{
+  setComment(comment.c_str(), comment.length(), placement);
+}
+
+bool Value::hasComment(CommentPlacement placement) const
+{
+  return comments_ != 0 && comments_[placement].comment_ != 0;
+}
+
+JSONCPP_STRING Value::getComment(CommentPlacement placement) const
+{
+  if (hasComment(placement))
+    return comments_[placement].comment_;
+  return "";
+}
+
+void Value::setOffsetStart(ptrdiff_t start) { start_ = start; }
+
+void Value::setOffsetLimit(ptrdiff_t limit) { limit_ = limit; }
+
+ptrdiff_t Value::getOffsetStart() const { return start_; }
+
+ptrdiff_t Value::getOffsetLimit() const { return limit_; }
+
+JSONCPP_STRING Value::toStyledString() const
+{
+  StyledWriter writer;
+  return writer.write(*this);
+}
+
+Value::const_iterator Value::begin() const
+{
+  switch (type_)
+  {
+    case arrayValue:
+    case objectValue:
+      if (value_.map_)
+        return const_iterator(value_.map_->begin());
+      break;
+    default:
+      break;
+  }
+  return const_iterator();
+}
+
+Value::const_iterator Value::end() const
+{
+  switch (type_)
+  {
+    case arrayValue:
+    case objectValue:
+      if (value_.map_)
+        return const_iterator(value_.map_->end());
+      break;
+    default:
+      break;
+  }
+  return const_iterator();
+}
+
+Value::iterator Value::begin()
+{
+  switch (type_)
+  {
+    case arrayValue:
+    case objectValue:
+      if (value_.map_)
+        return iterator(value_.map_->begin());
+      break;
+    default:
+      break;
+  }
+  return iterator();
+}
+
+Value::iterator Value::end()
+{
+  switch (type_)
+  {
+    case arrayValue:
+    case objectValue:
+      if (value_.map_)
+        return iterator(value_.map_->end());
+      break;
+    default:
+      break;
+  }
+  return iterator();
+}
+
+// class PathArgument
+// //////////////////////////////////////////////////////////////////
+
+PathArgument::PathArgument() : key_(), index_(), kind_(kindNone) {}
+
+PathArgument::PathArgument(ArrayIndex index) : key_(), index_(index), kind_(kindIndex) {}
+
+PathArgument::PathArgument(const char *key) : key_(key), index_(), kind_(kindKey) {}
+
+PathArgument::PathArgument(const JSONCPP_STRING &key) : key_(key.c_str()), index_(), kind_(kindKey)
+{
+}
+
+// class Path
+// //////////////////////////////////////////////////////////////////
+
+Path::Path(const JSONCPP_STRING &path, const PathArgument &a1, const PathArgument &a2,
+           const PathArgument &a3, const PathArgument &a4, const PathArgument &a5)
+{
+  InArgs in;
+  in.push_back(&a1);
+  in.push_back(&a2);
+  in.push_back(&a3);
+  in.push_back(&a4);
+  in.push_back(&a5);
+  makePath(path, in);
+}
+
+void Path::makePath(const JSONCPP_STRING &path, const InArgs &in)
+{
+  const char *current = path.c_str();
+  const char *end = current + path.length();
+  InArgs::const_iterator itInArg = in.begin();
+  while (current != end)
+  {
+    if (*current == '[')
+    {
+      ++current;
+      if (*current == '%')
+        addPathInArg(path, in, itInArg, PathArgument::kindIndex);
+      else
+      {
+        ArrayIndex index = 0;
+        for (; current != end && *current >= '0' && *current <= '9'; ++current)
+          index = index * 10 + ArrayIndex(*current - '0');
+        args_.push_back(index);
+      }
+      if (current == end || *++current != ']')
+        invalidPath(path, int(current - path.c_str()));
+    }
+    else if (*current == '%')
+    {
+      addPathInArg(path, in, itInArg, PathArgument::kindKey);
+      ++current;
+    }
+    else if (*current == '.' || *current == ']')
+    {
+      ++current;
+    }
+    else
+    {
+      const char *beginName = current;
+      while (current != end && !strchr("[.", *current))
+        ++current;
+      args_.push_back(JSONCPP_STRING(beginName, current));
+    }
+  }
+}
+
+void Path::addPathInArg(const JSONCPP_STRING & /*path*/, const InArgs &in,
+                        InArgs::const_iterator &itInArg, PathArgument::Kind kind)
+{
+  if (itInArg == in.end())
+  {
+    // Error: missing argument %d
+  }
+  else if ((*itInArg)->kind_ != kind)
+  {
+    // Error: bad argument type
+  }
+  else
+  {
+    args_.push_back(**itInArg++);
+  }
+}
+
+void Path::invalidPath(const JSONCPP_STRING & /*path*/, int /*location*/)
+{
+  // Error: invalid path.
+}
+
+const Value &Path::resolve(const Value &root) const
+{
+  const Value *node = &root;
+  for (Args::const_iterator it = args_.begin(); it != args_.end(); ++it)
+  {
+    const PathArgument &arg = *it;
+    if (arg.kind_ == PathArgument::kindIndex)
+    {
+      if (!node->isArray() || !node->isValidIndex(arg.index_))
+      {
+        // Error: unable to resolve path (array value expected at position...
+        return Value::null;
+      }
+      node = &((*node)[arg.index_]);
+    }
+    else if (arg.kind_ == PathArgument::kindKey)
+    {
+      if (!node->isObject())
+      {
+        // Error: unable to resolve path (object value expected at position...)
+        return Value::null;
+      }
+      node = &((*node)[arg.key_]);
+      if (node == &Value::nullSingleton())
+      {
+        // Error: unable to resolve path (object has no member named '' at
+        // position...)
+        return Value::null;
+      }
+    }
+  }
+  return *node;
+}
+
+Value Path::resolve(const Value &root, const Value &defaultValue) const
+{
+  const Value *node = &root;
+  for (Args::const_iterator it = args_.begin(); it != args_.end(); ++it)
+  {
+    const PathArgument &arg = *it;
+    if (arg.kind_ == PathArgument::kindIndex)
+    {
+      if (!node->isArray() || !node->isValidIndex(arg.index_))
+        return defaultValue;
+      node = &((*node)[arg.index_]);
+    }
+    else if (arg.kind_ == PathArgument::kindKey)
+    {
+      if (!node->isObject())
+        return defaultValue;
+      node = &((*node)[arg.key_]);
+      if (node == &Value::nullSingleton())
+        return defaultValue;
+    }
+  }
+  return *node;
+}
+
+Value &Path::make(Value &root) const
+{
+  Value *node = &root;
+  for (Args::const_iterator it = args_.begin(); it != args_.end(); ++it)
+  {
+    const PathArgument &arg = *it;
+    if (arg.kind_ == PathArgument::kindIndex)
+    {
+      if (!node->isArray())
+      {
+        // Error: node is not an array at position ...
+      }
+      node = &((*node)[arg.index_]);
+    }
+    else if (arg.kind_ == PathArgument::kindKey)
+    {
+      if (!node->isObject())
+      {
+        // Error: node is not an object at position...
+      }
+      node = &((*node)[arg.key_]);
+    }
+  }
+  return *node;
+}
+
+} // namespace Json
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: src/lib_json/json_value.cpp
+// //////////////////////////////////////////////////////////////////////
+
+// //////////////////////////////////////////////////////////////////////
+// Beginning of content of file: src/lib_json/json_writer.cpp
+// //////////////////////////////////////////////////////////////////////
+
+// Copyright 2011 Baptiste Lepilleur
+// Distributed under MIT license, or public domain if desired and
+// recognized in your jurisdiction.
+// See file LICENSE for detail or copy at http://jsoncpp.sourceforge.net/LICENSE
+
+#if !defined(JSON_IS_AMALGAMATION)
+#include <json/writer.h>
+#include "json_tool.h"
+#endif // if !defined(JSON_IS_AMALGAMATION)
+#include <iomanip>
+#include <memory>
+#include <sstream>
+#include <utility>
+#include <set>
+#include <cassert>
+#include <cstring>
+#include <cstdio>
+
+#if defined(_MSC_VER) && _MSC_VER >= 1200 && _MSC_VER < 1800 // Between VC++ 6.0 and VC++ 11.0
+#include <float.h>
+#define isfinite _finite
+#elif defined(__sun) && defined(__SVR4) // Solaris
+#if !defined(isfinite)
+#include <ieeefp.h>
+#define isfinite finite
+#endif
+#elif defined(_AIX)
+#if !defined(isfinite)
+#include <math.h>
+#define isfinite finite
+#endif
+#elif defined(__hpux)
+#if !defined(isfinite)
+#if defined(__ia64) && !defined(finite)
+#define isfinite(x) ((sizeof(x) == sizeof(float) ? _Isfinitef(x) : _IsFinite(x)))
+#else
+#include <math.h>
+#define isfinite finite
+#endif
+#endif
+#else
+#include <cmath>
+#if !(defined(__QNXNTO__)) // QNX already defines isfinite
+#define isfinite std::isfinite
+#endif
+#endif
+
+#if defined(_MSC_VER)
+#if !defined(WINCE) && defined(__STDC_SECURE_LIB__) && _MSC_VER >= 1500 // VC++ 9.0 and above
+#define snprintf sprintf_s
+#elif _MSC_VER >= 1900 // VC++ 14.0 and above
+#define snprintf std::snprintf
+#else
+#define snprintf _snprintf
+#endif
+#elif defined(__ANDROID__) || defined(__QNXNTO__)
+#define snprintf snprintf
+#elif __cplusplus >= 201103L
+#if !defined(__MINGW32__) && !defined(__CYGWIN__)
+#define snprintf std::snprintf
+#endif
+#endif
+
+#if defined(__BORLANDC__)
+#include <float.h>
+#define isfinite _finite
+#define snprintf _snprintf
+#endif
+
+#if defined(_MSC_VER) && _MSC_VER >= 1400 // VC++ 8.0
+// Disable warning about strdup being deprecated.
+#pragma warning(disable : 4996)
+#endif
+
+namespace Json
+{
+
+#if __cplusplus >= 201103L || (defined(_CPPLIB_VER) && _CPPLIB_VER >= 520)
+typedef std::unique_ptr<StreamWriter> StreamWriterPtr;
+#else
+typedef std::auto_ptr<StreamWriter> StreamWriterPtr;
+#endif
+
+static bool containsControlCharacter(const char *str)
+{
+  while (*str)
+  {
+    if (isControlCharacter(*(str++)))
+      return true;
+  }
+  return false;
+}
+
+static bool containsControlCharacter0(const char *str, unsigned len)
+{
+  char const *end = str + len;
+  while (end != str)
+  {
+    if (isControlCharacter(*str) || 0 == *str)
+      return true;
+    ++str;
+  }
+  return false;
+}
+
+JSONCPP_STRING valueToString(LargestInt value)
+{
+  UIntToStringBuffer buffer;
+  char *current = buffer + sizeof(buffer);
+  if (value == Value::minLargestInt)
+  {
+    uintToString(LargestUInt(Value::maxLargestInt) + 1, current);
+    *--current = '-';
+  }
+  else if (value < 0)
+  {
+    uintToString(LargestUInt(-value), current);
+    *--current = '-';
+  }
+  else
+  {
+    uintToString(LargestUInt(value), current);
+  }
+  assert(current >= buffer);
+  return current;
+}
+
+JSONCPP_STRING valueToString(LargestUInt value)
+{
+  UIntToStringBuffer buffer;
+  char *current = buffer + sizeof(buffer);
+  uintToString(value, current);
+  assert(current >= buffer);
+  return current;
+}
+
+#if defined(JSON_HAS_INT64)
+
+JSONCPP_STRING valueToString(Int value) { return valueToString(LargestInt(value)); }
+
+JSONCPP_STRING valueToString(UInt value) { return valueToString(LargestUInt(value)); }
+
+#endif // # if defined(JSON_HAS_INT64)
+
+namespace
+{
+JSONCPP_STRING valueToString(double value, bool useSpecialFloats, unsigned int precision)
+{
+  // Allocate a buffer that is more than large enough to store the 16 digits of
+  // precision requested below.
+  char buffer[32];
+  int len = -1;
+
+  char formatString[6];
+  sprintf(formatString, "%%.%dg", precision);
+
+  // Print into the buffer. We need not request the alternative representation
+  // that always has a decimal point because JSON doesn't distingish the
+  // concepts of reals and integers.
+  if (isfinite(value))
+  {
+    len = snprintf(buffer, sizeof(buffer), formatString, value);
+  }
+  else
+  {
+    // IEEE standard states that NaN values will not compare to themselves
+    if (value != value)
+    {
+      len = snprintf(buffer, sizeof(buffer), useSpecialFloats ? "NaN" : "null");
+    }
+    else if (value < 0)
+    {
+      len = snprintf(buffer, sizeof(buffer), useSpecialFloats ? "-Infinity" : "-1e+9999");
+    }
+    else
+    {
+      len = snprintf(buffer, sizeof(buffer), useSpecialFloats ? "Infinity" : "1e+9999");
+    }
+    // For those, we do not need to call fixNumLoc, but it is fast.
+  }
+  assert(len >= 0);
+  fixNumericLocale(buffer, buffer + len);
+  return buffer;
+}
+}
+
+JSONCPP_STRING valueToString(double value) { return valueToString(value, false, 17); }
+
+JSONCPP_STRING valueToString(bool value) { return value ? "true" : "false"; }
+
+JSONCPP_STRING valueToQuotedString(const char *value)
+{
+  if (value == NULL)
+    return "";
+  // Not sure how to handle unicode...
+  if (strpbrk(value, "\"\\\b\f\n\r\t") == NULL && !containsControlCharacter(value))
+    return JSONCPP_STRING("\"") + value + "\"";
+  // We have to walk value and escape any special characters.
+  // Appending to JSONCPP_STRING is not efficient, but this should be rare.
+  // (Note: forward slashes are *not* rare, but I am not escaping them.)
+  JSONCPP_STRING::size_type maxsize = strlen(value) * 2 + 3; // allescaped+quotes+NULL
+  JSONCPP_STRING result;
+  result.reserve(maxsize); // to avoid lots of mallocs
+  result += "\"";
+  for (const char *c = value; *c != 0; ++c)
+  {
+    switch (*c)
+    {
+      case '\"':
+        result += "\\\"";
+        break;
+      case '\\':
+        result += "\\\\";
+        break;
+      case '\b':
+        result += "\\b";
+        break;
+      case '\f':
+        result += "\\f";
+        break;
+      case '\n':
+        result += "\\n";
+        break;
+      case '\r':
+        result += "\\r";
+        break;
+      case '\t':
+        result += "\\t";
+        break;
+      // case '/':
+      // Even though \/ is considered a legal escape in JSON, a bare
+      // slash is also legal, so I see no reason to escape it.
+      // (I hope I am not misunderstanding something.
+      // blep notes: actually escaping \/ may be useful in javascript to avoid </
+      // sequence.
+      // Should add a flag to allow this compatibility mode and prevent this
+      // sequence from occurring.
+      default:
+        if (isControlCharacter(*c))
+        {
+          JSONCPP_OSTRINGSTREAM oss;
+          oss << "\\u" << std::hex << std::uppercase << std::setfill('0') << std::setw(4)
+              << static_cast<int>(*c);
+          result += oss.str();
+        }
+        else
+        {
+          result += *c;
+        }
+        break;
+    }
+  }
+  result += "\"";
+  return result;
+}
+
+// https://github.com/upcaste/upcaste/blob/master/src/upcore/src/cstring/strnpbrk.cpp
+static char const *strnpbrk(char const *s, char const *accept, size_t n)
+{
+  assert((s || !n) && accept);
+
+  char const *const end = s + n;
+  for (char const *cur = s; cur < end; ++cur)
+  {
+    int const c = *cur;
+    for (char const *a = accept; *a; ++a)
+    {
+      if (*a == c)
+      {
+        return cur;
+      }
+    }
+  }
+  return NULL;
+}
+static JSONCPP_STRING valueToQuotedStringN(const char *value, unsigned length)
+{
+  if (value == NULL)
+    return "";
+  // Not sure how to handle unicode...
+  if (strnpbrk(value, "\"\\\b\f\n\r\t", length) == NULL &&
+      !containsControlCharacter0(value, length))
+    return JSONCPP_STRING("\"") + value + "\"";
+  // We have to walk value and escape any special characters.
+  // Appending to JSONCPP_STRING is not efficient, but this should be rare.
+  // (Note: forward slashes are *not* rare, but I am not escaping them.)
+  JSONCPP_STRING::size_type maxsize = length * 2 + 3; // allescaped+quotes+NULL
+  JSONCPP_STRING result;
+  result.reserve(maxsize); // to avoid lots of mallocs
+  result += "\"";
+  char const *end = value + length;
+  for (const char *c = value; c != end; ++c)
+  {
+    switch (*c)
+    {
+      case '\"':
+        result += "\\\"";
+        break;
+      case '\\':
+        result += "\\\\";
+        break;
+      case '\b':
+        result += "\\b";
+        break;
+      case '\f':
+        result += "\\f";
+        break;
+      case '\n':
+        result += "\\n";
+        break;
+      case '\r':
+        result += "\\r";
+        break;
+      case '\t':
+        result += "\\t";
+        break;
+      // case '/':
+      // Even though \/ is considered a legal escape in JSON, a bare
+      // slash is also legal, so I see no reason to escape it.
+      // (I hope I am not misunderstanding something.)
+      // blep notes: actually escaping \/ may be useful in javascript to avoid </
+      // sequence.
+      // Should add a flag to allow this compatibility mode and prevent this
+      // sequence from occurring.
+      default:
+        if ((isControlCharacter(*c)) || (*c == 0))
+        {
+          JSONCPP_OSTRINGSTREAM oss;
+          oss << "\\u" << std::hex << std::uppercase << std::setfill('0') << std::setw(4)
+              << static_cast<int>(*c);
+          result += oss.str();
+        }
+        else
+        {
+          result += *c;
+        }
+        break;
+    }
+  }
+  result += "\"";
+  return result;
+}
+
+// Class Writer
+// //////////////////////////////////////////////////////////////////
+Writer::~Writer() {}
+
+// Class FastWriter
+// //////////////////////////////////////////////////////////////////
+
+FastWriter::FastWriter()
+    : yamlCompatiblityEnabled_(false), dropNullPlaceholders_(false), omitEndingLineFeed_(false)
+{
+}
+
+void FastWriter::enableYAMLCompatibility() { yamlCompatiblityEnabled_ = true; }
+
+void FastWriter::dropNullPlaceholders() { dropNullPlaceholders_ = true; }
+
+void FastWriter::omitEndingLineFeed() { omitEndingLineFeed_ = true; }
+
+JSONCPP_STRING FastWriter::write(const Value &root)
+{
+  document_ = "";
+  writeValue(root);
+  if (!omitEndingLineFeed_)
+    document_ += "\n";
+  return document_;
+}
+
+void FastWriter::writeValue(const Value &value)
+{
+  switch (value.type())
+  {
+    case nullValue:
+      if (!dropNullPlaceholders_)
+        document_ += "null";
+      break;
+    case intValue:
+      document_ += valueToString(value.asLargestInt());
+      break;
+    case uintValue:
+      document_ += valueToString(value.asLargestUInt());
+      break;
+    case realValue:
+      document_ += valueToString(value.asDouble());
+      break;
+    case stringValue:
+    {
+      // Is NULL possible for value.string_? No.
+      char const *str;
+      char const *end;
+      bool ok = value.getString(&str, &end);
+      if (ok)
+        document_ += valueToQuotedStringN(str, static_cast<unsigned>(end - str));
+      break;
+    }
+    case booleanValue:
+      document_ += valueToString(value.asBool());
+      break;
+    case arrayValue:
+    {
+      document_ += '[';
+      ArrayIndex size = value.size();
+      for (ArrayIndex index = 0; index < size; ++index)
+      {
+        if (index > 0)
+          document_ += ',';
+        writeValue(value[index]);
+      }
+      document_ += ']';
+    }
+    break;
+    case objectValue:
+    {
+      Value::Members members(value.getMemberNames());
+      document_ += '{';
+      for (Value::Members::iterator it = members.begin(); it != members.end(); ++it)
+      {
+        const JSONCPP_STRING &name = *it;
+        if (it != members.begin())
+          document_ += ',';
+        document_ += valueToQuotedStringN(name.data(), static_cast<unsigned>(name.length()));
+        document_ += yamlCompatiblityEnabled_ ? ": " : ":";
+        writeValue(value[name]);
+      }
+      document_ += '}';
+    }
+    break;
+  }
+}
+
+// Class StyledWriter
+// //////////////////////////////////////////////////////////////////
+
+StyledWriter::StyledWriter() : rightMargin_(74), indentSize_(3), addChildValues_() {}
+
+JSONCPP_STRING StyledWriter::write(const Value &root)
+{
+  document_ = "";
+  addChildValues_ = false;
+  indentString_ = "";
+  writeCommentBeforeValue(root);
+  writeValue(root);
+  writeCommentAfterValueOnSameLine(root);
+  document_ += "\n";
+  return document_;
+}
+
+void StyledWriter::writeValue(const Value &value)
+{
+  switch (value.type())
+  {
+    case nullValue:
+      pushValue("null");
+      break;
+    case intValue:
+      pushValue(valueToString(value.asLargestInt()));
+      break;
+    case uintValue:
+      pushValue(valueToString(value.asLargestUInt()));
+      break;
+    case realValue:
+      pushValue(valueToString(value.asDouble()));
+      break;
+    case stringValue:
+    {
+      // Is NULL possible for value.string_? No.
+      char const *str;
+      char const *end;
+      bool ok = value.getString(&str, &end);
+      if (ok)
+        pushValue(valueToQuotedStringN(str, static_cast<unsigned>(end - str)));
+      else
+        pushValue("");
+      break;
+    }
+    case booleanValue:
+      pushValue(valueToString(value.asBool()));
+      break;
+    case arrayValue:
+      writeArrayValue(value);
+      break;
+    case objectValue:
+    {
+      Value::Members members(value.getMemberNames());
+      if (members.empty())
+        pushValue("{}");
+      else
+      {
+        writeWithIndent("{");
+        indent();
+        Value::Members::iterator it = members.begin();
+        for (;;)
+        {
+          const JSONCPP_STRING &name = *it;
+          const Value &childValue = value[name];
+          writeCommentBeforeValue(childValue);
+          writeWithIndent(valueToQuotedString(name.c_str()));
+          document_ += " : ";
+          writeValue(childValue);
+          if (++it == members.end())
+          {
+            writeCommentAfterValueOnSameLine(childValue);
+            break;
+          }
+          document_ += ',';
+          writeCommentAfterValueOnSameLine(childValue);
+        }
+        unindent();
+        writeWithIndent("}");
+      }
+    }
+    break;
+  }
+}
+
+void StyledWriter::writeArrayValue(const Value &value)
+{
+  unsigned size = value.size();
+  if (size == 0)
+    pushValue("[]");
+  else
+  {
+    bool isArrayMultiLine = isMultineArray(value);
+    if (isArrayMultiLine)
+    {
+      writeWithIndent("[");
+      indent();
+      bool hasChildValue = !childValues_.empty();
+      unsigned index = 0;
+      for (;;)
+      {
+        const Value &childValue = value[index];
+        writeCommentBeforeValue(childValue);
+        if (hasChildValue)
+          writeWithIndent(childValues_[index]);
+        else
+        {
+          writeIndent();
+          writeValue(childValue);
+        }
+        if (++index == size)
+        {
+          writeCommentAfterValueOnSameLine(childValue);
+          break;
+        }
+        document_ += ',';
+        writeCommentAfterValueOnSameLine(childValue);
+      }
+      unindent();
+      writeWithIndent("]");
+    }
+    else // output on a single line
+    {
+      assert(childValues_.size() == size);
+      document_ += "[ ";
+      for (unsigned index = 0; index < size; ++index)
+      {
+        if (index > 0)
+          document_ += ", ";
+        document_ += childValues_[index];
+      }
+      document_ += " ]";
+    }
+  }
+}
+
+bool StyledWriter::isMultineArray(const Value &value)
+{
+  ArrayIndex const size = value.size();
+  bool isMultiLine = size * 3 >= rightMargin_;
+  childValues_.clear();
+  for (ArrayIndex index = 0; index < size && !isMultiLine; ++index)
+  {
+    const Value &childValue = value[index];
+    isMultiLine = ((childValue.isArray() || childValue.isObject()) && childValue.size() > 0);
+  }
+  if (!isMultiLine) // check if line length > max line length
+  {
+    childValues_.reserve(size);
+    addChildValues_ = true;
+    ArrayIndex lineLength = 4 + (size - 1) * 2; // '[ ' + ', '*n + ' ]'
+    for (ArrayIndex index = 0; index < size; ++index)
+    {
+      if (hasCommentForValue(value[index]))
+      {
+        isMultiLine = true;
+      }
+      writeValue(value[index]);
+      lineLength += static_cast<ArrayIndex>(childValues_[index].length());
+    }
+    addChildValues_ = false;
+    isMultiLine = isMultiLine || lineLength >= rightMargin_;
+  }
+  return isMultiLine;
+}
+
+void StyledWriter::pushValue(const JSONCPP_STRING &value)
+{
+  if (addChildValues_)
+    childValues_.push_back(value);
+  else
+    document_ += value;
+}
+
+void StyledWriter::writeIndent()
+{
+  if (!document_.empty())
+  {
+    char last = document_[document_.length() - 1];
+    if (last == ' ') // already indented
+      return;
+    if (last != '\n') // Comments may add new-line
+      document_ += '\n';
+  }
+  document_ += indentString_;
+}
+
+void StyledWriter::writeWithIndent(const JSONCPP_STRING &value)
+{
+  writeIndent();
+  document_ += value;
+}
+
+void StyledWriter::indent() { indentString_ += JSONCPP_STRING(indentSize_, ' '); }
+
+void StyledWriter::unindent()
+{
+  assert(indentString_.size() >= indentSize_);
+  indentString_.resize(indentString_.size() - indentSize_);
+}
+
+void StyledWriter::writeCommentBeforeValue(const Value &root)
+{
+  if (!root.hasComment(commentBefore))
+    return;
+
+  document_ += "\n";
+  writeIndent();
+  const JSONCPP_STRING &comment = root.getComment(commentBefore);
+  JSONCPP_STRING::const_iterator iter = comment.begin();
+  while (iter != comment.end())
+  {
+    document_ += *iter;
+    if (*iter == '\n' && (iter != comment.end() && *(iter + 1) == '/'))
+      writeIndent();
+    ++iter;
+  }
+
+  // Comments are stripped of trailing newlines, so add one here
+  document_ += "\n";
+}
+
+void StyledWriter::writeCommentAfterValueOnSameLine(const Value &root)
+{
+  if (root.hasComment(commentAfterOnSameLine))
+    document_ += " " + root.getComment(commentAfterOnSameLine);
+
+  if (root.hasComment(commentAfter))
+  {
+    document_ += "\n";
+    document_ += root.getComment(commentAfter);
+    document_ += "\n";
+  }
+}
+
+bool StyledWriter::hasCommentForValue(const Value &value)
+{
+  return value.hasComment(commentBefore) || value.hasComment(commentAfterOnSameLine) ||
+         value.hasComment(commentAfter);
+}
+
+// Class StyledStreamWriter
+// //////////////////////////////////////////////////////////////////
+
+StyledStreamWriter::StyledStreamWriter(JSONCPP_STRING indentation)
+    : document_(NULL), rightMargin_(74), indentation_(indentation), addChildValues_()
+{
+}
+
+void StyledStreamWriter::write(JSONCPP_OSTREAM &out, const Value &root)
+{
+  document_ = &out;
+  addChildValues_ = false;
+  indentString_ = "";
+  indented_ = true;
+  writeCommentBeforeValue(root);
+  if (!indented_)
+    writeIndent();
+  indented_ = true;
+  writeValue(root);
+  writeCommentAfterValueOnSameLine(root);
+  *document_ << "\n";
+  document_ = NULL; // Forget the stream, for safety.
+}
+
+void StyledStreamWriter::writeValue(const Value &value)
+{
+  switch (value.type())
+  {
+    case nullValue:
+      pushValue("null");
+      break;
+    case intValue:
+      pushValue(valueToString(value.asLargestInt()));
+      break;
+    case uintValue:
+      pushValue(valueToString(value.asLargestUInt()));
+      break;
+    case realValue:
+      pushValue(valueToString(value.asDouble()));
+      break;
+    case stringValue:
+    {
+      // Is NULL possible for value.string_? No.
+      char const *str;
+      char const *end;
+      bool ok = value.getString(&str, &end);
+      if (ok)
+        pushValue(valueToQuotedStringN(str, static_cast<unsigned>(end - str)));
+      else
+        pushValue("");
+      break;
+    }
+    case booleanValue:
+      pushValue(valueToString(value.asBool()));
+      break;
+    case arrayValue:
+      writeArrayValue(value);
+      break;
+    case objectValue:
+    {
+      Value::Members members(value.getMemberNames());
+      if (members.empty())
+        pushValue("{}");
+      else
+      {
+        writeWithIndent("{");
+        indent();
+        Value::Members::iterator it = members.begin();
+        for (;;)
+        {
+          const JSONCPP_STRING &name = *it;
+          const Value &childValue = value[name];
+          writeCommentBeforeValue(childValue);
+          writeWithIndent(valueToQuotedString(name.c_str()));
+          *document_ << " : ";
+          writeValue(childValue);
+          if (++it == members.end())
+          {
+            writeCommentAfterValueOnSameLine(childValue);
+            break;
+          }
+          *document_ << ",";
+          writeCommentAfterValueOnSameLine(childValue);
+        }
+        unindent();
+        writeWithIndent("}");
+      }
+    }
+    break;
+  }
+}
+
+void StyledStreamWriter::writeArrayValue(const Value &value)
+{
+  unsigned size = value.size();
+  if (size == 0)
+    pushValue("[]");
+  else
+  {
+    bool isArrayMultiLine = isMultineArray(value);
+    if (isArrayMultiLine)
+    {
+      writeWithIndent("[");
+      indent();
+      bool hasChildValue = !childValues_.empty();
+      unsigned index = 0;
+      for (;;)
+      {
+        const Value &childValue = value[index];
+        writeCommentBeforeValue(childValue);
+        if (hasChildValue)
+          writeWithIndent(childValues_[index]);
+        else
+        {
+          if (!indented_)
+            writeIndent();
+          indented_ = true;
+          writeValue(childValue);
+          indented_ = false;
+        }
+        if (++index == size)
+        {
+          writeCommentAfterValueOnSameLine(childValue);
+          break;
+        }
+        *document_ << ",";
+        writeCommentAfterValueOnSameLine(childValue);
+      }
+      unindent();
+      writeWithIndent("]");
+    }
+    else // output on a single line
+    {
+      assert(childValues_.size() == size);
+      *document_ << "[ ";
+      for (unsigned index = 0; index < size; ++index)
+      {
+        if (index > 0)
+          *document_ << ", ";
+        *document_ << childValues_[index];
+      }
+      *document_ << " ]";
+    }
+  }
+}
+
+bool StyledStreamWriter::isMultineArray(const Value &value)
+{
+  ArrayIndex const size = value.size();
+  bool isMultiLine = size * 3 >= rightMargin_;
+  childValues_.clear();
+  for (ArrayIndex index = 0; index < size && !isMultiLine; ++index)
+  {
+    const Value &childValue = value[index];
+    isMultiLine = ((childValue.isArray() || childValue.isObject()) && childValue.size() > 0);
+  }
+  if (!isMultiLine) // check if line length > max line length
+  {
+    childValues_.reserve(size);
+    addChildValues_ = true;
+    ArrayIndex lineLength = 4 + (size - 1) * 2; // '[ ' + ', '*n + ' ]'
+    for (ArrayIndex index = 0; index < size; ++index)
+    {
+      if (hasCommentForValue(value[index]))
+      {
+        isMultiLine = true;
+      }
+      writeValue(value[index]);
+      lineLength += static_cast<ArrayIndex>(childValues_[index].length());
+    }
+    addChildValues_ = false;
+    isMultiLine = isMultiLine || lineLength >= rightMargin_;
+  }
+  return isMultiLine;
+}
+
+void StyledStreamWriter::pushValue(const JSONCPP_STRING &value)
+{
+  if (addChildValues_)
+    childValues_.push_back(value);
+  else
+    *document_ << value;
+}
+
+void StyledStreamWriter::writeIndent()
+{
+  // blep intended this to look at the so-far-written string
+  // to determine whether we are already indented, but
+  // with a stream we cannot do that. So we rely on some saved state.
+  // The caller checks indented_.
+  *document_ << '\n' << indentString_;
+}
+
+void StyledStreamWriter::writeWithIndent(const JSONCPP_STRING &value)
+{
+  if (!indented_)
+    writeIndent();
+  *document_ << value;
+  indented_ = false;
+}
+
+void StyledStreamWriter::indent() { indentString_ += indentation_; }
+
+void StyledStreamWriter::unindent()
+{
+  assert(indentString_.size() >= indentation_.size());
+  indentString_.resize(indentString_.size() - indentation_.size());
+}
+
+void StyledStreamWriter::writeCommentBeforeValue(const Value &root)
+{
+  if (!root.hasComment(commentBefore))
+    return;
+
+  if (!indented_)
+    writeIndent();
+  const JSONCPP_STRING &comment = root.getComment(commentBefore);
+  JSONCPP_STRING::const_iterator iter = comment.begin();
+  while (iter != comment.end())
+  {
+    *document_ << *iter;
+    if (*iter == '\n' && (iter != comment.end() && *(iter + 1) == '/'))
+      // writeIndent();  // would include newline
+      *document_ << indentString_;
+    ++iter;
+  }
+  indented_ = false;
+}
+
+void StyledStreamWriter::writeCommentAfterValueOnSameLine(const Value &root)
+{
+  if (root.hasComment(commentAfterOnSameLine))
+    *document_ << ' ' << root.getComment(commentAfterOnSameLine);
+
+  if (root.hasComment(commentAfter))
+  {
+    writeIndent();
+    *document_ << root.getComment(commentAfter);
+  }
+  indented_ = false;
+}
+
+bool StyledStreamWriter::hasCommentForValue(const Value &value)
+{
+  return value.hasComment(commentBefore) || value.hasComment(commentAfterOnSameLine) ||
+         value.hasComment(commentAfter);
+}
+
+//////////////////////////
+// BuiltStyledStreamWriter
+
+/// Scoped enums are not available until C++11.
+struct CommentStyle
+{
+  /// Decide whether to write comments.
+  enum Enum
+  {
+    None, ///< Drop all comments.
+    Most, ///< Recover odd behavior of previous versions (not implemented yet).
+    All   ///< Keep all comments.
+  };
+};
+
+struct BuiltStyledStreamWriter : public StreamWriter
+{
+  BuiltStyledStreamWriter(JSONCPP_STRING const &indentation, CommentStyle::Enum cs,
+                          JSONCPP_STRING const &colonSymbol, JSONCPP_STRING const &nullSymbol,
+                          JSONCPP_STRING const &endingLineFeedSymbol, bool useSpecialFloats,
+                          unsigned int precision);
+  int write(Value const &root, JSONCPP_OSTREAM *sout) JSONCPP_OVERRIDE;
+
+private:
+  void writeValue(Value const &value);
+  void writeArrayValue(Value const &value);
+  bool isMultineArray(Value const &value);
+  void pushValue(JSONCPP_STRING const &value);
+  void writeIndent();
+  void writeWithIndent(JSONCPP_STRING const &value);
+  void indent();
+  void unindent();
+  void writeCommentBeforeValue(Value const &root);
+  void writeCommentAfterValueOnSameLine(Value const &root);
+  static bool hasCommentForValue(const Value &value);
+
+  typedef std::vector<JSONCPP_STRING> ChildValues;
+
+  ChildValues childValues_;
+  JSONCPP_STRING indentString_;
+  unsigned int rightMargin_;
+  JSONCPP_STRING indentation_;
+  CommentStyle::Enum cs_;
+  JSONCPP_STRING colonSymbol_;
+  JSONCPP_STRING nullSymbol_;
+  JSONCPP_STRING endingLineFeedSymbol_;
+  bool addChildValues_ : 1;
+  bool indented_ : 1;
+  bool useSpecialFloats_ : 1;
+  unsigned int precision_;
+};
+BuiltStyledStreamWriter::BuiltStyledStreamWriter(JSONCPP_STRING const &indentation,
+                                                 CommentStyle::Enum cs,
+                                                 JSONCPP_STRING const &colonSymbol,
+                                                 JSONCPP_STRING const &nullSymbol,
+                                                 JSONCPP_STRING const &endingLineFeedSymbol,
+                                                 bool useSpecialFloats, unsigned int precision)
+    : rightMargin_(74), indentation_(indentation), cs_(cs), colonSymbol_(colonSymbol),
+      nullSymbol_(nullSymbol), endingLineFeedSymbol_(endingLineFeedSymbol), addChildValues_(false),
+      indented_(false), useSpecialFloats_(useSpecialFloats), precision_(precision)
+{
+}
+int BuiltStyledStreamWriter::write(Value const &root, JSONCPP_OSTREAM *sout)
+{
+  sout_ = sout;
+  addChildValues_ = false;
+  indented_ = true;
+  indentString_ = "";
+  writeCommentBeforeValue(root);
+  if (!indented_)
+    writeIndent();
+  indented_ = true;
+  writeValue(root);
+  writeCommentAfterValueOnSameLine(root);
+  *sout_ << endingLineFeedSymbol_;
+  sout_ = NULL;
+  return 0;
+}
+void BuiltStyledStreamWriter::writeValue(Value const &value)
+{
+  switch (value.type())
+  {
+    case nullValue:
+      pushValue(nullSymbol_);
+      break;
+    case intValue:
+      pushValue(valueToString(value.asLargestInt()));
+      break;
+    case uintValue:
+      pushValue(valueToString(value.asLargestUInt()));
+      break;
+    case realValue:
+      pushValue(valueToString(value.asDouble(), useSpecialFloats_, precision_));
+      break;
+    case stringValue:
+    {
+      // Is NULL is possible for value.string_? No.
+      char const *str;
+      char const *end;
+      bool ok = value.getString(&str, &end);
+      if (ok)
+        pushValue(valueToQuotedStringN(str, static_cast<unsigned>(end - str)));
+      else
+        pushValue("");
+      break;
+    }
+    case booleanValue:
+      pushValue(valueToString(value.asBool()));
+      break;
+    case arrayValue:
+      writeArrayValue(value);
+      break;
+    case objectValue:
+    {
+      Value::Members members(value.getMemberNames());
+      if (members.empty())
+        pushValue("{}");
+      else
+      {
+        writeWithIndent("{");
+        indent();
+        Value::Members::iterator it = members.begin();
+        for (;;)
+        {
+          JSONCPP_STRING const &name = *it;
+          Value const &childValue = value[name];
+          writeCommentBeforeValue(childValue);
+          writeWithIndent(valueToQuotedStringN(name.data(), static_cast<unsigned>(name.length())));
+          *sout_ << colonSymbol_;
+          writeValue(childValue);
+          if (++it == members.end())
+          {
+            writeCommentAfterValueOnSameLine(childValue);
+            break;
+          }
+          *sout_ << ",";
+          writeCommentAfterValueOnSameLine(childValue);
+        }
+        unindent();
+        writeWithIndent("}");
+      }
+    }
+    break;
+  }
+}
+
+void BuiltStyledStreamWriter::writeArrayValue(Value const &value)
+{
+  unsigned size = value.size();
+  if (size == 0)
+    pushValue("[]");
+  else
+  {
+    bool isMultiLine = (cs_ == CommentStyle::All) || isMultineArray(value);
+    if (isMultiLine)
+    {
+      writeWithIndent("[");
+      indent();
+      bool hasChildValue = !childValues_.empty();
+      unsigned index = 0;
+      for (;;)
+      {
+        Value const &childValue = value[index];
+        writeCommentBeforeValue(childValue);
+        if (hasChildValue)
+          writeWithIndent(childValues_[index]);
+        else
+        {
+          if (!indented_)
+            writeIndent();
+          indented_ = true;
+          writeValue(childValue);
+          indented_ = false;
+        }
+        if (++index == size)
+        {
+          writeCommentAfterValueOnSameLine(childValue);
+          break;
+        }
+        *sout_ << ",";
+        writeCommentAfterValueOnSameLine(childValue);
+      }
+      unindent();
+      writeWithIndent("]");
+    }
+    else // output on a single line
+    {
+      assert(childValues_.size() == size);
+      *sout_ << "[";
+      if (!indentation_.empty())
+        *sout_ << " ";
+      for (unsigned index = 0; index < size; ++index)
+      {
+        if (index > 0)
+          *sout_ << ((!indentation_.empty()) ? ", " : ",");
+        *sout_ << childValues_[index];
+      }
+      if (!indentation_.empty())
+        *sout_ << " ";
+      *sout_ << "]";
+    }
+  }
+}
+
+bool BuiltStyledStreamWriter::isMultineArray(Value const &value)
+{
+  ArrayIndex const size = value.size();
+  bool isMultiLine = size * 3 >= rightMargin_;
+  childValues_.clear();
+  for (ArrayIndex index = 0; index < size && !isMultiLine; ++index)
+  {
+    Value const &childValue = value[index];
+    isMultiLine = ((childValue.isArray() || childValue.isObject()) && childValue.size() > 0);
+  }
+  if (!isMultiLine) // check if line length > max line length
+  {
+    childValues_.reserve(size);
+    addChildValues_ = true;
+    ArrayIndex lineLength = 4 + (size - 1) * 2; // '[ ' + ', '*n + ' ]'
+    for (ArrayIndex index = 0; index < size; ++index)
+    {
+      if (hasCommentForValue(value[index]))
+      {
+        isMultiLine = true;
+      }
+      writeValue(value[index]);
+      lineLength += static_cast<ArrayIndex>(childValues_[index].length());
+    }
+    addChildValues_ = false;
+    isMultiLine = isMultiLine || lineLength >= rightMargin_;
+  }
+  return isMultiLine;
+}
+
+void BuiltStyledStreamWriter::pushValue(JSONCPP_STRING const &value)
+{
+  if (addChildValues_)
+    childValues_.push_back(value);
+  else
+    *sout_ << value;
+}
+
+void BuiltStyledStreamWriter::writeIndent()
+{
+  // blep intended this to look at the so-far-written string
+  // to determine whether we are already indented, but
+  // with a stream we cannot do that. So we rely on some saved state.
+  // The caller checks indented_.
+
+  if (!indentation_.empty())
+  {
+    // In this case, drop newlines too.
+    *sout_ << '\n' << indentString_;
+  }
+}
+
+void BuiltStyledStreamWriter::writeWithIndent(JSONCPP_STRING const &value)
+{
+  if (!indented_)
+    writeIndent();
+  *sout_ << value;
+  indented_ = false;
+}
+
+void BuiltStyledStreamWriter::indent() { indentString_ += indentation_; }
+
+void BuiltStyledStreamWriter::unindent()
+{
+  assert(indentString_.size() >= indentation_.size());
+  indentString_.resize(indentString_.size() - indentation_.size());
+}
+
+void BuiltStyledStreamWriter::writeCommentBeforeValue(Value const &root)
+{
+  if (cs_ == CommentStyle::None)
+    return;
+  if (!root.hasComment(commentBefore))
+    return;
+
+  if (!indented_)
+    writeIndent();
+  const JSONCPP_STRING &comment = root.getComment(commentBefore);
+  JSONCPP_STRING::const_iterator iter = comment.begin();
+  while (iter != comment.end())
+  {
+    *sout_ << *iter;
+    if (*iter == '\n' && (iter != comment.end() && *(iter + 1) == '/'))
+      // writeIndent();  // would write extra newline
+      *sout_ << indentString_;
+    ++iter;
+  }
+  indented_ = false;
+}
+
+void BuiltStyledStreamWriter::writeCommentAfterValueOnSameLine(Value const &root)
+{
+  if (cs_ == CommentStyle::None)
+    return;
+  if (root.hasComment(commentAfterOnSameLine))
+    *sout_ << " " + root.getComment(commentAfterOnSameLine);
+
+  if (root.hasComment(commentAfter))
+  {
+    writeIndent();
+    *sout_ << root.getComment(commentAfter);
+  }
+}
+
+// static
+bool BuiltStyledStreamWriter::hasCommentForValue(const Value &value)
+{
+  return value.hasComment(commentBefore) || value.hasComment(commentAfterOnSameLine) ||
+         value.hasComment(commentAfter);
+}
+
+///////////////
+// StreamWriter
+
+StreamWriter::StreamWriter() : sout_(NULL) {}
+StreamWriter::~StreamWriter() {}
+StreamWriter::Factory::~Factory() {}
+StreamWriterBuilder::StreamWriterBuilder() { setDefaults(&settings_); }
+StreamWriterBuilder::~StreamWriterBuilder() {}
+StreamWriter *StreamWriterBuilder::newStreamWriter() const
+{
+  JSONCPP_STRING indentation = settings_["indentation"].asString();
+  JSONCPP_STRING cs_str = settings_["commentStyle"].asString();
+  bool eyc = settings_["enableYAMLCompatibility"].asBool();
+  bool dnp = settings_["dropNullPlaceholders"].asBool();
+  bool usf = settings_["useSpecialFloats"].asBool();
+  unsigned int pre = settings_["precision"].asUInt();
+  CommentStyle::Enum cs = CommentStyle::All;
+  if (cs_str == "All")
+  {
+    cs = CommentStyle::All;
+  }
+  else if (cs_str == "None")
+  {
+    cs = CommentStyle::None;
+  }
+  else
+  {
+    throwRuntimeError("commentStyle must be 'All' or 'None'");
+  }
+  JSONCPP_STRING colonSymbol = " : ";
+  if (eyc)
+  {
+    colonSymbol = ": ";
+  }
+  else if (indentation.empty())
+  {
+    colonSymbol = ":";
+  }
+  JSONCPP_STRING nullSymbol = "null";
+  if (dnp)
+  {
+    nullSymbol = "";
+  }
+  if (pre > 17)
+    pre = 17;
+  JSONCPP_STRING endingLineFeedSymbol = "";
+  return new BuiltStyledStreamWriter(indentation, cs, colonSymbol, nullSymbol, endingLineFeedSymbol,
+                                     usf, pre);
+}
+static void getValidWriterKeys(std::set<JSONCPP_STRING> *valid_keys)
+{
+  valid_keys->clear();
+  valid_keys->insert("indentation");
+  valid_keys->insert("commentStyle");
+  valid_keys->insert("enableYAMLCompatibility");
+  valid_keys->insert("dropNullPlaceholders");
+  valid_keys->insert("useSpecialFloats");
+  valid_keys->insert("precision");
+}
+bool StreamWriterBuilder::validate(Json::Value *invalid) const
+{
+  Json::Value my_invalid;
+  if (!invalid)
+    invalid = &my_invalid; // so we do not need to test for NULL
+  Json::Value &inv = *invalid;
+  std::set<JSONCPP_STRING> valid_keys;
+  getValidWriterKeys(&valid_keys);
+  Value::Members keys = settings_.getMemberNames();
+  size_t n = keys.size();
+  for (size_t i = 0; i < n; ++i)
+  {
+    JSONCPP_STRING const &key = keys[i];
+    if (valid_keys.find(key) == valid_keys.end())
+    {
+      inv[key] = settings_[key];
+    }
+  }
+  return 0u == inv.size();
+}
+Value &StreamWriterBuilder::operator[](JSONCPP_STRING key) { return settings_[key]; }
+// static
+void StreamWriterBuilder::setDefaults(Json::Value *settings)
+{
+  //! [StreamWriterBuilderDefaults]
+  (*settings)["commentStyle"] = "All";
+  (*settings)["indentation"] = "\t";
+  (*settings)["enableYAMLCompatibility"] = false;
+  (*settings)["dropNullPlaceholders"] = false;
+  (*settings)["useSpecialFloats"] = false;
+  (*settings)["precision"] = 17;
+  //! [StreamWriterBuilderDefaults]
+}
+
+JSONCPP_STRING writeString(StreamWriter::Factory const &builder, Value const &root)
+{
+  JSONCPP_OSTRINGSTREAM sout;
+  StreamWriterPtr const writer(builder.newStreamWriter());
+  writer->write(root, &sout);
+  return sout.str();
+}
+
+JSONCPP_OSTREAM &operator<<(JSONCPP_OSTREAM &sout, Value const &root)
+{
+  StreamWriterBuilder builder;
+  StreamWriterPtr const writer(builder.newStreamWriter());
+  writer->write(root, &sout);
+  return sout;
+}
+
+} // namespace Json
+
+// //////////////////////////////////////////////////////////////////////
+// End of content of file: src/lib_json/json_writer.cpp
+// //////////////////////////////////////////////////////////////////////
diff --git a/runtimes/libs/misc/CMakeLists.txt b/runtimes/libs/misc/CMakeLists.txt
new file mode 100644
index 000000000..537c544dc
--- /dev/null
+++ b/runtimes/libs/misc/CMakeLists.txt
@@ -0,0 +1,14 @@
+# Library `nnfw_lib_misc`
+set(NNFW_UTILITY_SRCS src/tensor/Shape.cpp)
+list(APPEND NNFW_UTILITY_SRCS src/tensor/NonIncreasingStride.cpp)
+list(APPEND NNFW_UTILITY_SRCS src/tensor/IndexFormatter.cpp)
+list(APPEND NNFW_UTILITY_SRCS src/tensor/Comparator.cpp)
+
+add_library(nnfw_lib_misc STATIC ${NNFW_UTILITY_SRCS})
+target_include_directories(nnfw_lib_misc PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/include)
+set_target_properties(nnfw_lib_misc PROPERTIES POSITION_INDEPENDENT_CODE ON)
+target_link_libraries(nnfw_lib_misc PRIVATE nnfw_common)
+target_link_libraries(nnfw_lib_misc PRIVATE nnfw_coverage)
+
+add_executable(nnfw_tensor_index_iterator "examples/tensor_index_iterator.cpp")
+target_link_libraries(nnfw_tensor_index_iterator nnfw_lib_misc)
diff --git a/runtimes/libs/misc/examples/tensor_index_iterator.cpp b/runtimes/libs/misc/examples/tensor_index_iterator.cpp
new file mode 100644
index 000000000..d94da9f49
--- /dev/null
+++ b/runtimes/libs/misc/examples/tensor_index_iterator.cpp
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "misc/tensor/IndexIterator.h"
+
+#include <array>
+
+#include <iostream>
+#include <algorithm>
+
+#include <cassert>
+
+void test_iterate(void)
+{
+  const nnfw::misc::tensor::Shape shape{3, 4, 7};
+
+  std::array<int, 3 * 4 * 7> array;
+
+  array.fill(0);
+
+  using nnfw::misc::tensor::iterate;
+  using nnfw::misc::tensor::Index;
+
+  iterate(shape) << [&](const Index &index) {
+    assert(index.rank() == shape.rank());
+
+    const uint32_t rank = index.rank();
+
+    uint32_t offset = index.at(0);
+
+    for (uint32_t axis = 1; axis < rank; ++axis)
+    {
+      offset *= shape.dim(axis);
+      offset += index.at(axis);
+    }
+
+    array[offset] += 1;
+  };
+
+  assert(std::all_of(array.begin(), array.end(), [](int num) { return num == 1; }));
+}
+
+int main(int argc, char **argv)
+{
+  test_iterate();
+
+  nnfw::misc::tensor::Shape shape{3, 4, 3, 4};
+
+  std::cout << "Iterate over tensor{3, 4, 3, 4}" << std::endl;
+
+  nnfw::misc::tensor::iterate(shape) << [](const nnfw::misc::tensor::Index &index) {
+    std::cout << "rank: " << index.rank() << std::endl;
+
+    for (uint32_t d = 0; d < index.rank(); ++d)
+    {
+      std::cout << "  offset(" << d << ") = " << index.at(d) << std::endl;
+    }
+  };
+
+  return 0;
+}
diff --git a/runtimes/libs/misc/include/misc/EnvVar.h b/runtimes/libs/misc/include/misc/EnvVar.h
new file mode 100644
index 000000000..db28a3c7d
--- /dev/null
+++ b/runtimes/libs/misc/include/misc/EnvVar.h
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file EnvVar.h
+ * @ingroup COM_AI_RUNTIME
+ * @brief This file contains nnfw::misc::EnvVar class
+ */
+
+#ifndef __NNFW_MISC_ENV_VAR__
+#define __NNFW_MISC_ENV_VAR__
+
+#include <algorithm>
+#include <array>
+#include <cstdlib>
+#include <string>
+
+namespace nnfw
+{
+namespace misc
+{
+/**
+ * @brief Class to access environment variable
+ */
+class EnvVar
+{
+public:
+  /**
+   * @brief Construct a new EnvVar object
+   * @param[in] key   environment variable
+   */
+  EnvVar(const std::string &key)
+  {
+    const char *value = std::getenv(key.c_str());
+    if (value == nullptr)
+    {
+      // An empty string is considered as an empty value
+      _value = "";
+    }
+    else
+    {
+      _value = value;
+    }
+  }
+
+  /**
+   * @brief Get environment variable of string type
+   * @param[in] def   Default value of environment variable
+   * @return Defaut value passed as a parameter when there is no environment variable,
+   *         otherwise the value of environment variable passed into constructor
+   */
+  std::string asString(const std::string &def) const
+  {
+    if (_value.empty())
+      return def;
+    return _value;
+  }
+
+  /**
+   * @brief Get environment variable of boolean type
+   * @param[in] def   Default value of environment variable
+   * @return Defaut value passed as a parameter when there is no environment variable,
+   *         otherwise the value of environment variable passed into constructor
+   */
+  bool asBool(bool def) const
+  {
+    if (_value.empty())
+      return def;
+    static const std::array<std::string, 5> false_list{"0", "OFF", "FALSE", "N", "NO"};
+    auto false_found = std::find(false_list.begin(), false_list.end(), _value);
+    return (false_found == false_list.end());
+  }
+
+  /**
+   * @brief Get environment variable of int type
+   * @param[in] def   Default value of environment variable
+   * @return Defaut value passed as a parameter when there is no environment variable,
+   *         otherwise the value of environment variable passed into constructor
+   */
+  int asInt(int def) const
+  {
+    if (_value.empty())
+      return def;
+    return std::stoi(_value);
+  }
+
+  /**
+   * @brief Get environment variable of float type
+   * @param[in] def   Default value of environment variable
+   * @return Defaut value passed as a parameter when there is no environment variable,
+   *         otherwise the value of environment variable passed into constructor
+   */
+  float asFloat(float def) const
+  {
+    if (_value.empty())
+      return def;
+    return std::stof(_value);
+  }
+
+private:
+  std::string _value;
+};
+
+} // namespace misc
+} // namespace nnfw
+
+#endif // __NNFW_MISC_ENV_VAR__
diff --git a/libs/misc/include/misc/benchmark.h b/runtimes/libs/misc/include/misc/benchmark.h
index fe5b97585..fe5b97585 100644
--- a/libs/misc/include/misc/benchmark.h
+++ b/runtimes/libs/misc/include/misc/benchmark.h
diff --git a/libs/misc/include/misc/feature/Index.h b/runtimes/libs/misc/include/misc/feature/Index.h
index a361d8dd2..a361d8dd2 100644
--- a/libs/misc/include/misc/feature/Index.h
+++ b/runtimes/libs/misc/include/misc/feature/Index.h
diff --git a/libs/misc/include/misc/feature/IndexIterator.h b/runtimes/libs/misc/include/misc/feature/IndexIterator.h
index 1cf675526..1cf675526 100644
--- a/libs/misc/include/misc/feature/IndexIterator.h
+++ b/runtimes/libs/misc/include/misc/feature/IndexIterator.h
diff --git a/libs/misc/include/misc/feature/Object.h b/runtimes/libs/misc/include/misc/feature/Object.h
index 7af0e28f4..7af0e28f4 100644
--- a/libs/misc/include/misc/feature/Object.h
+++ b/runtimes/libs/misc/include/misc/feature/Object.h
diff --git a/libs/misc/include/misc/feature/Reader.h b/runtimes/libs/misc/include/misc/feature/Reader.h
index b09209789..b09209789 100644
--- a/libs/misc/include/misc/feature/Reader.h
+++ b/runtimes/libs/misc/include/misc/feature/Reader.h
diff --git a/libs/misc/include/misc/feature/Shape.h b/runtimes/libs/misc/include/misc/feature/Shape.h
index 09881f58b..09881f58b 100644
--- a/libs/misc/include/misc/feature/Shape.h
+++ b/runtimes/libs/misc/include/misc/feature/Shape.h
diff --git a/libs/misc/include/misc/feature/TextFormatter.h b/runtimes/libs/misc/include/misc/feature/TextFormatter.h
index e053f1c61..e053f1c61 100644
--- a/libs/misc/include/misc/feature/TextFormatter.h
+++ b/runtimes/libs/misc/include/misc/feature/TextFormatter.h
diff --git a/libs/misc/include/misc/fp32.h b/runtimes/libs/misc/include/misc/fp32.h
index c310402ba..c310402ba 100644
--- a/libs/misc/include/misc/fp32.h
+++ b/runtimes/libs/misc/include/misc/fp32.h
diff --git a/libs/misc/include/misc/kernel/IndexIterator.h b/runtimes/libs/misc/include/misc/kernel/IndexIterator.h
index 59e0f0095..59e0f0095 100644
--- a/libs/misc/include/misc/kernel/IndexIterator.h
+++ b/runtimes/libs/misc/include/misc/kernel/IndexIterator.h
diff --git a/libs/misc/include/misc/kernel/Reader.h b/runtimes/libs/misc/include/misc/kernel/Reader.h
index 019c809ee..019c809ee 100644
--- a/libs/misc/include/misc/kernel/Reader.h
+++ b/runtimes/libs/misc/include/misc/kernel/Reader.h
diff --git a/libs/misc/include/misc/kernel/Shape.h b/runtimes/libs/misc/include/misc/kernel/Shape.h
index 27d6a8bf0..27d6a8bf0 100644
--- a/libs/misc/include/misc/kernel/Shape.h
+++ b/runtimes/libs/misc/include/misc/kernel/Shape.h
diff --git a/libs/misc/include/misc/matrix/IndexIterator.h b/runtimes/libs/misc/include/misc/matrix/IndexIterator.h
index 742ed3a65..742ed3a65 100644
--- a/libs/misc/include/misc/matrix/IndexIterator.h
+++ b/runtimes/libs/misc/include/misc/matrix/IndexIterator.h
diff --git a/libs/misc/include/misc/matrix/Reader.h b/runtimes/libs/misc/include/misc/matrix/Reader.h
index ea222c9d1..ea222c9d1 100644
--- a/libs/misc/include/misc/matrix/Reader.h
+++ b/runtimes/libs/misc/include/misc/matrix/Reader.h
diff --git a/libs/misc/include/misc/matrix/Shape.h b/runtimes/libs/misc/include/misc/matrix/Shape.h
index 8cbcc1e12..8cbcc1e12 100644
--- a/libs/misc/include/misc/matrix/Shape.h
+++ b/runtimes/libs/misc/include/misc/matrix/Shape.h
diff --git a/runtimes/libs/misc/include/misc/polymorphic_downcast.h b/runtimes/libs/misc/include/misc/polymorphic_downcast.h
new file mode 100644
index 000000000..ee885eb70
--- /dev/null
+++ b/runtimes/libs/misc/include/misc/polymorphic_downcast.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_MISC_POLYMORPHIC_DOWNCAST_H__
+#define __NNFW_MISC_POLYMORPHIC_DOWNCAST_H__
+
+#include <cassert>
+#include <memory>
+
+namespace nnfw
+{
+namespace misc
+{
+
+template <typename DstType, typename SrcType> inline DstType polymorphic_downcast(SrcType *x)
+{
+  assert(dynamic_cast<DstType>(x) == x);
+  return static_cast<DstType>(x);
+}
+
+template <typename DstType, typename SrcType> inline DstType polymorphic_downcast(SrcType &x)
+{
+  assert(std::addressof(dynamic_cast<DstType>(x)) == std::addressof(x));
+  return static_cast<DstType>(x);
+}
+
+} // namespace misc
+} // namespace nnfw
+
+#endif // __NNFW_MISC_POLYMORPHIC_DOWNCAST_H__
diff --git a/runtimes/libs/misc/include/misc/string_helpers.h b/runtimes/libs/misc/include/misc/string_helpers.h
new file mode 100644
index 000000000..57d0006b0
--- /dev/null
+++ b/runtimes/libs/misc/include/misc/string_helpers.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file string_helpers.h
+ * @ingroup COM_AI_RUNTIME
+ * @brief This file contains helper functions for std::string
+ */
+
+#include <string>
+#include <sstream>
+#include <vector>
+
+namespace nnfw
+{
+namespace misc
+{
+
+inline std::vector<std::string> split(const std::string &s, char delim)
+{
+  std::stringstream ss(s);
+  std::string item;
+  std::vector<std::string> elems;
+  while (std::getline(ss, item, delim))
+  {
+    elems.push_back(std::move(item));
+  }
+  return elems;
+}
+
+} // namespace misc
+} // namespace nnfw
diff --git a/libs/misc/include/misc/tensor/Comparator.h b/runtimes/libs/misc/include/misc/tensor/Comparator.h
index 80f53043c..80f53043c 100644
--- a/libs/misc/include/misc/tensor/Comparator.h
+++ b/runtimes/libs/misc/include/misc/tensor/Comparator.h
diff --git a/libs/misc/include/misc/tensor/Diff.h b/runtimes/libs/misc/include/misc/tensor/Diff.h
index c41a97987..c41a97987 100644
--- a/libs/misc/include/misc/tensor/Diff.h
+++ b/runtimes/libs/misc/include/misc/tensor/Diff.h
diff --git a/runtimes/libs/misc/include/misc/tensor/Index.h b/runtimes/libs/misc/include/misc/tensor/Index.h
new file mode 100644
index 000000000..a633b4ce0
--- /dev/null
+++ b/runtimes/libs/misc/include/misc/tensor/Index.h
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file Index.h
+ * @ingroup COM_AI_RUNTIME
+ * @brief This file contains nnfw::misc::tensor::Index struct
+ */
+#ifndef __NNFW_MISC_TENSOR_INDEX_H__
+#define __NNFW_MISC_TENSOR_INDEX_H__
+
+#include <cstdint>
+#include <cstddef>
+
+#include <vector>
+#include <initializer_list>
+
+namespace nnfw
+{
+namespace misc
+{
+namespace tensor
+{
+
+/**
+ * @brief Struct to represent index of each dimension of a tensor
+ */
+struct Index
+{
+public:
+  /**
+   * @brief Construct a new @c Index object
+   * @param[in] rank    Rank of a tensor
+   */
+  Index(uint32_t rank) { _offsets.resize(rank); }
+
+public:
+  /**
+   * @brief Construct a new @c Index object
+   * @param[in] offsets    Rank of a tensor of @c std::initializer_list<int32_t> type
+   */
+  Index(std::initializer_list<int32_t> offsets) : _offsets{offsets}
+  {
+    // DO NOTHING
+  }
+
+public:
+  /**
+   * @brief Get the rank
+   * @return Rank that this @c Index object can handle
+   * @note   We can use static_cast\n
+   *         because size of _offsets is decieded by constructor's uintt_32 type argument
+   */
+  uint32_t rank(void) const { return static_cast<uint32_t>(_offsets.size()); }
+
+public:
+  /**
+   * @brief Get the index n'th dimension
+   * @param[in] n   Dimension
+   * @return index of n'th dimension
+   */
+  int32_t at(uint32_t n) const { return _offsets.at(n); }
+
+  /**
+   * @brief Get the reference of the index n'th dimension
+   * @param[in] n   Dimension
+   * @return reference of index of n'th dimension
+   */
+  int32_t &at(uint32_t n) { return _offsets.at(n); }
+
+private:
+  std::vector<int32_t> _offsets;
+};
+
+/**
+ * @brief Copy an @c Index with reversed order
+ * @param[in] origin    @c Index object to copy
+ * @return  an @c Index object with reversed order
+ * @note    This is used to convert NNAPI tensor index to ARM tensor index or vice versa
+ */
+inline static Index copy_reverse(const Index &origin)
+{
+  uint32_t rank = origin.rank();
+  Index target(rank);
+  for (uint32_t i = 0; i < rank; i++)
+    target.at(i) = origin.at(rank - 1 - i);
+  return target;
+}
+
+} // namespace tensor
+} // namespace misc
+} // namespace nnfw
+
+#endif // __NNFW_MISC_TENSOR_INDEX_H__
diff --git a/runtimes/libs/misc/include/misc/tensor/IndexEnumerator.h b/runtimes/libs/misc/include/misc/tensor/IndexEnumerator.h
new file mode 100644
index 000000000..6ce3add77
--- /dev/null
+++ b/runtimes/libs/misc/include/misc/tensor/IndexEnumerator.h
@@ -0,0 +1,131 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file IndexEnumerator.h
+ * @ingroup COM_AI_RUNTIME
+ * @brief This file contains nnfw::misc::tensor::IndexEnumerator class
+ */
+
+#ifndef __NNFW_MISC_TENSOR_INDEX_ENUMERATOR_H__
+#define __NNFW_MISC_TENSOR_INDEX_ENUMERATOR_H__
+
+#include "misc/tensor/Shape.h"
+#include "misc/tensor/Index.h"
+
+namespace nnfw
+{
+namespace misc
+{
+namespace tensor
+{
+/**
+ * @brief Class to enumerate index of a tensor
+ *
+ */
+class IndexEnumerator
+{
+public:
+  /**
+   * @brief Construct a new @c IndexEnumerator object
+   * @param[in] shape   Shape of tensor of which index will be enumerate
+   */
+  explicit IndexEnumerator(const Shape &shape) : _shape(shape), _cursor(0), _index(shape.rank())
+  {
+    const uint32_t rank = _shape.rank();
+
+    for (uint32_t axis = 0; axis < rank; ++axis)
+    {
+      _index.at(axis) = 0;
+    }
+
+    for (_cursor = 0; _cursor < rank; ++_cursor)
+    {
+      if (_index.at(_cursor) < _shape.dim(_cursor))
+      {
+        break;
+      }
+    }
+  }
+
+public:
+  /**
+   * @brief Prevent constructing @c IndexEnumerator object by using R-value reference
+   */
+  IndexEnumerator(IndexEnumerator &&) = delete;
+  /**
+   * @brief Prevent copy constructor
+   */
+  IndexEnumerator(const IndexEnumerator &) = delete;
+
+public:
+  /**
+   * @brief Check if more enumeration is available
+   * @return @c true if more @c advance() is available, otherwise @c false
+   */
+  bool valid(void) const { return _cursor < _shape.rank(); }
+
+public:
+  /**
+   * @brief Get the current index to enumerate
+   * @return Current index
+   */
+  const Index &curr(void) const { return _index; }
+
+public:
+  /**
+   * @brief Advance index by +1
+   */
+  void advance(void)
+  {
+    const uint32_t rank = _shape.rank();
+
+    // Find axis to be updated
+    while ((_cursor < rank) && !(_index.at(_cursor) + 1 < _shape.dim(_cursor)))
+    {
+      ++_cursor;
+    }
+
+    if (_cursor == rank)
+    {
+      return;
+    }
+
+    // Update index
+    _index.at(_cursor) += 1;
+
+    for (uint32_t axis = 0; axis < _cursor; ++axis)
+    {
+      _index.at(axis) = 0;
+    }
+
+    // Update cursor
+    _cursor = 0;
+  }
+
+public:
+  const Shape _shape; //!< Shape to enumerate
+
+private:
+  uint32_t _cursor;
+  Index _index;
+};
+
+} // namespace tensor
+} // namespace misc
+} // namespace nnfw
+
+#endif // __NNFW_MISC_TENSOR_INDEX_ENUMERATOR_H__
diff --git a/libs/misc/include/misc/tensor/IndexFormatter.h b/runtimes/libs/misc/include/misc/tensor/IndexFormatter.h
index 7ae34eec1..7ae34eec1 100644
--- a/libs/misc/include/misc/tensor/IndexFormatter.h
+++ b/runtimes/libs/misc/include/misc/tensor/IndexFormatter.h
diff --git a/libs/misc/include/misc/tensor/IndexIterator.h b/runtimes/libs/misc/include/misc/tensor/IndexIterator.h
index f6428e19e..f6428e19e 100644
--- a/libs/misc/include/misc/tensor/IndexIterator.h
+++ b/runtimes/libs/misc/include/misc/tensor/IndexIterator.h
diff --git a/libs/misc/include/misc/tensor/NonIncreasingStride.h b/runtimes/libs/misc/include/misc/tensor/NonIncreasingStride.h
index e7ad0857b..e7ad0857b 100644
--- a/libs/misc/include/misc/tensor/NonIncreasingStride.h
+++ b/runtimes/libs/misc/include/misc/tensor/NonIncreasingStride.h
diff --git a/libs/misc/include/misc/tensor/Object.h b/runtimes/libs/misc/include/misc/tensor/Object.h
index 83fbc0bd1..83fbc0bd1 100644
--- a/libs/misc/include/misc/tensor/Object.h
+++ b/runtimes/libs/misc/include/misc/tensor/Object.h
diff --git a/libs/misc/include/misc/tensor/Reader.h b/runtimes/libs/misc/include/misc/tensor/Reader.h
index 9175a913e..9175a913e 100644
--- a/libs/misc/include/misc/tensor/Reader.h
+++ b/runtimes/libs/misc/include/misc/tensor/Reader.h
diff --git a/runtimes/libs/misc/include/misc/tensor/Shape.h b/runtimes/libs/misc/include/misc/tensor/Shape.h
new file mode 100644
index 000000000..bd0eac0a5
--- /dev/null
+++ b/runtimes/libs/misc/include/misc/tensor/Shape.h
@@ -0,0 +1,150 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file Shape.h
+ * @ingroup COM_AI_RUNTIME
+ * @brief This file contains nnfw::misc::tensor::Shape class
+ */
+
+#ifndef __NNFW_MISC_TENSOR_SHAPE_H__
+#define __NNFW_MISC_TENSOR_SHAPE_H__
+
+#include <cstdint>
+#include <cstddef>
+#include <deque>
+#include <initializer_list>
+#include <ostream>
+#include <string>
+#include <cassert>
+
+namespace nnfw
+{
+namespace misc
+{
+namespace tensor
+{
+
+/**
+ * @brief Class to represent shape of a tensor
+ */
+class Shape
+{
+public:
+  /**
+   * @brief Construct a new Shape object
+   * @param[in] rank    Rank of a tensor
+   */
+  Shape(uint32_t rank) { _dimensions.resize(rank); }
+
+public:
+  /**
+   * @brief Construct a new Shape object
+   * @param[in] dimensions    @c initializer_list<int32_t> of dimensions of tensor
+   */
+  Shape(const std::initializer_list<int32_t> &dimensions) : _dimensions{dimensions}
+  {
+    // Check overflow because initializer_list type can be larger size than max of uint32_t
+    assert(dimensions.size() <= 0xFFFFFFFF);
+  }
+
+  /**
+   * @brief Construct a new Shape object
+   * @param[in] origin    @c Shape object to copy
+   */
+  Shape(const Shape &origin) = default;
+
+public:
+  /**
+   * @brief Add dimension to the beginning
+   * @param[in] d     dimension to add to the beginning
+   * @return N/A
+   */
+  void prepend(int32_t d) { _dimensions.emplace_front(d); }
+
+  /**
+   * @brief Add dimension to the back
+   * @param[in] d     dimension to add to the back
+   * @return N/A
+   */
+  void append(int32_t d) { _dimensions.emplace_back(d); }
+
+public:
+  /**
+   * @brief Get the rank of this shape
+   * @return rank
+   * @note   We can use static_cast\n
+   *         because we don't support larger than max of uint32_t on constructor
+   */
+  uint32_t rank(void) const { return static_cast<uint32_t>(_dimensions.size()); }
+
+public:
+  /**
+   * @brief Get specific dimension
+   * @param[in] n  Index of dimension
+   * @return n'th dimension
+   */
+  int32_t dim(uint32_t n) const { return _dimensions.at(n); }
+
+  /**
+   * @brief Get the reference of specific dimension
+   * @param[in] n  Index of dimension
+   * @return Reference of n'th dimension
+   */
+  int32_t &dim(uint32_t n) { return _dimensions.at(n); }
+
+  const std::deque<int32_t> &dims() const { return _dimensions; }
+
+public:
+  /**
+   * @brief Get the number of elements specified by this shape
+   * @return The number of elements
+   */
+  uint64_t num_elements() const;
+
+private:
+  std::deque<int32_t> _dimensions;
+
+public:
+  /**
+   * @brief Get a @c Shape object after parsing string
+   * @param[in] s  String of dimension list. Accepted format is numbers separated by comma.
+   * @return @c Shape object
+   */
+  static Shape from(const std::string &s);
+};
+
+/**
+ * @brief Check equality of two @c Shape
+ * @param[in] Shape First shape to compare
+ * @param[in] Shape Second shape to compare
+ * @return @c true if both shapes are equal, otherwise @c false
+ */
+bool operator==(const Shape &, const Shape &);
+
+/**
+ * @brief Send @c Shape to @c std::ostream
+ * @param[in] os        @c std::ostream to process this @c Shape
+ * @param[in] shape     @c Shape to send to @c ostream
+ * @return Reference of @c std::ostream
+ */
+std::ostream &operator<<(std::ostream &os, const Shape &shape);
+
+} // namespace tensor
+} // namespace misc
+} // namespace nnfw
+
+#endif // __NNFW_MISC_TENSOR_SHAPE_H__
diff --git a/libs/misc/include/misc/tensor/Zipper.h b/runtimes/libs/misc/include/misc/tensor/Zipper.h
index 8f0ec4ab6..8f0ec4ab6 100644
--- a/libs/misc/include/misc/tensor/Zipper.h
+++ b/runtimes/libs/misc/include/misc/tensor/Zipper.h
diff --git a/libs/misc/include/misc/vector.h b/runtimes/libs/misc/include/misc/vector.h
index 395b08912..395b08912 100644
--- a/libs/misc/include/misc/vector.h
+++ b/runtimes/libs/misc/include/misc/vector.h
diff --git a/libs/misc/include/misc/vector/Object.h b/runtimes/libs/misc/include/misc/vector/Object.h
index 65d4bc613..65d4bc613 100644
--- a/libs/misc/include/misc/vector/Object.h
+++ b/runtimes/libs/misc/include/misc/vector/Object.h
diff --git a/libs/misc/include/misc/vector/Reader.h b/runtimes/libs/misc/include/misc/vector/Reader.h
index eab4c427b..eab4c427b 100644
--- a/libs/misc/include/misc/vector/Reader.h
+++ b/runtimes/libs/misc/include/misc/vector/Reader.h
diff --git a/runtimes/libs/misc/src/tensor/Comparator.cpp b/runtimes/libs/misc/src/tensor/Comparator.cpp
new file mode 100644
index 000000000..e765e77b2
--- /dev/null
+++ b/runtimes/libs/misc/src/tensor/Comparator.cpp
@@ -0,0 +1,38 @@
+#include "misc/tensor/Comparator.h"
+#include "misc/tensor/Zipper.h"
+
+#include "misc/fp32.h"
+
+namespace nnfw
+{
+namespace misc
+{
+namespace tensor
+{
+
+std::vector<Diff<float>> Comparator::compare(const Shape &shape, const Reader<float> &expected,
+                                             const Reader<float> &obtained,
+                                             Observer *observer) const
+{
+  std::vector<Diff<float>> res;
+
+  zip(shape, expected, obtained) <<
+      [&](const Index &index, float expected_value, float obtained_value) {
+        if (!_compare_fn(expected_value, obtained_value))
+        {
+          res.emplace_back(index, expected_value, obtained_value);
+        }
+
+        // Update max_diff_index, if necessary
+        if (observer != nullptr)
+        {
+          observer->notify(index, expected_value, obtained_value);
+        }
+      };
+
+  return res;
+}
+
+} // namespace tensor
+} // namespace misc
+} // namespace nnfw
diff --git a/libs/misc/src/tensor/IndexFormatter.cpp b/runtimes/libs/misc/src/tensor/IndexFormatter.cpp
index c949db7a8..c949db7a8 100644
--- a/libs/misc/src/tensor/IndexFormatter.cpp
+++ b/runtimes/libs/misc/src/tensor/IndexFormatter.cpp
diff --git a/libs/misc/src/tensor/NonIncreasingStride.cpp b/runtimes/libs/misc/src/tensor/NonIncreasingStride.cpp
index c51ad0324..c51ad0324 100644
--- a/libs/misc/src/tensor/NonIncreasingStride.cpp
+++ b/runtimes/libs/misc/src/tensor/NonIncreasingStride.cpp
diff --git a/runtimes/libs/misc/src/tensor/Shape.cpp b/runtimes/libs/misc/src/tensor/Shape.cpp
new file mode 100644
index 000000000..70d3bdfdb
--- /dev/null
+++ b/runtimes/libs/misc/src/tensor/Shape.cpp
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "misc/tensor/Shape.h"
+
+#include <cassert>
+#include <functional>
+#include <numeric>
+
+namespace nnfw
+{
+namespace misc
+{
+namespace tensor
+{
+
+bool operator==(const Shape &lhs, const Shape &rhs)
+{
+  if (lhs.rank() != rhs.rank())
+  {
+    return false;
+  }
+
+  for (uint32_t axis = 0; axis < lhs.rank(); ++axis)
+  {
+    if (lhs.dim(axis) != rhs.dim(axis))
+    {
+      return false;
+    }
+  }
+
+  return true;
+}
+
+Shape Shape::from(const std::string &str)
+{
+  Shape shape(0);
+
+  bool pending = false;
+  int value = 0;
+
+  for (const char *cur = str.c_str(); true; ++cur)
+  {
+    if (*cur == ',' || *cur == '\0')
+    {
+      if (pending)
+      {
+        shape.append(value);
+      }
+
+      if (*cur == '\0')
+      {
+        break;
+      }
+
+      pending = false;
+      value = 0;
+      continue;
+    }
+
+    assert(*cur >= '0' && *cur <= '9');
+
+    pending = true;
+    value *= 10;
+    value += *cur - '0';
+  }
+
+  return shape;
+}
+
+uint64_t Shape::num_elements() const
+{
+  return std::accumulate(_dimensions.cbegin(), _dimensions.cend(), UINT64_C(1),
+                         std::multiplies<uint64_t>());
+}
+
+std::ostream &operator<<(std::ostream &os, const Shape &shape)
+{
+  if (shape.rank() > 0)
+  {
+    os << shape.dim(0);
+
+    for (uint32_t axis = 1; axis < shape.rank(); ++axis)
+    {
+      os << "," << shape.dim(axis);
+    }
+  }
+
+  return os;
+}
+
+} // namespace tensor
+} // namespace misc
+} // namespace nnfw
diff --git a/runtimes/libs/nnapi/CMakeLists.txt b/runtimes/libs/nnapi/CMakeLists.txt
new file mode 100644
index 000000000..a5d9490d1
--- /dev/null
+++ b/runtimes/libs/nnapi/CMakeLists.txt
@@ -0,0 +1,3 @@
+add_subdirectories()
+
+add_library(nnfw_lib_nnapi ALIAS nnfw_lib_nnapi_1_2)
diff --git a/runtimes/libs/nnapi/v1.1/CMakeLists.txt b/runtimes/libs/nnapi/v1.1/CMakeLists.txt
new file mode 100644
index 000000000..1bc158f62
--- /dev/null
+++ b/runtimes/libs/nnapi/v1.1/CMakeLists.txt
@@ -0,0 +1,4 @@
+add_library(nnfw_lib_nnapi_1_1 INTERFACE)
+
+target_include_directories(nnfw_lib_nnapi_1_1 INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}/include)
+target_link_libraries(nnfw_lib_nnapi_1_1 INTERFACE nnfw-header)
diff --git a/include/NeuralNetworksExShim.h b/runtimes/libs/nnapi/v1.1/include/NeuralNetworksExShim.h
index f684dab90..f684dab90 100644
--- a/include/NeuralNetworksExShim.h
+++ b/runtimes/libs/nnapi/v1.1/include/NeuralNetworksExShim.h
diff --git a/runtimes/libs/nnapi/v1.1/include/NeuralNetworksLoadHelpers.h b/runtimes/libs/nnapi/v1.1/include/NeuralNetworksLoadHelpers.h
new file mode 100644
index 000000000..201465f9c
--- /dev/null
+++ b/runtimes/libs/nnapi/v1.1/include/NeuralNetworksLoadHelpers.h
@@ -0,0 +1,141 @@
+/* Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+   Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+==============================================================================*/
+
+// NOTE To minimize diff with upstream tensorflow, disable clang-format
+// clang-format off
+
+// NOTE This header is derived from part of the following file (in TensorFlow v1.12)
+//       'externals/tensorflow/tensorflow/contrib/lite/nnapi/NeuralNetworksShim.h'
+
+/**
+ * @file NeuralNetworksLoadHelpers.h
+ * @ingroup COM_AI_RUNTIME
+ * @brief This file contains functions to load NN API runtime library
+ */
+
+#ifndef __NEURAL_NETWORKS_LOAD_HELPER_H__
+#define __NEURAL_NETWORKS_LOAD_HELPER_H__
+
+#include <dlfcn.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+/**
+ * @brief Print log data
+ * @param[in] format    Format string of @c printf
+ * @param[in] args      Argument after format string. (Same with @c printf)
+ */
+#define NNAPI_LOG(format, ...) printf(format "\n", __VA_ARGS__);
+
+/**
+ * @brief Create a function pointer named @c fn after loading NN API library
+ * @param[in] name    Name of a function
+ */
+#define LOAD_FUNCTION(name) \
+  static name##_fn fn = reinterpret_cast<name##_fn>(nnfw::loadFunction(#name));
+
+/**
+ * @brief Run @c fn function. @c fn is created by @ref LOAD_FUNCTION
+ * @param[in] args    List of arguments for the function @c fn
+ */
+#define EXECUTE_FUNCTION(...) \
+  if (fn != nullptr) {        \
+    fn(__VA_ARGS__);          \
+  }
+
+/**
+ * @brief Run @c fn function. @c fn is created by @ref LOAD_FUNCTION
+ * @param[in] args    List of arguments for the function @c fn
+ * @return            the return value of @c fn
+ */
+#define EXECUTE_FUNCTION_RETURN(...) return fn != nullptr ? fn(__VA_ARGS__) : 0;
+
+namespace nnfw
+{
+
+/**
+ * @brief Load NN API library
+ * @param[in] name path of NN API library
+ * @return a symbol table handle of NN API library
+ */
+inline void* loadLibrary(const char* name) {
+  // TODO: change RTLD_LOCAL? Assumes there can be multiple instances of nn
+  // api RT
+  void* handle = nullptr;
+#if 1 //#ifdef __ANDROID__
+  handle = dlopen(name, RTLD_LAZY | RTLD_LOCAL);
+  if (handle == nullptr) {
+    NNAPI_LOG("nnapi error: unable to open library %s", name);
+    NNAPI_LOG("             %s", dlerror());
+  }
+#endif
+  return handle;
+}
+
+/**
+ * @brief Load libneuralnetworks.so and return handle of library
+ * @return a symbol table handle of NN API library
+ */
+inline void* getLibraryHandle() {
+  static void* handle = loadLibrary("libneuralnetworks.so");
+  return handle;
+}
+
+/**
+ * @brief Return function ptr in libneuralnetworks.so
+ * @param[in] name    Name of function
+ * @return function pointer
+ */
+inline void* loadFunction(const char* name) {
+  void* fn = nullptr;
+  if (getLibraryHandle() != nullptr) {
+    fn = dlsym(getLibraryHandle(), name);
+  }
+  if (fn == nullptr) {
+    NNAPI_LOG("nnapi error: unable to open function %s", name);
+    NNAPI_LOG("             %s", dlerror());
+    abort();
+  }
+  else {
+#ifdef _GNU_SOURCE
+    Dl_info info;
+    if (dladdr(fn, &info))
+    {
+      NNAPI_LOG("nnapi function '%s' is loaded from '%s' ", name, info.dli_fname);
+    }
+    else
+    {
+      NNAPI_LOG("nnapi function '%s' is failed to load", name);
+    }
+
+#endif // _GNU_SOURCE
+  }
+  return fn;
+}
+
+/**
+ * @brief Check if libneuralnetworks.so can be loaded
+ * @return @c true if loading is successful, otherwise @c false.
+ */
+inline bool NNAPIExists() {
+  static bool nnapi_is_available = getLibraryHandle();
+  return nnapi_is_available;
+}
+
+} // namespace nnfw
+
+#endif // __NEURAL_NETWORKS_LOAD_HELPER_H__
diff --git a/include/NeuralNetworksShim.h b/runtimes/libs/nnapi/v1.1/include/NeuralNetworksShim.h
index 60b16f766..60b16f766 100644
--- a/include/NeuralNetworksShim.h
+++ b/runtimes/libs/nnapi/v1.1/include/NeuralNetworksShim.h
diff --git a/runtimes/libs/nnapi/v1.2/CMakeLists.txt b/runtimes/libs/nnapi/v1.2/CMakeLists.txt
new file mode 100644
index 000000000..9aef6f1a8
--- /dev/null
+++ b/runtimes/libs/nnapi/v1.2/CMakeLists.txt
@@ -0,0 +1,4 @@
+add_library(nnfw_lib_nnapi_1_2 INTERFACE)
+
+target_include_directories(nnfw_lib_nnapi_1_2 INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}/include)
+target_link_libraries(nnfw_lib_nnapi_1_2 INTERFACE nnfw-header)
diff --git a/runtimes/libs/nnapi/v1.2/include/NeuralNetworksExShim.h b/runtimes/libs/nnapi/v1.2/include/NeuralNetworksExShim.h
new file mode 100644
index 000000000..855613241
--- /dev/null
+++ b/runtimes/libs/nnapi/v1.2/include/NeuralNetworksExShim.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     NeuralNetworksExShim.h
+ * @brief    This file contains an actual implementation of
+ *           ANeuralNetworksModel_addOperationEx function
+ */
+
+#ifndef __NEURAL_NETWORKS_EX_SHIM_H__
+#define __NEURAL_NETWORKS_EX_SHIM_H__
+
+#include "NeuralNetworks.h"
+#include "NeuralNetworksEx.h"
+#include "NeuralNetworksLoadHelpers.h"
+
+typedef int (*ANeuralNetworksModel_addOperationEx_fn)(ANeuralNetworksModel *model,
+                                                      ANeuralNetworksOperationTypeEx type,
+                                                      uint32_t inputCount, const uint32_t *inputs,
+                                                      uint32_t outputCount,
+                                                      const uint32_t *outputs);
+
+/**
+ * @brief Add an extended operation to a model.
+ *
+ * @param[in] model The model to be modified.
+ * @param[in] type The type of extended operation.
+ * @param[in] inputCount The number of entries in the inputs array.
+ * @param[in] inputs An array of indexes identifying each operand.
+ * @param[in] outputCount The number of entries in the outputs array.
+ * @param[in] outputs An array of indexes identifying each operand.
+ *
+ * @note The operands specified by inputs and outputs must have been
+ *       previously added by calls to {@link ANeuralNetworksModel_addOperand}.\n
+ *       Attempting to modify a model once {@link ANeuralNetworksModel_finish}
+ *       has been called will return an error.\n
+ *       See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+
+inline int ANeuralNetworksModel_addOperationEx(ANeuralNetworksModel *model,
+                                               ANeuralNetworksOperationTypeEx type,
+                                               uint32_t inputCount, const uint32_t *inputs,
+                                               uint32_t outputCount, const uint32_t *outputs)
+{
+  LOAD_FUNCTION(ANeuralNetworksModel_addOperationEx);
+  EXECUTE_FUNCTION_RETURN(model, type, inputCount, inputs, outputCount, outputs);
+}
+
+#endif // __NEURAL_NETWORKS_EX_SHIM_H__
diff --git a/runtimes/libs/nnapi/v1.2/include/NeuralNetworksLoadHelpers.h b/runtimes/libs/nnapi/v1.2/include/NeuralNetworksLoadHelpers.h
new file mode 100644
index 000000000..1c482b54c
--- /dev/null
+++ b/runtimes/libs/nnapi/v1.2/include/NeuralNetworksLoadHelpers.h
@@ -0,0 +1,138 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+// NOTE To minimize diff with upstream tensorflow, disable clang-format
+// clang-format off
+
+// NOTE This header is derived from part of the following file (in TensorFlow v1.12)
+//       'externals/tensorflow/tensorflow/contrib/lite/nnapi/NeuralNetworksShim.h'
+
+/**
+ * @file NeuralNetworksLoadHelpers.h
+ * @brief This file contains functions to load NN API runtime library
+ */
+
+#ifndef __NEURAL_NETWORKS_LOAD_HELPER_H__
+#define __NEURAL_NETWORKS_LOAD_HELPER_H__
+
+#include <dlfcn.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+/**
+ * @brief Print log data
+ * @param[in] format    Format string of @c printf
+ * @param[in] args      Argument after format string. (Same with @c printf)
+ */
+#define NNAPI_LOG(format, ...) printf(format "\n", __VA_ARGS__);
+
+/**
+ * @brief Create a function pointer named @c fn after loading NN API library
+ * @param[in] name    Name of a function
+ */
+#define LOAD_FUNCTION(name) \
+  static name##_fn fn = reinterpret_cast<name##_fn>(nnfw::loadFunction(#name));
+
+/**
+ * @brief Run @c fn function. @c fn is created by @ref LOAD_FUNCTION
+ * @param[in] args    List of arguments for the function @c fn
+ */
+#define EXECUTE_FUNCTION(...) \
+  if (fn != nullptr) {        \
+    fn(__VA_ARGS__);          \
+  }
+
+/**
+ * @brief Run @c fn function. @c fn is created by @ref LOAD_FUNCTION
+ * @param[in] args    List of arguments for the function @c fn
+ * @return            the return value of @c fn
+ */
+#define EXECUTE_FUNCTION_RETURN(...) return fn != nullptr ? fn(__VA_ARGS__) : 0;
+
+namespace nnfw
+{
+
+/**
+ * @brief Load NN API library
+ * @param[in] name path of NN API library
+ * @return a symbol table handle of NN API library
+ */
+inline void* loadLibrary(const char* name) {
+  // TODO: change RTLD_LOCAL? Assumes there can be multiple instances of nn
+  // api RT
+  void* handle = nullptr;
+#if 1 //#ifdef __ANDROID__
+  handle = dlopen(name, RTLD_LAZY | RTLD_LOCAL);
+  if (handle == nullptr) {
+    NNAPI_LOG("nnapi error: unable to open library %s", name);
+  }
+#endif
+  return handle;
+}
+
+/**
+ * @brief Load libneuralnetworks.so and return handle of library
+ * @return a symbol table handle of NN API library
+ */
+inline void* getLibraryHandle() {
+  static void* handle = loadLibrary("libneuralnetworks.so");
+  return handle;
+}
+
+/**
+ * @brief Return function ptr in libneuralnetworks.so
+ * @param[in] name    Name of function
+ * @return function pointer
+ */
+inline void* loadFunction(const char* name) {
+  void* fn = nullptr;
+  if (getLibraryHandle() != nullptr) {
+    fn = dlsym(getLibraryHandle(), name);
+  }
+  if (fn == nullptr) {
+    NNAPI_LOG("nnapi error: unable to open function %s", name);
+    abort();
+  }
+  else {
+#ifdef _GNU_SOURCE
+    Dl_info info;
+    if (dladdr(fn, &info))
+    {
+      NNAPI_LOG("nnapi function '%s' is loaded from '%s' ", name, info.dli_fname);
+    }
+    else
+    {
+      NNAPI_LOG("nnapi function '%s' is failed to load", name);
+    }
+#endif // _GNU_SOURCE
+  }
+  return fn;
+}
+
+/**
+ * @brief Check if libneuralnetworks.so can be loaded
+ * @return @c true if loading is successful, otherwise @c false.
+ */
+inline bool NNAPIExists() {
+  static bool nnapi_is_available = getLibraryHandle();
+  return nnapi_is_available;
+}
+
+} // namespace nnfw
+
+#endif // __NEURAL_NETWORKS_LOAD_HELPER_H__
diff --git a/runtimes/libs/nnapi/v1.2/include/NeuralNetworksShim.h b/runtimes/libs/nnapi/v1.2/include/NeuralNetworksShim.h
new file mode 100644
index 000000000..80082383f
--- /dev/null
+++ b/runtimes/libs/nnapi/v1.2/include/NeuralNetworksShim.h
@@ -0,0 +1,1136 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+// NOTE This header is derived from part of the following file
+// https://github.com/tensorflow/tensorflow/blob/a59ad83d06abd38b5e142c41043db8886a92fca8/tensorflow/lite/nnapi/NeuralNetworksShim.h
+
+#ifndef __NEURAL_NETWORKS_SHIM_H__
+#define __NEURAL_NETWORKS_SHIM_H__
+
+#include "NeuralNetworksTypes.h"
+#include "NeuralNetworksLoadHelpers.h"
+
+// This interface is now deprecated. You should use instead
+// nnapi_implementation.
+
+// TODO(b/123017568): Update all current usages of this file.
+
+// NN api types based on NNAPI header file
+// https://developer.android.com/ndk/reference/group/neural-networks
+
+/**
+ * Creates a shared memory object from a file descriptor.
+ *
+ * The shared memory is backed by a file descriptor via mmap.
+ * See {@link ANeuralNetworksMemory} for a description on how to use
+ * this shared memory.
+ *
+ * @param size The requested size in bytes.
+ *             Must not be larger than the file size.
+ * @param prot The desired memory protection for the mapping.
+ *             It is either PROT_NONE or the bitwise OR of one or
+ *             more of the following flags: PROT_READ, PROT_WRITE.
+ * @param fd The requested file descriptor.
+ *           The file descriptor has to be mmap-able. The file
+ *           descriptor will be duplicated.
+ * @param offset The offset to the beginning of the file of the area to map.
+ *               The offset has to be aligned to a page size.
+ * @param memory The memory object to be created.
+ *               Set to NULL if unsuccessful.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if the request completed normally.
+ */
+inline int ANeuralNetworksMemory_createFromFd(size_t size, int protect, int fd, size_t offset,
+                                              ANeuralNetworksMemory **memory)
+{
+  LOAD_FUNCTION(ANeuralNetworksMemory_createFromFd);
+  EXECUTE_FUNCTION_RETURN(size, protect, fd, offset, memory);
+}
+
+/**
+ * Delete a memory object.
+ *
+ * Destroys the object used by the run time to keep track of the memory.
+ * This will free the underlying actual memory if no other code has open
+ * handles to this memory.
+ *
+ * @param memory The memory object to be freed.
+ */
+inline void ANeuralNetworksMemory_free(ANeuralNetworksMemory *memory)
+{
+  LOAD_FUNCTION(ANeuralNetworksMemory_free);
+  EXECUTE_FUNCTION(memory);
+}
+
+/**
+ * Create an empty {@link ANeuralNetworksModel}.
+ *
+ * <p>This only creates the object. Computation is performed once
+ * {@link ANeuralNetworksExecution_startCompute} is invoked.
+ *
+ * The model should be constructed with calls to
+ * {@link ANeuralNetworksModel_addOperation} and
+ * {@link ANeuralNetworksModel_addOperand}
+ *
+ * <p>{@link ANeuralNetworksModel_finish} should be called once the model
+ * has been fully constructed.</p>
+ *
+ * <p>{@link ANeuralNetworksModel_free} should be called once the model
+ * is no longer needed.</p>
+ *
+ * @param model The {@link ANeuralNetworksModel} to be created.
+ *              Set to NULL if unsuccessful.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+inline int ANeuralNetworksModel_create(ANeuralNetworksModel **model)
+{
+  LOAD_FUNCTION(ANeuralNetworksModel_create);
+  EXECUTE_FUNCTION_RETURN(model);
+}
+
+/**
+ * Destroy a model.
+ *
+ * The model need not have been finished by a call to
+ * {@link ANeuralNetworksModel_finish}.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ *
+ * @param model The model to be destroyed. Passing NULL is acceptable and
+ *              results in no operation.
+ */
+inline void ANeuralNetworksModel_free(ANeuralNetworksModel *model)
+{
+  LOAD_FUNCTION(ANeuralNetworksModel_free);
+  EXECUTE_FUNCTION(model);
+}
+
+/**
+ * Indicate that we have finished modifying a model. Required before
+ * calling {@link ANeuralNetworksCompilation_compile}.
+ *
+ * An application is responsible to make sure that no other thread uses
+ * the model at the same time.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ *
+ * @param model The model to be finished.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+inline int ANeuralNetworksModel_finish(ANeuralNetworksModel *model)
+{
+  LOAD_FUNCTION(ANeuralNetworksModel_finish);
+  EXECUTE_FUNCTION_RETURN(model);
+}
+
+/**
+ * Add an operand to a model.
+ *
+ * The order in which the operands are added is important. The first one added
+ * to a model will have the index value 0, the second 1, etc. These indexes are
+ * used as operand identifiers in {@link ANeuralNetworksModel_addOperation},
+ * {@link ANeuralNetworksExecution_setInput},
+ * {@link ANeuralNetworksExecution_setInputFromMemory},
+ * {@link ANeuralNetworksExecution_setOutput},
+ * {@link ANeuralNetworksExecution_setOutputFromMemory} and
+ * {@link ANeuralNetworksExecution_setOperandValue}.
+ *
+ * To build a model that can accommodate inputs of various sizes, as you may
+ * want to do for a CNN, set the size of the dimensions that will vary at run
+ * time to 0. If you do so, provide the full dimensions when calling
+ * {@link ANeuralNetworksExecution_setInput} or {@link
+ * ANeuralNetworksExecution_setInputFromMemory}.
+ *
+ * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has
+ * been called will return an error.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ *
+ * @param model The model to be modified.
+ * @param type The {@link ANeuralNetworksOperandType} that describes the shape
+ * of the operand.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+inline int ANeuralNetworksModel_addOperand(ANeuralNetworksModel *model,
+                                           const ANeuralNetworksOperandType *type)
+{
+  LOAD_FUNCTION(ANeuralNetworksModel_addOperand);
+  EXECUTE_FUNCTION_RETURN(model, type);
+}
+
+/**
+ * Sets an operand to a constant value.
+ *
+ * For scalar values, the content of buffer is copied into the model.
+ *
+ * For tensor values, a pointer to the buffer is stored within the model.
+ * The application is responsible for not changing the content of this region
+ * until all executions using this model have completed. As the data may
+ * be copied during processing, modifying the data after this call yields
+ * undefined results.
+ *
+ * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has
+ * been called will return an error.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ *
+ * @param model The model to be modified.
+ * @param index The index of the model operand we're setting.
+ * @param buffer A pointer to the data to use.
+ * @param length The size in bytes of the data value.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+inline int ANeuralNetworksModel_setOperandValue(ANeuralNetworksModel *model, int32_t index,
+                                                const void *buffer, size_t length)
+{
+  LOAD_FUNCTION(ANeuralNetworksModel_setOperandValue);
+  EXECUTE_FUNCTION_RETURN(model, index, buffer, length);
+}
+
+/**
+ * Sets an operand's per channel quantization parameters.
+ *
+ * Sets parameters required by a tensor of type
+ * {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL}.
+ * This function must be called for every tensor of type
+ * {@link ANEURALNETWORKS_TENSOR_QUANT8_SYMM_PER_CHANNEL} before
+ * calling {@link ANeuralNetworksModel_finish}.
+ *
+ * Available since API level 29.
+ *
+ * @param model The model to be modified.
+ * @param index The index of the model operand we're setting.
+ * @param channelQuant The per channel quantization parameters for the operand.
+ *                    No memory in this struct needs to outlive the call to
+ *                    this function.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+inline int ANeuralNetworksModel_setOperandSymmPerChannelQuantParams(
+    ANeuralNetworksModel *model, int32_t index,
+    const ANeuralNetworksSymmPerChannelQuantParams *channelQuant)
+{
+  LOAD_FUNCTION(ANeuralNetworksModel_setOperandSymmPerChannelQuantParams);
+  EXECUTE_FUNCTION_RETURN(model, index, channelQuant);
+}
+
+/**
+ * Sets an operand to a value stored in a memory object.
+ *
+ * The content of the memory is not copied. A reference to that memory is stored
+ * inside the model. The application is responsible for not changing the content
+ * of the memory region until all executions using this model have completed.
+ * As the data may be copied during processing, modifying the data after this
+ * call yields undefined results.
+ *
+ * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has
+ * been called will return an error.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ *
+ * @param model The model to be modified.
+ * @param index The index of the model operand we're setting.
+ * @param buffer A pointer to the data to use.
+ * @param memory The memory containing the data.
+ * @param offset This specifies the location of the data within the memory.
+ *               The offset is in bytes from the start of memory.
+ * @param length The size in bytes of the data value.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+inline int ANeuralNetworksModel_setOperandValueFromMemory(ANeuralNetworksModel *model,
+                                                          int32_t index,
+                                                          const ANeuralNetworksMemory *memory,
+                                                          size_t offset, size_t length)
+{
+  LOAD_FUNCTION(ANeuralNetworksModel_setOperandValueFromMemory);
+  EXECUTE_FUNCTION_RETURN(model, index, memory, offset, length);
+}
+
+/**
+ * Add an operation to a model.
+ *
+ * @param model The model to be modified.
+ * @param type The type of the operation.
+ * @param inputCount The number of entries in the inputs array.
+ * @param inputs An array of indexes identifying each operand.
+ * @param outputCount The number of entries in the outputs array.
+ * @param outputs An array of indexes identifying each operand.
+ *
+ * The operands specified by inputs and outputs must have been
+ * previously added by calls to {@link ANeuralNetworksModel_addOperand}.
+ *
+ * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has
+ * been called will return an error.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+inline int ANeuralNetworksModel_addOperation(ANeuralNetworksModel *model,
+                                             ANeuralNetworksOperationType type, uint32_t inputCount,
+                                             const uint32_t *inputs, uint32_t outputCount,
+                                             const uint32_t *outputs)
+{
+  LOAD_FUNCTION(ANeuralNetworksModel_addOperation);
+  EXECUTE_FUNCTION_RETURN(model, type, inputCount, inputs, outputCount, outputs);
+}
+
+/**
+ * Specifies which operands will be the model's inputs and outputs.
+ *
+ * An operand cannot be used for both input and output. Doing so will
+ * return an error.
+ *
+ * @param model The model to be modified.
+ * @param inputCount The number of entries in the inputs array.
+ * @param inputs An array of indexes identifying the input operands.
+ * @param outputCount The number of entries in the outputs array.
+ * @param outputs An array of indexes identifying the output operands.
+ *
+ * The operands specified by inputs and outputs must have been
+ * previously added by calls to {@link ANeuralNetworksModel_addOperand}.
+ *
+ * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has
+ * been called will return an error.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ *
+ */
+inline int ANeuralNetworksModel_identifyInputsAndOutputs(ANeuralNetworksModel *model,
+                                                         uint32_t inputCount,
+                                                         const uint32_t *inputs,
+                                                         uint32_t outputCount,
+                                                         const uint32_t *outputs)
+{
+  LOAD_FUNCTION(ANeuralNetworksModel_identifyInputsAndOutputs);
+  EXECUTE_FUNCTION_RETURN(model, inputCount, inputs, outputCount, outputs);
+}
+
+/**
+ * Specifies whether {@link ANEURALNETWORKS_TENSOR_FLOAT32} is allowed to be
+ * calculated with range and/or precision as low as that of the IEEE 754 16-bit
+ * floating-point format. By default, {@link ANEURALNETWORKS_TENSOR_FLOAT32}
+ * must be calculated using at least the range and precision of the IEEE 754
+ * 32-bit floating-point format.
+ *
+ * @param model The model to be modified.
+ * @param allow 'true' indicates {@link ANEURALNETWORKS_TENSOR_FLOAT32} may be
+ *              calculated with range and/or precision as low as that of the
+ *              IEEE 754 16-bit floating point format. 'false' indicates
+ *              {@link ANEURALNETWORKS_TENSOR_FLOAT32} must be calculated using
+ *              at least the range and precision of the IEEE 754 32-bit floating
+ *              point format.
+ *
+ * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has
+ * been called will return an error.
+ *
+ * Available since API level 28.
+ *
+ * See {@link ANeuralNetworksModel} for information on multithreaded usage.
+ */
+inline int ANeuralNetworksModel_relaxComputationFloat32toFloat16(ANeuralNetworksModel *model,
+                                                                 bool allow)
+{
+  LOAD_FUNCTION(ANeuralNetworksModel_relaxComputationFloat32toFloat16);
+  EXECUTE_FUNCTION_RETURN(model, allow);
+}
+
+/**
+ * Create a {@link ANeuralNetworksCompilation} to compile the given model.
+ * This only creates the object. Compilation is only performed once
+ * {@link ANeuralNetworksCompilation_start} is invoked.
+ *
+ * <p>The provided model must outlive the compilation.</p>
+ *
+ * The model must already have been finished by a call to
+ * {@link ANeuralNetworksModel_finish}.
+ *
+ * See {@link ANeuralNetworksCompilation} for information on multithreaded
+ * usage.
+ *
+ * @param model The {@link ANeuralNetworksModel} to be compiled.
+ * @param compilation The newly created object or NULL if unsuccessful.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA
+ *         if the model is invalid.
+ */
+inline int ANeuralNetworksCompilation_create(ANeuralNetworksModel *model,
+                                             ANeuralNetworksCompilation **compilation)
+{
+  LOAD_FUNCTION(ANeuralNetworksCompilation_create);
+  EXECUTE_FUNCTION_RETURN(model, compilation);
+}
+
+/**
+ * Destroy a compilation.
+ *
+ * <p>If called on a compilation for which
+ * {@link ANeuralNetworksCompilation_start} has been called, the
+ * function will return immediately but will mark the compilation to be deleted
+ * once the compilation completes. The {@link ANeuralNetworksCompilation_wait}
+ * will return ERROR_DELETED.
+ *
+ * See {@link ANeuralNetworksCompilation} for information on multithreaded
+ * usage.
+ *
+ * @param compilation The compilation to be destroyed. Passing NULL is
+ * acceptable and results in no operation.
+ */
+inline void ANeuralNetworksCompilation_free(ANeuralNetworksCompilation *compilation)
+{
+  LOAD_FUNCTION(ANeuralNetworksCompilation_free);
+  EXECUTE_FUNCTION(compilation);
+}
+
+/**
+ * Sets the execution preference.
+ *
+ * <p>Provides guidance to the runtime when trade-offs are possible.</p>
+ *
+ * See {@link ANeuralNetworksCompilation} for information on multithreaded
+ * usage.
+ *
+ * @param compilation The compilation to be modified.
+ * @param preference Either {@link PREFER_LOW_POWER},
+ *                  {@link PREFER_SINGLE_FAST_ANSWER}, or
+ *                  {@link PREFER_SUSTAINED_SPEED}.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+inline int ANeuralNetworksCompilation_setPreference(ANeuralNetworksCompilation *compilation,
+                                                    int32_t preference)
+{
+  LOAD_FUNCTION(ANeuralNetworksCompilation_setPreference);
+  EXECUTE_FUNCTION_RETURN(compilation, preference);
+}
+
+/**
+ * Waits until the compilation completes.
+ *
+ * More than one thread can wait on a compilation. When the compilation
+ * completes, all threads will be released.
+ *
+ * See {@link ANeuralNetworksCompilation} for information on multithreaded
+ * usage.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if the compilation completed normally.
+ */
+inline int ANeuralNetworksCompilation_finish(ANeuralNetworksCompilation *compilation)
+{
+  LOAD_FUNCTION(ANeuralNetworksCompilation_finish);
+  EXECUTE_FUNCTION_RETURN(compilation);
+}
+/**
+ * Create a {@link ANeuralNetworksExecution} to apply the given compilation.
+ * This only creates the object. Computation is only performed once
+ * {@link ANeuralNetworksExecution_startCompute} is invoked.
+ *
+ * <p>The provided compilation must outlive the execution.</p>
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * @param compilation The {@link ANeuralNetworksCompilation} to be evaluated.
+ * @param execution The newly created object or NULL if unsuccessful.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA
+ *         if the compilation is invalid.
+ */
+inline int ANeuralNetworksExecution_create(ANeuralNetworksCompilation *compilation,
+                                           ANeuralNetworksExecution **execution)
+{
+  LOAD_FUNCTION(ANeuralNetworksExecution_create);
+  EXECUTE_FUNCTION_RETURN(compilation, execution);
+}
+
+/**
+ * Destroy an execution.
+ *
+ * <p>If called on an execution for which
+ * {@link ANeuralNetworksExecution_startCompute} has been called, the
+ * function will return immediately but will mark the execution to be deleted
+ * once the computation completes.   The {link ANeuralNetworksExecution_wait}
+ * will return ANEURALNETWORKS_ERROR_DELETED.
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * @param execution The execution to be destroyed. Passing NULL is acceptable
+ * and results in no operation.
+ */
+inline void ANeuralNetworksExecution_free(ANeuralNetworksExecution *execution)
+{
+  LOAD_FUNCTION(ANeuralNetworksExecution_free);
+  EXECUTE_FUNCTION(execution);
+}
+
+/**
+ * Associate a user buffer with an input of the model of the
+ * {@link ANeuralNetworksExecution}.
+ *
+ * <p>The provided buffer must outlive the execution.</p>
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * @param execution The execution to be modified.
+ * @param index The index of the input argument we are setting. It is
+ *              an index into the lists passed to
+ *              {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not
+ *              the index associated with {@link
+ * ANeuralNetworksModel_addOperand}.
+ * @param type The type of the operand. This should be used to specify the
+ *             dimensions that were set to 0 when the operand was added to the
+ *             model. All other properties of the type must be the same as
+ *             specified in the model. If the type is the same as specified
+ *             when the model was built, NULL can be passed.
+ * @param buffer The buffer containing the data.
+ * @param length The length in bytes of the buffer.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA if
+ * the name is not recognized or the buffer is too small for the input.
+ */
+inline int ANeuralNetworksExecution_setInput(ANeuralNetworksExecution *execution, int32_t index,
+                                             const ANeuralNetworksOperandType *type,
+                                             const void *buffer, size_t length)
+{
+  LOAD_FUNCTION(ANeuralNetworksExecution_setInput);
+  EXECUTE_FUNCTION_RETURN(execution, index, type, buffer, length);
+}
+
+/**
+ * Associate part of a memory object with an input of the model of the
+ * {@link ANeuralNetworksExecution}.
+ *
+ * <p>The provided memory must outlive the execution.</p>
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * @param execution The execution to be modified.
+ * @param index The index of the input argument we are setting. It is
+ *              an index into the lists passed to
+ *              {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not
+ *              the index associated with {@link
+ * ANeuralNetworksModel_addOperand}.
+ * @param type The type of the operand. This can be used to specify the
+ *             dimensions that were set to 0 when the operand was added to the
+ *             model. All other values must be the same as specified in the
+ *             model. If the type is the same as specified when the model
+ *             was built, NULL can be passed.
+ * @param memory The memory containing the data.
+ * @param offset This specifies the location of the data within the memory.
+ *               The offset is in bytes from the start of memory.
+ * @param length The size in bytes of the data value.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA if
+ * the name is not recognized or the buffer is too small for the input.
+ */
+inline int ANeuralNetworksExecution_setInputFromMemory(ANeuralNetworksExecution *execution,
+                                                       int32_t index,
+                                                       const ANeuralNetworksOperandType *type,
+                                                       const ANeuralNetworksMemory *memory,
+                                                       size_t offset, size_t length)
+{
+  LOAD_FUNCTION(ANeuralNetworksExecution_setInputFromMemory);
+  EXECUTE_FUNCTION_RETURN(execution, index, type, memory, offset, length);
+}
+
+/**
+ * Associate a user buffer with an output of the model of the
+ * {@link ANeuralNetworksExecution}.
+ *
+ * <p>The provided buffer must outlive the execution.</p>
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * @param execution The execution to be modified.
+ * @param index The index of the output argument we are setting. It is
+ *              an index into the lists passed to
+ *              {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not
+ *              the index associated with {@link
+ * ANeuralNetworksModel_addOperand}.
+ * @param type The type of the operand. This can be used to specify the
+ *             dimensions that were set to 0 when the operand was added to the
+ *             model. All other values must be the same as specified in the
+ *             model. If the type is the same as specified when the model
+ *             was built, NULL can be passed.
+ * @param buffer The buffer where the data is to be written.
+ * @param length The length in bytes of the buffer.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA if
+ * the name is not recognized or the buffer is too small for the output.
+ */
+inline int ANeuralNetworksExecution_setOutput(ANeuralNetworksExecution *execution, int32_t index,
+                                              const ANeuralNetworksOperandType *type, void *buffer,
+                                              size_t length)
+{
+  LOAD_FUNCTION(ANeuralNetworksExecution_setOutput);
+  EXECUTE_FUNCTION_RETURN(execution, index, type, buffer, length);
+}
+
+/**
+ * Associate part of a memory object with an output of the model of the
+ * {@link ANeuralNetworksExecution}.
+ *
+ * <p>The provided memory must outlive the execution.</p>
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * @param execution The execution to be modified.
+ * @param index The index of the output argument we are setting. It is
+ *              an index into the lists passed to
+ *              {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not
+ *              the index associated with {@link
+ * ANeuralNetworksModel_addOperand}.
+ * @param type The type of the operand. This can be used to specify the
+ *             dimensions that were set to 0 when the operand was added to the
+ *             model. All other values must be the same as specified in the
+ *             model. If the type is the same as specified when the model
+ *             was built, NULL can be passed.
+ * @param memory The memory where the data is to be stored.
+ * @param offset This specifies the location of the data within the memory.
+ *               The offset is in bytes from the start of memory.
+ * @param length The length in bytes of the data value.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA if
+ * the name is not recognized or the buffer is too small for the output.
+ */
+inline int ANeuralNetworksExecution_setOutputFromMemory(ANeuralNetworksExecution *execution,
+                                                        int32_t index,
+                                                        const ANeuralNetworksOperandType *type,
+                                                        const ANeuralNetworksMemory *memory,
+                                                        size_t offset, size_t length)
+{
+  LOAD_FUNCTION(ANeuralNetworksExecution_setOutputFromMemory);
+  EXECUTE_FUNCTION_RETURN(execution, index, type, memory, offset, length);
+}
+
+/**
+ * Schedule evaluation of the execution.
+ *
+ * <p>Schedules evaluation of the execution. Once the model has been
+ * applied and the outputs are ready to be consumed, the execution will be
+ * signaled. Use {@link ANeuralNetworksExecution_wait} to wait for that signal.
+ * </p>
+ *
+ * Multiple executions can be scheduled and evaluated concurrently, and
+ * compilations can be performed concurrently with executions. The runtime makes
+ * no guarantee on the ordering of the completion of compilations and
+ * executions. If it's important to the application, the application should
+ * enforce the ordering by using {@link ANeuralNetworksCompilation_wait} and
+ * {@link ANeuralNetworksExecution_wait}.
+ *
+ * ANeuralNetworksExecution_wait must be called to recuperate the resources used
+ * by the execution.
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * @param execution The execution to be scheduled and executed.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+inline int ANeuralNetworksExecution_startCompute(ANeuralNetworksExecution *execution,
+                                                 ANeuralNetworksEvent **event)
+{
+  LOAD_FUNCTION(ANeuralNetworksExecution_startCompute);
+  EXECUTE_FUNCTION_RETURN(execution, event);
+}
+
+/**
+ * Waits until the execution completes.
+ *
+ * More than one thread can wait on an event. When the execution completes,
+ * all threads will be released.
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if the execution completed normally.
+ */
+inline int ANeuralNetworksEvent_wait(ANeuralNetworksEvent *event)
+{
+  LOAD_FUNCTION(ANeuralNetworksEvent_wait);
+  EXECUTE_FUNCTION_RETURN(event);
+}
+
+/**
+ * Destroys the event.
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ */
+inline void ANeuralNetworksEvent_free(ANeuralNetworksEvent *event)
+{
+  LOAD_FUNCTION(ANeuralNetworksEvent_free);
+  EXECUTE_FUNCTION(event);
+}
+
+/**
+ * Get the number of available devices.
+ *
+ * @param numDevices Used to return the number of devices.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ *
+ * Available since API level 29.
+ */
+inline int ANeuralNetworks_getDeviceCount(uint32_t *numDevices)
+{
+  LOAD_FUNCTION(ANeuralNetworks_getDeviceCount);
+  EXECUTE_FUNCTION_RETURN(numDevices);
+}
+
+/**
+ * Get the representation of the specified device.
+ *
+ * @param devIndex The index of the specified device. Must be less than the
+ *                 number of available devices.
+ * @param device The representation of the specified device.
+ *               The same representation will always be returned for the
+ *               specified device.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ *
+ * Available since API level 29.
+ */
+
+inline int ANeuralNetworks_getDevice(uint32_t devIndex, ANeuralNetworksDevice **device)
+{
+  LOAD_FUNCTION(ANeuralNetworks_getDevice);
+  EXECUTE_FUNCTION_RETURN(devIndex, device);
+}
+
+/**
+ * Get the name of the specified device.
+ *
+ * @param device The representation of the specified device.
+ * @param name   The returned name of the specified device. The name will be in
+ *               UTF-8 and will be null-terminated. It will be recognizable as a
+ *               known device name rather than a cryptic string. For devices
+ *               with API level 29 and above, the format of the name is
+ *               {VENDOR}-{DEVICE}, e.g. “google-ipu”. For devices with feature
+ *               level 28 or lower, the name will always be “unknown-device”.
+ *               The name will remain valid for the duration of the application.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ *
+ * Available since API level 29.
+ */
+inline int ANeuralNetworksDevice_getName(const ANeuralNetworksDevice *device, const char **name)
+{
+  LOAD_FUNCTION(ANeuralNetworksDevice_getName);
+  EXECUTE_FUNCTION_RETURN(device, name);
+}
+
+/**
+ * Get the version of the driver implementation of the specified device.
+ *
+ * It’s the responsibility of the driver implementor to insure that this version
+ * string uniquely distinguishes this implementation from all previous
+ * implementations.
+ *
+ * This version string must not be confused with the feature level which is
+ * solely defined by {@link ANeuralNetworksDevice_getFeatureLevel}. There is no
+ * implicit ordering of the versions. For example, it is not possible to filter
+ * all drivers older than a certain version.
+ *
+ * Application developers may use this version string to avoid or prefer
+ * specific driver implementations. For example, an application may want to do
+ * so because:
+ *     - A specific version of the driver does not provide the required
+ * performance, perhaps because of a performance regression.
+ *     - A specific version of the driver has a bug or returns results that
+ * don’t match the minimum precision requirement for the application.
+ *
+ * @param device  The representation of the specified device.
+ * @param version The returned version string of the driver for the specified
+ *                device. The string will be in UTF-8 and will be
+ *                null-terminated. For devices with feature level 28 or lower,
+ *                "UNKNOWN" will be returned. The version string will remain
+ *                valid for the duration of the application.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ *
+ * Available since API level 29.
+ */
+inline int ANeuralNetworksDevice_getVersion(const ANeuralNetworksDevice *device,
+                                            const char **version)
+{
+  LOAD_FUNCTION(ANeuralNetworksDevice_getVersion);
+  EXECUTE_FUNCTION_RETURN(device, version);
+}
+
+/**
+ * Get the supported NNAPI version of the specified device.
+ *
+ * Each device has a supported feature level, which is the most advanced feature
+ * this driver implements. For example, if the driver implements the features
+ * introduced in Android P, but does not implement the features introduced after
+ * Android P, the value would be 28. Developers could decide whether or not the
+ * specified device should be used for a Model that has certain feature
+ * requirements.
+ *
+ * @param device       The representation of the specified device.
+ * @param featureLevel The API level of the most advanced feature this driver
+ *                     implements.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ *
+ * Available since API level 29.
+ */
+inline int ANeuralNetworksDevice_getFeatureLevel(const ANeuralNetworksDevice *device,
+                                                 int64_t *featureLevel)
+{
+  LOAD_FUNCTION(ANeuralNetworksDevice_getFeatureLevel);
+  EXECUTE_FUNCTION_RETURN(device, featureLevel);
+}
+
+/**
+ * Get the supported operations for a specified set of devices. If multiple
+ * devices are selected, the supported operation list is a union of supported
+ * operations of all selected devices.
+ *
+ * @param model        The model to be queried.
+ * @param devices      The set of devices. Must not contain duplicates.
+ * @param numDevices   The number of devices in the set.
+ * @param supportedOps The boolean array to be filled. True means supported. The
+ *                     size of the boolean array must be at least as large as
+ *                     the number of operations in the model. The order of
+ *                     elements in the supportedOps array matches the order in
+ *                     which the corresponding operations were added to the
+ *                     model.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ *
+ * Available since API level 29.
+ */
+inline int
+ANeuralNetworksModel_getSupportedOperationsForDevices(const ANeuralNetworksModel *model,
+                                                      const ANeuralNetworksDevice *const *devices,
+                                                      uint32_t numDevices, bool *supportedOps)
+{
+  LOAD_FUNCTION(ANeuralNetworksModel_getSupportedOperationsForDevices);
+  EXECUTE_FUNCTION_RETURN(model, devices, numDevices, supportedOps);
+}
+
+/**
+ * Create a {@link ANeuralNetworksCompilation} to compile the given model for a
+ * specified set of devices. If more than one device is specified, the
+ * compilation will distribute the workload automatically across the devices.
+ * The model must be fully supported by the specified set of devices. This means
+ * that ANeuralNetworksModel_getSupportedOperationsForDevices() must have
+ * returned true for every operation for that model/devices pair.
+ *
+ * @param model       The {@link ANeuralNetworksModel} to be compiled.
+ * @param devices     The set of devices. Must not contain duplicates.
+ * @param numDevices  The number of devices in the set.
+ * @param compilation The newly created object or NULL if unsuccessful.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA
+ *         if the model is invalid.
+ *
+ * Available since API level 29.
+ */
+inline int ANeuralNetworksCompilation_createForDevices(ANeuralNetworksModel *model,
+                                                       const ANeuralNetworksDevice *const *devices,
+                                                       uint32_t numDevices,
+                                                       ANeuralNetworksCompilation **compilation)
+{
+  LOAD_FUNCTION(ANeuralNetworksCompilation_createForDevices);
+  EXECUTE_FUNCTION_RETURN(model, devices, numDevices, compilation);
+}
+
+/**
+ * Sets the compilation caching signature and the cache directory.
+ *
+ * Provides optional caching information to the runtime for faster repeated
+ * compilation.
+ *
+ * See {@link ANeuralNetworksCompilation} for information on multithreaded
+ * usage.
+ *
+ * @param compilation The compilation to be modified.
+ * @param cacheDir The cache directory to store and retrieve caching data. It is
+ *                 recommended to use the code_cache provided by the Android
+ *                 runtime. If not using the code_cache, the user should choose
+ *                 a directory local to the application, and is responsible to
+ *                 manage and clean the cache entries.
+ * @param token The token provided by the user to specify a model, must be of
+ *              length ANEURALNETWORKS_BYTE_SIZE_OF_CACHE_TOKEN. The user should
+ *              ensure that the token is unique to a model within the
+ *              application. The NNAPI runtime will not detected token
+ *              collisions. If there is a collision, the compilation outcome may
+ *              be incorrect without notifying with error.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ *
+ * Available since API level 29.
+ */
+inline int ANeuralNetworksCompilation_setCaching(ANeuralNetworksCompilation *compilation,
+                                                 const char *cacheDir, const uint8_t *token)
+{
+  LOAD_FUNCTION(ANeuralNetworksCompilation_setCaching);
+  EXECUTE_FUNCTION_RETURN(compilation, cacheDir, token);
+}
+
+/**
+ * Schedule synchronous evaluation of the execution.
+ *
+ * <p>Schedules synchronous evaluation of the execution. Returns once the
+ * execution has completed and the outputs are ready to be consumed.
+ * </p>
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * See {@link ANeuralNetworksExecution_startCompute} for asynchronous execution.
+ * Synchronous execution incurs lower overhead than asynchronous execution.
+ *
+ * Available since API level 29.
+ *
+ * @param execution The execution to be scheduled and executed.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if the execution completed normally.
+ *         ANEURALNETWORKS_UNMAPPABLE if the execution input or output memory
+ *         cannot be properly mapped.
+ */
+inline int ANeuralNetworksExecution_compute(ANeuralNetworksExecution *execution)
+{
+  LOAD_FUNCTION(ANeuralNetworksExecution_compute);
+  EXECUTE_FUNCTION_RETURN(execution);
+}
+
+/**
+ * Get the dimensional information of the specified output operand of the model
+ * of the
+ * {@link ANeuralNetworksExecution}.
+ *
+ * On asynchronous execution initiated by {@link
+ * ANeuralNetworksExecution_startCompute},
+ * {@link ANeuralNetworksEvent_wait} must be called prior to this function to
+ * recuperate the resources used by the execution.
+ *
+ * @param execution The execution to be queried.
+ * @param index The index of the output argument we are querying. It is
+ *              an index into the lists passed to
+ *              {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not
+ *              the index associated with {@link
+ * ANeuralNetworksModel_addOperand}.
+ * @param rank The rank of the output operand.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful,
+ * ANEURALNETWORKS_OUTPUT_INSUFFICIENT_SIZE if the target output is provided an
+ * insufficient buffer at execution time, ANEURALNETWORKS_BAD_DATA if the index
+ * is invalid.
+ *
+ * Available since API level 29.
+ */
+inline int ANeuralNetworksExecution_getOutputOperandRank(ANeuralNetworksExecution *execution,
+                                                         int32_t index, uint32_t *rank)
+{
+  LOAD_FUNCTION(ANeuralNetworksExecution_getOutputOperandRank);
+  EXECUTE_FUNCTION_RETURN(execution, index, rank);
+}
+
+/**
+ * Get the dimensional information of the specified output operand of the model
+ * of the
+ * {@link ANeuralNetworksExecution}. The target output operand cannot be a
+ * scalar.
+ *
+ * On asynchronous execution initiated by
+ * {@link ANeuralNetworksExecution_startCompute},
+ * {@link ANeuralNetworksEvent_wait} must be called prior to this function to
+ * recuperate the resources used by the execution.
+ *
+ * @param execution The execution to be queried.
+ * @param index The index of the output argument we are querying. It is an index
+ *              into the lists passed to
+ *              {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not
+ *              the index associated with
+ *              {@link ANeuralNetworksModel_addOperand}.
+ * @param dimensions The dimension array to be filled. The size of the array
+ *                   must be exactly as large as the rank of the output operand
+ *                   to be queried in the model.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful,
+ * ANEURALNETWORKS_OUTPUT_INSUFFICIENT_SIZE if the target output is provided an
+ * insufficient buffer at execution time, ANEURALNETWORKS_BAD_DATA if the index
+ * is invalid or if the target is a scalar.
+ *
+ * Available since API level 29.
+ */
+inline int ANeuralNetworksExecution_getOutputOperandDimensions(ANeuralNetworksExecution *execution,
+                                                               int32_t index, uint32_t *dimensions)
+{
+  LOAD_FUNCTION(ANeuralNetworksExecution_getOutputOperandDimensions);
+  EXECUTE_FUNCTION_RETURN(execution, index, dimensions);
+}
+
+/**
+ * Create a {@link ANeuralNetworksBurst} to apply the given compilation.
+ * This only creates the burst object. Computation is only performed once
+ * {@link ANeuralNetworksExecution_burstCompute} is invoked with a valid
+ * {@link ANeuralNetworksExecution} and {@link ANeuralNetworksBurst}.
+ *
+ * <p>The provided compilation must outlive the burst object.</p>
+ *
+ * Available since API level 29.
+ *
+ * @param compilation The {@link ANeuralNetworksCompilation} to be evaluated.
+ * @param burst The newly created object or NULL if unsuccessful.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA
+ *         if the compilation is invalid.
+ */
+inline int ANeuralNetworksBurst_create(ANeuralNetworksCompilation *compilation,
+                                       ANeuralNetworksBurst **burst)
+{
+  LOAD_FUNCTION(ANeuralNetworksBurst_create);
+  EXECUTE_FUNCTION_RETURN(compilation, burst);
+}
+
+/**
+ * Destroys the burst object.
+ *
+ * Available since API level 29.
+ *
+ * @param burst The burst object to be destroyed. Passing NULL is acceptable and
+ *              results in no operation.
+ */
+inline void ANeuralNetworksBurst_free(ANeuralNetworksBurst *burst)
+{
+  LOAD_FUNCTION(ANeuralNetworksBurst_free);
+  EXECUTE_FUNCTION(burst);
+}
+
+/**
+ * Schedule synchronous evaluation of the execution on a burst object.
+ *
+ * <p>Schedules synchronous evaluation of the execution. Returns once the
+ * execution has completed and the outputs are ready to be consumed.</p>
+ *
+ * <p>There must be at most one {@link ANeuralNetworksExecution} processing at
+ * any given time for any given burst object. Any
+ * {@link ANeuralNetworksExecution} launched before the previous has finished
+ * will result in ANEURALNETWORKS_BAD_STATE.</p>
+ *
+ * Available since API level 29.
+ *
+ * @param burst The burst object to execute on.
+ * @param execution The execution to be scheduled and executed. The execution
+ *                  must be created from the same {@link
+ *                  ANeuralNetworksCompilation} as the burst object.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if the execution completed normally.
+ */
+inline int ANeuralNetworksExecution_burstCompute(ANeuralNetworksExecution *execution,
+                                                 ANeuralNetworksBurst *burst)
+{
+  LOAD_FUNCTION(ANeuralNetworksExecution_burstCompute);
+  EXECUTE_FUNCTION_RETURN(execution, burst);
+}
+
+/**
+ * Creates a shared memory object from an AHardwareBuffer handle.
+ *
+ * If the shared memory is backed by an AHardwareBuffer of
+ * AHARDWAREBUFFER_FORMAT_BLOB format, it can be used the same way as shared
+ * memory created from a file handle. See
+ * {@link ANeuralNetworksMemory} for a description on how to use this shared
+ * memory.
+ *
+ * If the shared memory is backed by an AHardwareBuffer of a format other than
+ * AHARDWAREBUFFER_FORMAT_BLOB, it can only be used for Model inputs and
+ * outputs. When calling {@link ANeuralNetworksExecution_setInputFromMemory} or
+ * {@link ANeuralNetworksExecution_setOutputFromMemory} with the shared memory,
+ * both offset and length must be set to zero and the entire memory region will
+ * be associated with the specified input or output operand. There is no
+ * guarantee that an arbitrary AHardwareBuffer_Format and
+ * AHardwareBuffer_UsageFlags combination can be used by arbitrary devices. The
+ * execution will fail if selected set of devices cannot consume the buffer.
+ *
+ * Calling {@link ANeuralNetworksModel_setOperandValueFromMemory} with shared
+ * memory backed by an AHardwareBuffer of a format other than
+ * AHARDWAREBUFFER_FORMAT_BLOB is disallowed.
+ *
+ * TODO(miaowang): add documentation about intended usage with introspection
+ * API.
+ *
+ * Available since API level 29.
+ *
+ * @param ahwb The AHardwareBuffer handle.
+ * @param memory The memory object to be created.
+ *               Set to NULL if unsuccessful.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if the request completed normally.
+ *
+ * @see AHardwareBuffer
+ */
+inline int ANeuralNetworksMemory_createFromAHardwareBuffer(const AHardwareBuffer *ahwb,
+                                                           ANeuralNetworksMemory **memory)
+{
+  LOAD_FUNCTION(ANeuralNetworksMemory_createFromAHardwareBuffer);
+  EXECUTE_FUNCTION_RETURN(ahwb, memory);
+}
+
+/**
+ * Specifies whether duration of the {@link ANeuralNetworksExecution} is to be
+ * measured. By default, duration is not measured.
+ *
+ * The {@link ANeuralNetworksExecution} must have been created with
+ * {@link ANeuralNetworksCompilation_createForDevices} with numDevices = 1.
+ *
+ * See {@link ANeuralNetworksExecution} for information on multithreaded usage.
+ *
+ * Available since API level 29.
+ *
+ * @param execution The execution to be modified.
+ * @param measure 'true' if duration is to be measured, 'false' if not.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+inline int ANeuralNetworksExecution_setMeasureTiming(ANeuralNetworksExecution *execution,
+                                                     bool measure)
+{
+  LOAD_FUNCTION(ANeuralNetworksExecution_setMeasureTiming);
+  EXECUTE_FUNCTION_RETURN(execution, measure);
+}
+
+/**
+ * Get the time spent in the specified {@link ANeuralNetworksExecution}, in
+ * nanoseconds. The execution must have completed.
+ *
+ * @param execution The execution to be queried.
+ * @param durationCode The measurement to be queried, specified by {@link
+ * DurationCode}.
+ * @param duration The returned duration. If no measurement was requested by
+ *                 {@link ANeuralNetworksExecution_setMeasureTiming}, or for
+ * some other reason the duration is not available, UINT64_MAX will be returned.
+ *                 A particular device need not support any given measurement.
+ *
+ * @return ANEURALNETWORKS_NO_ERROR if successful.
+ */
+inline int ANeuralNetworksExecution_getDuration(const ANeuralNetworksExecution *execution,
+                                                int32_t durationCode, uint64_t *duration)
+{
+  LOAD_FUNCTION(ANeuralNetworksExecution_getDuration);
+  EXECUTE_FUNCTION_RETURN(execution, durationCode, duration);
+}
+
+/**/
+
+#endif // __NEURAL_NETWORKS_SHIM_H__
diff --git a/runtimes/libs/nnapi/v1.2/include/NeuralNetworksTypes.h b/runtimes/libs/nnapi/v1.2/include/NeuralNetworksTypes.h
new file mode 100644
index 000000000..d74402749
--- /dev/null
+++ b/runtimes/libs/nnapi/v1.2/include/NeuralNetworksTypes.h
@@ -0,0 +1,163 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+// NOTE This header is derived from part of the following file
+// https://github.com/tensorflow/tensorflow/blob/a59ad83d06abd38b5e142c41043db8886a92fca8/tensorflow/lite/nnapi/NeuralNetworksTypes.h
+
+#ifndef __NEURAL_NETWORKS_TYPES_H__
+#define __NEURAL_NETWORKS_TYPES_H__
+
+#include "NeuralNetworks.h"
+
+// NN api types based on NNAPI header file
+// https://developer.android.com/ndk/reference/group/neural-networks
+
+// nn api function types
+
+typedef int (*ANeuralNetworksMemory_createFromFd_fn)(size_t size, int protect, int fd,
+                                                     size_t offset, ANeuralNetworksMemory **memory);
+
+typedef void (*ANeuralNetworksMemory_free_fn)(ANeuralNetworksMemory *memory);
+
+typedef int (*ANeuralNetworksModel_create_fn)(ANeuralNetworksModel **model);
+
+typedef int (*ANeuralNetworksModel_finish_fn)(ANeuralNetworksModel *model);
+
+typedef void (*ANeuralNetworksModel_free_fn)(ANeuralNetworksModel *model);
+
+typedef int (*ANeuralNetworksCompilation_create_fn)(ANeuralNetworksModel *model,
+                                                    ANeuralNetworksCompilation **compilation);
+
+typedef void (*ANeuralNetworksCompilation_free_fn)(ANeuralNetworksCompilation *compilation);
+
+typedef int (*ANeuralNetworksCompilation_setPreference_fn)(ANeuralNetworksCompilation *compilation,
+                                                           int32_t preference);
+
+typedef int (*ANeuralNetworksCompilation_finish_fn)(ANeuralNetworksCompilation *compilation);
+
+typedef int (*ANeuralNetworksModel_addOperand_fn)(ANeuralNetworksModel *model,
+                                                  const ANeuralNetworksOperandType *type);
+
+typedef int (*ANeuralNetworksModel_setOperandValue_fn)(ANeuralNetworksModel *model, int32_t index,
+                                                       const void *buffer, size_t length);
+
+typedef int (*ANeuralNetworksModel_setOperandSymmPerChannelQuantParams_fn)(
+    ANeuralNetworksModel *model, int32_t index,
+    const ANeuralNetworksSymmPerChannelQuantParams *channelQuant);
+
+typedef int (*ANeuralNetworksModel_setOperandValueFromMemory_fn)(
+    ANeuralNetworksModel *model, int32_t index, const ANeuralNetworksMemory *memory, size_t offset,
+    size_t length);
+
+typedef int (*ANeuralNetworksModel_addOperation_fn)(ANeuralNetworksModel *model,
+                                                    ANeuralNetworksOperationType type,
+                                                    uint32_t inputCount, const uint32_t *inputs,
+                                                    uint32_t outputCount, const uint32_t *outputs);
+
+typedef int (*ANeuralNetworksModel_identifyInputsAndOutputs_fn)(ANeuralNetworksModel *model,
+                                                                uint32_t inputCount,
+                                                                const uint32_t *inputs,
+                                                                uint32_t outputCount,
+                                                                const uint32_t *outputs);
+
+typedef int (*ANeuralNetworksModel_relaxComputationFloat32toFloat16_fn)(ANeuralNetworksModel *model,
+                                                                        bool allow);
+
+typedef int (*ANeuralNetworksExecution_create_fn)(ANeuralNetworksCompilation *compilation,
+                                                  ANeuralNetworksExecution **execution);
+
+typedef void (*ANeuralNetworksExecution_free_fn)(ANeuralNetworksExecution *execution);
+
+typedef int (*ANeuralNetworksExecution_setInput_fn)(ANeuralNetworksExecution *execution,
+                                                    int32_t index,
+                                                    const ANeuralNetworksOperandType *type,
+                                                    const void *buffer, size_t length);
+
+typedef int (*ANeuralNetworksExecution_setInputFromMemory_fn)(
+    ANeuralNetworksExecution *execution, int32_t index, const ANeuralNetworksOperandType *type,
+    const ANeuralNetworksMemory *memory, size_t offset, size_t length);
+
+typedef int (*ANeuralNetworksExecution_setOutput_fn)(ANeuralNetworksExecution *execution,
+                                                     int32_t index,
+                                                     const ANeuralNetworksOperandType *type,
+                                                     void *buffer, size_t length);
+
+typedef int (*ANeuralNetworksExecution_setOutputFromMemory_fn)(
+    ANeuralNetworksExecution *execution, int32_t index, const ANeuralNetworksOperandType *type,
+    const ANeuralNetworksMemory *memory, size_t offset, size_t length);
+
+typedef int (*ANeuralNetworksExecution_startCompute_fn)(ANeuralNetworksExecution *execution,
+                                                        ANeuralNetworksEvent **event);
+
+typedef int (*ANeuralNetworksEvent_wait_fn)(ANeuralNetworksEvent *event);
+
+typedef void (*ANeuralNetworksEvent_free_fn)(ANeuralNetworksEvent *event);
+
+typedef int (*ASharedMemory_create_fn)(const char *name, size_t size);
+
+typedef int (*ANeuralNetworks_getDeviceCount_fn)(uint32_t *numDevices);
+
+typedef int (*ANeuralNetworks_getDevice_fn)(uint32_t devIndex, ANeuralNetworksDevice **device);
+
+typedef int (*ANeuralNetworksDevice_getName_fn)(const ANeuralNetworksDevice *device,
+                                                const char **name);
+
+typedef int (*ANeuralNetworksDevice_getType_fn)(const ANeuralNetworksDevice *device, int32_t *type);
+
+typedef int (*ANeuralNetworksDevice_getVersion_fn)(const ANeuralNetworksDevice *device,
+                                                   const char **version);
+
+typedef int (*ANeuralNetworksDevice_getFeatureLevel_fn)(const ANeuralNetworksDevice *device,
+                                                        int64_t *featureLevel);
+
+typedef int (*ANeuralNetworksModel_getSupportedOperationsForDevices_fn)(
+    const ANeuralNetworksModel *model, const ANeuralNetworksDevice *const *devices,
+    uint32_t numDevices, bool *supportedOps);
+
+typedef int (*ANeuralNetworksCompilation_createForDevices_fn)(
+    ANeuralNetworksModel *model, const ANeuralNetworksDevice *const *devices, uint32_t numDevices,
+    ANeuralNetworksCompilation **compilation);
+
+typedef int (*ANeuralNetworksCompilation_setCaching_fn)(ANeuralNetworksCompilation *compilation,
+                                                        const char *cacheDir, const uint8_t *token);
+
+typedef int (*ANeuralNetworksExecution_compute_fn)(ANeuralNetworksExecution *execution);
+
+typedef int (*ANeuralNetworksExecution_getOutputOperandRank_fn)(ANeuralNetworksExecution *execution,
+                                                                int32_t index, uint32_t *rank);
+
+typedef int (*ANeuralNetworksExecution_getOutputOperandDimensions_fn)(
+    ANeuralNetworksExecution *execution, int32_t index, uint32_t *dimensions);
+
+typedef int (*ANeuralNetworksBurst_create_fn)(ANeuralNetworksCompilation *compilation,
+                                              ANeuralNetworksBurst **burst);
+
+typedef void (*ANeuralNetworksBurst_free_fn)(ANeuralNetworksBurst *burst);
+
+typedef int (*ANeuralNetworksExecution_burstCompute_fn)(ANeuralNetworksExecution *execution,
+                                                        ANeuralNetworksBurst *burst);
+
+typedef int (*ANeuralNetworksMemory_createFromAHardwareBuffer_fn)(const AHardwareBuffer *ahwb,
+                                                                  ANeuralNetworksMemory **memory);
+
+typedef int (*ANeuralNetworksExecution_setMeasureTiming_fn)(ANeuralNetworksExecution *execution,
+                                                            bool measure);
+
+typedef int (*ANeuralNetworksExecution_getDuration_fn)(const ANeuralNetworksExecution *execution,
+                                                       int32_t durationCode, uint64_t *duration);
+
+#endif // __NEURAL_NETWORKS_TYPES_H__
diff --git a/runtimes/libs/profiling/CMakeLists.txt b/runtimes/libs/profiling/CMakeLists.txt
new file mode 100644
index 000000000..e0398ce93
--- /dev/null
+++ b/runtimes/libs/profiling/CMakeLists.txt
@@ -0,0 +1,7 @@
+file(GLOB_RECURSE SOURCES "src/*.cpp")
+
+add_library(nnfw_lib_profiling STATIC ${SOURCES})
+set_property(TARGET nnfw_lib_profiling PROPERTY POSITION_INDEPENDENT_CODE ON)
+target_include_directories(nnfw_lib_profiling PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/include)
+target_link_libraries(nnfw_lib_profiling PRIVATE nnfw_common)
+target_link_libraries(nnfw_lib_profiling PRIVATE nnfw_coverage)
diff --git a/runtimes/libs/profiling/include/profiling/profile_buffer.h b/runtimes/libs/profiling/include/profiling/profile_buffer.h
new file mode 100644
index 000000000..bc8d75e7c
--- /dev/null
+++ b/runtimes/libs/profiling/include/profiling/profile_buffer.h
@@ -0,0 +1,170 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* Copyright 2018 The TensorFlow Authors. All Rights Reserved.
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+==============================================================================*/
+
+// NOTE To minimize diff with upstream tensorflow, disable clang-format
+// clang-format off
+
+// NOTE This header is derived from the following file (in TensorFlow v1.12)
+//        'externals/tensorflow/tensorflow/lite/profiling/profile_buffer.h
+#ifndef TENSORFLOW_CONTRIB_LITE_PROFILING_PROFILE_BUFFER_H_
+#define TENSORFLOW_CONTRIB_LITE_PROFILING_PROFILE_BUFFER_H_
+
+#include <cstddef>
+#include <cstdint>
+
+#include "profiling/time.h"
+
+namespace tflite {
+namespace profiling {
+
+// A profiling event.
+struct ProfileEvent {
+  // Describes the type of event.
+  // The event_metadata field may contain additional data for interpreting
+  // the event.
+  enum class EventType {
+    // Default event type, the metadata field has no special significance.
+    DEFAULT = 0,
+    // The event is an operator invocation and the event_metadata field is the
+    // index of operator node.
+    OPERATOR_INVOKE_EVENT = 1
+  };
+
+  // Label of the event. This usually describes the event.
+  const char* tag;
+  // Timestamp in microseconds when the event began.
+  uint64_t begin_timestamp_us;
+  // Timestamp in microseconds when the event ended.
+  uint64_t end_timestamp_us;
+  // The field containing the type of event. This must be one of the event types
+  // in EventType.
+  EventType event_type;
+  // Extra data describing the details of the event.
+  uint32_t event_metadata;
+};
+}  // namespace profiling
+}  // namespace tflite
+
+#ifdef TFLITE_PROFILING_ENABLED
+
+#include <sys/time.h>
+#include <vector>
+
+namespace tflite {
+namespace profiling {
+constexpr uint32_t kInvalidEventHandle = static_cast<uint32_t>(~0) - 1;
+
+// A ring buffer of profile events.
+// This class is not thread safe.
+class ProfileBuffer {
+ public:
+  ProfileBuffer(uint32_t max_num_entries, bool enabled)
+      : enabled_(enabled), current_index_(0), event_buffer_(max_num_entries) {}
+
+  // Adds an event to the buffer with begin timestamp set to the current
+  // timestamp. Returns a handle to event that can be used to call EndEvent. If
+  // buffer is disabled this has no affect.
+  // The tag of the event should remain valid till the buffer is valid.
+  uint32_t BeginEvent(const char* tag, ProfileEvent::EventType event_type,
+                      uint32_t event_metadata) {
+    if (!enabled_) {
+      return kInvalidEventHandle;
+    }
+    uint64_t timestamp = time::NowMicros();
+    int index = current_index_ % event_buffer_.size();
+    event_buffer_[index].tag = tag;
+    event_buffer_[index].event_type = event_type;
+    event_buffer_[index].event_metadata = event_metadata;
+    event_buffer_[index].begin_timestamp_us = timestamp;
+    event_buffer_[index].end_timestamp_us = 0;
+    current_index_++;
+    return index;
+  }
+
+  // Sets the enabled state of buffer to |enabled|
+  void SetEnabled(bool enabled) { enabled_ = enabled; }
+
+  // Sets the end timestamp for event for the handle to current time.
+  // If the buffer is disabled or previous event has been overwritten this
+  // operation has not effect.
+  void EndEvent(uint32_t event_handle) {
+    if (!enabled_ || event_handle == kInvalidEventHandle ||
+        event_handle > current_index_) {
+      return;
+    }
+    const uint32_t max_size = event_buffer_.size();
+    if (current_index_ > (max_size + event_handle)) {
+      // Ignore, buffer has already overflowed.
+      return;
+    }
+
+    int event_index = event_handle % max_size;
+    event_buffer_[event_index].end_timestamp_us = time::NowMicros();
+  }
+
+  // Returns the size of the buffer.
+  size_t Size() const {
+    return (current_index_ >= event_buffer_.size()) ? event_buffer_.size()
+                                                    : current_index_;
+  }
+
+  // Resets the buffer.
+  void Reset() {
+    enabled_ = false;
+    current_index_ = 0;
+  }
+
+  // Returns the profile event at the given index. If the index is invalid a
+  // nullptr is returned. The return event may get overwritten if more events
+  // are added to buffer.
+  const struct ProfileEvent* const At(int index) const {
+    size_t size = Size();
+    if (index >= size) {
+      return nullptr;
+    }
+    const uint32_t max_size = event_buffer_.size();
+    uint32_t start =
+        (current_index_ > max_size) ? current_index_ % max_size : max_size;
+    index = (index + start) % max_size;
+    return &event_buffer_[index];
+  }
+
+ private:
+  bool enabled_;
+  uint32_t current_index_;
+  std::vector<ProfileEvent> event_buffer_;
+};
+}  // namespace profiling
+}  // namespace tflite
+#endif  // TFLITE_PROFILING_ENABLED
+#endif  // TENSORFLOW_CONTRIB_LITE_PROFILING_PROFILE_BUFFER_H_
+
+// clang-format on
diff --git a/runtimes/libs/profiling/include/profiling/profiler.h b/runtimes/libs/profiling/include/profiling/profiler.h
new file mode 100644
index 000000000..ed3688140
--- /dev/null
+++ b/runtimes/libs/profiling/include/profiling/profiler.h
@@ -0,0 +1,203 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* Copyright 2018 The TensorFlow Authors. All Rights Reserved.
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+==============================================================================*/
+
+// NOTE To minimize diff with upstream tensorflow, disable clang-format
+// clang-format off
+
+// NOTE This header is derived from the following file (in TensorFlow v1.12)
+//        'externals/tensorflow/tensorflow/lite/profiling/profiler.h
+#ifndef TENSORFLOW_CONTRIB_LITE_PROFILING_PROFILER_H_
+#define TENSORFLOW_CONTRIB_LITE_PROFILING_PROFILER_H_
+
+#include <vector>
+
+#include "profiling/profile_buffer.h"
+
+#ifdef TFLITE_PROFILING_ENABLED
+
+namespace tflite {
+namespace profiling {
+class ScopedProfile;
+class ScopedOperatorProfile;
+
+// Controls whether profiling is enabled or disabled and collects profiles.
+// TFLite is used on platforms that don't have posix threads, so the profiler is
+// kept as simple as possible. It is designed to be used only on a single
+// thread.
+//
+// Profiles are collected using Scoped*Profile objects that begin and end a
+// profile event.
+// An example usage is shown in the example below:
+//
+// Say Worker class has a DoWork method and we are interested in profiling
+// the overall execution time for DoWork and time spent in Task1 and Task2
+// functions.
+//
+// class Worker {
+//  public:
+//   void DoWork() {
+//    ScopedProfile(&controller, "DoWork");
+//    Task1();
+//    Task2();
+//    .....
+//   }
+//
+//   void Task1() {
+//    ScopedProfile(&controller, "Task1");
+//    ....
+//   }
+//
+//   void Task2() {
+//    ScopedProfile(&controller, "Task2");
+//   }
+//
+//    Profiler profiler;
+// }
+//
+// We instrument the functions that need to be profiled.
+//
+// Profile can be collected by enable profiling and then getting profile
+// events.
+//
+//  void ProfileWorker() {
+//    Worker worker;
+//    worker.profiler.EnableProfiling();
+//    worker.DoWork();
+//    worker.profiler.DisableProfiling();
+//    // Profiling is complete, extract profiles.
+//    auto profile_events = worker.profiler.GetProfiles();
+//  }
+//
+//
+class Profiler {
+ public:
+  Profiler() : buffer_(1024, false) {}
+
+  void StartProfiling() { buffer_.SetEnabled(true); }
+  void StopProfiling() { buffer_.SetEnabled(false); }
+  void Reset() { buffer_.Reset(); }
+  std::vector<const ProfileEvent*> GetProfileEvents() {
+    std::vector<const ProfileEvent*> profile_events;
+    profile_events.reserve(buffer_.Size());
+    for (size_t i = 0; i < buffer_.Size(); i++) {
+      profile_events.push_back(buffer_.At(i));
+    }
+    return profile_events;
+  }
+
+ private:
+  friend class ScopedProfile;
+  friend class ScopedOperatorProfile;
+  ProfileBuffer* GetProfileBuffer() { return &buffer_; }
+  ProfileBuffer buffer_;
+};
+
+class ScopedProfile {
+ public:
+  // Adds a profile event to profile that begins with the construction
+  // of object and ends when the object goes out of scope.
+  // The lifetime of tag should be at least the lifetime of profiler.
+
+  ScopedProfile(Profiler* profiler, const char* tag)
+      : buffer_(nullptr), event_handle_(0) {
+    if (profiler) {
+      buffer_ = profiler->GetProfileBuffer();
+      event_handle_ =
+          buffer_->BeginEvent(tag, ProfileEvent::EventType::DEFAULT, 0);
+    }
+  }
+  ~ScopedProfile() {
+    if (buffer_) {
+      buffer_->EndEvent(event_handle_);
+    }
+  }
+
+ private:
+  ProfileBuffer* buffer_;
+  int32_t event_handle_;
+};
+
+class ScopedOperatorProfile {
+ public:
+  // Adds a profile event to profile that begins with the construction
+  // of object and ends when the object goes out of scope.
+  // The lifetime of tag should be at least the lifetime of profiler.
+  ScopedOperatorProfile(Profiler* profiler, const char* tag, int node_index)
+      : buffer_(nullptr), event_handle_(0) {
+    if (profiler) {
+      buffer_ = profiler->GetProfileBuffer();
+      event_handle_ = buffer_->BeginEvent(
+          tag, ProfileEvent::EventType::OPERATOR_INVOKE_EVENT, node_index);
+    }
+  }
+
+  ~ScopedOperatorProfile() {
+    if (buffer_) {
+      buffer_->EndEvent(event_handle_);
+    }
+  }
+
+ private:
+  ProfileBuffer* buffer_;
+  int32_t event_handle_;
+};
+
+}  // namespace profiling
+}  // namespace tflite
+
+#define VARNAME_UNIQ(name, ctr) name##ctr
+
+#define SCOPED_OPERATOR_PROFILE(profiler, node_index)    \
+  tflite::profiling::ScopedOperatorProfile VARNAME_UNIQ( \
+      _profile_, __COUNTER__)((profiler), "OpInvoke", (node_index))
+#else
+
+namespace tflite {
+namespace profiling {
+// A noop version of profiler when profiling is disabled.
+class Profiler {
+ public:
+  Profiler() {}
+  void StartProfiling() {}
+  void StopProfiling() {}
+  void Reset() {}
+  std::vector<const ProfileEvent*> GetProfileEvents() { return {}; }
+};
+}  // namespace profiling
+}  // namespace tflite
+
+#define SCOPED_OPERATOR_PROFILE(profiler, node_index)
+
+#endif  // TFLITE_PROFILING_ENABLED
+
+#endif  // TENSORFLOW_CONTRIB_LITE_PROFILING_PROFILER_H_
+
+// clang-format on
diff --git a/libs/profiling/include/profiling/profiling.h b/runtimes/libs/profiling/include/profiling/profiling.h
index ee0df1338..ee0df1338 100644
--- a/libs/profiling/include/profiling/profiling.h
+++ b/runtimes/libs/profiling/include/profiling/profiling.h
diff --git a/runtimes/libs/profiling/include/profiling/time.h b/runtimes/libs/profiling/include/profiling/time.h
new file mode 100644
index 000000000..200563aa6
--- /dev/null
+++ b/runtimes/libs/profiling/include/profiling/time.h
@@ -0,0 +1,35 @@
+/* Copyright 2018 The TensorFlow Authors. All Rights Reserved.
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+==============================================================================*/
+
+// NOTE To minimize diff with upstream tensorflow, disable clang-format
+// clang-format off
+
+// NOTE This header is derived from the following file (in TensorFlow v1.12)
+//        'externals/tensorflow/tensorflow/lite/profiling/time.h
+#ifndef TENSORFLOW_CONTRIB_LITE_PROFILING_TIME_H_
+#define TENSORFLOW_CONTRIB_LITE_PROFILING_TIME_H_
+
+#include <cstdint>
+
+namespace tflite {
+namespace profiling {
+namespace time {
+uint64_t NowMicros();
+}  // namespace time
+}  // namespace profiling
+}  // namespace tflite
+#endif  // TENSORFLOW_CONTRIB_LITE_PROFILING_TIME_H_
+
+// clang-format on
diff --git a/runtimes/libs/profiling/src/profiling/time.cpp b/runtimes/libs/profiling/src/profiling/time.cpp
new file mode 100644
index 000000000..761023e6d
--- /dev/null
+++ b/runtimes/libs/profiling/src/profiling/time.cpp
@@ -0,0 +1,55 @@
+/* Copyright 2018 The TensorFlow Authors. All Rights Reserved.
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+==============================================================================*/
+
+// NOTE To minimize diff with upstream tensorflow, disable clang-format
+// clang-format off
+
+// NOTE This header is derived from the following file (in TensorFlow v1.12)
+//        'externals/tensorflow/tensorflow/lite/profiling/time.cpp
+#include "profiling/time.h"
+
+#if defined(_MSC_VER)
+#include <chrono>  // NOLINT(build/c++11)
+#else
+#include <sys/time.h>
+#endif
+
+namespace tflite {
+namespace profiling {
+namespace time {
+
+#if defined(_MSC_VER)
+
+uint64_t NowMicros() {
+  return std::chrono::duration_cast<std::chrono::microseconds>(
+             std::chrono::system_clock::now().time_since_epoch())
+      .count();
+}
+
+#else
+
+uint64_t NowMicros() {
+  struct timeval tv;
+  gettimeofday(&tv, nullptr);
+  return static_cast<uint64_t>(tv.tv_sec) * 1000000 + tv.tv_usec;
+}
+
+#endif  // defined(_MSC_VER)
+
+}  // namespace time
+}  // namespace profiling
+}  // namespace tflite
+
+// clang-format on
diff --git a/runtimes/libs/rua/CMakeLists.txt b/runtimes/libs/rua/CMakeLists.txt
new file mode 100644
index 000000000..07ad9ea26
--- /dev/null
+++ b/runtimes/libs/rua/CMakeLists.txt
@@ -0,0 +1,4 @@
+add_subdirectory(core)
+add_subdirectory(dyn)
+add_subdirectory(anchor)
+add_subdirectory(shim)
diff --git a/runtimes/libs/rua/README.md b/runtimes/libs/rua/README.md
new file mode 100644
index 000000000..aea4ce033
--- /dev/null
+++ b/runtimes/libs/rua/README.md
@@ -0,0 +1,4 @@
+# rua
+
+_rua_ is a **RU**ntime **A**bstraction layer which allows us to switch between multiple
+Android NN rutime during execution (not loading time).
diff --git a/runtimes/libs/rua/anchor/CMakeLists.txt b/runtimes/libs/rua/anchor/CMakeLists.txt
new file mode 100644
index 000000000..6e65641f4
--- /dev/null
+++ b/runtimes/libs/rua/anchor/CMakeLists.txt
@@ -0,0 +1,9 @@
+file(GLOB_RECURSE SOURCES "src/*.cpp")
+
+add_library(nnfw_lib_rua_anchor STATIC ${SOURCES})
+set_target_properties(nnfw_lib_rua_anchor PROPERTIES POSITION_INDEPENDENT_CODE ON)
+target_include_directories(nnfw_lib_rua_anchor PUBLIC include)
+target_link_libraries(nnfw_lib_rua_anchor PUBLIC nnfw_lib_rua_core)
+target_link_libraries(nnfw_lib_rua_anchor PRIVATE nnfw_lib_rua_dyn)
+target_link_libraries(nnfw_lib_rua_anchor PRIVATE nnfw_common)
+target_link_libraries(nnfw_lib_rua_anchor PRIVATE nnfw_coverage)
diff --git a/runtimes/libs/rua/anchor/include/rua/Anchor.h b/runtimes/libs/rua/anchor/include/rua/Anchor.h
new file mode 100644
index 000000000..f6056ab4e
--- /dev/null
+++ b/runtimes/libs/rua/anchor/include/rua/Anchor.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_RUA_ANCHOR_H__
+#define __NNFW_RUA_ANCHOR_H__
+
+#include <rua/Service.h>
+
+namespace rua
+{
+
+/**
+ * @brief Global Runtime Abstraction Context
+ *
+ * "set" will have global effect (within each process).
+ */
+struct Anchor
+{
+  static const RuntimeService *get(void);
+  static void set(const RuntimeService *svc);
+};
+
+} // namespace rua
+
+#endif // __NNFW_RUA_ANCHOR_H__
diff --git a/runtimes/libs/rua/anchor/src/Anchor.cpp b/runtimes/libs/rua/anchor/src/Anchor.cpp
new file mode 100644
index 000000000..a78cca19e
--- /dev/null
+++ b/runtimes/libs/rua/anchor/src/Anchor.cpp
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "rua/Anchor.h"
+#include <rua/DynamicBinder.h>
+
+namespace
+{
+
+const rua::RuntimeService *anchored_service = rua::DynamicBinder::get();
+
+} // namespace
+
+namespace rua
+{
+
+const RuntimeService *Anchor::get(void) { return anchored_service; }
+void Anchor::set(const RuntimeService *service) { anchored_service = service; }
+
+} // namespace rua
diff --git a/runtimes/libs/rua/core/CMakeLists.txt b/runtimes/libs/rua/core/CMakeLists.txt
new file mode 100644
index 000000000..f7d41f657
--- /dev/null
+++ b/runtimes/libs/rua/core/CMakeLists.txt
@@ -0,0 +1,3 @@
+add_library(nnfw_lib_rua_core INTERFACE)
+target_include_directories(nnfw_lib_rua_core INTERFACE include)
+target_link_libraries(nnfw_lib_rua_core INTERFACE nnfw_lib_nnapi)
diff --git a/runtimes/libs/rua/core/include/rua/Service.h b/runtimes/libs/rua/core/include/rua/Service.h
new file mode 100644
index 000000000..a79524a8a
--- /dev/null
+++ b/runtimes/libs/rua/core/include/rua/Service.h
@@ -0,0 +1,158 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file Service.h
+ * @brief Core abstraction that RUA depends on.
+ */
+#ifndef __NNFW_RUA_SERVICE_H__
+#define __NNFW_RUA_SERVICE_H__
+
+#include "NeuralNetworks.h"
+
+struct ANeuralNetworksMemory;
+struct ANeuralNetworksEvent;
+
+struct ANeuralNetworksModel;
+struct ANeuralNetworksCompilation;
+struct ANeuralNetworksExecution;
+
+namespace rua
+{
+
+/**
+ * @brief A wrapper for ANeuralNetworkMemory API
+ */
+struct MemoryService
+{
+  virtual ~MemoryService() = default;
+
+  virtual int createFromFd(size_t size, int protect, int fd, size_t offset,
+                           ANeuralNetworksMemory **memory) const = 0;
+
+  virtual void free(ANeuralNetworksMemory *memory) const = 0;
+};
+
+/**
+ * @brief A wrapper for ANeuralNetworkModel API
+ */
+struct ModelService
+{
+  virtual ~ModelService() = default;
+
+  virtual int create(ANeuralNetworksModel **model) const = 0;
+
+  virtual int addOperand(ANeuralNetworksModel *model,
+                         const ANeuralNetworksOperandType *type) const = 0;
+
+  virtual int setOperandValue(ANeuralNetworksModel *model, int32_t index, const void *buffer,
+                              size_t length) const = 0;
+
+  virtual int setOperandValueFromMemory(ANeuralNetworksModel *model, int32_t index,
+                                        const ANeuralNetworksMemory *memory, size_t offset,
+                                        size_t length) const = 0;
+
+  virtual int addOperation(ANeuralNetworksModel *model, ANeuralNetworksOperationType type,
+                           uint32_t inputCount, const uint32_t *inputs, uint32_t outputCount,
+                           const uint32_t *outputs) const = 0;
+
+  virtual int identifyInputsAndOutputs(ANeuralNetworksModel *model, uint32_t inputCount,
+                                       const uint32_t *inputs, uint32_t outputCount,
+                                       const uint32_t *outputs) const = 0;
+
+  virtual int relaxComputationFloat32toFloat16(ANeuralNetworksModel *model, bool allow) const = 0;
+
+  virtual int finish(ANeuralNetworksModel *model) const = 0;
+
+  virtual void free(ANeuralNetworksModel *model) const = 0;
+};
+
+/**
+ * @brief A wrapper for ANeuralNetworkCompilation API
+ */
+struct CompilationService
+{
+  virtual ~CompilationService() = default;
+
+  virtual int create(ANeuralNetworksModel *model,
+                     ANeuralNetworksCompilation **compilation) const = 0;
+
+  virtual int setPreference(ANeuralNetworksCompilation *compilation, int32_t preference) const = 0;
+  virtual int finish(ANeuralNetworksCompilation *compilation) const = 0;
+
+  virtual void free(ANeuralNetworksCompilation *compilation) const = 0;
+};
+
+/**
+ * @brief A wrapper for ANeuralNetworkExecution API
+ */
+struct ExecutionService
+{
+  virtual ~ExecutionService() = default;
+
+  virtual int create(ANeuralNetworksCompilation *compilation,
+                     ANeuralNetworksExecution **execution) const = 0;
+
+  virtual void free(ANeuralNetworksExecution *execution) const = 0;
+
+  virtual int setInput(ANeuralNetworksExecution *execution, int32_t index,
+                       const ANeuralNetworksOperandType *type, const void *buffer,
+                       size_t length) const = 0;
+
+  virtual int setInputFromMemory(ANeuralNetworksExecution *execution, int32_t index,
+                                 const ANeuralNetworksOperandType *type,
+                                 const ANeuralNetworksMemory *memory, size_t offset,
+                                 size_t length) const = 0;
+
+  virtual int setOutput(ANeuralNetworksExecution *execution, int32_t index,
+                        const ANeuralNetworksOperandType *type, void *buffer,
+                        size_t length) const = 0;
+
+  virtual int setOutputFromMemory(ANeuralNetworksExecution *execution, int32_t index,
+                                  const ANeuralNetworksOperandType *type,
+                                  const ANeuralNetworksMemory *memory, size_t offset,
+                                  size_t length) const = 0;
+
+  virtual int startCompute(ANeuralNetworksExecution *execution,
+                           ANeuralNetworksEvent **event) const = 0;
+};
+
+/**
+ * @brief A wrapper for ANeuralNetworkEvent API
+ */
+struct EventService
+{
+  virtual int wait(ANeuralNetworksEvent *event) const = 0;
+  virtual void free(ANeuralNetworksEvent *event) const = 0;
+};
+
+/**
+ * @brief A wrapper for Android NN rutime itself
+ */
+struct RuntimeService
+{
+  virtual ~RuntimeService() = default;
+
+  virtual const MemoryService *memory(void) const = 0;
+  virtual const ModelService *model(void) const = 0;
+  virtual const CompilationService *compilation(void) const = 0;
+  virtual const ExecutionService *execution(void) const = 0;
+  virtual const EventService *event(void) const = 0;
+};
+
+} // namespace rua
+
+#endif // __NNFW_RUA_SERVICE_H__
diff --git a/runtimes/libs/rua/dyn/CMakeLists.txt b/runtimes/libs/rua/dyn/CMakeLists.txt
new file mode 100644
index 000000000..3f9ac8928
--- /dev/null
+++ b/runtimes/libs/rua/dyn/CMakeLists.txt
@@ -0,0 +1,8 @@
+file(GLOB_RECURSE SOURCES "src/*.cpp")
+
+add_library(nnfw_lib_rua_dyn STATIC ${SOURCES})
+set_target_properties(nnfw_lib_rua_dyn PROPERTIES POSITION_INDEPENDENT_CODE ON)
+target_include_directories(nnfw_lib_rua_dyn PUBLIC include)
+target_link_libraries(nnfw_lib_rua_dyn PUBLIC nnfw_lib_rua_core)
+target_link_libraries(nnfw_lib_rua_dyn PRIVATE nnfw_common)
+target_link_libraries(nnfw_lib_rua_dyn PRIVATE nnfw_coverage)
diff --git a/runtimes/libs/rua/dyn/include/rua/DynamicBinder.h b/runtimes/libs/rua/dyn/include/rua/DynamicBinder.h
new file mode 100644
index 000000000..8ce0c42f8
--- /dev/null
+++ b/runtimes/libs/rua/dyn/include/rua/DynamicBinder.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_RUA_DYNAMIC_BINDER_H__
+#define __NNFW_RUA_DYNAMIC_BINDER_H__
+
+#include <rua/Service.h>
+
+namespace rua
+{
+
+/**
+ * @brief Bind Android NN runtime implementation via dlopen & dlsym
+ */
+struct DynamicBinder
+{
+  static const rua::RuntimeService *get(void);
+};
+
+} // namespace
+
+#endif // __NNFW_RUA_DYNAMIC_BINDER_H__
diff --git a/runtimes/libs/rua/dyn/src/DynamicBinder.cpp b/runtimes/libs/rua/dyn/src/DynamicBinder.cpp
new file mode 100644
index 000000000..68dae6262
--- /dev/null
+++ b/runtimes/libs/rua/dyn/src/DynamicBinder.cpp
@@ -0,0 +1,353 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "rua/DynamicBinder.h"
+
+#include "NeuralNetworksLoadHelpers.h"
+
+using namespace rua;
+
+//
+// Memory
+//
+namespace
+{
+
+typedef int (*ANeuralNetworksMemory_createFromFd_fn)(size_t size, int protect, int fd,
+                                                     size_t offset, ANeuralNetworksMemory **memory);
+
+typedef void (*ANeuralNetworksMemory_free_fn)(ANeuralNetworksMemory *memory);
+
+struct MemoryServiceImpl final : public MemoryService
+{
+  int createFromFd(size_t size, int protect, int fd, size_t offset,
+                   ANeuralNetworksMemory **memory) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksMemory_createFromFd);
+    EXECUTE_FUNCTION_RETURN(size, protect, fd, offset, memory);
+  }
+
+  void free(ANeuralNetworksMemory *memory) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksMemory_free);
+    EXECUTE_FUNCTION(memory);
+  }
+};
+
+} // namespace
+
+//
+// Event
+//
+namespace
+{
+
+typedef int (*ANeuralNetworksEvent_wait_fn)(ANeuralNetworksEvent *event);
+
+typedef void (*ANeuralNetworksEvent_free_fn)(ANeuralNetworksEvent *event);
+
+struct EventServiceImpl final : public EventService
+{
+
+  int wait(ANeuralNetworksEvent *event) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksEvent_wait);
+    EXECUTE_FUNCTION_RETURN(event);
+  }
+
+  void free(ANeuralNetworksEvent *event) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksEvent_free);
+    EXECUTE_FUNCTION(event);
+  }
+};
+
+} // namespace
+
+//
+// Model
+//
+namespace
+{
+
+typedef int (*ANeuralNetworksModel_create_fn)(ANeuralNetworksModel **model);
+
+typedef int (*ANeuralNetworksModel_finish_fn)(ANeuralNetworksModel *model);
+
+typedef void (*ANeuralNetworksModel_free_fn)(ANeuralNetworksModel *model);
+
+typedef int (*ANeuralNetworksModel_addOperand_fn)(ANeuralNetworksModel *model,
+                                                  const ANeuralNetworksOperandType *type);
+
+typedef int (*ANeuralNetworksModel_setOperandValue_fn)(ANeuralNetworksModel *model, int32_t index,
+                                                       const void *buffer, size_t length);
+
+typedef int (*ANeuralNetworksModel_setOperandValueFromMemory_fn)(
+    ANeuralNetworksModel *model, int32_t index, const ANeuralNetworksMemory *memory, size_t offset,
+    size_t length);
+
+typedef int (*ANeuralNetworksModel_addOperation_fn)(ANeuralNetworksModel *model,
+                                                    ANeuralNetworksOperationType type,
+                                                    uint32_t inputCount, const uint32_t *inputs,
+                                                    uint32_t outputCount, const uint32_t *outputs);
+
+typedef int (*ANeuralNetworksModel_identifyInputsAndOutputs_fn)(ANeuralNetworksModel *model,
+                                                                uint32_t inputCount,
+                                                                const uint32_t *inputs,
+                                                                uint32_t outputCount,
+                                                                const uint32_t *outputs);
+
+typedef int (*ANeuralNetworksModel_relaxComputationFloat32toFloat16_fn)(ANeuralNetworksModel *model,
+                                                                        bool allow);
+
+struct ModelServiceImpl final : public ModelService
+{
+  int create(ANeuralNetworksModel **model) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksModel_create);
+    EXECUTE_FUNCTION_RETURN(model);
+  }
+
+  int addOperand(ANeuralNetworksModel *model, const ANeuralNetworksOperandType *type) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksModel_addOperand);
+    EXECUTE_FUNCTION_RETURN(model, type);
+  }
+  int setOperandValue(ANeuralNetworksModel *model, int32_t index, const void *buffer,
+                      size_t length) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksModel_setOperandValue);
+    EXECUTE_FUNCTION_RETURN(model, index, buffer, length);
+  }
+
+  int setOperandValueFromMemory(ANeuralNetworksModel *model, int32_t index,
+                                const ANeuralNetworksMemory *memory, size_t offset,
+                                size_t length) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksModel_setOperandValueFromMemory);
+    EXECUTE_FUNCTION_RETURN(model, index, memory, offset, length);
+  }
+
+  int addOperation(ANeuralNetworksModel *model, ANeuralNetworksOperationType type,
+                   uint32_t inputCount, const uint32_t *inputs, uint32_t outputCount,
+                   const uint32_t *outputs) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksModel_addOperation);
+    EXECUTE_FUNCTION_RETURN(model, type, inputCount, inputs, outputCount, outputs);
+  }
+
+  int identifyInputsAndOutputs(ANeuralNetworksModel *model, uint32_t inputCount,
+                               const uint32_t *inputs, uint32_t outputCount,
+                               const uint32_t *outputs) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksModel_identifyInputsAndOutputs);
+    EXECUTE_FUNCTION_RETURN(model, inputCount, inputs, outputCount, outputs);
+  }
+
+  int relaxComputationFloat32toFloat16(ANeuralNetworksModel *model, bool allow) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksModel_relaxComputationFloat32toFloat16);
+    EXECUTE_FUNCTION_RETURN(model, allow);
+  }
+
+  int finish(ANeuralNetworksModel *model) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksModel_finish);
+    EXECUTE_FUNCTION_RETURN(model);
+  }
+
+  void free(ANeuralNetworksModel *model) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksModel_free);
+    EXECUTE_FUNCTION(model);
+  }
+};
+
+} // namespace
+
+//
+// Compilation
+//
+namespace
+{
+
+typedef int (*ANeuralNetworksCompilation_create_fn)(ANeuralNetworksModel *model,
+                                                    ANeuralNetworksCompilation **compilation);
+
+typedef void (*ANeuralNetworksCompilation_free_fn)(ANeuralNetworksCompilation *compilation);
+
+typedef int (*ANeuralNetworksCompilation_setPreference_fn)(ANeuralNetworksCompilation *compilation,
+                                                           int32_t preference);
+
+typedef int (*ANeuralNetworksCompilation_finish_fn)(ANeuralNetworksCompilation *compilation);
+
+struct CompilationServiceImpl : public CompilationService
+{
+
+  int create(ANeuralNetworksModel *model, ANeuralNetworksCompilation **compilation) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksCompilation_create);
+    EXECUTE_FUNCTION_RETURN(model, compilation);
+  }
+
+  int setPreference(ANeuralNetworksCompilation *compilation, int32_t preference) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksCompilation_setPreference);
+    EXECUTE_FUNCTION_RETURN(compilation, preference);
+  }
+
+  int finish(ANeuralNetworksCompilation *compilation) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksCompilation_finish);
+    EXECUTE_FUNCTION_RETURN(compilation);
+  }
+
+  void free(ANeuralNetworksCompilation *compilation) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksCompilation_free);
+    EXECUTE_FUNCTION(compilation);
+  }
+};
+
+} // namespace
+
+//
+// Exceution
+//
+namespace
+{
+
+typedef int (*ANeuralNetworksExecution_create_fn)(ANeuralNetworksCompilation *compilation,
+                                                  ANeuralNetworksExecution **execution);
+
+typedef void (*ANeuralNetworksExecution_free_fn)(ANeuralNetworksExecution *execution);
+
+typedef int (*ANeuralNetworksExecution_setInput_fn)(ANeuralNetworksExecution *execution,
+                                                    int32_t index,
+                                                    const ANeuralNetworksOperandType *type,
+                                                    const void *buffer, size_t length);
+
+typedef int (*ANeuralNetworksExecution_setInputFromMemory_fn)(
+    ANeuralNetworksExecution *execution, int32_t index, const ANeuralNetworksOperandType *type,
+    const ANeuralNetworksMemory *memory, size_t offset, size_t length);
+
+typedef int (*ANeuralNetworksExecution_setOutput_fn)(ANeuralNetworksExecution *execution,
+                                                     int32_t index,
+                                                     const ANeuralNetworksOperandType *type,
+                                                     void *buffer, size_t length);
+
+typedef int (*ANeuralNetworksExecution_setOutputFromMemory_fn)(
+    ANeuralNetworksExecution *execution, int32_t index, const ANeuralNetworksOperandType *type,
+    const ANeuralNetworksMemory *memory, size_t offset, size_t length);
+
+typedef int (*ANeuralNetworksExecution_startCompute_fn)(ANeuralNetworksExecution *execution,
+                                                        ANeuralNetworksEvent **event);
+
+struct ExecutionServiceImpl : public ExecutionService
+{
+
+  int create(ANeuralNetworksCompilation *compilation,
+             ANeuralNetworksExecution **execution) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksExecution_create);
+    EXECUTE_FUNCTION_RETURN(compilation, execution);
+  }
+
+  int setInput(ANeuralNetworksExecution *execution, int32_t index,
+               const ANeuralNetworksOperandType *type, const void *buffer,
+               size_t length) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksExecution_setInput);
+    EXECUTE_FUNCTION_RETURN(execution, index, type, buffer, length);
+  }
+
+  int setInputFromMemory(ANeuralNetworksExecution *execution, int32_t index,
+                         const ANeuralNetworksOperandType *type,
+                         const ANeuralNetworksMemory *memory, size_t offset,
+                         size_t length) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksExecution_setInputFromMemory);
+    EXECUTE_FUNCTION_RETURN(execution, index, type, memory, offset, length);
+  }
+
+  int setOutput(ANeuralNetworksExecution *execution, int32_t index,
+                const ANeuralNetworksOperandType *type, void *buffer, size_t length) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksExecution_setOutput);
+    EXECUTE_FUNCTION_RETURN(execution, index, type, buffer, length);
+  }
+
+  int setOutputFromMemory(ANeuralNetworksExecution *execution, int32_t index,
+                          const ANeuralNetworksOperandType *type,
+                          const ANeuralNetworksMemory *memory, size_t offset,
+                          size_t length) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksExecution_setOutputFromMemory);
+    EXECUTE_FUNCTION_RETURN(execution, index, type, memory, offset, length);
+  }
+
+  int startCompute(ANeuralNetworksExecution *execution, ANeuralNetworksEvent **event) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksExecution_startCompute);
+    EXECUTE_FUNCTION_RETURN(execution, event);
+  }
+
+  void free(ANeuralNetworksExecution *execution) const override
+  {
+    LOAD_FUNCTION(ANeuralNetworksExecution_free);
+    EXECUTE_FUNCTION(execution);
+  }
+};
+
+} // namespace
+
+//
+// Runtime
+//
+namespace
+{
+
+class RuntimeImpl final : public RuntimeService
+{
+public:
+  const MemoryService *memory(void) const override { return &_memory; }
+  const EventService *event(void) const override { return &_event; }
+
+  const ModelService *model(void) const override { return &_model; }
+  const CompilationService *compilation(void) const override { return &_compilation; }
+  const ExecutionService *execution(void) const override { return &_execution; }
+
+private:
+  MemoryServiceImpl _memory;
+  EventServiceImpl _event;
+
+  ModelServiceImpl _model;
+  CompilationServiceImpl _compilation;
+  ExecutionServiceImpl _execution;
+};
+
+} // namespace
+
+namespace rua
+{
+
+const RuntimeService *DynamicBinder::get(void)
+{
+  static RuntimeImpl runtime;
+  return &runtime;
+}
+
+} // namespace rua
diff --git a/runtimes/libs/rua/shim/CMakeLists.txt b/runtimes/libs/rua/shim/CMakeLists.txt
new file mode 100644
index 000000000..814db5f7f
--- /dev/null
+++ b/runtimes/libs/rua/shim/CMakeLists.txt
@@ -0,0 +1,4 @@
+add_library(nnfw_lib_rua_shim INTERFACE)
+target_include_directories(nnfw_lib_rua_shim INTERFACE include)
+target_link_libraries(nnfw_lib_rua_shim INTERFACE nnfw_lib_rua_core)
+target_link_libraries(nnfw_lib_rua_shim INTERFACE nnfw_lib_rua_anchor)
diff --git a/runtimes/libs/rua/shim/include/rua/Shim.h b/runtimes/libs/rua/shim/include/rua/Shim.h
new file mode 100644
index 000000000..07a4bb2fd
--- /dev/null
+++ b/runtimes/libs/rua/shim/include/rua/Shim.h
@@ -0,0 +1,192 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_RUA_SHIM_H__
+#define __NNFW_RUA_SHIM_H__
+
+#include <rua/Anchor.h>
+
+//
+// Memory
+//
+inline int ANeuralNetworksMemory_createFromFd(size_t size, int protect, int fd, size_t offset,
+                                              ANeuralNetworksMemory **memory)
+{
+  return rua::Anchor::get()->memory()->createFromFd(size, protect, fd, offset, memory);
+}
+
+inline void ANeuralNetworksMemory_free(ANeuralNetworksMemory *memory)
+{
+  return rua::Anchor::get()->memory()->free(memory);
+}
+
+//
+// Event
+//
+inline int ANeuralNetworksEvent_wait(ANeuralNetworksEvent *event)
+{
+  return rua::Anchor::get()->event()->wait(event);
+}
+
+inline void ANeuralNetworksEvent_free(ANeuralNetworksEvent *event)
+{
+  return rua::Anchor::get()->event()->free(event);
+}
+
+//
+// Model
+//
+inline int ANeuralNetworksModel_create(ANeuralNetworksModel **model)
+{
+  return rua::Anchor::get()->model()->create(model);
+}
+
+inline int ANeuralNetworksModel_addOperand(ANeuralNetworksModel *model,
+                                           const ANeuralNetworksOperandType *type)
+{
+  return rua::Anchor::get()->model()->addOperand(model, type);
+}
+
+inline int ANeuralNetworksModel_setOperandValue(ANeuralNetworksModel *model, int32_t index,
+                                                const void *buffer, size_t length)
+{
+  return rua::Anchor::get()->model()->setOperandValue(model, index, buffer, length);
+}
+
+inline int ANeuralNetworksModel_setOperandValueFromMemory(ANeuralNetworksModel *model,
+                                                          int32_t index,
+                                                          const ANeuralNetworksMemory *memory,
+                                                          size_t offset, size_t length)
+{
+  return rua::Anchor::get()->model()->setOperandValueFromMemory(model, index, memory, offset,
+                                                                length);
+}
+
+inline int ANeuralNetworksModel_addOperation(ANeuralNetworksModel *model,
+                                             ANeuralNetworksOperationType type, uint32_t inputCount,
+                                             const uint32_t *inputs, uint32_t outputCount,
+                                             const uint32_t *outputs)
+{
+  return rua::Anchor::get()->model()->addOperation(model, type, inputCount, inputs, outputCount,
+                                                   outputs);
+}
+
+inline int ANeuralNetworksModel_identifyInputsAndOutputs(ANeuralNetworksModel *model,
+                                                         uint32_t inputCount,
+                                                         const uint32_t *inputs,
+                                                         uint32_t outputCount,
+                                                         const uint32_t *outputs)
+{
+  return rua::Anchor::get()->model()->identifyInputsAndOutputs(model, inputCount, inputs,
+                                                               outputCount, outputs);
+}
+
+inline int ANeuralNetworksModel_relaxComputationFloat32toFloat16(ANeuralNetworksModel *model,
+                                                                 bool allow)
+{
+  return rua::Anchor::get()->model()->relaxComputationFloat32toFloat16(model, allow);
+}
+
+inline int ANeuralNetworksModel_finish(ANeuralNetworksModel *model)
+{
+  return rua::Anchor::get()->model()->finish(model);
+}
+
+inline void ANeuralNetworksModel_free(ANeuralNetworksModel *model)
+{
+  return rua::Anchor::get()->model()->free(model);
+}
+
+//
+// Compilation
+//
+inline int ANeuralNetworksCompilation_create(ANeuralNetworksModel *model,
+                                             ANeuralNetworksCompilation **compilation)
+{
+  return rua::Anchor::get()->compilation()->create(model, compilation);
+}
+
+inline int ANeuralNetworksCompilation_setPreference(ANeuralNetworksCompilation *compilation,
+                                                    int32_t preference)
+{
+  return rua::Anchor::get()->compilation()->setPreference(compilation, preference);
+}
+
+inline int ANeuralNetworksCompilation_finish(ANeuralNetworksCompilation *compilation)
+{
+  return rua::Anchor::get()->compilation()->finish(compilation);
+}
+
+inline void ANeuralNetworksCompilation_free(ANeuralNetworksCompilation *compilation)
+{
+  return rua::Anchor::get()->compilation()->free(compilation);
+}
+
+//
+// Execution
+//
+inline int ANeuralNetworksExecution_create(ANeuralNetworksCompilation *compilation,
+                                           ANeuralNetworksExecution **execution)
+{
+  return rua::Anchor::get()->execution()->create(compilation, execution);
+}
+
+inline int ANeuralNetworksExecution_setInput(ANeuralNetworksExecution *execution, int32_t index,
+                                             const ANeuralNetworksOperandType *type,
+                                             const void *buffer, size_t length)
+{
+  return rua::Anchor::get()->execution()->setInput(execution, index, type, buffer, length);
+}
+
+inline int ANeuralNetworksExecution_setInputFromMemory(ANeuralNetworksExecution *execution,
+                                                       int32_t index,
+                                                       const ANeuralNetworksOperandType *type,
+                                                       const ANeuralNetworksMemory *memory,
+                                                       size_t offset, size_t length)
+{
+  return rua::Anchor::get()->execution()->setInputFromMemory(execution, index, type, memory, offset,
+                                                             length);
+}
+
+inline int ANeuralNetworksExecution_setOutput(ANeuralNetworksExecution *execution, int32_t index,
+                                              const ANeuralNetworksOperandType *type, void *buffer,
+                                              size_t length)
+{
+  return rua::Anchor::get()->execution()->setOutput(execution, index, type, buffer, length);
+}
+
+inline int ANeuralNetworksExecution_setOutputFromMemory(ANeuralNetworksExecution *execution,
+                                                        int32_t index,
+                                                        const ANeuralNetworksOperandType *type,
+                                                        const ANeuralNetworksMemory *memory,
+                                                        size_t offset, size_t length)
+{
+  return rua::Anchor::get()->execution()->setOutputFromMemory(execution, index, type, memory,
+                                                              offset, length);
+}
+
+inline int ANeuralNetworksExecution_startCompute(ANeuralNetworksExecution *execution,
+                                                 ANeuralNetworksEvent **event)
+{
+  return rua::Anchor::get()->execution()->startCompute(execution, event);
+}
+
+inline void ANeuralNetworksExecution_free(ANeuralNetworksExecution *execution)
+{
+  return rua::Anchor::get()->execution()->free(execution);
+}
+
+#endif // __NNFW_RUA_SHIM_H__
diff --git a/runtimes/libs/srcn/CMakeLists.txt b/runtimes/libs/srcn/CMakeLists.txt
new file mode 100644
index 000000000..f6226670c
--- /dev/null
+++ b/runtimes/libs/srcn/CMakeLists.txt
@@ -0,0 +1,24 @@
+if(NOT BUILD_SRCN_KERNEL)
+  message(STATUS "SRCN kernel library build: disabled")
+  return()
+else(NOT BUILD_SRCN_KERNEL)
+  message(STATUS "SRCN kernel library build: OK")
+endif()
+
+# Find and use pre-installed OpenMP
+find_package(OpenMP QUIET)
+if(NOT OpenMP_FOUND)
+  return()
+endif(NOT OpenMP_FOUND)
+
+file(GLOB_RECURSE SOURCES "*.cc")
+file(GLOB_RECURSE TESTS "*_test.cc")
+list(REMOVE_ITEM SOURCES ${TESTS})
+
+add_library(nnfw_lib_srcn STATIC ${SOURCES})
+target_include_directories(nnfw_lib_srcn PUBLIC include)
+target_link_libraries(nnfw_lib_srcn PRIVATE ${OpenMP_CXX_LIBRARIES})
+target_compile_options(nnfw_lib_srcn PRIVATE ${OpenMP_CXX_FLAGS})
+target_compile_definitions(nnfw_lib_srcn PRIVATE TIZEN) # ANDROID or TIZEN
+#target_compile_definitions(nnfw_lib_srcn PRIVATE NCNN) # Enable if ready
+set_target_properties(nnfw_lib_srcn PROPERTIES POSITION_INDEPENDENT_CODE ON)
diff --git a/runtimes/libs/srcn/include/srcn/conv_type.h b/runtimes/libs/srcn/include/srcn/conv_type.h
new file mode 100644
index 000000000..59152a094
--- /dev/null
+++ b/runtimes/libs/srcn/include/srcn/conv_type.h
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_SRCN_CONV_TYPE_H__
+#define __NNFW_SRCN_CONV_TYPE_H__
+
+namespace nnfw
+{
+namespace srcn
+{
+
+enum convType_t
+{
+  row_major = 0,
+  col_major
+};
+
+struct convMat_t
+{
+  int w;
+  int h;
+  int c;
+  int n;
+  float *data;
+};
+
+struct convParams_t
+{
+  int kernel_w;
+  int kernel_h;
+  int stride_w;
+  int stride_h;
+  int dilation_w;
+  int dilation_h;
+  int padding;
+  int pad_w;
+  int pad_h;
+};
+
+struct winogradParams_t
+{
+  int kernel_w;
+  int kernel_h;
+  int stride_w;
+  int stride_h;
+  int dilation_w;
+  int dilation_h;
+  int batch;
+  int w;
+  int h;
+  int inch;
+  int outch;
+  int num_threads;
+  convType_t conv_type;
+  float *weight_data;
+};
+
+} // namespace srcn
+} // namespace nnfw
+
+#endif // __NNFW_SRCN_CONV_TYPE_H__
diff --git a/runtimes/libs/srcn/include/srcn/srcn_conv.h b/runtimes/libs/srcn/include/srcn/srcn_conv.h
new file mode 100644
index 000000000..11130c0db
--- /dev/null
+++ b/runtimes/libs/srcn/include/srcn/srcn_conv.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_SRCN_CONV_H__
+#define __NNFW_SRCN_CONV_H__
+
+#include "conv_type.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+int check_winograd(winogradParams_t &params);
+
+float *trans_weight2winograd(winogradParams_t &params, unsigned int *size = NULL);
+
+void winograd_release(float *winograd_weight);
+
+void srcn_convolution2D(const convMat_t &in_mat, const convMat_t &weights_mat, convMat_t &out_mat,
+                        const convParams_t &in_param, const float *winograd_weight, int num_threads,
+                        convType_t conv_type);
+
+void srcn_deconvolution2D(const convMat_t &in_mat, const convMat_t &weights_mat, convMat_t &out_mat,
+                          const convParams_t &in_param, int num_threads, convType_t conv_type);
+
+void *trans_weight2sparse(const convMat_t &weights_mat);
+
+void sparse_release(const int outch, void *ptr);
+
+void srcn_sparse_convolution2D(const convMat_t &in_mat, convMat_t &out_mat,
+                               const convParams_t &in_param, const void *sparse_weight,
+                               int number_threas, convType_t conv_type);
+
+void srcn_batch_convolution2D(const convMat_t &in_mat, const convMat_t &weights_mat,
+                              convMat_t &out_mat, const convParams_t &in_param,
+                              const float *winograd_weight, int num_threads, convType_t conv_type);
+
+void srcn_convolution2D_gpu(const convMat_t &in_mat, const convMat_t &weights_mat,
+                            convMat_t &out_mat, const convParams_t &in_param, convType_t conv_type);
+
+void srcn_convolution2D_dpu(const convMat_t &in_mat, const convMat_t &weights_mat,
+                            convMat_t &out_mat, const convParams_t &in_param, convType_t conv_type);
+
+void srcn_depthwise_conv(const convMat_t &in_mat, const convMat_t &weights_mat, convMat_t &out_mat,
+                         const convMat_t &bias, const convParams_t &in_param, int num_threads,
+                         convType_t conv_type);
+
+} // namespace srcn
+} // namespace nnfw
+
+#endif // __NNFW_SRCN_CONV_H__
diff --git a/runtimes/libs/srcn/src/common.h b/runtimes/libs/srcn/src/common.h
new file mode 100644
index 000000000..e8abc1440
--- /dev/null
+++ b/runtimes/libs/srcn/src/common.h
@@ -0,0 +1,162 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_SRCN_COMMON_H__
+#define __NNFW_SRCN_COMMON_H__
+
+#include <string.h>
+#include <limits>
+#include <arm_neon.h>
+
+#include "srcn/conv_type.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+#define sizeof_RhsScalar 4
+#define sizeof_LhsScalar 4
+#define sizeof_ResScalar 4
+
+#define MIN(a, b) (a) > (b) ? (b) : (a)
+#define MAX(a, b) (a) > (b) ? (a) : (b)
+
+enum shardType_t
+{
+  shardByCol = 0,
+  shardByRow
+};
+
+#ifdef TIZEN
+#define L1_CACHE_SIZE (16536 * 2)
+#define L2_CACHE_SIZE (524288 * 2)
+#define L3_CACHE_SIZE (0) // no L3
+#define MAX_K (512)
+// single-thread
+#define GEN_COL (1440)
+// multi-threads
+#define MAX_COL (90)
+#define MIN_COL (32)
+#elif defined ANDROID
+#define L1_CACHE_SIZE (16536 * 4)
+#define L2_CACHE_SIZE (524288 * 8)
+#define L3_CACHE_SIZE (0) //(524288 * 8)  //no L3
+#define MAX_K (512 * 2)
+// single-thread
+#define GEN_COL (1440)
+// multi-threads
+#if __aarch64__
+#define MAX_COL (1024)
+#else
+#define MAX_COL (90)
+#endif
+#define MIN_COL (32)
+#endif
+
+enum
+{
+  USE_COMMON_KENEL = 0,
+  USE_12BIT_KERNEL,
+  USE_NONZERO_KERENL
+};
+
+template <typename T> static T divup(const T &x, const T &y)
+{
+  return static_cast<T>((x + y - 1) / y);
+}
+
+#ifdef NCNN
+static inline size_t alignSize(size_t sz, int n) { return (sz + n - 1) / n * n; }
+
+static inline size_t alignBy2(size_t sz) { return (sz + 1) & -2; }
+#endif // NCNN
+
+static inline int32_t BitNot(int32_t a) { return ~a; }
+
+static inline int32_t MaskIfNonZero(int32_t a)
+{
+  static int32_t zero = 0;
+  return a ? BitNot(zero) : zero;
+}
+
+static inline int32_t BitAnd(int32_t a, int32_t b) { return a & b; }
+
+static inline int32_t ShiftRight(int32_t a, int offset) { return a >> offset; }
+
+static inline int32_t MaskIfLessThan(int32_t a, int32_t b) { return MaskIfNonZero(a < b); }
+
+static inline int32_t MaskIfGreaterThan(int32_t a, int32_t b) { return MaskIfNonZero(a > b); }
+
+static inline int32_t Add(int32_t a, int32_t b) { return a + b; }
+
+static inline int32_t RoundingDivideByPOT(int32_t x, int exponent)
+{
+  const int32_t mask = (1ll << exponent) - 1;
+  const int32_t zero = 0;
+  const int32_t one = 1;
+  const int32_t remainder = BitAnd(x, mask);
+  const int32_t threshold = Add(ShiftRight(mask, 1), BitAnd(MaskIfLessThan(x, zero), one));
+  return Add(ShiftRight(x, exponent), BitAnd(MaskIfGreaterThan(remainder, threshold), one));
+}
+static inline int32_t SaturatingRoundingDoublingHighMul(int32_t a, int32_t b)
+{
+  bool overflow = a == b && a == std::numeric_limits<int32_t>::min();
+  int64_t a_64(a);
+  int64_t b_64(b);
+  int64_t ab_64 = a_64 * b_64;
+  int32_t nudge = ab_64 >= 0 ? (1 << 30) : (1 - (1 << 30));
+  int32_t ab_x2_high32 = static_cast<int32_t>((ab_64 + nudge) / (1ll << 31));
+  return overflow ? std::numeric_limits<int32_t>::max() : ab_x2_high32;
+}
+
+static inline int32_t MultiplyByQuantizedMultiplier(int32_t x, int32_t quantized_multiplier,
+                                                    int shift)
+{
+  int left_shift = shift > 0 ? shift : 0;
+  int right_shift = shift > 0 ? 0 : -shift;
+  return RoundingDivideByPOT(
+      SaturatingRoundingDoublingHighMul(x * (1 << left_shift), quantized_multiplier), right_shift);
+}
+
+static inline int32x4_t SaturatingRoundingDoublingHighMulV(int32x4_t a, int32x4_t b)
+{
+  return vqrdmulhq_s32(a, b);
+}
+
+static inline int32x4_t RoundingDivideByPOTV(int32x4_t x, int exponent)
+{
+  const int32x4_t shift_vec = vdupq_n_s32(-exponent);
+  const int32x4_t fixup = vshrq_n_s32(vandq_s32(x, shift_vec), 31);
+  const int32x4_t fixed_up_x = vqaddq_s32(x, fixup);
+  return vrshlq_s32(fixed_up_x, shift_vec);
+}
+
+static inline int32x4_t MultiplyByQuantizedMultiplierV(int32x4_t x, int32_t quantized_multiplier,
+                                                       int shift)
+{
+  int left_shift = shift > 0 ? shift : 0;
+  int right_shift = shift > 0 ? 0 : -shift;
+  return RoundingDivideByPOTV(
+      SaturatingRoundingDoublingHighMulV(vrshlq_s32(x, vdupq_n_s32(left_shift)),
+                                         vdupq_n_s32(quantized_multiplier)),
+      right_shift);
+}
+
+} // namespace srcn
+} // namespace nnfw
+
+#endif // __NNFW_SRCN_COMMON_H__
diff --git a/runtimes/libs/srcn/src/conv_sgemm_multithreads.cc b/runtimes/libs/srcn/src/conv_sgemm_multithreads.cc
new file mode 100644
index 000000000..91a4533bd
--- /dev/null
+++ b/runtimes/libs/srcn/src/conv_sgemm_multithreads.cc
@@ -0,0 +1,483 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifdef _OPENMP
+#include <omp.h>
+#endif
+
+#include "srcn/conv_type.h"
+#include "common.h"
+#include "sgemm_kernel.h"
+#include "sgemm_pack.h"
+#include "conv_sgemm_multithreads.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+void conv_sgemm_multithreads::param_init()
+{
+#if __aarch64__
+  if (conv_type_ == row_major)
+  {
+    mr_ = 8;
+    nr_ = 12;
+  }
+  else if (conv_type_ == col_major)
+  {
+#ifdef BATCH_DILATION_FIX
+    if (out_mat_.n > 1)
+    {
+
+      mr_ = 24;
+      nr_ = 4;
+    }
+    else
+#endif // BATCH_DILATION_FIX
+    {
+      if (m_ > n_)
+      {
+        mr_ = 24;
+        nr_ = 4;
+      }
+      else
+      {
+        mr_ = 12;
+        nr_ = 8;
+      }
+    }
+  }
+#else  // __aarch64__
+  if (conv_type_ == row_major)
+  {
+    mr_ = 6;
+    nr_ = 8;
+  }
+  else if (conv_type_ == col_major)
+  {
+    mr_ = 8;
+    nr_ = 6;
+  }
+#endif // __aarch64__
+  int col = n_;
+
+  if (m_ > n_)
+  {
+    shard_type_ = shardByRow;
+    col = m_;
+  }
+  else
+  {
+    shard_type_ = shardByCol;
+  }
+
+  int th_base = divup(col, num_threads_);
+
+  th_base = MIN(MAX(th_base, MIN_COL), MAX_COL);
+
+  int k_div = (nr_ * sizeof_RhsScalar);
+  int k_sub = (mr_ * nr_ * sizeof_ResScalar);
+
+  const int k_cache = MIN(divup((int)(L1_CACHE_SIZE - k_sub), (int)k_div * 2), MAX_K);
+  bk_ = MIN(k_cache, k_);
+
+  if (shard_type_ == shardByCol)
+  {
+    int m_sub = (bk_ * nr_ * sizeof_RhsScalar);
+    int m_div = (sizeof_LhsScalar * bk_ * 2 * num_threads_);
+    if (L3_CACHE_SIZE)
+      m_div = (sizeof_LhsScalar * bk_ * 2);
+    int m_cache = divup((L2_CACHE_SIZE - m_sub), m_div);
+    bm_ = MIN(m_cache, m_);
+
+    bn_ = MIN(th_base, n_);
+    if (L3_CACHE_SIZE)
+    {
+      int n_sub = (bk_ * bm_ * sizeof_RhsScalar);
+      int n_div = (sizeof_LhsScalar * bk_ * 2 * num_threads_);
+      int n_cache = divup((L3_CACHE_SIZE - n_sub), n_div);
+      bn_ = MIN(n_cache, bn_);
+    }
+  }
+  else
+  {
+    int n_sub = (bk_ * mr_ * sizeof_LhsScalar);
+    int n_div = (sizeof_LhsScalar * bk_ * 2 * num_threads_);
+    if (L3_CACHE_SIZE)
+      n_div = (sizeof_LhsScalar * bk_ * 2);
+    int n_cache = divup((L2_CACHE_SIZE - n_sub), n_div);
+    bn_ = MIN(n_cache, n_);
+
+    bm_ = MIN(th_base, m_);
+    if (L3_CACHE_SIZE)
+    {
+      int m_sub = (bk_ * bn_ * sizeof_RhsScalar);
+      int m_div = (sizeof_LhsScalar * bk_ * 2 * num_threads_);
+      int m_cache = divup((L3_CACHE_SIZE - m_sub), m_div);
+      bm_ = MIN(m_cache, bm_);
+    }
+  }
+
+  nm_ = divup(m_, bm_);
+  nn_ = divup(n_, bn_);
+  nk_ = divup(k_, bk_);
+
+  rm_ = m_ % bm_;
+  rn_ = n_ % bn_;
+  rk_ = k_ % bk_;
+}
+
+conv_sgemm_multithreads::conv_sgemm_multithreads(const convMat_t &in_mat,
+                                                 const convMat_t &weights_mat, convMat_t &out_mat,
+                                                 const convParams_t &in_param, int num_threads,
+                                                 convType_t conv_type)
+
+    : in_mat_(in_mat), weights_mat_(weights_mat), out_mat_(out_mat), in_param_(in_param),
+      num_threads_(num_threads), conv_type_(conv_type)
+{
+  m_ = out_mat_.c;
+#ifdef NCNN
+#ifdef WITH_DPU
+  np_ = out_mat_.n * alignSize(out_mat_.h * out_mat_.w, 16 / sizeof(float));
+  n_ = (np_ + 1) / 2;
+#else  // WITH_DPU
+  n_ = out_mat_.n * alignSize(out_mat_.h * out_mat_.w, 16 / sizeof(float));
+#endif // WITH_DPU
+#else  // NCNN
+#ifdef WITH_DPU
+  np_ = out_mat_.n * out_mat_.w * out_mat_.h;
+  n_ = (np_ + 1) / 2;
+#else  // WITH_DPU
+  n_ = out_mat_.n * out_mat_.w * out_mat_.h;
+#endif // WITH_DPU
+#endif // NCNN
+  k_ = in_param_.kernel_h * in_param_.kernel_w * in_mat.c;
+
+  param_init();
+
+  int lhs_stride = (bm_ + mr_ - 1) / mr_ * mr_ * bk_;
+  int rhs_stride = (bn_ + nr_ - 1) / nr_ * nr_ * bk_;
+
+  if (shard_type_ == shardByCol)
+  {
+    plhs_buffer_ = new float[lhs_stride * 1 * nm_];
+    prhs_buffer_ = new float[rhs_stride * num_threads_];
+  }
+  else
+  {
+    plhs_buffer_ = new float[lhs_stride * num_threads_];
+    prhs_buffer_ = new float[rhs_stride * 1 * nn_];
+  }
+
+  if (plhs_buffer_ == NULL || prhs_buffer_ == NULL)
+  {
+    error_ = 1;
+  }
+
+  if (in_param_.kernel_w != 1 || in_param_.kernel_h != 1 || in_param_.stride_w != 1 ||
+      in_param_.stride_h != 1 || in_param_.padding != 0)
+  {
+    need_im2col_ = 1;
+  }
+  else
+  {
+    need_im2col_ = 0;
+  }
+
+  omp_set_num_threads(num_threads_);
+
+  error_ = 0;
+}
+
+conv_sgemm_multithreads::~conv_sgemm_multithreads()
+{
+  if (plhs_buffer_)
+    delete[] plhs_buffer_;
+  if (prhs_buffer_)
+    delete[] prhs_buffer_;
+}
+
+void conv_sgemm_multithreads::run()
+{
+  if (error_)
+    return;
+
+  if (shard_type_ == shardByCol && conv_type_ == col_major)
+  {
+    compute_colmajor_colshard();
+  }
+  else if (shard_type_ == shardByRow && conv_type_ == col_major)
+  {
+    compute_colmajor_rowshard();
+  }
+  else if (shard_type_ == shardByCol && conv_type_ == row_major)
+  {
+    compute_rowmajor_colshard();
+  }
+  else if (shard_type_ == shardByRow && conv_type_ == row_major)
+  {
+    compute_rowmajor_rowshard();
+  }
+}
+
+void conv_sgemm_multithreads::compute_rowmajor_colshard()
+{
+  int lhs_stride = (bm_ + mr_ - 1) / mr_ * mr_ * bk_;
+  int rhs_stride = (bn_ + nr_ - 1) / nr_ * nr_ * bk_;
+
+  for (int l = 0; l < nk_; l++)
+  {
+    const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+#pragma omp parallel for
+    for (int i = 0; i < nm_; i++)
+    {
+      const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+      _pack_rowmajor_notrans_lhs(mr_, bm, bk, k_, &weights_mat_.data[i * bm_ * k_ + l * bk_],
+                                 &plhs_buffer_[i * lhs_stride]);
+    }
+
+#pragma omp parallel for
+    for (int j = 0; j < nn_; j++)
+    {
+      int thread_num = omp_get_thread_num();
+      // float *plhs_ptr = &plhs_buffer_[lhs_stride * thread_num];
+      float *prhs_ptr = &prhs_buffer_[rhs_stride * thread_num];
+
+      const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+      if (need_im2col_)
+      {
+        if (out_mat_.n == 1)
+        {
+          _pack_rowmajor_image_rhs(nr_, bn, bk, l * bk_, j * bn_, const_cast<convMat_t *>(&in_mat_),
+                                   &out_mat_, const_cast<convParams_t *>(&in_param_), prhs_ptr);
+        }
+        else
+        {
+          _pack_rowmajor_image_rhs_batch(nr_, bn, bk, l * bk_, j * bn_,
+                                         const_cast<convMat_t *>(&in_mat_), &out_mat_,
+                                         const_cast<convParams_t *>(&in_param_), prhs_ptr);
+        }
+      }
+      else
+      {
+#ifdef WITH_DPU
+        _pack_rowmajor_notrans_rhs(nr_, bn, bk, np_, &in_mat_.data[n_ + l * bk_ * np_ + j * bn_],
+                                   prhs_ptr);
+#else
+        _pack_rowmajor_notrans_rhs(nr_, bn, bk, n_, &in_mat_.data[l * bk_ * n_ + j * bn_],
+                                   prhs_ptr);
+#endif
+      }
+
+      for (int i = 0; i < nm_; i++)
+      {
+        const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+#ifdef WITH_DPU
+        _sgemm_rowmajor_macro_kernel_divnm(mr_, nr_, bm, bn, bk, &plhs_buffer_[i * lhs_stride],
+                                           prhs_ptr, &out_mat_.data[n_ + i * bm_ * np_ + j * bn_],
+                                           l, np_, bk);
+#else  // WITH_DPU
+        _sgemm_rowmajor_macro_kernel_divnm(mr_, nr_, bm, bn, bk, &plhs_buffer_[i * lhs_stride],
+                                           prhs_ptr, &out_mat_.data[i * bm_ * n_ + j * bn_], l, n_,
+                                           bk);
+#endif // WITH_DPU
+      }
+    }
+  }
+}
+
+void conv_sgemm_multithreads::compute_rowmajor_rowshard()
+{
+  int lhs_stride = (bm_ + mr_ - 1) / mr_ * mr_ * bk_;
+  int rhs_stride = (bn_ + nr_ - 1) / nr_ * nr_ * bk_;
+
+  for (int l = 0; l < nk_; l++)
+  {
+    const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+#pragma omp parallel for
+    for (int j = 0; j < nn_; j++)
+    {
+      const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+
+      if (need_im2col_)
+      {
+        if (out_mat_.n == 1)
+        {
+          _pack_rowmajor_image_rhs(nr_, bn, bk, l * bk_, j * bn_, const_cast<convMat_t *>(&in_mat_),
+                                   &out_mat_, const_cast<convParams_t *>(&in_param_),
+                                   &prhs_buffer_[j * rhs_stride]);
+        }
+        else
+        {
+          _pack_rowmajor_image_rhs_batch(
+              nr_, bn, bk, l * bk_, j * bn_, const_cast<convMat_t *>(&in_mat_), &out_mat_,
+              const_cast<convParams_t *>(&in_param_), &prhs_buffer_[j * rhs_stride]);
+        }
+      }
+      else
+      {
+        _pack_rowmajor_notrans_rhs(nr_, bn, bk, n_, &in_mat_.data[l * bk_ * n_ + j * bn_],
+                                   &prhs_buffer_[j * rhs_stride]);
+      }
+    }
+
+#pragma omp parallel for
+    for (int i = 0; i < nm_; i++)
+    {
+      int thread_num = omp_get_thread_num();
+      float *plhs_ptr = &plhs_buffer_[lhs_stride * thread_num];
+
+      const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+      _pack_rowmajor_notrans_lhs(mr_, bm, bk, k_, &weights_mat_.data[i * bm_ * k_ + l * bk_],
+                                 plhs_ptr);
+
+      for (int j = 0; j < nn_; j++)
+      {
+        const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+
+        _sgemm_rowmajor_macro_kernel_divmn(mr_, nr_, bm, bn, bk, plhs_ptr,
+                                           &prhs_buffer_[j * rhs_stride],
+                                           &out_mat_.data[i * bm_ * n_ + j * bn_], l, n_, bk);
+      }
+    }
+  }
+}
+
+void conv_sgemm_multithreads::compute_colmajor_colshard()
+{
+  int lhs_stride = (bm_ + mr_ - 1) / mr_ * mr_ * bk_;
+  int rhs_stride = (bn_ + nr_ - 1) / nr_ * nr_ * bk_;
+
+  for (int l = 0; l < nk_; l++)
+  {
+    const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+#pragma omp parallel for
+    for (int i = 0; i < nm_; i++)
+    {
+      const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+      _pack_colmajor_notrans_lhs(mr_, bm, bk, m_, &weights_mat_.data[l * bk_ * m_ + i * bm_],
+                                 &plhs_buffer_[i * lhs_stride]);
+    }
+
+#pragma omp parallel for
+    for (int j = 0; j < nn_; j++)
+    {
+      int thread_num = omp_get_thread_num();
+      float *prhs_ptr = &prhs_buffer_[rhs_stride * thread_num];
+
+      const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+
+      if (need_im2col_)
+      {
+        if (out_mat_.n == 1)
+        {
+          _pack_colmajor_image_rhs(nr_, bn, bk, l * bk_, j * bn_, const_cast<convMat_t *>(&in_mat_),
+                                   &out_mat_, const_cast<convParams_t *>(&in_param_), prhs_ptr);
+        }
+        else
+        {
+          _pack_colmajor_image_rhs_batch(nr_, bn, bk, l * bk_, j * bn_,
+                                         const_cast<convMat_t *>(&in_mat_), &out_mat_,
+                                         const_cast<convParams_t *>(&in_param_), prhs_ptr);
+        }
+      }
+      else
+      {
+        _pack_colmajor_notrans_rhs(nr_, bn, bk, k_, &in_mat_.data[j * bn_ * k_ + l * bk_],
+                                   prhs_ptr);
+      }
+
+      for (int i = 0; i < nm_; i++)
+      {
+        const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+        _sgemm_colmajor_macro_kernel_divnm(mr_, nr_, bm, bn, bk, &plhs_buffer_[i * lhs_stride],
+                                           prhs_ptr, &out_mat_.data[j * bn_ * m_ + i * bm_], l, m_,
+                                           bk);
+      }
+    }
+  }
+}
+
+void conv_sgemm_multithreads::compute_colmajor_rowshard()
+{
+  int lhs_stride = (bm_ + mr_ - 1) / mr_ * mr_ * bk_;
+  int rhs_stride = (bn_ + nr_ - 1) / nr_ * nr_ * bk_;
+
+  for (int l = 0; l < nk_; l++)
+  {
+    const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+#pragma omp parallel for
+    for (int j = 0; j < nn_; j++)
+    {
+      const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+
+      if (need_im2col_)
+      {
+        if (out_mat_.n == 1)
+        {
+          _pack_colmajor_image_rhs(nr_, bn, bk, l * bk_, j * bn_, const_cast<convMat_t *>(&in_mat_),
+                                   &out_mat_, const_cast<convParams_t *>(&in_param_),
+                                   &prhs_buffer_[j * rhs_stride]);
+        }
+        else
+        {
+          _pack_colmajor_image_rhs_batch(
+              nr_, bn, bk, l * bk_, j * bn_, const_cast<convMat_t *>(&in_mat_), &out_mat_,
+              const_cast<convParams_t *>(&in_param_), &prhs_buffer_[j * rhs_stride]);
+        }
+      }
+      else
+      {
+        _pack_colmajor_notrans_rhs(nr_, bn, bk, k_, &in_mat_.data[j * bn_ * k_ + l * bk_],
+                                   &prhs_buffer_[j * rhs_stride]);
+      }
+    }
+
+#pragma omp parallel for
+    for (int i = 0; i < nm_; i++)
+    {
+      int thread_num = omp_get_thread_num();
+      float *plhs_ptr = &plhs_buffer_[lhs_stride * thread_num];
+
+      const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+      _pack_colmajor_notrans_lhs(mr_, bm, bk, m_, &weights_mat_.data[l * bk_ * m_ + i * bm_],
+                                 plhs_ptr);
+
+      for (int j = 0; j < nn_; j++)
+      {
+        const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+
+        _sgemm_colmajor_macro_kernel_divmn(mr_, nr_, bm, bn, bk, plhs_ptr,
+                                           &prhs_buffer_[j * rhs_stride],
+                                           &out_mat_.data[j * bn_ * m_ + i * bm_], l, m_, bk);
+      }
+    }
+  }
+}
+
+} // namespace srcn
+} // namespace nnfw
diff --git a/runtimes/libs/srcn/src/conv_sgemm_multithreads.h b/runtimes/libs/srcn/src/conv_sgemm_multithreads.h
new file mode 100644
index 000000000..8cb526916
--- /dev/null
+++ b/runtimes/libs/srcn/src/conv_sgemm_multithreads.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_SRCN_CONV_SGEMM_MULTITHREADS_H__
+#define __NNFW_SRCN_CONV_SGEMM_MULTITHREADS_H__
+
+#include "srcn/conv_type.h"
+#include "common.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+class conv_sgemm_multithreads
+{
+public:
+  conv_sgemm_multithreads(const convMat_t &in_mat, const convMat_t &weights_mat, convMat_t &out_mat,
+                          const convParams_t &in_param, int num_threads, convType_t conv_type);
+  ~conv_sgemm_multithreads();
+
+  void run();
+
+private:
+  void param_init();
+
+  void compute_rowmajor_colshard();
+  void compute_rowmajor_rowshard();
+  void compute_colmajor_colshard();
+  void compute_colmajor_rowshard();
+
+  const convMat_t in_mat_;
+  const convMat_t weights_mat_;
+  convMat_t out_mat_;
+  const convParams_t in_param_;
+  convType_t conv_type_;
+  int num_threads_;
+
+  int m_;
+  int n_;
+#ifdef WITH_DPU
+  int np_;
+#endif
+  int k_;
+
+  int bm_;
+  int bn_;
+  int bk_;
+
+  int rm_;
+  int rn_;
+  int rk_;
+
+  int nm_;
+  int nn_;
+  int nk_;
+
+  int mr_;
+  int nr_;
+
+  int need_im2col_;
+  shardType_t shard_type_;
+
+  float *prhs_buffer_;
+  float *plhs_buffer_;
+
+  int error_;
+};
+
+} // namespace srcn
+} // namespace nnfw
+
+#endif // __NNFW_SRCN_CONV_SGEMM_MULTITHREADS_H__
diff --git a/runtimes/libs/srcn/src/conv_sgemm_singlethread.cc b/runtimes/libs/srcn/src/conv_sgemm_singlethread.cc
new file mode 100644
index 000000000..4cbbf217f
--- /dev/null
+++ b/runtimes/libs/srcn/src/conv_sgemm_singlethread.cc
@@ -0,0 +1,366 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdexcept>
+
+#include "common.h"
+#include "sgemm_kernel.h"
+#include "sgemm_pack.h"
+#include "conv_sgemm_singlethread.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+void conv_sgemm_singlethread::param_init()
+{
+  if (n_ > 3 * m_)
+  {
+    shard_type_ = shardByRow;
+  }
+  else
+  {
+    shard_type_ = shardByCol;
+  }
+
+#if __aarch64__
+  if (conv_type_ == row_major)
+  {
+    if (shard_type_ == shardByRow)
+    {
+      mr_ = 8;
+      nr_ = 12;
+    }
+    else
+    {
+      mr_ = 12;
+      nr_ = 8;
+    }
+  }
+  else if (conv_type_ == col_major)
+  {
+#ifndef BATCH_DILATION_FIX
+    mr_ = 12;
+    nr_ = 8;
+#else  // BATCH_DILATION_FIX
+    // TODO: batch(dilation) + inw * inh
+    if (out_mat_.n > 1)
+    {
+      mr_ = 24;
+      nr_ = 4;
+    }
+    else
+    {
+      mr_ = 12;
+      nr_ = 8;
+    }
+#endif // BATCH_DILATION_FIX
+  }
+#else  // __aarch64__
+  if (conv_type_ == row_major)
+  {
+    mr_ = 6;
+    nr_ = 8;
+  }
+  else if (conv_type_ == col_major)
+  {
+    mr_ = 8;
+    nr_ = 6;
+  }
+#endif // __aarch64__
+
+  int k_div = (nr_ * sizeof_RhsScalar);
+  int k_sub = (mr_ * nr_ * sizeof_ResScalar);
+
+  const int k_cache = MIN(divup((int)(L1_CACHE_SIZE - k_sub), (int)k_div), MAX_K);
+  bk_ = MIN(k_cache, k_);
+
+  if (shard_type_ == shardByCol)
+  {
+    int m_sub = (bk_ * nr_ * sizeof_RhsScalar);
+    int m_cache = divup((L2_CACHE_SIZE - m_sub), (sizeof_LhsScalar * bk_ * 2));
+    bm_ = MIN(m_cache, m_);
+
+    bn_ = MIN(GEN_COL, n_);
+    if (L3_CACHE_SIZE)
+    {
+      int n_sub = (bk_ * bm_ * sizeof_RhsScalar);
+      int n_cache = divup((L3_CACHE_SIZE - n_sub), (sizeof_LhsScalar * bk_ * 2));
+      bn_ = MIN(n_cache, bn_);
+    }
+  }
+  else
+  {
+    int n_sub = (bk_ * mr_ * sizeof_RhsScalar);
+    int n_cache = divup((L2_CACHE_SIZE - n_sub), (sizeof_LhsScalar * bk_ * 2));
+    bn_ = MIN(n_cache, n_);
+
+    bm_ = MIN(GEN_COL, m_);
+    if (L3_CACHE_SIZE)
+    {
+      int m_sub = (bk_ * bn_ * sizeof_RhsScalar);
+      int m_cache = divup((L3_CACHE_SIZE - m_sub), (sizeof_LhsScalar * bk_ * 2));
+      bm_ = MIN(m_cache, bm_);
+    }
+  }
+
+  nm_ = divup(m_, bm_);
+  nn_ = divup(n_, bn_);
+  nk_ = divup(k_, bk_);
+
+  rm_ = m_ % bm_;
+  rn_ = n_ % bn_;
+  rk_ = k_ % bk_;
+}
+
+conv_sgemm_singlethread::conv_sgemm_singlethread(const convMat_t &in_mat,
+                                                 const convMat_t &weights_mat, convMat_t &out_mat,
+                                                 const convParams_t &in_param, convType_t conv_type)
+    : in_mat_(in_mat), weights_mat_(weights_mat), out_mat_(out_mat), in_param_(in_param),
+      conv_type_(conv_type)
+{
+  m_ = out_mat_.c;
+#ifdef NCNN
+  n_ = out_mat_.n * alignSize(out_mat_.h * out_mat_.w, 16 / sizeof(float));
+#else
+  n_ = out_mat_.n * out_mat_.w * out_mat_.h;
+#endif
+  k_ = in_param_.kernel_h * in_param_.kernel_w * in_mat.c;
+
+  param_init();
+
+  if (in_param_.kernel_w != 1 || in_param_.kernel_h != 1 || in_param_.stride_w != 1 ||
+      in_param_.stride_h != 1 || in_param_.padding != 0 || out_mat_.n > 1)
+  {
+    need_im2col_ = 1;
+  }
+  else
+  {
+    need_im2col_ = 0;
+  }
+}
+
+conv_sgemm_singlethread::~conv_sgemm_singlethread() {}
+
+void conv_sgemm_singlethread::run()
+{
+  int mstride = (bm_ + mr_ - 1) / mr_ * mr_;
+  int nstride = (bn_ + nr_ - 1) / nr_ * nr_;
+
+  float *plhs_ptr = new float[mstride * bk_];
+  float *prhs_ptr = new float[nstride * bk_];
+
+  if (conv_type_ == row_major)
+  {
+    if (shard_type_ == shardByCol)
+    {
+      for (int j = 0; j < nn_; j++)
+      {
+        const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+
+        for (int l = 0; l < nk_; l++)
+        {
+          const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+          if (need_im2col_)
+          {
+            if (out_mat_.n == 1)
+            {
+              _pack_rowmajor_image_rhs(nr_, bn, bk, l * bk_, j * bn_,
+                                       const_cast<convMat_t *>(&in_mat_), &out_mat_,
+                                       const_cast<convParams_t *>(&in_param_), prhs_ptr);
+            }
+            else
+            {
+              _pack_rowmajor_image_rhs_batch(nr_, bn, bk, l * bk_, j * bn_,
+                                             const_cast<convMat_t *>(&in_mat_), &out_mat_,
+                                             const_cast<convParams_t *>(&in_param_), prhs_ptr);
+            }
+          }
+          else
+          {
+            _pack_rowmajor_notrans_rhs(nr_, bn, bk, n_, &in_mat_.data[l * bk_ * n_ + j * bn_],
+                                       prhs_ptr);
+          }
+
+          for (int i = 0; i < nm_; i++)
+          {
+            const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+            _pack_rowmajor_notrans_lhs(mr_, bm, bk, k_, &weights_mat_.data[i * bm_ * k_ + l * bk_],
+                                       plhs_ptr);
+
+            _sgemm_rowmajor_macro_kernel_divnm(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                               &out_mat_.data[i * bm_ * n_ + j * bn_], l, n_, bk);
+          }
+        }
+      }
+    }
+    else if (shard_type_ == shardByRow)
+    {
+      for (int i = 0; i < nm_; i++)
+      {
+        const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+        for (int l = 0; l < nk_; l++)
+        {
+          const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+          _pack_rowmajor_notrans_lhs(mr_, bm, bk, k_, &weights_mat_.data[i * bm_ * k_ + l * bk_],
+                                     plhs_ptr);
+
+          for (int j = 0; j < nn_; j++)
+          {
+            const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+
+            if (need_im2col_)
+            {
+              if (out_mat_.n == 1)
+              {
+                _pack_rowmajor_image_rhs(nr_, bn, bk, l * bk_, j * bn_,
+                                         const_cast<convMat_t *>(&in_mat_), &out_mat_,
+                                         const_cast<convParams_t *>(&in_param_), prhs_ptr);
+              }
+              else
+              {
+                _pack_rowmajor_image_rhs_batch(nr_, bn, bk, l * bk_, j * bn_,
+                                               const_cast<convMat_t *>(&in_mat_), &out_mat_,
+                                               const_cast<convParams_t *>(&in_param_), prhs_ptr);
+              }
+            }
+            else
+            {
+              _pack_rowmajor_notrans_rhs(nr_, bn, bk, n_, &in_mat_.data[l * bk_ * n_ + j * bn_],
+                                         prhs_ptr);
+            }
+
+            _sgemm_rowmajor_macro_kernel_divmn(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                               &out_mat_.data[i * bm_ * n_ + j * bn_], l, n_, bk);
+          }
+        }
+      }
+    }
+    else
+    {
+      throw std::runtime_error{"Error shrad type!"};
+    }
+  }
+  else if (conv_type_ == col_major)
+  {
+    if (shard_type_ == shardByCol)
+    {
+      for (int j = 0; j < nn_; j++)
+      {
+        const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+        for (int l = 0; l < nk_; l++)
+        {
+          const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+          if (need_im2col_)
+          {
+            if (out_mat_.n == 1)
+            {
+              _pack_colmajor_image_rhs(nr_, bn, bk, l * bk_, j * bn_,
+                                       const_cast<convMat_t *>(&in_mat_), &out_mat_,
+                                       const_cast<convParams_t *>(&in_param_), prhs_ptr);
+            }
+            else
+            {
+              _pack_colmajor_image_rhs_batch(nr_, bn, bk, l * bk_, j * bn_,
+                                             const_cast<convMat_t *>(&in_mat_), &out_mat_,
+                                             const_cast<convParams_t *>(&in_param_), prhs_ptr);
+            }
+          }
+          else
+          {
+            _pack_colmajor_notrans_rhs(nr_, bn, bk, k_, &in_mat_.data[j * bn_ * k_ + l * bk_],
+                                       prhs_ptr);
+          }
+
+          for (int i = 0; i < nm_; i++)
+          {
+            const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+            _pack_colmajor_notrans_lhs(mr_, bm, bk, m_, &weights_mat_.data[l * bk_ * m_ + i * bm_],
+                                       plhs_ptr);
+
+            _sgemm_colmajor_macro_kernel_divnm(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                               &out_mat_.data[j * bn_ * m_ + i * bm_], l, m_, bk);
+          }
+        }
+      }
+    }
+    else if (shard_type_ == shardByRow)
+    {
+      for (int i = 0; i < nm_; i++)
+      {
+        const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+        for (int l = 0; l < nk_; l++)
+        {
+          const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+          _pack_colmajor_notrans_lhs(mr_, bm, bk, m_, &weights_mat_.data[l * bk_ * m_ + i * bm_],
+                                     plhs_ptr);
+
+          for (int j = 0; j < nn_; j++)
+          {
+            const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+
+            if (need_im2col_)
+            {
+              if (out_mat_.n == 1)
+              {
+                _pack_colmajor_image_rhs(nr_, bn, bk, l * bk_, j * bn_,
+                                         const_cast<convMat_t *>(&in_mat_), &out_mat_,
+                                         const_cast<convParams_t *>(&in_param_), prhs_ptr);
+              }
+              else
+              {
+                _pack_colmajor_image_rhs_batch(nr_, bn, bk, l * bk_, j * bn_,
+                                               const_cast<convMat_t *>(&in_mat_), &out_mat_,
+                                               const_cast<convParams_t *>(&in_param_), prhs_ptr);
+              }
+            }
+            else
+            {
+              _pack_colmajor_notrans_rhs(nr_, bn, bk, k_, &in_mat_.data[j * bn_ * k_ + l * bk_],
+                                         prhs_ptr);
+            }
+
+            _sgemm_colmajor_macro_kernel_divmn(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                               &out_mat_.data[j * bn_ * m_ + i * bm_], l, m_, bk);
+          }
+        }
+      }
+    }
+    else
+    {
+      throw std::runtime_error{"Error shrad type!"};
+    }
+  }
+  else
+  {
+    throw std::runtime_error{"Error conv type!"};
+  }
+
+  delete[] plhs_ptr;
+  delete[] prhs_ptr;
+}
+
+} // namespace srcn
+} // namespace nnfw
diff --git a/runtimes/libs/srcn/src/conv_sgemm_singlethread.h b/runtimes/libs/srcn/src/conv_sgemm_singlethread.h
new file mode 100644
index 000000000..06713e604
--- /dev/null
+++ b/runtimes/libs/srcn/src/conv_sgemm_singlethread.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_SRCN_CONV_SGEMM_SINGLETHREAD_H__
+#define __NNFW_SRCN_CONV_SGEMM_SINGLETHREAD_H__
+
+#include "srcn/conv_type.h"
+#include "common.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+class conv_sgemm_singlethread
+{
+public:
+  conv_sgemm_singlethread(const convMat_t &in_mat, const convMat_t &weights_mat, convMat_t &out_mat,
+                          const convParams_t &in_param, convType_t conv_type);
+  ~conv_sgemm_singlethread();
+
+  void run();
+
+private:
+  void param_init();
+
+  const convMat_t in_mat_;
+  const convMat_t weights_mat_;
+  convMat_t out_mat_;
+  const convParams_t in_param_;
+  convType_t conv_type_;
+
+  int m_;
+  int n_;
+  int k_;
+
+  int bm_;
+  int bn_;
+  int bk_;
+
+  int rm_;
+  int rn_;
+  int rk_;
+
+  int nm_;
+  int nn_;
+  int nk_;
+
+  int mr_;
+  int nr_;
+
+  int need_im2col_;
+
+  shardType_t shard_type_;
+};
+
+} // namespace srcn
+} // namespace nnfw
+
+#endif // __NNFW_SRCN_CONV_SGEMM_SINGLETHREAD_H__
diff --git a/runtimes/libs/srcn/src/conv_sparse.cc b/runtimes/libs/srcn/src/conv_sparse.cc
new file mode 100644
index 000000000..10e2a2b93
--- /dev/null
+++ b/runtimes/libs/srcn/src/conv_sparse.cc
@@ -0,0 +1,271 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifdef _OPENMP
+#include <omp.h>
+#endif
+
+#include <stdexcept>
+
+#include "common.h"
+#include "sgemm_kernel.h"
+#include "sgemm_pack.h"
+#include "conv_sparse.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+void conv_sparse::param_init()
+{
+#ifdef NCNN
+  n_ = alignSize(out_mat_.h * out_mat_.w, 16 / sizeof(float));
+#else
+  n_ = out_mat_.w * out_mat_.h;
+#endif
+
+  bch_ = BCH;
+  nch_ = (out_mat_.c + bch_ - 1) / bch_;
+
+  rch_ = out_mat_.c % bch_;
+
+  bn_ = MIN(n_, L1_CACHE_SIZE / (sizeof(float) * 2));
+  bn_ = MIN(bn_, (L2_CACHE_SIZE / 2 - bch_ * sizeof(weight_data_t)) / ((bch_ + 1) * sizeof(float)) /
+                     num_threads_);
+  nn_ = (n_ + bn_ - 1) / bn_;
+  rn_ = n_ % bn_;
+
+  if (in_param_.kernel_w != 1 || in_param_.kernel_h != 1 || in_param_.stride_w != 1 ||
+      in_param_.stride_h != 1 || in_param_.padding != 0)
+  {
+    need_im2col_ = 1;
+  }
+  else
+  {
+    need_im2col_ = 0;
+  }
+}
+
+conv_sparse::conv_sparse(const convMat_t &in_mat, convMat_t &out_mat, const convParams_t &in_param,
+                         const sparse_weight_t *weights, int num_threads, convType_t conv_type)
+    : in_mat_(in_mat), out_mat_(out_mat), in_param_(in_param), weights_(weights),
+      num_threads_(num_threads), conv_type_(conv_type)
+{
+  param_init();
+}
+
+conv_sparse::~conv_sparse() {}
+
+void conv_sparse::compute_singlethread()
+{
+  if (need_im2col_)
+  {
+    for (int i = 0; i < nch_; i++)
+    {
+      const sparse_weight_t *weight_ptr = weights_ + i;
+      const int mxk = weight_ptr->mxk;
+      float prhs_ptr[bn_];
+
+      for (int j = 0; j < nn_; j++)
+      {
+        int k = -1;
+        const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+        weight_data_t *lhs_ptr = weight_ptr->wdata;
+
+        for (int l = 0; l < mxk; l++)
+        {
+          if (k != lhs_ptr->k)
+          {
+            k = lhs_ptr->k;
+            _sparse_pack_rowmajor_image(bn, k, j * bn_, const_cast<convMat_t *>(&in_mat_),
+                                        &out_mat_, const_cast<convParams_t *>(&in_param_),
+                                        prhs_ptr);
+          }
+
+          // Why n_ = 64 x 64 is too much slower on Tizen???
+          _sparse_sgemm_kernel(bn, lhs_ptr->data, prhs_ptr,
+                               &out_mat_.data[lhs_ptr->m * n_ + j * bn_]);
+
+          lhs_ptr++;
+        }
+      }
+    }
+  }
+  else
+  {
+    for (int i = 0; i < nch_; i++)
+    {
+      const sparse_weight_t *weight_ptr = weights_ + i;
+      const int mxk = weight_ptr->mxk;
+
+      for (int j = 0; j < nn_; j++)
+      {
+        const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+        weight_data_t *lhs_ptr = weight_ptr->wdata;
+        float *rhs_ptr = in_mat_.data + j * bn_;
+
+        for (int l = 0; l < mxk; l++)
+        {
+          // Why n_ = 64 x 64 is too much slower on Tizen???
+          _sparse_sgemm_kernel(bn, lhs_ptr->data, rhs_ptr + lhs_ptr->k * n_,
+                               &out_mat_.data[lhs_ptr->m * n_ + j * bn_]);
+
+          lhs_ptr++;
+        }
+      }
+    }
+  }
+}
+
+void conv_sparse::compute_multithreads()
+{
+  omp_set_num_threads(num_threads_);
+
+  if (nch_ >= num_threads_ || nch_ >= nn_)
+  {
+    if (need_im2col_)
+    {
+#pragma omp parallel for
+      for (int i = 0; i < nch_; i++)
+      {
+        const sparse_weight_t *weight_ptr = weights_ + i;
+        const int mxk = weight_ptr->mxk;
+        float prhs_ptr[bn_];
+
+        for (int j = 0; j < nn_; j++)
+        {
+          int k = -1;
+          const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+          weight_data_t *lhs_ptr = weight_ptr->wdata;
+
+          for (int l = 0; l < mxk; l++)
+          {
+            if (k != lhs_ptr->k)
+            {
+              k = lhs_ptr->k;
+              _sparse_pack_rowmajor_image(bn, k, j * bn_, const_cast<convMat_t *>(&in_mat_),
+                                          &out_mat_, const_cast<convParams_t *>(&in_param_),
+                                          prhs_ptr);
+            }
+
+            _sparse_sgemm_kernel(bn, lhs_ptr->data, prhs_ptr,
+                                 &out_mat_.data[lhs_ptr->m * n_ + j * bn_]);
+
+            lhs_ptr++;
+          }
+        }
+      }
+    }
+    else
+    {
+#pragma omp parallel for
+      for (int i = 0; i < nch_; i++)
+      {
+        const sparse_weight_t *weight_ptr = weights_ + i;
+        const int mxk = weight_ptr->mxk;
+
+        for (int j = 0; j < nn_; j++)
+        {
+          const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+          weight_data_t *lhs_ptr = weight_ptr->wdata;
+          float *rhs_ptr = in_mat_.data + j * bn_;
+
+          for (int l = 0; l < mxk; l++)
+          {
+            _sparse_sgemm_kernel(bn, lhs_ptr->data, rhs_ptr + lhs_ptr->k * n_,
+                                 &out_mat_.data[lhs_ptr->m * n_ + j * bn_]);
+
+            lhs_ptr++;
+          }
+        }
+      }
+    }
+  }
+  else
+  {
+    if (need_im2col_)
+    {
+      for (int i = 0; i < nch_; i++)
+      {
+        const sparse_weight_t *weight_ptr = weights_ + i;
+        const int mxk = weight_ptr->mxk;
+
+#pragma omp parallel for
+        for (int j = 0; j < nn_; j++)
+        {
+          int k = -1;
+          const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+          weight_data_t *lhs_ptr = weight_ptr->wdata;
+          float prhs_ptr[bn];
+
+          for (int l = 0; l < mxk; l++)
+          {
+            if (k != lhs_ptr->k)
+            {
+              k = lhs_ptr->k;
+              _sparse_pack_rowmajor_image(bn, k, j * bn_, const_cast<convMat_t *>(&in_mat_),
+                                          &out_mat_, const_cast<convParams_t *>(&in_param_),
+                                          prhs_ptr);
+            }
+
+            _sparse_sgemm_kernel(bn, lhs_ptr->data, prhs_ptr,
+                                 &out_mat_.data[lhs_ptr->m * n_ + j * bn_]);
+
+            lhs_ptr++;
+          }
+        }
+      }
+    }
+    else
+    {
+      for (int i = 0; i < nch_; i++)
+      {
+        const sparse_weight_t *weight_ptr = weights_ + i;
+        const int mxk = weight_ptr->mxk;
+
+#pragma omp parallel for
+        for (int j = 0; j < nn_; j++)
+        {
+          const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+          weight_data_t *lhs_ptr = weight_ptr->wdata;
+          float *rhs_ptr = in_mat_.data + j * bn_;
+
+          for (int l = 0; l < mxk; l++)
+          {
+            _sparse_sgemm_kernel(bn, lhs_ptr->data, rhs_ptr + lhs_ptr->k * n_,
+                                 &out_mat_.data[lhs_ptr->m * n_ + j * bn_]);
+
+            lhs_ptr++;
+          }
+        }
+      }
+    }
+  }
+}
+
+void conv_sparse::run()
+{
+  if (num_threads_ == 1)
+    compute_singlethread();
+  else if (num_threads_ > 1)
+    compute_multithreads();
+  else
+    throw std::runtime_error{"Invalid thread number."};
+}
+
+} // namespace srcn
+} // namespace nnfw
diff --git a/runtimes/libs/srcn/src/conv_sparse.h b/runtimes/libs/srcn/src/conv_sparse.h
new file mode 100644
index 000000000..3541ff131
--- /dev/null
+++ b/runtimes/libs/srcn/src/conv_sparse.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_SRCN_CONV_SPARSE_H__
+#define __NNFW_SRCN_CONV_SPARSE_H__
+
+#include "srcn/conv_type.h"
+#include "common.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+#define BCH 128
+
+typedef struct
+{
+  short m;
+  short k;
+  float data;
+} weight_data_t;
+
+typedef struct
+{
+  int mxk;
+  weight_data_t *wdata;
+} sparse_weight_t;
+
+class conv_sparse
+{
+public:
+  conv_sparse(const convMat_t &in_mat, convMat_t &out_mat, const convParams_t &in_param,
+              const sparse_weight_t *weights, int num_threads, convType_t conv_type);
+  ~conv_sparse();
+
+  void run();
+
+private:
+  void param_init();
+  void compute_singlethread();
+  void compute_multithreads();
+
+  const convMat_t in_mat_;
+  convMat_t out_mat_;
+  const convParams_t in_param_;
+  const sparse_weight_t *weights_;
+  int num_threads_;
+  convType_t conv_type_;
+
+  int n_;
+  int bn_;
+  int rn_;
+  int nn_;
+
+  int bch_;
+  int rch_;
+  int nch_;
+
+  int need_im2col_;
+};
+
+} // namespace srcn
+} // namespace nnfw
+
+#endif // __NNFW_SRCN_CONV_SPARSE_H__
diff --git a/runtimes/libs/srcn/src/conv_winograd.cc b/runtimes/libs/srcn/src/conv_winograd.cc
new file mode 100644
index 000000000..cc114981f
--- /dev/null
+++ b/runtimes/libs/srcn/src/conv_winograd.cc
@@ -0,0 +1,341 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "common.h"
+#include "conv_winograd.h"
+
+namespace std
+{
+template <typename Dtype> static inline Dtype max(Dtype a, Dtype b)
+{
+  if (a > b)
+    return a;
+  else
+    return b;
+}
+}
+
+namespace nnfw
+{
+namespace srcn
+{
+
+void conv_winograd::param_init()
+{
+  if ((in_param_.kernel_w != in_param_.kernel_h) || (in_param_.stride_w != in_param_.stride_h) ||
+      (in_param_.kernel_w != 3 && in_param_.kernel_w != 5) || (in_param_.stride_w != 1) ||
+      (!winograd_weight_))
+  {
+    error_ = 1;
+    return;
+  }
+
+  int M, N;
+  const int w = in_mat_.w;
+  const int h = in_mat_.h;
+  const int outw = out_mat_.w;
+  const int outh = out_mat_.h;
+  const int pad_w = in_param_.pad_w;
+  const int pad_h = in_param_.pad_h;
+
+  if (in_param_.kernel_w == 3)
+  {
+    M = winograd_para_3x3s1::M;
+    N = winograd_para_3x3s1::N;
+  }
+  else
+  {
+    M = winograd_para_5x5s1::M;
+    N = winograd_para_5x5s1::N;
+  }
+
+  tile_h_in_ = tile_w_in_ = M;
+  tile_h_out_ = tile_h_in_ - N + 1;
+  tile_w_out_ = tile_w_in_ - N + 1;
+  ntiles_h_ = (std::max(h + pad_h - tile_h_in_ + 1, outh) + tile_h_out_ - 1) / tile_h_out_;
+  ntiles_w_ = (std::max(w + pad_w - tile_w_in_ + 1, outw) + tile_w_out_ - 1) / tile_w_out_;
+
+  error_ = 0;
+}
+
+conv_winograd::conv_winograd(const convMat_t &in_mat, convMat_t &out_mat,
+                             const convParams_t &in_param, convType_t conv_type,
+                             const float *winograd_weight, int num_threads, int inc_stride,
+                             int outc_stride, int c_stride)
+    : in_mat_(in_mat), out_mat_(out_mat), in_param_(in_param), conv_type_(conv_type),
+      winograd_weight_(winograd_weight), num_threads_(num_threads), inc_stride_(inc_stride),
+      outc_stride_(outc_stride), c_stride_(c_stride)
+
+{
+  param_init();
+}
+
+conv_winograd::~conv_winograd() {}
+
+void conv_winograd::compute_sgemm(sgemmType_t major_type, sgemmTrans_t ltrans, sgemmTrans_t rtrans,
+                                  const int m, const int n, const int k, const float *lhs_data,
+                                  const float *rhs_data, float *res_data)
+{
+  class sgemm_singlethread sgemm(major_type, ltrans, rtrans, m, n, k, lhs_data, rhs_data, res_data,
+                                 num_threads_);
+
+  sgemm.run();
+}
+
+void conv_winograd::winograd_input_im2col(float *col_buff)
+{
+  const int w = in_mat_.w;
+  const int h = in_mat_.h;
+  const float *data = in_mat_.data;
+  const int channels = in_mat_.c;
+  const int pad_w = in_param_.pad_w;
+  const int pad_h = in_param_.pad_h;
+
+  if (conv_type_ == row_major)
+  {
+#ifdef NCNN
+    const int n = alignSize(inc_stride_, 16 / sizeof(float));
+#else  // NCNN
+    const int n = inc_stride_;
+#endif // NCNN
+    for (int c = 0; c < channels; ++c)
+    {
+      for (int tile_h = 0; tile_h < ntiles_h_; ++tile_h)
+      {
+        for (int tile_w = 0; tile_w < ntiles_w_; ++tile_w)
+        {
+          for (int y = 0; y < tile_h_in_; ++y)
+          {
+            for (int x = 0; x < tile_w_in_; ++x)
+            {
+              int in_y = tile_h * tile_h_out_ + y - pad_h;
+              int in_x = tile_w * tile_w_out_ + x - pad_w;
+
+              if (in_y < 0 || in_x < 0 || in_y >= h || in_x >= w)
+              {
+                col_buff[(((c * ntiles_h_ + tile_h) * ntiles_w_ + tile_w) * tile_h_in_ + y) *
+                             tile_w_in_ +
+                         x] = 0;
+              }
+              else
+              {
+                col_buff[(((c * ntiles_h_ + tile_h) * ntiles_w_ + tile_w) * tile_h_in_ + y) *
+                             tile_w_in_ +
+                         x] = data[c * n + in_y * w + in_x];
+              }
+            }
+          }
+        }
+      }
+    }
+  }
+  else if (conv_type_ == col_major)
+  {
+    for (int tile_h = 0; tile_h < ntiles_h_; ++tile_h)
+    {
+      for (int tile_w = 0; tile_w < ntiles_w_; ++tile_w)
+      {
+        for (int y = 0; y < tile_h_in_; ++y)
+        {
+          for (int x = 0; x < tile_w_in_; ++x)
+          {
+            for (int c = 0; c < channels; ++c)
+            {
+              int in_y = tile_h * tile_h_out_ + y - pad_h;
+              int in_x = tile_w * tile_w_out_ + x - pad_w;
+
+              if (in_y < 0 || in_x < 0 || in_y >= h || in_x >= w)
+              {
+                col_buff[(((c * ntiles_h_ + tile_h) * ntiles_w_ + tile_w) * tile_h_in_ + y) *
+                             tile_w_in_ +
+                         x] = 0;
+              }
+              else
+              {
+                col_buff[(((c * ntiles_h_ + tile_h) * ntiles_w_ + tile_w) * tile_h_in_ + y) *
+                             tile_w_in_ +
+                         x] = data[c + (in_y * w + in_x) * channels];
+              }
+            }
+          }
+        }
+      }
+    }
+  }
+}
+
+void conv_winograd::winograd_output_col2im(const float *col_buff)
+{
+  int outh = out_mat_.h;
+  int outw = out_mat_.w;
+  float *data = out_mat_.data;
+  int channels = out_mat_.c;
+
+  if (conv_type_ == row_major)
+  {
+#ifdef NCNN
+    const int n = alignSize(outc_stride_, 16 / sizeof(float));
+#else  // NCNN
+    const int n = outc_stride_;
+#endif // NCNN
+    for (int c = 0; c < channels; ++c)
+    {
+      for (int tile_h = 0; tile_h < ntiles_h_; ++tile_h)
+      {
+        for (int tile_w = 0; tile_w < ntiles_w_; ++tile_w)
+        {
+          for (int y = 0; y < tile_h_out_; ++y)
+          {
+            for (int x = 0; x < tile_w_out_; ++x)
+            {
+              int out_y = tile_h * tile_h_out_ + y;
+              int out_x = tile_w * tile_w_out_ + x;
+              if (out_y < outh && out_x < outw)
+              {
+                data[c * n + out_y * outw + out_x] =
+                    col_buff[(((c * ntiles_h_ + tile_h) * ntiles_w_ + tile_w) * tile_h_out_ + y) *
+                                 tile_w_out_ +
+                             x];
+              }
+            }
+          }
+        }
+      }
+    }
+  }
+  else if (conv_type_ == col_major)
+  {
+    for (int tile_h = 0; tile_h < ntiles_h_; ++tile_h)
+    {
+      for (int tile_w = 0; tile_w < ntiles_w_; ++tile_w)
+      {
+        for (int y = 0; y < tile_h_out_; ++y)
+        {
+          for (int x = 0; x < tile_w_out_; ++x)
+          {
+            for (int c = 0; c < channels; ++c)
+            {
+              int out_y = tile_h * tile_h_out_ + y;
+              int out_x = tile_w * tile_w_out_ + x;
+              if (out_y < outh && out_x < outw)
+              {
+                data[c + (out_y * outw + out_x) * c_stride_] =
+                    col_buff[(((c * ntiles_h_ + tile_h) * ntiles_w_ + tile_w) * tile_h_out_ + y) *
+                                 tile_w_out_ +
+                             x];
+              }
+            }
+          }
+        }
+      }
+    }
+  }
+}
+
+void conv_winograd::compute_winograd()
+{
+  const int w = in_mat_.w;
+  const int h = in_mat_.h;
+  const int inch = in_mat_.c;
+  const int outw = out_mat_.w;
+  const int outh = out_mat_.h;
+  const int outch = out_mat_.c;
+  const int kernel_size = in_param_.kernel_w;
+
+  int M, N;
+  const double *A;
+  const double *B;
+
+  if (kernel_size == 3)
+  {
+    M = winograd_para_3x3s1::M;
+    N = winograd_para_3x3s1::N;
+    B = winograd_para_3x3s1::getB();
+    A = winograd_para_3x3s1::getA();
+  }
+  else
+  {
+    M = winograd_para_5x5s1::M;
+    N = winograd_para_5x5s1::N;
+    B = winograd_para_5x5s1::getB();
+    A = winograd_para_5x5s1::getA();
+  }
+
+  /*Step 2: transfer image to winograd domain*/
+  float *col_buff =
+      new float[std::max(outch, inch) * ntiles_h_ * ntiles_w_ * tile_h_in_ * tile_w_in_];
+
+  int temp1_n = inch * ntiles_h_ * ntiles_w_;
+  float *temp1_ =
+      new float[tile_h_in_ * tile_w_in_ * std::max(outch, inch) * ntiles_h_ * ntiles_w_];
+
+  float *winograd_b = new float[M * M * M * M];
+
+  if ((NULL == col_buff) || (NULL == temp1_) || (NULL == winograd_b))
+  {
+    delete[] col_buff;
+    delete[] temp1_;
+    delete[] winograd_b;
+    return;
+  }
+
+  winograd_input_im2col(col_buff);
+
+  kronecker_product(winograd_b, B, B, M, M, M, M);
+
+  compute_sgemm(rowMajor, trans, trans, tile_h_in_ * tile_w_in_, temp1_n, tile_h_in_ * tile_w_in_,
+                winograd_b, col_buff, temp1_);
+
+  delete[] winograd_b;
+
+  /*Step 3: convolution in winograd domain*/
+  for (int j = 0; j < tile_h_in_ * tile_w_in_; ++j)
+  {
+    compute_sgemm(rowMajor, notrans, notrans, outch, ntiles_h_ * ntiles_w_, inch,
+                  winograd_weight_ + j * c_stride_ * inch,
+                  temp1_ + j * inch * ntiles_h_ * ntiles_w_,
+                  col_buff + j * outch * ntiles_h_ * ntiles_w_);
+  }
+
+  /*Step 4: transfer back to time domain*/
+  float *winograd_a = new float[M * (M - N + 1) * M * (M - N + 1)];
+  if (NULL == winograd_a)
+  {
+    delete[] col_buff;
+    delete[] temp1_;
+    return;
+  }
+  kronecker_product(winograd_a, A, A, M, M - N + 1, M, M - N + 1);
+  compute_sgemm(rowMajor, trans, notrans, outch * ntiles_h_ * ntiles_w_, tile_h_out_ * tile_w_out_,
+                tile_h_in_ * tile_w_in_, col_buff, winograd_a, temp1_);
+  delete[] winograd_a;
+  delete[] col_buff;
+
+  winograd_output_col2im(temp1_);
+
+  delete[] temp1_;
+}
+
+void conv_winograd::run()
+{
+  if (error_)
+    return;
+
+  compute_winograd();
+}
+
+} // namespace srcn
+} // namespace nnfw
diff --git a/runtimes/libs/srcn/src/conv_winograd.h b/runtimes/libs/srcn/src/conv_winograd.h
new file mode 100644
index 000000000..d478f943c
--- /dev/null
+++ b/runtimes/libs/srcn/src/conv_winograd.h
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_SRCN_CONV_WINOGRAD_H__
+#define __NNFW_SRCN_CONV_WINOGRAD_H__
+
+#include "srcn/conv_type.h"
+#include "winograd.h"
+#include "sgemm_singlethread.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+class conv_winograd
+{
+public:
+  conv_winograd(const convMat_t &in_mat, convMat_t &out_mat, const convParams_t &in_param,
+                convType_t conv_type, const float *winograd_weight, int num_threads, int inc_stride,
+                int outc_stride, int c_stride);
+  ~conv_winograd();
+
+  void run();
+
+private:
+  void param_init();
+  void compute_sgemm(sgemmType_t major_type, sgemmTrans_t ltrans, sgemmTrans_t rtrans, const int m,
+                     const int n, const int k, const float *lhs_data, const float *rhs_data,
+                     float *res_data);
+  void winograd_input_im2col(float *col_buff);
+  void winograd_output_col2im(const float *col_buff);
+  void compute_winograd();
+
+  const convMat_t in_mat_;
+  convMat_t out_mat_;
+  const convParams_t in_param_;
+  convType_t conv_type_;
+  const float *winograd_weight_;
+  const int num_threads_;
+
+  int tile_w_in_;
+  int tile_h_in_;
+  int tile_w_out_;
+  int tile_h_out_;
+  int ntiles_w_;
+  int ntiles_h_;
+
+  int inc_stride_;
+  int outc_stride_;
+  int c_stride_;
+
+  int error_;
+};
+
+} // namespace srcn
+} // namespace nnfw
+
+#endif // __NNFW_SRCN_CONV_WINOGRAD_H__
diff --git a/runtimes/libs/srcn/src/conv_winograd_batch.cc b/runtimes/libs/srcn/src/conv_winograd_batch.cc
new file mode 100644
index 000000000..7b468db02
--- /dev/null
+++ b/runtimes/libs/srcn/src/conv_winograd_batch.cc
@@ -0,0 +1,304 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "common.h"
+#include "conv_winograd_batch.h"
+
+namespace std
+{
+template <typename Dtype> static inline Dtype max(Dtype a, Dtype b)
+{
+  if (a > b)
+    return a;
+  else
+    return b;
+}
+}
+
+namespace nnfw
+{
+namespace srcn
+{
+
+void conv_winograd_batch::param_init()
+{
+  if ((in_param_.kernel_w != in_param_.kernel_h) || (in_param_.stride_w != in_param_.stride_h) ||
+      (in_param_.kernel_w != 3 && in_param_.kernel_w != 5) || (in_param_.stride_w != 1) ||
+      (!winograd_weight_))
+  {
+    error_ = 1;
+    return;
+  }
+
+  int M, N;
+  const int w = in_mat_.w;
+  const int h = in_mat_.h;
+  const int outw = out_mat_.w;
+  const int outh = out_mat_.h;
+  const int pad_w = in_param_.pad_w;
+  const int pad_h = in_param_.pad_h;
+
+  if (in_param_.kernel_w == 3)
+  {
+    if (w == 4)
+    {
+      M = winograd_para_3x3s1_2::M;
+      N = winograd_para_3x3s1_2::N;
+    }
+    else
+    {
+      M = winograd_para_3x3s1::M;
+      N = winograd_para_3x3s1::N;
+    }
+  }
+  else
+  {
+    M = winograd_para_5x5s1::M;
+    N = winograd_para_5x5s1::N;
+  }
+
+  tile_h_in_ = tile_w_in_ = M;
+  tile_h_out_ = tile_h_in_ - N + 1;
+  tile_w_out_ = tile_w_in_ - N + 1;
+  ntiles_h_ = (std::max(h + pad_h - tile_h_in_ + 1, outh) + tile_h_out_ - 1) / tile_h_out_;
+  ntiles_w_ = (std::max(w + pad_w - tile_w_in_ + 1, outw) + tile_w_out_ - 1) / tile_w_out_;
+
+  error_ = 0;
+}
+
+conv_winograd_batch::conv_winograd_batch(const convMat_t &in_mat, convMat_t &out_mat,
+                                         const convParams_t &in_param, convType_t conv_type,
+                                         const float *winograd_weight, int num_threads)
+    : in_mat_(in_mat), out_mat_(out_mat), in_param_(in_param), conv_type_(conv_type),
+      winograd_weight_(winograd_weight), num_threads_(num_threads)
+{
+  param_init();
+}
+
+conv_winograd_batch::~conv_winograd_batch() {}
+
+void conv_winograd_batch::compute_sgemm(sgemmType_t major_type, sgemmTrans_t ltrans,
+                                        sgemmTrans_t rtrans, const int m, const int n, const int k,
+                                        const float *lhs_data, const float *rhs_data,
+                                        float *res_data)
+{
+  class sgemm_singlethread sgemm(major_type, ltrans, rtrans, m, n, k, lhs_data, rhs_data, res_data,
+                                 num_threads_);
+
+  sgemm.run();
+}
+
+void conv_winograd_batch::winograd_input_im2col(float *col_buff)
+{
+  const int w = in_mat_.w;
+  const int h = in_mat_.h;
+  const float *data = in_mat_.data;
+  const int channels = in_mat_.c;
+  const int batch = in_mat_.n;
+  const int pad_w = in_param_.pad_w;
+  const int pad_h = in_param_.pad_h;
+
+  // TODO: row_major
+  if (conv_type_ == col_major)
+  {
+    for (int n = 0; n < batch; n++)
+    {
+      for (int tile_h = 0; tile_h < ntiles_h_; ++tile_h)
+      {
+        for (int tile_w = 0; tile_w < ntiles_w_; ++tile_w)
+        {
+          for (int y = 0; y < tile_h_in_; ++y)
+          {
+            for (int x = 0; x < tile_w_in_; ++x)
+            {
+              for (int c = 0; c < channels; ++c)
+              {
+                int in_y = tile_h * tile_h_out_ + y - pad_h;
+                int in_x = tile_w * tile_w_out_ + x - pad_w;
+
+                if (in_y < 0 || in_x < 0 || in_y >= h || in_x >= w)
+                {
+                  col_buff[((((c * batch + n) * ntiles_h_ + tile_h) * ntiles_w_ + tile_w) *
+                                tile_h_in_ +
+                            y) *
+                               tile_w_in_ +
+                           x] = 0;
+                }
+                else
+                {
+                  col_buff[((((c * batch + n) * ntiles_h_ + tile_h) * ntiles_w_ + tile_w) *
+                                tile_h_in_ +
+                            y) *
+                               tile_w_in_ +
+                           x] = data[((n * h + in_y) * w + in_x) * channels + c];
+                }
+              }
+            }
+          }
+        }
+      }
+    }
+  }
+}
+
+void conv_winograd_batch::winograd_output_col2im(const float *col_buff)
+{
+  int outh = out_mat_.h;
+  int outw = out_mat_.w;
+  float *data = out_mat_.data;
+  int channels = out_mat_.c;
+  int batch = out_mat_.n;
+
+  // TODO: row_major
+  if (conv_type_ == col_major)
+  {
+    for (int n = 0; n < batch; n++)
+    {
+      for (int tile_h = 0; tile_h < ntiles_h_; ++tile_h)
+      {
+        for (int tile_w = 0; tile_w < ntiles_w_; ++tile_w)
+        {
+          for (int y = 0; y < tile_h_out_; ++y)
+          {
+            for (int x = 0; x < tile_w_out_; ++x)
+            {
+              for (int c = 0; c < channels; ++c)
+              {
+                int out_y = tile_h * tile_h_out_ + y;
+                int out_x = tile_w * tile_w_out_ + x;
+                if (out_y < outh && out_x < outw)
+                {
+                  data[((n * outh + out_y) * outw + out_x) * channels + c] =
+                      col_buff[((((c * batch + n) * ntiles_h_ + tile_h) * ntiles_w_ + tile_w) *
+                                    tile_h_out_ +
+                                y) *
+                                   tile_w_out_ +
+                               x];
+                }
+              }
+            }
+          }
+        }
+      }
+    }
+  }
+}
+
+void conv_winograd_batch::compute_winograd()
+{
+  const int w = in_mat_.w;
+  const int h = in_mat_.h;
+  const int inch = in_mat_.c;
+  const int outw = out_mat_.w;
+  const int outh = out_mat_.h;
+  const int outch = out_mat_.c;
+  const int kernel_size = in_param_.kernel_w;
+  const int batch = in_mat_.n;
+
+  int M, N;
+  const double *A;
+  const double *B;
+
+  if (kernel_size == 3)
+  {
+    if (w == 4)
+    {
+      M = winograd_para_3x3s1_2::M;
+      N = winograd_para_3x3s1_2::N;
+      B = winograd_para_3x3s1_2::getB();
+      A = winograd_para_3x3s1_2::getA();
+    }
+    else
+    {
+      M = winograd_para_3x3s1::M;
+      N = winograd_para_3x3s1::N;
+      B = winograd_para_3x3s1::getB();
+      A = winograd_para_3x3s1::getA();
+    }
+  }
+  else
+  {
+    M = winograd_para_5x5s1::M;
+    N = winograd_para_5x5s1::N;
+    B = winograd_para_5x5s1::getB();
+    A = winograd_para_5x5s1::getA();
+  }
+
+  /*Step 2: transfer image to winograd domain*/
+  float *col_buff =
+      new float[std::max(outch, inch) * batch * ntiles_h_ * ntiles_w_ * tile_h_in_ * tile_w_in_];
+
+  int temp1_n = batch * inch * ntiles_h_ * ntiles_w_;
+  float *temp1_ =
+      new float[batch * tile_h_in_ * tile_w_in_ * std::max(outch, inch) * ntiles_h_ * ntiles_w_];
+
+  float *winograd_b = new float[M * M * M * M];
+
+  if ((NULL == col_buff) || (NULL == temp1_) || (NULL == winograd_b))
+  {
+    delete[] col_buff;
+    delete[] temp1_;
+    delete[] winograd_b;
+    return;
+  }
+
+  winograd_input_im2col(col_buff);
+
+  kronecker_product(winograd_b, B, B, M, M, M, M);
+
+  compute_sgemm(rowMajor, trans, trans, tile_h_in_ * tile_w_in_, temp1_n, tile_h_in_ * tile_w_in_,
+                winograd_b, col_buff, temp1_);
+  delete[] winograd_b;
+
+  /*Step 3: convolution in winograd domain*/
+  for (int j = 0; j < tile_h_in_ * tile_w_in_; ++j)
+  {
+    compute_sgemm(rowMajor, notrans, notrans, outch, batch * ntiles_h_ * ntiles_w_, inch,
+                  winograd_weight_ + j * outch * inch,
+                  temp1_ + j * batch * inch * ntiles_h_ * ntiles_w_,
+                  col_buff + j * batch * outch * ntiles_h_ * ntiles_w_);
+  }
+
+  /*Step 4: transfer back to time domain*/
+  float *winograd_a = new float[M * (M - N + 1) * M * (M - N + 1)];
+  if (NULL == winograd_a)
+  {
+    delete[] col_buff;
+    delete[] temp1_;
+    return;
+  }
+
+  kronecker_product(winograd_a, A, A, M, M - N + 1, M, M - N + 1);
+  compute_sgemm(rowMajor, trans, notrans, batch * outch * ntiles_h_ * ntiles_w_,
+                tile_h_out_ * tile_w_out_, tile_h_in_ * tile_w_in_, col_buff, winograd_a, temp1_);
+  delete[] winograd_a;
+  delete[] col_buff;
+
+  winograd_output_col2im(temp1_);
+
+  delete[] temp1_;
+}
+
+void conv_winograd_batch::run()
+{
+  if (error_)
+    return;
+
+  compute_winograd();
+}
+
+} // namespace srcn
+} // namespace nnfw
diff --git a/runtimes/libs/srcn/src/conv_winograd_batch.h b/runtimes/libs/srcn/src/conv_winograd_batch.h
new file mode 100644
index 000000000..8cf4428bb
--- /dev/null
+++ b/runtimes/libs/srcn/src/conv_winograd_batch.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_SRCN_CONV_WINOGRAD_BATCH_H__
+#define __NNFW_SRCN_CONV_WINOGRAD_BATCH_H__
+
+#include "srcn/conv_type.h"
+#include "winograd.h"
+#include "sgemm_singlethread.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+class conv_winograd_batch
+{
+public:
+  conv_winograd_batch(const convMat_t &in_mat, convMat_t &out_mat, const convParams_t &in_param,
+                      convType_t conv_type, const float *winograd_weight, int num_threads);
+  ~conv_winograd_batch();
+
+  void run();
+
+private:
+  void param_init();
+  void compute_sgemm(sgemmType_t major_type, sgemmTrans_t ltrans, sgemmTrans_t rtrans, const int m,
+                     const int n, const int k, const float *lhs_data, const float *rhs_data,
+                     float *res_data);
+  void winograd_input_im2col(float *col_buff);
+  void winograd_output_col2im(const float *col_buff);
+  void compute_winograd();
+
+  const convMat_t in_mat_;
+  convMat_t out_mat_;
+  const convParams_t in_param_;
+  convType_t conv_type_;
+  const float *winograd_weight_;
+  const int num_threads_;
+
+  int tile_w_in_;
+  int tile_h_in_;
+  int tile_w_out_;
+  int tile_h_out_;
+  int ntiles_w_;
+  int ntiles_h_;
+
+  int error_;
+};
+
+} // namespace srcn
+} // namespace nnfw
+
+#endif // __NNFW_SRCN_CONV_WINOGRAD_BATCH_H__
diff --git a/runtimes/libs/srcn/src/deconv_sgemm_multithreads.cc b/runtimes/libs/srcn/src/deconv_sgemm_multithreads.cc
new file mode 100644
index 000000000..77042bcfa
--- /dev/null
+++ b/runtimes/libs/srcn/src/deconv_sgemm_multithreads.cc
@@ -0,0 +1,387 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifdef _OPENMP
+#include <omp.h>
+#endif
+
+#include "common.h"
+#include "sgemm_kernel.h"
+#include "sgemm_pack.h"
+#include "deconv_sgemm_multithreads.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+void deconv_sgemm_multithreads::param_init()
+{
+#if __aarch64__
+  if (conv_type_ == row_major)
+  {
+    mr_ = 8;
+    nr_ = 12;
+  }
+  else if (conv_type_ == col_major)
+  {
+
+    mr_ = 12;
+    nr_ = 8;
+  }
+#else  // __aarch64__
+  if (conv_type_ == row_major)
+  {
+    mr_ = 6;
+    nr_ = 8;
+  }
+  else if (conv_type_ == col_major)
+  {
+    mr_ = 8;
+    nr_ = 6;
+  }
+#endif // __aarch64__
+
+  int col = n_;
+
+  if (m_ > n_)
+  {
+    shard_type_ = shardByRow;
+    col = m_;
+  }
+  else
+  {
+    shard_type_ = shardByCol;
+  }
+
+  int th_base = divup(col, num_threads_);
+
+  th_base = MIN(MAX(th_base, MIN_COL), MAX_COL);
+
+  int k_div = (nr_ * sizeof_RhsScalar);
+  int k_sub = (mr_ * nr_ * sizeof_ResScalar);
+
+  const int k_cache = MIN(divup((int)(L1_CACHE_SIZE - k_sub), (int)k_div * 2), MAX_K);
+  bk_ = MIN(k_cache, k_);
+
+  if (shard_type_ == shardByCol)
+  {
+    int m_sub = (bk_ * nr_ * sizeof_RhsScalar);
+    int m_div = (sizeof_LhsScalar * bk_ * 2 * num_threads_);
+    if (L3_CACHE_SIZE)
+      m_div = (sizeof_LhsScalar * bk_ * 2);
+    int m_cache = divup((L2_CACHE_SIZE - m_sub), m_div);
+    bm_ = MIN(m_cache, m_);
+
+    bn_ = MIN(th_base, n_);
+    if (L3_CACHE_SIZE)
+    {
+      int n_sub = (bk_ * bm_ * sizeof_RhsScalar);
+      int n_div = (sizeof_LhsScalar * bk_ * 2 * num_threads_);
+      int n_cache = divup((L3_CACHE_SIZE - n_sub), n_div);
+      bn_ = MIN(n_cache, bn_);
+    }
+  }
+  else
+  {
+    int n_sub = (bk_ * mr_ * sizeof_LhsScalar);
+    int n_div = (sizeof_LhsScalar * bk_ * 2 * num_threads_);
+    if (L3_CACHE_SIZE)
+      n_div = (sizeof_LhsScalar * bk_ * 2);
+    int n_cache = divup((L2_CACHE_SIZE - n_sub), n_div);
+    bn_ = MIN(n_cache, n_);
+
+    bm_ = MIN(th_base, m_);
+    if (L3_CACHE_SIZE)
+    {
+      int m_sub = (bk_ * bn_ * sizeof_RhsScalar);
+      int m_div = (sizeof_LhsScalar * bk_ * 2 * num_threads_);
+      int m_cache = divup((L3_CACHE_SIZE - m_sub), m_div);
+      bm_ = MIN(m_cache, bm_);
+    }
+  }
+
+  nm_ = divup(m_, bm_);
+  nn_ = divup(n_, bn_);
+  nk_ = divup(k_, bk_);
+
+  rm_ = m_ % bm_;
+  rn_ = n_ % bn_;
+  rk_ = k_ % bk_;
+}
+
+deconv_sgemm_multithreads::deconv_sgemm_multithreads(const convMat_t &in_mat,
+                                                     const convMat_t &weights_mat,
+                                                     convMat_t &out_mat,
+                                                     const convParams_t &in_param, int num_threads,
+                                                     convType_t conv_type)
+
+    : in_mat_(in_mat), weights_mat_(weights_mat), out_mat_(out_mat), in_param_(in_param),
+      num_threads_(num_threads), conv_type_(conv_type)
+{
+  m_ = in_param_.kernel_h * in_param_.kernel_w * out_mat_.c;
+#ifdef NCNN
+  n_ = alignSize(in_mat_.h * in_mat_.w, 16 / sizeof(float));
+#else  // NCNN
+  n_ = in_mat_.w * in_mat_.h;
+#endif // NCNN
+  k_ = in_mat.c;
+
+  param_init();
+
+  int lhs_stride = (bm_ + mr_ - 1) / mr_ * mr_ * bk_;
+  int rhs_stride = (bn_ + nr_ - 1) / nr_ * nr_ * bk_;
+
+  if (shard_type_ == shardByCol)
+  {
+    plhs_buffer_ = new float[lhs_stride * 1 * nm_];
+    prhs_buffer_ = new float[rhs_stride * num_threads_];
+  }
+  else
+  {
+    plhs_buffer_ = new float[lhs_stride * num_threads_];
+    prhs_buffer_ = new float[rhs_stride * 1 * nn_];
+  }
+
+  pres_buffer_ = new float[bm_ * bn_ * num_threads_];
+
+  if (plhs_buffer_ == NULL || prhs_buffer_ == NULL || pres_buffer_ == NULL)
+  {
+    error_ = 1;
+  }
+
+  if (in_param_.kernel_w != 1 || in_param_.kernel_h != 1 || in_param_.stride_w != 1 ||
+      in_param_.stride_h != 1 || in_param_.padding != 0)
+  {
+    need_col2im_ = 1;
+  }
+  else
+  {
+    need_col2im_ = 0;
+  }
+
+  omp_set_num_threads(num_threads_);
+
+  error_ = 0;
+}
+
+deconv_sgemm_multithreads::~deconv_sgemm_multithreads()
+{
+  if (plhs_buffer_)
+    delete[] plhs_buffer_;
+  if (prhs_buffer_)
+    delete[] prhs_buffer_;
+  if (pres_buffer_)
+    delete[] pres_buffer_;
+}
+
+void deconv_sgemm_multithreads::run()
+{
+  if (error_)
+    return;
+
+  if (shard_type_ == shardByCol && conv_type_ == col_major)
+  {
+    compute_colmajor_colshard();
+  }
+  else if (shard_type_ == shardByRow && conv_type_ == col_major)
+  {
+    compute_colmajor_rowshard();
+  }
+  else if (shard_type_ == shardByCol && conv_type_ == row_major)
+  {
+    compute_rowmajor_colshard();
+  }
+  else if (shard_type_ == shardByRow && conv_type_ == row_major)
+  {
+    compute_rowmajor_rowshard();
+  }
+}
+
+void deconv_sgemm_multithreads::compute_rowmajor_colshard()
+{
+  int lhs_stride = (bm_ + mr_ - 1) / mr_ * mr_ * bk_;
+  int rhs_stride = (bn_ + nr_ - 1) / nr_ * nr_ * bk_;
+
+  for (int l = 0; l < nk_; l++)
+  {
+    const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+#pragma omp parallel for
+    for (int i = 0; i < nm_; i++)
+    {
+      const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+      _pack_rowmajor_trans_lhs(mr_, bm, bk, m_, &weights_mat_.data[l * bk_ * m_ + i * bm_],
+                               &plhs_buffer_[i * lhs_stride]);
+    }
+
+#pragma omp parallel for
+    for (int j = 0; j < nn_; j++)
+    {
+      int thread_num = omp_get_thread_num();
+      float *prhs_ptr = &prhs_buffer_[rhs_stride * thread_num];
+      float *pres_ptr = &pres_buffer_[bm_ * bn_ * thread_num];
+
+      const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+      _pack_rowmajor_notrans_rhs(nr_, bn, bk, n_, &in_mat_.data[l * bk_ * n_ + j * bn_], prhs_ptr);
+
+      for (int i = 0; i < nm_; i++)
+      {
+        const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+        _sgemm_rowmajor_macro_kernel_divnm(mr_, nr_, bm, bn, bk, &plhs_buffer_[i * lhs_stride],
+                                           prhs_ptr, pres_ptr, 0, bn, bk);
+
+        if (need_col2im_)
+          _unpack_rowmajor_image_res(bm, bn, i * bm_, j * bn_, const_cast<convMat_t *>(&in_mat_),
+                                     &out_mat_, const_cast<convParams_t *>(&in_param_), pres_ptr);
+      }
+    }
+  }
+}
+
+void deconv_sgemm_multithreads::compute_rowmajor_rowshard()
+{
+  int lhs_stride = (bm_ + mr_ - 1) / mr_ * mr_ * bk_;
+  int rhs_stride = (bn_ + nr_ - 1) / nr_ * nr_ * bk_;
+
+  for (int l = 0; l < nk_; l++)
+  {
+    const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+#pragma omp parallel for
+    for (int j = 0; j < nn_; j++)
+    {
+      const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+      _pack_rowmajor_notrans_rhs(nr_, bn, bk, n_, &in_mat_.data[l * bk_ * n_ + j * bn_],
+                                 &prhs_buffer_[j * rhs_stride]);
+    }
+
+#pragma omp parallel for
+    for (int i = 0; i < nm_; i++)
+    {
+      int thread_num = omp_get_thread_num();
+      float *plhs_ptr = &plhs_buffer_[lhs_stride * thread_num];
+      float *pres_ptr = &pres_buffer_[bm_ * bn_ * thread_num];
+
+      const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+      _pack_rowmajor_trans_lhs(mr_, bm, bk, m_, &weights_mat_.data[l * bk_ * m_ + i * bm_],
+                               plhs_ptr);
+
+      for (int j = 0; j < nn_; j++)
+      {
+        const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+        _sgemm_rowmajor_macro_kernel_divmn(mr_, nr_, bm, bn, bk, plhs_ptr,
+                                           &prhs_buffer_[j * rhs_stride], pres_ptr, 0, bn, bk);
+        if (need_col2im_)
+          _unpack_rowmajor_image_res(bm, bn, i * bm_, j * bn_, const_cast<convMat_t *>(&in_mat_),
+                                     &out_mat_, const_cast<convParams_t *>(&in_param_), pres_ptr);
+      }
+    }
+  }
+}
+
+void deconv_sgemm_multithreads::compute_colmajor_colshard()
+{
+  int lhs_stride = (bm_ + mr_ - 1) / mr_ * mr_ * bk_;
+  int rhs_stride = (bn_ + nr_ - 1) / nr_ * nr_ * bk_;
+
+  for (int l = 0; l < nk_; l++)
+  {
+    const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+#pragma omp parallel for
+    for (int i = 0; i < nm_; i++)
+    {
+      const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+      _pack_colmajor_trans_lhs(mr_, bm, bk, k_, &weights_mat_.data[i * bm_ * k_ + l * bk_],
+                               &plhs_buffer_[i * lhs_stride]);
+    }
+
+#pragma omp parallel for
+    for (int j = 0; j < nn_; j++)
+    {
+      int thread_num = omp_get_thread_num();
+      float *prhs_ptr = &prhs_buffer_[rhs_stride * thread_num];
+      float *pres_ptr = &pres_buffer_[bm_ * bn_ * thread_num];
+
+      const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+      _pack_colmajor_notrans_rhs(nr_, bn, bk, k_, &in_mat_.data[j * bn_ * k_ + l * bk_], prhs_ptr);
+
+      for (int i = 0; i < nm_; i++)
+      {
+        const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+        _sgemm_colmajor_macro_kernel_divnm(mr_, nr_, bm, bn, bk, &plhs_buffer_[i * lhs_stride],
+                                           prhs_ptr, pres_ptr, 0, bm, bk);
+
+        // Need to add lock?
+        if (need_col2im_)
+          _unpack_colmajor_image_res(bm, bn, i * bm_, j * bn_, const_cast<convMat_t *>(&in_mat_),
+                                     &out_mat_, const_cast<convParams_t *>(&in_param_), pres_ptr);
+      }
+    }
+  }
+}
+
+void deconv_sgemm_multithreads::compute_colmajor_rowshard()
+{
+  int lhs_stride = (bm_ + mr_ - 1) / mr_ * mr_ * bk_;
+  int rhs_stride = (bn_ + nr_ - 1) / nr_ * nr_ * bk_;
+
+  for (int l = 0; l < nk_; l++)
+  {
+    const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+#pragma omp parallel for
+    for (int j = 0; j < nn_; j++)
+    {
+      const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+      _pack_colmajor_notrans_rhs(nr_, bn, bk, k_, &in_mat_.data[j * bn_ * k_ + l * bk_],
+                                 &prhs_buffer_[j * rhs_stride]);
+    }
+
+#pragma omp parallel for
+    for (int i = 0; i < nm_; i++)
+    {
+      int thread_num = omp_get_thread_num();
+      float *plhs_ptr = &plhs_buffer_[lhs_stride * thread_num];
+      float *pres_ptr = &pres_buffer_[bm_ * bn_ * thread_num];
+
+      const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+      _pack_colmajor_trans_lhs(mr_, bm, bk, k_, &weights_mat_.data[i * bm_ * k_ + l * bk_],
+                               plhs_ptr);
+
+      for (int j = 0; j < nn_; j++)
+      {
+        const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+        _sgemm_colmajor_macro_kernel_divmn(mr_, nr_, bm, bn, bk, plhs_ptr,
+                                           &prhs_buffer_[j * rhs_stride], pres_ptr, 0, bm, bk);
+
+        if (need_col2im_)
+          _unpack_colmajor_image_res(bm, bn, i * bm_, j * bn_, const_cast<convMat_t *>(&in_mat_),
+                                     &out_mat_, const_cast<convParams_t *>(&in_param_), pres_ptr);
+      }
+    }
+  }
+}
+
+} // namespace srcn
+} // namespace nnfw
diff --git a/runtimes/libs/srcn/src/deconv_sgemm_multithreads.h b/runtimes/libs/srcn/src/deconv_sgemm_multithreads.h
new file mode 100644
index 000000000..0f0e47baa
--- /dev/null
+++ b/runtimes/libs/srcn/src/deconv_sgemm_multithreads.h
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_SRCN_DECONV_SGEMM_MULTITHREADS_H__
+#define __NNFW_SRCN_DECONV_SGEMM_MULTITHREADS_H__
+
+#include "srcn/conv_type.h"
+#include "common.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+class deconv_sgemm_multithreads
+{
+public:
+  deconv_sgemm_multithreads(const convMat_t &in_mat, const convMat_t &weights_mat,
+                            convMat_t &out_mat, const convParams_t &in_param, int num_threads,
+                            convType_t conv_type);
+  ~deconv_sgemm_multithreads();
+
+  void run();
+
+private:
+  void param_init();
+
+  void compute_rowmajor_colshard();
+  void compute_rowmajor_rowshard();
+  void compute_colmajor_colshard();
+  void compute_colmajor_rowshard();
+
+  const convMat_t in_mat_;
+  const convMat_t weights_mat_;
+  convMat_t out_mat_;
+  const convParams_t in_param_;
+  convType_t conv_type_;
+  const int num_threads_;
+
+  int m_;
+  int n_;
+  int k_;
+
+  int bm_;
+  int bn_;
+  int bk_;
+
+  int rm_;
+  int rn_;
+  int rk_;
+
+  int nm_;
+  int nn_;
+  int nk_;
+
+  int mr_;
+  int nr_;
+
+  int need_col2im_;
+  shardType_t shard_type_;
+
+  float *prhs_buffer_;
+  float *plhs_buffer_;
+  float *pres_buffer_;
+
+  int error_;
+};
+
+} // namespace srcn
+} // namespace nnfw
+
+#endif // __NNFW_SRCN_DECONV_SGEMM_MULTITHREADS_H__
diff --git a/runtimes/libs/srcn/src/depthwise_conv.cc b/runtimes/libs/srcn/src/depthwise_conv.cc
new file mode 100644
index 000000000..a06ee7050
--- /dev/null
+++ b/runtimes/libs/srcn/src/depthwise_conv.cc
@@ -0,0 +1,2639 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifdef _OPENMP
+#include <omp.h>
+#endif
+
+#include <arm_neon.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "common.h"
+#include "srcn/conv_type.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+static void depthwise_conv3x3S1_nopad(const convMat_t &in_mat, convMat_t &out_mat,
+                                      const convMat_t &kernel, const convMat_t &bias)
+{
+#if !__aarch64__
+  int w = in_mat.w;
+  int h = in_mat.h;
+  int outw = out_mat.w;
+  int outh = out_mat.h;
+  int channels = in_mat.c;
+
+#pragma omp parallel for
+  for (int c = 0; c < channels; c++)
+  {
+    const float *filter = kernel.data + c * 9;
+#ifdef NCNN
+    float *inbuf = in_mat.data + c * alignSize(w * h, 16 / sizeof(float));
+    float *outbuf = out_mat.data + c * alignSize(outw * outh, 16 / sizeof(float));
+#else  // NCNN
+    float *inbuf = in_mat.data + c * w * h;
+    float *outbuf = out_mat.data + c * outw * outh;
+#endif // NCNN
+    float bias0 = bias.data ? bias.data[c] : 0.0f;
+
+    register float32x4_t weight012 asm("q4") = vld1q_f32(filter);
+    register float32x4_t weight345 asm("q5") = vld1q_f32(filter + 3);
+    register float32x4_t weight678 asm("q6") = vld1q_f32(filter + 6);
+    register float32x4_t qbias0 asm("q7") = vdupq_n_f32(bias0);
+
+    float *in_ptr0 = inbuf + 0 * w;
+    float *in_ptr1 = inbuf + 1 * w;
+    float *in_ptr2 = inbuf + 2 * w;
+    float *in_ptr3 = inbuf + 3 * w;
+
+    float *out_ptr0 = outbuf + 0 * outw;
+    float *out_ptr1 = outbuf + 1 * outw;
+
+    int i;
+    for (i = 0; i + 1 < outh; i += 2)
+    {
+      int nn = outw >> 2 - 1;
+      int remain = outw & 0x03;
+
+      if (nn > 0)
+      {
+        __asm __volatile("pld [%[in_ptr0], #192]\n"
+                         "vld1.f32 {d0-d2}, [%[in_ptr0]]\n"
+                         "vext.32 q2, q0, q1, #1\n"
+                         "vext.32 q3, q0, q1, #2\n"
+                         "add %[in_ptr0], %[in_ptr0], #16\n"
+
+                         "1:\n"
+                         "add %[in_ptr0], %[in_ptr0], #16\n"
+                         "vand q14, %q[qbias0], %q[qbias0]\n"
+                         "vmul.f32 q10, q0, %e[weight012][0]\n"
+                         "vmul.f32 q11, q2, %e[weight012][1]\n"
+
+                         "pld [%[in_ptr1], #192]\n"
+                         "vld1.f32 {d0-d2}, [%[in_ptr1]]\n"
+                         "vmla.f32 q14, q3, %f[weight012][0]\n"
+                         "vext.32 q2, q0, q1, #1\n"
+                         "vext.32 q3, q0, q1, #2\n"
+                         "add %[in_ptr1], %[in_ptr1], #16\n"
+
+                         "vand q15, %q[qbias0], %q[qbias0]\n"
+                         "vmla.f32 q10, q0, %e[weight345][0]\n"
+                         "vmla.f32 q11, q2, %e[weight345][1]\n"
+                         "vmul.f32 q12, q0, %e[weight012][0]\n"
+                         "vmul.f32 q13, q2, %e[weight012][1]\n"
+
+                         "pld [%[in_ptr2], #192]\n"
+                         "vld1.f32 {d0-d2}, [%[in_ptr2]]\n"
+                         "vmla.f32 q14, q3, %f[weight345][0]\n"
+                         "vmla.f32 q15, q3, %f[weight012][0]\n"
+                         "vext.32 q2, q0, q1, #1\n"
+                         "vext.32 q3, q0, q1, #2\n"
+                         "add %[in_ptr2], %[in_ptr2], #16\n"
+
+                         "vmla.f32 q10, q0, %e[weight678][0]\n"
+                         "vmla.f32 q11, q2, %e[weight678][1]\n"
+                         "vmla.f32 q12, q0, %e[weight345][0]\n"
+                         "vmla.f32 q13, q2, %e[weight345][1]\n"
+
+                         "pld [%[in_ptr3], #192]\n"
+                         "vld1.f32 {d0-d2}, [%[in_ptr3]]\n"
+                         "vmla.f32 q14, q3, %f[weight678][0]\n"
+                         "vmla.f32 q15, q3, %f[weight345][0]\n"
+                         "vext.32 q2, q0, q1, #1\n"
+                         "vext.32 q3, q0, q1, #2\n"
+                         "add %[in_ptr3], %[in_ptr3], #16\n"
+
+                         "vmla.f32 q12, q0, %e[weight678][0]\n"
+                         "vmla.f32 q13, q2, %e[weight678][1]\n"
+
+                         "pld [%[in_ptr0], #192]\n"
+                         "vld1.f32 {d0-d2}, [%[in_ptr0]]\n"
+                         "vmla.f32 q15, q3, %f[weight678][0]\n"
+                         "vext.32 q2, q0, q1, #1\n"
+                         "vext.32 q3, q0, q1, #2\n"
+
+                         "vadd.f32  q14, q14, q10\n"
+                         "vadd.f32  q14, q14, q11\n"
+                         "vadd.f32  q15, q15, q12\n"
+                         "vadd.f32  q15, q15, q13\n"
+
+                         "subs %[nn], %[nn], #1\n"
+                         "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[out_ptr1]]!\n"
+
+                         "bne 1b\n"
+                         : [in_ptr0] "+r"(in_ptr0), [in_ptr1] "+r"(in_ptr1),
+                           [in_ptr2] "+r"(in_ptr2), [in_ptr3] "+r"(in_ptr3),
+
+                           [out_ptr0] "+r"(out_ptr0), [out_ptr1] "+r"(out_ptr1), [nn] "+r"(nn)
+                         : [weight012] "w"(weight012), [weight345] "w"(weight345),
+                           [weight678] "w"(weight678), [qbias0] "w"(qbias0)
+                         : "q0", "q1", "q2", "q3", "q8", "q9", "q10", "q11", "q12", "q13", "q14",
+                           "q15", "cc", "memory");
+      }
+
+      for (; remain > 0; remain--)
+      {
+        float32x4_t input0 = vld1q_f32(in_ptr0);
+        float32x4_t input1 = vld1q_f32(in_ptr1);
+        float32x4_t input2 = vld1q_f32(in_ptr2);
+        float32x4_t input3 = vld1q_f32(in_ptr3);
+
+        float32x4_t out0 = vmulq_f32(input0, weight012);
+        out0 = vmlaq_f32(out0, input1, weight345);
+        out0 = vmlaq_f32(out0, input2, weight678);
+
+        float32x4_t out1 = vmulq_f32(input1, weight012);
+        out1 = vmlaq_f32(out1, input2, weight345);
+        out1 = vmlaq_f32(out1, input3, weight678);
+
+        out0 = vsetq_lane_f32(bias0, out0, 3);
+        out1 = vsetq_lane_f32(bias0, out1, 3);
+
+        float32x2_t out00 = vadd_f32(vget_low_f32(out0), vget_high_f32(out0));
+        float32x2_t out11 = vadd_f32(vget_low_f32(out1), vget_high_f32(out1));
+
+        float32x2_t out01 = vpadd_f32(out00, out11);
+
+        *out_ptr0 = vget_lane_f32(out01, 0);
+        *out_ptr1 = vget_lane_f32(out01, 1);
+
+        in_ptr0++;
+        in_ptr1++;
+        in_ptr2++;
+        in_ptr3++;
+        out_ptr0++;
+        out_ptr1++;
+      }
+
+      in_ptr0 += w + 2;
+      in_ptr1 += w + 2;
+      in_ptr2 += w + 2;
+      in_ptr3 += w + 2;
+
+      out_ptr0 += outw;
+      out_ptr1 += outw;
+    }
+
+    for (; i < outh; i++)
+    {
+      int nn = outw >> 2;
+      int remain = outw & 0x03;
+
+      if (nn > 0)
+      {
+        __asm __volatile("1:\n"
+                         "vld1.f32 {d0-d2}, [%[in_ptr0]]\n"
+                         "vext.32 q2, q0, q1, #1\n"
+                         "vext.32 q3, q0, q1, #2\n"
+                         "add %[in_ptr0], %[in_ptr0], #16\n"
+
+                         "vand q14, %q[qbias0], %q[qbias0]\n"
+                         "vmla.f32 q14, q0, %e[weight012][0]\n"
+                         "vmla.f32 q14, q2, %e[weight012][1]\n"
+                         "vmla.f32 q14, q3, %f[weight012][0]\n"
+
+                         "vld1.f32 {d0-d2}, [%[in_ptr1]]\n"
+                         "vext.32 q2, q0, q1, #1\n"
+                         "vext.32 q3, q0, q1, #2\n"
+                         "add %[in_ptr1], %[in_ptr1], #16\n"
+
+                         "vmla.f32 q14, q0, %e[weight345][0]\n"
+                         "vmla.f32 q14, q2, %e[weight345][1]\n"
+                         "vmla.f32 q14, q3, %f[weight345][0]\n"
+
+                         "vld1.f32 {d0-d2}, [%[in_ptr2]]\n"
+                         "vext.32 q2, q0, q1, #1\n"
+                         "vext.32 q3, q0, q1, #2\n"
+                         "add %[in_ptr2], %[in_ptr2], #16\n"
+
+                         "vmla.f32 q14, q0, %e[weight678][0]\n"
+                         "vmla.f32 q14, q2, %e[weight678][1]\n"
+                         "vmla.f32 q14, q3, %f[weight678][0]\n"
+
+                         "subs %[nn], %[nn], #1\n"
+                         "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+
+                         "bne 1b\n"
+                         : [in_ptr0] "+r"(in_ptr0), [in_ptr1] "+r"(in_ptr1),
+                           [in_ptr2] "+r"(in_ptr2), [out_ptr0] "+r"(out_ptr0), [nn] "+r"(nn)
+                         : [weight012] "w"(weight012), [weight345] "w"(weight345),
+                           [weight678] "w"(weight678), [qbias0] "w"(qbias0)
+                         : "q0", "q1", "q2", "q3", "q8", "q9", "q10", "q11", "q12", "q13", "q14",
+                           "q15", "cc", "memory");
+      }
+
+      for (; remain > 0; remain--)
+      {
+        float32x4_t input0 = vld1q_f32(in_ptr0);
+        float32x4_t input1 = vld1q_f32(in_ptr1);
+        float32x4_t input2 = vld1q_f32(in_ptr2);
+
+        float32x4_t out0 = vmulq_f32(input0, weight012);
+        out0 = vmlaq_f32(out0, input1, weight345);
+        out0 = vmlaq_f32(out0, input2, weight678);
+
+        out0 = vsetq_lane_f32(bias0, out0, 3);
+
+        float32x2_t out00 = vadd_f32(vget_low_f32(out0), vget_high_f32(out0));
+
+        float32x2_t out01 = vpadd_f32(out00, out00);
+
+        *out_ptr0 = vget_lane_f32(out01, 0);
+
+        in_ptr0++;
+        in_ptr1++;
+        in_ptr2++;
+        out_ptr0++;
+      }
+
+      in_ptr0 += 2;
+      in_ptr1 += 2;
+      in_ptr2 += 2;
+    }
+  }
+
+#endif // !__aarch64__
+}
+
+static void depthwise_conv3x3S1_padding(const convMat_t &in_mat, convMat_t &out_mat,
+                                        const convMat_t &kernel, const convMat_t &bias)
+{
+#if !__aarch64__
+  int w = in_mat.w;
+  int h = in_mat.h;
+  int outw = out_mat.w;
+  int outh = out_mat.h;
+  int channels = in_mat.c;
+
+#pragma omp parallel for
+  for (int c = 0; c < channels; c++)
+  {
+    const float *filter = kernel.data + c * 9;
+#ifdef NCNN
+    float *inbuf = in_mat.data + c * alignSize(w * h, 16 / sizeof(float));
+    float *outbuf = out_mat.data + c * alignSize(outw * outh, 16 / sizeof(float));
+#else  // NCNN
+    float *inbuf = in_mat.data + c * w * h;
+    float *outbuf = out_mat.data + c * outw * outh;
+#endif // NCNN
+    float bias0 = bias.data ? bias.data[c] : 0.0f;
+
+    register float32x4_t weight012 asm("q4") = vld1q_f32(filter);
+    register float32x4_t weight345 asm("q5") = vld1q_f32(filter + 3);
+    register float32x4_t weight678 asm("q6") = vld1q_f32(filter + 6);
+    register float32x4_t qbias0 asm("q7") = vdupq_n_f32(bias0);
+
+    float *in_ptr0 = inbuf + 0 * w;
+    float *in_ptr1 = inbuf + 1 * w;
+    float *in_ptr2 = inbuf + 2 * w;
+    float *in_ptr3 = inbuf + 3 * w;
+
+    float *out_ptr0 = outbuf + 0 * outw;
+    float *out_ptr1 = outbuf + 1 * outw;
+
+    int i;
+    for (i = 0; i + 1 < outh; i += 2)
+    {
+      int nn = (outw >> 2) - 1;
+      int remain = (outw & 0x03) + 4;
+      if (i == 0)
+      {
+        if (nn > 0)
+        {
+          __asm __volatile("vmov.i32 q8, #0\n"
+                           "pld [%[in_ptr0], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr0]]\n"
+                           "vext.32 q2, q8, q0, #3\n"
+                           "vext.32 q3, q0, q1, #1\n"
+                           "add %[in_ptr0], %[in_ptr0], #12\n"
+
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vand q15, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q2, %e[weight345][0]\n"
+                           "vmul.f32 q11, q0, %e[weight345][1]\n"
+                           "vmul.f32 q12, q2, %e[weight012][0]\n"
+                           "vmul.f32 q13, q0, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q3, %f[weight345][0]\n"
+                           "vmla.f32 q15, q3, %f[weight012][0]\n"
+                           "vext.32 q2, q8, q0, #3\n"
+                           "vext.32 q3, q0, q1, #1\n"
+                           "add %[in_ptr1], %[in_ptr1], #12\n"
+
+                           "vmla.f32 q10, q2, %e[weight678][0]\n"
+                           "vmla.f32 q11, q0, %e[weight678][1]\n"
+                           "vmla.f32 q12, q2, %e[weight345][0]\n"
+                           "vmla.f32 q13, q0, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr2], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr2]]\n"
+                           "vmla.f32 q14, q3, %f[weight678][0]\n"
+                           "vmla.f32 q15, q3, %f[weight345][0]\n"
+                           "vext.32 q2, q8, q0, #3\n"
+                           "vext.32 q3, q0, q1, #1\n"
+                           "add %[in_ptr2], %[in_ptr2], #12\n"
+
+                           "vmla.f32 q12, q2, %e[weight678][0]\n"
+                           "vmla.f32 q13, q0, %e[weight678][1]\n"
+                           "vmla.f32 q15, q3, %f[weight678][0]\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+                           "vadd.f32  q15, q15, q12\n"
+                           "vadd.f32  q15, q15, q13\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "vst1.f32 {d30-d31}, [%[out_ptr1]]!\n"
+                           "beq 2f\n"
+
+                           "pld [%[in_ptr0], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr0]]\n"
+                           "vext.32 q2, q0, q1, #1\n"
+                           "vext.32 q3, q0, q1, #2\n"
+
+                           "1:\n"
+                           "add %[in_ptr0], %[in_ptr0], #16\n"
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vand q15, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q0, %e[weight345][0]\n"
+                           "vmul.f32 q11, q2, %e[weight345][1]\n"
+                           "vmul.f32 q12, q0, %e[weight012][0]\n"
+                           "vmul.f32 q13, q2, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q3, %f[weight345][0]\n"
+                           "vmla.f32 q15, q3, %f[weight012][0]\n"
+                           "vext.32 q2, q0, q1, #1\n"
+                           "vext.32 q3, q0, q1, #2\n"
+                           "add %[in_ptr1], %[in_ptr1], #16\n"
+
+                           "vmla.f32 q10, q0, %e[weight678][0]\n"
+                           "vmla.f32 q11, q2, %e[weight678][1]\n"
+                           "vmla.f32 q12, q0, %e[weight345][0]\n"
+                           "vmla.f32 q13, q2, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr2], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr2]]\n"
+                           "vmla.f32 q14, q3, %f[weight678][0]\n"
+                           "vmla.f32 q15, q3, %f[weight345][0]\n"
+                           "vext.32 q2, q0, q1, #1\n"
+                           "vext.32 q3, q0, q1, #2\n"
+                           "add %[in_ptr2], %[in_ptr2], #16\n"
+
+                           "vmla.f32 q12, q0, %e[weight678][0]\n"
+                           "vmla.f32 q13, q2, %e[weight678][1]\n"
+
+                           "pld [%[in_ptr0], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr0]]\n"
+                           "vmla.f32 q15, q3, %f[weight678][0]\n"
+                           "vext.32 q2, q0, q1, #1\n"
+                           "vext.32 q3, q0, q1, #2\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+                           "vadd.f32  q15, q15, q12\n"
+                           "vadd.f32  q15, q15, q13\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "vst1.f32 {d30-d31}, [%[out_ptr1]]!\n"
+                           "bne 1b\n"
+                           "2:\n"
+                           : [in_ptr0] "+r"(in_ptr0), [in_ptr1] "+r"(in_ptr1),
+                             [in_ptr2] "+r"(in_ptr2), [out_ptr0] "+r"(out_ptr0),
+                             [out_ptr1] "+r"(out_ptr1), [nn] "+r"(nn)
+                           : [weight012] "w"(weight012), [weight345] "w"(weight345),
+                             [weight678] "w"(weight678), [qbias0] "w"(qbias0)
+                           : "q0", "q1", "q2", "q3", "q8", "q9", "q10", "q11", "q12", "q13", "q14",
+                             "q15", "cc", "memory");
+        }
+
+        for (; remain > 0; remain--)
+        {
+          // TODO: when nn == 0, pad_left comes here.
+          float32x4_t input0 = vld1q_f32(in_ptr0);
+          float32x4_t input1 = vld1q_f32(in_ptr1);
+          float32x4_t input2 = vld1q_f32(in_ptr2);
+
+          if (remain == 1)
+          {
+            input0 = vsetq_lane_f32(0.0f, input0, 2);
+            input1 = vsetq_lane_f32(0.0f, input1, 2);
+            input2 = vsetq_lane_f32(0.0f, input2, 2);
+          }
+
+          float32x4_t out0 = vmulq_f32(input0, weight345);
+          out0 = vmlaq_f32(out0, input1, weight678);
+
+          float32x4_t out1 = vmulq_f32(input0, weight012);
+          out1 = vmlaq_f32(out1, input1, weight345);
+          out1 = vmlaq_f32(out1, input2, weight678);
+
+          out0 = vsetq_lane_f32(bias0, out0, 3);
+          out1 = vsetq_lane_f32(bias0, out1, 3);
+
+          float32x2_t out00 = vadd_f32(vget_low_f32(out0), vget_high_f32(out0));
+          float32x2_t out11 = vadd_f32(vget_low_f32(out1), vget_high_f32(out1));
+
+          float32x2_t out01 = vpadd_f32(out00, out11);
+
+          *out_ptr0 = vget_lane_f32(out01, 0);
+          *out_ptr1 = vget_lane_f32(out01, 1);
+
+          in_ptr0++;
+          in_ptr1++;
+          in_ptr2++;
+          out_ptr0++;
+          out_ptr1++;
+        }
+
+        in_ptr0 += 1;
+        in_ptr1 += 1;
+        in_ptr2 += 1;
+        in_ptr3 += w;
+      }
+      else if (i == outh - 2)
+      {
+        if (nn > 0)
+        {
+          __asm __volatile("vmov.i32 q8, #0\n"
+                           "pld [%[in_ptr0], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr0]]\n"
+                           "vext.32 q2, q8, q0, #3\n"
+                           "vext.32 q3, q0, q1, #1\n"
+                           "add %[in_ptr0], %[in_ptr0], #12\n"
+
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q2, %e[weight012][0]\n"
+                           "vmul.f32 q11, q0, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q3, %f[weight012][0]\n"
+                           "vext.32 q2, q8, q0, #3\n"
+                           "vext.32 q3, q0, q1, #1\n"
+                           "add %[in_ptr1], %[in_ptr1], #12\n"
+
+                           "vand q15, %q[qbias0], %q[qbias0]\n"
+                           "vmla.f32 q10, q2, %e[weight345][0]\n"
+                           "vmla.f32 q11, q0, %e[weight345][1]\n"
+                           "vmul.f32 q12, q2, %e[weight012][0]\n"
+                           "vmul.f32 q13, q0, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr2], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr2]]\n"
+                           "vmla.f32 q14, q3, %f[weight345][0]\n"
+                           "vmla.f32 q15, q3, %f[weight012][0]\n"
+                           "vext.32 q2, q8, q0, #3\n"
+                           "vext.32 q3, q0, q1, #1\n"
+                           "add %[in_ptr2], %[in_ptr2], #12\n"
+
+                           "vmla.f32 q10, q2, %e[weight678][0]\n"
+                           "vmla.f32 q11, q0, %e[weight678][1]\n"
+                           "vmla.f32 q12, q2, %e[weight345][0]\n"
+                           "vmla.f32 q13, q0, %e[weight345][1]\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+                           "vadd.f32  q15, q15, q12\n"
+                           "vadd.f32  q15, q15, q13\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "vst1.f32 {d30-d31}, [%[out_ptr1]]!\n"
+                           "beq 2f\n"
+
+                           "pld [%[in_ptr0], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr0]]\n"
+                           "vext.32 q2, q0, q1, #1\n"
+                           "vext.32 q3, q0, q1, #2\n"
+
+                           "1:\n"
+                           "add %[in_ptr0], %[in_ptr0], #16\n"
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q0, %e[weight012][0]\n"
+                           "vmul.f32 q11, q2, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q3, %f[weight012][0]\n"
+                           "vext.32 q2, q0, q1, #1\n"
+                           "vext.32 q3, q0, q1, #2\n"
+                           "add %[in_ptr1], %[in_ptr1], #16\n"
+
+                           "vand q15, %q[qbias0], %q[qbias0]\n"
+                           "vmla.f32 q10, q0, %e[weight345][0]\n"
+                           "vmla.f32 q11, q2, %e[weight345][1]\n"
+                           "vmul.f32 q12, q0, %e[weight012][0]\n"
+                           "vmul.f32 q13, q2, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr2], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr2]]\n"
+                           "vmla.f32 q14, q3, %f[weight345][0]\n"
+                           "vmla.f32 q15, q3, %f[weight012][0]\n"
+                           "vext.32 q2, q0, q1, #1\n"
+                           "vext.32 q3, q0, q1, #2\n"
+                           "add %[in_ptr2], %[in_ptr2], #16\n"
+
+                           "vmla.f32 q10, q0, %e[weight678][0]\n"
+                           "vmla.f32 q11, q2, %e[weight678][1]\n"
+                           "vmla.f32 q12, q0, %e[weight345][0]\n"
+                           "vmla.f32 q13, q2, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr0], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr0]]\n"
+                           "vmla.f32 q14, q3, %f[weight678][0]\n"
+                           "vmla.f32 q15, q3, %f[weight345][0]\n"
+                           "vext.32 q2, q0, q1, #1\n"
+                           "vext.32 q3, q0, q1, #2\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+                           "vadd.f32  q15, q15, q12\n"
+                           "vadd.f32  q15, q15, q13\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "vst1.f32 {d30-d31}, [%[out_ptr1]]!\n"
+                           "bne 1b\n"
+                           "2:\n"
+                           : [in_ptr0] "+r"(in_ptr0), [in_ptr1] "+r"(in_ptr1),
+                             [in_ptr2] "+r"(in_ptr2), [out_ptr0] "+r"(out_ptr0),
+                             [out_ptr1] "+r"(out_ptr1), [nn] "+r"(nn)
+                           : [weight012] "w"(weight012), [weight345] "w"(weight345),
+                             [weight678] "w"(weight678), [qbias0] "w"(qbias0)
+                           : "q0", "q1", "q2", "q3", "q8", "q9", "q10", "q11", "q12", "q13", "q14",
+                             "q15", "cc", "memory");
+        }
+        for (; remain > 0; remain--)
+        {
+          // TODO: when nn == 0, pad_left comes here.
+          float32x4_t input0 = vld1q_f32(in_ptr0);
+          float32x4_t input1 = vld1q_f32(in_ptr1);
+          float32x4_t input2 = vld1q_f32(in_ptr2);
+
+          if (remain == 1)
+          {
+            input0 = vsetq_lane_f32(0.0f, input0, 2);
+            input1 = vsetq_lane_f32(0.0f, input1, 2);
+            input2 = vsetq_lane_f32(0.0f, input2, 2);
+          }
+
+          float32x4_t out0 = vmulq_f32(input0, weight012);
+          out0 = vmlaq_f32(out0, input1, weight345);
+          out0 = vmlaq_f32(out0, input2, weight678);
+
+          float32x4_t out1 = vmulq_f32(input1, weight012);
+          out1 = vmlaq_f32(out1, input2, weight345);
+
+          out0 = vsetq_lane_f32(bias0, out0, 3);
+          out1 = vsetq_lane_f32(bias0, out1, 3);
+
+          float32x2_t out00 = vadd_f32(vget_low_f32(out0), vget_high_f32(out0));
+          float32x2_t out11 = vadd_f32(vget_low_f32(out1), vget_high_f32(out1));
+
+          float32x2_t out01 = vpadd_f32(out00, out11);
+
+          *out_ptr0 = vget_lane_f32(out01, 0);
+          *out_ptr1 = vget_lane_f32(out01, 1);
+
+          in_ptr0++;
+          in_ptr1++;
+          in_ptr2++;
+          out_ptr0++;
+          out_ptr1++;
+        }
+      }
+      else
+      {
+        if (nn > 0)
+        {
+          __asm __volatile("vmov.i32 q8, #0\n"
+                           "pld [%[in_ptr0], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr0]]\n"
+                           "vext.32 q2, q8, q0, #3\n"
+                           "vext.32 q3, q0, q1, #1\n"
+                           "add %[in_ptr0], %[in_ptr0], #12\n"
+
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q2, %e[weight012][0]\n"
+                           "vmul.f32 q11, q0, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q3, %f[weight012][0]\n"
+                           "vext.32 q2, q8, q0, #3\n"
+                           "vext.32 q3, q0, q1, #1\n"
+                           "add %[in_ptr1], %[in_ptr1], #12\n"
+
+                           "vand q15, %q[qbias0], %q[qbias0]\n"
+                           "vmla.f32 q10, q2, %e[weight345][0]\n"
+                           "vmla.f32 q11, q0, %e[weight345][1]\n"
+                           "vmul.f32 q12, q2, %e[weight012][0]\n"
+                           "vmul.f32 q13, q0, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr2], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr2]]\n"
+                           "vmla.f32 q14, q3, %f[weight345][0]\n"
+                           "vmla.f32 q15, q3, %f[weight012][0]\n"
+                           "vext.32 q2, q8, q0, #3\n"
+                           "vext.32 q3, q0, q1, #1\n"
+                           "add %[in_ptr2], %[in_ptr2], #12\n"
+
+                           "vmla.f32 q10, q2, %e[weight678][0]\n"
+                           "vmla.f32 q11, q0, %e[weight678][1]\n"
+                           "vmla.f32 q12, q2, %e[weight345][0]\n"
+                           "vmla.f32 q13, q0, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr3], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr3]]\n"
+                           "vmla.f32 q14, q3, %f[weight678][0]\n"
+                           "vmla.f32 q15, q3, %f[weight345][0]\n"
+                           "vext.32 q2, q8, q0, #3\n"
+                           "vext.32 q3, q0, q1, #1\n"
+                           "add %[in_ptr3], %[in_ptr3], #12\n"
+
+                           "vmla.f32 q15, q2, %e[weight678][0]\n"
+                           "vmla.f32 q15, q0, %e[weight678][1]\n"
+                           "vmla.f32 q15, q3, %f[weight678][0]\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+                           "vadd.f32  q15, q15, q12\n"
+                           "vadd.f32  q15, q15, q13\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "vst1.f32 {d30-d31}, [%[out_ptr1]]!\n"
+                           "beq 2f\n"
+
+                           "pld [%[in_ptr0], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr0]]\n"
+                           "vext.32 q2, q0, q1, #1\n"
+                           "vext.32 q3, q0, q1, #2\n"
+
+                           "1:\n"
+                           "add %[in_ptr0], %[in_ptr0], #16\n"
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q0, %e[weight012][0]\n"
+                           "vmul.f32 q11, q2, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q3, %f[weight012][0]\n"
+                           "vext.32 q2, q0, q1, #1\n"
+                           "vext.32 q3, q0, q1, #2\n"
+                           "add %[in_ptr1], %[in_ptr1], #16\n"
+
+                           "vand q15, %q[qbias0], %q[qbias0]\n"
+                           "vmla.f32 q10, q0, %e[weight345][0]\n"
+                           "vmla.f32 q11, q2, %e[weight345][1]\n"
+                           "vmul.f32 q12, q0, %e[weight012][0]\n"
+                           "vmul.f32 q13, q2, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr2], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr2]]\n"
+                           "vmla.f32 q14, q3, %f[weight345][0]\n"
+                           "vmla.f32 q15, q3, %f[weight012][0]\n"
+                           "vext.32 q2, q0, q1, #1\n"
+                           "vext.32 q3, q0, q1, #2\n"
+                           "add %[in_ptr2], %[in_ptr2], #16\n"
+
+                           "vmla.f32 q10, q0, %e[weight678][0]\n"
+                           "vmla.f32 q11, q2, %e[weight678][1]\n"
+                           "vmla.f32 q12, q0, %e[weight345][0]\n"
+                           "vmla.f32 q13, q2, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr3], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr3]]\n"
+                           "vmla.f32 q14, q3, %f[weight678][0]\n"
+                           "vmla.f32 q15, q3, %f[weight345][0]\n"
+                           "vext.32 q2, q0, q1, #1\n"
+                           "vext.32 q3, q0, q1, #2\n"
+                           "add %[in_ptr3], %[in_ptr3], #16\n"
+
+                           "vmla.f32 q15, q0, %e[weight678][0]\n"
+                           "vmla.f32 q15, q2, %e[weight678][1]\n"
+
+                           "pld [%[in_ptr0], #192]\n"
+                           "vld1.f32 {d0-d2}, [%[in_ptr0]]\n"
+                           "vmla.f32 q15, q3, %f[weight678][0]\n"
+                           "vext.32 q2, q0, q1, #1\n"
+                           "vext.32 q3, q0, q1, #2\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q15, q15, q12\n"
+                           "vadd.f32  q14, q14, q11\n"
+                           "vadd.f32  q15, q15, q13\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "vst1.f32 {d30-d31}, [%[out_ptr1]]!\n"
+                           "bne 1b\n"
+                           "2:\n"
+                           : [in_ptr0] "+r"(in_ptr0), [in_ptr1] "+r"(in_ptr1),
+                             [in_ptr2] "+r"(in_ptr2), [in_ptr3] "+r"(in_ptr3),
+
+                             [out_ptr0] "+r"(out_ptr0), [out_ptr1] "+r"(out_ptr1), [nn] "+r"(nn)
+                           : [weight012] "w"(weight012), [weight345] "w"(weight345),
+                             [weight678] "w"(weight678), [qbias0] "w"(qbias0)
+                           : "q0", "q1", "q2", "q3", "q8", "q9", "q10", "q11", "q12", "q13", "q14",
+                             "q15", "cc", "memory");
+        }
+        for (; remain > 0; remain--)
+        {
+          // TODO: when nn == 0, pad_left comes here.
+          float32x4_t input0 = vld1q_f32(in_ptr0);
+          float32x4_t input1 = vld1q_f32(in_ptr1);
+          float32x4_t input2 = vld1q_f32(in_ptr2);
+          float32x4_t input3 = vld1q_f32(in_ptr3);
+
+          if (remain == 1)
+          {
+            input0 = vsetq_lane_f32(0.0f, input0, 2);
+            input1 = vsetq_lane_f32(0.0f, input1, 2);
+            input2 = vsetq_lane_f32(0.0f, input2, 2);
+            input3 = vsetq_lane_f32(0.0f, input3, 2);
+          }
+
+          float32x4_t out0 = vmulq_f32(input0, weight012);
+          out0 = vmlaq_f32(out0, input1, weight345);
+          out0 = vmlaq_f32(out0, input2, weight678);
+
+          float32x4_t out1 = vmulq_f32(input1, weight012);
+          out1 = vmlaq_f32(out1, input2, weight345);
+          out1 = vmlaq_f32(out1, input3, weight678);
+
+          out0 = vsetq_lane_f32(bias0, out0, 3);
+          out1 = vsetq_lane_f32(bias0, out1, 3);
+
+          float32x2_t out00 = vadd_f32(vget_low_f32(out0), vget_high_f32(out0));
+          float32x2_t out11 = vadd_f32(vget_low_f32(out1), vget_high_f32(out1));
+
+          float32x2_t out01 = vpadd_f32(out00, out11);
+
+          *out_ptr0 = vget_lane_f32(out01, 0);
+          *out_ptr1 = vget_lane_f32(out01, 1);
+
+          in_ptr0++;
+          in_ptr1++;
+          in_ptr2++;
+          in_ptr3++;
+          out_ptr0++;
+          out_ptr1++;
+        }
+        in_ptr0 += w + 1;
+        in_ptr1 += w + 1;
+        in_ptr2 += w + 1;
+        in_ptr3 += w + 1;
+      }
+
+      out_ptr0 += outw;
+      out_ptr1 += outw;
+    }
+
+    for (; i < outh; i++)
+    {
+      // TODO:if i == 0, pad_top comes here.
+      int nn = (outw >> 2) - 1;
+      int remain = (outw & 0x03) + 4;
+
+      if (nn > 0)
+      {
+        __asm __volatile("vmov.i32 q8, #0\n"
+                         "pld [%[in_ptr0], #192]\n"
+                         "vld1.f32 {d0-d2}, [%[in_ptr0]]\n"
+                         "vext.32 q2, q8, q0, #3\n"
+                         "vext.32 q3, q0, q1, #1\n"
+                         "add %[in_ptr0], %[in_ptr0], #12\n"
+
+                         "vand q14, %q[qbias0], %q[qbias0]\n"
+                         "vmul.f32 q10, q2, %e[weight012][0]\n"
+                         "vmul.f32 q11, q0, %e[weight012][1]\n"
+
+                         "pld [%[in_ptr1], #192]\n"
+                         "vld1.f32 {d0-d2}, [%[in_ptr1]]\n"
+                         "vmla.f32 q14, q3, %f[weight012][0]\n"
+                         "vext.32 q2, q8, q0, #3\n"
+                         "vext.32 q3, q0, q1, #1\n"
+                         "add %[in_ptr1], %[in_ptr1], #12\n"
+
+                         "vmla.f32 q10, q2, %e[weight345][0]\n"
+                         "vmla.f32 q11, q0, %e[weight345][1]\n"
+                         "vmla.f32 q14, q3, %f[weight345][0]\n"
+
+                         "vadd.f32  q14, q14, q10\n"
+                         "vadd.f32  q14, q14, q11\n"
+
+                         "subs %[nn], %[nn], #1\n"
+                         "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                         "beq 2f\n"
+
+                         "pld [%[in_ptr0], #192]\n"
+                         "vld1.f32 {d0-d2}, [%[in_ptr0]]\n"
+                         "vext.32 q2, q0, q1, #1\n"
+                         "vext.32 q3, q0, q1, #2\n"
+
+                         "1:\n"
+                         "add %[in_ptr0], %[in_ptr0], #16\n"
+                         "vand q14, %q[qbias0], %q[qbias0]\n"
+                         "vmul.f32 q10, q0, %e[weight012][0]\n"
+                         "vmul.f32 q11, q2, %e[weight012][1]\n"
+
+                         "pld [%[in_ptr1], #192]\n"
+                         "vld1.f32 {d0-d2}, [%[in_ptr1]]\n"
+                         "vmla.f32 q14, q3, %f[weight012][0]\n"
+                         "vext.32 q2, q0, q1, #1\n"
+                         "vext.32 q3, q0, q1, #2\n"
+                         "add %[in_ptr1], %[in_ptr1], #16\n"
+
+                         "vmla.f32 q10, q0, %e[weight345][0]\n"
+                         "vmla.f32 q11, q2, %e[weight345][1]\n"
+
+                         "pld [%[in_ptr0], #192]\n"
+                         "vld1.f32 {d0-d2}, [%[in_ptr0]]\n"
+                         "vmla.f32 q14, q3, %f[weight678][0]\n"
+                         "vext.32 q2, q0, q1, #1\n"
+                         "vext.32 q3, q0, q1, #2\n"
+
+                         "vadd.f32  q14, q14, q10\n"
+                         "vadd.f32  q14, q14, q11\n"
+
+                         "subs %[nn], %[nn], #1\n"
+                         "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                         "bne 1b\n"
+                         "2:\n"
+                         : [in_ptr0] "+r"(in_ptr0), [in_ptr1] "+r"(in_ptr1),
+                           [out_ptr0] "+r"(out_ptr0), [nn] "+r"(nn)
+                         : [weight012] "w"(weight012), [weight345] "w"(weight345),
+                           [weight678] "w"(weight678), [qbias0] "w"(qbias0)
+                         : "q0", "q1", "q2", "q3", "q8", "q9", "q10", "q11", "q12", "q13", "q14",
+                           "q15", "cc", "memory");
+      }
+      for (; remain > 0; remain--)
+      {
+        // TODO: when nn == 0, pad_left comes here.
+        float32x4_t input0 = vld1q_f32(in_ptr0);
+        float32x4_t input1 = vld1q_f32(in_ptr1);
+
+        if (remain == 1)
+        {
+          input0 = vsetq_lane_f32(0.0f, input0, 2);
+          input1 = vsetq_lane_f32(0.0f, input1, 2);
+        }
+
+        float32x4_t out0 = vmulq_f32(input0, weight012);
+        out0 = vmlaq_f32(out0, input1, weight345);
+
+        out0 = vsetq_lane_f32(bias0, out0, 3);
+
+        float32x2_t out00 = vadd_f32(vget_low_f32(out0), vget_high_f32(out0));
+
+        float32x2_t out01 = vpadd_f32(out00, out00);
+
+        *out_ptr0 = vget_lane_f32(out01, 0);
+
+        in_ptr0++;
+        in_ptr1++;
+        out_ptr0++;
+        out_ptr1++;
+      }
+    }
+  }
+#endif // !__aarch64__
+}
+
+static void depthwise_conv3x3S2_nopad(const convMat_t &in_mat, convMat_t &out_mat,
+                                      const convMat_t &kernel, const convMat_t &bias)
+{
+#if !__aarch64__
+  int w = in_mat.w;
+  int h = in_mat.h;
+  int outw = out_mat.w;
+  int outh = out_mat.h;
+  int channels = in_mat.c;
+
+  const int tailstep = w - 2 * outw + w;
+
+#pragma omp parallel for
+  for (int c = 0; c < channels; c++)
+  {
+    const float *filter = kernel.data + c * 9;
+#ifdef NCNN
+    float *inbuf = in_mat.data + c * alignSize(w * h, 16 / sizeof(float));
+    float *outbuf = out_mat.data + c * alignSize(outw * outh, 16 / sizeof(float));
+#else  // NCNN
+    float *inbuf = in_mat.data + c * w * h;
+    float *outbuf = out_mat.data + c * outw * outh;
+#endif // NCNN
+    float bias0 = bias.data ? bias.data[c] : 0.0f;
+
+    register float32x4_t weight012 asm("q4") = vld1q_f32(filter);
+    register float32x4_t weight345 asm("q5") = vld1q_f32(filter + 3);
+    register float32x4_t weight678 asm("q6") = vld1q_f32(filter + 6);
+    register float32x4_t qbias0 asm("q7") = vdupq_n_f32(bias0);
+
+    float *in_ptr0 = inbuf + 0 * w;
+    float *in_ptr1 = inbuf + 1 * w;
+    float *in_ptr2 = inbuf + 2 * w;
+
+    float *out_ptr0 = outbuf + 0 * outw;
+
+    int i;
+    for (i = 0; i < outh; i++)
+    {
+      int nn = outw >> 2;
+      int remain = outw & 0x03;
+
+      if (nn > 0)
+      {
+        __asm __volatile("pld [%[in_ptr0], #256]\n"
+                         "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                         "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                         "vext.32 q3, q0, q2, #1\n"
+
+                         "1:\n"
+                         "vand q14, %q[qbias0], %q[qbias0]\n"
+                         "vmul.f32 q10, q0, %e[weight012][0]\n"
+                         "vmul.f32 q11, q1, %e[weight012][1]\n"
+
+                         "pld [%[in_ptr1], #256]\n"
+                         "vld2.f32 {d0-d3}, [%[in_ptr1]]!\n"
+                         "vld1.f32 {d4[0]}, [%[in_ptr1]]\n"
+                         "vmla.f32 q14, q3, %f[weight012][0]\n"
+                         "vext.32 q3, q0, q2, #1\n"
+
+                         "vmla.f32 q10, q0, %e[weight345][0]\n"
+                         "vmla.f32 q11, q1, %e[weight345][1]\n"
+
+                         "pld [%[in_ptr2], #256]\n"
+                         "vld2.f32 {d0-d3}, [%[in_ptr2]]!\n"
+                         "vld1.f32 {d4[0]}, [%[in_ptr2]]\n"
+                         "vmla.f32 q14, q3, %f[weight345][0]\n"
+                         "vext.32 q3, q0, q2, #1\n"
+
+                         "vmla.f32 q10, q0, %e[weight678][0]\n"
+                         "vmla.f32 q11, q1, %e[weight678][1]\n"
+
+                         "pld [%[in_ptr0], #256]\n"
+                         "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                         "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                         "vmla.f32 q14, q3, %f[weight678][0]\n"
+                         "vext.32 q3, q0, q2, #1\n"
+
+                         "vadd.f32  q14, q14, q10\n"
+                         "vadd.f32  q14, q14, q11\n"
+
+                         "subs %[nn], %[nn], #1\n"
+                         "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                         "bne 1b\n"
+                         "sub %[in_ptr0], %[in_ptr0], #32\n"
+                         : [in_ptr0] "+r"(in_ptr0), [in_ptr1] "+r"(in_ptr1),
+                           [in_ptr2] "+r"(in_ptr2), [out_ptr0] "+r"(out_ptr0), [nn] "+r"(nn)
+                         : [weight012] "w"(weight012), [weight345] "w"(weight345),
+                           [weight678] "w"(weight678), [qbias0] "w"(qbias0)
+                         : "q0", "q1", "q2", "q3", "q8", "q9", "q10", "q11", "q12", "q13", "q14",
+                           "q15", "cc", "memory");
+      }
+
+      for (; remain > 0; remain--)
+      {
+        float32x4_t input0 = vld1q_f32(in_ptr0);
+        float32x4_t input1 = vld1q_f32(in_ptr1);
+        float32x4_t input2 = vld1q_f32(in_ptr2);
+
+        float32x4_t out0 = vmulq_f32(input0, weight012);
+        out0 = vmlaq_f32(out0, input1, weight345);
+        out0 = vmlaq_f32(out0, input2, weight678);
+
+        out0 = vsetq_lane_f32(bias0, out0, 3);
+
+        float32x2_t out00 = vadd_f32(vget_low_f32(out0), vget_high_f32(out0));
+
+        float32x2_t out01 = vpadd_f32(out00, out00);
+
+        *out_ptr0 = vget_lane_f32(out01, 0);
+
+        in_ptr0 += 2;
+        in_ptr1 += 2;
+        in_ptr2 += 2;
+        out_ptr0++;
+      }
+
+      in_ptr0 += tailstep;
+      in_ptr1 += tailstep;
+      in_ptr2 += tailstep;
+    }
+  }
+#endif // !__aarch64__
+}
+
+static void depthwise_conv3x3S2_padding00(const convMat_t &in_mat, convMat_t &out_mat,
+                                          const convMat_t &kernel, const convMat_t &bias)
+{
+#if !__aarch64__
+  int w = in_mat.w;
+  int h = in_mat.h;
+  int outw = out_mat.w;
+  int outh = out_mat.h;
+  int channels = in_mat.c;
+
+#pragma omp parallel for
+  for (int c = 0; c < channels; c++)
+  {
+    const float *filter = kernel.data + c * 9;
+#ifdef NCNN
+    float *inbuf = in_mat.data + c * alignSize(w * h, 16 / sizeof(float));
+    float *outbuf = out_mat.data + c * alignSize(outw * outh, 16 / sizeof(float));
+#else  // NCNN
+    float *inbuf = in_mat.data + c * w * h;
+    float *outbuf = out_mat.data + c * outw * outh;
+#endif // NCNN
+    float bias0 = bias.data ? bias.data[c] : 0.0f;
+
+    register float32x4_t weight012 asm("q4") = vld1q_f32(filter);
+    register float32x4_t weight345 asm("q5") = vld1q_f32(filter + 3);
+    register float32x4_t weight678 asm("q6") = vld1q_f32(filter + 6);
+    register float32x4_t qbias0 asm("q7") = vdupq_n_f32(bias0);
+
+    float *in_ptr0 = inbuf + 0 * w;
+    float *in_ptr1 = inbuf + 1 * w;
+    float *in_ptr2 = inbuf + 2 * w;
+
+    float *out_ptr0 = outbuf + 0 * outw;
+
+    int i;
+    for (i = 0; i < outh; i++)
+    {
+      int nn = (outw >> 2) - 1;
+      int remain = (outw & 0x03) + 4;
+
+      if (i == outh - 1)
+      {
+        if (nn > 0)
+        {
+          __asm __volatile("pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "1:\n"
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q0, %e[weight012][0]\n"
+                           "vmul.f32 q11, q1, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr1]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q3, %f[weight012][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vmla.f32 q10, q0, %e[weight345][0]\n"
+                           "vmla.f32 q11, q1, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vmla.f32 q14, q3, %f[weight345][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "bne 1b\n"
+                           "sub %[in_ptr0], %[in_ptr0], #32\n"
+                           : [in_ptr0] "+r"(in_ptr0), [in_ptr1] "+r"(in_ptr1),
+                             [out_ptr0] "+r"(out_ptr0), [nn] "+r"(nn)
+                           : [weight012] "w"(weight012), [weight345] "w"(weight345),
+                             [weight678] "w"(weight678), [qbias0] "w"(qbias0)
+                           : "q0", "q1", "q2", "q3", "q8", "q9", "q10", "q11", "q12", "q13", "q14",
+                             "q15", "cc", "memory");
+        }
+        for (; remain > 0; remain--)
+        {
+          float32x4_t input0 = vld1q_f32(in_ptr0);
+          float32x4_t input1 = vld1q_f32(in_ptr1);
+
+          if (remain == 1)
+          {
+            input0 = vsetq_lane_f32(0.0f, input0, 2);
+            input1 = vsetq_lane_f32(0.0f, input1, 2);
+          }
+
+          float32x4_t out0 = vmulq_f32(input0, weight012);
+          out0 = vmlaq_f32(out0, input1, weight345);
+
+          out0 = vsetq_lane_f32(bias0, out0, 3);
+
+          float32x2_t out00 = vadd_f32(vget_low_f32(out0), vget_high_f32(out0));
+
+          float32x2_t out01 = vpadd_f32(out00, out00);
+
+          *out_ptr0 = vget_lane_f32(out01, 0);
+
+          in_ptr0 += 2;
+          in_ptr1 += 2;
+          out_ptr0++;
+        }
+      }
+      else
+      {
+        if (nn > 0)
+        {
+          __asm __volatile("pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "1:\n"
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q0, %e[weight012][0]\n"
+                           "vmul.f32 q11, q1, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr1]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q3, %f[weight012][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vmla.f32 q10, q0, %e[weight345][0]\n"
+                           "vmla.f32 q11, q1, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr2], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr2]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr2]]\n"
+                           "vmla.f32 q14, q3, %f[weight345][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vmla.f32 q10, q0, %e[weight678][0]\n"
+                           "vmla.f32 q11, q1, %e[weight678][1]\n"
+
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vmla.f32 q14, q3, %f[weight678][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "bne 1b\n"
+                           "sub %[in_ptr0], %[in_ptr0], #32\n"
+                           : [in_ptr0] "+r"(in_ptr0), [in_ptr1] "+r"(in_ptr1),
+                             [in_ptr2] "+r"(in_ptr2), [out_ptr0] "+r"(out_ptr0), [nn] "+r"(nn)
+                           : [weight012] "w"(weight012), [weight345] "w"(weight345),
+                             [weight678] "w"(weight678), [qbias0] "w"(qbias0)
+                           : "q0", "q1", "q2", "q3", "q8", "q9", "q10", "q11", "q12", "q13", "q14",
+                             "q15", "cc", "memory");
+        }
+        for (; remain > 0; remain--)
+        {
+          float32x4_t input0 = vld1q_f32(in_ptr0);
+          float32x4_t input1 = vld1q_f32(in_ptr1);
+          float32x4_t input2 = vld1q_f32(in_ptr2);
+
+          if (remain == 1)
+          {
+            input0 = vsetq_lane_f32(0.0f, input0, 2);
+            input1 = vsetq_lane_f32(0.0f, input1, 2);
+            input2 = vsetq_lane_f32(0.0f, input2, 2);
+          }
+
+          float32x4_t out0 = vmulq_f32(input0, weight012);
+          out0 = vmlaq_f32(out0, input1, weight345);
+          out0 = vmlaq_f32(out0, input2, weight678);
+
+          out0 = vsetq_lane_f32(bias0, out0, 3);
+
+          float32x2_t out00 = vadd_f32(vget_low_f32(out0), vget_high_f32(out0));
+
+          float32x2_t out01 = vpadd_f32(out00, out00);
+
+          *out_ptr0 = vget_lane_f32(out01, 0);
+
+          in_ptr0 += 2;
+          in_ptr1 += 2;
+          in_ptr2 += 2;
+          out_ptr0++;
+        }
+
+        in_ptr0 += w;
+        in_ptr1 += w;
+        in_ptr2 += w;
+      }
+    }
+  }
+#endif // !__aarch64__
+}
+
+static void depthwise_conv3x3S2_padding01(const convMat_t &in_mat, convMat_t &out_mat,
+                                          const convMat_t &kernel, const convMat_t &bias)
+{
+#if !__aarch64__
+  int w = in_mat.w;
+  int h = in_mat.h;
+  int outw = out_mat.w;
+  int outh = out_mat.h;
+  int channels = in_mat.c;
+
+#pragma omp parallel for
+  for (int c = 0; c < channels; c++)
+  {
+    const float *filter = kernel.data + c * 9;
+#ifdef NCNN
+    float *inbuf = in_mat.data + c * alignSize(w * h, 16 / sizeof(float));
+    float *outbuf = out_mat.data + c * alignSize(outw * outh, 16 / sizeof(float));
+#else  // NCNN
+    float *inbuf = in_mat.data + c * w * h;
+    float *outbuf = out_mat.data + c * outw * outh;
+#endif // NCNN
+    float bias0 = bias.data ? bias.data[c] : 0.0f;
+
+    register float32x4_t weight012 asm("q4") = vld1q_f32(filter);
+    register float32x4_t weight345 asm("q5") = vld1q_f32(filter + 3);
+    register float32x4_t weight678 asm("q6") = vld1q_f32(filter + 6);
+    register float32x4_t qbias0 asm("q7") = vdupq_n_f32(bias0);
+
+    float *in_ptr0 = inbuf + 0 * w;
+    float *in_ptr1 = inbuf + 1 * w;
+    float *in_ptr2 = inbuf + 2 * w;
+
+    float *out_ptr0 = outbuf + 0 * outw;
+
+    int i;
+    for (i = 0; i < outh; i++)
+    {
+      int nn = (outw >> 2) - 1;
+      int remain = (outw & 0x03) + 4;
+
+      if (i == outh - 1)
+      {
+        if (nn > 0)
+        {
+          __asm __volatile("vmov.i32 q2, #0\n"
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]\n"
+                           "vext.32 q3, q2, q0, #3\n"
+                           "add %[in_ptr0], %[in_ptr0], #28\n"
+
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q3, %e[weight012][0]\n"
+                           "vmul.f32 q11, q0, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q1, %f[weight012][0]\n"
+                           "vext.32 q3, q2, q0, #3\n"
+                           "add %[in_ptr1], %[in_ptr1], #28\n"
+
+                           "vmla.f32 q10, q3, %e[weight345][0]\n"
+                           "vmla.f32 q11, q0, %e[weight345][1]\n"
+                           "vmla.f32 q14, q1, %f[weight345][0]\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "beq 2f\n"
+
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "1:\n"
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q0, %e[weight012][0]\n"
+                           "vmul.f32 q11, q1, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr1]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q3, %f[weight012][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vmla.f32 q10, q0, %e[weight345][0]\n"
+                           "vmla.f32 q11, q1, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vmla.f32 q14, q3, %f[weight345][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "bne 1b\n"
+                           "sub %[in_ptr0], %[in_ptr0], #32\n"
+
+                           "2:\n"
+                           : [in_ptr0] "+r"(in_ptr0), [in_ptr1] "+r"(in_ptr1),
+                             [out_ptr0] "+r"(out_ptr0), [nn] "+r"(nn)
+                           : [weight012] "w"(weight012), [weight345] "w"(weight345),
+                             [weight678] "w"(weight678), [qbias0] "w"(qbias0)
+                           : "q0", "q1", "q2", "q3", "q8", "q9", "q10", "q11", "q12", "q13", "q14",
+                             "q15", "cc", "memory");
+        }
+        for (; remain > 0; remain--)
+        {
+          // TODO: if nn == 0, pad_left comes here.
+          float32x4_t input0 = vld1q_f32(in_ptr0);
+          float32x4_t input1 = vld1q_f32(in_ptr1);
+
+          if (remain == 1)
+          {
+            input0 = vsetq_lane_f32(0.0f, input0, 2);
+            input1 = vsetq_lane_f32(0.0f, input1, 2);
+          }
+
+          float32x4_t out0 = vmulq_f32(input0, weight012);
+          out0 = vmlaq_f32(out0, input1, weight345);
+
+          out0 = vsetq_lane_f32(bias0, out0, 3);
+
+          float32x2_t out00 = vadd_f32(vget_low_f32(out0), vget_high_f32(out0));
+
+          float32x2_t out01 = vpadd_f32(out00, out00);
+
+          *out_ptr0 = vget_lane_f32(out01, 0);
+
+          in_ptr0 += 2;
+          in_ptr1 += 2;
+          out_ptr0++;
+        }
+      }
+      else
+      {
+        if (nn > 0)
+        {
+          __asm __volatile("vmov.i32 q2, #0\n"
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]\n"
+                           "vext.32 q3, q2, q0, #3\n"
+                           "add %[in_ptr0], %[in_ptr0], #28\n"
+
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q3, %e[weight012][0]\n"
+                           "vmul.f32 q11, q0, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q1, %f[weight012][0]\n"
+                           "vext.32 q3, q2, q0, #3\n"
+                           "add %[in_ptr1], %[in_ptr1], #28\n"
+
+                           "vmla.f32 q10, q3, %e[weight345][0]\n"
+                           "vmla.f32 q11, q0, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr2], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr2]]\n"
+                           "vmla.f32 q14, q1, %f[weight345][0]\n"
+                           "vext.32 q3, q2, q0, #3\n"
+                           "add %[in_ptr2], %[in_ptr2], #28\n"
+
+                           "vmla.f32 q10, q3, %e[weight678][0]\n"
+                           "vmla.f32 q11, q0, %e[weight678][1]\n"
+                           "vmla.f32 q14, q1, %f[weight678][0]\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "beq 2f\n"
+
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "1:\n"
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q0, %e[weight012][0]\n"
+                           "vmul.f32 q11, q1, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr1]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q3, %f[weight012][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vmla.f32 q10, q0, %e[weight345][0]\n"
+                           "vmla.f32 q11, q1, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr2], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr2]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr2]]\n"
+                           "vmla.f32 q14, q3, %f[weight345][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vmla.f32 q10, q0, %e[weight678][0]\n"
+                           "vmla.f32 q11, q1, %e[weight678][1]\n"
+
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vmla.f32 q14, q3, %f[weight678][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "bne 1b\n"
+                           "sub %[in_ptr0], %[in_ptr0], #32\n"
+                           "2:\n"
+                           : [in_ptr0] "+r"(in_ptr0), [in_ptr1] "+r"(in_ptr1),
+                             [in_ptr2] "+r"(in_ptr2), [out_ptr0] "+r"(out_ptr0), [nn] "+r"(nn)
+                           : [weight012] "w"(weight012), [weight345] "w"(weight345),
+                             [weight678] "w"(weight678), [qbias0] "w"(qbias0)
+                           : "q0", "q1", "q2", "q3", "q8", "q9", "q10", "q11", "q12", "q13", "q14",
+                             "q15", "cc", "memory");
+        }
+        for (; remain > 0; remain--)
+        {
+          // TODO: if nn == 0, pad_left comes here.
+          float32x4_t input0 = vld1q_f32(in_ptr0);
+          float32x4_t input1 = vld1q_f32(in_ptr1);
+          float32x4_t input2 = vld1q_f32(in_ptr2);
+
+          if (remain == 1)
+          {
+            input0 = vsetq_lane_f32(0.0f, input0, 2);
+            input1 = vsetq_lane_f32(0.0f, input1, 2);
+            input2 = vsetq_lane_f32(0.0f, input2, 2);
+          }
+
+          float32x4_t out0 = vmulq_f32(input0, weight012);
+          out0 = vmlaq_f32(out0, input1, weight345);
+          out0 = vmlaq_f32(out0, input2, weight678);
+
+          out0 = vsetq_lane_f32(bias0, out0, 3);
+
+          float32x2_t out00 = vadd_f32(vget_low_f32(out0), vget_high_f32(out0));
+
+          float32x2_t out01 = vpadd_f32(out00, out00);
+
+          *out_ptr0 = vget_lane_f32(out01, 0);
+
+          in_ptr0 += 2;
+          in_ptr1 += 2;
+          in_ptr2 += 2;
+          out_ptr0++;
+        }
+
+        in_ptr0 += w;
+        in_ptr1 += w;
+        in_ptr2 += w;
+      }
+    }
+  }
+#endif // !__aarch64__
+}
+
+static void depthwise_conv3x3S2_padding10(const convMat_t &in_mat, convMat_t &out_mat,
+                                          const convMat_t &kernel, const convMat_t &bias)
+{
+#if !__aarch64__
+  int w = in_mat.w;
+  int h = in_mat.h;
+  int outw = out_mat.w;
+  int outh = out_mat.h;
+  int channels = in_mat.c;
+
+#pragma omp parallel for
+  for (int c = 0; c < channels; c++)
+  {
+    const float *filter = kernel.data + c * 9;
+#ifdef NCNN
+    float *inbuf = in_mat.data + c * alignSize(w * h, 16 / sizeof(float));
+    float *outbuf = out_mat.data + c * alignSize(outw * outh, 16 / sizeof(float));
+#else  // NCNN
+    float *inbuf = in_mat.data + c * w * h;
+    float *outbuf = out_mat.data + c * outw * outh;
+#endif // NCNN
+    float bias0 = bias.data ? bias.data[c] : 0.0f;
+
+    register float32x4_t weight012 asm("q4") = vld1q_f32(filter);
+    register float32x4_t weight345 asm("q5") = vld1q_f32(filter + 3);
+    register float32x4_t weight678 asm("q6") = vld1q_f32(filter + 6);
+    register float32x4_t qbias0 asm("q7") = vdupq_n_f32(bias0);
+
+    float *in_ptr0 = inbuf + 0 * w;
+    float *in_ptr1 = inbuf + 1 * w;
+    float *in_ptr2 = inbuf + 2 * w;
+
+    float *out_ptr0 = outbuf + 0 * outw;
+
+    int i;
+    for (i = 0; i < outh; i++)
+    {
+      int nn = (outw >> 2) - 1;
+      int remain = (outw & 0x03) + 4;
+
+      // TODO: i == 0 && i == outh -1
+      if (i == 0)
+      {
+        if (nn > 0)
+        {
+          __asm __volatile("pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "1:\n"
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q0, %e[weight345][0]\n"
+                           "vmul.f32 q11, q1, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr1], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr1]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q3, %f[weight345][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vmla.f32 q10, q0, %e[weight678][0]\n"
+                           "vmla.f32 q11, q1, %e[weight678][1]\n"
+
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vmla.f32 q14, q3, %f[weight678][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "bne 1b\n"
+                           "sub %[in_ptr0], %[in_ptr0], #32\n"
+                           : [in_ptr0] "+r"(in_ptr0), [in_ptr1] "+r"(in_ptr1),
+                             [out_ptr0] "+r"(out_ptr0), [nn] "+r"(nn)
+                           : [weight012] "w"(weight012), [weight345] "w"(weight345),
+                             [weight678] "w"(weight678), [qbias0] "w"(qbias0)
+                           : "q0", "q1", "q2", "q3", "q8", "q9", "q10", "q11", "q12", "q13", "q14",
+                             "q15", "cc", "memory");
+        }
+        for (; remain > 0; remain--)
+        {
+          float32x4_t input0 = vld1q_f32(in_ptr0);
+          float32x4_t input1 = vld1q_f32(in_ptr1);
+
+          if (remain == 1)
+          {
+            input0 = vsetq_lane_f32(0.0f, input0, 2);
+            input1 = vsetq_lane_f32(0.0f, input1, 2);
+          }
+
+          float32x4_t out0 = vmulq_f32(input0, weight345);
+          out0 = vmlaq_f32(out0, input1, weight678);
+
+          out0 = vsetq_lane_f32(bias0, out0, 3);
+
+          float32x2_t out00 = vadd_f32(vget_low_f32(out0), vget_high_f32(out0));
+
+          float32x2_t out01 = vpadd_f32(out00, out00);
+
+          *out_ptr0 = vget_lane_f32(out01, 0);
+
+          in_ptr0 += 2;
+          in_ptr1 += 2;
+          out_ptr0++;
+        }
+
+        in_ptr2 += w;
+      }
+      else if (i == outh - 1)
+      {
+        if (nn > 0)
+        {
+          __asm __volatile("pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "1:\n"
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q0, %e[weight012][0]\n"
+                           "vmul.f32 q11, q1, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr1]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q3, %f[weight012][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vmla.f32 q10, q0, %e[weight345][0]\n"
+                           "vmla.f32 q11, q1, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vmla.f32 q14, q3, %f[weight345][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "bne 1b\n"
+                           "sub %[in_ptr0], %[in_ptr0], #32\n"
+                           : [in_ptr0] "+r"(in_ptr0), [in_ptr1] "+r"(in_ptr1),
+                             [out_ptr0] "+r"(out_ptr0), [nn] "+r"(nn)
+                           : [weight012] "w"(weight012), [weight345] "w"(weight345),
+                             [weight678] "w"(weight678), [qbias0] "w"(qbias0)
+                           : "q0", "q1", "q2", "q3", "q8", "q9", "q10", "q11", "q12", "q13", "q14",
+                             "q15", "cc", "memory");
+        }
+        for (; remain > 0; remain--)
+        {
+          float32x4_t input0 = vld1q_f32(in_ptr0);
+          float32x4_t input1 = vld1q_f32(in_ptr1);
+
+          if (remain == 1)
+          {
+            input0 = vsetq_lane_f32(0.0f, input0, 2);
+            input1 = vsetq_lane_f32(0.0f, input1, 2);
+          }
+
+          float32x4_t out0 = vmulq_f32(input0, weight012);
+          out0 = vmlaq_f32(out0, input1, weight345);
+
+          out0 = vsetq_lane_f32(bias0, out0, 3);
+
+          float32x2_t out00 = vadd_f32(vget_low_f32(out0), vget_high_f32(out0));
+
+          float32x2_t out01 = vpadd_f32(out00, out00);
+
+          *out_ptr0 = vget_lane_f32(out01, 0);
+
+          in_ptr0 += 2;
+          in_ptr1 += 2;
+          out_ptr0++;
+        }
+      }
+      else
+      {
+        if (nn > 0)
+        {
+          __asm __volatile("pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "1:\n"
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q0, %e[weight012][0]\n"
+                           "vmul.f32 q11, q1, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr1]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q3, %f[weight012][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vmla.f32 q10, q0, %e[weight345][0]\n"
+                           "vmla.f32 q11, q1, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr2], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr2]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr2]]\n"
+                           "vmla.f32 q14, q3, %f[weight345][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vmla.f32 q10, q0, %e[weight678][0]\n"
+                           "vmla.f32 q11, q1, %e[weight678][1]\n"
+
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vmla.f32 q14, q3, %f[weight678][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "bne 1b\n"
+                           "sub %[in_ptr0], %[in_ptr0], #32\n"
+                           : [in_ptr0] "+r"(in_ptr0), [in_ptr1] "+r"(in_ptr1),
+                             [in_ptr2] "+r"(in_ptr2), [out_ptr0] "+r"(out_ptr0), [nn] "+r"(nn)
+                           : [weight012] "w"(weight012), [weight345] "w"(weight345),
+                             [weight678] "w"(weight678), [qbias0] "w"(qbias0)
+                           : "q0", "q1", "q2", "q3", "q8", "q9", "q10", "q11", "q12", "q13", "q14",
+                             "q15", "cc", "memory");
+        }
+        for (; remain > 0; remain--)
+        {
+          float32x4_t input0 = vld1q_f32(in_ptr0);
+          float32x4_t input1 = vld1q_f32(in_ptr1);
+          float32x4_t input2 = vld1q_f32(in_ptr2);
+
+          if (remain == 1)
+          {
+            input0 = vsetq_lane_f32(0.0f, input0, 2);
+            input1 = vsetq_lane_f32(0.0f, input1, 2);
+            input2 = vsetq_lane_f32(0.0f, input2, 2);
+          }
+
+          float32x4_t out0 = vmulq_f32(input0, weight012);
+          out0 = vmlaq_f32(out0, input1, weight345);
+          out0 = vmlaq_f32(out0, input2, weight678);
+
+          out0 = vsetq_lane_f32(bias0, out0, 3);
+
+          float32x2_t out00 = vadd_f32(vget_low_f32(out0), vget_high_f32(out0));
+
+          float32x2_t out01 = vpadd_f32(out00, out00);
+
+          *out_ptr0 = vget_lane_f32(out01, 0);
+
+          in_ptr0 += 2;
+          in_ptr1 += 2;
+          in_ptr2 += 2;
+          out_ptr0++;
+        }
+
+        in_ptr0 += w;
+        in_ptr1 += w;
+        in_ptr2 += w;
+      }
+    }
+  }
+#endif // !__aarch64__
+}
+
+static void depthwise_conv3x3S2_padding11(const convMat_t &in_mat, convMat_t &out_mat,
+                                          const convMat_t &kernel, const convMat_t &bias)
+{
+#if !__aarch64__
+  int w = in_mat.w;
+  int h = in_mat.h;
+  int outw = out_mat.w;
+  int outh = out_mat.h;
+  int channels = in_mat.c;
+
+#pragma omp parallel for
+  for (int c = 0; c < channels; c++)
+  {
+    const float *filter = kernel.data + c * 9;
+#ifdef NCNN
+    float *inbuf = in_mat.data + c * alignSize(w * h, 16 / sizeof(float));
+    float *outbuf = out_mat.data + c * alignSize(outw * outh, 16 / sizeof(float));
+#else  // NCNN
+    float *inbuf = in_mat.data + c * w * h;
+    float *outbuf = out_mat.data + c * outw * outh;
+#endif // NCNN
+    float bias0 = bias.data ? bias.data[c] : 0.0f;
+
+    register float32x4_t weight012 asm("q4") = vld1q_f32(filter);
+    register float32x4_t weight345 asm("q5") = vld1q_f32(filter + 3);
+    register float32x4_t weight678 asm("q6") = vld1q_f32(filter + 6);
+    register float32x4_t qbias0 asm("q7") = vdupq_n_f32(bias0);
+
+    float *in_ptr0 = inbuf + 0 * w;
+    float *in_ptr1 = inbuf + 1 * w;
+    float *in_ptr2 = inbuf + 2 * w;
+
+    float *out_ptr0 = outbuf + 0 * outw;
+
+    int i;
+    for (i = 0; i < outh; i++)
+    {
+      int nn = (outw >> 2) - 1;
+      int remain = (outw & 0x03) + 4;
+
+      // TODO: i == 0 && i == outh - 1
+      if (i == 0)
+      {
+        if (nn > 0)
+        {
+          __asm __volatile("vmov.i32 q2, #0\n"
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]\n"
+                           "vext.32 q3, q2, q0, #3\n"
+                           "add %[in_ptr0], %[in_ptr0], #28\n"
+
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q3, %e[weight345][0]\n"
+                           "vmul.f32 q11, q0, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr1], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q1, %f[weight345][0]\n"
+                           "vext.32 q3, q2, q0, #3\n"
+                           "add %[in_ptr1], %[in_ptr1], #28\n"
+
+                           "vmla.f32 q10, q3, %e[weight678][0]\n"
+                           "vmla.f32 q11, q0, %e[weight678][1]\n"
+                           "vmla.f32 q14, q1, %f[weight678][0]\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "beq 2f\n"
+
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "1:\n"
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q0, %e[weight345][0]\n"
+                           "vmul.f32 q11, q1, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr1], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr1]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q3, %f[weight345][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vmla.f32 q10, q0, %e[weight678][0]\n"
+                           "vmla.f32 q11, q1, %e[weight678][1]\n"
+
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vmla.f32 q14, q3, %f[weight678][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "bne 1b\n"
+                           "sub %[in_ptr0], %[in_ptr0], #32\n"
+                           "2:\n"
+                           : [in_ptr0] "+r"(in_ptr0), [in_ptr1] "+r"(in_ptr1),
+                             [out_ptr0] "+r"(out_ptr0), [nn] "+r"(nn)
+                           : [weight012] "w"(weight012), [weight345] "w"(weight345),
+                             [weight678] "w"(weight678), [qbias0] "w"(qbias0)
+                           : "q0", "q1", "q2", "q3", "q8", "q9", "q10", "q11", "q12", "q13", "q14",
+                             "q15", "cc", "memory");
+        }
+        for (; remain > 0; remain--)
+        {
+          // TODO: if nn == 0, pad_left comes here.
+          float32x4_t input0 = vld1q_f32(in_ptr0);
+          float32x4_t input1 = vld1q_f32(in_ptr1);
+
+          if (remain == 1)
+          {
+            input0 = vsetq_lane_f32(0.0f, input0, 2);
+            input1 = vsetq_lane_f32(0.0f, input1, 2);
+          }
+
+          float32x4_t out0 = vmulq_f32(input0, weight345);
+          out0 = vmlaq_f32(out0, input1, weight678);
+
+          out0 = vsetq_lane_f32(bias0, out0, 3);
+
+          float32x2_t out00 = vadd_f32(vget_low_f32(out0), vget_high_f32(out0));
+
+          float32x2_t out01 = vpadd_f32(out00, out00);
+
+          *out_ptr0 = vget_lane_f32(out01, 0);
+
+          in_ptr0 += 2;
+          in_ptr1 += 2;
+          out_ptr0++;
+        }
+
+        in_ptr2 += w;
+      }
+      else if (i == outh - 1)
+      {
+        if (nn > 0)
+        {
+          __asm __volatile("vmov.i32 q2, #0\n"
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]\n"
+                           "vext.32 q3, q2, q0, #3\n"
+                           "add %[in_ptr0], %[in_ptr0], #28\n"
+
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q3, %e[weight012][0]\n"
+                           "vmul.f32 q11, q0, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q1, %f[weight012][0]\n"
+                           "vext.32 q3, q2, q0, #3\n"
+                           "add %[in_ptr1], %[in_ptr1], #28\n"
+
+                           "vmla.f32 q10, q3, %e[weight345][0]\n"
+                           "vmla.f32 q11, q0, %e[weight345][1]\n"
+                           "vmla.f32 q14, q1, %f[weight345][0]\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "beq 2f\n"
+
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "1:\n"
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q0, %e[weight012][0]\n"
+                           "vmul.f32 q11, q1, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr1]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q3, %f[weight012][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vmla.f32 q10, q0, %e[weight345][0]\n"
+                           "vmla.f32 q11, q1, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vmla.f32 q14, q3, %f[weight345][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "bne 1b\n"
+                           "sub %[in_ptr0], %[in_ptr0], #32\n"
+
+                           "2:\n"
+                           : [in_ptr0] "+r"(in_ptr0), [in_ptr1] "+r"(in_ptr1),
+                             [out_ptr0] "+r"(out_ptr0), [nn] "+r"(nn)
+                           : [weight012] "w"(weight012), [weight345] "w"(weight345),
+                             [weight678] "w"(weight678), [qbias0] "w"(qbias0)
+                           : "q0", "q1", "q2", "q3", "q8", "q9", "q10", "q11", "q12", "q13", "q14",
+                             "q15", "cc", "memory");
+        }
+        for (; remain > 0; remain--)
+        {
+          // TODO: if nn == 0, pad_left comes here.
+          float32x4_t input0 = vld1q_f32(in_ptr0);
+          float32x4_t input1 = vld1q_f32(in_ptr1);
+
+          if (remain == 1)
+          {
+            input0 = vsetq_lane_f32(0.0f, input0, 2);
+            input1 = vsetq_lane_f32(0.0f, input1, 2);
+          }
+
+          float32x4_t out0 = vmulq_f32(input0, weight012);
+          out0 = vmlaq_f32(out0, input1, weight345);
+
+          out0 = vsetq_lane_f32(bias0, out0, 3);
+
+          float32x2_t out00 = vadd_f32(vget_low_f32(out0), vget_high_f32(out0));
+
+          float32x2_t out01 = vpadd_f32(out00, out00);
+
+          *out_ptr0 = vget_lane_f32(out01, 0);
+
+          in_ptr0 += 2;
+          in_ptr1 += 2;
+          out_ptr0++;
+        }
+      }
+      else
+      {
+        if (nn > 0)
+        {
+          __asm __volatile("vmov.i32 q2, #0\n"
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]\n"
+                           "vext.32 q3, q2, q0, #3\n"
+                           "add %[in_ptr0], %[in_ptr0], #28\n"
+
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q3, %e[weight012][0]\n"
+                           "vmul.f32 q11, q0, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q1, %f[weight012][0]\n"
+                           "vext.32 q3, q2, q0, #3\n"
+                           "add %[in_ptr1], %[in_ptr1], #28\n"
+
+                           "vmla.f32 q10, q3, %e[weight345][0]\n"
+                           "vmla.f32 q11, q0, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr2], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr2]]\n"
+                           "vmla.f32 q14, q1, %f[weight345][0]\n"
+                           "vext.32 q3, q2, q0, #3\n"
+                           "add %[in_ptr2], %[in_ptr2], #28\n"
+
+                           "vmla.f32 q10, q3, %e[weight678][0]\n"
+                           "vmla.f32 q11, q0, %e[weight678][1]\n"
+                           "vmla.f32 q14, q1, %f[weight678][0]\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "beq 2f\n"
+
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "1:\n"
+                           "vand q14, %q[qbias0], %q[qbias0]\n"
+                           "vmul.f32 q10, q0, %e[weight012][0]\n"
+                           "vmul.f32 q11, q1, %e[weight012][1]\n"
+
+                           "pld [%[in_ptr1], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr1]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr1]]\n"
+                           "vmla.f32 q14, q3, %f[weight012][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vmla.f32 q10, q0, %e[weight345][0]\n"
+                           "vmla.f32 q11, q1, %e[weight345][1]\n"
+
+                           "pld [%[in_ptr2], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr2]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr2]]\n"
+                           "vmla.f32 q14, q3, %f[weight345][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vmla.f32 q10, q0, %e[weight678][0]\n"
+                           "vmla.f32 q11, q1, %e[weight678][1]\n"
+
+                           "pld [%[in_ptr0], #256]\n"
+                           "vld2.f32 {d0-d3}, [%[in_ptr0]]!\n"
+                           "vld1.f32 {d4[0]}, [%[in_ptr0]]\n"
+                           "vmla.f32 q14, q3, %f[weight678][0]\n"
+                           "vext.32 q3, q0, q2, #1\n"
+
+                           "vadd.f32  q14, q14, q10\n"
+                           "vadd.f32  q14, q14, q11\n"
+
+                           "subs %[nn], %[nn], #1\n"
+                           "vst1.f32 {d28-d29}, [%[out_ptr0]]!\n"
+                           "bne 1b\n"
+                           "sub %[in_ptr0], %[in_ptr0], #32\n"
+                           "2:\n"
+                           : [in_ptr0] "+r"(in_ptr0), [in_ptr1] "+r"(in_ptr1),
+                             [in_ptr2] "+r"(in_ptr2), [out_ptr0] "+r"(out_ptr0), [nn] "+r"(nn)
+                           : [weight012] "w"(weight012), [weight345] "w"(weight345),
+                             [weight678] "w"(weight678), [qbias0] "w"(qbias0)
+                           : "q0", "q1", "q2", "q3", "q8", "q9", "q10", "q11", "q12", "q13", "q14",
+                             "q15", "cc", "memory");
+        }
+        for (; remain > 0; remain--)
+        {
+          // TODO: if nn == 0, pad_left comes here.
+          float32x4_t input0 = vld1q_f32(in_ptr0);
+          float32x4_t input1 = vld1q_f32(in_ptr1);
+          float32x4_t input2 = vld1q_f32(in_ptr2);
+
+          if (remain == 1)
+          {
+            input0 = vsetq_lane_f32(0.0f, input0, 2);
+            input1 = vsetq_lane_f32(0.0f, input1, 2);
+            input2 = vsetq_lane_f32(0.0f, input2, 2);
+          }
+
+          float32x4_t out0 = vmulq_f32(input0, weight012);
+          out0 = vmlaq_f32(out0, input1, weight345);
+          out0 = vmlaq_f32(out0, input2, weight678);
+
+          out0 = vsetq_lane_f32(bias0, out0, 3);
+
+          float32x2_t out00 = vadd_f32(vget_low_f32(out0), vget_high_f32(out0));
+
+          float32x2_t out01 = vpadd_f32(out00, out00);
+
+          *out_ptr0 = vget_lane_f32(out01, 0);
+
+          in_ptr0 += 2;
+          in_ptr1 += 2;
+          in_ptr2 += 2;
+          out_ptr0++;
+        }
+
+        in_ptr0 += w;
+        in_ptr1 += w;
+        in_ptr2 += w;
+      }
+    }
+  }
+#endif // !__aarch64__
+}
+
+static void depthwise_conv_colmajor(const convMat_t &in_mat, convMat_t &out_mat,
+                                    const convMat_t &kernel, const convParams_t &in_param)
+{
+#if __aarch64__
+  const int w = in_mat.w;
+  const int h = in_mat.h;
+  const int outw = out_mat.w;
+  const int outh = out_mat.h;
+  const int channels = out_mat.c;
+  const int stridew = in_param.stride_w;
+  const int strideh = in_param.stride_h;
+  const int padding = in_param.padding;
+  const int padw = in_param.pad_w;
+  const int padh = in_param.pad_h;
+
+#pragma omp parallel for
+  for (int oh = 0; oh < outh; oh++)
+  {
+    const float *input_data0 = in_mat.data + (oh * strideh - padh) * w * channels;
+
+    memset(out_mat.data + oh * outw * channels, 0x00, outw * channels * sizeof(float));
+
+    for (int kh = 0; kh < in_param.kernel_h; kh++)
+    {
+      for (int kw = 0; kw < in_param.kernel_w; kw++)
+      {
+        const float *kernel_data = kernel.data + (kh * in_param.kernel_w + kw) * channels;
+        const float *input_data1 = input_data0 + (kh * w + kw) * channels;
+
+        if (padding && ((oh * strideh + kh < padh) || (oh * strideh + kh >= padh + h)))
+        {
+          continue;
+        }
+
+        int ow = 0;
+        for (; ow + 3 < outw; /*ow += 4*/)
+        {
+          if (((ow + 3) * stridew + kw < padw) || (ow * stridew + kw >= padw + w))
+          {
+            ow += 4;
+            continue;
+          }
+          else if ((ow + 3) * stridew + kw >= padw + w)
+          {
+            break;
+          }
+          else if (ow * stridew + kw < padw)
+          {
+            int delta = (padw - kw) / stridew - ow;
+            delta += (padw - kw) % stridew ? 1 : 0;
+            ow += delta;
+            continue;
+          }
+
+          int nn = channels >> 2;
+          int remain = channels & 0x03;
+
+          const float *input_r0 = input_data1 + (ow * stridew - padw) * channels;
+
+          const float *input_r1 = input_r0 + stridew * channels;
+          const float *input_r2 = input_r1 + stridew * channels;
+          const float *input_r3 = input_r2 + stridew * channels;
+          const float *weights_data = kernel_data;
+          float *output_r0 = out_mat.data + (oh * outw + ow) * channels;
+          float *output_r1 = output_r0 + channels;
+          float *output_r2 = output_r1 + channels;
+          float *output_r3 = output_r2 + channels;
+
+          if (nn > 0)
+          {
+            int _n = (nn + 1) >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("subs %[_n], %[_n], #1\n"
+                         "ld1 {v4.4s}, [%[weights_data]], #16\n"
+                         "ld1 {v5.4s}, [%[input_r0]], #16\n"
+                         "ld1 {v6.4s}, [%[input_r1]], #16\n"
+                         "ld1 {v7.4s}, [%[input_r2]], #16\n"
+                         "ld1 {v8.4s}, [%[input_r3]], #16\n"
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "ld1 {v24.4s, v25.4s}, [%[output_r0]]\n"
+                         "ld1 {v26.4s, v27.4s}, [%[output_r1]]\n"
+                         "ld1 {v28.4s, v29.4s}, [%[output_r2]]\n"
+                         "ld1 {v30.4s, v31.4s}, [%[output_r3]]\n"
+
+                         "ld1 {v9.4s}, [%[weights_data]], #16\n"
+                         "ld1 {v10.4s}, [%[input_r0]], #16\n"
+                         "ld1 {v11.4s}, [%[input_r1]], #16\n"
+                         "ld1 {v12.4s}, [%[input_r2]], #16\n"
+                         "ld1 {v13.4s}, [%[input_r3]], #16\n"
+
+                         "fmla v24.4s, v4.4s, v5.4s\n"
+                         "fmla v26.4s, v4.4s, v6.4s\n"
+
+                         "fmla v28.4s, v4.4s, v7.4s\n"
+                         "fmla v30.4s, v4.4s, v8.4s\n"
+
+                         "ld1 {v4.4s}, [%[weights_data]], #16\n"
+                         "ld1 {v5.4s}, [%[input_r0]], #16\n"
+                         "ld1 {v6.4s}, [%[input_r1]], #16\n"
+                         "ld1 {v7.4s}, [%[input_r2]], #16\n"
+                         "ld1 {v8.4s}, [%[input_r3]], #16\n"
+
+                         "fmla v25.4s, v9.4s, v10.4s\n"
+                         "fmla v27.4s, v9.4s, v11.4s\n"
+
+                         "fmla v29.4s, v9.4s, v12.4s\n"
+                         "fmla v31.4s, v9.4s, v13.4s\n"
+
+                         "st1 {v24.4s, v25.4s}, [%[output_r0]], #32\n"
+                         "st1 {v26.4s, v27.4s}, [%[output_r1]], #32\n"
+                         "st1 {v28.4s, v29.4s}, [%[output_r2]], #32\n"
+                         "st1 {v30.4s, v31.4s}, [%[output_r3]], #32\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "ld1 {v24.4s}, [%[output_r0]]\n"
+                         "ld1 {v26.4s}, [%[output_r1]]\n"
+                         "ld1 {v28.4s}, [%[output_r2]]\n"
+                         "ld1 {v30.4s}, [%[output_r3]]\n"
+                         "cmp %[oddn], #1\n"
+
+                         "fmla v24.4s, v4.4s, v5.4s\n"
+                         "fmla v26.4s, v4.4s, v6.4s\n"
+
+                         "fmla v28.4s, v4.4s, v7.4s\n"
+                         "fmla v30.4s, v4.4s, v8.4s\n"
+
+                         "st1 {v24.4s}, [%[output_r0]], #16\n"
+                         "st1 {v26.4s}, [%[output_r1]], #16\n"
+                         "st1 {v28.4s}, [%[output_r2]], #16\n"
+                         "st1 {v30.4s}, [%[output_r3]], #16\n"
+
+                         "beq 2f\n"
+                         "ld1 {v25.4s}, [%[output_r0]]\n"
+                         "ld1 {v27.4s}, [%[output_r1]]\n"
+                         "ld1 {v29.4s}, [%[output_r2]]\n"
+                         "ld1 {v31.4s}, [%[output_r3]]\n"
+
+                         "ld1 {v9.4s}, [%[weights_data]], #16\n"
+                         "ld1 {v10.4s}, [%[input_r0]], #16\n"
+                         "ld1 {v11.4s}, [%[input_r1]], #16\n"
+                         "ld1 {v12.4s}, [%[input_r2]], #16\n"
+                         "ld1 {v13.4s}, [%[input_r3]], #16\n"
+
+                         "fmla v25.4s, v9.4s, v10.4s\n"
+                         "fmla v27.4s, v9.4s, v11.4s\n"
+
+                         "fmla v29.4s, v9.4s, v12.4s\n"
+                         "fmla v31.4s, v9.4s, v13.4s\n"
+
+                         "st1 {v25.4s}, [%[output_r0]], #16\n"
+                         "st1 {v27.4s}, [%[output_r1]], #16\n"
+                         "st1 {v29.4s}, [%[output_r2]], #16\n"
+                         "st1 {v31.4s}, [%[output_r3]], #16\n"
+                         "2:\n"
+                         : [weights_data] "+r"(weights_data), [input_r0] "+r"(input_r0),
+                           [input_r1] "+r"(input_r1), [input_r2] "+r"(input_r2),
+                           [input_r3] "+r"(input_r3), [output_r0] "+r"(output_r0),
+                           [output_r1] "+r"(output_r1), [output_r2] "+r"(output_r2),
+                           [output_r3] "+r"(output_r3), [_n] "+r"(_n)
+                         : [oddn] "r"(oddn)
+                         : "cc", "memory", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12",
+                           "v13", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31");
+          }
+          if (remain >= 2)
+          {
+            asm volatile(
+                "ld1 {v24.2s}, [%[output_r0]]\n"
+                "ld1 {v26.2s}, [%[output_r1]]\n"
+                "ld1 {v28.2s}, [%[output_r2]]\n"
+                "ld1 {v30.2s}, [%[output_r3]]\n"
+                "ld1 {v4.2s}, [%[weights_data]], #8\n"
+                "ld1 {v5.2s}, [%[input_r0]], #8\n"
+
+                "ld1 {v6.2s}, [%[input_r1]], #8\n"
+                "ld1 {v7.2s}, [%[input_r2]], #8\n"
+                "ld1 {v8.2s}, [%[input_r3]], #8\n"
+
+                "fmla v24.2s, v4.2s, v5.2s\n"
+                "fmla v26.2s, v4.2s, v6.2s\n"
+
+                "fmla v28.2s, v4.2s, v7.2s\n"
+                "fmla v30.2s, v4.2s, v8.2s\n"
+
+                "st1 {v24.2s}, [%[output_r0]], #8\n"
+                "st1 {v26.2s}, [%[output_r1]], #8\n"
+                "st1 {v28.2s}, [%[output_r2]], #8\n"
+                "st1 {v30.2s}, [%[output_r3]], #8\n"
+                : [weights_data] "+r"(weights_data), [input_r0] "+r"(input_r0),
+                  [input_r1] "+r"(input_r1), [input_r2] "+r"(input_r2), [input_r3] "+r"(input_r3),
+                  [output_r0] "+r"(output_r0), [output_r1] "+r"(output_r1),
+                  [output_r2] "+r"(output_r2), [output_r3] "+r"(output_r3)
+                :
+                : "cc", "memory", "v4", "v5", "v6", "v7", "v8", "v24", "v26", "v28", "v30");
+            remain -= 2;
+          }
+
+          if (remain > 0)
+          {
+            *output_r0++ += (*weights_data) * (*input_r0++);
+            *output_r1++ += (*weights_data++) * (*input_r1++);
+            *output_r2++ += (*weights_data) * (*input_r2++);
+            *output_r3++ += (*weights_data++) * (*input_r3++);
+          }
+          ow += 4;
+        }
+
+        for (; ow + 1 < outw; /*ow += 2*/)
+        {
+          if (padding)
+          {
+            if (((ow + 1) * stridew + kw < padw) || (ow * stridew + kw >= padw + w))
+            {
+              ow += 2;
+              continue;
+            }
+            else if ((ow + 1) * stridew + kw >= padw + w)
+            {
+              break;
+            }
+            else if (ow * stridew + kw < padw)
+            {
+              ow++;
+              continue;
+            }
+          }
+
+          int nn = channels >> 2;
+          int remain = channels & 0x03;
+
+          const float *input_r0 = input_data1 + (ow * stridew - padw) * channels;
+
+          const float *input_r1 = input_r0 + stridew * channels;
+          const float *weights_data = kernel_data;
+          float *output_r0 = out_mat.data + (oh * outw + ow) * channels;
+          float *output_r1 = output_r0 + channels;
+
+          if (nn > 0)
+          {
+            int _n = (nn + 1) >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("subs %[_n], %[_n], #1\n"
+                         "ld1 {v4.4s}, [%[weights_data]], #16\n"
+                         "ld1 {v5.4s}, [%[input_r0]], #16\n"
+                         "ld1 {v6.4s}, [%[input_r1]], #16\n"
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "ld1 {v24.4s, v25.4s}, [%[output_r0]]\n"
+                         "ld1 {v26.4s, v27.4s}, [%[output_r1]]\n"
+
+                         "ld1 {v9.4s}, [%[weights_data]], #16\n"
+                         "ld1 {v10.4s}, [%[input_r0]], #16\n"
+                         "ld1 {v11.4s}, [%[input_r1]], #16\n"
+
+                         "fmla v24.4s, v4.4s, v5.4s\n"
+                         "fmla v26.4s, v4.4s, v6.4s\n"
+
+                         "ld1 {v4.4s}, [%[weights_data]], #16\n"
+                         "ld1 {v5.4s}, [%[input_r0]], #16\n"
+                         "ld1 {v6.4s}, [%[input_r1]], #16\n"
+
+                         "fmla v25.4s, v9.4s, v10.4s\n"
+                         "fmla v27.4s, v9.4s, v11.4s\n"
+
+                         "st1 {v24.4s, v25.4s}, [%[output_r0]], #32\n"
+                         "st1 {v26.4s, v27.4s}, [%[output_r1]], #32\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "ld1 {v24.4s}, [%[output_r0]]\n"
+                         "ld1 {v26.4s}, [%[output_r1]]\n"
+                         "cmp %[oddn], #1\n"
+
+                         "fmla v24.4s, v4.4s, v5.4s\n"
+                         "fmla v26.4s, v4.4s, v6.4s\n"
+
+                         "st1 {v24.4s}, [%[output_r0]], #16\n"
+                         "st1 {v26.4s}, [%[output_r1]], #16\n"
+
+                         "beq 2f\n"
+                         "ld1 {v25.4s}, [%[output_r0]]\n"
+                         "ld1 {v27.4s}, [%[output_r1]]\n"
+
+                         "ld1 {v9.4s}, [%[weights_data]], #16\n"
+                         "ld1 {v10.4s}, [%[input_r0]], #16\n"
+                         "ld1 {v11.4s}, [%[input_r1]], #16\n"
+
+                         "fmla v25.4s, v9.4s, v10.4s\n"
+                         "fmla v27.4s, v9.4s, v11.4s\n"
+
+                         "st1 {v25.4s}, [%[output_r0]], #16\n"
+                         "st1 {v27.4s}, [%[output_r1]], #16\n"
+                         "2:\n"
+                         : [weights_data] "+r"(weights_data), [input_r0] "+r"(input_r0),
+                           [input_r1] "+r"(input_r1), [output_r0] "+r"(output_r0),
+                           [output_r1] "+r"(output_r1), [_n] "+r"(_n)
+                         : [oddn] "r"(oddn)
+                         : "cc", "memory", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12",
+                           "v13", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31");
+          }
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v24.2s}, [%[output_r0]]\n"
+                         "ld1 {v26.2s}, [%[output_r1]]\n"
+                         "ld1 {v4.2s}, [%[weights_data]], #8\n"
+                         "ld1 {v5.2s}, [%[input_r0]], #8\n"
+
+                         "ld1 {v6.2s}, [%[input_r1]], #8\n"
+
+                         "fmla v24.2s, v4.2s, v5.2s\n"
+                         "fmla v26.2s, v4.2s, v6.2s\n"
+
+                         "st1 {v24.2s}, [%[output_r0]], #8\n"
+                         "st1 {v26.2s}, [%[output_r1]], #8\n"
+                         : [weights_data] "+r"(weights_data), [input_r0] "+r"(input_r0),
+                           [input_r1] "+r"(input_r1), [output_r0] "+r"(output_r0),
+                           [output_r1] "+r"(output_r1)
+                         :
+                         : "cc", "memory", "v4", "v5", "v6", "v7", "v8", "v24", "v26", "v28",
+                           "v30");
+            remain -= 2;
+          }
+
+          if (remain > 0)
+          {
+            *output_r0++ += (*weights_data) * (*input_r0++);
+            *output_r1++ += (*weights_data++) * (*input_r1++);
+          }
+          ow += 2;
+        }
+
+        for (; ow < outw; ow++)
+        {
+          const float *input_data = input_data1 + (ow * stridew - padw) * channels;
+
+          if (padding && ((ow * stridew + kw < padw) || (ow * strideh + kw >= padw + w)))
+          {
+            continue;
+          }
+
+          int nn = channels >> 2;
+          int remain = channels & 0x03;
+
+          const float *weights_data = kernel_data;
+          float *output_data = out_mat.data + (oh * outw + ow) * channels;
+
+          if (nn > 0)
+          {
+            int _n = (nn + 1) >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("subs %[_n], %[_n], #1\n"
+                         "ld1 {v4.4s}, [%[weights_data]], #16\n"
+                         "ld1 {v5.4s}, [%[input_data]], #16\n"
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "ld1 {v30.4s, v31.4s}, [%[output_data]]\n"
+                         "ld1 {v6.4s}, [%[weights_data]], #16\n"
+                         "ld1 {v7.4s}, [%[input_data]], #16\n"
+                         "fmla v30.4s, v4.4s, v5.4s\n"
+
+                         "ld1 {v4.4s}, [%[weights_data]], #16\n"
+                         "ld1 {v5.4s}, [%[input_data]], #16\n"
+                         "fmla v31.4s, v6.4s, v7.4s\n"
+
+                         "st1 {v30.4s, v31.4s}, [%[output_data]], #32\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "ld1 {v30.4s}, [%[output_data]]\n"
+                         "cmp %[oddn], #1\n"
+                         "fmla v30.4s, v4.4s, v5.4s\n"
+                         "st1 {v30.4s}, [%[output_data]], #16\n"
+                         "beq 2f\n"
+                         "ld1 {v31.4s}, [%[output_data]]\n"
+                         "ld1 {v6.4s}, [%[weights_data]], #16\n"
+                         "ld1 {v7.4s}, [%[input_data]], #16\n"
+                         "fmla v31.4s, v6.4s, v7.4s\n"
+
+                         "st1 {v31.4s}, [%[output_data]], #16\n"
+                         "2:\n"
+                         : [weights_data] "+r"(weights_data), [input_data] "+r"(input_data),
+                           [output_data] "+r"(output_data), [_n] "+r"(_n)
+                         : [oddn] "r"(oddn)
+                         : "cc", "memory", "v4", "v5", "v30", "v31");
+          }
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v30.2s}, [%[output_data]]\n"
+                         "ld1 {v4.2s}, [%[weights_data]], #8\n"
+                         "ld1 {v5.2s}, [%[input_data]], #8\n"
+
+                         "fmla v30.2s, v4.2s, v5.2s\n"
+
+                         "st1 {v30.2s}, [%[output_data]], #8\n"
+                         : [weights_data] "+r"(weights_data), [input_data] "+r"(input_data),
+                           [output_data] "+r"(output_data)
+                         :
+                         : "cc", "memory", "v4", "v5", "v30");
+            remain -= 2;
+          }
+
+          if (remain > 0)
+          {
+            *output_data++ += (*weights_data++) * (*input_data++);
+          }
+        }
+      }
+    }
+  }
+#endif // __aarch64__
+}
+
+void srcn_depthwise_conv(const convMat_t &in_mat, const convMat_t &weights_mat, convMat_t &out_mat,
+                         const convMat_t &bias, const convParams_t &in_param, int num_threads,
+                         convType_t conv_type)
+{
+  omp_set_num_threads(num_threads);
+
+  if (conv_type == col_major)
+  {
+    depthwise_conv_colmajor(in_mat, out_mat, weights_mat, in_param);
+    return;
+  }
+
+  else if (conv_type == row_major)
+  {
+    if (in_param.kernel_w == 3 && in_param.kernel_h == 3 && in_param.dilation_w == 1 &&
+        in_param.dilation_h == 1)
+    {
+      if (in_param.stride_w == 1 && in_param.stride_h == 1)
+      {
+        if (in_param.padding == 0)
+          depthwise_conv3x3S1_nopad(in_mat, out_mat, weights_mat, bias);
+        else
+          depthwise_conv3x3S1_padding(in_mat, out_mat, weights_mat, bias);
+      }
+      else if (in_param.stride_w == 2 && in_param.stride_h == 2)
+      {
+        if (in_param.padding == 0)
+          depthwise_conv3x3S2_nopad(in_mat, out_mat, weights_mat, bias);
+        else
+        {
+          if (in_param.pad_w == 0 && in_param.pad_h == 0)
+            depthwise_conv3x3S2_padding00(in_mat, out_mat, weights_mat, bias);
+          else if (in_param.pad_w == 0 && in_param.pad_h == 1)
+            depthwise_conv3x3S2_padding10(in_mat, out_mat, weights_mat, bias);
+          else if (in_param.pad_w == 1 && in_param.pad_h == 0)
+            depthwise_conv3x3S2_padding01(in_mat, out_mat, weights_mat, bias);
+          else if (in_param.pad_w == 1 && in_param.pad_h == 1)
+            depthwise_conv3x3S2_padding11(in_mat, out_mat, weights_mat, bias);
+        }
+      }
+    }
+  }
+}
+
+} // namespace srcn
+} // namespace nnfw
diff --git a/runtimes/libs/srcn/src/direct_conv_colmajor.cc b/runtimes/libs/srcn/src/direct_conv_colmajor.cc
new file mode 100644
index 000000000..394ea6d58
--- /dev/null
+++ b/runtimes/libs/srcn/src/direct_conv_colmajor.cc
@@ -0,0 +1,5872 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifdef _OPENMP
+#include <omp.h>
+#endif
+
+#include <stdlib.h>
+#include <arm_neon.h>
+#include "srcn/conv_type.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+#if __aarch64__
+static void direct_conv_l(const convMat_t &bottom_blob, convMat_t &top_blob,
+                          const convMat_t &_kernel, const int _stride, const int padding,
+                          const int pad_top, const int pad_left)
+{
+  const int w = bottom_blob.w;
+  const int h = bottom_blob.h;
+  const int inch = bottom_blob.c;
+  const int outw = top_blob.w;
+  const int outh = top_blob.h;
+  const int outch = top_blob.c;
+  const int kernel_w = _kernel.w;
+  const int kernel_h = _kernel.h;
+
+  for (int m = 0; m < kernel_w * kernel_h; m++)
+  {
+    const float *_kernel0 = _kernel.data + m * inch * outch;
+    const float *img0 =
+        bottom_blob.data + (m / kernel_w - pad_top) * w * inch + (m % kernel_w - pad_left) * inch;
+
+#ifdef _OPENMP
+#pragma omp parallel for
+#endif // _OPENMP
+    for (int p = 0; p < outh; p++)
+    {
+      float *out0 = top_blob.data + p * outw * outch;
+
+      // clear output
+      if (m == 0)
+      {
+        for (int j = 0; j < outw * outch; j++)
+        {
+          *(out0 + j) = 0.f;
+        }
+      }
+
+      if (padding)
+      {
+        if (((p * _stride + m / kernel_w) < pad_top) || (p * _stride + m / kernel_w >= pad_top + h))
+        {
+          continue;
+        }
+      }
+
+      const float *img1 = img0 + p * w * inch * _stride;
+
+      int q = 0;
+      for (; q + 3 < outw; /*q += 4*/)
+      {
+        if (padding)
+        {
+          if (((q + 3) * _stride + m % kernel_w < pad_left) ||
+              (q * _stride + m % kernel_w) >= pad_left + w)
+          {
+            out0 += outch * 4;
+            img1 += inch * _stride * 4;
+            q += 4;
+            continue;
+          }
+          else if ((q + 3) * _stride + m % kernel_w >= pad_left + w)
+          {
+            break;
+          }
+          else if (q * _stride + m % kernel_w < pad_left)
+          {
+            int delta = (pad_left - m % kernel_w) / _stride - q;
+            delta += (pad_left - m % kernel_w) % _stride ? 1 : 0;
+            out0 += outch * delta;
+            img1 += inch * _stride * delta;
+            q += delta;
+            continue;
+          }
+        }
+
+        const float *_x0 = img1;
+        const float *_x1 = img1 + inch * _stride;
+        const float *_x2 = img1 + inch * _stride * 2;
+        const float *_x3 = img1 + inch * _stride * 3;
+        const float *kernel0 = _kernel0;
+
+        int i = 0;
+        for (; i + 3 < inch; i += 4)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x4_t rx0 asm("v4") = vld1q_f32(_x0);
+          register float32x4_t rx1 asm("v5") = vld1q_f32(_x1);
+          register float32x4_t rx2 asm("v16") = vld1q_f32(_x2);
+          register float32x4_t rx3 asm("v17") = vld1q_f32(_x3);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+          float *outptr2 = out0 + outch * 2;
+          float *outptr3 = out0 + outch * 3;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+                         "ld1 {v30.4s}, [%[outptr2]]\n"
+                         "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v12.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v13.4s}, [x0]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                         "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                         "fmla v30.4s, v7.4s, %[rx2].s[1]\n"
+                         "fmla v31.4s, v7.4s, %[rx3].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v8.4s, %[rx1].s[2]\n"
+                         "fmla v30.4s, v8.4s, %[rx2].s[2]\n"
+                         "fmla v31.4s, v8.4s, %[rx3].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v9.4s, %[rx1].s[3]\n"
+                         "fmla v30.4s, v9.4s, %[rx2].s[3]\n"
+                         "fmla v31.4s, v9.4s, %[rx3].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "st1 {v30.4s}, [%[outptr2]], #16\n"
+                         "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+                         "ld1 {v30.4s}, [%[outptr2]]\n"
+                         "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                         "fmla v30.4s, v10.4s, %[rx2].s[0]\n"
+                         "fmla v31.4s, v10.4s, %[rx3].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v11.4s, %[rx1].s[1]\n"
+                         "fmla v30.4s, v11.4s, %[rx2].s[1]\n"
+                         "fmla v31.4s, v11.4s, %[rx3].s[1]\n"
+                         "fmla v14.4s, v12.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v12.4s, %[rx1].s[2]\n"
+                         "fmla v30.4s, v12.4s, %[rx2].s[2]\n"
+                         "fmla v31.4s, v12.4s, %[rx3].s[2]\n"
+                         "fmla v14.4s, v13.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v13.4s, %[rx1].s[3]\n"
+                         "fmla v30.4s, v13.4s, %[rx2].s[3]\n"
+                         "fmla v31.4s, v13.4s, %[rx3].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "st1 {v30.4s}, [%[outptr2]], #16\n"
+                         "st1 {v31.4s}, [%[outptr3]], #16\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+                         "ld1 {v30.4s}, [%[outptr2]]\n"
+                         "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                         "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                         "fmla v30.4s, v7.4s, %[rx2].s[1]\n"
+                         "fmla v31.4s, v7.4s, %[rx3].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v8.4s, %[rx1].s[2]\n"
+                         "fmla v30.4s, v8.4s, %[rx2].s[2]\n"
+                         "fmla v31.4s, v8.4s, %[rx3].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v9.4s, %[rx1].s[3]\n"
+                         "fmla v30.4s, v9.4s, %[rx2].s[3]\n"
+                         "fmla v31.4s, v9.4s, %[rx3].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "st1 {v30.4s}, [%[outptr2]], #16\n"
+                         "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+                         "ld1 {v30.4s}, [%[outptr2]]\n"
+                         "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v12.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v13.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                         "fmla v30.4s, v10.4s, %[rx2].s[0]\n"
+                         "fmla v31.4s, v10.4s, %[rx3].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v11.4s, %[rx1].s[1]\n"
+                         "fmla v30.4s, v11.4s, %[rx2].s[1]\n"
+                         "fmla v31.4s, v11.4s, %[rx3].s[1]\n"
+                         "fmla v14.4s, v12.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v12.4s, %[rx1].s[2]\n"
+                         "fmla v30.4s, v12.4s, %[rx2].s[2]\n"
+                         "fmla v31.4s, v12.4s, %[rx3].s[2]\n"
+                         "fmla v14.4s, v13.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v13.4s, %[rx1].s[3]\n"
+                         "fmla v30.4s, v13.4s, %[rx2].s[3]\n"
+                         "fmla v31.4s, v13.4s, %[rx3].s[3]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "st1 {v30.4s}, [%[outptr2]], #16\n"
+                         "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+                         "ld1 {v30.4s}, [%[outptr2]]\n"
+                         "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                         "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                         "fmla v30.4s, v7.4s, %[rx2].s[1]\n"
+                         "fmla v31.4s, v7.4s, %[rx3].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v8.4s, %[rx1].s[2]\n"
+                         "fmla v30.4s, v8.4s, %[rx2].s[2]\n"
+                         "fmla v31.4s, v8.4s, %[rx3].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v9.4s, %[rx1].s[3]\n"
+                         "fmla v30.4s, v9.4s, %[rx2].s[3]\n"
+                         "fmla v31.4s, v9.4s, %[rx3].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "st1 {v30.4s}, [%[outptr2]], #16\n"
+                         "st1 {v31.4s}, [%[outptr3]], #16\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [_n] "+r"(_n), [outptr2] "+r"(outptr2),
+                           [outptr3] "+r"(outptr3)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn),
+                           [rx2] "w"(rx2), [rx3] "w"(rx3)
+                         : "cc", "memory", "x0", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13",
+                           "v14", "v15", "v30", "v31");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+                         "ld1 {v15.2s}, [%[outptr1]]\n"
+                         "ld1 {v30.2s}, [%[outptr2]]\n"
+                         "ld1 {v31.2s}, [%[outptr3]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+                         "fmla v15.2s, v6.2s, %[rx1].s[0]\n"
+                         "fmla v30.2s, v6.2s, %[rx2].s[0]\n"
+                         "fmla v31.2s, v6.2s, %[rx3].s[0]\n"
+                         "fmla v14.2s, v7.2s, %[rx0].s[1]\n"
+                         "fmla v15.2s, v7.2s, %[rx1].s[1]\n"
+                         "fmla v30.2s, v7.2s, %[rx2].s[1]\n"
+                         "fmla v31.2s, v7.2s, %[rx3].s[1]\n"
+                         "fmla v14.2s, v8.2s, %[rx0].s[2]\n"
+                         "fmla v15.2s, v8.2s, %[rx1].s[2]\n"
+                         "fmla v30.2s, v8.2s, %[rx2].s[2]\n"
+                         "fmla v31.2s, v8.2s, %[rx3].s[2]\n"
+                         "fmla v14.2s, v9.2s, %[rx0].s[3]\n"
+                         "fmla v15.2s, v9.2s, %[rx1].s[3]\n"
+                         "fmla v30.2s, v9.2s, %[rx2].s[3]\n"
+                         "fmla v31.2s, v9.2s, %[rx3].s[3]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         "st1 {v15.2s}, [%[outptr1]], #8\n"
+                         "st1 {v30.2s}, [%[outptr2]], #8\n"
+                         "st1 {v31.2s}, [%[outptr3]], #8\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [outptr2] "+r"(outptr2), [outptr3] "+r"(outptr3)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1),
+
+                           [rx2] "w"(rx2), [rx3] "w"(rx3)
+                         : "cc", "memory", "x0", "v6", "v7", "v8", "v9", "v14", "v15", "v30",
+                           "v31");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x0 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x0 + 3));
+
+            *outptr1 += (*kernel0) * (*_x1) + (*(kernel0 + outch)) * (*(_x1 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x1 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x1 + 3));
+
+            *outptr2 += (*kernel0) * (*_x2) + (*(kernel0 + outch)) * (*(_x2 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x2 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x2 + 3));
+
+            *outptr3 += (*kernel0) * (*_x3) + (*(kernel0 + outch)) * (*(_x3 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x3 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x3 + 3));
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+            outptr2++;
+            outptr3++;
+          }
+
+          kernel0 += outch * 3;
+          _x0 += 4;
+          _x1 += 4;
+          _x2 += 4;
+          _x3 += 4;
+        }
+
+        for (; i + 1 < inch; i += 2)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("v4") = vld1_f32(_x0);
+          register float32x2_t rx1 asm("v5") = vld1_f32(_x1);
+          register float32x2_t rx2 asm("v16") = vld1_f32(_x2);
+          register float32x2_t rx3 asm("v17") = vld1_f32(_x3);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+          float *outptr2 = out0 + outch * 2;
+          float *outptr3 = out0 + outch * 3;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile(
+                "cmp %[_n], #0\n"
+                "beq 2f\n"
+                "subs %[_n], %[_n], #1\n"
+
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v6.4s}, [x0]\n"
+                "add x0, x0, %[stride]\n"
+                "ld1 {v7.4s}, [x0]\n"
+
+                "beq 1f\n"
+
+                "0:\n"
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v10.4s}, [x0]\n"
+                "add x0, x0, %[stride]\n"
+                "ld1 {v11.4s}, [x0]\n"
+
+                "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+                "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                "fmla v30.4s, v7.4s, %[rx2].s[1]\n"
+                "fmla v31.4s, v7.4s, %[rx3].s[1]\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v6.4s}, [x0]\n"
+                "add x0, x0, %[stride]\n"
+                "ld1 {v7.4s}, [x0]\n"
+
+                "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v10.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v10.4s, %[rx3].s[0]\n"
+                "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                "fmla v15.4s, v11.4s, %[rx1].s[1]\n"
+                "fmla v30.4s, v11.4s, %[rx2].s[1]\n"
+                "fmla v31.4s, v11.4s, %[rx3].s[1]\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+                "subs %[_n], %[_n], #1\n"
+                "bne 0b\n"
+
+                "1:\n"
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+                "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                "fmla v30.4s, v7.4s, %[rx2].s[1]\n"
+                "fmla v31.4s, v7.4s, %[rx3].s[1]\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v10.4s}, [x0]\n"
+                "add x0, x0, %[stride]\n"
+                "ld1 {v11.4s}, [x0]\n"
+
+                "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v10.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v10.4s, %[rx3].s[0]\n"
+                "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                "fmla v15.4s, v11.4s, %[rx1].s[1]\n"
+                "fmla v30.4s, v11.4s, %[rx2].s[1]\n"
+                "fmla v31.4s, v11.4s, %[rx3].s[1]\n"
+
+                "cmp %[oddn], #1\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                "bne 3f\n"
+
+                "2:\n"
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v6.4s}, [x0]\n"
+                "add x0, x0, %[stride]\n"
+                "ld1 {v7.4s}, [x0]\n"
+
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+                "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                "fmla v30.4s, v7.4s, %[rx2].s[1]\n"
+                "fmla v31.4s, v7.4s, %[rx3].s[1]\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+                "3:\n"
+                : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [outptr1] "+r"(outptr1),
+                  [_n] "+r"(_n), [outptr2] "+r"(outptr2), [outptr3] "+r"(outptr3)
+                : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn),
+                  [rx2] "w"(rx2), [rx3] "w"(rx3)
+                : "cc", "memory", "x0", "v6", "v7", "v10", "v11", "v14", "v15", "v30", "v31");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+                         "ld1 {v15.2s}, [%[outptr1]]\n"
+                         "ld1 {v30.2s}, [%[outptr2]]\n"
+                         "ld1 {v31.2s}, [%[outptr3]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+                         "fmla v15.2s, v6.2s, %[rx1].s[0]\n"
+                         "fmla v30.2s, v6.2s, %[rx2].s[0]\n"
+                         "fmla v31.2s, v6.2s, %[rx3].s[0]\n"
+                         "fmla v14.2s, v7.2s, %[rx0].s[1]\n"
+                         "fmla v15.2s, v7.2s, %[rx1].s[1]\n"
+                         "fmla v30.2s, v7.2s, %[rx2].s[1]\n"
+                         "fmla v31.2s, v7.2s, %[rx3].s[1]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         "st1 {v15.2s}, [%[outptr1]], #8\n"
+                         "st1 {v30.2s}, [%[outptr2]], #8\n"
+                         "st1 {v31.2s}, [%[outptr3]], #8\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [outptr2] "+r"(outptr2), [outptr3] "+r"(outptr3)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1),
+
+                           [rx2] "w"(rx2), [rx3] "w"(rx3)
+                         : "cc", "memory", "x0", "v6", "v7", "v14", "v15", "v30", "v31");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1));
+            *outptr1 += (*kernel0) * (*_x1) + (*(kernel0 + outch)) * (*(_x1 + 1));
+            *outptr2 += (*kernel0) * (*_x2) + (*(kernel0 + outch)) * (*(_x2 + 1));
+            *outptr3 += (*kernel0) * (*_x3) + (*(kernel0 + outch)) * (*(_x3 + 1));
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+            outptr2++;
+            outptr3++;
+          }
+
+          kernel0 += outch;
+          _x0 += 2;
+          _x1 += 2;
+          _x2 += 2;
+          _x3 += 2;
+        }
+
+        for (; i < inch; i++)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("v4") = vld1_dup_f32(_x0);
+          register float32x2_t rx1 asm("v5") = vld1_dup_f32(_x1);
+          register float32x2_t rx2 asm("v16") = vld1_dup_f32(_x2);
+          register float32x2_t rx3 asm("v17") = vld1_dup_f32(_x3);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+          float *outptr2 = out0 + outch * 2;
+          float *outptr3 = out0 + outch * 3;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile(
+                "cmp %[_n], #0\n"
+                "beq 2f\n"
+                "subs %[_n], %[_n], #1\n"
+
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v6.4s}, [x0]\n"
+                "beq 1f\n"
+
+                "0:\n"
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v10.4s}, [x0]\n"
+
+                "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v6.4s}, [x0]\n"
+
+                "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v10.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v10.4s, %[rx3].s[0]\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+                "subs %[_n], %[_n], #1\n"
+                "bne 0b\n"
+
+                "1:\n"
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v10.4s}, [x0]\n"
+
+                "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v10.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v10.4s, %[rx3].s[0]\n"
+
+                "cmp %[oddn], #1\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                "bne 3f\n"
+
+                "2:\n"
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v6.4s}, [x0]\n"
+
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+                "3:\n"
+                : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [outptr1] "+r"(outptr1),
+                  [_n] "+r"(_n), [outptr2] "+r"(outptr2), [outptr3] "+r"(outptr3)
+                : [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn), [rx2] "w"(rx2), [rx3] "w"(rx3)
+                : "cc", "memory", "x0", "v6", "v10", "v14", "v15", "v30", "v31");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+                         "ld1 {v15.2s}, [%[outptr1]]\n"
+                         "ld1 {v30.2s}, [%[outptr2]]\n"
+                         "ld1 {v31.2s}, [%[outptr3]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+                         "fmla v15.2s, v6.2s, %[rx1].s[0]\n"
+                         "fmla v30.2s, v6.2s, %[rx2].s[0]\n"
+                         "fmla v31.2s, v6.2s, %[rx3].s[0]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         "st1 {v15.2s}, [%[outptr1]], #8\n"
+                         "st1 {v30.2s}, [%[outptr2]], #8\n"
+                         "st1 {v31.2s}, [%[outptr3]], #8\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [outptr2] "+r"(outptr2), [outptr3] "+r"(outptr3)
+                         : [rx0] "w"(rx0), [rx1] "w"(rx1),
+
+                           [rx2] "w"(rx2), [rx3] "w"(rx3)
+                         : "cc", "memory", "x0", "v6", "v14", "v15", "v30", "v31");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0);
+            *outptr1 += (*kernel0) * (*_x1);
+            *outptr2 += (*kernel0) * (*_x2);
+            *outptr3 += (*kernel0) * (*_x3);
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+            outptr2++;
+            outptr3++;
+          }
+
+          _x0 += 1;
+          _x1 += 1;
+          _x2 += 1;
+          _x3 += 1;
+        }
+
+        img1 += inch * 4 * _stride;
+        out0 += outch * 4;
+        q += 4;
+      }
+
+      for (; q + 1 < outw; /*q += 2*/)
+      {
+        if (padding)
+        {
+          if (((q + 1) * _stride + m % kernel_w < pad_left) ||
+              (q * _stride + m % kernel_w) >= pad_left + w)
+          {
+            out0 += outch * 2;
+            img1 += inch * _stride * 2;
+            q += 2;
+            continue;
+          }
+          else if ((q + 1) * _stride + m % kernel_w >= pad_left + w)
+          {
+            break;
+          }
+          else if (q * _stride + m % kernel_w < pad_left)
+          {
+            out0 += outch;
+            img1 += inch * _stride;
+            q++;
+            continue;
+          }
+        }
+
+        const float *_x0 = img1;
+        const float *_x1 = img1 + inch * _stride;
+        const float *kernel0 = _kernel0;
+
+        int i = 0;
+        for (; i + 3 < inch; i += 4)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x4_t rx0 asm("v4") = vld1q_f32(_x0);
+          register float32x4_t rx1 asm("v5") = vld1q_f32(_x1);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v12.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v13.4s}, [x0]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v8.4s, %[rx1].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v9.4s, %[rx1].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v11.4s, %[rx1].s[1]\n"
+                         "fmla v14.4s, v12.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v12.4s, %[rx1].s[2]\n"
+                         "fmla v14.4s, v13.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v13.4s, %[rx1].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v8.4s, %[rx1].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v9.4s, %[rx1].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v12.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v13.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v11.4s, %[rx1].s[1]\n"
+                         "fmla v14.4s, v12.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v12.4s, %[rx1].s[2]\n"
+                         "fmla v14.4s, v13.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v13.4s, %[rx1].s[3]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v8.4s, %[rx1].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v9.4s, %[rx1].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [_n] "+r"(_n)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn)
+                         : "cc", "memory", "x0", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13",
+                           "v14", "v15");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+                         "ld1 {v15.2s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+                         "fmla v15.2s, v6.2s, %[rx1].s[0]\n"
+                         "fmla v14.2s, v7.2s, %[rx0].s[1]\n"
+                         "fmla v15.2s, v7.2s, %[rx1].s[1]\n"
+                         "fmla v14.2s, v8.2s, %[rx0].s[2]\n"
+                         "fmla v15.2s, v8.2s, %[rx1].s[2]\n"
+                         "fmla v14.2s, v9.2s, %[rx0].s[3]\n"
+                         "fmla v15.2s, v9.2s, %[rx1].s[3]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         "st1 {v15.2s}, [%[outptr1]], #8\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [outptr1] "+r"(outptr1)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1)
+                         : "cc", "memory", "x0", "v6", "v7", "v8", "v9", "v14", "v15");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x0 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x0 + 3));
+
+            *outptr1 += (*kernel0) * (*_x1) + (*(kernel0 + outch)) * (*(_x1 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x1 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x1 + 3));
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+          }
+
+          kernel0 += outch * 3;
+          _x0 += 4;
+          _x1 += 4;
+        }
+
+        for (; i + 1 < inch; i += 2)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("v4") = vld1_f32(_x0);
+          register float32x2_t rx1 asm("v5") = vld1_f32(_x1);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v11.4s, %[rx1].s[1]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v11.4s, %[rx1].s[1]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [_n] "+r"(_n)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn)
+                         : "cc", "memory", "x0", "v6", "v7", "v10", "v11", "v14", "v15");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+                         "ld1 {v15.2s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+                         "fmla v15.2s, v6.2s, %[rx1].s[0]\n"
+                         "fmla v14.2s, v7.2s, %[rx0].s[1]\n"
+                         "fmla v15.2s, v7.2s, %[rx1].s[1]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         "st1 {v15.2s}, [%[outptr1]], #8\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [outptr1] "+r"(outptr1)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1)
+                         : "cc", "memory", "x0", "v6", "v7", "v14", "v15");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1));
+            *outptr1 += (*kernel0) * (*_x1) + (*(kernel0 + outch)) * (*(_x1 + 1));
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+          }
+
+          kernel0 += outch;
+          _x0 += 2;
+          _x1 += 2;
+        }
+
+        for (; i < inch; i++)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("v4") = vld1_dup_f32(_x0);
+          register float32x2_t rx1 asm("v5") = vld1_dup_f32(_x1);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [_n] "+r"(_n)
+                         : [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn)
+                         : "cc", "memory", "x0", "v6", "v10", "v14", "v15");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+                         "ld1 {v15.2s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+                         "fmla v15.2s, v6.2s, %[rx1].s[0]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         "st1 {v15.2s}, [%[outptr1]], #8\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [outptr1] "+r"(outptr1)
+                         : [rx0] "w"(rx0), [rx1] "w"(rx1)
+                         : "cc", "memory", "x0", "v6", "v14", "v15");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0);
+            *outptr1 += (*kernel0) * (*_x1);
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+          }
+
+          _x0 += 1;
+          _x1 += 1;
+        }
+
+        img1 += inch * 2 * _stride;
+        out0 += outch * 2;
+        q += 2;
+      }
+
+      for (; q < outw; q++)
+      {
+        if (padding)
+        {
+          if ((q * _stride + m % kernel_w < pad_left) ||
+              (q * _stride + m % kernel_w >= pad_left + w))
+          {
+            img1 += inch * _stride;
+            out0 += outch;
+            continue;
+          }
+        }
+
+        const float *_x0 = img1;
+        const float *kernel0 = _kernel0;
+
+        int i = 0;
+        for (; i + 3 < inch; i += 4)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x4_t rx0 asm("v4") = vld1q_f32(_x0);
+
+          float *outptr0 = out0;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v12.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v13.4s}, [x0]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                         "fmla v14.4s, v12.4s, %[rx0].s[2]\n"
+                         "fmla v14.4s, v13.4s, %[rx0].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v12.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v13.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                         "fmla v14.4s, v12.4s, %[rx0].s[2]\n"
+                         "fmla v14.4s, v13.4s, %[rx0].s[3]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [_n] "+r"(_n)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [oddn] "r"(oddn)
+                         : "cc", "memory", "x0", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13",
+                           "v14");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+                         "fmla v14.2s, v7.2s, %[rx0].s[1]\n"
+                         "fmla v14.2s, v8.2s, %[rx0].s[2]\n"
+                         "fmla v14.2s, v9.2s, %[rx0].s[3]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0)
+                         : [stride] "r"(stride), [rx0] "w"(rx0)
+                         : "cc", "memory", "x0", "v6", "v7", "v8", "v9", "v14");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x0 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x0 + 3));
+
+            kernel0++;
+            outptr0++;
+          }
+
+          kernel0 += outch * 3;
+          _x0 += 4;
+        }
+
+        for (; i + 1 < inch; i += 2)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("v4") = vld1_f32(_x0);
+
+          float *outptr0 = out0;
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [_n] "+r"(_n)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [oddn] "r"(oddn)
+                         : "cc", "memory", "x0", "v6", "v7", "v10", "v11", "v14");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+                         "fmla v14.2s, v7.2s, %[rx0].s[1]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0)
+                         : [stride] "r"(stride), [rx0] "w"(rx0)
+                         : "cc", "memory", "x0", "v6", "v7", "v14");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1));
+
+            kernel0++;
+            outptr0++;
+          }
+
+          kernel0 += outch;
+          _x0 += 2;
+        }
+
+        for (; i < inch; i++)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("v4") = vld1_dup_f32(_x0);
+
+          float *outptr0 = out0;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [_n] "+r"(_n)
+                         : [rx0] "w"(rx0), [oddn] "r"(oddn)
+                         : "cc", "memory", "x0", "v6", "v10", "v14");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0)
+                         : [rx0] "w"(rx0)
+                         : "cc", "memory", "x0", "v6", "v14");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0);
+
+            kernel0++;
+            outptr0++;
+          }
+
+          _x0 += 1;
+        }
+
+        img1 += inch * _stride;
+        out0 += outch;
+      }
+    }
+  }
+}
+
+static void direct_conv_s(const convMat_t &bottom_blob, convMat_t &top_blob,
+                          const convMat_t &_kernel, const int _stride, const int padding,
+                          const int pad_top, const int pad_left)
+{
+  const int w = bottom_blob.w;
+  const int h = bottom_blob.h;
+  const int inch = bottom_blob.c;
+  const int outw = top_blob.w;
+  const int outh = top_blob.h;
+  const int outch = top_blob.c;
+  const int kernel_w = _kernel.w;
+  const int kernel_h = _kernel.h;
+
+#ifdef _OPENMP
+#pragma omp parallel for
+#endif
+  for (int p = 0; p < outh; p++)
+  {
+    const float *img0 = bottom_blob.data + (p * _stride - pad_top) * w * inch;
+    float *out = top_blob.data + p * outw * outch;
+
+    // clear output
+    for (int j = 0; j < outw * outch; j++)
+    {
+      *(out + j) = 0.f;
+    }
+
+    for (int m = 0; m < kernel_w * kernel_h; m++)
+    {
+      if (padding)
+      {
+        if (((p * _stride + m / kernel_w) < pad_top) || (p * _stride + m / kernel_w >= pad_top + h))
+        {
+          continue;
+        }
+      }
+
+      float *out0 = out;
+      const float *_kernel0 = _kernel.data + m * inch * outch;
+      const float *img1 = img0 + (m / kernel_w) * w * inch + (m % kernel_w - pad_left) * inch;
+
+      int q = 0;
+      for (; q + 3 < outw; /*q += 4*/)
+      {
+        if (padding)
+        {
+          if (((q + 3) * _stride + m % kernel_w < pad_left) ||
+              (q * _stride + m % kernel_w) >= pad_left + w)
+          {
+            out0 += outch * 4;
+            img1 += inch * _stride * 4;
+            q += 4;
+            continue;
+          }
+          else if ((q + 3) * _stride + m % kernel_w >= pad_left + w)
+          {
+            break;
+          }
+          else if (q * _stride + m % kernel_w < pad_left)
+          {
+            int delta = (pad_left - m % kernel_w) / _stride - q;
+            delta += (pad_left - m % kernel_w) % _stride ? 1 : 0;
+            out0 += outch * delta;
+            img1 += inch * _stride * delta;
+            q += delta;
+            continue;
+          }
+        }
+
+        const float *_x0 = img1;
+        const float *_x1 = img1 + inch * _stride;
+        const float *_x2 = img1 + inch * _stride * 2;
+        const float *_x3 = img1 + inch * _stride * 3;
+        const float *kernel0 = _kernel0;
+
+        int i = 0;
+        for (; i + 3 < inch; i += 4)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x4_t rx0 asm("v4") = vld1q_f32(_x0);
+          register float32x4_t rx1 asm("v5") = vld1q_f32(_x1);
+          register float32x4_t rx2 asm("v16") = vld1q_f32(_x2);
+          register float32x4_t rx3 asm("v17") = vld1q_f32(_x3);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+          float *outptr2 = out0 + outch * 2;
+          float *outptr3 = out0 + outch * 3;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+                         "ld1 {v30.4s}, [%[outptr2]]\n"
+                         "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v12.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v13.4s}, [x0]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                         "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                         "fmla v30.4s, v7.4s, %[rx2].s[1]\n"
+                         "fmla v31.4s, v7.4s, %[rx3].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v8.4s, %[rx1].s[2]\n"
+                         "fmla v30.4s, v8.4s, %[rx2].s[2]\n"
+                         "fmla v31.4s, v8.4s, %[rx3].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v9.4s, %[rx1].s[3]\n"
+                         "fmla v30.4s, v9.4s, %[rx2].s[3]\n"
+                         "fmla v31.4s, v9.4s, %[rx3].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "st1 {v30.4s}, [%[outptr2]], #16\n"
+                         "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+                         "ld1 {v30.4s}, [%[outptr2]]\n"
+                         "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                         "fmla v30.4s, v10.4s, %[rx2].s[0]\n"
+                         "fmla v31.4s, v10.4s, %[rx3].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v11.4s, %[rx1].s[1]\n"
+                         "fmla v30.4s, v11.4s, %[rx2].s[1]\n"
+                         "fmla v31.4s, v11.4s, %[rx3].s[1]\n"
+                         "fmla v14.4s, v12.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v12.4s, %[rx1].s[2]\n"
+                         "fmla v30.4s, v12.4s, %[rx2].s[2]\n"
+                         "fmla v31.4s, v12.4s, %[rx3].s[2]\n"
+                         "fmla v14.4s, v13.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v13.4s, %[rx1].s[3]\n"
+                         "fmla v30.4s, v13.4s, %[rx2].s[3]\n"
+                         "fmla v31.4s, v13.4s, %[rx3].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "st1 {v30.4s}, [%[outptr2]], #16\n"
+                         "st1 {v31.4s}, [%[outptr3]], #16\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+                         "ld1 {v30.4s}, [%[outptr2]]\n"
+                         "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                         "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                         "fmla v30.4s, v7.4s, %[rx2].s[1]\n"
+                         "fmla v31.4s, v7.4s, %[rx3].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v8.4s, %[rx1].s[2]\n"
+                         "fmla v30.4s, v8.4s, %[rx2].s[2]\n"
+                         "fmla v31.4s, v8.4s, %[rx3].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v9.4s, %[rx1].s[3]\n"
+                         "fmla v30.4s, v9.4s, %[rx2].s[3]\n"
+                         "fmla v31.4s, v9.4s, %[rx3].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "st1 {v30.4s}, [%[outptr2]], #16\n"
+                         "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+                         "ld1 {v30.4s}, [%[outptr2]]\n"
+                         "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v12.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v13.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                         "fmla v30.4s, v10.4s, %[rx2].s[0]\n"
+                         "fmla v31.4s, v10.4s, %[rx3].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v11.4s, %[rx1].s[1]\n"
+                         "fmla v30.4s, v11.4s, %[rx2].s[1]\n"
+                         "fmla v31.4s, v11.4s, %[rx3].s[1]\n"
+                         "fmla v14.4s, v12.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v12.4s, %[rx1].s[2]\n"
+                         "fmla v30.4s, v12.4s, %[rx2].s[2]\n"
+                         "fmla v31.4s, v12.4s, %[rx3].s[2]\n"
+                         "fmla v14.4s, v13.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v13.4s, %[rx1].s[3]\n"
+                         "fmla v30.4s, v13.4s, %[rx2].s[3]\n"
+                         "fmla v31.4s, v13.4s, %[rx3].s[3]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "st1 {v30.4s}, [%[outptr2]], #16\n"
+                         "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+                         "ld1 {v30.4s}, [%[outptr2]]\n"
+                         "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                         "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                         "fmla v30.4s, v7.4s, %[rx2].s[1]\n"
+                         "fmla v31.4s, v7.4s, %[rx3].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v8.4s, %[rx1].s[2]\n"
+                         "fmla v30.4s, v8.4s, %[rx2].s[2]\n"
+                         "fmla v31.4s, v8.4s, %[rx3].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v9.4s, %[rx1].s[3]\n"
+                         "fmla v30.4s, v9.4s, %[rx2].s[3]\n"
+                         "fmla v31.4s, v9.4s, %[rx3].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "st1 {v30.4s}, [%[outptr2]], #16\n"
+                         "st1 {v31.4s}, [%[outptr3]], #16\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [_n] "+r"(_n), [outptr2] "+r"(outptr2),
+                           [outptr3] "+r"(outptr3)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn),
+                           [rx2] "w"(rx2), [rx3] "w"(rx3)
+                         : "cc", "memory", "x0", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13",
+                           "v14", "v15", "v30", "v31");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+                         "ld1 {v15.2s}, [%[outptr1]]\n"
+                         "ld1 {v30.2s}, [%[outptr2]]\n"
+                         "ld1 {v31.2s}, [%[outptr3]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+                         "fmla v15.2s, v6.2s, %[rx1].s[0]\n"
+                         "fmla v30.2s, v6.2s, %[rx2].s[0]\n"
+                         "fmla v31.2s, v6.2s, %[rx3].s[0]\n"
+                         "fmla v14.2s, v7.2s, %[rx0].s[1]\n"
+                         "fmla v15.2s, v7.2s, %[rx1].s[1]\n"
+                         "fmla v30.2s, v7.2s, %[rx2].s[1]\n"
+                         "fmla v31.2s, v7.2s, %[rx3].s[1]\n"
+                         "fmla v14.2s, v8.2s, %[rx0].s[2]\n"
+                         "fmla v15.2s, v8.2s, %[rx1].s[2]\n"
+                         "fmla v30.2s, v8.2s, %[rx2].s[2]\n"
+                         "fmla v31.2s, v8.2s, %[rx3].s[2]\n"
+                         "fmla v14.2s, v9.2s, %[rx0].s[3]\n"
+                         "fmla v15.2s, v9.2s, %[rx1].s[3]\n"
+                         "fmla v30.2s, v9.2s, %[rx2].s[3]\n"
+                         "fmla v31.2s, v9.2s, %[rx3].s[3]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         "st1 {v15.2s}, [%[outptr1]], #8\n"
+                         "st1 {v30.2s}, [%[outptr2]], #8\n"
+                         "st1 {v31.2s}, [%[outptr3]], #8\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [outptr2] "+r"(outptr2), [outptr3] "+r"(outptr3)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1),
+
+                           [rx2] "w"(rx2), [rx3] "w"(rx3)
+                         : "cc", "memory", "x0", "v6", "v7", "v8", "v9", "v14", "v15", "v30",
+                           "v31");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x0 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x0 + 3));
+
+            *outptr1 += (*kernel0) * (*_x1) + (*(kernel0 + outch)) * (*(_x1 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x1 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x1 + 3));
+
+            *outptr2 += (*kernel0) * (*_x2) + (*(kernel0 + outch)) * (*(_x2 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x2 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x2 + 3));
+
+            *outptr3 += (*kernel0) * (*_x3) + (*(kernel0 + outch)) * (*(_x3 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x3 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x3 + 3));
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+            outptr2++;
+            outptr3++;
+          }
+
+          kernel0 += outch * 3;
+          _x0 += 4;
+          _x1 += 4;
+          _x2 += 4;
+          _x3 += 4;
+        }
+
+        for (; i + 1 < inch; i += 2)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("v4") = vld1_f32(_x0);
+          register float32x2_t rx1 asm("v5") = vld1_f32(_x1);
+          register float32x2_t rx2 asm("v16") = vld1_f32(_x2);
+          register float32x2_t rx3 asm("v17") = vld1_f32(_x3);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+          float *outptr2 = out0 + outch * 2;
+          float *outptr3 = out0 + outch * 3;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile(
+                "cmp %[_n], #0\n"
+                "beq 2f\n"
+                "subs %[_n], %[_n], #1\n"
+
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v6.4s}, [x0]\n"
+                "add x0, x0, %[stride]\n"
+                "ld1 {v7.4s}, [x0]\n"
+
+                "beq 1f\n"
+
+                "0:\n"
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v10.4s}, [x0]\n"
+                "add x0, x0, %[stride]\n"
+                "ld1 {v11.4s}, [x0]\n"
+
+                "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+                "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                "fmla v30.4s, v7.4s, %[rx2].s[1]\n"
+                "fmla v31.4s, v7.4s, %[rx3].s[1]\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v6.4s}, [x0]\n"
+                "add x0, x0, %[stride]\n"
+                "ld1 {v7.4s}, [x0]\n"
+
+                "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v10.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v10.4s, %[rx3].s[0]\n"
+                "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                "fmla v15.4s, v11.4s, %[rx1].s[1]\n"
+                "fmla v30.4s, v11.4s, %[rx2].s[1]\n"
+                "fmla v31.4s, v11.4s, %[rx3].s[1]\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+                "subs %[_n], %[_n], #1\n"
+                "bne 0b\n"
+
+                "1:\n"
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+                "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                "fmla v30.4s, v7.4s, %[rx2].s[1]\n"
+                "fmla v31.4s, v7.4s, %[rx3].s[1]\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v10.4s}, [x0]\n"
+                "add x0, x0, %[stride]\n"
+                "ld1 {v11.4s}, [x0]\n"
+
+                "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v10.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v10.4s, %[rx3].s[0]\n"
+                "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                "fmla v15.4s, v11.4s, %[rx1].s[1]\n"
+                "fmla v30.4s, v11.4s, %[rx2].s[1]\n"
+                "fmla v31.4s, v11.4s, %[rx3].s[1]\n"
+
+                "cmp %[oddn], #1\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                "bne 3f\n"
+
+                "2:\n"
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v6.4s}, [x0]\n"
+                "add x0, x0, %[stride]\n"
+                "ld1 {v7.4s}, [x0]\n"
+
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+                "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                "fmla v30.4s, v7.4s, %[rx2].s[1]\n"
+                "fmla v31.4s, v7.4s, %[rx3].s[1]\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+                "3:\n"
+                : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [outptr1] "+r"(outptr1),
+                  [_n] "+r"(_n), [outptr2] "+r"(outptr2), [outptr3] "+r"(outptr3)
+                : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn),
+                  [rx2] "w"(rx2), [rx3] "w"(rx3)
+                : "cc", "memory", "x0", "v6", "v7", "v10", "v11", "v14", "v15", "v30", "v31");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+                         "ld1 {v15.2s}, [%[outptr1]]\n"
+                         "ld1 {v30.2s}, [%[outptr2]]\n"
+                         "ld1 {v31.2s}, [%[outptr3]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+                         "fmla v15.2s, v6.2s, %[rx1].s[0]\n"
+                         "fmla v30.2s, v6.2s, %[rx2].s[0]\n"
+                         "fmla v31.2s, v6.2s, %[rx3].s[0]\n"
+                         "fmla v14.2s, v7.2s, %[rx0].s[1]\n"
+                         "fmla v15.2s, v7.2s, %[rx1].s[1]\n"
+                         "fmla v30.2s, v7.2s, %[rx2].s[1]\n"
+                         "fmla v31.2s, v7.2s, %[rx3].s[1]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         "st1 {v15.2s}, [%[outptr1]], #8\n"
+                         "st1 {v30.2s}, [%[outptr2]], #8\n"
+                         "st1 {v31.2s}, [%[outptr3]], #8\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [outptr2] "+r"(outptr2), [outptr3] "+r"(outptr3)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1),
+
+                           [rx2] "w"(rx2), [rx3] "w"(rx3)
+                         : "cc", "memory", "x0", "v6", "v7", "v14", "v15", "v30", "v31");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1));
+            *outptr1 += (*kernel0) * (*_x1) + (*(kernel0 + outch)) * (*(_x1 + 1));
+            *outptr2 += (*kernel0) * (*_x2) + (*(kernel0 + outch)) * (*(_x2 + 1));
+            *outptr3 += (*kernel0) * (*_x3) + (*(kernel0 + outch)) * (*(_x3 + 1));
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+            outptr2++;
+            outptr3++;
+          }
+
+          kernel0 += outch;
+          _x0 += 2;
+          _x1 += 2;
+          _x2 += 2;
+          _x3 += 2;
+        }
+
+        for (; i < inch; i++)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("v4") = vld1_dup_f32(_x0);
+          register float32x2_t rx1 asm("v5") = vld1_dup_f32(_x1);
+          register float32x2_t rx2 asm("v16") = vld1_dup_f32(_x2);
+          register float32x2_t rx3 asm("v17") = vld1_dup_f32(_x3);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+          float *outptr2 = out0 + outch * 2;
+          float *outptr3 = out0 + outch * 3;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile(
+                "cmp %[_n], #0\n"
+                "beq 2f\n"
+                "subs %[_n], %[_n], #1\n"
+
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v6.4s}, [x0]\n"
+                "beq 1f\n"
+
+                "0:\n"
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v10.4s}, [x0]\n"
+
+                "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v6.4s}, [x0]\n"
+
+                "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v10.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v10.4s, %[rx3].s[0]\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+                "subs %[_n], %[_n], #1\n"
+                "bne 0b\n"
+
+                "1:\n"
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v10.4s}, [x0]\n"
+
+                "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v10.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v10.4s, %[rx3].s[0]\n"
+
+                "cmp %[oddn], #1\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+
+                "bne 3f\n"
+
+                "2:\n"
+                "mov x0, %[kernel0]\n"
+                "add %[kernel0], %[kernel0], #16\n"
+                "ld1 {v6.4s}, [x0]\n"
+
+                "ld1 {v14.4s}, [%[outptr0]]\n"
+                "ld1 {v15.4s}, [%[outptr1]]\n"
+                "ld1 {v30.4s}, [%[outptr2]]\n"
+                "ld1 {v31.4s}, [%[outptr3]]\n"
+
+                "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                "fmla v30.4s, v6.4s, %[rx2].s[0]\n"
+                "fmla v31.4s, v6.4s, %[rx3].s[0]\n"
+
+                "st1 {v14.4s}, [%[outptr0]], #16\n"
+                "st1 {v15.4s}, [%[outptr1]], #16\n"
+                "st1 {v30.4s}, [%[outptr2]], #16\n"
+                "st1 {v31.4s}, [%[outptr3]], #16\n"
+                "3:\n"
+                : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [outptr1] "+r"(outptr1),
+                  [_n] "+r"(_n), [outptr2] "+r"(outptr2), [outptr3] "+r"(outptr3)
+                : [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn), [rx2] "w"(rx2), [rx3] "w"(rx3)
+                : "cc", "memory", "x0", "v6", "v10", "v14", "v15", "v30", "v31");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+                         "ld1 {v15.2s}, [%[outptr1]]\n"
+                         "ld1 {v30.2s}, [%[outptr2]]\n"
+                         "ld1 {v31.2s}, [%[outptr3]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+                         "fmla v15.2s, v6.2s, %[rx1].s[0]\n"
+                         "fmla v30.2s, v6.2s, %[rx2].s[0]\n"
+                         "fmla v31.2s, v6.2s, %[rx3].s[0]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         "st1 {v15.2s}, [%[outptr1]], #8\n"
+                         "st1 {v30.2s}, [%[outptr2]], #8\n"
+                         "st1 {v31.2s}, [%[outptr3]], #8\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [outptr2] "+r"(outptr2), [outptr3] "+r"(outptr3)
+                         : [rx0] "w"(rx0), [rx1] "w"(rx1),
+
+                           [rx2] "w"(rx2), [rx3] "w"(rx3)
+                         : "cc", "memory", "x0", "v6", "v14", "v15", "v30", "v31");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0);
+            *outptr1 += (*kernel0) * (*_x1);
+            *outptr2 += (*kernel0) * (*_x2);
+            *outptr3 += (*kernel0) * (*_x3);
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+            outptr2++;
+            outptr3++;
+          }
+
+          _x0 += 1;
+          _x1 += 1;
+          _x2 += 1;
+          _x3 += 1;
+        }
+
+        img1 += inch * 4 * _stride;
+        out0 += outch * 4;
+        q += 4;
+      }
+
+      for (; q + 1 < outw; /*q += 2*/)
+      {
+        if (padding)
+        {
+          if (((q + 1) * _stride + m % kernel_w < pad_left) ||
+              (q * _stride + m % kernel_w) >= pad_left + w)
+          {
+            out0 += outch * 2;
+            img1 += inch * _stride * 2;
+            q += 2;
+            continue;
+          }
+          else if ((q + 1) * _stride + m % kernel_w >= pad_left + w)
+          {
+            break;
+          }
+          else if (q * _stride + m % kernel_w < pad_left)
+          {
+            out0 += outch;
+            img1 += inch * _stride;
+            q++;
+            continue;
+          }
+        }
+
+        const float *_x0 = img1;
+        const float *_x1 = img1 + inch * _stride;
+        const float *kernel0 = _kernel0;
+
+        int i = 0;
+        for (; i + 3 < inch; i += 4)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x4_t rx0 asm("v4") = vld1q_f32(_x0);
+          register float32x4_t rx1 asm("v5") = vld1q_f32(_x1);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v12.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v13.4s}, [x0]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v8.4s, %[rx1].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v9.4s, %[rx1].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v11.4s, %[rx1].s[1]\n"
+                         "fmla v14.4s, v12.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v12.4s, %[rx1].s[2]\n"
+                         "fmla v14.4s, v13.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v13.4s, %[rx1].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v8.4s, %[rx1].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v9.4s, %[rx1].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v12.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v13.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v11.4s, %[rx1].s[1]\n"
+                         "fmla v14.4s, v12.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v12.4s, %[rx1].s[2]\n"
+                         "fmla v14.4s, v13.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v13.4s, %[rx1].s[3]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v15.4s, v8.4s, %[rx1].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+                         "fmla v15.4s, v9.4s, %[rx1].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [_n] "+r"(_n)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn)
+                         : "cc", "memory", "x0", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13",
+                           "v14", "v15");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+                         "ld1 {v15.2s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+                         "fmla v15.2s, v6.2s, %[rx1].s[0]\n"
+                         "fmla v14.2s, v7.2s, %[rx0].s[1]\n"
+                         "fmla v15.2s, v7.2s, %[rx1].s[1]\n"
+                         "fmla v14.2s, v8.2s, %[rx0].s[2]\n"
+                         "fmla v15.2s, v8.2s, %[rx1].s[2]\n"
+                         "fmla v14.2s, v9.2s, %[rx0].s[3]\n"
+                         "fmla v15.2s, v9.2s, %[rx1].s[3]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         "st1 {v15.2s}, [%[outptr1]], #8\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [outptr1] "+r"(outptr1)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1)
+                         : "cc", "memory", "x0", "v6", "v7", "v8", "v9", "v14", "v15");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x0 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x0 + 3));
+
+            *outptr1 += (*kernel0) * (*_x1) + (*(kernel0 + outch)) * (*(_x1 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x1 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x1 + 3));
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+          }
+
+          kernel0 += outch * 3;
+          _x0 += 4;
+          _x1 += 4;
+        }
+
+        for (; i + 1 < inch; i += 2)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("v4") = vld1_f32(_x0);
+          register float32x2_t rx1 asm("v5") = vld1_f32(_x1);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v11.4s, %[rx1].s[1]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v11.4s, %[rx1].s[1]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v15.4s, v7.4s, %[rx1].s[1]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [_n] "+r"(_n)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn)
+                         : "cc", "memory", "x0", "v6", "v7", "v10", "v11", "v14", "v15");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+                         "ld1 {v15.2s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+                         "fmla v15.2s, v6.2s, %[rx1].s[0]\n"
+                         "fmla v14.2s, v7.2s, %[rx0].s[1]\n"
+                         "fmla v15.2s, v7.2s, %[rx1].s[1]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         "st1 {v15.2s}, [%[outptr1]], #8\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [outptr1] "+r"(outptr1)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1)
+                         : "cc", "memory", "x0", "v6", "v7", "v14", "v15");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1));
+            *outptr1 += (*kernel0) * (*_x1) + (*(kernel0 + outch)) * (*(_x1 + 1));
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+          }
+
+          kernel0 += outch;
+          _x0 += 2;
+          _x1 += 2;
+        }
+
+        for (; i < inch; i++)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("v4") = vld1_dup_f32(_x0);
+          register float32x2_t rx1 asm("v5") = vld1_dup_f32(_x1);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v10.4s, %[rx1].s[0]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+                         "ld1 {v15.4s}, [%[outptr1]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v15.4s, v6.4s, %[rx1].s[0]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "st1 {v15.4s}, [%[outptr1]], #16\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [_n] "+r"(_n)
+                         : [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn)
+                         : "cc", "memory", "x0", "v6", "v10", "v14", "v15");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+                         "ld1 {v15.2s}, [%[outptr1]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+                         "fmla v15.2s, v6.2s, %[rx1].s[0]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         "st1 {v15.2s}, [%[outptr1]], #8\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [outptr1] "+r"(outptr1)
+                         : [rx0] "w"(rx0), [rx1] "w"(rx1)
+                         : "cc", "memory", "x0", "v6", "v14", "v15");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0);
+            *outptr1 += (*kernel0) * (*_x1);
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+          }
+
+          _x0 += 1;
+          _x1 += 1;
+        }
+
+        img1 += inch * 2 * _stride;
+        out0 += outch * 2;
+        q += 2;
+      }
+
+      for (; q < outw; q++)
+      {
+        if (padding)
+        {
+          if ((q * _stride + m % kernel_w < pad_left) ||
+              (q * _stride + m % kernel_w >= pad_left + w))
+          {
+            img1 += inch * _stride;
+            out0 += outch;
+            continue;
+          }
+        }
+
+        const float *_x0 = img1;
+        const float *kernel0 = _kernel0;
+
+        int i = 0;
+        for (; i + 3 < inch; i += 4)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x4_t rx0 asm("v4") = vld1q_f32(_x0);
+
+          float *outptr0 = out0;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v12.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v13.4s}, [x0]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                         "fmla v14.4s, v12.4s, %[rx0].s[2]\n"
+                         "fmla v14.4s, v13.4s, %[rx0].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v12.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v13.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+                         "fmla v14.4s, v12.4s, %[rx0].s[2]\n"
+                         "fmla v14.4s, v13.4s, %[rx0].s[3]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.4s}, [x0]\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+                         "fmla v14.4s, v8.4s, %[rx0].s[2]\n"
+                         "fmla v14.4s, v9.4s, %[rx0].s[3]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [_n] "+r"(_n)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [oddn] "r"(oddn)
+                         : "cc", "memory", "x0", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13",
+                           "v14");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v8.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v9.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+                         "fmla v14.2s, v7.2s, %[rx0].s[1]\n"
+                         "fmla v14.2s, v8.2s, %[rx0].s[2]\n"
+                         "fmla v14.2s, v9.2s, %[rx0].s[3]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0)
+                         : [stride] "r"(stride), [rx0] "w"(rx0)
+                         : "cc", "memory", "x0", "v6", "v7", "v8", "v9", "v14");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x0 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x0 + 3));
+
+            kernel0++;
+            outptr0++;
+          }
+
+          kernel0 += outch * 3;
+          _x0 += 4;
+        }
+
+        for (; i + 1 < inch; i += 2)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("v4") = vld1_f32(_x0);
+
+          float *outptr0 = out0;
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v11.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v11.4s, %[rx0].s[1]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.4s}, [x0]\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+                         "fmla v14.4s, v7.4s, %[rx0].s[1]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [_n] "+r"(_n)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [oddn] "r"(oddn)
+                         : "cc", "memory", "x0", "v6", "v7", "v10", "v11", "v14");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+                         "add x0, x0, %[stride]\n"
+                         "ld1 {v7.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+                         "fmla v14.2s, v7.2s, %[rx0].s[1]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0)
+                         : [stride] "r"(stride), [rx0] "w"(rx0)
+                         : "cc", "memory", "x0", "v6", "v7", "v14");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1));
+
+            kernel0++;
+            outptr0++;
+          }
+
+          kernel0 += outch;
+          _x0 += 2;
+        }
+
+        for (; i < inch; i++)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("v4") = vld1_dup_f32(_x0);
+
+          float *outptr0 = out0;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v10.4s}, [x0]\n"
+
+                         "fmla v14.4s, v10.4s, %[rx0].s[0]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "ld1 {v6.4s}, [x0]\n"
+
+                         "ld1 {v14.4s}, [%[outptr0]]\n"
+
+                         "fmla v14.4s, v6.4s, %[rx0].s[0]\n"
+
+                         "st1 {v14.4s}, [%[outptr0]], #16\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [_n] "+r"(_n)
+                         : [rx0] "w"(rx0), [oddn] "r"(oddn)
+                         : "cc", "memory", "x0", "v6", "v10", "v14");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("ld1 {v14.2s}, [%[outptr0]]\n"
+
+                         "mov x0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "ld1 {v6.2s}, [x0]\n"
+
+                         "fmla v14.2s, v6.2s, %[rx0].s[0]\n"
+
+                         "st1 {v14.2s}, [%[outptr0]], #8\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0)
+                         : [rx0] "w"(rx0)
+                         : "cc", "memory", "x0", "v6", "v14");
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0);
+
+            kernel0++;
+            outptr0++;
+          }
+
+          _x0 += 1;
+        }
+
+        img1 += inch * _stride;
+        out0 += outch;
+      }
+    }
+  }
+}
+
+#else // __aarch64__
+static void direct_conv_l(const convMat_t &bottom_blob, convMat_t &top_blob,
+                          const convMat_t &_kernel, const int _stride, const int padding,
+                          const int pad_top, const int pad_left)
+{
+  const int w = bottom_blob.w;
+  const int h = bottom_blob.h;
+  const int inch = bottom_blob.c;
+  const int outw = top_blob.w;
+  const int outh = top_blob.h;
+  const int outch = top_blob.c;
+  const int kernel_w = _kernel.w;
+  const int kernel_h = _kernel.h;
+
+  for (int m = 0; m < kernel_w * kernel_h; m++)
+  {
+    const float *_kernel0 = _kernel.data + m * inch * outch;
+    const float *img0 =
+        bottom_blob.data + (m / kernel_w - pad_top) * w * inch + (m % kernel_w - pad_left) * inch;
+
+#ifdef _OPENMP
+#pragma omp parallel for
+#endif // _OPENMP
+    for (int p = 0; p < outh; p++)
+    {
+      float *out0 = top_blob.data + p * outw * outch;
+      // clear output.
+      if (m == 0)
+      {
+        for (int j = 0; j < outw * outch; j++)
+        {
+          *(out0 + j) = 0.f;
+        }
+      }
+
+      if (padding)
+      {
+        if (((p * _stride + m / kernel_w) < pad_top) || (p * _stride + m / kernel_w >= pad_top + h))
+        {
+          continue;
+        }
+      }
+
+      const float *img1 = img0 + p * w * inch * _stride;
+
+      int q = 0;
+      for (; q + 1 < outw; /*q += 2*/)
+      {
+        if (padding)
+        {
+          if (((q + 1) * _stride + m % kernel_w < pad_left) ||
+              (q * _stride + m % kernel_w) >= pad_left + w)
+          {
+            out0 += outch * 2;
+            img1 += inch * _stride * 2;
+            q += 2;
+            continue;
+          }
+          else if (q * _stride + m % kernel_w < pad_left)
+          {
+            out0 += outch;
+            img1 += inch * _stride;
+            q++;
+            continue;
+          }
+          else if ((q + 1) * _stride + m % kernel_w >= pad_left + w)
+          {
+            break;
+          }
+        }
+
+        const float *_x0 = img1;
+        const float *_x1 = img1 + inch * _stride;
+        const float *kernel0 = _kernel0;
+
+        int i = 0;
+        for (; i + 3 < inch; i += 4)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x4_t rx0 asm("q4") = vld1q_f32(_x0);
+          register float32x4_t rx1 asm("q5") = vld1q_f32(_x1);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d16-d17}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d18-d19}, [r0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d22-d23}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d24-d25}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d26-d27}, [r0]\n"
+
+                         "vmla.f32 q14, q6, %e[rx0][0]\n"
+                         "vmla.f32 q15, q6, %e[rx1][0]\n"
+                         "vmla.f32 q14, q7, %e[rx0][1]\n"
+                         "vmla.f32 q15, q7, %e[rx1][1]\n"
+                         "vmla.f32 q14, q8, %f[rx0][0]\n"
+                         "vmla.f32 q15, q8, %f[rx1][0]\n"
+                         "vmla.f32 q14, q9, %f[rx0][1]\n"
+                         "vmla.f32 q15, q9, %f[rx1][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d16-d17}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d18-d19}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %e[rx0][0]\n"
+                         "vmla.f32 q15, q10, %e[rx1][0]\n"
+                         "vmla.f32 q14, q11, %e[rx0][1]\n"
+                         "vmla.f32 q15, q11, %e[rx1][1]\n"
+                         "vmla.f32 q14, q12, %f[rx0][0]\n"
+                         "vmla.f32 q15, q12, %f[rx1][0]\n"
+                         "vmla.f32 q14, q13, %f[rx0][1]\n"
+                         "vmla.f32 q15, q13, %f[rx1][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "vmla.f32 q14, q6, %e[rx0][0]\n"
+                         "vmla.f32 q15, q6, %e[rx1][0]\n"
+                         "vmla.f32 q14, q7, %e[rx0][1]\n"
+                         "vmla.f32 q15, q7, %e[rx1][1]\n"
+                         "vmla.f32 q14, q8, %f[rx0][0]\n"
+                         "vmla.f32 q15, q8, %f[rx1][0]\n"
+                         "vmla.f32 q14, q9, %f[rx0][1]\n"
+                         "vmla.f32 q15, q9, %f[rx1][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d22-d23}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d24-d25}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d26-d27}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %e[rx0][0]\n"
+                         "vmla.f32 q15, q10, %e[rx1][0]\n"
+                         "vmla.f32 q14, q11, %e[rx0][1]\n"
+                         "vmla.f32 q15, q11, %e[rx1][1]\n"
+                         "vmla.f32 q14, q12, %f[rx0][0]\n"
+                         "vmla.f32 q15, q12, %f[rx1][0]\n"
+                         "vmla.f32 q14, q13, %f[rx0][1]\n"
+                         "vmla.f32 q15, q13, %f[rx1][1]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d16-d17}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d18-d19}, [r0]\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "vmla.f32 q14, q6, %e[rx0][0]\n"
+                         "vmla.f32 q15, q6, %e[rx1][0]\n"
+                         "vmla.f32 q14, q7, %e[rx0][1]\n"
+                         "vmla.f32 q15, q7, %e[rx1][1]\n"
+                         "vmla.f32 q14, q8, %f[rx0][0]\n"
+                         "vmla.f32 q15, q8, %f[rx1][0]\n"
+                         "vmla.f32 q14, q9, %f[rx0][1]\n"
+                         "vmla.f32 q15, q9, %f[rx1][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [_n] "+r"(_n)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn)
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("vld1.f32 {d28}, [%[outptr0]]\n"
+                         "vld1.f32 {d30}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "vld1.f32 {d12}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d16}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d18}, [r0]\n"
+
+                         "vmla.f32 d28, d12, %e[rx0][0]\n"
+                         "vmla.f32 d30, d12, %e[rx1][0]\n"
+                         "vmla.f32 d28, d14, %e[rx0][1]\n"
+                         "vmla.f32 d30, d14, %e[rx1][1]\n"
+                         "vmla.f32 d28, d16, %f[rx0][0]\n"
+                         "vmla.f32 d30, d16, %f[rx1][0]\n"
+                         "vmla.f32 d28, d18, %f[rx0][1]\n"
+                         "vmla.f32 d30, d18, %f[rx1][1]\n"
+
+                         "vst1.f32 {d28}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30}, [%[outptr1]]!\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [outptr1] "+r"(outptr1)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1)
+#ifndef _OPENMP
+
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q14", "q15"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+                         );
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x0 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x0 + 3));
+
+            *outptr1 += (*kernel0) * (*_x1) + (*(kernel0 + outch)) * (*(_x1 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x1 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x1 + 3));
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+          }
+
+          kernel0 += outch * 3;
+          _x0 += 4;
+          _x1 += 4;
+        }
+
+        for (; i + 1 < inch; i += 2)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("d8") = vld1_f32(_x0);
+          register float32x2_t rx1 asm("d10") = vld1_f32(_x1);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d22-d23}, [r0]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q15, q6, %P[rx1][0]\n"
+                         "vmla.f32 q14, q7, %P[rx0][1]\n"
+                         "vmla.f32 q15, q7, %P[rx1][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %P[rx0][0]\n"
+                         "vmla.f32 q15, q10, %P[rx1][0]\n"
+                         "vmla.f32 q14, q11, %P[rx0][1]\n"
+                         "vmla.f32 q15, q11, %P[rx1][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q15, q6, %P[rx1][0]\n"
+                         "vmla.f32 q14, q7, %P[rx0][1]\n"
+                         "vmla.f32 q15, q7, %P[rx1][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d22-d23}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %P[rx0][0]\n"
+                         "vmla.f32 q15, q10, %P[rx1][0]\n"
+                         "vmla.f32 q14, q11, %P[rx0][1]\n"
+                         "vmla.f32 q15, q11, %P[rx1][1]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q15, q6, %P[rx1][0]\n"
+                         "vmla.f32 q14, q7, %P[rx0][1]\n"
+                         "vmla.f32 q15, q7, %P[rx1][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [_n] "+r"(_n)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q10", "q11", "q14", "q15"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+
+                         );
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("vld1.f32 {d28}, [%[outptr0]]\n"
+                         "vld1.f32 {d30}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "vld1.f32 {d12}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14}, [r0]\n"
+
+                         "vmla.f32 d28, d12, %P[rx0][0]\n"
+                         "vmla.f32 d30, d12, %P[rx1][0]\n"
+                         "vmla.f32 d28, d14, %P[rx0][1]\n"
+                         "vmla.f32 d30, d14, %P[rx1][1]\n"
+
+                         "vst1.f32 {d28}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30}, [%[outptr1]]!\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [outptr1] "+r"(outptr1)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q14", "q15"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+
+                         );
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1));
+            *outptr1 += (*kernel0) * (*_x1) + (*(kernel0 + outch)) * (*(_x1 + 1));
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+          }
+
+          kernel0 += outch;
+          _x0 += 2;
+          _x1 += 2;
+        }
+
+        for (; i < inch; i++)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("d8") = vld1_dup_f32(_x0);
+          register float32x2_t rx1 asm("d10") = vld1_dup_f32(_x1);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q15, q6, %P[rx1][0]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %P[rx0][0]\n"
+                         "vmla.f32 q15, q10, %P[rx1][0]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q15, q6, %P[rx1][0]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %P[rx0][0]\n"
+                         "vmla.f32 q15, q10, %P[rx1][0]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q15, q6, %P[rx1][0]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [_n] "+r"(_n)
+                         : [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q10", "q14", "q15"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+                         );
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("vld1.f32 {d28}, [%[outptr0]]\n"
+                         "vld1.f32 {d30}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "vld1.f32 {d12}, [r0]\n"
+
+                         "vmla.f32 d28, d12, %P[rx0][0]\n"
+                         "vmla.f32 d30, d12, %P[rx1][0]\n"
+
+                         "vst1.f32 {d28}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30}, [%[outptr1]]!\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [outptr1] "+r"(outptr1)
+                         : [rx0] "w"(rx0), [rx1] "w"(rx1)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q14", "q15"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+
+                         );
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0);
+            *outptr1 += (*kernel0) * (*_x1);
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+          }
+
+          _x0 += 1;
+          _x1 += 1;
+        }
+
+        img1 += inch * 2 * _stride;
+        out0 += outch * 2;
+        q += 2;
+      }
+
+      for (; q < outw; q++)
+      {
+        if (padding)
+        {
+          if ((q * _stride + m % kernel_w < pad_left) ||
+              (q * _stride + m % kernel_w) >= pad_left + bottom_blob.w)
+          {
+            img1 += inch * _stride;
+            out0 += outch;
+            continue;
+          }
+        }
+
+        const float *_x0 = img1;
+        const float *kernel0 = _kernel0;
+
+        int i = 0;
+        for (; i + 3 < inch; i += 4)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x4_t rx0 asm("q4") = vld1q_f32(_x0);
+
+          float *outptr0 = out0;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d16-d17}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d18-d19}, [r0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d22-d23}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d24-d25}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d26-d27}, [r0]\n"
+
+                         "vmla.f32 q14, q6, %e[rx0][0]\n"
+                         "vmla.f32 q14, q7, %e[rx0][1]\n"
+                         "vmla.f32 q14, q8, %f[rx0][0]\n"
+                         "vmla.f32 q14, q9, %f[rx0][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d16-d17}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d18-d19}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %e[rx0][0]\n"
+                         "vmla.f32 q14, q11, %e[rx0][1]\n"
+                         "vmla.f32 q14, q12, %f[rx0][0]\n"
+                         "vmla.f32 q14, q13, %f[rx0][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "vmla.f32 q14, q6, %e[rx0][0]\n"
+                         "vmla.f32 q14, q7, %e[rx0][1]\n"
+                         "vmla.f32 q14, q8, %f[rx0][0]\n"
+                         "vmla.f32 q14, q9, %f[rx0][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d22-d23}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d24-d25}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d26-d27}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %e[rx0][0]\n"
+                         "vmla.f32 q14, q11, %e[rx0][1]\n"
+                         "vmla.f32 q14, q12, %f[rx0][0]\n"
+                         "vmla.f32 q14, q13, %f[rx0][1]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d16-d17}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d18-d19}, [r0]\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "vmla.f32 q14, q6, %e[rx0][0]\n"
+                         "vmla.f32 q14, q7, %e[rx0][1]\n"
+                         "vmla.f32 q14, q8, %f[rx0][0]\n"
+                         "vmla.f32 q14, q9, %f[rx0][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [_n] "+r"(_n)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [oddn] "r"(oddn)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+
+                         );
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("vld1.f32 {d28}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "vld1.f32 {d12}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d16}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d18}, [r0]\n"
+
+                         "vmla.f32 d28, d12, %e[rx0][0]\n"
+                         "vmla.f32 d28, d14, %e[rx0][1]\n"
+                         "vmla.f32 d28, d16, %f[rx0][0]\n"
+                         "vmla.f32 d28, d18, %f[rx0][1]\n"
+
+                         "vst1.f32 {d28}, [%[outptr0]]!\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0)
+                         : [stride] "r"(stride), [rx0] "w"(rx0)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q14", "q15"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+
+                         );
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x0 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x0 + 3));
+
+            kernel0++;
+            outptr0++;
+          }
+
+          kernel0 += outch * 3;
+          _x0 += 4;
+        }
+
+        for (; i + 1 < inch; i += 2)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("d8") = vld1_f32(_x0);
+
+          float *outptr0 = out0;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d22-d23}, [r0]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q14, q7, %P[rx0][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %P[rx0][0]\n"
+                         "vmla.f32 q14, q11, %P[rx0][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q14, q7, %P[rx0][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d22-d23}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %P[rx0][0]\n"
+                         "vmla.f32 q14, q11, %P[rx0][1]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q14, q7, %P[rx0][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [_n] "+r"(_n)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [oddn] "r"(oddn)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q10", "q11", "q14"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+
+                         );
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("vld1.f32 {d28}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "vld1.f32 {d12}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14}, [r0]\n"
+
+                         "vmla.f32 d28, d12, %P[rx0][0]\n"
+                         "vmla.f32 d28, d14, %P[rx0][1]\n"
+
+                         "vst1.f32 {d28}, [%[outptr0]]!\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0)
+                         : [stride] "r"(stride), [rx0] "w"(rx0)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q14", "q15"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+
+                         );
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1));
+
+            kernel0++;
+            outptr0++;
+          }
+
+          kernel0 += outch;
+          _x0 += 2;
+        }
+
+        for (; i < inch; i++)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("d8") = vld1_dup_f32(_x0);
+
+          float *outptr0 = out0;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %P[rx0][0]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %P[rx0][0]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [_n] "+r"(_n)
+                         : [rx0] "w"(rx0), [oddn] "r"(oddn)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q10", "q14"
+
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+                         );
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("vld1.f32 {d28}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "vld1.f32 {d12}, [r0]\n"
+
+                         "vmla.f32 d28, d12, %P[rx0][0]\n"
+
+                         "vst1.f32 {d28}, [%[outptr0]]!\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0)
+                         : [rx0] "w"(rx0)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q14", "q15"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+
+                         );
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0);
+
+            kernel0++;
+            outptr0++;
+          }
+
+          _x0 += 1;
+        }
+
+        img1 += inch * _stride;
+        out0 += outch;
+      }
+    }
+  }
+}
+
+static void direct_conv_s(const convMat_t &bottom_blob, convMat_t &top_blob,
+                          const convMat_t &_kernel, const int _stride, const int padding,
+                          const int pad_top, const int pad_left)
+{
+  const int w = bottom_blob.w;
+  const int h = bottom_blob.h;
+  const int inch = bottom_blob.c;
+  const int outw = top_blob.w;
+  const int outh = top_blob.h;
+  const int outch = top_blob.c;
+  const int kernel_w = _kernel.w;
+  const int kernel_h = _kernel.h;
+
+#ifdef _OPENMP
+#pragma omp parallel for
+#endif // _OPENMP
+  for (int p = 0; p < outh; p++)
+  {
+    const float *img0 = bottom_blob.data + (p * _stride - pad_top) * w * inch;
+    float *out = top_blob.data + p * outw * outch;
+
+    // clear output.
+    for (int j = 0; j < outw * outch; j++)
+    {
+      *(out + j) = 0.f;
+    }
+
+    for (int m = 0; m < kernel_w * kernel_h; m++)
+    {
+      if (padding)
+      {
+        if (((p * _stride + m / kernel_w) < pad_top) || (p * _stride + m / kernel_w >= pad_top + h))
+        {
+          continue;
+        }
+      }
+
+      float *out0 = out;
+      const float *_kernel0 = _kernel.data + m * inch * outch;
+      const float *img1 = img0 + (m / kernel_w) * w * inch + (m % kernel_w - pad_left) * inch;
+
+      int q = 0;
+      for (; q + 1 < outw; /*q += 2*/)
+      {
+        if (padding)
+        {
+          if (((q + 1) * _stride + m % kernel_w < pad_left) ||
+              (q * _stride + m % kernel_w >= pad_left + w))
+          {
+            out0 += outch * 2;
+            img1 += inch * _stride * 2;
+            q += 2;
+            continue;
+          }
+          else if (q * _stride + m % kernel_w < pad_left)
+          {
+            out0 += outch;
+            img1 += inch * _stride;
+            q++;
+            continue;
+          }
+          else if ((q + 1) * _stride + m % kernel_w >= pad_left + w)
+          {
+            break;
+          }
+        }
+
+        const float *_x0 = img1;
+        const float *_x1 = img1 + inch * _stride;
+
+        const float *kernel0 = _kernel0;
+
+        int i = 0;
+        for (; i + 3 < inch; i += 4)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x4_t rx0 asm("q4") = vld1q_f32(_x0);
+          register float32x4_t rx1 asm("q5") = vld1q_f32(_x1);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d16-d17}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d18-d19}, [r0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d22-d23}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d24-d25}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d26-d27}, [r0]\n"
+
+                         "vmla.f32 q14, q6, %e[rx0][0]\n"
+                         "vmla.f32 q15, q6, %e[rx1][0]\n"
+                         "vmla.f32 q14, q7, %e[rx0][1]\n"
+                         "vmla.f32 q15, q7, %e[rx1][1]\n"
+                         "vmla.f32 q14, q8, %f[rx0][0]\n"
+                         "vmla.f32 q15, q8, %f[rx1][0]\n"
+                         "vmla.f32 q14, q9, %f[rx0][1]\n"
+                         "vmla.f32 q15, q9, %f[rx1][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d16-d17}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d18-d19}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %e[rx0][0]\n"
+                         "vmla.f32 q15, q10, %e[rx1][0]\n"
+                         "vmla.f32 q14, q11, %e[rx0][1]\n"
+                         "vmla.f32 q15, q11, %e[rx1][1]\n"
+                         "vmla.f32 q14, q12, %f[rx0][0]\n"
+                         "vmla.f32 q15, q12, %f[rx1][0]\n"
+                         "vmla.f32 q14, q13, %f[rx0][1]\n"
+                         "vmla.f32 q15, q13, %f[rx1][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "vmla.f32 q14, q6, %e[rx0][0]\n"
+                         "vmla.f32 q15, q6, %e[rx1][0]\n"
+                         "vmla.f32 q14, q7, %e[rx0][1]\n"
+                         "vmla.f32 q15, q7, %e[rx1][1]\n"
+                         "vmla.f32 q14, q8, %f[rx0][0]\n"
+                         "vmla.f32 q15, q8, %f[rx1][0]\n"
+                         "vmla.f32 q14, q9, %f[rx0][1]\n"
+                         "vmla.f32 q15, q9, %f[rx1][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d22-d23}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d24-d25}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d26-d27}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %e[rx0][0]\n"
+                         "vmla.f32 q15, q10, %e[rx1][0]\n"
+                         "vmla.f32 q14, q11, %e[rx0][1]\n"
+                         "vmla.f32 q15, q11, %e[rx1][1]\n"
+                         "vmla.f32 q14, q12, %f[rx0][0]\n"
+                         "vmla.f32 q15, q12, %f[rx1][0]\n"
+                         "vmla.f32 q14, q13, %f[rx0][1]\n"
+                         "vmla.f32 q15, q13, %f[rx1][1]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d16-d17}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d18-d19}, [r0]\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "vmla.f32 q14, q6, %e[rx0][0]\n"
+                         "vmla.f32 q15, q6, %e[rx1][0]\n"
+                         "vmla.f32 q14, q7, %e[rx0][1]\n"
+                         "vmla.f32 q15, q7, %e[rx1][1]\n"
+                         "vmla.f32 q14, q8, %f[rx0][0]\n"
+                         "vmla.f32 q15, q8, %f[rx1][0]\n"
+                         "vmla.f32 q14, q9, %f[rx0][1]\n"
+                         "vmla.f32 q15, q9, %f[rx1][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [_n] "+r"(_n)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn)
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15");
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("vld1.f32 {d28}, [%[outptr0]]\n"
+                         "vld1.f32 {d30}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "vld1.f32 {d12}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d16}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d18}, [r0]\n"
+
+                         "vmla.f32 d28, d12, %e[rx0][0]\n"
+                         "vmla.f32 d30, d12, %e[rx1][0]\n"
+                         "vmla.f32 d28, d14, %e[rx0][1]\n"
+                         "vmla.f32 d30, d14, %e[rx1][1]\n"
+                         "vmla.f32 d28, d16, %f[rx0][0]\n"
+                         "vmla.f32 d30, d16, %f[rx1][0]\n"
+                         "vmla.f32 d28, d18, %f[rx0][1]\n"
+                         "vmla.f32 d30, d18, %f[rx1][1]\n"
+
+                         "vst1.f32 {d28}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30}, [%[outptr1]]!\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [outptr1] "+r"(outptr1)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q14", "q15"
+#else
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif
+                         );
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x0 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x0 + 3));
+
+            *outptr1 += (*kernel0) * (*_x1) + (*(kernel0 + outch)) * (*(_x1 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x1 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x1 + 3));
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+          }
+
+          kernel0 += outch * 3;
+          _x0 += 4;
+          _x1 += 4;
+        }
+
+        for (; i + 1 < inch; i += 2)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("d8") = vld1_f32(_x0);
+          register float32x2_t rx1 asm("d10") = vld1_f32(_x1);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d22-d23}, [r0]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q15, q6, %P[rx1][0]\n"
+                         "vmla.f32 q14, q7, %P[rx0][1]\n"
+                         "vmla.f32 q15, q7, %P[rx1][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %P[rx0][0]\n"
+                         "vmla.f32 q15, q10, %P[rx1][0]\n"
+                         "vmla.f32 q14, q11, %P[rx0][1]\n"
+                         "vmla.f32 q15, q11, %P[rx1][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q15, q6, %P[rx1][0]\n"
+                         "vmla.f32 q14, q7, %P[rx0][1]\n"
+                         "vmla.f32 q15, q7, %P[rx1][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d22-d23}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %P[rx0][0]\n"
+                         "vmla.f32 q15, q10, %P[rx1][0]\n"
+                         "vmla.f32 q14, q11, %P[rx0][1]\n"
+                         "vmla.f32 q15, q11, %P[rx1][1]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q15, q6, %P[rx1][0]\n"
+                         "vmla.f32 q14, q7, %P[rx0][1]\n"
+                         "vmla.f32 q15, q7, %P[rx1][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [_n] "+r"(_n)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q10", "q11", "q14", "q15"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+                         );
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("vld1.f32 {d28}, [%[outptr0]]\n"
+                         "vld1.f32 {d30}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "vld1.f32 {d12}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14}, [r0]\n"
+
+                         "vmla.f32 d28, d12, %P[rx0][0]\n"
+                         "vmla.f32 d30, d12, %P[rx1][0]\n"
+                         "vmla.f32 d28, d14, %P[rx0][1]\n"
+                         "vmla.f32 d30, d14, %P[rx1][1]\n"
+
+                         "vst1.f32 {d28}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30}, [%[outptr1]]!\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [outptr1] "+r"(outptr1)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [rx1] "w"(rx1)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q14", "q15"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+                         );
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1));
+            *outptr1 += (*kernel0) * (*_x1) + (*(kernel0 + outch)) * (*(_x1 + 1));
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+          }
+
+          kernel0 += outch;
+          _x0 += 2;
+          _x1 += 2;
+        }
+
+        for (; i < inch; i++)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("d8") = vld1_dup_f32(_x0);
+          register float32x2_t rx1 asm("d10") = vld1_dup_f32(_x1);
+
+          float *outptr0 = out0;
+          float *outptr1 = out0 + outch;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q15, q6, %P[rx1][0]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %P[rx0][0]\n"
+                         "vmla.f32 q15, q10, %P[rx1][0]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q15, q6, %P[rx1][0]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %P[rx0][0]\n"
+                         "vmla.f32 q15, q10, %P[rx1][0]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+                         "vld1.f32 {d30-d31}, [%[outptr1]]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q15, q6, %P[rx1][0]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30-d31}, [%[outptr1]]!\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0),
+                           [outptr1] "+r"(outptr1), [_n] "+r"(_n)
+                         : [rx0] "w"(rx0), [rx1] "w"(rx1), [oddn] "r"(oddn)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q10", "q14", "q15"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+                         );
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("vld1.f32 {d28}, [%[outptr0]]\n"
+                         "vld1.f32 {d30}, [%[outptr1]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "vld1.f32 {d12}, [r0]\n"
+
+                         "vmla.f32 d28, d12, %P[rx0][0]\n"
+                         "vmla.f32 d30, d12, %P[rx1][0]\n"
+
+                         "vst1.f32 {d28}, [%[outptr0]]!\n"
+                         "vst1.f32 {d30}, [%[outptr1]]!\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [outptr1] "+r"(outptr1)
+                         : [rx0] "w"(rx0), [rx1] "w"(rx1)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q14", "q15"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+                         );
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0);
+            *outptr1 += (*kernel0) * (*_x1);
+
+            kernel0++;
+            outptr0++;
+            outptr1++;
+          }
+
+          _x0 += 1;
+          _x1 += 1;
+        }
+
+        img1 += inch * 2 * _stride;
+        out0 += outch * 2;
+        q += 2;
+      }
+
+      for (; q < outw; q++)
+      {
+        if (padding)
+        {
+          if ((q * _stride + m % kernel_w < pad_left) ||
+              (q * _stride + m % kernel_w >= pad_left + w))
+          {
+            img1 += inch * _stride;
+            out0 += outch;
+            continue;
+          }
+        }
+
+        const float *_x0 = img1;
+        const float *kernel0 = _kernel0;
+
+        int i = 0;
+        for (; i + 3 < inch; i += 4)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x4_t rx0 asm("q4") = vld1q_f32(_x0);
+
+          float *outptr0 = out0;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d16-d17}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d18-d19}, [r0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d22-d23}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d24-d25}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d26-d27}, [r0]\n"
+
+                         "vmla.f32 q14, q6, %e[rx0][0]\n"
+                         "vmla.f32 q14, q7, %e[rx0][1]\n"
+                         "vmla.f32 q14, q8, %f[rx0][0]\n"
+                         "vmla.f32 q14, q9, %f[rx0][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d16-d17}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d18-d19}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %e[rx0][0]\n"
+                         "vmla.f32 q14, q11, %e[rx0][1]\n"
+                         "vmla.f32 q14, q12, %f[rx0][0]\n"
+                         "vmla.f32 q14, q13, %f[rx0][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "vmla.f32 q14, q6, %e[rx0][0]\n"
+                         "vmla.f32 q14, q7, %e[rx0][1]\n"
+                         "vmla.f32 q14, q8, %f[rx0][0]\n"
+                         "vmla.f32 q14, q9, %f[rx0][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d22-d23}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d24-d25}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d26-d27}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %e[rx0][0]\n"
+                         "vmla.f32 q14, q11, %e[rx0][1]\n"
+                         "vmla.f32 q14, q12, %f[rx0][0]\n"
+                         "vmla.f32 q14, q13, %f[rx0][1]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d16-d17}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d18-d19}, [r0]\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "vmla.f32 q14, q6, %e[rx0][0]\n"
+                         "vmla.f32 q14, q7, %e[rx0][1]\n"
+                         "vmla.f32 q14, q8, %f[rx0][0]\n"
+                         "vmla.f32 q14, q9, %f[rx0][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [_n] "+r"(_n)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [oddn] "r"(oddn)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+                         );
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("vld1.f32 {d28}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "vld1.f32 {d12}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d16}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d18}, [r0]\n"
+
+                         "vmla.f32 d28, d12, %e[rx0][0]\n"
+                         "vmla.f32 d28, d14, %e[rx0][1]\n"
+                         "vmla.f32 d28, d16, %f[rx0][0]\n"
+                         "vmla.f32 d28, d18, %f[rx0][1]\n"
+
+                         "vst1.f32 {d28}, [%[outptr0]]!\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0)
+                         : [stride] "r"(stride), [rx0] "w"(rx0)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q14", "q15"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+                         );
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1)) +
+                        (*(kernel0 + outch * 2)) * (*(_x0 + 2)) +
+                        (*(kernel0 + outch * 3)) * (*(_x0 + 3));
+
+            kernel0++;
+            outptr0++;
+          }
+
+          kernel0 += outch * 3;
+          _x0 += 4;
+        }
+
+        for (; i + 1 < inch; i += 2)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("d8") = vld1_f32(_x0);
+
+          float *outptr0 = out0;
+
+          int stride = outch << 2;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d22-d23}, [r0]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q14, q7, %P[rx0][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %P[rx0][0]\n"
+                         "vmla.f32 q14, q11, %P[rx0][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q14, q7, %P[rx0][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d22-d23}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %P[rx0][0]\n"
+                         "vmla.f32 q14, q11, %P[rx0][1]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14-d15}, [r0]\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+                         "vmla.f32 q14, q7, %P[rx0][1]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [_n] "+r"(_n)
+                         : [stride] "r"(stride), [rx0] "w"(rx0), [oddn] "r"(oddn)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q10", "q11", "q14"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+                         );
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("vld1.f32 {d28}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "vld1.f32 {d12}, [r0]\n"
+                         "add r0, r0, %[stride]\n"
+                         "vld1.f32 {d14}, [r0]\n"
+
+                         "vmla.f32 d28, d12, %P[rx0][0]\n"
+                         "vmla.f32 d28, d14, %P[rx0][1]\n"
+
+                         "vst1.f32 {d28}, [%[outptr0]]!\n"
+
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0)
+                         : [stride] "r"(stride), [rx0] "w"(rx0)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q14", "q15"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+                         );
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0) + (*(kernel0 + outch)) * (*(_x0 + 1));
+
+            kernel0++;
+            outptr0++;
+          }
+
+          kernel0 += outch;
+          _x0 += 2;
+        }
+
+        for (; i < inch; i++)
+        {
+          int nn = outch >> 2;
+          int remain = outch & 0x03;
+
+          register float32x2_t rx0 asm("d8") = vld1_dup_f32(_x0);
+
+          float *outptr0 = out0;
+
+          if (nn > 0)
+          {
+            int _n = nn >> 1;
+            int oddn = nn & 1;
+
+            asm volatile("cmp %[_n], #0\n"
+                         "beq 2f\n"
+                         "subs %[_n], %[_n], #1\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+
+                         "beq 1f\n"
+
+                         "0:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %P[rx0][0]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "subs %[_n], %[_n], #1\n"
+                         "bne 0b\n"
+
+                         "1:\n"
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d20-d21}, [r0]\n"
+
+                         "vmla.f32 q14, q10, %P[rx0][0]\n"
+
+                         "cmp %[oddn], #1\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+
+                         "bne 3f\n"
+
+                         "2:\n"
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #16\n"
+                         "vld1.f32 {d12-d13}, [r0]\n"
+
+                         "vld1.f32 {d28-d29}, [%[outptr0]]\n"
+
+                         "vmla.f32 q14, q6, %P[rx0][0]\n"
+
+                         "vst1.f32 {d28-d29}, [%[outptr0]]!\n"
+                         "3:\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0), [_n] "+r"(_n)
+                         : [rx0] "w"(rx0), [oddn] "r"(oddn)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q10", "q14"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+                         );
+          }
+
+          if (remain >= 2)
+          {
+            asm volatile("vld1.f32 {d28}, [%[outptr0]]\n"
+
+                         "mov r0, %[kernel0]\n"
+                         "add %[kernel0], %[kernel0], #8\n"
+                         "vld1.f32 {d12}, [r0]\n"
+
+                         "vmla.f32 d28, d12, %P[rx0][0]\n"
+
+                         "vst1.f32 {d28}, [%[outptr0]]!\n"
+                         : [kernel0] "+r"(kernel0), [outptr0] "+r"(outptr0)
+                         : [rx0] "w"(rx0)
+#ifndef _OPENMP
+                         : "cc", "memory", "r0", "q6", "q14", "q15"
+#else  // _OPENMP
+                         : "cc", "memory", "r0", "q6", "q7", "q8", "q9", "q10", "q11", "q12", "q13",
+                           "q14", "q15"
+#endif // _OPENMP
+                         );
+            remain -= 2;
+          }
+
+          if (remain == 1)
+          {
+            *outptr0 += (*kernel0) * (*_x0);
+
+            kernel0++;
+            outptr0++;
+          }
+
+          _x0 += 1;
+        }
+
+        img1 += inch * _stride;
+        out0 += outch;
+      }
+    }
+  }
+}
+#endif // __aarch64__
+
+void direct_conv_colmajor(const convMat_t &bottom_blob, convMat_t &top_blob,
+                          const convMat_t &kernel, const convParams_t &params, int num_threads)
+{
+  omp_set_num_threads(num_threads);
+
+  if (bottom_blob.c * top_blob.c < 256 * 256)
+  {
+    direct_conv_s(bottom_blob, top_blob, kernel, params.stride_w, params.padding, params.pad_h,
+                  params.pad_w);
+    return;
+  }
+
+  direct_conv_l(bottom_blob, top_blob, kernel, params.stride_w, params.padding, params.pad_h,
+                params.pad_w);
+}
+
+} // namespace srcn
+} // namespace nnfw
diff --git a/runtimes/libs/srcn/src/direct_conv_colmajor.h b/runtimes/libs/srcn/src/direct_conv_colmajor.h
new file mode 100644
index 000000000..e50e03907
--- /dev/null
+++ b/runtimes/libs/srcn/src/direct_conv_colmajor.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_SRCN_DIRECT_CONV_COLMAJOR_H__
+#define __NNFW_SRCN_DIRECT_CONV_COLMAJOR_H__
+
+#include "srcn/conv_type.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+void direct_conv_colmajor(const convMat_t &, convMat_t &, const convMat_t &, const convParams_t &,
+                          int);
+
+} // namespace srcn
+} // namespace nnfw
+
+#endif // __NNFW_SRCN_DIRECT_CONV_COLMAJOR_H__
diff --git a/runtimes/libs/srcn/src/sgemm_kernel.cc b/runtimes/libs/srcn/src/sgemm_kernel.cc
new file mode 100644
index 000000000..90c3641db
--- /dev/null
+++ b/runtimes/libs/srcn/src/sgemm_kernel.cc
@@ -0,0 +1,2508 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <arm_neon.h>
+
+namespace nnfw
+{
+namespace srcn
+{
+
+#if __aarch64__
+static void sgemm_rowmajor_micro_kernel_8x12(const float *lhs_ptr, const float *rhs_ptr,
+                                             float *res_ptr, const int k, const int k0,
+                                             const int stride)
+{
+  int oddk = (k & 1);
+  int nk = ((k + 1) / 2) - 1;
+
+  const int nstride = stride << 2;
+
+  __asm __volatile("ld1 {v0.4s}, [%[lhs_ptr]], #16\n"
+                   "ld1 {v2.4s, v3.4s, v4.4s}, [%[rhs_ptr]], #48\n"
+
+                   "cmp %[k0], #0\n"
+                   "beq  0f\n"
+
+                   "mov x0, %[res_ptr]\n"
+                   "ld1 {v8.4s, v9.4s, v10.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v11.4s, v12.4s, v13.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v14.4s, v15.4s, v16.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v17.4s, v18.4s, v19.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v20.4s, v21.4s, v22.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v23.4s, v24.4s, v25.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v26.4s, v27.4s, v28.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v29.4s, v30.4s, v31.4s}, [x0]\n"
+                   "cbz %w[nk], 4f\n"
+                   "b 1f\n"
+
+                   "0:\n"
+                   "movi v8.4s, #0x0\n"
+                   "movi v9.4s, #0x0\n"
+                   "movi v10.4s, #0x0\n"
+                   "movi v11.4s, #0x0\n"
+                   "movi v12.4s, #0x0\n"
+                   "movi v13.4s, #0x0\n"
+                   "movi v14.4s, #0x0\n"
+                   "movi v15.4s, #0x0\n"
+                   "movi v16.4s, #0x0\n"
+                   "movi v17.4s, #0x0\n"
+                   "movi v18.4s, #0x0\n"
+                   "movi v19.4s, #0x0\n"
+                   "movi v20.4s, #0x0\n"
+                   "movi v21.4s, #0x0\n"
+                   "movi v22.4s, #0x0\n"
+                   "movi v23.4s, #0x0\n"
+                   "movi v24.4s, #0x0\n"
+                   "movi v25.4s, #0x0\n"
+                   "movi v26.4s, #0x0\n"
+                   "movi v27.4s, #0x0\n"
+                   "movi v28.4s, #0x0\n"
+                   "movi v29.4s, #0x0\n"
+                   "movi v30.4s, #0x0\n"
+                   "movi v31.4s, #0x0\n"
+                   "cbz %w[nk], 4f\n"
+
+                   "1:\n"
+                   "fmla v8.4s,  v2.4s, v0.s[0]\n"
+                   "fmla v11.4s, v2.4s, v0.s[1]\n"
+                   "ld1 {v1.4s}, [%[lhs_ptr]], #16\n"
+                   "fmla v14.4s, v2.4s, v0.s[2]\n"
+                   "fmla v17.4s, v2.4s, v0.s[3]\n"
+                   "fmla v9.4s,  v3.4s, v0.s[0]\n"
+                   "fmla v12.4s, v3.4s, v0.s[1]\n"
+                   "fmla v15.4s, v3.4s, v0.s[2]\n"
+                   "fmla v18.4s, v3.4s, v0.s[3]\n"
+                   "fmla v10.4s, v4.4s, v0.s[0]\n"
+                   "fmla v13.4s, v4.4s, v0.s[1]\n"
+                   "fmla v16.4s, v4.4s, v0.s[2]\n"
+                   "fmla v19.4s, v4.4s, v0.s[3]\n"
+
+                   "ld1 {v5.4s, v6.4s, v7.4s}, [%[rhs_ptr]], #48\n"
+
+                   "fmla v20.4s, v2.4s, v1.s[0]\n"
+                   "fmla v23.4s, v2.4s, v1.s[1]\n"
+                   "ld1 {v0.4s}, [%[lhs_ptr]], #16\n"
+                   "fmla v26.4s, v2.4s, v1.s[2]\n"
+                   "fmla v29.4s, v2.4s, v1.s[3]\n"
+                   "fmla v21.4s, v3.4s, v1.s[0]\n"
+                   "fmla v24.4s, v3.4s, v1.s[1]\n"
+                   "fmla v27.4s, v3.4s, v1.s[2]\n"
+                   "fmla v30.4s, v3.4s, v1.s[3]\n"
+                   "fmla v22.4s, v4.4s, v1.s[0]\n"
+                   "fmla v25.4s, v4.4s, v1.s[1]\n"
+                   "fmla v28.4s, v4.4s, v1.s[2]\n"
+                   "fmla v31.4s, v4.4s, v1.s[3]\n"
+
+                   "fmla v8.4s,  v5.4s, v0.s[0]\n"
+                   "fmla v11.4s, v5.4s, v0.s[1]\n"
+                   "ld1 {v1.4s}, [%[lhs_ptr]], #16\n"
+                   "fmla v14.4s, v5.4s, v0.s[2]\n"
+                   "fmla v17.4s, v5.4s, v0.s[3]\n"
+                   "fmla v9.4s,  v6.4s, v0.s[0]\n"
+                   "fmla v12.4s, v6.4s, v0.s[1]\n"
+                   "fmla v15.4s, v6.4s, v0.s[2]\n"
+                   "fmla v18.4s, v6.4s, v0.s[3]\n"
+                   "fmla v10.4s, v7.4s, v0.s[0]\n"
+                   "fmla v13.4s, v7.4s, v0.s[1]\n"
+                   "fmla v16.4s, v7.4s, v0.s[2]\n"
+                   "fmla v19.4s, v7.4s, v0.s[3]\n"
+
+                   "ld1 {v2.4s, v3.4s, v4.4s}, [%[rhs_ptr]], #48\n"
+
+                   "fmla v20.4s, v5.4s, v1.s[0]\n"
+                   "fmla v23.4s, v5.4s, v1.s[1]\n"
+                   "ld1 {v0.4s}, [%[lhs_ptr]], #16\n"
+                   "fmla v26.4s, v5.4s, v1.s[2]\n"
+                   "fmla v29.4s, v5.4s, v1.s[3]\n"
+                   "fmla v21.4s, v6.4s, v1.s[0]\n"
+                   "fmla v24.4s, v6.4s, v1.s[1]\n"
+                   "fmla v27.4s, v6.4s, v1.s[2]\n"
+                   "fmla v30.4s, v6.4s, v1.s[3]\n"
+                   "fmla v22.4s, v7.4s, v1.s[0]\n"
+                   "fmla v25.4s, v7.4s, v1.s[1]\n"
+                   "subs %w[nk], %w[nk], #1\n"
+                   "fmla v28.4s, v7.4s, v1.s[2]\n"
+                   "fmla v31.4s, v7.4s, v1.s[3]\n"
+                   "bne 1b\n"
+
+                   "4:\n"
+                   "mov x0, %[res_ptr]\n"
+                   "cbnz %[oddk], 2f\n"
+
+                   "fmla v8.4s,  v2.4s, v0.s[0]\n"
+                   "fmla v9.4s,  v3.4s, v0.s[0]\n"
+                   "ld1 {v1.4s}, [%[lhs_ptr]], #16\n"
+                   "fmla v10.4s, v4.4s, v0.s[0]\n"
+                   "fmla v11.4s, v2.4s, v0.s[1]\n"
+                   "fmla v12.4s, v3.4s, v0.s[1]\n"
+                   "fmla v13.4s, v4.4s, v0.s[1]\n"
+                   "ld1 {v5.4s, v6.4s, v7.4s}, [%[rhs_ptr]], #48\n"
+                   "fmla v14.4s, v2.4s, v0.s[2]\n"
+                   "fmla v15.4s, v3.4s, v0.s[2]\n"
+                   "fmla v16.4s, v4.4s, v0.s[2]\n"
+                   "fmla v17.4s, v2.4s, v0.s[3]\n"
+                   "fmla v18.4s, v3.4s, v0.s[3]\n"
+                   "fmla v19.4s, v4.4s, v0.s[3]\n"
+
+                   "fmla v20.4s, v2.4s, v1.s[0]\n"
+                   "fmla v21.4s, v3.4s, v1.s[0]\n"
+                   "ld1 {v0.4s}, [%[lhs_ptr]], #16\n"
+                   "fmla v22.4s, v4.4s, v1.s[0]\n"
+                   "fmla v23.4s, v2.4s, v1.s[1]\n"
+                   "fmla v24.4s, v3.4s, v1.s[1]\n"
+                   "fmla v25.4s, v4.4s, v1.s[1]\n"
+                   "fmla v26.4s, v2.4s, v1.s[2]\n"
+                   "fmla v27.4s, v3.4s, v1.s[2]\n"
+                   "fmla v28.4s, v4.4s, v1.s[2]\n"
+                   "fmla v29.4s, v2.4s, v1.s[3]\n"
+                   "fmla v30.4s, v3.4s, v1.s[3]\n"
+                   "fmla v31.4s, v4.4s, v1.s[3]\n"
+
+                   "ld1 {v1.4s}, [%[lhs_ptr]], #16\n"
+                   "ld1 {v2.4s, v3.4s, v4.4s}, [%[rhs_ptr]], #48\n"
+
+                   "fmla v8.4s,  v5.4s, v0.s[0]\n"
+                   "fmla v9.4s,  v6.4s, v0.s[0]\n"
+                   "fmla v10.4s, v7.4s, v0.s[0]\n"
+                   "st1 {v8.4s, v9.4s, v10.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v11.4s, v5.4s, v0.s[1]\n"
+                   "fmla v12.4s, v6.4s, v0.s[1]\n"
+                   "fmla v13.4s, v7.4s, v0.s[1]\n"
+                   "st1 {v11.4s, v12.4s, v13.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v14.4s, v5.4s, v0.s[2]\n"
+                   "fmla v15.4s, v6.4s, v0.s[2]\n"
+                   "fmla v16.4s, v7.4s, v0.s[2]\n"
+                   "st1 {v14.4s, v15.4s, v16.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v17.4s, v5.4s, v0.s[3]\n"
+                   "fmla v18.4s, v6.4s, v0.s[3]\n"
+                   "fmla v19.4s, v7.4s, v0.s[3]\n"
+                   "st1 {v17.4s, v18.4s, v19.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+
+                   "fmla v20.4s, v5.4s, v1.s[0]\n"
+                   "fmla v21.4s, v6.4s, v1.s[0]\n"
+                   "fmla v22.4s, v7.4s, v1.s[0]\n"
+                   "st1 {v20.4s, v21.4s, v22.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v23.4s, v5.4s, v1.s[1]\n"
+                   "fmla v24.4s, v6.4s, v1.s[1]\n"
+                   "fmla v25.4s, v7.4s, v1.s[1]\n"
+                   "st1 {v23.4s, v24.4s, v25.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v26.4s, v5.4s, v1.s[2]\n"
+                   "fmla v27.4s, v6.4s, v1.s[2]\n"
+                   "fmla v28.4s, v7.4s, v1.s[2]\n"
+                   "st1 {v26.4s, v27.4s, v28.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v29.4s, v5.4s, v1.s[3]\n"
+                   "fmla v30.4s, v6.4s, v1.s[3]\n"
+                   "fmla v31.4s, v7.4s, v1.s[3]\n"
+                   "b 3f\n"
+
+                   "2:\n"
+                   "ld1 {v1.4s}, [%[lhs_ptr]], #16\n"
+                   "ld1 {v5.4s, v6.4s, v7.4s}, [%[rhs_ptr]], #48\n"
+
+                   "fmla v8.4s,  v2.4s, v0.s[0]\n"
+                   "fmla v9.4s,  v3.4s, v0.s[0]\n"
+                   "fmla v10.4s, v4.4s, v0.s[0]\n"
+                   "st1 {v8.4s, v9.4s, v10.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v11.4s, v2.4s, v0.s[1]\n"
+                   "fmla v12.4s, v3.4s, v0.s[1]\n"
+                   "fmla v13.4s, v4.4s, v0.s[1]\n"
+                   "st1 {v11.4s, v12.4s, v13.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v14.4s, v2.4s, v0.s[2]\n"
+                   "fmla v15.4s, v3.4s, v0.s[2]\n"
+                   "fmla v16.4s, v4.4s, v0.s[2]\n"
+                   "st1 {v14.4s, v15.4s, v16.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v17.4s, v2.4s, v0.s[3]\n"
+                   "fmla v18.4s, v3.4s, v0.s[3]\n"
+                   "fmla v19.4s, v4.4s, v0.s[3]\n"
+                   "st1 {v17.4s, v18.4s, v19.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+
+                   "fmla v20.4s, v2.4s, v1.s[0]\n"
+                   "fmla v21.4s, v3.4s, v1.s[0]\n"
+                   "fmla v22.4s, v4.4s, v1.s[0]\n"
+                   "st1 {v20.4s, v21.4s, v22.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v23.4s, v2.4s, v1.s[1]\n"
+                   "fmla v24.4s, v3.4s, v1.s[1]\n"
+                   "fmla v25.4s, v4.4s, v1.s[1]\n"
+                   "st1 {v23.4s, v24.4s, v25.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v26.4s, v2.4s, v1.s[2]\n"
+                   "fmla v27.4s, v3.4s, v1.s[2]\n"
+                   "fmla v28.4s, v4.4s, v1.s[2]\n"
+                   "st1 {v26.4s, v27.4s, v28.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v29.4s, v2.4s, v1.s[3]\n"
+                   "fmla v30.4s, v3.4s, v1.s[3]\n"
+                   "fmla v31.4s, v4.4s, v1.s[3]\n"
+
+                   "3:\n"
+                   "st1 {v29.4s, v30.4s, v31.4s}, [x0]\n"
+                   : [lhs_ptr] "+r"(lhs_ptr), [rhs_ptr] "+r"(rhs_ptr), [res_ptr] "+r"(res_ptr),
+                     [nk] "+r"(nk)
+                   : [oddk] "r"(oddk), [k0] "r"(k0), [nstride] "r"(nstride)
+                   : "x0", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11",
+                     "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22",
+                     "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31");
+}
+
+static void sgemm_rowmajor_micro_kernel_12x8(const float *lhs_ptr, const float *rhs_ptr,
+                                             float *res_ptr, const int k, const int k0,
+                                             const int stride)
+{
+  int oddk = (k & 1);
+  int nk = ((k + 1) / 2) - 1;
+
+  const int nstride = stride << 2;
+
+  __asm __volatile("ld1 {v0.4s}, [%[lhs_ptr]], #16\n"
+                   "ld1 {v4.4s, v5.4s}, [%[rhs_ptr]], #32\n"
+
+                   "cmp %[k0], #0\n"
+                   "beq  0f\n"
+
+                   "mov x0, %[res_ptr]\n"
+                   "ld1 {v8.4s, v9.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v10.4s, v11.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v12.4s, v13.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v14.4s, v15.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v16.4s, v17.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v18.4s, v19.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v20.4s, v21.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v22.4s, v23.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v24.4s, v25.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v26.4s, v27.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v28.4s, v29.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v30.4s, v31.4s}, [x0]\n"
+                   "cbz %w[nk], 4f\n"
+                   "b 1f\n"
+
+                   "0:\n"
+                   "movi v8.4s, #0x0\n"
+                   "movi v9.4s, #0x0\n"
+                   "movi v10.4s, #0x0\n"
+                   "movi v11.4s, #0x0\n"
+                   "movi v12.4s, #0x0\n"
+                   "movi v13.4s, #0x0\n"
+                   "movi v14.4s, #0x0\n"
+                   "movi v15.4s, #0x0\n"
+                   "movi v16.4s, #0x0\n"
+                   "movi v17.4s, #0x0\n"
+                   "movi v18.4s, #0x0\n"
+                   "movi v19.4s, #0x0\n"
+                   "movi v20.4s, #0x0\n"
+                   "movi v21.4s, #0x0\n"
+                   "movi v22.4s, #0x0\n"
+                   "movi v23.4s, #0x0\n"
+                   "movi v24.4s, #0x0\n"
+                   "movi v25.4s, #0x0\n"
+                   "movi v26.4s, #0x0\n"
+                   "movi v27.4s, #0x0\n"
+                   "movi v28.4s, #0x0\n"
+                   "movi v29.4s, #0x0\n"
+                   "movi v30.4s, #0x0\n"
+                   "movi v31.4s, #0x0\n"
+                   "cbz %w[nk], 4f\n"
+
+                   "1:\n"
+                   "fmla v8.4s,  v4.4s, v0.s[0]\n"
+                   "fmla v10.4s, v4.4s, v0.s[1]\n"
+                   "ld1 {v1.4s}, [%[lhs_ptr]], #16\n"
+                   "fmla v12.4s, v4.4s, v0.s[2]\n"
+                   "fmla v14.4s, v4.4s, v0.s[3]\n"
+                   "fmla v9.4s,  v5.4s, v0.s[0]\n"
+                   "fmla v11.4s, v5.4s, v0.s[1]\n"
+                   "fmla v13.4s, v5.4s, v0.s[2]\n"
+                   "fmla v15.4s, v5.4s, v0.s[3]\n"
+
+                   "fmla v16.4s, v4.4s, v1.s[0]\n"
+                   "fmla v18.4s, v4.4s, v1.s[1]\n"
+                   "ld1 {v2.4s}, [%[lhs_ptr]], #16\n"
+                   "fmla v20.4s, v4.4s, v1.s[2]\n"
+                   "fmla v22.4s, v4.4s, v1.s[3]\n"
+                   "fmla v17.4s, v5.4s, v1.s[0]\n"
+                   "fmla v19.4s, v5.4s, v1.s[1]\n"
+                   "fmla v21.4s, v5.4s, v1.s[2]\n"
+                   "fmla v23.4s, v5.4s, v1.s[3]\n"
+
+                   "ld1 {v6.4s, v7.4s}, [%[rhs_ptr]], #32\n"
+
+                   "fmla v24.4s, v4.4s, v2.s[0]\n"
+                   "fmla v26.4s, v4.4s, v2.s[1]\n"
+                   "ld1 {v0.4s}, [%[lhs_ptr]], #16\n"
+                   "fmla v28.4s, v4.4s, v2.s[2]\n"
+                   "fmla v30.4s, v4.4s, v2.s[3]\n"
+                   "fmla v25.4s, v5.4s, v2.s[0]\n"
+                   "fmla v27.4s, v5.4s, v2.s[1]\n"
+                   "fmla v29.4s, v5.4s, v2.s[2]\n"
+                   "fmla v31.4s, v5.4s, v2.s[3]\n"
+
+                   "fmla v8.4s,  v6.4s, v0.s[0]\n"
+                   "fmla v10.4s, v6.4s, v0.s[1]\n"
+                   "ld1 {v1.4s}, [%[lhs_ptr]], #16\n"
+                   "fmla v12.4s, v6.4s, v0.s[2]\n"
+                   "fmla v14.4s, v6.4s, v0.s[3]\n"
+                   "fmla v9.4s,  v7.4s, v0.s[0]\n"
+                   "fmla v11.4s, v7.4s, v0.s[1]\n"
+                   "fmla v13.4s, v7.4s, v0.s[2]\n"
+                   "fmla v15.4s, v7.4s, v0.s[3]\n"
+
+                   "fmla v16.4s, v6.4s, v1.s[0]\n"
+                   "fmla v18.4s, v6.4s, v1.s[1]\n"
+                   "ld1 {v2.4s}, [%[lhs_ptr]], #16\n"
+                   "fmla v20.4s, v6.4s, v1.s[2]\n"
+                   "fmla v22.4s, v6.4s, v1.s[3]\n"
+                   "fmla v17.4s, v7.4s, v1.s[0]\n"
+                   "fmla v19.4s, v7.4s, v1.s[1]\n"
+                   "fmla v21.4s, v7.4s, v1.s[2]\n"
+                   "fmla v23.4s, v7.4s, v1.s[3]\n"
+
+                   "ld1 {v4.4s, v5.4s}, [%[rhs_ptr]], #32\n"
+
+                   "fmla v24.4s, v6.4s, v2.s[0]\n"
+                   "fmla v26.4s, v6.4s, v2.s[1]\n"
+                   "ld1 {v0.4s}, [%[lhs_ptr]], #16\n"
+                   "fmla v28.4s, v6.4s, v2.s[2]\n"
+                   "fmla v30.4s, v6.4s, v2.s[3]\n"
+                   "fmla v25.4s, v7.4s, v2.s[0]\n"
+                   "fmla v27.4s, v7.4s, v2.s[1]\n"
+                   "subs %w[nk], %w[nk], #1\n"
+                   "fmla v29.4s, v7.4s, v2.s[2]\n"
+                   "fmla v31.4s, v7.4s, v2.s[3]\n"
+                   "bne 1b\n"
+
+                   "4:\n"
+                   "mov x0, %[res_ptr]\n"
+                   "cbnz %[oddk], 2f\n"
+
+                   "fmla v8.4s,  v4.4s, v0.s[0]\n"
+                   "fmla v9.4s,  v5.4s, v0.s[0]\n"
+                   "ld1 {v1.4s}, [%[lhs_ptr]], #16\n"
+                   "fmla v10.4s, v4.4s, v0.s[1]\n"
+                   "fmla v11.4s, v5.4s, v0.s[1]\n"
+                   "fmla v12.4s, v4.4s, v0.s[2]\n"
+                   "fmla v13.4s, v5.4s, v0.s[2]\n"
+                   "fmla v14.4s, v4.4s, v0.s[3]\n"
+                   "fmla v15.4s, v5.4s, v0.s[3]\n"
+
+                   "fmla v16.4s, v4.4s, v1.s[0]\n"
+                   "fmla v17.4s, v5.4s, v1.s[0]\n"
+                   "ld1 {v2.4s}, [%[lhs_ptr]], #16\n"
+                   "fmla v18.4s, v4.4s, v1.s[1]\n"
+                   "fmla v19.4s, v5.4s, v1.s[1]\n"
+                   "fmla v20.4s, v4.4s, v1.s[2]\n"
+                   "fmla v21.4s, v5.4s, v1.s[2]\n"
+                   "fmla v22.4s, v4.4s, v1.s[3]\n"
+                   "fmla v23.4s, v5.4s, v1.s[3]\n"
+
+                   "ld1 {v6.4s, v7.4s}, [%[rhs_ptr]], #32\n"
+
+                   "fmla v24.4s, v4.4s, v2.s[0]\n"
+                   "fmla v25.4s, v5.4s, v2.s[0]\n"
+                   "ld1 {v0.4s}, [%[lhs_ptr]], #16\n"
+                   "fmla v26.4s, v4.4s, v2.s[1]\n"
+                   "fmla v27.4s, v5.4s, v2.s[1]\n"
+                   "fmla v28.4s, v4.4s, v2.s[2]\n"
+                   "fmla v29.4s, v5.4s, v2.s[2]\n"
+                   "fmla v30.4s, v4.4s, v2.s[3]\n"
+                   "fmla v31.4s, v5.4s, v2.s[3]\n"
+
+                   "fmla v8.4s,  v6.4s, v0.s[0]\n"
+                   "fmla v9.4s,  v7.4s, v0.s[0]\n"
+                   "ld1 {v1.4s}, [%[lhs_ptr]], #16\n"
+                   "st1 {v8.4s, v9.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v10.4s, v6.4s, v0.s[1]\n"
+                   "fmla v11.4s, v7.4s, v0.s[1]\n"
+                   "st1 {v10.4s, v11.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v12.4s, v6.4s, v0.s[2]\n"
+                   "fmla v13.4s, v7.4s, v0.s[2]\n"
+                   "st1 {v12.4s, v13.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v14.4s, v6.4s, v0.s[3]\n"
+                   "fmla v15.4s, v7.4s, v0.s[3]\n"
+                   "st1 {v14.4s, v15.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+
+                   "fmla v16.4s, v6.4s, v1.s[0]\n"
+                   "fmla v17.4s, v7.4s, v1.s[0]\n"
+                   "ld1 {v2.4s}, [%[lhs_ptr]], #16\n"
+                   "st1 {v16.4s, v17.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v18.4s, v6.4s, v1.s[1]\n"
+                   "fmla v19.4s, v7.4s, v1.s[1]\n"
+                   "st1 {v18.4s, v19.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v20.4s, v6.4s, v1.s[2]\n"
+                   "fmla v21.4s, v7.4s, v1.s[2]\n"
+                   "st1 {v20.4s, v21.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v22.4s, v6.4s, v1.s[3]\n"
+                   "fmla v23.4s, v7.4s, v1.s[3]\n"
+                   "st1 {v22.4s, v23.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+
+                   "fmla v24.4s, v6.4s, v2.s[0]\n"
+                   "fmla v25.4s, v7.4s, v2.s[0]\n"
+                   "st1 {v24.4s, v25.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v26.4s, v6.4s, v2.s[1]\n"
+                   "fmla v27.4s, v7.4s, v2.s[1]\n"
+                   "st1 {v26.4s, v27.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v28.4s, v6.4s, v2.s[2]\n"
+                   "fmla v29.4s, v7.4s, v2.s[2]\n"
+                   "st1 {v28.4s, v29.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v30.4s, v6.4s, v2.s[3]\n"
+                   "fmla v31.4s, v7.4s, v2.s[3]\n"
+                   "b 3f\n"
+
+                   "2:\n"
+                   "fmla v8.4s,  v4.4s, v0.s[0]\n"
+                   "fmla v9.4s,  v5.4s, v0.s[0]\n"
+                   "ld1 {v1.4s}, [%[lhs_ptr]], #16\n"
+                   "st1 {v8.4s, v9.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v10.4s, v4.4s, v0.s[1]\n"
+                   "fmla v11.4s, v5.4s, v0.s[1]\n"
+                   "st1 {v10.4s, v11.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v12.4s, v4.4s, v0.s[2]\n"
+                   "fmla v13.4s, v5.4s, v0.s[2]\n"
+                   "st1 {v12.4s, v13.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v14.4s, v4.4s, v0.s[3]\n"
+                   "fmla v15.4s, v5.4s, v0.s[3]\n"
+                   "st1 {v14.4s, v15.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+
+                   "fmla v16.4s, v4.4s, v1.s[0]\n"
+                   "fmla v17.4s, v5.4s, v1.s[0]\n"
+                   "ld1 {v2.4s}, [%[lhs_ptr]], #16\n"
+                   "st1 {v16.4s, v17.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v18.4s, v4.4s, v1.s[1]\n"
+                   "fmla v19.4s, v5.4s, v1.s[1]\n"
+                   "st1 {v18.4s, v19.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v20.4s, v4.4s, v1.s[2]\n"
+                   "fmla v21.4s, v5.4s, v1.s[2]\n"
+                   "st1 {v20.4s, v21.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v22.4s, v4.4s, v1.s[3]\n"
+                   "fmla v23.4s, v5.4s, v1.s[3]\n"
+                   "st1 {v22.4s, v23.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+
+                   "fmla v24.4s, v4.4s, v2.s[0]\n"
+                   "fmla v25.4s, v5.4s, v2.s[0]\n"
+                   "st1 {v24.4s, v25.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v26.4s, v4.4s, v2.s[1]\n"
+                   "fmla v27.4s, v5.4s, v2.s[1]\n"
+                   "st1 {v26.4s, v27.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v28.4s, v4.4s, v2.s[2]\n"
+                   "fmla v29.4s, v5.4s, v2.s[2]\n"
+                   "st1 {v28.4s, v29.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v30.4s, v4.4s, v2.s[3]\n"
+                   "fmla v31.4s, v5.4s, v2.s[3]\n"
+
+                   "3:\n"
+                   "st1 {v30.4s, v31.4s}, [x0]\n"
+                   : [lhs_ptr] "+r"(lhs_ptr), [rhs_ptr] "+r"(rhs_ptr), [res_ptr] "+r"(res_ptr),
+                     [nk] "+r"(nk)
+                   : [oddk] "r"(oddk), [k0] "r"(k0), [nstride] "r"(nstride)
+                   : "x0", "v0", "v1", "v2", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11",
+                     "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22",
+                     "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31");
+}
+
+#ifdef BATCH_DILATION_FIX
+static void sgemm_rowmajor_micro_kernel_4x24(const float *lhs_ptr, const float *rhs_ptr,
+                                             float *res_ptr, const int k, const int k0,
+                                             const int stride)
+{
+  int oddk = (k & 1);
+  int nk = ((k + 1) / 2) - 1;
+
+  const int nstride = stride << 2;
+
+  __asm __volatile("ld1 {v0.4s}, [%[lhs_ptr]], #16\n"
+
+                   "cmp %[k0], #0\n"
+                   "beq  0f\n"
+
+                   "mov x0, %[res_ptr]\n"
+                   "mov x1, x0\n"
+                   "ld1 {v8.4s, v9.4s, v10.4s}, [x1], #48\n"
+                   "ld1 {v11.4s, v12.4s, v13.4s}, [x1]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "ld1 {v14.4s, v15.4s, v16.4s}, [x1], #48\n"
+                   "ld1 {v17.4s, v18.4s, v19.4s}, [x1]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "ld1 {v20.4s, v21.4s, v22.4s}, [x1], #48\n"
+                   "ld1 {v23.4s, v24.4s, v25.4s}, [x1]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "ld1 {v26.4s, v27.4s, v28.4s}, [x1], #48\n"
+                   "ld1 {v29.4s, v30.4s, v31.4s}, [x1]\n"
+                   "cbz %w[nk], 4f\n"
+                   "b 1f\n"
+
+                   "0:\n"
+                   "movi v8.4s, #0x0\n"
+                   "movi v9.4s, #0x0\n"
+                   "movi v10.4s, #0x0\n"
+                   "movi v11.4s, #0x0\n"
+                   "movi v12.4s, #0x0\n"
+                   "movi v13.4s, #0x0\n"
+                   "movi v14.4s, #0x0\n"
+                   "movi v15.4s, #0x0\n"
+                   "movi v16.4s, #0x0\n"
+                   "movi v17.4s, #0x0\n"
+                   "movi v18.4s, #0x0\n"
+                   "movi v19.4s, #0x0\n"
+                   "movi v20.4s, #0x0\n"
+                   "movi v21.4s, #0x0\n"
+                   "movi v22.4s, #0x0\n"
+                   "movi v23.4s, #0x0\n"
+                   "movi v24.4s, #0x0\n"
+                   "movi v25.4s, #0x0\n"
+                   "movi v26.4s, #0x0\n"
+                   "movi v27.4s, #0x0\n"
+                   "movi v28.4s, #0x0\n"
+                   "movi v29.4s, #0x0\n"
+                   "movi v30.4s, #0x0\n"
+                   "movi v31.4s, #0x0\n"
+                   "cbz %w[nk], 4f\n"
+
+                   "1:\n"
+                   "mov x0, v0.d[0]\n"
+                   "cmp x0, #0\n"
+                   "bne 5f\n"
+                   "mov x0, v0.d[1]\n"
+                   "cmp x0, #0\n"
+                   "bne 5f\n"
+                   "add %[rhs_ptr], %[rhs_ptr], #96\n"
+                   "ld1 {v1.4s}, [%[lhs_ptr]], #16\n"
+                   "b 6f\n"
+                   "5:\n"
+                   "ld1 {v2.4s, v3.4s, v4.4s}, [%[rhs_ptr]], #48\n"
+                   "fmla v8.4s,  v2.4s, v0.s[0]\n"
+                   "fmla v14.4s, v2.4s, v0.s[1]\n"
+                   "fmla v20.4s, v2.4s, v0.s[2]\n"
+                   "fmla v26.4s, v2.4s, v0.s[3]\n"
+                   "ld1 {v5.4s, v6.4s, v7.4s}, [%[rhs_ptr]], #48\n"
+                   "fmla v9.4s,  v3.4s, v0.s[0]\n"
+                   "fmla v15.4s, v3.4s, v0.s[1]\n"
+                   "fmla v21.4s, v3.4s, v0.s[2]\n"
+                   "fmla v27.4s, v3.4s, v0.s[3]\n"
+                   "fmla v10.4s, v4.4s, v0.s[0]\n"
+                   "fmla v16.4s, v4.4s, v0.s[1]\n"
+                   "fmla v22.4s, v4.4s, v0.s[2]\n"
+                   "fmla v28.4s, v4.4s, v0.s[3]\n"
+
+                   "ld1 {v1.4s}, [%[lhs_ptr]], #16\n"
+
+                   "fmla v11.4s, v5.4s, v0.s[0]\n"
+                   "fmla v17.4s, v5.4s, v0.s[1]\n"
+                   "fmla v23.4s, v5.4s, v0.s[2]\n"
+                   "fmla v29.4s, v5.4s, v0.s[3]\n"
+                   "fmla v12.4s, v6.4s, v0.s[0]\n"
+                   "fmla v18.4s, v6.4s, v0.s[1]\n"
+                   "fmla v24.4s, v6.4s, v0.s[2]\n"
+                   "fmla v30.4s, v6.4s, v0.s[3]\n"
+                   "fmla v13.4s, v7.4s, v0.s[0]\n"
+                   "fmla v19.4s, v7.4s, v0.s[1]\n"
+                   "fmla v25.4s, v7.4s, v0.s[2]\n"
+                   "fmla v31.4s, v7.4s, v0.s[3]\n"
+
+                   "6:\n"
+                   "mov x0, v1.d[0]\n"
+                   "cmp x0, #0\n"
+                   "bne 7f\n"
+                   "mov x0, v1.d[1]\n"
+                   "cmp x0, #0\n"
+                   "bne 7f\n"
+                   "add %[rhs_ptr], %[rhs_ptr], #96\n"
+                   "ld1 {v0.4s}, [%[lhs_ptr]], #16\n"
+                   "b 8f\n"
+                   "7:\n"
+                   "ld1 {v2.4s, v3.4s, v4.4s}, [%[rhs_ptr]], #48\n"
+                   "fmla v8.4s,  v2.4s, v1.s[0]\n"
+                   "fmla v14.4s, v2.4s, v1.s[1]\n"
+                   "fmla v20.4s, v2.4s, v1.s[2]\n"
+                   "fmla v26.4s, v2.4s, v1.s[3]\n"
+                   "ld1 {v5.4s, v6.4s, v7.4s}, [%[rhs_ptr]], #48\n"
+                   "fmla v9.4s,  v3.4s, v1.s[0]\n"
+                   "fmla v15.4s, v3.4s, v1.s[1]\n"
+                   "fmla v21.4s, v3.4s, v1.s[2]\n"
+                   "fmla v27.4s, v3.4s, v1.s[3]\n"
+                   "fmla v10.4s, v4.4s, v1.s[0]\n"
+                   "fmla v16.4s, v4.4s, v1.s[1]\n"
+                   "fmla v22.4s, v4.4s, v1.s[2]\n"
+                   "fmla v28.4s, v4.4s, v1.s[3]\n"
+
+                   "ld1 {v0.4s}, [%[lhs_ptr]], #16\n"
+
+                   "fmla v11.4s, v5.4s, v1.s[0]\n"
+                   "fmla v17.4s, v5.4s, v1.s[1]\n"
+                   "fmla v23.4s, v5.4s, v1.s[2]\n"
+                   "fmla v29.4s, v5.4s, v1.s[3]\n"
+                   "fmla v12.4s, v6.4s, v1.s[0]\n"
+                   "fmla v18.4s, v6.4s, v1.s[1]\n"
+                   "fmla v24.4s, v6.4s, v1.s[2]\n"
+                   "fmla v30.4s, v6.4s, v1.s[3]\n"
+                   "fmla v13.4s, v7.4s, v1.s[0]\n"
+                   "fmla v19.4s, v7.4s, v1.s[1]\n"
+                   "fmla v25.4s, v7.4s, v1.s[2]\n"
+                   "fmla v31.4s, v7.4s, v1.s[3]\n"
+
+                   "8:\n"
+                   "subs %w[nk], %w[nk], #1\n"
+                   "bne 1b\n"
+
+                   "4:\n"
+                   "mov x0, %[res_ptr]\n"
+                   "cbnz %[oddk], 2f\n"
+                   "ld1 {v1.4s}, [%[lhs_ptr]], #16\n"
+                   "ld1 {v2.4s, v3.4s, v4.4s}, [%[rhs_ptr]], #48\n"
+                   "ld1 {v5.4s, v6.4s, v7.4s}, [%[rhs_ptr]], #48\n"
+
+                   "fmla v8.4s,  v2.4s, v0.s[0]\n"
+                   "fmla v9.4s,  v3.4s, v0.s[0]\n"
+                   "fmla v10.4s, v4.4s, v0.s[0]\n"
+                   "fmla v14.4s, v2.4s, v0.s[1]\n"
+                   "fmla v15.4s, v3.4s, v0.s[1]\n"
+                   "fmla v16.4s, v4.4s, v0.s[1]\n"
+                   "fmla v20.4s, v2.4s, v0.s[2]\n"
+                   "fmla v21.4s, v3.4s, v0.s[2]\n"
+                   "fmla v22.4s, v4.4s, v0.s[2]\n"
+                   "fmla v26.4s, v2.4s, v0.s[3]\n"
+                   "fmla v27.4s, v3.4s, v0.s[3]\n"
+                   "fmla v28.4s, v4.4s, v0.s[3]\n"
+
+                   "ld1 {v2.4s, v3.4s, v4.4s}, [%[rhs_ptr]], #48\n"
+
+                   "fmla v11.4s, v5.4s, v0.s[0]\n"
+                   "fmla v12.4s, v6.4s, v0.s[0]\n"
+                   "fmla v13.4s, v7.4s, v0.s[0]\n"
+                   "fmla v17.4s, v5.4s, v0.s[1]\n"
+                   "fmla v18.4s, v6.4s, v0.s[1]\n"
+                   "fmla v19.4s, v7.4s, v0.s[1]\n"
+                   "fmla v23.4s, v5.4s, v0.s[2]\n"
+                   "fmla v24.4s, v6.4s, v0.s[2]\n"
+                   "fmla v25.4s, v7.4s, v0.s[2]\n"
+                   "fmla v29.4s, v5.4s, v0.s[3]\n"
+                   "fmla v30.4s, v6.4s, v0.s[3]\n"
+                   "fmla v31.4s, v7.4s, v0.s[3]\n"
+
+                   "ld1 {v5.4s, v6.4s, v7.4s}, [%[rhs_ptr]], #48\n"
+
+                   "fmla v8.4s,  v2.4s, v1.s[0]\n"
+                   "fmla v9.4s,  v3.4s, v1.s[0]\n"
+                   "fmla v10.4s, v4.4s, v1.s[0]\n"
+                   "mov x1, x0\n"
+                   "st1 {v8.4s, v9.4s, v10.4s}, [x1], #48\n"
+                   "fmla v11.4s, v5.4s, v1.s[0]\n"
+                   "fmla v12.4s, v6.4s, v1.s[0]\n"
+                   "fmla v13.4s, v7.4s, v1.s[0]\n"
+                   "st1 {v11.4s, v12.4s, v13.4s}, [x1]\n"
+                   "fmla v14.4s, v2.4s, v1.s[1]\n"
+                   "fmla v15.4s, v3.4s, v1.s[1]\n"
+                   "fmla v16.4s, v4.4s, v1.s[1]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "st1 {v14.4s, v15.4s, v16.4s}, [x1], #48\n"
+                   "fmla v17.4s, v5.4s, v1.s[1]\n"
+                   "fmla v18.4s, v6.4s, v1.s[1]\n"
+                   "fmla v19.4s, v7.4s, v1.s[1]\n"
+                   "st1 {v17.4s, v18.4s, v19.4s}, [x1]\n"
+                   "fmla v20.4s, v2.4s, v1.s[2]\n"
+                   "fmla v21.4s, v3.4s, v1.s[2]\n"
+                   "fmla v22.4s, v4.4s, v1.s[2]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "st1 {v20.4s, v21.4s, v22.4s}, [x1], #48\n"
+                   "fmla v23.4s, v5.4s, v1.s[2]\n"
+                   "fmla v24.4s, v6.4s, v1.s[2]\n"
+                   "fmla v25.4s, v7.4s, v1.s[2]\n"
+                   "st1 {v23.4s, v24.4s, v25.4s}, [x1]\n"
+                   "fmla v26.4s, v2.4s, v1.s[3]\n"
+                   "fmla v27.4s, v3.4s, v1.s[3]\n"
+                   "fmla v28.4s, v4.4s, v1.s[3]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "st1 {v26.4s, v27.4s, v28.4s}, [x1], #48\n"
+                   "fmla v29.4s, v5.4s, v1.s[3]\n"
+                   "fmla v30.4s, v6.4s, v1.s[3]\n"
+                   "fmla v31.4s, v7.4s, v1.s[3]\n"
+                   "b 3f\n"
+
+                   "2:\n"
+                   "ld1 {v2.4s, v3.4s, v4.4s}, [%[rhs_ptr]], #48\n"
+                   "ld1 {v5.4s, v6.4s, v7.4s}, [%[rhs_ptr]], #48\n"
+
+                   "fmla v8.4s,  v2.4s, v0.s[0]\n"
+                   "fmla v9.4s,  v3.4s, v0.s[0]\n"
+                   "fmla v10.4s, v4.4s, v0.s[0]\n"
+                   "mov x1, x0\n"
+                   "st1 {v8.4s, v9.4s, v10.4s}, [x1], #48\n"
+                   "fmla v11.4s, v5.4s, v0.s[0]\n"
+                   "fmla v12.4s, v6.4s, v0.s[0]\n"
+                   "fmla v13.4s, v7.4s, v0.s[0]\n"
+                   "st1 {v11.4s, v12.4s, v13.4s}, [x1]\n"
+                   "fmla v14.4s, v2.4s, v0.s[1]\n"
+                   "fmla v15.4s, v3.4s, v0.s[1]\n"
+                   "fmla v16.4s, v4.4s, v0.s[1]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "st1 {v14.4s, v15.4s, v16.4s}, [x1], #48\n"
+                   "fmla v17.4s, v5.4s, v0.s[1]\n"
+                   "fmla v18.4s, v6.4s, v0.s[1]\n"
+                   "fmla v19.4s, v7.4s, v0.s[1]\n"
+                   "st1 {v17.4s, v18.4s, v19.4s}, [x1]\n"
+                   "fmla v20.4s, v2.4s, v0.s[2]\n"
+                   "fmla v21.4s, v3.4s, v0.s[2]\n"
+                   "fmla v22.4s, v4.4s, v0.s[2]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "st1 {v20.4s, v21.4s, v22.4s}, [x1], #48\n"
+                   "fmla v23.4s, v5.4s, v0.s[2]\n"
+                   "fmla v24.4s, v6.4s, v0.s[2]\n"
+                   "fmla v25.4s, v7.4s, v0.s[2]\n"
+                   "st1 {v23.4s, v24.4s, v25.4s}, [x1]\n"
+                   "fmla v26.4s, v2.4s, v0.s[3]\n"
+                   "fmla v27.4s, v3.4s, v0.s[3]\n"
+                   "fmla v28.4s, v4.4s, v0.s[3]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "st1 {v26.4s, v27.4s, v28.4s}, [x1], #48\n"
+                   "fmla v29.4s, v5.4s, v0.s[3]\n"
+                   "fmla v30.4s, v6.4s, v0.s[3]\n"
+                   "fmla v31.4s, v7.4s, v0.s[3]\n"
+                   "3:\n"
+                   "st1 {v29.4s, v30.4s, v31.4s}, [x1]\n"
+                   : [lhs_ptr] "+r"(lhs_ptr), [rhs_ptr] "+r"(rhs_ptr), [res_ptr] "+r"(res_ptr),
+                     [nk] "+r"(nk)
+                   : [oddk] "r"(oddk), [k0] "r"(k0), [nstride] "r"(nstride)
+                   : "x0", "x1", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10",
+                     "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21",
+                     "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31");
+}
+#else  // BATCH_DILATION_FIX
+static void sgemm_rowmajor_micro_kernel_4x24(const float *lhs_ptr, const float *rhs_ptr,
+                                             float *res_ptr, const int k, const int k0,
+                                             const int stride)
+{
+  int oddk = (k & 1);
+  int nk = ((k + 1) / 2) - 1;
+
+  const int nstride = stride << 2;
+
+  __asm __volatile("ld1 {v0.4s}, [%[lhs_ptr]], #16\n"
+                   "ld1 {v2.4s}, [%[rhs_ptr]], #16\n"
+                   "ld1 {v3.4s}, [%[rhs_ptr]], #16\n"
+                   "ld1 {v4.4s}, [%[rhs_ptr]], #16\n"
+
+                   "cmp %[k0], #0\n"
+                   "beq  0f\n"
+
+                   "mov x0, %[res_ptr]\n"
+                   "mov x1, x0\n"
+                   "ld1 {v8.4s, v9.4s, v10.4s}, [x1], #48\n"
+                   "ld1 {v11.4s, v12.4s, v13.4s}, [x1]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "ld1 {v14.4s, v15.4s, v16.4s}, [x1], #48\n"
+                   "ld1 {v17.4s, v18.4s, v19.4s}, [x1]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "ld1 {v20.4s, v21.4s, v22.4s}, [x1], #48\n"
+                   "ld1 {v23.4s, v24.4s, v25.4s}, [x1]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "ld1 {v26.4s, v27.4s, v28.4s}, [x1], #48\n"
+                   "ld1 {v29.4s, v30.4s, v31.4s}, [x1]\n"
+                   "cbz %w[nk], 4f\n"
+                   "b 1f\n"
+
+                   "0:\n"
+                   "movi v8.4s, #0x0\n"
+                   "movi v9.4s, #0x0\n"
+                   "movi v10.4s, #0x0\n"
+                   "movi v11.4s, #0x0\n"
+                   "movi v12.4s, #0x0\n"
+                   "movi v13.4s, #0x0\n"
+                   "movi v14.4s, #0x0\n"
+                   "movi v15.4s, #0x0\n"
+                   "movi v16.4s, #0x0\n"
+                   "movi v17.4s, #0x0\n"
+                   "movi v18.4s, #0x0\n"
+                   "movi v19.4s, #0x0\n"
+                   "movi v20.4s, #0x0\n"
+                   "movi v21.4s, #0x0\n"
+                   "movi v22.4s, #0x0\n"
+                   "movi v23.4s, #0x0\n"
+                   "movi v24.4s, #0x0\n"
+                   "movi v25.4s, #0x0\n"
+                   "movi v26.4s, #0x0\n"
+                   "movi v27.4s, #0x0\n"
+                   "movi v28.4s, #0x0\n"
+                   "movi v29.4s, #0x0\n"
+                   "movi v30.4s, #0x0\n"
+                   "movi v31.4s, #0x0\n"
+                   "cbz %w[nk], 4f\n"
+
+                   "1:\n"
+                   "fmla v8.4s,  v2.4s, v0.s[0]\n"
+                   "fmla v14.4s, v2.4s, v0.s[1]\n"
+                   "fmla v20.4s, v2.4s, v0.s[2]\n"
+                   "fmla v26.4s, v2.4s, v0.s[3]\n"
+                   "fmla v9.4s,  v3.4s, v0.s[0]\n"
+                   "fmla v15.4s, v3.4s, v0.s[1]\n"
+                   "ld1 {v5.4s, v6.4s, v7.4s}, [%[rhs_ptr]], #48\n"
+                   "fmla v21.4s, v3.4s, v0.s[2]\n"
+                   "fmla v27.4s, v3.4s, v0.s[3]\n"
+                   "fmla v10.4s, v4.4s, v0.s[0]\n"
+                   "fmla v16.4s, v4.4s, v0.s[1]\n"
+                   "fmla v22.4s, v4.4s, v0.s[2]\n"
+                   "fmla v28.4s, v4.4s, v0.s[3]\n"
+
+                   "ld1 {v1.4s}, [%[lhs_ptr]], #16\n"
+
+                   "fmla v11.4s, v5.4s, v0.s[0]\n"
+                   "fmla v17.4s, v5.4s, v0.s[1]\n"
+                   "fmla v23.4s, v5.4s, v0.s[2]\n"
+                   "fmla v29.4s, v5.4s, v0.s[3]\n"
+                   "fmla v12.4s, v6.4s, v0.s[0]\n"
+                   "fmla v18.4s, v6.4s, v0.s[1]\n"
+                   "ld1 {v2.4s, v3.4s, v4.4s}, [%[rhs_ptr]], #48\n"
+                   "fmla v24.4s, v6.4s, v0.s[2]\n"
+                   "fmla v30.4s, v6.4s, v0.s[3]\n"
+                   "fmla v13.4s, v7.4s, v0.s[0]\n"
+                   "fmla v19.4s, v7.4s, v0.s[1]\n"
+                   "fmla v25.4s, v7.4s, v0.s[2]\n"
+                   "fmla v31.4s, v7.4s, v0.s[3]\n"
+
+                   "fmla v8.4s,  v2.4s, v1.s[0]\n"
+                   "fmla v14.4s, v2.4s, v1.s[1]\n"
+                   "fmla v20.4s, v2.4s, v1.s[2]\n"
+                   "fmla v26.4s, v2.4s, v1.s[3]\n"
+                   "fmla v9.4s,  v3.4s, v1.s[0]\n"
+                   "fmla v15.4s, v3.4s, v1.s[1]\n"
+                   "ld1 {v5.4s, v6.4s, v7.4s}, [%[rhs_ptr]], #48\n"
+                   "fmla v21.4s, v3.4s, v1.s[2]\n"
+                   "fmla v27.4s, v3.4s, v1.s[3]\n"
+                   "fmla v10.4s, v4.4s, v1.s[0]\n"
+                   "fmla v16.4s, v4.4s, v1.s[1]\n"
+                   "fmla v22.4s, v4.4s, v1.s[2]\n"
+                   "fmla v28.4s, v4.4s, v1.s[3]\n"
+
+                   "ld1 {v0.4s}, [%[lhs_ptr]], #16\n"
+
+                   "fmla v11.4s, v5.4s, v1.s[0]\n"
+                   "fmla v17.4s, v5.4s, v1.s[1]\n"
+                   "fmla v23.4s, v5.4s, v1.s[2]\n"
+                   "fmla v29.4s, v5.4s, v1.s[3]\n"
+                   "fmla v12.4s, v6.4s, v1.s[0]\n"
+                   "fmla v18.4s, v6.4s, v1.s[1]\n"
+                   "ld1 {v2.4s, v3.4s, v4.4s}, [%[rhs_ptr]], #48\n"
+                   "fmla v24.4s, v6.4s, v1.s[2]\n"
+                   "fmla v30.4s, v6.4s, v1.s[3]\n"
+                   "fmla v13.4s, v7.4s, v1.s[0]\n"
+                   "fmla v19.4s, v7.4s, v1.s[1]\n"
+                   "subs %w[nk], %w[nk], #1\n"
+                   "fmla v25.4s, v7.4s, v1.s[2]\n"
+                   "fmla v31.4s, v7.4s, v1.s[3]\n"
+                   "bne 1b\n"
+
+                   "4:\n"
+                   "mov x0, %[res_ptr]\n"
+                   "cbnz %[oddk], 2f\n"
+                   "ld1 {v1.4s}, [%[lhs_ptr]], #16\n"
+                   "ld1 {v5.4s, v6.4s, v7.4s}, [%[rhs_ptr]], #48\n"
+
+                   "fmla v8.4s,  v2.4s, v0.s[0]\n"
+                   "fmla v9.4s,  v3.4s, v0.s[0]\n"
+                   "fmla v10.4s, v4.4s, v0.s[0]\n"
+                   "fmla v14.4s, v2.4s, v0.s[1]\n"
+                   "fmla v15.4s, v3.4s, v0.s[1]\n"
+                   "fmla v16.4s, v4.4s, v0.s[1]\n"
+                   "fmla v20.4s, v2.4s, v0.s[2]\n"
+                   "fmla v21.4s, v3.4s, v0.s[2]\n"
+                   "fmla v22.4s, v4.4s, v0.s[2]\n"
+                   "fmla v26.4s, v2.4s, v0.s[3]\n"
+                   "fmla v27.4s, v3.4s, v0.s[3]\n"
+                   "fmla v28.4s, v4.4s, v0.s[3]\n"
+
+                   "ld1 {v2.4s, v3.4s, v4.4s}, [%[rhs_ptr]], #48\n"
+
+                   "fmla v11.4s, v5.4s, v0.s[0]\n"
+                   "fmla v12.4s, v6.4s, v0.s[0]\n"
+                   "fmla v13.4s, v7.4s, v0.s[0]\n"
+                   "fmla v17.4s, v5.4s, v0.s[1]\n"
+                   "fmla v18.4s, v6.4s, v0.s[1]\n"
+                   "fmla v19.4s, v7.4s, v0.s[1]\n"
+                   "fmla v23.4s, v5.4s, v0.s[2]\n"
+                   "fmla v24.4s, v6.4s, v0.s[2]\n"
+                   "fmla v25.4s, v7.4s, v0.s[2]\n"
+                   "fmla v29.4s, v5.4s, v0.s[3]\n"
+                   "fmla v30.4s, v6.4s, v0.s[3]\n"
+                   "fmla v31.4s, v7.4s, v0.s[3]\n"
+
+                   "ld1 {v5.4s, v6.4s, v7.4s}, [%[rhs_ptr]], #48\n"
+
+                   "fmla v8.4s,  v2.4s, v1.s[0]\n"
+                   "fmla v9.4s,  v3.4s, v1.s[0]\n"
+                   "fmla v10.4s, v4.4s, v1.s[0]\n"
+                   "mov x1, x0\n"
+                   "st1 {v8.4s, v9.4s, v10.4s}, [x1], #48\n"
+                   "fmla v11.4s, v5.4s, v1.s[0]\n"
+                   "fmla v12.4s, v6.4s, v1.s[0]\n"
+                   "fmla v13.4s, v7.4s, v1.s[0]\n"
+                   "st1 {v11.4s, v12.4s, v13.4s}, [x1]\n"
+                   "fmla v14.4s, v2.4s, v1.s[1]\n"
+                   "fmla v15.4s, v3.4s, v1.s[1]\n"
+                   "fmla v16.4s, v4.4s, v1.s[1]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "st1 {v14.4s, v15.4s, v16.4s}, [x1], #48\n"
+                   "fmla v17.4s, v5.4s, v1.s[1]\n"
+                   "fmla v18.4s, v6.4s, v1.s[1]\n"
+                   "fmla v19.4s, v7.4s, v1.s[1]\n"
+                   "st1 {v17.4s, v18.4s, v19.4s}, [x1]\n"
+                   "fmla v20.4s, v2.4s, v1.s[2]\n"
+                   "fmla v21.4s, v3.4s, v1.s[2]\n"
+                   "fmla v22.4s, v4.4s, v1.s[2]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "st1 {v20.4s, v21.4s, v22.4s}, [x1], #48\n"
+                   "fmla v23.4s, v5.4s, v1.s[2]\n"
+                   "fmla v24.4s, v6.4s, v1.s[2]\n"
+                   "fmla v25.4s, v7.4s, v1.s[2]\n"
+                   "st1 {v23.4s, v24.4s, v25.4s}, [x1]\n"
+                   "fmla v26.4s, v2.4s, v1.s[3]\n"
+                   "fmla v27.4s, v3.4s, v1.s[3]\n"
+                   "fmla v28.4s, v4.4s, v1.s[3]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "st1 {v26.4s, v27.4s, v28.4s}, [x1], #48\n"
+                   "fmla v29.4s, v5.4s, v1.s[3]\n"
+                   "fmla v30.4s, v6.4s, v1.s[3]\n"
+                   "fmla v31.4s, v7.4s, v1.s[3]\n"
+                   "b 3f\n"
+
+                   "2:\n"
+                   "ld1 {v5.4s, v6.4s, v7.4s}, [%[rhs_ptr]], #48\n"
+
+                   "fmla v8.4s,  v2.4s, v0.s[0]\n"
+                   "fmla v9.4s,  v3.4s, v0.s[0]\n"
+                   "fmla v10.4s, v4.4s, v0.s[0]\n"
+                   "mov x1, x0\n"
+                   "st1 {v8.4s, v9.4s, v10.4s}, [x1], #48\n"
+                   "fmla v11.4s, v5.4s, v0.s[0]\n"
+                   "fmla v12.4s, v6.4s, v0.s[0]\n"
+                   "fmla v13.4s, v7.4s, v0.s[0]\n"
+                   "st1 {v11.4s, v12.4s, v13.4s}, [x1]\n"
+                   "fmla v14.4s, v2.4s, v0.s[1]\n"
+                   "fmla v15.4s, v3.4s, v0.s[1]\n"
+                   "fmla v16.4s, v4.4s, v0.s[1]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "st1 {v14.4s, v15.4s, v16.4s}, [x1], #48\n"
+                   "fmla v17.4s, v5.4s, v0.s[1]\n"
+                   "fmla v18.4s, v6.4s, v0.s[1]\n"
+                   "fmla v19.4s, v7.4s, v0.s[1]\n"
+                   "st1 {v17.4s, v18.4s, v19.4s}, [x1]\n"
+                   "fmla v20.4s, v2.4s, v0.s[2]\n"
+                   "fmla v21.4s, v3.4s, v0.s[2]\n"
+                   "fmla v22.4s, v4.4s, v0.s[2]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "st1 {v20.4s, v21.4s, v22.4s}, [x1], #48\n"
+                   "fmla v23.4s, v5.4s, v0.s[2]\n"
+                   "fmla v24.4s, v6.4s, v0.s[2]\n"
+                   "fmla v25.4s, v7.4s, v0.s[2]\n"
+                   "st1 {v23.4s, v24.4s, v25.4s}, [x1]\n"
+                   "fmla v26.4s, v2.4s, v0.s[3]\n"
+                   "fmla v27.4s, v3.4s, v0.s[3]\n"
+                   "fmla v28.4s, v4.4s, v0.s[3]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "mov x1, x0\n"
+                   "st1 {v26.4s, v27.4s, v28.4s}, [x1], #48\n"
+                   "fmla v29.4s, v5.4s, v0.s[3]\n"
+                   "fmla v30.4s, v6.4s, v0.s[3]\n"
+                   "fmla v31.4s, v7.4s, v0.s[3]\n"
+                   "3:\n"
+                   "st1 {v29.4s, v30.4s, v31.4s}, [x1]\n"
+                   : [lhs_ptr] "+r"(lhs_ptr), [rhs_ptr] "+r"(rhs_ptr), [res_ptr] "+r"(res_ptr),
+                     [nk] "+r"(nk)
+                   : [oddk] "r"(oddk), [k0] "r"(k0), [nstride] "r"(nstride)
+                   : "x0", "x1", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10",
+                     "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21",
+                     "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31");
+}
+#endif // BATCH_DILATION_FIX
+
+static void sgemm_rowmajor_micro_kernel_24x4(const float *lhs_ptr, const float *rhs_ptr,
+                                             float *res_ptr, const int k, const int k0,
+                                             const int stride)
+{
+  int oddk = (k & 1);
+  int nk = ((k + 1) / 2) - 1;
+
+  const int nstride = stride << 2;
+
+  __asm __volatile("ld1 {v0.4s, v1.4s, v2.4s}, [%[lhs_ptr]], #48\n"
+                   "ld1 {v6.4s}, [%[rhs_ptr]], #16\n"
+
+                   "cmp %[k0], #0\n"
+                   "beq  0f\n"
+
+                   "mov x0, %[res_ptr]\n"
+                   "ld1 {v8.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v9.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v10.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v11.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v12.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v13.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v14.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v15.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v16.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v17.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v18.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v19.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v20.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v21.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v22.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v23.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v24.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v25.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v26.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v27.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v28.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v29.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v30.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "ld1 {v31.4s}, [x0]\n"
+                   "cbz %w[nk], 4f\n"
+                   "b 1f\n"
+
+                   "0:\n"
+                   "movi v8.4s, #0x0\n"
+                   "movi v9.4s, #0x0\n"
+                   "movi v10.4s, #0x0\n"
+                   "movi v11.4s, #0x0\n"
+                   "movi v12.4s, #0x0\n"
+                   "movi v13.4s, #0x0\n"
+                   "movi v14.4s, #0x0\n"
+                   "movi v15.4s, #0x0\n"
+                   "movi v16.4s, #0x0\n"
+                   "movi v17.4s, #0x0\n"
+                   "movi v18.4s, #0x0\n"
+                   "movi v19.4s, #0x0\n"
+                   "movi v20.4s, #0x0\n"
+                   "movi v21.4s, #0x0\n"
+                   "movi v22.4s, #0x0\n"
+                   "movi v23.4s, #0x0\n"
+                   "movi v24.4s, #0x0\n"
+                   "movi v25.4s, #0x0\n"
+                   "movi v26.4s, #0x0\n"
+                   "movi v27.4s, #0x0\n"
+                   "movi v28.4s, #0x0\n"
+                   "movi v29.4s, #0x0\n"
+                   "movi v30.4s, #0x0\n"
+                   "movi v31.4s, #0x0\n"
+                   "cbz %w[nk], 4f\n"
+
+                   "1:\n"
+                   "ld1 {v3.4s, v4.4s, v5.4s}, [%[lhs_ptr]], #48\n"
+                   "fmla v8.4s,  v6.4s, v0.s[0]\n"
+                   "fmla v9.4s,  v6.4s, v0.s[1]\n"
+                   "fmla v10.4s,  v6.4s, v0.s[2]\n"
+                   "fmla v11.4s,  v6.4s, v0.s[3]\n"
+                   "fmla v12.4s,  v6.4s, v1.s[0]\n"
+                   "fmla v13.4s,  v6.4s, v1.s[1]\n"
+                   "ld1 {v7.4s}, [%[rhs_ptr]], #16\n"
+                   "fmla v14.4s,  v6.4s, v1.s[2]\n"
+                   "fmla v15.4s,  v6.4s, v1.s[3]\n"
+                   "fmla v16.4s,  v6.4s, v2.s[0]\n"
+                   "fmla v17.4s,  v6.4s, v2.s[1]\n"
+                   "fmla v18.4s,  v6.4s, v2.s[2]\n"
+                   "fmla v19.4s,  v6.4s, v2.s[3]\n"
+                   "ld1 {v0.4s, v1.4s, v2.4s}, [%[lhs_ptr]], #48\n"
+                   "fmla v20.4s,  v6.4s, v3.s[0]\n"
+                   "fmla v21.4s,  v6.4s, v3.s[1]\n"
+                   "fmla v22.4s,  v6.4s, v3.s[2]\n"
+                   "fmla v23.4s,  v6.4s, v3.s[3]\n"
+                   "fmla v24.4s,  v6.4s, v4.s[0]\n"
+                   "fmla v25.4s,  v6.4s, v4.s[1]\n"
+                   "fmla v26.4s,  v6.4s, v4.s[2]\n"
+                   "fmla v27.4s,  v6.4s, v4.s[3]\n"
+                   "fmla v28.4s,  v6.4s, v5.s[0]\n"
+                   "fmla v29.4s,  v6.4s, v5.s[1]\n"
+                   "fmla v30.4s,  v6.4s, v5.s[2]\n"
+                   "fmla v31.4s,  v6.4s, v5.s[3]\n"
+
+                   "ld1 {v3.4s, v4.4s, v5.4s}, [%[lhs_ptr]], #48\n"
+                   "fmla v8.4s,  v7.4s, v0.s[0]\n"
+                   "fmla v9.4s,  v7.4s, v0.s[1]\n"
+                   "fmla v10.4s,  v7.4s, v0.s[2]\n"
+                   "fmla v11.4s,  v7.4s, v0.s[3]\n"
+                   "fmla v12.4s,  v7.4s, v1.s[0]\n"
+                   "fmla v13.4s,  v7.4s, v1.s[1]\n"
+                   "ld1 {v6.4s}, [%[rhs_ptr]], #16\n"
+                   "fmla v14.4s,  v7.4s, v1.s[2]\n"
+                   "fmla v15.4s,  v7.4s, v1.s[3]\n"
+                   "fmla v16.4s,  v7.4s, v2.s[0]\n"
+                   "fmla v17.4s,  v7.4s, v2.s[1]\n"
+                   "fmla v18.4s,  v7.4s, v2.s[2]\n"
+                   "fmla v19.4s,  v7.4s, v2.s[3]\n"
+                   "ld1 {v0.4s, v1.4s, v2.4s}, [%[lhs_ptr]], #48\n"
+                   "fmla v20.4s,  v7.4s, v3.s[0]\n"
+                   "fmla v21.4s,  v7.4s, v3.s[1]\n"
+                   "fmla v22.4s,  v7.4s, v3.s[2]\n"
+                   "fmla v23.4s,  v7.4s, v3.s[3]\n"
+                   "fmla v24.4s,  v7.4s, v4.s[0]\n"
+                   "fmla v25.4s,  v7.4s, v4.s[1]\n"
+                   "fmla v26.4s,  v7.4s, v4.s[2]\n"
+                   "fmla v27.4s,  v7.4s, v4.s[3]\n"
+                   "fmla v28.4s,  v7.4s, v5.s[0]\n"
+                   "fmla v29.4s,  v7.4s, v5.s[1]\n"
+                   "subs %w[nk], %w[nk], #1\n"
+                   "fmla v30.4s,  v7.4s, v5.s[2]\n"
+                   "fmla v31.4s,  v7.4s, v5.s[3]\n"
+                   "bne 1b\n"
+
+                   "4:\n"
+                   "mov x0, %[res_ptr]\n"
+                   "cbnz %[oddk], 2f\n"
+
+                   "ld1 {v3.4s, v4.4s, v5.4s}, [%[lhs_ptr]], #48\n"
+                   "fmla v8.4s,  v6.4s, v0.s[0]\n"
+                   "fmla v9.4s,  v6.4s, v0.s[1]\n"
+                   "fmla v10.4s,  v6.4s, v0.s[2]\n"
+                   "fmla v11.4s,  v6.4s, v0.s[3]\n"
+                   "fmla v12.4s,  v6.4s, v1.s[0]\n"
+                   "fmla v13.4s,  v6.4s, v1.s[1]\n"
+                   "ld1 {v7.4s}, [%[rhs_ptr]], #16\n"
+                   "fmla v14.4s,  v6.4s, v1.s[2]\n"
+                   "fmla v15.4s,  v6.4s, v1.s[3]\n"
+                   "fmla v16.4s,  v6.4s, v2.s[0]\n"
+                   "fmla v17.4s,  v6.4s, v2.s[1]\n"
+                   "fmla v18.4s,  v6.4s, v2.s[2]\n"
+                   "fmla v19.4s,  v6.4s, v2.s[3]\n"
+                   "ld1 {v0.4s, v1.4s, v2.4s}, [%[lhs_ptr]], #48\n"
+                   "fmla v20.4s,  v6.4s, v3.s[0]\n"
+                   "fmla v21.4s,  v6.4s, v3.s[1]\n"
+                   "fmla v22.4s,  v6.4s, v3.s[2]\n"
+                   "fmla v23.4s,  v6.4s, v3.s[3]\n"
+                   "fmla v24.4s,  v6.4s, v4.s[0]\n"
+                   "fmla v25.4s,  v6.4s, v4.s[1]\n"
+                   "fmla v26.4s,  v6.4s, v4.s[2]\n"
+                   "fmla v27.4s,  v6.4s, v4.s[3]\n"
+                   "fmla v28.4s,  v6.4s, v5.s[0]\n"
+                   "fmla v29.4s,  v6.4s, v5.s[1]\n"
+                   "fmla v30.4s,  v6.4s, v5.s[2]\n"
+                   "fmla v31.4s,  v6.4s, v5.s[3]\n"
+
+                   "ld1 {v3.4s, v4.4s, v5.4s}, [%[lhs_ptr]], #48\n"
+                   "fmla v8.4s,  v7.4s, v0.s[0]\n"
+                   "fmla v9.4s,  v7.4s, v0.s[1]\n"
+                   "st1 {v8.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v10.4s,  v7.4s, v0.s[2]\n"
+                   "st1 {v9.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v11.4s,  v7.4s, v0.s[3]\n"
+                   "st1 {v10.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v12.4s,  v7.4s, v1.s[0]\n"
+                   "st1 {v11.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v13.4s,  v7.4s, v1.s[1]\n"
+                   "st1 {v12.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v14.4s,  v7.4s, v1.s[2]\n"
+                   "st1 {v13.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v15.4s,  v7.4s, v1.s[3]\n"
+                   "st1 {v14.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v16.4s,  v7.4s, v2.s[0]\n"
+                   "st1 {v15.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v17.4s,  v7.4s, v2.s[1]\n"
+                   "st1 {v16.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v18.4s,  v7.4s, v2.s[2]\n"
+                   "st1 {v17.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v19.4s,  v7.4s, v2.s[3]\n"
+                   "st1 {v18.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v20.4s,  v7.4s, v3.s[0]\n"
+                   "st1 {v19.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v21.4s,  v7.4s, v3.s[1]\n"
+                   "st1 {v20.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v22.4s,  v7.4s, v3.s[2]\n"
+                   "st1 {v21.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v23.4s,  v7.4s, v3.s[3]\n"
+                   "st1 {v22.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v24.4s,  v7.4s, v4.s[0]\n"
+                   "st1 {v23.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v25.4s,  v7.4s, v4.s[1]\n"
+                   "st1 {v24.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v26.4s,  v7.4s, v4.s[2]\n"
+                   "st1 {v25.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v27.4s,  v7.4s, v4.s[3]\n"
+                   "st1 {v26.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v28.4s,  v7.4s, v5.s[0]\n"
+                   "st1 {v27.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v29.4s,  v7.4s, v5.s[1]\n"
+                   "st1 {v28.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v30.4s,  v7.4s, v5.s[2]\n"
+                   "st1 {v29.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v31.4s,  v7.4s, v5.s[3]\n"
+                   "st1 {v30.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "b 3f\n"
+
+                   "2:\n"
+                   "ld1 {v3.4s, v4.4s, v5.4s}, [%[lhs_ptr]], #48\n"
+                   "fmla v8.4s,  v6.4s, v0.s[0]\n"
+                   "fmla v9.4s,  v6.4s, v0.s[1]\n"
+                   "st1 {v8.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v10.4s,  v6.4s, v0.s[2]\n"
+                   "st1 {v9.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v11.4s,  v6.4s, v0.s[3]\n"
+                   "st1 {v10.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v12.4s,  v6.4s, v1.s[0]\n"
+                   "st1 {v11.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v13.4s,  v6.4s, v1.s[1]\n"
+                   "st1 {v12.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v14.4s,  v6.4s, v1.s[2]\n"
+                   "st1 {v13.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v15.4s,  v6.4s, v1.s[3]\n"
+                   "st1 {v14.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v16.4s,  v6.4s, v2.s[0]\n"
+                   "st1 {v15.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v17.4s,  v6.4s, v2.s[1]\n"
+                   "st1 {v16.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v18.4s,  v6.4s, v2.s[2]\n"
+                   "st1 {v17.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v19.4s,  v6.4s, v2.s[3]\n"
+                   "st1 {v18.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v20.4s,  v6.4s, v3.s[0]\n"
+                   "st1 {v19.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v21.4s,  v6.4s, v3.s[1]\n"
+                   "st1 {v20.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v22.4s,  v6.4s, v3.s[2]\n"
+                   "st1 {v21.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v23.4s,  v6.4s, v3.s[3]\n"
+                   "st1 {v22.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v24.4s,  v6.4s, v4.s[0]\n"
+                   "st1 {v23.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v25.4s,  v6.4s, v4.s[1]\n"
+                   "st1 {v24.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v26.4s,  v6.4s, v4.s[2]\n"
+                   "st1 {v25.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v27.4s,  v6.4s, v4.s[3]\n"
+                   "st1 {v26.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v28.4s,  v6.4s, v5.s[0]\n"
+                   "st1 {v27.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v29.4s,  v6.4s, v5.s[1]\n"
+                   "st1 {v28.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v30.4s,  v6.4s, v5.s[2]\n"
+                   "st1 {v29.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "fmla v31.4s,  v6.4s, v5.s[3]\n"
+                   "st1 {v30.4s}, [x0]\n"
+                   "add x0, x0, %[nstride]\n"
+                   "3:\n"
+                   "st1 {v31.4s}, [x0]\n"
+                   : [lhs_ptr] "+r"(lhs_ptr), [rhs_ptr] "+r"(rhs_ptr), [res_ptr] "+r"(res_ptr),
+                     [nk] "+r"(nk)
+                   : [oddk] "r"(oddk), [k0] "r"(k0), [nstride] "r"(nstride)
+                   : "x0", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11",
+                     "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22",
+                     "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31");
+}
+
+#else  // __aarch64__
+static void sgemm_rowmajor_micro_kernel_6x8(const float *lhs_ptr, const float *rhs_ptr,
+                                            float *res_ptr, const int k, const int k0,
+                                            const int stride)
+{
+  int nk = k >> 2;
+  int rk = k & 3;
+
+  const int nstride = stride << 2;
+
+  if (rk == 0)
+  {
+    nk--;
+    rk = 4;
+  }
+
+  __asm __volatile("vld1.32	{d0-d1}, [%[lhs_ptr]]!\n"
+                   "vld1.32	{d4-d5}, [%[rhs_ptr]]!\n"
+
+                   "cmp %[k0], #0\n"
+                   "beq  0f\n"
+
+                   "mov r0, %[res_ptr]\n"
+
+                   "vld1.f32 {d8-d11}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vld1.f32 {d12-d15}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vld1.f32 {d16-d19}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vld1.f32 {d20-d23}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vld1.f32 {d24-d27}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vld1.f32 {d28-d31}, [r0]\n"
+                   "b 1f\n"
+
+                   "0:\n"
+                   "vmov.i32	q4, #0\n"
+                   "vmov.i32	q5, #0\n"
+                   "vmov.i32	q6, #0\n"
+                   "pld [%[lhs_ptr], #48]\n"
+                   "vmov.i32	q7, #0\n"
+                   "pld [%[rhs_ptr], #48]\n"
+                   "vmov.i32	q8, #0\n"
+                   "pld [%[lhs_ptr], #112]\n"
+                   "vmov.i32	q9, #0\n"
+                   "pld [%[rhs_ptr], #112]\n"
+                   "vmov.i32	q10, #0\n"
+                   "vmov.i32	q11, #0\n"
+                   "vmov.i32	q12, #0\n"
+                   "vmov.i32	q13, #0\n"
+                   "pld [%[lhs_ptr], #176]\n"
+                   "vmov.i32	q14, #0\n"
+                   "pld [%[rhs_ptr], #176]\n"
+                   "vmov.i32	q15, #0\n"
+
+                   "1:\n"
+                   "cmp %[nk], #0\n"
+                   "beq 6f\n"
+                   "vmla.f32	q4, q2, d0[0]\n"
+                   "vld1.32	{d2-d3}, [%[lhs_ptr]]!\n"
+                   "vmla.f32	q6, q2, d0[1]\n"
+                   "vmla.f32	q8, q2, d1[0]\n"
+                   "vld1.32	{d6-d7}, [%[rhs_ptr]]!\n"
+                   "vmla.f32	q10, q2, d1[1]\n"
+                   "vmla.f32	q12, q2, d2[0]\n"
+                   "vmla.f32	q14, q2, d2[1]\n"
+                   "vld1.32	{d4-d5}, [%[rhs_ptr]]!\n"
+
+                   "vmla.f32	q5, q3, d0[0]\n"
+                   "vmla.f32	q7, q3, d0[1]\n"
+                   "vmla.f32	q9, q3, d1[0]\n"
+                   "vmla.f32	q11, q3, d1[1]\n"
+                   "vld1.32	{d0-d1}, [%[lhs_ptr]]!\n"
+                   "vmla.f32	q13, q3, d2[0]\n"
+                   "vmla.f32	q15, q3, d2[1]\n"
+                   "vld1.32	{d6-d7}, [%[rhs_ptr]]!\n"
+
+                   "vmla.f32	q4, q2, d3[0]\n"
+                   "subs		%[nk], %[nk], #1\n"
+                   "vmla.f32	q6, q2, d3[1]\n"
+                   "pld [%[lhs_ptr], #208]\n"
+                   "vmla.f32	q8, q2, d0[0]\n"
+                   "vmla.f32	q10, q2, d0[1]\n"
+                   "pld [%[rhs_ptr], #192]\n"
+                   "vmla.f32	q12, q2, d1[0]\n"
+                   "vmla.f32	q14, q2, d1[1]\n"
+                   "vld1.32	{d4-d5}, [%[rhs_ptr]]!\n"
+
+                   "vmla.f32	q5, q3, d3[0]\n"
+                   "vmla.f32	q7, q3, d3[1]\n"
+                   "vld1.32	{d2-d3}, [%[lhs_ptr]]!\n"
+                   "vmla.f32	q9, q3, d0[0]\n"
+                   "vmla.f32	q11, q3, d0[1]\n"
+                   "vmla.f32	q13, q3, d1[0]\n"
+                   "vmla.f32	q15, q3, d1[1]\n"
+                   "vld1.32	{d0-d1}, [%[lhs_ptr]]!\n"
+
+                   "vmla.f32	q4, q2, d2[0]\n"
+                   "vmla.f32	q6, q2, d2[1]\n"
+                   "vld1.32	{d6-d7}, [%[rhs_ptr]]!\n"
+                   "vmla.f32	q8, q2, d3[0]\n"
+                   "vmla.f32	q10, q2, d3[1]\n"
+                   "pld [%[lhs_ptr], #240]\n"
+                   "vmla.f32	q12, q2, d0[0]\n"
+                   "vmla.f32	q14, q2, d0[1]\n"
+                   "vld1.32	{d4-d5}, [%[rhs_ptr]]!\n"
+
+                   "vmla.f32	q5, q3, d2[0]\n"
+                   "vmla.f32	q7, q3, d2[1]\n"
+                   "pld [%[rhs_ptr], #208]\n"
+                   "vmla.f32	q9, q3, d3[0]\n"
+                   "vmla.f32	q11, q3, d3[1]\n"
+                   "vld1.32	{d2-d3}, [%[lhs_ptr]]!\n"
+                   "vmla.f32	q13, q3, d0[0]\n"
+                   "vmla.f32	q15, q3, d0[1]\n"
+                   "vld1.32	{d6-d7}, [%[rhs_ptr]]!\n"
+
+                   "vmla.f32	q4, q2, d1[0]\n"
+                   "vmla.f32	q6, q2, d1[1]\n"
+                   "vmla.f32	q8, q2, d2[0]\n"
+                   "vmla.f32	q10, q2, d2[1]\n"
+                   "vmla.f32	q12, q2, d3[0]\n"
+                   "vmla.f32	q14, q2, d3[1]\n"
+                   "vld1.32	{d4-d5}, [%[rhs_ptr]]!\n"
+
+                   "vmla.f32	q5, q3, d1[0]\n"
+                   "vmla.f32	q7, q3, d1[1]\n"
+                   "vld1.32	{d0-d1}, [%[lhs_ptr]]!\n"
+                   "vmla.f32	q9, q3, d2[0]\n"
+                   "vmla.f32	q11, q3, d2[1]\n"
+                   "vmla.f32	q13, q3, d3[0]\n"
+                   "vmla.f32	q15, q3, d3[1]\n"
+                   "bne		1b\n"
+
+                   "6:\n"
+                   "mov r0, %[res_ptr]\n"
+                   "subs		%[rk], %[rk], #1\n"
+                   "beq		3f\n"
+
+                   "vmla.f32	q4, q2, d0[0]\n"
+                   "vld1.32	{d2-d3}, [%[lhs_ptr]]!\n"
+                   "vmla.f32	q6, q2, d0[1]\n"
+                   "vmla.f32	q8, q2, d1[0]\n"
+                   "vld1.32	{d6-d7}, [%[rhs_ptr]]!\n"
+                   "vmla.f32	q10, q2, d1[1]\n"
+                   "vmla.f32	q12, q2, d2[0]\n"
+                   "subs		%[rk], %[rk], #1\n"
+                   "vmla.f32	q14, q2, d2[1]\n"
+                   "vld1.32	{d4-d5}, [%[rhs_ptr]]!\n"
+
+                   "vmla.f32	q5, q3, d0[0]\n"
+                   "vmla.f32	q7, q3, d0[1]\n"
+                   "vmla.f32	q9, q3, d1[0]\n"
+                   "vmla.f32	q11, q3, d1[1]\n"
+                   "vld1.32	{d0-d1}, [%[lhs_ptr]]!\n"
+                   "vmla.f32	q13, q3, d2[0]\n"
+                   "vmla.f32	q15, q3, d2[1]\n"
+                   "vld1.32	{d6-d7}, [%[rhs_ptr]]!\n"
+                   "beq		4f\n"
+
+                   "vmla.f32	q4, q2, d3[0]\n"
+                   "vmla.f32	q6, q2, d3[1]\n"
+                   "subs		%[rk], %[rk], #1\n"
+                   "vmla.f32	q8, q2, d0[0]\n"
+                   "vmla.f32	q10, q2, d0[1]\n"
+                   "vmla.f32	q12, q2, d1[0]\n"
+                   "vmla.f32	q14, q2, d1[1]\n"
+                   "vld1.32	{d4-d5}, [%[rhs_ptr]]!\n"
+
+                   "vmla.f32	q5, q3, d3[0]\n"
+                   "vmla.f32	q7, q3, d3[1]\n"
+                   "vld1.32	{d2-d3}, [%[lhs_ptr]]!\n"
+                   "vmla.f32	q9, q3, d0[0]\n"
+                   "vmla.f32	q11, q3, d0[1]\n"
+                   "vmla.f32	q13, q3, d1[0]\n"
+                   "vmla.f32	q15, q3, d1[1]\n"
+                   "vld1.32	{d6-d7}, [%[rhs_ptr]]!\n"
+                   "beq		5f\n"
+
+                   "vld1.32	{d0-d1}, [%[lhs_ptr]]!\n"
+                   "vmla.f32	q4, q2, d2[0]\n"
+                   "vmla.f32	q6, q2, d2[1]\n"
+                   "vmla.f32	q8, q2, d3[0]\n"
+                   "vmla.f32	q10, q2, d3[1]\n"
+                   "vmla.f32	q12, q2, d0[0]\n"
+                   "vmla.f32	q14, q2, d0[1]\n"
+                   "vld1.32	{d4-d5}, [%[rhs_ptr]]!\n"
+
+                   "vmla.f32	q5, q3, d2[0]\n"
+                   "vmla.f32	q7, q3, d2[1]\n"
+                   "vmla.f32	q9, q3, d3[0]\n"
+                   "vmla.f32	q11, q3, d3[1]\n"
+                   "vld1.32	{d2-d3}, [%[lhs_ptr]]!\n"
+                   "vmla.f32	q13, q3, d0[0]\n"
+                   "vmla.f32	q15, q3, d0[1]\n"
+                   "vld1.32	{d6-d7}, [%[rhs_ptr]]!\n"
+
+                   "vmla.f32	q4, q2, d1[0]\n"
+                   "vmla.f32	q5, q3, d1[0]\n"
+                   "vst1.32	{d8-d11}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q6, q2, d1[1]\n"
+                   "vmla.f32	q7, q3, d1[1]\n"
+                   "vst1.32	{d12-d15}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q8, q2, d2[0]\n"
+                   "vmla.f32	q9, q3, d2[0]\n"
+                   "vst1.32	{d16-d19}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q10, q2, d2[1]\n"
+                   "vmla.f32	q11, q3, d2[1]\n"
+                   "vst1.32	{d20-d23}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q12, q2, d3[0]\n"
+                   "vmla.f32	q13, q3, d3[0]\n"
+                   "vst1.32	{d24-d27}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q14, q2, d3[1]\n"
+                   "vmla.f32	q15, q3, d3[1]\n"
+                   "b		2f\n"
+
+                   "3:\n"
+                   "vld1.32	{d6-d7}, [%[rhs_ptr]]!\n"
+                   "vmla.f32	q4, q2, d0[0]\n"
+                   "vmla.f32	q5, q3, d0[0]\n"
+                   "vst1.32	{d8-d11}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q6, q2, d0[1]\n"
+                   "vmla.f32	q7, q3, d0[1]\n"
+                   "vst1.32	{d12-d15}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q8, q2, d1[0]\n"
+                   "vld1.32	{d2}, [%[lhs_ptr]]!\n"
+                   "vmla.f32	q9, q3, d1[0]\n"
+                   "vst1.32	{d16-d19}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q10, q2, d1[1]\n"
+                   "vmla.f32	q11, q3, d1[1]\n"
+                   "vst1.32	{d20-d23}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q12, q2, d2[0]\n"
+                   "vmla.f32	q13, q3, d2[0]\n"
+                   "vst1.32	{d24-d27}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q14, q2, d2[1]\n"
+                   "vmla.f32	q15, q3, d2[1]\n"
+                   "b		2f\n"
+
+                   "4:\n"
+                   "vmla.f32	q4, q2, d3[0]\n"
+                   "vmla.f32	q5, q3, d3[0]\n"
+                   "vst1.32	{d8-d11}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q6, q2, d3[1]\n"
+                   "vmla.f32	q7, q3, d3[1]\n"
+                   "vst1.32	{d12-d15}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q8, q2, d0[0]\n"
+                   "vmla.f32	q9, q3, d0[0]\n"
+                   "vst1.32	{d16-d19}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q10, q2, d0[1]\n"
+                   "vmla.f32	q11, q3, d0[1]\n"
+                   "vst1.32	{d20-d23}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q12, q2, d1[0]\n"
+                   "vmla.f32	q13, q3, d1[0]\n"
+                   "vst1.32	{d24-d27}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q14, q2, d1[1]\n"
+                   "vmla.f32	q15, q3, d1[1]\n"
+                   "b		2f\n"
+
+                   "5:\n"
+                   "vld1.32	{d0}, [%[lhs_ptr]]!\n"
+                   "vmla.f32	q4, q2, d2[0]\n"
+                   "vmla.f32	q5, q3, d2[0]\n"
+                   "vst1.32	{d8-d11}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q6, q2, d2[1]\n"
+                   "vmla.f32	q7, q3, d2[1]\n"
+                   "vst1.32	{d12-d15}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q8, q2, d3[0]\n"
+                   "vmla.f32	q9, q3, d3[0]\n"
+                   "vst1.32	{d16-d19}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q10, q2, d3[1]\n"
+                   "vmla.f32	q11, q3, d3[1]\n"
+                   "vst1.32	{d20-d23}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q12, q2, d0[0]\n"
+                   "vmla.f32	q13, q3, d0[0]\n"
+                   "vst1.32	{d24-d27}, [r0]\n"
+                   "add r0, r0, %[nstride]\n"
+                   "vmla.f32	q14, q2, d0[1]\n"
+                   "vmla.f32	q15, q3, d0[1]\n"
+                   "2:\n"
+                   "vst1.32	{d28-d31}, [r0]\n"
+                   : [lhs_ptr] "+r"(lhs_ptr), [rhs_ptr] "+r"(rhs_ptr), [res_ptr] "+r"(res_ptr),
+                     [nk] "+r"(nk), [rk] "+r"(rk)
+                   : [k0] "r"(k0), [nstride] "r"(nstride)
+                   : "r0", "r1", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", "q8", "q9", "q10",
+                     "q11", "q12", "q13", "q14", "q15", "cc");
+}
+
+static void sgemm_rowmajor_micro_kernel_4x12(const float *lhs_ptr, const float *rhs_ptr,
+                                             float *res_ptr, const int k, const int k0,
+                                             const int stride)
+{
+  int rk = (k & 1);
+  int nk = (k + 1) / 2;
+
+  const int nstride = stride << 2;
+
+  asm volatile("vld1.f32 {d0-d1}, [%[lhs_ptr]]!\n"
+               "vld1.f32 {d4-d5}, [%[rhs_ptr]]!\n"
+
+               "cmp %[k0], #0\n"
+               "beq  0f\n"
+
+               "mov r1, %[res_ptr]\n"
+
+               "subs %[nk], %[nk], #1\n"
+               "mov r0, r1\n"
+               "vld1.f32 {d8-d9}, [r0]!\n"
+               "add r1, %[nstride]\n"
+               "vld1.f32 {d16-d17}, [r0]!\n"
+               "vld1.f32 {d24-d25}, [r0]\n"
+               "mov r0, r1\n"
+               "vld1.f32 {d10-d11}, [r0]!\n"
+               "add r1, %[nstride]\n"
+               "vld1.f32 {d18-d19}, [r0]!\n"
+               "vld1.f32 {d26-d27}, [r0]\n"
+               "mov r0, r1\n"
+               "vld1.f32 {d12-d13}, [r0]!\n"
+               "add r1, %[nstride]\n"
+               "vld1.f32 {d20-d21}, [r0]!\n"
+               "vld1.f32 {d28-d29}, [r0]\n"
+               "mov r0, r1\n"
+               "vld1.f32 {d14-d15}, [r0]!\n"
+               "vld1.f32 {d22-d23}, [r0]!\n"
+               "vld1.f32 {d30-d31}, [r0]\n"
+               "beq 2f\n"
+
+               "b 1f\n"
+
+               "0:\n"
+               "veor q4, q4\n"
+               "subs %[nk],%[nk], #1\n"
+               "vmov.f32 q8, q4\n"
+               "vmov.f32 q12, q4\n"
+               "vmov.f32 q5, q4\n"
+               "vmov.f32 q9, q4\n"
+               "vmov.f32 q13, q4\n"
+               "vmov.f32 q6, q4\n"
+               "vmov.f32 q10, q4\n"
+               "vmov.f32 q14, q4\n"
+               "vmov.f32 q7, q4\n"
+               "vmov.f32 q11, q4\n"
+               "vmov.f32 q15, q4\n"
+
+               "beq 2f\n"
+
+               "1:\n"
+               "vld1.f32 {d6-d7}, [%[rhs_ptr]]!\n"
+               "vmla.f32 q4, q2, d0[0]\n"
+               "vmla.f32 q5, q2, d0[1]\n"
+               "vmla.f32 q6, q2, d1[0]\n"
+               "vmla.f32 q7, q2, d1[1]\n"
+               "vld1.f32 {d4-d5}, [%[rhs_ptr]]!\n"
+               "vmla.f32 q8, q3, d0[0]\n"
+               "vmla.f32 q9, q3, d0[1]\n"
+               "vld1.f32 {d2-d3}, [%[lhs_ptr]]!\n"
+               "vmla.f32 q10, q3, d1[0]\n"
+               "vmla.f32 q11, q3, d1[1]\n"
+               "vld1.f32 {d6-d7}, [%[rhs_ptr]]!\n"
+               "vmla.f32 q12, q2, d0[0]\n"
+               "vmla.f32 q13, q2, d0[1]\n"
+               "pld [%[lhs_ptr], #208]\n"
+               "vmla.f32 q14, q2, d1[0]\n"
+               "pld [%[rhs_ptr], #192]\n"
+               "vmla.f32 q15, q2, d1[1]\n"
+
+               "vld1.f32 {d4-d5}, [%[rhs_ptr]]!\n"
+               "vmla.f32 q4, q3, d2[0]\n"
+               "vmla.f32 q5, q3, d2[1]\n"
+               "vmla.f32 q6, q3, d3[0]\n"
+               "vmla.f32 q7, q3, d3[1]\n"
+               "vld1.f32 {d6-d7}, [%[rhs_ptr]]!\n"
+               "vmla.f32 q8, q2, d2[0]\n"
+               "vmla.f32 q9, q2, d2[1]\n"
+               "vld1.f32 {d0-d1}, [%[lhs_ptr]]!\n"
+               "vmla.f32 q10, q2, d3[0]\n"
+               "vmla.f32 q11, q2, d3[1]\n"
+               "vld1.f32 {d4-d5}, [%[rhs_ptr]]!\n"
+               "vmla.f32 q12, q3, d2[0]\n"
+               "vmla.f32 q13, q3, d2[1]\n"
+               "subs %[nk],%[nk], #1\n"
+               "pld [%[lhs_ptr], #240]\n"
+               "vmla.f32 q14, q3, d3[0]\n"
+               "pld [%[rhs_ptr], #208]\n"
+               "vmla.f32 q15, q3, d3[1]\n"
+               "bne 1b\n"
+
+               "2:\n"
+               "cmp %[rk], #1\n"
+               "beq 3f\n"
+
+               "vld1.f32 {d2-d3}, [%[lhs_ptr]]!\n"
+               "vld1.f32 {d6-d7}, [%[rhs_ptr]]!\n"
+               "vmla.f32 q4, q2, d0[0]\n"
+               "vmla.f32 q5, q2, d0[1]\n"
+               "vmla.f32 q6, q2, d1[0]\n"
+               "vmla.f32 q7, q2, d1[1]\n"
+               "vld1.f32 {d4-d5}, [%[rhs_ptr]]!\n"
+               "vmla.f32 q8, q3, d0[0]\n"
+               "vmla.f32 q9, q3, d0[1]\n"
+               "vmla.f32 q10, q3, d1[0]\n"
+               "vmla.f32 q11, q3, d1[1]\n"
+               "vld1.f32 {d6-d7}, [%[rhs_ptr]]!\n"
+               "vmla.f32 q12, q2, d0[0]\n"
+               "vmla.f32 q13, q2, d0[1]\n"
+               "vmla.f32 q14, q2, d1[0]\n"
+               "vmla.f32 q15, q2, d1[1]\n"
+
+               "vld1.f32 {d4-d5}, [%[rhs_ptr]]!\n"
+               "vld1.f32 {d0-d1}, [%[rhs_ptr]]!\n"
+               "mov r1, %[res_ptr]\n"
+               "mov r0, r1\n"
+               "vmla.f32 q4, q3, d2[0]\n"
+               "vmla.f32 q8, q2, d2[0]\n"
+               "vmla.f32 q12, q0, d2[0]\n"
+               "vst1.f32 {d8-d9}, [r0]!\n"
+               "add r1, %[nstride]\n"
+               "vmla.f32 q5, q3, d2[1]\n"
+               "vst1.f32 {d16-d17}, [r0]!\n"
+               "vmla.f32 q9, q2, d2[1]\n"
+               "vst1.f32 {d24-d25}, [r0]\n"
+               "mov r0, r1\n"
+               "vmla.f32 q13, q0, d2[1]\n"
+               "vst1.f32 {d10-d11}, [r0]!\n"
+               "vmla.f32 q6, q3, d3[0]\n"
+               "add r1, %[nstride]\n"
+               "vst1.f32 {d18-d19}, [r0]!\n"
+               "vmla.f32 q10, q2, d3[0]\n"
+               "vst1.f32 {d26-d27}, [r0]\n"
+               "mov r0, r1\n"
+               "vmla.f32 q14, q0, d3[0]\n"
+               "vst1.f32 {d12-d13}, [r0]!\n"
+               "add r1, %[nstride]\n"
+               "vmla.f32 q7, q3, d3[1]\n"
+               "vst1.f32 {d20-d21}, [r0]!\n"
+               "vmla.f32 q11, q2, d3[1]\n"
+               "vst1.f32 {d28-d29}, [r0]\n"
+               "mov r0, r1\n"
+               "vmla.f32 q15, q0, d3[1]\n"
+               "b 4f\n"
+
+               "3:\n"
+               "vld1.f32 {d6-d7}, [%[rhs_ptr]]!\n"
+               "vld1.f32 {d2-d3}, [%[rhs_ptr]]!\n"
+               "mov r1, %[res_ptr]\n"
+               "mov r0, r1\n"
+               "vmla.f32 q4, q2, d0[0]\n"
+               "vmla.f32 q8, q3, d0[0]\n"
+               "vmla.f32 q12, q1, d0[0]\n"
+               "vst1.f32 {d8-d9}, [r0]!\n"
+               "add r1, %[nstride]\n"
+               "vmla.f32 q5, q2, d0[1]\n"
+               "vst1.f32 {d16-d17}, [r0]!\n"
+               "vmla.f32 q9, q3, d0[1]\n"
+               "vst1.f32 {d24-d25}, [r0]\n"
+               "mov r0, r1\n"
+               "vmla.f32 q13, q1, d0[1]\n"
+               "vst1.f32 {d10-d11}, [r0]!\n"
+               "vmla.f32 q6, q2, d1[0]\n"
+               "add r1, %[nstride]\n"
+               "vst1.f32 {d18-d19}, [r0]!\n"
+               "vmla.f32 q10, q3, d1[0]\n"
+               "vst1.f32 {d26-d27}, [r0]\n"
+               "mov r0, r1\n"
+               "vmla.f32 q14, q1, d1[0]\n"
+               "vst1.f32 {d12-d13}, [r0]!\n"
+               "add r1, %[nstride]\n"
+               "vmla.f32 q7, q2, d1[1]\n"
+               "vst1.f32 {d20-d21}, [r0]!\n"
+               "vmla.f32 q11, q3, d1[1]\n"
+               "vst1.f32 {d28-d29}, [r0]\n"
+               "mov r0, r1\n"
+               "vmla.f32 q15, q1, d1[1]\n"
+
+               "4:\n"
+               "vst1.f32 {d14-d15}, [r0]!\n"
+               "vst1.f32 {d22-d23}, [r0]!\n"
+               "vst1.f32 {d30-d31}, [r0]\n"
+
+               : [lhs_ptr] "+r"(lhs_ptr), [rhs_ptr] "+r"(rhs_ptr), [res_ptr] "+r"(res_ptr),
+                 [nk] "+r"(nk), [rk] "+r"(rk)
+               : [k0] "r"(k0), [nstride] "r"(nstride)
+               : "r0", "r1", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", "q8", "q9", "q10",
+                 "q11", "q12", "q13", "q14", "q15", "cc");
+}
+
+static void sgemm_rowmajor_micro_kernel_12x4(const float *lhs_ptr, const float *rhs_ptr,
+                                             float *res_ptr, const int k, const int k0,
+                                             const int stride)
+{
+  int rk = (k & 1);
+  int nk = (k + 1) / 2;
+
+  const int nstride = stride << 2;
+
+  asm volatile("vld1.f32 {d0-d1}, [%[lhs_ptr]]!\n"
+               "vld1.f32 {d4-d5}, [%[rhs_ptr]]!\n"
+
+               "cmp %[k0], #0\n"
+               "beq  0f\n"
+
+               "mov r0, %[res_ptr]\n"
+               "subs %[nk], %[nk], #1\n"
+               "vld1.f32 {d8-d9}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vld1.f32 {d10-d11}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vld1.f32 {d12-d13}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vld1.f32 {d14-d15}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vld1.f32 {d16-d17}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vld1.f32 {d18-d19}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vld1.f32 {d20-d21}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vld1.f32 {d22-d23}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vld1.f32 {d24-d25}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vld1.f32 {d26-d27}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vld1.f32 {d28-d29}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vld1.f32 {d30-d31}, [r0]\n"
+               "beq 2f\n"
+               "b 1f\n"
+
+               "0:\n"
+               "veor q4, q4\n"
+               "subs %[nk],%[nk], #1\n"
+               "vmov.f32 q5, q4\n"
+               "vmov.f32 q6, q4\n"
+               "vmov.f32 q7, q4\n"
+               "vmov.f32 q8, q4\n"
+               "vmov.f32 q9, q4\n"
+               "vmov.f32 q10, q4\n"
+               "vmov.f32 q11, q4\n"
+               "vmov.f32 q12, q4\n"
+               "vmov.f32 q13, q4\n"
+               "vmov.f32 q14, q4\n"
+               "vmov.f32 q15, q4\n"
+
+               "beq 2f\n"
+
+               "1:\n"
+               "vld1.f32 {d2-d3}, [%[lhs_ptr]]!\n"
+               "vmla.f32 q4, q2, d0[0]\n"
+               "vmla.f32 q5, q2, d0[1]\n"
+               "vmla.f32 q6, q2, d1[0]\n"
+               "vmla.f32 q7, q2, d1[1]\n"
+               "vld1.f32 {d0-d1}, [%[lhs_ptr]]!\n"
+               "vmla.f32 q8, q2, d2[0]\n"
+               "vmla.f32 q9, q2, d2[1]\n"
+               "vld1.f32 {d6-d7}, [%[rhs_ptr]]!\n"
+               "vmla.f32 q10, q2, d3[0]\n"
+               "vmla.f32 q11, q2, d3[1]\n"
+               "vld1.f32 {d2-d3}, [%[lhs_ptr]]!\n"
+               "vmla.f32 q12, q2, d0[0]\n"
+               "vmla.f32 q13, q2, d0[1]\n"
+               "pld [%[rhs_ptr], #208]\n"
+               "vmla.f32 q14, q2, d1[0]\n"
+               "pld [%[lhs_ptr], #192]\n"
+               "vmla.f32 q15, q2, d1[1]\n"
+
+               "vld1.f32 {d0-d1}, [%[lhs_ptr]]!\n"
+               "vmla.f32 q4, q3, d2[0]\n"
+               "vmla.f32 q5, q3, d2[1]\n"
+               "vmla.f32 q6, q3, d3[0]\n"
+               "vmla.f32 q7, q3, d3[1]\n"
+               "vld1.f32 {d2-d3}, [%[lhs_ptr]]!\n"
+               "vmla.f32 q8, q3, d0[0]\n"
+               "vmla.f32 q9, q3, d0[1]\n"
+               "vld1.f32 {d4-d5}, [%[rhs_ptr]]!\n"
+               "vmla.f32 q10, q3, d1[0]\n"
+               "vmla.f32 q11, q3, d1[1]\n"
+               "vld1.f32 {d0-d1}, [%[lhs_ptr]]!\n"
+               "vmla.f32 q12, q3, d2[0]\n"
+               "vmla.f32 q13, q3, d2[1]\n"
+               "subs %[nk],%[nk], #1\n"
+               "pld [%[rhs_ptr], #240]\n"
+               "vmla.f32 q14, q3, d3[0]\n"
+               "pld [%[lhs_ptr], #208]\n"
+               "vmla.f32 q15, q3, d3[1]\n"
+               "bne 1b\n"
+
+               "2:\n"
+               "cmp %[rk], #1\n"
+               "beq 3f\n"
+
+               "vld1.f32 {d2-d3}, [%[lhs_ptr]]!\n"
+               "vmla.f32 q4, q2, d0[0]\n"
+               "vmla.f32 q5, q2, d0[1]\n"
+               "vmla.f32 q6, q2, d1[0]\n"
+               "vmla.f32 q7, q2, d1[1]\n"
+               "vld1.f32 {d0-d1}, [%[lhs_ptr]]!\n"
+               "vmla.f32 q8, q2, d2[0]\n"
+               "vmla.f32 q9, q2, d2[1]\n"
+               "vld1.f32 {d6-d7}, [%[rhs_ptr]]!\n"
+               "vmla.f32 q10, q2, d3[0]\n"
+               "vmla.f32 q11, q2, d3[1]\n"
+               "vld1.f32 {d2-d3}, [%[lhs_ptr]]!\n"
+               "vmla.f32 q12, q2, d0[0]\n"
+               "vmla.f32 q13, q2, d0[1]\n"
+               "vmla.f32 q14, q2, d1[0]\n"
+               "vmla.f32 q15, q2, d1[1]\n"
+
+               "mov r0, %[res_ptr]\n"
+               "vld1.f32 {d0-d1}, [%[lhs_ptr]]!\n"
+               "vmla.f32 q4, q3, d2[0]\n"
+               "vst1.f32 {d8-d9}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q5, q3, d2[1]\n"
+               "vst1.f32 {d10-d11}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q6, q3, d3[0]\n"
+               "vst1.f32 {d12-d13}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q7, q3, d3[1]\n"
+               "vst1.f32 {d14-d15}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vld1.f32 {d2-d3}, [%[lhs_ptr]]!\n"
+               "vmla.f32 q8, q3, d0[0]\n"
+               "vst1.f32 {d16-d17}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q9, q3, d0[1]\n"
+               "vst1.f32 {d18-d19}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q10, q3, d1[0]\n"
+               "vst1.f32 {d20-d21}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q11, q3, d1[1]\n"
+               "vst1.f32 {d22-d23}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q12, q3, d2[0]\n"
+               "vst1.f32 {d24-d25}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q13, q3, d2[1]\n"
+               "vst1.f32 {d26-d27}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q14, q3, d3[0]\n"
+               "vst1.f32 {d28-d29}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q15, q3, d3[1]\n"
+               "b 4f\n"
+
+               "3:\n"
+               "mov r0, %[res_ptr]\n"
+               "vld1.f32 {d2-d3}, [%[lhs_ptr]]!\n"
+               "vmla.f32 q4, q2, d0[0]\n"
+               "vst1.f32 {d8-d9}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q5, q2, d0[1]\n"
+               "vst1.f32 {d10-d11}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q6, q2, d1[0]\n"
+               "vst1.f32 {d12-d13}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q7, q2, d1[1]\n"
+               "vst1.f32 {d14-d15}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vld1.f32 {d0-d1}, [%[lhs_ptr]]!\n"
+               "vmla.f32 q8, q2, d2[0]\n"
+               "vst1.f32 {d16-d17}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q9, q2, d2[1]\n"
+               "vst1.f32 {d18-d19}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q10, q2, d3[0]\n"
+               "vst1.f32 {d20-d21}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q11, q2, d3[1]\n"
+               "vst1.f32 {d22-d23}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q12, q2, d0[0]\n"
+               "vst1.f32 {d24-d25}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q13, q2, d0[1]\n"
+               "vst1.f32 {d26-d27}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q14, q2, d1[0]\n"
+               "vst1.f32 {d28-d29}, [r0]\n"
+               "add r0, r0, %[nstride]\n"
+               "vmla.f32 q15, q3, d1[1]\n"
+
+               "4:\n"
+               "vst1.f32 {d30-d31}, [r0]\n"
+               : [lhs_ptr] "+r"(lhs_ptr), [rhs_ptr] "+r"(rhs_ptr), [res_ptr] "+r"(res_ptr),
+                 [nk] "+r"(nk), [rk] "+r"(rk)
+               : [k0] "r"(k0), [nstride] "r"(nstride)
+               : "r0", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", "q8", "q9", "q10", "q11",
+                 "q12", "q13", "q14", "q15", "cc");
+}
+#endif // __aarch64__
+
+typedef void (*sgemm_rowmajoy_micro_kernel_func)(const float *, const float *, float *, const int,
+                                                 const int, const int);
+
+static sgemm_rowmajoy_micro_kernel_func sgemm_rowmajoy_micro_kernel_table[12][12] = {
+    {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+    {
+
+        0, 0, 0, 0, 0,
+#if !__aarch64__
+        sgemm_rowmajor_micro_kernel_4x12,
+#else  // !__aarch64__
+        0,
+#endif // !__aarch64__
+        0, 0, 0, 0, 0,
+#if __aarch64__
+        sgemm_rowmajor_micro_kernel_4x24
+#else  // __aarch64__
+        0
+#endif // __aarch64__
+    },
+    {0, 0, 0,
+#if !__aarch64__
+     sgemm_rowmajor_micro_kernel_6x8,
+#else  // !__aarch64__
+     0,
+#endif // !__aarch64__
+     0, 0, 0, 0, 0, 0, 0, 0},
+    {0, 0, 0, 0, 0,
+#if __aarch64__
+     sgemm_rowmajor_micro_kernel_8x12,
+#else  // __aarch64__
+     0,
+#endif // __aarch64__
+     0, 0, 0, 0, 0, 0
+
+    },
+    {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+
+    },
+    {0,
+#if !__aarch64__
+     sgemm_rowmajor_micro_kernel_12x4,
+#else  // !__aarch64__
+     0,
+#endif // !__aarch64__
+     0,
+#if __aarch64__
+     sgemm_rowmajor_micro_kernel_12x8,
+#else  // __aarch64__
+     0,
+#endif // __aarch64__
+     0, 0, 0, 0, 0, 0, 0, 0
+
+    },
+    {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+    {
+
+        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+    {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+
+    },
+    {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+
+    },
+    {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+
+    },
+    {0,
+#if __aarch64__
+     sgemm_rowmajor_micro_kernel_24x4,
+#else  // __aarch64__
+     0,
+#endif // __aarch64__
+     0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+
+    },
+
+};
+
+void _sgemm_rowmajor_macro_kernel_divnm(const int mr, const int nr, const int mb, const int nb,
+                                        const int kb, const float *lhs_ptr, const float *rhs_ptr,
+                                        float *res_ptr, const int k0, const int nstride,
+                                        const int kstride)
+{
+  const int nm = (mb + mr - 1) / mr;
+  const int nn = (nb + nr - 1) / nr;
+  const int rm = mb % mr;
+  const int rn = nb % nr;
+
+  sgemm_rowmajoy_micro_kernel_func sgemm_rowmajoy_micro_kernel =
+      sgemm_rowmajoy_micro_kernel_table[mr / 2 - 1][nr / 2 - 1];
+  if (!sgemm_rowmajoy_micro_kernel)
+    return;
+
+  for (int j = 0; j < nn; j++)
+  {
+    const int _nr = (j != nn - 1 || rn == 0) ? nr : rn;
+    for (int i = 0; i < nm; i++)
+    {
+      const int _mr = (i != nm - 1 || rm == 0) ? mr : rm;
+      if (_mr == mr && _nr == nr)
+      {
+        sgemm_rowmajoy_micro_kernel(&lhs_ptr[i * mr * kstride], &rhs_ptr[j * nr * kstride],
+                                    &res_ptr[i * mr * nstride + j * nr], kb, k0, nstride);
+      }
+      else
+      {
+        float res_micro[mr * nr];
+        float *res = &res_ptr[i * mr * nstride + j * nr];
+
+        sgemm_rowmajoy_micro_kernel(&lhs_ptr[i * mr * kstride], &rhs_ptr[j * nr * kstride],
+                                    res_micro, kb, 0, nr);
+        if (k0 == 0)
+        {
+          for (int pi = 0; pi < _mr; pi++)
+          {
+            for (int pj = 0; pj < _nr; pj++)
+            {
+              res[pi * nstride + pj] = res_micro[pi * nr + pj];
+            }
+          }
+        }
+        else
+        {
+          for (int pi = 0; pi < _mr; pi++)
+          {
+            for (int pj = 0; pj < _nr; pj++)
+            {
+              res[pi * nstride + pj] += res_micro[pi * nr + pj];
+            }
+          }
+        }
+      }
+    }
+  }
+}
+
+void _sgemm_rowmajor_macro_kernel_divmn(const int mr, const int nr, const int mb, const int nb,
+                                        const int kb, const float *lhs_ptr, const float *rhs_ptr,
+                                        float *res_ptr, const int k0, const int nstride,
+                                        const int kstride)
+{
+  const int nm = (mb + mr - 1) / mr;
+  const int nn = (nb + nr - 1) / nr;
+  const int rm = mb % mr;
+  const int rn = nb % nr;
+
+  sgemm_rowmajoy_micro_kernel_func sgemm_rowmajoy_micro_kernel =
+      sgemm_rowmajoy_micro_kernel_table[mr / 2 - 1][nr / 2 - 1];
+  if (!sgemm_rowmajoy_micro_kernel)
+    return;
+
+  for (int j = 0; j < nm; j++)
+  {
+    const int _mr = (j != nm - 1 || rm == 0) ? mr : rm;
+    for (int i = 0; i < nn; i++)
+    {
+      const int _nr = (i != nn - 1 || rn == 0) ? nr : rn;
+      if (_mr == mr && _nr == nr)
+      {
+        sgemm_rowmajoy_micro_kernel(&lhs_ptr[j * mr * kstride], &rhs_ptr[i * nr * kstride],
+                                    &res_ptr[j * mr * nstride + i * nr], kb, k0, nstride);
+      }
+      else
+      {
+        float res_micro[mr * nr];
+        float *res = &res_ptr[j * mr * nstride + i * nr];
+
+        sgemm_rowmajoy_micro_kernel(&lhs_ptr[j * mr * kstride], &rhs_ptr[i * nr * kstride],
+                                    res_micro, kb, 0, nr);
+        if (k0 == 0)
+        {
+          for (int pi = 0; pi < _mr; pi++)
+          {
+            for (int pj = 0; pj < _nr; pj++)
+            {
+              res[pi * nstride + pj] = res_micro[pi * nr + pj];
+            }
+          }
+        }
+        else
+        {
+          for (int pi = 0; pi < _mr; pi++)
+          {
+            for (int pj = 0; pj < _nr; pj++)
+            {
+              res[pi * nstride + pj] += res_micro[pi * nr + pj];
+            }
+          }
+        }
+      }
+    }
+  }
+}
+
+void _sgemm_colmajor_macro_kernel_divnm(const int mr, const int nr, const int mb, const int nb,
+                                        const int kb, const float *lhs_ptr, const float *rhs_ptr,
+                                        float *res_ptr, const int k0, const int mstride,
+                                        const int kstride)
+{
+  _sgemm_rowmajor_macro_kernel_divmn(nr, mr, nb, mb, kb, rhs_ptr, lhs_ptr, res_ptr, k0, mstride,
+                                     kstride);
+}
+
+void _sgemm_colmajor_macro_kernel_divmn(const int mr, const int nr, const int mb, const int nb,
+                                        const int kb, const float *lhs_ptr, const float *rhs_ptr,
+                                        float *res_ptr, const int k0, const int mstride,
+                                        const int kstride)
+{
+  _sgemm_rowmajor_macro_kernel_divnm(nr, mr, nb, mb, kb, rhs_ptr, lhs_ptr, res_ptr, k0, mstride,
+                                     kstride);
+}
+
+#if __aarch64__
+void _sparse_sgemm_kernel(const int nb, float lhs_data, const float *rhs_ptr, float *res_ptr)
+{
+  int nn = nb >> 3;
+  int rn = nb & 7;
+
+  if (nn > 0)
+  {
+    asm volatile("mov x0, %[res_ptr]\n"
+                 "dup v0.2d, %[lhs_data]\n"
+                 "ld1 {v1.4s}, [%[rhs_ptr]], #16\n"
+                 "ld1 {v2.4s}, [x0], #16\n"
+
+                 "subs %[nn], %[nn], #1\n"
+                 "beq 2f\n"
+
+                 "1:\n"
+                 "ld1 {v4.4s}, [x0], #16\n"
+                 "ld1 {v3.4s}, [%[rhs_ptr]], #16\n"
+
+                 "fmla v2.4s, v1.4s, v0.s[0]\n"
+                 "st1 {v2.4s}, [%[res_ptr]], #16\n"
+
+                 "ld1 {v2.4s}, [x0], #16\n"
+                 "ld1 {v1.4s}, [%[rhs_ptr]], #16\n"
+
+                 "fmla v4.4s, v3.4s, v0.s[0]\n"
+                 "st1 {v4.4s}, [%[res_ptr]], #16\n"
+
+                 "subs %[nn], %[nn], #1\n"
+                 "bne 1b\n"
+
+                 "2:\n"
+                 "ld1 {v3.4s}, [%[rhs_ptr]], #16\n"
+                 "ld1 {v4.4s}, [x0], #16\n"
+
+                 "fmla v2.4s, v1.4s, v0.s[0]\n"
+                 "st1 {v2.4s}, [%[res_ptr]], #16\n"
+
+                 "fmla v4.4s, v3.4s, v0.s[0]\n"
+                 "st1 {v4.4s}, [%[res_ptr]], #16\n"
+                 : [rhs_ptr] "+r"(rhs_ptr), [res_ptr] "+r"(res_ptr), [nn] "+r"(nn)
+                 : [lhs_data] "r"(lhs_data)
+                 : "x0", "v0", "v1", "v2", "v3", "v4", "cc");
+  }
+  if (rn > 0)
+  {
+    int _nn = rn >> 2;
+    int _rn = rn & 3;
+
+    if (_nn > 0)
+    {
+      asm volatile("dup v0.2d, %[lhs_data]\n"
+                   "ld1 {v1.4s}, [%[rhs_ptr]], #16\n"
+                   "ld1 {v2.4s}, [%[res_ptr]]\n"
+                   "fmla v2.4s, v1.4s, v0.s[0]\n"
+                   "st1 {v2.4s}, [%[res_ptr]], #16\n"
+                   : [rhs_ptr] "+r"(rhs_ptr), [res_ptr] "+r"(res_ptr)
+                   : [lhs_data] "r"(lhs_data)
+                   : "x0", "x1", "x2", "cc");
+    }
+    if (_rn > 0)
+    {
+      for (int i = 0; i < _rn; i++)
+      {
+        res_ptr[i] += lhs_data * rhs_ptr[i];
+      }
+    }
+  }
+}
+
+#else  // __aarch64__
+void _sparse_sgemm_kernel(const int nb, float lhs_data, const float *rhs_ptr, float *res_ptr)
+{
+  int nn = nb >> 3;
+  int rn = nb & 7;
+
+  if (nn > 0)
+  {
+    asm volatile("mov r0, %[res_ptr]\n"
+                 "vdup.32 d0, %[lhs_data]\n"
+                 "vld1.f32 {d2-d3}, [%[rhs_ptr]]!\n"
+                 "vld1.f32 {d4-d5}, [r0]!\n"
+
+                 "subs %[nn], %[nn], #1\n"
+                 "beq 2f\n"
+
+                 "1:\n"
+                 "vld1.f32 {d8-d9}, [r0]!\n"
+                 "vld1.f32 {d6-d7}, [%[rhs_ptr]]!\n"
+
+                 "vmla.f32 q2, q1, d0[0]\n"
+                 "vst1.f32 {d4-d5}, [%[res_ptr]]!\n"
+
+                 "vld1.f32 {d4-d5}, [r0]!\n"
+                 "vld1.f32 {d2-d3}, [%[rhs_ptr]]!\n"
+
+                 "vmla.f32 q4, q3, d0[0]\n"
+                 "vst1.f32 {d8-d9}, [%[res_ptr]]!\n"
+
+                 "subs %[nn], %[nn], #1\n"
+                 "bne 1b\n"
+
+                 "2:\n"
+                 "vld1.f32 {d6-d7}, [%[rhs_ptr]]!\n"
+                 "vld1.f32 {d8-d9}, [r0]!\n"
+
+                 "vmla.f32 q2, q1, d0[0]\n"
+                 "vst1.f32 {d4-d5}, [%[res_ptr]]!\n"
+
+                 "vmla.f32 q4, q3, d0[0]\n"
+                 "vst1.f32 {d8-d9}, [%[res_ptr]]!\n"
+                 : [rhs_ptr] "+r"(rhs_ptr), [res_ptr] "+r"(res_ptr), [nn] "+r"(nn)
+                 : [lhs_data] "r"(lhs_data)
+                 : "r0", "q0", "q1", "q2", "q3", "q4", "cc");
+  }
+  if (rn > 0)
+  {
+    int _nn = rn >> 2;
+    int _rn = rn & 3;
+
+    if (_nn > 0)
+    {
+      asm volatile("vdup.32 d0, %[lhs_data]\n"
+                   "vld1.f32 {d2-d3}, [%[rhs_ptr]]!\n"
+                   "vld1.f32 {d4-d5}, [%[res_ptr]]\n"
+                   "vmla.f32 q2, q1, d0[0]\n"
+                   "vst1.f32 {d4-d5}, [%[res_ptr]]!\n"
+                   : [rhs_ptr] "+r"(rhs_ptr), [res_ptr] "+r"(res_ptr)
+                   : [lhs_data] "r"(lhs_data)
+                   : "q0", "q1", "q2", "cc");
+    }
+    if (_rn > 0)
+    {
+      for (int i = 0; i < _rn; i++)
+      {
+        res_ptr[i] += lhs_data * rhs_ptr[i];
+      }
+    }
+  }
+}
+#endif // __aarch64__
+
+} // namespace srcn
+} // namespace nnfw
diff --git a/runtimes/libs/srcn/src/sgemm_kernel.h b/runtimes/libs/srcn/src/sgemm_kernel.h
new file mode 100644
index 000000000..77d90b136
--- /dev/null
+++ b/runtimes/libs/srcn/src/sgemm_kernel.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_SRCN_SGEMM_KERNEL_H__
+#define __NNFW_SRCN_SGEMM_KERNEL_H__
+
+#include "srcn/conv_type.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+void _sgemm_rowmajor_macro_kernel_divnm(const int mr, const int nr, const int mb, const int nb,
+                                        const int kb, const float *lhs_ptr, const float *rhs_ptr,
+                                        float *res_ptr, const int k0, const int nstride,
+                                        const int kstride);
+
+void _sgemm_rowmajor_macro_kernel_divmn(const int mr, const int nr, const int mb, const int nb,
+                                        const int kb, const float *lhs_ptr, const float *rhs_ptr,
+                                        float *res_ptr, const int k0, const int nstride,
+                                        const int kstride);
+
+void _sgemm_colmajor_macro_kernel_divnm(const int mr, const int nr, const int mb, const int nb,
+                                        const int kb, const float *lhs_ptr, const float *rhs_ptr,
+                                        float *res_ptr, const int k0, const int mstride,
+                                        const int kstride);
+
+void _sgemm_colmajor_macro_kernel_divmn(const int mr, const int nr, const int mb, const int nb,
+                                        const int kb, const float *lhs_ptr, const float *rhs_ptr,
+                                        float *res_ptr, const int k0, const int mstride,
+                                        const int kstride);
+
+void _sparse_sgemm_kernel(const int nb, float lhs_data, const float *rhs_ptr, float *res_ptr);
+
+} // namespace srcn
+} // namespace nnfw
+
+#endif // __NNFW_SRCN_SGEMM_KERNEL_H__
diff --git a/runtimes/libs/srcn/src/sgemm_pack.cc b/runtimes/libs/srcn/src/sgemm_pack.cc
new file mode 100644
index 000000000..83eb6caef
--- /dev/null
+++ b/runtimes/libs/srcn/src/sgemm_pack.cc
@@ -0,0 +1,2316 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdlib.h>
+#include <arm_neon.h>
+
+#include "srcn/conv_type.h"
+#include "common.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+void _pack_rowmajor_notrans_lhs(const int mr, const int mb, const int kb, const int stride,
+                                const float *lhs_ptr, float *plhs_ptr)
+{
+  const int nm = mb / mr;
+  const int rm = mb % mr;
+
+  switch (mr)
+  {
+#if __aarch64__
+    case 24:
+      for (int i = 0; i < nm; i++)
+      {
+        int nk = kb >> 2;
+        int rk = kb & 0x03;
+
+        const float *lhs_temp = lhs_ptr;
+        const int _stride = stride << 2;
+
+        if (nk > 0)
+        {
+          asm volatile("0:\n"
+                       "mov x0, %[lhs_temp]\n"
+
+                       "ld1 {v4.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v5.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v6.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v7.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+
+                       "zip1 v28.4s, v4.4s, v6.4s\n"
+                       "zip2 v30.4s, v4.4s, v6.4s\n"
+                       "zip1 v29.4s, v5.4s, v7.4s\n"
+                       "zip2 v31.4s, v5.4s, v7.4s\n"
+                       "zip1 v4.4s, v28.4s, v29.4s\n"
+                       "zip2 v5.4s, v28.4s, v29.4s\n"
+                       "zip1 v6.4s, v30.4s, v31.4s\n"
+                       "zip2 v7.4s, v30.4s, v31.4s\n"
+
+                       "ld1 {v8.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v9.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v10.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v11.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+
+                       "zip1 v28.4s, v8.4s, v10.4s\n"
+                       "zip2 v30.4s, v8.4s, v10.4s\n"
+                       "zip1 v29.4s, v9.4s, v11.4s\n"
+                       "zip2 v31.4s, v9.4s, v11.4s\n"
+                       "zip1 v8.4s, v28.4s, v29.4s\n"
+                       "zip2 v9.4s, v28.4s, v29.4s\n"
+                       "zip1 v10.4s, v30.4s, v31.4s\n"
+                       "zip2 v11.4s, v30.4s, v31.4s\n"
+
+                       "ld1 {v12.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v13.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v14.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v15.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+
+                       "zip1 v28.4s, v12.4s, v14.4s\n"
+                       "zip2 v30.4s, v12.4s, v14.4s\n"
+                       "zip1 v29.4s, v13.4s, v15.4s\n"
+                       "zip2 v31.4s, v13.4s, v15.4s\n"
+                       "zip1 v12.4s, v28.4s, v29.4s\n"
+                       "zip2 v13.4s, v28.4s, v29.4s\n"
+                       "zip1 v14.4s, v30.4s, v31.4s\n"
+                       "zip2 v15.4s, v30.4s, v31.4s\n"
+
+                       "ld1 {v16.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v17.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v18.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v19.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+
+                       "zip1 v28.4s, v16.4s, v18.4s\n"
+                       "zip2 v30.4s, v16.4s, v18.4s\n"
+                       "zip1 v29.4s, v17.4s, v19.4s\n"
+                       "zip2 v31.4s, v17.4s, v19.4s\n"
+                       "zip1 v16.4s, v28.4s, v29.4s\n"
+                       "zip2 v17.4s, v28.4s, v29.4s\n"
+                       "zip1 v18.4s, v30.4s, v31.4s\n"
+                       "zip2 v19.4s, v30.4s, v31.4s\n"
+
+                       "ld1 {v20.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v21.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v22.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v23.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+
+                       "zip1 v28.4s, v20.4s, v22.4s\n"
+                       "zip2 v30.4s, v20.4s, v22.4s\n"
+                       "zip1 v29.4s, v21.4s, v23.4s\n"
+                       "zip2 v31.4s, v21.4s, v23.4s\n"
+                       "zip1 v20.4s, v28.4s, v29.4s\n"
+                       "zip2 v21.4s, v28.4s, v29.4s\n"
+                       "zip1 v22.4s, v30.4s, v31.4s\n"
+                       "zip2 v23.4s, v30.4s, v31.4s\n"
+
+                       "ld1 {v24.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v25.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v26.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v27.4s}, [x0]\n"
+
+                       "zip1 v28.4s, v24.4s, v26.4s\n"
+                       "zip2 v30.4s, v24.4s, v26.4s\n"
+                       "zip1 v29.4s, v25.4s, v27.4s\n"
+                       "zip2 v31.4s, v25.4s, v27.4s\n"
+                       "zip1 v24.4s, v28.4s, v29.4s\n"
+                       "zip2 v25.4s, v28.4s, v29.4s\n"
+                       "zip1 v26.4s, v30.4s, v31.4s\n"
+                       "zip2 v27.4s, v30.4s, v31.4s\n"
+
+                       "st1 {v4.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v8.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v12.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v16.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v20.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v24.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v5.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v9.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v13.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v17.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v21.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v25.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v6.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v10.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v14.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v18.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v22.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v26.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v7.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v11.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v15.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v19.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v23.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v27.4s}, [%[plhs_ptr]], #16\n"
+
+                       "subs %[nk], %[nk], #1\n"
+                       "add %[lhs_temp], %[lhs_temp], #16\n"
+                       "bne 0b\n"
+                       : [lhs_temp] "+r"(lhs_temp), [plhs_ptr] "+r"(plhs_ptr), [nk] "+r"(nk)
+                       : [_stride] "r"(_stride)
+                       : "cc", "memory", "x0", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11",
+                         "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21",
+                         "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31");
+        }
+
+        for (int j = 0; j < rk; j++)
+        {
+          plhs_ptr[0] = lhs_temp[0];
+          plhs_ptr[1] = lhs_temp[stride];
+          plhs_ptr[2] = lhs_temp[stride << 1];
+          plhs_ptr[3] = lhs_temp[3 * stride];
+          plhs_ptr[4] = lhs_temp[stride << 2];
+          plhs_ptr[5] = lhs_temp[5 * stride];
+          plhs_ptr[6] = lhs_temp[6 * stride];
+          plhs_ptr[7] = lhs_temp[7 * stride];
+          plhs_ptr[8] = lhs_temp[stride << 3];
+          plhs_ptr[9] = lhs_temp[9 * stride];
+          plhs_ptr[10] = lhs_temp[10 * stride];
+          plhs_ptr[11] = lhs_temp[11 * stride];
+          plhs_ptr[12] = lhs_temp[0];
+          plhs_ptr[13] = lhs_temp[13 * stride];
+          plhs_ptr[14] = lhs_temp[14 * stride];
+          plhs_ptr[15] = lhs_temp[15 * stride];
+          plhs_ptr[16] = lhs_temp[stride << 4];
+          plhs_ptr[17] = lhs_temp[17 * stride];
+          plhs_ptr[18] = lhs_temp[18 * stride];
+          plhs_ptr[19] = lhs_temp[19 * stride];
+          plhs_ptr[20] = lhs_temp[20 * stride];
+          plhs_ptr[21] = lhs_temp[21 * stride];
+          plhs_ptr[22] = lhs_temp[22 * stride];
+          plhs_ptr[23] = lhs_temp[23 * stride];
+          plhs_ptr += mr;
+          lhs_temp++;
+        }
+
+        lhs_ptr += mr * stride;
+      }
+      break;
+    case 16:
+      for (int i = 0; i < nm; i++)
+      {
+        int nk = kb >> 2;
+        int rk = kb & 0x03;
+
+        const float *lhs_temp = lhs_ptr;
+        const int _stride = stride << 2;
+
+        if (nk > 0)
+        {
+          asm volatile("0:\n"
+                       "mov x0, %[lhs_temp]\n"
+
+                       "ld1 {v4.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v5.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v6.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v7.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+
+                       "zip1 v28.4s, v4.4s, v6.4s\n"
+                       "zip2 v30.4s, v4.4s, v6.4s\n"
+                       "zip1 v29.4s, v5.4s, v7.4s\n"
+                       "zip2 v31.4s, v5.4s, v7.4s\n"
+                       "zip1 v4.4s, v28.4s, v29.4s\n"
+                       "zip2 v5.4s, v28.4s, v29.4s\n"
+                       "zip1 v6.4s, v30.4s, v31.4s\n"
+                       "zip2 v7.4s, v30.4s, v31.4s\n"
+
+                       "ld1 {v8.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v9.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v10.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v11.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+
+                       "zip1 v28.4s, v8.4s, v10.4s\n"
+                       "zip2 v30.4s, v8.4s, v10.4s\n"
+                       "zip1 v29.4s, v9.4s, v11.4s\n"
+                       "zip2 v31.4s, v9.4s, v11.4s\n"
+                       "zip1 v8.4s, v28.4s, v29.4s\n"
+                       "zip2 v9.4s, v28.4s, v29.4s\n"
+                       "zip1 v10.4s, v30.4s, v31.4s\n"
+                       "zip2 v11.4s, v30.4s, v31.4s\n"
+
+                       "ld1 {v12.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v13.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v14.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v15.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+
+                       "zip1 v28.4s, v12.4s, v14.4s\n"
+                       "zip2 v30.4s, v12.4s, v14.4s\n"
+                       "zip1 v29.4s, v13.4s, v15.4s\n"
+                       "zip2 v31.4s, v13.4s, v15.4s\n"
+                       "zip1 v12.4s, v28.4s, v29.4s\n"
+                       "zip2 v13.4s, v28.4s, v29.4s\n"
+                       "zip1 v14.4s, v30.4s, v31.4s\n"
+                       "zip2 v15.4s, v30.4s, v31.4s\n"
+
+                       "ld1 {v16.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v17.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v18.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v19.4s}, [x0]\n"
+
+                       "zip1 v28.4s, v16.4s, v18.4s\n"
+                       "zip2 v30.4s, v16.4s, v18.4s\n"
+                       "zip1 v29.4s, v17.4s, v19.4s\n"
+                       "zip2 v31.4s, v17.4s, v19.4s\n"
+                       "zip1 v16.4s, v28.4s, v29.4s\n"
+                       "zip2 v17.4s, v28.4s, v29.4s\n"
+                       "zip1 v18.4s, v30.4s, v31.4s\n"
+                       "zip2 v19.4s, v30.4s, v31.4s\n"
+
+                       "st1 {v4.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v8.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v12.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v16.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v5.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v9.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v13.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v17.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v6.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v10.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v14.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v18.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v7.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v11.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v15.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v19.4s}, [%[plhs_ptr]], #16\n"
+
+                       "subs %[nk], %[nk], #1\n"
+                       "add %[lhs_temp], %[lhs_temp], #16\n"
+                       "bne 0b\n"
+                       : [lhs_temp] "+r"(lhs_temp), [plhs_ptr] "+r"(plhs_ptr), [nk] "+r"(nk)
+                       : [_stride] "r"(_stride)
+                       : "cc", "memory", "x0", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11",
+                         "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v28", "v29",
+                         "v30", "v31");
+        }
+
+        for (int j = 0; j < rk; j++)
+        {
+          plhs_ptr[0] = lhs_temp[0];
+          plhs_ptr[1] = lhs_temp[stride];
+          plhs_ptr[2] = lhs_temp[stride << 1];
+          plhs_ptr[3] = lhs_temp[3 * stride];
+          plhs_ptr[4] = lhs_temp[stride << 2];
+          plhs_ptr[5] = lhs_temp[5 * stride];
+          plhs_ptr[6] = lhs_temp[6 * stride];
+          plhs_ptr[7] = lhs_temp[7 * stride];
+          plhs_ptr[8] = lhs_temp[stride << 3];
+          plhs_ptr[9] = lhs_temp[9 * stride];
+          plhs_ptr[10] = lhs_temp[10 * stride];
+          plhs_ptr[11] = lhs_temp[11 * stride];
+          plhs_ptr[12] = lhs_temp[0];
+          plhs_ptr[13] = lhs_temp[13 * stride];
+          plhs_ptr[14] = lhs_temp[14 * stride];
+          plhs_ptr[15] = lhs_temp[15 * stride];
+          plhs_ptr += mr;
+          lhs_temp++;
+        }
+
+        lhs_ptr += mr * stride;
+      }
+      break;
+#endif // __aarch64__
+    case 12:
+      for (int i = 0; i < nm; i++)
+      {
+        int nk = kb >> 2;
+        int rk = kb & 0x03;
+
+        const float *lhs_temp = lhs_ptr;
+        const int _stride = stride << 2;
+
+        if (nk > 0)
+        {
+#if __aarch64__
+          asm volatile("0:\n"
+                       "mov x0, %[lhs_temp]\n"
+
+                       "ld1 {v4.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v5.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v6.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v7.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+
+                       "zip1 v28.4s, v4.4s, v6.4s\n"
+                       "zip2 v30.4s, v4.4s, v6.4s\n"
+                       "zip1 v29.4s, v5.4s, v7.4s\n"
+                       "zip2 v31.4s, v5.4s, v7.4s\n"
+                       "zip1 v4.4s, v28.4s, v29.4s\n"
+                       "zip2 v5.4s, v28.4s, v29.4s\n"
+                       "zip1 v6.4s, v30.4s, v31.4s\n"
+                       "zip2 v7.4s, v30.4s, v31.4s\n"
+
+                       "ld1 {v8.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v9.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v10.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v11.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+
+                       "zip1 v28.4s, v8.4s, v10.4s\n"
+                       "zip2 v30.4s, v8.4s, v10.4s\n"
+                       "zip1 v29.4s, v9.4s, v11.4s\n"
+                       "zip2 v31.4s, v9.4s, v11.4s\n"
+                       "zip1 v8.4s, v28.4s, v29.4s\n"
+                       "zip2 v9.4s, v28.4s, v29.4s\n"
+                       "zip1 v10.4s, v30.4s, v31.4s\n"
+                       "zip2 v11.4s, v30.4s, v31.4s\n"
+
+                       "ld1 {v12.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v13.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v14.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v15.4s}, [x0]\n"
+
+                       "zip1 v28.4s, v12.4s, v14.4s\n"
+                       "zip2 v30.4s, v12.4s, v14.4s\n"
+                       "zip1 v29.4s, v13.4s, v15.4s\n"
+                       "zip2 v31.4s, v13.4s, v15.4s\n"
+                       "zip1 v12.4s, v28.4s, v29.4s\n"
+                       "zip2 v13.4s, v28.4s, v29.4s\n"
+                       "zip1 v14.4s, v30.4s, v31.4s\n"
+                       "zip2 v15.4s, v30.4s, v31.4s\n"
+
+                       "st1 {v4.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v8.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v12.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v5.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v9.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v13.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v6.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v10.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v14.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v7.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v11.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v15.4s}, [%[plhs_ptr]], #16\n"
+
+                       "subs %[nk], %[nk], #1\n"
+                       "add %[lhs_temp], %[lhs_temp], #16\n"
+                       "bne 0b\n"
+                       : [lhs_temp] "+r"(lhs_temp), [plhs_ptr] "+r"(plhs_ptr), [nk] "+r"(nk)
+                       : [_stride] "r"(_stride)
+                       : "cc", "memory", "x0", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11",
+                         "v12", "v13", "v14", "v15", "v28", "v29", "v30", "v31");
+#else  // __aarch64__
+          asm volatile("0:\n"
+                       "mov r0, %[lhs_temp]\n"
+
+                       "vld1.f32 {d8-d9}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d10-d11}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d12-d13}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d14-d15}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+
+                       "vzip.32 q4, q6\n"
+                       "vzip.32 q5, q7\n"
+                       "vzip.32 q4, q5\n"
+                       "vzip.32 q6, q7\n"
+
+                       "vld1.f32 {d16-d17}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d18-d19}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d20-d21}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d22-d23}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+
+                       "vzip.32 q8, q10\n"
+                       "vzip.32 q9, q11\n"
+                       "vzip.32 q8, q9\n"
+                       "vzip.32 q10, q11\n"
+
+                       "vld1.f32 {d24-d25}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d26-d27}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d28-d29}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d30-d31}, [r0]\n"
+
+                       "vzip.32 q12, q14\n"
+                       "vzip.32 q13, q15\n"
+                       "vzip.32 q12, q13\n"
+                       "vzip.32 q14, q15\n"
+
+                       "vst1.f32 {d8-d9}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d16-d17}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d24-d25}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d10-d11}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d18-d19}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d26-d27}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d12-d13}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d20-d21}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d28-d29}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d14-d15}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d22-d23}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d30-d31}, [%[plhs_ptr]]!\n"
+
+                       "subs %[nk], %[nk], #1\n"
+                       "add %[lhs_temp], %[lhs_temp], #16\n"
+                       "bne 0b\n"
+                       : [lhs_temp] "+r"(lhs_temp), [plhs_ptr] "+r"(plhs_ptr), [nk] "+r"(nk)
+                       : [_stride] "r"(_stride)
+                       : "cc", "memory", "r0", "q4", "q5", "q6", "q7", "q8", "q9", "q10", "q11",
+                         "q12", "q13", "q14", "q15");
+#endif // __aarch64__
+        }
+
+        for (int j = 0; j < rk; j++)
+        {
+          plhs_ptr[0] = lhs_temp[0];
+          plhs_ptr[1] = lhs_temp[stride];
+          plhs_ptr[2] = lhs_temp[stride << 1];
+          plhs_ptr[3] = lhs_temp[3 * stride];
+          plhs_ptr[4] = lhs_temp[stride << 2];
+          plhs_ptr[5] = lhs_temp[5 * stride];
+          plhs_ptr[6] = lhs_temp[6 * stride];
+          plhs_ptr[7] = lhs_temp[7 * stride];
+          plhs_ptr[8] = lhs_temp[stride << 3];
+          plhs_ptr[9] = lhs_temp[9 * stride];
+          plhs_ptr[10] = lhs_temp[10 * stride];
+          plhs_ptr[11] = lhs_temp[11 * stride];
+          plhs_ptr += mr;
+          lhs_temp++;
+        }
+
+        lhs_ptr += mr * stride;
+      }
+      break;
+    case 8:
+      for (int i = 0; i < nm; i++)
+      {
+        int nk = kb >> 2;
+        int rk = kb & 0x03;
+
+        const float *lhs_temp = lhs_ptr;
+        const int _stride = stride << 2;
+
+        if (nk > 0)
+        {
+#if __aarch64__
+          asm volatile("0:\n"
+                       "mov x0, %[lhs_temp]\n"
+
+                       "ld1 {v4.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v5.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v6.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v7.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+
+                       "zip1 v28.4s, v4.4s, v6.4s\n"
+                       "zip2 v30.4s, v4.4s, v6.4s\n"
+                       "zip1 v29.4s, v5.4s, v7.4s\n"
+                       "zip2 v31.4s, v5.4s, v7.4s\n"
+                       "zip1 v4.4s, v28.4s, v29.4s\n"
+                       "zip2 v5.4s, v28.4s, v29.4s\n"
+                       "zip1 v6.4s, v30.4s, v31.4s\n"
+                       "zip2 v7.4s, v30.4s, v31.4s\n"
+
+                       "ld1 {v8.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v9.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v10.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v11.4s}, [x0]\n"
+
+                       "zip1 v28.4s, v8.4s, v10.4s\n"
+                       "zip2 v30.4s, v8.4s, v10.4s\n"
+                       "zip1 v29.4s, v9.4s, v11.4s\n"
+                       "zip2 v31.4s, v9.4s, v11.4s\n"
+                       "zip1 v8.4s, v28.4s, v29.4s\n"
+                       "zip2 v9.4s, v28.4s, v29.4s\n"
+                       "zip1 v10.4s, v30.4s, v31.4s\n"
+                       "zip2 v11.4s, v30.4s, v31.4s\n"
+
+                       "st1 {v4.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v8.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v5.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v9.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v6.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v10.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v7.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v11.4s}, [%[plhs_ptr]], #16\n"
+
+                       "subs %[nk], %[nk], #1\n"
+                       "add %[lhs_temp], %[lhs_temp], #16\n"
+                       "bne 0b\n"
+                       : [lhs_temp] "+r"(lhs_temp), [plhs_ptr] "+r"(plhs_ptr), [nk] "+r"(nk)
+                       : [_stride] "r"(_stride)
+                       : "cc", "memory", "x0", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11",
+                         "v28", "v29", "v30", "v31");
+#else  // __aarch64__
+          asm volatile("0:\n"
+                       "mov r0, %[lhs_temp]\n"
+
+                       "vld1.f32 {d8-d9}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d10-d11}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d12-d13}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d14-d15}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+
+                       "vzip.32 q4, q6\n"
+                       "vzip.32 q5, q7\n"
+                       "vzip.32 q4, q5\n"
+                       "vzip.32 q6, q7\n"
+
+                       "vld1.f32 {d16-d17}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d18-d19}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d20-d21}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d22-d23}, [r0]\n"
+
+                       "vzip.32 q8, q10\n"
+                       "vzip.32 q9, q11\n"
+                       "vzip.32 q8, q9\n"
+                       "vzip.32 q10, q11\n"
+
+                       "vst1.f32 {d8-d9}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d16-d17}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d10-d11}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d18-d19}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d12-d13}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d20-d21}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d14-d15}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d22-d23}, [%[plhs_ptr]]!\n"
+
+                       "subs %[nk], %[nk], #1\n"
+                       "add %[lhs_temp], %[lhs_temp], #16\n"
+                       "bne 0b\n"
+                       : [lhs_temp] "+r"(lhs_temp), [plhs_ptr] "+r"(plhs_ptr), [nk] "+r"(nk)
+                       : [_stride] "r"(_stride)
+                       : "cc", "memory", "r0", "q4", "q5", "q6", "q7", "q8", "q9", "q10", "q11");
+#endif // __aarch64__
+        }
+
+        for (int j = 0; j < rk; j++)
+        {
+          plhs_ptr[0] = lhs_temp[0];
+          plhs_ptr[1] = lhs_temp[stride];
+          plhs_ptr[2] = lhs_temp[stride << 1];
+          plhs_ptr[3] = lhs_temp[3 * stride];
+          plhs_ptr[4] = lhs_temp[stride << 2];
+          plhs_ptr[5] = lhs_temp[5 * stride];
+          plhs_ptr[6] = lhs_temp[6 * stride];
+          plhs_ptr[7] = lhs_temp[7 * stride];
+          plhs_ptr += mr;
+          lhs_temp++;
+        }
+
+        lhs_ptr += mr * stride;
+      }
+      break;
+    case 6:
+      for (int i = 0; i < nm; i++)
+      {
+        int nk = kb >> 2;
+        int rk = kb & 0x03;
+
+        const float *lhs_temp = lhs_ptr;
+        const int _stride = stride << 2;
+
+        if (nk > 0)
+        {
+#if __aarch64__
+          // TODO: 4--->6
+          asm volatile("0:\n"
+                       "mov x0, %[lhs_temp]\n"
+
+                       "ld1 {v4.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v5.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v6.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v7.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v8.4s}, [x0]\n"
+
+                       "zip1 v28.4s, v4.4s, v6.4s\n"
+                       "zip2 v30.4s, v4.4s, v6.4s\n"
+                       "zip1 v29.4s, v5.4s, v7.4s\n"
+                       "zip2 v31.4s, v5.4s, v7.4s\n"
+                       "zip1 v4.4s, v28.4s, v29.4s\n"
+                       "zip2 v5.4s, v28.4s, v29.4s\n"
+                       "zip1 v6.4s, v30.4s, v31.4s\n"
+                       "zip2 v7.4s, v30.4s, v31.4s\n"
+
+                       "st1 {v4.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v5.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v6.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v7.4s}, [%[plhs_ptr]], #16\n"
+
+                       "subs %[nk], %[nk], #1\n"
+                       "add %[lhs_temp], %[lhs_temp], #16\n"
+                       "bne 0b\n"
+                       : [lhs_temp] "+r"(lhs_temp), [plhs_ptr] "+r"(plhs_ptr), [nk] "+r"(nk)
+                       : [_stride] "r"(_stride)
+                       : "cc", "memory", "x0", "v4", "v5", "v6", "v7", "v28", "v29", "v30", "v31");
+#else  // __aarch64__
+          asm volatile("0:\n"
+                       "mov r0, %[lhs_temp]\n"
+
+                       "vld1.f32 {d8-d9}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d10-d11}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d12-d13}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d14-d15}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d16-d17}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d18-d19}, [r0]\n"
+
+                       "vzip.32 q4, q6\n"
+                       "vzip.32 q5, q7\n"
+                       "vzip.32 q4, q5\n"
+                       "vzip.32 q6, q7\n"
+                       "vzip.32 q8, q9\n"
+
+                       "vst1.f32 {d8-d9}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d16}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d10-d11}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d17}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d12-d13}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d18}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d14-d15}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d19}, [%[plhs_ptr]]!\n"
+
+                       "subs %[nk], %[nk], #1\n"
+                       "add %[lhs_temp], %[lhs_temp], #16\n"
+                       "bne 0b\n"
+                       : [lhs_temp] "+r"(lhs_temp), [plhs_ptr] "+r"(plhs_ptr), [nk] "+r"(nk)
+                       : [_stride] "r"(_stride)
+                       : "cc", "memory", "r0", "q4", "q5", "q6", "q7", "q8", "q9");
+#endif // __aarch64__
+        }
+
+        for (int j = 0; j < rk; j++)
+        {
+          plhs_ptr[0] = lhs_temp[0];
+          plhs_ptr[1] = lhs_temp[stride];
+          plhs_ptr[2] = lhs_temp[stride << 1];
+          plhs_ptr[3] = lhs_temp[3 * stride];
+          plhs_ptr[4] = lhs_temp[stride << 2];
+          plhs_ptr[5] = lhs_temp[5 * stride];
+          plhs_ptr += mr;
+          lhs_temp++;
+        }
+
+        lhs_ptr += mr * stride;
+      }
+      break;
+    case 4:
+      for (int i = 0; i < nm; i++)
+      {
+        int nk = kb >> 2;
+        int rk = kb & 0x03;
+
+        const float *lhs_temp = lhs_ptr;
+        const int _stride = stride << 2;
+
+        if (nk > 0)
+        {
+#if __aarch64__
+          asm volatile("0:\n"
+                       "mov x0, %[lhs_temp]\n"
+
+                       "ld1 {v4.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v5.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v6.4s}, [x0]\n"
+                       "add x0, x0, %[_stride]\n"
+                       "ld1 {v7.4s}, [x0]\n"
+
+                       "zip1 v28.4s, v4.4s, v6.4s\n"
+                       "zip2 v30.4s, v4.4s, v6.4s\n"
+                       "zip1 v29.4s, v5.4s, v7.4s\n"
+                       "zip2 v31.4s, v5.4s, v7.4s\n"
+                       "zip1 v4.4s, v28.4s, v29.4s\n"
+                       "zip2 v5.4s, v28.4s, v29.4s\n"
+                       "zip1 v6.4s, v30.4s, v31.4s\n"
+                       "zip2 v7.4s, v30.4s, v31.4s\n"
+
+                       "st1 {v4.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v5.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v6.4s}, [%[plhs_ptr]], #16\n"
+                       "st1 {v7.4s}, [%[plhs_ptr]], #16\n"
+
+                       "subs %[nk], %[nk], #1\n"
+                       "add %[lhs_temp], %[lhs_temp], #16\n"
+                       "bne 0b\n"
+                       : [lhs_temp] "+r"(lhs_temp), [plhs_ptr] "+r"(plhs_ptr), [nk] "+r"(nk)
+                       : [_stride] "r"(_stride)
+                       : "cc", "memory", "x0", "v4", "v5", "v6", "v7", "v28", "v29", "v30", "v31");
+#else  // __aarch64__
+          asm volatile("0:\n"
+                       "mov r0, %[lhs_temp]\n"
+
+                       "vld1.f32 {d8-d9}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d10-d11}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d12-d13}, [r0]\n"
+                       "add r0, r0, %[_stride]\n"
+                       "vld1.f32 {d14-d15}, [r0]\n"
+
+                       "vzip.32 q4, q6\n"
+                       "vzip.32 q5, q7\n"
+                       "vzip.32 q4, q5\n"
+                       "vzip.32 q6, q7\n"
+
+                       "vst1.f32 {d8-d9}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d10-d11}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d12-d13}, [%[plhs_ptr]]!\n"
+                       "vst1.f32 {d14-d15}, [%[plhs_ptr]]!\n"
+
+                       "subs %[nk], %[nk], #1\n"
+                       "add %[lhs_temp], %[lhs_temp], #16\n"
+                       "bne 0b\n"
+                       : [lhs_temp] "+r"(lhs_temp), [plhs_ptr] "+r"(plhs_ptr), [nk] "+r"(nk)
+                       : [_stride] "r"(_stride)
+                       : "cc", "memory", "r0", "q4", "q5", "q6", "q7");
+#endif // __aarch64__
+        }
+
+        for (int j = 0; j < rk; j++)
+        {
+          plhs_ptr[0] = lhs_temp[0];
+          plhs_ptr[1] = lhs_temp[stride];
+          plhs_ptr[2] = lhs_temp[stride << 1];
+          plhs_ptr[3] = lhs_temp[3 * stride];
+          plhs_ptr += mr;
+          lhs_temp++;
+        }
+
+        lhs_ptr += mr * stride;
+      }
+      break;
+    default:
+      break;
+  }
+
+  if (rm > 0)
+  {
+    for (int j = 0; j < kb; j++)
+    {
+      for (int i = 0; i < rm; i++)
+      {
+        plhs_ptr[i] = lhs_ptr[i * stride];
+      }
+      for (int i = rm; i < mr; i++)
+      {
+        plhs_ptr[i] = 0.f;
+      }
+      plhs_ptr += mr;
+      lhs_ptr++;
+    }
+  }
+}
+
+void _pack_rowmajor_notrans_rhs(const int nr, const int nb, const int kb, const int stride,
+                                const float *rhs_ptr, float *prhs_ptr)
+{
+  const int nn = nb / nr;
+  const int rn = nb % nr;
+
+  switch (nr)
+  {
+    case 24:
+      for (int j = 0; j < nn; j++)
+      {
+        const float *rhs_temp = rhs_ptr;
+        float32x4_t q0, q1, q2, q3, q4, q5;
+        for (int i = 0; i < kb; i++)
+        {
+          q0 = vld1q_f32(rhs_temp);
+          q1 = vld1q_f32(rhs_temp + 4);
+          q2 = vld1q_f32(rhs_temp + 8);
+          q3 = vld1q_f32(rhs_temp + 12);
+          q4 = vld1q_f32(rhs_temp + 16);
+          q5 = vld1q_f32(rhs_temp + 20);
+          vst1q_f32(prhs_ptr, q0);
+          vst1q_f32(prhs_ptr + 4, q1);
+          vst1q_f32(prhs_ptr + 8, q2);
+          vst1q_f32(prhs_ptr + 12, q3);
+          vst1q_f32(prhs_ptr + 16, q4);
+          vst1q_f32(prhs_ptr + 20, q5);
+
+          rhs_temp += stride;
+          prhs_ptr += nr;
+        }
+
+        rhs_ptr += nr;
+      }
+      break;
+    case 16:
+      for (int j = 0; j < nn; j++)
+      {
+        const float *rhs_temp = rhs_ptr;
+        float32x4_t q0, q1, q2, q3;
+        for (int i = 0; i < kb; i++)
+        {
+          q0 = vld1q_f32(rhs_temp);
+          q1 = vld1q_f32(rhs_temp + 4);
+          q2 = vld1q_f32(rhs_temp + 8);
+          q3 = vld1q_f32(rhs_temp + 12);
+          vst1q_f32(prhs_ptr, q0);
+          vst1q_f32(prhs_ptr + 4, q1);
+          vst1q_f32(prhs_ptr + 8, q2);
+          vst1q_f32(prhs_ptr + 12, q3);
+
+          rhs_temp += stride;
+          prhs_ptr += nr;
+        }
+
+        rhs_ptr += nr;
+      }
+      break;
+    case 12:
+      for (int j = 0; j < nn; j++)
+      {
+        const float *rhs_temp = rhs_ptr;
+        float32x4_t q0, q1, q2;
+        for (int i = 0; i < kb; i++)
+        {
+          q0 = vld1q_f32(rhs_temp);
+          q1 = vld1q_f32(rhs_temp + 4);
+          q2 = vld1q_f32(rhs_temp + 8);
+          vst1q_f32(prhs_ptr, q0);
+          vst1q_f32(prhs_ptr + 4, q1);
+          vst1q_f32(prhs_ptr + 8, q2);
+
+          rhs_temp += stride;
+          prhs_ptr += nr;
+        }
+
+        rhs_ptr += nr;
+      }
+      break;
+    case 8:
+      for (int j = 0; j < nn; j++)
+
+      {
+        const float *rhs_temp = rhs_ptr;
+        float32x4_t q0, q1, q2, q3;
+
+        int i = 0;
+        for (; i + 1 < kb; i += 2)
+        {
+          q0 = vld1q_f32(rhs_temp);
+          q1 = vld1q_f32(rhs_temp + 4);
+          q2 = vld1q_f32(rhs_temp + stride);
+          q3 = vld1q_f32(rhs_temp + stride + 4);
+          vst1q_f32(prhs_ptr, q0);
+          vst1q_f32(prhs_ptr + 4, q1);
+          vst1q_f32(prhs_ptr + 8, q2);
+          vst1q_f32(prhs_ptr + 12, q3);
+
+          rhs_temp += stride << 1;
+          prhs_ptr += nr << 1;
+        }
+
+        for (; i < kb; i++)
+        {
+          q0 = vld1q_f32(rhs_temp);
+          q1 = vld1q_f32(rhs_temp + 4);
+          vst1q_f32(prhs_ptr, q0);
+          vst1q_f32(prhs_ptr + 4, q1);
+
+          rhs_temp += stride;
+          prhs_ptr += nr;
+        }
+
+        rhs_ptr += nr;
+      }
+      break;
+    case 6:
+      for (int j = 0; j < nn; j++)
+
+      {
+        const float *rhs_temp = rhs_ptr;
+        float32x4_t q0, q2;
+        float32x2_t q1, q3;
+
+        int i = 0;
+        for (; i + 1 < kb; i += 2)
+        {
+          q0 = vld1q_f32(rhs_temp);
+          q1 = vld1_f32(rhs_temp + 4);
+
+          q2 = vld1q_f32(rhs_temp + stride);
+          q3 = vld1_f32(rhs_temp + stride + 4);
+          vst1q_f32(prhs_ptr, q0);
+          vst1_f32(prhs_ptr + 4, q1);
+          vst1q_f32(prhs_ptr + 6, q2);
+          vst1_f32(prhs_ptr + 10, q3);
+
+          rhs_temp += stride << 1;
+          prhs_ptr += nr << 1;
+        }
+
+        for (; i < kb; i++)
+        {
+          q0 = vld1q_f32(rhs_temp);
+          q1 = vld1_f32(rhs_temp + 4);
+
+          vst1q_f32(prhs_ptr, q0);
+          vst1_f32(prhs_ptr + 4, q1);
+
+          rhs_temp += stride;
+          prhs_ptr += nr;
+        }
+
+        rhs_ptr += nr;
+      }
+      break;
+    case 4:
+      for (int j = 0; j < nn; j++)
+
+      {
+        const float *rhs_temp = rhs_ptr;
+        float32x4_t q0, q1, q2, q3;
+
+        int i = 0;
+        for (; i + 3 < kb; i += 4)
+        {
+          q0 = vld1q_f32(rhs_temp);
+          q1 = vld1q_f32(rhs_temp + stride);
+          q2 = vld1q_f32(rhs_temp + (stride << 1));
+          q3 = vld1q_f32(rhs_temp + (stride * 3));
+          vst1q_f32(prhs_ptr, q0);
+          vst1q_f32(prhs_ptr + 4, q1);
+          vst1q_f32(prhs_ptr + 8, q2);
+          vst1q_f32(prhs_ptr + 12, q3);
+
+          rhs_temp += stride << 2;
+          prhs_ptr += nr << 2;
+        }
+        for (; i + 1 < kb; i += 2)
+        {
+          q0 = vld1q_f32(rhs_temp);
+          q1 = vld1q_f32(rhs_temp + stride);
+          vst1q_f32(prhs_ptr, q0);
+          vst1q_f32(prhs_ptr + 4, q1);
+
+          rhs_temp += stride << 1;
+          prhs_ptr += nr << 1;
+        }
+        for (; i < kb; i++)
+        {
+          q0 = vld1q_f32(rhs_temp);
+          vst1q_f32(prhs_ptr, q0);
+
+          rhs_temp += stride;
+          prhs_ptr += nr;
+        }
+
+        rhs_ptr += nr;
+      }
+      break;
+    default:
+      break;
+  }
+
+  if (rn > 0)
+  {
+    for (int i = 0; i < kb; i++)
+    {
+      for (int j = 0; j < rn; j++)
+      {
+        prhs_ptr[j] = rhs_ptr[j];
+      }
+      for (int j = rn; j < nr; j++)
+      {
+        prhs_ptr[j] = 0.f;
+      }
+      prhs_ptr += nr;
+      rhs_ptr += stride;
+    }
+  }
+}
+
+void _pack_rowmajor_trans_lhs(const int mr, const int mb, const int kb, const int stride,
+                              const float *lhs_ptr, float *plhs_ptr)
+{
+  _pack_rowmajor_notrans_rhs(mr, mb, kb, stride, lhs_ptr, plhs_ptr);
+}
+
+void _pack_rowmajor_trans_rhs(const int nr, const int nb, const int kb, const int stride,
+                              const float *rhs_ptr, float *prhs_ptr)
+{
+  _pack_rowmajor_notrans_lhs(nr, nb, kb, stride, rhs_ptr, prhs_ptr);
+}
+
+static inline void _pack_rowmajor_image_subn(const int nr, const int nb, const int stride,
+                                             const float *buffer, float *prhs_ptr)
+{
+  const int nn = nb / nr;
+  const int rn = nb % nr;
+
+  switch (nr)
+  {
+    case 24:
+      for (int j = 0; j < nn; j++)
+      {
+        float32x4_t q0, q1, q2, q3, q4, q5;
+        q0 = vld1q_f32(buffer);
+        q1 = vld1q_f32(buffer + 4);
+        q2 = vld1q_f32(buffer + 8);
+        q3 = vld1q_f32(buffer + 12);
+        q4 = vld1q_f32(buffer + 16);
+        q5 = vld1q_f32(buffer + 20);
+        vst1q_f32(prhs_ptr, q0);
+        vst1q_f32(prhs_ptr + 4, q1);
+        vst1q_f32(prhs_ptr + 8, q2);
+        vst1q_f32(prhs_ptr + 12, q3);
+        vst1q_f32(prhs_ptr + 16, q4);
+        vst1q_f32(prhs_ptr + 20, q5);
+        prhs_ptr += stride;
+        buffer += nr;
+      }
+      break;
+    case 16:
+      for (int j = 0; j < nn; j++)
+      {
+        float32x4_t q0, q1, q2, q3;
+        q0 = vld1q_f32(buffer);
+        q1 = vld1q_f32(buffer + 4);
+        q2 = vld1q_f32(buffer + 8);
+        q3 = vld1q_f32(buffer + 12);
+        vst1q_f32(prhs_ptr, q0);
+        vst1q_f32(prhs_ptr + 4, q1);
+        vst1q_f32(prhs_ptr + 8, q2);
+        vst1q_f32(prhs_ptr + 12, q3);
+        prhs_ptr += stride;
+        buffer += nr;
+      }
+      break;
+    case 12:
+      for (int j = 0; j < nn; j++)
+      {
+        float32x4_t q0, q1, q2;
+        q0 = vld1q_f32(buffer);
+        q1 = vld1q_f32(buffer + 4);
+        q2 = vld1q_f32(buffer + 8);
+        vst1q_f32(prhs_ptr, q0);
+        vst1q_f32(prhs_ptr + 4, q1);
+        vst1q_f32(prhs_ptr + 8, q2);
+        prhs_ptr += stride;
+        buffer += nr;
+      }
+      break;
+    case 8:
+      for (int j = 0; j < nn; j++)
+      {
+        float32x4_t q0, q1;
+        q0 = vld1q_f32(buffer);
+        q1 = vld1q_f32(buffer + 4);
+        vst1q_f32(prhs_ptr, q0);
+        vst1q_f32(prhs_ptr + 4, q1);
+        prhs_ptr += stride;
+        buffer += nr;
+      }
+      break;
+    case 6:
+      for (int j = 0; j < nn; j++)
+      {
+        float32x4_t q0;
+        float32x2_t q1;
+        q0 = vld1q_f32(buffer);
+        q1 = vld1_f32(buffer + 4);
+        vst1q_f32(prhs_ptr, q0);
+        vst1_f32(prhs_ptr + 4, q1);
+        prhs_ptr += stride;
+        buffer += nr;
+      }
+      break;
+    case 4:
+      for (int j = 0; j < nn; j++)
+      {
+        float32x4_t q0;
+        q0 = vld1q_f32(buffer);
+        vst1q_f32(prhs_ptr, q0);
+        prhs_ptr += stride;
+        buffer += nr;
+      }
+      break;
+    default:
+      break;
+  }
+
+  if (rn > 0)
+  {
+    for (int j = 0; j < rn; j++)
+    {
+      prhs_ptr[j] = buffer[j];
+    }
+    for (int j = rn; j < nr; j++)
+    {
+      prhs_ptr[j] = 0.f;
+    }
+  }
+}
+
+void _pack_rowmajor_image_rhs(const int nr, const int nb, const int kb, const int k0, const int n0,
+                              convMat_t *input, convMat_t *output, convParams_t *params,
+                              float *prhs_ptr)
+{
+  const int w = input->w;
+  const int h = input->h;
+  const int outw = output->w;
+  const int kernel_w = params->kernel_w;
+  const int kernel_h = params->kernel_h;
+  const int stride_w = params->stride_w;
+  const int stride_h = params->stride_h;
+  const int pad_w = params->pad_w;
+  const int pad_h = params->pad_h;
+
+  const int in_row0 = n0 / outw * stride_h;
+  const int in_col0 = n0 % outw * stride_w;
+  int seg0 = outw - n0 % outw;
+  if (seg0 > nb)
+    seg0 = nb;
+  int rows = (nb - seg0 + outw - 1) / outw;
+  if (seg0)
+    rows++;
+  const int segn = (nb - seg0) % outw;
+
+  float row_data[nb];
+
+  for (int i = k0; i < kb + k0; i++)
+  {
+    const int ic = i / (kernel_w * kernel_h);
+    const int in_row1 = ((i / kernel_w) % kernel_h) * params->dilation_h + in_row0;
+    const int in_col1 = i % kernel_w * params->dilation_w;
+
+#ifdef NCNN
+    const float *input_data = input->data + ic * alignSize(w * h, 16 / sizeof(float));
+#else  // NCNN
+    const float *input_data = input->data + ic * w * h;
+#endif // NCNN
+    float *buffer = row_data;
+    int in_row = in_row1 - pad_h;
+
+    for (int out_rows = rows; out_rows; out_rows--)
+    {
+      int cols = (out_rows != 1 || segn == 0) ? outw : segn;
+      int in_col = in_col1 - pad_w;
+      if (out_rows == rows)
+      {
+        cols = seg0;
+        in_col += in_col0;
+      }
+      if ((unsigned int)in_row < (unsigned int)h)
+      {
+        for (int out_col = cols; out_col; out_col--)
+        {
+          if ((unsigned int)in_col < (unsigned int)w)
+            *(buffer++) = input_data[in_row * w + in_col];
+          else
+            *(buffer++) = 0;
+          in_col += stride_w;
+        }
+      }
+      else
+      {
+        for (int out_col = cols; out_col; out_col--)
+        {
+          *(buffer++) = 0;
+          in_col += stride_w;
+        }
+      }
+
+      in_row += stride_h;
+    }
+
+    _pack_rowmajor_image_subn(nr, nb, nr * kb, row_data, prhs_ptr);
+    prhs_ptr += nr;
+  }
+}
+
+void _pack_rowmajor_image_rhs_batch(const int nr, const int nb, const int kb, const int k0,
+                                    const int n0, convMat_t *input, convMat_t *output,
+                                    convParams_t *params, float *prhs_ptr)
+{
+  const int w = input->w;
+  const int h = input->h;
+  const int c = input->c;
+
+#ifdef NCNN
+  const int seg_size = alignSize(output->w * output->h, 16 / sizeof(float));
+#else  // NCNN
+  const int seg_size = output->w * output->h;
+#endif // NCNN
+
+#ifdef NCNN
+  float *data = input->data + (alignSize(w * h, 16 / sizeof(float)) * c) * (n0 / seg_size);
+#else  // NCNN
+  float *data = input->data + (w * h * c) * (n0 / seg_size);
+#endif // NCNN
+
+  int seg0 = seg_size - n0 % seg_size;
+  if (seg0 > nb)
+    seg0 = nb;
+  int nseg = (nb - seg0 + seg_size - 1) / seg_size;
+  if (seg0)
+    nseg++;
+  const int segn = (nb - seg0) % seg_size;
+  convMat_t _input = {w, h, c, 1, data};
+
+  for (int i = 0; i < nseg; i++)
+  {
+    const int _nb = (i == 0 ? seg0 : (i == nseg - 1 ? segn : seg_size));
+    const int _n0 = (i == 0 ? seg_size - seg0 : 0);
+
+    _pack_rowmajor_image_rhs(nr, _nb, kb, k0, _n0, &_input, output, params, prhs_ptr);
+
+#ifdef NCNN
+    _input.data += alignSize(w * h, 16 / sizeof(float)) * c;
+#else  // NCNN
+    _input.data += w * h * c;
+#endif // NCNN
+  }
+}
+
+void _unpack_rowmajor_image_res(const int mb, const int nb, const int m0, const int n0,
+                                convMat_t *input, convMat_t *output, convParams_t *params,
+                                float *pres_ptr)
+{
+  const int outw = output->w;
+  const int outh = output->h;
+  const int w = input->w;
+  const int kernel_w = params->kernel_w;
+  const int kernel_h = params->kernel_h;
+  const int stride_w = params->stride_w;
+  const int stride_h = params->stride_h;
+  const int pad_w = params->pad_w;
+  const int pad_h = params->pad_h;
+
+  const int out_row0 = n0 / w * stride_h;
+  const int out_col0 = n0 % w * stride_w;
+  int seg0 = w - n0 % w;
+  if (seg0 > nb)
+    seg0 = nb;
+  int rows = (nb - seg0 + w - 1) / w;
+  if (seg0)
+    rows++;
+  const int segn = (nb - seg0) % w;
+
+  for (int i = m0; i < mb + m0; i++)
+  {
+    const int oc = i / (kernel_w * kernel_h);
+    const int out_row1 = ((i / kernel_w) % kernel_h) * params->dilation_h + out_row0;
+    const int out_col1 = i % kernel_w * params->dilation_w;
+
+#ifdef NCNN
+    float *output_data = output->data + oc * alignSize(outw * outh, 16 / sizeof(float));
+#else  // NCNN
+    float *output_data = output->data + oc * outw * outh;
+#endif // NCNN
+    int out_row = out_row1 - pad_h;
+
+    for (int in_rows = rows; in_rows; in_rows--)
+    {
+      int cols = (in_rows != 1 || segn == 0) ? w : segn;
+      int out_col = out_col1 - pad_w;
+      if (in_rows == rows)
+      {
+        cols = seg0;
+        out_col += out_col0;
+      }
+      if ((unsigned int)out_row < (unsigned int)outh)
+      {
+        for (int in_col = cols; in_col; in_col--)
+        {
+          if ((unsigned int)out_col < (unsigned int)outw)
+            output_data[out_row * outw + out_col] += *pres_ptr++;
+          else
+            pres_ptr++;
+          out_col += stride_w;
+        }
+      }
+      else
+      {
+        pres_ptr += cols;
+      }
+      out_row += stride_h;
+    }
+  }
+}
+
+// TODO:v8 & other case.
+static inline void _pack_colmajor_image_rhs_sub(const int nr, const int k, const float *buffer,
+                                                float *prhs_ptr)
+{
+  int nk = k >> 2;
+  int rk = k & 0x03;
+
+  const int _stride = k << 2;
+
+  switch (nr)
+  {
+    case 12:
+      if (nk > 0)
+      {
+#if __aarch64__
+        asm volatile("0:\n"
+                     "mov x0, %[buffer]\n"
+
+                     "ld1 {v4.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v5.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v6.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v7.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+
+                     "zip1 v28.4s, v4.4s, v6.4s\n"
+                     "zip2 v30.4s, v4.4s, v6.4s\n"
+                     "zip1 v29.4s, v5.4s, v7.4s\n"
+                     "zip2 v31.4s, v5.4s, v7.4s\n"
+                     "zip1 v4.4s, v28.4s, v29.4s\n"
+                     "zip2 v5.4s, v28.4s, v29.4s\n"
+                     "zip1 v6.4s, v30.4s, v31.4s\n"
+                     "zip2 v7.4s, v30.4s, v31.4s\n"
+
+                     "ld1 {v8.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v9.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v10.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v11.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+
+                     "zip1 v28.4s, v8.4s, v10.4s\n"
+                     "zip2 v30.4s, v8.4s, v10.4s\n"
+                     "zip1 v29.4s, v9.4s, v11.4s\n"
+                     "zip2 v31.4s, v9.4s, v11.4s\n"
+                     "zip1 v8.4s, v28.4s, v29.4s\n"
+                     "zip2 v9.4s, v28.4s, v29.4s\n"
+                     "zip1 v10.4s, v30.4s, v31.4s\n"
+                     "zip2 v11.4s, v30.4s, v31.4s\n"
+
+                     "ld1 {v12.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v13.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v14.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v15.4s}, [x0]\n"
+
+                     "zip1 v28.4s, v12.4s, v14.4s\n"
+                     "zip2 v30.4s, v12.4s, v14.4s\n"
+                     "zip1 v29.4s, v13.4s, v15.4s\n"
+                     "zip2 v31.4s, v13.4s, v15.4s\n"
+                     "zip1 v12.4s, v28.4s, v29.4s\n"
+                     "zip2 v13.4s, v28.4s, v29.4s\n"
+                     "zip1 v14.4s, v30.4s, v31.4s\n"
+                     "zip2 v15.4s, v30.4s, v31.4s\n"
+
+                     "st1 {v4.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v8.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v12.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v5.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v9.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v13.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v6.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v10.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v14.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v7.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v11.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v15.4s}, [%[prhs_ptr]], #16\n"
+
+                     "subs %[nk], %[nk], #1\n"
+                     "add %[buffer], %[buffer], #16\n"
+                     "bne 0b\n"
+                     : [buffer] "+r"(buffer), [prhs_ptr] "+r"(prhs_ptr), [nk] "+r"(nk)
+                     : [_stride] "r"(_stride)
+                     : "cc", "memory", "x0", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11",
+                       "v12", "v13", "v14", "v15", "v28", "v29", "v30", "v31");
+#else  // __aarch64__
+        asm volatile("0:\n"
+                     "mov r0, %[buffer]\n"
+
+                     "vld1.f32 {d8-d9}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d10-d11}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d12-d13}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d14-d15}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+
+                     "vzip.32 q4, q6\n"
+                     "vzip.32 q5, q7\n"
+                     "vzip.32 q4, q5\n"
+                     "vzip.32 q6, q7\n"
+
+                     "vld1.f32 {d16-d17}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d18-d19}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d20-d21}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d22-d23}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+
+                     "vzip.32 q8, q10\n"
+                     "vzip.32 q9, q11\n"
+                     "vzip.32 q8, q9\n"
+                     "vzip.32 q10, q11\n"
+
+                     "vld1.f32 {d24-d25}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d26-d27}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d28-d29}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d30-d31}, [r0]\n"
+
+                     "vzip.32 q12, q14\n"
+                     "vzip.32 q13, q15\n"
+                     "vzip.32 q12, q13\n"
+                     "vzip.32 q14, q15\n"
+
+                     "vst1.f32 {d8-d9}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d16-d17}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d24-d25}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d10-d11}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d18-d19}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d26-d27}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d12-d13}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d20-d21}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d28-d29}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d14-d15}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d22-d23}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d30-d31}, [%[prhs_ptr]]!\n"
+
+                     "subs %[nk], %[nk], #1\n"
+                     "add %[buffer], %[buffer], #16\n"
+                     "bne 0b\n"
+                     : [buffer] "+r"(buffer), [prhs_ptr] "+r"(prhs_ptr), [nk] "+r"(nk)
+                     : [_stride] "r"(_stride)
+                     : "cc", "memory", "r0", "q4", "q5", "q6", "q7", "q8", "q9", "q10", "q11",
+                       "q12", "q13", "q14", "q15");
+#endif // __aarch64__
+      }
+
+      for (int j = 0; j < rk; j++)
+      {
+        prhs_ptr[0] = buffer[0];
+        prhs_ptr[1] = buffer[k];
+        prhs_ptr[2] = buffer[k << 1];
+        prhs_ptr[3] = buffer[3 * k];
+        prhs_ptr[4] = buffer[k << 2];
+        prhs_ptr[5] = buffer[5 * k];
+        prhs_ptr[6] = buffer[6 * k];
+        prhs_ptr[7] = buffer[7 * k];
+        prhs_ptr[8] = buffer[k << 3];
+        prhs_ptr[9] = buffer[9 * k];
+        prhs_ptr[10] = buffer[10 * k];
+        prhs_ptr[11] = buffer[11 * k];
+        prhs_ptr += nr;
+        buffer++;
+      }
+      break;
+
+    case 8:
+      if (nk > 0)
+      {
+#if __aarch64__
+        asm volatile("0:\n"
+                     "mov x0, %[buffer]\n"
+
+                     "ld1 {v4.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v5.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v6.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v7.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+
+                     "zip1 v28.4s, v4.4s, v6.4s\n"
+                     "zip2 v30.4s, v4.4s, v6.4s\n"
+                     "zip1 v29.4s, v5.4s, v7.4s\n"
+                     "zip2 v31.4s, v5.4s, v7.4s\n"
+                     "zip1 v4.4s, v28.4s, v29.4s\n"
+                     "zip2 v5.4s, v28.4s, v29.4s\n"
+                     "zip1 v6.4s, v30.4s, v31.4s\n"
+                     "zip2 v7.4s, v30.4s, v31.4s\n"
+
+                     "ld1 {v8.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v9.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v10.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v11.4s}, [x0]\n"
+
+                     "zip1 v28.4s, v8.4s, v10.4s\n"
+                     "zip2 v30.4s, v8.4s, v10.4s\n"
+                     "zip1 v29.4s, v9.4s, v11.4s\n"
+                     "zip2 v31.4s, v9.4s, v11.4s\n"
+                     "zip1 v8.4s, v28.4s, v29.4s\n"
+                     "zip2 v9.4s, v28.4s, v29.4s\n"
+                     "zip1 v10.4s, v30.4s, v31.4s\n"
+                     "zip2 v11.4s, v30.4s, v31.4s\n"
+
+                     "st1 {v4.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v8.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v5.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v9.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v6.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v10.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v7.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v11.4s}, [%[prhs_ptr]], #16\n"
+
+                     "subs %[nk], %[nk], #1\n"
+                     "add %[buffer], %[buffer], #16\n"
+                     "bne 0b\n"
+                     : [buffer] "+r"(buffer), [prhs_ptr] "+r"(prhs_ptr), [nk] "+r"(nk)
+                     : [_stride] "r"(_stride)
+                     : "cc", "memory", "x0", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11",
+                       "v28", "v29", "v30", "v31");
+#else  // __aarch64__
+        asm volatile("0:\n"
+                     "mov r0, %[buffer]\n"
+
+                     "vld1.f32 {d8-d9}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d10-d11}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d12-d13}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d14-d15}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+
+                     "vzip.32 q4, q6\n"
+                     "vzip.32 q5, q7\n"
+                     "vzip.32 q4, q5\n"
+                     "vzip.32 q6, q7\n"
+
+                     "vld1.f32 {d16-d17}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d18-d19}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d20-d21}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d22-d23}, [r0]\n"
+
+                     "vzip.32 q8, q10\n"
+                     "vzip.32 q9, q11\n"
+                     "vzip.32 q8, q9\n"
+                     "vzip.32 q10, q11\n"
+
+                     "vst1.f32 {d8-d9}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d16-d17}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d10-d11}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d18-d19}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d12-d13}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d20-d21}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d14-d15}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d22-d23}, [%[prhs_ptr]]!\n"
+
+                     "subs %[nk], %[nk], #1\n"
+                     "add %[buffer], %[buffer], #16\n"
+                     "bne 0b\n"
+                     : [buffer] "+r"(buffer), [prhs_ptr] "+r"(prhs_ptr), [nk] "+r"(nk)
+                     : [_stride] "r"(_stride)
+                     : "cc", "memory", "r0", "q4", "q5", "q6", "q7", "q8", "q9", "q10", "q11");
+#endif // __aarch64__
+      }
+
+      for (int j = 0; j < rk; j++)
+      {
+        prhs_ptr[0] = buffer[0];
+        prhs_ptr[1] = buffer[k];
+        prhs_ptr[2] = buffer[k << 1];
+        prhs_ptr[3] = buffer[3 * k];
+        prhs_ptr[4] = buffer[k << 2];
+        prhs_ptr[5] = buffer[5 * k];
+        prhs_ptr[6] = buffer[6 * k];
+        prhs_ptr[7] = buffer[7 * k];
+        prhs_ptr += nr;
+        buffer++;
+      }
+      break;
+#if !__aarch64__
+    case 6:
+      if (nk > 0)
+      {
+        asm volatile("0:\n"
+                     "mov r0, %[buffer]\n"
+
+                     "vld1.f32 {d8-d9}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d10-d11}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d12-d13}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d14-d15}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d16-d17}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d18-d19}, [r0]\n"
+
+                     "vzip.32 q4, q6\n"
+                     "vzip.32 q5, q7\n"
+                     "vzip.32 q4, q5\n"
+                     "vzip.32 q6, q7\n"
+                     "vzip.32 q8, q9\n"
+
+                     "vst1.f32 {d8-d9}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d16}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d10-d11}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d17}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d12-d13}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d18}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d14-d15}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d19}, [%[prhs_ptr]]!\n"
+
+                     "subs %[nk], %[nk], #1\n"
+                     "add %[buffer], %[buffer], #16\n"
+                     "bne 0b\n"
+                     : [buffer] "+r"(buffer), [prhs_ptr] "+r"(prhs_ptr), [nk] "+r"(nk)
+                     : [_stride] "r"(_stride)
+                     : "cc", "memory", "r0", "q4", "q5", "q6", "q7", "q8", "q9");
+      }
+
+      for (int j = 0; j < rk; j++)
+      {
+        prhs_ptr[0] = buffer[0];
+        prhs_ptr[1] = buffer[k];
+        prhs_ptr[2] = buffer[k << 1];
+        prhs_ptr[3] = buffer[3 * k];
+        prhs_ptr[4] = buffer[k << 2];
+        prhs_ptr[5] = buffer[5 * k];
+        prhs_ptr += nr;
+        buffer++;
+      }
+      break;
+#endif // !__aarch64__
+    case 4:
+      if (nk > 0)
+      {
+#if __aarch64__
+        asm volatile("0:\n"
+                     "mov x0, %[buffer]\n"
+
+                     "ld1 {v4.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v5.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v6.4s}, [x0]\n"
+                     "add x0, x0, %[_stride]\n"
+                     "ld1 {v7.4s}, [x0]\n"
+
+                     "zip1 v28.4s, v4.4s, v6.4s\n"
+                     "zip2 v30.4s, v4.4s, v6.4s\n"
+                     "zip1 v29.4s, v5.4s, v7.4s\n"
+                     "zip2 v31.4s, v5.4s, v7.4s\n"
+                     "zip1 v4.4s, v28.4s, v29.4s\n"
+                     "zip2 v5.4s, v28.4s, v29.4s\n"
+                     "zip1 v6.4s, v30.4s, v31.4s\n"
+                     "zip2 v7.4s, v30.4s, v31.4s\n"
+
+                     "st1 {v4.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v5.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v6.4s}, [%[prhs_ptr]], #16\n"
+                     "st1 {v7.4s}, [%[prhs_ptr]], #16\n"
+
+                     "subs %[nk], %[nk], #1\n"
+                     "add %[buffer], %[buffer], #16\n"
+                     "bne 0b\n"
+                     : [buffer] "+r"(buffer), [prhs_ptr] "+r"(prhs_ptr), [nk] "+r"(nk)
+                     : [_stride] "r"(_stride)
+                     : "cc", "memory", "x0", "v4", "v5", "v6", "v7", "v28", "v29", "v30", "v31");
+#else  // __aarch64__
+        asm volatile("0:\n"
+                     "mov r0, %[buffer]\n"
+
+                     "vld1.f32 {d8-d9}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d10-d11}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d12-d13}, [r0]\n"
+                     "add r0, r0, %[_stride]\n"
+                     "vld1.f32 {d14-d15}, [r0]\n"
+
+                     "vzip.32 q4, q6\n"
+                     "vzip.32 q5, q7\n"
+                     "vzip.32 q4, q5\n"
+                     "vzip.32 q6, q7\n"
+
+                     "vst1.f32 {d8-d9}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d10-d11}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d12-d13}, [%[prhs_ptr]]!\n"
+                     "vst1.f32 {d14-d15}, [%[prhs_ptr]]!\n"
+
+                     "subs %[nk], %[nk], #1\n"
+                     "add %[buffer], %[buffer], #16\n"
+                     "bne 0b\n"
+                     : [buffer] "+r"(buffer), [prhs_ptr] "+r"(prhs_ptr), [nk] "+r"(nk)
+                     : [_stride] "r"(_stride)
+                     : "cc", "memory", "r0", "q4", "q5", "q6", "q7");
+#endif // __aarch64__
+      }
+
+      for (int j = 0; j < rk; j++)
+      {
+        prhs_ptr[0] = buffer[0];
+        prhs_ptr[1] = buffer[k];
+        prhs_ptr[2] = buffer[k << 1];
+        prhs_ptr[3] = buffer[3 * k];
+        prhs_ptr += nr;
+        buffer++;
+      }
+      break;
+    default:
+      break;
+  }
+}
+
+void _pack_colmajor_notrans_lhs(const int mr, const int mb, const int kb, const int stride,
+                                const float *lhs_ptr, float *plhs_ptr)
+{
+  _pack_rowmajor_notrans_rhs(mr, mb, kb, stride, lhs_ptr, plhs_ptr);
+}
+
+void _pack_colmajor_notrans_rhs(const int nr, const int nb, const int kb, const int stride,
+                                const float *rhs_ptr, float *prhs_ptr)
+{
+  _pack_rowmajor_notrans_lhs(nr, nb, kb, stride, rhs_ptr, prhs_ptr);
+}
+
+void _pack_colmajor_trans_lhs(const int mr, const int mb, const int kb, const int stride,
+                              const float *lhs_ptr, float *plhs_ptr)
+{
+  _pack_rowmajor_notrans_lhs(mr, mb, kb, stride, lhs_ptr, plhs_ptr);
+}
+
+void _pack_colmajor_trans_rhs(const int nr, const int nb, const int kb, const int stride,
+                              const float *rhs_ptr, float *prhs_ptr)
+{
+  _pack_rowmajor_notrans_rhs(nr, nb, kb, stride, rhs_ptr, prhs_ptr);
+}
+
+void _pack_colmajor_image_rhs(const int nr, const int nb, const int kb, const int k0, const int n0,
+                              convMat_t *input, convMat_t *output, convParams_t *params,
+                              float *prhs_ptr)
+{
+  const int w = input->w;
+  const int h = input->h;
+  const int c = input->c;
+  const int outw = output->w;
+  const int kernel_w = params->kernel_w;
+  const int kernel_h = params->kernel_h;
+  const int stride_w = params->stride_w;
+  const int stride_h = params->stride_h;
+  const int pad_w = params->pad_w;
+  const int pad_h = params->pad_h;
+  const float *input_data = input->data;
+
+  int c0 = c - k0 % c;
+  if (c0 > kb)
+    c0 = kb;
+  int nc = (kb - c0 + c - 1) / c;
+  if (c0)
+    nc++;
+  const int cn = (kb - c0) % c;
+
+  int seg0 = outw - n0 % outw;
+  if (seg0 > nb)
+    seg0 = nb;
+  int rows = (nb - seg0 + outw - 1) / outw;
+  if (seg0)
+    rows++;
+  const int segn = (nb - seg0) % outw;
+
+  const int in_row0 = n0 / outw * stride_h;
+  const int in_col0 = n0 % outw * stride_w;
+
+  for (int i = 0; i < nc; i++)
+  {
+    const int channels = (i == 0 && c0 != 0) ? c0 : ((i == nc - 1 && cn != 0) ? cn : c);
+    const int c1 = (i == 0) ? k0 % c : 0;
+
+    float tmp_data[channels * nr];
+    int nindex = 0;
+    float *buffer = tmp_data;
+    float *prhs_tmp = prhs_ptr;
+
+    const int in_row1 = (k0 / c + i) / kernel_w % kernel_h * params->dilation_h + in_row0;
+    const int in_col1 = (k0 / c + i) % kernel_w * params->dilation_w;
+
+    int in_row = in_row1 - pad_h;
+
+    for (int out_rows = rows; out_rows; out_rows--)
+    {
+      int cols = (out_rows != 1 || segn == 0) ? outw : segn;
+      int in_col = in_col1 - pad_w;
+      if (out_rows == rows)
+      {
+        cols = seg0;
+        in_col += in_col0;
+      }
+      if ((unsigned int)in_row < (unsigned int)h)
+      {
+        for (int out_col = cols; out_col; out_col--)
+        {
+          if ((unsigned int)in_col < (unsigned int)w)
+          {
+            for (int j = c1; j < c1 + channels; j++)
+            {
+              *(buffer++) = input_data[(in_row * w + in_col) * c + j];
+            }
+          }
+          else
+          {
+            for (int j = 0; j < channels; j++)
+            {
+              *(buffer++) = 0;
+            }
+          }
+          in_col += stride_w;
+
+          nindex++;
+          if (nindex == nr)
+          {
+            nindex = 0;
+            buffer = tmp_data;
+            _pack_colmajor_image_rhs_sub(nr, channels, tmp_data, prhs_tmp);
+            prhs_tmp += kb * nr;
+          }
+        }
+      }
+      else
+      {
+        for (int out_col = cols; out_col; out_col--)
+        {
+          for (int j = 0; j < channels; j++)
+          {
+            *(buffer++) = 0;
+          }
+          in_col += stride_w;
+
+          nindex++;
+          if (nindex == nr)
+          {
+            nindex = 0;
+            buffer = tmp_data;
+            _pack_colmajor_image_rhs_sub(nr, channels, tmp_data, prhs_tmp);
+            prhs_tmp += kb * nr;
+          }
+        }
+      }
+
+      in_row += stride_h;
+    }
+
+    if (nindex > 0)
+    {
+      float *data = tmp_data;
+      for (int i = 0; i < channels; i++)
+      {
+        for (int j = 0; j < nindex; j++)
+        {
+          prhs_tmp[j] = data[j * channels];
+        }
+        for (int j = nindex; j < nr; j++)
+        {
+          prhs_tmp[j] = 0.f;
+        }
+        prhs_tmp += nr;
+        data++;
+      }
+    }
+
+    prhs_ptr += channels * nr;
+  }
+}
+
+void _pack_colmajor_image_rhs_batch(const int nr, const int nb, const int kb, const int k0,
+                                    const int n0, convMat_t *input, convMat_t *output,
+                                    convParams_t *params, float *prhs_ptr)
+{
+  const int w = input->w;
+  const int h = input->h;
+  const int c = input->c;
+  const int outw = output->w;
+  const int kernel_w = params->kernel_w;
+  const int kernel_h = params->kernel_h;
+  const int stride_w = params->stride_w;
+  const int stride_h = params->stride_h;
+
+  int c0 = c - k0 % c;
+  if (c0 > kb)
+    c0 = kb;
+  int nc = (kb - c0 + c - 1) / c;
+  if (c0)
+    nc++;
+  const int cn = (kb - c0) % c;
+
+  const int seg_size = output->w * output->h;
+
+  const float *indata = input->data + (w * h * c) * (n0 / seg_size);
+
+  int bseg0 = seg_size - n0 % seg_size;
+  if (bseg0 > nb)
+    bseg0 = nb;
+  int bnseg = (nb - bseg0 + seg_size - 1) / seg_size;
+  if (bseg0)
+    bnseg++;
+  const int bsegn = (nb - bseg0) % seg_size;
+
+  for (int ll = 0; ll < nc; ll++)
+  {
+    const float *input_data = indata;
+
+    const int channels = (ll == 0 && c0 != 0) ? c0 : ((ll == nc - 1 && cn != 0) ? cn : c);
+    const int c1 = (ll == 0) ? k0 % c : 0;
+
+    int nindex = 0;
+    float *prhs_tmp = prhs_ptr;
+    float tmp_data[channels * nr];
+    float *buffer = tmp_data;
+
+    for (int i = 0; i < bnseg; i++)
+    {
+      const int _nb =
+          ((i == 0 && bseg0 != 0) ? bseg0 : ((i == bnseg - 1 && bsegn != 0) ? bsegn : seg_size));
+      const int _n0 = (i == 0 ? n0 % seg_size : 0);
+
+      int seg0 = outw - _n0 % outw;
+      if (seg0 > _nb)
+        seg0 = _nb;
+      int rows = (_nb - seg0 + outw - 1) / outw;
+      if (seg0)
+        rows++;
+      const int segn = (_nb - seg0) % outw;
+
+      const int in_row0 = _n0 / outw * stride_h;
+      const int in_col0 = _n0 % outw * stride_w;
+
+      const int in_row1 = (k0 / c + ll) / kernel_w % kernel_h + in_row0;
+      const int in_col1 = (k0 / c + ll) % kernel_w;
+
+      int in_row = in_row1;
+
+      for (int out_rows = rows; out_rows; out_rows--)
+      {
+        int cols = (out_rows != 1 || segn == 0) ? outw : segn;
+        int in_col = in_col1;
+        if (out_rows == rows)
+        {
+          cols = seg0;
+          in_col += in_col0;
+        }
+        if ((unsigned int)in_row < (unsigned int)h)
+        {
+          for (int out_col = cols; out_col; out_col--)
+          {
+            if ((unsigned int)in_col < (unsigned int)w)
+            {
+              for (int j = c1; j < c1 + channels; j++)
+              {
+                *(buffer++) = input_data[(in_row * w + in_col) * c + j];
+              }
+            }
+            else
+            {
+              for (int j = 0; j < channels; j++)
+              {
+                *(buffer++) = 0;
+              }
+            }
+            in_col += stride_w;
+
+            nindex++;
+            if (nindex == nr)
+            {
+              nindex = 0;
+              buffer = tmp_data;
+              _pack_colmajor_image_rhs_sub(nr, channels, tmp_data, prhs_tmp);
+              prhs_tmp += kb * nr;
+            }
+          }
+        }
+        else
+        {
+          for (int out_col = cols; out_col; out_col--)
+          {
+            for (int j = 0; j < channels; j++)
+            {
+              *(buffer++) = 0;
+            }
+            in_col += stride_w;
+
+            nindex++;
+            if (nindex == nr)
+            {
+              nindex = 0;
+              buffer = tmp_data;
+              _pack_colmajor_image_rhs_sub(nr, channels, tmp_data, prhs_tmp);
+              prhs_tmp += kb * nr;
+            }
+          }
+        }
+
+        in_row += stride_h;
+      }
+
+      input_data += w * h * c;
+    }
+
+    if (nindex > 0)
+    {
+      float *data = tmp_data;
+      for (int ii = 0; ii < channels; ii++)
+      {
+        for (int jj = 0; jj < nindex; jj++)
+        {
+          prhs_tmp[jj] = data[jj * channels];
+        }
+        for (int jj = nindex; jj < nr; jj++)
+        {
+          prhs_tmp[jj] = 0.f;
+        }
+        prhs_tmp += nr;
+        data++;
+      }
+    }
+
+    prhs_ptr += channels * nr;
+  }
+}
+
+void _unpack_colmajor_image_res(const int mb, const int nb, const int m0, const int n0,
+                                convMat_t *input, convMat_t *output, convParams_t *params,
+                                float *pres_ptr)
+{
+  const int w = input->w;
+  const int outw = output->w;
+  const int outh = output->h;
+  const int outc = output->c;
+  const int kernel_w = params->kernel_w;
+  const int kernel_h = params->kernel_h;
+  const int stride_w = params->stride_w;
+  const int stride_h = params->stride_h;
+  const int pad_w = params->pad_w;
+  const int pad_h = params->pad_h;
+  float *output_data = output->data;
+
+  int c0 = outc - m0 % outc;
+  if (c0 > mb)
+    c0 = mb;
+  int nc = (mb - c0 + outc - 1) / outc;
+  if (c0)
+    nc++;
+  const int cn = (mb - c0) % outc;
+
+  int seg0 = w - n0 % w;
+  if (seg0 > nb)
+    seg0 = nb;
+  int rows = (nb - seg0 + w - 1) / w;
+  if (seg0)
+    rows++;
+  const int segn = (nb - seg0) % w;
+
+  const int out_row0 = n0 / w * stride_h;
+  const int out_col0 = n0 % w * stride_w;
+
+  for (int i = 0; i < nc; i++)
+  {
+    const int channels = (i == 0 && c0 != 0) ? c0 : ((i == nc - 1 && cn != 0) ? cn : outc);
+    const int c1 = (i == 0) ? m0 % outc : 0;
+
+    float *buffer = pres_ptr;
+
+    const int out_row1 = (m0 / outc + i) / kernel_w % kernel_h * params->dilation_h + out_row0;
+    const int out_col1 = (m0 / outc + i) % kernel_w * params->dilation_w;
+
+    int out_row = out_row1 - pad_h;
+
+    for (int in_rows = rows; in_rows; in_rows--)
+    {
+      int cols = (in_rows != 1 || segn == 0) ? w : segn;
+      int out_col = out_col1 - pad_w;
+      if (in_rows == rows)
+      {
+        cols = seg0;
+        out_col += out_col0;
+      }
+      if ((unsigned int)out_row < (unsigned int)outh)
+      {
+        for (int in_col = cols; in_col; in_col--)
+        {
+          if ((unsigned int)out_col < (unsigned int)outw)
+          {
+            for (int j = c1; j < c1 + channels; j++)
+            {
+              // Note:Data competition for multi-threads
+              //#pragma omp atomic //low performance
+              output_data[(out_row * outw + out_col) * outc + j] += *(buffer + j - c1);
+            }
+          }
+          buffer += mb;
+          out_col += stride_w;
+        }
+      }
+      else
+      {
+        buffer += cols * mb;
+      }
+      out_row += stride_h;
+    }
+
+    pres_ptr += channels;
+  }
+}
+
+void _sparse_pack_rowmajor_image(const int nb, const int k0, const int n0, convMat_t *input,
+                                 convMat_t *output, convParams_t *params, float *prhs_ptr)
+{
+  const int w = input->w;
+  const int h = input->h;
+  const int outw = output->w;
+  const int kernel_w = params->kernel_w;
+  const int kernel_h = params->kernel_h;
+  const int stride_w = params->stride_w;
+  const int stride_h = params->stride_h;
+  const int pad_w = params->pad_w;
+  const int pad_h = params->pad_h;
+
+  const int in_row0 = n0 / outw * stride_h;
+  const int in_col0 = n0 % outw * stride_w;
+  int seg0 = outw - n0 % outw;
+  if (seg0 > nb)
+    seg0 = nb;
+  int rows = (nb - seg0 + outw - 1) / outw;
+  if (seg0)
+    rows++;
+  const int segn = (nb - seg0) % outw;
+
+  const int ic = k0 / (kernel_w * kernel_h);
+  const int in_row1 = ((k0 / kernel_w) % kernel_h) * params->dilation_h + in_row0;
+  const int in_col1 = k0 % kernel_w * params->dilation_w;
+
+#ifdef NCNN
+  const float *input_data = input->data + ic * alignSize(w * h, 16 / sizeof(float));
+#else  // NCNN
+  const float *input_data = input->data + ic * w * h;
+#endif // NCNN
+
+  int in_row = in_row1 - pad_h;
+
+  for (int out_rows = rows; out_rows; out_rows--)
+  {
+    int cols = (out_rows != 1 || segn == 0) ? outw : segn;
+    int in_col = in_col1 - pad_w;
+    if (out_rows == rows)
+    {
+      cols = seg0;
+      in_col += in_col0;
+    }
+    if ((unsigned int)in_row < (unsigned int)h)
+    {
+      for (int out_col = cols; out_col; out_col--)
+      {
+        if ((unsigned int)in_col < (unsigned int)w)
+          *(prhs_ptr++) = input_data[in_row * w + in_col];
+        else
+          *(prhs_ptr++) = 0;
+        in_col += stride_w;
+      }
+    }
+    else
+    {
+      for (int out_col = cols; out_col; out_col--)
+      {
+        *(prhs_ptr++) = 0;
+        in_col += stride_w;
+      }
+    }
+
+    in_row += stride_h;
+  }
+}
+
+} // namespace srcn
+} // namespace nnfw
diff --git a/runtimes/libs/srcn/src/sgemm_pack.h b/runtimes/libs/srcn/src/sgemm_pack.h
new file mode 100644
index 000000000..6653e7396
--- /dev/null
+++ b/runtimes/libs/srcn/src/sgemm_pack.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_SRCN_SGEMM_PACK_H__
+#define __NNFW_SRCN_SGEMM_PACK_H__
+
+#include "srcn/conv_type.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+void _pack_rowmajor_notrans_lhs(const int mr, const int mb, const int kb, const int stride,
+                                const float *lhs_ptr, float *plhs_ptr);
+void _pack_rowmajor_notrans_rhs(const int nr, const int nb, const int kb, const int stride,
+                                const float *rhs_ptr, float *prhs_ptr);
+void _pack_rowmajor_trans_lhs(const int mr, const int mb, const int kb, const int stride,
+                              const float *lhs_ptr, float *plhs_ptr);
+void _pack_rowmajor_trans_rhs(const int nr, const int nb, const int kb, const int stride,
+                              const float *rhs_ptr, float *prhs_ptr);
+void _pack_rowmajor_image_rhs(const int nr, const int nb, const int kb, const int k0, const int n0,
+                              convMat_t *input, convMat_t *output, convParams_t *params,
+                              float *prhs_ptr);
+void _pack_rowmajor_image_rhs_batch(const int nr, const int nb, const int kb, const int k0,
+                                    const int n0, convMat_t *input, convMat_t *output,
+                                    convParams_t *params, float *prhs_ptr);
+
+void _unpack_rowmajor_image_res(const int mb, const int nb, const int m0, const int n0,
+                                convMat_t *input, convMat_t *output, convParams_t *params,
+                                float *pres_ptr);
+
+void _pack_colmajor_notrans_lhs(const int mr, const int mb, const int kb, const int stride,
+                                const float *lhs_ptr, float *plhs_ptr);
+void _pack_colmajor_notrans_rhs(const int nr, const int nb, const int kb, const int stride,
+                                const float *rhs_ptr, float *prhs_ptr);
+void _pack_colmajor_trans_lhs(const int mr, const int mb, const int kb, const int stride,
+                              const float *lhs_ptr, float *plhs_ptr);
+void _pack_colmajor_trans_rhs(const int nr, const int nb, const int kb, const int stride,
+                              const float *rhs_ptr, float *prhs_ptr);
+
+void _pack_colmajor_image_rhs(const int nr, const int nb, const int kb, const int k0, const int n0,
+                              convMat_t *input, convMat_t *output, convParams_t *params,
+                              float *prhs_ptr);
+
+void _pack_colmajor_image_rhs_batch(const int nr, const int nb, const int kb, const int k0,
+                                    const int n0, convMat_t *input, convMat_t *output,
+                                    convParams_t *params, float *prhs_ptr);
+
+void _unpack_colmajor_image_res(const int mb, const int nb, const int m0, const int n0,
+                                convMat_t *input, convMat_t *output, convParams_t *params,
+                                float *pres_ptr);
+
+void _sparse_pack_rowmajor_image(const int nb, const int k0, const int n0, convMat_t *input,
+                                 convMat_t *output, convParams_t *params, float *prhs_ptr);
+
+} // namespace srcn
+} // namespace nnfw
+
+#endif // __NNFW_SRCN_SGEMM_PACK_H__
diff --git a/runtimes/libs/srcn/src/sgemm_singlethread.cc b/runtimes/libs/srcn/src/sgemm_singlethread.cc
new file mode 100644
index 000000000..f9b9f45a9
--- /dev/null
+++ b/runtimes/libs/srcn/src/sgemm_singlethread.cc
@@ -0,0 +1,689 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdexcept>
+
+#include "common.h"
+#include "sgemm_kernel.h"
+#include "sgemm_pack.h"
+#include "sgemm_singlethread.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+void sgemm_singlethread::param_init()
+{
+  if (n_ >= m_)
+  {
+    shard_type_ = shardByRow;
+  }
+  else
+  {
+    shard_type_ = shardByCol;
+  }
+
+#if __aarch64__
+  if (major_type_ == rowMajor)
+  {
+    if (shard_type_ == shardByRow)
+    {
+      mr_ = 8;
+      nr_ = 12;
+    }
+    else
+    {
+      mr_ = 12;
+      nr_ = 8;
+    }
+  }
+  else if (major_type_ == colMajor)
+  {
+    mr_ = 12;
+    nr_ = 8;
+  }
+#else  // __aarch64__
+  if (major_type_ == rowMajor)
+  {
+    // it is a bug, but i do not know why as now.
+    if (ltrans_ == notrans && rtrans_ == trans)
+    {
+      mr_ = 4;
+      nr_ = 12;
+    }
+    else
+    {
+      mr_ = 6;
+      nr_ = 8;
+    }
+  }
+  else if (major_type_ == colMajor)
+  {
+    mr_ = 8;
+    nr_ = 6;
+  }
+#endif // __aarch64__
+
+  int k_div = (nr_ * sizeof_RhsScalar);
+  int k_sub = (mr_ * nr_ * sizeof_ResScalar);
+
+  int gen_col = GEN_COL / cache_div_;
+  int min_k = MAX_K / cache_div_;
+
+  const int k_cache = MIN(divup((int)(L1_CACHE_SIZE - k_sub), (int)k_div), min_k);
+  bk_ = MIN(k_cache, k_);
+
+  if (shard_type_ == shardByCol)
+  {
+    int m_sub = (bk_ * nr_ * sizeof_RhsScalar);
+    int m_div = (sizeof_LhsScalar * bk_ * 2 * cache_div_);
+    if (L3_CACHE_SIZE)
+      m_div = (sizeof_LhsScalar * bk_ * 2);
+    int m_cache = divup((L2_CACHE_SIZE - m_sub), m_div);
+    bm_ = MIN(m_cache, m_);
+
+    bn_ = MIN(gen_col, n_);
+    if (L3_CACHE_SIZE)
+    {
+      int n_sub = (bk_ * bm_ * sizeof_RhsScalar);
+      int n_cache = divup((L3_CACHE_SIZE - n_sub), (sizeof_LhsScalar * bk_ * 2));
+      bn_ = MIN(n_cache, bn_);
+    }
+  }
+  else
+  {
+    int n_sub = (bk_ * mr_ * sizeof_RhsScalar);
+    int n_div = (sizeof_LhsScalar * bk_ * 2 * cache_div_);
+    if (L3_CACHE_SIZE)
+      n_div = (sizeof_LhsScalar * bk_ * 2);
+    int n_cache = divup((L2_CACHE_SIZE - n_sub), n_div);
+    bn_ = MIN(n_cache, n_);
+
+    bm_ = MIN(gen_col, m_);
+    if (L3_CACHE_SIZE)
+    {
+      int m_sub = (bk_ * bn_ * sizeof_RhsScalar);
+      int m_cache = divup((L3_CACHE_SIZE - m_sub), (sizeof_LhsScalar * bk_ * 2));
+      bm_ = MIN(m_cache, bm_);
+    }
+  }
+
+  nm_ = divup(m_, bm_);
+  nn_ = divup(n_, bn_);
+  nk_ = divup(k_, bk_);
+
+  rm_ = m_ % bm_;
+  rn_ = n_ % bn_;
+  rk_ = k_ % bk_;
+}
+
+sgemm_singlethread::sgemm_singlethread(sgemmType_t major_type, sgemmTrans_t ltrans,
+                                       sgemmTrans_t rtrans, const int m, const int n, const int k,
+                                       const float *lhs_data, const float *rhs_data,
+                                       float *res_data, int cache_div)
+    : major_type_(major_type), ltrans_(ltrans), rtrans_(rtrans), m_(m), n_(n), k_(k),
+      lhs_data_(lhs_data), rhs_data_(rhs_data), res_data_(res_data), cache_div_(cache_div)
+{
+  param_init();
+}
+
+sgemm_singlethread::~sgemm_singlethread() {}
+
+void sgemm_singlethread::run()
+{
+  if (major_type_ == rowMajor)
+  {
+    if (ltrans_ == notrans && rtrans_ == notrans)
+    {
+      compute_rowmajor_nn();
+    }
+    else if (ltrans_ == notrans && rtrans_ == trans)
+    {
+      compute_rowmajor_nt();
+    }
+    else if (ltrans_ == trans && rtrans_ == notrans)
+    {
+      compute_rowmajor_tn();
+    }
+    else if (ltrans_ == trans && rtrans_ == trans)
+    {
+      compute_rowmajor_tt();
+    }
+    else
+    {
+      throw std::runtime_error{"error trans type."};
+    }
+  }
+  else if (major_type_ == colMajor)
+  {
+    if (ltrans_ == notrans && rtrans_ == notrans)
+    {
+      compute_colmajor_nn();
+    }
+    else if (ltrans_ == notrans && rtrans_ == trans)
+    {
+      compute_colmajor_nt();
+    }
+    else if (ltrans_ == trans && rtrans_ == notrans)
+    {
+      compute_colmajor_tn();
+    }
+    else if (ltrans_ == trans && rtrans_ == trans)
+    {
+      compute_colmajor_tt();
+    }
+    else
+    {
+      throw std::runtime_error{"error trans type."};
+    }
+  }
+  else
+  {
+    throw std::runtime_error{"error major type."};
+  }
+}
+
+void sgemm_singlethread::compute_rowmajor_nn()
+{
+  int mstride = (bm_ + mr_ - 1) / mr_ * mr_;
+  int nstride = (bn_ + nr_ - 1) / nr_ * nr_;
+
+  float plhs_ptr[mstride * bk_];
+  float prhs_ptr[nstride * bk_];
+
+  if (shard_type_ == shardByCol)
+  {
+    for (int j = 0; j < nn_; j++)
+    {
+      const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+      for (int l = 0; l < nk_; l++)
+      {
+        const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+        _pack_rowmajor_notrans_rhs(nr_, bn, bk, n_, &rhs_data_[l * bk_ * n_ + j * bn_], prhs_ptr);
+
+        for (int i = 0; i < nm_; i++)
+        {
+          const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+          _pack_rowmajor_notrans_lhs(mr_, bm, bk, k_, &lhs_data_[i * bm_ * k_ + l * bk_], plhs_ptr);
+
+          _sgemm_rowmajor_macro_kernel_divnm(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                             &res_data_[i * bm_ * n_ + j * bn_], l, n_, bk);
+        }
+      }
+    }
+  }
+  else if (shard_type_ == shardByRow)
+  {
+    for (int i = 0; i < nm_; i++)
+    {
+      const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+      for (int l = 0; l < nk_; l++)
+      {
+        const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+        _pack_rowmajor_notrans_lhs(mr_, bm, bk, k_, &lhs_data_[i * bm_ * k_ + l * bk_], plhs_ptr);
+
+        for (int j = 0; j < nn_; j++)
+        {
+          const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+
+          _pack_rowmajor_notrans_rhs(nr_, bn, bk, n_, &rhs_data_[l * bk_ * n_ + j * bn_], prhs_ptr);
+
+          _sgemm_rowmajor_macro_kernel_divmn(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                             &res_data_[i * bm_ * n_ + j * bn_], l, n_, bk);
+        }
+      }
+    }
+  }
+  else
+  {
+    throw std::runtime_error{"error shard type."};
+  }
+}
+
+void sgemm_singlethread::compute_rowmajor_nt()
+{
+  int mstride = (bm_ + mr_ - 1) / mr_ * mr_;
+  int nstride = (bn_ + nr_ - 1) / nr_ * nr_;
+
+  float plhs_ptr[mstride * bk_];
+  float prhs_ptr[nstride * bk_];
+
+  if (shard_type_ == shardByCol)
+  {
+    for (int j = 0; j < nn_; j++)
+    {
+      const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+      for (int l = 0; l < nk_; l++)
+      {
+        const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+        _pack_rowmajor_trans_rhs(nr_, bn, bk, k_, &rhs_data_[j * bn_ * k_ + l * bk_], prhs_ptr);
+
+        for (int i = 0; i < nm_; i++)
+        {
+          const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+          _pack_rowmajor_notrans_lhs(mr_, bm, bk, k_, &lhs_data_[i * bm_ * k_ + l * bk_], plhs_ptr);
+
+          _sgemm_rowmajor_macro_kernel_divnm(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                             &res_data_[i * bm_ * n_ + j * bn_], l, n_, bk);
+        }
+      }
+    }
+  }
+  else if (shard_type_ == shardByRow)
+  {
+    for (int i = 0; i < nm_; i++)
+    {
+      const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+      for (int l = 0; l < nk_; l++)
+      {
+        const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+        _pack_rowmajor_notrans_lhs(mr_, bm, bk, k_, &lhs_data_[i * bm_ * k_ + l * bk_], plhs_ptr);
+
+        for (int j = 0; j < nn_; j++)
+        {
+          const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+
+          _pack_rowmajor_trans_rhs(nr_, bn, bk, k_, &rhs_data_[j * bn_ * k_ + l * bk_], prhs_ptr);
+
+          _sgemm_rowmajor_macro_kernel_divmn(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                             &res_data_[i * bm_ * n_ + j * bn_], l, n_, bk);
+        }
+      }
+    }
+  }
+  else
+  {
+    throw std::runtime_error{"error shard type."};
+  }
+}
+
+void sgemm_singlethread::compute_rowmajor_tn()
+{
+  int mstride = (bm_ + mr_ - 1) / mr_ * mr_;
+  int nstride = (bn_ + nr_ - 1) / nr_ * nr_;
+
+  float plhs_ptr[mstride * bk_];
+  float prhs_ptr[nstride * bk_];
+
+  if (shard_type_ == shardByCol)
+  {
+    for (int j = 0; j < nn_; j++)
+    {
+      const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+      for (int l = 0; l < nk_; l++)
+      {
+        const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+        _pack_rowmajor_notrans_rhs(nr_, bn, bk, n_, &rhs_data_[l * bk_ * n_ + j * bn_], prhs_ptr);
+
+        for (int i = 0; i < nm_; i++)
+        {
+          const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+          _pack_rowmajor_trans_lhs(mr_, bm, bk, m_, &lhs_data_[l * bk_ * m_ + i * bm_], plhs_ptr);
+
+          _sgemm_rowmajor_macro_kernel_divnm(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                             &res_data_[i * bm_ * n_ + j * bn_], l, n_, bk);
+        }
+      }
+    }
+  }
+  else if (shard_type_ == shardByRow)
+  {
+    for (int i = 0; i < nm_; i++)
+    {
+      const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+      for (int l = 0; l < nk_; l++)
+      {
+        const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+        _pack_rowmajor_trans_lhs(mr_, bm, bk, m_, &lhs_data_[l * bk_ * m_ + i * bm_], plhs_ptr);
+
+        for (int j = 0; j < nn_; j++)
+        {
+          const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+
+          _pack_rowmajor_notrans_rhs(nr_, bn, bk, n_, &rhs_data_[l * bk_ * n_ + j * bn_], prhs_ptr);
+
+          _sgemm_rowmajor_macro_kernel_divmn(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                             &res_data_[i * bm_ * n_ + j * bn_], l, n_, bk);
+        }
+      }
+    }
+  }
+  else
+  {
+    throw std::runtime_error{"error shard type."};
+  }
+}
+
+void sgemm_singlethread::compute_rowmajor_tt()
+{
+  int mstride = (bm_ + mr_ - 1) / mr_ * mr_;
+  int nstride = (bn_ + nr_ - 1) / nr_ * nr_;
+
+  float plhs_ptr[mstride * bk_];
+  float prhs_ptr[nstride * bk_];
+
+  if (shard_type_ == shardByCol)
+  {
+    for (int j = 0; j < nn_; j++)
+    {
+      const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+      for (int l = 0; l < nk_; l++)
+      {
+        const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+        _pack_rowmajor_trans_rhs(nr_, bn, bk, k_, &rhs_data_[j * bn_ * k_ + l * bk_], prhs_ptr);
+
+        for (int i = 0; i < nm_; i++)
+        {
+          const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+          _pack_rowmajor_trans_lhs(mr_, bm, bk, m_, &lhs_data_[l * bk_ * m_ + i * bm_], plhs_ptr);
+
+          _sgemm_rowmajor_macro_kernel_divnm(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                             &res_data_[i * bm_ * n_ + j * bn_], l, n_, bk);
+        }
+      }
+    }
+  }
+  else if (shard_type_ == shardByRow)
+  {
+    for (int i = 0; i < nm_; i++)
+    {
+      const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+      for (int l = 0; l < nk_; l++)
+      {
+        const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+        _pack_rowmajor_trans_lhs(mr_, bm, bk, m_, &lhs_data_[l * bk_ * m_ + i * bm_], plhs_ptr);
+
+        for (int j = 0; j < nn_; j++)
+        {
+          const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+
+          _pack_rowmajor_trans_rhs(nr_, bn, bk, k_, &rhs_data_[j * bn_ * k_ + l * bk_], prhs_ptr);
+
+          _sgemm_rowmajor_macro_kernel_divmn(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                             &res_data_[i * bm_ * n_ + j * bn_], l, n_, bk);
+        }
+      }
+    }
+  }
+  else
+  {
+    throw std::runtime_error{"error shard type."};
+  }
+}
+
+void sgemm_singlethread::compute_colmajor_nn()
+{
+  int mstride = (bm_ + mr_ - 1) / mr_ * mr_;
+  int nstride = (bn_ + nr_ - 1) / nr_ * nr_;
+
+  float plhs_ptr[mstride * bk_];
+  float prhs_ptr[nstride * bk_];
+
+  if (shard_type_ == shardByCol)
+  {
+    for (int j = 0; j < nn_; j++)
+    {
+      const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+      for (int l = 0; l < nk_; l++)
+      {
+        const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+        _pack_colmajor_notrans_rhs(nr_, bn, bk, k_, &rhs_data_[j * bn_ * k_ + l * bk_], prhs_ptr);
+
+        for (int i = 0; i < nm_; i++)
+        {
+          const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+          _pack_colmajor_notrans_lhs(mr_, bm, bk, m_, &lhs_data_[l * bk_ * m_ + i * bm_], plhs_ptr);
+
+          _sgemm_colmajor_macro_kernel_divnm(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                             &res_data_[j * bn_ * m_ + i * bm_], l, m_, bk);
+        }
+      }
+    }
+  }
+  else if (shard_type_ == shardByRow)
+  {
+    for (int i = 0; i < nm_; i++)
+    {
+      const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+      for (int l = 0; l < nk_; l++)
+      {
+        const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+        _pack_colmajor_notrans_lhs(mr_, bm, bk, m_, &lhs_data_[l * bk_ * m_ + i * bm_], plhs_ptr);
+
+        for (int j = 0; j < nn_; j++)
+        {
+          const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+
+          _pack_colmajor_notrans_rhs(nr_, bn, bk, k_, &rhs_data_[j * bn_ * k_ + l * bk_], prhs_ptr);
+
+          _sgemm_colmajor_macro_kernel_divmn(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                             &res_data_[j * bn_ * m_ + i * bm_], l, m_, bk);
+        }
+      }
+    }
+  }
+  else
+  {
+    throw std::runtime_error{"error shard type."};
+  }
+}
+
+void sgemm_singlethread::compute_colmajor_nt()
+{
+  int mstride = (bm_ + mr_ - 1) / mr_ * mr_;
+  int nstride = (bn_ + nr_ - 1) / nr_ * nr_;
+
+  float plhs_ptr[mstride * bk_];
+  float prhs_ptr[nstride * bk_];
+
+  if (shard_type_ == shardByCol)
+  {
+    for (int j = 0; j < nn_; j++)
+    {
+      const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+      for (int l = 0; l < nk_; l++)
+      {
+        const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+        _pack_colmajor_trans_rhs(nr_, bn, bk, n_, &rhs_data_[l * bk_ * n_ + j * bn_], prhs_ptr);
+
+        for (int i = 0; i < nm_; i++)
+        {
+          const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+          _pack_colmajor_notrans_lhs(mr_, bm, bk, m_, &lhs_data_[l * bk_ * m_ + i * bm_], plhs_ptr);
+
+          _sgemm_colmajor_macro_kernel_divnm(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                             &res_data_[j * bn_ * m_ + i * bm_], l, m_, bk);
+        }
+      }
+    }
+  }
+  else if (shard_type_ == shardByRow)
+  {
+    for (int i = 0; i < nm_; i++)
+    {
+      const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+      for (int l = 0; l < nk_; l++)
+      {
+        const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+        _pack_colmajor_notrans_lhs(mr_, bm, bk, m_, &lhs_data_[l * bk_ * m_ + i * bm_], plhs_ptr);
+
+        for (int j = 0; j < nn_; j++)
+        {
+          const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+
+          _pack_colmajor_trans_rhs(nr_, bn, bk, n_, &rhs_data_[l * bk_ * n_ + j * bn_], prhs_ptr);
+
+          _sgemm_colmajor_macro_kernel_divmn(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                             &res_data_[j * bn_ * m_ + i * bm_], l, m_, bk);
+        }
+      }
+    }
+  }
+  else
+  {
+    throw std::runtime_error{"error shard type."};
+  }
+}
+
+void sgemm_singlethread::compute_colmajor_tn()
+{
+  int mstride = (bm_ + mr_ - 1) / mr_ * mr_;
+  int nstride = (bn_ + nr_ - 1) / nr_ * nr_;
+
+  float plhs_ptr[mstride * bk_];
+  float prhs_ptr[nstride * bk_];
+
+  if (shard_type_ == shardByCol)
+  {
+    for (int j = 0; j < nn_; j++)
+    {
+      const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+      for (int l = 0; l < nk_; l++)
+      {
+        const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+        _pack_colmajor_notrans_rhs(nr_, bn, bk, k_, &rhs_data_[j * bn_ * k_ + l * bk_], prhs_ptr);
+
+        for (int i = 0; i < nm_; i++)
+        {
+          const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+          _pack_colmajor_trans_lhs(mr_, bm, bk, k_, &lhs_data_[i * bm_ * k_ + l * bk_], plhs_ptr);
+
+          _sgemm_colmajor_macro_kernel_divnm(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                             &res_data_[j * bn_ * m_ + i * bm_], l, m_, bk);
+        }
+      }
+    }
+  }
+  else if (shard_type_ == shardByRow)
+  {
+    for (int i = 0; i < nm_; i++)
+    {
+      const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+      for (int l = 0; l < nk_; l++)
+      {
+        const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+        _pack_colmajor_trans_lhs(mr_, bm, bk, k_, &lhs_data_[i * bm_ * k_ + l * bk_], plhs_ptr);
+
+        for (int j = 0; j < nn_; j++)
+        {
+          const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+
+          _pack_colmajor_notrans_rhs(nr_, bn, bk, k_, &rhs_data_[j * bn_ * k_ + l * bk_], prhs_ptr);
+
+          _sgemm_colmajor_macro_kernel_divmn(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                             &res_data_[j * bn_ * m_ + i * bm_], l, m_, bk);
+        }
+      }
+    }
+  }
+  else
+  {
+    throw std::runtime_error{"error shard type."};
+  }
+}
+
+void sgemm_singlethread::compute_colmajor_tt()
+{
+  int mstride = (bm_ + mr_ - 1) / mr_ * mr_;
+  int nstride = (bn_ + nr_ - 1) / nr_ * nr_;
+
+  float plhs_ptr[mstride * bk_];
+  float prhs_ptr[nstride * bk_];
+
+  if (shard_type_ == shardByCol)
+  {
+    for (int j = 0; j < nn_; j++)
+    {
+      const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+      for (int l = 0; l < nk_; l++)
+      {
+        const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+        _pack_colmajor_trans_rhs(nr_, bn, bk, n_, &rhs_data_[l * bk_ * n_ + j * bn_], prhs_ptr);
+
+        for (int i = 0; i < nm_; i++)
+        {
+          const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+          _pack_colmajor_trans_lhs(mr_, bm, bk, k_, &lhs_data_[i * bm_ * k_ + l * bk_], plhs_ptr);
+
+          _sgemm_colmajor_macro_kernel_divnm(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                             &res_data_[j * bn_ * m_ + i * bm_], l, m_, bk);
+        }
+      }
+    }
+  }
+  else if (shard_type_ == shardByRow)
+  {
+    for (int i = 0; i < nm_; i++)
+    {
+      const int bm = (i != nm_ - 1 || rm_ == 0) ? bm_ : rm_;
+
+      for (int l = 0; l < nk_; l++)
+      {
+        const int bk = (l != nk_ - 1 || rk_ == 0) ? bk_ : rk_;
+
+        _pack_colmajor_trans_lhs(mr_, bm, bk, k_, &lhs_data_[i * bm_ * k_ + l * bk_], plhs_ptr);
+
+        for (int j = 0; j < nn_; j++)
+        {
+          const int bn = (j != nn_ - 1 || rn_ == 0) ? bn_ : rn_;
+
+          _pack_colmajor_trans_rhs(nr_, bn, bk, n_, &rhs_data_[l * bk_ * n_ + j * bn_], prhs_ptr);
+
+          _sgemm_colmajor_macro_kernel_divmn(mr_, nr_, bm, bn, bk, plhs_ptr, prhs_ptr,
+                                             &res_data_[j * bn_ * m_ + i * bm_], l, m_, bk);
+        }
+      }
+    }
+  }
+  else
+  {
+    throw std::runtime_error{"error shard type."};
+  }
+}
+
+} // namespace srcn
+} // namespace nnfw
diff --git a/runtimes/libs/srcn/src/sgemm_singlethread.h b/runtimes/libs/srcn/src/sgemm_singlethread.h
new file mode 100644
index 000000000..47954e028
--- /dev/null
+++ b/runtimes/libs/srcn/src/sgemm_singlethread.h
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_SRCN_SGEMM_SINGLETHREAD_H__
+#define __NNFW_SRCN_SGEMM_SINGLETHREAD_H__
+
+#include "common.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+typedef enum { rowMajor = 0, colMajor } sgemmType_t;
+
+typedef enum { trans = 0, notrans } sgemmTrans_t;
+
+class sgemm_singlethread
+{
+public:
+  sgemm_singlethread(sgemmType_t major_type, sgemmTrans_t ltrans, sgemmTrans_t rtrans, const int m,
+                     const int n, const int k, const float *lhs_data, const float *rhs_data,
+                     float *res_data, int cache_div);
+  ~sgemm_singlethread();
+
+  void run();
+
+private:
+  void param_init();
+
+  void compute_rowmajor_nn();
+  void compute_rowmajor_nt();
+  void compute_rowmajor_tn();
+  void compute_rowmajor_tt();
+
+  void compute_colmajor_nn();
+  void compute_colmajor_nt();
+  void compute_colmajor_tn();
+  void compute_colmajor_tt();
+
+  const float *lhs_data_;
+  const float *rhs_data_;
+  float *res_data_;
+
+  sgemmType_t major_type_;
+  sgemmTrans_t ltrans_;
+  sgemmTrans_t rtrans_;
+
+  int m_;
+  int n_;
+  int k_;
+
+  int bm_;
+  int bn_;
+  int bk_;
+
+  int rm_;
+  int rn_;
+  int rk_;
+
+  int nm_;
+  int nn_;
+  int nk_;
+
+  int mr_;
+  int nr_;
+
+  shardType_t shard_type_;
+  int cache_div_;
+};
+
+} // namespace srcn
+} // namespace nnfw
+
+#endif // __NNFW_SRCN_SGEMM_SINGLETHREAD_H__
diff --git a/runtimes/libs/srcn/src/sgemm_test.cc b/runtimes/libs/srcn/src/sgemm_test.cc
new file mode 100644
index 000000000..f06f05701
--- /dev/null
+++ b/runtimes/libs/srcn/src/sgemm_test.cc
@@ -0,0 +1,1883 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/time.h>
+#include <unistd.h>
+
+#include "srcn/conv_type.h"
+#include "srcn/srcn_conv.h"
+//#include "srcn_sgemm.h"
+#include "conv_sgemm_singlethread.h"
+#include "conv_sgemm_multithreads.h"
+//#include "conv_sgemm_batch.h"
+#include "sgemm_singlethread.h"
+#include "conv_winograd.h"
+#include "winograd.h"
+
+//#include "conv_gpu.h"
+//#include "convolutiondepthwise_3x3.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+static void direct_conv_rowmajor(convMat_t *input, convMat_t *output, convMat_t *filter,
+                                 convParams_t *params)
+{
+  const int w = input->w;
+  const int h = input->h;
+  const int inch = input->c;
+  const int outw = output->w;
+  const int outh = output->h;
+  const int outch = output->c;
+  const int kernel_w = params->kernel_w;
+  const int kernel_h = params->kernel_h;
+  const int stride_w = params->stride_w;
+  const int stride_h = params->stride_h;
+  const int pad_w = params->pad_w;
+  const int pad_h = params->pad_h;
+  const int dilation_w = params->dilation_w;
+  const int dilation_h = params->dilation_h;
+  const float *input_data = input->data;
+  const float *filter_data = filter->data;
+  float *output_data = output->data;
+
+  for (int out_c = 0; out_c < outch; out_c++)
+  {
+    for (int out_row = 0; out_row < outh; out_row++)
+    {
+      for (int out_col = 0; out_col < outw; out_col++)
+      {
+        const int in_col0 = (out_col * stride_w) - pad_w;
+        const int in_row0 = (out_row * stride_h) - pad_h;
+        float sum = 0.f;
+        for (int in_c = 0; in_c < inch; in_c++)
+        {
+          for (int filter_y = 0; filter_y < kernel_h; filter_y++)
+          {
+            for (int filter_x = 0; filter_x < kernel_w; filter_x++)
+            {
+              const int in_col = in_col0 + filter_x * dilation_w;
+              const int in_row = in_row0 + filter_y * dilation_h;
+
+              if (((unsigned int)in_col < (unsigned int)w) &&
+                  ((unsigned int)in_row < (unsigned int)h))
+              {
+                float input_value = input_data[(in_c * h + in_row) * w + in_col];
+                float filter_value =
+                    filter_data[((out_c * inch + in_c) * kernel_h + filter_y) * kernel_w +
+                                filter_x];
+                sum += (input_value * filter_value);
+              }
+            }
+          }
+        }
+        output_data[(out_c * outh + out_row) * outw + out_col] = sum;
+      }
+    }
+  }
+}
+
+static void direct_deconv_rowmajor(convMat_t *input, convMat_t *output, convMat_t *filter,
+                                   convParams_t *params)
+{
+  const int w = input->w;
+  const int h = input->h;
+  const int inch = input->c;
+  const int outw = output->w;
+  const int outh = output->h;
+  const int outch = output->c;
+  const int kernel_w = params->kernel_w;
+  const int kernel_h = params->kernel_h;
+  const int stride_w = params->stride_w;
+  const int stride_h = params->stride_h;
+  const int pad_w = params->pad_w;
+  const int pad_h = params->pad_h;
+  const int dilation_w = params->dilation_w;
+  const int dilation_h = params->dilation_h;
+  const float *input_data = input->data;
+  const float *filter_data = filter->data;
+  float *output_data = output->data;
+
+  for (int i = 0; i < outw * outh * outch; i++)
+  {
+    output_data[i] = 0;
+  }
+
+  for (int in_c = 0; in_c < inch; in_c++)
+  {
+    for (int in_row = 0; in_row < h; in_row++)
+    {
+      for (int in_col = 0; in_col < w; in_col++)
+      {
+        const int out_col0 = (in_col * stride_w) - pad_w;
+        const int out_row0 = (in_row * stride_h) - pad_h;
+        float in_value = input_data[(in_c * h + in_row) * w + in_col];
+        for (int out_c = 0; out_c < outch; out_c++)
+        {
+          for (int filter_y = 0; filter_y < kernel_h; filter_y++)
+          {
+            for (int filter_x = 0; filter_x < kernel_w; filter_x++)
+            {
+              const int out_col = out_col0 + filter_x * dilation_w;
+              const int out_row = out_row0 + filter_y * dilation_h;
+
+              if (((unsigned int)out_col < (unsigned int)outw) &&
+                  ((unsigned int)out_row < (unsigned int)outh))
+              {
+                float filter_value =
+                    filter_data[((in_c * outch + out_c) * kernel_h + filter_y) * kernel_w +
+                                filter_x];
+                output_data[(out_c * outh + out_row) * outw + out_col] += filter_value * in_value;
+              }
+            }
+          }
+        }
+      }
+    }
+  }
+}
+
+static void direct_sgemm_rowmajor(int Atrans, int Btrans, int m, int n, int k, float *A, float *B,
+                                  float *C)
+{
+  float *aa, *bb;
+
+  if (Atrans == trans)
+  {
+    aa = (float *)malloc(m * k * sizeof(float));
+    if (!aa)
+      return;
+
+    for (int i = 0; i < k; i++)
+    {
+      for (int j = 0; j < m; j++)
+      {
+        aa[j * k + i] = A[i * m + j];
+      }
+    }
+  }
+  else
+  {
+    aa = A;
+  }
+
+  if (Btrans == trans)
+  {
+    bb = (float *)malloc(n * k * sizeof(float));
+    if (!bb)
+      return;
+
+    for (int i = 0; i < n; i++)
+    {
+      for (int j = 0; j < k; j++)
+      {
+        bb[j * n + i] = B[i * k + j];
+      }
+    }
+  }
+  else
+  {
+    bb = B;
+  }
+
+  for (int i = 0; i < m; i++)
+  {
+    for (int j = 0; j < n; j++)
+    {
+      float res = 0.f;
+      for (int l = 0; l < k; l++)
+      {
+        res += aa[i * k + l] * bb[l * n + j];
+      }
+      C[i * n + j] = res;
+    }
+  }
+}
+
+/*static void direct_sgemm_kernel(const int k, const int lhs_stride, const int rhs_stride, const int
+res_stride,
+                                    const float *lhs_ptr, const float *rhs_ptr, float *res_ptr)
+{
+    int lstride = lhs_stride << 2;
+    int rstride = rhs_stride << 2;
+    int estride = res_stride << 2;
+    int rstep = rstride << 2;
+
+    int nk = (k >> 2) - 1;
+
+    __asm __volatile (
+        "movi v16.4s, #0x0\n"
+        "movi v17.4s, #0x0\n"
+        "movi v18.4s, #0x0\n"
+        "movi v19.4s, #0x0\n"
+        "movi v20.4s, #0x0\n"
+        "movi v21.4s, #0x0\n"
+        "movi v22.4s, #0x0\n"
+        "movi v23.4s, #0x0\n"
+        "movi v24.4s, #0x0\n"
+        "movi v25.4s, #0x0\n"
+        "movi v26.4s, #0x0\n"
+        "movi v27.4s, #0x0\n"
+        "movi v28.4s, #0x0\n"
+        "movi v29.4s, #0x0\n"
+        "movi v30.4s, #0x0\n"
+        "movi v31.4s, #0x0\n"
+
+        "mov x0, %[lhs_ptr]\n"
+        "add %[lhs_ptr], %[lhs_ptr], #16\n"
+        "ld1 {v0.4s}, [x0]\n"
+        "add x0, x0, %[lstride]\n"
+        "ld1 {v1.4s}, [x0]\n"
+        "add x0, x0, %[lstride]\n"
+        "ld1 {v2.4s}, [x0]\n"
+        "add x0, x0, %[lstride]\n"
+        "ld1 {v3.4s}, [x0]\n"
+        "add x0, x0, %[lstride]\n"
+
+        "mov x1, %[rhs_ptr]\n"
+        "add %[rhs_ptr], %[rhs_ptr], %[rstep]\n"
+        "ld1 {v8.4s, v9.4s}, [x1]\n"
+        "add x1, x1, %[rstride]\n"
+        "ld1 {v10.4s, v11.4s}, [x1]\n"
+        "add x1, x1, %[rstride]\n"
+
+        "1:\n"
+        "fmla v16.4s,  v8.4s,  v0.s[0]\n"
+        "fmla v17.4s,  v9.4s,  v0.s[0]\n"
+        "fmla v16.4s,  v10.4s, v0.s[1]\n"
+        "fmla v17.4s,  v11.4s, v0.s[1]\n"
+        "fmla v18.4s,  v8.4s,  v1.s[0]\n"
+        "fmla v19.4s,  v9.4s,  v1.s[0]\n"
+        "fmla v18.4s,  v10.4s, v1.s[1]\n"
+        "fmla v19.4s,  v11.4s, v1.s[1]\n"
+        "ld1 {v12.4s, v13.4s}, [x1]\n"
+        "fmla v20.4s,  v8.4s,  v2.s[0]\n"
+        "add x1, x1, %[rstride]\n"
+        "fmla v21.4s,  v9.4s,  v2.s[0]\n"
+        "ld1 {v14.4s, v15.4s}, [x1]\n"
+        "fmla v20.4s,  v10.4s, v2.s[1]\n"
+        "add x1, x1, %[rstride]\n"
+        "fmla v21.4s,  v11.4s, v2.s[1]\n"
+        "fmla v22.4s,  v8.4s,  v3.s[0]\n"
+        "fmla v23.4s,  v9.4s,  v3.s[0]\n"
+        "fmla v22.4s,  v10.4s, v3.s[1]\n"
+        "fmla v23.4s,  v11.4s, v3.s[1]\n"
+
+        "ld1 {v4.4s}, [x0]\n"
+        "fmla v16.4s,  v12.4s, v0.s[2]\n"
+        "add x0, x0, %[lstride]\n"
+        "fmla v17.4s,  v13.4s, v0.s[2]\n"
+        "ld1 {v5.4s}, [x0]\n"
+        "fmla v16.4s,  v14.4s, v0.s[3]\n"
+        "add x0, x0, %[lstride]\n"
+        "fmla v17.4s,  v15.4s, v0.s[3]\n"
+        "ld1 {v6.4s}, [x0]\n"
+        "fmla v18.4s,  v12.4s, v1.s[2]\n"
+        "add x0, x0, %[lstride]\n"
+        "fmla v19.4s,  v13.4s, v1.s[2]\n"
+        "ld1 {v7.4s}, [x0]\n"
+        "fmla v18.4s,  v14.4s, v1.s[3]\n"
+        "add x0, x0, %[lstride]\n"
+        "fmla v19.4s,  v15.4s, v1.s[3]\n"
+        "fmla v20.4s,  v12.4s, v2.s[2]\n"
+        "fmla v21.4s,  v13.4s, v2.s[2]\n"
+        "fmla v20.4s,  v14.4s, v2.s[3]\n"
+        "fmla v21.4s,  v15.4s, v2.s[3]\n"
+        "fmla v22.4s,  v12.4s, v3.s[2]\n"
+        "fmla v23.4s,  v13.4s, v3.s[2]\n"
+        "fmla v22.4s,  v14.4s, v3.s[3]\n"
+        "fmla v23.4s,  v15.4s, v3.s[3]\n"
+
+        "mov x0, %[lhs_ptr]\n"
+        "add %[lhs_ptr], %[lhs_ptr], #16\n"
+
+        "fmla v24.4s,  v8.4s,  v4.s[0]\n"
+        "fmla v25.4s,  v9.4s,  v4.s[0]\n"
+        "ld1 {v0.4s}, [x0]\n"
+        "fmla v24.4s,  v10.4s, v4.s[1]\n"
+        "add x0, x0, %[lstride]\n"
+        "fmla v25.4s,  v11.4s, v4.s[1]\n"
+        "ld1 {v1.4s}, [x0]\n"
+        "fmla v26.4s,  v8.4s,  v5.s[0]\n"
+        "add x0, x0, %[lstride]\n"
+        "fmla v27.4s,  v9.4s,  v5.s[0]\n"
+        "ld1 {v2.4s}, [x0]\n"
+        "fmla v26.4s,  v10.4s, v5.s[1]\n"
+        "add x0, x0, %[lstride]\n"
+        "fmla v27.4s,  v11.4s, v5.s[1]\n"
+        "ld1 {v3.4s}, [x0]\n"
+        "fmla v28.4s,  v8.4s,  v6.s[0]\n"
+        "add x0, x0, %[lstride]\n"
+        "fmla v29.4s,  v9.4s,  v6.s[0]\n"
+        "fmla v28.4s,  v10.4s, v6.s[1]\n"
+        "fmla v29.4s,  v11.4s, v6.s[1]\n"
+        "fmla v30.4s,  v8.4s,  v7.s[0]\n"
+        "fmla v31.4s,  v9.4s,  v7.s[0]\n"
+        "fmla v30.4s,  v10.4s, v7.s[1]\n"
+        "fmla v31.4s,  v11.4s, v7.s[1]\n"
+
+        "mov x1, %[rhs_ptr]\n"
+        "add %[rhs_ptr], %[rhs_ptr], %[rstep]\n"
+
+        "fmla v24.4s,  v12.4s, v4.s[2]\n"
+        "fmla v25.4s,  v13.4s, v4.s[2]\n"
+        "ld1 {v8.4s, v9.4s}, [x1]\n"
+        "fmla v24.4s,  v14.4s, v4.s[3]\n"
+        "add x1, x1, %[rstride]\n"
+        "fmla v25.4s,  v15.4s, v4.s[3]\n"
+        "ld1 {v10.4s, v11.4s}, [x1]\n"
+        "fmla v26.4s,  v12.4s, v5.s[2]\n"
+        "add x1, x1, %[rstride]\n"
+        "fmla v27.4s,  v13.4s, v5.s[2]\n"
+        "fmla v26.4s,  v14.4s, v5.s[3]\n"
+        "fmla v27.4s,  v15.4s, v5.s[3]\n"
+        "fmla v28.4s,  v12.4s, v6.s[2]\n"
+        "fmla v29.4s,  v13.4s, v6.s[2]\n"
+        "fmla v28.4s,  v14.4s, v6.s[3]\n"
+        "fmla v29.4s,  v15.4s, v6.s[3]\n"
+        "fmla v30.4s,  v12.4s, v7.s[2]\n"
+        "fmla v31.4s,  v13.4s, v7.s[2]\n"
+        "subs %w[nk], %w[nk], #1\n"
+        "fmla v30.4s,  v14.4s, v7.s[3]\n"
+        "fmla v31.4s,  v15.4s, v7.s[3]\n"
+        "bne 1b\n"
+
+        "fmla v16.4s,  v8.4s,  v0.s[0]\n"
+        "fmla v17.4s,  v9.4s,  v0.s[0]\n"
+        "fmla v16.4s,  v10.4s, v0.s[1]\n"
+        "fmla v17.4s,  v11.4s, v0.s[1]\n"
+        "fmla v18.4s,  v8.4s,  v1.s[0]\n"
+        "fmla v19.4s,  v9.4s,  v1.s[0]\n"
+        "fmla v18.4s,  v10.4s, v1.s[1]\n"
+        "fmla v19.4s,  v11.4s, v1.s[1]\n"
+        "ld1 {v12.4s, v13.4s}, [x1]\n"
+        "fmla v20.4s,  v8.4s,  v2.s[0]\n"
+        "add x1, x1, %[rstride]\n"
+        "fmla v21.4s,  v9.4s,  v2.s[0]\n"
+        "ld1 {v14.4s, v15.4s}, [x1]\n"
+        "fmla v20.4s,  v10.4s, v2.s[1]\n"
+        "add x1, x1, %[rstride]\n"
+        "fmla v21.4s,  v11.4s, v2.s[1]\n"
+        "fmla v22.4s,  v8.4s,  v3.s[0]\n"
+        "fmla v23.4s,  v9.4s,  v3.s[0]\n"
+        "fmla v22.4s,  v10.4s, v3.s[1]\n"
+        "fmla v23.4s,  v11.4s, v3.s[1]\n"
+
+        "ld1 {v4.4s}, [x0]\n"
+        "fmla v16.4s,  v12.4s, v0.s[2]\n"
+        "add x0, x0, %[lstride]\n"
+        "fmla v17.4s,  v13.4s, v0.s[2]\n"
+        "ld1 {v5.4s}, [x0]\n"
+        "fmla v16.4s,  v14.4s, v0.s[3]\n"
+        "add x0, x0, %[lstride]\n"
+        "fmla v17.4s,  v15.4s, v0.s[3]\n"
+        "ld1 {v6.4s}, [x0]\n"
+        "fmla v18.4s,  v12.4s, v1.s[2]\n"
+        "add x0, x0, %[lstride]\n"
+        "fmla v19.4s,  v13.4s, v1.s[2]\n"
+        "ld1 {v7.4s}, [x0]\n"
+        "fmla v18.4s,  v14.4s, v1.s[3]\n"
+        "add x0, x0, %[lstride]\n"
+        "fmla v19.4s,  v15.4s, v1.s[3]\n"
+        "fmla v20.4s,  v12.4s, v2.s[2]\n"
+        "fmla v21.4s,  v13.4s, v2.s[2]\n"
+        "fmla v20.4s,  v14.4s, v2.s[3]\n"
+        "fmla v21.4s,  v15.4s, v2.s[3]\n"
+        "fmla v22.4s,  v12.4s, v3.s[2]\n"
+        "fmla v23.4s,  v13.4s, v3.s[2]\n"
+        "fmla v22.4s,  v14.4s, v3.s[3]\n"
+        "fmla v23.4s,  v15.4s, v3.s[3]\n"
+
+        "mov x0, %[res_ptr]\n"
+        "fmla v24.4s,  v8.4s,  v4.s[0]\n"
+        "fmla v25.4s,  v9.4s,  v4.s[0]\n"
+        "st1 {v16.4s, v17.4s}, [x0]\n"
+        "add x0, x0, %[estride]\n"
+        "fmla v24.4s,  v10.4s, v4.s[1]\n"
+        "fmla v25.4s,  v11.4s, v4.s[1]\n"
+        "st1 {v18.4s, v19.4s}, [x0]\n"
+        "add x0, x0, %[estride]\n"
+        "fmla v26.4s,  v8.4s,  v5.s[0]\n"
+        "fmla v27.4s,  v9.4s,  v5.s[0]\n"
+        "st1 {v20.4s, v21.4s}, [x0]\n"
+        "add x0, x0, %[estride]\n"
+        "fmla v26.4s,  v10.4s, v5.s[1]\n"
+        "fmla v27.4s,  v11.4s, v5.s[1]\n"
+        "st1 {v22.4s, v23.4s}, [x0]\n"
+        "add x0, x0, %[estride]\n"
+        "fmla v28.4s,  v8.4s,  v6.s[0]\n"
+        "fmla v29.4s,  v9.4s,  v6.s[0]\n"
+        "fmla v28.4s,  v10.4s, v6.s[1]\n"
+        "fmla v29.4s,  v11.4s, v6.s[1]\n"
+        "fmla v30.4s,  v8.4s,  v7.s[0]\n"
+        "fmla v31.4s,  v9.4s,  v7.s[0]\n"
+        "fmla v30.4s,  v10.4s, v7.s[1]\n"
+        "fmla v31.4s,  v11.4s, v7.s[1]\n"
+
+        "fmla v24.4s,  v12.4s, v4.s[2]\n"
+        "fmla v25.4s,  v13.4s, v4.s[2]\n"
+        "fmla v24.4s,  v14.4s, v4.s[3]\n"
+        "fmla v25.4s,  v15.4s, v4.s[3]\n"
+        "fmla v26.4s,  v12.4s, v5.s[2]\n"
+        "fmla v27.4s,  v13.4s, v5.s[2]\n"
+        "st1 {v24.4s, v25.4s}, [x0]\n"
+        "add x0, x0, %[estride]\n"
+        "fmla v26.4s,  v14.4s, v5.s[3]\n"
+        "fmla v27.4s,  v15.4s, v5.s[3]\n"
+        "fmla v28.4s,  v12.4s, v6.s[2]\n"
+        "fmla v29.4s,  v13.4s, v6.s[2]\n"
+        "st1 {v26.4s, v27.4s}, [x0]\n"
+        "add x0, x0, %[estride]\n"
+        "fmla v28.4s,  v14.4s, v6.s[3]\n"
+        "fmla v29.4s,  v15.4s, v6.s[3]\n"
+        "fmla v30.4s,  v12.4s, v7.s[2]\n"
+        "fmla v31.4s,  v13.4s, v7.s[2]\n"
+        "st1 {v28.4s, v29.4s}, [x0]\n"
+        "add x0, x0, %[estride]\n"
+        "fmla v30.4s,  v14.4s, v7.s[3]\n"
+        "fmla v31.4s,  v15.4s, v7.s[3]\n"
+        "st1 {v30.4s, v31.4s}, [x0]\n"
+        :[lhs_ptr] "+r" (lhs_ptr), [rhs_ptr] "+r" (rhs_ptr), [res_ptr] "+r" (res_ptr),
+          [nk] "+r" (nk)
+        : [lstride] "r" (lstride), [rstride] "r" (rstride), [estride] "r" (estride), [rstep] "r"
+(rstep)
+        : "x0", "x1", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
+          "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18",
+          "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31"
+    );
+}*/
+
+static void direct_conv_colmajor(convMat_t *input, convMat_t *output, convMat_t *filter,
+                                 convParams_t *params)
+{
+  const int w = input->w;
+  const int h = input->h;
+  const int inch = input->c;
+  const int outw = output->w;
+  const int outh = output->h;
+  const int outch = output->c;
+  const int kernel_w = params->kernel_w;
+  const int kernel_h = params->kernel_h;
+  const int stride_w = params->stride_w;
+  const int stride_h = params->stride_h;
+  const int pad_w = params->pad_w;
+  const int pad_h = params->pad_h;
+  const int dilation_w = params->dilation_w;
+  const int dilation_h = params->dilation_h;
+  const float *input_data = input->data;
+  const float *filter_data = filter->data;
+  float *output_data = output->data;
+
+  for (int out_row = 0; out_row < outh; out_row++)
+  {
+    for (int out_col = 0; out_col < outw; out_col++)
+    {
+      const int in_col0 = (out_col * stride_w) - pad_w;
+      const int in_row0 = (out_row * stride_h) - pad_h;
+
+      for (int out_c = 0; out_c < outch; out_c++)
+      {
+        float sum = 0.f;
+        for (int filter_y = 0; filter_y < kernel_h; filter_y++)
+        {
+          for (int filter_x = 0; filter_x < kernel_w; filter_x++)
+          {
+            const int in_col = in_col0 + filter_x * dilation_w;
+            const int in_row = in_row0 + filter_y * dilation_h;
+
+            if (((unsigned int)in_col < (unsigned int)w) &&
+                ((unsigned int)in_row < (unsigned int)h))
+            {
+              for (int in_c = 0; in_c < inch; in_c++)
+              {
+                float input_value = input_data[(in_row * w + in_col) * inch + in_c];
+                float filter_value =
+                    filter_data[((filter_y * kernel_w + filter_x) * inch + in_c) * outch + out_c];
+                sum += (input_value * filter_value);
+              }
+            }
+          }
+        }
+        output_data[(out_row * outw + out_col) * outch + out_c] = sum;
+      }
+    }
+  }
+}
+
+static void direct_sgemm_colmajor(int Atrans, int Btrans, int m, int n, int k, float *A, float *B,
+                                  float *C)
+{
+  float *aa, *bb;
+
+  if (Atrans)
+  {
+    aa = (float *)malloc(m * k * sizeof(float));
+    if (!aa)
+      return;
+
+    for (int i = 0; i < k; i++)
+    {
+      for (int j = 0; j < m; j++)
+      {
+        aa[i * m + j] = A[j * k + i];
+      }
+    }
+  }
+  else
+  {
+    aa = A;
+  }
+
+  if (Btrans)
+  {
+    bb = (float *)malloc(n * k * sizeof(float));
+    if (!bb)
+      return;
+
+    for (int i = 0; i < n; i++)
+    {
+      for (int j = 0; j < k; j++)
+      {
+        bb[i * k + j] = B[j * n + i];
+      }
+    }
+  }
+  else
+  {
+    bb = B;
+  }
+
+  for (int i = 0; i < m; i++)
+  {
+    for (int j = 0; j < n; j++)
+    {
+      float res = 0.f;
+      for (int l = 0; l < k; l++)
+      {
+        res += bb[j * k + l] * aa[l * m + i];
+      }
+      C[j * m + i] = res;
+    }
+  }
+}
+
+#if 0
+static int test_sgemm(int m, int n, int k, int loops)
+{
+	struct timeval start, end;
+	float total_time = 0.f;
+
+	const int mb = 180;
+	const int nb = 1440;
+	const int kb = 512;
+	
+	const int mr = 4;
+	const int nr = 12;
+
+#if 0
+	const int pm = (m + mr - 1) / mr * mr;
+	const int pn = (n + nr - 1) / nr * nr;
+	const int pk = k;
+#else
+	const int pm = (mb + mr - 1) / mr * mr;
+	const int pn = (nb + nr - 1) / nr * nr;
+	const int pk = kb;
+#endif
+	const int nm = (m + mb - 1) / mb;
+	const int nn = (n + nb - 1) / nb;
+	const int nk = (k + kb - 1) / kb;
+		
+	const int rm = m % mb;
+	const int rn = n % nb;
+	const int rk = k % kb;
+
+	float *A = (float *)malloc(m * k * sizeof(float));
+	if(!A) return 0;
+
+	for(int i = 0 ; i < m * k; i++)
+	{
+		A[i] = 0.001 + i * 0.000001;
+	}
+		
+	float *B = (float *)malloc(k * n * sizeof(float));
+	if(!B) return 0;
+
+	for(int i = 0 ; i < n * k; i++)
+	{
+		B[i] = 0.001 - i * 0.000001;
+	}
+
+	float *C = (float *)malloc(m * n * sizeof(float));
+	if(!C) return 0;
+
+#if 0
+	float *PA = (float *)malloc(pm * pk * sizeof(float));
+	if(!PA) return 0;
+
+	float *PB = (float *)malloc(pk * pn * sizeof(float));
+	if(!PB) return 0;
+#else
+	float PA[pm * pk];
+	float PB[pk * pn];
+#endif
+
+	for(int nloop = 0; nloop < loops; nloop++)
+
+	{
+		gettimeofday(&start, NULL);
+
+		//pack_rowmajor_notrans_lhs(mr, m, k, k, A, PA);
+		//pack_rowmajor_notrans_rhs(nr, n, k, n, B, PB);
+#if 1
+		for (int j = 0; j < nn; j++)
+		{
+			const int _nb = (j != nn - 1 || rn == 0) ? nb : rn;
+			for (int l = 0; l < nk; l++)
+			{
+				const int _kb = (l != nk - 1 || rk == 0) ? kb : rk;
+				pack_rowmajor_notrans_rhs(nr, _nb, _kb, 1, n, &B[l * kb * n + j * nb], PB);
+				for(int i = 0; i < nm; i++)
+				{
+					const int _mb = (i != nm - 1 || rm == 0) ? mb : rm;
+					pack_rowmajor_notrans_lhs(mr, _mb, _kb, 1, k, &A[i * mb * k + l * kb], PA);
+					sgemm_rowmajor_macro_kernel_divnm(mr, nr, _mb, _nb, _kb, PA, PB, &C[i * mb * n + j * nb], l, n, _kb);
+					//sgemm_rowmajor_macro_kernel_divnm(mr, nr, _mb, _nb, _kb, &PA[i * mb * k + l * kb], &PB[l * kb * pn + j * nb], &C[i * mb * n + j * nb], l, n, pk);
+				}
+			}
+		}
+#else
+		for (int j = 0; j < nm; j++)
+		{
+			const int _mb = (j != nm - 1 || rm == 0) ? mb : rm;
+			for (int l = 0; l < nk; l++)
+			{
+				const int _kb = (l != nk - 1 || rk == 0) ? kb : rk;
+				pack_rowmajor_notrans_lhs(mr, _mb, _kb, 1, k, &A[j * mb * k + l * kb], PA);
+				for(int i = 0; i < nn; i++)
+				{
+					const int _nb = (i != nn - 1 || rn == 0) ? nb : rn;
+					pack_rowmajor_notrans_rhs(nr, _nb, _kb, 1, n, &B[l * kb * n + i * nb], PB);
+					sgemm_rowmajor_macro_kernel_divmn(mr, nr, _mb, _nb, _kb, PA, PB, &C[j * mb * n + i * nb], l, n, _kb);
+					//sgemm_rowmajor_macro_kernel_divmn(mr, nr, _mb, _nb, _kb, &PA[i * mb * k + l * kb], &PB[l * kb * pn + j * nb], &C[i * mb * n + j * nb], l, n, pk);
+				}
+			}
+		}
+#endif
+		gettimeofday(&end, NULL);
+		total_time += ((end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000 + start.tv_usec))/1000;
+	}
+
+	int div = m * n < 16 ? m * n : 16;
+	int num = m * n > 64 ? 64 : m * n;
+
+	float *c_ptr = &C[0];
+	for(int i = 0; i < num; i++)
+	{
+		printf("%f ", c_ptr[i]);
+		if((i + 1) % div == 0) printf("\n");
+	}
+
+	printf("\n");
+
+	c_ptr = &C[m * n - num];
+	for(int i = 0; i < num; i++)
+	{
+		printf("%f ", c_ptr[i]);
+		if((i + 1) % div == 0) printf("\n");
+	}
+
+	printf("\n");
+
+	long long total_size = (long long)m *n * k * 2;
+	printf("AVER Time consuming: %.2fms, total size: %lld, (GFLOP: %.2f)\n", total_time / loops , total_size, (double)total_size/(total_time / loops)/1000000);
+	
+	free(A);
+	free(B);
+	free(C);
+
+	//free(PA);
+	//free(PB);
+	
+}
+#endif
+
+static int test_sgemm(int m, int n, int k, int type, int loops)
+{
+  struct timeval start, end;
+  float total_time = 0.f;
+
+  // printf("1.\n");
+
+  float *A = (float *)malloc(m * k * sizeof(float));
+  if (!A)
+    return 0;
+
+  for (int i = 0; i < m * k; i++)
+  {
+    A[i] = 0.001 + i * 0.001; // i * 0.000001;
+  }
+
+  float *B = (float *)malloc(k * n * sizeof(float));
+  if (!B)
+    return 0;
+
+  for (int i = 0; i < n * k; i++)
+  {
+    B[i] = 0.001 - i * 0.001; // - i * 0.000001;
+  }
+
+  float *C = (float *)malloc(m * n * sizeof(float));
+  if (!C)
+    return 0;
+
+  for (int nloop = 0; nloop < loops; nloop++)
+
+  {
+    gettimeofday(&start, NULL);
+
+    if (type == 0)
+    {
+      // direct_sgemm_rowmajor(notrans, notrans, m, n, k, A, B, C);
+      direct_sgemm_colmajor(notrans, notrans, m, n, k, A, B, C);
+    }
+
+    else if (type == 1)
+    {
+      class sgemm_singlethread my_gemm(colMajor, notrans, notrans, m, n, k, A, B, C, 1);
+      my_gemm.run();
+    }
+
+    /*else if(type == 2)
+    {
+        for(int i = 0; i < m / 8; i++)
+        {
+            for(int j = 0; j < n / 8; j++)
+            {
+                direct_sgemm_kernel(k, k, n, n, A + i * 8 * k, B + j * 8, C + i * 8 * n + j * 8);
+            }
+        }
+    }*/
+
+    gettimeofday(&end, NULL);
+    total_time +=
+        ((end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000 + start.tv_usec)) / 1000;
+  }
+
+  int div = m * n < 16 ? m * n : 16;
+  int num = m * n > 64 ? 64 : m * n;
+
+  float *c_ptr = &C[0];
+  for (int i = 0; i < num; i++)
+  {
+    printf("%f ", c_ptr[i]);
+    if ((i + 1) % div == 0)
+      printf("\n");
+  }
+
+  printf("\n");
+
+  c_ptr = &C[m * n - num];
+  for (int i = 0; i < num; i++)
+  {
+    printf("%f ", c_ptr[i]);
+    if ((i + 1) % div == 0)
+      printf("\n");
+  }
+
+  printf("\n");
+
+  long long total_size = (long long)m * n * k * 2;
+  printf("AVER Time consuming: %.2fms, total size: %lld, (GFLOP: %.2f)\n", total_time / loops,
+         total_size, (double)total_size / (total_time / loops) / 1000000);
+
+  free(A);
+  free(B);
+  free(C);
+
+  return 0;
+}
+
+void weight_tensorflow2caffe(float *out, float *in, int H, int W, int C, int N)
+{ // HWCN ---> NCHW
+  for (int h = 0; h < H; ++h)
+  {
+    for (int w = 0; w < W; ++w)
+    {
+      for (int c = 0; c < C; ++c)
+      {
+        for (int n = 0; n < N; ++n)
+        {
+          int index_in = h * W * C * N + w * C * N + c * N + n;
+          int index_out = n * C * H * W + c * H * W + h * W + w;
+          // printf("%3d <--- %3d\n", index_out, index_in);
+          out[index_out] = in[index_in];
+        }
+      }
+    }
+  }
+}
+
+void trans_weight2winograd(const convMat_t &_kernel, float **winograd_weight)
+{
+  const double *G;
+  const int kernel_size = _kernel.h;
+  const int channels = _kernel.c;
+  const int num_output = _kernel.n;
+
+  int tile_h_in_, tile_w_in_;
+  int M, N;
+
+  /*Step 1: transfer weight to winograd domain*/
+  if (kernel_size == 3)
+  {
+    M = winograd_para_3x3s1::M;
+    N = winograd_para_3x3s1::N;
+    G = winograd_para_3x3s1::getG();
+  }
+  else
+  {
+    M = winograd_para_5x5s1::M;
+    N = winograd_para_5x5s1::N;
+    G = winograd_para_5x5s1::getG();
+  }
+
+  tile_h_in_ = tile_w_in_ = M;
+
+  float *winograd_g = new float[M * M * N * N];
+  if (NULL == winograd_g)
+    return;
+  kronecker_product(winograd_g, G, G, M, N, M, N);
+
+  *winograd_weight = new float[tile_h_in_ * tile_w_in_ * channels * num_output];
+
+  if (NULL == *winograd_weight)
+    return;
+
+  float *weight_data_tran = new float[_kernel.h * _kernel.w * _kernel.c * _kernel.n];
+  if (NULL == weight_data_tran)
+    return;
+  weight_tensorflow2caffe(weight_data_tran, _kernel.data, kernel_size, kernel_size, channels,
+                          num_output);
+
+  class sgemm_singlethread sgemm(rowMajor, notrans, trans, tile_h_in_ * tile_w_in_,
+                                 channels * num_output, kernel_size * kernel_size, winograd_g,
+                                 weight_data_tran, *winograd_weight, 1);
+
+  sgemm.run();
+
+  delete[] weight_data_tran;
+
+  /*With winograd, original weight data is useless.*/
+  delete[] winograd_g;
+}
+
+static int test_conv(const int w, const int h, const int kernel_size, const int stride,
+                     const int inch, const int outch, const int padding, const int conv_type,
+                     const int thread_num, const int loops)
+{
+  struct timeval start, end;
+  float total_time = 0.f;
+
+  struct timeval start1, end1;
+  float total_time1 = 0.f;
+
+  const int dilation = 1;
+
+  const int kernel_dilation = dilation * (kernel_size - 1) + 1;
+
+  convMat_t input;
+  convMat_t output;
+  convMat_t filter;
+  convParams_t params;
+
+  int pad_l, pad_r, pad_t, pad_b;
+  if (padding)
+  {
+    int pad_w = kernel_dilation + (w - 1) / stride * stride - w;
+    int pad_h = kernel_dilation + (h - 1) / stride * stride - h;
+    pad_l = pad_w / 2;
+    pad_r = pad_w - pad_l;
+    pad_t = pad_h / 2;
+    pad_b = pad_h - pad_t;
+  }
+  else
+  {
+    pad_l = pad_r = pad_t = pad_b = 0;
+  }
+
+  input.w = w;
+  input.h = h;
+  input.c = inch;
+  input.n = 1;
+#ifdef NCNN
+  input.data =
+      (float *)malloc(alignSize(input.w * input.h, 16 / sizeof(float)) * input.c * sizeof(float));
+#else
+  input.data = (float *)malloc(input.w * input.h * input.c * sizeof(float));
+#endif
+
+  if (!input.data)
+    return 0;
+
+  output.w = (w + pad_l + pad_r - kernel_dilation) / stride + 1;
+  output.h = (h + pad_t + pad_b - kernel_dilation) / stride + 1;
+  output.c = outch;
+  output.n = 1;
+#ifdef NCNN
+  output.data = (float *)malloc(alignSize(output.w * output.h, 16 / sizeof(float)) * output.c *
+                                sizeof(float));
+#else
+  output.data = (float *)malloc(output.w * output.h * output.c * sizeof(float));
+#endif
+
+  if (!output.data)
+    return 0;
+
+  for (int i = 0; i < output.w * output.h * output.c; i++)
+  {
+    output.data[i] = 0;
+  }
+
+  filter.w = kernel_size;
+  filter.h = kernel_size;
+  filter.c = inch;
+  filter.n = outch;
+  filter.data = (float *)malloc(filter.w * filter.h * filter.c * filter.n * sizeof(float));
+  if (!filter.data)
+    return 0;
+
+  for (int i = 0; i < input.w * input.h * input.c; i++)
+  {
+    input.data[i] = 0.001 + i * 0.000001;
+  }
+
+#if 1
+  for (int i = 0; i < filter.w * filter.h * filter.c * filter.n; i++)
+  {
+    filter.data[i] = 0.001 - i * 0.000001;
+  }
+#else
+  for (int i = 0; i < filter.w * filter.h * filter.c * filter.n; i++)
+  {
+    if ((i + 1) % 15 == 0)
+      filter.data[i] = 0.001 - i * 0.000001;
+    else
+      filter.data[i] = 0;
+  }
+#endif
+  params.kernel_w = kernel_size;
+  params.kernel_h = kernel_size;
+  params.stride_w = stride;
+  params.stride_h = stride;
+  params.padding = padding;
+  params.pad_w = pad_l;
+  params.pad_h = pad_t;
+  params.dilation_w = dilation;
+  params.dilation_h = dilation;
+
+  const int m = output.c;
+  const int n = output.w * output.h;
+  const int k = params.kernel_h * params.kernel_w * input.c;
+
+  // ocl_context_t context;
+  size_t local_min[2];
+  /**
+      if(conv_type == 14 || conv_type == 15 || conv_type == 6)
+      {
+          if(init_gpu(&context) < 0) return -1;
+          //if(conv_type ==14 || conv_type == 5) sgemm_ocltune(&context, m, n, (k < 1024 ? k :
+     1024), local_min);
+          //else if(conv_type == 6)
+          {
+              if(kernel_size == 3) directconv_3x3S1_tune(&context, &input, &filter, &output,
+     local_min);
+              else if(kernel_size == 1) directconv_1x1S1_tune(&context, &input, &filter, &output,
+     local_min);
+          }
+          //local_min[0] = 1; local_min[1] = 1;
+      }
+      **/
+  if (conv_type == 0)
+  {
+    for (int nloop = 0; nloop < loops; nloop++)
+    {
+      gettimeofday(&start, NULL);
+
+      direct_conv_rowmajor(&input, &output, &filter, &params);
+      // direct_conv_colmajor(&input, &output, &filter, &params);
+
+      gettimeofday(&end, NULL);
+      total_time +=
+          ((end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000 + start.tv_usec)) / 1000;
+    }
+  }
+  else if (conv_type == 1)
+  {
+    for (int nloop = 0; nloop < loops; nloop++)
+    {
+      // printf("nloop = %d, thread_num = %d\n", nloop, thread_num);
+      // class srcn_sgemm my_gemm(input, filter, output, params, thread_num, col_major);
+      gettimeofday(&start, NULL);
+
+      /*if(thread_num == 1)
+      {
+          class conv_sgemm_singlethread my_gemm(input, filter, output, params, col_major);
+          my_gemm.run();
+      }
+      else
+      {
+          class conv_sgemm_multithreads my_gemm(input, filter, output, params, thread_num,
+      col_major);
+          my_gemm.run();
+      }*/
+
+      srcn_convolution2D(input, filter, output, params, NULL, thread_num, row_major);
+
+      // printf("sync\n");
+
+      gettimeofday(&end, NULL);
+      total_time +=
+          ((end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000 + start.tv_usec)) / 1000;
+    }
+  }
+  else if (conv_type == 2)
+  {
+    float *winograd_weight;
+
+    // trans_weight2winograd(filter, &winograd_weight);
+
+    winogradParams_t wparams = {params.kernel_w,
+                                params.kernel_h,
+                                params.stride_w,
+                                params.stride_h,
+                                params.dilation_w,
+                                params.dilation_h,
+                                1,
+                                w,
+                                h,
+                                input.c,
+                                output.c,
+                                thread_num,
+                                col_major,
+                                filter.data};
+    winograd_weight = trans_weight2winograd(wparams);
+
+    for (int nloop = 0; nloop < loops; nloop++)
+    {
+      gettimeofday(&start, NULL);
+
+      // class conv_winograd my_sgemm(input, output, params, col_major, winograd_weight, thread_num,
+      // w * h, n);
+      // my_sgemm.run();
+
+      srcn_convolution2D(input, filter, output, params, winograd_weight, thread_num, row_major);
+
+      gettimeofday(&end, NULL);
+      total_time +=
+          ((end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000 + start.tv_usec)) / 1000;
+    }
+  }
+  else if (conv_type == 3)
+  {
+    void *sparse_weight = trans_weight2sparse(filter);
+
+    for (int nloop = 0; nloop < loops; nloop++)
+    {
+      gettimeofday(&start, NULL);
+
+      srcn_sparse_convolution2D(input, output, params, sparse_weight, thread_num, row_major);
+
+      gettimeofday(&end, NULL);
+      total_time +=
+          ((end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000 + start.tv_usec)) / 1000;
+    }
+
+    sparse_release(outch, sparse_weight);
+  } /**
+else if(conv_type == 4)
+{
+#if 0
+    cl_int err;
+    convlib::load_opencl("./libmali.so");
+    const int mpad = (m + 4 - 1) / 4 * 4;
+    const int npad = (n + 4 - 1) / 4 * 4;
+    cl_mem lhs_gpu = convlib::clCreateBuffer(context.context, CL_MEM_READ_WRITE |
+CL_MEM_ALLOC_HOST_PTR, mpad * k * sizeof(float), NULL, &err);
+    if(err != CL_SUCCESS)
+    {
+        printf("err = %d@%s:%d\n", err, __FUNCTION__, __LINE__);
+        return -1;
+    }
+
+    cl_image_format rhs_format = {CL_RGBA, CL_FLOAT};
+    cl_image_desc desc =
+    {
+        CL_MEM_OBJECT_IMAGE2D,
+        (size_t)npad / 4,
+        (size_t)k,
+        0, 0,
+        0,
+        0, 0, 0, 0
+    };
+    cl_mem rhs_gpu = convlib::clCreateImage(context.context, CL_MEM_READ_ONLY |
+CL_MEM_ALLOC_HOST_PTR, &rhs_format, &desc, NULL, &err);
+    if(err != CL_SUCCESS)
+    {
+        printf("err = %d@%s:%d\n", err, __FUNCTION__, __LINE__);
+        return -1;
+    }
+
+    cl_mem rhs_gpu = convlib::clCreateBuffer(context.context, CL_MEM_READ_WRITE |
+CL_MEM_ALLOC_HOST_PTR, npad * k * sizeof(float), NULL, &err);
+    if(err != CL_SUCCESS)
+    {
+        printf("err = %d@%s:%d\n", err, __FUNCTION__, __LINE__);
+        return -1;;
+    }
+
+    cl_mem res_gpu = convlib::clCreateBuffer(context.context, CL_MEM_READ_WRITE |
+CL_MEM_ALLOC_HOST_PTR, mpad * npad * sizeof(float), NULL, &err);
+    if(err != CL_SUCCESS)
+    {
+        printf("err = %d@%s:%d\n", err, __FUNCTION__, __LINE__);
+        return -1;
+    }
+#endif
+    for(int nloop = 0; nloop < loops + 1; nloop++)
+    {
+        gettimeofday(&start, NULL);
+
+        //cl_mem _res_gpu = conv2D_gpu_sgemm(&context, &input, &filter, &output, &params, local_min,
+lhs_gpu, rhs_gpu, res_gpu);
+
+        //get_result_gpu(&context, output.data + gpu_data_off, _res_gpu, m, n);
+        srcn_convolution2D_gpu(input, filter, output, params, row_major);
+
+        gettimeofday(&end, NULL);
+
+        if(nloop > 0) total_time += ((end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000
++ start.tv_usec))/1000;
+    }
+}
+else if(conv_type == 5)
+{
+
+    for(int nloop = 0; nloop < loops + 1; nloop++)
+    {
+        gettimeofday(&start, NULL);
+
+        //cl_mem res_gpu = conv2D_gpu_sgemm(&context, &input, &filter, &output, &params, local_min);
+
+        //clFlush(context.cmdQueue);
+        gettimeofday(&start1, NULL);
+    #if 1
+        srcn_convolution2D(input, filter, output, params, NULL, thread_num, row_major
+
+    #endif
+        //usleep(80 * 1000);
+        gettimeofday(&end1, NULL);
+        total_time1 += ((end1.tv_sec * 1000000 + end1.tv_usec) - (start1.tv_sec * 1000000 +
+start1.tv_usec))/1000;
+
+        //get_result_gpu(&context, output.data + gpu_data_off, res_gpu, m, n);
+
+        srcn_convolution2D_dpu(input, filter, output, params, row_major);
+
+        gettimeofday(&end, NULL);
+        if(nloop > 0) total_time += ((end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000
++ start.tv_usec))/1000;
+    }
+}
+else if(conv_type == 6)
+{
+    for(int nloop = 0; nloop < loops; nloop++)
+    {
+        gettimeofday(&start, NULL);
+
+        if(kernel_size == 3 && stride == 1 && padding == 0)
+        {
+            conv2D_gpu_directconv_3x3S1(&context, &input, &filter, &output, &params, local_min);
+        }
+        else if(kernel_size == 1 && stride == 1 && padding == 0)
+        {
+            conv2D_gpu_directconv_1x1S1(&context, &input, &filter, &output, &params, local_min);
+        }
+
+        gettimeofday(&end, NULL);
+        total_time += ((end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000 +
+start.tv_usec))/1000;
+    }
+}**/
+
+  int div = m * n < 16 ? m * n : 16;
+  int num = m * n > 64 ? 64 : m * n;
+
+  if (conv_type < 4)
+    printf("[CPU RESULT]\n");
+  else if (conv_type == 4)
+    printf("[GPU RESULT]\n");
+  else if (conv_type == 5)
+    printf("[DPU RESULT]\n");
+  float *c_ptr = output.data;
+  for (int i = 0; i < num; i++)
+  {
+    printf("%f ", c_ptr[i]);
+    if ((i + 1) % div == 0)
+      printf("\n");
+  }
+
+  printf("\n");
+
+  c_ptr = &output.data[m * n - num];
+  for (int i = 0; i < num; i++)
+  {
+    printf("%f ", c_ptr[i]);
+    if ((i + 1) % div == 0)
+      printf("\n");
+  }
+
+  printf("\n");
+
+  long long total_size = (long long)m * n * k * 2;
+  printf(
+      "AVER Time consuming: %.2fms, CPU Time consuming: %.2fms, total size: %lld, (GFLOP: %.2f)\n",
+      total_time / loops, total_time1 / loops, total_size,
+      (double)total_size / (total_time / loops) / 1000000);
+
+  free(input.data);
+  free(output.data);
+  free(filter.data);
+
+  return 0;
+}
+
+static int test_deconv(const int w, const int h, const int kernel_size, const int stride,
+                       const int inch, const int outch, const int padding, const int conv_type,
+                       const int thread_num, const int loops)
+{
+  struct timeval start, end;
+  float total_time = 0.f;
+
+  const int dilation = 1;
+
+  const int kernel_dilation = dilation * (kernel_size - 1) + 1;
+
+  convMat_t input;
+  convMat_t output;
+  convMat_t filter;
+  convParams_t params;
+
+  int pad_l, pad_r, pad_t, pad_b;
+  if (padding)
+  {
+    int pad_w = kernel_dilation - 1;
+    int pad_h = kernel_dilation - 1;
+    pad_l = pad_w / 2;
+    pad_r = pad_w - pad_l;
+    pad_t = pad_h / 2;
+    pad_b = pad_h - pad_t;
+  }
+  else
+  {
+    pad_l = pad_r = pad_t = pad_b = 0;
+  }
+
+  input.w = w;
+  input.h = h;
+  input.c = inch;
+  input.data = (float *)malloc(input.w * input.h * input.c * sizeof(float));
+  if (!input.data)
+    return 0;
+
+  // output.w = (w + pad_l + pad_r - kernel_dilation) / stride + 1;
+  // output.h = (h + pad_t + pad_b - kernel_dilation) / stride + 1;
+  output.w = stride * (w - 1) + kernel_dilation - (pad_l + pad_r);
+  output.h = stride * (h - 1) + kernel_dilation - (pad_t + pad_b);
+  output.c = outch;
+  output.data = (float *)malloc(output.w * output.h * output.c * sizeof(float));
+  if (!output.data)
+    return 0;
+
+  filter.w = kernel_size;
+  filter.h = kernel_size;
+  filter.c = outch;
+  filter.n = inch;
+  filter.data = (float *)malloc(filter.w * filter.h * filter.c * filter.n * sizeof(float));
+  if (!filter.data)
+    return 0;
+
+  for (int i = 0; i < input.w * input.h * input.c; i++)
+  {
+    input.data[i] = 0.001 + i * 0.000001;
+  }
+
+  for (int i = 0; i < filter.w * filter.h * filter.c * filter.n; i++)
+  {
+    filter.data[i] = 0.001 - i * 0.000001;
+  }
+
+  params.kernel_w = kernel_size;
+  params.kernel_h = kernel_size;
+  params.stride_w = stride;
+  params.stride_h = stride;
+  params.padding = padding;
+  params.pad_w = pad_l;
+  params.pad_h = pad_t;
+  params.dilation_w = dilation;
+  params.dilation_h = dilation;
+
+  const int m = params.kernel_h * params.kernel_w * output.c;
+  const int n = input.w * input.h;
+  const int k = input.c;
+
+  if (conv_type == 0)
+  {
+    for (int nloop = 0; nloop < loops; nloop++)
+
+    {
+      gettimeofday(&start, NULL);
+
+      direct_deconv_rowmajor(&input, &output, &filter, &params);
+
+      gettimeofday(&end, NULL);
+      total_time +=
+          ((end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000 + start.tv_usec)) / 1000;
+    }
+  }
+  else if (conv_type == 1)
+  {
+    for (int nloop = 0; nloop < loops; nloop++)
+
+    {
+      gettimeofday(&start, NULL);
+
+      for (int i = 0; i < output.w * output.h * output.c; i++)
+      {
+        output.data[i] = 0;
+      }
+
+      srcn_deconvolution2D(input, filter, output, params, thread_num, row_major);
+
+      gettimeofday(&end, NULL);
+      total_time +=
+          ((end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000 + start.tv_usec)) / 1000;
+    }
+  }
+
+  const int output_size = output.w * output.h * output.c;
+
+  int div = output_size < 16 ? output_size : 16;
+  int num = output_size > 64 ? 64 : output_size;
+
+  float *c_ptr = output.data;
+  for (int i = 0; i < num; i++)
+  {
+    printf("%f ", c_ptr[i]);
+    if ((i + 1) % div == 0)
+      printf("\n");
+  }
+
+  printf("\n");
+
+  c_ptr = &output.data[output_size - num];
+  for (int i = 0; i < num; i++)
+  {
+    printf("%f ", c_ptr[i]);
+    if ((i + 1) % div == 0)
+      printf("\n");
+  }
+
+  printf("\n");
+
+  long long total_size = (long long)m * n * k * 2;
+  printf("AVER Time consuming: %.2fms, total size: %lld, (GFLOP: %.2f)\n", total_time / loops,
+         total_size, (double)total_size / (total_time / loops) / 1000000);
+
+  free(input.data);
+  free(output.data);
+  free(filter.data);
+
+  return 0;
+}
+
+static int test_batch_conv(const int batch, const int w, const int h, const int kernel_size,
+                           const int stride, const int inch, const int outch, const int padding,
+                           const int conv_type, const int thread_num, const int loops)
+{
+  struct timeval start, end;
+  float total_time = 0.f;
+
+  const int dilation = 1;
+
+  const int kernel_dilation = dilation * (kernel_size - 1) + 1;
+
+  convMat_t input;
+  convMat_t output;
+  convMat_t filter;
+  convParams_t params;
+
+  int pad_l, pad_r, pad_t, pad_b;
+  if (padding)
+  {
+    int pad_w = kernel_dilation + (w - 1) / stride * stride - w;
+    int pad_h = kernel_dilation + (h - 1) / stride * stride - h;
+    pad_l = pad_w / 2;
+    pad_r = pad_w - pad_l;
+    pad_t = pad_h / 2;
+    pad_b = pad_h - pad_t;
+  }
+  else
+  {
+    pad_l = pad_r = pad_t = pad_b = 0;
+  }
+
+  input.w = w;
+  input.h = h;
+  input.c = inch;
+  input.n = batch;
+  input.data = (float *)malloc(input.n * input.w * input.h * input.c * sizeof(float));
+  if (!input.data)
+    return 0;
+
+  output.w = (w + pad_l + pad_r - kernel_dilation) / stride + 1;
+  output.h = (h + pad_t + pad_b - kernel_dilation) / stride + 1;
+  output.c = outch;
+  output.n = batch;
+  output.data = (float *)malloc(output.n * output.w * output.h * output.c * sizeof(float));
+  if (!output.data)
+    return 0;
+
+  filter.w = kernel_size;
+  filter.h = kernel_size;
+  filter.c = inch;
+  filter.n = outch;
+  filter.data = (float *)malloc(filter.w * filter.h * filter.c * filter.n * sizeof(float));
+  if (!filter.data)
+    return 0;
+
+  for (int i = 0; i < input.w * input.h * input.c * input.n; i++)
+  {
+    input.data[i] = 0.001 + i * 0.000001;
+  }
+
+  for (int i = 0; i < filter.w * filter.h * filter.c * filter.n; i++)
+  {
+    filter.data[i] = 0.001 - i * 0.000001;
+  }
+
+  params.kernel_w = kernel_size;
+  params.kernel_h = kernel_size;
+  params.stride_w = stride;
+  params.stride_h = stride;
+  params.padding = padding;
+  params.pad_w = pad_l;
+  params.pad_h = pad_t;
+  params.dilation_w = dilation;
+  params.dilation_h = dilation;
+
+  const int m = output.c;
+  const int n = output.w * output.h;
+  const int k = params.kernel_h * params.kernel_w * input.c;
+
+  if (conv_type == 1)
+  {
+    for (int nloop = 0; nloop < loops; nloop++)
+
+    {
+      // printf("nloop = %d, thread_num = %d\n", nloop, thread_num);
+      // class srcn_sgemm my_gemm(input, filter, output, params, thread_num, col_major);
+
+      gettimeofday(&start, NULL);
+
+      srcn_batch_convolution2D(input, filter, output, params, NULL, thread_num, col_major);
+
+      gettimeofday(&end, NULL);
+      total_time +=
+          ((end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000 + start.tv_usec)) / 1000;
+    }
+  }
+  else if (conv_type == 2)
+  {
+    float *winograd_weight;
+
+    // trans_weight2winograd(filter, &winograd_weight);
+
+    winogradParams_t wparams = {params.kernel_w,
+                                params.kernel_h,
+                                params.stride_w,
+                                params.stride_h,
+                                params.dilation_w,
+                                params.dilation_h,
+                                input.n,
+                                w,
+                                h,
+                                input.c,
+                                output.c,
+                                thread_num,
+                                col_major,
+                                filter.data};
+    winograd_weight = trans_weight2winograd(wparams);
+
+    for (int nloop = 0; nloop < loops; nloop++)
+
+    {
+      gettimeofday(&start, NULL);
+
+      srcn_batch_convolution2D(input, filter, output, params, winograd_weight, thread_num,
+                               col_major);
+
+      gettimeofday(&end, NULL);
+      total_time +=
+          ((end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000 + start.tv_usec)) / 1000;
+    }
+  }
+
+  int div = m * n < 16 ? m * n : 16;
+  int num = m * n > 64 ? 64 : m * n;
+
+  float *c_ptr = output.data;
+  for (int i = 0; i < num; i++)
+  {
+    printf("%f ", c_ptr[i]);
+    if ((i + 1) % div == 0)
+      printf("\n");
+  }
+
+  printf("\n");
+
+  c_ptr = &output.data[m * n * batch - num];
+  for (int i = 0; i < num; i++)
+  {
+    printf("%f ", c_ptr[i]);
+    if ((i + 1) % div == 0)
+      printf("\n");
+  }
+
+  printf("\n");
+
+  long long total_size = (long long)batch * m * n * k * 2;
+  printf("AVER Time consuming: %.2fms, total size: %lld, (GFLOP: %.2f)\n", total_time / loops,
+         total_size, (double)total_size / (total_time / loops) / 1000000);
+
+  free(input.data);
+  free(output.data);
+  free(filter.data);
+
+  return 0;
+}
+
+static int test_depthwise_conv(const int w, const int h, const int kernel_size, const int stride,
+                               const int inch, const int outch, const int padding,
+                               const int conv_type, const int thread_num, const int loops)
+{
+  if (outch != inch)
+    return -1;
+  struct timeval start, end;
+  float total_time = 0.f;
+
+  const int dilation = 1;
+
+  const int kernel_dilation = dilation * (kernel_size - 1) + 1;
+
+  convMat_t input;
+  convMat_t output;
+  convMat_t filter;
+  convMat_t bias;
+  convParams_t params;
+
+  int pad_l, pad_r, pad_t, pad_b;
+  if (padding)
+  {
+    int pad_w = kernel_dilation + (w - 1) / stride * stride - w;
+    int pad_h = kernel_dilation + (h - 1) / stride * stride - h;
+    pad_l = pad_w / 2;
+    pad_r = pad_w - pad_l;
+    pad_t = pad_h / 2;
+    pad_b = pad_h - pad_t;
+  }
+  else
+  {
+    pad_l = pad_r = pad_t = pad_b = 0;
+  }
+
+  input.w = w;
+  input.h = h;
+  input.c = inch;
+  input.n = 1;
+#ifdef NCNN
+  input.data =
+      (float *)malloc(alignSize(input.w * input.h, 16 / sizeof(float)) * input.c * sizeof(float));
+#else
+  input.data = (float *)malloc(input.w * input.h * input.c * sizeof(float));
+#endif
+  if (!input.data)
+    return 0;
+
+  output.w = (w + pad_l + pad_r - kernel_dilation) / stride + 1;
+  output.h = (h + pad_t + pad_b - kernel_dilation) / stride + 1;
+  output.c = outch;
+  output.n = 1;
+
+#ifdef NCNN
+  output.data = (float *)malloc(alignSize(output.w * output.h, 16 / sizeof(float)) * output.c *
+                                sizeof(float));
+#else
+  output.data = (float *)malloc(output.w * output.h * output.c * sizeof(float));
+#endif
+  const int gpu_data_off = output.w * output.h * output.c;
+  if (!output.data)
+    return 0;
+
+  for (int i = 0; i < output.w * output.h * output.c; i++)
+  {
+    output.data[i] = 1.f;
+  }
+
+  filter.w = kernel_size;
+  filter.h = kernel_size;
+  filter.c = 1;
+  filter.n = outch;
+  filter.data = (float *)malloc(filter.w * filter.h * filter.c * filter.n * sizeof(float));
+  if (!filter.data)
+    return 0;
+
+  for (int i = 0; i < input.w * input.h * input.c; i++)
+  {
+    input.data[i] = 0.001 + i * 0.000001;
+  }
+
+  for (int i = 0; i < filter.w * filter.h * filter.c * filter.n; i++)
+  {
+    filter.data[i] = 0.001 - i * 0.000001;
+  }
+
+  bias.w = outch;
+  bias.data = (float *)malloc(bias.w * sizeof(float));
+  if (!bias.data)
+    return 0;
+  for (int i = 0; i < bias.w; i++)
+  {
+    bias.data[i] = 0.f;
+  }
+
+  params.kernel_w = kernel_size;
+  params.kernel_h = kernel_size;
+  params.stride_w = stride;
+  params.stride_h = stride;
+  params.padding = padding;
+  params.pad_w = pad_l;
+  params.pad_h = pad_t;
+  params.dilation_w = dilation;
+  params.dilation_h = dilation;
+
+  const int m = output.c;
+  const int n = output.w * output.h;
+  const int k = params.kernel_h * params.kernel_w * input.c;
+
+  // ocl_context_t context;
+  size_t local_min[2] = {4, 4};
+  /**
+  if(conv_type == 1)
+  {
+      if(init_gpu(&context) < 0) return -1;
+      depthwise_conv_3x3S1_tune(&context, &input, &filter, &output, local_min);
+  }**/
+
+  gettimeofday(&start, NULL);
+  if (conv_type == 0)
+    srcn_depthwise_conv(input, filter, output, bias, params, 4,
+                        row_major); // convdw3x3s1_neon(input, output, filter, filter);
+  // else if(conv_type == 1) depthwise_conv_gpu3x3S1(&context, &input, &filter, &output, &params,
+  // local_min);
+  else if (conv_type == 2)
+  {
+    for (int i = 0; i < input.c; i++)
+    {
+      convMat_t _input;
+      convMat_t _output;
+      convMat_t _filter;
+      convParams_t _params = params;
+
+      _input.w = input.w;
+      _input.h = input.h;
+      _input.c = 1;
+      _input.n = 1;
+#ifdef NCNN
+      _input.data = input.data + i * alignSize(input.w * input.h, 16 / sizeof(float));
+#else
+      _input.data = input.data + i * input.w * input.h;
+#endif
+
+      _output.w = output.w;
+      _output.h = output.h;
+      _output.c = 1;
+      _output.n = 1;
+#ifdef NCNN
+      _output.data = output.data + i * alignSize(output.w * output.h, 16 / sizeof(float));
+#else
+      _output.data = output.data + i * output.w * output.h;
+#endif
+      _filter.w = filter.w;
+      _filter.h = filter.h;
+      _filter.c = 1; // filter.c;
+      _filter.n = 1; // filter.n;
+      _filter.data = filter.data + i * 9;
+
+      srcn_convolution2D(_input, _filter, _output, _params, NULL, 1, row_major);
+      // direct_conv_rowmajor(&_input, &_output, &_filter, &_params);
+    }
+  }
+
+  gettimeofday(&end, NULL);
+  total_time +=
+      ((end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000 + start.tv_usec)) / 1000;
+
+  int div = m * n < 16 ? m * n : 16;
+  int num = m * n > 64 ? 64 : m * n;
+
+  if (conv_type == 0)
+    printf("[CPU RESULT]\n");
+  else if (conv_type == 1)
+    printf("[GPU RESULT]\n");
+  float *c_ptr = output.data;
+  for (int i = 0; i < num; i++)
+  {
+    printf("%f ", c_ptr[i]);
+    if ((i + 1) % div == 0)
+      printf("\n");
+  }
+
+  printf("\n");
+
+  c_ptr = &output.data[m * n - num];
+  for (int i = 0; i < num; i++)
+  {
+    printf("%f ", c_ptr[i]);
+    if ((i + 1) % div == 0)
+      printf("\n");
+  }
+
+  printf("\n");
+
+  long long total_size = (long long)m * n * k * 2;
+  printf("AVER Time consuming: %.2fms, total size: %lld, (GFLOP: %.2f)\n", total_time / loops,
+         total_size, (double)total_size / (total_time / loops) / 1000000);
+
+  free(input.data);
+  free(output.data);
+  free(filter.data);
+  free(bias.data);
+
+  return 0;
+}
+
+//#define TEST_SGEMM
+#define TEST_CONV
+//#define TEST_DECONV
+//#define TEST_BATCH_CONV
+//#define TEST_DEPTHWISE_CONV
+
+int main(int argc, char **argv)
+{
+#ifdef TEST_SGEMM
+  if (argc < 6)
+    return 0;
+
+  const int m = atoi(argv[1]);
+  const int n = atoi(argv[2]);
+  const int k = atoi(argv[3]);
+  const int type = atoi(argv[4]);
+  const int loops = atoi(argv[5]);
+
+  test_sgemm(m, n, k, type, loops);
+#elif (defined TEST_CONV)
+  if (argc < 10)
+    return 0;
+  const int w = atoi(argv[1]);
+  const int h = atoi(argv[2]);
+  const int kernel_size = atoi(argv[3]);
+  const int stride = atoi(argv[4]);
+  const int outch = atoi(argv[5]);
+  const int inch = atoi(argv[6]);
+  const int padding = atoi(argv[7]);
+  const int conv_type = atoi(argv[8]);
+  const int thread_num = atoi(argv[9]);
+  int loops = 1;
+  if (argc > 10)
+    loops = atoi(argv[10]);
+  test_conv(w, h, kernel_size, stride, inch, outch, padding, conv_type, thread_num, loops);
+#elif (defined TEST_DECONV)
+  if (argc < 10)
+    return 0;
+  const int w = atoi(argv[1]);
+  const int h = atoi(argv[2]);
+  const int kernel_size = atoi(argv[3]);
+  const int stride = atoi(argv[4]);
+  const int outch = atoi(argv[5]);
+  const int inch = atoi(argv[6]);
+  const int padding = atoi(argv[7]);
+  const int conv_type = atoi(argv[8]);
+  const int thread_num = atoi(argv[9]);
+  int loops = 1;
+  if (argc > 10)
+    loops = atoi(argv[10]);
+  test_deconv(w, h, kernel_size, stride, inch, outch, padding, conv_type, thread_num, loops);
+#elif (defined TEST_BATCH_CONV)
+  if (argc < 11)
+    return 0;
+  const int batch = atoi(argv[1]);
+  const int w = atoi(argv[2]);
+  const int h = atoi(argv[3]);
+  const int kernel_size = atoi(argv[4]);
+  const int stride = atoi(argv[5]);
+  const int outch = atoi(argv[6]);
+  const int inch = atoi(argv[7]);
+  const int padding = atoi(argv[8]);
+  const int conv_type = atoi(argv[9]);
+  const int thread_num = atoi(argv[10]);
+  int loops = 1;
+  if (argc > 11)
+    loops = atoi(argv[11]);
+  test_batch_conv(batch, w, h, kernel_size, stride, inch, outch, padding, conv_type, thread_num,
+                  loops);
+#elif (defined TEST_DEPTHWISE_CONV)
+  if (argc < 10)
+    return 0;
+  const int w = atoi(argv[1]);
+  const int h = atoi(argv[2]);
+  const int kernel_size = atoi(argv[3]);
+  const int stride = atoi(argv[4]);
+  const int outch = atoi(argv[5]);
+  const int inch = atoi(argv[6]);
+  const int padding = atoi(argv[7]);
+  const int conv_type = atoi(argv[8]);
+  const int thread_num = atoi(argv[9]);
+  int loops = 1;
+  if (argc > 10)
+    loops = atoi(argv[10]);
+  test_depthwise_conv(w, h, kernel_size, stride, inch, outch, padding, conv_type, thread_num,
+                      loops);
+#endif
+
+  return 0;
+}
+
+} // namespace srcn
+} // namespace nnfw
diff --git a/runtimes/libs/srcn/src/srcn_conv.cc b/runtimes/libs/srcn/src/srcn_conv.cc
new file mode 100644
index 000000000..df2c87116
--- /dev/null
+++ b/runtimes/libs/srcn/src/srcn_conv.cc
@@ -0,0 +1,614 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifdef _OPENMP
+#include <omp.h>
+#endif
+
+#include "srcn/conv_type.h"
+#include "common.h"
+#include "sgemm_singlethread.h"
+#include "conv_sgemm_singlethread.h"
+#include "conv_sgemm_multithreads.h"
+#include "conv_winograd.h"
+#include "direct_conv_colmajor.h"
+#include "winograd.h"
+
+#include "deconv_sgemm_multithreads.h"
+#include "conv_sparse.h"
+#include "conv_winograd_batch.h"
+
+namespace nnfw
+{
+namespace srcn
+{
+
+static inline void weight_transfer(float *out, float *in, int H, int W, int C, int N)
+{
+  // HWCN ---> NCHW
+  for (int h = 0; h < H; ++h)
+  {
+    for (int w = 0; w < W; ++w)
+    {
+      for (int c = 0; c < C; ++c)
+      {
+        for (int n = 0; n < N; ++n)
+        {
+          int index_in = h * W * C * N + w * C * N + c * N + n;
+          int index_out = n * C * H * W + c * H * W + h * W + w;
+          out[index_out] = in[index_in];
+        }
+      }
+    }
+  }
+}
+
+int check_winograd(winogradParams_t &params)
+{
+  int winograd_flag =
+      ((params.kernel_w == params.kernel_h) && (params.stride_w == params.stride_h) &&
+       (params.kernel_w == 3 || params.kernel_w == 5) && (params.stride_w == 1) &&
+       (params.dilation_w == 1) && (params.dilation_h == 1));
+
+  int winograd_channel_cond = 64 * 64;
+  int winograd_image_cond = 10 * 10;
+
+#ifdef TIZEN
+  if (params.num_threads > 1)
+  {
+    winograd_channel_cond = 128 * 128;
+    winograd_image_cond = 20 * 20;
+  }
+#endif // TIZEN
+
+  winograd_flag &= (params.inch * params.outch >= winograd_channel_cond);
+
+  if (params.w > 0 && params.h > 0 && params.batch == 1)
+  {
+    winograd_flag &= (params.w * params.h >= winograd_image_cond);
+  }
+
+  return winograd_flag;
+}
+
+float *trans_weight2winograd(winogradParams_t &params, unsigned int *size = NULL)
+{
+  int M, N;
+  const double *G;
+
+  float *winograd_weight;
+
+  int winograd_channel_cond = 64 * 64;
+  int winograd_image_cond = 10 * 10;
+
+#ifdef TIZEN
+  if (params.num_threads > 1)
+  {
+    winograd_channel_cond = 128 * 128;
+    int winograd_image_cond = 20 * 20;
+  }
+#endif // TIZEN
+
+  int winograd_flag =
+      ((params.kernel_w == params.kernel_h) && (params.stride_w == params.stride_h) &&
+       (params.kernel_w == 3 || params.kernel_w == 5) && (params.stride_w == 1) &&
+       (params.dilation_w == 1) && (params.dilation_h == 1));
+  if (!winograd_flag)
+    return NULL;
+
+  winograd_flag = (params.inch * params.outch >= winograd_channel_cond);
+
+  if (!winograd_flag)
+    return NULL;
+
+  if (params.w > 0 && params.h > 0 && params.batch == 1)
+  {
+    winograd_flag &= (params.w * params.h >= winograd_image_cond);
+    if (!winograd_flag)
+      return NULL;
+  }
+
+  const int kernel_size = params.kernel_w;
+  const int inch = params.inch;
+  const int outch = params.outch;
+  float *weight_data = params.weight_data;
+
+  /*Step 1: transfer weight to winograd domain*/
+  if (kernel_size == 3)
+  {
+    if (params.w == 4 && params.batch > 1)
+    {
+      M = winograd_para_3x3s1_2::M;
+      N = winograd_para_3x3s1_2::N;
+      G = winograd_para_3x3s1_2::getG();
+    }
+    else
+    {
+      M = winograd_para_3x3s1::M;
+      N = winograd_para_3x3s1::N;
+      G = winograd_para_3x3s1::getG();
+    }
+  }
+  else
+  {
+    M = winograd_para_5x5s1::M;
+    N = winograd_para_5x5s1::N;
+    G = winograd_para_5x5s1::getG();
+  }
+
+  int tile_h_in_, tile_w_in_;
+  tile_h_in_ = tile_w_in_ = M;
+
+  if (size)
+    *size = tile_h_in_ * tile_w_in_ * inch * outch;
+
+  winograd_weight = new float[tile_h_in_ * tile_w_in_ * inch * outch];
+  if (!winograd_weight)
+    return NULL;
+
+  float *winograd_g = new float[M * M * N * N];
+  if (!winograd_g)
+  {
+    delete[] winograd_weight;
+    return NULL;
+  }
+
+  kronecker_product(winograd_g, G, G, M, N, M, N);
+
+  if (params.conv_type == col_major)
+  {
+    weight_data = new float[kernel_size * kernel_size * inch * outch];
+    if (!weight_data)
+    {
+      delete[] winograd_weight;
+      delete[] winograd_g;
+      return NULL;
+    }
+    weight_transfer(weight_data, params.weight_data, kernel_size, kernel_size, inch, outch);
+  }
+
+  class sgemm_singlethread sgemm(rowMajor, notrans, trans, tile_h_in_ * tile_w_in_, inch * outch,
+                                 kernel_size * kernel_size, winograd_g, weight_data,
+                                 winograd_weight, 1);
+
+  sgemm.run();
+
+  if (params.conv_type == col_major)
+    delete[] weight_data;
+
+  delete[] winograd_g;
+
+  return winograd_weight;
+}
+
+void winograd_release(float *winograd_weight)
+{
+  if (winograd_weight)
+    delete[] winograd_weight;
+}
+
+void srcn_convolution2D(const convMat_t &in_mat, const convMat_t &weights_mat, convMat_t &out_mat,
+                        const convParams_t &in_param, const float *winograd_weight, int num_threads,
+                        convType_t conv_type)
+{
+  const int outw = out_mat.w;
+  const int outh = out_mat.h;
+  const int inch = in_mat.c;
+  const int outch = out_mat.c;
+
+  int winograd_flag =
+      ((in_param.kernel_w == in_param.kernel_h) && (in_param.stride_w == in_param.stride_h) &&
+       (in_param.kernel_w == 3 || in_param.kernel_w == 5) && (in_param.stride_w == 1) &&
+       (winograd_weight) && (in_param.dilation_w == 1) && (in_param.dilation_h == 1));
+
+  int direct_flag = ((conv_type == col_major) && (in_param.stride_w == in_param.stride_h) &&
+                     (in_param.dilation_w == 1) && (in_param.dilation_h == 1));
+
+  int winograd_image_cond = 10 * 10;
+  int winograd_channel_cond = 64 * 64;
+  int direct_image_cond = 4 * 4;
+  int direct_channel_cond = 16 * 16;
+
+#ifdef TIZEN
+  if (num_threads > 1)
+  {
+    winograd_image_cond = 20 * 20;
+    winograd_channel_cond = 128 * 128;
+  }
+#endif
+
+  winograd_flag &=
+      ((outw * outh >= winograd_image_cond) && (inch * outch >= winograd_channel_cond));
+  direct_flag &= ((outw * outh <= direct_image_cond) || (inch * outch <= direct_channel_cond));
+
+  if (num_threads == 1)
+  {
+    if (winograd_flag)
+    {
+      class conv_winograd conv(in_mat, out_mat, in_param, conv_type, winograd_weight, num_threads,
+                               in_mat.w * in_mat.h, outw * outh, outch);
+      conv.run();
+    }
+    else if (direct_flag)
+    {
+      direct_conv_colmajor(in_mat, out_mat, weights_mat, in_param, num_threads);
+    }
+    else
+    {
+      class conv_sgemm_singlethread conv(in_mat, weights_mat, out_mat, in_param, conv_type);
+      conv.run();
+    }
+  }
+  else if (num_threads > 1)
+  {
+    if (winograd_flag)
+    {
+      const int npart = num_threads > 4 ? 4 : num_threads;
+
+      omp_set_num_threads(npart);
+
+      if (conv_type == col_major)
+      {
+        if (outch < 512)
+        {
+          const int _H = (outh + npart - 1) / npart;
+
+          if (_H < in_param.pad_h)
+          {
+            class conv_winograd conv(in_mat, out_mat, in_param, conv_type, winograd_weight, 1,
+                                     in_mat.w * in_mat.h, outw * outh, outch);
+            conv.run();
+            return;
+          }
+
+          const int ih = (_H - 1) * in_param.stride_w + in_param.kernel_w;
+          const int oh = _H;
+          const int nh = (outh + _H - 1) / _H;
+          int rh = outh % _H;
+          if (rh == 0)
+            rh = _H;
+
+#pragma omp parallel for
+          for (int i = 0; i < nh; i++)
+          {
+            int pad_h_part = 0;
+            convMat_t in_part;
+            convMat_t out_part;
+            const int oh = (i != nh - 1 || rh == 0) ? _H : rh;
+            const int ih = (oh - 1) * in_param.stride_w + in_param.kernel_w;
+
+            in_part.w = in_mat.w;
+            in_part.c = inch;
+            out_part.w = outw;
+            out_part.c = outch;
+            in_part.h = ih;
+            out_part.h = oh;
+
+            int bottom_offset = i * _H - in_param.pad_h;
+            if (bottom_offset < 0)
+            {
+              bottom_offset = 0;
+              pad_h_part = in_param.pad_h;
+            }
+            in_part.data = in_mat.data + bottom_offset * in_mat.w * inch * in_param.stride_w;
+            if (ih + bottom_offset > in_mat.h)
+            {
+              in_part.h = in_mat.h - bottom_offset;
+            }
+
+            out_part.data = out_mat.data + i * _H * outw * outch;
+
+            convParams_t params = {
+                in_param.kernel_w, in_param.kernel_h, in_param.stride_w, in_param.stride_h, 1, 1,
+                in_param.padding,  in_param.pad_w,    pad_h_part};
+
+            class conv_winograd conv(in_part, out_part, params, conv_type, winograd_weight,
+                                     num_threads, in_mat.w * in_mat.h, outw * outh, outch);
+            conv.run();
+          }
+        }
+        else
+        {
+          const int _OUTC = (outch + npart - 1) / npart;
+
+          const int nc = (outch + _OUTC - 1) / _OUTC;
+          int rc = out_mat.c % _OUTC;
+          if (rc == 0)
+            rc = _OUTC;
+
+#pragma omp parallel for
+          for (int i = 0; i < nc; i++)
+          {
+            const float *weight_part;
+            convMat_t out_part;
+
+            const int oc = (i != nc - 1 || rc == 0) ? _OUTC : rc;
+
+            out_part.w = outw;
+            out_part.h = outh;
+            out_part.c = oc;
+            out_part.data = out_mat.data + i * _OUTC;
+            weight_part = winograd_weight + i * _OUTC * inch;
+            class conv_winograd conv(in_mat, out_part, in_param, conv_type, weight_part,
+                                     num_threads, in_mat.w * in_mat.h, outw * outh, outch);
+            conv.run();
+          }
+        }
+      }
+      else if (conv_type == row_major)
+      {
+#ifdef TIZEN
+        if (outch < 512)
+#else  // TIZEN
+        if (outh >= 20)
+#endif // TIZEN
+        {
+          const int _H = (outh + npart - 1) / npart;
+
+          if (_H < in_param.pad_h)
+          {
+            class conv_winograd conv(in_mat, out_mat, in_param, conv_type, winograd_weight, 1,
+                                     in_mat.w * in_mat.h, outw * outh, outch);
+            conv.run();
+            return;
+          }
+
+          const int ih = (_H - 1) * in_param.stride_w + in_param.kernel_w;
+          const int oh = _H;
+          const int nh = (outh + _H - 1) / _H;
+          int rh = outh % _H;
+          if (rh == 0)
+            rh = _H;
+
+#pragma omp parallel for
+          for (int i = 0; i < nh; i++)
+          {
+            int pad_h_part = 0;
+            convMat_t in_part;
+            convMat_t out_part;
+            const int oh = (i != nh - 1 || rh == 0) ? _H : rh;
+            const int ih = (oh - 1) * in_param.stride_w + in_param.kernel_w;
+
+            in_part.w = in_mat.w;
+            in_part.c = inch;
+            out_part.w = outw;
+            out_part.c = outch;
+            in_part.h = ih;
+            out_part.h = oh;
+
+            int bottom_offset = i * _H - in_param.pad_h;
+            if (bottom_offset < 0)
+            {
+              bottom_offset = 0;
+              pad_h_part = in_param.pad_h;
+            }
+            in_part.data = in_mat.data + bottom_offset * in_mat.w * in_param.stride_w;
+            if (ih + bottom_offset > in_mat.h)
+            {
+              in_part.h = in_mat.h - bottom_offset;
+            }
+
+            out_part.data = out_mat.data + i * _H * outw;
+
+            convParams_t params = {
+                in_param.kernel_w, in_param.kernel_h, in_param.stride_w, 1,         1,
+                in_param.stride_h, in_param.padding,  in_param.pad_w,    pad_h_part};
+
+            class conv_winograd conv(in_part, out_part, params, conv_type, winograd_weight,
+                                     num_threads, in_mat.w * in_mat.h, outw * outh, outch);
+            conv.run();
+          }
+        }
+        else
+        {
+          const int _OUTC = (outch + npart - 1) / npart;
+
+          const int nc = (outch + _OUTC - 1) / _OUTC;
+          int rc = out_mat.c % _OUTC;
+          if (rc == 0)
+            rc = _OUTC;
+
+#pragma omp parallel for
+          for (int i = 0; i < nc; i++)
+          {
+            const float *weight_part;
+            convMat_t out_part;
+
+            const int oc = (i != nc - 1 || rc == 0) ? _OUTC : rc;
+
+            out_part.w = outw;
+            out_part.h = outh;
+            out_part.c = oc;
+            out_part.data = out_mat.data + i * _OUTC * outw * outh;
+            weight_part = winograd_weight + i * _OUTC * inch;
+            class conv_winograd conv(in_mat, out_part, in_param, conv_type, weight_part,
+                                     num_threads, in_mat.w * in_mat.h, outw * outh, outch);
+            conv.run();
+          }
+        }
+      }
+    }
+    else if (direct_flag)
+    {
+      direct_conv_colmajor(in_mat, out_mat, weights_mat, in_param, num_threads);
+    }
+    else
+    {
+      class conv_sgemm_multithreads conv(in_mat, weights_mat, out_mat, in_param, num_threads,
+                                         conv_type);
+      conv.run();
+    }
+  }
+}
+
+void srcn_deconvolution2D(const convMat_t &in_mat, const convMat_t &weights_mat, convMat_t &out_mat,
+                          const convParams_t &in_param, int num_threads, convType_t conv_type)
+{
+  class deconv_sgemm_multithreads deconv(in_mat, weights_mat, out_mat, in_param, num_threads,
+                                         conv_type);
+  deconv.run();
+}
+
+void *trans_weight2sparse(const convMat_t &weights_mat)
+{
+  const int kernel_w = weights_mat.w;
+  const int kernel_h = weights_mat.h;
+  const int inch = weights_mat.c;
+  const int outch = weights_mat.n;
+
+  const int nch = (outch + BCH - 1) / BCH;
+  const int rch = outch % BCH;
+
+  const float *data = weights_mat.data;
+  const int klength = inch * kernel_h * kernel_w;
+
+  sparse_weight_t *sparse_weight = new sparse_weight_t[nch];
+  if (!sparse_weight)
+    return NULL;
+
+  for (int i = 0; i < nch; i++)
+  {
+    int _bch = (i != nch - 1 || rch == 0) ? BCH : rch;
+    sparse_weight_t *sparse_weight_n = &sparse_weight[i];
+    sparse_weight_n->mxk = 0;
+
+    for (int j = 0; j < _bch; j++)
+    {
+      for (int l = 0; l < klength; l++)
+      {
+        float val = *(data + (i * BCH + j) * klength + l);
+        if (val != 0)
+        {
+          sparse_weight_n->mxk++;
+        }
+      }
+    }
+  }
+
+  for (int i = 0; i < nch; i++)
+  {
+    int _bch = (i != nch - 1 || rch == 0) ? BCH : rch;
+    sparse_weight_t *sparse_weight_n = &sparse_weight[i];
+    sparse_weight_n->wdata = new weight_data_t[sparse_weight_n->mxk];
+    int index = 0;
+
+    for (int l = 0; l < klength; l++)
+    {
+      for (int j = 0; j < _bch; j++)
+      {
+        float val = *(data + (i * BCH + j) * klength + l);
+        if (val != 0)
+        {
+          sparse_weight_n->wdata[index].m = i * BCH + j;
+          sparse_weight_n->wdata[index].k = l;
+          sparse_weight_n->wdata[index++].data = val;
+        }
+      }
+    }
+  }
+
+  return (void *)sparse_weight;
+}
+
+void sparse_release(const int outch, void *ptr)
+{
+  sparse_weight_t *sparse_weight = (sparse_weight_t *)ptr;
+  const int nch = (outch + BCH - 1) / BCH;
+
+  if (!sparse_weight)
+    return;
+
+  for (int i = 0; i < nch; i++)
+  {
+    sparse_weight_t *sparse_weight_n = &sparse_weight[i];
+    if (sparse_weight_n->wdata)
+      delete[] sparse_weight_n->wdata;
+  }
+
+  if (sparse_weight)
+    delete[] sparse_weight;
+}
+
+void srcn_sparse_convolution2D(const convMat_t &in_mat, convMat_t &out_mat,
+                               const convParams_t &in_param, const void *sparse_weight,
+                               int number_threas, convType_t conv_type)
+{
+  class conv_sparse conv(in_mat, out_mat, in_param, (const sparse_weight_t *)sparse_weight,
+                         number_threas, conv_type);
+
+  for (int i = 0; i < out_mat.c * out_mat.h * out_mat.w; i++)
+  {
+    *(out_mat.data + i) = 0;
+  }
+
+  conv.run();
+}
+
+void srcn_batch_convolution2D(const convMat_t &in_mat, const convMat_t &weights_mat,
+                              convMat_t &out_mat, const convParams_t &in_param,
+                              const float *winograd_weight, int num_threads, convType_t conv_type)
+{
+  int winograd_flag = (winograd_weight != NULL);
+
+  if (winograd_flag)
+  {
+    if (num_threads > 1)
+    {
+      omp_set_num_threads(num_threads);
+      const int batch = in_mat.n;
+      const int npart = (batch + num_threads - 1) / num_threads;
+      const int nn = (batch + npart - 1) / npart;
+      const int rn = batch % npart;
+
+#pragma omp parallel for
+      for (int i = 0; i < nn; i++)
+      {
+        const int pn = (i != nn - 1 || rn == 0) ? npart : rn;
+        convMat_t in_mat_part = {in_mat.w, in_mat.h, in_mat.c, pn,
+                                 in_mat.data + i * npart * in_mat.w * in_mat.h * in_mat.c};
+        convMat_t out_mat_part = {out_mat.w, out_mat.h, out_mat.c, pn,
+                                  out_mat.data + i * npart * out_mat.w * out_mat.h * out_mat.c};
+
+        class conv_winograd_batch conv(in_mat_part, out_mat_part, in_param, conv_type,
+                                       winograd_weight, num_threads);
+        conv.run();
+      }
+    }
+    else
+    {
+      class conv_winograd_batch conv(in_mat, out_mat, in_param, conv_type, winograd_weight,
+                                     num_threads);
+      conv.run();
+    }
+  }
+  else
+  {
+    if (num_threads == 1)
+    {
+      class conv_sgemm_singlethread conv(in_mat, weights_mat, out_mat, in_param, conv_type);
+      conv.run();
+    }
+    else
+    {
+      class conv_sgemm_multithreads conv(in_mat, weights_mat, out_mat, in_param, num_threads,
+                                         conv_type);
+      conv.run();
+    }
+  }
+}
+
+} // namespace srcn
+} // namespace nnfw
diff --git a/runtimes/libs/srcn/src/winograd.h b/runtimes/libs/srcn/src/winograd.h
new file mode 100644
index 000000000..5ad8f1126
--- /dev/null
+++ b/runtimes/libs/srcn/src/winograd.h
@@ -0,0 +1,148 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_SRCN_WINOGRAD_H__
+#define __NNFW_SRCN_WINOGRAD_H__
+
+namespace nnfw
+{
+namespace srcn
+{
+
+struct winograd_para_3x3s1
+{
+  static const int M = 3 + 4 - 1;
+  static const int N = 3;
+
+  static const double *getG()
+  {
+    static const double G[M * N] = {
+        1. / 4.,  0,        0,       -1. / 6., -1. / 6.,  -1. / 6., -1. / 6., 1. / 6., -1. / 6.,
+        1. / 24., 1. / 12., 1. / 6., 1. / 24., -1. / 12., 1. / 6.,  0,        0,       1,
+    };
+    return G;
+  }
+
+  static const double *getA()
+  {
+    static const double A[M * (M - N + 1)] = {
+        1, 0, 0, 0, 1, 1, 1, 1, 1, -1, 1, -1, 1, 2, 4, 8, 1, -2, 4, -8, 0, 0, 0, 1,
+    };
+    return A;
+  }
+
+  static const double *getB()
+  {
+    static const double B[M * M] = {
+        4, 0, 0,  0, 0,  0,  0, -4, 4, -2, 2, 4, -5, -4, -4, -1, -1, 0,
+        0, 1, -1, 2, -2, -5, 1, 1,  1, 1,  1, 0, 0,  0,  0,  0,  0,  1,
+    };
+    return B;
+  };
+};
+
+struct winograd_para_3x3s1_2
+{
+  static const int M = 3 + 2 - 1;
+  static const int N = 3;
+
+  static const double *getG()
+  {
+    static const double G[M * N] = {
+        1, 0, 0, 1. / 2., 1. / 2., 1. / 2., 1. / 2., -1. / 2., 1. / 2., 0, 0, 1,
+    };
+    return G;
+  }
+
+  static const double *getA()
+  {
+    static const double A[M * (M - N + 1)] = {
+        1, 0, 1, 1, 1, -1, 0, 1,
+    };
+    return A;
+  }
+
+  static const double *getB()
+  {
+    static const double B[M * M] = {
+        1, 0, 0, 0, 0, 1, -1, -1, -1, 1, 1, 0, 0, 0, 0, 1,
+    };
+    return B;
+  };
+};
+
+struct winograd_para_5x5s1
+{
+  static const int M = 5 + 4 - 1;
+  static const int N = 5;
+
+  static const double *getG()
+  {
+    static const double G[M * N] = {
+        1,        0,         0,         0,        0,        -2. / 9.,  -2. / 9., -2. / 9.,
+        -2. / 9., -2. / 9.,  -2. / 9.,  2. / 9.,  -2. / 9., 2. / 9.,   -2. / 9., 1. / 90.,
+        1. / 45., 2. / 45.,  4. / 45.,  8. / 45., 1. / 90., -1. / 45., 2. / 45., -4. / 45.,
+        8. / 45., 4. / 45.,  2. / 45.,  1. / 45., 1. / 90., 1. / 180., 4. / 45., -2. / 45.,
+        1. / 45., -1. / 90., 1. / 180., 0,        0,        0,         0,        1,
+    };
+    return G;
+  }
+
+  static const double *getA()
+  {
+    static const double A[M * (M - N + 1)] = {1, 0,  0, 0,  1, 1, 1, 1, 1, -1, 1, -1, 1, 2, 4, 8,
+                                              1, -2, 4, -8, 8, 4, 2, 1, 8, -4, 2, -1, 0, 0, 0, 1};
+    return A;
+  }
+
+  static const double *getB()
+  {
+    static const double B[M * M] = {
+        1,      0,       0,       0,        0,        0,        0,        0,        0,      1,
+        -1,     1. / 2,  -1. / 2, 2,        -2,       -1,       -21. / 4, 1,        1,      1. / 4,
+        1. / 4, 4,       4,       0,        0,        -17. / 4, 17. / 4,  -5. / 2,  5. / 2, -5. / 2,
+        5. / 2, 21. / 4, 21. / 4, -17. / 4, -17. / 4, -5. / 4,  -5. / 4,  -5,       -5,     0,
+        0,      1,       -1,      2,        -2,       1. / 2,   -1. / 2,  -21. / 4, -1,     1,
+        1,      1,       1,       1,        1,        0,        0,        0,        0,      0,
+        0,      0,       0,       1,
+    };
+    return B;
+  }
+};
+
+static void kronecker_product(float *out, const double *in1, const double *in2, int m, int n, int p,
+                              int q)
+{
+  for (int i = 0; i < m; ++i)
+  {
+    for (int j = 0; j < n; ++j)
+    {
+      for (int k = 0; k < p; ++k)
+      {
+        for (int l = 0; l < q; ++l)
+        {
+          out[(p * i + k) * n * q + q * j + l] = in1[n * i + j] * in2[k * q + l];
+          /* compute in double precision and then convert it back to Dtype for accuracy */
+        }
+      }
+    }
+  }
+}
+
+} // namespace srcn
+} // namespace nnfw
+
+#endif // __NNFW_SRCN_WINOGRAD_H__
diff --git a/runtimes/libs/tflite/CMakeLists.txt b/runtimes/libs/tflite/CMakeLists.txt
new file mode 100644
index 000000000..8b85e7183
--- /dev/null
+++ b/runtimes/libs/tflite/CMakeLists.txt
@@ -0,0 +1,26 @@
+nnfw_find_package(TensorFlowLite REQUIRED)
+
+file(GLOB_RECURSE SOURCES "src/*.cpp")
+file(GLOB_RECURSE TESTS "src/*.test.cpp")
+list(REMOVE_ITEM SOURCES ${TESTS})
+
+# NOTE For now NNFW supports two TFLITE versions - v1.12 for Ubuntu and v1.9 for Tizen.
+#      So TFLITE version should mandatorily be specified to distinguish the version.
+if(NOT TFLITE_MAJOR_VER OR NOT TFLITE_MINOR_VER)
+  message(FATAL_ERROR "TFLITE_MAJOR_VER and TFLITE_MINOR_VER should be defined")
+endif(NOT TFLITE_MAJOR_VER OR NOT TFLITE_MINOR_VER)
+
+add_library(nnfw_lib_tflite STATIC ${SOURCES})
+set_target_properties(nnfw_lib_tflite PROPERTIES POSITION_INDEPENDENT_CODE ON)
+target_include_directories(nnfw_lib_tflite PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/include)
+target_link_libraries(nnfw_lib_tflite PUBLIC tensorflow-lite)
+target_link_libraries(nnfw_lib_tflite PUBLIC nnfw_lib_misc nnfw_lib_rua_shim)
+target_link_libraries(nnfw_lib_tflite PRIVATE ${LIB_PTHREAD} dl)
+target_link_libraries(nnfw_lib_tflite PRIVATE nnfw_common)
+target_link_libraries(nnfw_lib_tflite PRIVATE nnfw_coverage)
+
+target_compile_definitions(nnfw_lib_tflite PUBLIC TFLITE_MAJOR_VER=${TFLITE_MAJOR_VER}
+                                                  TFLITE_MINOR_VER=${TFLITE_MINOR_VER})
+
+add_executable(nnfw_lib_tflite_test_TensorView src/TensorView.test.cpp)
+target_link_libraries(nnfw_lib_tflite_test_TensorView nnfw_lib_tflite)
diff --git a/runtimes/libs/tflite/include/tflite/Assert.h b/runtimes/libs/tflite/include/tflite/Assert.h
new file mode 100644
index 000000000..148ac7e01
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/Assert.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     Assert.h
+ * @brief    This file contains helper function of assertion
+ * @ingroup  COM_AI_RUNTIME
+ */
+
+#ifndef __NNFW_TFLITE_ASSERT_H__
+#define __NNFW_TFLITE_ASSERT_H__
+
+#include "tensorflow/lite/context.h"
+
+#include <sstream>
+
+#define STR_DETAIL(value) #value
+#define STR(value) STR_DETAIL(value)
+
+#define TFLITE_ENSURE(exp)                                             \
+  {                                                                    \
+    const TfLiteStatus status = (exp);                                 \
+                                                                       \
+    if (status != kTfLiteOk)                                           \
+    {                                                                  \
+      std::ostringstream ss;                                           \
+      ss << #exp << " failed (" << __FILE__ << ":" << __LINE__ << ")"; \
+      throw std::runtime_error{ss.str()};                              \
+    }                                                                  \
+  }
+
+#endif // __NNFW_TFLITE_ASSERT_H__
diff --git a/runtimes/libs/tflite/include/tflite/Diff.h b/runtimes/libs/tflite/include/tflite/Diff.h
new file mode 100644
index 000000000..55b7526ab
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/Diff.h
@@ -0,0 +1,200 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     Diff.h
+ * @brief    This file contains classes for testing correctess of implementation
+ * @ingroup  COM_AI_RUNTIME
+ */
+
+#ifndef __NNFW_TFLITE_DIFF_H__
+#define __NNFW_TFLITE_DIFF_H__
+
+#include "tensorflow/lite/interpreter.h"
+
+#include "misc/tensor/Index.h"
+#include "misc/tensor/Diff.h"
+#include "misc/tensor/Shape.h"
+#include "misc/tensor/Comparator.h"
+
+#include "tflite/TensorView.h"
+
+#include <functional>
+#include <vector>
+
+/**
+ * @brief Class to define TfLite interpreter match application
+ */
+class TfLiteInterpMatchApp
+{
+public:
+  /**
+   * @brief Construct a new TfLiteInterpMatchApp object with Comparator
+   * @param[in] comparator   Comparator object for tensor comparation
+   */
+  TfLiteInterpMatchApp(const nnfw::misc::tensor::Comparator &comparator)
+      : _verbose{false}, _comparator(comparator)
+  {
+    // DO NOTHING
+  }
+
+public:
+  /**
+   * @brief Get reference verbose for debugging information
+   * @return Reference of verbose value
+   */
+  int &verbose(void) { return _verbose; }
+
+private:
+  int _verbose;
+
+public:
+  /**
+   * @brief Run two interpreter and return the output matching
+   * @param[in] pure   Interpreter object of expected(with TfLite)
+   * @param[in] nnapi  Interpreter object of obtained(through NNAPI)
+   * @return  @c true if two Interpreter results are same, otherwise @c false
+   */
+  bool run(::tflite::Interpreter &pure, ::tflite::Interpreter &nnapi) const;
+  /**
+   * @brief Compare two TensorView values and return the match result
+   * @param[in] expected  TensorView object to read expected values
+   * @param[in] obtained  TensorView object to read obtained values
+   * @param[in] id        Tensor ID value used for debug message
+   * @return  @c true if two TensorView values are same, otherwise @c false
+   */
+  template <typename T>
+  bool compareSingleTensorView(const nnfw::tflite::TensorView<T> &expected,
+                               const nnfw::tflite::TensorView<T> &obtained, int id) const;
+
+private:
+  const nnfw::misc::tensor::Comparator &_comparator;
+};
+
+#include "tflite/interp/Builder.h"
+#include "tflite/Quantization.h"
+
+#include <random>
+
+/**
+ * @brief Class to generate random values
+ */
+class RandomGenerator
+{
+public:
+  /**
+   * @brief Construct a new RandomGenerator object
+   * @param[in] seed          Random seed value
+   * @param[in] mean          Mean value of normal random number generation
+   * @param[in] stddev        Standard deviation of random number generation
+   * @param[in] quantization  TfLiteQuantizationParams type to represent quantization value
+   *                          (not used yet)
+   */
+  RandomGenerator(int seed, float mean, float stddev,
+                  const TfLiteQuantizationParams quantization = make_default_quantization())
+      : _rand{seed}, _dist{mean, stddev}, _quantization{quantization}
+  {
+    (void)_quantization;
+  }
+
+public:
+  /**
+   * @brief  Generate random numbers for type T
+   * @param[in] s Shape value
+   * @param[in] i Index value
+   * @return Random generated value
+   * @note   This is same as T generate(void) as two input parameters are not used
+   */
+  template <typename T>
+  T generate(const ::nnfw::misc::tensor::Shape &, const ::nnfw::misc::tensor::Index &)
+  {
+    return generate<T>();
+  }
+
+  /**
+   * @brief  Generate random numbers for type T
+   * @return Random generated value
+   */
+  template <typename T> T generate(void) { return _dist(_rand); }
+
+private:
+  std::minstd_rand _rand;
+  std::normal_distribution<float> _dist;
+  // unused
+  const TfLiteQuantizationParams _quantization;
+};
+
+template <> uint8_t RandomGenerator::generate<uint8_t>(void);
+
+/**
+ * @brief Structure for NNAPI correctness test
+ */
+struct RandomTestParam
+{
+  int verbose;               //!< Verbosity of debug information
+  int tolerance;             //!< Torlerance of value difference
+  int tensor_logging = 0;    //!< Save logging to a file if not 0
+  std::string log_path = ""; //!< Path of log file, meaningful only when tensor_logging is 1
+};
+
+/**
+ * @brief Class to define Random test runner
+ */
+class RandomTestRunner
+{
+public:
+  /**
+   * @brief Construct a new RandomTestRunner object
+   * @param[in] seed          Random seed value
+   * @param[in] param         RandomTestParam object for test runner
+   * @param[in] quantization  TfLiteQuantizationParams type to represent quantization value
+   */
+  RandomTestRunner(int seed, const RandomTestParam &param,
+                   const TfLiteQuantizationParams quantization = make_default_quantization())
+      : _randgen{seed, 0.0f, 2.0f, quantization}, _param{param}
+  {
+    // DO NOTHING
+  }
+
+public:
+  /**
+   * @brief  Run the random test runner
+   * @param[in] builder  Interpreter Builder used to run
+   * @return 0 if test succeeds, otherwise failure
+   */
+  int run(const nnfw::tflite::Builder &builder);
+
+public:
+  /**
+   * @brief  Get RandomGenerator reference
+   * @return RandomGenerator reference
+   */
+  RandomGenerator &generator() { return _randgen; };
+
+private:
+  RandomGenerator _randgen;
+  const RandomTestParam _param;
+
+public:
+  /**
+   * @brief  Create a RandomTestRunner object
+   * @param[in] seed  Random seed value
+   * @return RandomGenerator object
+   */
+  static RandomTestRunner make(int seed);
+};
+
+#endif // __NNFW_TFLITE_DIFF_H__
diff --git a/runtimes/libs/tflite/include/tflite/FeatureView.h b/runtimes/libs/tflite/include/tflite/FeatureView.h
new file mode 100644
index 000000000..a8f069c40
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/FeatureView.h
@@ -0,0 +1,108 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     FeatureView.h
+ * @brief    This file contains FeatureView class
+ * @ingroup  COM_AI_RUNTIME
+ */
+
+#ifndef __NNFW_TFLITE_FEATURE_VIEW_H__
+#define __NNFW_TFLITE_FEATURE_VIEW_H__
+
+#include "tensorflow/lite/interpreter.h"
+
+#include "tflite/InputIndex.h"
+#include "tflite/OutputIndex.h"
+
+#include "misc/feature/Shape.h"
+#include "misc/feature/Reader.h"
+
+namespace nnfw
+{
+namespace tflite
+{
+
+template <typename T> class FeatureView;
+
+/**
+ * @brief Class to support reading element of float type feature
+ */
+template <> class FeatureView<float> : public nnfw::misc::feature::Reader<float>
+{
+public:
+  /**
+   * @brief     Construct a new FeatureView object
+   * @param[in] interp  Interpreter to read from
+   * @param[in] index   InputIndex index of input
+   */
+  FeatureView(::tflite::Interpreter &interp, const InputIndex &index);
+  /**
+   * @brief     Construct a new FeatureView object
+   * @param[in] interp  Interpreter to read from
+   * @param[in] index   OutputIndex index of output
+   */
+  FeatureView(::tflite::Interpreter &interp, const OutputIndex &index);
+
+public:
+  /**
+   * @brief     Get value of element using channel, row and column index
+   * @param[in] ch    Channel index
+   * @param[in] row   Row index
+   * @param[in] col   Column index
+   * @return    Value of element
+   */
+  float at(uint32_t ch, uint32_t row, uint32_t col) const;
+  /**
+   * @brief     Get reference of element using channel, row and column index
+   * @param[in] ch  Channel index
+   * @param[in] row Row index
+   * @param[in] col Column index
+   * @return    Reference of element
+   */
+  float &at(uint32_t ch, uint32_t row, uint32_t col);
+
+  float at(uint32_t batch, uint32_t ch, uint32_t row, uint32_t col) const = 0;
+
+private:
+  /**
+   * @brief     Get offset of element from channel, row and column index
+   * @param[in] ch  Channel index
+   * @param[in] row Row index
+   * @param[in] col Column index
+   * @return    Offset of element
+   */
+  uint32_t getElementOffset(uint32_t ch, uint32_t row, uint32_t col) const
+  {
+    uint32_t res = 0;
+
+    // TensorFlow Lite assumes that NHWC ordering for tessor
+    res += row * _shape.W * _shape.C;
+    res += col * _shape.C;
+    res += ch;
+
+    return res;
+  }
+
+private:
+  nnfw::misc::feature::Shape _shape;
+  float *_base;
+};
+
+} // namespace tflite
+} // namespace nnfw
+
+#endif // __NNFW_TFLITE_FEATURE_VIEW_H__
diff --git a/libs/tflite/include/tflite/InputIndex.h b/runtimes/libs/tflite/include/tflite/InputIndex.h
index f535b2626..f535b2626 100644
--- a/libs/tflite/include/tflite/InputIndex.h
+++ b/runtimes/libs/tflite/include/tflite/InputIndex.h
diff --git a/libs/tflite/include/tflite/InterpreterSession.h b/runtimes/libs/tflite/include/tflite/InterpreterSession.h
index deaf05a7f..deaf05a7f 100644
--- a/libs/tflite/include/tflite/InterpreterSession.h
+++ b/runtimes/libs/tflite/include/tflite/InterpreterSession.h
diff --git a/libs/tflite/include/tflite/NNAPISession.h b/runtimes/libs/tflite/include/tflite/NNAPISession.h
index b2a999d10..b2a999d10 100644
--- a/libs/tflite/include/tflite/NNAPISession.h
+++ b/runtimes/libs/tflite/include/tflite/NNAPISession.h
diff --git a/libs/tflite/include/tflite/OutputIndex.h b/runtimes/libs/tflite/include/tflite/OutputIndex.h
index dd1ca8d44..dd1ca8d44 100644
--- a/libs/tflite/include/tflite/OutputIndex.h
+++ b/runtimes/libs/tflite/include/tflite/OutputIndex.h
diff --git a/runtimes/libs/tflite/include/tflite/Quantization.h b/runtimes/libs/tflite/include/tflite/Quantization.h
new file mode 100644
index 000000000..8272bcdc0
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/Quantization.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     Quantization.h
+ * @brief    This file contains BitwiseIntToFloat union and quantization related
+ * @ingroup  COM_AI_RUNTIME
+ */
+
+#ifndef __NNFW_TFLITE_QUANTIZATION_H__
+#define __NNFW_TFLITE_QUANTIZATION_H__
+
+/**
+ * @brief Union to provide bitwise conversion of integer and float
+ */
+union BitwiseIntToFloat {
+  int i;
+  float f;
+};
+
+static const float FLOAT_NEAREST_TO_1 = BitwiseIntToFloat{0x3f7fffff}.f;
+
+#include "tensorflow/lite/context.h"
+
+/**
+ * @brief   Get TfLiteQuantizationParams object with default values
+ * @return  TfLiteQuantizationParams object
+ */
+TfLiteQuantizationParams make_default_quantization(void);
+
+#endif // __NNFW_TFLITE_QUANTIZATION_H__
diff --git a/runtimes/libs/tflite/include/tflite/Session.h b/runtimes/libs/tflite/include/tflite/Session.h
new file mode 100644
index 000000000..b653acf61
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/Session.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     Session.h
+ * @brief    This file contains Session class
+ * @ingroup  COM_AI_RUNTIME
+ */
+
+#ifndef __NNFW_TFLITE_SESSION_H__
+#define __NNFW_TFLITE_SESSION_H__
+
+#include <tensorflow/lite/interpreter.h>
+
+namespace nnfw
+{
+namespace tflite
+{
+
+/**
+ * @brief Structure to provide interface methods of interpreter session
+ */
+struct Session
+{
+  /**
+   * @brief  Destruct Session object using default destructor
+   */
+  virtual ~Session() = default;
+
+  /**
+   * @brief   Get the Interpreter object pointer
+   * @return  The Interpreter object pointer
+   */
+  virtual ::tflite::Interpreter *interp(void) = 0;
+
+  /**
+   * @brief   Prepare the session
+   * @return  @c true if prepare method succeeded, otherwise @c false
+   */
+  virtual bool prepare(void) = 0;
+  /**
+   * @brief   Run the session
+   * @return  @c true if run method succeeded, otherwise @c false
+   */
+  virtual bool run(void) = 0;
+  /**
+   * @brief   Teardown(release) the session
+   * @return  @c true if teardown method succeeded, otherwise @c false
+   */
+  virtual bool teardown(void) = 0;
+};
+
+} // namespace tflite
+} // namespace nnfw
+
+#endif // __NNFW_TFLITE_INTERP_SESSION_H__
diff --git a/runtimes/libs/tflite/include/tflite/TensorLogger.h b/runtimes/libs/tflite/include/tflite/TensorLogger.h
new file mode 100644
index 000000000..7b3363bd5
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/TensorLogger.h
@@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     TensorLogger.h
+ * @brief    This file contains TensorLogger class
+ * @ingroup  COM_AI_RUNTIME
+ */
+
+#ifndef __NNFW_TFLITE_TENSOR_LOGGER_H__
+#define __NNFW_TFLITE_TENSOR_LOGGER_H__
+
+#include "misc/tensor/IndexIterator.h"
+#include "tflite/TensorView.h"
+
+#include <tensorflow/lite/interpreter.h>
+#include <tensorflow/lite/context.h>
+#include <fstream>
+#include <iomanip>
+
+namespace nnfw
+{
+namespace tflite
+{
+
+/**
+ * @brief Class to write input and output value / shape into a file in python form
+ * @note This is a utility to write input and output value / shape into a file in python form.\n
+ *       any python app can load this value by running the python code below:\n
+ *       exec(open(filename).read())\n
+ *       generated python code looks like the following: \n
+ *       tensor_shape_gen = []\n
+ *       tensor_value_gen = []\n\n
+ *       tensor_shape_gen.append("{2, 1, 2}")\n
+ *       tensor_value_gen.append([1, 2, 3, 4])\n\n
+ *       tensor_shape_gen.append("{2}")\n
+ *       tensor_value_gen.append([1, 2])\n\n
+ *       tensor_shape_gen.append("{2, 1, 2}")\n
+ *       tensor_value_gen.append([1, 4, 3, 8])\n
+ */
+class TensorLogger
+{
+private:
+  std::ofstream _outfile;
+
+public:
+  /**
+   * @brief Get TensorLogger instance
+   * @return The TensorLogger instance
+   */
+  static TensorLogger &instance()
+  {
+    static TensorLogger instance;
+    return instance;
+  }
+
+  /**
+   * @brief Save the tensor details to file from interpreter
+   * @param[in] path The file path to save
+   * @param[in] interp The TfLite interpreter
+   */
+  void save(const std::string &path, ::tflite::Interpreter &interp)
+  {
+    open(path);
+
+    int log_index = 0;
+    for (const auto id : interp.inputs())
+    {
+      _outfile << "# input tensors" << std::endl;
+      printTensor(interp, id, log_index++);
+    }
+    for (const auto id : interp.outputs())
+    {
+      _outfile << "# output tensors" << std::endl;
+      printTensor(interp, id, log_index++);
+    }
+    close();
+  }
+
+private:
+  void open(const std::string &path)
+  {
+    if (!_outfile.is_open())
+      _outfile.open(path, std::ios_base::out);
+
+    _outfile << "# ------ file: " << path << " ------" << std::endl
+             << "tensor_shape_gen = []" << std::endl
+             << "tensor_value_gen = []" << std::endl
+             << std::endl;
+  }
+
+  void printTensor(::tflite::Interpreter &interp, const int id, const int log_index)
+  {
+    const TfLiteTensor *tensor = interp.tensor(id);
+
+    _outfile << "# tensor name: " << tensor->name << std::endl;
+    _outfile << "# tflite::interpreter.tensor(" << id << ") -> "
+                                                         "tensor_value_gen["
+             << log_index << "]" << std::endl;
+
+    if (tensor->type == kTfLiteInt32)
+    {
+      printTensorShape(tensor);
+      printTensorValue<int32_t>(tensor, tensor->data.i32);
+    }
+    else if (interp.tensor(id)->type == kTfLiteUInt8)
+    {
+      printTensorShape(tensor);
+      printTensorValue<uint8_t>(tensor, tensor->data.uint8);
+    }
+    else if (tensor->type == kTfLiteFloat32)
+    {
+      printTensorShape(tensor);
+      printTensorValue<float>(tensor, tensor->data.f);
+    }
+  }
+
+  void printTensorShape(const TfLiteTensor *tensor)
+  {
+    _outfile << "tensor_shape_gen.append('{";
+
+    int r = 0;
+    for (; r < tensor->dims->size - 1; r++)
+    {
+      _outfile << tensor->dims->data[r] << ", ";
+    }
+    _outfile << tensor->dims->data[r];
+
+    _outfile << "}')" << std::endl;
+  }
+
+  template <typename T> void printTensorValue(const TfLiteTensor *tensor, T *tensor_data_ptr)
+  {
+    _outfile << "tensor_value_gen.append([";
+
+    _outfile << std::fixed << std::setprecision(10);
+
+    const T *end = reinterpret_cast<const T *>(tensor->data.raw_const + tensor->bytes);
+    for (T *ptr = tensor_data_ptr; ptr < end; ptr++)
+      _outfile << *ptr << ", ";
+
+    _outfile << "])" << std::endl << std::endl;
+  }
+
+  void close()
+  {
+    _outfile << "# --------- tensor shape and value defined above ---------" << std::endl;
+    _outfile.close();
+  }
+};
+
+} // namespace tflite
+} // namespace nnfw
+
+#endif // __NNFW_TFLITE_TENSOR_LOGGER_H__
diff --git a/libs/tflite/include/tflite/TensorShapeUtils.h b/runtimes/libs/tflite/include/tflite/TensorShapeUtils.h
index ba8687413..ba8687413 100644
--- a/libs/tflite/include/tflite/TensorShapeUtils.h
+++ b/runtimes/libs/tflite/include/tflite/TensorShapeUtils.h
diff --git a/runtimes/libs/tflite/include/tflite/TensorUtils.h b/runtimes/libs/tflite/include/tflite/TensorUtils.h
new file mode 100644
index 000000000..08af1468b
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/TensorUtils.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file    TensorUtils.h
+ * @brief   This file contains utilities function
+ * @ingroup COM_AI_RUNTIME
+ */
+
+#ifndef __NNFW_TFLITE_TENSOR_UTILS_H__
+#define __NNFW_TFLITE_TENSOR_UTILS_H__
+
+#include <tensorflow/lite/context.h>
+
+namespace nnfw
+{
+namespace tflite
+{
+
+/**
+ * @brief Get @c true if tensor type is kTfLiteFloat32, otherwise @c false
+ * @param[in] tensor The tensor object to be compared
+ * @return @c true if tensor type is kTfLiteFloat32, otherwise @c false
+ */
+inline bool isFloatTensor(const TfLiteTensor *tensor) { return tensor->type == kTfLiteFloat32; }
+
+/**
+ * @brief Get @c true if tensor is 4-D tensor and the first dimension length is 1,
+ *        otherwise @c false
+ * @param[in] tensor The tensor object to be compared
+ * @return @c true if tensor is 4-D tensor and the first dimension length is 1, otherwise @c false
+ */
+inline bool isFeatureTensor(const TfLiteTensor *tensor)
+{
+  return (tensor->dims->size == 4) && (tensor->dims->data[0] == 1);
+}
+
+} // namespace tflite
+} // namespace nnfw
+
+#endif // __NNFW_TFLITE_TENSOR_UTILS_H__
diff --git a/runtimes/libs/tflite/include/tflite/TensorView.h b/runtimes/libs/tflite/include/tflite/TensorView.h
new file mode 100644
index 000000000..ce791a73f
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/TensorView.h
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     TensorView.h
+ * @brief    This file contains TensorView class
+ * @ingroup  COM_AI_RUNTIME
+ */
+
+#ifndef __NNFW_TFLITE_TENSOR_VIEW_H__
+#define __NNFW_TFLITE_TENSOR_VIEW_H__
+
+#include "tensorflow/lite/interpreter.h"
+
+#include "misc/tensor/Shape.h"
+#include "misc/tensor/Index.h"
+#include "misc/tensor/Reader.h"
+#include "misc/tensor/NonIncreasingStride.h"
+
+namespace nnfw
+{
+namespace tflite
+{
+
+/**
+ * @brief Class to define TensorView which is inherited from nnfw::misc::tensor::Reader<T> class
+ */
+template <typename T> class TensorView final : public nnfw::misc::tensor::Reader<T>
+{
+public:
+  /**
+   * @brief Construct a TensorView object with base and shape informations
+   * @param[in] shape The shape of a tensor
+   * @param[in] base The base address of a tensor
+   */
+  TensorView(const nnfw::misc::tensor::Shape &shape, T *base) : _shape{shape}, _base{base}
+  {
+    // Set 'stride'
+    _stride.init(_shape);
+  }
+
+public:
+  /**
+   * @brief Get shape of tensor
+   * @return Reference of shape
+   */
+  const nnfw::misc::tensor::Shape &shape(void) const { return _shape; }
+
+public:
+  /**
+   * @brief Get value of tensor index
+   * @param[in] index The tensor index
+   * @return The value at the index
+   */
+  T at(const nnfw::misc::tensor::Index &index) const override
+  {
+    const auto offset = _stride.offset(index);
+    return *(_base + offset);
+  }
+
+public:
+  /**
+   * @brief Get reference value of tensor index
+   * @param[in] index The tensor index
+   * @return The reference value at the index
+   */
+  T &at(const nnfw::misc::tensor::Index &index)
+  {
+    const auto offset = _stride.offset(index);
+    return *(_base + offset);
+  }
+
+private:
+  nnfw::misc::tensor::Shape _shape; /**< The tensor shape */
+
+public:
+  T *_base;                                        /**< The base address of tensor */
+  nnfw::misc::tensor::NonIncreasingStride _stride; /**< The NonIncreasingStride object */
+
+public:
+  // TODO Introduce Operand ID class
+  /**
+   * @brief Create TensorView object using given parameters
+   * @param[in] interp The TfLite interpreter
+   * @param[in] tensor_index The tensor index
+   * @return The new TensorView<T> object
+   */
+  static TensorView<T> make(::tflite::Interpreter &interp, int tensor_index)
+  {
+    auto tensor_ptr = interp.tensor(tensor_index);
+
+    // Set 'shape'
+    nnfw::misc::tensor::Shape shape(tensor_ptr->dims->size);
+
+    for (uint32_t axis = 0; axis < shape.rank(); ++axis)
+    {
+      shape.dim(axis) = tensor_ptr->dims->data[axis];
+    }
+
+    return TensorView<T>(shape, interp.typed_tensor<T>(tensor_index));
+  }
+};
+
+} // namespace tflite
+} // namespace nnfw
+
+#endif // __NNFW_TFLITE_TENSOR_VIEW_H__
diff --git a/runtimes/libs/tflite/include/tflite/ext/kernels/Abs.h b/runtimes/libs/tflite/include/tflite/ext/kernels/Abs.h
new file mode 100644
index 000000000..697ba33e9
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/ext/kernels/Abs.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_TFLITE_EXT_KERNELS_ABS_H__
+#define __NNFW_TFLITE_EXT_KERNELS_ABS_H__
+
+#include "tensorflow/lite/context.h"
+
+namespace nnfw
+{
+namespace tflite
+{
+namespace custom
+{
+namespace Abs
+{
+
+void *InitAbs(TfLiteContext *context, const char *buffer, size_t length);
+void FreeAbs(TfLiteContext *context, void *buffer);
+TfLiteStatus PrepareAbs(TfLiteContext *context, TfLiteNode *node);
+TfLiteStatus EvalAbs(TfLiteContext *context, TfLiteNode *node);
+
+} // namespace Abs
+} // namespace custom
+} // namespace tflite
+} // namespace nnfw
+
+#endif // __NNFW_TFLITE_EXT_KERNELS_ABS_H__
diff --git a/runtimes/libs/tflite/include/tflite/ext/kernels/CustomOps.h b/runtimes/libs/tflite/include/tflite/ext/kernels/CustomOps.h
new file mode 100644
index 000000000..3370db778
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/ext/kernels/CustomOps.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     CustomOps.h
+ * @brief    This file contains registration of custom operands
+ * @ingroup  COM_AI_RUNTIME
+ */
+
+#ifndef __NNFW_TFLITE_EXT_KERNELS_CUSTOM_OP_H__
+#define __NNFW_TFLITE_EXT_KERNELS_CUSTOM_OP_H__
+
+#include "tensorflow/lite/context.h"
+#include "tflite/ext/kernels/TensorFlowMax.h"
+#include "tflite/ext/kernels/SquaredDifference.h"
+#include "tflite/ext/kernels/TensorFlowSum.h"
+#include "tflite/ext/kernels/Abs.h"
+
+namespace nnfw
+{
+namespace tflite
+{
+namespace custom
+{
+
+#define REGISTER_FUNCTION(Name)             \
+  TfLiteRegistration *Register_##Name(void) \
+  {                                         \
+    static TfLiteRegistration r = {};       \
+    r.init = Name::Init##Name;              \
+    r.free = Name::Free##Name;              \
+    r.prepare = Name::Prepare##Name;        \
+    r.invoke = Name::Eval##Name;            \
+    r.custom_name = #Name;                  \
+    return &r;                              \
+  }
+
+REGISTER_FUNCTION(TensorFlowMax)
+REGISTER_FUNCTION(SquaredDifference)
+REGISTER_FUNCTION(TensorFlowSum)
+REGISTER_FUNCTION(Abs)
+
+#undef REGISTER_FUNCTION
+
+} // namespace custom
+} // namespace tflite
+} // namespace nnfw
+
+#endif // __NNFW_TFLITE_EXT_KERNELS_CUSTOM_OP_H__
diff --git a/runtimes/libs/tflite/include/tflite/ext/kernels/SquaredDifference.h b/runtimes/libs/tflite/include/tflite/ext/kernels/SquaredDifference.h
new file mode 100644
index 000000000..5512ead78
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/ext/kernels/SquaredDifference.h
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     SquaredDifference.h
+ * @brief    This file contains SquaredDifference namespace and SquaredDifference function
+ *           definitions
+ * @ingroup  COM_AI_RUNTIME
+ */
+
+#ifndef __NNFW_TFLITE_EXT_KERNELS_SQUARED_DIFFERENCE_H__
+#define __NNFW_TFLITE_EXT_KERNELS_SQUARED_DIFFERENCE_H__
+
+#include "tensorflow/lite/context.h"
+
+namespace nnfw
+{
+namespace tflite
+{
+namespace custom
+{
+namespace SquaredDifference
+{
+
+/**
+ * @brief Initialize SquaredDifference operand using the contents of buffer
+ * @param[in] context The TfLite context
+ * @param[in] buffer The buffer with contents
+ * @param[in] length The buffer length
+ * @return The void pointer for user data
+ */
+void *InitSquaredDifference(TfLiteContext *context, const char *buffer, size_t length);
+
+/**
+ * @brief Release any memory it might have allocated via 'InitSquaredDifference'
+ * @param[in] context The TfLite context
+ * @param[in] buffer The buffer with contents
+ * @return N/A
+ */
+void FreeSquaredDifference(TfLiteContext *context, void *buffer);
+
+/**
+ * @brief Prepare the SquaredDifference operand for execution
+ * @param[in] context The TfLite context
+ * @param[in] node The operand node
+ * @return The TfLite status
+ */
+TfLiteStatus PrepareSquaredDifference(TfLiteContext *context, TfLiteNode *node);
+
+/**
+ * @brief Evaluation the SquaredDifference operand for execution
+ * @param[in] context The TfLite context
+ * @param[in] node The operand node
+ * @return The TfLite status
+ */
+TfLiteStatus EvalSquaredDifference(TfLiteContext *context, TfLiteNode *node);
+
+} // namespace SquaredDifference
+} // namespace custom
+} // namespace tflite
+} // namespace nnfw
+
+#endif // __NNFW_TFLITE_EXT_KERNELS_SQUARED_DIFFERENCE_H__
diff --git a/runtimes/libs/tflite/include/tflite/ext/kernels/TensorFlowMax.h b/runtimes/libs/tflite/include/tflite/ext/kernels/TensorFlowMax.h
new file mode 100644
index 000000000..d573308ed
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/ext/kernels/TensorFlowMax.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     TensorFlowMax.h
+ * @brief    This file contains TensorFlowMax namespace and TensorFlowMax function definitions
+ * @ingroup  COM_AI_RUNTIME
+ */
+
+#ifndef __NNFW_TFLITE_EXT_KERNELS_TENSORFLOW_MAX_H__
+#define __NNFW_TFLITE_EXT_KERNELS_TENSORFLOW_MAX_H__
+
+#include "tensorflow/lite/context.h"
+
+namespace nnfw
+{
+namespace tflite
+{
+namespace custom
+{
+namespace TensorFlowMax
+{
+
+/**
+ * @brief Initialize TensorFlowMax operand using the contents of buffer
+ * @param[in] context The TfLite context
+ * @param[in] buffer The buffer with contents
+ * @param[in] length The buffer length
+ * @return The void pointer for user data
+ */
+void *InitTensorFlowMax(TfLiteContext *context, const char *buffer, size_t length);
+
+/**
+ * @brief Release any memory it might have allocated via 'InitTensorFlowMax'
+ * @param[in] context The TfLite context
+ * @param[in] buffer The buffer with contents
+ * @return N/A
+ */
+void FreeTensorFlowMax(TfLiteContext *context, void *buffer);
+
+/**
+ * @brief Prepare the TensorFlowMax operand for execution
+ * @param[in] context The TfLite context
+ * @param[in] node The operand node
+ * @return The TfLite status
+ */
+TfLiteStatus PrepareTensorFlowMax(TfLiteContext *context, TfLiteNode *node);
+
+/**
+ * @brief Evaluation the TensorFlowMax operand for execution
+ * @param[in] context The TfLite context
+ * @param[in] node The operand node
+ * @return The TfLite status
+ */
+TfLiteStatus EvalTensorFlowMax(TfLiteContext *context, TfLiteNode *node);
+
+} // namespace TensorFlowMax
+} // namespace custom
+} // namespace tflite
+} // namespace nnfw
+
+#endif // __NNFW_TFLITE_EXT_KERNELS_TENSORFLOW_MAX_H__
diff --git a/runtimes/libs/tflite/include/tflite/ext/kernels/TensorFlowSum.h b/runtimes/libs/tflite/include/tflite/ext/kernels/TensorFlowSum.h
new file mode 100644
index 000000000..29455aac5
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/ext/kernels/TensorFlowSum.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_TFLITE_EXT_KERNELS_TENSORFLOW_SUM_H__
+#define __NNFW_TFLITE_EXT_KERNELS_TENSORFLOW_SUM_H__
+
+#include "tensorflow/lite/context.h"
+
+namespace nnfw
+{
+namespace tflite
+{
+namespace custom
+{
+namespace TensorFlowSum
+{
+
+void *InitTensorFlowSum(TfLiteContext *context, const char *buffer, size_t length);
+void FreeTensorFlowSum(TfLiteContext *context, void *buffer);
+TfLiteStatus PrepareTensorFlowSum(TfLiteContext *context, TfLiteNode *node);
+TfLiteStatus EvalTensorFlowSum(TfLiteContext *context, TfLiteNode *node);
+
+} // namespace TensorFlowSum
+} // namespace custom
+} // namespace tflite
+} // namespace nnfw
+
+#endif // __NNFW_TFLITE_EXT_KERNELS_TENSORFLOW_SUM_H__
diff --git a/runtimes/libs/tflite/include/tflite/ext/kernels/register.h b/runtimes/libs/tflite/include/tflite/ext/kernels/register.h
new file mode 100644
index 000000000..7d2bd786d
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/ext/kernels/register.h
@@ -0,0 +1,42 @@
+/* Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+   Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+==============================================================================*/
+
+// NOTE To minimize diff with upstream tensorflow, disable clang-format
+// clang-format off
+
+// NOTE This header is derived from the following file (in TensorFlow)
+//        'externals/tensorflow/tensorflow/lite/kernels/register.h'
+#ifndef __NNFW_TFLITE_EXT_KERNELS_REGISTER_H__
+#define __NNFW_TFLITE_EXT_KERNELS_REGISTER_H__
+
+#include <unordered_map>
+#include "tensorflow/lite/context.h"
+#include "tensorflow/lite/model.h"
+
+namespace nnfw {
+namespace tflite {
+
+class BuiltinOpResolver : public ::tflite::MutableOpResolver {
+ public:
+  BuiltinOpResolver();
+};
+
+}  // namespace tflite
+}  // namespace nnfw
+
+#endif // __NNFW_TFLITE_EXT_KERNELS_REGISTER_H__
+
+// clang-format on
diff --git a/runtimes/libs/tflite/include/tflite/ext/nnapi_delegate.h b/runtimes/libs/tflite/include/tflite/ext/nnapi_delegate.h
new file mode 100644
index 000000000..21017b29f
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/ext/nnapi_delegate.h
@@ -0,0 +1,96 @@
+/* Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+   Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+==============================================================================*/
+
+// NOTE To minimize diff with upstream tensorflow, disable clang-format
+// clang-format off
+
+// NOTE This header is derived from the following file (in TensorFlow v1.12)
+//        'externals/tensorflow/tensorflow/lite/nnapi_delegate.h'
+#ifndef __NNFW_TFLITE_EXT_NNAPI_DELEGATE_H__
+#define __NNFW_TFLITE_EXT_NNAPI_DELEGATE_H__
+
+#include "tensorflow/lite/allocation.h"
+#if TFLITE_MAJOR_VER == 1 && TFLITE_MINOR_VER == 9
+#include "tensorflow/lite/context.h"
+#include "tensorflow/lite/error_reporter.h"
+#else
+#include "tensorflow/lite/c/c_api_internal.h"
+#include "tensorflow/lite/core/api/error_reporter.h"
+#endif
+#include "tensorflow/lite/interpreter.h"
+
+struct ANeuralNetworksModel;
+struct ANeuralNetworksMemory;
+struct ANeuralNetworksCompilation;
+
+namespace nnfw {
+namespace tflite {
+
+class NNAPIAllocation : public ::tflite::MMAPAllocation {
+ public:
+  NNAPIAllocation(const char* filename, ::tflite::ErrorReporter* error_reporter);
+  ~NNAPIAllocation();
+
+  size_t offset(const void* ptr) const {
+    auto signed_offset = reinterpret_cast<const uint8_t*>(ptr) -
+                         reinterpret_cast<const uint8_t*>(mmapped_buffer_);
+
+    return static_cast<size_t>(signed_offset);
+  }
+
+  ANeuralNetworksMemory* memory() const { return handle_; }
+  bool valid() const override { return handle_ != nullptr; }
+
+ private:
+  mutable ANeuralNetworksMemory* handle_ = nullptr;
+};
+
+class NNAPIDelegate {
+ public:
+  ~NNAPIDelegate();
+
+  // Convert a tflite graph to NNAPI
+  TfLiteStatus BuildGraph(::tflite::Interpreter* interpreter);
+
+  // Run
+  TfLiteStatus Invoke(::tflite::Interpreter* interpreter);
+
+  // Whether the current platform supports NNAPI delegation.
+  static bool IsSupported();
+
+ private:
+  // The NN API model handle
+  ANeuralNetworksModel* nn_model_ = nullptr;
+  // The NN API compilation handle
+  ANeuralNetworksCompilation* nn_compiled_model_ = nullptr;
+  // Model status
+  TfLiteStatus model_status_ = kTfLiteOk;
+
+  // List of state tensors for LSTM, RNN, SVDF.
+  // NN API does not allow ops to maintain states across multiple
+  // invocations. We need to manually create state input tensors from
+  // corresponding state output tensors of TFLite operations, and map them
+  // correctly.
+  std::vector<int> model_states_inputs_;   // holds NNAPI operand ids
+  std::vector<int> model_states_outputs_;  // holds TFLite tensor ids
+};
+
+} // namespace tflite
+} // namespace nnfw
+
+#endif  // __NNFW_TFLITE_EXT_NNAPI_DELEGATE_H__
+
+// clang-format on
diff --git a/runtimes/libs/tflite/include/tflite/interp/Builder.h b/runtimes/libs/tflite/include/tflite/interp/Builder.h
new file mode 100644
index 000000000..0f54e1779
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/interp/Builder.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     Builder.h
+ * @brief    This file contains Builder structure
+ * @ingroup  COM_AI_RUNTIME
+ */
+
+#ifndef __NNFW_TFLITE_INTERP_BUILDER_H__
+#define __NNFW_TFLITE_INTERP_BUILDER_H__
+
+#include <tensorflow/lite/interpreter.h>
+
+namespace nnfw
+{
+namespace tflite
+{
+
+/**
+ * @brief Structure to Builder
+ */
+struct Builder
+{
+  /**
+   * @brief Destroy the Builder object
+   */
+  virtual ~Builder() = default;
+
+  /**
+   * @brief Build a FlatBuffer model
+   * @return The TfLite interpreter object
+   */
+  virtual std::unique_ptr<::tflite::Interpreter> build(void) const = 0;
+};
+
+} // namespace tflite
+} // namespace nnfw
+
+#endif // __NNFW_TFLITE_INTERP_BUILDER_H__
diff --git a/runtimes/libs/tflite/include/tflite/interp/FlatBufferBuilder.h b/runtimes/libs/tflite/include/tflite/interp/FlatBufferBuilder.h
new file mode 100644
index 000000000..2d96af50b
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/interp/FlatBufferBuilder.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     FlatBufferBuilder.h
+ * @brief    This file contains FlatBufferBuilder class
+ * @ingroup  COM_AI_RUNTIME
+ */
+
+#ifndef __NNFW_TFLITE_INTERP_FLAT_BUFFER_BUILDER_H__
+#define __NNFW_TFLITE_INTERP_FLAT_BUFFER_BUILDER_H__
+
+#include <tensorflow/lite/model.h>
+
+#include "tflite/interp/Builder.h"
+
+namespace nnfw
+{
+namespace tflite
+{
+
+/**
+ * @brief Class to define FlatBufferBuilder which is inherited from Builder
+ */
+class FlatBufferBuilder final : public Builder
+{
+public:
+  /**
+   * @brief Construct a FlatBufferBuilder object with FlatBufferModel of TfLite
+   * @param[in] model The TfLite Flatbuffer model
+   */
+  FlatBufferBuilder(const ::tflite::FlatBufferModel &model) : _model{model}
+  {
+    // DO NOTHING
+  }
+
+public:
+  /**
+   * @brief Build a FlatBuffer model
+   * @return The TfLite interpreter pointer address
+   */
+  std::unique_ptr<::tflite::Interpreter> build(void) const override;
+
+private:
+  const ::tflite::FlatBufferModel &_model;
+};
+
+} // namespace tflite
+} // namespace nnfw
+
+#endif // __NNFW_TFLITE_INTERP_FLAT_BUFFER_BUILDER_H__
diff --git a/runtimes/libs/tflite/include/tflite/interp/FunctionBuilder.h b/runtimes/libs/tflite/include/tflite/interp/FunctionBuilder.h
new file mode 100644
index 000000000..7bfb8db2d
--- /dev/null
+++ b/runtimes/libs/tflite/include/tflite/interp/FunctionBuilder.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     FunctionBuilder.h
+ * @brief    This file contains FunctionBuilder class
+ * @ingroup  COM_AI_RUNTIME
+ */
+
+#ifndef __NNFW_TFLITE_INTERP_FUNCTION_BUILDER_H__
+#define __NNFW_TFLITE_INTERP_FUNCTION_BUILDER_H__
+
+#include <tensorflow/lite/model.h>
+
+#include "tflite/interp/Builder.h"
+
+namespace nnfw
+{
+namespace tflite
+{
+
+/**
+ * @brief Class to define FunctionBuilder which is inherited from Builder
+ */
+class FunctionBuilder final : public Builder
+{
+public:
+  using SetupFunc = std::function<void(::tflite::Interpreter &)>;
+
+public:
+  /**
+   * @brief Construct a FunctionBuilder object with SetupFunction
+   * @param[in] fn The SetupFunc object
+   */
+  FunctionBuilder(const SetupFunc &fn) : _fn{fn}
+  {
+    // DO NOTHING
+  }
+
+public:
+  /**
+   * @brief Build a SetupFunc
+   * @return The TfLite interpreter pointer address
+   */
+  std::unique_ptr<::tflite::Interpreter> build(void) const override;
+
+private:
+  SetupFunc _fn;
+};
+
+} // namespace tflite
+} // namespace nnfw
+
+#endif // __NNFW_TFLITE_INTERP_FUNCTION_BUILDER_H__
diff --git a/runtimes/libs/tflite/src/Diff.cpp b/runtimes/libs/tflite/src/Diff.cpp
new file mode 100644
index 000000000..414aef207
--- /dev/null
+++ b/runtimes/libs/tflite/src/Diff.cpp
@@ -0,0 +1,596 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "tflite/Diff.h"
+#include "tflite/ext/nnapi_delegate.h"
+
+#include "misc/fp32.h"
+
+#include "misc/tensor/IndexIterator.h"
+#include "misc/tensor/IndexFormatter.h"
+#include "misc/tensor/Zipper.h"
+#include "misc/tensor/Comparator.h"
+
+#include "misc/EnvVar.h"
+
+#include <iostream>
+#include <cassert>
+
+class DiffSummary : public nnfw::misc::tensor::Comparator::Observer
+{
+public:
+  DiffSummary()
+      : max_abs_diff_index(0), max_abs_diff_expected{0.0f}, max_abs_diff_obtained{0.0f},
+        max_abs_diff_value{0.0f}, max_rel_diff_index(0), max_rel_diff_expected{0.0f},
+        max_rel_diff_obtained{0.0f}, max_rel_diff_value{0.0f}
+  {
+    // DO NOTHING
+  }
+
+public:
+  void notify(const nnfw::misc::tensor::Index &index, float expected, float obtained) override;
+
+public:
+  nnfw::misc::tensor::Index max_abs_diff_index;
+  float max_abs_diff_expected;
+  float max_abs_diff_obtained;
+  float max_abs_diff_value;
+
+  nnfw::misc::tensor::Index max_rel_diff_index;
+  float max_rel_diff_expected;
+  float max_rel_diff_obtained;
+  float max_rel_diff_value;
+};
+
+void DiffSummary::notify(const nnfw::misc::tensor::Index &index, float expected, float obtained)
+{
+  const auto abs_diff_value = std::fabs(expected - obtained);
+
+  if (max_abs_diff_value < abs_diff_value)
+  {
+    max_abs_diff_index = index;
+    max_abs_diff_value = abs_diff_value;
+    max_abs_diff_expected = expected;
+    max_abs_diff_obtained = obtained;
+  }
+
+  const auto rel_diff_value = nnfw::misc::fp32::relative_diff(expected, obtained);
+
+  if (max_rel_diff_value < rel_diff_value)
+  {
+    max_rel_diff_index = index;
+    max_rel_diff_value = rel_diff_value;
+    max_rel_diff_expected = expected;
+    max_rel_diff_obtained = obtained;
+  }
+}
+
+template <typename T>
+bool TfLiteInterpMatchApp::compareSingleTensorView(const nnfw::tflite::TensorView<T> &expected,
+                                                   const nnfw::tflite::TensorView<T> &obtained,
+                                                   int id) const
+{
+  std::vector<nnfw::misc::tensor::Diff<T>> diffs;
+  assert(expected.shape() == obtained.shape());
+
+  using nnfw::misc::tensor::zip;
+  using nnfw::misc::tensor::Index;
+
+  zip(expected.shape(), expected, obtained)
+      << [&](const Index &index, T expected_value, T obtained_value) {
+           if (expected_value != obtained_value)
+           {
+             diffs.emplace_back(index, expected_value, obtained_value);
+           }
+         };
+
+  // TODO Unify summary generation code
+  if (diffs.size() == 0)
+  {
+    std::cout << "  Tensor #" << id << ": MATCHED" << std::endl;
+  }
+  else
+  {
+    std::cout << "  Tensor #" << id << ": UNMATCHED" << std::endl;
+    std::cout << "    " << diffs.size() << " diffs are detected" << std::endl;
+  }
+
+  if (diffs.size() > 0 && _verbose != 0)
+  {
+    std::cout << "    ---- Details ---" << std::endl;
+    for (const auto &diff : diffs)
+    {
+      std::cout << "    Diff at [" << nnfw::misc::tensor::IndexFormatter(diff.index) << "]"
+                << std::endl;
+      std::cout << "      expected: " << diff.expected << std::endl;
+      std::cout << "      obtained: " << diff.obtained << std::endl;
+    }
+  }
+
+  return diffs.size() == 0;
+}
+
+template <>
+bool TfLiteInterpMatchApp::compareSingleTensorView<float>(
+    const nnfw::tflite::TensorView<float> &expected,
+    const nnfw::tflite::TensorView<float> &obtained, int id) const
+{
+  DiffSummary summary;
+
+  assert(expected.shape() == obtained.shape());
+  auto diffs = _comparator.compare(expected.shape(), expected, obtained, &summary);
+
+  // TODO Unify summary generation code
+  if (diffs.size() == 0)
+  {
+    std::cout << "  Tensor #" << id << ": MATCHED" << std::endl;
+  }
+  else
+  {
+    std::cout << "  Tensor #" << id << ": UNMATCHED" << std::endl;
+    std::cout << "    " << diffs.size() << " diffs are detected" << std::endl;
+  }
+
+  // Print out max_diff
+  if (summary.max_abs_diff_value > 0)
+  {
+    std::cout << "    Max absolute diff at ["
+              << nnfw::misc::tensor::IndexFormatter(summary.max_abs_diff_index) << "]" << std::endl;
+    std::cout << "       expected: " << summary.max_abs_diff_expected << std::endl;
+    std::cout << "       obtained: " << summary.max_abs_diff_obtained << std::endl;
+    std::cout << "       absolute diff: " << summary.max_abs_diff_value << std::endl;
+  }
+
+  if (summary.max_rel_diff_value > 0)
+  {
+    const auto tolerance_level = summary.max_rel_diff_value / FLT_EPSILON;
+
+    std::cout << "    Max relative diff at ["
+              << nnfw::misc::tensor::IndexFormatter(summary.max_rel_diff_index) << "]" << std::endl;
+    std::cout << "       expected: " << summary.max_rel_diff_expected << std::endl;
+    std::cout << "       obtained: " << summary.max_rel_diff_obtained << std::endl;
+    std::cout << "       relative diff: " << summary.max_rel_diff_value << std::endl;
+    std::cout << "         (tolerance level = " << tolerance_level << ")" << std::endl;
+  }
+
+  if (diffs.size() > 0)
+  {
+    if (_verbose != 0)
+    {
+      std::cout << "    ---- Details ---" << std::endl;
+      for (const auto &diff : diffs)
+      {
+        const auto absolute_diff = std::fabs(diff.expected - diff.obtained);
+        const auto relative_diff = nnfw::misc::fp32::relative_diff(diff.expected, diff.obtained);
+        const auto tolerance_level = relative_diff / FLT_EPSILON;
+
+        std::cout << "    Diff at [" << nnfw::misc::tensor::IndexFormatter(diff.index) << "]"
+                  << std::endl;
+        std::cout << "      expected: " << diff.expected << std::endl;
+        std::cout << "      obtained: " << diff.obtained << std::endl;
+        std::cout << "      absolute diff: " << absolute_diff << std::endl;
+        std::cout << "      relative diff: " << relative_diff << std::endl;
+        std::cout << "         (tolerance level = " << tolerance_level << ")" << std::endl;
+      }
+    }
+
+    return false;
+  }
+  return true;
+}
+
+#include <map>
+
+bool TfLiteInterpMatchApp::run(::tflite::Interpreter &interp, ::tflite::Interpreter &nnapi) const
+{
+  assert(interp.outputs() == nnapi.outputs());
+
+  bool all_matched = true;
+
+  using Comparator = std::function<bool(int id, ::tflite::Interpreter &, ::tflite::Interpreter &)>;
+
+  std::map<TfLiteType, Comparator> comparators;
+
+  comparators[kTfLiteUInt8] = [this](int id, ::tflite::Interpreter &interp,
+                                     ::tflite::Interpreter &nnapi) {
+    const auto expected = nnfw::tflite::TensorView<uint8_t>::make(interp, id);
+    const auto obtained = nnfw::tflite::TensorView<uint8_t>::make(nnapi, id);
+
+    return compareSingleTensorView(expected, obtained, id);
+  };
+
+  comparators[kTfLiteInt32] = [this](int id, ::tflite::Interpreter &interp,
+                                     ::tflite::Interpreter &nnapi) {
+    const auto expected = nnfw::tflite::TensorView<int32_t>::make(interp, id);
+    const auto obtained = nnfw::tflite::TensorView<int32_t>::make(nnapi, id);
+
+    return compareSingleTensorView(expected, obtained, id);
+  };
+
+  comparators[kTfLiteFloat32] = [this](int id, ::tflite::Interpreter &interp,
+                                       ::tflite::Interpreter &nnapi) {
+    const auto expected = nnfw::tflite::TensorView<float>::make(interp, id);
+    const auto obtained = nnfw::tflite::TensorView<float>::make(nnapi, id);
+
+    return compareSingleTensorView(expected, obtained, id);
+  };
+
+  comparators[kTfLiteBool] = [this](int id, ::tflite::Interpreter &interp,
+                                    ::tflite::Interpreter &nnapi) {
+    const auto expected = nnfw::tflite::TensorView<bool>::make(interp, id);
+    const auto obtained = nnfw::tflite::TensorView<bool>::make(nnapi, id);
+
+    return compareSingleTensorView(expected, obtained, id);
+  };
+
+  for (const auto &id : interp.outputs())
+  {
+    assert(interp.tensor(id)->type == nnapi.tensor(id)->type);
+
+    auto it = comparators.find(interp.tensor(id)->type);
+
+    if (it == comparators.end())
+    {
+      throw std::runtime_error{"Not supported output type"};
+    }
+
+    const auto &comparator = it->second;
+
+    if (!comparator(id, interp, nnapi))
+    {
+      all_matched = false;
+    }
+  }
+
+  return all_matched;
+}
+
+#include "misc/tensor/Object.h"
+
+using namespace std::placeholders;
+
+template <> uint8_t RandomGenerator::generate<uint8_t>(void)
+{
+  // The value of type_range is 255.
+  float type_range = static_cast<float>(std::numeric_limits<uint8_t>::max()) -
+                     static_cast<float>(std::numeric_limits<uint8_t>::min());
+  // Most _dist values range from -5.0 to 5.0.
+  float min_range = -5.0f;
+  float max_range = 5.0f;
+  return static_cast<uint8_t>((_dist(_rand) - min_range) * type_range / (max_range - min_range));
+}
+
+#include "tflite/TensorLogger.h"
+//
+// Random Test Runner
+//
+int RandomTestRunner::run(const nnfw::tflite::Builder &builder)
+{
+  auto tfl_interp = builder.build();
+  auto nnapi = builder.build();
+
+  tfl_interp->UseNNAPI(false);
+
+  // Allocate Tensors
+  tfl_interp->AllocateTensors();
+  nnapi->AllocateTensors();
+
+  assert(tfl_interp->inputs() == nnapi->inputs());
+
+  using ::tflite::Interpreter;
+  using Initializer = std::function<void(int id, Interpreter *, Interpreter *)>;
+
+  std::map<TfLiteType, Initializer> initializers;
+  std::map<TfLiteType, Initializer> reseters;
+
+  // Generate singed 32-bit integer (s32) input
+  initializers[kTfLiteInt32] = [&](int id, Interpreter *tfl_interp, Interpreter *nnapi) {
+    assert(tfl_interp->tensor(id)->type == kTfLiteInt32);
+    assert(nnapi->tensor(id)->type == kTfLiteInt32);
+
+    auto tfl_interp_view = nnfw::tflite::TensorView<int32_t>::make(*tfl_interp, id);
+    auto nnapi_view = nnfw::tflite::TensorView<int32_t>::make(*nnapi, id);
+
+    assert(tfl_interp_view.shape() == nnapi_view.shape());
+
+    int32_t value = 0;
+
+    nnfw::misc::tensor::iterate(tfl_interp_view.shape())
+        << [&](const nnfw::misc::tensor::Index &ind) {
+             // TODO Generate random values
+             tfl_interp_view.at(ind) = value;
+             nnapi_view.at(ind) = value;
+             ++value;
+           };
+  };
+
+  // Generate singed 32-bit integer (s32) input
+  reseters[kTfLiteInt32] = [&](int id, Interpreter *tfl_interp, Interpreter *nnapi) {
+    assert(tfl_interp->tensor(id)->type == kTfLiteInt32);
+    assert(nnapi->tensor(id)->type == kTfLiteInt32);
+
+    auto tfl_interp_view = nnfw::tflite::TensorView<int32_t>::make(*tfl_interp, id);
+    auto nnapi_view = nnfw::tflite::TensorView<int32_t>::make(*nnapi, id);
+
+    assert(tfl_interp_view.shape() == nnapi_view.shape());
+
+    int32_t value = 0;
+
+    nnfw::misc::tensor::iterate(tfl_interp_view.shape())
+        << [&](const nnfw::misc::tensor::Index &ind) {
+             // TODO Generate random values
+             tfl_interp_view.at(ind) = value;
+             nnapi_view.at(ind) = value;
+           };
+  };
+
+  initializers[kTfLiteUInt8] = [&](int id, Interpreter *tfl_interp, Interpreter *nnapi) {
+    assert(tfl_interp->tensor(id)->type == kTfLiteUInt8);
+    assert(nnapi->tensor(id)->type == kTfLiteUInt8);
+
+    auto tfl_interp_view = nnfw::tflite::TensorView<uint8_t>::make(*tfl_interp, id);
+    auto nnapi_view = nnfw::tflite::TensorView<uint8_t>::make(*nnapi, id);
+
+    assert(tfl_interp_view.shape() == nnapi_view.shape());
+
+    auto fp = static_cast<uint8_t (RandomGenerator::*)(const ::nnfw::misc::tensor::Shape &,
+                                                       const ::nnfw::misc::tensor::Index &)>(
+        &RandomGenerator::generate<uint8_t>);
+    const nnfw::misc::tensor::Object<uint8_t> data(tfl_interp_view.shape(),
+                                                   std::bind(fp, _randgen, _1, _2));
+    assert(tfl_interp_view.shape() == data.shape());
+
+    nnfw::misc::tensor::iterate(tfl_interp_view.shape())
+        << [&](const nnfw::misc::tensor::Index &ind) {
+             const auto value = data.at(ind);
+
+             tfl_interp_view.at(ind) = value;
+             nnapi_view.at(ind) = value;
+           };
+  };
+
+  reseters[kTfLiteUInt8] = [&](int id, Interpreter *tfl_interp, Interpreter *nnapi) {
+    assert(tfl_interp->tensor(id)->type == kTfLiteUInt8);
+    assert(nnapi->tensor(id)->type == kTfLiteUInt8);
+
+    auto tfl_interp_view = nnfw::tflite::TensorView<uint8_t>::make(*tfl_interp, id);
+    auto nnapi_view = nnfw::tflite::TensorView<uint8_t>::make(*nnapi, id);
+
+    assert(tfl_interp_view.shape() == nnapi_view.shape());
+
+    auto fp = static_cast<uint8_t (RandomGenerator::*)(const ::nnfw::misc::tensor::Shape &,
+                                                       const ::nnfw::misc::tensor::Index &)>(
+        &RandomGenerator::generate<uint8_t>);
+    const nnfw::misc::tensor::Object<uint8_t> data(tfl_interp_view.shape(),
+                                                   std::bind(fp, _randgen, _1, _2));
+    assert(tfl_interp_view.shape() == data.shape());
+
+    uint8_t value = 0;
+
+    nnfw::misc::tensor::iterate(tfl_interp_view.shape())
+        << [&](const nnfw::misc::tensor::Index &ind) {
+             tfl_interp_view.at(ind) = value;
+             nnapi_view.at(ind) = value;
+           };
+  };
+
+  initializers[kTfLiteFloat32] = [&](int id, Interpreter *tfl_interp, Interpreter *nnapi) {
+    assert(tfl_interp->tensor(id)->type == kTfLiteFloat32);
+    assert(nnapi->tensor(id)->type == kTfLiteFloat32);
+
+    auto tfl_interp_view = nnfw::tflite::TensorView<float>::make(*tfl_interp, id);
+    auto nnapi_view = nnfw::tflite::TensorView<float>::make(*nnapi, id);
+
+    assert(tfl_interp_view.shape() == nnapi_view.shape());
+
+    auto fp = static_cast<float (RandomGenerator::*)(const ::nnfw::misc::tensor::Shape &,
+                                                     const ::nnfw::misc::tensor::Index &)>(
+        &RandomGenerator::generate<float>);
+    const nnfw::misc::tensor::Object<float> data(tfl_interp_view.shape(),
+                                                 std::bind(fp, _randgen, _1, _2));
+
+    assert(tfl_interp_view.shape() == data.shape());
+
+    nnfw::misc::tensor::iterate(tfl_interp_view.shape())
+        << [&](const nnfw::misc::tensor::Index &ind) {
+             const auto value = data.at(ind);
+
+             tfl_interp_view.at(ind) = value;
+             nnapi_view.at(ind) = value;
+           };
+  };
+
+  reseters[kTfLiteFloat32] = [&](int id, Interpreter *tfl_interp, Interpreter *nnapi) {
+    assert(tfl_interp->tensor(id)->type == kTfLiteFloat32);
+    assert(nnapi->tensor(id)->type == kTfLiteFloat32);
+
+    auto tfl_interp_view = nnfw::tflite::TensorView<float>::make(*tfl_interp, id);
+    auto nnapi_view = nnfw::tflite::TensorView<float>::make(*nnapi, id);
+
+    assert(tfl_interp_view.shape() == nnapi_view.shape());
+
+    auto fp = static_cast<float (RandomGenerator::*)(const ::nnfw::misc::tensor::Shape &,
+                                                     const ::nnfw::misc::tensor::Index &)>(
+        &RandomGenerator::generate<float>);
+    const nnfw::misc::tensor::Object<float> data(tfl_interp_view.shape(),
+                                                 std::bind(fp, _randgen, _1, _2));
+
+    assert(tfl_interp_view.shape() == data.shape());
+
+    float value = 0;
+
+    nnfw::misc::tensor::iterate(tfl_interp_view.shape())
+        << [&](const nnfw::misc::tensor::Index &ind) {
+             tfl_interp_view.at(ind) = value;
+             nnapi_view.at(ind) = value;
+           };
+  };
+
+  initializers[kTfLiteBool] = [&](int id, Interpreter *tfl_interp, Interpreter *nnapi) {
+    assert(tfl_interp->tensor(id)->type == kTfLiteBool);
+    assert(nnapi->tensor(id)->type == kTfLiteBool);
+
+    auto tfl_interp_view = nnfw::tflite::TensorView<bool>::make(*tfl_interp, id);
+    auto nnapi_view = nnfw::tflite::TensorView<bool>::make(*nnapi, id);
+
+    assert(tfl_interp_view.shape() == nnapi_view.shape());
+
+    auto fp = static_cast<bool (RandomGenerator::*)(const ::nnfw::misc::tensor::Shape &,
+                                                    const ::nnfw::misc::tensor::Index &)>(
+        &RandomGenerator::generate<bool>);
+    const nnfw::misc::tensor::Object<bool> data(tfl_interp_view.shape(),
+                                                std::bind(fp, _randgen, _1, _2));
+
+    assert(tfl_interp_view.shape() == data.shape());
+
+    nnfw::misc::tensor::iterate(tfl_interp_view.shape())
+        << [&](const nnfw::misc::tensor::Index &ind) {
+             const auto value = data.at(ind);
+
+             tfl_interp_view.at(ind) = value;
+             nnapi_view.at(ind) = value;
+           };
+  };
+
+  reseters[kTfLiteBool] = [&](int id, Interpreter *tfl_interp, Interpreter *nnapi) {
+    assert(tfl_interp->tensor(id)->type == kTfLiteBool);
+    assert(nnapi->tensor(id)->type == kTfLiteBool);
+
+    auto tfl_interp_view = nnfw::tflite::TensorView<bool>::make(*tfl_interp, id);
+    auto nnapi_view = nnfw::tflite::TensorView<bool>::make(*nnapi, id);
+
+    assert(tfl_interp_view.shape() == nnapi_view.shape());
+
+    auto fp = static_cast<bool (RandomGenerator::*)(const ::nnfw::misc::tensor::Shape &,
+                                                    const ::nnfw::misc::tensor::Index &)>(
+        &RandomGenerator::generate<bool>);
+    const nnfw::misc::tensor::Object<bool> data(tfl_interp_view.shape(),
+                                                std::bind(fp, _randgen, _1, _2));
+
+    assert(tfl_interp_view.shape() == data.shape());
+
+    bool value = false;
+
+    nnfw::misc::tensor::iterate(tfl_interp_view.shape())
+        << [&](const nnfw::misc::tensor::Index &ind) {
+             tfl_interp_view.at(ind) = value;
+             nnapi_view.at(ind) = value;
+           };
+  };
+
+  // Fill IFM with random numbers
+  for (const auto id : tfl_interp->inputs())
+  {
+    assert(tfl_interp->tensor(id)->type == nnapi->tensor(id)->type);
+
+    auto it = initializers.find(tfl_interp->tensor(id)->type);
+
+    if (it == initializers.end())
+    {
+      throw std::runtime_error{"Not supported input type"};
+    }
+
+    it->second(id, tfl_interp.get(), nnapi.get());
+  }
+
+  // Fill OFM with 0
+  for (const auto id : tfl_interp->outputs())
+  {
+    assert(tfl_interp->tensor(id)->type == nnapi->tensor(id)->type);
+
+    auto it = reseters.find(tfl_interp->tensor(id)->type);
+
+    if (it == reseters.end())
+    {
+      throw std::runtime_error{"Not supported input type"};
+    }
+
+    it->second(id, tfl_interp.get(), nnapi.get());
+  }
+
+  std::cout << "[NNAPI TEST] Run T/F Lite Interpreter without NNAPI" << std::endl;
+  tfl_interp->Invoke();
+
+  std::cout << "[NNAPI TEST] Run T/F Lite Interpreter with NNAPI" << std::endl;
+
+  char *env = getenv("UPSTREAM_DELEGATE");
+
+  if (env && !std::string(env).compare("1"))
+  {
+    nnapi->UseNNAPI(true);
+    nnapi->Invoke();
+  }
+  else
+  {
+    nnfw::tflite::NNAPIDelegate d;
+
+    if (d.BuildGraph(nnapi.get()))
+    {
+      throw std::runtime_error{"Failed to BuildGraph"};
+    }
+
+    if (d.Invoke(nnapi.get()))
+    {
+      throw std::runtime_error{"Failed to BuildGraph"};
+    }
+  }
+
+  // Compare OFM
+  std::cout << "[NNAPI TEST] Compare the result" << std::endl;
+
+  const auto tolerance = _param.tolerance;
+
+  auto equals = [tolerance](float lhs, float rhs) {
+    // NOTE Hybrid approach
+    // TODO Allow users to set tolerance for absolute_epsilon_equal
+    if (nnfw::misc::fp32::absolute_epsilon_equal(lhs, rhs))
+    {
+      return true;
+    }
+
+    return nnfw::misc::fp32::epsilon_equal(lhs, rhs, tolerance);
+  };
+
+  nnfw::misc::tensor::Comparator comparator(equals);
+  TfLiteInterpMatchApp app(comparator);
+
+  app.verbose() = _param.verbose;
+
+  bool res = app.run(*tfl_interp, *nnapi);
+
+  if (!res)
+  {
+    return 255;
+  }
+
+  std::cout << "[NNAPI TEST] PASSED" << std::endl;
+
+  if (_param.tensor_logging)
+    nnfw::tflite::TensorLogger::instance().save(_param.log_path, *tfl_interp);
+
+  return 0;
+}
+
+RandomTestRunner RandomTestRunner::make(int seed)
+{
+  RandomTestParam param;
+
+  param.verbose = nnfw::misc::EnvVar("VERBOSE").asInt(0);
+  param.tolerance = nnfw::misc::EnvVar("TOLERANCE").asInt(1);
+  ;
+
+  return RandomTestRunner{seed, param};
+}
diff --git a/libs/tflite/src/FeatureView.cpp b/runtimes/libs/tflite/src/FeatureView.cpp
index fdf5a4b00..fdf5a4b00 100644
--- a/libs/tflite/src/FeatureView.cpp
+++ b/runtimes/libs/tflite/src/FeatureView.cpp
diff --git a/libs/tflite/src/Quantization.cpp b/runtimes/libs/tflite/src/Quantization.cpp
index 9c162c342..9c162c342 100644
--- a/libs/tflite/src/Quantization.cpp
+++ b/runtimes/libs/tflite/src/Quantization.cpp
diff --git a/runtimes/libs/tflite/src/TensorShapeUtils.cpp b/runtimes/libs/tflite/src/TensorShapeUtils.cpp
new file mode 100644
index 000000000..29628cd26
--- /dev/null
+++ b/runtimes/libs/tflite/src/TensorShapeUtils.cpp
@@ -0,0 +1,29 @@
+#include "tflite/TensorShapeUtils.h"
+
+namespace nnfw
+{
+namespace tflite
+{
+
+nnfw::misc::tensor::Shape broadcast(const nnfw::misc::tensor::Shape &lhs_shape,
+                                    const nnfw::misc::tensor::Shape &rhs_shape)
+{
+  const uint32_t lhs_rank = lhs_shape.rank();
+  const uint32_t rhs_rank = rhs_shape.rank();
+  const uint32_t out_rank = std::max(lhs_rank, rhs_rank);
+  const uint32_t lhs_rank_diff = out_rank - lhs_rank;
+  const uint32_t rhs_rank_diff = out_rank - rhs_rank;
+
+  nnfw::misc::tensor::Shape out_shape(out_rank);
+
+  for (uint32_t axis = 0; axis < out_rank; ++axis)
+  {
+    out_shape.dim(axis) = std::max(axis < lhs_rank_diff ? 1 : lhs_shape.dim(axis - lhs_rank_diff),
+                                   axis < rhs_rank_diff ? 1 : rhs_shape.dim(axis - rhs_rank_diff));
+  }
+
+  return out_shape;
+}
+
+} // namespace tflite
+} // namespace nnfw
diff --git a/libs/tflite/src/TensorView.test.cpp b/runtimes/libs/tflite/src/TensorView.test.cpp
index c710b3c33..c710b3c33 100644
--- a/libs/tflite/src/TensorView.test.cpp
+++ b/runtimes/libs/tflite/src/TensorView.test.cpp
diff --git a/runtimes/libs/tflite/src/ext/kernels/Abs.cpp b/runtimes/libs/tflite/src/ext/kernels/Abs.cpp
new file mode 100644
index 000000000..61181465d
--- /dev/null
+++ b/runtimes/libs/tflite/src/ext/kernels/Abs.cpp
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "tflite/ext/kernels/Abs.h"
+#include "tensorflow/lite/kernels/kernel_util.h"
+
+#include <iostream>
+#include <cmath>
+
+namespace nnfw
+{
+namespace tflite
+{
+namespace custom
+{
+namespace Abs
+{
+
+void *InitAbs(TfLiteContext *, const char *, size_t) { return nullptr; }
+
+void FreeAbs(TfLiteContext *, void *) {}
+
+TfLiteStatus PrepareAbs(TfLiteContext *context, TfLiteNode *node)
+{
+  TF_LITE_ENSURE_EQ(context, ::tflite::NumInputs(node), 1);
+  TF_LITE_ENSURE_EQ(context, ::tflite::NumOutputs(node), 1);
+
+  const TfLiteTensor *input = ::tflite::GetInput(context, node, 0);
+  TfLiteTensor *output = ::tflite::GetOutput(context, node, 0);
+
+  TF_LITE_ENSURE_EQ(context, input->type, output->type);
+
+  return context->ResizeTensor(context, output, TfLiteIntArrayCopy(input->dims));
+}
+
+TfLiteStatus EvalAbs(TfLiteContext *context, TfLiteNode *node)
+{
+  const TfLiteTensor *input = ::tflite::GetInput(context, node, 0);
+  TfLiteTensor *output = ::tflite::GetOutput(context, node, 0);
+  size_t elements = ::tflite::NumElements(input);
+  switch (input->type)
+  {
+    case kTfLiteFloat32:
+    {
+      auto *in = input->data.f;
+      auto *in_end = in + elements;
+      auto *out = output->data.f;
+      for (; in < in_end; in++, out++)
+        *out = std::abs(*in);
+      return kTfLiteOk;
+    }
+    case kTfLiteInt32:
+    {
+      auto *in = input->data.i32;
+      auto *in_end = in + elements;
+      auto *out = output->data.i32;
+      for (; in < in_end; in++, out++)
+        *out = std::abs(*in);
+      return kTfLiteOk;
+    }
+    case kTfLiteInt64:
+    {
+      auto *in = input->data.i64;
+      auto *in_end = in + elements;
+      auto *out = output->data.i64;
+      for (; in < in_end; in++, out++)
+        *out = std::abs(*in);
+      return kTfLiteOk;
+    }
+    case kTfLiteUInt8:
+    {
+      auto *in = input->data.uint8;
+      auto *in_end = in + elements;
+      auto *out = output->data.uint8;
+      for (; in < in_end; in++, out++)
+        *out = *in;
+      return kTfLiteOk;
+    }
+    default:
+    {
+      context->ReportError(context, "Input type %d is not supported", input->type);
+      return kTfLiteError;
+    }
+  }
+}
+
+} // namespace Abs
+} // namespace custom
+} // namespace tflite
+} // namespace nnfw
diff --git a/runtimes/libs/tflite/src/ext/kernels/SquaredDifference.cpp b/runtimes/libs/tflite/src/ext/kernels/SquaredDifference.cpp
new file mode 100644
index 000000000..615878513
--- /dev/null
+++ b/runtimes/libs/tflite/src/ext/kernels/SquaredDifference.cpp
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "tflite/ext/kernels/SquaredDifference.h"
+#include "tensorflow/lite/kernels/kernel_util.h"
+
+#include <iostream>
+
+namespace nnfw
+{
+namespace tflite
+{
+namespace custom
+{
+namespace SquaredDifference
+{
+
+void *InitSquaredDifference(TfLiteContext *, const char *, size_t) { return nullptr; }
+
+void FreeSquaredDifference(TfLiteContext *, void *) {}
+
+TfLiteStatus PrepareSquaredDifference(TfLiteContext *context, TfLiteNode *node)
+{
+  TF_LITE_ENSURE_EQ(context, ::tflite::NumInputs(node), 2);
+  TF_LITE_ENSURE_EQ(context, ::tflite::NumOutputs(node), 1);
+
+  const TfLiteTensor *input1 = ::tflite::GetInput(context, node, 0);
+  const TfLiteTensor *input2 = ::tflite::GetInput(context, node, 1);
+  TfLiteTensor *output = ::tflite::GetOutput(context, node, 0);
+
+  TF_LITE_ENSURE_EQ(context, input1->type, input2->type);
+  TF_LITE_ENSURE_EQ(context, input1->type, output->type);
+
+  return context->ResizeTensor(context, output, TfLiteIntArrayCopy(input1->dims));
+}
+
+TfLiteStatus EvalSquaredDifference(TfLiteContext *context, TfLiteNode *node)
+{
+
+  const TfLiteTensor *input1 = ::tflite::GetInput(context, node, 0);
+  const TfLiteTensor *input2 = ::tflite::GetInput(context, node, 1);
+
+  TfLiteTensor *output = ::tflite::GetOutput(context, node, 0);
+
+  size_t elements = ::tflite::NumElements(input1);
+
+  switch (input1->type)
+  {
+    case kTfLiteFloat32:
+    {
+      const float *in1 = input1->data.f;
+      const float *in2 = input2->data.f;
+      const float *in_end1 = in1 + elements;
+      float *out = output->data.f;
+
+      for (; in1 < in_end1; in1++, in2++, out++)
+        *out = ((*in1 - *in2) * (*in1 - *in2));
+
+      return kTfLiteOk;
+    }
+    case kTfLiteInt32:
+    {
+      const int *in1 = input1->data.i32;
+      const int *in2 = input2->data.i32;
+      const int *in_end1 = in1 + elements;
+      int *out = output->data.i32;
+
+      for (; in1 < in_end1; in1++, in2++, out++)
+        *out = ((*in1 - *in2) * (*in1 - *in2));
+
+      return kTfLiteOk;
+    }
+    case kTfLiteInt64:
+    {
+      const int64_t *in1 = input1->data.i64;
+      const int64_t *in2 = input1->data.i64;
+      const int64_t *in_end1 = in1 + elements;
+      int64_t *out = output->data.i64;
+
+      for (; in1 < in_end1; in1++, in2++, out++)
+        *out = ((*in1 - *in2) * (*in1 - *in2));
+
+      return kTfLiteOk;
+    }
+    default:
+    {
+      context->ReportError(context, "InputType is %d Unsupported", input1->type);
+      return kTfLiteError;
+    }
+  }
+}
+
+} // namespace SquaredDifference
+} // namespace custom
+} // namespace tflite
+} // namespace nnfw
diff --git a/runtimes/libs/tflite/src/ext/kernels/TensorFlowMax.cpp b/runtimes/libs/tflite/src/ext/kernels/TensorFlowMax.cpp
new file mode 100644
index 000000000..207de98f5
--- /dev/null
+++ b/runtimes/libs/tflite/src/ext/kernels/TensorFlowMax.cpp
@@ -0,0 +1,405 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "tflite/ext/kernels/TensorFlowMax.h"
+#include "tensorflow/lite/kernels/kernel_util.h"
+
+#include <iostream>
+
+namespace nnfw
+{
+namespace tflite
+{
+namespace custom
+{
+namespace TensorFlowMax
+{
+
+struct TensorFlowMaxOp
+{
+  TensorFlowMaxOp(TfLiteContext *context, TfLiteNode *node)
+  {
+    input = ::tflite::GetInput(context, node, 0);
+    axis = ::tflite::GetInput(context, node, 1);
+    output = ::tflite::GetOutput(context, node, 0);
+  }
+  const TfLiteTensor *input;
+  const TfLiteTensor *axis;
+  TfLiteTensor *output;
+};
+
+void *InitTensorFlowMax(TfLiteContext *context, const char *, size_t)
+{
+  // Creates two temp tensors to store index and axis for internal
+  // implementation only.
+  auto *scratch_tensor_index = new int;
+  context->AddTensors(context, 2, scratch_tensor_index);
+  return scratch_tensor_index;
+}
+
+void FreeTensorFlowMax(TfLiteContext *, void *buffer)
+{
+  delete static_cast<TensorFlowMaxOp *>(buffer);
+}
+
+// Resizes the temp tensor that stores resolved axis.
+TfLiteStatus ResizeTempAxis(TfLiteContext *context, TensorFlowMaxOp *op_context,
+                            TfLiteTensor *resolved_axis)
+{
+  TfLiteIntArray *axis_size = TfLiteIntArrayCreate(1);
+  axis_size->data[0] = static_cast<int>(::tflite::NumElements(op_context->axis));
+  return context->ResizeTensor(context, resolved_axis, axis_size);
+}
+
+// Resizes output array based on the input size and resolved axis.
+TfLiteStatus ResizeOutputTensor(TfLiteContext *context, TensorFlowMaxOp *op_context)
+{
+  int64_t num_axis = ::tflite::NumElements(op_context->axis);
+  TfLiteIntArray *input_dims = op_context->input->dims;
+  int input_num_dims = ::tflite::NumDimensions(op_context->input);
+  const int *axis = op_context->axis->data.i32;
+
+  {
+    // Calculates size of reducing axis.
+    int64_t num_reduce_axis = num_axis;
+    for (int64_t i = 0; i < num_axis; ++i)
+    {
+      int current = axis[i];
+      if (current < 0)
+      {
+        current += input_num_dims;
+      }
+      TF_LITE_ENSURE(context, current >= 0 && current < input_num_dims);
+      for (int64_t j = 0; j < i; ++j)
+      {
+        int previous = axis[j];
+        if (previous < 0)
+        {
+          previous += input_num_dims;
+        }
+        if (current == previous)
+        {
+          --num_reduce_axis;
+          break;
+        }
+      }
+    }
+    // Determines output dimensions.
+    int output_num_dims = ::tflite::NumDimensions(op_context->output);
+    TF_LITE_ENSURE(context, (input_num_dims == output_num_dims) ||
+                                (input_num_dims - num_reduce_axis == output_num_dims));
+
+    if (input_num_dims == output_num_dims)
+    {
+      TfLiteIntArray *output_dims = TfLiteIntArrayCopy(input_dims);
+      for (int64_t axis_idx = 0; axis_idx < num_axis; ++axis_idx)
+      {
+        int current = axis[axis_idx];
+        output_dims->data[current] = 1;
+      }
+      return context->ResizeTensor(context, op_context->output, output_dims);
+    }
+    else
+    {
+      TfLiteIntArray *output_dims = TfLiteIntArrayCreate(output_num_dims);
+      int num_skip_axis = 0;
+      for (int idx = 0; idx < input_num_dims; ++idx)
+      {
+        bool is_axis = false;
+        for (int axis_idx = 0; axis_idx < num_axis; ++axis_idx)
+        {
+          if (axis[axis_idx] == idx || axis[axis_idx] + input_num_dims == idx)
+          {
+            ++num_skip_axis;
+            is_axis = true;
+            break;
+          }
+        }
+        if (!is_axis)
+        {
+          output_dims->data[idx - num_skip_axis] = input_dims->data[idx];
+        }
+      }
+      return context->ResizeTensor(context, op_context->output, output_dims);
+    }
+  }
+}
+
+// Initializes temp tensors to store index and resolved axis.
+TfLiteStatus InitializeTemporaries(TfLiteContext *context, TfLiteNode *node,
+                                   TensorFlowMaxOp *op_context)
+{
+  // Creates a temp index to iterate through input data.
+  int *scratch_tensor_index = reinterpret_cast<int *>(node->user_data);
+  TfLiteIntArrayFree(node->temporaries);
+  node->temporaries = TfLiteIntArrayCreate(2);
+  node->temporaries->data[0] = *scratch_tensor_index;
+  TfLiteTensor *scratch_tensor = &context->tensors[node->temporaries->data[0]];
+  scratch_tensor->type = kTfLiteInt32;
+  scratch_tensor->allocation_type = kTfLiteArenaRw;
+  TfLiteIntArray *index_size = TfLiteIntArrayCreate(1);
+  index_size->data[0] = ::tflite::NumDimensions(op_context->input);
+  TF_LITE_ENSURE_OK(context, context->ResizeTensor(context, scratch_tensor, index_size));
+
+  // Creates a temp tensor to store resolved axis given input data.
+  node->temporaries->data[1] = *scratch_tensor_index + 1;
+  TfLiteTensor *resolved_axis = &context->tensors[node->temporaries->data[1]];
+  resolved_axis->type = kTfLiteInt32;
+  return kTfLiteOk;
+}
+
+TfLiteStatus PrepareTensorFlowMax(TfLiteContext *context, TfLiteNode *node)
+{
+  TF_LITE_ENSURE_EQ(context, ::tflite::NumInputs(node), 2);
+  TF_LITE_ENSURE_EQ(context, ::tflite::NumOutputs(node), 1);
+
+  TensorFlowMaxOp op_context(context, node);
+  TF_LITE_ENSURE_OK(context, InitializeTemporaries(context, node, &op_context));
+
+  TfLiteTensor *resolved_axis = &context->tensors[node->temporaries->data[1]];
+  // Leaves work to Eval if axis is not constant; else resizes output.
+  if (!::tflite::IsConstantTensor(op_context.axis))
+  {
+    ::tflite::SetTensorToDynamic(op_context.output);
+    ::tflite::SetTensorToDynamic(resolved_axis);
+    return kTfLiteOk;
+  }
+  resolved_axis->allocation_type = kTfLiteArenaRw;
+  TF_LITE_ENSURE_OK(context, ResizeTempAxis(context, &op_context, resolved_axis));
+  return ResizeOutputTensor(context, &op_context);
+}
+
+// Gets offset of index if expanded on axis. When expanded, the flattened offset
+// will not change, if the output index changes on the given axis. For example,
+// if you have a 2D tensor and you are expanding to 3D on axis 0,
+// then index (0, 1, 2) and index (1, 1, 2) will map from the same flattened
+// offset.
+inline size_t ExpandedInputOffset(const int num_dims, const int *dims, const int *index,
+                                  const int num_axis, const int *axis)
+{
+  size_t offset = 0;
+  int out_idx = 0;
+  for (int in_idx = 0; in_idx < num_dims; ++in_idx)
+  {
+    // if we need to expand this axis
+    bool is_axis = false;
+    if (axis != nullptr)
+    {
+      for (int axis_idx = 0; axis_idx < num_axis; ++axis_idx)
+      {
+        if (in_idx == axis[axis_idx])
+        {
+          is_axis = true;
+          break;
+        }
+      }
+    }
+    if (!is_axis)
+    {
+      offset = offset * static_cast<size_t>(dims[in_idx]) + static_cast<size_t>(index[out_idx]);
+      out_idx++;
+    }
+    else
+    {
+      offset = offset * static_cast<size_t>(dims[in_idx]);
+    }
+  }
+  return offset;
+}
+
+// Gets offset of index if reducing on axis. When reducing, the flattened offset
+// will not change, if the input index changes on the given axis. For example,
+// if you have a 3D tensor and you are reducing to 2D by eliminating axis 0,
+// then index (0, 1, 2) and index (1, 1, 2) will map to the same flattened
+// offset.
+// TODO(kanlig): uses Dims to represent dimensions.
+inline size_t ReducedOutputOffset(const int num_dims, const int *dims, const int *index,
+                                  const int num_axis, const int *axis)
+{
+  size_t offset = 0;
+  for (int idx = 0; idx < num_dims; ++idx)
+  {
+    // if we need to skip this axis
+    bool is_axis = false;
+    if (axis != nullptr)
+    {
+      for (int axis_idx = 0; axis_idx < num_axis; ++axis_idx)
+      {
+        if (idx == axis[axis_idx])
+        {
+          is_axis = true;
+          break;
+        }
+      }
+    }
+    if (!is_axis)
+    {
+      offset = offset * static_cast<size_t>(dims[idx]) + static_cast<size_t>(index[idx]);
+    }
+  }
+  return offset;
+}
+
+// Gets next index to iterate through a multidimensional array.
+inline bool NextIndex(TfLiteContext *context, const int num_dims, const int *dims, int *current)
+{
+  int carry = 1;
+  for (int idx = num_dims - 1; idx >= 0; --idx)
+  {
+    int current_val = current[idx] + carry;
+    TF_LITE_ENSURE(context, (dims[idx] >= current_val));
+    if (dims[idx] == current_val)
+    {
+      current[idx] = 0;
+    }
+    else
+    {
+      current[idx] = current_val;
+      carry = 0;
+      break;
+    }
+  }
+  return (carry == 0);
+}
+
+template <typename T>
+inline TfLiteStatus
+CustomMax(TfLiteContext *context, T *input_data, const int *input_dims, const int input_num_dims,
+          T *output_data, const int *output_dims, const int output_num_dims, const int *axis,
+          const int num_axis_dimensions, bool /*keep_dims*/, int *temp_index, int *resolved_axis)
+{
+  // resolves axis.
+  int num_resolved_axis = 0;
+  for (int idx = 0; idx < num_axis_dimensions; ++idx)
+  {
+    int current = axis[idx];
+    TF_LITE_ENSURE(context, (current < input_num_dims && current + input_num_dims >= 0));
+    if (current < 0)
+    {
+      current += input_num_dims;
+    }
+    bool is_dup = false;
+    for (int j = 0; j < num_resolved_axis; ++j)
+    {
+      if (resolved_axis[j] == current)
+      {
+        is_dup = true;
+        break;
+      }
+    }
+    if (!is_dup)
+    {
+      resolved_axis[num_resolved_axis++] = current;
+    }
+  }
+
+  TF_LITE_ENSURE(context, (input_num_dims > 0));
+  TF_LITE_ENSURE(context, (input_dims != nullptr));
+  TF_LITE_ENSURE(context, (temp_index != nullptr));
+
+  // resets output data.
+  for (int idx = 0; idx < output_num_dims; ++idx)
+  {
+    temp_index[idx] = 0;
+  }
+  for (bool has_next = true; has_next;
+       has_next = NextIndex(context, output_num_dims, output_dims, temp_index))
+  {
+    size_t output_offset =
+        ReducedOutputOffset(output_num_dims, output_dims, temp_index, 0, nullptr);
+    size_t input_offset = ExpandedInputOffset(input_num_dims, input_dims, temp_index,
+                                              num_resolved_axis, resolved_axis);
+    output_data[output_offset] = input_data[input_offset];
+  }
+
+  // resets temp index.
+  for (int idx = 0; idx < input_num_dims; ++idx)
+  {
+    temp_index[idx] = 0;
+  }
+
+  // iterates through input_data.
+  for (bool has_next = true; has_next;
+       has_next = NextIndex(context, input_num_dims, input_dims, temp_index))
+  {
+    size_t input_offset = ReducedOutputOffset(input_num_dims, input_dims, temp_index, 0, nullptr);
+    size_t output_offset = ReducedOutputOffset(input_num_dims, input_dims, temp_index,
+                                               num_resolved_axis, resolved_axis);
+    if (output_data[output_offset] < input_data[input_offset])
+    {
+      output_data[output_offset] = input_data[input_offset];
+    }
+  }
+
+  return kTfLiteOk;
+}
+
+TfLiteStatus EvalTensorFlowMax(TfLiteContext *context, TfLiteNode *node)
+{
+
+  TensorFlowMaxOp op_context(context, node);
+  int num_axis = static_cast<int>(::tflite::NumElements(op_context.axis));
+  TfLiteTensor *temp_index = &context->tensors[node->temporaries->data[0]];
+  TfLiteTensor *resolved_axis = &context->tensors[node->temporaries->data[1]];
+  // Resize the output tensor if the output tensor is dynamic.
+  if (::tflite::IsDynamicTensor(op_context.output))
+  {
+    TF_LITE_ENSURE_OK(context, ResizeTempAxis(context, &op_context, resolved_axis));
+    TF_LITE_ENSURE_OK(context, ResizeOutputTensor(context, &op_context));
+  }
+
+  TfLiteStatus returnStatus = kTfLiteOk;
+  switch (op_context.input->type)
+  {
+    case kTfLiteFloat32:
+      returnStatus = CustomMax<float>(
+          context, op_context.input->data.f, op_context.input->dims->data,
+          op_context.input->dims->size, op_context.output->data.f, op_context.output->dims->data,
+          op_context.output->dims->size, op_context.axis->data.i32, num_axis, false,
+          temp_index->data.i32, resolved_axis->data.i32);
+      break;
+    case kTfLiteInt32:
+      returnStatus = CustomMax<int>(context, op_context.input->data.i32,
+                                    op_context.input->dims->data, op_context.input->dims->size,
+                                    op_context.output->data.i32, op_context.output->dims->data,
+                                    op_context.output->dims->size, op_context.axis->data.i32,
+                                    num_axis, false, temp_index->data.i32, resolved_axis->data.i32);
+      break;
+    case kTfLiteUInt8:
+      returnStatus = CustomMax<uint8_t>(
+          context, op_context.input->data.uint8, op_context.input->dims->data,
+          op_context.input->dims->size, op_context.output->data.uint8,
+          op_context.output->dims->data, op_context.output->dims->size, op_context.axis->data.i32,
+          num_axis, false, temp_index->data.i32, resolved_axis->data.i32);
+      break;
+    case kTfLiteInt64:
+      returnStatus = CustomMax<int64_t>(
+          context, op_context.input->data.i64, op_context.input->dims->data,
+          op_context.input->dims->size, op_context.output->data.i64, op_context.output->dims->data,
+          op_context.output->dims->size, op_context.axis->data.i32, num_axis, false,
+          temp_index->data.i32, resolved_axis->data.i32);
+      break;
+    default:
+      returnStatus = kTfLiteError;
+  }
+
+  return returnStatus;
+}
+
+} // namespace TensorFlowMax
+} // namespace custom
+} // namespace tflite
+} // namespace nnfw
diff --git a/runtimes/libs/tflite/src/ext/kernels/TensorFlowSum.cpp b/runtimes/libs/tflite/src/ext/kernels/TensorFlowSum.cpp
new file mode 100644
index 000000000..40f266baa
--- /dev/null
+++ b/runtimes/libs/tflite/src/ext/kernels/TensorFlowSum.cpp
@@ -0,0 +1,400 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "tflite/ext/kernels/TensorFlowSum.h"
+#include "tensorflow/lite/kernels/kernel_util.h"
+
+#include <iostream>
+
+namespace nnfw
+{
+namespace tflite
+{
+namespace custom
+{
+namespace TensorFlowSum
+{
+
+struct TensorFlowSumOp
+{
+  TensorFlowSumOp(TfLiteContext *context, TfLiteNode *node)
+  {
+    input = ::tflite::GetInput(context, node, 0);
+    axis = ::tflite::GetInput(context, node, 1);
+    output = ::tflite::GetOutput(context, node, 0);
+  }
+  const TfLiteTensor *input;
+  const TfLiteTensor *axis;
+  TfLiteTensor *output;
+};
+
+void *InitTensorFlowSum(TfLiteContext *context, const char *, size_t)
+{
+  // Creates two temp tensors to store index and axis for internal
+  // implementation only.
+  auto *scratch_tensor_index = new int;
+  context->AddTensors(context, 2, scratch_tensor_index);
+  return scratch_tensor_index;
+}
+
+void FreeTensorFlowSum(TfLiteContext *, void *buffer)
+{
+  delete static_cast<TensorFlowSumOp *>(buffer);
+}
+
+// Resizes the temp tensor that stores resolved axis.
+TfLiteStatus ResizeTempAxis(TfLiteContext *context, TensorFlowSumOp *op_context,
+                            TfLiteTensor *resolved_axis)
+{
+  TfLiteIntArray *axis_size = TfLiteIntArrayCreate(1);
+  axis_size->data[0] = static_cast<int>(::tflite::NumElements(op_context->axis));
+  return context->ResizeTensor(context, resolved_axis, axis_size);
+}
+
+// Resizes output array based on the input size and resolved axis.
+TfLiteStatus ResizeOutputTensor(TfLiteContext *context, TensorFlowSumOp *op_context)
+{
+  int64_t num_axis = ::tflite::NumElements(op_context->axis);
+  TfLiteIntArray *input_dims = op_context->input->dims;
+  int input_num_dims = ::tflite::NumDimensions(op_context->input);
+  const int *axis = op_context->axis->data.i32;
+
+  {
+    // Calculates size of reducing axis.
+    int64_t num_reduce_axis = num_axis;
+    for (int64_t i = 0; i < num_axis; ++i)
+    {
+      int current = axis[i];
+      if (current < 0)
+      {
+        current += input_num_dims;
+      }
+      TF_LITE_ENSURE(context, current >= 0 && current < input_num_dims);
+      for (int64_t j = 0; j < i; ++j)
+      {
+        int previous = axis[j];
+        if (previous < 0)
+        {
+          previous += input_num_dims;
+        }
+        if (current == previous)
+        {
+          --num_reduce_axis;
+          break;
+        }
+      }
+    }
+    // Determines output dimensions.
+    int output_num_dims = ::tflite::NumDimensions(op_context->output);
+    TF_LITE_ENSURE(context, (input_num_dims == output_num_dims) ||
+                                (input_num_dims - num_reduce_axis == output_num_dims));
+
+    if (input_num_dims == output_num_dims)
+    {
+      TfLiteIntArray *output_dims = TfLiteIntArrayCopy(input_dims);
+      for (int64_t axis_idx = 0; axis_idx < num_axis; ++axis_idx)
+      {
+        int current = axis[axis_idx];
+        output_dims->data[current] = 1;
+      }
+      return context->ResizeTensor(context, op_context->output, output_dims);
+    }
+    else
+    {
+      TfLiteIntArray *output_dims = TfLiteIntArrayCreate(output_num_dims);
+      int num_skip_axis = 0;
+      for (int idx = 0; idx < input_num_dims; ++idx)
+      {
+        bool is_axis = false;
+        for (int axis_idx = 0; axis_idx < num_axis; ++axis_idx)
+        {
+          if (axis[axis_idx] == idx || axis[axis_idx] + input_num_dims == idx)
+          {
+            ++num_skip_axis;
+            is_axis = true;
+            break;
+          }
+        }
+        if (!is_axis)
+        {
+          output_dims->data[idx - num_skip_axis] = input_dims->data[idx];
+        }
+      }
+      return context->ResizeTensor(context, op_context->output, output_dims);
+    }
+  }
+}
+
+// Initializes temp tensors to store index and resolved axis.
+TfLiteStatus InitializeTemporaries(TfLiteContext *context, TfLiteNode *node,
+                                   TensorFlowSumOp *op_context)
+{
+  // Creates a temp index to iterate through input data.
+  int *scratch_tensor_index = reinterpret_cast<int *>(node->user_data);
+  TfLiteIntArrayFree(node->temporaries);
+  node->temporaries = TfLiteIntArrayCreate(2);
+  node->temporaries->data[0] = *scratch_tensor_index;
+  TfLiteTensor *scratch_tensor = &context->tensors[node->temporaries->data[0]];
+  scratch_tensor->type = kTfLiteInt32;
+  scratch_tensor->allocation_type = kTfLiteArenaRw;
+  TfLiteIntArray *index_size = TfLiteIntArrayCreate(1);
+  index_size->data[0] = ::tflite::NumDimensions(op_context->input);
+  TF_LITE_ENSURE_OK(context, context->ResizeTensor(context, scratch_tensor, index_size));
+
+  // Creates a temp tensor to store resolved axis given input data.
+  node->temporaries->data[1] = *scratch_tensor_index + 1;
+  TfLiteTensor *resolved_axis = &context->tensors[node->temporaries->data[1]];
+  resolved_axis->type = kTfLiteInt32;
+  return kTfLiteOk;
+}
+
+TfLiteStatus PrepareTensorFlowSum(TfLiteContext *context, TfLiteNode *node)
+{
+  TF_LITE_ENSURE_EQ(context, ::tflite::NumInputs(node), 2);
+  TF_LITE_ENSURE_EQ(context, ::tflite::NumOutputs(node), 1);
+
+  TensorFlowSumOp op_context(context, node);
+  TF_LITE_ENSURE_OK(context, InitializeTemporaries(context, node, &op_context));
+
+  TfLiteTensor *resolved_axis = &context->tensors[node->temporaries->data[1]];
+  // Leaves work to Eval if axis is not constant; else resizes output.
+  if (!::tflite::IsConstantTensor(op_context.axis))
+  {
+    ::tflite::SetTensorToDynamic(op_context.output);
+    ::tflite::SetTensorToDynamic(resolved_axis);
+    return kTfLiteOk;
+  }
+  resolved_axis->allocation_type = kTfLiteArenaRw;
+  TF_LITE_ENSURE_OK(context, ResizeTempAxis(context, &op_context, resolved_axis));
+  return ResizeOutputTensor(context, &op_context);
+}
+
+// Gets offset of index if expanded on axis. When expanded, the flattened offset
+// will not change, if the output index changes on the given axis. For example,
+// if you have a 2D tensor and you are expanding to 3D on axis 0,
+// then index (0, 1, 2) and index (1, 1, 2) will map from the same flattened
+// offset.
+inline size_t ExpandedInputOffset(const int num_dims, const int *dims, const int *index,
+                                  const int num_axis, const int *axis)
+{
+  size_t offset = 0;
+  int out_idx = 0;
+  for (int in_idx = 0; in_idx < num_dims; ++in_idx)
+  {
+    // if we need to expand this axis
+    bool is_axis = false;
+    if (axis != nullptr)
+    {
+      for (int axis_idx = 0; axis_idx < num_axis; ++axis_idx)
+      {
+        if (in_idx == axis[axis_idx])
+        {
+          is_axis = true;
+          break;
+        }
+      }
+    }
+    if (!is_axis)
+    {
+      offset = offset * static_cast<size_t>(dims[in_idx]) + static_cast<size_t>(index[out_idx]);
+      out_idx++;
+    }
+    else
+    {
+      offset = offset * static_cast<size_t>(dims[in_idx]);
+    }
+  }
+  return offset;
+}
+
+// Gets offset of index if reducing on axis. When reducing, the flattened offset
+// will not change, if the input index changes on the given axis. For example,
+// if you have a 3D tensor and you are reducing to 2D by eliminating axis 0,
+// then index (0, 1, 2) and index (1, 1, 2) will map to the same flattened
+// offset.
+// TODO(kanlig): uses Dims to represent dimensions.
+inline size_t ReducedOutputOffset(const int num_dims, const int *dims, const int *index,
+                                  const int num_axis, const int *axis)
+{
+  size_t offset = 0;
+  for (int idx = 0; idx < num_dims; ++idx)
+  {
+    // if we need to skip this axis
+    bool is_axis = false;
+    if (axis != nullptr)
+    {
+      for (int axis_idx = 0; axis_idx < num_axis; ++axis_idx)
+      {
+        if (idx == axis[axis_idx])
+        {
+          is_axis = true;
+          break;
+        }
+      }
+    }
+    if (!is_axis)
+    {
+      offset = offset * static_cast<size_t>(dims[idx]) + static_cast<size_t>(index[idx]);
+    }
+  }
+  return offset;
+}
+
+// Gets next index to iterate through a multidimensional array.
+inline bool NextIndex(TfLiteContext *context, const int num_dims, const int *dims, int *current)
+{
+  int carry = 1;
+  for (int idx = num_dims - 1; idx >= 0; --idx)
+  {
+    int current_val = current[idx] + carry;
+    TF_LITE_ENSURE(context, (dims[idx] >= current_val));
+    if (dims[idx] == current_val)
+    {
+      current[idx] = 0;
+    }
+    else
+    {
+      current[idx] = current_val;
+      carry = 0;
+      break;
+    }
+  }
+  return (carry == 0);
+}
+
+template <typename T>
+inline TfLiteStatus
+CustomSum(TfLiteContext *context, T *input_data, const int *input_dims, const int input_num_dims,
+          T *output_data, const int *output_dims, const int output_num_dims, const int *axis,
+          const int num_axis_dimensions, bool /*keep_dims*/, int *temp_index, int *resolved_axis)
+{
+  // resolves axis.
+  int num_resolved_axis = 0;
+  for (int idx = 0; idx < num_axis_dimensions; ++idx)
+  {
+    int current = axis[idx];
+    TF_LITE_ENSURE(context, (current < input_num_dims && current + input_num_dims >= 0));
+    if (current < 0)
+    {
+      current += input_num_dims;
+    }
+    bool is_dup = false;
+    for (int j = 0; j < num_resolved_axis; ++j)
+    {
+      if (resolved_axis[j] == current)
+      {
+        is_dup = true;
+        break;
+      }
+    }
+    if (!is_dup)
+    {
+      resolved_axis[num_resolved_axis++] = current;
+    }
+  }
+
+  TF_LITE_ENSURE(context, (input_num_dims > 0));
+  TF_LITE_ENSURE(context, (input_dims != nullptr));
+  TF_LITE_ENSURE(context, (temp_index != nullptr));
+
+  // resets output data.
+  for (int idx = 0; idx < output_num_dims; ++idx)
+  {
+    temp_index[idx] = 0;
+  }
+  for (bool has_next = true; has_next;
+       has_next = NextIndex(context, output_num_dims, output_dims, temp_index))
+  {
+    size_t output_offset =
+        ReducedOutputOffset(output_num_dims, output_dims, temp_index, 0, nullptr);
+    output_data[output_offset] = 0;
+  }
+
+  // resets temp index.
+  for (int idx = 0; idx < input_num_dims; ++idx)
+  {
+    temp_index[idx] = 0;
+  }
+
+  // iterates through input_data.
+  for (bool has_next = true; has_next;
+       has_next = NextIndex(context, input_num_dims, input_dims, temp_index))
+  {
+    size_t input_offset = ReducedOutputOffset(input_num_dims, input_dims, temp_index, 0, nullptr);
+    size_t output_offset = ReducedOutputOffset(input_num_dims, input_dims, temp_index,
+                                               num_resolved_axis, resolved_axis);
+    output_data[output_offset] += input_data[input_offset];
+  }
+
+  return kTfLiteOk;
+}
+
+TfLiteStatus EvalTensorFlowSum(TfLiteContext *context, TfLiteNode *node)
+{
+
+  TensorFlowSumOp op_context(context, node);
+  int num_axis = static_cast<int>(::tflite::NumElements(op_context.axis));
+  TfLiteTensor *temp_index = &context->tensors[node->temporaries->data[0]];
+  TfLiteTensor *resolved_axis = &context->tensors[node->temporaries->data[1]];
+  // Resize the output tensor if the output tensor is dynamic.
+  if (::tflite::IsDynamicTensor(op_context.output))
+  {
+    TF_LITE_ENSURE_OK(context, ResizeTempAxis(context, &op_context, resolved_axis));
+    TF_LITE_ENSURE_OK(context, ResizeOutputTensor(context, &op_context));
+  }
+
+  TfLiteStatus returnStatus = kTfLiteOk;
+  switch (op_context.input->type)
+  {
+    case kTfLiteFloat32:
+      returnStatus = CustomSum<float>(
+          context, op_context.input->data.f, op_context.input->dims->data,
+          op_context.input->dims->size, op_context.output->data.f, op_context.output->dims->data,
+          op_context.output->dims->size, op_context.axis->data.i32, num_axis, false,
+          temp_index->data.i32, resolved_axis->data.i32);
+      break;
+    case kTfLiteInt32:
+      returnStatus = CustomSum<int>(context, op_context.input->data.i32,
+                                    op_context.input->dims->data, op_context.input->dims->size,
+                                    op_context.output->data.i32, op_context.output->dims->data,
+                                    op_context.output->dims->size, op_context.axis->data.i32,
+                                    num_axis, false, temp_index->data.i32, resolved_axis->data.i32);
+      break;
+    case kTfLiteUInt8:
+      returnStatus = CustomSum<uint8_t>(
+          context, op_context.input->data.uint8, op_context.input->dims->data,
+          op_context.input->dims->size, op_context.output->data.uint8,
+          op_context.output->dims->data, op_context.output->dims->size, op_context.axis->data.i32,
+          num_axis, false, temp_index->data.i32, resolved_axis->data.i32);
+      break;
+    case kTfLiteInt64:
+      returnStatus = CustomSum<int64_t>(
+          context, op_context.input->data.i64, op_context.input->dims->data,
+          op_context.input->dims->size, op_context.output->data.i64, op_context.output->dims->data,
+          op_context.output->dims->size, op_context.axis->data.i32, num_axis, false,
+          temp_index->data.i32, resolved_axis->data.i32);
+      break;
+    default:
+      returnStatus = kTfLiteError;
+  }
+
+  return returnStatus;
+}
+
+} // namespace TensorFlowSum
+} // namespace custom
+} // namespace tflite
+} // namespace nnfw
diff --git a/runtimes/libs/tflite/src/ext/kernels/register.cpp b/runtimes/libs/tflite/src/ext/kernels/register.cpp
new file mode 100644
index 000000000..a99899a80
--- /dev/null
+++ b/runtimes/libs/tflite/src/ext/kernels/register.cpp
@@ -0,0 +1,247 @@
+/* Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+   Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+==============================================================================*/
+
+// NOTE To minimize diff with upstream tensorflow, disable clang-format
+// clang-format off
+
+// NOTE This code is derived from the following file (in TensorFlow)
+//        'externals/tensorflow/tensorflow/lite/kernels/register.cc'
+#include "tflite/ext/kernels/register.h"
+#include "tflite/ext/kernels/CustomOps.h"
+
+namespace tflite {
+namespace ops {
+namespace custom {
+
+TfLiteRegistration* Register_DETECTION_POSTPROCESS();
+
+}  // namespace custom
+}
+}
+
+namespace tflite {
+namespace ops {
+namespace builtin {
+
+TfLiteRegistration *Register_RELU();
+TfLiteRegistration *Register_RELU_N1_TO_1();
+TfLiteRegistration *Register_RELU6();
+TfLiteRegistration *Register_TANH();
+TfLiteRegistration *Register_LOGISTIC();
+TfLiteRegistration *Register_AVERAGE_POOL_2D();
+TfLiteRegistration *Register_MAX_POOL_2D();
+TfLiteRegistration *Register_L2_POOL_2D();
+TfLiteRegistration *Register_CONV_2D();
+TfLiteRegistration *Register_DEPTHWISE_CONV_2D();
+TfLiteRegistration *Register_SVDF();
+TfLiteRegistration *Register_RNN();
+TfLiteRegistration *Register_BIDIRECTIONAL_SEQUENCE_RNN();
+TfLiteRegistration *Register_UNIDIRECTIONAL_SEQUENCE_RNN();
+TfLiteRegistration *Register_EMBEDDING_LOOKUP();
+TfLiteRegistration *Register_EMBEDDING_LOOKUP_SPARSE();
+TfLiteRegistration *Register_FULLY_CONNECTED();
+TfLiteRegistration *Register_LSH_PROJECTION();
+TfLiteRegistration *Register_HASHTABLE_LOOKUP();
+TfLiteRegistration *Register_SOFTMAX();
+TfLiteRegistration *Register_CONCATENATION();
+TfLiteRegistration *Register_ADD();
+TfLiteRegistration *Register_SPACE_TO_BATCH_ND();
+TfLiteRegistration *Register_DIV();
+TfLiteRegistration *Register_SUB();
+TfLiteRegistration *Register_BATCH_TO_SPACE_ND();
+TfLiteRegistration *Register_MUL();
+TfLiteRegistration *Register_L2_NORMALIZATION();
+TfLiteRegistration *Register_LOCAL_RESPONSE_NORMALIZATION();
+TfLiteRegistration *Register_LSTM();
+TfLiteRegistration *Register_BIDIRECTIONAL_SEQUENCE_LSTM();
+TfLiteRegistration *Register_UNIDIRECTIONAL_SEQUENCE_LSTM();
+TfLiteRegistration *Register_PAD();
+TfLiteRegistration *Register_PADV2();
+TfLiteRegistration *Register_RESHAPE();
+TfLiteRegistration *Register_RESIZE_BILINEAR();
+TfLiteRegistration *Register_SKIP_GRAM();
+TfLiteRegistration *Register_SPACE_TO_DEPTH();
+TfLiteRegistration *Register_GATHER();
+TfLiteRegistration *Register_TRANSPOSE();
+TfLiteRegistration *Register_MEAN();
+TfLiteRegistration *Register_SPLIT();
+TfLiteRegistration *Register_SQUEEZE();
+TfLiteRegistration *Register_STRIDED_SLICE();
+TfLiteRegistration *Register_EXP();
+TfLiteRegistration *Register_TOPK_V2();
+TfLiteRegistration *Register_LOG_SOFTMAX();
+TfLiteRegistration *Register_CAST();
+TfLiteRegistration *Register_DEQUANTIZE();
+TfLiteRegistration *Register_PRELU();
+TfLiteRegistration *Register_MAXIMUM();
+TfLiteRegistration *Register_MINIMUM();
+TfLiteRegistration *Register_ARG_MAX();
+TfLiteRegistration *Register_GREATER();
+TfLiteRegistration *Register_GREATER_EQUAL();
+TfLiteRegistration *Register_LESS();
+TfLiteRegistration *Register_LESS_EQUAL();
+TfLiteRegistration *Register_FLOOR();
+TfLiteRegistration *Register_NEG();
+TfLiteRegistration *Register_SELECT();
+TfLiteRegistration *Register_SLICE();
+TfLiteRegistration *Register_SIN();
+TfLiteRegistration *Register_TRANSPOSE_CONV();
+TfLiteRegistration *Register_SPARSE_TO_DENSE();
+#if TFLITE_MAJOR_VER == 1 && TFLITE_MINOR_VER == 13
+TfLiteRegistration *Register_SUM();
+TfLiteRegistration *Register_REDUCE_MAX();
+TfLiteRegistration *Register_REDUCE_MIN();
+TfLiteRegistration *Register_EQUAL();
+TfLiteRegistration *Register_NOT_EQUAL();
+TfLiteRegistration *Register_SQRT();
+TfLiteRegistration *Register_RSQRT();
+TfLiteRegistration *Register_SHAPE();
+TfLiteRegistration *Register_POW();
+TfLiteRegistration *Register_FAKE_QUANT();
+TfLiteRegistration *Register_PACK();
+TfLiteRegistration *Register_ONE_HOT();
+TfLiteRegistration *Register_LOGICAL_OR();
+TfLiteRegistration *Register_LOGICAL_AND();
+TfLiteRegistration *Register_LOGICAL_NOT();
+TfLiteRegistration *Register_UNPACK();
+TfLiteRegistration *Register_FLOOR_DIV();
+TfLiteRegistration *Register_SQUARE();
+TfLiteRegistration *Register_ZEROS_LIKE();
+TfLiteRegistration* Register_FLOOR_MOD();
+TfLiteRegistration* Register_RANGE();
+TfLiteRegistration* Register_LEAKY_RELU();
+TfLiteRegistration* Register_SQUARED_DIFFERENCE();
+TfLiteRegistration* Register_FILL();
+TfLiteRegistration* Register_MIRROR_PAD();
+#endif // TFLITE_MAJOR_VER == 1 && TFLITE_MINOR_VER == 12
+
+}  // namespace builtin
+}  // namespace ops
+}  // namespace tflite
+
+namespace nnfw {
+namespace tflite {
+
+BuiltinOpResolver::BuiltinOpResolver()
+{
+  // Using namespace directive to minimize diff with upstream tensorflow
+  using namespace ::tflite::ops::custom;
+  using namespace ::tflite::ops::builtin;
+  using namespace ::tflite;
+
+  AddBuiltin(BuiltinOperator_RELU, Register_RELU());
+  AddBuiltin(BuiltinOperator_RELU_N1_TO_1, Register_RELU_N1_TO_1());
+  AddBuiltin(BuiltinOperator_RELU6, Register_RELU6());
+  AddBuiltin(BuiltinOperator_TANH, Register_TANH());
+  AddBuiltin(BuiltinOperator_LOGISTIC, Register_LOGISTIC());
+  AddBuiltin(BuiltinOperator_AVERAGE_POOL_2D, Register_AVERAGE_POOL_2D());
+  AddBuiltin(BuiltinOperator_MAX_POOL_2D, Register_MAX_POOL_2D());
+  AddBuiltin(BuiltinOperator_L2_POOL_2D, Register_L2_POOL_2D());
+  AddBuiltin(BuiltinOperator_CONV_2D, Register_CONV_2D());
+  AddBuiltin(BuiltinOperator_DEPTHWISE_CONV_2D, Register_DEPTHWISE_CONV_2D());
+  AddBuiltin(BuiltinOperator_SVDF, Register_SVDF());
+  AddBuiltin(BuiltinOperator_RNN, Register_RNN());
+  AddBuiltin(BuiltinOperator_BIDIRECTIONAL_SEQUENCE_RNN, Register_BIDIRECTIONAL_SEQUENCE_RNN());
+  AddBuiltin(BuiltinOperator_UNIDIRECTIONAL_SEQUENCE_RNN, Register_UNIDIRECTIONAL_SEQUENCE_RNN());
+  AddBuiltin(BuiltinOperator_EMBEDDING_LOOKUP, Register_EMBEDDING_LOOKUP());
+  AddBuiltin(BuiltinOperator_EMBEDDING_LOOKUP_SPARSE, Register_EMBEDDING_LOOKUP_SPARSE());
+  AddBuiltin(BuiltinOperator_FULLY_CONNECTED, Register_FULLY_CONNECTED());
+  AddBuiltin(BuiltinOperator_LSH_PROJECTION, Register_LSH_PROJECTION());
+  AddBuiltin(BuiltinOperator_HASHTABLE_LOOKUP, Register_HASHTABLE_LOOKUP());
+  AddBuiltin(BuiltinOperator_SOFTMAX, Register_SOFTMAX());
+  AddBuiltin(BuiltinOperator_CONCATENATION, Register_CONCATENATION());
+  AddBuiltin(BuiltinOperator_ADD, Register_ADD());
+  AddBuiltin(BuiltinOperator_SPACE_TO_BATCH_ND, Register_SPACE_TO_BATCH_ND());
+  AddBuiltin(BuiltinOperator_BATCH_TO_SPACE_ND, Register_BATCH_TO_SPACE_ND());
+  AddBuiltin(BuiltinOperator_MUL, Register_MUL());
+  AddBuiltin(BuiltinOperator_L2_NORMALIZATION, Register_L2_NORMALIZATION());
+  AddBuiltin(BuiltinOperator_LOCAL_RESPONSE_NORMALIZATION, Register_LOCAL_RESPONSE_NORMALIZATION());
+  AddBuiltin(BuiltinOperator_LSTM, Register_LSTM());
+  AddBuiltin(BuiltinOperator_BIDIRECTIONAL_SEQUENCE_LSTM, Register_BIDIRECTIONAL_SEQUENCE_LSTM());
+  AddBuiltin(BuiltinOperator_UNIDIRECTIONAL_SEQUENCE_LSTM, Register_UNIDIRECTIONAL_SEQUENCE_LSTM());
+  AddBuiltin(BuiltinOperator_PAD, Register_PAD());
+  AddBuiltin(BuiltinOperator_PADV2, Register_PADV2());
+  AddBuiltin(BuiltinOperator_RESHAPE, Register_RESHAPE());
+  AddBuiltin(BuiltinOperator_RESIZE_BILINEAR, Register_RESIZE_BILINEAR());
+  AddBuiltin(BuiltinOperator_SKIP_GRAM, Register_SKIP_GRAM());
+  AddBuiltin(BuiltinOperator_SPACE_TO_DEPTH, Register_SPACE_TO_DEPTH());
+  AddBuiltin(BuiltinOperator_GATHER, Register_GATHER());
+  AddBuiltin(BuiltinOperator_TRANSPOSE, Register_TRANSPOSE());
+  AddBuiltin(BuiltinOperator_MEAN, Register_MEAN());
+  AddBuiltin(BuiltinOperator_DIV, Register_DIV());
+  AddBuiltin(BuiltinOperator_SUB, Register_SUB());
+  AddBuiltin(BuiltinOperator_SPLIT, Register_SPLIT());
+  AddBuiltin(BuiltinOperator_SQUEEZE, Register_SQUEEZE());
+  AddBuiltin(BuiltinOperator_STRIDED_SLICE, Register_STRIDED_SLICE());
+  AddBuiltin(BuiltinOperator_EXP, Register_EXP());
+  AddBuiltin(BuiltinOperator_TOPK_V2, Register_TOPK_V2());
+  AddBuiltin(BuiltinOperator_LOG_SOFTMAX, Register_LOG_SOFTMAX());
+  AddBuiltin(BuiltinOperator_CAST, Register_CAST());
+  AddBuiltin(BuiltinOperator_DEQUANTIZE, Register_DEQUANTIZE());
+  AddBuiltin(BuiltinOperator_PRELU, Register_PRELU());
+  AddBuiltin(BuiltinOperator_MAXIMUM, Register_MAXIMUM());
+  AddBuiltin(BuiltinOperator_MINIMUM, Register_MINIMUM());
+  AddBuiltin(BuiltinOperator_ARG_MAX, Register_ARG_MAX());
+  AddBuiltin(BuiltinOperator_GREATER, Register_GREATER());
+  AddBuiltin(BuiltinOperator_GREATER_EQUAL, Register_GREATER_EQUAL());
+  AddBuiltin(BuiltinOperator_LESS, Register_LESS());
+  AddBuiltin(BuiltinOperator_LESS_EQUAL, Register_LESS_EQUAL());
+  AddBuiltin(BuiltinOperator_FLOOR, Register_FLOOR());
+  AddBuiltin(BuiltinOperator_NEG, Register_NEG());
+  AddBuiltin(BuiltinOperator_SELECT, Register_SELECT());
+  AddBuiltin(BuiltinOperator_SLICE, Register_SLICE());
+  AddBuiltin(BuiltinOperator_SIN, Register_SIN());
+#if TFLITE_MAJOR_VER == 1 && TFLITE_MINOR_VER == 13
+  AddBuiltin(BuiltinOperator_SUM, Register_SUM());
+  AddBuiltin(BuiltinOperator_REDUCE_MAX, Register_REDUCE_MAX());
+  AddBuiltin(BuiltinOperator_REDUCE_MIN, Register_REDUCE_MIN());
+  AddBuiltin(BuiltinOperator_TRANSPOSE_CONV, Register_TRANSPOSE_CONV());
+  AddBuiltin(BuiltinOperator_SPARSE_TO_DENSE, Register_SPARSE_TO_DENSE());
+  AddBuiltin(BuiltinOperator_EQUAL, Register_EQUAL());
+  AddBuiltin(BuiltinOperator_NOT_EQUAL, Register_NOT_EQUAL());
+  AddBuiltin(BuiltinOperator_SQRT, Register_SQRT());
+  AddBuiltin(BuiltinOperator_RSQRT, Register_RSQRT());
+  AddBuiltin(BuiltinOperator_SHAPE, Register_SHAPE());
+  AddBuiltin(BuiltinOperator_POW, Register_POW());
+  AddBuiltin(BuiltinOperator_FAKE_QUANT, Register_FAKE_QUANT(), 1, 2);
+  AddBuiltin(BuiltinOperator_PACK, Register_PACK());
+  AddBuiltin(BuiltinOperator_ONE_HOT, Register_ONE_HOT());
+  AddBuiltin(BuiltinOperator_LOGICAL_OR, Register_LOGICAL_OR());
+  AddBuiltin(BuiltinOperator_LOGICAL_AND, Register_LOGICAL_AND());
+  AddBuiltin(BuiltinOperator_LOGICAL_NOT, Register_LOGICAL_NOT());
+  AddBuiltin(BuiltinOperator_UNPACK, Register_UNPACK());
+  AddBuiltin(BuiltinOperator_FLOOR_DIV, Register_FLOOR_DIV());
+  AddBuiltin(BuiltinOperator_SQUARE, Register_SQUARE());
+  AddBuiltin(BuiltinOperator_ZEROS_LIKE, Register_ZEROS_LIKE());
+  AddBuiltin(BuiltinOperator_FLOOR_MOD, Register_FLOOR_MOD());
+  AddBuiltin(BuiltinOperator_RANGE, Register_RANGE());
+  AddBuiltin(BuiltinOperator_LEAKY_RELU, Register_LEAKY_RELU());
+  AddBuiltin(BuiltinOperator_SQUARED_DIFFERENCE, Register_SQUARED_DIFFERENCE());
+  AddBuiltin(BuiltinOperator_FILL, Register_FILL());
+  AddBuiltin(BuiltinOperator_MIRROR_PAD, Register_MIRROR_PAD());
+#endif // TFLITE_MAJOR_VER == 1 && TFLITE_MINOR_VER == 13
+
+  AddCustom("TensorFlowMax", nnfw::tflite::custom::Register_TensorFlowMax());
+  AddCustom("SquaredDifference", nnfw::tflite::custom::Register_SquaredDifference());
+  AddCustom("TensorFlowSum", nnfw::tflite::custom::Register_TensorFlowSum());
+  AddCustom("Abs", nnfw::tflite::custom::Register_Abs());
+  AddCustom("TFLite_Detection_PostProcess",
+            ::tflite::ops::custom::Register_DETECTION_POSTPROCESS());
+
+}
+
+}  // namespace tflite
+}  // namespace nnfw
diff --git a/runtimes/libs/tflite/src/ext/nnapi_delegate.cpp b/runtimes/libs/tflite/src/ext/nnapi_delegate.cpp
new file mode 100644
index 000000000..55bdb0cd5
--- /dev/null
+++ b/runtimes/libs/tflite/src/ext/nnapi_delegate.cpp
@@ -0,0 +1,1238 @@
+/* Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+   Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+==============================================================================*/
+
+// NOTE To minimize diff with upstream tensorflow, disable clang-format
+// clang-format off
+
+// NOTE This code is derived from the following file (in TensorFlow v1.12)
+//        'externals/tensorflow/tensorflow/lite/nnapi_delegate.cc'
+#include "tflite/ext/nnapi_delegate.h"
+#include <fcntl.h>
+#include <sys/mman.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#if TFLITE_MAJOR_VER == 1 && TFLITE_MINOR_VER == 9
+#include "tensorflow/lite/builtin_op_data.h"
+#include "tensorflow/lite/error_reporter.h"
+#else
+#include "tensorflow/lite/c/builtin_op_data.h"
+#include "tensorflow/lite/core/api/error_reporter.h"
+#endif
+#include "tensorflow/lite/model.h"
+#include <rua/Shim.h>
+#include "NeuralNetworksExShim.h"
+
+#ifdef __ANDROID__
+#include <android/log.h>
+#include <sys/system_properties.h>
+#endif
+
+namespace nnfw {
+namespace tflite {
+
+void logError(const char* format, ...) {
+  // stderr is convenient for native tests, but is not captured for apps
+  va_list args_for_stderr;
+  va_start(args_for_stderr, format);
+  vfprintf(stderr, format, args_for_stderr);
+  va_end(args_for_stderr);
+  fprintf(stderr, "\n");
+  fflush(stderr);
+#ifdef __ANDROID__
+  // produce logcat output for general consumption
+  va_list args_for_log;
+  va_start(args_for_log, format);
+  __android_log_vprint(ANDROID_LOG_ERROR, "tflite", format, args_for_log);
+  va_end(args_for_log);
+#endif
+}
+
+#define FATAL(...)       \
+  logError(__VA_ARGS__); \
+  exit(1);
+
+// TODO(aselle): Change the error model to use status codes.
+#define CHECK_TFLITE_SUCCESS(x)                                           \
+  if (x != kTfLiteOk) {                                                   \
+    FATAL("Aborting since tflite returned failure nnapi_delegate.cc:%d.", \
+          __LINE__);                                                      \
+  }
+
+#define CHECK_NN(x)                                                     \
+  if (x != ANEURALNETWORKS_NO_ERROR) {                                  \
+    FATAL("Aborting since NNAPI returned failure nnapi_delegate.cc:%d", \
+          __LINE__);                                                    \
+  }
+
+#define RETURN_ERROR_IF_TFLITE_FAILED(x)                                       \
+  if (x != kTfLiteOk) {                                                        \
+    logError(                                                                  \
+        "Returning error since TFLite returned failure nnapi_delegate.cc:%d.", \
+        __LINE__);                                                             \
+    return kTfLiteError;                                                       \
+  }
+
+#define RETURN_ERROR_IF_NN_FAILED(x)                                          \
+  if (x != ANEURALNETWORKS_NO_ERROR) {                                        \
+    logError(                                                                 \
+        "Returning error since NNAPI returned failure nnapi_delegate.cc:%d.", \
+        __LINE__);                                                            \
+    return kTfLiteError;                                                      \
+  }
+
+// Tracking of NNAPI operand ids
+static const int64_t kOperandIdNotSet = -1;
+static const int64_t kOperandNotNeeded = -2;
+
+namespace {
+
+int32_t GetAndroidSdkVersion() {
+#ifdef __ANDROID__
+  const char* sdkProp = "ro.build.version.sdk";
+  char sdkVersion[PROP_VALUE_MAX];
+  int length = __system_property_get(sdkProp, sdkVersion);
+  if (length != 0) {
+    for (int i = 0; i < length; ++i) {
+      int digit = sdkVersion[i] - '0';
+      if (digit < 0 || digit > 9) {
+        // Non-numeric SDK version, assume it's higher then expected;
+        return 0xFFFF;
+      }
+    }
+    return std::strtol(sdkVersion, NULL, 0);
+  }
+  FATAL("No %s prop", sdkProp);
+#endif  // __ANDROID__
+  return 0;
+}
+
+int32_t GetAndroidSdkVersionCached() {
+  static int32_t androidSdkVersion = GetAndroidSdkVersion();
+  return androidSdkVersion;
+}
+
+static const uint32_t dimension_for_scalar[1] = {1};
+
+}  // namespace
+
+NNAPIAllocation::NNAPIAllocation(const char* filename,
+                                 ::tflite::ErrorReporter* error_reporter)
+    : MMAPAllocation(filename, error_reporter) {
+  if (mmapped_buffer_ != MAP_FAILED)
+    CHECK_NN(ANeuralNetworksMemory_createFromFd(buffer_size_bytes_, PROT_READ,
+                                                mmap_fd_, 0, &handle_));
+}
+
+NNAPIAllocation::~NNAPIAllocation() {
+  if (handle_) {
+    ANeuralNetworksMemory_free(handle_);
+  }
+}
+
+NNAPIDelegate::~NNAPIDelegate() {
+  if (nn_compiled_model_) {
+    ANeuralNetworksCompilation_free(nn_compiled_model_);
+    nn_compiled_model_ = nullptr;
+  }
+  if (nn_model_) {
+    ANeuralNetworksModel_free(nn_model_);
+    nn_model_ = nullptr;
+    // TODO(aselle): Is this thread-safe and callable multiple times?
+  }
+  // ANeuralNetworksShutdown();
+}
+
+// Adds the tensors of the interpreter to the NN API model.
+TfLiteStatus addTensorOperands(::tflite::Interpreter* interpreter,
+                               ANeuralNetworksModel* nn_model,
+                               uint32_t* no_of_operands_added,
+                               std::vector<int64_t>* nnapi_ids) {
+  uint32_t next_id = 0;
+  for (size_t i = 0; i < interpreter->tensors_size(); i++) {
+    // Skip temporaries and RNN back-edges.
+    if ((*nnapi_ids)[i] == kOperandNotNeeded) continue;
+
+    (*nnapi_ids)[i] = int64_t(next_id);
+
+    int32_t nn_type = 0;
+    // NNAPI requires 32-bit float scale to be zero, tflite doesn't care
+    float scale = 0.0f;
+    int32_t zeroPoint = 0;
+    TfLiteTensor* tensor = interpreter->tensor(i);
+    switch (tensor->type) {
+      case kTfLiteNoType:
+        // Tensors added during initialization of Ops don't have a type yet and
+        // should not be registered with the NNAPI.
+        continue;
+      case kTfLiteFloat32:
+        nn_type = ANEURALNETWORKS_TENSOR_FLOAT32;
+        break;
+      case kTfLiteUInt8:
+        nn_type = ANEURALNETWORKS_TENSOR_QUANT8_ASYMM;
+        scale = tensor->params.scale;
+        // FIXME The next line is a workaround because currently zero scale is
+        // passed down from TF
+        //       Lite.  Note that the latest NeuralNetworks.h (see
+        //       https://android.googlesource.com/platform/frameworks/ml/+/master/nn/runtime/include/NeuralNetworks.h)
+        //       requires scale to be greater than zero.  Remove this workaround
+        //       when the scale
+        //       value is correctly passed.
+        scale = (scale == 0.0f) ? 1.0f : scale;
+        zeroPoint = tensor->params.zero_point;
+        break;
+      case kTfLiteInt32:
+        nn_type = ANEURALNETWORKS_TENSOR_INT32;
+        scale = tensor->params.scale;
+        zeroPoint = tensor->params.zero_point;
+        break;
+      case kTfLiteBool:
+        // Workaround to pass bool type under NNAPI
+        // Use bool type using ANEURALNETWORKS_TENSOR_QUANT8_ASYMM with scale = 1.0f and zero_point = 0
+        nn_type = ANEURALNETWORKS_TENSOR_QUANT8_ASYMM;
+        scale = 1.0f;
+        zeroPoint = 0;
+        break;
+      default:
+        logError("Unsupported tensor type %d", tensor->type);
+        return kTfLiteError;
+    }
+    if (tensor->dims->size == 0) {
+      // WORKAROUND Some model have dimension zero
+      switch (tensor->type) {
+        case kTfLiteFloat32:
+          nn_type = ANEURALNETWORKS_TENSOR_FLOAT32;
+          break;
+        case kTfLiteInt32:
+          nn_type = ANEURALNETWORKS_TENSOR_INT32;
+          break;
+        default:
+          logError("NNAPI doesn't support tensors with rank 0 (index %d name %s)",
+                   i, tensor->name);
+          return kTfLiteError;
+      }
+    }
+    if (tensor->dims->size > 4) {
+      logError("NNAPI doesn't support tensors with rank > 4 (index %d name %s)",
+               i, tensor->name);
+      return kTfLiteError;
+    }
+    // TODO(aselle): Note, many of these are intermediate results. Do I need
+    // to ever specify these sizes. I am currently below doing setValue
+    // on all of them, but I shouldn't in the future.
+    // Answer(jeanluc): If all the operators can set the dimension correctly,
+    // you won't need to.
+    ANeuralNetworksOperandType operand_type{
+        nn_type, static_cast<uint32_t>(tensor->dims->size),
+        reinterpret_cast<uint32_t*>(tensor->dims->data), scale, zeroPoint};
+    if (tensor->dims->size == 0) {
+      // WORKAROUND Some model have dimension zero
+      // Consider scalar as vector size 1
+      operand_type.dimensions = dimension_for_scalar;
+      operand_type.dimensionCount = 1;
+    }
+    RETURN_ERROR_IF_NN_FAILED(
+        ANeuralNetworksModel_addOperand(nn_model, &operand_type));
+    // TODO(aselle): Based on Michael's suggestion, limiting this to read
+    // only memory
+    if (tensor->allocation_type == kTfLiteMmapRo) {
+      if (const NNAPIAllocation* alloc = dynamic_cast<const NNAPIAllocation*>(
+              static_cast<const ::tflite::Allocation*>(tensor->allocation))) {
+        RETURN_ERROR_IF_NN_FAILED(
+            ANeuralNetworksModel_setOperandValueFromMemory(
+                nn_model, next_id, alloc->memory(),
+                alloc->offset(tensor->data.raw), tensor->bytes));
+      } else {
+        RETURN_ERROR_IF_NN_FAILED(ANeuralNetworksModel_setOperandValue(
+            nn_model, next_id, tensor->data.raw, tensor->bytes));
+      }
+    } else if (tensor->bytes == 0) {
+      // These size 0 tensors are optional tensors reserved.
+      RETURN_ERROR_IF_NN_FAILED(
+          ANeuralNetworksModel_setOperandValue(nn_model, next_id, nullptr, 0));
+    }
+
+    ++next_id;
+  }
+  *no_of_operands_added = next_id;
+  return kTfLiteOk;
+}
+
+void MapAndAddTensorIds(const int* from_ids_buf, size_t from_ids_count,
+                        std::vector<uint32_t>* into,
+                        const std::vector<int64_t>& map) {
+  for (size_t i = 0; i < from_ids_count; i++) {
+    int from_id = from_ids_buf[i];
+    if (from_id == kOptionalTensor) {
+      into->push_back(from_id);
+    } else {
+      into->push_back(map[from_id]);
+    }
+  }
+}
+
+// Adds the operations and their parameters to the NN API model.
+// 'next-id' is the operand ID of the next operand of the model.
+TfLiteStatus AddOpsAndParams(
+    ::tflite::Interpreter* interpreter, ANeuralNetworksModel* nn_model,
+    uint32_t next_id, std::vector<int>* model_state_inputs,
+    std::vector<int>* model_state_outputs,
+    const std::vector<int64_t>& tensor_id_to_nnapi_id) {
+  for (size_t i = 0; i < interpreter->nodes_size(); i++) {
+    const auto* node_and_registration = interpreter->node_and_registration(i);
+    const TfLiteNode& node = node_and_registration->first;
+    const TfLiteRegistration& registration = node_and_registration->second;
+    ::tflite::BuiltinOperator builtin =
+        static_cast<::tflite::BuiltinOperator>(registration.builtin_code);
+
+    // Add the parameters.
+    std::vector<uint32_t> augmented_inputs, augmented_outputs;
+    MapAndAddTensorIds(node.inputs->data, node.inputs->size, &augmented_inputs,
+                       tensor_id_to_nnapi_id);
+    MapAndAddTensorIds(node.outputs->data, node.outputs->size,
+                       &augmented_outputs, tensor_id_to_nnapi_id);
+
+    auto add_scalar_int32 = [&nn_model, &augmented_inputs,
+                             &next_id](int value) {
+      ANeuralNetworksOperandType operand_type{}; operand_type.type = ANEURALNETWORKS_INT32;
+      CHECK_NN(ANeuralNetworksModel_addOperand(nn_model, &operand_type))
+      CHECK_NN(ANeuralNetworksModel_setOperandValue(nn_model, next_id, &value,
+                                                    sizeof(int32_t)))
+      augmented_inputs.push_back(next_id++);
+    };
+
+    auto add_scalar_float32 = [&nn_model, &augmented_inputs,
+                               &next_id](float value) {
+      ANeuralNetworksOperandType operand_type{}; operand_type.type = ANEURALNETWORKS_FLOAT32;
+      CHECK_NN(ANeuralNetworksModel_addOperand(nn_model, &operand_type))
+      CHECK_NN(ANeuralNetworksModel_setOperandValue(nn_model, next_id, &value,
+                                                    sizeof(float)))
+      augmented_inputs.push_back(next_id++);
+    };
+
+    auto add_vector_int32 = [&](const int* values, uint32_t num_values) {
+      ANeuralNetworksOperandType operand_type{};
+      operand_type.type = ANEURALNETWORKS_TENSOR_INT32;
+      operand_type.dimensionCount = 1;
+      operand_type.dimensions = &num_values;
+      CHECK_NN(ANeuralNetworksModel_addOperand(nn_model, &operand_type))
+      CHECK_NN(ANeuralNetworksModel_setOperandValue(
+          nn_model, next_id, values, sizeof(int32_t) * num_values));
+      augmented_inputs.push_back(next_id++);
+    };
+
+    // Handle state tensors of RNN, LSTM, SVDF.
+    // For each state_out tensor, a corresponding state_in operand needs to be
+    // created for NNAPI.
+    auto duplicate_state_tensor_float32 =
+        [interpreter, &nn_model, &next_id, &augmented_inputs,
+         &model_state_inputs, &model_state_outputs](int tensor_id) {
+          const TfLiteTensor* tensor = interpreter->tensor(tensor_id);
+          ANeuralNetworksOperandType operand_type{
+              ANEURALNETWORKS_TENSOR_FLOAT32,
+              static_cast<uint32_t>(tensor->dims->size),
+              reinterpret_cast<uint32_t*>(tensor->dims->data),
+              tensor->params.scale, tensor->params.zero_point};
+          CHECK_NN(ANeuralNetworksModel_addOperand(nn_model, &operand_type));
+          augmented_inputs.push_back(next_id);
+          model_state_inputs->push_back(next_id);
+          model_state_outputs->push_back(tensor_id);
+          next_id++;
+        };
+    auto check_and_add_activation = [&add_scalar_int32](int activation) {
+      if (activation > kTfLiteActRelu6) {
+        logError("NNAPI only supports RELU, RELU1 and RELU6 activations");
+        return kTfLiteError;
+      }
+      add_scalar_int32(activation);
+      return kTfLiteOk;
+    };
+
+    auto add_add_params = [&add_scalar_int32](void* data) {
+      auto* builtin = reinterpret_cast<TfLiteAddParams*>(data);
+      if (builtin->activation > kTfLiteActRelu6) {
+        logError("NNAPI only supports RELU, RELU1 and RELU6 activations");
+        return kTfLiteError;
+      }
+      add_scalar_int32(builtin->activation);
+      return kTfLiteOk;
+    };
+
+    auto add_pooling_params = [&add_scalar_int32,
+                               &check_and_add_activation](void* data) {
+      auto builtin = reinterpret_cast<TfLitePoolParams*>(data);
+      add_scalar_int32(builtin->padding);
+      add_scalar_int32(builtin->stride_width);
+      add_scalar_int32(builtin->stride_height);
+      add_scalar_int32(builtin->filter_width);
+      add_scalar_int32(builtin->filter_height);
+      return check_and_add_activation(builtin->activation);
+    };
+
+    auto add_convolution_params = [&add_scalar_int32,
+                                   &check_and_add_activation](void* data) {
+      auto builtin = reinterpret_cast<TfLiteConvParams*>(data);
+      add_scalar_int32(builtin->padding);
+      add_scalar_int32(builtin->stride_width);
+      add_scalar_int32(builtin->stride_height);
+      return check_and_add_activation(builtin->activation);
+    };
+
+    auto add_depthwise_conv_params = [&add_scalar_int32,
+                                      &check_and_add_activation](void* data) {
+      auto builtin = reinterpret_cast<TfLiteDepthwiseConvParams*>(data);
+      add_scalar_int32(builtin->padding);
+      add_scalar_int32(builtin->stride_width);
+      add_scalar_int32(builtin->stride_height);
+      add_scalar_int32(builtin->depth_multiplier);
+      return check_and_add_activation(builtin->activation);
+    };
+
+    auto add_fully_connected_params = [&check_and_add_activation](void* data) {
+      auto builtin = reinterpret_cast<TfLiteFullyConnectedParams*>(data);
+      return check_and_add_activation(builtin->activation);
+    };
+
+    auto add_concatenation_params = [&add_scalar_int32](void* data) {
+      auto builtin = reinterpret_cast<TfLiteConcatenationParams*>(data);
+      add_scalar_int32(builtin->axis);
+      if (builtin->activation != kTfLiteActNone) {
+        logError("Concatenation does not support fused activation in NNAPI");
+        return kTfLiteError;
+      }
+      return kTfLiteOk;
+    };
+
+    auto add_softmax_params = [&add_scalar_float32](void* data) {
+      auto builtin = reinterpret_cast<TfLiteSoftmaxParams*>(data);
+      add_scalar_float32(builtin->beta);
+    };
+
+    auto add_space_to_depth_params = [&add_scalar_int32](void* data) {
+      auto builtin = reinterpret_cast<TfLiteSpaceToDepthParams*>(data);
+      add_scalar_int32(builtin->block_size);
+    };
+
+    auto add_lstm_params = [&add_scalar_int32,
+                            &add_scalar_float32](void* data) {
+      auto builtin = reinterpret_cast<TfLiteLSTMParams*>(data);
+      add_scalar_int32(builtin->activation);
+      add_scalar_float32(builtin->cell_clip);
+      add_scalar_float32(builtin->proj_clip);
+    };
+
+    // LSTM in NNAPI requires scratch tensor as an output operand.
+    auto add_lstm_scratch_tensor_float32 = [interpreter, &node, &nn_model,
+                                            &next_id, &augmented_outputs]() {
+      if (node.temporaries->size == 0) return;
+      int scratch_buffer_index = node.temporaries->data[0];
+      const TfLiteTensor* tensor = interpreter->tensor(scratch_buffer_index);
+      ANeuralNetworksOperandType operand_type{
+          ANEURALNETWORKS_TENSOR_FLOAT32,
+          static_cast<uint32_t>(tensor->dims->size),
+          reinterpret_cast<uint32_t*>(tensor->dims->data), tensor->params.scale,
+          tensor->params.zero_point};
+      CHECK_NN(ANeuralNetworksModel_addOperand(nn_model, &operand_type));
+      augmented_outputs.insert(augmented_outputs.begin(), next_id++);
+    };
+
+    auto add_mean_params = [&add_scalar_int32](void* data) {
+#if TFLITE_MAJOR_VER == 1 && TFLITE_MINOR_VER == 9
+      auto builtin = reinterpret_cast<TfLiteMeanParams*>(data);
+#else
+      auto builtin = reinterpret_cast<TfLiteReducerParams*>(data);
+#endif
+      add_scalar_int32(builtin->keep_dims);
+    };
+
+    auto add_svdf_params = [&add_scalar_int32](void* data) {
+      auto builtin = reinterpret_cast<TfLiteSVDFParams*>(data);
+      add_scalar_int32(builtin->rank);
+      add_scalar_int32(builtin->activation);
+    };
+
+    auto add_rnn_params = [&add_scalar_int32](void* data) {
+      auto builtin = reinterpret_cast<TfLiteRNNParams*>(data);
+      add_scalar_int32(builtin->activation);
+    };
+
+    auto add_squeeze_params = [&](void* data) {
+      const auto* builtin = reinterpret_cast<TfLiteSqueezeParams*>(data);
+      // Note that we add the squeeze dimensions even if the dimensions were
+      // unspecified (empty), as NNAPI requires the operand.
+      add_vector_int32(builtin->squeeze_dims,
+                       static_cast<uint32_t>(builtin->num_squeeze_dims));
+    };
+
+    // Handle optional input tensors.
+    auto add_optional_tensors = [&nn_model, &augmented_inputs,
+                                 &next_id](int nn_type) {
+      for (size_t idx = 0; idx < augmented_inputs.size(); idx++) {
+        if (augmented_inputs[idx] == static_cast<uint32_t>(kOptionalTensor)) {
+          const std::vector<uint32_t> dim = {0, 0};
+          ANeuralNetworksOperandType operand_type{nn_type, 2, dim.data(), 0, 0};
+          CHECK_NN(ANeuralNetworksModel_addOperand(nn_model, &operand_type))
+          CHECK_NN(ANeuralNetworksModel_setOperandValue(nn_model, next_id,
+                                                        nullptr, 0))
+          augmented_inputs[idx] = next_id++;
+        }
+      }
+    };
+
+    int nnapi_version = 10;
+#include "nnapi_delegate_ex_AddOpsAndParams_lambda.inc"
+
+    ANeuralNetworksOperationType nn_op_type = -1;
+
+    // Using namespace directive to minimize diff with upstream tensorflow
+    namespace tflite = ::tflite;
+
+    switch (builtin) {
+      case tflite::BuiltinOperator_ADD:
+        nn_op_type = ANEURALNETWORKS_ADD;
+        RETURN_ERROR_IF_TFLITE_FAILED(add_add_params(node.builtin_data));
+        break;
+      case tflite::BuiltinOperator_MUL:
+        nn_op_type = ANEURALNETWORKS_MUL;
+        RETURN_ERROR_IF_TFLITE_FAILED(add_add_params(node.builtin_data));
+        break;
+      case tflite::BuiltinOperator_AVERAGE_POOL_2D:
+        RETURN_ERROR_IF_TFLITE_FAILED(add_pooling_params(node.builtin_data));
+        nn_op_type = ANEURALNETWORKS_AVERAGE_POOL_2D;
+        break;
+      case tflite::BuiltinOperator_MAX_POOL_2D:
+        RETURN_ERROR_IF_TFLITE_FAILED(add_pooling_params(node.builtin_data));
+        nn_op_type = ANEURALNETWORKS_MAX_POOL_2D;
+        break;
+      case tflite::BuiltinOperator_L2_POOL_2D:
+        RETURN_ERROR_IF_TFLITE_FAILED(add_pooling_params(node.builtin_data));
+        nn_op_type = ANEURALNETWORKS_L2_POOL_2D;
+        break;
+      case tflite::BuiltinOperator_CONV_2D: {
+        auto builtin = reinterpret_cast<TfLiteConvParams*>(node.builtin_data);
+        if (builtin->dilation_width_factor != 1 ||
+            builtin->dilation_height_factor != 1 || node.inputs->size != 3) {
+          logError("NNAPI does not support dilated Conv2D.");
+          return kTfLiteError;
+        }
+      }
+        RETURN_ERROR_IF_TFLITE_FAILED(
+            add_convolution_params(node.builtin_data));
+        nn_op_type = ANEURALNETWORKS_CONV_2D;
+        break;
+      case tflite::BuiltinOperator_RELU:
+        nn_op_type = ANEURALNETWORKS_RELU;
+        break;
+      case tflite::BuiltinOperator_RELU_N1_TO_1:
+        nn_op_type = ANEURALNETWORKS_RELU1;
+        break;
+      case tflite::BuiltinOperator_RELU6:
+        nn_op_type = ANEURALNETWORKS_RELU6;
+        break;
+      case tflite::BuiltinOperator_TANH:
+        nn_op_type = ANEURALNETWORKS_TANH;
+        break;
+      case tflite::BuiltinOperator_FLOOR:
+        nn_op_type = ANEURALNETWORKS_FLOOR;
+        break;
+      case tflite::BuiltinOperator_LOGISTIC:
+        nn_op_type = ANEURALNETWORKS_LOGISTIC;
+        break;
+      case tflite::BuiltinOperator_DEPTHWISE_CONV_2D:
+        RETURN_ERROR_IF_TFLITE_FAILED(
+            add_depthwise_conv_params(node.builtin_data));
+        nn_op_type = ANEURALNETWORKS_DEPTHWISE_CONV_2D;
+        break;
+      case tflite::BuiltinOperator_CONCATENATION:
+        RETURN_ERROR_IF_TFLITE_FAILED(
+            add_concatenation_params(node.builtin_data));
+        nn_op_type = ANEURALNETWORKS_CONCATENATION;
+        break;
+      case tflite::BuiltinOperator_SOFTMAX:
+        add_softmax_params(node.builtin_data);
+        nn_op_type = ANEURALNETWORKS_SOFTMAX;
+        break;
+      case tflite::BuiltinOperator_FULLY_CONNECTED:
+        RETURN_ERROR_IF_TFLITE_FAILED(
+            add_fully_connected_params(node.builtin_data));
+        nn_op_type = ANEURALNETWORKS_FULLY_CONNECTED;
+        break;
+      case tflite::BuiltinOperator_RESHAPE:
+        if (node.inputs->size != 2) {
+          logError("NNAPI only supports 2-input RESHAPE");
+          return kTfLiteError;
+        }
+        nn_op_type = ANEURALNETWORKS_RESHAPE;
+        // add_reshape_params(node.builtin_data);
+        break;
+      case tflite::BuiltinOperator_RESIZE_BILINEAR:
+        add_resize_bilinear_params(node.builtin_data);
+        nn_op_type = ANEURALNETWORKS_RESIZE_BILINEAR;
+        break;
+      case tflite::BuiltinOperator_SPACE_TO_DEPTH:
+        add_space_to_depth_params(node.builtin_data);
+        nn_op_type = ANEURALNETWORKS_SPACE_TO_DEPTH;
+        break;
+      case tflite::BuiltinOperator_LSTM: {
+        if (node.inputs->size + /* no of params */ 3 != 21) {
+          logError("NNAPI only supports 21-input LSTMs");
+          return kTfLiteError;
+        }
+        duplicate_state_tensor_float32(
+            node.outputs->data[/*kOutputStateTensor*/ 0]);
+        duplicate_state_tensor_float32(
+            node.outputs->data[/*kCellStateTensor*/ 1]);
+        add_lstm_params(node.builtin_data);
+        add_lstm_scratch_tensor_float32();
+        add_optional_tensors(ANEURALNETWORKS_TENSOR_FLOAT32);
+        nn_op_type = ANEURALNETWORKS_LSTM;
+        break;
+      }
+      case tflite::BuiltinOperator_DEQUANTIZE:
+        nn_op_type = ANEURALNETWORKS_DEQUANTIZE;
+        break;
+      case tflite::BuiltinOperator_SVDF: {
+        duplicate_state_tensor_float32(node.outputs->data[/*kStateTensor*/ 0]);
+        add_svdf_params(node.builtin_data);
+        nn_op_type = ANEURALNETWORKS_SVDF;
+        break;
+      }
+      case tflite::BuiltinOperator_RNN: {
+        duplicate_state_tensor_float32(
+            node.outputs->data[/*kHiddenStateTensor*/ 0]);
+        add_rnn_params(node.builtin_data);
+        nn_op_type = ANEURALNETWORKS_RNN;
+        break;
+      }
+      case tflite::BuiltinOperator_EMBEDDING_LOOKUP:
+        nn_op_type = ANEURALNETWORKS_EMBEDDING_LOOKUP;
+        break;
+      case tflite::BuiltinOperator_PAD:
+        nnapi_version = 11;  // require NNAPI 1.1
+        nn_op_type = ANEURALNETWORKS_PAD;
+        break;
+      case tflite::BuiltinOperator_MEAN:
+        nnapi_version = 11;  // require NNAPI 1.1
+        add_mean_params(node.builtin_data);
+        nn_op_type = ANEURALNETWORKS_MEAN;
+        break;
+      case tflite::BuiltinOperator_LOCAL_RESPONSE_NORMALIZATION:
+        nn_op_type = ANEURALNETWORKS_LOCAL_RESPONSE_NORMALIZATION;
+        add_lrn_params(node.builtin_data);
+        break;
+      case tflite::BuiltinOperator_DIV:
+        nnapi_version = 11;  // require NNAPI 1.1
+        nn_op_type = ANEURALNETWORKS_DIV;
+        RETURN_ERROR_IF_TFLITE_FAILED(check_and_add_activation(
+            reinterpret_cast<TfLiteDivParams*>(node.builtin_data)->activation));
+        break;
+      case tflite::BuiltinOperator_SUB:
+        nnapi_version = 11;  // require NNAPI 1.1
+        nn_op_type = ANEURALNETWORKS_SUB;
+        RETURN_ERROR_IF_TFLITE_FAILED(check_and_add_activation(
+            reinterpret_cast<TfLiteSubParams*>(node.builtin_data)->activation));
+        break;
+      case tflite::BuiltinOperator_SQUEEZE:
+        nnapi_version = 11;  // requires NNAPI 1.1
+        add_squeeze_params(node.builtin_data);
+        nn_op_type = ANEURALNETWORKS_SQUEEZE;
+        break;
+      case tflite::BuiltinOperator_TRANSPOSE:
+        // The permutation input tensor value dictates the output dimensions.
+        // TODO(b/110888333): Support dynamically-sized tensors in delegates.
+        if ((node.inputs->size > 1) &&
+            (interpreter->tensor(node.inputs->data[1])->allocation_type !=
+             kTfLiteMmapRo)) {
+          logError("NNAPI does not yet support dynamic tensors.");
+          return kTfLiteError;
+        }
+        nnapi_version = 11;  // require NNAPI 1.1
+        nn_op_type = ANEURALNETWORKS_TRANSPOSE;
+        break;
+      case tflite::BuiltinOperator_L2_NORMALIZATION:
+        nn_op_type = ANEURALNETWORKS_L2_NORMALIZATION;
+        if (reinterpret_cast<TfLiteL2NormParams*>(node.builtin_data)
+                ->activation != kTfLiteActNone) {
+          logError(
+              "NNAPI does not support L2Normalization with fused activations");
+          return kTfLiteError;
+        }
+        if ((node.inputs->size > 0) &&
+            (interpreter->tensor(node.inputs->data[0])->dims->size != 4)) {
+          logError("NNAPI only supports input rank 4 for L2Normalization");
+          return kTfLiteError;
+        }
+        break;
+      case tflite::BuiltinOperator_HASHTABLE_LOOKUP:
+        if (interpreter->tensor(node.outputs->data[0])->type !=
+            kTfLiteFloat32) {
+          logError("NNAPI only support HASHTABLE_LOOKUP with float32 output",
+                   builtin);
+          return kTfLiteError;
+        }
+        nn_op_type = ANEURALNETWORKS_HASHTABLE_LOOKUP;
+        break;
+      case tflite::BuiltinOperator_STRIDED_SLICE:
+        add_strided_slice_params(node.builtin_data);
+        nn_op_type = ANEURALNETWORKS_STRIDED_SLICE;
+        break;
+      case tflite::BuiltinOperator_SPACE_TO_BATCH_ND:
+        nnapi_version = 11;  // require NNAPI 1.1
+        nn_op_type = ANEURALNETWORKS_SPACE_TO_BATCH_ND;
+        break;
+      case tflite::BuiltinOperator_BATCH_TO_SPACE_ND:
+        nnapi_version = 11;  // require NNAPI 1.1
+        nn_op_type = ANEURALNETWORKS_BATCH_TO_SPACE_ND;
+        check_batch_to_space_params();
+        break;
+      case tflite::BuiltinOperator_CAST:
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_CAST_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_TOPK_V2:
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_TOPK_V2_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_GATHER:
+        add_gather_ex_params(node.builtin_data);
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_GATHER_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_SPLIT:
+        add_split_params(node.builtin_data);
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_SPLIT_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_NEG:
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_NEG_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_EXP:
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_EXP_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_TRANSPOSE_CONV:
+        add_transpose_conv_params(node.builtin_data);
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_TRANSPOSE_CONV_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_PRELU:
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_PRELU_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(),
+            static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_ARG_MAX:
+        check_arg_max_input(node.builtin_data);
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_ARGMAX_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+#if TFLITE_MAJOR_VER == 1 && TFLITE_MINOR_VER == 13
+      case tflite::BuiltinOperator_PACK:
+        add_pack_ex_params(node.builtin_data);
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_PACK_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_UNPACK:
+        add_unpack_ex_params(node.builtin_data);
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_UNPACK_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_SQRT:
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_SQRT_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(),
+            static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_RSQRT:
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_RSQRT_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(),
+            static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_EQUAL:
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_EQUAL_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_NOT_EQUAL:
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_NOT_EQUAL_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(), static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_SUM:
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_REDUCE_SUM_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(),
+            static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_REDUCE_MAX:
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_REDUCE_MAX_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(),
+            static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_REDUCE_MIN:
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_REDUCE_MIN_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(),
+            static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_LOGICAL_AND:
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_LOGICAL_AND_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(),
+            static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_LOGICAL_OR:
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_LOGICAL_OR_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(),
+            static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_LOGICAL_NOT:
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_LOGICAL_NOT_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(),
+            static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+      case tflite::BuiltinOperator_SQUARED_DIFFERENCE:
+        CHECK_NN(ANeuralNetworksModel_addOperationEx(
+            nn_model, ANEURALNETWORKS_SQUARED_DIFFERENCE_EX,
+            static_cast<uint32_t>(augmented_inputs.size()),
+            augmented_inputs.data(),
+            static_cast<uint32_t>(node.outputs->size),
+            reinterpret_cast<uint32_t*>(node.outputs->data)));
+        continue;
+
+#endif
+      case tflite::BuiltinOperator_CONCAT_EMBEDDINGS:
+      case tflite::BuiltinOperator_LSH_PROJECTION:
+      case tflite::BuiltinOperator_BIDIRECTIONAL_SEQUENCE_RNN:
+      case tflite::BuiltinOperator_UNIDIRECTIONAL_SEQUENCE_RNN:
+      case tflite::BuiltinOperator_EMBEDDING_LOOKUP_SPARSE:
+      case tflite::BuiltinOperator_BIDIRECTIONAL_SEQUENCE_LSTM:
+      case tflite::BuiltinOperator_UNIDIRECTIONAL_SEQUENCE_LSTM:
+      //case tflite::BuiltinOperator_LOCAL_RESPONSE_NORMALIZATION:
+      case tflite::BuiltinOperator_PADV2:
+      //case tflite::BuiltinOperator_RESIZE_BILINEAR:
+      case tflite::BuiltinOperator_CALL:
+      case tflite::BuiltinOperator_SKIP_GRAM:
+      //case tflite::BuiltinOperator_RELU_N1_TO_1:
+      //case tflite::BuiltinOperator_GATHER:
+      //case tflite::BuiltinOperator_SPACE_TO_BATCH_ND:
+      //case tflite::BuiltinOperator_BATCH_TO_SPACE_ND:
+      //case tflite::BuiltinOperator_TOPK_V2:
+      //case tflite::BuiltinOperator_SPLIT:
+      //case tflite::BuiltinOperator_STRIDED_SLICE:
+      //case tflite::BuiltinOperator_EXP:
+      case tflite::BuiltinOperator_LOG_SOFTMAX:
+      //case tflite::BuiltinOperator_DEQUANTIZE:
+      case tflite::BuiltinOperator_DELEGATE:
+      //case tflite::BuiltinOperator_CAST:
+      //case tflite::BuiltinOperator_PRELU:
+      case tflite::BuiltinOperator_MAXIMUM:
+      case tflite::BuiltinOperator_MINIMUM:
+#if TFLITE_MAJOR_VER == 1 && TFLITE_MINOR_VER == 13
+      case tflite::BuiltinOperator_ARG_MIN:
+#endif
+      case tflite::BuiltinOperator_GREATER:
+      case tflite::BuiltinOperator_GREATER_EQUAL:
+      case tflite::BuiltinOperator_LESS:
+      case tflite::BuiltinOperator_LESS_EQUAL:
+      //case tflite::BuiltinOperator_NEG:
+      case tflite::BuiltinOperator_SELECT:
+      case tflite::BuiltinOperator_SLICE:
+      case tflite::BuiltinOperator_SIN:
+#if TFLITE_MAJOR_VER == 1 && TFLITE_MINOR_VER == 13
+      case tflite::BuiltinOperator_LOG:
+#endif
+      //case tflite::BuiltinOperator_TRANSPOSE_CONV:
+#if TFLITE_MAJOR_VER == 1 && TFLITE_MINOR_VER == 13
+      case tflite::BuiltinOperator_TILE:
+      case tflite::BuiltinOperator_EXPAND_DIMS:
+      case tflite::BuiltinOperator_SPARSE_TO_DENSE:
+      //case tflite::BuiltinOperator_EQUAL:
+      //case tflite::BuiltinOperator_NOT_EQUAL:
+      //case tflite::BuiltinOperator_SUM:
+      //case tflite::BuiltinOperator_REDUCE_MAX:
+      //case tflite::BuiltinOperator_REDUCE_MIN:
+      case tflite::BuiltinOperator_REDUCE_PROD:
+      //case tflite::BuiltinOperator_SQRT:
+      //case tflite::BuiltinOperator_RSQRT:
+      case tflite::BuiltinOperator_SHAPE:
+      case tflite::BuiltinOperator_POW:
+      case tflite::BuiltinOperator_FAKE_QUANT:
+      //case tflite::BuiltinOperator_PACK:
+      //case tflite::BuiltinOperator_LOGICAL_OR:
+      case tflite::BuiltinOperator_ONE_HOT:
+      //case tflite::BuiltinOperator_LOGICAL_AND:
+      //case tflite::BuiltinOperator_LOGICAL_NOT:
+      //case tflite::BuiltinOperator_UNPACK:
+      case tflite::BuiltinOperator_FLOOR_DIV:
+      case tflite::BuiltinOperator_REDUCE_ANY:
+      case tflite::BuiltinOperator_SQUARE:
+      case tflite::BuiltinOperator_ZEROS_LIKE:
+      case tflite::BuiltinOperator_FILL:
+#endif
+        logError("Op code %d is currently not delegated to NNAPI", builtin);
+        return kTfLiteError;
+        break;
+      case tflite::BuiltinOperator_CUSTOM: {
+        std::string custom_name(registration.custom_name);
+        if (custom_name.compare("TensorFlowMax") == 0) {
+          CHECK_NN(ANeuralNetworksModel_addOperationEx(
+              nn_model, ANEURALNETWORKS_REDUCE_MAX_EX,
+              static_cast<uint32_t>(augmented_inputs.size()),
+              augmented_inputs.data(),
+              static_cast<uint32_t>(node.outputs->size),
+              reinterpret_cast<uint32_t*>(node.outputs->data)));
+          continue;
+        }
+        else if (custom_name.compare("SquaredDifference") == 0) {
+          CHECK_NN(ANeuralNetworksModel_addOperationEx(
+              nn_model, ANEURALNETWORKS_SQUARED_DIFFERENCE_EX,
+              static_cast<uint32_t>(augmented_inputs.size()),
+              augmented_inputs.data(),
+              static_cast<uint32_t>(node.outputs->size),
+              reinterpret_cast<uint32_t*>(node.outputs->data)));
+          continue;
+        }
+        else if (custom_name.compare("TensorFlowSum") == 0) {
+          CHECK_NN(ANeuralNetworksModel_addOperationEx(
+              nn_model, ANEURALNETWORKS_REDUCE_SUM_EX,
+              static_cast<uint32_t>(augmented_inputs.size()),
+              augmented_inputs.data(),
+              static_cast<uint32_t>(node.outputs->size),
+              reinterpret_cast<uint32_t*>(node.outputs->data)));
+          continue;
+        }
+        else if (custom_name.compare("Abs") == 0) {
+          CHECK_NN(ANeuralNetworksModel_addOperationEx(
+              nn_model, ANEURALNETWORKS_ABS_EX,
+              static_cast<uint32_t>(augmented_inputs.size()),
+              augmented_inputs.data(),
+              static_cast<uint32_t>(node.outputs->size),
+              reinterpret_cast<uint32_t*>(node.outputs->data)));
+          continue;
+        }
+        logError("Custom operations are not supported when using NNAPI.");
+        return kTfLiteError;
+        break;
+      }
+      default:
+        logError("Op code %d is currently not delegated to NNAPI", builtin);
+        return kTfLiteError;
+        break;
+    }
+
+    if (nnapi_version == 11 && GetAndroidSdkVersionCached() < 28) {
+      //logError("Op %d needs NNAPI1.1", builtin);
+      //return kTfLiteError;
+    }
+
+    // Add the operation.
+    RETURN_ERROR_IF_NN_FAILED(ANeuralNetworksModel_addOperation(
+        nn_model, nn_op_type, static_cast<uint32_t>(augmented_inputs.size()),
+        augmented_inputs.data(),
+        static_cast<uint32_t>(augmented_outputs.size()),
+        reinterpret_cast<uint32_t*>(augmented_outputs.data())));
+  }
+  return kTfLiteOk;
+}
+
+TfLiteStatus NNAPIDelegate::BuildGraph(::tflite::Interpreter* interpreter) {
+  if (nn_model_ && nn_compiled_model_) return model_status_;
+
+  // TODO(aselle): This is not correct. need to handle resize invalidation.
+  if (!nn_model_) {
+    CHECK_NN(ANeuralNetworksModel_create(&nn_model_));
+
+    // Find which tensors should be added to NNAPI. TFLite has temporaries
+    // and RNN back-edges which are are not valid for NNAPI. We look through all
+    // inputs and outputs and mark the mapping in tensor_id_to_nnapi_id with
+    // kOperandIdNotSet. addTensorOperands will replace those with the
+    // corresponding NNAPI operand ids and skip kOperandNotNeeded entries.
+    std::vector<int64_t> tensor_id_to_nnapi_id(interpreter->tensors_size(),
+                                               kOperandNotNeeded);
+    auto set_ids_to_not_set = [&tensor_id_to_nnapi_id](const int* buf,
+                                                       int count) {
+      for (int j = 0; j < count; j++) {
+        auto tensor_id = buf[j];
+        if (tensor_id != kOptionalTensor) {
+          tensor_id_to_nnapi_id[tensor_id] = kOperandIdNotSet;
+        }
+      }
+    };
+    for (size_t i = 0; i < interpreter->nodes_size(); i++) {
+      const auto* node_and_registration = interpreter->node_and_registration(i);
+      const TfLiteNode& node = node_and_registration->first;
+      set_ids_to_not_set(node.inputs->data, node.inputs->size);
+      set_ids_to_not_set(node.outputs->data, node.outputs->size);
+    }
+    set_ids_to_not_set(interpreter->inputs().data(),
+                       interpreter->inputs().size());
+    set_ids_to_not_set(interpreter->outputs().data(),
+                       interpreter->outputs().size());
+
+    uint32_t next_id = 0;
+    RETURN_ERROR_IF_TFLITE_FAILED(addTensorOperands(
+        interpreter, nn_model_, &next_id, &tensor_id_to_nnapi_id));
+    RETURN_ERROR_IF_TFLITE_FAILED(
+        AddOpsAndParams(interpreter, nn_model_, next_id, &model_states_inputs_,
+                        &model_states_outputs_, tensor_id_to_nnapi_id));
+
+    std::vector<uint32_t> augmented_inputs;
+    MapAndAddTensorIds(interpreter->inputs().data(),
+                       interpreter->inputs().size(), &augmented_inputs,
+                       tensor_id_to_nnapi_id);
+    augmented_inputs.insert(augmented_inputs.end(),
+                            model_states_inputs_.begin(),
+                            model_states_inputs_.end());
+    std::vector<uint32_t> augmented_outputs;
+    MapAndAddTensorIds(interpreter->outputs().data(),
+                       interpreter->outputs().size(), &augmented_outputs,
+                       tensor_id_to_nnapi_id);
+    MapAndAddTensorIds(model_states_outputs_.data(),
+                       model_states_outputs_.size(), &augmented_outputs,
+                       tensor_id_to_nnapi_id);
+
+    CHECK_NN(ANeuralNetworksModel_identifyInputsAndOutputs(
+        nn_model_, static_cast<uint32_t>(augmented_inputs.size()),
+        reinterpret_cast<const uint32_t*>(augmented_inputs.data()),
+        static_cast<uint32_t>(augmented_outputs.size()),
+        reinterpret_cast<const uint32_t*>(augmented_outputs.data())));
+
+    // TODO Support ANeuralNetworksModel_relaxComputationFloat32toFloat16
+    //if (GetAndroidSdkVersionCached() >= 28) {
+    //  CHECK_NN(ANeuralNetworksModel_relaxComputationFloat32toFloat16(
+    //      nn_model_, interpreter->GetAllowFp16PrecisionForFp32()));
+    //}
+    CHECK_NN(ANeuralNetworksModel_finish(nn_model_));
+  }
+  if (!nn_compiled_model_) {
+    CHECK_NN(ANeuralNetworksCompilation_create(nn_model_, &nn_compiled_model_));
+    CHECK_NN(ANeuralNetworksCompilation_finish(nn_compiled_model_));
+  }
+  return kTfLiteOk;
+}
+
+#include <unordered_map>
+
+TfLiteStatus NNAPIDelegate::Invoke(::tflite::Interpreter* interpreter) {
+  if (!nn_model_) {
+    model_status_ = BuildGraph(interpreter);
+    if (model_status_ != kTfLiteOk) {
+      logError("Failed to build graph for NNAPI");
+    }
+  }
+  if (model_status_ != kTfLiteOk) {
+    return model_status_;
+  }
+
+  ANeuralNetworksExecution* execution = nullptr;
+  CHECK_NN(ANeuralNetworksExecution_create(nn_compiled_model_, &execution));
+
+  // Allocate temporary buffer to save casted boolean tensor
+  std::unordered_map<size_t, uint8_t*> input_boolean_tensors;
+  std::unordered_map<size_t, uint8_t*> output_boolean_tensors;
+  for (size_t i = 0; i < interpreter->inputs().size(); i++)
+  {
+    int input = interpreter->inputs()[i];
+    TfLiteTensor* tensor = interpreter->tensor(input);
+    if (tensor->type == kTfLiteBool)
+    {
+      size_t elements = tensor->bytes / sizeof(bool);
+      uint8_t* temp_tensor = new uint8_t[tensor->bytes / sizeof(bool)];
+      input_boolean_tensors[i] = temp_tensor;
+      for (size_t idx = 0; idx < elements; idx++)
+      {
+        temp_tensor[idx] = (tensor->data.b[idx] ? 0x00 : 0xff);
+      }
+    }
+  }
+  for (size_t i = 0; i < interpreter->outputs().size(); i++)
+  {
+    int output = interpreter->outputs()[i];
+    TfLiteTensor* tensor = interpreter->tensor(output);
+    if (tensor->type == kTfLiteBool)
+    {
+      uint8_t* temp_tensor = new uint8_t[tensor->bytes / sizeof(bool)];
+      output_boolean_tensors[i] = temp_tensor;
+    }
+  }
+
+  // Currently perform deep copy of input buffer
+  for (size_t i = 0; i < interpreter->inputs().size(); i++) {
+    int input = interpreter->inputs()[i];
+    // TODO(aselle): Is this what we want or do we want input instead?
+    // TODO(aselle): This should be called setInputValue maybe to be cons.
+    TfLiteTensor* tensor = interpreter->tensor(input);
+    if (tensor->type == kTfLiteBool)
+    {
+      CHECK_NN(ANeuralNetworksExecution_setInput(
+          execution, i, nullptr, input_boolean_tensors[i], tensor->bytes * sizeof(uint8_t) / sizeof(bool)));
+    }
+    else
+    {
+      CHECK_NN(ANeuralNetworksExecution_setInput(
+          execution, i, nullptr, tensor->data.raw, tensor->bytes));
+    }
+  }
+
+  // Tell nn api where to place final data.
+  for (size_t i = 0; i < interpreter->outputs().size(); i++) {
+    int output = interpreter->outputs()[i];
+    TfLiteTensor* tensor = interpreter->tensor(output);
+
+    if (tensor->type == kTfLiteBool)
+    {
+      CHECK_NN(ANeuralNetworksExecution_setOutput(
+          execution, i, nullptr, output_boolean_tensors[i], tensor->bytes * sizeof(uint8_t) / sizeof(bool)));
+    }
+    else
+    {
+      CHECK_NN(ANeuralNetworksExecution_setOutput(
+          execution, i, nullptr, tensor->data.raw, tensor->bytes));
+    }
+  }
+
+  // The state_out of previous invocation need to be mapped to state_in of
+  // current invocation.
+  for (size_t i = 0; i < model_states_outputs_.size(); i++) {
+    int state_tensor_idx = model_states_outputs_[i];
+    TfLiteTensor* tensor = interpreter->tensor(state_tensor_idx);
+    // Here we are using a deep copy for state_in tensors so that we are not
+    // reading and writing into the same buffer during a invocation.
+    // TODO(miaowang): using double shared buffer to minimize the copies.
+    CHECK_NN(ANeuralNetworksExecution_setInput(
+        execution, i + interpreter->inputs().size(), nullptr, tensor->data.raw,
+        tensor->bytes));
+    // Tell NNAPI where to output the state_out.
+    CHECK_NN(ANeuralNetworksExecution_setOutput(
+        execution, i + interpreter->outputs().size(), nullptr, tensor->data.raw,
+        tensor->bytes));
+  }
+
+  // Currently use blocking compute.
+  ANeuralNetworksEvent* event = nullptr;
+  CHECK_NN(ANeuralNetworksExecution_startCompute(execution, &event));
+  CHECK_NN(ANeuralNetworksEvent_wait(event));
+  ANeuralNetworksEvent_free(event);
+  ANeuralNetworksExecution_free(execution);
+
+  // Tell nn api where to place final data.
+  for (size_t i = 0; i < interpreter->inputs().size(); i++) {
+    int input = interpreter->inputs()[i];
+    TfLiteTensor* tensor = interpreter->tensor(input);
+
+    if (tensor->type == kTfLiteBool)
+    {
+      uint8_t* temp_tensor = input_boolean_tensors[i];
+      input_boolean_tensors[i] = nullptr;
+      delete temp_tensor;
+    }
+  }
+  for (size_t i = 0; i < interpreter->outputs().size(); i++) {
+    int output = interpreter->outputs()[i];
+    TfLiteTensor* tensor = interpreter->tensor(output);
+
+    if (tensor->type == kTfLiteBool)
+    {
+      uint8_t* temp_tensor = output_boolean_tensors[i];
+      size_t elements = tensor->bytes / sizeof(bool);
+      for (size_t idx = 0; idx < elements; idx++)
+      {
+        tensor->data.b[idx] = ((temp_tensor[idx] == 0x00) ? false : true);
+      }
+      output_boolean_tensors[i] = nullptr;
+      delete temp_tensor;
+    }
+  }
+
+#if 0
+  printf("From the NN API:\n");
+  TfLiteTensor* tensor = interpreter->tensor(interpreter->outputs()[0]);
+  if (float* data =
+          interpreter->typed_tensor<float>(interpreter->outputs()[0])) {
+    size_t num = tensor->bytes / sizeof(float);
+    for (float* p = data; p < data + num; p++) {
+      printf(" %f", *p);
+    }
+    printf("\n");
+  }
+#endif
+
+  return kTfLiteOk;
+}
+
+bool NNAPIDelegate::IsSupported() { return nnfw::NNAPIExists(); }
+
+} // namespace tflite
+} // namespace nnfw
+
+// clang-format on
diff --git a/runtimes/libs/tflite/src/ext/nnapi_delegate_ex_AddOpsAndParams_lambda.inc b/runtimes/libs/tflite/src/ext/nnapi_delegate_ex_AddOpsAndParams_lambda.inc
new file mode 100644
index 000000000..a3e99ee7a
--- /dev/null
+++ b/runtimes/libs/tflite/src/ext/nnapi_delegate_ex_AddOpsAndParams_lambda.inc
@@ -0,0 +1,123 @@
+// This file is included from AddOpsAndParams defined in nnapi_delegate.cc
+// and contains lambda for extened implementation to original Tensorflow Lite.
+    auto add_resize_bilinear_params = [&add_scalar_int32, &interpreter, &augmented_inputs](void* data) {
+      auto builtin = reinterpret_cast<TfLiteResizeBilinearParams*>(data);
+      if  (builtin->align_corners) {
+        FATAL("Resize bilinear does not support align corners in NNAPI");
+      }
+
+      TfLiteTensor* tensor = interpreter->tensor(augmented_inputs.back());
+      assert(tensor->type == kTfLiteInt32);
+      assert(tensor->bytes == sizeof(int)*2);
+      augmented_inputs.pop_back();
+
+      int height = ((int*)(tensor->data.raw))[1];
+      int width = ((int*)(tensor->data.raw))[0];
+      add_scalar_int32(height);
+      add_scalar_int32(width);
+    };
+
+    auto add_transpose_conv_params = [&add_scalar_int32](void* data) {
+      auto builtin = reinterpret_cast<TfLiteTransposeConvParams*>(data);
+      add_scalar_int32(builtin->padding);
+      add_scalar_int32(builtin->stride_width);
+      add_scalar_int32(builtin->stride_height);
+    };
+
+    auto add_lrn_params = [&add_scalar_int32,
+                            &add_scalar_float32](void* data) {
+      auto builtin = reinterpret_cast<TfLiteLocalResponseNormParams*>(data);
+      add_scalar_int32(builtin->radius);
+      add_scalar_float32(builtin->bias);
+      add_scalar_float32(builtin->alpha);
+      add_scalar_float32(builtin->beta);
+    };
+
+    auto add_strided_slice_params = [&add_scalar_int32](void* data) {
+      auto builtin = reinterpret_cast<TfLiteStridedSliceParams*>(data);
+      add_scalar_int32(builtin->begin_mask);
+      add_scalar_int32(builtin->end_mask);
+      // ellipsis_mask and new_axis_mask are not supported on nn runtime
+      // cf) tflite interpreter supports both operations
+      if (builtin->ellipsis_mask) {
+        FATAL("STRIDE_SLICE does not support ellipsis_mask in NNAPI");
+      }
+      if (builtin->new_axis_mask) {
+        FATAL("STRIDE_SLICE does not support new_axis_mask in NNAPI");
+      }
+      add_scalar_int32(builtin->shrink_axis_mask);
+    };
+
+    auto add_gather_ex_params = [&add_scalar_int32](void* data) {
+      auto builtin = reinterpret_cast<TfLiteGatherParams*>(data);
+      add_scalar_int32(builtin->axis);
+      if (builtin->axis != 0) {
+        FATAL("GATHER does not support axis>0 in NNAPI");
+      }
+    };
+
+#if TFLITE_MAJOR_VER == 1 && TFLITE_MINOR_VER == 13
+    auto add_pack_ex_params = [&add_scalar_int32](void* data) {
+      auto builtin = reinterpret_cast<TfLitePackParams*>(data);
+      add_scalar_int32(builtin->values_count);
+      add_scalar_int32(builtin->axis);
+    };
+
+    auto add_unpack_ex_params = [&add_scalar_int32](void* data) {
+      auto builtin = reinterpret_cast<TfLiteUnpackParams*>(data);
+      add_scalar_int32(builtin->num);
+      add_scalar_int32(builtin->axis);
+    };
+#endif
+
+    auto check_batch_to_space_params = [interpreter, &node, &augmented_inputs]() {
+
+    //If there are 3 inputs, check if crops is having default values {0, 0, 0, 0}
+    //Else unsupported by NNAPI
+
+      if(augmented_inputs.size() == 3)
+      {
+        const uint32_t crops_buffer_index = node.inputs->data[2];
+        const TfLiteTensor* crops = interpreter->tensor(crops_buffer_index);
+        const int *crops_value = crops->data.i32;
+
+        //Check if crops is having default values {0, 0, 0, 0}
+        if(crops_value[0] != 0 || crops_value[1] != 0 || crops_value[2] != 0 || crops_value[3] != 0)
+        {
+          FATAL("BATCH_TO_SPACE_ND does not support Explicit crops in NNAPI");
+        }
+        else
+        {
+          //Restrict crops input and pass only other two inputs
+          augmented_inputs.pop_back();
+        }
+      }
+    };
+
+    auto add_split_params = [&add_scalar_int32, &augmented_inputs](void* data) {
+      // swap 1st and 2nd operand order
+      auto input_tensor = augmented_inputs[1];
+      auto axis = augmented_inputs[0];
+      augmented_inputs[0] = input_tensor;
+      augmented_inputs[1] = axis;
+
+      auto builtin = reinterpret_cast<TfLiteSplitParams*>(data);
+      add_scalar_int32(builtin->num_splits);
+    };
+
+    auto check_arg_max_input = [&interpreter, &augmented_inputs](void *data) {
+      auto params = reinterpret_cast<TfLiteArgMaxParams*>(data);
+      if (params->output_type != kTfLiteInt32)
+      {
+        FATAL("Cannot handle output type in NNAPI");
+      }
+
+      TfLiteTensor* axis_tensor = interpreter->tensor(augmented_inputs.back());
+      assert(axis_tensor->type == kTfLiteInt32);
+
+      int64_t count = 1;
+      for (int i = 0; i < axis_tensor->dims->size; ++i) {
+        count *= axis_tensor->dims->data[i];
+      }
+      assert(count == 1);
+    };
diff --git a/runtimes/libs/tflite/src/interp/FlatBufferBuilder.cpp b/runtimes/libs/tflite/src/interp/FlatBufferBuilder.cpp
new file mode 100644
index 000000000..f54e67202
--- /dev/null
+++ b/runtimes/libs/tflite/src/interp/FlatBufferBuilder.cpp
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "tflite/interp/FlatBufferBuilder.h"
+
+#include "tflite/ext/kernels/register.h"
+
+namespace nnfw
+{
+namespace tflite
+{
+
+std::unique_ptr<::tflite::Interpreter> FlatBufferBuilder::build(void) const
+{
+  std::unique_ptr<::tflite::Interpreter> interpreter;
+
+  nnfw::tflite::BuiltinOpResolver resolver;
+
+  ::tflite::InterpreterBuilder builder(_model, resolver);
+
+  builder(&interpreter);
+
+  return interpreter;
+}
+
+} // namespace tflite
+} // namespace nnfw
diff --git a/runtimes/libs/tflite/src/interp/FunctionBuilder.cpp b/runtimes/libs/tflite/src/interp/FunctionBuilder.cpp
new file mode 100644
index 000000000..599a4f393
--- /dev/null
+++ b/runtimes/libs/tflite/src/interp/FunctionBuilder.cpp
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "tflite/interp/FunctionBuilder.h"
+
+namespace nnfw
+{
+namespace tflite
+{
+
+std::unique_ptr<::tflite::Interpreter> FunctionBuilder::build(void) const
+{
+  auto res = std::unique_ptr<::tflite::Interpreter>{new ::tflite::Interpreter};
+
+  _fn(*res);
+
+  return res;
+}
+
+} // namespace tflite
+} // namespace nnfw
diff --git a/runtimes/libs/xdata/CMakeLists.txt b/runtimes/libs/xdata/CMakeLists.txt
new file mode 100644
index 000000000..23a08303b
--- /dev/null
+++ b/runtimes/libs/xdata/CMakeLists.txt
@@ -0,0 +1,7 @@
+add_library(nnfw_lib_xdata SHARED src/trace.cpp)
+target_include_directories(nnfw_lib_xdata PUBLIC include)
+target_link_libraries(nnfw_lib_xdata PUBLIC nnfw_lib_xray_event)
+target_link_libraries(nnfw_lib_xdata PRIVATE nnfw_common)
+target_link_libraries(nnfw_lib_xdata PRIVATE nnfw_coverage)
+
+install(TARGETS nnfw_lib_xdata LIBRARY DESTINATION lib)
diff --git a/runtimes/libs/xdata/README.md b/runtimes/libs/xdata/README.md
new file mode 100644
index 000000000..76b100936
--- /dev/null
+++ b/runtimes/libs/xdata/README.md
@@ -0,0 +1,3 @@
+# xdata
+
+_xdata_ is a collection of XRay data structures for performance analysis.
diff --git a/runtimes/libs/xdata/include/xdata.h b/runtimes/libs/xdata/include/xdata.h
new file mode 100644
index 000000000..4f291ef6b
--- /dev/null
+++ b/runtimes/libs/xdata/include/xdata.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_XDATA_H__
+#define __NNFW_XDATA_H__
+
+#include <xdata/trace.h>
+
+#endif // __NNFW_XDATA_H__
diff --git a/runtimes/libs/xdata/include/xdata/trace.h b/runtimes/libs/xdata/include/xdata/trace.h
new file mode 100644
index 000000000..700c39aaa
--- /dev/null
+++ b/runtimes/libs/xdata/include/xdata/trace.h
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_XDATA_TRACE_H__
+#define __NNFW_XDATA_TRACE_H__
+
+#include <xray/event_category.h>
+#include <xray/event_code.h>
+
+#include <memory>
+#include <string>
+
+namespace xdata
+{
+namespace trace
+{
+
+class region
+{
+public:
+  region(const char *s) : _name{s}
+  {
+    // DO NOTHING
+  }
+
+public:
+  const std::string &name(void) const { return _name; }
+
+private:
+  std::string _name;
+};
+
+enum action
+{
+  enter,
+  leave
+};
+
+class info final
+{
+public:
+  info(const trace::region *rgn, const trace::action &act) : _region{rgn}, _action{act}
+  {
+    // DO NOTHING
+  }
+
+public:
+  const trace::region *region(void) const { return _region; }
+  const trace::action &action(void) const { return _action; }
+
+private:
+  const trace::region *_region;
+  trace::action _action;
+};
+
+// WARN! This implementation is not thread-safe.
+// TODO Make this thread-safe
+class category final : public xray::event_category
+{
+private:
+  category() = default;
+
+public:
+  xray::event_code set(std::unique_ptr<trace::info> &&info);
+  void reset(void);
+
+public:
+  const trace::info *info(void) const { return _info.get(); }
+
+private:
+  std::unique_ptr<trace::info> _info;
+
+public:
+  static category *get(void);
+};
+
+static inline category *cat(void) { return category::get(); }
+
+} // namespace trace
+} // namespace xdata
+
+#endif // __NNFW_XDATA_TRACE_H__
diff --git a/runtimes/libs/xdata/src/trace.cpp b/runtimes/libs/xdata/src/trace.cpp
new file mode 100644
index 000000000..6f11847ae
--- /dev/null
+++ b/runtimes/libs/xdata/src/trace.cpp
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "xdata/trace.h"
+
+#include <cassert>
+
+namespace xdata
+{
+namespace trace
+{
+
+xray::event_code category::set(std::unique_ptr<trace::info> &&info)
+{
+  assert(info != nullptr);
+  _info = std::move(info);
+  return xray::event_code{0};
+}
+
+void category::reset(void) { _info.release(); }
+
+category *category::get(void)
+{
+  static category cat;
+  return &cat;
+}
+
+} // namespace trace
+} // namespace xdata
diff --git a/runtimes/libs/xprobe/CMakeLists.txt b/runtimes/libs/xprobe/CMakeLists.txt
new file mode 100644
index 000000000..006899b91
--- /dev/null
+++ b/runtimes/libs/xprobe/CMakeLists.txt
@@ -0,0 +1,9 @@
+add_library(nnfw_lib_xprobe SHARED src/trace.cpp)
+target_include_directories(nnfw_lib_xprobe PUBLIC include)
+target_link_libraries(nnfw_lib_xprobe PUBLIC nnfw_lib_xdata)
+target_link_libraries(nnfw_lib_xprobe PUBLIC nnfw_lib_xray_pipe)
+target_link_libraries(nnfw_lib_xprobe PRIVATE nnfw_lib_cpp14)
+target_link_libraries(nnfw_lib_xprobe PRIVATE nnfw_common)
+target_link_libraries(nnfw_lib_xprobe PRIVATE nnfw_coverage)
+
+install(TARGETS nnfw_lib_xprobe LIBRARY DESTINATION lib)
diff --git a/runtimes/libs/xprobe/include/xprobe.h b/runtimes/libs/xprobe/include/xprobe.h
new file mode 100644
index 000000000..df7a6188e
--- /dev/null
+++ b/runtimes/libs/xprobe/include/xprobe.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __XPROBE_H__
+#define __XPROBE_H__
+
+#include <xprobe/trace.h>
+
+/**
+ * HOW TO USE
+ *
+ * void f(args)
+ * {
+ *   XPROBE_INSTRUMENT_FUNCTION();
+ *
+ *   ...
+ * }
+ */
+#define XPROBE_INSTRUMENT_FUNCTION() \
+  ::xprobe::trace::logger __xprobe__##__LINE__ { __FUNCTION__ }
+
+/**
+ * HOW TO USE
+ *
+ * void f(args)
+ * {
+ *   if(cond)
+ *   {
+ *     XPROBE_INSTRUMENT_REGION("if branch");
+ *   }
+ * }
+ */
+#define XPROBE_INSTRUMENT_REGION(name) \
+  ::xprobe::trace::logger __xprobe__##__LINE__ { (name) }
+
+#endif // __XPROBE_H__
diff --git a/runtimes/libs/xprobe/include/xprobe/trace.h b/runtimes/libs/xprobe/include/xprobe/trace.h
new file mode 100644
index 000000000..4c466f31f
--- /dev/null
+++ b/runtimes/libs/xprobe/include/xprobe/trace.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_XPROBE_TRACE_LOGGER_H__
+#define __NNFW_XPROBE_TRACE_LOGGER_H__
+
+#include <xdata.h>
+
+#include <memory>
+
+namespace xprobe
+{
+namespace trace
+{
+
+class logger final
+{
+public:
+  logger(const char *s);
+
+public:
+  ~logger();
+
+private:
+  std::unique_ptr<xdata::trace::region> _region;
+};
+
+} // namespace trace
+} // namespace xprobe
+
+#endif // __NNFW_XPROBE_LOGGER_H__
diff --git a/runtimes/libs/xprobe/src/trace.cpp b/runtimes/libs/xprobe/src/trace.cpp
new file mode 100644
index 000000000..600ef69fa
--- /dev/null
+++ b/runtimes/libs/xprobe/src/trace.cpp
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "xprobe/trace.h"
+
+#include <xray/pipe.h>
+
+#include <cpp14/memory.h>
+
+#include <cassert>
+
+static bool enabled = (xray::pipe::post != nullptr);
+
+namespace xprobe
+{
+namespace trace
+{
+
+logger::logger(const char *s)
+{
+  if (enabled)
+  {
+    _region = nnfw::cpp14::make_unique<xdata::trace::region>(s);
+
+    auto xprobe_duration_cat = xdata::trace::category::get();
+
+    auto evt_info =
+        nnfw::cpp14::make_unique<xdata::trace::info>(_region.get(), xdata::trace::enter);
+    auto evt_cat = xprobe_duration_cat;
+    auto evt_idx = xprobe_duration_cat->set(std::move(evt_info));
+
+    const xray::event evt{evt_cat, evt_idx};
+    xray::pipe::post(&evt);
+    xprobe_duration_cat->reset();
+  }
+}
+
+logger::~logger()
+{
+  if (enabled)
+  {
+    assert(_region != nullptr);
+
+    auto xprobe_duration_cat = xdata::trace::category::get();
+
+    auto evt_info =
+        nnfw::cpp14::make_unique<xdata::trace::info>(_region.get(), xdata::trace::leave);
+    auto evt_cat = xprobe_duration_cat;
+    auto evt_idx = xprobe_duration_cat->set(std::move(evt_info));
+
+    const xray::event evt{evt_cat, evt_idx};
+    xray::pipe::post(&evt);
+    xprobe_duration_cat->reset();
+  }
+}
+
+} // namespace trace
+} // namespace xprobe
diff --git a/runtimes/libs/xray/CMakeLists.txt b/runtimes/libs/xray/CMakeLists.txt
new file mode 100644
index 000000000..5d46daa52
--- /dev/null
+++ b/runtimes/libs/xray/CMakeLists.txt
@@ -0,0 +1,3 @@
+add_subdirectory(event)
+add_subdirectory(pipe)
+add_subdirectory(mux)
diff --git a/runtimes/libs/xray/event/CMakeLists.txt b/runtimes/libs/xray/event/CMakeLists.txt
new file mode 100644
index 000000000..a5c44c099
--- /dev/null
+++ b/runtimes/libs/xray/event/CMakeLists.txt
@@ -0,0 +1,2 @@
+add_library(nnfw_lib_xray_event INTERFACE)
+target_include_directories(nnfw_lib_xray_event INTERFACE include)
diff --git a/runtimes/libs/xray/event/include/xray/event.h b/runtimes/libs/xray/event/include/xray/event.h
new file mode 100644
index 000000000..3c6fbba5b
--- /dev/null
+++ b/runtimes/libs/xray/event/include/xray/event.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_XRAY_EVENT_H__
+#define __NNFW_XRAY_EVENT_H__
+
+#include "xray/event_category.h"
+#include "xray/event_code.h"
+
+namespace xray
+{
+
+/**
+ * @brief Abstract event
+ *
+ * "event" class describes an abstract event that XRay recognizes, which consists of its category
+ * and code.
+ *
+ * The interpretation depends on "category" that it belongs to.
+ */
+class event final
+{
+public:
+  event(const event_category *cat, const event_code &code) : _cat{cat}, _code{code}
+  {
+    // DO NOTHING
+  }
+
+public:
+  const event_category *cat(void) const { return _cat; }
+  const event_code &code(void) const { return _code; }
+
+private:
+  const event_category *_cat;
+  event_code _code;
+};
+
+} // namespace xray
+
+#endif // __NNFW_XRAY_EVENT_H__
diff --git a/runtimes/libs/xray/event/include/xray/event_category.h b/runtimes/libs/xray/event/include/xray/event_category.h
new file mode 100644
index 000000000..4984adeab
--- /dev/null
+++ b/runtimes/libs/xray/event/include/xray/event_category.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_XRAY_EVENT_CATEGORY_H__
+#define __NNFW_XRAY_EVENT_CATEGORY_H__
+
+namespace xray
+{
+
+/**
+ * Each derived category is expected to have static "get" method.
+ */
+struct event_category
+{
+  // Non-virtual
+};
+
+} // namespace xray
+
+#endif // __NNFW_XRAY_EVENT_CATEGORY_H__
diff --git a/runtimes/libs/xray/event/include/xray/event_code.h b/runtimes/libs/xray/event/include/xray/event_code.h
new file mode 100644
index 000000000..6879e5455
--- /dev/null
+++ b/runtimes/libs/xray/event/include/xray/event_code.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_XRAY_EVENT_CODE_H__
+#define __NNFW_XRAY_EVENT_CODE_H__
+
+#include <cstdint>
+
+namespace xray
+{
+
+class event_code final
+{
+public:
+  explicit event_code(uint64_t value) : _value{value}
+  {
+    // DO NOTHING
+  }
+
+public:
+  const uint64_t &value(void) const { return _value; }
+
+private:
+  uint64_t _value;
+};
+
+} // namespace xray
+
+#endif // __NNFW_XRAY_EVENT_CODE_H__
diff --git a/runtimes/libs/xray/mux/CMakeLists.txt b/runtimes/libs/xray/mux/CMakeLists.txt
new file mode 100644
index 000000000..e020cd877
--- /dev/null
+++ b/runtimes/libs/xray/mux/CMakeLists.txt
@@ -0,0 +1,9 @@
+add_library(nnfw_lib_xray_mux SHARED src/mux.cc)
+set_target_properties(nnfw_lib_xray_mux PROPERTIES POSITION_INDEPENDENT_CODE ON)
+target_include_directories(nnfw_lib_xray_mux PUBLIC include)
+target_link_libraries(nnfw_lib_xray_mux PUBLIC nnfw_lib_xray_event)
+target_link_libraries(nnfw_lib_xray_mux PUBLIC nnfw_lib_xray_pipe)
+target_link_libraries(nnfw_lib_xray_mux PRIVATE nnfw_common)
+target_link_libraries(nnfw_lib_xray_mux PRIVATE nnfw_coverage)
+
+install(TARGETS nnfw_lib_xray_mux LIBRARY DESTINATION lib)
diff --git a/runtimes/libs/xray/mux/include/xray/mux.h b/runtimes/libs/xray/mux/include/xray/mux.h
new file mode 100644
index 000000000..4cdfc1482
--- /dev/null
+++ b/runtimes/libs/xray/mux/include/xray/mux.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_XRAY_MUX_H__
+#define __NNFW_XRAY_MUX_H__
+
+#include <xray/event.h>
+
+#include <set>
+
+namespace xray
+{
+
+struct listener
+{
+  virtual ~listener() = default;
+
+  virtual void notify(const event *) = 0;
+};
+
+class mux
+{
+private:
+  // Use "get()" below
+  mux() = default;
+
+public:
+  void attach(listener *l) { _listeners.insert(l); }
+  void detach(listener *l) { _listeners.erase(l); }
+
+public:
+  void notify(const event *e) const
+  {
+    for (auto listener : _listeners)
+    {
+      listener->notify(e);
+    }
+  }
+
+private:
+  std::set<listener *> _listeners;
+
+public:
+  static mux &get(void);
+};
+
+} // namespace xray
+
+#endif // __NNFW_XRAY_MUX_H__
diff --git a/runtimes/libs/xray/mux/src/mux.cc b/runtimes/libs/xray/mux/src/mux.cc
new file mode 100644
index 000000000..a224294dd
--- /dev/null
+++ b/runtimes/libs/xray/mux/src/mux.cc
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "xray/mux.h"
+
+#define XRAY_TRACER
+#include <xray/pipe.h>
+#undef XRAY_TRACER
+
+namespace xray
+{
+
+mux &mux::get(void)
+{
+  static mux m;
+  return m;
+}
+
+void pipe::post(const event *e) { mux::get().notify(e); }
+
+} // namespace xray
diff --git a/runtimes/libs/xray/pipe/CMakeLists.txt b/runtimes/libs/xray/pipe/CMakeLists.txt
new file mode 100644
index 000000000..19f8e507e
--- /dev/null
+++ b/runtimes/libs/xray/pipe/CMakeLists.txt
@@ -0,0 +1,3 @@
+add_library(nnfw_lib_xray_pipe INTERFACE)
+target_include_directories(nnfw_lib_xray_pipe INTERFACE include)
+target_link_libraries(nnfw_lib_xray_pipe INTERFACE nnfw_lib_xray_event)
diff --git a/runtimes/libs/xray/pipe/include/xray/pipe.h b/runtimes/libs/xray/pipe/include/xray/pipe.h
new file mode 100644
index 000000000..3a9eb5c96
--- /dev/null
+++ b/runtimes/libs/xray/pipe/include/xray/pipe.h
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_XRAY_PIPE_H__
+#define __NNFW_XRAY_PIPE_H__
+
+#include <xray/event.h>
+
+/**
+ * Define XRAY_TRACER before include this file for tracer implementation
+ */
+#ifndef XRAY_ATTR
+#ifdef XRAY_TRACER
+#define XRAY_ATTR __attribute__(())
+#else
+#define XRAY_ATTR __attribute__((weak))
+#endif // XRAY_TRACER
+#endif // XRAY_ATTR
+
+namespace xray
+{
+
+/**
+ * @brief A lightweight communication channel between tracee-tracer
+ *
+ * NOTE 1.
+ *
+ * "pipe" intentionally begins with a lowercase to use the following code pattern:
+ *
+ *    xray::pipe::post(...)
+ *
+ * NOTE 2.
+ *
+ * The use of static member method here enables early error detection.
+ *
+ * For example, C++ compiler is unable to detect the following error at compile-time.
+ *
+ * "Method.h"
+ *   void meth(T);
+ *
+ * "Method.cpp"
+ *   void meth(U) { ... }
+ *
+ * The following error, on the other hand, is detected at compile-time.
+ *
+ * "Method.h"
+ *   struct K { void meth(T); }
+ *
+ * "Method.cpp"
+ *   void K::meth(U) { ... }
+ *
+ */
+struct pipe
+{
+  /**
+   * @brief Post event through underlying pipe
+   *
+   * WARNING FOR TRACER IMPLEMENTOR
+   *
+   *   There is no guarantee that event is valid after post call.
+   *   Use event only inside post method implementation, or copy its content if necessary.
+   *
+   * WARNING FOR TRACEE IMPELEMENTOR
+   *
+   *   xray framework does not release any resource. Be careful about resource leak.
+   */
+  static XRAY_ATTR void post(const event *);
+};
+
+} // namespace xray
+
+#endif // __NNFW_XRAY_PIPE_H__
diff --git a/runtimes/logging/CMakeLists.txt b/runtimes/logging/CMakeLists.txt
index 788b94372..956890b30 100644
--- a/runtimes/logging/CMakeLists.txt
+++ b/runtimes/logging/CMakeLists.txt
@@ -1,5 +1,8 @@
 file(GLOB_RECURSE NNAPI_LOGGING_SRCS "src/*.cc")
 
+nnfw_find_package(Boost REQUIRED)
+
 add_library(neuralnetworks SHARED ${NNAPI_LOGGING_SRCS})
-target_include_directories(neuralnetworks PUBLIC ${NNFW_INCLUDE_DIR})
 target_include_directories(neuralnetworks PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/include)
+target_include_directories(neuralnetworks PRIVATE ${Boost_INCLUDE_DIRS})
+target_link_libraries(neuralnetworks PUBLIC nnfw-header)
diff --git a/runtimes/logging/src/nnapi_logging.cc b/runtimes/logging/src/nnapi_logging.cc
index d3c7b0fec..14f2369ec 100644
--- a/runtimes/logging/src/nnapi_logging.cc
+++ b/runtimes/logging/src/nnapi_logging.cc
@@ -118,15 +118,9 @@ struct ANeuralNetworksEvent
 {
 };
 
-int ANeuralNetworksEvent_wait(ANeuralNetworksEvent *event)
-{
-  return ANEURALNETWORKS_NO_ERROR;
-}
+int ANeuralNetworksEvent_wait(ANeuralNetworksEvent *event) { return ANEURALNETWORKS_NO_ERROR; }
 
-void ANeuralNetworksEvent_free(ANeuralNetworksEvent *event)
-{
-  delete event;
-}
+void ANeuralNetworksEvent_free(ANeuralNetworksEvent *event) { delete event; }
 
 //
 // Memory
@@ -149,8 +143,8 @@ int ANeuralNetworksMemory_createFromFd(size_t size, int protect, int fd, size_t
 
 void ANeuralNetworksMemory_free(ANeuralNetworksMemory *memory)
 {
-  delete memory;
   std::cout << __FUNCTION__ << "(" << memory << ")" << std::endl;
+  delete memory;
 }
 
 //
@@ -216,8 +210,7 @@ int ANeuralNetworksModel_setOperandValue(ANeuralNetworksModel *model, int32_t in
   return ANEURALNETWORKS_NO_ERROR;
 }
 
-int ANeuralNetworksModel_setOperandValueFromMemory(ANeuralNetworksModel *model,
-                                                   int32_t index,
+int ANeuralNetworksModel_setOperandValueFromMemory(ANeuralNetworksModel *model, int32_t index,
                                                    const ANeuralNetworksMemory *memory,
                                                    size_t offset, size_t length)
 {
@@ -257,8 +250,7 @@ int ANeuralNetworksModel_addOperationEx(ANeuralNetworksModel *model,
                                         const uint32_t *inputs, uint32_t outputCount,
                                         const uint32_t *outputs)
 {
-  std::cout << __FUNCTION__ << "(model: " << model
-            << ", type: " << type
+  std::cout << __FUNCTION__ << "(model: " << model << ", type: " << type
             << ", inputCount: " << inputCount << ", outputCount: " << outputCount << ")"
             << std::endl;
 
@@ -274,11 +266,8 @@ int ANeuralNetworksModel_addOperationEx(ANeuralNetworksModel *model,
   return ANEURALNETWORKS_NO_ERROR;
 }
 
-
-int ANeuralNetworksModel_identifyInputsAndOutputs(ANeuralNetworksModel *model,
-                                                  uint32_t inputCount,
-                                                  const uint32_t *inputs,
-                                                  uint32_t outputCount,
+int ANeuralNetworksModel_identifyInputsAndOutputs(ANeuralNetworksModel *model, uint32_t inputCount,
+                                                  const uint32_t *inputs, uint32_t outputCount,
                                                   const uint32_t *outputs)
 {
   std::cout << __FUNCTION__ << "(model: " << model << ")" << std::endl;
@@ -355,8 +344,8 @@ int ANeuralNetworksExecution_create(ANeuralNetworksCompilation *compilation,
 // ANeuralNetworksExecution_setInput and ANeuralNetworksExecution_setOutput specify HOST buffer for
 // input/output
 int ANeuralNetworksExecution_setInput(ANeuralNetworksExecution *execution, int32_t index,
-                                      const ANeuralNetworksOperandType *type,
-                                      const void *buffer, size_t length)
+                                      const ANeuralNetworksOperandType *type, const void *buffer,
+                                      size_t length)
 {
   std::cout << __FUNCTION__ << "(execution: " << execution << ", type: ";
 
@@ -402,3 +391,9 @@ void ANeuralNetworksExecution_free(ANeuralNetworksExecution *execution)
 
   delete execution;
 }
+
+void ANeuralNetworksCompilation_free(ANeuralNetworksCompilation *compilation)
+{
+  std::cout << __FUNCTION__ << "(compilation: " << compilation << ")" << std::endl;
+  delete compilation;
+}
diff --git a/runtimes/neurun/CMakeLists.txt b/runtimes/neurun/CMakeLists.txt
index 92547da2c..6d3822c2f 100644
--- a/runtimes/neurun/CMakeLists.txt
+++ b/runtimes/neurun/CMakeLists.txt
@@ -1,59 +1,10 @@
 # Add cpu
 
-set(NEURUN_INCLUDE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/src)
-
-# Build kernels
-set(LIB_NEURUN_KERNEL_CPU neurun_kernel_cpu)
-set(LIB_NEURUN_KERNEL_ACL_CL neurun_kernel_acl_cl)
-add_subdirectory(src/kernel)
-
-# Build backends
-set(LIB_NEURUN_BACKEND_CPU neurun_backend_cpu)
-set(LIB_NEURUN_BACKEND_ACL_CL neurun_backend_acl_cl)
-add_subdirectory(src/backend)
-
-file(GLOB SOURCES "src/*.cc")
-file(GLOB_RECURSE SOURCES_FRONTEND "src/frontend/*.cc")
-file(GLOB SOURCES_BACKEND "src/backend/*.cc")
-file(GLOB_RECURSE SOURCES_INTERNAL "src/internal/*.cc")
-file(GLOB_RECURSE SOURCES_GRAPH "src/graph/*.cc")
-file(GLOB_RECURSE SOURCES_LINEAR "src/linear/*.cc")
-file(GLOB_RECURSE SOURCES_DUMPER "src/dumper/*.cc")
-file(GLOB_RECURSE SOURCES_COMPILER "src/compiler/*.cc")
-file(GLOB_RECURSE SOURCES_VERIFIER "src/verifier/*.cc")
-file(GLOB_RECURSE SOURCES_UTIL "src/util/*.cc")
-file(GLOB_RECURSE SOURCES_MODEL "src/model/*.cc")
-
-set(SOURCES ${SOURCES} ${SOURCES_FRONTEND} ${SOURCES_BACKEND} ${SOURCES_INTERNAL} ${SOURCES_GRAPH} ${SOURCES_LINEAR} ${SOURCES_DUMPER} ${SOURCES_COMPILER} ${SOURCES_VERIFIER} ${SOURCES_UTIL} ${SOURCES_MODEL})
-
-add_library(${LIB_NEURUN} SHARED ${SOURCES})
-target_include_directories(${LIB_NEURUN} PUBLIC ${NNFW_INCLUDE_DIR})
-target_include_directories(${LIB_NEURUN} PUBLIC ${NEURUN_INCLUDE_DIR})
-target_include_directories(${LIB_NEURUN} PUBLIC ${CMAKE_SOURCE_DIR}/externals/tensorflow)
-target_link_libraries(${LIB_NEURUN} tensorflow-lite)
-target_link_libraries(${LIB_NEURUN} nnfw_lib_misc)
-target_link_libraries(${LIB_NEURUN} nnfw_lib_cpp14)
-
-target_compile_options(${LIB_NEURUN} PRIVATE -Wall -Wextra -Werror -Wno-unused-parameter)
-
-set_target_properties(${LIB_NEURUN} PROPERTIES OUTPUT_NAME neuralnetworks)
-
-install(TARGETS ${LIB_NEURUN} DESTINATION lib/neurun)
-
-
-# Unit Tests
-
-set(TEST_NEURUN test_neurun)
-
-file(GLOB_RECURSE TESTS "test/*.cc")
-
-add_executable(${TEST_NEURUN} ${TESTS})
-target_link_libraries(${TEST_NEURUN} ${LIB_NEURUN})
-target_link_libraries(${TEST_NEURUN} gtest)
-target_link_libraries(${TEST_NEURUN} gtest_main)
-target_link_libraries(${TEST_NEURUN} ${LIB_PTHREAD})
-target_link_libraries(${TEST_NEURUN} ${LIB_NEURUN_BACKEND_CPU})
-target_link_libraries(${TEST_NEURUN} ${LIB_NEURUN_BACKEND_ACL_CL})
-add_test(${TEST_NEURUN} ${TEST_NEURUN})
-
-install(TARGETS ${TEST_NEURUN} DESTINATION unittest)
+# TODO Remove this variable as adding include dirs is done with target_link_libraries
+#      (currently used by cpu/acl_cl kernel module which is not proper)
+set(NEURUN_INCLUDE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/core/include)
+
+add_subdirectory(backend)
+add_subdirectory(frontend)
+add_subdirectory(core)
+add_subdirectory(test)
diff --git a/runtimes/neurun/backend/CMakeLists.txt b/runtimes/neurun/backend/CMakeLists.txt
new file mode 100644
index 000000000..27e1ae25f
--- /dev/null
+++ b/runtimes/neurun/backend/CMakeLists.txt
@@ -0,0 +1,8 @@
+set(LIB_NEURUN_BACKEND_ACL_COMMON neurun_backend_acl_common)
+
+add_subdirectory(cpu)
+add_subdirectory(acl_cl)
+add_subdirectory(acl_neon)
+add_subdirectory(acl_common)
+add_subdirectory(hi_perf_cpu)
+add_subdirectory(srcn)
diff --git a/runtimes/neurun/backend/acl_cl/Backend.h b/runtimes/neurun/backend/acl_cl/Backend.h
new file mode 100644
index 000000000..7c69d7b40
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/Backend.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_CL_BACKEND_H__
+#define __NEURUN_BACKEND_ACL_CL_BACKEND_H__
+
+#include <memory>
+#include <backend/Backend.h>
+#include <model/Operands.h>
+
+#include "Config.h"
+#include "ConstantInitializer.h"
+#include "KernelGenerator.h"
+#include "ShapeFixer.h"
+#include "TensorManager.h"
+#include "backend/CustomKernelRegistry.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+
+class Backend : public ::neurun::backend::Backend
+{
+public:
+  Backend() : _config{std::make_shared<Config>()} {}
+
+  std::shared_ptr<IConfig> config() const override { return _config; }
+
+  std::unique_ptr<BackendContext>
+  newContext(const model::Operands &operands,
+             const std::shared_ptr<custom::KernelRegistry> &) const override
+  {
+    auto tensor_builder = std::make_shared<TensorBuilder>(createTensorManager());
+    return std::unique_ptr<BackendContext>{new BackendContext{
+        this, tensor_builder, std::make_shared<ConstantInitializer>(operands, tensor_builder),
+        std::make_shared<KernelGenerator>(operands, tensor_builder),
+        std::make_shared<ShapeFixer>(operands, tensor_builder)}};
+  }
+
+private:
+  std::shared_ptr<IConfig> _config;
+};
+
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_CL_BACKEND_H__
diff --git a/runtimes/neurun/backend/acl_cl/CLTimer.h b/runtimes/neurun/backend/acl_cl/CLTimer.h
new file mode 100644
index 000000000..3939ee722
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/CLTimer.h
@@ -0,0 +1,108 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_CL_CLTIMER_H__
+#define __NEURUN_BACKEND_ACL_CL_CLTIMER_H__
+
+#include <util/ITimer.h>
+#include <arm_compute/core/CL/OpenCL.h>
+#include <arm_compute/runtime/CL/CLScheduler.h>
+#include <chrono>
+#include <list>
+#include <sstream>
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+
+/**
+ * @brief Class to measure CL kernels execution time
+ */
+class CLTimer : public util::ITimer
+{
+public:
+  /**
+   * @brief This function replaces CL function, which enqueues a command to execute a kernel
+   *        with a wrapper which remembers enqueued kernels
+   */
+  void handleBegin() override
+  {
+    _measured_events.clear();
+
+    _origin_enqueue_function = arm_compute::CLSymbols::get().clEnqueueNDRangeKernel_ptr;
+
+    auto _timer_enqueue_function = [this](cl_command_queue command_queue, cl_kernel kernel,
+                                          cl_uint work_dim, const size_t *gwo, const size_t *gws,
+                                          const size_t *lws, cl_uint num_events_in_wait_list,
+                                          const cl_event *event_wait_list, cl_event *usr_event) {
+      cl_event event;
+      cl_int enqueue_res =
+          this->_origin_enqueue_function(command_queue, kernel, work_dim, gwo, gws, lws,
+                                         num_events_in_wait_list, event_wait_list, &event);
+      this->_measured_events.emplace_back(event);
+
+      // According to spec, if NULL was provided in usr_event - event shouldn't be returned
+      if (usr_event != nullptr)
+      {
+        clRetainEvent(event);
+        *usr_event = event;
+      }
+      return enqueue_res;
+    };
+    arm_compute::CLSymbols::get().clEnqueueNDRangeKernel_ptr = _timer_enqueue_function;
+
+    // Set CL_QUEUE_PROFILING_ENABLE flag for the CL command-queue, if it isn't already set
+    auto &cl_scheduler = arm_compute::CLScheduler::get();
+    auto props = cl_scheduler.queue().getInfo<CL_QUEUE_PROPERTIES>();
+    if ((props & CL_QUEUE_PROFILING_ENABLE) == 0)
+    {
+      cl_scheduler.set_queue(
+          cl::CommandQueue(cl_scheduler.context(), props | CL_QUEUE_PROFILING_ENABLE));
+    }
+  };
+
+  /**
+   * @brief Get timer result by addition executed CL kernels durations
+   */
+  void handleEnd() override
+  {
+    _timer_res = 0;
+    for (auto const &event : _measured_events)
+    {
+      cl_ulong start;
+      cl_ulong end;
+      event.getProfilingInfo(CL_PROFILING_COMMAND_START, &start);
+      event.getProfilingInfo(CL_PROFILING_COMMAND_END, &end);
+      _timer_res += (end - start) / 1000.f; // nanoseconds -> microseconds
+    }
+
+    // Restore origin CL enqueue function
+    arm_compute::CLSymbols::get().clEnqueueNDRangeKernel_ptr = _origin_enqueue_function;
+  };
+
+private:
+  std::function<decltype(clEnqueueNDRangeKernel)> _origin_enqueue_function;
+  std::list<::cl::Event> _measured_events;
+};
+
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_CL_CLTIMER_H__
diff --git a/runtimes/neurun/backend/acl_cl/CMakeLists.txt b/runtimes/neurun/backend/acl_cl/CMakeLists.txt
new file mode 100644
index 000000000..7d7b50cf0
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/CMakeLists.txt
@@ -0,0 +1,21 @@
+# Unsupported architecture
+nnfw_find_package(ARMCompute QUIET)
+if(NOT ARMCompute_FOUND)
+  return()
+endif(NOT ARMCompute_FOUND)
+
+set(LIB_NEURUN_BACKEND_ACL_CL neurun_backend_acl_cl)
+
+file(GLOB_RECURSE SOURCES "*.cc")
+
+add_library(${LIB_NEURUN_BACKEND_ACL_CL} SHARED ${SOURCES})
+
+target_include_directories(${LIB_NEURUN_BACKEND_ACL_CL} PRIVATE ${CMAKE_CURRENT_SOURCE_DIR})
+target_link_libraries(${LIB_NEURUN_BACKEND_ACL_CL} PRIVATE neurun_core)
+target_link_libraries(${LIB_NEURUN_BACKEND_ACL_CL} PRIVATE ${LIB_NEURUN_BACKEND_ACL_COMMON})
+target_link_libraries(${LIB_NEURUN_BACKEND_ACL_CL} PRIVATE nnfw_common)
+target_link_libraries(${LIB_NEURUN_BACKEND_ACL_CL} PRIVATE nnfw_coverage)
+
+set_target_properties(${LIB_NEURUN_BACKEND_ACL_CL} PROPERTIES OUTPUT_NAME backend_acl_cl)
+
+install(TARGETS ${LIB_NEURUN_BACKEND_ACL_CL} DESTINATION lib)
diff --git a/runtimes/neurun/backend/acl_cl/Config.cc b/runtimes/neurun/backend/acl_cl/Config.cc
new file mode 100644
index 000000000..0c0769184
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/Config.cc
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+// For CLKernelLibraryEx initialization
+#include "arm_compute/core/CL/CLHelpers.h"
+#include "arm_compute/core/CL/CLKernelLibrary.h"
+#include "arm_compute/core/CL/CLKernelLibraryEx.h"
+
+#include <arm_compute/runtime/CL/CLScheduler.h>
+
+#include "Config.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+
+void Config::initialize()
+{
+  arm_compute::CLScheduler::get().default_init();
+  // NOTE CLKernelLibraryEx must use the same context as CLScheduler
+  // It did not check whether another device is available.
+  arm_compute::CLKernelLibraryEx::get().init(
+      "./cl_kernels/", arm_compute::CLScheduler::get().context(), cl::Device::getDefault());
+}
+
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/acl_cl/Config.h b/runtimes/neurun/backend/acl_cl/Config.h
new file mode 100644
index 000000000..185765161
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/Config.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_CL_CONFIG_H__
+#define __NEURUN_BACKEND_ACL_CL_CONFIG_H__
+
+#include "CLTimer.h"
+#include <cpp14/memory.h>
+#include <backend/IConfig.h>
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+
+class Config : public IConfig
+{
+public:
+  std::string id() override { return "acl_cl"; }
+  void initialize() override;
+  bool SupportSubTensorAlloc() override { return true; }
+  std::unique_ptr<util::ITimer> timer() override { return nnfw::cpp14::make_unique<CLTimer>(); }
+};
+
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_CL_CONFIG_H__
diff --git a/runtimes/neurun/backend/acl_cl/ConstantInitializer.cc b/runtimes/neurun/backend/acl_cl/ConstantInitializer.cc
new file mode 100644
index 000000000..0a8f536ec
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/ConstantInitializer.cc
@@ -0,0 +1,214 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ConstantInitializer.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+
+ConstantInitializer::ConstantInitializer(const model::Operands &operands,
+                                         const std::shared_ptr<TensorBuilder> &tensor_builder)
+    : _operands{operands}, _tensor_builder{tensor_builder}
+{
+  // DO NOTHING
+}
+
+void ConstantInitializer::run()
+{
+  for (const auto &it : _init_map)
+  {
+    const auto &ind = it.first;
+    const auto &fn = it.second;
+
+    const auto &model_obj = _operands.at(ind);
+    auto tensor_obj = _tensor_builder->wrapTensor(ind);
+    fn(model_obj, *tensor_obj);
+  }
+
+  _init_map.clear();
+}
+
+void ConstantInitializer::visit(const model::operation::Conv2DNode &node)
+{
+  const auto &kernel_index = node.getInputs().at(model::operation::Conv2DNode::KERNEL);
+  const auto &kernel_obj = _operands.at(kernel_index);
+  registerPermuteInitializer(kernel_index, kernel_obj);
+
+  const auto &bias_index = node.getInputs().at(model::operation::Conv2DNode::BIAS);
+  const auto &bias_obj = _operands.at(bias_index);
+  registerCopyInitializer(bias_index, bias_obj);
+}
+
+void ConstantInitializer::visit(const model::operation::DepthwiseConv2DNode &node)
+{
+  const auto &kernel_index = node.getInputs().at(model::operation::DepthwiseConv2DNode::KERNEL);
+  const auto &kernel_obj = _operands.at(kernel_index);
+  registerPermuteInitializer(kernel_index, kernel_obj);
+
+  const auto &bias_index = node.getInputs().at(model::operation::DepthwiseConv2DNode::BIAS);
+  const auto &bias_obj = _operands.at(bias_index);
+  registerCopyInitializer(bias_index, bias_obj);
+}
+
+void ConstantInitializer::visit(const model::operation::EmbeddingLookupNode &node)
+{
+  const auto &lookups_index = node.getInputs().at(model::operation::EmbeddingLookupNode::LOOKUPS);
+  const auto &lookups_obj = _operands.at(lookups_index);
+  registerCopyInitializer(lookups_index, lookups_obj);
+}
+
+void ConstantInitializer::visit(const model::operation::FullyConnectedNode &node)
+{
+  const auto &weight_index = node.getInputs().at(model::operation::FullyConnectedNode::WEIGHT);
+  const auto &weight_obj = _operands.at(weight_index);
+  registerCopyInitializer(weight_index, weight_obj);
+
+  const auto &bias_index = node.getInputs().at(model::operation::FullyConnectedNode::BIAS);
+  const auto &bias_obj = _operands.at(bias_index);
+  registerCopyInitializer(bias_index, bias_obj);
+}
+
+void ConstantInitializer::visit(const model::operation::GatherNode &node)
+{
+  const auto &indices_index = node.getInputs().at(model::operation::GatherNode::INDICES);
+  const auto &indices_obj = _operands.at(indices_index);
+  registerCopyInitializer(indices_index, indices_obj);
+}
+
+void ConstantInitializer::visit(const model::operation::HashtableLookupNode &node)
+{
+  const auto &lookups_index = node.getInputs().at(model::operation::HashtableLookupNode::LOOKUPS);
+  const auto &lookups_obj = _operands.at(lookups_index);
+  registerCopyInitializer(lookups_index, lookups_obj);
+
+  const auto &keys_index = node.getInputs().at(model::operation::HashtableLookupNode::KEYS);
+  const auto &keys_obj = _operands.at(keys_index);
+  registerCopyInitializer(keys_index, keys_obj);
+}
+
+void ConstantInitializer::visit(const model::operation::LSTMNode &node)
+{
+  const auto &input_to_input_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::INPUT_TO_INPUT_WEIGHTS);
+  const auto &input_to_input_weights_obj = _operands.at(input_to_input_weights_index);
+  registerCopyInitializer(input_to_input_weights_index, input_to_input_weights_obj);
+
+  const auto &input_to_forget_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::INPUT_TO_FORGET_WEIGHTS);
+  const auto &input_to_forget_weights_obj = _operands.at(input_to_forget_weights_index);
+  registerCopyInitializer(input_to_forget_weights_index, input_to_forget_weights_obj);
+
+  const auto &input_to_cell_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::INPUT_TO_CELL_WEIGHTS);
+  const auto &input_to_cell_weights_obj = _operands.at(input_to_cell_weights_index);
+  registerCopyInitializer(input_to_cell_weights_index, input_to_cell_weights_obj);
+
+  const auto &input_to_output_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::INPUT_TO_OUTPUT_WEIGHTS);
+  const auto &input_to_output_weights_obj = _operands.at(input_to_output_weights_index);
+  registerCopyInitializer(input_to_output_weights_index, input_to_output_weights_obj);
+
+  const auto &recurrent_to_input_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::RECURRENT_TO_INPUT_WEIGHTS);
+  const auto &recurrent_to_input_weights_obj = _operands.at(recurrent_to_input_weights_index);
+  registerCopyInitializer(recurrent_to_input_weights_index, recurrent_to_input_weights_obj);
+
+  const auto &recurrent_to_forget_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::RECURRENT_TO_FORGET_WEIGHTS);
+  const auto &recurrent_to_forget_weights_obj = _operands.at(recurrent_to_forget_weights_index);
+  registerCopyInitializer(recurrent_to_forget_weights_index, recurrent_to_forget_weights_obj);
+
+  const auto &recurrent_to_cell_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::RECURRENT_TO_CELL_WEIGHTS);
+  const auto &recurrent_to_cell_weights_obj = _operands.at(recurrent_to_cell_weights_index);
+  registerCopyInitializer(recurrent_to_cell_weights_index, recurrent_to_cell_weights_obj);
+
+  const auto &recurrent_to_output_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::RECURRENT_TO_OUTPUT_WEIGHTS);
+  const auto &recurrent_to_output_weights_obj = _operands.at(recurrent_to_output_weights_index);
+  registerCopyInitializer(recurrent_to_output_weights_index, recurrent_to_output_weights_obj);
+
+  const auto &cell_to_input_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::CELL_TO_INPUT_WEIGHTS);
+  const auto &cell_to_input_weights_obj = _operands.at(cell_to_input_weights_index);
+  registerCopyInitializer(cell_to_input_weights_index, cell_to_input_weights_obj);
+
+  const auto &cell_to_forget_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::CELL_TO_FORGET_WEIGHTS);
+  const auto &cell_to_forget_weights_obj = _operands.at(cell_to_forget_weights_index);
+  registerCopyInitializer(cell_to_forget_weights_index, cell_to_forget_weights_obj);
+
+  const auto &cell_to_output_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::CELL_TO_OUTPUT_WEIGHTS);
+  const auto &cell_to_output_weights_obj = _operands.at(cell_to_output_weights_index);
+  registerCopyInitializer(cell_to_output_weights_index, cell_to_output_weights_obj);
+
+  const auto &input_gate_bias_index =
+      node.getInputs().at(model::operation::LSTMNode::INPUT_GATE_BIAS);
+  const auto &input_gate_bias_obj = _operands.at(input_gate_bias_index);
+  registerCopyInitializer(input_gate_bias_index, input_gate_bias_obj);
+
+  const auto &forget_gate_bias_index =
+      node.getInputs().at(model::operation::LSTMNode::FORGET_GATE_BIAS);
+  const auto &forget_gate_bias_obj = _operands.at(forget_gate_bias_index);
+  registerCopyInitializer(forget_gate_bias_index, forget_gate_bias_obj);
+
+  const auto &output_gate_bias_index =
+      node.getInputs().at(model::operation::LSTMNode::OUTPUT_GATE_BIAS);
+  const auto &output_gate_bias_obj = _operands.at(output_gate_bias_index);
+  registerCopyInitializer(output_gate_bias_index, output_gate_bias_obj);
+
+  const auto &projection_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::PROJECTION_WEIGHTS);
+  const auto &projection_weights_obj = _operands.at(projection_weights_index);
+  registerCopyInitializer(projection_weights_index, projection_weights_obj);
+
+  const auto &projection_bias_index =
+      node.getInputs().at(model::operation::LSTMNode::PROJECTION_BIAS);
+  const auto &projection_bias_obj = _operands.at(projection_bias_index);
+  registerCopyInitializer(projection_bias_index, projection_bias_obj);
+}
+
+void ConstantInitializer::visit(const model::operation::RNNNode &node)
+{
+  const auto &weights_index = node.getInputs().at(model::operation::RNNNode::WEIGHTS);
+  const auto &weights_obj = _operands.at(weights_index);
+  registerCopyInitializer(weights_index, weights_obj);
+
+  const auto &recurrent_weights_index =
+      node.getInputs().at(model::operation::RNNNode::RECURRENT_WEIGHTS);
+  const auto &recurrent_weights_obj = _operands.at(recurrent_weights_index);
+  registerCopyInitializer(recurrent_weights_index, recurrent_weights_obj);
+
+  const auto &bias_index = node.getInputs().at(model::operation::RNNNode::BIAS);
+  const auto &bias_obj = _operands.at(bias_index);
+  registerCopyInitializer(bias_index, bias_obj);
+}
+
+void ConstantInitializer::visit(const model::operation::TransposeConvNode &node)
+{
+  const auto &kernel_index = node.getInputs().at(model::operation::TransposeConvNode::KERNEL);
+  const auto &kernel_obj = _operands.at(kernel_index);
+  registerPermuteInitializer(kernel_index, kernel_obj);
+}
+
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/acl_cl/ConstantInitializer.h b/runtimes/neurun/backend/acl_cl/ConstantInitializer.h
new file mode 100644
index 000000000..59772e0f7
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/ConstantInitializer.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_COMPILER_ACL_CL_CONSTANT_INITIALIZER_H__
+#define __NEURUN_COMPILER_ACL_CL_CONSTANT_INITIALIZER_H__
+
+#include <backend/IConstantInitializer.h>
+#include <model/Operands.h>
+#include "TensorBuilder.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+
+class ConstantInitializer : public IConstantInitializer
+{
+public:
+  ConstantInitializer(const model::Operands &operands,
+                      const std::shared_ptr<TensorBuilder> &tensor_builder);
+
+public:
+  void run() override;
+
+public:
+  void visit(const model::operation::Conv2DNode &) override;
+  void visit(const model::operation::DepthwiseConv2DNode &) override;
+  void visit(const model::operation::EmbeddingLookupNode &) override;
+  void visit(const model::operation::FullyConnectedNode &) override;
+  void visit(const model::operation::GatherNode &) override;
+  void visit(const model::operation::HashtableLookupNode &) override;
+  void visit(const model::operation::LSTMNode &) override;
+  void visit(const model::operation::RNNNode &) override;
+  void visit(const model::operation::TransposeConvNode &) override;
+
+private:
+  const model::Operands &_operands;
+  std::shared_ptr<TensorBuilder> _tensor_builder;
+};
+
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_COMPILER_ACL_CL_CONSTANT_INITIALIZER_H__
diff --git a/runtimes/neurun/backend/acl_cl/KernelGenerator.cc b/runtimes/neurun/backend/acl_cl/KernelGenerator.cc
new file mode 100644
index 000000000..8b019a45a
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/KernelGenerator.cc
@@ -0,0 +1,2034 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "KernelGenerator.h"
+
+#include <arm_compute/runtime/CL/CLFunctions.h>   // Include all ARM Compute CL functions
+#include <arm_compute/runtime/CL/CLFunctionsEx.h> // Include all ARM Compute EX CL functions
+#include <arm_compute/runtime/misc/functions/GenericGather.h>
+#include <arm_compute/runtime/misc/functions/GenericReshapeLayer.h>
+
+#include <AclFunction.h>
+#include <Convert.h>
+#include <Swizzle.h>
+
+#include "kernel/ConcatLayer.h"
+#include "model/Index.h"
+#include "model/DataType.h"
+#include "model/InternalType.h"
+#include "compiler/IExecutionBuilder.h"
+#include "exec/NopFunction.h"
+#include "util/logging.h"
+#include "util/Utils.h"
+#include "util/Padding.h"
+
+using ::neurun::compiler::IExecutionBuilder;
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+
+using ::neurun::backend::acl_common::asAclFunction;
+
+//
+// ActivationBuilder
+//
+class ActivationBuilder
+{
+public:
+  explicit ActivationBuilder(IExecutionBuilder &builder) : _builder(builder)
+  {
+    // DO NOTHING
+  }
+
+private:
+  void appendReLU(::arm_compute::ICLTensor *ifm_alloc);
+  void appendReLU1(::arm_compute::ICLTensor *ifm_alloc);
+  void appendReLU6(::arm_compute::ICLTensor *ifm_alloc);
+
+public:
+  void append(model::Activation code, ::arm_compute::ICLTensor *ifm_alloc);
+
+private:
+  IExecutionBuilder &_builder;
+};
+
+void ActivationBuilder::appendReLU(::arm_compute::ICLTensor *ifm_alloc)
+{
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::RELU};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLActivationLayer>();
+
+  fn->configure(ifm_alloc, nullptr, act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _builder.append(std::move(acl_fn));
+}
+
+void ActivationBuilder::appendReLU1(::arm_compute::ICLTensor *ifm_alloc)
+{
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU, 1.0f, -1.0f};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLActivationLayer>();
+
+  fn->configure(ifm_alloc, nullptr, act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _builder.append(std::move(acl_fn));
+}
+
+void ActivationBuilder::appendReLU6(::arm_compute::ICLTensor *ifm_alloc)
+{
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU, 6.0f, 0.0f};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLActivationLayer>();
+
+  fn->configure(ifm_alloc, nullptr, act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _builder.append(std::move(acl_fn));
+}
+
+void ActivationBuilder::append(model::Activation code, ::arm_compute::ICLTensor *ifm_alloc)
+{
+  switch (code)
+  {
+    case model::Activation::NONE:
+    {
+      // DO NOTHING
+      break;
+    }
+    case model::Activation::RELU:
+    {
+      appendReLU(ifm_alloc);
+      break;
+    }
+    case model::Activation::RELU1:
+    {
+      appendReLU1(ifm_alloc);
+      break;
+    }
+    case model::Activation::RELU6:
+    {
+      appendReLU6(ifm_alloc);
+      break;
+    }
+    default:
+    {
+      throw std::runtime_error("Not supported, yet");
+    }
+  }
+}
+
+//
+// KernelGenerator
+//
+KernelGenerator::KernelGenerator(const neurun::model::Operands &ctx,
+                                 const std::shared_ptr<TensorBuilder> &tensor_builder)
+    : _ctx(ctx), _tensor_builder(tensor_builder), _current_subg_layout(model::Layout::UNKNOWN)
+{
+  // DO NOTHING
+}
+
+void KernelGenerator::visit(const model::Subgraph &subgraph)
+{
+  _current_subg_layout = subgraph.getLayout();
+  for (const auto &e : subgraph.operations())
+  {
+    const auto &node = *(e.node);
+    _tensor_builder->preVisit(node);
+    node.accept(*this);
+    _tensor_builder->postVisit(node);
+  }
+}
+
+void KernelGenerator::visit(const model::operation::CastNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::CastNode::Input::INPUT)};
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLCast>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::Conv2DNode &node)
+{
+  using model::operation::Conv2DNode;
+
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(Conv2DNode::Input::INPUT)};
+  const auto ker_index{node.getInputs().at(Conv2DNode::Input::KERNEL)};
+  const auto bias_index{node.getInputs().at(Conv2DNode::Input::BIAS)};
+
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(_current_subg_layout);
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(_current_subg_layout);
+  // Kernel format is [depth_out, kernel_height, kernel_width, depth_in].
+  const auto &ker_shape = _ctx.at(ker_index).shape();
+  const auto ker_height = ker_shape.dim(1);
+  const auto ker_width = ker_shape.dim(2);
+
+  const auto stride = node.param().stride;
+  const auto padding = neurun::util::calculatePadding(node.param().padding, ifm_shape, ofm_shape,
+                                                      stride, ker_width, ker_height);
+  const auto activation = node.param().activation;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+  auto ker_alloc = _tensor_builder->at(ker_index).get();
+  auto bias_alloc = _tensor_builder->at(bias_index).get();
+
+  const auto conv_info = acl_common::asPadStrideInfo(padding, stride);
+  const auto act_info = acl_common::asActivationLayerInfo(activation);
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLConvolutionLayer>(
+      _tensor_builder->acl_tensor_manager()->internal_buffer_manager());
+
+  fn->configure(ifm_alloc->handle(), ker_alloc->handle(), bias_alloc->handle(), ofm_alloc->handle(),
+                conv_info, ::arm_compute::WeightsInfo(), ::arm_compute::Size2D(1U, 1U), act_info);
+
+  _execution_builder->append(asAclFunction(std::move(fn)));
+}
+
+void KernelGenerator::visit(const model::operation::DepthwiseConv2DNode &node)
+{
+  using model::operation::DepthwiseConv2DNode;
+
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(DepthwiseConv2DNode::Input::INPUT)};
+  const auto ker_index{node.getInputs().at(DepthwiseConv2DNode::Input::KERNEL)};
+  const auto bias_index{node.getInputs().at(DepthwiseConv2DNode::Input::BIAS)};
+
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(_current_subg_layout);
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(_current_subg_layout);
+  // Kernel format is [1, kernel_height, kernel_width, depth_out].
+  const auto &ker_shape = _ctx.at(ker_index).shape();
+  const auto ker_height = ker_shape.dim(1);
+  const auto ker_width = ker_shape.dim(2);
+
+  const auto stride = node.param().stride;
+  const auto padding = neurun::util::calculatePadding(node.param().padding, ifm_shape, ofm_shape,
+                                                      stride, ker_width, ker_height);
+  const auto multiplier = node.param().multiplier;
+  const auto activation = node.param().activation;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+  auto ker_alloc = _tensor_builder->at(ker_index).get();
+  auto bias_alloc = _tensor_builder->at(bias_index).get();
+
+  const auto conv_info = acl_common::asPadStrideInfo(padding, stride);
+  // TODO Use `activation` instead of `model::Activation::NONE`. See below.
+  const auto act_info = acl_common::asActivationLayerInfo(model::Activation::NONE);
+
+  if (ker_height == 3 && ker_width == 3)
+  {
+    auto fn = nnfw::cpp14::make_unique<::arm_compute::CLDepthwiseConvolutionLayer3x3>(
+        _tensor_builder->acl_tensor_manager()->internal_buffer_manager());
+
+    fn->configure(ifm_alloc->handle(), ker_alloc->handle(), bias_alloc->handle(),
+                  ofm_alloc->handle(), conv_info, multiplier, act_info);
+
+    _execution_builder->append(asAclFunction(std::move(fn)));
+  }
+  else
+  {
+    auto fn = nnfw::cpp14::make_unique<::arm_compute::CLDepthwiseConvolutionLayer>();
+
+    fn->configure(ifm_alloc->handle(), ker_alloc->handle(), bias_alloc->handle(),
+                  ofm_alloc->handle(), conv_info, multiplier, act_info);
+
+    _execution_builder->append(asAclFunction(std::move(fn)));
+  }
+
+  // TODO Use fused activation instead of separate layer after switching to ACL version >= v19.05.
+  // Prior versions had a bug due to which the fused activation did not apply in some cases.
+  ActivationBuilder{*_execution_builder}.append(activation, ofm_alloc->handle());
+}
+
+void KernelGenerator::visit(const model::operation::MaxPool2DNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::MaxPool2DNode::Input::INPUT)};
+
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(_current_subg_layout);
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(_current_subg_layout);
+
+  const auto kh = node.param().kh;
+  const auto kw = node.param().kw;
+  const auto stride = node.param().stride;
+  const auto padding =
+      neurun::util::calculatePadding(node.param().padding, ifm_shape, ofm_shape, stride, kw, kh);
+  const auto activation = node.param().activation;
+
+  VERBOSE(MaxPool2D) << "IFM_H: " << ifm_shape.H << std::endl;
+  VERBOSE(MaxPool2D) << "IFM_W: " << ifm_shape.W << std::endl;
+  VERBOSE(MaxPool2D) << "OFM_H: " << ofm_shape.H << std::endl;
+  VERBOSE(MaxPool2D) << "OFM_W: " << ofm_shape.W << std::endl;
+  VERBOSE(MaxPool2D) << "KER_H: " << kh << std::endl;
+  VERBOSE(MaxPool2D) << "KER_W: " << kw << std::endl;
+  VERBOSE(MaxPool2D) << "STRIDE_H: " << stride.vertical << std::endl;
+  VERBOSE(MaxPool2D) << "STRIDE_W: " << stride.horizontal << std::endl;
+  VERBOSE(MaxPool2D) << "PAD(T): " << padding.top << std::endl;
+  VERBOSE(MaxPool2D) << "PAD(B): " << padding.bottom << std::endl;
+  VERBOSE(MaxPool2D) << "PAD(L): " << padding.left << std::endl;
+  VERBOSE(MaxPool2D) << "PAD(R): " << padding.right << std::endl;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  ::arm_compute::PoolingLayerInfo info{::arm_compute::PoolingType::MAX,
+                                       ::arm_compute::Size2D{kw, kh},
+                                       acl_common::asPadStrideInfo(padding, stride)};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLPoolingLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append((std::move(acl_fn)));
+
+  ActivationBuilder{*_execution_builder}.append(activation, ofm_alloc->handle());
+}
+
+void KernelGenerator::visit(const model::operation::AvgPool2DNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::AvgPool2DNode::Input::INPUT)};
+
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(_current_subg_layout);
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(_current_subg_layout);
+
+  const auto kh = node.param().kh;
+  const auto kw = node.param().kw;
+  const auto stride = node.param().stride;
+  const auto padding =
+      neurun::util::calculatePadding(node.param().padding, ifm_shape, ofm_shape, stride, kw, kh);
+  const auto activation = node.param().activation;
+
+  VERBOSE(AvgPool2D) << "IFM_H: " << ifm_shape.H << std::endl;
+  VERBOSE(AvgPool2D) << "IFM_W: " << ifm_shape.W << std::endl;
+  VERBOSE(AvgPool2D) << "OFM_H: " << ofm_shape.H << std::endl;
+  VERBOSE(AvgPool2D) << "OFM_W: " << ofm_shape.W << std::endl;
+  VERBOSE(AvgPool2D) << "KER_H: " << kh << std::endl;
+  VERBOSE(AvgPool2D) << "KER_W: " << kw << std::endl;
+  VERBOSE(AvgPool2D) << "STRIDE_H: " << stride.vertical << std::endl;
+  VERBOSE(AvgPool2D) << "STRIDE_W: " << stride.horizontal << std::endl;
+  VERBOSE(AvgPool2D) << "PAD(T): " << padding.top << std::endl;
+  VERBOSE(AvgPool2D) << "PAD(B): " << padding.bottom << std::endl;
+  VERBOSE(AvgPool2D) << "PAD(L): " << padding.left << std::endl;
+  VERBOSE(AvgPool2D) << "PAD(R): " << padding.right << std::endl;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  ::arm_compute::PoolingLayerInfo info{
+      ::arm_compute::PoolingType::AVG, ::arm_compute::Size2D{kw, kh},
+      acl_common::asPadStrideInfo(padding, stride), true /* exclude_padding */};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLPoolingLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append((std::move(acl_fn)));
+
+  ActivationBuilder{*_execution_builder}.append(activation, ofm_alloc->handle());
+}
+
+void KernelGenerator::visit(const model::operation::ConcatNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+
+  std::vector<model::OperandIndex> input_indexes;
+
+  for (const auto &input : node.getInputs())
+    input_indexes.emplace_back(input);
+
+  const auto axis = node.param().axis;
+
+  // If tensor allocator allocate as subtensor
+  bool canEliminate = true;
+  for (auto &ifm_ind : input_indexes)
+  {
+    if (!_tensor_builder->isSubTensorOf(ofm_index, ifm_ind))
+    {
+      canEliminate = false;
+      break;
+    }
+  }
+  if (canEliminate)
+  {
+    // If concat eliminated, return a NOP IFunction
+    _execution_builder->append(nnfw::cpp14::make_unique<exec::NopFunction>());
+    return;
+  }
+
+  auto output_alloc = static_cast<::neurun::backend::acl_cl::operand::Object *>(
+      _tensor_builder->wrapTensor(ofm_index).get());
+
+  std::vector<::neurun::backend::acl_cl::operand::Object *> input_allocs;
+  for (auto &ifm_ind : input_indexes)
+    input_allocs.emplace_back(static_cast<::neurun::backend::acl_cl::operand::Object *>(
+        _tensor_builder->wrapTensor(ifm_ind).get()));
+
+  auto fn = nnfw::cpp14::make_unique<::neurun::backend::acl_cl::kernel::ConcatLayer>();
+
+  const auto rank = _ctx.at(ofm_index).shape().rank();
+  const auto frontend_layout = _current_subg_layout;
+  const auto backend_layout = output_alloc->ptr()->layout();
+  const auto fixed_axis =
+      acl_common::ToARMComputeAxis(rank, axis, frontend_layout, backend_layout).value();
+
+  fn->configure(input_allocs, fixed_axis, output_alloc);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::FullyConnectedNode &node)
+{
+  using model::operation::FullyConnectedNode;
+
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(FullyConnectedNode::Input::INPUT)};
+  const auto weight_index{node.getInputs().at(FullyConnectedNode::Input::WEIGHT)};
+  const auto bias_index{node.getInputs().at(FullyConnectedNode::Input::BIAS)};
+
+  const auto input_rank = _ctx.at(input_index).shape().rank();
+  // TODO Currently we are not handling where the case is that the input's rank is 3.
+  // The handling should be added in the future.
+  assert(input_rank != 3);
+
+  const auto output_size = _ctx.at(output_index).shape().dim(1);
+  UNUSED_RELEASE(output_size);
+  assert(_ctx.at(bias_index).shape().dim(0) == output_size);
+  assert(_ctx.at(weight_index).shape().dim(0) == output_size);
+  const auto batch_size = _ctx.at(output_index).shape().dim(0);
+  const auto input_size = _ctx.at(weight_index).shape().dim(1);
+
+  // Check for reshaping input's shape into rank-2
+  bool needs_reshape = false;
+  neurun::model::Shape reshape(2);
+  if (input_rank == 4)
+  {
+    const auto feature_size = _ctx.at(input_index).shape().num_elements();
+
+    UNUSED_RELEASE(feature_size);
+    assert((batch_size * input_size) >= 0);
+    assert(feature_size == static_cast<uint64_t>(batch_size * input_size));
+
+    // for reshaping
+    needs_reshape = true;
+    reshape.dim(0) = batch_size; /* H */
+    reshape.dim(1) = input_size; /* W */
+  }
+
+  const auto activation = node.param().activation;
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+  auto weight_alloc = _tensor_builder->at(weight_index).get();
+  auto bias_alloc = _tensor_builder->at(bias_index).get();
+  auto acl_layout = output_alloc->handle()->info()->data_layout();
+
+  auto fn = nnfw::cpp14::make_unique<arm_compute::CLFullyConnectedReshapingLayer>(
+      _tensor_builder->acl_tensor_manager()->internal_buffer_manager());
+
+  fn->configure(
+      input_alloc->handle(), weight_alloc->handle(), bias_alloc->handle(), output_alloc->handle(),
+      needs_reshape,
+      ::neurun::backend::acl_common::asTensorShape(/* TODO Support NCHW frontend */
+                                                   reshape, model::Layout::NHWC,
+                                                   ::neurun::backend::acl_common::asRuntimeLayout(
+                                                       acl_layout)));
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+
+  ActivationBuilder{*_execution_builder}.append(activation, output_alloc->handle());
+}
+
+void KernelGenerator::visit(const model::operation::MulNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto lhs_index{node.getInputs().at(model::operation::MulNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::MulNode::Input::RHS)};
+
+  const auto activation = node.param().activation;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto lhs_alloc = _tensor_builder->at(lhs_index).get();
+  auto rhs_alloc = _tensor_builder->at(rhs_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLPixelWiseMultiplication>();
+
+  fn->configure(lhs_alloc->handle(), rhs_alloc->handle(), ofm_alloc->handle(), 1.0, // scale
+                arm_compute::ConvertPolicy::SATURATE, arm_compute::RoundingPolicy::TO_NEAREST_EVEN);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+
+  ActivationBuilder{*_execution_builder}.append(activation, ofm_alloc->handle());
+}
+
+void KernelGenerator::visit(const model::operation::ReduceSumNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::ReduceSumNode::Input::INPUT)};
+  const auto axis_index{node.param().axis_index};
+
+  const auto axis_base = _ctx.at(axis_index).data().base();
+  const auto axis_size = _ctx.at(axis_index).shape().num_elements();
+  const auto input_rank = _ctx.at(input_index).shape().rank();
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+  const auto frontend_layout = _current_subg_layout;
+  const auto backend_layout = input_alloc->layout();
+  // The axis's data must exist as constant values
+  assert(axis_base != nullptr);
+  std::set<uint32_t> axes;
+  for (size_t n = 0; n < axis_size; ++n)
+  {
+    int32_t axis_value = *(reinterpret_cast<const int32_t *>(axis_base) + n);
+    if (axis_value < 0)
+    {
+      axis_value += input_rank;
+    }
+    axes.insert(::neurun::backend::acl_common::ToARMComputeAxis(input_rank, axis_value,
+                                                                frontend_layout, backend_layout)
+                    .value());
+  }
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLReduceOperation>();
+
+  fn->configure(input_alloc->handle(), output_alloc->handle(), axes,
+                ::arm_compute::ReduceOperation::SUM);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::ReshapeNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::ReshapeNode::Input::INPUT)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  // NOTE This operation must not be changed the layout from frontend to backend
+  //      However, this runtime can be change the layout of this operation from NHWC to NCHW now
+  // TODO Change the layout of frontend and backend to be the same and layer to CLReshapeLayer
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::misc::GenericReshapeLayer>();
+
+  fn->configure(input_alloc->handle(), output_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::SqueezeNode &node)
+{
+  // Squeeze is identical to reshape except that it has an optional dimensions input.
+  // In addition, optional dims_index is ignored since output tensor already has squeezed shape
+  // by freezer and toco
+  // TODO Support multi-layout for frontend and backend
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::SqueezeNode::Input::INPUT)};
+  const auto dims_index{node.param().dims};
+  (void)dims_index;
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+  auto fn = nnfw::cpp14::make_unique<arm_compute::CLReshapeLayer>();
+  fn->configure(input_alloc->handle(), output_alloc->handle());
+  auto acl_fn = asAclFunction(std::move(fn));
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::TanhNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::TanhNode::Input::INPUT)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<arm_compute::CLActivationLayer>();
+
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::TANH, 1.0f, 1.0f};
+
+  fn->configure(input_alloc->handle(), output_alloc->handle(), act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::SoftmaxNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::SoftmaxNode::Input::INPUT)};
+
+  const auto beta = node.param().beta;
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLSoftmaxLayer>(
+      _tensor_builder->acl_tensor_manager()->internal_buffer_manager());
+
+  fn->configure(input_alloc->handle(), output_alloc->handle(), beta);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::StridedSliceNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::StridedSliceNode::Input::INPUT)};
+  const auto startData_index{node.param().startData_index};
+  const auto endData_index{node.param().endData_index};
+  const auto stridesData_index{node.param().stridesData_index};
+  const auto beginMask_index{node.param().beginMask_index};
+  const auto endMask_index{node.param().endMask_index};
+  const auto shrinkAxisMask_index{node.param().shrinkAxisMask_index};
+
+  auto outputData_alloc = _tensor_builder->at(output_index).get();
+  auto inputData_alloc = _tensor_builder->at(input_index).get();
+  const auto frontend_layout = _current_subg_layout;
+  const auto backend_layout = inputData_alloc->layout();
+
+  // Set initializers for indices data such as order of inputData
+  int input_rank = _ctx.at(input_index).shape().rank();
+  std::vector<int32_t> starts;
+  std::vector<int32_t> ends;
+  std::vector<int32_t> strides;
+  starts.resize(input_rank, 0);
+  ends.resize(input_rank, 0);
+  strides.resize(input_rank, 0);
+  {
+    auto input_shape = _ctx.at(input_index).shape();
+    auto startData_base = _ctx.at(startData_index).data().base();
+    auto endData_base = _ctx.at(endData_index).data().base();
+    auto stridesData_base = _ctx.at(stridesData_index).data().base();
+    const int startData_size = _ctx.at(startData_index).shape().num_elements();
+    const int endData_size = _ctx.at(endData_index).shape().num_elements();
+    const int stridesData_size = _ctx.at(stridesData_index).shape().num_elements();
+
+    using neurun::model::DataType;
+
+    UNUSED_RELEASE(startData_size);
+    UNUSED_RELEASE(endData_size);
+    UNUSED_RELEASE(stridesData_size);
+
+    assert(_ctx.at(startData_index).typeInfo().type() == DataType::INT32);
+    assert(_ctx.at(endData_index).typeInfo().type() == DataType::INT32);
+    assert(_ctx.at(stridesData_index).typeInfo().type() == DataType::INT32);
+    assert(startData_size == input_rank);
+    assert(endData_size == input_rank);
+    assert(stridesData_size == input_rank);
+
+    assert(startData_base != nullptr);
+    for (int n = 0; n < input_rank; ++n)
+    {
+      auto axis = ::neurun::backend::acl_common::ToARMComputeAxis(input_rank, n, frontend_layout,
+                                                                  backend_layout)
+                      .value();
+
+      int32_t start_value = *(reinterpret_cast<const int32_t *>(startData_base) + n);
+      starts[axis] = start_value;
+
+      int32_t end_value = *(reinterpret_cast<const int32_t *>(endData_base) + n);
+      ends[axis] = end_value;
+
+      int32_t strides_value = *(reinterpret_cast<const int32_t *>(stridesData_base) + n);
+      strides[axis] = strides_value;
+    }
+  }
+
+  // Set mask bits such as order of inputData
+  const auto beginMask = ::neurun::backend::acl_common::ReorderBits<int32_t>(
+      _ctx.at(beginMask_index).asScalar<int32_t>(), input_rank, frontend_layout, backend_layout);
+  const auto endMask = ::neurun::backend::acl_common::ReorderBits<int32_t>(
+      _ctx.at(endMask_index).asScalar<int32_t>(), input_rank, frontend_layout, backend_layout);
+  const auto shrinkAxisMask = ::neurun::backend::acl_common::ReorderBits<int32_t>(
+      _ctx.at(shrinkAxisMask_index).asScalar<int32_t>(), input_rank, frontend_layout,
+      backend_layout);
+
+  ::arm_compute::Coordinates starts_set;
+  ::arm_compute::Coordinates ends_set;
+  ::arm_compute::BiStrides strides_set;
+
+  for (size_t i = 0; i < starts.size(); ++i)
+  {
+    starts_set.set(i, starts[i]);
+    ends_set.set(i, ends[i]);
+    strides_set.set(i, strides[i]);
+  }
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLStridedSlice>();
+
+  fn->configure(inputData_alloc->handle(), outputData_alloc->handle(), starts_set, ends_set,
+                strides_set, beginMask, endMask, shrinkAxisMask);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::TransposeNode &node)
+{
+  const auto ofm_idx{node.getOutputs().at(0)};
+  const auto ifm_idx{node.getInputs().at(model::operation::TransposeNode::Input::INPUT)};
+  const auto perm{node.param().perm};
+
+  const auto rank = _ctx.at(ifm_idx).shape().rank();
+  std::vector<int32_t> pv;
+  const auto perm_base = _ctx.at(perm).data().base();
+  const int perm_size = _ctx.at(perm).shape().num_elements();
+
+  assert(perm_base != nullptr);
+  for (int32_t n = 0; n < perm_size; ++n)
+  {
+    int32_t perm_value = *(reinterpret_cast<const int32_t *>(perm_base) + n);
+    assert(perm_value < rank);
+    pv.emplace_back(perm_value);
+  }
+
+  auto ofm_alloc = _tensor_builder->at(ofm_idx).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_idx).get();
+  const auto frontend_layout = _current_subg_layout;
+  const auto backend_layout = ifm_alloc->layout();
+  // Reversed
+  auto backend_pv = ::neurun::backend::acl_common::getARMComputePermutationVector(
+      rank, pv, frontend_layout, backend_layout);
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLPermute>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), backend_pv);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::AddNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto lhs_index{node.getInputs().at(model::operation::AddNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::AddNode::Input::RHS)};
+
+  const auto activation = node.param().activation;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto lhs_alloc = _tensor_builder->at(lhs_index).get();
+  auto rhs_alloc = _tensor_builder->at(rhs_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLArithmeticAddition>();
+
+  fn->configure(lhs_alloc->handle(), rhs_alloc->handle(), ofm_alloc->handle(),
+                arm_compute::ConvertPolicy::SATURATE);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+
+  ActivationBuilder{*_execution_builder}.append(activation, ofm_alloc->handle());
+}
+
+void KernelGenerator::visit(const model::operation::SubNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto lhs_index{node.getInputs().at(model::operation::SubNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::SubNode::Input::RHS)};
+
+  const auto activation = node.param().activation;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto lhs_alloc = _tensor_builder->at(lhs_index).get();
+  auto rhs_alloc = _tensor_builder->at(rhs_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLArithmeticSubtraction>();
+
+  fn->configure(lhs_alloc->handle(), rhs_alloc->handle(), ofm_alloc->handle(),
+                arm_compute::ConvertPolicy::SATURATE);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+
+  ActivationBuilder{*_execution_builder}.append(activation, ofm_alloc->handle());
+}
+
+void KernelGenerator::visit(const model::operation::DivNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto lhs_index{node.getInputs().at(model::operation::DivNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::DivNode::Input::RHS)};
+
+  const auto activation = node.param().activation;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto lhs_alloc = _tensor_builder->at(lhs_index).get();
+  auto rhs_alloc = _tensor_builder->at(rhs_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLArithmeticDivision>();
+
+  fn->configure(lhs_alloc->handle(), rhs_alloc->handle(), ofm_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+
+  ActivationBuilder{*_execution_builder}.append(activation, ofm_alloc->handle());
+}
+
+void KernelGenerator::visit(const model::operation::ExpNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::ExpNode::Input::INPUT)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLExpLayer>();
+
+  fn->configure(input_alloc->handle(), output_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::LogisticNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::LogisticNode::Input::INPUT)};
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::LOGISTIC};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLActivationLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::LogicalAndNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input0_index{node.getInputs().at(model::operation::LogicalAndNode::Input::INPUT0)};
+  const auto input1_index{node.getInputs().at(model::operation::LogicalAndNode::Input::INPUT1)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input0_alloc = _tensor_builder->at(input0_index).get();
+  auto input1_alloc = _tensor_builder->at(input1_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLBinaryLogicalOp>();
+
+  fn->configure(input0_alloc->handle(), input1_alloc->handle(), output_alloc->handle(),
+                ::arm_compute::BinaryLogicalOperation::AND);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::LSTMNode &node)
+{
+  // TODO Support dynamic rnn
+  // TODO Fix subtle error in the case of non-CIFG, non-peephole and No Projection.
+  const auto scratch_buffer_index{
+      node.getOutputs().at(model::operation::LSTMNode::Output::SCRATCH_BUFFER)};
+  const auto output_state_out_index{
+      node.getOutputs().at(model::operation::LSTMNode::Output::OUTPUT_STATE_OUT)};
+  const auto cell_state_out_index{
+      node.getOutputs().at(model::operation::LSTMNode::Output::CELL_STATE_OUT)};
+  const auto output_index{node.getOutputs().at(model::operation::LSTMNode::Output::OUTPUT)};
+
+  const auto input_index{node.getInputs().at(model::operation::LSTMNode::Input::INPUT)};
+  const auto input_to_input_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::INPUT_TO_INPUT_WEIGHTS)}; // optional
+  const auto input_to_forget_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::INPUT_TO_FORGET_WEIGHTS)};
+  const auto input_to_cell_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::INPUT_TO_CELL_WEIGHTS)};
+  const auto input_to_output_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::INPUT_TO_OUTPUT_WEIGHTS)};
+  const auto recurrent_to_input_weights_index{node.getInputs().at(
+      model::operation::LSTMNode::Input::RECURRENT_TO_INPUT_WEIGHTS)}; // optional
+  const auto recurrent_to_forget_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::RECURRENT_TO_FORGET_WEIGHTS)};
+  const auto recurrent_to_cell_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::RECURRENT_TO_CELL_WEIGHTS)};
+  const auto recurrent_to_output_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::RECURRENT_TO_OUTPUT_WEIGHTS)};
+  const auto cell_to_input_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::CELL_TO_INPUT_WEIGHTS)}; // optional
+  const auto cell_to_forget_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::CELL_TO_FORGET_WEIGHTS)}; // optional
+  const auto cell_to_output_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::CELL_TO_OUTPUT_WEIGHTS)}; // optional
+  const auto input_gate_bias_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::INPUT_GATE_BIAS)};
+  const auto forget_gate_bias_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::FORGET_GATE_BIAS)};
+  const auto cell_bias_index{node.getInputs().at(model::operation::LSTMNode::Input::CELL_BIAS)};
+  const auto output_gate_bias_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::OUTPUT_GATE_BIAS)};
+  const auto projection_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::PROJECTION_WEIGHTS)}; // optional
+  const auto projection_bias_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::PROJECTION_BIAS)}; // optional
+  const auto output_state_in_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::OUTPUT_STATE_IN)};
+  const auto cell_state_in_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::CELL_STATE_IN)};
+  const auto cell_threshold = node.param().cell_threshold;
+  const auto projection_threshold = node.param().projection_threshold;
+
+  bool has_input_to_input_weights = _ctx.at(input_to_input_weights_index).shape().dim(0) != 0 &&
+                                    _ctx.at(input_to_input_weights_index).shape().dim(1) != 0;
+  bool has_recurrent_to_input_weights =
+      _ctx.at(recurrent_to_input_weights_index).shape().dim(0) != 0 &&
+      _ctx.at(recurrent_to_input_weights_index).shape().dim(1) != 0;
+  bool has_cell_to_forget_weights = _ctx.at(cell_to_forget_weights_index).shape().dim(0) != 0;
+  bool has_cell_to_output_weights = _ctx.at(cell_to_output_weights_index).shape().dim(0) != 0;
+  bool has_projection_weights = _ctx.at(projection_weights_index).shape().dim(0) != 0 &&
+                                _ctx.at(projection_weights_index).shape().dim(1) != 0;
+  bool has_projection_bias = _ctx.at(projection_bias_index).shape().dim(0);
+
+  // NOTE The input_to_input_weights and the recurrent_to_input_weights do not exist in CIFG.
+  // true: no CIFG
+  // false: CIFG
+  // NOTE The cell_to_input_weights does not exist in non-peephole although regular LSTM(non-CIFG).
+  bool has_cifg_param = has_input_to_input_weights && has_recurrent_to_input_weights;
+
+  // NOTE The cell_to_forget_weights and the cell_to_output_weights exist in peephole.
+  // But the cell_to_input_weights does not exist in regular CIFG although peephole.
+  // true: peephole
+  // false: no peephole
+  bool has_peephole_param = has_cell_to_forget_weights && has_cell_to_output_weights;
+
+  // NOTE Although the projection weights has data the projection bias may not have data.
+  bool has_projection_param = has_projection_weights;
+
+  const auto activation = node.param().activation;
+  const auto cell_clip = cell_threshold;
+  const auto projection_clip = projection_threshold;
+  assert(cell_clip >= 0.f && projection_clip >= 0.f);
+
+  auto scratch_buffer_alloc = _tensor_builder->at(scratch_buffer_index).get();
+  auto output_state_out_alloc = _tensor_builder->at(output_state_out_index).get();
+  auto cell_state_out_alloc = _tensor_builder->at(cell_state_out_index).get();
+  auto output_alloc = _tensor_builder->at(output_index).get();
+
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto input_to_forget_weights_alloc = _tensor_builder->at(input_to_forget_weights_index).get();
+  auto input_to_cell_weights_alloc = _tensor_builder->at(input_to_cell_weights_index).get();
+  auto input_to_output_weights_alloc = _tensor_builder->at(input_to_output_weights_index).get();
+  auto recurrent_to_forget_weights_alloc =
+      _tensor_builder->at(recurrent_to_forget_weights_index).get();
+  auto recurrent_to_cell_weights_alloc = _tensor_builder->at(recurrent_to_cell_weights_index).get();
+  auto recurrent_to_output_weights_alloc =
+      _tensor_builder->at(recurrent_to_output_weights_index).get();
+
+  auto forget_gate_bias_alloc = _tensor_builder->at(forget_gate_bias_index).get();
+  auto cell_bias_alloc = _tensor_builder->at(cell_bias_index).get();
+  auto output_gate_bias_alloc = _tensor_builder->at(output_gate_bias_index).get();
+  auto output_state_in_alloc = _tensor_builder->at(output_state_in_index).get();
+  auto cell_state_in_alloc = _tensor_builder->at(cell_state_in_index).get();
+
+  auto act_info = ::neurun::backend::acl_common::asActivationLayerInfo(activation);
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLLSTMLayer>();
+
+  ::arm_compute::LSTMParams<::arm_compute::ICLTensor> lstm_params{};
+  if (has_cifg_param)
+  {
+    auto input_to_input_weights_alloc =
+        _tensor_builder->at(input_to_input_weights_index).get(); // optional
+    auto recurrent_to_input_weights_alloc =
+        _tensor_builder->at(recurrent_to_input_weights_index).get(); // optional
+    auto cell_to_input_weights_handle =
+        has_peephole_param ? _tensor_builder->at(cell_to_input_weights_index).get()->handle()
+                           : nullptr; // optional (non-cifg && peephole)
+    auto input_gate_bias_alloc = _tensor_builder->at(input_gate_bias_index).get(); // optional
+    lstm_params.set_cifg_params(input_to_input_weights_alloc->handle(),
+                                recurrent_to_input_weights_alloc->handle(),
+                                cell_to_input_weights_handle, input_gate_bias_alloc->handle());
+  }
+  if (has_peephole_param)
+  {
+    auto cell_to_forget_weights_alloc =
+        _tensor_builder->at(cell_to_forget_weights_index).get(); // optional
+    auto cell_to_output_weights_alloc =
+        _tensor_builder->at(cell_to_output_weights_index).get(); // optional
+    lstm_params.set_peephole_params(cell_to_forget_weights_alloc->handle(),
+                                    cell_to_output_weights_alloc->handle());
+  }
+  if (has_projection_param)
+  {
+    auto projection_weights_alloc = _tensor_builder->at(projection_weights_index).get(); // optional
+    auto projection_bias_handle = has_projection_bias
+                                      ? _tensor_builder->at(projection_bias_index).get()->handle()
+                                      : nullptr; // optional
+    lstm_params.set_projection_params(projection_weights_alloc->handle(), projection_bias_handle);
+  }
+
+  fn->configure(
+      input_alloc->handle(), input_to_forget_weights_alloc->handle(),
+      input_to_cell_weights_alloc->handle(), input_to_output_weights_alloc->handle(),
+      recurrent_to_forget_weights_alloc->handle(), recurrent_to_cell_weights_alloc->handle(),
+      recurrent_to_output_weights_alloc->handle(), forget_gate_bias_alloc->handle(),
+      cell_bias_alloc->handle(), output_gate_bias_alloc->handle(), output_state_in_alloc->handle(),
+      cell_state_in_alloc->handle(), scratch_buffer_alloc->handle(),
+      output_state_out_alloc->handle(), cell_state_out_alloc->handle(), output_alloc->handle(),
+      lstm_params, act_info, cell_clip, projection_clip);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::ReduceMaxNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::ReduceMaxNode::Input::INPUT)};
+  const auto axis_index{node.param().axis_index};
+
+  auto input_shape = _ctx.at(input_index).shape();
+  auto axis_shape = _ctx.at(axis_index).shape();
+
+  auto ofm_alloc = _tensor_builder->at(output_index).get();
+  auto ifm_alloc = _tensor_builder->at(input_index).get();
+  std::set<uint32_t> axes;
+  const auto frontend_layout = _current_subg_layout;
+  const auto backend_layout = ifm_alloc->layout();
+  {
+    const auto ifm_rank = input_shape.rank();
+    switch (axis_shape.rank())
+    {
+      case 0: // scalar
+      {
+        int32_t axis_value = _ctx.at(axis_index).asScalar<int32_t>();
+        if (axis_value < 0)
+        {
+          axis_value += ifm_rank;
+        }
+        axes.insert(::neurun::backend::acl_common::ToARMComputeAxis(ifm_rank, axis_value,
+                                                                    frontend_layout, backend_layout)
+                        .value());
+        break;
+      }
+      case 1: // vector
+      {
+        const auto axis_base = _ctx.at(axis_index).data().base();
+        const int axis_size = axis_shape.num_elements();
+
+        // If axis's data does not exist as constant values and can be gotten as input data, we have
+        // to find a way to infer output shape when sinking output.
+        assert(axis_base != nullptr);
+        for (int32_t n = 0; n < axis_size; ++n)
+        {
+          int32_t axis_value = *(reinterpret_cast<const int32_t *>(axis_base) + n);
+          if (axis_value < 0)
+          {
+            axis_value += ifm_rank;
+          }
+          axes.insert(::neurun::backend::acl_common::ToARMComputeAxis(
+                          ifm_rank, axis_value, frontend_layout, backend_layout)
+                          .value());
+        }
+        break;
+      }
+      default:
+        throw std::runtime_error("Not supported");
+        break;
+    }
+  }
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLReduceOperation>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), axes, arm_compute::ReduceOperation::MAX);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::ComparisonNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input0_index{node.getInputs().at(model::operation::ComparisonNode::Input::INPUT0)};
+  const auto input1_index{node.getInputs().at(model::operation::ComparisonNode::Input::INPUT1)};
+
+  const auto comparison_type = node.param().comparison_type;
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input0_alloc = _tensor_builder->at(input0_index).get();
+  auto input1_alloc = _tensor_builder->at(input1_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLComparison>();
+
+  fn->configure(input0_alloc->handle(), input1_alloc->handle(), output_alloc->handle(),
+                (arm_compute::ComparisonOperation)comparison_type);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::RSQRTNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::RSQRTNode::Input::INPUT)};
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLRsqrtLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle());
+
+  _execution_builder->append(asAclFunction(std::move(fn)));
+}
+
+void KernelGenerator::visit(const model::operation::ReLUNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::ReLUNode::Input::INPUT)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<arm_compute::CLActivationLayer>();
+
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::RELU};
+
+  fn->configure(input_alloc->handle(), output_alloc->handle(), act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::ResizeBilinearNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+
+  const auto ifm_index{node.getInputs().at(model::operation::ResizeBilinearNode::Input::INPUT)};
+  const auto height_index{node.param().height_index};
+  const auto width_index{node.param().width_index};
+  (void)height_index;
+  (void)width_index;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLScale>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(),
+                ::arm_compute::InterpolationPolicy::BILINEAR, ::arm_compute::BorderMode::REPLICATE,
+                ::arm_compute::PixelValue(0.f), ::arm_compute::SamplingPolicy::TOP_LEFT);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::ReLU1Node &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::ReLU1Node::Input::INPUT)};
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU, 1.0f, -1.0f};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLActivationLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::ReLU6Node &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::ReLU6Node::Input::INPUT)};
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::BOUNDED_RELU, 6.0f};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLActivationLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::RNNNode &node)
+{
+  const auto output_index{node.getOutputs().at(model::operation::RNNNode::Output::OUTPUT)};
+  const auto hidden_state_out_index{
+      node.getOutputs().at(model::operation::RNNNode::Output::HIDDEN_STATE_OUT)};
+
+  const auto input_index{node.getInputs().at(model::operation::RNNNode::Input::INPUT)};
+  const auto weights_index{node.getInputs().at(model::operation::RNNNode::Input::WEIGHTS)};
+  const auto recurrent_weights_index{
+      node.getInputs().at(model::operation::RNNNode::Input::RECURRENT_WEIGHTS)};
+  const auto bias_index{node.getInputs().at(model::operation::RNNNode::Input::BIAS)};
+  const auto hidden_state_in_index{
+      node.getInputs().at(model::operation::RNNNode::Input::HIDDEN_STATE_IN)};
+
+  const auto activation = node.param().activation;
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto hidden_state_out_alloc = _tensor_builder->at(hidden_state_out_index).get();
+
+  auto input_alloc = _tensor_builder->at(input_index).get();
+  auto weights_alloc = _tensor_builder->at(weights_index).get();
+  auto recurrent_weights_alloc = _tensor_builder->at(recurrent_weights_index).get();
+  auto bias_alloc = _tensor_builder->at(bias_index).get();
+  auto hidden_state_in_alloc = _tensor_builder->at(hidden_state_in_index).get();
+  auto act_info = ::neurun::backend::acl_common::asActivationLayerInfo(activation);
+
+  auto copy_layer = nnfw::cpp14::make_unique<::arm_compute::CLCopy>();
+  copy_layer->configure(hidden_state_in_alloc->handle(), hidden_state_out_alloc->handle());
+  _execution_builder->append(asAclFunction(std::move(copy_layer)));
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLRNNLayerEx>(
+      _tensor_builder->acl_tensor_manager()->internal_buffer_manager());
+  fn->configure(input_alloc->handle(), weights_alloc->handle(), recurrent_weights_alloc->handle(),
+                bias_alloc->handle(), hidden_state_out_alloc->handle(), output_alloc->handle(),
+                act_info);
+  _execution_builder->append(asAclFunction(std::move(fn)));
+}
+
+void KernelGenerator::visit(const model::operation::FloorNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::FloorNode::Input::INPUT)};
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLFloor>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::SpaceToDepthNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::SpaceToDepthNode::Input::INPUT)};
+  const auto block_size_index{node.param().block_size_index};
+
+  auto block_size = _ctx.at(block_size_index).asScalar<int32_t>();
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLSpaceToDepth>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), block_size);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::L2Pool2DNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::L2Pool2DNode::Input::INPUT)};
+
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(_current_subg_layout);
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(_current_subg_layout);
+
+  uint32_t kw = node.param().kw;
+  uint32_t kh = node.param().kh;
+  const auto stride = node.param().stride;
+  const auto padding =
+      neurun::util::calculatePadding(node.param().padding, ifm_shape, ofm_shape, stride, kw, kh);
+  const auto activation = node.param().activation;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  ::arm_compute::PoolingLayerInfo info{
+      ::arm_compute::PoolingType::L2, ::arm_compute::Size2D{kw, kh},
+      ::neurun::backend::acl_common::asPadStrideInfo(padding, stride)};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLPoolingLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+
+  ActivationBuilder{*_execution_builder}.append(activation, ofm_alloc->handle());
+}
+
+void KernelGenerator::visit(const model::operation::EmbeddingLookupNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto lookups_index{
+      node.getInputs().at(model::operation::EmbeddingLookupNode::Input::LOOKUPS)};
+  const auto values_index{
+      node.getInputs().at(model::operation::EmbeddingLookupNode::Input::VALUES)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto lookups_alloc = _tensor_builder->at(lookups_index).get();
+  auto values_alloc = _tensor_builder->at(values_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLEmbeddingLookup>();
+
+  fn->configure(values_alloc->handle(), output_alloc->handle(), lookups_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::L2NormalizationNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::L2NormalizationNode::Input::INPUT)};
+
+  // {CL|Neon}L2Normalization performs the reduction only along dimension 0
+  // L2 Normalization always performs the reduction along the depth axis
+  // Thus, we repurpose {CL|Neon}NormalizationLayers to act as depthwise L2 normalizations by
+  // choosing normalization parameters as below
+
+  const auto &ifm_shape = _ctx.at(ifm_index).shape();
+  // TODO Support optional constant dimension that normalization would be performed on
+  const auto normalization_axis = ifm_shape.rank() - 1;
+  int32_t radius =
+      2 * ifm_shape.dim(normalization_axis) + 1; // normSize = depth(last dimension) * 2 + 1
+  float alpha = 1.0f;                            // In the implementation to make alpha_ become 1
+  float beta = 0.5f;                             // pow(reduction, -0.5) = 1 / sqrt(reduction)
+  float bias = 0.0f;                             // Don't offset the reduction.
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  const auto norm_info = ::arm_compute::NormalizationLayerInfo(::arm_compute::NormType::CROSS_MAP,
+                                                               radius, alpha, beta, bias, false);
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLNormalizationLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), norm_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::HashtableLookupNode &node)
+{
+  const auto output_index{
+      node.getOutputs().at(model::operation::HashtableLookupNode::Output::OUTPUT)};
+  const auto hits_index{node.getOutputs().at(model::operation::HashtableLookupNode::Output::HITS)};
+
+  const auto lookups_index{
+      node.getInputs().at(model::operation::HashtableLookupNode::Input::LOOKUPS)};
+  const auto keys_index{node.getInputs().at(model::operation::HashtableLookupNode::Input::KEYS)};
+  const auto values_index{
+      node.getInputs().at(model::operation::HashtableLookupNode::Input::VALUES)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto hits_alloc = _tensor_builder->at(hits_index).get();
+
+  auto lookups_alloc = _tensor_builder->at(lookups_index).get();
+  auto keys_alloc = _tensor_builder->at(keys_index).get();
+  auto values_alloc = _tensor_builder->at(values_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLHashtableLookup>();
+
+  fn->configure(lookups_alloc->handle(), keys_alloc->handle(), values_alloc->handle(),
+                output_alloc->handle(), hits_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::PReLUNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::PReLUNode::Input::INPUT)};
+  const auto alpha_index{node.getInputs().at(model::operation::PReLUNode::Input::ALPHA)};
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+  auto alpha_alloc = _tensor_builder->at(alpha_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLPReLU>();
+
+  fn->configure(ifm_alloc->handle(), alpha_alloc->handle(), ofm_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::TransposeConvNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto output_shape_index{
+      node.getInputs().at(model::operation::TransposeConvNode::Input::OUTPUT_SHAPE)};
+  const auto ker_index{node.getInputs().at(model::operation::TransposeConvNode::Input::KERNEL)};
+  const auto ifm_index{node.getInputs().at(model::operation::TransposeConvNode::Input::INPUT)};
+
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(_current_subg_layout);
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(_current_subg_layout);
+  const auto ker_shape = _ctx.at(ker_index).shape().asFeature(_current_subg_layout);
+
+  const auto stride = node.param().stride;
+
+  assert((node.param().padding.type == model::PaddingType::SAME) ||
+         (node.param().padding.type == model::PaddingType::VALID));
+  auto padding = neurun::util::calculatePadding(node.param().padding, ofm_shape, ifm_shape, stride,
+                                                ker_shape.W, ker_shape.H);
+
+  uint32_t invalid_horizontal = 0;
+  uint32_t invalid_vertical = 0;
+  if (node.param().padding.type == model::PaddingType::VALID)
+  {
+    invalid_horizontal =
+        ofm_shape.W - (1 + (ifm_shape.W - 1) * stride.horizontal) - (ker_shape.W - 1);
+    invalid_vertical = ofm_shape.H - (1 + (ifm_shape.H - 1) * stride.vertical) - (ker_shape.H - 1);
+  }
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+  auto ker_alloc = _tensor_builder->at(ker_index).get();
+
+  const auto tconv_info = acl_common::asPadStrideInfo(padding, stride);
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLTransposeConvLayer>(
+      _tensor_builder->acl_tensor_manager()->internal_buffer_manager());
+
+  fn->configure(ifm_alloc->handle(), ker_alloc->handle(), nullptr, ofm_alloc->handle(), tconv_info,
+                invalid_horizontal, invalid_vertical);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::SQRTNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::SQRTNode::Input::INPUT)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::SQRT};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLActivationLayer>();
+
+  fn->configure(input_alloc->handle(), output_alloc->handle(), act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::LogicalOrNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input0_index{node.getInputs().at(model::operation::LogicalOrNode::Input::INPUT0)};
+  const auto input1_index{node.getInputs().at(model::operation::LogicalOrNode::Input::INPUT1)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input0_alloc = _tensor_builder->at(input0_index).get();
+  auto input1_alloc = _tensor_builder->at(input1_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLBitwiseOr>();
+
+  fn->configure(input0_alloc->handle(), input1_alloc->handle(), output_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::LogicalNotNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::LogicalNotNode::Input::INPUT)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLBitwiseNot>();
+
+  fn->configure(input_alloc->handle(), output_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::SquaredDifferenceNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto lhs_index{node.getInputs().at(model::operation::SquaredDifferenceNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::SquaredDifferenceNode::Input::RHS)};
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto lhs_alloc = _tensor_builder->at(lhs_index).get();
+  auto rhs_alloc = _tensor_builder->at(rhs_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLElementwiseSquaredDiff>();
+
+  fn->configure(lhs_alloc->handle(), rhs_alloc->handle(), ofm_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::TopKV2Node &node)
+{
+  const auto outputValues_index{
+      node.getOutputs().at(model::operation::TopKV2Node::Output::OUTPUT_VALUES)};
+  const auto outputIndices_index{
+      node.getOutputs().at(model::operation::TopKV2Node::Output::OUTPUT_INDICES)};
+
+  const auto inputData_index{node.getInputs().at(model::operation::TopKV2Node::Input::INPUT)};
+  const auto k_index{node.param().k_index};
+
+  // Currently, we only support the vector input.
+  assert(_ctx.at(inputData_index).shape().rank() == 1 ||
+         _ctx.at(inputData_index).shape().rank() == 2);
+
+  const auto k = _ctx.at(k_index).asScalar<int32_t>();
+
+  auto values_alloc = _tensor_builder->at(outputValues_index).get();
+  auto indices_alloc = _tensor_builder->at(outputIndices_index).get();
+  auto input_alloc = _tensor_builder->at(inputData_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLTopKV2>();
+
+  fn->configure(input_alloc->handle(), k, values_alloc->handle(), indices_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::GatherNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+
+  const auto ifm_index{node.getInputs().at(model::operation::GatherNode::Input::INPUT)};
+  const auto indices_index{node.getInputs().at(model::operation::GatherNode::Input::INDICES)};
+
+  const auto axis_index{node.param().axis_index};
+
+  const auto ifm_shape = _ctx.at(ifm_index).shape();
+
+  const auto axis_value = static_cast<int>(_ctx.at(axis_index).asScalar<int32_t>());
+  // Converting in reverse order
+  const int axis =
+      ::neurun::backend::acl_common::ToARMComputeAxis(ifm_shape.rank(), axis_value).value();
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+  auto indices_alloc = _tensor_builder->at(indices_index).get();
+  auto acl_layout = ofm_alloc->handle()->info()->data_layout();
+  UNUSED_RELEASE(acl_layout);
+
+  // NOTE The frontend layout and backend layout must be the same for this operation.
+  //      If not the same, we have to add a stage(?) to perform permutation of output tensor. It
+  //      is not not efficient even if it works well. If so, it would be better to set the
+  //      layout of these backend tensors to the same layout.
+  //      There is also one thing we have to think about. This operation depends on the layout of
+  //      a model. For example, if a model in NHWC has this operation as output rank == 4, indices
+  //      rank == 2 and axis == 2, this operation should work as the axis W and C, but the axis W
+  //      and C are not sequential in NCHW. So the backend in NCHW cannot handle this case.
+  // TODO Remove this workaround
+  //      It is a workaround how to set the layout of these backend tensors to the layout of the
+  //      frontend when creating them
+  // TODO Supports front-end in NCHW
+  // TODO Change the layout of frontend and backend to be the same
+  // assert(::arm_compute::DataLayout::NHWC == acl_layout);
+  assert(acl_layout == ifm_alloc->handle()->info()->data_layout());
+  assert(acl_layout == indices_alloc->handle()->info()->data_layout());
+
+  // TODO Change to CLGather
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::misc::GenericGather>();
+
+  fn->configure(ifm_alloc->handle(), indices_alloc->handle(), ofm_alloc->handle(), axis);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::NegNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::NegNode::Input::INPUT)};
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLNeg>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::AbsNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::AbsNode::Input::INPUT)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::ABS};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLActivationLayer>();
+
+  fn->configure(input_alloc->handle(), output_alloc->handle(), act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::ArgMaxNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::ArgMaxNode::Input::INPUT)};
+  const auto axis_index{node.param().axis_index};
+
+  auto ifm_shape = _ctx.at(ifm_index).shape();
+  auto ofm_shape = _ctx.at(ofm_index).shape();
+  auto axis_shape = _ctx.at(axis_index).shape();
+
+  assert(_ctx.at(axis_index).isConstant());
+  // Axis dimension is always 1.
+  assert(axis_shape.rank() == 1);
+  assert((ifm_shape.rank() - 1) == ofm_shape.rank());
+
+  const int axis_size = axis_shape.num_elements();
+  auto axis_base = _ctx.at(axis_index).data().base();
+  // TODO Should support axis size > 1.
+  assert(axis_size == 1);
+  // axis is tensor with 1 dimension - always a vector.
+  assert(axis_base != nullptr);
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+  const auto ifm_rank = ifm_shape.rank();
+  auto frontend_layout = _current_subg_layout;
+  auto backend_layout = ifm_alloc->layout();
+  std::set<uint32_t> axes;
+  for (int32_t n = 0; n < axis_size; ++n)
+  {
+    int32_t axis_value = *(reinterpret_cast<const int32_t *>(axis_base) + n);
+    if (axis_value < 0)
+    {
+      axis_value += ifm_rank;
+    }
+    axes.insert(acl_common::ToARMComputeAxis(ifm_rank, axis_value, frontend_layout, backend_layout)
+                    .value());
+  }
+  std::vector<uint32_t> fixed_axes(axes.begin(), axes.end());
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLArgOperation>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), fixed_axes,
+                ::arm_compute::ArgOperation::MAX);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::DequantizeNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::DequantizeNode::Input::INPUT)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLCast>();
+
+  fn->configure(input_alloc->handle(), output_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::MeanNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::MeanNode::Input::INPUT)};
+
+  const auto axis_index{node.param().axis_index};
+  const auto keep_dims{node.param().keep_dims};
+  (void)keep_dims;
+
+  const auto ifm_shape = _ctx.at(ifm_index).shape();
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+  std::set<uint32_t> axes;
+  {
+    const auto ifm_rank = ifm_shape.rank();
+    const auto frontend_layout = _current_subg_layout;
+    const auto backend_layout = ifm_alloc->layout();
+    const auto axis_shape = _ctx.at(axis_index).shape();
+    switch (axis_shape.rank())
+    {
+      case 0: // scalar
+      {
+        auto axis_value = _ctx.at(axis_index).asScalar<int32_t>();
+        if (axis_value < 0)
+        {
+          axis_value += ifm_rank;
+        }
+        axes.insert(::neurun::backend::acl_common::ToARMComputeAxis(ifm_rank, axis_value,
+                                                                    frontend_layout, backend_layout)
+                        .value());
+        break;
+      }
+      case 1: // vector
+      {
+        const auto axis_base = _ctx.at(axis_index).data().base();
+        const int axis_size = axis_shape.num_elements();
+
+        // If axis's data does not exist as constant values and can be gotten as input data, we have
+        // to find a way to infer output shape when sinking output.
+        assert(axis_base != nullptr);
+        for (int32_t n = 0; n < axis_size; ++n)
+        {
+          int32_t axis_value = *(reinterpret_cast<const int32_t *>(axis_base) + n);
+          if (axis_value < 0)
+          {
+            axis_value += ifm_rank;
+          }
+          axes.insert(::neurun::backend::acl_common::ToARMComputeAxis(
+                          ifm_rank, axis_value, frontend_layout, backend_layout)
+                          .value());
+        }
+        break;
+      }
+      default:
+        throw std::runtime_error("Not supported");
+    }
+  }
+
+  // NOTE CLReduceMean has a bug that does not support NHWC layout
+  //      CLReduceMean intermediate tensors are always NCHW layout
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLReduceOperation>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), axes,
+                ::arm_compute::ReduceOperation::MEAN);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::LocalResponseNormalizationNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{
+      node.getInputs().at(model::operation::LocalResponseNormalizationNode::Input::INPUT)};
+  const auto radius_index{node.param().radius_index};
+  const auto bias_index{node.param().bias_index};
+  const auto alpha_index{node.param().alpha_index};
+  const auto beta_index{node.param().beta_index};
+
+  auto radius = _ctx.at(radius_index).asScalar<int32_t>();
+  auto alpha = _ctx.at(alpha_index).asScalar<float>();
+  auto beta = _ctx.at(beta_index).asScalar<float>();
+  auto bias = _ctx.at(bias_index).asScalar<float>();
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  const auto norm_info = ::arm_compute::NormalizationLayerInfo(
+      ::arm_compute::NormType::CROSS_MAP, radius * 2 + 1, alpha, beta, bias, false);
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLNormalizationLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), norm_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::DepthToSpaceNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::DepthToSpaceNode::Input::INPUT)};
+  const auto block_size_index{node.param().block_size_index};
+
+  auto block_size = _ctx.at(block_size_index).asScalar<int32_t>();
+  assert(block_size > 0);
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLDepthToSpace>();
+
+  fn->configure(input_alloc->handle(), output_alloc->handle(), block_size);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::ReduceMinNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::ReduceMinNode::Input::INPUT)};
+  const auto axis_index{node.param().axis_index};
+
+  auto ifm_shape = _ctx.at(ifm_index).shape();
+  auto ofm_shape = _ctx.at(ofm_index).shape();
+  auto axis_shape = _ctx.at(axis_index).shape();
+
+  const auto ifm_rank = ifm_shape.rank();
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+  std::set<uint32_t> axes;
+  {
+    const auto frontend_layout = _current_subg_layout;
+    const auto backend_layout = ifm_alloc->layout();
+    switch (axis_shape.rank())
+    {
+      case 0: // scalar
+      {
+        auto axis_value = _ctx.at(axis_index).asScalar<int32_t>();
+        if (axis_value < 0)
+        {
+          axis_value += ifm_rank;
+        }
+        axes.insert(::neurun::backend::acl_common::ToARMComputeAxis(ifm_rank, axis_value,
+                                                                    frontend_layout, backend_layout)
+                        .value());
+        break;
+      }
+      case 1: // vector
+      {
+        const auto axis_base = _ctx.at(axis_index).data().base();
+        const int axis_size = axis_shape.num_elements();
+
+        // If axis's data does not exist as constant values and can be gotten as input data, we have
+        // to find a way to infer output shape when sinking output.
+        assert(axis_base != nullptr);
+        for (int32_t n = 0; n < axis_size; ++n)
+        {
+          int32_t axis_value = *(reinterpret_cast<const int32_t *>(axis_base) + n);
+          if (axis_value < 0)
+          {
+            axis_value += ifm_rank;
+          }
+          axes.insert(::neurun::backend::acl_common::ToARMComputeAxis(
+                          ifm_rank, axis_value, frontend_layout, backend_layout)
+                          .value());
+        }
+        break;
+      }
+      default:
+        throw std::runtime_error("Not supported");
+        break;
+    }
+  }
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLReduceOperation>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), axes,
+                ::arm_compute::ReduceOperation::MIN);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::SplitNode &node)
+{
+  const auto ifm_index{node.getInputs().at(model::operation::SplitNode::Input::INPUT)};
+  const auto axis_index{node.param().axis_index};
+  const auto num_of_splits_index{node.param().num_of_splits_index};
+
+  assert(_ctx.at(num_of_splits_index).asScalar<unsigned int>() == node.getOutputs().size());
+
+  const auto ifm_rank = _ctx.at(ifm_index).shape().rank();
+  std::vector<model::OperandIndex> output_indexes;
+  for (const auto &output : node.getOutputs())
+    output_indexes.emplace_back(output);
+
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+  std::vector<arm_compute::ICLTensor *> output_allocs;
+  for (const auto &ofm_ind : output_indexes)
+    output_allocs.emplace_back(_tensor_builder->at(ofm_ind).get()->handle());
+
+  const auto frontend_layout = _current_subg_layout;
+  const auto backend_layout = ifm_alloc->layout();
+  auto axis = _ctx.at(axis_index).asScalar<int32_t>();
+  if (axis < 0)
+    axis += ifm_rank;
+  axis = acl_common::ToARMComputeAxis(ifm_rank, axis, frontend_layout, backend_layout).value();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLSplit>();
+
+  fn->configure(ifm_alloc->handle(), output_allocs, axis);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::UnpackNode &node)
+{
+  const auto input_index{node.getInputs().at(model::operation::UnpackNode::Input::INPUT)};
+  auto axis{node.param().axis};
+
+  const auto input_rank = _ctx.at(input_index).shape().rank();
+
+  std::vector<model::OperandIndex> output_indexes;
+  for (const auto &output_index : node.getOutputs())
+    output_indexes.emplace_back(output_index);
+
+  auto input = _tensor_builder->at(input_index).get()->handle();
+  std::vector<arm_compute::ICLTensor *> outputs;
+  for (const auto &output_index : output_indexes)
+    outputs.emplace_back(_tensor_builder->at(output_index)->handle());
+
+  const auto frontend_layout = _current_subg_layout;
+  const auto backend_layout = _tensor_builder->at(input_index).get()->layout();
+  if (axis < 0)
+    axis += input_rank;
+  axis = acl_common::ToARMComputeAxis(input_rank, axis, frontend_layout, backend_layout).value();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLUnstack>();
+
+  fn->configure(input, outputs, axis);
+
+  _execution_builder->append(asAclFunction(std::move(fn)));
+}
+
+void KernelGenerator::visit(const model::operation::PadNode &node)
+{
+  const auto input_index{node.getInputs().at(model::operation::PadNode::Input::INPUT)};
+  const auto pad_index{node.getInputs().at(model::operation::PadNode::Input::PAD)};
+  const auto output_index{node.getOutputs().at(0)};
+  assert(_ctx.at(pad_index).isConstant());
+
+  auto rank = _ctx.at(pad_index).shape().dim(0);
+  auto pad_base = _ctx.at(pad_index).data().base();
+
+  auto input_type = _ctx.at(input_index).typeInfo();
+  auto data_type = acl_common::asDataType(input_type.type());
+  auto quant_info = ::arm_compute::QuantizationInfo(input_type.scale(), input_type.offset());
+  const auto pixel_value = ::arm_compute::PixelValue(0, data_type, quant_info);
+
+  auto input = _tensor_builder->at(input_index).get()->handle();
+  auto output = _tensor_builder->at(output_index).get()->handle();
+
+  ::arm_compute::PaddingList padding_list;
+  padding_list.resize(rank);
+  for (int32_t n = 0; n < rank; ++n)
+  {
+    const int32_t *from = reinterpret_cast<const int32_t *>(pad_base) + (n * 2);
+
+    const auto frontend_layout = _current_subg_layout;
+    const auto backend_layout = _tensor_builder->at(input_index).get()->layout();
+    const auto axis =
+        acl_common::ToARMComputeAxis(rank, n, frontend_layout, backend_layout).value();
+    padding_list[axis] = ::arm_compute::PaddingInfo{from[0], from[1]};
+  }
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::CLPadLayer>();
+  fn->configure(input, output, padding_list, pixel_value);
+
+  _execution_builder->append(asAclFunction(std::move(fn)));
+}
+
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/acl_cl/KernelGenerator.h b/runtimes/neurun/backend/acl_cl/KernelGenerator.h
new file mode 100644
index 000000000..db9bf4199
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/KernelGenerator.h
@@ -0,0 +1,105 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_CL_KERNEL_GENERATOR_H__
+#define __NEURUN_BACKEND_ACL_CL_KERNEL_GENERATOR_H__
+
+#include <backend/IKernelGenerator.h>
+
+#include "model/Operands.h"
+#include "TensorBuilder.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+
+class KernelGenerator : public IKernelGenerator
+{
+public:
+  KernelGenerator(const neurun::model::Operands &ctx,
+                  const std::shared_ptr<TensorBuilder> &tensor_builder);
+
+  void visit(const model::Subgraph &) override;
+  void visit(const model::operation::Conv2DNode &) override;
+  void visit(const model::operation::DepthwiseConv2DNode &) override;
+  void visit(const model::operation::MaxPool2DNode &) override;
+  void visit(const model::operation::AvgPool2DNode &) override;
+  void visit(const model::operation::ConcatNode &) override;
+  void visit(const model::operation::FullyConnectedNode &) override;
+  void visit(const model::operation::MulNode &) override;
+  void visit(const model::operation::ReduceSumNode &) override;
+  void visit(const model::operation::ReshapeNode &) override;
+  void visit(const model::operation::SqueezeNode &) override;
+  void visit(const model::operation::TanhNode &) override;
+  void visit(const model::operation::SoftmaxNode &) override;
+  void visit(const model::operation::StridedSliceNode &) override;
+  void visit(const model::operation::TransposeNode &) override;
+  void visit(const model::operation::AddNode &) override;
+  void visit(const model::operation::SubNode &) override;
+  void visit(const model::operation::CastNode &) override;
+  void visit(const model::operation::DivNode &) override;
+  void visit(const model::operation::ExpNode &) override;
+  void visit(const model::operation::LogisticNode &) override;
+  void visit(const model::operation::ReduceMaxNode &) override;
+  void visit(const model::operation::ComparisonNode &) override;
+  void visit(const model::operation::LogicalAndNode &) override;
+  void visit(const model::operation::LSTMNode &) override;
+  void visit(const model::operation::RSQRTNode &) override;
+  void visit(const model::operation::ReLUNode &) override;
+  void visit(const model::operation::ResizeBilinearNode &) override;
+  void visit(const model::operation::ReLU1Node &) override;
+  void visit(const model::operation::ReLU6Node &) override;
+  void visit(const model::operation::RNNNode &) override;
+  void visit(const model::operation::FloorNode &) override;
+  void visit(const model::operation::SpaceToDepthNode &) override;
+  void visit(const model::operation::L2Pool2DNode &) override;
+  void visit(const model::operation::EmbeddingLookupNode &) override;
+  void visit(const model::operation::L2NormalizationNode &) override;
+  void visit(const model::operation::HashtableLookupNode &) override;
+  void visit(const model::operation::PReLUNode &) override;
+  void visit(const model::operation::TransposeConvNode &) override;
+  void visit(const model::operation::SQRTNode &) override;
+  void visit(const model::operation::LogicalOrNode &) override;
+  void visit(const model::operation::LogicalNotNode &) override;
+  void visit(const model::operation::SquaredDifferenceNode &) override;
+  void visit(const model::operation::TopKV2Node &) override;
+  void visit(const model::operation::GatherNode &) override;
+  void visit(const model::operation::NegNode &) override;
+  void visit(const model::operation::AbsNode &) override;
+  void visit(const model::operation::ArgMaxNode &) override;
+  void visit(const model::operation::DequantizeNode &) override;
+  void visit(const model::operation::MeanNode &) override;
+  void visit(const model::operation::LocalResponseNormalizationNode &) override;
+  void visit(const model::operation::DepthToSpaceNode &) override;
+  void visit(const model::operation::ReduceMinNode &) override;
+  void visit(const model::operation::SplitNode &) override;
+  void visit(const model::operation::UnpackNode &) override;
+  void visit(const model::operation::PadNode &) override;
+
+private:
+  const neurun::model::Operands &_ctx;
+  std::shared_ptr<TensorBuilder> _tensor_builder;
+  model::Layout _current_subg_layout;
+};
+
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_CL_KERNEL_GENERATOR_H__
diff --git a/runtimes/neurun/backend/acl_cl/PluginClassesAllocator.cc b/runtimes/neurun/backend/acl_cl/PluginClassesAllocator.cc
new file mode 100644
index 000000000..ac3f0acff
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/PluginClassesAllocator.cc
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <util/logging.h>
+
+#include "Backend.h"
+
+extern "C" {
+neurun::backend::Backend *neurun_backend_create()
+{
+  VERBOSE(neurun_backend_create) << "'acl_cl' loaded\n";
+  return new neurun::backend::acl_cl::Backend;
+}
+
+void neurun_backend_destroy(neurun::backend::Backend *backend)
+{
+  VERBOSE(neurun_backend_create) << "'acl_cl' unloaded\n";
+  delete backend;
+}
+}
diff --git a/runtimes/neurun/backend/acl_cl/ShapeFixer.cc b/runtimes/neurun/backend/acl_cl/ShapeFixer.cc
new file mode 100644
index 000000000..e6744cc24
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/ShapeFixer.cc
@@ -0,0 +1,361 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ShapeFixer.h"
+
+#include <arm_compute/runtime/CL/CLFunctions.h>   // Include all ARM Compute CL functions
+#include <arm_compute/runtime/CL/CLFunctionsEx.h> // Include all ARM Compute EX CL functions
+#include <arm_compute/runtime/misc/functions/GenericGather.h>
+#include <arm_compute/runtime/misc/functions/GenericReshapeLayer.h>
+
+#include <AclFunction.h>
+#include <Convert.h>
+#include <Swizzle.h>
+
+#include "kernel/ConcatLayer.h"
+#include "model/Index.h"
+#include "model/DataType.h"
+#include "model/InternalType.h"
+#include "compiler/IExecutionBuilder.h"
+#include "exec/NopFunction.h"
+#include "util/logging.h"
+#include "util/Utils.h"
+#include "util/Padding.h"
+
+using ::neurun::compiler::IExecutionBuilder;
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+
+using ::neurun::backend::acl_common::asAclFunction;
+
+ShapeFixer::ShapeFixer(const neurun::model::Operands &ctx,
+                       const std::shared_ptr<TensorBuilder> &tensor_builder)
+    : _ctx(ctx), _tensor_builder(tensor_builder)
+{
+  assert(tensor_builder);
+}
+
+void ShapeFixer::visit(const model::operation::CastNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::Conv2DNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::DepthwiseConv2DNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::MaxPool2DNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::AvgPool2DNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ConcatNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  _tensor_builder->dimCorrection(ofm_index, false);
+  for (const auto &input : node.getInputs())
+    _tensor_builder->dimCorrection(input, false);
+}
+
+void ShapeFixer::visit(const model::operation::FullyConnectedNode &node)
+{
+  using model::operation::FullyConnectedNode;
+  const auto input_index{node.getInputs().at(FullyConnectedNode::Input::INPUT)};
+  const auto input_rank = _ctx.at(input_index).shape().rank();
+  if (input_rank == 4)
+    _tensor_builder->dimCorrection(input_index, false);
+}
+
+void ShapeFixer::visit(const model::operation::MulNode &node)
+{
+  const auto lhs_index{node.getInputs().at(model::operation::MulNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::MulNode::Input::RHS)};
+
+  if (!(_ctx.at(lhs_index).shape() == _ctx.at(rhs_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(lhs_index).shape().rank(), _ctx.at(rhs_index).shape().rank());
+
+    // TODO remove const_cast later. For example, _ctx may need to be a non const variable or
+    //      a node to extend shape may be inserted in front of this operation
+    const_cast<::neurun::model::Shape &>(_ctx.at(lhs_index).shape()).extendRank(broadcast_rank);
+    const_cast<::neurun::model::Shape &>(_ctx.at(rhs_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+void ShapeFixer::visit(const model::operation::ReduceSumNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ReshapeNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::ReshapeNode::Input::INPUT)};
+  _tensor_builder->dimCorrection(input_index, false);
+  _tensor_builder->dimCorrection(output_index, false);
+}
+
+void ShapeFixer::visit(const model::operation::SqueezeNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::SqueezeNode::Input::INPUT)};
+  _tensor_builder->dimCorrection(input_index, false);
+  _tensor_builder->dimCorrection(output_index, false);
+}
+
+void ShapeFixer::visit(const model::operation::TanhNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::SoftmaxNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::StridedSliceNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::TransposeNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::AddNode &node)
+{
+  const auto lhs_index{node.getInputs().at(model::operation::AddNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::AddNode::Input::RHS)};
+
+  if (!(_ctx.at(lhs_index).shape() == _ctx.at(rhs_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(lhs_index).shape().rank(), _ctx.at(rhs_index).shape().rank());
+    const_cast<::neurun::model::Shape &>(_ctx.at(lhs_index).shape()).extendRank(broadcast_rank);
+    const_cast<::neurun::model::Shape &>(_ctx.at(rhs_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+void ShapeFixer::visit(const model::operation::SubNode &node)
+{
+  const auto lhs_index{node.getInputs().at(model::operation::SubNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::SubNode::Input::RHS)};
+
+  if (!(_ctx.at(lhs_index).shape() == _ctx.at(rhs_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(lhs_index).shape().rank(), _ctx.at(rhs_index).shape().rank());
+
+    // TODO remove const_cast later. For example, _ctx may need to be a non const variable or
+    //      a node to extend shape may be inserted in front of this operation
+    const_cast<::neurun::model::Shape &>(_ctx.at(lhs_index).shape()).extendRank(broadcast_rank);
+    const_cast<::neurun::model::Shape &>(_ctx.at(rhs_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+void ShapeFixer::visit(const model::operation::DivNode &node)
+{
+  const auto lhs_index{node.getInputs().at(model::operation::DivNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::DivNode::Input::RHS)};
+
+  if (!(_ctx.at(lhs_index).shape() == _ctx.at(rhs_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(lhs_index).shape().rank(), _ctx.at(rhs_index).shape().rank());
+
+    // TODO remove const_cast later. For example, _ctx may need to be a non const variable or
+    //      a node to extend shape may be inserted in front of this operation
+    const_cast<::neurun::model::Shape &>(_ctx.at(lhs_index).shape()).extendRank(broadcast_rank);
+    const_cast<::neurun::model::Shape &>(_ctx.at(rhs_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+void ShapeFixer::visit(const model::operation::ExpNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::LogisticNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::LogicalAndNode &node)
+{
+  const auto input0_index{node.getInputs().at(model::operation::LogicalAndNode::Input::INPUT0)};
+  const auto input1_index{node.getInputs().at(model::operation::LogicalAndNode::Input::INPUT1)};
+
+  if (!(_ctx.at(input0_index).shape() == _ctx.at(input1_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(input0_index).shape().rank(), _ctx.at(input1_index).shape().rank());
+
+    // TODO remove const_cast later. For example, _ctx may need to be a non const variable or
+    //      a node to extend shape may be inserted in front of this operation
+    const_cast<::neurun::model::Shape &>(_ctx.at(input0_index).shape()).extendRank(broadcast_rank);
+    const_cast<::neurun::model::Shape &>(_ctx.at(input1_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+void ShapeFixer::visit(const model::operation::LSTMNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ReduceMaxNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ComparisonNode &node)
+{
+  const auto input0_index{node.getInputs().at(model::operation::ComparisonNode::Input::INPUT0)};
+  const auto input1_index{node.getInputs().at(model::operation::ComparisonNode::Input::INPUT1)};
+
+  if (!(_ctx.at(input0_index).shape() == _ctx.at(input1_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(input0_index).shape().rank(), _ctx.at(input1_index).shape().rank());
+
+    // TODO remove const_cast later. For example, _ctx may need to be a non const variable or
+    //      a node to extend shape may be inserted in front of this operation
+    const_cast<::neurun::model::Shape &>(_ctx.at(input0_index).shape()).extendRank(broadcast_rank);
+    const_cast<::neurun::model::Shape &>(_ctx.at(input1_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+void ShapeFixer::visit(const model::operation::RSQRTNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ReLUNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ResizeBilinearNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ReLU1Node &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ReLU6Node &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::RNNNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::FloorNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::SpaceToDepthNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::SpaceToDepthNode::Input::INPUT)};
+  _tensor_builder->dimCorrection(ofm_index, false);
+  _tensor_builder->dimCorrection(ifm_index, false);
+}
+
+void ShapeFixer::visit(const model::operation::L2Pool2DNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::EmbeddingLookupNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto values_index{
+      node.getInputs().at(model::operation::EmbeddingLookupNode::Input::VALUES)};
+  _tensor_builder->dimCorrection(values_index, false);
+  _tensor_builder->dimCorrection(output_index, false);
+}
+
+void ShapeFixer::visit(const model::operation::L2NormalizationNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::HashtableLookupNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::PReLUNode &node)
+{
+  const auto ifm_index{node.getInputs().at(model::operation::PReLUNode::Input::INPUT)};
+  const auto alpha_index{node.getInputs().at(model::operation::PReLUNode::Input::ALPHA)};
+
+  if (!(_ctx.at(ifm_index).shape() == _ctx.at(alpha_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(ifm_index).shape().rank(), _ctx.at(alpha_index).shape().rank());
+    const_cast<::neurun::model::Shape &>(_ctx.at(ifm_index).shape()).extendRank(broadcast_rank);
+    const_cast<::neurun::model::Shape &>(_ctx.at(alpha_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+void ShapeFixer::visit(const model::operation::TransposeConvNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::SQRTNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::LogicalOrNode &node)
+{
+  const auto input0_index{node.getInputs().at(model::operation::LogicalOrNode::Input::INPUT0)};
+  const auto input1_index{node.getInputs().at(model::operation::LogicalOrNode::Input::INPUT1)};
+
+  if (!(_ctx.at(input0_index).shape() == _ctx.at(input1_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(input0_index).shape().rank(), _ctx.at(input1_index).shape().rank());
+    const_cast<::neurun::model::Shape &>(_ctx.at(input0_index).shape()).extendRank(broadcast_rank);
+    const_cast<::neurun::model::Shape &>(_ctx.at(input1_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+void ShapeFixer::visit(const model::operation::LogicalNotNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::SquaredDifferenceNode &node)
+{
+  const auto lhs_index{node.getInputs().at(model::operation::SquaredDifferenceNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::SquaredDifferenceNode::Input::RHS)};
+
+  if (!(_ctx.at(lhs_index).shape() == _ctx.at(rhs_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(lhs_index).shape().rank(), _ctx.at(rhs_index).shape().rank());
+    const_cast<neurun::model::Shape &>(_ctx.at(lhs_index).shape()).extendRank(broadcast_rank);
+    const_cast<neurun::model::Shape &>(_ctx.at(rhs_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+void ShapeFixer::visit(const model::operation::TopKV2Node &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::GatherNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::GatherNode::Input::INPUT)};
+  const auto indices_index{node.getInputs().at(model::operation::GatherNode::Input::INDICES)};
+  _tensor_builder->dimCorrection(ofm_index, false);
+  _tensor_builder->dimCorrection(ifm_index, false);
+  _tensor_builder->dimCorrection(indices_index, false);
+}
+
+void ShapeFixer::visit(const model::operation::NegNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::AbsNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ArgMaxNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::ArgMaxNode::Input::INPUT)};
+  _tensor_builder->dimCorrection(ofm_index, false);
+  _tensor_builder->dimCorrection(ifm_index, false);
+}
+
+void ShapeFixer::visit(const model::operation::DequantizeNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::MeanNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::LocalResponseNormalizationNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::DepthToSpaceNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ReduceMinNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::SplitNode &node)
+{
+  const auto input_index{node.getInputs().at(model::operation::SplitNode::Input::INPUT)};
+  _tensor_builder->dimCorrection(input_index, false);
+  for (const auto &output : node.getOutputs())
+    _tensor_builder->dimCorrection(output, false);
+}
+
+void ShapeFixer::visit(const model::operation::UnpackNode &node)
+{
+  const auto input_index{node.getInputs().at(model::operation::UnpackNode::Input::INPUT)};
+  _tensor_builder->dimCorrection(input_index, false);
+  for (const auto &output_index : node.getOutputs())
+    _tensor_builder->dimCorrection(output_index, false);
+}
+
+void ShapeFixer::visit(const model::operation::PadNode &node)
+{
+  const auto input_index{node.getInputs().at(model::operation::PadNode::Input::INPUT)};
+  const auto output_index{node.getOutputs().at(0)};
+  _tensor_builder->dimCorrection(input_index, false);
+  _tensor_builder->dimCorrection(output_index, false);
+}
+
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/acl_cl/ShapeFixer.h b/runtimes/neurun/backend/acl_cl/ShapeFixer.h
new file mode 100644
index 000000000..519d1bafb
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/ShapeFixer.h
@@ -0,0 +1,105 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_CL_SHAPE_FIXER_H__
+#define __NEURUN_BACKEND_ACL_CL_SHAPE_FIXER_H__
+
+#include <backend/IShapeFixer.h>
+
+#include "model/Operands.h"
+#include "TensorBuilder.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+
+class ShapeFixer : public IShapeFixer
+{
+public:
+  ShapeFixer(const neurun::model::Operands &ctx,
+             const std::shared_ptr<TensorBuilder> &tensor_builder);
+
+  std::shared_ptr<ITensorBuilder> tensor_builder() override { return _tensor_builder; }
+
+  void visit(const model::operation::Conv2DNode &) override;
+  void visit(const model::operation::DepthwiseConv2DNode &) override;
+  void visit(const model::operation::MaxPool2DNode &) override;
+  void visit(const model::operation::AvgPool2DNode &) override;
+  void visit(const model::operation::ConcatNode &) override;
+  void visit(const model::operation::FullyConnectedNode &) override;
+  void visit(const model::operation::MulNode &) override;
+  void visit(const model::operation::ReduceSumNode &) override;
+  void visit(const model::operation::ReshapeNode &) override;
+  void visit(const model::operation::SqueezeNode &) override;
+  void visit(const model::operation::TanhNode &) override;
+  void visit(const model::operation::SoftmaxNode &) override;
+  void visit(const model::operation::StridedSliceNode &) override;
+  void visit(const model::operation::TransposeNode &) override;
+  void visit(const model::operation::AddNode &) override;
+  void visit(const model::operation::SubNode &) override;
+  void visit(const model::operation::CastNode &) override;
+  void visit(const model::operation::DivNode &) override;
+  void visit(const model::operation::ExpNode &) override;
+  void visit(const model::operation::LogisticNode &) override;
+  void visit(const model::operation::ReduceMaxNode &) override;
+  void visit(const model::operation::ComparisonNode &) override;
+  void visit(const model::operation::LogicalAndNode &) override;
+  void visit(const model::operation::LSTMNode &) override;
+  void visit(const model::operation::RSQRTNode &) override;
+  void visit(const model::operation::ReLUNode &) override;
+  void visit(const model::operation::ResizeBilinearNode &) override;
+  void visit(const model::operation::ReLU1Node &) override;
+  void visit(const model::operation::ReLU6Node &) override;
+  void visit(const model::operation::RNNNode &) override;
+  void visit(const model::operation::FloorNode &) override;
+  void visit(const model::operation::SpaceToDepthNode &) override;
+  void visit(const model::operation::L2Pool2DNode &) override;
+  void visit(const model::operation::EmbeddingLookupNode &) override;
+  void visit(const model::operation::L2NormalizationNode &) override;
+  void visit(const model::operation::HashtableLookupNode &) override;
+  void visit(const model::operation::PReLUNode &) override;
+  void visit(const model::operation::TransposeConvNode &) override;
+  void visit(const model::operation::SQRTNode &) override;
+  void visit(const model::operation::LogicalOrNode &) override;
+  void visit(const model::operation::LogicalNotNode &) override;
+  void visit(const model::operation::SquaredDifferenceNode &) override;
+  void visit(const model::operation::TopKV2Node &) override;
+  void visit(const model::operation::GatherNode &) override;
+  void visit(const model::operation::NegNode &) override;
+  void visit(const model::operation::AbsNode &) override;
+  void visit(const model::operation::ArgMaxNode &) override;
+  void visit(const model::operation::DequantizeNode &) override;
+  void visit(const model::operation::MeanNode &) override;
+  void visit(const model::operation::LocalResponseNormalizationNode &) override;
+  void visit(const model::operation::DepthToSpaceNode &) override;
+  void visit(const model::operation::ReduceMinNode &) override;
+  void visit(const model::operation::SplitNode &) override;
+  void visit(const model::operation::UnpackNode &) override;
+  void visit(const model::operation::PadNode &) override;
+
+private:
+  const neurun::model::Operands &_ctx;
+  std::shared_ptr<TensorBuilder> _tensor_builder;
+};
+
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_CL_SHAPE_FIXER_H__
diff --git a/runtimes/neurun/backend/acl_cl/TensorBuilder.h b/runtimes/neurun/backend/acl_cl/TensorBuilder.h
new file mode 100644
index 000000000..8ce69a6c2
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/TensorBuilder.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_CL_TENSOR_BUILDER_H__
+#define __NEURUN_BACKEND_ACL_CL_TENSOR_BUILDER_H__
+
+#include <TemplTensorBuilder.h>
+
+#include "operand/CLTensor.h"
+#include "operand/CLSubTensor.h"
+#include "operand/Object.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+
+using TensorBuilder =
+    ::neurun::backend::acl_common::TemplTensorBuilder<::neurun::backend::acl_cl::operand::ICLTensor,
+                                                      operand::CLTensor, operand::CLSubTensor,
+                                                      operand::Object>;
+
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_CL_TENSOR_BUILDER_H__
diff --git a/runtimes/neurun/backend/acl_cl/TensorManager.h b/runtimes/neurun/backend/acl_cl/TensorManager.h
new file mode 100644
index 000000000..10145bb9a
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/TensorManager.h
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_CL_TENSOR_MANAGER_H__
+#define __NEURUN_BACKEND_ACL_CL_TENSOR_MANAGER_H__
+
+#include <arm_compute/runtime/CL/CLBufferAllocator.h>
+#include <arm_compute/runtime/PoolManager.h>
+#include <arm_compute/runtime/BlobLifetimeManager.h>
+#include <arm_compute/runtime/MemoryManagerOnDemand.h>
+#include <arm_compute/runtime/CL/CLMemoryGroup.h>
+
+#include <AclMemoryManager.h>
+#include <AclLinearMemoryManager.h>
+#include <AclInternalBufferManager.h>
+#include <AclTensorManager.h>
+
+#include "operand/CLTensor.h"
+#include "operand/CLSubTensor.h"
+#include "operand/Object.h"
+
+#include "util/logging.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+
+using MemoryManager =
+    ::neurun::backend::acl_common::AclMemoryManager<operand::ICLTensor, operand::CLTensor,
+                                                    operand::CLSubTensor, operand::Object>;
+
+using LinearMemoryManager = ::neurun::backend::acl_common::AclLinearMemoryManager<
+    operand::ICLTensor, operand::CLTensor, operand::CLSubTensor, operand::Object,
+    ::arm_compute::MemoryManagerOnDemand, ::arm_compute::PoolManager,
+    ::arm_compute::BlobLifetimeManager, ::arm_compute::CLBufferAllocator,
+    ::arm_compute::CLMemoryGroup>;
+
+using InternalBufferManager = ::neurun::backend::acl_common::AclInternalBufferManager<
+    ::arm_compute::MemoryManagerOnDemand, ::arm_compute::PoolManager,
+    ::arm_compute::BlobLifetimeManager, ::arm_compute::CLBufferAllocator>;
+
+using TensorManager =
+    ::neurun::backend::acl_common::AclTensorManager<::neurun::backend::acl_cl::operand::ICLTensor,
+                                                    operand::CLTensor, operand::CLSubTensor,
+                                                    operand::Object>;
+
+TensorManager *createTensorManager()
+{
+  const std::string executor_str = util::getConfigString(util::config::EXECUTOR);
+
+  if (executor_str == "Linear")
+  {
+    VERBOSE(acl_cl_createTensorManager) << "AclTensorManager as Linear" << std::endl;
+    return new TensorManager(new MemoryManager(), new LinearMemoryManager(),
+                             new InternalBufferManager());
+  }
+  else
+  {
+    VERBOSE(acl_cl_createTensorManager) << "AclTensorManager" << std::endl;
+    return new TensorManager(new MemoryManager(), new MemoryManager(), new InternalBufferManager());
+  }
+}
+
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_CL_TENSOR_MANAGER_H__
diff --git a/runtimes/neurun/backend/acl_cl/kernel/ConcatLayer.cc b/runtimes/neurun/backend/acl_cl/kernel/ConcatLayer.cc
new file mode 100644
index 000000000..aa1fd9aed
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/kernel/ConcatLayer.cc
@@ -0,0 +1,165 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ConcatLayer.h"
+
+#include <arm_compute/runtime/CL/CLScheduler.h>
+
+#include "util/feature/nchw/View.h"
+#include "util/logging.h"
+
+namespace
+{
+
+inline bool matchSizeExceptAxis(const ::neurun::backend::acl_cl::operand::ICLTensor *t1,
+                                const ::neurun::backend::acl_cl::operand::ICLTensor *t2,
+                                uint32_t axis)
+{
+  assert(t1->num_dimensions() <= 4);
+  assert(t2->num_dimensions() <= 4);
+
+  for (uint32_t i = 0; i < 4; i++)
+  {
+    if (axis == i)
+      continue;
+    if (t1->info()->dimension(i) != t2->info()->dimension(i))
+      return false;
+  }
+  return true;
+}
+
+} // namespace {anonymous}
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+namespace kernel
+{
+
+ConcatLayer::ConcatLayer()
+    : _input_allocs(), _output_alloc(nullptr), _axis(0), _input_type(arm_compute::DataType::F32)
+{
+  // DO NOTHING
+}
+
+template <typename T> bool ConcatLayer::concatenate()
+{
+  // Input and output size check
+  {
+    // NOTE Support only tensor with dimension 4 or less
+
+    uint32_t axis_sum = 0;
+
+    for (auto input : _input_allocs)
+    {
+      assert(_output_alloc->ptr()->layout() == input->ptr()->layout());
+      assert(matchSizeExceptAxis(_output_alloc->ptr(), input->ptr(), _axis));
+      axis_sum += input->ptr()->info()->dimension(_axis);
+    }
+
+    assert(_output_alloc->ptr()->info()->dimension(_axis) == axis_sum);
+  }
+
+  VERBOSE(Concat_RUN) << "START Concat" << std::endl;
+
+  // Perform operation
+  {
+    uint32_t axis_offset = 0;
+
+    auto outout_fn = [&](::neurun::backend::operand::ITensor &out_tensor) {
+      for (auto input : _input_allocs)
+      {
+        auto &out_cl_tensor =
+            static_cast<::neurun::backend::acl_cl::operand::ICLTensor &>(out_tensor);
+        auto input_fn = [&](::neurun::backend::operand::ITensor &in_tensor) {
+          auto &in_cl_tensor =
+              static_cast<::neurun::backend::acl_cl::operand::ICLTensor &>(in_tensor);
+          for (uint32_t i = 0; i < in_cl_tensor.info()->dimension(0); i++)
+          {
+            for (uint32_t j = 0; j < in_cl_tensor.info()->dimension(1); j++)
+            {
+              for (uint32_t k = 0; k < in_cl_tensor.info()->dimension(2); k++)
+              {
+                for (uint32_t l = 0; l < in_cl_tensor.info()->dimension(3); l++)
+                {
+                  int32_t io = (_axis == 0) ? axis_offset : 0;
+                  int32_t jo = (_axis == 1) ? axis_offset : 0;
+                  int32_t ko = (_axis == 2) ? axis_offset : 0;
+                  int32_t lo = (_axis == 3) ? axis_offset : 0;
+                  T value =
+                      *reinterpret_cast<T *>(in_cl_tensor.handle()->ptr_to_element({i, j, k, l}));
+                  *reinterpret_cast<T *>(out_cl_tensor.handle()->ptr_to_element(
+                      {i + io, j + jo, k + ko, l + lo})) = value;
+                }
+              }
+            }
+          }
+          if (_axis == 0)
+            axis_offset += in_cl_tensor.info()->dimension(0);
+          if (_axis == 1)
+            axis_offset += in_cl_tensor.info()->dimension(1);
+          if (_axis == 2)
+            axis_offset += in_cl_tensor.info()->dimension(2);
+          if (_axis == 3)
+            axis_offset += in_cl_tensor.info()->dimension(3);
+        };
+        input->access(input_fn);
+      }
+    };
+    _output_alloc->access(outout_fn);
+  }
+
+  VERBOSE(Concat_RUN) << "End   Concat" << std::endl;
+
+  return true;
+}
+
+void ConcatLayer::configure(
+    const std::vector<::neurun::backend::acl_cl::operand::Object *> &input_allocs, int32_t axis,
+    ::neurun::backend::acl_cl::operand::Object *output_alloc)
+{
+  _input_allocs = input_allocs;
+  _output_alloc = output_alloc;
+
+  assert(axis < 4);
+
+  // TODO Handle when axis is negative
+  assert(axis >= 0);
+
+  _axis = axis;
+
+  _input_type = input_allocs[0]->ptr()->data_type();
+}
+
+void ConcatLayer::run()
+{
+  if (_input_type == arm_compute::DataType::F32)
+  {
+    concatenate<float>();
+  }
+  else if (_input_type == arm_compute::DataType::QASYMM8)
+  {
+    concatenate<uint8_t>();
+  }
+}
+
+} // namespace kernel
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/acl_cl/kernel/ConcatLayer.h b/runtimes/neurun/backend/acl_cl/kernel/ConcatLayer.h
new file mode 100644
index 000000000..ed273e297
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/kernel/ConcatLayer.h
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_CL_KERNEL_CONCAT_LAYER_H__
+#define __NEURUN_BACKEND_ACL_CL_KERNEL_CONCAT_LAYER_H__
+
+#include <arm_compute/runtime/IFunction.h>
+#include <arm_compute/core/Types.h>
+
+#include "operand/Object.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+namespace kernel
+{
+
+//
+// neurun::backend::acl_cl::kernel::ConcatLayer
+// A naive implementation of ConcatLayer for ACL
+//
+
+class ConcatLayer : public ::arm_compute::IFunction
+{
+public:
+  ConcatLayer();
+
+public:
+  void configure(const std::vector<::neurun::backend::acl_cl::operand::Object *> &input_allocs,
+                 int32_t axis /* NNAPI tensor axis from NHWC order */,
+                 ::neurun::backend::acl_cl::operand::Object *output_alloc);
+
+  void run();
+
+private:
+  template <typename T> bool concatenate();
+
+private:
+  std::vector<::neurun::backend::acl_cl::operand::Object *> _input_allocs;
+  ::neurun::backend::acl_cl::operand::Object *_output_alloc;
+  int32_t _axis;
+  arm_compute::DataType _input_type;
+};
+
+} // namespace kernel
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_CL_KERNEL_CONCAT_LAYER_H__
diff --git a/runtimes/neurun/backend/acl_cl/operand/CLSubTensor.cc b/runtimes/neurun/backend/acl_cl/operand/CLSubTensor.cc
new file mode 100644
index 000000000..70c8829d9
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/operand/CLSubTensor.cc
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "CLSubTensor.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+namespace operand
+{
+
+CLSubTensor::CLSubTensor(ICLTensor *parent, const arm_compute::TensorShape &tensor_shape,
+                         const arm_compute::Coordinates &coords, size_t rank, bool extend_parent)
+    : _cl_sub_tensor(std::make_shared<arm_compute::CLSubTensor>(parent->handle(), tensor_shape,
+                                                                coords, extend_parent)),
+      _rank{rank}
+{
+  // DO NOTHING
+}
+
+const arm_compute::CLSubTensor *CLSubTensor::handle() const { return _cl_sub_tensor.get(); }
+
+arm_compute::CLSubTensor *CLSubTensor::handle() { return _cl_sub_tensor.get(); }
+
+} // namespace operand
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/acl_cl/operand/CLSubTensor.h b/runtimes/neurun/backend/acl_cl/operand/CLSubTensor.h
new file mode 100644
index 000000000..8eba3760f
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/operand/CLSubTensor.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_CL_OPERAND_CL_SUB_TENSOR_H__
+#define __NEURUN_BACKEND_ACL_CL_OPERAND_CL_SUB_TENSOR_H__
+
+#include <arm_compute/runtime/CL/CLSubTensor.h>
+#include "ICLTensor.h"
+#include "compiler/SubTensorInfo.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+namespace operand
+{
+
+class CLSubTensor : public ICLTensor
+{
+public:
+  CLSubTensor() = delete;
+
+public:
+  CLSubTensor(ICLTensor *parent, const arm_compute::TensorShape &tensor_shape,
+              const arm_compute::Coordinates &coords, size_t rank, bool extend_parent = false);
+
+public:
+  size_t num_dimensions() const final { return _rank; }
+
+public:
+  const arm_compute::CLSubTensor *handle() const override;
+  arm_compute::CLSubTensor *handle() override;
+
+public:
+  // This method is used to prevent the use of memcpy for SubTensor
+  bool has_padding() const override { return true; }
+
+private:
+  std::shared_ptr<arm_compute::CLSubTensor> _cl_sub_tensor;
+  size_t _rank;
+};
+
+} // namespace operand
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_CL_OPERAND_CL_SUB_TENSOR_H__
diff --git a/runtimes/neurun/backend/acl_cl/operand/CLTensor.cc b/runtimes/neurun/backend/acl_cl/operand/CLTensor.cc
new file mode 100644
index 000000000..6153fc2e4
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/operand/CLTensor.cc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "CLTensor.h"
+
+#include <arm_compute/runtime/CL/CLScheduler.h>
+#include <arm_compute/runtime/CL/CLMemory.h>
+#include <arm_compute/runtime/CL/CLMemoryRegion.h>
+
+#include <Convert.h>
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+namespace operand
+{
+
+CLTensor::CLTensor(const arm_compute::TensorInfo &info, size_t rank)
+    : _cl_tensor(std::make_shared<arm_compute::CLTensor>()), _rank{rank}
+{
+  allocator()->init(info);
+}
+
+const arm_compute::CLTensor *CLTensor::handle() const { return _cl_tensor.get(); }
+
+arm_compute::CLTensor *CLTensor::handle() { return _cl_tensor.get(); }
+
+arm_compute::CLTensorAllocator *CLTensor::allocator() { return _cl_tensor->allocator(); }
+
+void CLTensor::map(bool blocking) { _cl_tensor->map(blocking); }
+
+void CLTensor::unmap() { _cl_tensor->unmap(); }
+
+void CLTensor::setBuffer(void *host_ptr)
+{
+  // Constructs a Buffer on a user-supplied memory
+  auto buffer = cl::Buffer(arm_compute::CLScheduler::get().context(),
+                           CL_MEM_USE_HOST_PTR | CL_MEM_READ_WRITE, info()->total_size(), host_ptr);
+  // import memory
+  allocator()->import_memory(buffer);
+}
+
+} // namespace operand
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/acl_cl/operand/CLTensor.h b/runtimes/neurun/backend/acl_cl/operand/CLTensor.h
new file mode 100644
index 000000000..952851623
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/operand/CLTensor.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_CL_OPERAND_CL_TENSOR_H__
+#define __NEURUN_BACKEND_ACL_CL_OPERAND_CL_TENSOR_H__
+
+#include <arm_compute/core/TensorInfo.h>
+#include <arm_compute/runtime/CL/CLTensor.h>
+#include <arm_compute/runtime/CL/CLScheduler.h>
+#include "arm_compute/runtime/CL/CLTensorAllocator.h"
+#include "ICLTensor.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+namespace operand
+{
+
+class CLTensor : public ICLTensor
+{
+public:
+  CLTensor() = delete;
+
+public:
+  CLTensor(const arm_compute::TensorInfo &info, size_t rank);
+
+public:
+  size_t num_dimensions() const final { return _rank; }
+
+public:
+  const arm_compute::CLTensor *handle() const override;
+  arm_compute::CLTensor *handle() override;
+
+public:
+  arm_compute::CLTensorAllocator *allocator();
+  void map(bool blocking = true);
+  void unmap();
+  /** Set given buffer as the buffer of the tensor
+   *
+   * @note Ownership of the memory is not transferred to this object.
+   *       Thus management (allocate/free) should be done by the client.
+   *
+   * @param[in] host_ptr Storage to be used.
+   */
+  void setBuffer(void *host_ptr);
+
+private:
+  std::shared_ptr<arm_compute::CLTensor> _cl_tensor;
+  size_t _rank;
+};
+
+} // namespace operand
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_CL_OPERAND_CL_TENSOR_H__
diff --git a/runtimes/neurun/backend/acl_cl/operand/ICLTensor.h b/runtimes/neurun/backend/acl_cl/operand/ICLTensor.h
new file mode 100644
index 000000000..022cec6e3
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/operand/ICLTensor.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_CL_OPERAND_I_CL_TENSOR_H__
+#define __NEURUN_BACKEND_ACL_CL_OPERAND_I_CL_TENSOR_H__
+
+#include <arm_compute/core/CL/ICLTensor.h>
+
+#include <IACLTensor.h>
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+namespace operand
+{
+
+class ICLTensor : public acl_common::IACLTensor
+{
+public:
+  const arm_compute::ICLTensor *handle() const override = 0;
+  arm_compute::ICLTensor *handle() override = 0;
+
+public:
+  void map(cl::CommandQueue &q, bool blocking = true) { return handle()->map(q, blocking); }
+  void unmap(cl::CommandQueue &q) { return handle()->unmap(q); }
+};
+
+} // namespace operand
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_CL_OPERAND_I_CL_TENSOR_H__
diff --git a/runtimes/neurun/backend/acl_cl/operand/Object.cc b/runtimes/neurun/backend/acl_cl/operand/Object.cc
new file mode 100644
index 000000000..8f9b2a181
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/operand/Object.cc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "Object.h"
+
+#include <arm_compute/runtime/CL/CLScheduler.h>
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+namespace operand
+{
+
+void Object::access(const std::function<void(backend::operand::ITensor &tensor)> &fn) const
+{
+  auto &queue = ::arm_compute::CLScheduler::get().queue();
+
+  // This is an optional input
+  if (_tensor->total_size() == 0)
+    return;
+
+  _tensor->map(queue);
+  fn(*_tensor);
+  _tensor->unmap(queue);
+}
+
+} // namespace operand
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/acl_cl/operand/Object.h b/runtimes/neurun/backend/acl_cl/operand/Object.h
new file mode 100644
index 000000000..a4308feed
--- /dev/null
+++ b/runtimes/neurun/backend/acl_cl/operand/Object.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_CL_OPERAND_OBJECT_H__
+#define __NEURUN_BACKEND_ACL_CL_OPERAND_OBJECT_H__
+
+#include <memory>
+
+#include <backend/operand/IObject.h>
+#include "operand/ICLTensor.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_cl
+{
+namespace operand
+{
+
+class Object : public backend::operand::IObject
+{
+public:
+  Object() = default;
+
+public:
+  Object(const std::shared_ptr<acl_cl::operand::ICLTensor> &tensor) : _tensor{tensor}
+  {
+    // DO NOTHING
+  }
+
+public:
+  acl_cl::operand::ICLTensor *ptr(void) const override { return _tensor.get(); }
+
+private:
+  std::shared_ptr<acl_cl::operand::ICLTensor> _tensor;
+
+public:
+  void access(const std::function<void(backend::operand::ITensor &tensor)> &fn) const override;
+};
+
+} // namespace operand
+} // namespace acl_cl
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_CL_OPERAND_OBJECT_H__
diff --git a/runtimes/neurun/backend/acl_common/AclFunction.h b/runtimes/neurun/backend/acl_common/AclFunction.h
new file mode 100644
index 000000000..a63f3807b
--- /dev/null
+++ b/runtimes/neurun/backend/acl_common/AclFunction.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_COMMON_KERNEL_ACL_FUNCTION_H__
+#define __NEURUN_BACKEND_ACL_COMMON_KERNEL_ACL_FUNCTION_H__
+
+#include <exec/IFunction.h>
+#include <arm_compute/runtime/IFunction.h>
+#include <arm_compute/runtime/CL/CLScheduler.h>
+#include <memory>
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_common
+{
+
+class AclFunction : public ::neurun::exec::IFunction
+{
+public:
+  AclFunction() = delete;
+
+public:
+  AclFunction(std::unique_ptr<::arm_compute::IFunction> &&func) : _func(std::move(func))
+  {
+    // DO NOTHING
+  }
+
+public:
+  void run() override { _func->run(); }
+  void runSync() override
+  {
+    run();
+    arm_compute::CLScheduler::get().sync();
+  }
+  void prepare() override { _func->prepare(); }
+
+private:
+  std::unique_ptr<::arm_compute::IFunction> _func;
+};
+
+} // namespace acl_common
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_COMMON_KERNEL_ACL_FUNCTION_H__
diff --git a/runtimes/neurun/backend/acl_common/AclInternalBufferManager.h b/runtimes/neurun/backend/acl_common/AclInternalBufferManager.h
new file mode 100644
index 000000000..fe964bd85
--- /dev/null
+++ b/runtimes/neurun/backend/acl_common/AclInternalBufferManager.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_COMMON_INTERNAL_BUFFER_MANAGER_H__
+#define __NEURUN_BACKEND_ACL_COMMON_INTERNAL_BUFFER_MANAGER_H__
+
+#include <arm_compute/runtime/IMemoryManager.h>
+#include <cassert>
+#include <memory>
+#include <backend/IMemoryManager.h>
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_common
+{
+
+// NOTE. If any backend can use something like InternalBufferManager,
+// this interface can be moved to core/include/backend/
+/**
+ * @brief Interface for InternalBufferManager which has ::arm_compute::IMemoryManager pointer
+ */
+struct IInternalBufferManager : public backend::IMemoryManager
+{
+  virtual ~IInternalBufferManager() = default;
+
+  /**
+   * @brief Get shared_ptr of ::arm_compute::IMemoryManager
+   */
+  virtual std::shared_ptr<::arm_compute::IMemoryManager> internal_buffer_manager(void) = 0;
+};
+
+/**
+ * @brief class for InternalBufferManager which has ::arm_compute::IMemoryManager pointer
+ */
+template <typename T_MemoryManager, typename T_PoolManager, typename T_LifetimeManager,
+          typename T_Allocator>
+class AclInternalBufferManager : public IInternalBufferManager
+{
+public:
+  AclInternalBufferManager() : _allocator{nullptr}
+  {
+    std::shared_ptr<T_LifetimeManager> lifetime_mgr = std::make_shared<T_LifetimeManager>();
+    std::shared_ptr<T_PoolManager> pool_mgr = std::make_shared<T_PoolManager>();
+
+    _internal_manager = std::make_shared<T_MemoryManager>(lifetime_mgr, pool_mgr);
+    assert(_internal_manager);
+  }
+
+  virtual ~AclInternalBufferManager() = default;
+
+  /**
+   * @brief Allocate the internal buffer manager on acl
+   */
+  virtual void allocate(void) override
+  {
+    _allocator = std::make_shared<T_Allocator>();
+    _internal_manager->populate(*_allocator, 1);
+  }
+
+  /**
+   * @brief Deallocate the internal buffer manager on acl
+   */
+  virtual void deallocate(void) override { _internal_manager->clear(); }
+
+  /**
+   * @brief Get shared_ptr of ::arm_compute::IMemoryManager
+   */
+  virtual std::shared_ptr<::arm_compute::IMemoryManager> internal_buffer_manager(void) override
+  {
+    return _internal_manager;
+  }
+
+private:
+  std::shared_ptr<T_Allocator> _allocator;
+  std::shared_ptr<T_MemoryManager> _internal_manager;
+};
+
+} // namespace acl_common
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_COMMON_INTERNAL_BUFFER_MANAGER_H__
diff --git a/runtimes/neurun/backend/acl_common/AclLinearMemoryManager.h b/runtimes/neurun/backend/acl_common/AclLinearMemoryManager.h
new file mode 100644
index 000000000..793c7b2c4
--- /dev/null
+++ b/runtimes/neurun/backend/acl_common/AclLinearMemoryManager.h
@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_COMMON_LINEAR_MEMORY_MANAGER_H__
+#define __NEURUN_BACKEND_ACL_COMMON_LINEAR_MEMORY_MANAGER_H__
+
+#include <cassert>
+
+#include "AclMemoryManager.h"
+#include "model/OperandIndexMap.h"
+#include "util/logging.h"
+
+namespace
+{
+
+template <typename T_MemoryManager, typename T_PoolManager, typename T_LifetimeManager>
+std::shared_ptr<T_MemoryManager> createMemoryManager()
+{
+  std::shared_ptr<T_LifetimeManager> lifetime_mgr = std::make_shared<T_LifetimeManager>();
+  std::shared_ptr<T_PoolManager> pool_mgr = std::make_shared<T_PoolManager>();
+
+  std::shared_ptr<T_MemoryManager> mem_mgr =
+      std::make_shared<T_MemoryManager>(lifetime_mgr, pool_mgr);
+  return mem_mgr;
+}
+
+} // namespace anonymous
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_common
+{
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object,
+          typename T_MemoryManager, typename T_PoolManager, typename T_LifetimeManager,
+          typename T_Allocator, typename T_MemoryGroup>
+class AclLinearMemoryManager : public AclMemoryManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>
+{
+public:
+  AclLinearMemoryManager()
+      : _allocator{nullptr},
+        _io_manager{createMemoryManager<T_MemoryManager, T_PoolManager, T_LifetimeManager>()},
+        _io_group{std::make_shared<T_MemoryGroup>(_io_manager)}
+  {
+    // DO NOTHING
+  }
+
+  virtual ~AclLinearMemoryManager() = default;
+
+  virtual void allocate(void) override
+  {
+    _allocator = std::make_shared<T_Allocator>();
+    _io_manager->populate(*_allocator, 1);
+    _io_group->acquire();
+  }
+
+  virtual void deallocate(void) override
+  {
+    _io_group->release();
+    _io_manager->clear();
+  }
+
+  virtual void startLifetime(const model::OperandIndex &ind) override
+  {
+    auto &tensors = this->tensors();
+    assert(tensors.find(ind) != tensors.end());
+
+    auto tensor = tensors[ind];
+    assert(tensor->handle());
+
+    _io_group->manage(tensor->handle());
+  }
+
+  virtual void finishLifetime(const model::OperandIndex &ind) override
+  {
+    auto &tensors = this->tensors();
+    assert(tensors.find(ind) != tensors.end());
+
+    auto tensor = tensors[ind];
+    assert(tensor->allocator());
+
+    tensor->allocator()->allocate();
+  }
+
+private:
+  std::shared_ptr<T_Allocator> _allocator;
+  std::shared_ptr<T_MemoryManager> _io_manager;
+  std::shared_ptr<T_MemoryGroup> _io_group;
+};
+
+} // namespace acl_common
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_COMMON_LINEAR_MEMORY_MANAGER_H__
diff --git a/runtimes/neurun/backend/acl_common/AclMemoryManager.h b/runtimes/neurun/backend/acl_common/AclMemoryManager.h
new file mode 100644
index 000000000..076a3f490
--- /dev/null
+++ b/runtimes/neurun/backend/acl_common/AclMemoryManager.h
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_COMMON_MEMORY_MANAGER_H__
+#define __NEURUN_BACKEND_ACL_COMMON_MEMORY_MANAGER_H__
+
+#include <arm_compute/core/Types.h>
+#include <arm_compute/runtime/IMemoryManager.h>
+#include <cassert>
+
+#include "backend/IMemoryManager.h"
+#include "model/OperandIndexMap.h"
+#include "Convert.h"
+#include "util/logging.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_common
+{
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+class AclMemoryManager : public backend::IMemoryManager
+{
+public:
+  AclMemoryManager()
+  {
+    // DO NOTHING
+  }
+
+  virtual ~AclMemoryManager() = default;
+
+  virtual void allocate(void) override
+  {
+    for (const auto &tensor_entry : _tensors)
+    {
+      auto tensor = tensor_entry.second;
+      tensor->allocator()->allocate();
+    }
+  }
+
+  virtual void deallocate(void) override
+  {
+    for (const auto &tensor_entry : _tensors)
+    {
+      auto tensor = tensor_entry.second;
+      tensor->allocator()->free();
+    }
+  }
+
+  virtual void startLifetime(const model::OperandIndex &) { /* DO NOTHING */}
+  virtual void finishLifetime(const model::OperandIndex &) { /* DO NOTHING */}
+
+  void buildTensor(const model::OperandIndex &ind, const ::arm_compute::TensorInfo &info,
+                   size_t rank)
+  {
+    auto tensor = std::make_shared<T_Tensor>(info, rank);
+    _tensors[ind] = tensor;
+  }
+
+  void buildSubtensor(std::shared_ptr<T_ITensor> parent_tensor,
+                      const model::OperandIndex &child_ind, const ::arm_compute::TensorShape &shape,
+                      const ::arm_compute::Coordinates &coordinates, size_t rank,
+                      bool extent_parent)
+  {
+    auto subtensor =
+        std::make_shared<T_SubTensor>(parent_tensor.get(), shape, coordinates, rank, extent_parent);
+    _subtensors[child_ind] = subtensor;
+  }
+
+  std::shared_ptr<T_Object> wrapTensor(const model::OperandIndex &ind)
+  {
+    if (_objects.find(ind) != _objects.end())
+    {
+      return _objects.at(ind);
+    }
+    else
+    {
+      if (_tensors.find(ind) != _tensors.end())
+      {
+        return _objects[ind] = std::make_shared<T_Object>(_tensors.at(ind));
+      }
+      else
+      {
+        return _objects[ind] = std::make_shared<T_Object>(_subtensors.at(ind));
+      }
+    }
+  }
+
+  model::OperandIndexMap<std::shared_ptr<T_Tensor>> &tensors(void) { return _tensors; }
+
+  model::OperandIndexMap<std::shared_ptr<T_SubTensor>> &subtensors(void) { return _subtensors; }
+
+  model::OperandIndexMap<std::shared_ptr<T_Object>> &objects(void) { return _objects; }
+
+private:
+  model::OperandIndexMap<std::shared_ptr<T_Tensor>> _tensors;
+  model::OperandIndexMap<std::shared_ptr<T_SubTensor>> _subtensors;
+  model::OperandIndexMap<std::shared_ptr<T_Object>> _objects;
+};
+
+} // namespace acl_common
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_COMMON_MEMORY_MANAGER_H__
diff --git a/runtimes/neurun/backend/acl_common/AclTensorManager.h b/runtimes/neurun/backend/acl_common/AclTensorManager.h
new file mode 100644
index 000000000..63918ff09
--- /dev/null
+++ b/runtimes/neurun/backend/acl_common/AclTensorManager.h
@@ -0,0 +1,315 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_COMMON_TENSOR_MANAGER_H__
+#define __NEURUN_BACKEND_ACL_COMMON_TENSOR_MANAGER_H__
+
+#include <arm_compute/runtime/IMemoryManager.h>
+
+#include "backend/ITensorManager.h"
+#include "AclMemoryManager.h"
+#include "AclInternalBufferManager.h"
+#include "model/OperandIndexMap.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_common
+{
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+class AclTensorManager : public backend::ITensorManager
+{
+public:
+  using T_AclMemoryManager = AclMemoryManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>;
+
+  AclTensorManager(T_AclMemoryManager *const_mgr, T_AclMemoryManager *nonconst_mgr,
+                   IInternalBufferManager *inter_mgr);
+
+  virtual ~AclTensorManager() = default;
+
+  void allocateConsts(void) override;
+  void allocateNonconsts(void) override;
+  void deallocateConsts(void) override;
+  void deallocateNonconsts(void) override;
+
+  void allocateInternalBufferManager(void);
+  void deallocateInternalBufferManager(void);
+
+  void buildTensor(const model::OperandIndex &ind, const ::arm_compute::TensorInfo &info,
+                   size_t rank, bool as_const);
+  void buildSubtensor(const model::OperandIndex &parent, const model::OperandIndex &child,
+                      const ::arm_compute::TensorShape &shape,
+                      const ::arm_compute::Coordinates &coordinates, size_t rank,
+                      bool extent_parent);
+
+  std::shared_ptr<T_ITensor> findTensorAsParent(const model::OperandIndex &ind);
+
+  void startLifetime(const model::OperandIndex &ind);
+  void finishLifetime(const model::OperandIndex &ind);
+
+  std::shared_ptr<backend::operand::IObject> wrapTensor(const model::OperandIndex &ind);
+  std::shared_ptr<T_ITensor> at(const ::neurun::model::OperandIndex &ind);
+
+  model::OperandIndexMap<std::shared_ptr<T_Tensor>> &constTensors(void);
+  model::OperandIndexMap<std::shared_ptr<T_Tensor>> &nonconstTensors(void);
+  model::OperandIndexMap<std::shared_ptr<T_SubTensor>> &nonconstSubtensors(void);
+
+  std::shared_ptr<::arm_compute::IMemoryManager> internal_buffer_manager(void);
+
+  void iterate(const std::function<void(const model::OperandIndex &)> &fn);
+
+  void tryDeallocConstants(void);
+
+private:
+  std::unique_ptr<T_AclMemoryManager> _const_mgr;
+  std::unique_ptr<T_AclMemoryManager> _nonconst_mgr;
+  std::unique_ptr<IInternalBufferManager> _inter_mgr;
+  model::OperandIndexMap<T_AclMemoryManager &> _ind_to_mgr;
+};
+
+} // namespace acl_common
+} // namespace backend
+} // namespace neurun
+
+#include <cassert>
+#include "util/logging.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_common
+{
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::AclTensorManager(
+    T_AclMemoryManager *const_mgr, T_AclMemoryManager *nonconst_mgr,
+    IInternalBufferManager *inter_mgr)
+    : _const_mgr{const_mgr}, _nonconst_mgr{nonconst_mgr}, _inter_mgr{inter_mgr}
+{
+  // DO NOTHING
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::allocateConsts(void)
+{
+  _const_mgr->allocate();
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::allocateNonconsts(void)
+{
+  _nonconst_mgr->allocate();
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::deallocateConsts(void)
+{
+  _const_mgr->deallocate();
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::deallocateNonconsts(void)
+{
+  _nonconst_mgr->deallocate();
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::allocateInternalBufferManager(
+    void)
+{
+  _inter_mgr->allocate();
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::deallocateInternalBufferManager(
+    void)
+{
+  _inter_mgr->deallocate();
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::buildTensor(
+    const model::OperandIndex &ind, const ::arm_compute::TensorInfo &info, size_t rank,
+    bool as_const)
+{
+  assert(_ind_to_mgr.find(ind) == _ind_to_mgr.end());
+  if (as_const)
+  {
+    _const_mgr->buildTensor(ind, info, rank);
+    _ind_to_mgr.insert({ind, *_const_mgr});
+  }
+  else
+  {
+    _nonconst_mgr->buildTensor(ind, info, rank);
+    _ind_to_mgr.insert({ind, *_nonconst_mgr});
+  }
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::buildSubtensor(
+    const model::OperandIndex &parent, const model::OperandIndex &child,
+    const ::arm_compute::TensorShape &shape, const ::arm_compute::Coordinates &coordinates,
+    size_t rank, bool extent_parent)
+{
+  assert(_ind_to_mgr.find(child) == _ind_to_mgr.end());
+  std::shared_ptr<T_ITensor> parent_tensor = findTensorAsParent(parent);
+  assert(parent_tensor);
+  _nonconst_mgr->buildSubtensor(parent_tensor, child, shape, coordinates, rank, extent_parent);
+  _ind_to_mgr.insert({child, *_nonconst_mgr});
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+std::shared_ptr<T_ITensor>
+AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::findTensorAsParent(
+    const model::OperandIndex &ind)
+{
+
+  auto &tensors = _nonconst_mgr->tensors();
+  auto &subtensors = _nonconst_mgr->subtensors();
+  if (tensors.find(ind) != tensors.end())
+  {
+    // Parent is allocated as tensor
+    return tensors[ind];
+  }
+  else if (subtensors.find(ind) != subtensors.end())
+  {
+    // Parent is allocated as subtensor
+    return subtensors[ind];
+  }
+  else
+  {
+    return nullptr;
+  }
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::startLifetime(
+    const model::OperandIndex &ind)
+{
+  assert(_ind_to_mgr.find(ind) != _ind_to_mgr.end());
+  _ind_to_mgr.at(ind).startLifetime(ind);
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::finishLifetime(
+    const model::OperandIndex &ind)
+{
+  assert(_ind_to_mgr.find(ind) != _ind_to_mgr.end());
+  _ind_to_mgr.at(ind).finishLifetime(ind);
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+std::shared_ptr<backend::operand::IObject>
+AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::wrapTensor(
+    const model::OperandIndex &ind)
+{
+  assert(_ind_to_mgr.find(ind) != _ind_to_mgr.end());
+  return _ind_to_mgr.at(ind).wrapTensor(ind);
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+std::shared_ptr<T_ITensor> AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::at(
+    const ::neurun::model::OperandIndex &ind)
+{
+  assert(_ind_to_mgr.find(ind) != _ind_to_mgr.end());
+
+  auto &tensors = _ind_to_mgr.at(ind).tensors();
+  if (tensors.find(ind) != tensors.end())
+  {
+    return tensors.at(ind);
+  }
+  else
+  {
+    return _ind_to_mgr.at(ind).subtensors().at(ind);
+  }
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+model::OperandIndexMap<std::shared_ptr<T_Tensor>> &
+AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::constTensors(void)
+{
+  return _const_mgr->tensors();
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+model::OperandIndexMap<std::shared_ptr<T_Tensor>> &
+AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::nonconstTensors(void)
+{
+  return _nonconst_mgr->tensors();
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+model::OperandIndexMap<std::shared_ptr<T_SubTensor>> &
+AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::nonconstSubtensors(void)
+{
+  return _nonconst_mgr->subtensors();
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+std::shared_ptr<::arm_compute::IMemoryManager>
+AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::internal_buffer_manager(void)
+{
+  return _inter_mgr->internal_buffer_manager();
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::iterate(
+    const std::function<void(const model::OperandIndex &)> &fn)
+{
+  for (auto it : _nonconst_mgr->tensors())
+    fn(it.first);
+
+  for (auto it : _nonconst_mgr->subtensors())
+    fn(it.first);
+
+  for (auto it : _const_mgr->tensors())
+    fn(it.first);
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>::tryDeallocConstants(void)
+{
+  auto &tensors = _const_mgr->tensors();
+  auto &objects = _const_mgr->objects();
+
+  for (auto it = tensors.begin(); it != tensors.end();)
+  {
+    const auto &ind = it->first;
+    auto tensor = it->second;
+    if (tensor->handle() && !tensor->handle()->is_used())
+    {
+      VERBOSE(AclTensorManager) << "Tensor #" << ind.value()
+                                << " will be deallocated as an unused constant tensor" << std::endl;
+      tensor->allocator()->free();
+      tensor.reset();
+      it = tensors.erase(it);
+      objects.erase(ind);
+    }
+    else
+    {
+      ++it;
+    }
+  }
+}
+
+} // namespace acl_common
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_COMMON_TENSOR_MANAGER_H__
diff --git a/runtimes/neurun/backend/acl_common/CMakeLists.txt b/runtimes/neurun/backend/acl_common/CMakeLists.txt
new file mode 100644
index 000000000..0dff1d68a
--- /dev/null
+++ b/runtimes/neurun/backend/acl_common/CMakeLists.txt
@@ -0,0 +1,21 @@
+# Unsupported architecture
+nnfw_find_package(ARMCompute QUIET)
+if(NOT ARMCompute_FOUND)
+  return()
+endif(NOT ARMCompute_FOUND)
+
+file(GLOB SOURCES "*.cc")
+
+add_library(${LIB_NEURUN_BACKEND_ACL_COMMON} STATIC ${SOURCES})
+
+target_include_directories(${LIB_NEURUN_BACKEND_ACL_COMMON} PUBLIC ${NEURUN_INCLUDE_DIR})
+target_include_directories(${LIB_NEURUN_BACKEND_ACL_COMMON} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR})
+target_link_libraries(${LIB_NEURUN_BACKEND_ACL_COMMON} PUBLIC arm_compute arm_compute_ex)
+target_link_libraries(${LIB_NEURUN_BACKEND_ACL_COMMON} PUBLIC nnfw_lib_misc nnfw_lib_cpp14)
+target_link_libraries(${LIB_NEURUN_BACKEND_ACL_COMMON} PRIVATE nnfw_common)
+target_link_libraries(${LIB_NEURUN_BACKEND_ACL_COMMON} PRIVATE nnfw_coverage)
+
+set_target_properties(${LIB_NEURUN_BACKEND_ACL_COMMON} PROPERTIES POSITION_INDEPENDENT_CODE ON)
+set_target_properties(${LIB_NEURUN_BACKEND_ACL_COMMON} PROPERTIES OUTPUT_NAME backend_acl_common)
+
+install(TARGETS ${LIB_NEURUN_BACKEND_ACL_COMMON} DESTINATION lib)
diff --git a/runtimes/neurun/backend/acl_common/Convert.cc b/runtimes/neurun/backend/acl_common/Convert.cc
new file mode 100644
index 000000000..b814587cc
--- /dev/null
+++ b/runtimes/neurun/backend/acl_common/Convert.cc
@@ -0,0 +1,196 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "Convert.h"
+
+#include "Swizzle.h"
+#include "model/DataType.h"
+#include <cpp14/memory.h>
+
+namespace
+{
+
+::arm_compute::DataLayout asDataLayout(::neurun::model::Layout layout)
+{
+  switch (layout)
+  {
+    case ::neurun::model::Layout::NHWC:
+      return ::arm_compute::DataLayout::NHWC;
+    case ::neurun::model::Layout::NCHW:
+      return ::arm_compute::DataLayout::NCHW;
+    default:
+      return ::arm_compute::DataLayout::UNKNOWN;
+  }
+}
+
+} // namespace
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_common
+{
+
+::arm_compute::TensorShape asTensorShape(const ::neurun::model::Shape &shape,
+                                         ::neurun::model::Layout frontend_layout,
+                                         ::neurun::model::Layout backend_layout,
+                                         bool apply_dim_correction)
+{
+  const uint32_t rank = shape.rank();
+
+  ::arm_compute::TensorShape res{};
+
+  res.set_num_dimensions(rank);
+
+  for (uint32_t axis = 0; axis < rank; ++axis)
+  {
+    // NOTE In some cases, in incorrect dimensions is required.
+    // For example, intput_size is 1 in LSTM. The input-to-input weights([num_units, input_size]) of
+    // LSTM is used as the weight of the FullyConnected.
+    // The FullyConnected's weight must be greater or equal than 2-dimensions.
+    // However, if the dimension correction is applied to input_to_input_weights with input_size
+    // equal to 1, it will be changed to 1-D.
+    // So input_to_input_weights is not used by the weight of FullyConnected.
+    res.set(ToARMComputeAxis(rank, axis, frontend_layout, backend_layout).value(), shape.dim(axis),
+            apply_dim_correction);
+  }
+
+  return res;
+}
+
+::arm_compute::Coordinates asTensorCoordinate(const ::neurun::util::Coordinates &coord,
+                                              ::neurun::model::Layout frontend_layout,
+                                              ::neurun::model::Layout backend_layout)
+{
+  const uint32_t rank = coord.size();
+
+  ::arm_compute::Coordinates res{};
+
+  res.set_num_dimensions(rank);
+
+  for (uint32_t axis = 0; axis < rank; ++axis)
+  {
+    res.set(ToARMComputeAxis(rank, axis, frontend_layout, backend_layout).value(), coord[axis]);
+  }
+
+  return res;
+}
+
+::arm_compute::DataType asDataType(const ::neurun::model::DataType &type)
+{
+  switch (type)
+  {
+    case ::neurun::model::DataType::FLOAT32:
+      return ::arm_compute::DataType::F32;
+    case ::neurun::model::DataType::INT32:
+      return ::arm_compute::DataType::S32;
+    case ::neurun::model::DataType::UINT32:
+      return ::arm_compute::DataType::U32;
+    case ::neurun::model::DataType::QUANT8_ASYMM:
+      return ::arm_compute::DataType::QASYMM8;
+    case ::neurun::model::DataType::BOOL8:
+      return ::arm_compute::DataType::U8;
+    default:
+      throw std::runtime_error("Not supported, yet");
+      break;
+  }
+}
+
+::arm_compute::QuantizationInfo asQuantizationInfo(const float scale, const int32_t offset)
+{
+  return ::arm_compute::QuantizationInfo(scale, offset);
+}
+
+::arm_compute::TensorInfo asTensorInfo(const ::neurun::model::Shape &shape,
+                                       const ::neurun::model::TypeInfo &typeInfo,
+                                       ::neurun::model::Layout frontend_layout,
+                                       ::neurun::model::Layout backend_layout,
+                                       bool apply_dim_correction)
+{
+  ::arm_compute::TensorInfo info(
+      asTensorShape(shape, frontend_layout, backend_layout, apply_dim_correction), 1,
+      asDataType(typeInfo.type()), asQuantizationInfo(typeInfo.scale(), typeInfo.offset()));
+  info.set_data_layout(asDataLayout(backend_layout));
+  return info;
+}
+
+::arm_compute::PadStrideInfo asPadStrideInfo(const model::ExplicitPadding &padding,
+                                             const model::Stride &stride)
+{
+  return ::arm_compute::PadStrideInfo{stride.horizontal,
+                                      stride.vertical,
+                                      padding.left,
+                                      padding.right,
+                                      padding.top,
+                                      padding.bottom,
+                                      ::arm_compute::DimensionRoundingType::FLOOR};
+}
+
+::arm_compute::ActivationLayerInfo
+asActivationLayerInfo(const ::neurun::model::Activation &act_code)
+{
+  switch (act_code)
+  {
+    case ::neurun::model::Activation::NONE:
+      return ::arm_compute::ActivationLayerInfo{};
+    case ::neurun::model::Activation::RELU:
+      return ::arm_compute::ActivationLayerInfo{
+          ::arm_compute::ActivationLayerInfo::ActivationFunction::RELU};
+    case ::neurun::model::Activation::RELU1:
+      return ::arm_compute::ActivationLayerInfo{
+          ::arm_compute::ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU, 1.0f, -1.0f};
+    case ::neurun::model::Activation::RELU6:
+      return ::arm_compute::ActivationLayerInfo{
+          ::arm_compute::ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU, 6.0f, 0.0f};
+    // Cases for activation of LSTM.
+    case ::neurun::model::Activation::TANH:
+      return ::arm_compute::ActivationLayerInfo{
+          ::arm_compute::ActivationLayerInfo::ActivationFunction::TANH, 1.0f, 1.0f};
+    case ::neurun::model::Activation::SIGMOID:
+      // NOTE The sigmoid function is a special case of the Logistic function when L=1, k=1, x0=0.
+      // TODO In ACL and nnapi sepc, currently, Logistic's L always is 1, k always is 1, x0 always
+      // 0(always sigmoid) regardless of values of the parameter.
+      //      If ACL support non-sigmoid logistic, should fix param values.
+      return ::arm_compute::ActivationLayerInfo{
+          ::arm_compute::ActivationLayerInfo::ActivationFunction::LOGISTIC, 0.0f, 0.0f};
+    default:
+      throw std::runtime_error{"Not supported, yet"};
+      break;
+  }
+}
+
+std::unique_ptr<AclFunction> asAclFunction(std::unique_ptr<::arm_compute::IFunction> &&layer)
+{
+  return nnfw::cpp14::make_unique<AclFunction>(std::move(layer));
+}
+
+::neurun::model::Layout asRuntimeLayout(::arm_compute::DataLayout data_layout)
+{
+  switch (data_layout)
+  {
+    case ::arm_compute::DataLayout::NHWC:
+      return ::neurun::model::Layout::NHWC;
+    case ::arm_compute::DataLayout::NCHW:
+      return ::neurun::model::Layout::NCHW;
+    default:
+      return ::neurun::model::Layout::UNKNOWN;
+  }
+}
+
+} // namespace acl_common
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/acl_common/Convert.h b/runtimes/neurun/backend/acl_common/Convert.h
new file mode 100644
index 000000000..37bb2965b
--- /dev/null
+++ b/runtimes/neurun/backend/acl_common/Convert.h
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_COMMON_CONVERT_H__
+#define __NEURUN_BACKEND_ACL_COMMON_CONVERT_H__
+
+#include <arm_compute/core/TensorInfo.h>
+#include <arm_compute/core/SubTensorInfo.h>
+#include <arm_compute/core/TensorShape.h>
+
+#include "model/Layout.h"
+#include "model/InternalType.h"
+#include "model/Operand.h"
+#include "model/Shape.h"
+#include "model/TypeInfo.h"
+#include "misc/feature/Shape.h"
+#include "misc/kernel/Shape.h"
+
+#include "util/Padding.h"
+#include "util/Coordinates.h"
+
+#include "AclFunction.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_common
+{
+
+::arm_compute::TensorShape asTensorShape(const ::neurun::model::Shape &shape,
+                                         ::neurun::model::Layout frontend_layout,
+                                         ::neurun::model::Layout backend_layout,
+                                         bool apply_dim_correction = true);
+::arm_compute::Coordinates asTensorCoordinate(const ::neurun::util::Coordinates &coord,
+                                              ::neurun::model::Layout frontend_layout,
+                                              ::neurun::model::Layout backend_layout);
+::arm_compute::DataType asDataType(const ::neurun::model::DataType &type);
+::arm_compute::TensorInfo asTensorInfo(const ::neurun::model::Shape &shape,
+                                       const ::neurun::model::TypeInfo &typeInfo,
+                                       ::neurun::model::Layout frontend_layout,
+                                       ::neurun::model::Layout backend_layout,
+                                       bool apply_dim_correction = true);
+
+::arm_compute::PadStrideInfo asPadStrideInfo(const model::ExplicitPadding &padding,
+                                             const model::Stride &stride);
+
+::arm_compute::ActivationLayerInfo
+asActivationLayerInfo(const ::neurun::model::Activation &act_code);
+
+std::unique_ptr<AclFunction> asAclFunction(std::unique_ptr<::arm_compute::IFunction> &&layer);
+
+::neurun::model::Layout asRuntimeLayout(::arm_compute::DataLayout data_layout);
+
+} // namespace acl_common
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_COMMON_CONVERT_H__
diff --git a/runtimes/neurun/backend/acl_common/IACLTensor.cc b/runtimes/neurun/backend/acl_common/IACLTensor.cc
new file mode 100644
index 000000000..89972e267
--- /dev/null
+++ b/runtimes/neurun/backend/acl_common/IACLTensor.cc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "IACLTensor.h"
+#include "Convert.h"
+#include "Swizzle.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_common
+{
+
+size_t IACLTensor::num_dimensions() const
+{
+  throw std::runtime_error("No definition of num_dimensions()");
+  return 0;
+}
+
+size_t IACLTensor::dimension(size_t index) const
+{
+  // Assume that the front is higher dimensional.
+  // i.g. N: 0, C: 1, H: 2, W: 3 for NCHW layout
+  // NOTE This tensor must not be applied dim correction
+  assert(num_dimensions() > index);
+  const ARMComputeAxis reversed{(static_cast<uint32_t>(num_dimensions() - index) - 1)};
+  return info()->dimension(reversed.value());
+}
+
+size_t IACLTensor::calcOffset(const neurun::util::Coordinates &coords) const
+{
+  const auto rank = coords.size();
+  ::arm_compute::Coordinates acl_coords;
+  for (size_t i = 0; i < rank; ++i)
+  {
+    acl_coords.set(acl_common::ToARMComputeAxis(rank, i).value(), coords[i]);
+  }
+
+  return info()->offset_element_in_bytes(acl_coords);
+}
+
+model::Layout IACLTensor::layout() const
+{
+  return acl_common::asRuntimeLayout(info()->data_layout());
+}
+
+} // namespace acl_common
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/acl_common/IACLTensor.h b/runtimes/neurun/backend/acl_common/IACLTensor.h
new file mode 100644
index 000000000..1dc79f480
--- /dev/null
+++ b/runtimes/neurun/backend/acl_common/IACLTensor.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_COMMON_I_ACL_TENSOR_H__
+#define __NEURUN_BACKEND_ACL_COMMON_I_ACL_TENSOR_H__
+
+#include <backend/operand/ITensor.h>
+#include <arm_compute/core/ITensor.h>
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_common
+{
+
+class IACLTensor : public operand::ITensor
+{
+public:
+  IACLTensor() = default;
+  IACLTensor(const IACLTensor &) = delete;
+  IACLTensor &operator=(const IACLTensor &) = delete;
+  IACLTensor(IACLTensor &&) = default;
+  IACLTensor &operator=(IACLTensor &&) = default;
+
+public:
+  uint8_t *buffer() const final { return handle()->buffer(); }
+  size_t total_size() const final { return info()->total_size(); }
+  size_t dimension(size_t index) const final;
+  size_t num_dimensions() const override;
+  size_t calcOffset(const neurun::util::Coordinates &coords) const final;
+  model::Layout layout() const final;
+  bool has_padding() const override { return info()->has_padding(); }
+
+public:
+  virtual const arm_compute::ITensor *handle() const = 0;
+  virtual arm_compute::ITensor *handle() = 0;
+
+  const arm_compute::ITensorInfo *info() const { return handle()->info(); }
+  arm_compute::ITensorInfo *info() { return handle()->info(); }
+
+  arm_compute::DataType data_type() const { return info()->data_type(); }
+};
+
+} // namespace acl_common
+} // namespace backend
+} // namespace neurun
+
+#endif //__NEURUN_BACKEND_ACL_COMMON_I_ACL_TENSOR_H__
diff --git a/runtimes/neurun/backend/acl_common/Swizzle.h b/runtimes/neurun/backend/acl_common/Swizzle.h
new file mode 100644
index 000000000..dfa5daba9
--- /dev/null
+++ b/runtimes/neurun/backend/acl_common/Swizzle.h
@@ -0,0 +1,161 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_COMMON_SWIZZLE_H__
+#define __NEURUN_BACKEND_ACL_COMMON_SWIZZLE_H__
+
+#include <cassert>
+#include <model/Layout.h>
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_common
+{
+
+class ARMComputeAxis
+{
+public:
+  ARMComputeAxis() = default;
+
+public:
+  explicit ARMComputeAxis(uint32_t value) : _value{value}
+  {
+    // DO NOTHING
+  }
+
+public:
+  uint32_t value(void) const { return _value; }
+
+private:
+  uint32_t _value;
+};
+
+// Convert axis in acl order
+inline ARMComputeAxis ToARMComputeAxis(uint32_t rank, uint32_t axis,
+                                       const model::Layout org_layout = model::Layout::UNKNOWN,
+                                       const model::Layout acl_layout = model::Layout::UNKNOWN)
+{
+  assert(rank > axis);
+
+  const ARMComputeAxis reversed{(rank - axis) - 1};
+
+  if (rank >= 4 && org_layout == model::Layout::NHWC && acl_layout == model::Layout::NCHW)
+  {
+    // NHWC -> WHCN
+    // DEPTH
+    if (0 == reversed.value())
+    {
+      return ARMComputeAxis{2};
+    }
+    // WIDTH
+    if (1 == reversed.value())
+    {
+      return ARMComputeAxis{0};
+    }
+    // HEIGHT
+    if (2 == reversed.value())
+    {
+      return ARMComputeAxis{1};
+    }
+  }
+  if (rank >= 4 && org_layout == model::Layout::NCHW && acl_layout == model::Layout::NHWC)
+  {
+    // NCHW -> CWHN
+    // WIDTH
+    if (0 == reversed.value())
+    {
+      return ARMComputeAxis{1};
+    }
+    // HEIGHT
+    if (1 == reversed.value())
+    {
+      return ARMComputeAxis{2};
+    }
+    // DEPTH
+    if (2 == reversed.value())
+    {
+      return ARMComputeAxis{0};
+    }
+  }
+
+  return reversed;
+}
+
+inline ::arm_compute::Coordinates
+getARMComputeAxises(uint32_t rank, const model::Layout org_layout = model::Layout::UNKNOWN,
+                    const model::Layout acl_layout = model::Layout::UNKNOWN)
+{
+  ::arm_compute::Coordinates res{};
+
+  res.set_num_dimensions(rank);
+
+  for (uint32_t axis = 0; axis < rank; ++axis)
+  {
+    res.set(axis, ToARMComputeAxis(rank, axis, org_layout, acl_layout).value());
+  }
+
+  return res;
+}
+
+// Restructure runtime_permutationVector to ACL_permutationVector
+inline ::arm_compute::PermutationVector
+getARMComputePermutationVector(uint32_t rank, const std::vector<int32_t> runtime_pv,
+                               const model::Layout org_layout = model::Layout::UNKNOWN,
+                               const model::Layout acl_layout = model::Layout::UNKNOWN)
+{
+  // rank upto 4 is supported
+  assert(rank <= 4);
+  assert(runtime_pv.size() > 0);
+
+  int new_pv[4] = {0};
+  ::arm_compute::Coordinates axises = getARMComputeAxises(rank, org_layout, acl_layout);
+
+  for (uint32_t i = 0; i < rank; ++i)
+  {
+    new_pv[axises[i]] = ToARMComputeAxis(rank, runtime_pv[i], org_layout, acl_layout).value();
+  }
+
+  ::arm_compute::PermutationVector ACL_PV =
+      ::arm_compute::PermutationVector{new_pv[0], new_pv[1], new_pv[2], new_pv[3]};
+  ACL_PV.set_num_dimensions(rank);
+
+  return ACL_PV;
+}
+
+template <typename T>
+inline T ReorderBits(T in, size_t numOfBits,
+                     const model::Layout org_layout = model::Layout::UNKNOWN,
+                     const model::Layout acl_layout = model::Layout::UNKNOWN)
+{
+  assert(numOfBits > 0);
+  T out = 0;
+  for (int32_t i = numOfBits - 1; i >= 0; --i)
+  {
+    const uint32_t toShift =
+        numOfBits - ToARMComputeAxis(numOfBits, i, org_layout, acl_layout).value() - 1;
+    out += ((in & 1) << toShift);
+    in >>= 1;
+  }
+  return out;
+}
+
+} // namespace acl_common
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_COMMON_SWIZZLE_H__
diff --git a/runtimes/neurun/backend/acl_common/TemplTensorBuilder.h b/runtimes/neurun/backend/acl_common/TemplTensorBuilder.h
new file mode 100644
index 000000000..df9fa8c2a
--- /dev/null
+++ b/runtimes/neurun/backend/acl_common/TemplTensorBuilder.h
@@ -0,0 +1,617 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_COMMON_TEMPL_TENSOR_BUILDER_H__
+#define __NEURUN_BACKEND_ACL_COMMON_TEMPL_TENSOR_BUILDER_H__
+
+#include <memory>
+#include <queue>
+
+#include <arm_compute/core/Types.h>
+#include <backend/ITensorBuilder.h>
+#include "model/OperandIndexMap.h"
+#include "AclTensorManager.h"
+#include "cpp14/memory.h"
+#include <util/Utils.h>
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_common
+{
+
+enum class UsesType
+{
+  FIRST,
+  LAST
+};
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+class TemplTensorBuilder : public ITensorBuilder
+{
+public:
+  using T_AclTensorManager = AclTensorManager<T_ITensor, T_Tensor, T_SubTensor, T_Object>;
+
+  TemplTensorBuilder(T_AclTensorManager *tensor_mgr);
+
+  /**
+   * @brief     Register tensor information to allocate on ACL-CL backend
+   * @param[in] ind    Operand index
+   * @param[in] info   Tensor information
+   * @param[in] layout Tensor data layout
+   */
+  void registerTensorInfo(const model::OperandIndex &ind, const model::OperandInfo &info,
+                          model::Layout frontend_layout, model::Layout backend_layout,
+                          bool as_const) override;
+  /**
+   * @brief     Register subtensor information to allocate on ACL-CL backend
+   * @param[in] ind   Operand index
+   * @param[in] info  Tensor information
+   */
+  void registerSubTensorInfo(const model::OperandIndex &ind,
+                             const compiler::SubTensorInfo &info) override;
+
+  void notifyFirstUse(const model::OperandIndex &) override;
+  void notifyLastUse(const model::OperandIndex &) override;
+
+  void prepare(void) override;
+  void allocate(void) override; // TODO Remove this
+  void allocateConsts() override;
+  void allocateNonconsts() override;
+  void postFunctionPrepare() override;
+  void finalize() override;
+
+  std::shared_ptr<::neurun::backend::operand::ITensor>
+  tensorAt(const model::OperandIndex &ind) override;
+  std::shared_ptr<backend::operand::IObject> wrapTensor(const model::OperandIndex &ind) override;
+  void iterate(const IterateFunction &fn) override;
+
+  void preVisit(const model::Operation &node) override;
+  void postVisit(const model::Operation &node) override;
+
+  std::unique_ptr<ITensorManager> releaseTensorManager(void) override;
+
+  std::shared_ptr<T_ITensor> at(const ::neurun::model::OperandIndex &ind);
+  /**
+   * @brief     Check child tensor is allocated as subtensor of parent tensor
+   * @param[in] parent  Index of parent
+   * @param[in] child   Index of child
+   * @return    @c true if child is allocated as subtensor of parent, otherwise @c false
+   */
+  bool isSubTensorOf(const model::OperandIndex &parent, const model::OperandIndex &child);
+
+  void dimCorrection(const model::OperandIndex &index, bool apply_dim_correction);
+
+  T_AclTensorManager *acl_tensor_manager(void) { return _tensor_mgr.get(); }
+
+private:
+  void buildTensors(void);
+  void buildSubtensors(void);
+  void validate(void);
+  model::OperandIndex findRootParent(model::OperandIndex index);
+
+private:
+  model::OperandIndexMap<model::OperandInfo> _tensor_info_map;
+  model::OperandIndexMap<compiler::SubTensorInfo> _subtensor_info_map;
+  model::OperandIndexMap<bool> _apply_dim_correction_map;
+  model::OperandIndexMap<std::pair<model::Layout, model::Layout>> _tensor_layouts_map;
+
+  std::unique_ptr<T_AclTensorManager> _tensor_mgr;
+  model::OperandIndexSequence _constants;
+
+  // TODO Consider dividing TensorBuilder into Linear and others
+  const std::string _executor_str;
+
+  // for linear executor
+  std::queue<std::pair<UsesType, model::OperandIndex>> _uses_queue;
+  uint32_t _first_uses_num;
+  model::OperandIndexMap<bool> _first_uses_visit;
+
+  // for subtensors
+  model::OperandIndexMap<uint32_t> _parent_def;
+  model::OperandIndexMap<uint32_t> _parent_uses;
+};
+
+} // namespace acl_common
+} // namespace backend
+} // namespace neurun
+
+#include <cassert>
+#include <stack>
+
+#include "Convert.h"
+
+#include "util/logging.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_common
+{
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::TemplTensorBuilder(
+    T_AclTensorManager *tensor_mgr)
+    : _tensor_mgr{tensor_mgr}, _executor_str(util::getConfigString(util::config::EXECUTOR)),
+      _first_uses_num(0)
+{
+  assert(_tensor_mgr);
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::registerTensorInfo(
+    const model::OperandIndex &ind, const model::OperandInfo &info, model::Layout frontend_layout,
+    model::Layout backend_layout, bool as_const)
+{
+  assert(_tensor_mgr->constTensors().size() == 0);
+  assert(_tensor_mgr->nonconstTensors().size() == 0);
+
+  _tensor_info_map.emplace(ind, info);
+  _apply_dim_correction_map.emplace(ind, true);
+  _tensor_layouts_map.insert({ind, std::make_pair(frontend_layout, backend_layout)});
+  if (as_const)
+    _constants.append(ind);
+
+  assert(_first_uses_visit.find(ind) == _first_uses_visit.end());
+  _first_uses_visit[ind] = false;
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::registerSubTensorInfo(
+    const model::OperandIndex &ind, const compiler::SubTensorInfo &info)
+{
+  assert(_tensor_mgr->constTensors().size() == 0);
+  assert(_tensor_mgr->nonconstTensors().size() == 0);
+
+  _subtensor_info_map.emplace(ind, info);
+  _apply_dim_correction_map.emplace(ind, true);
+
+  assert(_first_uses_visit.find(ind) == _first_uses_visit.end());
+  _first_uses_visit[ind] = false;
+
+  const auto &parent_ind = info.parent();
+
+  // parent_def
+  _parent_def[parent_ind] = 1;
+
+  // parent_use
+  if (_parent_uses.find(parent_ind) == _parent_uses.end())
+    _parent_uses[parent_ind] = 1; // 1 means including parent it-self
+  _parent_uses[parent_ind]++;
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::notifyFirstUse(
+    const model::OperandIndex &ind)
+{
+  _first_uses_num++;
+  _uses_queue.emplace(UsesType::FIRST, ind);
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::notifyLastUse(
+    const model::OperandIndex &ind)
+{
+  _uses_queue.emplace(UsesType::LAST, ind);
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::prepare(void)
+{
+  buildTensors();
+  buildSubtensors();
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::allocate(void)
+{
+  allocateConsts();
+  allocateNonconsts();
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::allocateConsts(void)
+{
+  assert(_constants.size() == _tensor_mgr->constTensors().size());
+  _tensor_mgr->allocateConsts();
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::allocateNonconsts(void)
+{
+  assert(_tensor_info_map.size() == _tensor_mgr->nonconstTensors().size() + _constants.size());
+  _tensor_mgr->allocateNonconsts();
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::postFunctionPrepare(void)
+{
+  _tensor_mgr->tryDeallocConstants();
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::finalize(void)
+{
+  validate();
+  _tensor_mgr->allocateInternalBufferManager();
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+std::shared_ptr<::neurun::backend::operand::ITensor>
+TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::tensorAt(
+    const model::OperandIndex &ind)
+{
+  return _tensor_mgr->at(ind);
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+std::shared_ptr<backend::operand::IObject>
+TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::wrapTensor(
+    const model::OperandIndex &ind)
+{
+  return _tensor_mgr->wrapTensor(ind);
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::iterate(
+    const IterateFunction &fn)
+{
+  _tensor_mgr->iterate(fn);
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+std::shared_ptr<T_ITensor> TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::at(
+    const ::neurun::model::OperandIndex &ind)
+{
+  return _tensor_mgr->at(ind);
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+bool TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::isSubTensorOf(
+    const model::OperandIndex &parent, const model::OperandIndex &child)
+{
+  if (_subtensor_info_map.find(child) == _subtensor_info_map.end())
+  {
+    return false;
+  }
+
+  auto &subtensors = _tensor_mgr->nonconstSubtensors();
+  if (subtensors.find(child) == subtensors.end())
+  {
+    return false;
+  }
+
+  if (_subtensor_info_map.at(child).parent() != parent)
+  {
+    return false;
+  }
+
+  return true;
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::dimCorrection(
+    const model::OperandIndex &index, bool apply_dim_correction)
+{
+  _apply_dim_correction_map[index] = apply_dim_correction;
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+std::unique_ptr<ITensorManager>
+TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::releaseTensorManager(void)
+{
+  return std::move(_tensor_mgr);
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::buildTensors(void)
+{
+  assert(_tensor_mgr->constTensors().size() == 0);
+  assert(_tensor_mgr->nonconstTensors().size() == 0);
+
+  for (auto &entry : _tensor_info_map)
+  {
+    auto ind = entry.first;
+    const auto &info = entry.second;
+    // NOTE SubTensor's layout must be the same with layout of parent tensor
+    const auto &root_parent = findRootParent(ind);
+    const auto &frontend_layout = _tensor_layouts_map[root_parent].first;
+    const auto &backend_layout = _tensor_layouts_map[root_parent].second;
+    auto tensor_info = asTensorInfo(info.shape(), info.typeInfo(), frontend_layout, backend_layout,
+                                    _apply_dim_correction_map[ind]);
+    _tensor_mgr->buildTensor(ind, tensor_info, info.shape().rank(), _constants.contains(ind));
+  }
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::buildSubtensors(void)
+{
+  // TODO Handle SubTensor(subsumption)
+  //      Currently this TemplTensorBuilder does not have subsumption info yet
+  //      Allocated subtensor will be mapped to _subtensors instead of _tensors
+  assert(_tensor_mgr->nonconstSubtensors().size() == 0);
+
+  // To make subtensor, parent tensor must be made first
+  // For this condition, use stack
+  //  1) Push one subtensor index to stack (iterate subtensors)
+  //  2) If tensor at stack top is already made, pop and go to 4)
+  //  3) If tensor pushed at 1) is not made, check parent tensor
+  //    3-1) If parent tensor is already made, we can make child tensor
+  //         Make child tensor and pop, go to 4)
+  //    3-2) If parent tensor is not made, we can't make child tensor yet
+  //         Push parent tensor index to stack and return to 4)
+  //  4) If stack is empty, return to 1), else return to 2)
+  auto &subtensors = _tensor_mgr->nonconstSubtensors();
+  for (auto &entry : _subtensor_info_map)
+  {
+    model::OperandIndex ind = entry.first;
+
+    std::stack<model::OperandIndex> stack;
+    stack.push(ind);
+
+    while (!stack.empty())
+    {
+      const auto current = stack.top();
+      const auto &info = _subtensor_info_map.at(current);
+
+      // Already generated SubTensor
+      if (subtensors.find(current) != subtensors.end())
+      {
+        stack.pop();
+        continue;
+      }
+
+      auto parent = info.parent();
+      std::shared_ptr<T_ITensor> parent_tensor = _tensor_mgr->findTensorAsParent(parent);
+      if (!parent_tensor)
+      {
+        // Cannot find allocated parent tensor: allocate parent first
+        assert(_subtensor_info_map.find(parent) != _subtensor_info_map.end());
+        stack.push(parent);
+        continue;
+      }
+      assert(parent_tensor != nullptr);
+
+      // Child's type should be same with parent
+      assert(info.type().offset() == parent_tensor->info()->quantization_info().offset);
+      assert(info.type().scale() == parent_tensor->info()->quantization_info().scale);
+      assert(asDataType(info.type().type()) == parent_tensor->info()->data_type());
+
+      // NOTE SubTensor's layout must be the same with layout of parent tensor
+      const auto &root_parent = findRootParent(parent);
+      const auto &frontend_layout = _tensor_layouts_map[root_parent].first;
+      const auto &backend_layout = _tensor_layouts_map[root_parent].second;
+
+      auto shape = asTensorShape(info.shape(), frontend_layout, backend_layout,
+                                 _apply_dim_correction_map[current]);
+      ::arm_compute::Coordinates coordinates =
+          asTensorCoordinate(info.offset(), frontend_layout, backend_layout);
+      _tensor_mgr->buildSubtensor(parent, current, shape, coordinates, info.shape().rank(), true);
+      stack.pop();
+    }
+  }
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::preVisit(
+    const model::Operation &node)
+{
+  // For now others executor doesn't need this step
+  if (_executor_str != "Linear")
+  {
+    return;
+  }
+
+  std::function<void(const model::OperandIndex &ind)> def_handler =
+      [this, &def_handler](const model::OperandIndex &ind) {
+        bool is_subtensor = _subtensor_info_map.find(ind) != _subtensor_info_map.end();
+        bool is_parent = _parent_def.find(ind) != _parent_def.end();
+        if (!is_subtensor && !is_parent)
+        {
+          _tensor_mgr->startLifetime(ind);
+          return;
+        }
+
+        if (is_parent)
+        {
+          if (_parent_def[ind] == 0)
+            return;
+
+          _parent_def[ind] = 0;
+
+          if (is_subtensor)
+          {
+            const auto &it = _parent_def.find(ind);
+            _parent_def.erase(it);
+            def_handler(ind);
+          }
+          else
+          {
+            _tensor_mgr->startLifetime(ind);
+          }
+        }
+        else if (is_subtensor)
+        {
+          const model::OperandIndex &parent_ind = _subtensor_info_map.at(ind).parent();
+          if (_parent_def[parent_ind] == 0)
+            return;
+          def_handler(parent_ind);
+        }
+      };
+
+  // See #5642
+  model::OperandIndexMap<bool> outputs_map;
+  for (const auto &ind : node.getOutputs())
+  {
+    assert(_first_uses_visit.find(ind) != _first_uses_visit.end());
+    outputs_map[ind] = _first_uses_visit[ind];
+  }
+
+  // outputs_map's all elements are true?
+  auto outputs_map_all_check = [&outputs_map]() {
+    return std::all_of(outputs_map.begin(), outputs_map.end(),
+                       [](std::pair<const model::OperandIndex, bool> it) { return it.second; });
+  };
+
+  std::pair<UsesType, model::OperandIndex> peak;
+  while (!outputs_map_all_check() && (peak = _uses_queue.front()).first == UsesType::FIRST)
+  {
+    _uses_queue.pop();
+    _first_uses_num--;
+
+    const auto &popped_idx = peak.second;
+    def_handler(popped_idx);
+
+    outputs_map[popped_idx] = true;
+    _first_uses_visit[popped_idx] = true;
+  }
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::postVisit(
+    const model::Operation &node)
+{
+  // For now others executor doesn't need this step
+  if (_executor_str != "Linear")
+  {
+    return;
+  }
+
+  std::function<void(const model::OperandIndex &ind)> use_handler =
+      [this, &use_handler](const model::OperandIndex &ind) {
+        bool is_subtensor = _subtensor_info_map.find(ind) != _subtensor_info_map.end();
+        bool is_parent = _parent_uses.find(ind) != _parent_uses.end();
+        if (!is_subtensor && !is_parent)
+        {
+          _tensor_mgr->finishLifetime(ind);
+          return;
+        }
+
+        // This handler shall be executed by the linear executor so that
+        // The parent operand will always be done after the subtensor
+        if (is_parent)
+        {
+          --_parent_uses[ind];
+          assert(_parent_uses[ind] == 0);
+
+          if (is_subtensor)
+          {
+            const auto &it = _parent_uses.find(ind);
+            _parent_uses.erase(it);
+            use_handler(ind);
+          }
+          else
+          {
+            _tensor_mgr->finishLifetime(ind);
+          }
+        }
+        else if (is_subtensor)
+        {
+          const model::OperandIndex &parent_ind = _subtensor_info_map.at(ind).parent();
+          --_parent_uses[parent_ind];
+          assert(_parent_uses[parent_ind] > 0);
+        }
+      };
+
+  // See #5642
+  const auto &inputs = node.getInputs();
+  std::pair<UsesType, model::OperandIndex> peak;
+  while ((peak = _uses_queue.front()).first == UsesType::LAST)
+  {
+    const auto &popped_idx = peak.second;
+    if (inputs.contains(popped_idx))
+    {
+      _uses_queue.pop();
+      use_handler(popped_idx);
+    }
+    else
+    {
+      break;
+    }
+  }
+
+  if (_first_uses_num == 0)
+  {
+    while (!_uses_queue.empty())
+    {
+      peak = _uses_queue.front();
+      assert(peak.first == UsesType::LAST);
+
+      _uses_queue.pop();
+
+      use_handler(peak.second);
+    }
+  }
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+void TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::validate(void)
+{
+  // For now others executor doesn't need this step
+  if (_executor_str != "Linear")
+  {
+    return;
+  }
+
+  for (auto it : _tensor_info_map)
+  {
+    assert(_first_uses_visit.find(it.first) != _first_uses_visit.end());
+    assert(_first_uses_visit[it.first]);
+  }
+
+  for (auto it : _subtensor_info_map)
+  {
+    assert(_first_uses_visit.find(it.first) != _first_uses_visit.end());
+    assert(_first_uses_visit[it.first]);
+  }
+
+  for (auto it : _tensor_layouts_map)
+  {
+    assert(_first_uses_visit.find(it.first) != _first_uses_visit.end());
+    assert(_first_uses_visit[it.first]);
+    UNUSED_RELEASE(it);
+  }
+
+  assert(_uses_queue.size() == 0);
+  assert(_first_uses_num == 0);
+
+  assert(std::all_of(
+      _parent_def.begin(), _parent_def.end(),
+      [](std::pair<const model::OperandIndex, uint32_t> it) { return it.second == 0; }));
+
+  assert(std::all_of(
+      _parent_uses.begin(), _parent_uses.end(),
+      [](std::pair<const model::OperandIndex, uint32_t> it) { return it.second == 0; }));
+}
+
+template <typename T_ITensor, typename T_Tensor, typename T_SubTensor, typename T_Object>
+model::OperandIndex TemplTensorBuilder<T_ITensor, T_Tensor, T_SubTensor, T_Object>::findRootParent(
+    model::OperandIndex ind)
+{
+  if (_subtensor_info_map.find(ind) == _subtensor_info_map.end())
+    return ind;
+
+  const auto &parent_ind = _subtensor_info_map.at(ind).parent();
+  return findRootParent(parent_ind);
+}
+
+} // namespace acl_common
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_COMMON_TEMPL_TENSOR_BUILDER_H__
diff --git a/runtimes/neurun/backend/acl_neon/Backend.h b/runtimes/neurun/backend/acl_neon/Backend.h
new file mode 100644
index 000000000..38769e5d4
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/Backend.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_NEON_BACKEND_H__
+#define __NEURUN_BACKEND_ACL_NEON_BACKEND_H__
+
+#include <memory>
+#include <backend/Backend.h>
+#include <model/Operands.h>
+
+#include "Config.h"
+#include "ConstantInitializer.h"
+#include "KernelGenerator.h"
+#include "ShapeFixer.h"
+#include "TensorManager.h"
+#include "backend/CustomKernelRegistry.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+
+class Backend : public ::neurun::backend::Backend
+{
+public:
+  Backend() : _config{std::make_shared<Config>()} {}
+
+  std::shared_ptr<IConfig> config() const override { return _config; }
+
+  std::unique_ptr<BackendContext>
+  newContext(const model::Operands &operands,
+             const std::shared_ptr<custom::KernelRegistry> &) const override
+  {
+    auto tensor_builder = std::make_shared<TensorBuilder>(createTensorManager());
+    return std::unique_ptr<BackendContext>{new BackendContext{
+        this, tensor_builder, std::make_shared<ConstantInitializer>(operands, tensor_builder),
+        std::make_shared<KernelGenerator>(operands, tensor_builder),
+        std::make_shared<ShapeFixer>(operands, tensor_builder)}};
+  }
+
+private:
+  std::shared_ptr<IConfig> _config;
+};
+
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_NEON_BACKEND_H__
diff --git a/runtimes/neurun/backend/acl_neon/CMakeLists.txt b/runtimes/neurun/backend/acl_neon/CMakeLists.txt
new file mode 100644
index 000000000..bb2334366
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/CMakeLists.txt
@@ -0,0 +1,21 @@
+# Unsupported architecture
+nnfw_find_package(ARMCompute QUIET)
+if(NOT ARMCompute_FOUND)
+  return()
+endif(NOT ARMCompute_FOUND)
+
+set(LIB_NEURUN_BACKEND_ACL_NEON neurun_backend_acl_neon)
+
+file(GLOB_RECURSE SOURCES "*.cc")
+
+add_library(${LIB_NEURUN_BACKEND_ACL_NEON} SHARED ${SOURCES})
+
+target_include_directories(${LIB_NEURUN_BACKEND_ACL_NEON} PRIVATE ${CMAKE_CURRENT_SOURCE_DIR})
+target_link_libraries(${LIB_NEURUN_BACKEND_ACL_NEON} PRIVATE neurun_core)
+target_link_libraries(${LIB_NEURUN_BACKEND_ACL_NEON} PRIVATE ${LIB_NEURUN_BACKEND_ACL_COMMON})
+target_link_libraries(${LIB_NEURUN_BACKEND_ACL_NEON} PRIVATE nnfw_common)
+target_link_libraries(${LIB_NEURUN_BACKEND_ACL_NEON} PRIVATE nnfw_coverage)
+
+set_target_properties(${LIB_NEURUN_BACKEND_ACL_NEON} PROPERTIES OUTPUT_NAME backend_acl_neon)
+
+install(TARGETS ${LIB_NEURUN_BACKEND_ACL_NEON} DESTINATION lib)
diff --git a/runtimes/neurun/backend/acl_neon/Config.cc b/runtimes/neurun/backend/acl_neon/Config.cc
new file mode 100644
index 000000000..8f4a8e7f8
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/Config.cc
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "Config.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+
+void Config::initialize()
+{
+  // DO NOTHING
+}
+
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/acl_neon/Config.h b/runtimes/neurun/backend/acl_neon/Config.h
new file mode 100644
index 000000000..0656fa46b
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/Config.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_NEON_CONFIG_H__
+#define __NEURUN_BACKEND_ACL_NEON_CONFIG_H__
+
+#include <backend/IConfig.h>
+#include <cpp14/memory.h>
+#include <util/ITimer.h>
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+
+class Config : public IConfig
+{
+public:
+  std::string id() override { return "acl_neon"; }
+  void initialize() override;
+  bool SupportSubTensorAlloc() override { return true; }
+
+  std::unique_ptr<util::ITimer> timer() override
+  {
+    return nnfw::cpp14::make_unique<util::CPUTimer>();
+  }
+};
+
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_NEON_CONFIG_H__
diff --git a/runtimes/neurun/backend/acl_neon/ConstantInitializer.cc b/runtimes/neurun/backend/acl_neon/ConstantInitializer.cc
new file mode 100644
index 000000000..d83b7c01b
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/ConstantInitializer.cc
@@ -0,0 +1,189 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ConstantInitializer.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+
+ConstantInitializer::ConstantInitializer(const model::Operands &operands,
+                                         const std::shared_ptr<TensorBuilder> &tensor_builder)
+    : _operands{operands}, _tensor_builder{tensor_builder}
+{
+  // DO NOTHING
+}
+
+void ConstantInitializer::run()
+{
+  for (const auto &it : _init_map)
+  {
+    const auto &ind = it.first;
+    const auto &fn = it.second;
+
+    const auto &model_obj = _operands.at(ind);
+    auto tensor_obj = _tensor_builder->wrapTensor(ind);
+    fn(model_obj, *tensor_obj);
+  }
+
+  _init_map.clear();
+}
+
+void ConstantInitializer::visit(const model::operation::Conv2DNode &node)
+{
+  const auto &kernel_index = node.getInputs().at(model::operation::Conv2DNode::KERNEL);
+  const auto &kernel_obj = _operands.at(kernel_index);
+  registerPermuteInitializer(kernel_index, kernel_obj);
+
+  const auto &bias_index = node.getInputs().at(model::operation::Conv2DNode::BIAS);
+  const auto &bias_obj = _operands.at(bias_index);
+  registerCopyInitializer(bias_index, bias_obj);
+}
+
+void ConstantInitializer::visit(const model::operation::DepthwiseConv2DNode &node)
+{
+  const auto &kernel_index = node.getInputs().at(model::operation::DepthwiseConv2DNode::KERNEL);
+  const auto &kernel_obj = _operands.at(kernel_index);
+  registerPermuteInitializer(kernel_index, kernel_obj);
+
+  const auto &bias_index = node.getInputs().at(model::operation::DepthwiseConv2DNode::BIAS);
+  const auto &bias_obj = _operands.at(bias_index);
+  registerCopyInitializer(bias_index, bias_obj);
+}
+
+void ConstantInitializer::visit(const model::operation::FullyConnectedNode &node)
+{
+  const auto &weight_index = node.getInputs().at(model::operation::FullyConnectedNode::WEIGHT);
+  const auto &weight_obj = _operands.at(weight_index);
+  registerCopyInitializer(weight_index, weight_obj);
+
+  const auto &bias_index = node.getInputs().at(model::operation::FullyConnectedNode::BIAS);
+  const auto &bias_obj = _operands.at(bias_index);
+  registerCopyInitializer(bias_index, bias_obj);
+}
+
+void ConstantInitializer::visit(const model::operation::LSTMNode &node)
+{
+  const auto &input_to_input_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::INPUT_TO_INPUT_WEIGHTS);
+  const auto &input_to_input_weights_obj = _operands.at(input_to_input_weights_index);
+  registerCopyInitializer(input_to_input_weights_index, input_to_input_weights_obj);
+
+  const auto &input_to_forget_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::INPUT_TO_FORGET_WEIGHTS);
+  const auto &input_to_forget_weights_obj = _operands.at(input_to_forget_weights_index);
+  registerCopyInitializer(input_to_forget_weights_index, input_to_forget_weights_obj);
+
+  const auto &input_to_cell_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::INPUT_TO_CELL_WEIGHTS);
+  const auto &input_to_cell_weights_obj = _operands.at(input_to_cell_weights_index);
+  registerCopyInitializer(input_to_cell_weights_index, input_to_cell_weights_obj);
+
+  const auto &input_to_output_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::INPUT_TO_OUTPUT_WEIGHTS);
+  const auto &input_to_output_weights_obj = _operands.at(input_to_output_weights_index);
+  registerCopyInitializer(input_to_output_weights_index, input_to_output_weights_obj);
+
+  const auto &recurrent_to_input_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::RECURRENT_TO_INPUT_WEIGHTS);
+  const auto &recurrent_to_input_weights_obj = _operands.at(recurrent_to_input_weights_index);
+  registerCopyInitializer(recurrent_to_input_weights_index, recurrent_to_input_weights_obj);
+
+  const auto &recurrent_to_forget_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::RECURRENT_TO_FORGET_WEIGHTS);
+  const auto &recurrent_to_forget_weights_obj = _operands.at(recurrent_to_forget_weights_index);
+  registerCopyInitializer(recurrent_to_forget_weights_index, recurrent_to_forget_weights_obj);
+
+  const auto &recurrent_to_cell_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::RECURRENT_TO_CELL_WEIGHTS);
+  const auto &recurrent_to_cell_weights_obj = _operands.at(recurrent_to_cell_weights_index);
+  registerCopyInitializer(recurrent_to_cell_weights_index, recurrent_to_cell_weights_obj);
+
+  const auto &recurrent_to_output_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::RECURRENT_TO_OUTPUT_WEIGHTS);
+  const auto &recurrent_to_output_weights_obj = _operands.at(recurrent_to_output_weights_index);
+  registerCopyInitializer(recurrent_to_output_weights_index, recurrent_to_output_weights_obj);
+
+  const auto &cell_to_input_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::CELL_TO_INPUT_WEIGHTS);
+  const auto &cell_to_input_weights_obj = _operands.at(cell_to_input_weights_index);
+  registerCopyInitializer(cell_to_input_weights_index, cell_to_input_weights_obj);
+
+  const auto &cell_to_forget_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::CELL_TO_FORGET_WEIGHTS);
+  const auto &cell_to_forget_weights_obj = _operands.at(cell_to_forget_weights_index);
+  registerCopyInitializer(cell_to_forget_weights_index, cell_to_forget_weights_obj);
+
+  const auto &cell_to_output_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::CELL_TO_OUTPUT_WEIGHTS);
+  const auto &cell_to_output_weights_obj = _operands.at(cell_to_output_weights_index);
+  registerCopyInitializer(cell_to_output_weights_index, cell_to_output_weights_obj);
+
+  const auto &input_gate_bias_index =
+      node.getInputs().at(model::operation::LSTMNode::INPUT_GATE_BIAS);
+  const auto &input_gate_bias_obj = _operands.at(input_gate_bias_index);
+  registerCopyInitializer(input_gate_bias_index, input_gate_bias_obj);
+
+  const auto &forget_gate_bias_index =
+      node.getInputs().at(model::operation::LSTMNode::FORGET_GATE_BIAS);
+  const auto &forget_gate_bias_obj = _operands.at(forget_gate_bias_index);
+  registerCopyInitializer(forget_gate_bias_index, forget_gate_bias_obj);
+
+  const auto &output_gate_bias_index =
+      node.getInputs().at(model::operation::LSTMNode::OUTPUT_GATE_BIAS);
+  const auto &output_gate_bias_obj = _operands.at(output_gate_bias_index);
+  registerCopyInitializer(output_gate_bias_index, output_gate_bias_obj);
+
+  const auto &projection_weights_index =
+      node.getInputs().at(model::operation::LSTMNode::PROJECTION_WEIGHTS);
+  const auto &projection_weights_obj = _operands.at(projection_weights_index);
+  registerCopyInitializer(projection_weights_index, projection_weights_obj);
+
+  const auto &projection_bias_index =
+      node.getInputs().at(model::operation::LSTMNode::PROJECTION_BIAS);
+  const auto &projection_bias_obj = _operands.at(projection_bias_index);
+  registerCopyInitializer(projection_bias_index, projection_bias_obj);
+}
+
+void ConstantInitializer::visit(const model::operation::RNNNode &node)
+{
+  const auto &weights_index = node.getInputs().at(model::operation::RNNNode::WEIGHTS);
+  const auto &weights_obj = _operands.at(weights_index);
+  registerCopyInitializer(weights_index, weights_obj);
+
+  const auto &recurrent_weights_index =
+      node.getInputs().at(model::operation::RNNNode::RECURRENT_WEIGHTS);
+  const auto &recurrent_weights_obj = _operands.at(recurrent_weights_index);
+  registerCopyInitializer(recurrent_weights_index, recurrent_weights_obj);
+
+  const auto &bias_index = node.getInputs().at(model::operation::RNNNode::BIAS);
+  const auto &bias_obj = _operands.at(bias_index);
+  registerCopyInitializer(bias_index, bias_obj);
+}
+
+void ConstantInitializer::visit(const model::operation::TransposeConvNode &node)
+{
+  const auto &kernel_index = node.getInputs().at(model::operation::TransposeConvNode::KERNEL);
+  const auto &kernel_obj = _operands.at(kernel_index);
+  registerPermuteInitializer(kernel_index, kernel_obj);
+}
+
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/acl_neon/ConstantInitializer.h b/runtimes/neurun/backend/acl_neon/ConstantInitializer.h
new file mode 100644
index 000000000..cdd94f795
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/ConstantInitializer.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_COMPILER_ACL_NEON_CONSTANT_INITIALIZER_H__
+#define __NEURUN_COMPILER_ACL_NEON_CONSTANT_INITIALIZER_H__
+
+#include <backend/IConstantInitializer.h>
+#include <model/Operands.h>
+#include "TensorBuilder.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+
+class ConstantInitializer : public IConstantInitializer
+{
+public:
+  ConstantInitializer(const model::Operands &operands,
+                      const std::shared_ptr<TensorBuilder> &tensor_builder);
+
+public:
+  void run() override;
+
+public:
+  void visit(const model::operation::Conv2DNode &) override;
+  void visit(const model::operation::DepthwiseConv2DNode &) override;
+  void visit(const model::operation::FullyConnectedNode &) override;
+  void visit(const model::operation::LSTMNode &) override;
+  void visit(const model::operation::RNNNode &) override;
+  void visit(const model::operation::TransposeConvNode &) override;
+
+private:
+  const model::Operands &_operands;
+  std::shared_ptr<TensorBuilder> _tensor_builder;
+};
+
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_COMPILER_ACL_NEON_CONSTANT_INITIALIZER_H__
diff --git a/runtimes/neurun/backend/acl_neon/KernelGenerator.cc b/runtimes/neurun/backend/acl_neon/KernelGenerator.cc
new file mode 100644
index 000000000..52300030f
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/KernelGenerator.cc
@@ -0,0 +1,1726 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "KernelGenerator.h"
+
+#include <arm_compute/runtime/NEON/NEFunctions.h>   // Include all ARM Compute NEON functions
+#include <arm_compute/runtime/NEON/NEFunctionsEx.h> // Include all ARM Compute EX NEON functions
+
+#include <Convert.h>
+#include <Swizzle.h>
+
+#include "kernel/ConcatLayer.h"
+#include "util/Padding.h"
+#include "model/Index.h"
+#include "model/DataType.h"
+#include "model/InternalType.h"
+#include "compiler/IExecutionBuilder.h"
+#include "exec/NopFunction.h"
+#include "util/logging.h"
+#include "util/Utils.h"
+
+using ::neurun::compiler::IExecutionBuilder;
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+
+using ::neurun::backend::acl_common::asAclFunction;
+
+//
+// ActivationBuilder
+//
+class ActivationBuilder
+{
+public:
+  ActivationBuilder(IExecutionBuilder &builder) : _builder(builder)
+  {
+    // DO NOTHING
+  }
+
+private:
+  void appendReLU(::arm_compute::ITensor *ifm_alloc);
+  void appendReLU1(::arm_compute::ITensor *ifm_alloc);
+  void appendReLU6(::arm_compute::ITensor *ifm_alloc);
+
+public:
+  void append(model::Activation act, ::arm_compute::ITensor *ifm_alloc);
+
+private:
+  IExecutionBuilder &_builder;
+};
+
+void ActivationBuilder::appendReLU(::arm_compute::ITensor *ifm_alloc)
+{
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::RELU};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEActivationLayer>();
+
+  fn->configure(ifm_alloc, nullptr, act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _builder.append(std::move(acl_fn));
+}
+
+void ActivationBuilder::appendReLU1(::arm_compute::ITensor *ifm_alloc)
+{
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU, 1.0f, -1.0f};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEActivationLayer>();
+
+  fn->configure(ifm_alloc, nullptr, act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _builder.append(std::move(acl_fn));
+}
+
+void ActivationBuilder::appendReLU6(::arm_compute::ITensor *ifm_alloc)
+{
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU, 6.0f, 0.0f};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEActivationLayer>();
+
+  fn->configure(ifm_alloc, nullptr, act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _builder.append(std::move(acl_fn));
+}
+
+void ActivationBuilder::append(model::Activation act, ::arm_compute::ITensor *ifm_alloc)
+{
+  switch (act)
+  {
+    case model::Activation::NONE:
+    {
+      // DO NOTHING
+      break;
+    }
+    case model::Activation::RELU:
+    {
+      appendReLU(ifm_alloc);
+      break;
+    }
+    case model::Activation::RELU1:
+    {
+      appendReLU1(ifm_alloc);
+      break;
+    }
+    case model::Activation::RELU6:
+    {
+      appendReLU6(ifm_alloc);
+      break;
+    }
+    default:
+    {
+      throw std::runtime_error("Not supported, yet");
+    }
+  }
+}
+
+//
+// KernelGenerator
+//
+KernelGenerator::KernelGenerator(const neurun::model::Operands &ctx,
+                                 const std::shared_ptr<TensorBuilder> &tensor_builder)
+    : _ctx(ctx), _tensor_builder(tensor_builder), _current_subg_layout(model::Layout::UNKNOWN)
+{
+  // DO NOTHING
+}
+
+void KernelGenerator::visit(const model::Subgraph &subgraph)
+{
+  _current_subg_layout = subgraph.getLayout();
+  for (const auto &e : subgraph.operations())
+  {
+    const auto &node = *(e.node);
+    _tensor_builder->preVisit(node);
+    node.accept(*this);
+    _tensor_builder->postVisit(node);
+  }
+}
+
+void KernelGenerator::visit(const model::operation::AbsNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::AbsNode::Input::INPUT)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::ABS};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEActivationLayer>();
+
+  fn->configure(input_alloc->handle(), output_alloc->handle(), act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::ArgMaxNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::ArgMaxNode::Input::INPUT)};
+  const auto axis_index{node.param().axis_index};
+
+  auto ifm_shape = _ctx.at(ifm_index).shape();
+  auto ofm_shape = _ctx.at(ofm_index).shape();
+  auto axis_shape = _ctx.at(axis_index).shape();
+
+  assert(_ctx.at(axis_index).isConstant());
+  // Axis rank is always 1.
+  assert(axis_shape.rank() == 1);
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+  const auto ifm_rank = ifm_shape.rank();
+  auto frontend_layout = _current_subg_layout;
+  auto backend_layout = ifm_alloc->layout();
+  int32_t axis_value = _ctx.at(axis_index).asScalar<int32_t>();
+  if (axis_value < 0)
+  {
+    axis_value += ifm_rank;
+  }
+  assert(axis_value >= 0 && axis_value < ifm_rank);
+  const auto fixed_axis =
+      acl_common::ToARMComputeAxis(ifm_rank, axis_value, frontend_layout, backend_layout).value();
+
+  // auto fn = nnfw::cpp14::make_unique<::arm_compute::NEArgMinMaxLayer>();
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEArgMax>();
+
+  // NOTE
+  // if (ofm_alloc->info()->data_type() == arm_compute::DataType::S32)
+  //{
+  ofm_alloc->info()->set_data_type(arm_compute::DataType::U32);
+  //}
+  fn->configure(ifm_alloc->handle(), fixed_axis, ofm_alloc->handle());
+  // fn->configure(ifm_alloc->handle(), fixed_axis, ofm_alloc->handle(),
+  // arm_compute::ReductionOperation::ARG_IDX_MAX);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::Conv2DNode &node)
+{
+  using model::operation::Conv2DNode;
+
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(Conv2DNode::Input::INPUT)};
+  const auto ker_index{node.getInputs().at(Conv2DNode::Input::KERNEL)};
+  const auto bias_index{node.getInputs().at(Conv2DNode::Input::BIAS)};
+
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(_current_subg_layout);
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(_current_subg_layout);
+  // Kernel format is [depth_out, kernel_height, kernel_width, depth_in].
+  const auto &ker_shape = _ctx.at(ker_index).shape();
+  const auto ker_height = ker_shape.dim(1);
+  const auto ker_width = ker_shape.dim(2);
+
+  const auto stride = node.param().stride;
+  const auto padding = neurun::util::calculatePadding(node.param().padding, ifm_shape, ofm_shape,
+                                                      stride, ker_width, ker_height);
+  const auto activation = node.param().activation;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+  auto ker_alloc = _tensor_builder->at(ker_index).get();
+  auto bias_alloc = _tensor_builder->at(bias_index).get();
+
+  const auto conv_info = acl_common::asPadStrideInfo(padding, stride);
+  const auto act_info = acl_common::asActivationLayerInfo(activation);
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEConvolutionLayer>(
+      _tensor_builder->acl_tensor_manager()->internal_buffer_manager());
+
+  fn->configure(ifm_alloc->handle(), ker_alloc->handle(), bias_alloc->handle(), ofm_alloc->handle(),
+                conv_info, ::arm_compute::WeightsInfo(), ::arm_compute::Size2D(1U, 1U), act_info);
+
+  _execution_builder->append(asAclFunction(std::move(fn)));
+}
+
+void KernelGenerator::visit(const model::operation::DepthwiseConv2DNode &node)
+{
+  using model::operation::DepthwiseConv2DNode;
+
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(DepthwiseConv2DNode::Input::INPUT)};
+  const auto ker_index{node.getInputs().at(DepthwiseConv2DNode::Input::KERNEL)};
+  const auto bias_index{node.getInputs().at(DepthwiseConv2DNode::Input::BIAS)};
+
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(_current_subg_layout);
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(_current_subg_layout);
+  // Kernel format is [1, kernel_height, kernel_width, depth_out].
+  const auto &ker_shape = _ctx.at(ker_index).shape();
+  const auto ker_height = ker_shape.dim(1);
+  const auto ker_width = ker_shape.dim(2);
+
+  const auto stride = node.param().stride;
+  const auto padding = neurun::util::calculatePadding(node.param().padding, ifm_shape, ofm_shape,
+                                                      stride, ker_width, ker_height);
+  const auto multiplier = node.param().multiplier;
+  const auto activation = node.param().activation;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+  auto ker_alloc = _tensor_builder->at(ker_index).get();
+  auto bias_alloc = _tensor_builder->at(bias_index).get();
+
+  const auto conv_info = acl_common::asPadStrideInfo(padding, stride);
+  const auto act_info = acl_common::asActivationLayerInfo(activation);
+
+  if (ker_height == 3 && ker_width == 3)
+  {
+    auto fn = nnfw::cpp14::make_unique<::arm_compute::NEDepthwiseConvolutionLayer3x3>();
+
+    fn->configure(ifm_alloc->handle(), ker_alloc->handle(), bias_alloc->handle(),
+                  ofm_alloc->handle(), conv_info, multiplier, act_info);
+
+    _execution_builder->append(asAclFunction(std::move(fn)));
+  }
+  else
+  {
+    auto fn = nnfw::cpp14::make_unique<::arm_compute::NEDepthwiseConvolutionLayer>();
+
+    fn->configure(ifm_alloc->handle(), ker_alloc->handle(), bias_alloc->handle(),
+                  ofm_alloc->handle(), conv_info, multiplier, act_info);
+
+    _execution_builder->append(asAclFunction(std::move(fn)));
+  }
+}
+
+void KernelGenerator::visit(const model::operation::DequantizeNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::DequantizeNode::Input::INPUT)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEDequantizationLayer>();
+
+  fn->configure(input_alloc->handle(), output_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::MaxPool2DNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::MaxPool2DNode::Input::INPUT)};
+
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(_current_subg_layout);
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(_current_subg_layout);
+
+  const auto kh = node.param().kh;
+  const auto kw = node.param().kw;
+  const auto stride = node.param().stride;
+  const auto padding =
+      neurun::util::calculatePadding(node.param().padding, ifm_shape, ofm_shape, stride, kw, kh);
+  const auto activation = node.param().activation;
+
+  VERBOSE(MaxPool2D) << "IFM_H: " << ifm_shape.H << std::endl;
+  VERBOSE(MaxPool2D) << "IFM_W: " << ifm_shape.W << std::endl;
+  VERBOSE(MaxPool2D) << "OFM_H: " << ofm_shape.H << std::endl;
+  VERBOSE(MaxPool2D) << "OFM_W: " << ofm_shape.W << std::endl;
+  VERBOSE(MaxPool2D) << "KER_H: " << kh << std::endl;
+  VERBOSE(MaxPool2D) << "KER_W: " << kw << std::endl;
+  VERBOSE(MaxPool2D) << "STRIDE_H: " << stride.vertical << std::endl;
+  VERBOSE(MaxPool2D) << "STRIDE_W: " << stride.horizontal << std::endl;
+  VERBOSE(MaxPool2D) << "PAD(T): " << padding.top << std::endl;
+  VERBOSE(MaxPool2D) << "PAD(B): " << padding.bottom << std::endl;
+  VERBOSE(MaxPool2D) << "PAD(L): " << padding.left << std::endl;
+  VERBOSE(MaxPool2D) << "PAD(R): " << padding.right << std::endl;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  ::arm_compute::PoolingLayerInfo info{::arm_compute::PoolingType::MAX,
+                                       ::arm_compute::Size2D{kw, kh},
+                                       acl_common::asPadStrideInfo(padding, stride)};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEPoolingLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append((std::move(acl_fn)));
+
+  ActivationBuilder{*_execution_builder}.append(activation, ofm_alloc->handle());
+}
+
+void KernelGenerator::visit(const model::operation::MeanNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::MeanNode::Input::INPUT)};
+
+  const auto axis_index{node.param().axis_index};
+  const auto keep_dims{node.param().keep_dims};
+
+  const auto ifm_shape = _ctx.at(ifm_index).shape();
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+  std::set<uint32_t> axes;
+  {
+    const auto ifm_rank = ifm_shape.rank();
+    const auto frontend_layout = _current_subg_layout;
+    const auto backend_layout = ifm_alloc->layout();
+    const auto axis_shape = _ctx.at(axis_index).shape();
+    switch (axis_shape.rank())
+    {
+      case 0: // scalar
+      {
+        auto axis_value = _ctx.at(axis_index).asScalar<int32_t>();
+        if (axis_value < 0)
+        {
+          axis_value += ifm_rank;
+        }
+        axes.insert(::neurun::backend::acl_common::ToARMComputeAxis(ifm_rank, axis_value,
+                                                                    frontend_layout, backend_layout)
+                        .value());
+        break;
+      }
+      case 1: // vector
+      {
+        const auto axis_base = _ctx.at(axis_index).data().base();
+        const int axis_size = axis_shape.num_elements();
+
+        // If axis's data does not exist as constant values and can be gotten as input data, we have
+        // to find a way to infer output shape when sinking output.
+        assert(axis_base != nullptr);
+        for (int32_t n = 0; n < axis_size; ++n)
+        {
+          int32_t axis_value = *(reinterpret_cast<const int32_t *>(axis_base) + n);
+          if (axis_value < 0)
+          {
+            axis_value += ifm_rank;
+          }
+          axes.insert(::neurun::backend::acl_common::ToARMComputeAxis(
+                          ifm_rank, axis_value, frontend_layout, backend_layout)
+                          .value());
+        }
+        break;
+      }
+      default:
+        throw std::runtime_error("Not supported");
+    }
+  }
+
+  arm_compute::Coordinates fixed_axis;
+  for (auto a : axes)
+  {
+    fixed_axis.set(fixed_axis.num_dimensions(), a);
+  }
+
+  // NOTE NEReduceMean has a bug that does not support NHWC layout
+  //      NEReduceMean intermediate tensors are always NCHW layout
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEReduceMeanEx>();
+
+  fn->configure(ifm_alloc->handle(), fixed_axis, keep_dims, ofm_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::AvgPool2DNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::AvgPool2DNode::Input::INPUT)};
+
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(_current_subg_layout);
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(_current_subg_layout);
+
+  const auto kh = node.param().kh;
+  const auto kw = node.param().kw;
+  const auto stride = node.param().stride;
+  const auto padding =
+      neurun::util::calculatePadding(node.param().padding, ifm_shape, ofm_shape, stride, kw, kh);
+  const auto activation = node.param().activation;
+
+  VERBOSE(AvgPool2D) << "IFM_H: " << ifm_shape.H << std::endl;
+  VERBOSE(AvgPool2D) << "IFM_W: " << ifm_shape.W << std::endl;
+  VERBOSE(AvgPool2D) << "OFM_H: " << ofm_shape.H << std::endl;
+  VERBOSE(AvgPool2D) << "OFM_W: " << ofm_shape.W << std::endl;
+  VERBOSE(AvgPool2D) << "KER_H: " << kh << std::endl;
+  VERBOSE(AvgPool2D) << "KER_W: " << kw << std::endl;
+  VERBOSE(AvgPool2D) << "STRIDE_H: " << stride.vertical << std::endl;
+  VERBOSE(AvgPool2D) << "STRIDE_W: " << stride.horizontal << std::endl;
+  VERBOSE(AvgPool2D) << "PAD(T): " << padding.top << std::endl;
+  VERBOSE(AvgPool2D) << "PAD(B): " << padding.bottom << std::endl;
+  VERBOSE(AvgPool2D) << "PAD(L): " << padding.left << std::endl;
+  VERBOSE(AvgPool2D) << "PAD(R): " << padding.right << std::endl;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  ::arm_compute::PoolingLayerInfo info{
+      ::arm_compute::PoolingType::AVG, ::arm_compute::Size2D{kw, kh},
+      acl_common::asPadStrideInfo(padding, stride), true /* exclude_padding */};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEPoolingLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append((std::move(acl_fn)));
+
+  ActivationBuilder{*_execution_builder}.append(activation, ofm_alloc->handle());
+}
+
+void KernelGenerator::visit(const model::operation::ConcatNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+
+  std::vector<model::OperandIndex> input_indexes;
+  for (const auto &input : node.getInputs())
+    input_indexes.emplace_back(input);
+
+  const auto axis = node.param().axis;
+
+  // If tensor allocator allocate as subtensor
+  bool canEliminate = true;
+  for (auto ifm_ind : input_indexes)
+  {
+    if (!_tensor_builder->isSubTensorOf(ofm_index, ifm_ind))
+    {
+      canEliminate = false;
+      break;
+    }
+  }
+  if (canEliminate)
+  {
+    // If concat eliminated, return a NOP IFunction
+    _execution_builder->append(nnfw::cpp14::make_unique<exec::NopFunction>());
+    return;
+  }
+
+  auto output_alloc = _tensor_builder->at(ofm_index).get();
+
+  std::vector<::neurun::backend::acl_neon::operand::INETensor *> input_allocs;
+  for (const auto &ifm_ind : input_indexes)
+    input_allocs.emplace_back(_tensor_builder->at(ifm_ind).get());
+
+  auto fn = nnfw::cpp14::make_unique<::neurun::backend::acl_neon::kernel::ConcatLayer>();
+
+  const auto rank = _ctx.at(ofm_index).shape().rank();
+  const auto frontend_layout = _current_subg_layout;
+  const auto backend_layout = output_alloc->layout();
+  const auto fixed_axis =
+      acl_common::ToARMComputeAxis(rank, axis, frontend_layout, backend_layout).value();
+
+  fn->configure(input_allocs, fixed_axis, output_alloc);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::FloorNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::FloorNode::Input::INPUT)};
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEFloor>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::FullyConnectedNode &node)
+{
+  using model::operation::FullyConnectedNode;
+
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(FullyConnectedNode::Input::INPUT)};
+  const auto weight_index{node.getInputs().at(FullyConnectedNode::Input::WEIGHT)};
+  const auto bias_index{node.getInputs().at(FullyConnectedNode::Input::BIAS)};
+
+  const auto input_rank = _ctx.at(input_index).shape().rank();
+  // TODO Currently we are not handling where the case is that the input's rank is 3.
+  // The handling should be added in the future.
+  assert(input_rank != 3);
+
+  const auto output_size = _ctx.at(output_index).shape().dim(1);
+  UNUSED_RELEASE(output_size);
+  assert(_ctx.at(bias_index).shape().dim(0) == output_size);
+  assert(_ctx.at(weight_index).shape().dim(0) == output_size);
+  const auto batch_size = _ctx.at(output_index).shape().dim(0);
+  const auto input_size = _ctx.at(weight_index).shape().dim(1);
+
+  // Check for reshaping input's shape into rank-2
+  bool needs_reshape = false;
+  neurun::model::Shape reshape(2);
+  if (input_rank == 4)
+  {
+    model::FeatureShape ifm_shape_feature =
+        _ctx.at(input_index).shape().asFeature(_current_subg_layout);
+    auto feature_size =
+        ifm_shape_feature.N * ifm_shape_feature.C * ifm_shape_feature.H * ifm_shape_feature.W;
+
+    UNUSED_RELEASE(feature_size);
+    assert(feature_size == batch_size * input_size);
+
+    // for reshaping
+    needs_reshape = true;
+    reshape.dim(0) = batch_size; /* H */
+    reshape.dim(1) = input_size; /* W */
+  }
+
+  const auto activation = node.param().activation;
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+  auto weight_alloc = _tensor_builder->at(weight_index).get();
+  auto bias_alloc = _tensor_builder->at(bias_index).get();
+  auto acl_layout = output_alloc->handle()->info()->data_layout();
+
+  auto fn = nnfw::cpp14::make_unique<arm_compute::NEFullyConnectedReshapingLayer>(
+      _tensor_builder->acl_tensor_manager()->internal_buffer_manager());
+
+  fn->configure(
+      input_alloc->handle(), weight_alloc->handle(), bias_alloc->handle(), output_alloc->handle(),
+      needs_reshape,
+      ::neurun::backend::acl_common::asTensorShape(/* TODO Support NCHW frontend */
+                                                   reshape, model::Layout::NHWC,
+                                                   ::neurun::backend::acl_common::asRuntimeLayout(
+                                                       acl_layout)));
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+
+  ActivationBuilder{*_execution_builder}.append(activation, output_alloc->handle());
+}
+
+void KernelGenerator::visit(const model::operation::L2NormalizationNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::L2NormalizationNode::Input::INPUT)};
+
+  // {CL|Neon}L2Normalization performs the reduction only along dimension 0
+  // L2 Normalization always performs the reduction along the depth axis
+  // Thus, we repurpose {CL|Neon}NormalizationLayers to act as depthwise L2 normalizations by
+  // choosing normalization parameters as below
+
+  const auto &ifm_shape = _ctx.at(ifm_index).shape();
+  // TODO Support optional constant dimension that normalization would be performed on
+  const auto normalization_axis = ifm_shape.rank() - 1;
+  int32_t radius =
+      2 * ifm_shape.dim(normalization_axis) + 1; // normSize = depth(last dimension) * 2 + 1
+  float alpha = 1.0f;                            // In the implementation to make alpha_ become 1
+  float beta = 0.5f;                             // pow(reduction, -0.5) = 1 / sqrt(reduction)
+  float bias = 0.0f;                             // Don't offset the reduction.
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  const auto norm_info = ::arm_compute::NormalizationLayerInfo(::arm_compute::NormType::CROSS_MAP,
+                                                               radius, alpha, beta, bias, false);
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NENormalizationLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), norm_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::L2Pool2DNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::L2Pool2DNode::Input::INPUT)};
+
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(_current_subg_layout);
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(_current_subg_layout);
+
+  uint32_t kw = node.param().kw;
+  uint32_t kh = node.param().kh;
+  const auto stride = node.param().stride;
+  const auto padding =
+      neurun::util::calculatePadding(node.param().padding, ifm_shape, ofm_shape, stride, kw, kh);
+  const auto activation = node.param().activation;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  ::arm_compute::PoolingLayerInfo info{
+      ::arm_compute::PoolingType::L2, ::arm_compute::Size2D{kw, kh},
+      ::neurun::backend::acl_common::asPadStrideInfo(padding, stride)};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEPoolingLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+
+  ActivationBuilder{*_execution_builder}.append(activation, ofm_alloc->handle());
+}
+
+void KernelGenerator::visit(const model::operation::LocalResponseNormalizationNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{
+      node.getInputs().at(model::operation::LocalResponseNormalizationNode::Input::INPUT)};
+  const auto radius_index{node.param().radius_index};
+  const auto bias_index{node.param().bias_index};
+  const auto alpha_index{node.param().alpha_index};
+  const auto beta_index{node.param().beta_index};
+
+  auto radius = _ctx.at(radius_index).asScalar<int32_t>();
+  auto alpha = _ctx.at(alpha_index).asScalar<float>();
+  auto beta = _ctx.at(beta_index).asScalar<float>();
+  auto bias = _ctx.at(bias_index).asScalar<float>();
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  const auto norm_info = ::arm_compute::NormalizationLayerInfo(
+      ::arm_compute::NormType::CROSS_MAP, radius * 2 + 1, alpha, beta, bias, false);
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NENormalizationLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), norm_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::LogicalAndNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input0_index{node.getInputs().at(model::operation::LogicalAndNode::Input::INPUT0)};
+  const auto input1_index{node.getInputs().at(model::operation::LogicalAndNode::Input::INPUT1)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input0_alloc = _tensor_builder->at(input0_index).get();
+  auto input1_alloc = _tensor_builder->at(input1_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NELogicalAnd>();
+
+  fn->configure(input0_alloc->handle(), input1_alloc->handle(), output_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::LogicalNotNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::LogicalNotNode::Input::INPUT)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEBitwiseNot>();
+
+  fn->configure(input_alloc->handle(), output_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::LogicalOrNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input0_index{node.getInputs().at(model::operation::LogicalOrNode::Input::INPUT0)};
+  const auto input1_index{node.getInputs().at(model::operation::LogicalOrNode::Input::INPUT1)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input0_alloc = _tensor_builder->at(input0_index).get();
+  auto input1_alloc = _tensor_builder->at(input1_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NELogicalOr>();
+
+  fn->configure(input0_alloc->handle(), input1_alloc->handle(), output_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::LogisticNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::LogisticNode::Input::INPUT)};
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::LOGISTIC};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEActivationLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::LSTMNode &node)
+{
+  // TODO Support dynamic rnn
+  // TODO Fix subtle error in the case of non-CIFG, non-peephole and No Projection.
+  const auto scratch_buffer_index{
+      node.getOutputs().at(model::operation::LSTMNode::Output::SCRATCH_BUFFER)};
+  const auto output_state_out_index{
+      node.getOutputs().at(model::operation::LSTMNode::Output::OUTPUT_STATE_OUT)};
+  const auto cell_state_out_index{
+      node.getOutputs().at(model::operation::LSTMNode::Output::CELL_STATE_OUT)};
+  const auto output_index{node.getOutputs().at(model::operation::LSTMNode::Output::OUTPUT)};
+
+  const auto input_index{node.getInputs().at(model::operation::LSTMNode::Input::INPUT)};
+  const auto input_to_input_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::INPUT_TO_INPUT_WEIGHTS)}; // optional
+  const auto input_to_forget_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::INPUT_TO_FORGET_WEIGHTS)};
+  const auto input_to_cell_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::INPUT_TO_CELL_WEIGHTS)};
+  const auto input_to_output_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::INPUT_TO_OUTPUT_WEIGHTS)};
+  const auto recurrent_to_input_weights_index{node.getInputs().at(
+      model::operation::LSTMNode::Input::RECURRENT_TO_INPUT_WEIGHTS)}; // optional
+  const auto recurrent_to_forget_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::RECURRENT_TO_FORGET_WEIGHTS)};
+  const auto recurrent_to_cell_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::RECURRENT_TO_CELL_WEIGHTS)};
+  const auto recurrent_to_output_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::RECURRENT_TO_OUTPUT_WEIGHTS)};
+  const auto cell_to_input_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::CELL_TO_INPUT_WEIGHTS)}; // optional
+  const auto cell_to_forget_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::CELL_TO_FORGET_WEIGHTS)}; // optional
+  const auto cell_to_output_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::CELL_TO_OUTPUT_WEIGHTS)}; // optional
+  const auto input_gate_bias_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::INPUT_GATE_BIAS)};
+  const auto forget_gate_bias_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::FORGET_GATE_BIAS)};
+  const auto cell_bias_index{node.getInputs().at(model::operation::LSTMNode::Input::CELL_BIAS)};
+  const auto output_gate_bias_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::OUTPUT_GATE_BIAS)};
+  const auto projection_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::PROJECTION_WEIGHTS)}; // optional
+  const auto projection_bias_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::PROJECTION_BIAS)}; // optional
+  const auto output_state_in_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::OUTPUT_STATE_IN)};
+  const auto cell_state_in_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::CELL_STATE_IN)};
+  const auto cell_threshold = node.param().cell_threshold;
+  const auto projection_threshold = node.param().projection_threshold;
+
+  bool has_input_to_input_weights = _ctx.at(input_to_input_weights_index).shape().dim(0) != 0 &&
+                                    _ctx.at(input_to_input_weights_index).shape().dim(1) != 0;
+  bool has_recurrent_to_input_weights =
+      _ctx.at(recurrent_to_input_weights_index).shape().dim(0) != 0 &&
+      _ctx.at(recurrent_to_input_weights_index).shape().dim(1) != 0;
+  bool has_cell_to_forget_weights = _ctx.at(cell_to_forget_weights_index).shape().dim(0) != 0;
+  bool has_cell_to_output_weights = _ctx.at(cell_to_output_weights_index).shape().dim(0) != 0;
+  bool has_projection_weights = _ctx.at(projection_weights_index).shape().dim(0) != 0 &&
+                                _ctx.at(projection_weights_index).shape().dim(1) != 0;
+  bool has_projection_bias = _ctx.at(projection_bias_index).shape().dim(0);
+
+  // NOTE The input_to_input_weights and the recurrent_to_input_weights do not exist in CIFG.
+  // true: no CIFG
+  // false: CIFG
+  // NOTE The cell_to_input_weights does not exist in non-peephole although regular LSTM(non-CIFG).
+  bool has_cifg_param = has_input_to_input_weights && has_recurrent_to_input_weights;
+
+  // NOTE The cell_to_forget_weights and the cell_to_output_weights exist in peephole.
+  // But the cell_to_input_weights does not exist in regular CIFG although peephole.
+  // true: peephole
+  // false: no peephole
+  bool has_peephole_param = has_cell_to_forget_weights && has_cell_to_output_weights;
+
+  // NOTE Although the projection weights has data the projection bias may not have data.
+  bool has_projection_param = has_projection_weights;
+
+  const auto activation = node.param().activation;
+  const auto cell_clip = cell_threshold;
+  const auto projection_clip = projection_threshold;
+  assert(cell_clip >= 0.f && projection_clip >= 0.f);
+
+  auto scratch_buffer_alloc = _tensor_builder->at(scratch_buffer_index).get();
+  auto output_state_out_alloc = _tensor_builder->at(output_state_out_index).get();
+  auto cell_state_out_alloc = _tensor_builder->at(cell_state_out_index).get();
+  auto output_alloc = _tensor_builder->at(output_index).get();
+
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto input_to_forget_weights_alloc = _tensor_builder->at(input_to_forget_weights_index).get();
+  auto input_to_cell_weights_alloc = _tensor_builder->at(input_to_cell_weights_index).get();
+  auto input_to_output_weights_alloc = _tensor_builder->at(input_to_output_weights_index).get();
+  auto recurrent_to_forget_weights_alloc =
+      _tensor_builder->at(recurrent_to_forget_weights_index).get();
+  auto recurrent_to_cell_weights_alloc = _tensor_builder->at(recurrent_to_cell_weights_index).get();
+  auto recurrent_to_output_weights_alloc =
+      _tensor_builder->at(recurrent_to_output_weights_index).get();
+
+  auto forget_gate_bias_alloc = _tensor_builder->at(forget_gate_bias_index).get();
+  auto cell_bias_alloc = _tensor_builder->at(cell_bias_index).get();
+  auto output_gate_bias_alloc = _tensor_builder->at(output_gate_bias_index).get();
+  auto output_state_in_alloc = _tensor_builder->at(output_state_in_index).get();
+  auto cell_state_in_alloc = _tensor_builder->at(cell_state_in_index).get();
+
+  auto act_info = ::neurun::backend::acl_common::asActivationLayerInfo(activation);
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NELSTMLayer>();
+
+  ::arm_compute::LSTMParams<::arm_compute::ITensor> lstm_params{};
+  if (has_cifg_param)
+  {
+    auto input_to_input_weights_alloc =
+        _tensor_builder->at(input_to_input_weights_index).get(); // optional
+    auto recurrent_to_input_weights_alloc =
+        _tensor_builder->at(recurrent_to_input_weights_index).get(); // optional
+    auto cell_to_input_weights_handle =
+        has_peephole_param ? _tensor_builder->at(cell_to_input_weights_index).get()->handle()
+                           : nullptr; // optional (non-cifg && peephole)
+    auto input_gate_bias_alloc = _tensor_builder->at(input_gate_bias_index).get(); // optional
+    lstm_params.set_cifg_params(input_to_input_weights_alloc->handle(),
+                                recurrent_to_input_weights_alloc->handle(),
+                                cell_to_input_weights_handle, input_gate_bias_alloc->handle());
+  }
+  if (has_peephole_param)
+  {
+    auto cell_to_forget_weights_alloc =
+        _tensor_builder->at(cell_to_forget_weights_index).get(); // optional
+    auto cell_to_output_weights_alloc =
+        _tensor_builder->at(cell_to_output_weights_index).get(); // optional
+    lstm_params.set_peephole_params(cell_to_forget_weights_alloc->handle(),
+                                    cell_to_output_weights_alloc->handle());
+  }
+  if (has_projection_param)
+  {
+    auto projection_weights_alloc = _tensor_builder->at(projection_weights_index).get(); // optional
+    auto projection_bias_handle = has_projection_bias
+                                      ? _tensor_builder->at(projection_bias_index).get()->handle()
+                                      : nullptr; // optional
+    lstm_params.set_projection_params(projection_weights_alloc->handle(), projection_bias_handle);
+  }
+
+  fn->configure(
+      input_alloc->handle(), input_to_forget_weights_alloc->handle(),
+      input_to_cell_weights_alloc->handle(), input_to_output_weights_alloc->handle(),
+      recurrent_to_forget_weights_alloc->handle(), recurrent_to_cell_weights_alloc->handle(),
+      recurrent_to_output_weights_alloc->handle(), forget_gate_bias_alloc->handle(),
+      cell_bias_alloc->handle(), output_gate_bias_alloc->handle(), output_state_in_alloc->handle(),
+      cell_state_in_alloc->handle(), scratch_buffer_alloc->handle(),
+      output_state_out_alloc->handle(), cell_state_out_alloc->handle(), output_alloc->handle(),
+      lstm_params, act_info, cell_clip, projection_clip);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::MulNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto lhs_index{node.getInputs().at(model::operation::MulNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::MulNode::Input::RHS)};
+
+  const auto activation = node.param().activation;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto lhs_alloc = _tensor_builder->at(lhs_index).get();
+  auto rhs_alloc = _tensor_builder->at(rhs_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEPixelWiseMultiplication>();
+
+  // RoundingPolicy for scale:1.0 is only allowed RoundingPolicy::TO_ZERO
+  fn->configure(lhs_alloc->handle(), rhs_alloc->handle(), ofm_alloc->handle(), 1.0, // scale
+                arm_compute::ConvertPolicy::SATURATE, arm_compute::RoundingPolicy::TO_ZERO);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+
+  ActivationBuilder{*_execution_builder}.append(activation, ofm_alloc->handle());
+}
+
+void KernelGenerator::visit(const model::operation::NegNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::NegNode::Input::INPUT)};
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NENegLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::PadNode &node)
+{
+  const auto input_index{node.getInputs().at(model::operation::PadNode::Input::INPUT)};
+  const auto pad_index{node.getInputs().at(model::operation::PadNode::Input::PAD)};
+  const auto output_index{node.getOutputs().at(0)};
+  assert(_ctx.at(pad_index).isConstant());
+
+  auto rank = _ctx.at(pad_index).shape().dim(0);
+  auto pad_base = _ctx.at(pad_index).data().base();
+
+  auto input = _tensor_builder->at(input_index).get()->handle();
+  auto output = _tensor_builder->at(output_index).get()->handle();
+
+  ::arm_compute::PaddingList padding_list;
+  padding_list.resize(rank);
+  for (int32_t n = 0; n < rank; ++n)
+  {
+    const int32_t *from = reinterpret_cast<const int32_t *>(pad_base) + (n * 2);
+
+    const auto frontend_layout = _current_subg_layout;
+    const auto backend_layout = _tensor_builder->at(input_index).get()->layout();
+    const auto axis =
+        acl_common::ToARMComputeAxis(rank, n, frontend_layout, backend_layout).value();
+    padding_list[axis] = ::arm_compute::PaddingInfo{from[0], from[1]};
+  }
+
+  const auto input_type = _ctx.at(input_index).typeInfo();
+  UNUSED_RELEASE(input_type);
+  assert(input->info()->data_type() == acl_common::asDataType(input_type.type()));
+  assert(input->info()->quantization_info() ==
+         ::arm_compute::QuantizationInfo(input_type.scale(), input_type.offset()));
+  const auto pixel_value =
+      ::arm_compute::PixelValue(0, input->info()->data_type(), input->info()->quantization_info());
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEPadLayer>();
+  fn->configure(input, output, padding_list, pixel_value);
+
+  _execution_builder->append(asAclFunction(std::move(fn)));
+}
+
+void KernelGenerator::visit(const model::operation::PReLUNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::PReLUNode::Input::INPUT)};
+  const auto alpha_index{node.getInputs().at(model::operation::PReLUNode::Input::ALPHA)};
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+  auto alpha_alloc = _tensor_builder->at(alpha_index).get();
+
+  std::unique_ptr<::arm_compute::IFunction> fn;
+
+  auto l = nnfw::cpp14::make_unique<::arm_compute::NEPReLU>();
+
+  l->configure(ifm_alloc->handle(), alpha_alloc->handle(), ofm_alloc->handle());
+
+  fn = std::move(l);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::ReduceSumNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::ReduceSumNode::Input::INPUT)};
+  const auto axis_index{node.param().axis_index};
+
+  const auto axis_base = _ctx.at(axis_index).data().base();
+  const auto axis_size = _ctx.at(axis_index).shape().num_elements();
+  const auto input_rank = _ctx.at(input_index).shape().rank();
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+  const auto frontend_layout = _current_subg_layout;
+  const auto backend_layout = input_alloc->layout();
+  // The axis's data must exist as constant values
+  assert(axis_base != nullptr);
+  std::set<int32_t> axes;
+  for (size_t n = 0; n < axis_size; ++n)
+  {
+    int32_t axis_value = *(reinterpret_cast<const int32_t *>(axis_base) + n);
+    if (axis_value < 0)
+    {
+      axis_value += input_rank;
+    }
+    axes.insert(::neurun::backend::acl_common::ToARMComputeAxis(input_rank, axis_value,
+                                                                frontend_layout, backend_layout)
+                    .value());
+  }
+  arm_compute::Coordinates fixed_axes;
+  for (const auto &a : axes)
+  {
+    fixed_axes.set(fixed_axes.num_dimensions(), a);
+  }
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEReduceSum>();
+
+  fn->configure(input_alloc->handle(), fixed_axes, false, output_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::ReLUNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::ReLUNode::Input::INPUT)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<arm_compute::NEActivationLayer>();
+
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::RELU};
+
+  fn->configure(input_alloc->handle(), output_alloc->handle(), act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::ReLU1Node &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::ReLU1Node::Input::INPUT)};
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU, 1.0f, -1.0f};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEActivationLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::ReLU6Node &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::ReLU6Node::Input::INPUT)};
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::BOUNDED_RELU, 6.0f};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEActivationLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::ReshapeNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::ReshapeNode::Input::INPUT)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<arm_compute::NEReshapeLayer>();
+
+  fn->configure(input_alloc->handle(), output_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::ResizeBilinearNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+
+  const auto ifm_index{node.getInputs().at(model::operation::ResizeBilinearNode::Input::INPUT)};
+  const auto height_index{node.param().height_index};
+  const auto width_index{node.param().width_index};
+  (void)height_index;
+  (void)width_index;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEScale>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle(),
+                ::arm_compute::InterpolationPolicy::BILINEAR, ::arm_compute::BorderMode::REPLICATE,
+                ::arm_compute::PixelValue(0.f), ::arm_compute::SamplingPolicy::TOP_LEFT);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::RNNNode &node)
+{
+  const auto output_index{node.getOutputs().at(model::operation::RNNNode::Output::OUTPUT)};
+  const auto hidden_state_out_index{
+      node.getOutputs().at(model::operation::RNNNode::Output::HIDDEN_STATE_OUT)};
+
+  const auto input_index{node.getInputs().at(model::operation::RNNNode::Input::INPUT)};
+  const auto weights_index{node.getInputs().at(model::operation::RNNNode::Input::WEIGHTS)};
+  const auto recurrent_weights_index{
+      node.getInputs().at(model::operation::RNNNode::Input::RECURRENT_WEIGHTS)};
+  const auto bias_index{node.getInputs().at(model::operation::RNNNode::Input::BIAS)};
+  const auto hidden_state_in_index{
+      node.getInputs().at(model::operation::RNNNode::Input::HIDDEN_STATE_IN)};
+
+  const auto activation = node.param().activation;
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto hidden_state_out_alloc = _tensor_builder->at(hidden_state_out_index).get();
+
+  auto input_alloc = _tensor_builder->at(input_index).get();
+  auto weights_alloc = _tensor_builder->at(weights_index).get();
+  auto recurrent_weights_alloc = _tensor_builder->at(recurrent_weights_index).get();
+  auto bias_alloc = _tensor_builder->at(bias_index).get();
+  auto hidden_state_in_alloc = _tensor_builder->at(hidden_state_in_index).get();
+  auto act_info = ::neurun::backend::acl_common::asActivationLayerInfo(activation);
+
+  auto copy_layer = nnfw::cpp14::make_unique<::arm_compute::NECopy>();
+  copy_layer->configure(hidden_state_in_alloc->handle(), hidden_state_out_alloc->handle());
+  _execution_builder->append(asAclFunction(std::move(copy_layer)));
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NERNNLayerEx>(
+      _tensor_builder->acl_tensor_manager()->internal_buffer_manager());
+  fn->configure(input_alloc->handle(), weights_alloc->handle(), recurrent_weights_alloc->handle(),
+                bias_alloc->handle(), hidden_state_out_alloc->handle(), output_alloc->handle(),
+                act_info);
+  _execution_builder->append(asAclFunction(std::move(fn)));
+}
+
+void KernelGenerator::visit(const model::operation::RSQRTNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::RSQRTNode::Input::INPUT)};
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NERsqrtLayer>();
+
+  fn->configure(ifm_alloc->handle(), ofm_alloc->handle());
+
+  _execution_builder->append(asAclFunction(std::move(fn)));
+}
+
+void KernelGenerator::visit(const model::operation::SqueezeNode &node)
+{
+  // Squeeze is identical to reshape except that it has an optional dimensions input.
+  // In addition, optional dims_index is ignored since output tensor already has squeezed shape
+  // by freezer and toco
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::SqueezeNode::Input::INPUT)};
+  const auto dims_index{node.param().dims};
+  (void)dims_index;
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+  auto fn = nnfw::cpp14::make_unique<arm_compute::NEReshapeLayer>();
+  fn->configure(input_alloc->handle(), output_alloc->handle());
+  auto acl_fn = asAclFunction(std::move(fn));
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::TanhNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::TanhNode::Input::INPUT)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<arm_compute::NEActivationLayer>();
+
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::TANH, 1.0f, 1.0f};
+
+  fn->configure(input_alloc->handle(), output_alloc->handle(), act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::SoftmaxNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::SoftmaxNode::Input::INPUT)};
+  const auto beta = node.param().beta;
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NESoftmaxLayer>(
+      _tensor_builder->acl_tensor_manager()->internal_buffer_manager());
+
+  fn->configure(input_alloc->handle(), output_alloc->handle(), beta);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::SplitNode &node)
+{
+  // TODO Support this op by SubTensor
+  const auto ifm_index{node.getInputs().at(model::operation::SplitNode::Input::INPUT)};
+  const auto axis_index{node.param().axis_index};
+  const auto num_of_splits_index{node.param().num_of_splits_index};
+
+  assert(_ctx.at(num_of_splits_index).asScalar<unsigned int>() == node.getOutputs().size());
+
+  const auto ifm_rank = _ctx.at(ifm_index).shape().rank();
+  std::vector<model::OperandIndex> output_indexes;
+  for (const auto &output : node.getOutputs())
+    output_indexes.emplace_back(output);
+
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+  std::vector<arm_compute::ITensor *> output_allocs;
+  for (const auto &ofm_ind : output_indexes)
+    output_allocs.emplace_back(_tensor_builder->at(ofm_ind).get()->handle());
+
+  const auto frontend_layout = _current_subg_layout;
+  const auto backend_layout = ifm_alloc->layout();
+  auto axis = _ctx.at(axis_index).asScalar<int32_t>();
+  if (axis < 0)
+    axis += ifm_rank;
+  axis = acl_common::ToARMComputeAxis(ifm_rank, axis, frontend_layout, backend_layout).value();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NESplit>();
+
+  fn->configure(ifm_alloc->handle(), output_allocs, axis);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::SQRTNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::SQRTNode::Input::INPUT)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  const ::arm_compute::ActivationLayerInfo act_info{
+      ::arm_compute::ActivationLayerInfo::ActivationFunction::SQRT};
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEActivationLayer>();
+
+  fn->configure(input_alloc->handle(), output_alloc->handle(), act_info);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::SquaredDifferenceNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto lhs_index{node.getInputs().at(model::operation::SquaredDifferenceNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::SquaredDifferenceNode::Input::RHS)};
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto lhs_alloc = _tensor_builder->at(lhs_index).get();
+  auto rhs_alloc = _tensor_builder->at(rhs_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEElementwiseSquaredDiff>();
+
+  fn->configure(lhs_alloc->handle(), rhs_alloc->handle(), ofm_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::SubNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto lhs_index{node.getInputs().at(model::operation::SubNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::SubNode::Input::RHS)};
+
+  const auto activation = node.param().activation;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto lhs_alloc = _tensor_builder->at(lhs_index).get();
+  auto rhs_alloc = _tensor_builder->at(rhs_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEArithmeticSubtraction>();
+
+  fn->configure(lhs_alloc->handle(), rhs_alloc->handle(), ofm_alloc->handle(),
+                arm_compute::ConvertPolicy::SATURATE);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+
+  ActivationBuilder{*_execution_builder}.append(activation, ofm_alloc->handle());
+}
+
+void KernelGenerator::visit(const model::operation::StridedSliceNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::StridedSliceNode::Input::INPUT)};
+  const auto startData_index{node.param().startData_index};
+  const auto endData_index{node.param().endData_index};
+  const auto stridesData_index{node.param().stridesData_index};
+  const auto beginMask_index{node.param().beginMask_index};
+  const auto endMask_index{node.param().endMask_index};
+  const auto shrinkAxisMask_index{node.param().shrinkAxisMask_index};
+
+  // Set initializers for indices data such as order of inputData
+  int input_rank = _ctx.at(input_index).shape().rank();
+  std::vector<int32_t> starts;
+  std::vector<int32_t> ends;
+  std::vector<int32_t> strides;
+  starts.resize(input_rank, 0);
+  ends.resize(input_rank, 0);
+  strides.resize(input_rank, 0);
+  {
+    auto input_shape = _ctx.at(input_index).shape();
+    auto startData_base = _ctx.at(startData_index).data().base();
+    auto endData_base = _ctx.at(endData_index).data().base();
+    auto stridesData_base = _ctx.at(stridesData_index).data().base();
+    const int startData_size = _ctx.at(startData_index).shape().num_elements();
+    const int endData_size = _ctx.at(endData_index).shape().num_elements();
+    const int stridesData_size = _ctx.at(stridesData_index).shape().num_elements();
+
+    using neurun::model::DataType;
+
+    UNUSED_RELEASE(startData_size);
+    UNUSED_RELEASE(endData_size);
+    UNUSED_RELEASE(stridesData_size);
+
+    assert(_ctx.at(startData_index).typeInfo().type() == DataType::INT32);
+    assert(_ctx.at(endData_index).typeInfo().type() == DataType::INT32);
+    assert(_ctx.at(stridesData_index).typeInfo().type() == DataType::INT32);
+    assert(startData_size == input_rank);
+    assert(endData_size == input_rank);
+    assert(stridesData_size == input_rank);
+
+    assert(startData_base != nullptr);
+    for (int n = 0; n < input_rank; ++n)
+    {
+      auto axis = ::neurun::backend::acl_common::ToARMComputeAxis(input_rank, n).value();
+
+      int32_t start_value = *(reinterpret_cast<const int32_t *>(startData_base) + n);
+      starts[axis] = start_value;
+
+      int32_t end_value = *(reinterpret_cast<const int32_t *>(endData_base) + n);
+      ends[axis] = end_value;
+
+      int32_t strides_value = *(reinterpret_cast<const int32_t *>(stridesData_base) + n);
+      strides[axis] = strides_value;
+    }
+  }
+
+  // Set mask bits such as order of inputData
+  const auto beginMask = ::neurun::backend::acl_common::ReorderBits<int32_t>(
+      _ctx.at(beginMask_index).asScalar<int32_t>(), input_rank);
+  const auto endMask = ::neurun::backend::acl_common::ReorderBits<int32_t>(
+      _ctx.at(endMask_index).asScalar<int32_t>(), input_rank);
+  const auto shrinkAxisMask = ::neurun::backend::acl_common::ReorderBits<int32_t>(
+      _ctx.at(shrinkAxisMask_index).asScalar<int32_t>(), input_rank);
+
+  auto outputData_alloc = _tensor_builder->at(output_index).get();
+  auto inputData_alloc = _tensor_builder->at(input_index).get();
+
+  ::arm_compute::Coordinates starts_set;
+  ::arm_compute::Coordinates ends_set;
+  ::arm_compute::BiStrides strides_set;
+
+  for (size_t i = 0; i < starts.size(); ++i)
+  {
+    starts_set.set(i, starts[i]);
+    ends_set.set(i, ends[i]);
+    strides_set.set(i, strides[i]);
+  }
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEStridedSlice>();
+
+  fn->configure(inputData_alloc->handle(), outputData_alloc->handle(), starts_set, ends_set,
+                strides_set, beginMask, endMask, shrinkAxisMask);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::TransposeConvNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto output_shape_index{
+      node.getInputs().at(model::operation::TransposeConvNode::Input::OUTPUT_SHAPE)};
+  const auto ker_index{node.getInputs().at(model::operation::TransposeConvNode::Input::KERNEL)};
+  const auto ifm_index{node.getInputs().at(model::operation::TransposeConvNode::Input::INPUT)};
+
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(_current_subg_layout);
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(_current_subg_layout);
+  const auto ker_shape = _ctx.at(ker_index).shape().asFeature(_current_subg_layout);
+
+  const auto stride = node.param().stride;
+
+  assert((node.param().padding.type == model::PaddingType::SAME) ||
+         (node.param().padding.type == model::PaddingType::VALID));
+  auto padding = neurun::util::calculatePadding(node.param().padding, ofm_shape, ifm_shape, stride,
+                                                ker_shape.W, ker_shape.H);
+
+  uint32_t invalid_horizontal = 0;
+  uint32_t invalid_vertical = 0;
+  if (node.param().padding.type == model::PaddingType::VALID)
+  {
+    invalid_horizontal =
+        ofm_shape.W - (1 + (ifm_shape.W - 1) * stride.horizontal) - (ker_shape.W - 1);
+    invalid_vertical = ofm_shape.H - (1 + (ifm_shape.H - 1) * stride.vertical) - (ker_shape.H - 1);
+  }
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+  auto ker_alloc = _tensor_builder->at(ker_index).get();
+
+  const auto tconv_info = acl_common::asPadStrideInfo(padding, stride);
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NETransposeConvLayer>();
+
+  fn->configure(ifm_alloc->handle(), ker_alloc->handle(), nullptr, ofm_alloc->handle(), tconv_info,
+                invalid_horizontal, invalid_vertical);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::TransposeNode &node)
+{
+  const auto ofm_idx{node.getOutputs().at(0)};
+  const auto ifm_idx{node.getInputs().at(model::operation::TransposeNode::Input::INPUT)};
+  const auto perm{node.param().perm};
+
+  const auto rank = _ctx.at(ifm_idx).shape().rank();
+  std::vector<int32_t> pv;
+  const auto perm_base = _ctx.at(perm).data().base();
+  const int perm_size = _ctx.at(perm).shape().num_elements();
+
+  assert(perm_base != nullptr);
+  for (int32_t n = 0; n < perm_size; ++n)
+  {
+    const int32_t perm_value = *(reinterpret_cast<const int32_t *>(perm_base) + n);
+    assert(perm_value < rank);
+    pv.emplace_back(perm_value);
+  }
+
+  auto ofm_alloc = _tensor_builder->at(ofm_idx).get();
+  const auto ifm_alloc = _tensor_builder->at(ifm_idx).get();
+  const auto frontend_layout = _current_subg_layout;
+  const auto backend_layout = ifm_alloc->layout();
+
+  auto backend_pv = ::neurun::backend::acl_common::getARMComputePermutationVector(
+      rank, pv, frontend_layout, backend_layout);
+
+  std::unique_ptr<::arm_compute::IFunction> fn;
+
+  if (ifm_alloc->num_dimensions() <= 2 && ofm_alloc->num_dimensions() <= 2)
+  {
+    auto l = nnfw::cpp14::make_unique<::arm_compute::NETranspose>();
+
+    l->configure(ifm_alloc->handle(), ofm_alloc->handle());
+
+    fn = std::move(l);
+  }
+  else
+  {
+    auto l = nnfw::cpp14::make_unique<::arm_compute::NEPermute>();
+
+    l->configure(ifm_alloc->handle(), ofm_alloc->handle(), backend_pv);
+
+    fn = std::move(l);
+  }
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::UnpackNode &node)
+{
+  const auto input_index{node.getInputs().at(model::operation::UnpackNode::Input::INPUT)};
+  auto axis{node.param().axis};
+
+  const auto input_rank = _ctx.at(input_index).shape().rank();
+
+  std::vector<model::OperandIndex> output_indexes;
+  for (const auto &output_index : node.getOutputs())
+    output_indexes.emplace_back(output_index);
+
+  auto input = _tensor_builder->at(input_index).get()->handle();
+  std::vector<arm_compute::ITensor *> outputs;
+  for (const auto &output_index : output_indexes)
+    outputs.emplace_back(_tensor_builder->at(output_index)->handle());
+
+  const auto frontend_layout = _current_subg_layout;
+  const auto backend_layout = _tensor_builder->at(input_index).get()->layout();
+  if (axis < 0)
+    axis += input_rank;
+  axis = acl_common::ToARMComputeAxis(input_rank, axis, frontend_layout, backend_layout).value();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEUnstack>();
+
+  fn->configure(input, outputs, axis);
+
+  _execution_builder->append(asAclFunction(std::move(fn)));
+}
+
+void KernelGenerator::visit(const model::operation::AddNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto lhs_index{node.getInputs().at(model::operation::AddNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::AddNode::Input::RHS)};
+
+  const auto activation = node.param().activation;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto lhs_alloc = _tensor_builder->at(lhs_index).get();
+  auto rhs_alloc = _tensor_builder->at(rhs_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEArithmeticAddition>();
+
+  fn->configure(lhs_alloc->handle(), rhs_alloc->handle(), ofm_alloc->handle(),
+                arm_compute::ConvertPolicy::SATURATE);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+
+  ActivationBuilder{*_execution_builder}.append(activation, ofm_alloc->handle());
+}
+
+void KernelGenerator::visit(const model::operation::DivNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto lhs_index{node.getInputs().at(model::operation::DivNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::DivNode::Input::RHS)};
+
+  const auto activation = node.param().activation;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto lhs_alloc = _tensor_builder->at(lhs_index).get();
+  auto rhs_alloc = _tensor_builder->at(rhs_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEElementwiseDivision>();
+
+  fn->configure(lhs_alloc->handle(), rhs_alloc->handle(), ofm_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+
+  ActivationBuilder{*_execution_builder}.append(activation, ofm_alloc->handle());
+}
+
+void KernelGenerator::visit(const model::operation::ExpNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::ExpNode::Input::INPUT)};
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEExpLayer>();
+
+  fn->configure(input_alloc->handle(), output_alloc->handle());
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+void KernelGenerator::visit(const model::operation::ReduceMaxNode &node)
+{
+  (void)node;
+  throw std::runtime_error("Not supported, yet");
+}
+
+void KernelGenerator::visit(const model::operation::ComparisonNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input0_index{node.getInputs().at(model::operation::ComparisonNode::Input::INPUT0)};
+  const auto input1_index{node.getInputs().at(model::operation::ComparisonNode::Input::INPUT1)};
+
+  const auto comparison_type = node.param().comparison_type;
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input0_alloc = _tensor_builder->at(input0_index).get();
+  auto input1_alloc = _tensor_builder->at(input1_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::arm_compute::NEElementwiseComparison>();
+
+  fn->configure(input0_alloc->handle(), input1_alloc->handle(), output_alloc->handle(),
+                (arm_compute::ComparisonOperation)comparison_type);
+
+  auto acl_fn = asAclFunction(std::move(fn));
+
+  _execution_builder->append(std::move(acl_fn));
+}
+
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/acl_neon/KernelGenerator.h b/runtimes/neurun/backend/acl_neon/KernelGenerator.h
new file mode 100644
index 000000000..1d839eade
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/KernelGenerator.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_NEON_KERNEL_GENERATOR_H__
+#define __NEURUN_BACKEND_ACL_NEON_KERNEL_GENERATOR_H__
+
+#include <backend/IKernelGenerator.h>
+
+#include "model/Operands.h"
+#include "TensorBuilder.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+
+class KernelGenerator : public IKernelGenerator
+{
+public:
+  KernelGenerator(const neurun::model::Operands &ctx,
+                  const std::shared_ptr<TensorBuilder> &tensor_builder);
+
+  void visit(const model::Subgraph &) override;
+  void visit(const model::operation::AbsNode &) override;
+  void visit(const model::operation::ArgMaxNode &) override;
+  void visit(const model::operation::Conv2DNode &) override;
+  void visit(const model::operation::DepthwiseConv2DNode &) override;
+  void visit(const model::operation::DequantizeNode &) override;
+  void visit(const model::operation::MaxPool2DNode &) override;
+  void visit(const model::operation::MeanNode &) override;
+  void visit(const model::operation::AvgPool2DNode &) override;
+  void visit(const model::operation::ConcatNode &) override;
+  void visit(const model::operation::FloorNode &) override;
+  void visit(const model::operation::FullyConnectedNode &) override;
+  void visit(const model::operation::L2NormalizationNode &) override;
+  void visit(const model::operation::L2Pool2DNode &) override;
+  void visit(const model::operation::LocalResponseNormalizationNode &) override;
+  void visit(const model::operation::LogicalAndNode &) override;
+  void visit(const model::operation::LogicalNotNode &) override;
+  void visit(const model::operation::LogicalOrNode &) override;
+  void visit(const model::operation::LogisticNode &) override;
+  void visit(const model::operation::LSTMNode &) override;
+  void visit(const model::operation::MulNode &) override;
+  void visit(const model::operation::NegNode &) override;
+  void visit(const model::operation::PadNode &) override;
+  void visit(const model::operation::PReLUNode &) override;
+  void visit(const model::operation::ReduceSumNode &) override;
+  void visit(const model::operation::ReLUNode &) override;
+  void visit(const model::operation::ReLU1Node &) override;
+  void visit(const model::operation::ReLU6Node &) override;
+  void visit(const model::operation::ReshapeNode &) override;
+  void visit(const model::operation::ResizeBilinearNode &) override;
+  void visit(const model::operation::RNNNode &) override;
+  void visit(const model::operation::RSQRTNode &) override;
+  void visit(const model::operation::SqueezeNode &) override;
+  void visit(const model::operation::TanhNode &) override;
+  void visit(const model::operation::SoftmaxNode &) override;
+  void visit(const model::operation::SplitNode &) override;
+  void visit(const model::operation::SQRTNode &) override;
+  void visit(const model::operation::SquaredDifferenceNode &) override;
+  void visit(const model::operation::SubNode &) override;
+  void visit(const model::operation::StridedSliceNode &) override;
+  void visit(const model::operation::TransposeConvNode &) override;
+  void visit(const model::operation::TransposeNode &) override;
+  void visit(const model::operation::UnpackNode &) override;
+  void visit(const model::operation::AddNode &) override;
+  void visit(const model::operation::DivNode &) override;
+  void visit(const model::operation::ExpNode &) override;
+  void visit(const model::operation::ReduceMaxNode &) override;
+  void visit(const model::operation::ComparisonNode &) override;
+
+private:
+  const neurun::model::Operands &_ctx;
+  std::shared_ptr<TensorBuilder> _tensor_builder;
+  model::Layout _current_subg_layout;
+};
+
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_NEON_KERNEL_GENERATOR_H__
diff --git a/runtimes/neurun/backend/acl_neon/PluginClassesAllocator.cc b/runtimes/neurun/backend/acl_neon/PluginClassesAllocator.cc
new file mode 100644
index 000000000..75f2e9797
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/PluginClassesAllocator.cc
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <util/logging.h>
+
+#include "Backend.h"
+
+extern "C" {
+neurun::backend::Backend *neurun_backend_create()
+{
+  VERBOSE(neurun_backend_create) << "'acl_neon' loaded\n";
+  return new neurun::backend::acl_neon::Backend;
+}
+
+void neurun_backend_destroy(neurun::backend::Backend *backend)
+{
+  VERBOSE(neurun_backend_create) << "'acl_neon' unloaded\n";
+  delete backend;
+}
+}
diff --git a/runtimes/neurun/backend/acl_neon/ShapeFixer.cc b/runtimes/neurun/backend/acl_neon/ShapeFixer.cc
new file mode 100644
index 000000000..e7cdbea4c
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/ShapeFixer.cc
@@ -0,0 +1,332 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ShapeFixer.h"
+
+#include <arm_compute/runtime/NEON/functions/NESoftmaxLayer.h>
+#include <arm_compute/runtime/NEON/functions/NEArithmeticAddition.h>
+#include <arm_compute/runtime/NEON/functions/NEArithmeticSubtraction.h>
+#include <arm_compute/runtime/NEON/functions/NEPixelWiseMultiplication.h>
+#include <arm_compute/runtime/NEON/functions/NEPoolingLayer.h>
+#include <arm_compute/runtime/NEON/functions/NEActivationLayer.h>
+#include <arm_compute/runtime/NEON/functions/NEConvolutionLayer.h>
+#include <arm_compute/runtime/NEON/functions/NEDepthwiseConvolutionLayer.h>
+#include <arm_compute/runtime/NEON/functions/NEReshapeLayer.h>
+#include <arm_compute/runtime/NEON/functions/NEFullyConnectedLayer.h>
+#include <arm_compute/runtime/NEON/functions/NEFullyConnectedReshapingLayer.h>
+
+#include <Convert.h>
+#include <Swizzle.h>
+
+#include "kernel/ConcatLayer.h"
+#include "util/Padding.h"
+#include "model/Index.h"
+#include "model/DataType.h"
+#include "model/InternalType.h"
+#include "compiler/IExecutionBuilder.h"
+#include "exec/NopFunction.h"
+#include "util/logging.h"
+#include "util/Utils.h"
+
+using ::neurun::compiler::IExecutionBuilder;
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+
+using ::neurun::backend::acl_common::asAclFunction;
+
+ShapeFixer::ShapeFixer(const neurun::model::Operands &ctx,
+                       const std::shared_ptr<TensorBuilder> &tensor_builder)
+    : _ctx(ctx), _tensor_builder(tensor_builder)
+{
+  assert(tensor_builder);
+}
+
+void ShapeFixer::visit(const model::operation::AbsNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ArgMaxNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::Conv2DNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::DepthwiseConv2DNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::DequantizeNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::MaxPool2DNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::MeanNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::AvgPool2DNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ConcatNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  _tensor_builder->dimCorrection(ofm_index, false);
+  for (const auto &inputs : node.getInputs())
+    _tensor_builder->dimCorrection(inputs, false);
+}
+
+void ShapeFixer::visit(const model::operation::ExpNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::FloorNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::FullyConnectedNode &node)
+{
+  using model::operation::FullyConnectedNode;
+  const auto input_index{node.getInputs().at(FullyConnectedNode::Input::INPUT)};
+  const auto input_rank = _ctx.at(input_index).shape().rank();
+  // TODO Currently we are not handling where the case is that the input's rank is 3.
+  // The handling should be added in the future.
+  assert(input_rank != 3);
+  // Check for reshaping input's shape into rank-2
+  if (input_rank == 4)
+    _tensor_builder->dimCorrection(input_index, false);
+}
+
+void ShapeFixer::visit(const model::operation::L2NormalizationNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::L2Pool2DNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::LocalResponseNormalizationNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::LogicalAndNode &node)
+{
+  const auto input0_index{node.getInputs().at(model::operation::LogicalAndNode::Input::INPUT0)};
+  const auto input1_index{node.getInputs().at(model::operation::LogicalAndNode::Input::INPUT1)};
+
+  if (!(_ctx.at(input0_index).shape() == _ctx.at(input1_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(input0_index).shape().rank(), _ctx.at(input1_index).shape().rank());
+
+    // TODO remove const_cast later. For example, _ctx may need to be a non const variable or
+    //      a node to extend shape may be inserted in front of this operation
+    const_cast<::neurun::model::Shape &>(_ctx.at(input0_index).shape()).extendRank(broadcast_rank);
+    const_cast<::neurun::model::Shape &>(_ctx.at(input1_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+void ShapeFixer::visit(const model::operation::LogicalNotNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::LogicalOrNode &node)
+{
+  const auto input0_index{node.getInputs().at(model::operation::LogicalOrNode::Input::INPUT0)};
+  const auto input1_index{node.getInputs().at(model::operation::LogicalOrNode::Input::INPUT1)};
+
+  if (!(_ctx.at(input0_index).shape() == _ctx.at(input1_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(input0_index).shape().rank(), _ctx.at(input1_index).shape().rank());
+
+    // TODO remove const_cast later. For example, _ctx may need to be a non const variable or
+    //      a node to extend shape may be inserted in front of this operation
+    const_cast<::neurun::model::Shape &>(_ctx.at(input0_index).shape()).extendRank(broadcast_rank);
+    const_cast<::neurun::model::Shape &>(_ctx.at(input1_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+void ShapeFixer::visit(const model::operation::LogisticNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::LSTMNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::PadNode &node)
+{
+  const auto input_index{node.getInputs().at(model::operation::PadNode::Input::INPUT)};
+  const auto output_index{node.getOutputs().at(0)};
+  _tensor_builder->dimCorrection(input_index, false);
+  _tensor_builder->dimCorrection(output_index, false);
+}
+
+void ShapeFixer::visit(const model::operation::MulNode &node)
+{
+  const auto lhs_index{node.getInputs().at(model::operation::MulNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::MulNode::Input::RHS)};
+
+  if (!(_ctx.at(lhs_index).shape() == _ctx.at(rhs_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(lhs_index).shape().rank(), _ctx.at(rhs_index).shape().rank());
+
+    // TODO remove const_cast later. For example, _ctx may need to be a non const variable or
+    //      a node to extend shape may be inserted in front of this operation
+    const_cast<::neurun::model::Shape &>(_ctx.at(lhs_index).shape()).extendRank(broadcast_rank);
+    const_cast<::neurun::model::Shape &>(_ctx.at(rhs_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+void ShapeFixer::visit(const model::operation::NegNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::PReLUNode &node)
+{
+  const auto ifm_index{node.getInputs().at(model::operation::PReLUNode::Input::INPUT)};
+  const auto alpha_index{node.getInputs().at(model::operation::PReLUNode::Input::ALPHA)};
+
+  if (!(_ctx.at(ifm_index).shape() == _ctx.at(alpha_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(ifm_index).shape().rank(), _ctx.at(alpha_index).shape().rank());
+    const_cast<::neurun::model::Shape &>(_ctx.at(ifm_index).shape()).extendRank(broadcast_rank);
+    const_cast<::neurun::model::Shape &>(_ctx.at(alpha_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+void ShapeFixer::visit(const model::operation::ReduceSumNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ReLUNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ReLU1Node &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ReLU6Node &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ReshapeNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::ReshapeNode::Input::INPUT)};
+
+  _tensor_builder->dimCorrection(input_index, false);
+  _tensor_builder->dimCorrection(output_index, false);
+}
+
+void ShapeFixer::visit(const model::operation::ResizeBilinearNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::RNNNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ComparisonNode &node)
+{
+  const auto input0_index{node.getInputs().at(model::operation::ComparisonNode::Input::INPUT0)};
+  const auto input1_index{node.getInputs().at(model::operation::ComparisonNode::Input::INPUT1)};
+
+  if (!(_ctx.at(input0_index).shape() == _ctx.at(input1_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(input0_index).shape().rank(), _ctx.at(input1_index).shape().rank());
+
+    // TODO remove const_cast later. For example, _ctx may need to be a non const variable or
+    //      a node to extend shape may be inserted in front of this operation
+    const_cast<::neurun::model::Shape &>(_ctx.at(input0_index).shape()).extendRank(broadcast_rank);
+    const_cast<::neurun::model::Shape &>(_ctx.at(input1_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+void ShapeFixer::visit(const model::operation::RSQRTNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::SqueezeNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::SqueezeNode::Input::INPUT)};
+  _tensor_builder->dimCorrection(input_index, false);
+  _tensor_builder->dimCorrection(output_index, false);
+}
+
+void ShapeFixer::visit(const model::operation::TanhNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::StridedSliceNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::SoftmaxNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::SplitNode &node)
+{
+  const auto input_index{node.getInputs().at(model::operation::SplitNode::Input::INPUT)};
+  _tensor_builder->dimCorrection(input_index, false);
+  for (const auto &output : node.getOutputs())
+    _tensor_builder->dimCorrection(output, false);
+}
+
+void ShapeFixer::visit(const model::operation::SQRTNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::SquaredDifferenceNode &node)
+{
+  const auto lhs_index{node.getInputs().at(model::operation::SquaredDifferenceNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::SquaredDifferenceNode::Input::RHS)};
+
+  if (!(_ctx.at(lhs_index).shape() == _ctx.at(rhs_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(lhs_index).shape().rank(), _ctx.at(rhs_index).shape().rank());
+
+    // TODO remove const_cast later. For example, _ctx may need to be a non const variable or
+    //      a node to extend shape may be inserted in front of this operation
+    const_cast<::neurun::model::Shape &>(_ctx.at(lhs_index).shape()).extendRank(broadcast_rank);
+    const_cast<::neurun::model::Shape &>(_ctx.at(rhs_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+void ShapeFixer::visit(const model::operation::SubNode &node)
+{
+  const auto lhs_index{node.getInputs().at(model::operation::SubNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::SubNode::Input::RHS)};
+
+  if (!(_ctx.at(lhs_index).shape() == _ctx.at(rhs_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(lhs_index).shape().rank(), _ctx.at(rhs_index).shape().rank());
+    // TODO remove const_cast later. For example, _ctx may need to be a non const variable or
+    //      a node to extend shape may be inserted in front of this operation
+    const_cast<::neurun::model::Shape &>(_ctx.at(lhs_index).shape()).extendRank(broadcast_rank);
+    const_cast<::neurun::model::Shape &>(_ctx.at(rhs_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+void ShapeFixer::visit(const model::operation::TransposeConvNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::TransposeNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::UnpackNode &node)
+{
+  const auto input_index{node.getInputs().at(model::operation::UnpackNode::Input::INPUT)};
+  _tensor_builder->dimCorrection(input_index, false);
+  for (const auto &output_index : node.getOutputs())
+    _tensor_builder->dimCorrection(output_index, false);
+}
+
+void ShapeFixer::visit(const model::operation::AddNode &node)
+{
+  const auto lhs_index{node.getInputs().at(model::operation::AddNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::AddNode::Input::RHS)};
+
+  if (!(_ctx.at(lhs_index).shape() == _ctx.at(rhs_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(lhs_index).shape().rank(), _ctx.at(rhs_index).shape().rank());
+    const_cast<::neurun::model::Shape &>(_ctx.at(lhs_index).shape()).extendRank(broadcast_rank);
+    const_cast<::neurun::model::Shape &>(_ctx.at(rhs_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+void ShapeFixer::visit(const model::operation::DivNode &node)
+{
+  const auto lhs_index{node.getInputs().at(model::operation::DivNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::DivNode::Input::RHS)};
+
+  if (!(_ctx.at(lhs_index).shape() == _ctx.at(rhs_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(lhs_index).shape().rank(), _ctx.at(rhs_index).shape().rank());
+
+    // TODO remove const_cast later. For example, _ctx may need to be a non const variable or
+    //      a node to extend shape may be inserted in front of this operation
+    const_cast<::neurun::model::Shape &>(_ctx.at(lhs_index).shape()).extendRank(broadcast_rank);
+    const_cast<::neurun::model::Shape &>(_ctx.at(rhs_index).shape()).extendRank(broadcast_rank);
+  }
+}
+
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/acl_neon/ShapeFixer.h b/runtimes/neurun/backend/acl_neon/ShapeFixer.h
new file mode 100644
index 000000000..394f9d932
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/ShapeFixer.h
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_NEON_SHAPE_FIXER_H__
+#define __NEURUN_BACKEND_ACL_NEON_SHAPE_FIXER_H__
+
+#include <backend/IShapeFixer.h>
+
+#include "model/Operands.h"
+#include "TensorBuilder.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+
+class ShapeFixer : public IShapeFixer
+{
+public:
+  ShapeFixer(const neurun::model::Operands &ctx,
+             const std::shared_ptr<TensorBuilder> &tensor_builder);
+
+  std::shared_ptr<ITensorBuilder> tensor_builder() override { return _tensor_builder; }
+
+  void visit(const model::operation::AbsNode &) override;
+  void visit(const model::operation::ArgMaxNode &) override;
+  void visit(const model::operation::Conv2DNode &) override;
+  void visit(const model::operation::DepthwiseConv2DNode &) override;
+  void visit(const model::operation::DequantizeNode &) override;
+  void visit(const model::operation::MaxPool2DNode &) override;
+  void visit(const model::operation::MeanNode &) override;
+  void visit(const model::operation::AvgPool2DNode &) override;
+  void visit(const model::operation::ConcatNode &) override;
+  void visit(const model::operation::ExpNode &) override;
+  void visit(const model::operation::FloorNode &) override;
+  void visit(const model::operation::FullyConnectedNode &) override;
+  void visit(const model::operation::L2NormalizationNode &) override;
+  void visit(const model::operation::L2Pool2DNode &) override;
+  void visit(const model::operation::LocalResponseNormalizationNode &) override;
+  void visit(const model::operation::LogicalAndNode &) override;
+  void visit(const model::operation::LogicalNotNode &) override;
+  void visit(const model::operation::LogicalOrNode &) override;
+  void visit(const model::operation::LogisticNode &) override;
+  void visit(const model::operation::LSTMNode &) override;
+  void visit(const model::operation::MulNode &) override;
+  void visit(const model::operation::NegNode &) override;
+  void visit(const model::operation::PadNode &) override;
+  void visit(const model::operation::PReLUNode &) override;
+  void visit(const model::operation::ReduceSumNode &) override;
+  void visit(const model::operation::ReLUNode &) override;
+  void visit(const model::operation::ReLU1Node &) override;
+  void visit(const model::operation::ReLU6Node &) override;
+  void visit(const model::operation::ReshapeNode &) override;
+  void visit(const model::operation::ResizeBilinearNode &) override;
+  void visit(const model::operation::RNNNode &) override;
+  void visit(const model::operation::RSQRTNode &) override;
+  void visit(const model::operation::SqueezeNode &) override;
+  void visit(const model::operation::TanhNode &) override;
+  void visit(const model::operation::SoftmaxNode &) override;
+  void visit(const model::operation::SplitNode &) override;
+  void visit(const model::operation::SQRTNode &) override;
+  void visit(const model::operation::SquaredDifferenceNode &) override;
+  void visit(const model::operation::SubNode &) override;
+  void visit(const model::operation::StridedSliceNode &) override;
+  void visit(const model::operation::TransposeConvNode &) override;
+  void visit(const model::operation::TransposeNode &) override;
+  void visit(const model::operation::UnpackNode &) override;
+  void visit(const model::operation::AddNode &) override;
+  void visit(const model::operation::DivNode &) override;
+  void visit(const model::operation::ComparisonNode &) override;
+
+private:
+  const neurun::model::Operands &_ctx;
+  std::shared_ptr<TensorBuilder> _tensor_builder;
+};
+
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_NEON_SHAPE_FIXER_H__
diff --git a/runtimes/neurun/backend/acl_neon/TensorBuilder.h b/runtimes/neurun/backend/acl_neon/TensorBuilder.h
new file mode 100644
index 000000000..3da30dfe9
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/TensorBuilder.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_NEON_TENSOR_BUILDER_H__
+#define __NEURUN_BACKEND_ACL_NEON_TENSOR_BUILDER_H__
+
+#include <TemplTensorBuilder.h>
+
+#include <backend/operand/Object.h>
+
+#include "operand/NETensor.h"
+#include "operand/NESubTensor.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+
+using TensorBuilder = ::neurun::backend::acl_common::TemplTensorBuilder<
+    ::neurun::backend::acl_neon::operand::INETensor, operand::NETensor, operand::NESubTensor,
+    ::neurun::backend::operand::Object>;
+
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_NEON_TENSOR_BUILDER_H__
diff --git a/runtimes/neurun/backend/acl_neon/TensorManager.h b/runtimes/neurun/backend/acl_neon/TensorManager.h
new file mode 100644
index 000000000..3d5c40b5b
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/TensorManager.h
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_NEON_TENSOR_MANAGER_H__
+#define __NEURUN_BACKEND_ACL_NEON_TENSOR_MANAGER_H__
+
+#include <arm_compute/runtime/Allocator.h>
+#include <arm_compute/runtime/PoolManager.h>
+#include <arm_compute/runtime/OffsetLifetimeManager.h>
+#include <arm_compute/runtime/MemoryManagerOnDemand.h>
+#include <arm_compute/runtime/MemoryGroup.h>
+
+#include <AclMemoryManager.h>
+#include <AclLinearMemoryManager.h>
+#include <AclInternalBufferManager.h>
+#include <AclTensorManager.h>
+
+#include "operand/NETensor.h"
+#include "operand/NESubTensor.h"
+#include <backend/operand/Object.h>
+
+#include "util/logging.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+
+using MemoryManager =
+    ::neurun::backend::acl_common::AclMemoryManager<operand::INETensor, operand::NETensor,
+                                                    operand::NESubTensor,
+                                                    ::neurun::backend::operand::Object>;
+
+using LinearMemoryManager = ::neurun::backend::acl_common::AclLinearMemoryManager<
+    operand::INETensor, operand::NETensor, operand::NESubTensor, ::neurun::backend::operand::Object,
+    ::arm_compute::MemoryManagerOnDemand, ::arm_compute::PoolManager,
+    ::arm_compute::OffsetLifetimeManager, ::arm_compute::Allocator, ::arm_compute::MemoryGroup>;
+
+using InternalBufferManager = ::neurun::backend::acl_common::AclInternalBufferManager<
+    ::arm_compute::MemoryManagerOnDemand, ::arm_compute::PoolManager,
+    ::arm_compute::OffsetLifetimeManager, ::arm_compute::Allocator>;
+
+using TensorManager =
+    ::neurun::backend::acl_common::AclTensorManager<::neurun::backend::acl_neon::operand::INETensor,
+                                                    operand::NETensor, operand::NESubTensor,
+                                                    ::neurun::backend::operand::Object>;
+
+TensorManager *createTensorManager()
+{
+  const std::string executor_str = util::getConfigString(util::config::EXECUTOR);
+  if (executor_str == "Linear")
+  {
+    VERBOSE(acl_neon_createTensorManager) << "AclTensorManager as Linear" << std::endl;
+    return new TensorManager(new MemoryManager(), new LinearMemoryManager(),
+                             new InternalBufferManager());
+  }
+  else
+  {
+    VERBOSE(acl_neon_createTensorManager) << "AclTensorManager" << std::endl;
+    return new TensorManager(new MemoryManager(), new MemoryManager(), new InternalBufferManager());
+  }
+}
+
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_NEON_TENSOR_MANAGER_H__
diff --git a/runtimes/neurun/backend/acl_neon/kernel/ConcatLayer.cc b/runtimes/neurun/backend/acl_neon/kernel/ConcatLayer.cc
new file mode 100644
index 000000000..f2d88fa91
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/kernel/ConcatLayer.cc
@@ -0,0 +1,151 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ConcatLayer.h"
+
+#include "util/logging.h"
+
+namespace
+{
+
+inline bool matchSizeExceptAxis(const ::neurun::backend::acl_neon::operand::INETensor *t1,
+                                const ::neurun::backend::acl_neon::operand::INETensor *t2,
+                                uint32_t axis)
+{
+  assert(t1->num_dimensions() <= 4);
+  assert(t2->num_dimensions() <= 4);
+
+  for (uint32_t i = 0; i < 4; i++)
+  {
+    if (axis == i)
+      continue;
+    if (t1->info()->dimension(i) != t2->info()->dimension(i))
+      return false;
+  }
+  return true;
+}
+
+} // namespace {anonymous}
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+namespace kernel
+{
+
+ConcatLayer::ConcatLayer()
+    : _input_allocs(), _output_alloc(nullptr), _axis(0), _input_type(arm_compute::DataType::F32)
+{
+  // DO NOTHING
+}
+
+template <typename T> bool ConcatLayer::concatenate()
+{
+  // Input and output size check
+  {
+    // NOTE Support only tensor with dimension 4 or less
+
+    uint32_t axis_sum = 0;
+
+    for (auto input : _input_allocs)
+    {
+      assert(_output_alloc->layout() == input->layout());
+      assert(matchSizeExceptAxis(_output_alloc, input, _axis));
+      axis_sum += input->info()->dimension(_axis);
+    }
+
+    assert(_output_alloc->info()->dimension(_axis) == axis_sum);
+  }
+
+  VERBOSE(Concat_RUN) << "START Concat" << std::endl;
+
+  // Perform operation
+  {
+    uint32_t axis_offset = 0;
+
+    for (auto input : _input_allocs)
+    {
+      for (uint32_t i = 0; i < input->info()->dimension(0); i++)
+      {
+        for (uint32_t j = 0; j < input->info()->dimension(1); j++)
+        {
+          for (uint32_t k = 0; k < input->info()->dimension(2); k++)
+          {
+            for (uint32_t l = 0; l < input->info()->dimension(3); l++)
+            {
+              uint32_t io = (_axis == 0) ? axis_offset : 0;
+              uint32_t jo = (_axis == 1) ? axis_offset : 0;
+              uint32_t ko = (_axis == 2) ? axis_offset : 0;
+              uint32_t lo = (_axis == 3) ? axis_offset : 0;
+              T value = *reinterpret_cast<T *>(input->handle()->ptr_to_element({i, j, k, l}));
+              *reinterpret_cast<T *>(_output_alloc->handle()->ptr_to_element(
+                  {i + io, j + jo, k + ko, l + lo})) = value;
+            }
+          }
+        }
+      }
+      if (_axis == 0)
+        axis_offset += input->info()->dimension(0);
+      if (_axis == 1)
+        axis_offset += input->info()->dimension(1);
+      if (_axis == 2)
+        axis_offset += input->info()->dimension(2);
+      if (_axis == 3)
+        axis_offset += input->info()->dimension(3);
+    }
+  }
+
+  VERBOSE(Concat_RUN) << "End   Concat" << std::endl;
+
+  return true;
+}
+
+void ConcatLayer::configure(
+    const std::vector<::neurun::backend::acl_neon::operand::INETensor *> &input_allocs,
+    int32_t axis, ::neurun::backend::acl_neon::operand::INETensor *output_alloc)
+{
+  _input_allocs = input_allocs;
+  _output_alloc = output_alloc;
+
+  assert(axis < 4);
+
+  // TODO Handle when axis is negative
+  assert(axis >= 0);
+
+  _axis = axis;
+
+  _input_type = input_allocs[0]->data_type();
+}
+
+void ConcatLayer::run()
+{
+  if (_input_type == arm_compute::DataType::F32)
+  {
+    concatenate<float>();
+  }
+  else if (_input_type == arm_compute::DataType::QASYMM8)
+  {
+    concatenate<uint8_t>();
+  }
+}
+
+} // namespace kernel
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/acl_neon/kernel/ConcatLayer.h b/runtimes/neurun/backend/acl_neon/kernel/ConcatLayer.h
new file mode 100644
index 000000000..ee57ceb10
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/kernel/ConcatLayer.h
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_NEON_KERNEL_CONCAT_LAYER_H__
+#define __NEURUN_BACKEND_ACL_NEON_KERNEL_CONCAT_LAYER_H__
+
+#include <arm_compute/runtime/IFunction.h>
+#include <arm_compute/core/Types.h>
+
+#include "operand/INETensor.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+namespace kernel
+{
+
+//
+// neurun::backend::acl_neon::kernel::ConcatLayer
+// A naive implementation of ConcatLayer for ACL NEON
+//
+
+class ConcatLayer : public ::arm_compute::IFunction
+{
+public:
+  ConcatLayer();
+
+public:
+  void configure(const std::vector<::neurun::backend::acl_neon::operand::INETensor *> &input_allocs,
+                 int32_t axis /* NNAPI tensor axis from NHWC order */,
+                 ::neurun::backend::acl_neon::operand::INETensor *output_alloc);
+
+  void run();
+
+private:
+  template <typename T> bool concatenate();
+
+private:
+  std::vector<::neurun::backend::acl_neon::operand::INETensor *> _input_allocs;
+  ::neurun::backend::acl_neon::operand::INETensor *_output_alloc;
+  int32_t _axis;
+  arm_compute::DataType _input_type;
+};
+
+} // namespace kernel
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_NEON_KERNEL_CONCAT_LAYER_H__
diff --git a/runtimes/neurun/backend/acl_neon/operand/INETensor.h b/runtimes/neurun/backend/acl_neon/operand/INETensor.h
new file mode 100644
index 000000000..256806a61
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/operand/INETensor.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_NEON_OPERAND_I_NE_TENSOR_H__
+#define __NEURUN_BACKEND_ACL_NEON_OPERAND_I_NE_TENSOR_H__
+
+#include <arm_compute/core/ITensor.h>
+
+#include <IACLTensor.h>
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+namespace operand
+{
+
+class INETensor : public acl_common::IACLTensor
+{
+public:
+  const arm_compute::ITensor *handle() const override = 0;
+  arm_compute::ITensor *handle() override = 0;
+};
+
+} // namespace operand
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_NEON_OPERAND_I_NE_TENSOR_H__
diff --git a/runtimes/neurun/backend/acl_neon/operand/NESubTensor.cc b/runtimes/neurun/backend/acl_neon/operand/NESubTensor.cc
new file mode 100644
index 000000000..a36af609c
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/operand/NESubTensor.cc
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "NESubTensor.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+namespace operand
+{
+
+NESubTensor::NESubTensor(INETensor *parent, const arm_compute::TensorShape &tensor_shape,
+                         const arm_compute::Coordinates &coords, size_t rank, bool extend_parent)
+    : _ne_sub_tensor(std::make_shared<arm_compute::SubTensor>(parent->handle(), tensor_shape,
+                                                              coords, extend_parent)),
+      _rank{rank}
+{
+  // DO NOTHING
+}
+
+const arm_compute::SubTensor *NESubTensor::handle() const { return _ne_sub_tensor.get(); }
+
+arm_compute::SubTensor *NESubTensor::handle() { return _ne_sub_tensor.get(); }
+
+} // namespace operand
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/acl_neon/operand/NESubTensor.h b/runtimes/neurun/backend/acl_neon/operand/NESubTensor.h
new file mode 100644
index 000000000..010e4deda
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/operand/NESubTensor.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_NEON_OPERAND_NE_SUB_TENSOR_H__
+#define __NEURUN_BACKEND_ACL_NEON_OPERAND_NE_SUB_TENSOR_H__
+
+#include <arm_compute/runtime/SubTensor.h>
+#include "INETensor.h"
+#include "compiler/SubTensorInfo.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+namespace operand
+{
+
+class NESubTensor : public INETensor
+{
+public:
+  NESubTensor() = delete;
+
+public:
+  NESubTensor(INETensor *parent, const arm_compute::TensorShape &tensor_shape,
+              const arm_compute::Coordinates &coords, size_t rank, bool extend_parent = false);
+
+public:
+  size_t num_dimensions() const final { return _rank; }
+
+public:
+  const arm_compute::SubTensor *handle() const override;
+  arm_compute::SubTensor *handle() override;
+
+public:
+  // This method is used to prevent the use of memcpy for SubTensor
+  bool has_padding() const override { return true; }
+
+private:
+  std::shared_ptr<arm_compute::SubTensor> _ne_sub_tensor;
+  size_t _rank;
+};
+
+} // namespace operand
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_NEON_OPERAND_NE_SUB_TENSOR_H__
diff --git a/runtimes/neurun/backend/acl_neon/operand/NETensor.cc b/runtimes/neurun/backend/acl_neon/operand/NETensor.cc
new file mode 100644
index 000000000..756403ef1
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/operand/NETensor.cc
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <arm_compute/runtime/Memory.h>
+#include <arm_compute/runtime/MemoryRegion.h>
+#include "NETensor.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+namespace operand
+{
+
+NETensor::NETensor(const arm_compute::TensorInfo &info, size_t rank)
+    : _ne_tensor(std::make_shared<arm_compute::Tensor>()), _rank{rank}
+{
+  allocator()->init(info);
+}
+
+const arm_compute::Tensor *NETensor::handle() const { return _ne_tensor.get(); }
+
+arm_compute::Tensor *NETensor::handle() { return _ne_tensor.get(); }
+
+arm_compute::TensorAllocator *NETensor::allocator() { return _ne_tensor->allocator(); }
+
+} // namespace operand
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/acl_neon/operand/NETensor.h b/runtimes/neurun/backend/acl_neon/operand/NETensor.h
new file mode 100644
index 000000000..298a82054
--- /dev/null
+++ b/runtimes/neurun/backend/acl_neon/operand/NETensor.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ACL_NEON_OPERAND_NE_TENSOR_H__
+#define __NEURUN_BACKEND_ACL_NEON_OPERAND_NE_TENSOR_H__
+
+#include <arm_compute/core/TensorInfo.h>
+#include <arm_compute/runtime/Tensor.h>
+#include "arm_compute/runtime/TensorAllocator.h"
+#include "INETensor.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace acl_neon
+{
+namespace operand
+{
+
+class NETensor : public INETensor
+{
+public:
+  NETensor() = delete;
+
+public:
+  NETensor(const arm_compute::TensorInfo &info, size_t rank);
+
+public:
+  size_t num_dimensions() const final { return _rank; }
+
+public:
+  const arm_compute::Tensor *handle() const override;
+  arm_compute::Tensor *handle() override;
+
+public:
+  arm_compute::TensorAllocator *allocator();
+
+private:
+  std::shared_ptr<arm_compute::Tensor> _ne_tensor;
+  size_t _rank;
+};
+
+} // namespace operand
+} // namespace acl_neon
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ACL_NEON_OPERAND_NE_TENSOR_H__
diff --git a/runtimes/neurun/backend/cpu/Backend.h b/runtimes/neurun/backend/cpu/Backend.h
new file mode 100644
index 000000000..94624ee6d
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/Backend.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_BACKEND_H__
+#define __NEURUN_BACKEND_CPU_BACKEND_H__
+
+#include <memory>
+#include <backend/Backend.h>
+#include <model/Operands.h>
+
+#include "Config.h"
+#include "ConstantInitializer.h"
+#include "KernelGenerator.h"
+#include "ShapeFixer.h"
+#include "backend/CustomKernelRegistry.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+class Backend : public ::neurun::backend::Backend
+{
+public:
+  Backend() : _config{std::make_shared<Config>()} {}
+
+  std::shared_ptr<IConfig> config() const override { return _config; }
+
+  std::unique_ptr<BackendContext>
+  newContext(const model::Operands &operands,
+             const std::shared_ptr<custom::KernelRegistry> &registry) const override
+  {
+    auto tensor_builder = std::make_shared<TensorBuilder>();
+    return std::unique_ptr<BackendContext>{new BackendContext{
+        this, tensor_builder, std::make_shared<ConstantInitializer>(operands, tensor_builder),
+        std::make_shared<KernelGenerator>(operands, tensor_builder, registry),
+        std::make_shared<ShapeFixer>(operands, tensor_builder)}};
+  }
+
+private:
+  std::shared_ptr<IConfig> _config;
+};
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_BACKEND_H__
diff --git a/runtimes/neurun/backend/cpu/CMakeLists.txt b/runtimes/neurun/backend/cpu/CMakeLists.txt
new file mode 100644
index 000000000..c7b9b4d6b
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/CMakeLists.txt
@@ -0,0 +1,29 @@
+set(LIB_NEURUN_BACKEND_CPU neurun_backend_cpu)
+
+file(GLOB_RECURSE SOURCES "*.cc")
+file(GLOB_RECURSE TESTS "*.test.cc")
+list(REMOVE_ITEM SOURCES ${TESTS})
+
+add_library(${LIB_NEURUN_BACKEND_CPU} SHARED ${SOURCES})
+
+target_link_libraries(${LIB_NEURUN_BACKEND_CPU} PUBLIC nnfw_lib_cpp14)
+target_link_libraries(${LIB_NEURUN_BACKEND_CPU} PRIVATE nnfw_lib_misc nnfw_lib_cker)
+target_link_libraries(${LIB_NEURUN_BACKEND_CPU} PRIVATE neurun_core)
+target_link_libraries(${LIB_NEURUN_BACKEND_CPU} PRIVATE nnfw_common)
+target_link_libraries(${LIB_NEURUN_BACKEND_CPU} PRIVATE nnfw_coverage)
+
+set_target_properties(${LIB_NEURUN_BACKEND_CPU} PROPERTIES OUTPUT_NAME backend_cpu)
+
+install(TARGETS ${LIB_NEURUN_BACKEND_CPU} DESTINATION lib)
+
+# Unit Tests
+set(TEST_NEURUN_BACKEND_CPU test_neurun_backend_cpu)
+
+add_executable(${TEST_NEURUN_BACKEND_CPU} ${TESTS})
+
+target_link_libraries(${TEST_NEURUN_BACKEND_CPU} ${LIB_NEURUN_BACKEND_CPU})
+target_link_libraries(${TEST_NEURUN_BACKEND_CPU} gtest gtest_main ${LIB_PTHREAD})
+target_include_directories(${TEST_NEURUN_BACKEND_CPU} PRIVATE ${NEURUN_INCLUDE_DIR})
+
+add_test(${TEST_NEURUN_BACKEND_CPU} ${TEST_NEURUN_BACKEND_CPU})
+install(TARGETS ${TEST_NEURUN_BACKEND_CPU} DESTINATION unittest)
diff --git a/runtimes/neurun/backend/cpu/Config.cc b/runtimes/neurun/backend/cpu/Config.cc
new file mode 100644
index 000000000..1a487f724
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/Config.cc
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "Config.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+void Config::initialize()
+{
+  // DO NOTHING
+}
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/Config.h b/runtimes/neurun/backend/cpu/Config.h
new file mode 100644
index 000000000..ac55d987e
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/Config.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_CONFIG_H__
+#define __NEURUN_BACKEND_CPU_CONFIG_H__
+
+#include <backend/IConfig.h>
+#include <cpp14/memory.h>
+#include <util/ITimer.h>
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+class Config : public IConfig
+{
+public:
+  std::string id() override { return "cpu"; }
+  void initialize() override;
+  bool SupportSubTensorAlloc() override
+  {
+    // NOTE CPU allocator cannot support subtensor allocation yet
+    return false;
+  }
+
+  std::unique_ptr<util::ITimer> timer() override
+  {
+    return nnfw::cpp14::make_unique<util::CPUTimer>();
+  }
+};
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_CONFIG_H__
diff --git a/runtimes/neurun/backend/cpu/ConstantInitializer.cc b/runtimes/neurun/backend/cpu/ConstantInitializer.cc
new file mode 100644
index 000000000..cff9fcfa2
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/ConstantInitializer.cc
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ConstantInitializer.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+ConstantInitializer::ConstantInitializer(const model::Operands &operands,
+                                         const std::shared_ptr<TensorBuilder> &tensor_builder)
+    : _operands{operands}, _tensor_builder{tensor_builder}
+{
+  // DO NOTHING
+}
+
+void ConstantInitializer::run()
+{
+  for (const auto &it : _init_map)
+  {
+    const auto &ind = it.first;
+    const auto &fn = it.second;
+
+    const auto &model_obj = _operands.at(ind);
+    auto tensor_obj = _tensor_builder->wrapTensor(ind);
+    fn(model_obj, *tensor_obj);
+  }
+
+  _init_map.clear();
+}
+
+void ConstantInitializer::visit(const model::operation::Conv2DNode &node)
+{
+  const auto &kernel_index = node.getInputs().at(model::operation::Conv2DNode::KERNEL);
+  const auto &kernel_obj = _operands.at(kernel_index);
+  registerCopyInitializer(kernel_index, kernel_obj);
+
+  const auto &bias_index = node.getInputs().at(model::operation::Conv2DNode::BIAS);
+  const auto &bias_obj = _operands.at(bias_index);
+  registerCopyInitializer(bias_index, bias_obj);
+}
+
+void ConstantInitializer::visit(const model::operation::DepthwiseConv2DNode &node)
+{
+  const auto &kernel_index = node.getInputs().at(model::operation::DepthwiseConv2DNode::KERNEL);
+  const auto &kernel_obj = _operands.at(kernel_index);
+  registerCopyInitializer(kernel_index, kernel_obj);
+
+  const auto &bias_index = node.getInputs().at(model::operation::DepthwiseConv2DNode::BIAS);
+  const auto &bias_obj = _operands.at(bias_index);
+  registerCopyInitializer(bias_index, bias_obj);
+}
+
+void ConstantInitializer::visit(const model::operation::FullyConnectedNode &node)
+{
+  const auto &weight_index = node.getInputs().at(model::operation::FullyConnectedNode::WEIGHT);
+  const auto &weight_obj = _operands.at(weight_index);
+  registerCopyInitializer(weight_index, weight_obj);
+
+  const auto &bias_index = node.getInputs().at(model::operation::FullyConnectedNode::BIAS);
+  const auto &bias_obj = _operands.at(bias_index);
+  registerCopyInitializer(bias_index, bias_obj);
+}
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/ConstantInitializer.h b/runtimes/neurun/backend/cpu/ConstantInitializer.h
new file mode 100644
index 000000000..91f1d50b9
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/ConstantInitializer.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_COMPILER_CPU_CONSTANT_INITIALIZER_H__
+#define __NEURUN_COMPILER_CPU_CONSTANT_INITIALIZER_H__
+
+#include <backend/IConstantInitializer.h>
+#include <model/Operands.h>
+#include "TensorBuilder.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+class ConstantInitializer : public IConstantInitializer
+{
+public:
+  ConstantInitializer(const model::Operands &operands,
+                      const std::shared_ptr<TensorBuilder> &tensor_builder);
+
+public:
+  void run() override;
+
+public:
+  void visit(const model::operation::Conv2DNode &) override;
+  void visit(const model::operation::DepthwiseConv2DNode &) override;
+  void visit(const model::operation::FullyConnectedNode &) override;
+
+private:
+  const model::Operands &_operands;
+  std::shared_ptr<TensorBuilder> _tensor_builder;
+};
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_COMPILER_CPU_CONSTANT_INITIALIZER_H__
diff --git a/runtimes/neurun/backend/cpu/KernelGenerator.cc b/runtimes/neurun/backend/cpu/KernelGenerator.cc
new file mode 100644
index 000000000..61de75493
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/KernelGenerator.cc
@@ -0,0 +1,455 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "KernelGenerator.h"
+
+#include <stdexcept>
+
+#include "cpp14/memory.h"
+#include "util/Padding.h"
+#include "kernel/OperationUtils.h"
+#include "kernel/ConvolutionLayer.h"
+#include "kernel/AvgPoolLayer.h"
+#include "kernel/MaxPoolLayer.h"
+#include "kernel/ConcatLayer.h"
+#include "kernel/FullyConnectedLayer.h"
+#include "kernel/ReshapeLayer.h"
+#include "kernel/SoftMaxLayer.h"
+#include "kernel/PermuteLayer.h"
+#include "kernel/DepthwiseConvolutionLayer.h"
+#include "kernel/AddLayer.h"
+
+#include <backend/Backend.h>
+#include <backend/IConfig.h>
+
+#include "util/logging.h"
+
+#include "util/Utils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+KernelGenerator::KernelGenerator(const neurun::model::Operands &operand_ctx,
+                                 const std::shared_ptr<TensorBuilder> &tensor_builder,
+                                 const std::shared_ptr<custom::KernelRegistry> &kernel_registry)
+    : _ctx(operand_ctx), _tensor_builder(tensor_builder), _kernel_registry(kernel_registry),
+      _current_subg_layout(model::Layout::UNKNOWN)
+{
+  // DO NOTHING
+}
+
+void KernelGenerator::visit(const model::Subgraph &subgraph)
+{
+  _current_subg_layout = subgraph.getLayout();
+  for (const auto &e : subgraph.operations())
+  {
+    const auto &node = *(e.node);
+    _tensor_builder->preVisit(node);
+    node.accept(*this);
+    _tensor_builder->postVisit(node);
+  }
+}
+
+void KernelGenerator::visit(const model::operation::Conv2DNode &node)
+{
+  using model::operation::Conv2DNode;
+
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(Conv2DNode::Input::INPUT)};
+  const auto ker_index{node.getInputs().at(Conv2DNode::Input::KERNEL)};
+  const auto bias_index{node.getInputs().at(Conv2DNode::Input::BIAS)};
+
+  const auto stride = node.param().stride;
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(_current_subg_layout);
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(_current_subg_layout);
+  // Kernel format is [depth_out, kernel_height, kernel_width, depth_in].
+  const auto &ker_shape = _ctx.at(ker_index).shape();
+  const auto ker_height = ker_shape.dim(1);
+  const auto ker_width = ker_shape.dim(2);
+  const auto padding = neurun::util::calculatePadding(node.param().padding, ifm_shape, ofm_shape,
+                                                      stride, ker_width, ker_height);
+  const auto activation = node.param().activation;
+
+  const auto ofm_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(ofm_index), _current_subg_layout);
+  const auto ifm_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(ifm_index), _current_subg_layout);
+  const auto ker_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(ker_index), model::Layout::UNKNOWN);
+  const auto bias_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(bias_index), model::Layout::UNKNOWN);
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index);
+  auto ifm_alloc = _tensor_builder->at(ifm_index);
+  auto ker_alloc = _tensor_builder->at(ker_index);
+  auto bias_alloc = _tensor_builder->at(bias_index);
+
+  auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::ConvolutionLayer>();
+
+  fn->configure(ifm_alloc->buffer(), ifm_backend_shape, ker_alloc->buffer(), ker_backend_shape,
+                bias_alloc->buffer(), bias_backend_shape, padding.left, padding.right, padding.top,
+                padding.bottom, stride.horizontal, stride.vertical, activation, ofm_alloc->buffer(),
+                ofm_backend_shape);
+
+  _execution_builder->append(std::move(fn));
+}
+
+void KernelGenerator::visit(const model::operation::DepthwiseConv2DNode &node)
+{
+  using model::operation::DepthwiseConv2DNode;
+
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(DepthwiseConv2DNode::Input::INPUT)};
+  const auto ker_index{node.getInputs().at(DepthwiseConv2DNode::Input::KERNEL)};
+  const auto bias_index{node.getInputs().at(DepthwiseConv2DNode::Input::BIAS)};
+
+  const auto stride = node.param().stride;
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(_current_subg_layout);
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(_current_subg_layout);
+  // Kernel format is [1, kernel_height, kernel_width, depth_out].
+  const auto &ker_shape = _ctx.at(ker_index).shape();
+  const auto ker_height = ker_shape.dim(1);
+  const auto ker_width = ker_shape.dim(2);
+  const auto padding = neurun::util::calculatePadding(node.param().padding, ifm_shape, ofm_shape,
+                                                      stride, ker_width, ker_height);
+
+  const auto ofm_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(ofm_index), _current_subg_layout);
+  const auto ifm_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(ifm_index), _current_subg_layout);
+  const auto ker_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(ker_index), model::Layout::UNKNOWN);
+  const auto bias_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(bias_index), model::Layout::UNKNOWN);
+
+  const auto multiplier = node.param().multiplier;
+  const auto activation = node.param().activation;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index);
+  auto ifm_alloc = _tensor_builder->at(ifm_index);
+  auto ker_alloc = _tensor_builder->at(ker_index);
+  auto bias_alloc = _tensor_builder->at(bias_index);
+
+  auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::DepthwiseConvolutionLayer>();
+
+  fn->configure(ifm_alloc->buffer(), ifm_backend_shape, ker_alloc->buffer(), ker_backend_shape,
+                bias_alloc->buffer(), bias_backend_shape, padding.left, padding.right, padding.top,
+                padding.bottom, stride.horizontal, stride.vertical, multiplier, activation,
+                ofm_alloc->buffer(), ofm_backend_shape);
+
+  _execution_builder->append(std::move(fn));
+}
+
+void KernelGenerator::visit(const model::operation::MaxPool2DNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::MaxPool2DNode::Input::INPUT)};
+
+  const auto kh = node.param().kh;
+  const auto kw = node.param().kw;
+
+  const auto stride = node.param().stride;
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(_current_subg_layout);
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(_current_subg_layout);
+  const auto padding =
+      neurun::util::calculatePadding(node.param().padding, ifm_shape, ofm_shape, stride, kw, kh);
+  const auto activation = node.param().activation;
+
+  const auto ofm_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(ofm_index), _current_subg_layout);
+  const auto ifm_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(ifm_index), _current_subg_layout);
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::MaxPoolLayer>();
+
+  fn->configure(ifm_alloc->buffer(), ifm_backend_shape, padding.left, padding.right, padding.top,
+                padding.bottom, stride.horizontal, stride.vertical, kw, kh, activation,
+                ofm_alloc->buffer(), ofm_backend_shape);
+
+  _execution_builder->append(std::move(fn));
+}
+
+void KernelGenerator::visit(const model::operation::AvgPool2DNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::AvgPool2DNode::Input::INPUT)};
+
+  const auto kh = node.param().kh;
+  const auto kw = node.param().kw;
+  const auto stride = node.param().stride;
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(_current_subg_layout);
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(_current_subg_layout);
+  const auto padding =
+      neurun::util::calculatePadding(node.param().padding, ifm_shape, ofm_shape, stride, kw, kh);
+  const auto activation = node.param().activation;
+
+  const auto ofm_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(ofm_index), _current_subg_layout);
+  const auto ifm_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(ifm_index), _current_subg_layout);
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto ifm_alloc = _tensor_builder->at(ifm_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::AvgPoolLayer>();
+
+  fn->configure(ifm_alloc->buffer(), ifm_backend_shape, padding.left, padding.right, padding.top,
+                padding.bottom, stride.horizontal, stride.vertical, kw, kh, activation,
+                ofm_alloc->buffer(), ofm_backend_shape);
+
+  _execution_builder->append(std::move(fn));
+}
+
+void KernelGenerator::visit(const model::operation::ConcatNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+
+  const auto rank = _ctx.at(ofm_index).shape().rank();
+  const auto axis =
+      ::neurun::backend::cpu::kernel::getAxis(rank, node.param().axis, _current_subg_layout);
+
+  const auto ofm_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(ofm_index), _current_subg_layout);
+  std::vector<::neurun::backend::cpu::kernel::Shape> ifm_backend_shapes;
+  for (auto &in_idx : node.getInputs())
+    ifm_backend_shapes.emplace_back(
+        ::neurun::backend::cpu::kernel::getShape(_ctx.at(in_idx), _current_subg_layout));
+
+  auto output_alloc = _tensor_builder->at(ofm_index).get();
+
+  std::vector<const uint8_t *> input_buffers;
+  for (auto &ifm_idx : node.getInputs())
+    input_buffers.emplace_back(_tensor_builder->at(ifm_idx).get()->buffer());
+
+  auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::ConcatLayer>();
+
+  fn->configure(input_buffers, ifm_backend_shapes, axis, output_alloc->buffer(), ofm_backend_shape);
+
+  _execution_builder->append(std::move(fn));
+}
+
+void KernelGenerator::visit(const model::operation::FullyConnectedNode &node)
+{
+  using model::operation::FullyConnectedNode;
+
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(FullyConnectedNode::Input::INPUT)};
+  const auto weight_index{node.getInputs().at(FullyConnectedNode::Input::WEIGHT)};
+  const auto bias_index{node.getInputs().at(FullyConnectedNode::Input::BIAS)};
+
+  const auto ofm_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(output_index), _current_subg_layout);
+  const auto ifm_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(input_index), _current_subg_layout);
+  const auto weight_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(weight_index), model::Layout::UNKNOWN);
+  const auto bias_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(bias_index), model::Layout::UNKNOWN);
+
+  const auto activation = node.param().activation;
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+  auto weight_alloc = _tensor_builder->at(weight_index).get();
+  auto bias_alloc = _tensor_builder->at(bias_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::FullyConnectedLayer>();
+
+  fn->configure(input_alloc->buffer(), ifm_backend_shape, weight_alloc->buffer(),
+                weight_backend_shape, bias_alloc->buffer(), bias_backend_shape, activation,
+                output_alloc->buffer(), ofm_backend_shape);
+
+  _execution_builder->append(std::move(fn));
+}
+
+void KernelGenerator::visit(const model::operation::MulNode &) { throw std::runtime_error("NYI"); }
+
+void KernelGenerator::visit(const model::operation::ReshapeNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::ReshapeNode::Input::INPUT)};
+
+  const auto ofm_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(output_index), _current_subg_layout);
+  const auto ifm_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(input_index), _current_subg_layout);
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::ReshapeLayer>();
+
+  fn->configure(input_alloc->buffer(), ifm_backend_shape, output_alloc->buffer(),
+                ofm_backend_shape);
+
+  _execution_builder->append(std::move(fn));
+}
+
+void KernelGenerator::visit(const model::operation::SoftmaxNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::SoftmaxNode::Input::INPUT)};
+
+  const auto ofm_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(output_index), _current_subg_layout);
+  const auto ifm_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(input_index), _current_subg_layout);
+
+  const auto beta = node.param().beta;
+
+  auto output_alloc = _tensor_builder->at(output_index).get();
+  auto input_alloc = _tensor_builder->at(input_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::SoftMaxLayer>();
+
+  fn->configure(input_alloc->buffer(), ifm_backend_shape, beta, output_alloc->buffer(),
+                ofm_backend_shape);
+
+  _execution_builder->append(std::move(fn));
+}
+
+void KernelGenerator::visit(const model::operation::AddNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto lhs_index{node.getInputs().at(model::operation::AddNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::AddNode::Input::RHS)};
+
+  const auto ofm_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(ofm_index), _current_subg_layout);
+  const auto lhs_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(lhs_index), _current_subg_layout);
+  const auto rhs_backend_shape =
+      ::neurun::backend::cpu::kernel::getShape(_ctx.at(rhs_index), _current_subg_layout);
+
+  const auto activation = node.param().activation;
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index).get();
+  auto lhs_alloc = _tensor_builder->at(lhs_index).get();
+  auto rhs_alloc = _tensor_builder->at(rhs_index).get();
+
+  auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::AddLayer>();
+
+  fn->configure(lhs_alloc->buffer(), lhs_backend_shape, rhs_alloc->buffer(), rhs_backend_shape,
+                activation, ofm_alloc->buffer(), ofm_backend_shape);
+
+  _execution_builder->append(std::move(fn));
+}
+
+void KernelGenerator::visit(const model::operation::PermuteNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(0)};
+
+  const auto &shape = _ctx.at(output_index).shape();
+  const auto input_backend_ctx = node.param().input_backend_ctx;
+  const auto output_backend_ctx = node.param().output_backend_ctx;
+  const auto data_type = node.getDataType();
+
+  output_backend_ctx->tensor_builder->preVisit(node);
+
+  auto output_object = output_backend_ctx->tensor_builder->wrapTensor(output_index);
+  auto input_object = input_backend_ctx->tensor_builder->wrapTensor(input_index);
+
+  auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::PermuteLayer>();
+
+  // TODO Support NCHW frontend
+  auto out_shape = shape;
+  if (shape.rank() == 4 && output_object->ptr()->layout() == model::Layout::NCHW)
+  {
+    out_shape.dim(1) = shape.dim(3);
+    out_shape.dim(2) = shape.dim(1);
+    out_shape.dim(3) = shape.dim(2);
+  }
+
+  const auto permute_type = node.getPermuteType();
+  // Check Permutation Type
+  const auto inferPermuteType = [&]() {
+    if (input_object->ptr()->layout() == model::Layout::NHWC &&
+        output_object->ptr()->layout() == model::Layout::NCHW)
+    {
+      return model::operation::PermuteNode::Type::NHWC_TO_NCHW;
+    }
+    else if (input_object->ptr()->layout() == model::Layout::NCHW &&
+             output_object->ptr()->layout() == model::Layout::NHWC)
+    {
+      return model::operation::PermuteNode::Type::NCHW_TO_NHWC;
+    }
+    else
+    {
+      return model::operation::PermuteNode::Type::COPY;
+    }
+  }();
+  UNUSED_RELEASE(inferPermuteType);
+  assert(permute_type == inferPermuteType);
+
+  fn->configure(input_object, output_object, out_shape, permute_type, data_type);
+
+  input_backend_ctx->tensor_builder->postVisit(node);
+
+  _execution_builder->append(std::move(fn));
+}
+
+void KernelGenerator::visit(const model::operation::CustomNode &node)
+{
+  auto get_type_info = [this](const model::Operand &operand) -> custom::TypeInfo {
+    auto backendShape = ::neurun::backend::cpu::kernel::getShape(operand, _current_subg_layout);
+
+    custom::Shape shape(backendShape.dimensions.size());
+    for (size_t d = 0; d < backendShape.dimensions.size(); ++d)
+    {
+      shape.dim(d) = backendShape.dimensions[d];
+    }
+
+    return {shape, backendShape.type};
+  };
+
+  auto fill_op_info = [&](const model::OperandIndexSequence &opSeq,
+                          std::vector<custom::TypeInfo> &types, std::vector<void *> &allocs) {
+    for (auto &idx : opSeq)
+    {
+      const auto &operand = _ctx.at(idx);
+      // TODO make sure using `_current_subg_layout` is correct for custom operations
+      types.emplace_back(get_type_info(operand));
+      auto in_alloc = _tensor_builder->at(idx)->buffer();
+      allocs.emplace_back(in_alloc);
+    }
+  };
+
+  custom::Kernel::CustomKernelConfigParams params{};
+
+  fill_op_info(node.getInputs(), params.input_types, params.input_allocations);
+  fill_op_info(node.getOutputs(), params.output_types, params.output_allocations);
+
+  params.userdata = node.userdata().data;
+  params.userdata_size = node.userdata().size;
+
+  auto fn = _kernel_registry->buildKernelForOp(node.id());
+
+  fn->configure(std::move(params));
+
+  _execution_builder->append(std::move(fn));
+}
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/KernelGenerator.h b/runtimes/neurun/backend/cpu/KernelGenerator.h
new file mode 100644
index 000000000..178540e3e
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/KernelGenerator.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_KERNEL_GENERATOR_H__
+#define __NEURUN_BACKEND_CPU_KERNEL_GENERATOR_H__
+
+#include "backend/IKernelGenerator.h"
+#include "model/Operands.h"
+#include "operand/Tensor.h"
+#include "backend/CustomKernelRegistry.h"
+#include "TensorBuilder.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+class KernelGenerator : public IKernelGenerator
+{
+public:
+  KernelGenerator(const neurun::model::Operands &ctx,
+                  const std::shared_ptr<TensorBuilder> &tensor_builder,
+                  const std::shared_ptr<custom::KernelRegistry> &kernel_registry);
+
+  using IKernelGenerator::visit;
+
+  void visit(const model::Subgraph &) override;
+  void visit(const model::operation::Conv2DNode &) override;
+  void visit(const model::operation::DepthwiseConv2DNode &) override;
+  void visit(const model::operation::MaxPool2DNode &) override;
+  void visit(const model::operation::AvgPool2DNode &) override;
+  void visit(const model::operation::ConcatNode &) override;
+  void visit(const model::operation::FullyConnectedNode &) override;
+  void visit(const model::operation::MulNode &) override;
+  void visit(const model::operation::ReshapeNode &) override;
+  void visit(const model::operation::SoftmaxNode &) override;
+  void visit(const model::operation::AddNode &) override;
+  void visit(const model::operation::PermuteNode &) override;
+  void visit(const model::operation::CustomNode &node) override;
+
+private:
+  const neurun::model::Operands &_ctx;
+  std::shared_ptr<TensorBuilder> _tensor_builder;
+  std::shared_ptr<custom::KernelRegistry> _kernel_registry;
+  model::Layout _current_subg_layout;
+};
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_KERNEL_GENERATOR_H__
diff --git a/runtimes/neurun/backend/cpu/MemoryManager.cc b/runtimes/neurun/backend/cpu/MemoryManager.cc
new file mode 100644
index 000000000..192a6db36
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/MemoryManager.cc
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "MemoryManager.h"
+
+#include <cassert>
+
+#include "MemoryPlannerFactory.h"
+#include <backend/operand/Object.h>
+#include "util/logging.h"
+#include "util/ConfigSource.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+MemoryManager::MemoryManager() : _mem_planner{createMemoryPlanner()}
+{
+  // DO NOTHING
+}
+
+IMemoryPlanner *MemoryManager::createMemoryPlanner()
+{
+  auto planner_id = util::getConfigString(util::config::CPU_MEMORY_PLANNER);
+  return MemoryPlannerFactory::instance().create(planner_id);
+}
+
+void MemoryManager::buildTensor(const model::OperandIndex &ind, const model::OperandInfo &info)
+{
+  auto tensor = std::make_shared<operand::Tensor>(info);
+  _tensors[ind] = tensor;
+}
+
+void MemoryManager::claimPlan(const model::OperandIndex &ind, uint32_t size)
+{
+  _mem_planner->claim(ind, size);
+}
+
+void MemoryManager::releasePlan(const model::OperandIndex &ind) { _mem_planner->release(ind); }
+
+void MemoryManager::allocate(void)
+{
+  _mem_alloc = std::make_shared<Allocator>(_mem_planner->capacity());
+  assert(_mem_alloc->base());
+
+  for (auto &mem_plan : _mem_planner->memory_plans())
+  {
+    auto ind = mem_plan.first;
+    auto mem_blk = mem_plan.second;
+
+    uint8_t *buffer = _mem_alloc->base() + mem_blk.offset;
+    auto tensor = _tensors[ind];
+    tensor->setBuffer(buffer);
+
+    VERBOSE(CPU_MEMORYMANAGER) << "TENSOR(#" << ind.value() << "): " << static_cast<void *>(buffer)
+                               << std::endl;
+
+    // If we do not make tensor here currently, kernel generation would cause segmentation fault.
+    // See also : Comments in `allocate` method.
+  }
+}
+
+std::shared_ptr<backend::operand::IObject> MemoryManager::wrapTensor(const model::OperandIndex &ind)
+{
+  if (_objects.find(ind) != _objects.end())
+  {
+    return _objects.at(ind);
+  }
+  else
+  {
+    return _objects[ind] = std::make_shared<::neurun::backend::operand::Object>(_tensors.at(ind));
+  }
+}
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/MemoryManager.h b/runtimes/neurun/backend/cpu/MemoryManager.h
new file mode 100644
index 000000000..6b225edcb
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/MemoryManager.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_MEMORY_MANAGER_H__
+#define __NEURUN_BACKEND_CPU_MEMORY_MANAGER_H__
+
+#include "backend/IMemoryManager.h"
+#include "MemoryPlanner.h"
+#include "operand/Tensor.h"
+#include <backend/operand/Object.h>
+#include "model/OperandIndexMap.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+class MemoryManager : public backend::IMemoryManager
+{
+public:
+  MemoryManager();
+  virtual ~MemoryManager() = default;
+
+  void allocate(void) override;
+  void deallocate(void) override { _mem_alloc->release(); }
+
+  void buildTensor(const model::OperandIndex &ind, const model::OperandInfo &info);
+  void claimPlan(const model::OperandIndex &ind, uint32_t size);
+  void releasePlan(const model::OperandIndex &ind);
+
+  model::OperandIndexMap<std::shared_ptr<operand::Tensor>> &tensors(void) { return _tensors; }
+
+  std::shared_ptr<backend::operand::IObject> wrapTensor(const model::OperandIndex &ind);
+
+private:
+  IMemoryPlanner *createMemoryPlanner();
+
+private:
+  model::OperandIndexMap<std::shared_ptr<operand::Tensor>> _tensors;
+  model::OperandIndexMap<std::shared_ptr<::neurun::backend::operand::Object>> _objects;
+  model::OperandIndexMap<Block> _tensor_mem_map;
+  std::shared_ptr<IMemoryPlanner> _mem_planner;
+  std::shared_ptr<Allocator> _mem_alloc;
+};
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_MEMORY_MANAGER_H__
diff --git a/runtimes/neurun/backend/cpu/MemoryPlanner.cc b/runtimes/neurun/backend/cpu/MemoryPlanner.cc
new file mode 100644
index 000000000..8eaf7bb9e
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/MemoryPlanner.cc
@@ -0,0 +1,123 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "MemoryPlanner.h"
+#include "util/logging.h"
+#include <cassert>
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+Allocator::Allocator(uint32_t capacity)
+{
+  _base = nnfw::cpp14::make_unique<uint8_t[]>(capacity);
+
+  VERBOSE(ALLOC) << "allocation capacity: " << capacity << std::endl;
+  VERBOSE(ALLOC) << "base pointer: " << static_cast<void *>(_base.get()) << std::endl;
+}
+
+void BumpPlanner::claim(const model::OperandIndex &ind, size_t size)
+{
+  assert(size != 0);
+
+  Block blk{_capacity, size};
+  _mem_plans[ind] = blk;
+  _capacity += size;
+
+  VERBOSE(BP_PLANNER) << "CLAIM(#" << ind.value() << "): " << blk.offset << ", " << blk.size
+                      << std::endl;
+}
+
+void BumpPlanner::release(const model::OperandIndex &ind)
+{
+  VERBOSE(BP_PLANNER) << "RELEASE(#" << ind.value() << "): "
+                      << "NOTHING does" << std::endl;
+}
+
+// There are some assumptions for claiming memory(== making a reservation for memory).
+// 1. About _claim_table(std::map).
+//   - The table's data structure is std::map so that it always sorts
+//     value(model::OperandIndex) by key(base_offset).
+//   - This claim() inserts key/value into _claim_table and the release() removes the key/value from
+//     _claim_table.
+//   - _claim_table shows the memory status at a certain point in time. Therefore,
+//     - If _claim_table has an offset and a certain size at a certain point in time,
+//       it means the place at the offset has been already claimed(== can't claim now. need to find
+//       someplace new).
+//     - If _claim_table doesn't have any element for an offset and a certain size at a certain
+//       point in time, it means the place at the offset can be claimed.
+// 2. In the loop for _claim_table, we can assume the current claim_base_offset value is bigger than
+//    the previous claim_base_offset.
+void FirstFitPlanner::claim(const model::OperandIndex &ind, size_t size)
+{
+  assert(size != 0);
+
+  // Find the right position for claiming
+  uint32_t next_offset = 0;
+  for (auto &mem_claim : _claim_table)
+  {
+    auto claimed_base_offset = mem_claim.first;
+    auto claimed_size = _mem_plans[mem_claim.second].size;
+    if (next_offset + size <= claimed_base_offset)
+    {
+      break;
+    }
+    else
+    {
+      next_offset = claimed_base_offset + claimed_size;
+    }
+  }
+
+  // Now next_offset is set to the proper offset
+  _claim_table[next_offset] = ind;
+  _mem_plans[ind] = {next_offset, size};
+
+  VERBOSE(FF_PLANNER) << "claim(#" << ind.value() << "): [+" << next_offset << ", " << size << "sz]"
+                      << std::endl;
+
+  if (_capacity < next_offset + size)
+  {
+    _capacity = next_offset + size;
+  }
+}
+
+void FirstFitPlanner::release(const model::OperandIndex &ind)
+{
+  for (auto it = _claim_table.cbegin(); it != _claim_table.cend(); ++it)
+  {
+    if (it->second == ind)
+    {
+      uint32_t offset = it->first;
+      uint32_t index = ind.value();
+      uint32_t size = _mem_plans[ind].size;
+
+      _claim_table.erase(it);
+
+      VERBOSE(FF_PLANNER) << "release(#" << index << "): [+" << offset << ", " << size << "sz]"
+                          << std::endl;
+      return;
+    }
+  }
+  assert(!"Cannot release for given index. It has been not claimed or released already.");
+}
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/MemoryPlanner.h b/runtimes/neurun/backend/cpu/MemoryPlanner.h
new file mode 100644
index 000000000..eaa4299ea
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/MemoryPlanner.h
@@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file        MemoryPlanner.h
+ * @brief       This file contains Memory Planning related classes
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_MEMORY_PLANNER_H__
+#define __NEURUN_BACKEND_CPU_MEMORY_PLANNER_H__
+
+#include <map>
+#include <cpp14/memory.h>
+
+#include "model/OperandIndexMap.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+/**
+ * @brief Structure to have memory offset and size
+ */
+struct Block
+{
+  uint32_t offset;
+  size_t size;
+};
+
+/**
+ * @brief Class to allocate memory
+ */
+class Allocator
+{
+public:
+  Allocator(uint32_t capacity);
+  /**
+   * @brief Get memory base pointer
+   * @return base pointer
+   */
+  uint8_t *base() const { return _base.get(); }
+  void release() { _base.reset(); }
+
+private:
+  std::unique_ptr<uint8_t[]> _base;
+};
+
+/**
+ * @brief Interface to plan memory
+ */
+struct IMemoryPlanner
+{
+  using MemoryPlans = model::OperandIndexMap<Block>;
+
+  /**
+   * @brief Claim memory for operand
+   * @param[in] index The operand index
+   * @param[in] size The size of the memory
+   */
+  virtual void claim(const model::OperandIndex &, size_t) = 0;
+  /**
+   * @brief Release memory for operand
+   * @param[in] index The operand index
+   */
+  virtual void release(const model::OperandIndex &) = 0;
+  /**
+   * @brief Get capacity for memory planning
+   * @return The value of capacity
+   */
+  virtual uint32_t capacity() = 0;
+  /**
+   * @brief Get MemoryPlans
+   * @return MemoryPlans
+   */
+  virtual MemoryPlans &memory_plans() = 0;
+
+  virtual ~IMemoryPlanner() = default;
+};
+
+/**
+ * @brief Class to plan memory by bump way
+ */
+class BumpPlanner : public IMemoryPlanner
+{
+public:
+  /**
+   * @brief Claim memory for operand by bump way
+   * @param[in] index The operand index
+   * @param[in] size The size of the memory
+   */
+  void claim(const model::OperandIndex &, size_t) override;
+  /**
+   * @brief Release memory for operand by bump way
+   * @param[in] index The operand index
+   */
+  void release(const model::OperandIndex &) override;
+  /**
+   * @brief Get capacity for memory planning
+   * @return The value of capacity
+   */
+  uint32_t capacity() override { return _capacity; }
+  /**
+   * @brief Get MemoryPlans
+   * @return MemoryPlans
+   */
+  MemoryPlans &memory_plans() override { return _mem_plans; }
+
+private:
+  uint32_t _capacity = 0;
+  MemoryPlans _mem_plans;
+};
+
+/**
+ * @brief Class to plan memory by firstfit way
+ */
+class FirstFitPlanner : public IMemoryPlanner
+{
+public:
+  /**
+   * @brief Claim memory for operand by firstfit way
+   * @param[in] index The operand index
+   * @param[in] size The size of the memory
+   */
+  void claim(const model::OperandIndex &, size_t) override;
+  /**
+   * @brief Release memory for operand by firstfit way
+   * @param[in] index The operand index
+   */
+  void release(const model::OperandIndex &) override;
+  /**
+   * @brief Get capacity for memory planning
+   * @return The value of capacity
+   */
+  uint32_t capacity() override { return _capacity; }
+  /**
+   * @brief Get MemoryPlans
+   * @return MemoryPlans
+   */
+  MemoryPlans &memory_plans() override { return _mem_plans; }
+
+private:
+  uint32_t _capacity = 0;
+  MemoryPlans _mem_plans;
+  // Use std::map because claim() assumes that _claim_table is sorted by uint32_t(base_offset)
+  std::map<uint32_t, model::OperandIndex> _claim_table;
+};
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_MEMORY_PLANNER_H__
diff --git a/runtimes/neurun/backend/cpu/MemoryPlanner.test.cc b/runtimes/neurun/backend/cpu/MemoryPlanner.test.cc
new file mode 100644
index 000000000..39e0f0d0c
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/MemoryPlanner.test.cc
@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <gtest/gtest.h>
+
+#include "MemoryPlanner.h"
+#include "model/Index.h"
+
+TEST(Allocator, allocate_test)
+{
+  ::neurun::backend::cpu::Allocator allocator(1024);
+  ASSERT_NE(allocator.base(), nullptr);
+}
+
+TEST(BumpPlanner, claim_test)
+{
+  ::neurun::backend::cpu::BumpPlanner planner;
+
+  auto claim = [&planner](uint32_t index, size_t size, uint32_t expected_offset) {
+    ::neurun::model::OperandIndex mem_idx(index);
+    planner.claim(mem_idx, size);
+    auto mem_blk = planner.memory_plans()[mem_idx];
+    ASSERT_EQ(mem_blk.offset, expected_offset);
+    ASSERT_EQ(mem_blk.size, size);
+  };
+
+  claim(0, 10, 0);
+  claim(1, 20, 10);
+  claim(2, 30, 30);
+}
+
+TEST(FirstFitPlanner, claim_release_test)
+{
+  ::neurun::backend::cpu::FirstFitPlanner planner;
+
+  auto claim = [&planner](uint32_t index, size_t size, uint32_t expected_offset) {
+    ::neurun::model::OperandIndex mem_idx(index);
+    planner.claim(mem_idx, size);
+    auto mem_blk = planner.memory_plans()[mem_idx];
+    ASSERT_EQ(mem_blk.offset, expected_offset);
+    ASSERT_EQ(mem_blk.size, size);
+  };
+
+  auto release = [&planner](uint32_t index) {
+    ::neurun::model::OperandIndex mem_idx(index);
+    planner.release(mem_idx);
+  };
+
+  // 0 CLAIM - 10
+  claim(0, 10, 0);
+
+  // 1 CLAIM - 20
+  claim(1, 20, 10);
+
+  // 2 CLAIM - 30
+  claim(2, 30, 30);
+
+  // 0 RELEASE - 10
+  release(0);
+
+  // 3 CLAIM - 20
+  claim(3, 20, 60);
+
+  // 4 CLAIM - 5
+  claim(4, 5, 0);
+
+  // 5 CLAIM - 10
+  claim(5, 10, 80);
+
+  // 6 CLAIM - 5
+  claim(6, 5, 5);
+
+  // 2 RELEASE - 30
+  release(2);
+
+  // 7 CLAIM - 35
+  claim(7, 35, 90);
+
+  // 8 CLAIM - 10
+  claim(8, 10, 30);
+
+  // 4 RELEASE - 5
+  release(4);
+
+  // 9 CLAIM - 10
+  claim(9, 10, 40);
+
+  // 10 CLAIM - 10
+  claim(10, 10, 50);
+
+  // 6 RELEASE
+  release(6);
+
+  // 1 RELEASE
+  release(1);
+
+  // 8 RELEASE
+  release(8);
+
+  // 9 RELEASE
+  release(9);
+
+  // 10 RELEASE
+  release(10);
+
+  // 3 RELEASE
+  release(3);
+
+  // 5 RELEASE
+  release(5);
+
+  // 7 RELEASE
+  release(7);
+}
diff --git a/runtimes/neurun/backend/cpu/MemoryPlannerFactory.cc b/runtimes/neurun/backend/cpu/MemoryPlannerFactory.cc
new file mode 100644
index 000000000..25ac4392f
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/MemoryPlannerFactory.cc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "MemoryPlannerFactory.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+MemoryPlannerFactory &MemoryPlannerFactory::instance()
+{
+  static MemoryPlannerFactory instance;
+  return instance;
+}
+
+IMemoryPlanner *MemoryPlannerFactory::create(const std::string &key)
+{
+  if (key == "FirstFit")
+  {
+    return new FirstFitPlanner;
+  }
+  else if (key == "Bump")
+  {
+    return new BumpPlanner;
+  }
+  return new FirstFitPlanner; // Default Planner
+}
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/MemoryPlannerFactory.h b/runtimes/neurun/backend/cpu/MemoryPlannerFactory.h
new file mode 100644
index 000000000..610cc9a15
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/MemoryPlannerFactory.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_MEMORY_PLANNER_FACTORY_H__
+#define __NEURUN_BACKEND_CPU_MEMORY_PLANNER_FACTORY_H__
+
+#include "MemoryPlanner.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+class MemoryPlannerFactory
+{
+public:
+  static MemoryPlannerFactory &instance();
+
+private:
+  MemoryPlannerFactory() = default;
+
+public:
+  IMemoryPlanner *create(const std::string &key);
+};
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_MEMORY_PLANNER_FACTORY_H__
diff --git a/runtimes/neurun/backend/cpu/PluginClassesAllocator.cc b/runtimes/neurun/backend/cpu/PluginClassesAllocator.cc
new file mode 100644
index 000000000..caba78447
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/PluginClassesAllocator.cc
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <util/logging.h>
+
+#include "Backend.h"
+
+extern "C" {
+neurun::backend::Backend *neurun_backend_create()
+{
+  VERBOSE(neurun_backend_create) << "'cpu' loaded\n";
+  return new neurun::backend::cpu::Backend;
+}
+
+void neurun_backend_destroy(neurun::backend::Backend *backend)
+{
+  VERBOSE(neurun_backend_create) << "'cpu' unloaded\n";
+  delete backend;
+}
+}
diff --git a/runtimes/neurun/backend/cpu/ShapeFixer.cc b/runtimes/neurun/backend/cpu/ShapeFixer.cc
new file mode 100644
index 000000000..741f07d5e
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/ShapeFixer.cc
@@ -0,0 +1,94 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ShapeFixer.h"
+
+#include <stdexcept>
+
+#include "cpp14/memory.h"
+#include "util/Padding.h"
+#include "kernel/OperationUtils.h"
+#include "kernel/ConvolutionLayer.h"
+#include "kernel/AvgPoolLayer.h"
+#include "kernel/MaxPoolLayer.h"
+#include "kernel/ConcatLayer.h"
+#include "kernel/FullyConnectedLayer.h"
+#include "kernel/ReshapeLayer.h"
+#include "kernel/SoftMaxLayer.h"
+#include "kernel/PermuteLayer.h"
+#include "kernel/DepthwiseConvolutionLayer.h"
+#include "kernel/AddLayer.h"
+
+#include <backend/Backend.h>
+#include <backend/IConfig.h>
+#include "compiler/IExecutionBuilder.h"
+
+#include "util/logging.h"
+
+#include "util/Utils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+ShapeFixer::ShapeFixer(const neurun::model::Operands &operand_ctx,
+                       const std::shared_ptr<TensorBuilder> &tensor_builder)
+    : _ctx(operand_ctx), _tensor_builder(tensor_builder)
+{
+  assert(tensor_builder);
+}
+
+void ShapeFixer::visit(const model::operation::Conv2DNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::DepthwiseConv2DNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::MaxPool2DNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::AvgPool2DNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::ConcatNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::FullyConnectedNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::MulNode &) { throw std::runtime_error("NYI"); }
+
+void ShapeFixer::visit(const model::operation::ReshapeNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::SoftmaxNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::AddNode &node)
+{
+  const auto lhs_index{node.getInputs().at(model::operation::AddNode::Input::LHS)};
+  const auto rhs_index{node.getInputs().at(model::operation::AddNode::Input::RHS)};
+
+  // Broadcasting and quantization
+  if (!(_ctx.at(lhs_index).shape() == _ctx.at(rhs_index).shape()) ||
+      _ctx.at(lhs_index).typeInfo().type() == model::DataType::QUANT8_ASYMM)
+  {
+    throw std::runtime_error{"NYI"};
+  }
+}
+
+void ShapeFixer::visit(const model::operation::PermuteNode &) { /* DO NOTHING */}
+
+void ShapeFixer::visit(const model::operation::CustomNode &) { /* DO NOTHING */}
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/ShapeFixer.h b/runtimes/neurun/backend/cpu/ShapeFixer.h
new file mode 100644
index 000000000..34a001797
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/ShapeFixer.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_SHAPE_FIXER_H__
+#define __NEURUN_BACKEND_CPU_SHAPE_FIXER_H__
+
+#include <backend/IShapeFixer.h>
+
+#include "model/Operands.h"
+#include "operand/Tensor.h"
+#include "TensorBuilder.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+class ShapeFixer : public IShapeFixer
+{
+public:
+  ShapeFixer(const neurun::model::Operands &ctx,
+             const std::shared_ptr<TensorBuilder> &tensor_builder);
+
+  std::shared_ptr<ITensorBuilder> tensor_builder() override { return _tensor_builder; }
+
+  void visit(const model::operation::Conv2DNode &) override;
+  void visit(const model::operation::DepthwiseConv2DNode &) override;
+  void visit(const model::operation::MaxPool2DNode &) override;
+  void visit(const model::operation::AvgPool2DNode &) override;
+  void visit(const model::operation::ConcatNode &) override;
+  void visit(const model::operation::FullyConnectedNode &) override;
+  void visit(const model::operation::MulNode &) override;
+  void visit(const model::operation::ReshapeNode &) override;
+  void visit(const model::operation::SoftmaxNode &) override;
+  void visit(const model::operation::AddNode &) override;
+  void visit(const model::operation::PermuteNode &) override;
+  void visit(const model::operation::CustomNode &) override;
+
+private:
+  const neurun::model::Operands &_ctx;
+  std::shared_ptr<TensorBuilder> _tensor_builder;
+};
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_SHAPE_FIXER_H__
diff --git a/runtimes/neurun/backend/cpu/TensorBuilder.cc b/runtimes/neurun/backend/cpu/TensorBuilder.cc
new file mode 100644
index 000000000..cf91e5e61
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/TensorBuilder.cc
@@ -0,0 +1,141 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "TensorBuilder.h"
+
+#include <cassert>
+
+#include "util/logging.h"
+
+namespace
+{
+
+using namespace neurun;
+
+// NOTE This backend support only NHWC now
+model::OperandInfo asTensorInfo(const model::OperandInfo &info, model::Layout frontend_layout)
+{
+  const auto &shape = info.shape();
+  const auto &rank = shape.rank();
+  assert(rank <= 4);
+
+  auto ret = info;
+  if (frontend_layout == model::Layout::NCHW && rank == 4)
+  {
+    // NCHW -> NHWC
+    uint32_t permutation[4] = {0, 2, 3, 1};
+    ret = model::OperandInfo{{shape.dim(permutation[0]), shape.dim(permutation[1]),
+                              shape.dim(permutation[2]), shape.dim(permutation[3])},
+                             info.typeInfo()};
+  }
+  return ret;
+}
+
+} // namespace
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+TensorBuilder::TensorBuilder() : _tensor_mgr{new TensorManager()}
+{
+  // DO NOTHING
+}
+
+void TensorBuilder::registerTensorInfo(const model::OperandIndex &ind,
+                                       const model::OperandInfo &info,
+                                       model::Layout frontend_layout, model::Layout backend_layout,
+                                       bool as_const)
+{
+  _tensor_info_map.emplace(ind, info);
+  _tensor_layouts_map.insert({ind, std::make_pair(frontend_layout, backend_layout)});
+
+  if (as_const)
+    _constants.append(ind);
+}
+
+void TensorBuilder::registerSubTensorInfo(const model::OperandIndex &,
+                                          const compiler::SubTensorInfo &)
+{
+  // Not supported yet
+  assert(false);
+}
+
+void TensorBuilder::notifyFirstUse(const model::OperandIndex &ind)
+{
+  assert(_tensor_info_map.find(ind) != _tensor_info_map.end());
+  const auto tensor_info = asTensorInfo(_tensor_info_map.at(ind), _tensor_layouts_map[ind].first);
+  const auto size = tensor_info.total_size();
+  _tensor_mgr->buildTensor(ind, tensor_info, _constants.contains(ind));
+  _tensor_mgr->claimPlan(ind, size);
+}
+
+void TensorBuilder::notifyLastUse(const model::OperandIndex &ind) { _tensor_mgr->releasePlan(ind); }
+
+void TensorBuilder::prepare(void)
+{
+  _tensor_mgr->allocateConsts();
+  _tensor_mgr->allocateNonconsts();
+}
+
+// TODO Remove this
+void TensorBuilder::allocate(void)
+{
+  // NOTE For now nothing to do. Allocation is done in prepare stage, which is not appropriate
+  //      This is because CPU kernels require `ITensor`s to be allocated before Kernel Generation.
+}
+
+void TensorBuilder::allocateConsts()
+{
+  // NOTE For now nothing to do. Allocation is done in prepare stage, which is not appropriate
+  //      This is because CPU kernels require `ITensor`s to be allocated before Kernel Generation.
+}
+
+void TensorBuilder::allocateNonconsts()
+{
+  // NOTE For now nothing to do. Allocation is done in prepare stage, which is not appropriate
+  //      This is because CPU kernels require `ITensor`s to be allocated before Kernel Generation.
+}
+
+std::shared_ptr<::neurun::backend::operand::ITensor>
+TensorBuilder::tensorAt(const model::OperandIndex &ind)
+{
+  return _tensor_mgr->at(ind);
+}
+
+std::shared_ptr<backend::operand::IObject> TensorBuilder::wrapTensor(const model::OperandIndex &ind)
+{
+  return _tensor_mgr->wrapTensor(ind);
+}
+
+void TensorBuilder::iterate(const IterateFunction &fn) { _tensor_mgr->iterate(fn); }
+
+std::shared_ptr<operand::Tensor> TensorBuilder::at(const ::neurun::model::OperandIndex &ind)
+{
+  return _tensor_mgr->at(ind);
+}
+
+std::unique_ptr<ITensorManager> TensorBuilder::releaseTensorManager(void)
+{
+  return std::move(_tensor_mgr);
+}
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/TensorBuilder.h b/runtimes/neurun/backend/cpu/TensorBuilder.h
new file mode 100644
index 000000000..efafbd97b
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/TensorBuilder.h
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_TENSOR_BUILDER_H__
+#define __NEURUN_BACKEND_CPU_TENSOR_BUILDER_H__
+
+#include <unordered_map>
+
+#include <backend/ITensorBuilder.h>
+#include <backend/operand/Object.h>
+#include "operand/Tensor.h"
+#include "model/OperandIndexMap.h"
+#include "TensorManager.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+class TensorBuilder : public ITensorBuilder
+{
+public:
+  TensorBuilder();
+
+  /**
+   * @brief     Register tensor information to allocate on CPU backend
+   * @param[in] ind    Operand index
+   * @param[in] info   Operand information
+   * @param[in] layout Operand data layout
+   */
+  void registerTensorInfo(const model::OperandIndex &ind, const model::OperandInfo &info,
+                          model::Layout frontend_layout, model::Layout backend_layout,
+                          bool as_const) override;
+  /**
+   * @brief     Register subtensor information to allocate on CPU backend
+   * @param[in] ind   Operand index
+   * @param[in] info  Tensor information
+   */
+  void registerSubTensorInfo(const model::OperandIndex &ind,
+                             const compiler::SubTensorInfo &info) override;
+
+  void notifyFirstUse(const model::OperandIndex &) override;
+  void notifyLastUse(const model::OperandIndex &) override;
+
+  void prepare(void) override;
+  void allocate(void) override; // TODO Remove this
+  void allocateConsts() override;
+  void allocateNonconsts() override;
+  void postFunctionPrepare() override { /* DO NOTHING */}
+  void finalize() override { /* DO NOTHING */}
+
+  std::shared_ptr<::neurun::backend::operand::ITensor>
+  tensorAt(const model::OperandIndex &ind) override;
+
+  std::shared_ptr<backend::operand::IObject> wrapTensor(const model::OperandIndex &ind) override;
+
+  void iterate(const IterateFunction &fn) override;
+
+  void preVisit(const model::Operation &) override { /* DO NOTHING */}
+  void postVisit(const model::Operation &) override { /* DO NOTHING */}
+
+  std::unique_ptr<ITensorManager> releaseTensorManager(void) override;
+
+  std::shared_ptr<operand::Tensor> at(const ::neurun::model::OperandIndex &ind);
+
+private:
+  std::unique_ptr<TensorManager> _tensor_mgr;
+  model::OperandIndexMap<model::OperandInfo> _tensor_info_map;
+  model::OperandIndexMap<std::pair<model::Layout, model::Layout>> _tensor_layouts_map;
+  model::OperandIndexSequence _constants;
+};
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_TENSOR_BUILDER_H__
diff --git a/runtimes/neurun/backend/cpu/TensorManager.cc b/runtimes/neurun/backend/cpu/TensorManager.cc
new file mode 100644
index 000000000..22d874bf3
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/TensorManager.cc
@@ -0,0 +1,100 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "TensorManager.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+TensorManager::TensorManager() : _const_mgr{new MemoryManager()}, _nonconst_mgr{new MemoryManager()}
+{
+  // DO NOTHING
+}
+
+void TensorManager::allocateConsts(void) { _const_mgr->allocate(); }
+
+void TensorManager::allocateNonconsts(void) { _nonconst_mgr->allocate(); }
+
+void TensorManager::deallocateConsts(void) { _const_mgr->deallocate(); }
+
+void TensorManager::deallocateNonconsts(void) { _nonconst_mgr->deallocate(); }
+
+void TensorManager::buildTensor(const model::OperandIndex &ind,
+                                const model::OperandInfo &tensor_info, bool as_const)
+{
+  assert(_ind_to_mgr.find(ind) == _ind_to_mgr.end());
+  if (as_const)
+  {
+    _const_mgr->buildTensor(ind, tensor_info);
+    _ind_to_mgr.insert({ind, *_const_mgr});
+  }
+  else
+  {
+    _nonconst_mgr->buildTensor(ind, tensor_info);
+    _ind_to_mgr.insert({ind, *_nonconst_mgr});
+  }
+}
+
+void TensorManager::claimPlan(const model::OperandIndex &ind, uint32_t size)
+{
+  assert(_ind_to_mgr.find(ind) != _ind_to_mgr.end());
+  _ind_to_mgr.at(ind).claimPlan(ind, size);
+}
+
+void TensorManager::releasePlan(const model::OperandIndex &ind)
+{
+  assert(_ind_to_mgr.find(ind) != _ind_to_mgr.end());
+  _ind_to_mgr.at(ind).releasePlan(ind);
+}
+
+std::shared_ptr<backend::operand::IObject> TensorManager::wrapTensor(const model::OperandIndex &ind)
+{
+  assert(_ind_to_mgr.find(ind) != _ind_to_mgr.end());
+  return _ind_to_mgr.at(ind).wrapTensor(ind);
+}
+
+std::shared_ptr<operand::Tensor> TensorManager::at(const ::neurun::model::OperandIndex &ind)
+{
+  assert(_ind_to_mgr.find(ind) != _ind_to_mgr.end());
+  return _ind_to_mgr.at(ind).tensors().at(ind);
+}
+
+model::OperandIndexMap<std::shared_ptr<operand::Tensor>> &TensorManager::constTensors(void)
+{
+  return _const_mgr->tensors();
+}
+
+model::OperandIndexMap<std::shared_ptr<operand::Tensor>> &TensorManager::nonconstTensors(void)
+{
+  return _nonconst_mgr->tensors();
+}
+
+void TensorManager::iterate(const std::function<void(const model::OperandIndex &)> &fn)
+{
+  for (auto it : _nonconst_mgr->tensors())
+    fn(it.first);
+
+  for (auto it : _const_mgr->tensors())
+    fn(it.first);
+}
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/TensorManager.h b/runtimes/neurun/backend/cpu/TensorManager.h
new file mode 100644
index 000000000..c1f4a0072
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/TensorManager.h
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_TENSOR_MANAGER_H__
+#define __NEURUN_BACKEND_CPU_TENSOR_MANAGER_H__
+
+#include "backend/ITensorManager.h"
+#include "MemoryManager.h"
+#include "model/OperandIndexMap.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+
+class TensorManager : public backend::ITensorManager
+{
+public:
+  TensorManager();
+  virtual ~TensorManager() = default;
+
+  void allocateConsts(void) override;
+  void allocateNonconsts(void) override;
+  void deallocateConsts(void) override;
+  void deallocateNonconsts(void) override;
+
+  void buildTensor(const model::OperandIndex &ind, const model::OperandInfo &tensor_info,
+                   bool as_const);
+
+  void claimPlan(const model::OperandIndex &ind, uint32_t size);
+  void releasePlan(const model::OperandIndex &ind);
+
+  std::shared_ptr<backend::operand::IObject> wrapTensor(const model::OperandIndex &ind);
+  std::shared_ptr<operand::Tensor> at(const ::neurun::model::OperandIndex &ind);
+
+  model::OperandIndexMap<std::shared_ptr<operand::Tensor>> &constTensors(void);
+  model::OperandIndexMap<std::shared_ptr<operand::Tensor>> &nonconstTensors(void);
+
+  void iterate(const std::function<void(const model::OperandIndex &)> &fn);
+
+private:
+  std::unique_ptr<MemoryManager> _const_mgr;
+  std::unique_ptr<MemoryManager> _nonconst_mgr;
+  model::OperandIndexMap<MemoryManager &> _ind_to_mgr;
+};
+
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_TENSOR_MANAGER_H__
diff --git a/runtimes/neurun/backend/cpu/kernel/AddLayer.cc b/runtimes/neurun/backend/cpu/kernel/AddLayer.cc
new file mode 100644
index 000000000..14e2afec8
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/AddLayer.cc
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "AddLayer.h"
+
+#include <cker/operation/Add.h>
+
+#include "OperationUtils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+void AddLayer::addFloat32()
+{
+  float output_activation_min, output_activation_max;
+  CalculateActivationRangeFloat(_activation, &output_activation_min, &output_activation_max);
+  nnfw::cker::AddParam op_params;
+  op_params.float_activation_max = output_activation_max;
+  op_params.float_activation_min = output_activation_min;
+
+  nnfw::cker::Add(op_params, convertShapeToCkerShape(_lhsShape), _lhsData.f,
+                  convertShapeToCkerShape(_rhsShape), _rhsData.f,
+                  convertShapeToCkerShape(_outputShape), _outputData.f);
+}
+
+void AddLayer::addQuant8()
+{
+  int32_t output_activation_min, output_activation_max;
+  CalculateActivationRangeUint8(_activation, _outputShape, &output_activation_min,
+                                &output_activation_max);
+  // nnfw::cker::AddParam op_params;
+  // op_params.quantized_activation_max = output_activation_max;
+  // op_params.quantized_activation_min = output_activation_min;
+
+  // cker quant8 add is not implemented yet
+  throw std::runtime_error{"NYI"};
+}
+
+void AddLayer::configure(uint8_t *lhsData, const Shape &lhsShape, uint8_t *rhsData,
+                         const Shape &rhsShape, const model::Activation activation,
+                         uint8_t *outputData, const Shape &outputShape)
+{
+  _lhsData.u8 = lhsData;
+  _lhsShape = lhsShape;
+  _rhsData.u8 = rhsData;
+  _rhsShape = rhsShape;
+  _inputType = lhsShape.type;
+  _activation = activation;
+  _outputData.u8 = outputData;
+  _outputShape = outputShape;
+}
+
+void AddLayer::run()
+{
+  if (_inputType == OperandType::FLOAT32)
+  {
+    addFloat32();
+  }
+  else if (_inputType == OperandType::QUANT8_ASYMM)
+  {
+    addQuant8();
+  }
+}
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/kernel/AddLayer.h b/runtimes/neurun/backend/cpu/kernel/AddLayer.h
new file mode 100644
index 000000000..e7ac39115
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/AddLayer.h
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_KERNEL_ADDLAYER_H__
+#define __NEURUN_BACKEND_CPU_KERNEL_ADDLAYER_H__
+
+#include <exec/IFunction.h>
+
+#include "OperationUtils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+class AddLayer : public ::neurun::exec::IFunction
+{
+public:
+  AddLayer() : _lhsData(), _rhsData(), _outputData(), _lhsShape(), _rhsShape(), _outputShape()
+  {
+    // DO NOTHING
+  }
+
+public:
+  void addFloat32();
+
+  void addQuant8();
+
+  void configure(uint8_t *lhsData, const Shape &lhsShape, uint8_t *rhsData, const Shape &rhsShape,
+                 const model::Activation activation, uint8_t *outputData, const Shape &outputShape);
+
+  void run();
+  void runSync()
+  {
+    // this abstract method is used just for profiling and called for
+    // backend::acl_common::AclFunction
+    run();
+  }
+
+private:
+  DataPtr _lhsData;
+  DataPtr _rhsData;
+  DataPtr _outputData;
+
+  Shape _lhsShape;
+  Shape _rhsShape;
+  Shape _outputShape;
+
+  model::Activation _activation{model::Activation::NONE};
+
+  OperandType _inputType{OperandType::FLOAT32};
+};
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_KERNEL_ADDLAYER_H__
diff --git a/runtimes/neurun/backend/cpu/kernel/AvgPoolLayer.cc b/runtimes/neurun/backend/cpu/kernel/AvgPoolLayer.cc
new file mode 100644
index 000000000..de43aae76
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/AvgPoolLayer.cc
@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "AvgPoolLayer.h"
+
+#include "OperationUtils.h"
+
+#include <cker/operation/AveragePool.h>
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+#define AVGPOOLING_PARAMETERS                            \
+  nnfw::cker::AveragePoolParams op_params;               \
+  op_params.stride_height = _strideHeight;               \
+  op_params.stride_width = _strideWidth;                 \
+  op_params.filter_height = _kernelHeight;               \
+  op_params.filter_width = _kernelWidth;                 \
+  op_params.padding_values.height = (int8_t)_paddingTop; \
+  op_params.padding_values.width = (int8_t)_paddingLeft;
+
+AvgPoolLayer::AvgPoolLayer()
+    : _inputData(), _outputData(), _inputShape(), _outputShape(), _paddingLeft(0), _paddingTop(0),
+      _paddingRight(0), _paddingBottom(0), _strideWidth(0), _strideHeight(0), _kernelWidth(0),
+      _kernelHeight(0), _activation(model::Activation::NONE), _inputType(OperandType::FLOAT32)
+{
+  // DO NOTHING
+}
+
+void AvgPoolLayer::averagePoolFloat32()
+{
+  AVGPOOLING_PARAMETERS
+  float output_activation_min, output_activation_max;
+  CalculateActivationRangeFloat(_activation, &output_activation_min, &output_activation_max);
+  op_params.float_activation_min = output_activation_min;
+  op_params.float_activation_max = output_activation_max;
+
+  nnfw::cker::AveragePool(op_params, convertShapeToCkerShape(_inputShape), _inputData.f,
+                          convertShapeToCkerShape(_outputShape), _outputData.f);
+}
+void AvgPoolLayer::averagePoolQuant8()
+{
+  AVGPOOLING_PARAMETERS
+  int32_t output_activation_min = 0;
+  int32_t output_activation_max = 0;
+  CalculateActivationRangeUint8(_activation, _outputShape, &output_activation_min,
+                                &output_activation_max);
+  op_params.quantized_activation_min = output_activation_min;
+  op_params.quantized_activation_max = output_activation_max;
+
+  nnfw::cker::AveragePool(op_params, convertShapeToCkerShape(_inputShape), _inputData.u8,
+                          convertShapeToCkerShape(_outputShape), _outputData.u8);
+}
+
+void AvgPoolLayer::configure(uint8_t *inputData, const Shape inputShape, const uint32_t paddingLeft,
+                             const uint32_t paddingRight, const uint32_t paddingTop,
+                             const uint32_t paddingBottom, const uint32_t strideWidth,
+                             const uint32_t strideHeight, const uint32_t kernelWidth,
+                             const uint32_t kernelHeight, const model::Activation activation,
+                             uint8_t *outputData, const Shape outputShape)
+{
+  _inputData.u8 = inputData;
+  _inputShape = inputShape;
+  _inputType = inputShape.type;
+  _paddingLeft = paddingLeft;
+  _paddingRight = paddingRight;
+  _paddingTop = paddingTop;
+  _paddingBottom = paddingBottom;
+  _strideWidth = strideWidth;
+  _strideHeight = strideHeight;
+  _kernelWidth = kernelWidth;
+  _kernelHeight = kernelHeight;
+  _activation = activation;
+  _outputData.u8 = outputData;
+  _outputShape = outputShape;
+}
+
+void AvgPoolLayer::run()
+{
+  if (_inputType == OperandType::FLOAT32)
+  {
+    averagePoolFloat32();
+  }
+  else if (_inputType == OperandType::QUANT8_ASYMM)
+  {
+    averagePoolQuant8();
+  }
+}
+
+#undef AVGPOOLING_PARAMETERS
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/kernel/AvgPoolLayer.h b/runtimes/neurun/backend/cpu/kernel/AvgPoolLayer.h
new file mode 100644
index 000000000..c18b9f9a6
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/AvgPoolLayer.h
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_KERNEL_AVGPOOLLAYER_H__
+#define __NEURUN_BACKEND_CPU_KERNEL_AVGPOOLLAYER_H__
+
+#include <exec/IFunction.h>
+
+#include "OperationUtils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+class AvgPoolLayer : public ::neurun::exec::IFunction
+{
+public:
+  AvgPoolLayer();
+
+public:
+  void averagePoolFloat32();
+
+  void averagePoolQuant8();
+
+  void configure(uint8_t *inputData, const Shape inputShape, const uint32_t paddingLeft,
+                 const uint32_t paddingRight, const uint32_t paddingTop,
+                 const uint32_t paddingBottom, const uint32_t strideWidth,
+                 const uint32_t strideHeight, const uint32_t kernelWidth,
+                 const uint32_t kernelHeight, const model::Activation activation,
+                 uint8_t *outputData, const Shape outputShape);
+
+  void run();
+  void runSync()
+  {
+    // this abstract method is used just for profiling and called for
+    // backend::acl_common::AclFunction
+    run();
+  }
+
+private:
+  DataPtr _inputData;
+  DataPtr _outputData;
+
+  Shape _inputShape;
+  Shape _outputShape;
+
+  uint32_t _paddingLeft;
+  uint32_t _paddingTop;
+  uint32_t _paddingRight;
+  uint32_t _paddingBottom;
+
+  uint32_t _strideWidth;
+  uint32_t _strideHeight;
+  uint32_t _kernelWidth;
+  uint32_t _kernelHeight;
+
+  model::Activation _activation;
+
+  OperandType _inputType;
+};
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_KERNEL_AVGPOOLLAYER_H__
diff --git a/runtimes/neurun/backend/cpu/kernel/ConcatLayer.cc b/runtimes/neurun/backend/cpu/kernel/ConcatLayer.cc
new file mode 100644
index 000000000..c390436a0
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/ConcatLayer.cc
@@ -0,0 +1,136 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ConcatLayer.h"
+
+#include "OperationUtils.h"
+
+#include <cker/operation/Concatenation.h>
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+ConcatLayer::ConcatLayer()
+    : _inputDataPtrs(), _outputData(), _axis(0), _inputShapes(), _outputShape(),
+      _inputType(OperandType::FLOAT32)
+{
+  // DO NOTHING
+}
+
+void ConcatLayer::concatenationFloat32()
+{
+  uint32_t num_inputs = _inputShapes.size();
+
+  nnfw::cker::ConcatenationParams op_params;
+  op_params.axis = _axis;
+  op_params.inputs_count = num_inputs;
+
+  std::vector<nnfw::cker::Shape *> inputDimsPtr;
+  std::vector<nnfw::cker::Shape> inputDims;
+  inputDimsPtr.reserve(num_inputs);
+  inputDims.reserve(num_inputs);
+
+  for (uint32_t i = 0; i < num_inputs; i++)
+  {
+    inputDims.push_back(convertShapeToCkerShape(_inputShapes[i]));
+    inputDimsPtr.push_back(&inputDims[i]);
+  }
+
+  std::vector<const float *> inputFloatPtrs;
+
+  for (auto ptr : _inputDataPtrs)
+  {
+    inputFloatPtrs.emplace_back(reinterpret_cast<const float *>(ptr));
+  }
+
+  nnfw::cker::Concatenation<float>(op_params, inputDimsPtr.data(), inputFloatPtrs.data(),
+                                   convertShapeToCkerShape(_outputShape), _outputData.f);
+}
+void ConcatLayer::concatenationQuant8()
+{
+  uint32_t num_inputs = _inputShapes.size();
+
+  std::vector<int32_t> input_zeropoints(num_inputs);
+  std::vector<float> input_scales(num_inputs);
+  for (uint32_t i = 0; i < num_inputs; i++)
+  {
+    input_zeropoints[i] = _inputShapes[i].offset;
+    input_scales[i] = _inputShapes[i].scale;
+  }
+
+  nnfw::cker::ConcatenationParams op_params;
+  op_params.axis = _axis;
+  op_params.inputs_count = num_inputs;
+  op_params.input_zeropoint = input_zeropoints.data();
+  op_params.input_scale = input_scales.data();
+  op_params.output_zeropoint = _outputShape.offset;
+  op_params.output_scale = _outputShape.scale;
+
+  std::vector<nnfw::cker::Shape *> inputDimsPtr;
+  std::vector<nnfw::cker::Shape> inputDims;
+  inputDimsPtr.reserve(num_inputs);
+  inputDims.reserve(num_inputs);
+  for (uint32_t i = 0; i < num_inputs; i++)
+  {
+    inputDims.push_back(convertShapeToCkerShape(_inputShapes[i]));
+    inputDimsPtr.push_back(&inputDims[i]);
+  }
+
+  nnfw::cker::Concatenation<uint8_t>(op_params, inputDimsPtr.data(), _inputDataPtrs.data(),
+                                     convertShapeToCkerShape(_outputShape), _outputData.u8);
+}
+
+void ConcatLayer::configure(const std::vector<const uint8_t *> &inputDataPtrs,
+                            const std::vector<Shape> &inputShapes, int32_t axis,
+                            uint8_t *outputData, const Shape outputShape)
+{
+  _inputDataPtrs = inputDataPtrs;
+
+  for (auto shape : inputShapes)
+  {
+    _inputShapes.emplace_back(shape);
+    _inputType = shape.type;
+  }
+
+  _axis = axis;
+
+  _outputData.u8 = outputData;
+  _outputShape = outputShape;
+}
+
+void ConcatLayer::run()
+{
+  if (_inputType == OperandType::FLOAT32)
+  {
+    concatenationFloat32();
+  }
+  else if (_inputType == OperandType::QUANT8_ASYMM)
+  {
+    concatenationQuant8();
+  }
+}
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/kernel/ConcatLayer.h b/runtimes/neurun/backend/cpu/kernel/ConcatLayer.h
new file mode 100644
index 000000000..5469179e0
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/ConcatLayer.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_KERNEL_CONCATLAYER_H__
+#define __NEURUN_BACKEND_CPU_KERNEL_CONCATLAYER_H__
+
+#include <exec/IFunction.h>
+
+#include "OperationUtils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+class ConcatLayer : public ::neurun::exec::IFunction
+{
+public:
+  ConcatLayer();
+
+public:
+  void concatenationFloat32();
+
+  void concatenationQuant8();
+
+  void configure(const std::vector<const uint8_t *> &inputDataPtrs,
+                 const std::vector<Shape> &inputShapes, int32_t axis, uint8_t *outputData,
+                 const Shape outputShape);
+
+  void run();
+  void runSync()
+  {
+    // this abstract method is used just for profiling and called for
+    // backend::acl_common::AclFunction
+    run();
+  }
+
+private:
+  std::vector<const uint8_t *> _inputDataPtrs;
+  DataPtr _outputData;
+
+  int32_t _axis;
+
+  std::vector<Shape> _inputShapes;
+  Shape _outputShape;
+
+  OperandType _inputType;
+};
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_KERNEL_CONCATLAYER_H__
diff --git a/runtimes/neurun/backend/cpu/kernel/ConvolutionLayer.cc b/runtimes/neurun/backend/cpu/kernel/ConvolutionLayer.cc
new file mode 100644
index 000000000..efeabbbae
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/ConvolutionLayer.cc
@@ -0,0 +1,139 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ConvolutionLayer.h"
+
+#include <cker/operation/Conv.h>
+
+#include "OperationUtils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+ConvolutionLayer::ConvolutionLayer()
+    : _inputData(), _kernelData(), _outputData(), _biasData(), _inputShape(), _kernelShape(),
+      _outputShape(), _biasShape(), _paddingLeft(0), _paddingTop(0), _paddingRight(0),
+      _paddingBottom(0), _strideWidth(0), _strideHeight(0), _activation(model::Activation::NONE),
+      _inputType(OperandType::FLOAT32)
+{
+  // DO NOTHING
+}
+
+void ConvolutionLayer::convFloat32()
+{
+  float output_activation_min, output_activation_max;
+  CalculateActivationRangeFloat(_activation, &output_activation_min, &output_activation_max);
+
+  nnfw::cker::ConvParams op_params;
+  op_params.padding_values.width = _paddingLeft;
+  op_params.padding_values.height = _paddingTop;
+  op_params.stride_width = _strideWidth;
+  op_params.stride_height = _strideHeight;
+  op_params.dilation_width_factor = 1;
+  op_params.dilation_height_factor = 1;
+  op_params.float_activation_min = output_activation_min;
+  op_params.float_activation_max = output_activation_max;
+
+  nnfw::cker::Conv(op_params, convertShapeToCkerShape(_inputShape), _inputData.f,
+                   convertShapeToCkerShape(_kernelShape), _kernelData.f,
+                   convertShapeToCkerShape(_biasShape), _biasData.f,
+                   convertShapeToCkerShape(_outputShape), _outputData.f);
+}
+
+void ConvolutionLayer::convQuant8()
+{
+  int32_t output_activation_min = 0;
+  int32_t output_activation_max = 0;
+  CalculateActivationRangeUint8(_activation, _outputShape, &output_activation_min,
+                                &output_activation_max);
+
+  float real_multiplier = 0.0;
+  int32_t output_multiplier = 0;
+  int32_t output_shift = 0;
+  GetQuantizedConvolutionMultiplier(_inputShape, _kernelShape, _biasShape, _outputShape,
+                                    &real_multiplier);
+  QuantizeMultiplier(real_multiplier, &output_multiplier, &output_shift);
+
+  nnfw::cker::ConvParams op_params;
+  op_params.stride_width = _strideWidth;
+  op_params.stride_height = _strideHeight;
+  op_params.dilation_width_factor = 1;
+  op_params.dilation_height_factor = 1;
+  op_params.padding_values.width = _paddingLeft;
+  op_params.padding_values.height = _paddingTop;
+  op_params.input_offset = -_inputShape.offset;
+  op_params.weights_offset = -_kernelShape.offset;
+  op_params.output_offset = _outputShape.offset;
+  op_params.output_multiplier = output_multiplier;
+  op_params.output_shift = output_shift;
+  op_params.quantized_activation_min = output_activation_min;
+  op_params.quantized_activation_max = output_activation_max;
+
+  nnfw::cker::Conv(op_params, convertShapeToCkerShape(_inputShape), _inputData.u8,
+                   convertShapeToCkerShape(_kernelShape), _kernelData.u8,
+                   convertShapeToCkerShape(_biasShape), _biasData.i32,
+                   convertShapeToCkerShape(_outputShape), _outputData.u8);
+}
+
+void ConvolutionLayer::configure(uint8_t *inputData, const Shape inputShape, uint8_t *kernelData,
+                                 const Shape kernelShape, uint8_t *biasData, const Shape biasShape,
+                                 const uint32_t paddingLeft, const uint32_t paddingRight,
+                                 const uint32_t paddingTop, const uint32_t paddingBottom,
+                                 const uint32_t strideWidth, const uint32_t strideHeight,
+                                 const model::Activation activation, uint8_t *outputData,
+                                 const Shape outputShape)
+{
+  _inputData.u8 = inputData;
+  _inputShape = inputShape;
+  _inputType = inputShape.type;
+  _kernelData.u8 = kernelData;
+  _kernelShape = kernelShape;
+  _biasData.u8 = biasData;
+  _biasShape = biasShape;
+  _paddingLeft = paddingLeft;
+  _paddingRight = paddingRight;
+  _paddingTop = paddingTop;
+  _paddingBottom = paddingBottom;
+  _strideWidth = strideWidth;
+  _strideHeight = strideHeight;
+  _activation = activation;
+  _outputData.u8 = outputData;
+  _outputShape = outputShape;
+}
+
+void ConvolutionLayer::run()
+{
+  if (_inputType == OperandType::FLOAT32)
+  {
+    convFloat32();
+  }
+  else if (_inputType == OperandType::QUANT8_ASYMM)
+  {
+    convQuant8();
+  }
+}
+
+#undef ANDROID_NN_CONV_PARAMETERS
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/kernel/ConvolutionLayer.h b/runtimes/neurun/backend/cpu/kernel/ConvolutionLayer.h
new file mode 100644
index 000000000..868d08a14
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/ConvolutionLayer.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_KERNEL_CONVOLUTIONLAYER_H__
+#define __NEURUN_BACKEND_CPU_KERNEL_CONVOLUTIONLAYER_H__
+
+#include <exec/IFunction.h>
+
+#include "OperationUtils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+class ConvolutionLayer : public ::neurun::exec::IFunction
+{
+public:
+  ConvolutionLayer();
+
+public:
+  void convFloat32();
+
+  void convQuant8();
+
+  void configure(uint8_t *inputData, const Shape inputShape, uint8_t *kernelData,
+                 const Shape kernelShape, uint8_t *biasData, const Shape biasShape,
+                 const uint32_t paddingLeft, const uint32_t paddingRight, const uint32_t paddingTop,
+                 const uint32_t paddingBottom, const uint32_t strideW, const uint32_t strideH,
+                 const model::Activation activation, uint8_t *outputData, const Shape outputShape);
+
+  void run();
+  void runSync()
+  {
+    // this abstract method is used just for profiling and called for
+    // backend::acl_common::AclFunction
+    run();
+  }
+
+private:
+  DataPtr _inputData;
+  DataPtr _kernelData;
+  DataPtr _outputData;
+  DataPtr _biasData;
+
+  Shape _inputShape;
+  Shape _kernelShape;
+  Shape _outputShape;
+  Shape _biasShape;
+
+  uint32_t _paddingLeft;
+  uint32_t _paddingTop;
+  uint32_t _paddingRight;
+  uint32_t _paddingBottom;
+
+  uint32_t _strideWidth;
+  uint32_t _strideHeight;
+
+  model::Activation _activation;
+
+  OperandType _inputType;
+};
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_KERNEL_CONVOLUTIONLAYER_H__
diff --git a/runtimes/neurun/backend/cpu/kernel/DepthwiseConvolutionLayer.cc b/runtimes/neurun/backend/cpu/kernel/DepthwiseConvolutionLayer.cc
new file mode 100644
index 000000000..1c750e0e1
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/DepthwiseConvolutionLayer.cc
@@ -0,0 +1,138 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "DepthwiseConvolutionLayer.h"
+
+#include <cker/operation/DepthwiseConv.h>
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+DepthwiseConvolutionLayer::DepthwiseConvolutionLayer()
+    : _inputData(), _kernelData(), _outputData(), _biasData(), _inputShape(), _kernelShape(),
+      _outputShape(), _biasShape(), _paddingLeft(0), _paddingTop(0), _paddingRight(0),
+      _paddingBottom(0), _strideWidth(0), _strideHeight(0), _multiplier(0),
+      _activation(model::Activation::NONE), _inputType(OperandType::FLOAT32)
+{
+  // DO NOTHING
+}
+
+void DepthwiseConvolutionLayer::convFloat32()
+{
+  float output_activation_min, output_activation_max;
+  CalculateActivationRangeFloat(_activation, &output_activation_min, &output_activation_max);
+
+  nnfw::cker::DepthwiseConvParams op_params;
+  op_params.stride_width = _strideWidth;
+  op_params.stride_height = _strideHeight;
+  op_params.dilation_width_factor = 1;
+  op_params.dilation_height_factor = 1;
+  op_params.padding_values.width = _paddingLeft;
+  op_params.padding_values.height = _paddingTop;
+  op_params.depth_multiplier = _multiplier;
+  op_params.float_activation_min = output_activation_min;
+  op_params.float_activation_max = output_activation_max;
+
+  nnfw::cker::DepthwiseConv(op_params, convertShapeToCkerShape(_inputShape), _inputData.f,
+                            convertShapeToCkerShape(_kernelShape), _kernelData.f,
+                            convertShapeToCkerShape(_biasShape), _biasData.f,
+                            convertShapeToCkerShape(_outputShape), _outputData.f);
+}
+
+void DepthwiseConvolutionLayer::convQuant8()
+{
+  int32_t output_activation_min = 0;
+  int32_t output_activation_max = 0;
+  CalculateActivationRangeUint8(_activation, _outputShape, &output_activation_min,
+                                &output_activation_max);
+
+  float real_multiplier = 0.0;
+  int32_t output_multiplier = 0;
+  int32_t output_shift = 0;
+  GetQuantizedConvolutionMultiplier(_inputShape, _kernelShape, _biasShape, _outputShape,
+                                    &real_multiplier);
+  QuantizeMultiplier(real_multiplier, &output_multiplier, &output_shift);
+
+  nnfw::cker::DepthwiseConvParams op_params;
+  op_params.stride_width = _strideWidth;
+  op_params.stride_height = _strideHeight;
+  op_params.dilation_width_factor = 1;
+  op_params.dilation_height_factor = 1;
+  op_params.padding_values.width = _paddingLeft;
+  op_params.padding_values.height = _paddingTop;
+  op_params.depth_multiplier = _multiplier;
+  op_params.input_offset = -_inputShape.offset;
+  op_params.weights_offset = -_kernelShape.offset;
+  op_params.output_offset = _outputShape.offset;
+  op_params.output_multiplier = output_multiplier;
+  op_params.output_shift = output_shift;
+  op_params.quantized_activation_min = output_activation_min;
+  op_params.quantized_activation_max = output_activation_max;
+
+  nnfw::cker::DepthwiseConv(op_params, convertShapeToCkerShape(_inputShape), _inputData.u8,
+                            convertShapeToCkerShape(_kernelShape), _kernelData.u8,
+                            convertShapeToCkerShape(_biasShape), _biasData.i32,
+                            convertShapeToCkerShape(_outputShape), _outputData.u8);
+}
+
+void DepthwiseConvolutionLayer::configure(
+    uint8_t *inputData, const Shape inputShape, uint8_t *kernelData, const Shape kernelShape,
+    uint8_t *biasData, const Shape biasShape, const uint32_t paddingLeft,
+    const uint32_t paddingRight, const uint32_t paddingTop, const uint32_t paddingBottom,
+    const uint32_t strideWidth, const uint32_t strideHeight, const uint32_t multiplier,
+    const model::Activation activation, uint8_t *outputData, const Shape outputShape)
+{
+  _inputData.u8 = inputData;
+  _inputShape = inputShape;
+  _inputType = inputShape.type;
+  _kernelData.u8 = kernelData;
+  _kernelShape = kernelShape;
+  _biasData.u8 = biasData;
+  _biasShape = biasShape;
+  _paddingLeft = paddingLeft;
+  _paddingRight = paddingRight;
+  _paddingTop = paddingTop;
+  _paddingBottom = paddingBottom;
+  _strideWidth = strideWidth;
+  _strideHeight = strideHeight;
+  _multiplier = multiplier;
+  _activation = activation;
+  _outputData.u8 = outputData;
+  _outputShape = outputShape;
+}
+
+void DepthwiseConvolutionLayer::run()
+{
+  if (_inputType == OperandType::FLOAT32)
+  {
+    convFloat32();
+  }
+  else if (_inputType == OperandType::QUANT8_ASYMM)
+  {
+    convQuant8();
+  }
+}
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/kernel/DepthwiseConvolutionLayer.h b/runtimes/neurun/backend/cpu/kernel/DepthwiseConvolutionLayer.h
new file mode 100644
index 000000000..b031bc8eb
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/DepthwiseConvolutionLayer.h
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_KERNEL_CPU_DEPTHWISECONVOLUTIONLAYER_H__
+#define __NEURUN_KERNEL_CPU_DEPTHWISECONVOLUTIONLAYER_H__
+
+#include <exec/IFunction.h>
+
+#include "OperationUtils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+class DepthwiseConvolutionLayer : public ::neurun::exec::IFunction
+{
+public:
+  DepthwiseConvolutionLayer();
+
+public:
+  void convFloat32();
+
+  void convQuant8();
+
+  void configure(uint8_t *inputData, const Shape inputShape, uint8_t *kernelData,
+                 const Shape kernelShape, uint8_t *biasData, const Shape biasShape,
+                 const uint32_t paddingLeft, const uint32_t paddingRight, const uint32_t paddingTop,
+                 const uint32_t paddingBottom, const uint32_t strideW, const uint32_t strideH,
+                 const uint32_t multiplier, const model::Activation activation, uint8_t *outputData,
+                 const Shape outputShape);
+
+  void run();
+  void runSync()
+  {
+    // this abstract method is used just for profiling and called for
+    // backend::acl_common::AclFunction
+    run();
+  }
+
+private:
+  DataPtr _inputData;
+  DataPtr _kernelData;
+  DataPtr _outputData;
+  DataPtr _biasData;
+
+  Shape _inputShape;
+  Shape _kernelShape;
+  Shape _outputShape;
+  Shape _biasShape;
+
+  uint32_t _paddingLeft;
+  uint32_t _paddingTop;
+  uint32_t _paddingRight;
+  uint32_t _paddingBottom;
+
+  uint32_t _strideWidth;
+  uint32_t _strideHeight;
+
+  uint32_t _multiplier;
+
+  model::Activation _activation;
+
+  OperandType _inputType;
+};
+
+} // namespace kernel
+} // namespace cpu
+} // backend
+} // namespace neurun
+
+#endif // __NEURUN_KERNEL_CPU_DEPTHWISECONVOLUTIONLAYER_H__
diff --git a/runtimes/neurun/backend/cpu/kernel/FullyConnectedLayer.cc b/runtimes/neurun/backend/cpu/kernel/FullyConnectedLayer.cc
new file mode 100644
index 000000000..cbd36929f
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/FullyConnectedLayer.cc
@@ -0,0 +1,119 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "FullyConnectedLayer.h"
+
+#include <cker/operation/FullyConnected.h>
+
+#include "OperationUtils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+FullyConnectedLayer::FullyConnectedLayer()
+    : _inputData(), _weightsData(), _biasData(), _outputData(), _inputShape(), _weightsShape(),
+      _biasShape(), _outputShape(), _activation(model::Activation::NONE),
+      _inputType(OperandType::FLOAT32)
+{
+  // DO NOTHING
+}
+
+void FullyConnectedLayer::fullyConnectedFloat32()
+{
+  float output_activation_min, output_activation_max;
+  CalculateActivationRangeFloat(_activation, &output_activation_min, &output_activation_max);
+
+  nnfw::cker::FullyConnectedParams op_params;
+  op_params.float_activation_min = output_activation_min;
+  op_params.float_activation_max = output_activation_max;
+
+  nnfw::cker::FullyConnected(op_params, convertToExtendedCkerShape(_inputShape), _inputData.f,
+                             convertToExtendedCkerShape(_weightsShape), _weightsData.f,
+                             convertToExtendedCkerShape(_biasShape), _biasData.f,
+                             convertToExtendedCkerShape(_outputShape), _outputData.f);
+}
+
+// executionMutex is used to protect concurrent access of non-threadsafe resources
+// like gemmlowp::GemmContext.
+void FullyConnectedLayer::fullyConnectedQuant8()
+{
+  float real_multiplier = 0.0;
+  int32_t output_multiplier = 0;
+  int32_t output_shift = 0;
+  int32_t output_activation_min = 0;
+  int32_t output_activation_max = 0;
+  GetQuantizedConvolutionMultiplier(_inputShape, _weightsShape, _biasShape, _outputShape,
+                                    &real_multiplier);
+  QuantizeMultiplier(real_multiplier, &output_multiplier, &output_shift);
+  CalculateActivationRangeUint8(_activation, _outputShape, &output_activation_min,
+                                &output_activation_max);
+
+  nnfw::cker::FullyConnectedParams op_params;
+  op_params.input_offset = -_inputShape.offset;
+  op_params.weights_offset = -_weightsShape.offset;
+  op_params.output_offset = _outputShape.offset;
+  op_params.output_multiplier = output_multiplier;
+  op_params.output_shift = output_shift;
+  op_params.quantized_activation_min = output_activation_min;
+  op_params.quantized_activation_max = output_activation_max;
+
+  nnfw::cker::FullyConnected(op_params, convertToExtendedCkerShape(_inputShape), _inputData.u8,
+                             convertToExtendedCkerShape(_weightsShape), _weightsData.u8,
+                             convertToExtendedCkerShape(_biasShape), _biasData.i32,
+                             convertToExtendedCkerShape(_outputShape), _outputData.u8);
+}
+
+void FullyConnectedLayer::configure(uint8_t *inputData, const Shape inputShape,
+                                    uint8_t *weightsData, const Shape weightsShape,
+                                    uint8_t *biasData, const Shape biasShape,
+                                    model::Activation activation, uint8_t *outputData,
+                                    const Shape outputShape)
+{
+  _inputData.u8 = inputData;
+  _inputShape = inputShape;
+  _inputType = inputShape.type;
+  _weightsData.u8 = weightsData;
+  _weightsShape = weightsShape;
+  _biasData.u8 = biasData;
+  _biasShape = biasShape;
+  _activation = activation;
+  _outputData.u8 = outputData;
+  _outputShape = outputShape;
+}
+
+void FullyConnectedLayer::run()
+{
+  if (_inputType == OperandType::FLOAT32)
+  {
+    fullyConnectedFloat32();
+  }
+  else if (_inputType == OperandType::QUANT8_ASYMM)
+  {
+    fullyConnectedQuant8();
+  }
+}
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/kernel/FullyConnectedLayer.h b/runtimes/neurun/backend/cpu/kernel/FullyConnectedLayer.h
new file mode 100644
index 000000000..635239f98
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/FullyConnectedLayer.h
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_KERNEL_FULLYCONNECTEDLAYER_H__
+#define __NEURUN_BACKEND_CPU_KERNEL_FULLYCONNECTEDLAYER_H__
+
+#include <exec/IFunction.h>
+
+#include "OperationUtils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+class FullyConnectedLayer : public ::neurun::exec::IFunction
+{
+public:
+  FullyConnectedLayer();
+
+public:
+  void fullyConnectedFloat32();
+
+  void fullyConnectedQuant8();
+
+  void configure(uint8_t *inputData, const Shape inputShape, uint8_t *weightsData,
+                 const Shape weightsShape, uint8_t *biasData, const Shape biasShape,
+                 model::Activation activation, uint8_t *outputData, const Shape outputShape);
+
+  void run();
+  void runSync()
+  {
+    // this abstract method is used just for profiling and called for
+    // backend::acl_common::AclFunction
+    run();
+  }
+
+private:
+  DataPtr _inputData;
+  DataPtr _weightsData;
+  DataPtr _biasData;
+  DataPtr _outputData;
+
+  Shape _inputShape;
+  Shape _weightsShape;
+  Shape _biasShape;
+  Shape _outputShape;
+
+  model::Activation _activation;
+
+  OperandType _inputType;
+};
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_KERNEL_FULLYCONNECTEDLAYER_H__
diff --git a/runtimes/neurun/backend/cpu/kernel/MaxPoolLayer.cc b/runtimes/neurun/backend/cpu/kernel/MaxPoolLayer.cc
new file mode 100644
index 000000000..0aaaf9282
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/MaxPoolLayer.cc
@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "MaxPoolLayer.h"
+
+#include <cker/operation/MaxPool.h>
+
+#include "OperationUtils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+#define MAXPOOLING_PARAMETERS                            \
+  nnfw::cker::MaxPoolParams op_params;                   \
+  op_params.stride_height = _strideHeight;               \
+  op_params.stride_width = _strideWidth;                 \
+  op_params.filter_height = _kernelHeight;               \
+  op_params.filter_width = _kernelWidth;                 \
+  op_params.padding_values.height = (int8_t)_paddingTop; \
+  op_params.padding_values.width = (int8_t)_paddingLeft;
+
+MaxPoolLayer::MaxPoolLayer()
+    : _inputData(), _outputData(), _inputShape(), _outputShape(), _paddingLeft(0), _paddingTop(0),
+      _paddingRight(0), _paddingBottom(0), _strideWidth(0), _strideHeight(0), _kernelWidth(0),
+      _kernelHeight(0), _activation(model::Activation::NONE), _inputType(OperandType::FLOAT32)
+{
+  // DO NOTHING
+}
+
+void MaxPoolLayer::maxPoolFloat32()
+{
+  MAXPOOLING_PARAMETERS
+  float output_activation_min, output_activation_max;
+  CalculateActivationRangeFloat(_activation, &output_activation_min, &output_activation_max);
+  op_params.float_activation_min = output_activation_min;
+  op_params.float_activation_max = output_activation_max;
+
+  nnfw::cker::MaxPool(op_params, convertShapeToCkerShape(_inputShape), _inputData.f,
+                      convertShapeToCkerShape(_outputShape), _outputData.f);
+}
+void MaxPoolLayer::maxPoolQuant8()
+{
+  MAXPOOLING_PARAMETERS
+  int32_t output_activation_min = 0;
+  int32_t output_activation_max = 0;
+  CalculateActivationRangeUint8(_activation, _outputShape, &output_activation_min,
+                                &output_activation_max);
+  op_params.quantized_activation_min = output_activation_min;
+  op_params.quantized_activation_max = output_activation_max;
+
+  nnfw::cker::MaxPool(op_params, convertShapeToCkerShape(_inputShape), _inputData.u8,
+                      convertShapeToCkerShape(_outputShape), _outputData.u8);
+}
+
+void MaxPoolLayer::configure(uint8_t *inputData, const Shape inputShape, const uint32_t paddingLeft,
+                             const uint32_t paddingRight, const uint32_t paddingTop,
+                             const uint32_t paddingBottom, const uint32_t strideWidth,
+                             const uint32_t strideHeight, const uint32_t kernelWidth,
+                             const uint32_t kernelHeight, const model::Activation activation,
+                             uint8_t *outputData, const Shape outputShape)
+{
+  _inputData.u8 = inputData;
+
+  _inputShape = inputShape;
+  _inputType = inputShape.type;
+  _paddingLeft = paddingLeft;
+  _paddingRight = paddingRight;
+  _paddingTop = paddingTop;
+  _paddingBottom = paddingBottom;
+  _strideWidth = strideWidth;
+  _strideHeight = strideHeight;
+  _kernelWidth = kernelWidth;
+  _kernelHeight = kernelHeight;
+  _activation = activation;
+  _outputData.u8 = outputData;
+  _outputShape = outputShape;
+}
+
+void MaxPoolLayer::run()
+{
+  if (_inputType == OperandType::FLOAT32)
+  {
+    maxPoolFloat32();
+  }
+  else if (_inputType == OperandType::QUANT8_ASYMM)
+  {
+    maxPoolQuant8();
+  }
+}
+
+#undef MAXPOOLING_PARAMETERS
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/kernel/MaxPoolLayer.h b/runtimes/neurun/backend/cpu/kernel/MaxPoolLayer.h
new file mode 100644
index 000000000..2f4d2fb74
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/MaxPoolLayer.h
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_KERNEL_MAXPOOLLAYER_H__
+#define __NEURUN_BACKEND_CPU_KERNEL_MAXPOOLLAYER_H__
+
+#include <exec/IFunction.h>
+
+#include "OperationUtils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+class MaxPoolLayer : public ::neurun::exec::IFunction
+{
+public:
+  MaxPoolLayer();
+
+public:
+  void maxPoolFloat32();
+
+  void maxPoolQuant8();
+
+  void configure(uint8_t *inputData, const Shape inputShape, const uint32_t paddingLeft,
+                 const uint32_t paddingRight, const uint32_t paddingTop,
+                 const uint32_t paddingBottom, const uint32_t strideWidth,
+                 const uint32_t strideHeight, const uint32_t kernelWidth,
+                 const uint32_t kernelHeight, const model::Activation activation,
+                 uint8_t *outputData, const Shape outputShape);
+
+  void run();
+  void runSync()
+  {
+    // this abstract method is used just for profiling and called for
+    // backend::acl_common::AclFunction
+    run();
+  }
+
+private:
+  DataPtr _inputData;
+  DataPtr _outputData;
+
+  Shape _inputShape;
+  Shape _outputShape;
+
+  uint32_t _paddingLeft;
+  uint32_t _paddingTop;
+  uint32_t _paddingRight;
+  uint32_t _paddingBottom;
+
+  uint32_t _strideWidth;
+  uint32_t _strideHeight;
+  uint32_t _kernelWidth;
+  uint32_t _kernelHeight;
+
+  model::Activation _activation;
+
+  OperandType _inputType;
+};
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_KERNEL_MAXPOOLLAYER_H__
diff --git a/runtimes/neurun/backend/cpu/kernel/OperationUtils.cc b/runtimes/neurun/backend/cpu/kernel/OperationUtils.cc
new file mode 100644
index 000000000..40b7ef3d6
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/OperationUtils.cc
@@ -0,0 +1,239 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "OperationUtils.h"
+
+#include <cmath>
+#include <algorithm>
+#include <cassert>
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+uint32_t getNumberOfDimensions(const Shape &shape) { return shape.dimensions.size(); }
+
+uint32_t getNumberOfElements(const Shape &shape)
+{
+  uint32_t count = 1;
+  for (size_t i = 0; i < shape.dimensions.size(); i++)
+  {
+    count *= shape.dimensions[i];
+  }
+  return count;
+}
+
+uint32_t getSizeOfDimension(const Shape &shape, uint32_t dimensionIdx)
+{
+  if (dimensionIdx >= shape.dimensions.size())
+  {
+    // TODO, log the error
+    return 0;
+  }
+  return shape.dimensions[dimensionIdx];
+}
+
+void QuantizeMultiplier(double double_multiplier, int32_t *quantized_multiplier, int *shift)
+{
+  if (double_multiplier == 0.)
+  {
+    *quantized_multiplier = 0;
+    *shift = 0;
+    return;
+  }
+  const double q = std::frexp(double_multiplier, shift);
+  auto q_fixed = static_cast<int64_t>(std::round(q * (1ll << 31)));
+
+  assert(q_fixed <= (1ll << 31));
+  if (q_fixed == (1ll << 31))
+  {
+    q_fixed /= 2;
+    ++*shift;
+  }
+  assert(q_fixed <= std::numeric_limits<int32_t>::max());
+  *quantized_multiplier = static_cast<int32_t>(q_fixed);
+}
+
+void GetQuantizedConvolutionMultiplier(const Shape &inputShape, const Shape &filterShape,
+                                       const Shape &biasShape, const Shape &outputShape,
+                                       float *multiplier)
+{
+  const float input_product_scale = inputShape.scale * filterShape.scale;
+  const float bias_scale = biasShape.scale;
+  const float output_scale = outputShape.scale;
+  // The following conditions must be guaranteed by the training pipeline.
+  UNUSED_RELEASE(bias_scale);
+  assert(std::abs(input_product_scale - bias_scale) <=
+         1e-6 * std::min(input_product_scale, bias_scale));
+  assert(input_product_scale >= 0);
+  assert(input_product_scale < output_scale);
+  *multiplier = input_product_scale / output_scale;
+}
+
+void QuantizeMultiplierGreaterThanOne(double double_multiplier, int32_t *quantized_multiplier,
+                                      int *left_shift)
+{
+  assert(double_multiplier > 1.);
+  const double q = std::frexp(double_multiplier, left_shift);
+  int64_t q_fixed = static_cast<int64_t>(std::round(q * (1ll << 31)));
+  assert(q_fixed <= (1ll << 31));
+  if (q_fixed == (1ll << 31))
+  {
+    q_fixed /= 2;
+    ++*left_shift;
+  }
+  assert(*left_shift >= 0);
+  assert(q_fixed <= std::numeric_limits<int32_t>::max());
+  *quantized_multiplier = static_cast<int32_t>(q_fixed);
+}
+
+void CalculateActivationRangeFloat(model::Activation activation, float *activation_min,
+                                   float *activation_max)
+{
+  if (activation == model::Activation::RELU)
+  {
+    *activation_min = 0.f;
+    *activation_max = std::numeric_limits<float>::max();
+  }
+  else if (activation == model::Activation::RELU6)
+  {
+    *activation_min = 0.f;
+    *activation_max = 6.f;
+  }
+  else if (activation == model::Activation::RELU1)
+  {
+    *activation_min = -1.f;
+    *activation_max = 1.f;
+  }
+  else if (activation == model::Activation::NONE)
+  {
+    *activation_min = std::numeric_limits<float>::lowest();
+    *activation_max = std::numeric_limits<float>::max();
+  }
+  else
+  {
+    std::cout << "Unsupported fused activation function." << std::endl;
+  }
+}
+
+void CalculateActivationRangeUint8(model::Activation activation, const Shape &outputShape,
+                                   int32_t *act_min, int32_t *act_max)
+{
+  const int32_t qmin = std::numeric_limits<uint8_t>::min();
+  const int32_t qmax = std::numeric_limits<uint8_t>::max();
+  const auto scale = outputShape.scale;
+  const auto zero_point = outputShape.offset;
+  auto quantize = [scale, zero_point](float f) {
+    return zero_point + static_cast<int32_t>(std::round(f / scale));
+  };
+  if (activation == model::Activation::RELU)
+  {
+    *act_min = std::max(qmin, quantize(0.0));
+    *act_max = qmax;
+  }
+  else if (activation == model::Activation::RELU6)
+  {
+    *act_min = std::max(qmin, quantize(0.0));
+    *act_max = std::min(qmax, quantize(6.0));
+  }
+  else if (activation == model::Activation::RELU1)
+  {
+    *act_min = std::max(qmin, quantize(-1.0));
+    *act_max = std::min(qmax, quantize(1.0));
+  }
+  else if (activation == model::Activation::NONE)
+  {
+    *act_min = qmin;
+    *act_max = qmax;
+  }
+  else
+  {
+    std::cout << "Unsupported fused activation function." << std::endl;
+  }
+}
+
+int32_t CalculateInputRadius(int input_integer_bits, int input_left_shift)
+{
+  const double max_input_rescaled = 1.0 * ((1 << input_integer_bits) - 1) *
+                                    (1ll << (31 - input_integer_bits)) / (1ll << input_left_shift);
+  // Tighten bound using floor.  Suppose that we could use the exact value.
+  // After scaling the difference, the result would be at the maximum.  Thus we
+  // must ensure that our value has lower magnitude.
+  return static_cast<int32_t>(std::floor(max_input_rescaled));
+}
+
+Shape getShape(const ::neurun::model::Operand &o, ::neurun::model::Layout frontend_layout)
+{
+  Shape shape;
+
+  auto dims = o.shape().dims();
+  if (frontend_layout == ::neurun::model::Layout::NCHW && o.shape().rank() == 4)
+  {
+    // NCHW -> NHWC
+    uint32_t permutation[4] = {0, 2, 3, 1};
+    for (int i = 0; i < o.shape().rank(); ++i)
+    {
+      dims.at(i) = o.shape().dim(permutation[i]);
+    }
+  }
+  shape.dimensions = std::vector<uint32_t>(dims.begin(), dims.end());
+  shape.type = static_cast<OperandType>(static_cast<int32_t>(o.typeInfo().type()));
+  shape.scale = o.typeInfo().scale();
+  shape.offset = o.typeInfo().offset();
+
+  // CPU backend assume that neurun internal shape's rank is always same or less than 4
+  assert(shape.dimensions.size() <= 4);
+
+  return shape;
+}
+
+uint32_t sizeOfData(OperandType type, const std::vector<uint32_t> &dimensions)
+{
+  uint32_t size = 4;
+
+  switch (type)
+  {
+    case OperandType::FLOAT32:
+    case OperandType::INT32:
+    case OperandType::UINT32:
+      size = 4;
+      break;
+    case OperandType::BOOL8:
+    case OperandType::QUANT8_ASYMM:
+      size = 1;
+      break;
+    default:
+      throw std::runtime_error("Not supported operand type.");
+      break;
+  }
+
+  for (auto d : dimensions)
+  {
+    size *= d;
+  }
+
+  return size;
+}
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/kernel/OperationUtils.h b/runtimes/neurun/backend/cpu/kernel/OperationUtils.h
new file mode 100644
index 000000000..dc5bab90a
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/OperationUtils.h
@@ -0,0 +1,149 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNFW_SUPPORT_NNAPI_OPERATION_UTILS_H__
+#define __NNFW_SUPPORT_NNAPI_OPERATION_UTILS_H__
+
+#include <iostream>
+#include <limits>
+#include <vector>
+
+#include <cker/Shape.h>
+
+#include "model/Operand.h"
+#include "model/DataType.h"
+#include <model/InternalType.h>
+
+using OperandType = neurun::model::DataType;
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+struct Shape
+{
+  OperandType type;
+  std::vector<uint32_t> dimensions;
+  float scale;
+  int32_t offset;
+};
+
+union DataPtr {
+  uint8_t *u8;
+  int8_t *i8;
+  int32_t *i32;
+  float *f;
+  void *v;
+};
+
+uint32_t getNumberOfDimensions(const Shape &shape);
+
+uint32_t getNumberOfElements(const Shape &shape);
+
+uint32_t getSizeOfDimension(const Shape &shape, uint32_t dimensionIdx);
+
+inline nnfw::cker::Shape convertToExtendedCkerShape(const Shape &shape)
+{
+  std::vector<int32_t> raw_shape;
+  raw_shape.resize(4);
+
+  uint32_t src = 4 - shape.dimensions.size();
+  for (uint32_t i = 0; i < 4; ++i)
+  {
+    if (i < src)
+    {
+      raw_shape[i] = 1;
+    }
+    else
+    {
+      raw_shape[i] = shape.dimensions[i - src];
+    }
+  }
+
+  return nnfw::cker::GetShape(raw_shape);
+}
+
+inline nnfw::cker::Shape convertShapeToCkerShape(const Shape &shape)
+{
+  std::vector<int32_t> raw_shape;
+  raw_shape.resize(4);
+
+  for (uint32_t i = 0; i < 4; ++i)
+  {
+    if (i >= shape.dimensions.size())
+    {
+      raw_shape[i] = 1;
+    }
+    else
+    {
+      raw_shape[i] = shape.dimensions[i];
+    }
+  }
+
+  return nnfw::cker::GetShape(raw_shape);
+}
+
+inline int32_t getAxis(uint32_t rank, int32_t axis, ::neurun::model::Layout frontend_layout)
+{
+  auto ret = axis;
+
+  if (axis < 0)
+  {
+    ret += rank;
+  }
+
+  // NCHW -> NHWC
+  if (frontend_layout == ::neurun::model::Layout::NCHW)
+  {
+    int32_t permutation[4] = {0, 3, 1, 2};
+    ret = permutation[ret];
+  }
+
+  return ret;
+}
+
+void QuantizeMultiplier(double double_multiplier, int32_t *quantized_multiplier, int *shift);
+
+void GetQuantizedConvolutionMultiplier(const Shape &inputShape, const Shape &filterShape,
+                                       const Shape &biasShape, const Shape &outputShape,
+                                       float *multiplier);
+
+void QuantizeMultiplierGreaterThanOne(double double_multiplier, int32_t *quantized_multiplier,
+                                      int *left_shift);
+
+void CalculateActivationRangeFloat(model::Activation activation, float *activation_min,
+                                   float *activation_max);
+
+void CalculateActivationRangeUint8(model::Activation activation, const Shape &outputShape,
+                                   int32_t *act_min, int32_t *act_max);
+
+int32_t CalculateInputRadius(int input_integer_bits, int input_left_shift);
+
+Shape getShape(const ::neurun::model::Operand &o, ::neurun::model::Layout frontend_layout);
+
+uint32_t sizeOfData(OperandType type, const std::vector<uint32_t> &dimensions);
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NNFW_SUPPORT_NNAPI_OPERATION_UTILS_H__
diff --git a/runtimes/neurun/backend/cpu/kernel/PermuteLayer.cc b/runtimes/neurun/backend/cpu/kernel/PermuteLayer.cc
new file mode 100644
index 000000000..3be904351
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/PermuteLayer.cc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "PermuteLayer.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+using Type = model::operation::PermuteNode::Type;
+
+void PermuteLayer::configure(std::shared_ptr<::neurun::backend::operand::IObject> input,
+                             std::shared_ptr<::neurun::backend::operand::IObject> output,
+                             const model::Shape &output_shape, Type type, model::DataType dataType)
+{
+  _input = input;
+  _output = output;
+  _output_shape = output_shape;
+  _type = type;
+  _dataType = dataType;
+}
+
+void PermuteLayer::run()
+{
+  using ::neurun::model::DataType;
+  switch (_dataType)
+  {
+    case DataType::FLOAT32:
+      runTempl<float>();
+      break;
+    case DataType::INT32:
+      runTempl<int32_t>();
+      break;
+    case DataType::UINT32:
+      runTempl<uint32_t>();
+      break;
+    case DataType::BOOL8:
+    case DataType::QUANT8_ASYMM:
+      runTempl<uint8_t>();
+      break;
+    default:
+      throw std::runtime_error("NYI");
+      break;
+  }
+}
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/kernel/PermuteLayer.h b/runtimes/neurun/backend/cpu/kernel/PermuteLayer.h
new file mode 100644
index 000000000..3acb2cc1f
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/PermuteLayer.h
@@ -0,0 +1,211 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_KERNEL_PERMUTE_LAYER_H__
+#define __NEURUN_BACKEND_CPU_KERNEL_PERMUTE_LAYER_H__
+
+#include <exec/IFunction.h>
+
+#include "util/feature/nhwc/View.h"
+#include "OperationUtils.h"
+#include <backend/operand/IObject.h>
+#include "model/operation/PermuteNode.h"
+#include "util/feature/nhwc/Reader.h"
+#include "util/feature/nchw/View.h"
+#include "util/Coordinates.h"
+
+#include <misc/feature/IndexIterator.h>
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+class PermuteLayer : public ::neurun::exec::IFunction
+{
+public:
+  PermuteLayer() = default;
+
+public:
+  void configure(std::shared_ptr<::neurun::backend::operand::IObject> input,
+                 std::shared_ptr<::neurun::backend::operand::IObject> output,
+                 const model::Shape &output_shape, model::operation::PermuteNode::Type type,
+                 model::DataType dataType);
+  void run();
+  void runSync()
+  {
+    // this abstract method is used just for profiling and called for
+    // backend::acl_common::AclFunction
+    run();
+  }
+
+private:
+  template <class T> void runTempl()
+  {
+    auto rank = _output_shape.rank();
+    auto fn = [&](::neurun::backend::operand::ITensor &in_tensor) {
+      _output->access([&](::neurun::backend::operand::ITensor &out_tensor) {
+        auto input_buffer = in_tensor.buffer();
+        auto input_size = in_tensor.total_size();
+        auto output_buffer = out_tensor.buffer();
+        if (_type == model::operation::PermuteNode::Type::COPY)
+        {
+          assert(in_tensor.layout() == out_tensor.layout());
+          if (!in_tensor.has_padding() && !out_tensor.has_padding())
+          {
+            assert(input_size == out_tensor.total_size());
+            memcpy(output_buffer, input_buffer, input_size);
+            return;
+          }
+        }
+        switch (rank)
+        {
+          case 0:
+          case 1:
+          {
+            const int32_t copy_len = _output_shape.dim(0);
+
+            memcpy(output_buffer, input_buffer, copy_len);
+            break;
+          }
+          case 2:
+          {
+            const int32_t copy_len = _output_shape.dim(1);
+
+            for (auto i = 0; i < _output_shape.dim(0); ++i)
+            {
+              neurun::util::Coordinates coords{i, 0};
+              memcpy(output_buffer + out_tensor.calcOffset(coords),
+                     input_buffer + in_tensor.calcOffset(coords), copy_len * sizeof(T));
+            }
+            break;
+          }
+          case 3:
+          {
+            const int32_t copy_len = _output_shape.dim(2);
+
+            for (auto i = 0; i < _output_shape.dim(0); ++i)
+            {
+              for (auto j = 0; j < _output_shape.dim(1); ++j)
+              {
+                neurun::util::Coordinates coords{i, j, 0};
+                memcpy(output_buffer + out_tensor.calcOffset(coords),
+                       input_buffer + in_tensor.calcOffset(coords), copy_len * sizeof(T));
+              }
+            }
+            break;
+          }
+          case 4:
+          {
+            // TODO Unify permute type and remove switch case
+            switch (_type)
+            {
+              case model::operation::PermuteNode::Type::NHWC_TO_NCHW:
+              {
+                for (auto n = 0; n < _output_shape.dim(0); ++n)
+                {
+                  for (auto c = 0; c < _output_shape.dim(1); ++c)
+                  {
+                    for (auto h = 0; h < _output_shape.dim(2); ++h)
+                    {
+                      for (auto w = 0; w < _output_shape.dim(3); ++w)
+                      {
+                        const neurun::util::Coordinates in_coords{n, h, w, c};
+                        const auto out_coords =
+                            convertCoordinates(in_coords, in_tensor.layout(), out_tensor.layout());
+                        const auto value =
+                            *reinterpret_cast<T *>(input_buffer + in_tensor.calcOffset(in_coords));
+                        *reinterpret_cast<T *>(output_buffer + out_tensor.calcOffset(out_coords)) =
+                            value;
+                      }
+                    }
+                  }
+                }
+                break;
+              }
+              case model::operation::PermuteNode::Type::NCHW_TO_NHWC:
+              {
+                for (auto n = 0; n < _output_shape.dim(0); ++n)
+                {
+                  for (auto h = 0; h < _output_shape.dim(1); ++h)
+                  {
+                    for (auto w = 0; w < _output_shape.dim(2); ++w)
+                    {
+                      for (auto c = 0; c < _output_shape.dim(3); ++c)
+                      {
+                        const neurun::util::Coordinates in_coords{n, c, h, w};
+                        const auto out_coords =
+                            convertCoordinates(in_coords, in_tensor.layout(), out_tensor.layout());
+                        const auto value =
+                            *reinterpret_cast<T *>(input_buffer + in_tensor.calcOffset(in_coords));
+                        *reinterpret_cast<T *>(output_buffer + out_tensor.calcOffset(out_coords)) =
+                            value;
+                      }
+                    }
+                  }
+                }
+                break;
+              }
+              case model::operation::PermuteNode::Type::COPY:
+              {
+                const int32_t copy_len = _output_shape.dim(3);
+
+                for (auto i = 0; i < _output_shape.dim(0); ++i)
+                {
+                  for (auto j = 0; j < _output_shape.dim(1); ++j)
+                  {
+                    for (auto k = 0; k < _output_shape.dim(2); ++k)
+                    {
+                      neurun::util::Coordinates coords{i, j, k, 0};
+                      memcpy(output_buffer + out_tensor.calcOffset(coords),
+                             input_buffer + in_tensor.calcOffset(coords), copy_len * sizeof(T));
+                    }
+                  }
+                }
+                break;
+              }
+              default:
+                throw std::runtime_error("NYI");
+                break;
+            }
+            break;
+          }
+          default:
+            throw std::runtime_error("NYI");
+            break;
+        }
+      });
+    };
+    _input->access(fn);
+  }
+
+private:
+  std::shared_ptr<::neurun::backend::operand::IObject> _input{nullptr};
+  std::shared_ptr<::neurun::backend::operand::IObject> _output{nullptr};
+  model::Shape _output_shape{};
+  model::operation::PermuteNode::Type _type{model::operation::PermuteNode::Type::COPY};
+  model::DataType _dataType{model::DataType::FLOAT32};
+};
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_KERNEL_PERMUTE_LAYER_H__
diff --git a/runtimes/neurun/backend/cpu/kernel/ReshapeLayer.cc b/runtimes/neurun/backend/cpu/kernel/ReshapeLayer.cc
new file mode 100644
index 000000000..3cf3ae3c2
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/ReshapeLayer.cc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ReshapeLayer.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+ReshapeLayer::ReshapeLayer() : _inputData(), _outputData(), _inputShape(), _outputShape()
+{
+  // DO NOTHING
+}
+
+void ReshapeLayer::reshapeGeneric()
+{
+  size_t count = sizeOfData(_inputShape.type, _inputShape.dimensions);
+  memcpy(_outputData.v, _inputData.v, count);
+}
+
+void ReshapeLayer::configure(uint8_t *inputData, const Shape &inputShape, uint8_t *outputData,
+                             const Shape &outputShape)
+{
+  _inputData.u8 = inputData;
+  _inputShape = inputShape;
+  _outputData.u8 = outputData;
+  _outputShape = outputShape;
+}
+
+void ReshapeLayer::run() { reshapeGeneric(); }
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/kernel/ReshapeLayer.h b/runtimes/neurun/backend/cpu/kernel/ReshapeLayer.h
new file mode 100644
index 000000000..dccd82cd0
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/ReshapeLayer.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_KERNEL_RESHAPELAYER_H__
+#define __NEURUN_BACKEND_CPU_KERNEL_RESHAPELAYER_H__
+
+#include <exec/IFunction.h>
+
+#include "OperationUtils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+class ReshapeLayer : public ::neurun::exec::IFunction
+{
+public:
+  ReshapeLayer();
+
+public:
+  void reshapeGeneric();
+
+  void configure(uint8_t *inputData, const Shape &inputShape, uint8_t *outputData,
+                 const Shape &outputShape);
+
+  void run();
+  void runSync()
+  {
+    // this abstract method is used just for profiling and called for
+    // backend::acl_common::AclFunction
+    run();
+  }
+
+private:
+  DataPtr _inputData;
+  DataPtr _outputData;
+
+  Shape _inputShape;
+  Shape _outputShape;
+};
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_KERNEL_RESHAPELAYER_H__
diff --git a/runtimes/neurun/backend/cpu/kernel/SoftMaxLayer.cc b/runtimes/neurun/backend/cpu/kernel/SoftMaxLayer.cc
new file mode 100644
index 000000000..f71a779bd
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/SoftMaxLayer.cc
@@ -0,0 +1,171 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "SoftMaxLayer.h"
+
+#include <cker/operation/SoftMax.h>
+
+#include "OperationUtils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+SoftMaxLayer::SoftMaxLayer()
+    : _inputData(), _outputData(), _beta(0.0), _inputShape(), _outputShape(),
+      _inputType(OperandType::FLOAT32)
+{
+  // DO NOTHING
+}
+
+// Performs softmax along the input of size (input_size * batch_size).
+void Softmax(const float *in, const int input_size, const int batch_size, const float beta,
+             float *out)
+{
+  assert(input_size > 0);
+
+  // For each batch
+  for (int b = 0; b < batch_size; b++)
+  {
+    // Find the max coeff.
+    float max_coeff = in[0];
+    for (int i = 1; i < input_size; i++)
+    {
+      if (in[i] > max_coeff)
+        max_coeff = in[i];
+    }
+
+    // Compute the normalized sum of exps.
+    float exp_sum = 0.0;
+    for (int i = 0; i < input_size; i++)
+    {
+      out[i] = std::exp((in[i] - max_coeff) * beta);
+      exp_sum += out[i];
+    }
+
+    // Divide by the sum of exps.
+    float reciprocal_sum_exp = 1.f / exp_sum;
+    for (int i = 0; i < input_size; i++)
+    {
+      out[i] *= reciprocal_sum_exp;
+    }
+
+    // Advance in and out pointers for the next batch.
+    in += input_size;
+    out += input_size;
+  }
+}
+
+void SoftMaxLayer::softmaxFloat32()
+{
+  Shape shapeIn4D;
+
+  if (getNumberOfDimensions(_inputShape) == 2)
+  {
+    uint32_t batch_size = getSizeOfDimension(_inputShape, 0);
+    if (batch_size == 0)
+      throw std::runtime_error("batch_size should not be 0");
+
+    uint32_t input_size = getNumberOfElements(_inputShape) / batch_size;
+    Softmax(_inputData.f, input_size, batch_size, _beta, _outputData.f);
+  }
+  else if (getNumberOfDimensions(_inputShape) == 4)
+  {
+    nnfw::cker::SoftmaxParams op_params;
+    op_params.beta = _beta;
+    nnfw::cker::Softmax(op_params, convertShapeToCkerShape(_inputShape), _inputData.f,
+                        convertShapeToCkerShape(_outputShape), _outputData.f);
+  }
+  else
+  {
+    throw std::runtime_error{"only 2D and 4D tensors supported"};
+  }
+}
+
+void SoftMaxLayer::softmaxQuant8()
+{
+  Shape shapeIn4D = _inputShape;
+
+  if (getNumberOfDimensions(_inputShape) == 2)
+  {
+    uint32_t batch_size = getSizeOfDimension(_inputShape, 0);
+    if (batch_size == 0)
+      throw std::runtime_error("batch_size should not be 0");
+
+    uint32_t input_size = getNumberOfElements(_inputShape) / batch_size;
+    shapeIn4D.dimensions = {batch_size, 1, 1, input_size};
+  }
+  else if (getNumberOfDimensions(_inputShape) == 4)
+  {
+    shapeIn4D = _inputShape;
+  }
+  else
+  {
+    throw std::runtime_error{"only 2D and 4D tensors supported"};
+  }
+  if (_outputShape.offset != 0 || _outputShape.scale != 1.f / 256)
+  {
+    throw std::runtime_error{"incorrect scale / offset for output"};
+  }
+  static const int32_t kScaledDiffIntegerBits = 5;
+  const double input_beta_real_multiplier = std::min(
+      1.0 * _beta * _inputShape.scale * (1 << (31 - kScaledDiffIntegerBits)), (1ll << 31) - 1.0);
+  int32_t input_multiplier = 0;
+  int32_t input_left_shift = 0;
+  QuantizeMultiplierGreaterThanOne(input_beta_real_multiplier, &input_multiplier,
+                                   &input_left_shift);
+  float diff_min = -1.0f * CalculateInputRadius(kScaledDiffIntegerBits, input_left_shift);
+
+  nnfw::cker::SoftmaxParams op_params;
+  op_params.input_multiplier = input_multiplier;
+  op_params.input_left_shift = input_left_shift;
+  op_params.diff_min = diff_min;
+  nnfw::cker::Softmax(op_params, convertShapeToCkerShape(shapeIn4D), _inputData.u8,
+                      convertShapeToCkerShape(shapeIn4D), _outputData.u8);
+}
+
+void SoftMaxLayer::configure(uint8_t *inputData, const Shape &inputShape, const float beta,
+                             uint8_t *outputData, const Shape &outputShape)
+{
+  _inputData.u8 = inputData;
+  _inputShape = inputShape;
+  _inputType = inputShape.type;
+  _outputData.u8 = outputData;
+  _outputShape = outputShape;
+  _beta = beta;
+}
+
+void SoftMaxLayer::run()
+{
+  if (_inputType == OperandType::FLOAT32)
+  {
+    softmaxFloat32();
+  }
+  else if (_inputType == OperandType::QUANT8_ASYMM)
+  {
+    softmaxQuant8();
+  }
+}
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/kernel/SoftMaxLayer.h b/runtimes/neurun/backend/cpu/kernel/SoftMaxLayer.h
new file mode 100644
index 000000000..097b3dd5a
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/kernel/SoftMaxLayer.h
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_KERNEL_SOFTMAXLAYER_H__
+#define __NEURUN_BACKEND_CPU_KERNEL_SOFTMAXLAYER_H__
+
+#include <exec/IFunction.h>
+
+#include "OperationUtils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace kernel
+{
+
+class SoftMaxLayer : public ::neurun::exec::IFunction
+{
+public:
+  SoftMaxLayer();
+
+public:
+  void softmaxFloat32();
+
+  void softmaxQuant8();
+
+  void configure(uint8_t *inputData, const Shape &inputShape, const float beta, uint8_t *outputData,
+                 const Shape &outputShape);
+
+  void run();
+  void runSync()
+  {
+    // this abstract method is used just for profiling and called for
+    // backend::acl_common::AclFunction
+    run();
+  }
+
+private:
+  DataPtr _inputData;
+  DataPtr _outputData;
+
+  float _beta;
+
+  Shape _inputShape;
+  Shape _outputShape;
+
+  OperandType _inputType;
+};
+
+} // namespace kernel
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_KERNEL_SOFTMAXLAYER_H__
diff --git a/runtimes/neurun/backend/cpu/operand/Tensor.cc b/runtimes/neurun/backend/cpu/operand/Tensor.cc
new file mode 100644
index 000000000..29e6eb846
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/operand/Tensor.cc
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "Tensor.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace operand
+{
+
+size_t Tensor::calcOffset(const neurun::util::Coordinates &coords) const
+{
+  size_t rank = num_dimensions();
+  size_t offset = 0;
+  for (size_t i = 0; i < rank; ++i)
+  {
+    offset = offset * dimension(i) + coords[i];
+  }
+  offset *= sizeOfDataType(data_type());
+  return offset;
+}
+
+} // namespace operand
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/cpu/operand/Tensor.h b/runtimes/neurun/backend/cpu/operand/Tensor.h
new file mode 100644
index 000000000..d0bfbf340
--- /dev/null
+++ b/runtimes/neurun/backend/cpu/operand/Tensor.h
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CPU_OPERAND_TENSOR_H__
+#define __NEURUN_BACKEND_CPU_OPERAND_TENSOR_H__
+
+#include <backend/operand/ITensor.h>
+#include "model/OperandInfo.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace cpu
+{
+namespace operand
+{
+
+class Tensor : public ::neurun::backend::operand::ITensor
+{
+public:
+  Tensor() = delete;
+
+public:
+  Tensor(const model::OperandInfo &info) : _info(info)
+  {
+    // DO NOTHING
+  }
+
+public:
+  void setBuffer(uint8_t *buffer) { _buffer = buffer; }
+  ::neurun::model::DataType data_type() const { return _info.typeInfo().type(); }
+
+public:
+  uint8_t *buffer() const override { return _buffer; }
+  /**
+   * @brief Get dimension by index
+   *
+   * @param index Index to get diemension
+   * @return size_t Dimension at index
+   * @note N : dimension(0)
+   *       H : dimension(1)
+   *       W : dimension(2)
+   *       C : dimension(3)
+   */
+  size_t dimension(size_t index) const override { return _info.shape().dim(index); }
+  size_t num_dimensions() const override { return _info.shape().rank(); }
+  size_t total_size() const override { return _info.total_size(); }
+  size_t calcOffset(const neurun::util::Coordinates &coords) const override;
+  model::Layout layout() const override { return model::Layout::NHWC; }
+  bool has_padding() const override { return false; }
+
+private:
+  model::OperandInfo _info;
+  uint8_t *_buffer = nullptr;
+};
+
+} // namespace operand
+} // namespace cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CPU_OPERAND_TENSOR_H__
diff --git a/runtimes/neurun/backend/hi_perf_cpu/CMakeLists.txt b/runtimes/neurun/backend/hi_perf_cpu/CMakeLists.txt
new file mode 100644
index 000000000..816edba5e
--- /dev/null
+++ b/runtimes/neurun/backend/hi_perf_cpu/CMakeLists.txt
@@ -0,0 +1,44 @@
+set(LIB_NEURUN_BACKEND_HI_PERF_CPU neurun_backend_hi_perf)
+
+nnfw_find_package(NNPACK QUIET)
+
+option(BUILD_NEURUN_HI_PERF_CPU_BACKEND
+  "Build neurun HI_PERF_CPU backend"
+  ${NNPACK_FOUND} # Default value when there is no explicit user request
+)
+
+message(STATUS "Build neurun HI_PERF_CPU backend: ${BUILD_NEURUN_HI_PERF_CPU_BACKEND}")
+
+if(NOT BUILD_NEURUN_HI_PERF_CPU_BACKEND)
+  return()
+endif(NOT BUILD_NEURUN_HI_PERF_CPU_BACKEND)
+
+file(GLOB_RECURSE SOURCES "*.cc")
+file(GLOB_RECURSE TESTS "*.test.cc")
+list(REMOVE_ITEM SOURCES ${TESTS})
+
+add_library(${LIB_NEURUN_BACKEND_HI_PERF_CPU} SHARED ${SOURCES})
+
+target_link_libraries(${LIB_NEURUN_BACKEND_HI_PERF_CPU} PRIVATE nnfw_lib_misc)
+target_link_libraries(${LIB_NEURUN_BACKEND_HI_PERF_CPU} PRIVATE nnfw_lib_cpp14)
+target_link_libraries(${LIB_NEURUN_BACKEND_HI_PERF_CPU} PRIVATE neurun_core)
+target_link_libraries(${LIB_NEURUN_BACKEND_HI_PERF_CPU} PRIVATE nnfw_common)
+target_link_libraries(${LIB_NEURUN_BACKEND_HI_PERF_CPU} PRIVATE nnpack pthreadpool cpuinfo)
+target_link_libraries(${LIB_NEURUN_BACKEND_HI_PERF_CPU} PRIVATE nnfw_coverage)
+target_include_directories(${LIB_NEURUN_BACKEND_HI_PERF_CPU} PRIVATE ${NNPACK_INCLUDE_DIRS})
+
+set_target_properties(${LIB_NEURUN_BACKEND_HI_PERF_CPU} PROPERTIES OUTPUT_NAME backend_NNPACK)
+
+install(TARGETS ${LIB_NEURUN_BACKEND_HI_PERF_CPU} DESTINATION lib)
+
+# Unit Tests
+set(TEST_NEURUN_BACKEND_HI_PERF_CPU test_neurun_backend_hi_perf)
+
+add_executable(${TEST_NEURUN_BACKEND_HI_PERF_CPU} ${TESTS})
+
+target_link_libraries(${TEST_NEURUN_BACKEND_HI_PERF_CPU} ${LIB_NEURUN_BACKEND_HI_PERF_CPU})
+target_link_libraries(${TEST_NEURUN_BACKEND_HI_PERF_CPU} gtest gtest_main ${LIB_PTHREAD})
+target_link_libraries(${TEST_NEURUN_BACKEND_HI_PERF_CPU} nnpack)
+
+add_test(${TEST_NEURUN_BACKEND_HI_PERF_CPU} ${TEST_NEURUN_BACKEND_HI_PERF_CPU})
+install(TARGETS ${TEST_NEURUN_BACKEND_HI_PERF_CPU} DESTINATION unittest)
diff --git a/runtimes/neurun/backend/hi_perf_cpu/HighPerformanceBackend.test.cc b/runtimes/neurun/backend/hi_perf_cpu/HighPerformanceBackend.test.cc
new file mode 100644
index 000000000..625fe1c36
--- /dev/null
+++ b/runtimes/neurun/backend/hi_perf_cpu/HighPerformanceBackend.test.cc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <gtest/gtest.h>
+
+#include "nnpack.h"
+
+TEST(High_performance_backend, NNPACK_Test)
+{
+  // Check that it is possible to import
+  const enum nnp_status init_status = nnp_initialize();
+
+  // One of the allowed nnp status codes
+  ASSERT_GE(init_status, 0);
+  ASSERT_LE(init_status, 54);
+
+  // If it is possible to test, test relu
+  if (init_status == nnp_status_success)
+  {
+    float in[] = {-1, 1, -1, 1};
+    float out[4];
+    nnp_relu_output(1, 4, in, out, 0, nullptr);
+    for (int i = 0; i < 4; i++)
+    {
+      ASSERT_EQ(out[i], in[i] >= 0 ? in[i] : 0);
+    }
+  }
+  nnp_deinitialize();
+}
diff --git a/runtimes/neurun/backend/hi_perf_cpu/KernelGenerator.cc b/runtimes/neurun/backend/hi_perf_cpu/KernelGenerator.cc
new file mode 100644
index 000000000..a13fe12b9
--- /dev/null
+++ b/runtimes/neurun/backend/hi_perf_cpu/KernelGenerator.cc
@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "KernelGenerator.h"
+// to force compilation
diff --git a/runtimes/neurun/backend/hi_perf_cpu/KernelGenerator.h b/runtimes/neurun/backend/hi_perf_cpu/KernelGenerator.h
new file mode 100644
index 000000000..71322e743
--- /dev/null
+++ b/runtimes/neurun/backend/hi_perf_cpu/KernelGenerator.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_HI_PERF_CPU_KERNEL_GENERATOR_H__
+#define __NEURUN_BACKEND_HI_PERF_CPU_KERNEL_GENERATOR_H__
+
+#include <backend/IKernelGenerator.h>
+
+#include "model/Operands.h"
+#include "TensorBuilder.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace hi_perf_cpu
+{
+
+class KernelGenerator : public IKernelGenerator
+{
+public:
+  KernelGenerator(const neurun::model::Operands &ctx,
+                  const std::shared_ptr<TensorBuilder> &tensor_builder);
+  // TODO add more ops
+
+private:
+  const neurun::model::Operands &_ctx;
+  std::shared_ptr<TensorBuilder> _tensor_builder;
+};
+
+} // namespace hi_perf_cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_HI_PERF_CPU_KERNEL_GENERATOR_H__
diff --git a/runtimes/neurun/backend/hi_perf_cpu/TensorBuilder.cc b/runtimes/neurun/backend/hi_perf_cpu/TensorBuilder.cc
new file mode 100644
index 000000000..e6ebf5f0b
--- /dev/null
+++ b/runtimes/neurun/backend/hi_perf_cpu/TensorBuilder.cc
@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "TensorBuilder.h"
+// to force compilation
diff --git a/runtimes/neurun/backend/hi_perf_cpu/TensorBuilder.h b/runtimes/neurun/backend/hi_perf_cpu/TensorBuilder.h
new file mode 100644
index 000000000..344d80432
--- /dev/null
+++ b/runtimes/neurun/backend/hi_perf_cpu/TensorBuilder.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef NNFW_TENSORBUILDER_H
+#define NNFW_TENSORBUILDER_H
+
+#include <unordered_map>
+
+#include <backend/ITensorBuilder.h>
+#include <backend/operand/Object.h>
+#include "model/OperandIndexMap.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace hi_perf_cpu
+{
+
+class TensorBuilder : public ITensorBuilder
+{
+public:
+  TensorBuilder();
+
+private:
+};
+
+} // namespace hi_perf_cpu
+} // namespace backend
+} // namespace neurun
+
+#endif // NNFW_TENSORBUILDER_H
diff --git a/runtimes/neurun/backend/srcn/Backend.h b/runtimes/neurun/backend/srcn/Backend.h
new file mode 100644
index 000000000..6d7da689f
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/Backend.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_SRCN_BACKEND_H__
+#define __NEURUN_BACKEND_SRCN_BACKEND_H__
+
+#include <memory>
+#include <backend/Backend.h>
+#include <model/Operands.h>
+
+#include "Config.h"
+#include "ConstantInitializer.h"
+#include "KernelGenerator.h"
+#include "ShapeFixer.h"
+#include "backend/CustomKernelRegistry.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+class Backend : public ::neurun::backend::Backend
+{
+public:
+  Backend() : _config{std::make_shared<Config>()} {}
+
+  std::shared_ptr<IConfig> config() const override { return _config; }
+
+  std::unique_ptr<BackendContext>
+  newContext(const model::Operands &operands,
+             const std::shared_ptr<custom::KernelRegistry> &registry) const override
+  {
+    auto tensor_builder = std::make_shared<TensorBuilder>();
+    return std::unique_ptr<BackendContext>{new BackendContext{
+        this, tensor_builder, std::make_shared<ConstantInitializer>(operands, tensor_builder),
+        std::make_shared<KernelGenerator>(operands, tensor_builder, registry),
+        std::make_shared<ShapeFixer>(operands, tensor_builder)}};
+  }
+
+private:
+  std::shared_ptr<IConfig> _config;
+};
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_SRCN_BACKEND_H__
diff --git a/runtimes/neurun/backend/srcn/CMakeLists.txt b/runtimes/neurun/backend/srcn/CMakeLists.txt
new file mode 100644
index 000000000..b51b95133
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/CMakeLists.txt
@@ -0,0 +1,20 @@
+if(NOT BUILD_SRCN_KERNEL)
+  message(STATUS "Skip building SRCN backend: SRCN kernel library is not build")
+  return()
+endif()
+
+set(LIB_NEURUN_BACKEND_SRCN neurun_backend_srcn)
+
+file(GLOB_RECURSE SOURCES "*.cc")
+
+add_library(${LIB_NEURUN_BACKEND_SRCN} SHARED ${SOURCES})
+
+target_link_libraries(${LIB_NEURUN_BACKEND_SRCN} PUBLIC nnfw_lib_cpp14)
+target_link_libraries(${LIB_NEURUN_BACKEND_SRCN} PRIVATE nnfw_lib_srcn)
+target_link_libraries(${LIB_NEURUN_BACKEND_SRCN} PRIVATE neurun_core)
+target_link_libraries(${LIB_NEURUN_BACKEND_SRCN} PRIVATE nnfw_common)
+target_link_libraries(${LIB_NEURUN_BACKEND_SRCN} PRIVATE nnfw_coverage)
+
+set_target_properties(${LIB_NEURUN_BACKEND_SRCN} PROPERTIES OUTPUT_NAME backend_srcn)
+
+install(TARGETS ${LIB_NEURUN_BACKEND_SRCN} DESTINATION lib)
diff --git a/runtimes/neurun/backend/srcn/Config.cc b/runtimes/neurun/backend/srcn/Config.cc
new file mode 100644
index 000000000..e69136fd9
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/Config.cc
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "Config.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+void Config::initialize()
+{
+  // DO NOTHING
+}
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/srcn/Config.h b/runtimes/neurun/backend/srcn/Config.h
new file mode 100644
index 000000000..bffcbf245
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/Config.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_SRCN_CONFIG_H__
+#define __NEURUN_BACKEND_SRCN_CONFIG_H__
+
+#include <backend/IConfig.h>
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+class Config : public IConfig
+{
+public:
+  std::string id() override { return "srcn"; }
+  void initialize() override;
+  bool SupportSubTensorAlloc() override
+  {
+    // NOTE srcn allocator cannot support subtensor allocation yet
+    return false;
+  }
+};
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_SRCN_CONFIG_H__
diff --git a/runtimes/neurun/backend/srcn/ConstantInitializer.cc b/runtimes/neurun/backend/srcn/ConstantInitializer.cc
new file mode 100644
index 000000000..f37ebe9a4
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/ConstantInitializer.cc
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ConstantInitializer.h"
+
+#include "kernel/OperationUtils.h"
+
+namespace
+{
+
+template <typename T>
+static void
+PermuteKernel(const neurun::model::Operand &model_obj, neurun::backend::operand::IObject &obj,
+              const neurun::model::Layout frontend_layout = neurun::model::Layout::UNKNOWN)
+{
+  const auto shape = model_obj.shape();
+  auto base = reinterpret_cast<const T *>(model_obj.data().base());
+
+  assert(shape.rank() == 4);
+
+  // TODO Support frontend layout
+  UNUSED_RELEASE(frontend_layout);
+
+  obj.access([&](::neurun::backend::operand::ITensor &tensor) {
+    // NOTE The srcn takes a HWOI layout as kernel filter even though image layout is NHWC.
+    //      This policy is the same with the tensorflow policy.
+    //      So using srcn library, we need to change kernel layout to HWOI from OHWI.
+    const int32_t outch = shape.dim(0);
+    const int32_t height = shape.dim(1);
+    const int32_t width = shape.dim(2);
+    const int32_t inch = shape.dim(3);
+    const auto to_dim = ::neurun::backend::srcn::kernel::convertCoordinates(
+        {outch, height, width, inch}, ::neurun::backend::srcn::kernel::FilterLayout::OHWI,
+        ::neurun::backend::srcn::kernel::FilterLayout::HWOI);
+    for (auto i = 0; i < outch; ++i)
+    {
+      for (auto j = 0; j < height; ++j)
+      {
+        for (auto k = 0; k < width; ++k)
+        {
+          for (auto l = 0; l < inch; ++l)
+          {
+            const auto coords = ::neurun::backend::srcn::kernel::convertCoordinates(
+                {i, j, k, l}, ::neurun::backend::srcn::kernel::FilterLayout::OHWI,
+                ::neurun::backend::srcn::kernel::FilterLayout::HWOI);
+            const size_t offset = coords[0] * to_dim[1] * to_dim[2] * to_dim[3] +
+                                  coords[1] * to_dim[2] * to_dim[3] + coords[2] * to_dim[3] +
+                                  coords[3];
+            T *into = reinterpret_cast<T *>(tensor.buffer() + offset * sizeof(T));
+            T value = *(base + i * height * width * inch + j * width * inch + k * inch + l);
+            *into = value;
+          }
+        }
+      }
+    }
+  });
+}
+}
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+ConstantInitializer::ConstantInitializer(const model::Operands &operands,
+                                         const std::shared_ptr<TensorBuilder> &tensor_builder)
+    : _operands{operands}, _tensor_builder{tensor_builder}
+{
+  // DO NOTHING
+}
+
+void ConstantInitializer::run()
+{
+  for (const auto &it : _init_map)
+  {
+    const auto &ind = it.first;
+    const auto &fn = it.second;
+
+    const auto &model_obj = _operands.at(ind);
+    auto tensor_obj = _tensor_builder->wrapTensor(ind);
+    fn(model_obj, *tensor_obj);
+  }
+
+  _init_map.clear();
+}
+
+void ConstantInitializer::registerPermuteKernelInitializer(const model::OperandIndex &index,
+                                                           const model::Operand &obj)
+{
+  // For only CONSTANTS
+  if (!obj.isConstant())
+    return;
+
+  VERBOSE(FillOperandData) << "[SRCN] Fill data for operand " << index.value() << std::endl;
+
+  const auto type = obj.typeInfo().type();
+  using neurun::model::DataType;
+  using namespace std::placeholders;
+
+  switch (type)
+  {
+    case DataType::FLOAT32:
+      _init_map[index] = std::bind(PermuteKernel<float>, _1, _2, _current_subg_layout);
+      break;
+    case DataType::INT32:
+      _init_map[index] = std::bind(PermuteKernel<int32_t>, _1, _2, _current_subg_layout);
+      break;
+    case DataType::UINT32:
+      _init_map[index] = std::bind(PermuteKernel<uint32_t>, _1, _2, _current_subg_layout);
+      break;
+    case DataType::BOOL8:
+    case DataType::QUANT8_ASYMM:
+      _init_map[index] = std::bind(PermuteKernel<uint8_t>, _1, _2, _current_subg_layout);
+      break;
+    default:
+      throw std::runtime_error("Not supported, yet");
+      break;
+  }
+}
+
+void ConstantInitializer::visit(const model::operation::TransposeConvNode &node)
+{
+  const auto &kernel_index = node.getInputs().at(model::operation::TransposeConvNode::KERNEL);
+  const auto &kernel_obj = _operands.at(kernel_index);
+  registerPermuteKernelInitializer(kernel_index, kernel_obj);
+}
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/srcn/ConstantInitializer.h b/runtimes/neurun/backend/srcn/ConstantInitializer.h
new file mode 100644
index 000000000..9865084c0
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/ConstantInitializer.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_COMPILER_SRCN_CONSTANT_INITIALIZER_H__
+#define __NEURUN_COMPILER_SRCN_CONSTANT_INITIALIZER_H__
+
+#include <backend/IConstantInitializer.h>
+#include <model/Operands.h>
+#include "TensorBuilder.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+class ConstantInitializer : public IConstantInitializer
+{
+public:
+  ConstantInitializer(const model::Operands &operands,
+                      const std::shared_ptr<TensorBuilder> &tensor_builder);
+
+public:
+  void run() override;
+
+public:
+  void registerPermuteKernelInitializer(const model::OperandIndex &index,
+                                        const model::Operand &obj);
+
+public:
+  void visit(const model::operation::TransposeConvNode &) override;
+
+private:
+  const model::Operands &_operands;
+  std::shared_ptr<TensorBuilder> _tensor_builder;
+};
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_COMPILER_SRCN_CONSTANT_INITIALIZER_H__
diff --git a/runtimes/neurun/backend/srcn/KernelGenerator.cc b/runtimes/neurun/backend/srcn/KernelGenerator.cc
new file mode 100644
index 000000000..c0cd8b43c
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/KernelGenerator.cc
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "KernelGenerator.h"
+
+#include <stdexcept>
+
+#include "cpp14/memory.h"
+#include "util/Padding.h"
+#include "kernel/TransposeConvLayer.h"
+
+#include <backend/Backend.h>
+#include <backend/IConfig.h>
+
+#include "util/logging.h"
+
+#include "util/Utils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+KernelGenerator::KernelGenerator(const neurun::model::Operands &operand_ctx,
+                                 const std::shared_ptr<TensorBuilder> &tensor_builder,
+                                 const std::shared_ptr<custom::KernelRegistry> &kernel_registry)
+    : _ctx(operand_ctx), _tensor_builder(tensor_builder), _kernel_registry(kernel_registry),
+      _current_subg_layout(model::Layout::UNKNOWN)
+{
+  // DO NOTHING
+}
+
+void KernelGenerator::visit(const model::Subgraph &subgraph)
+{
+  _current_subg_layout = subgraph.getLayout();
+  for (const auto &e : subgraph.operations())
+  {
+    const auto &node = *(e.node);
+    _tensor_builder->preVisit(node);
+    node.accept(*this);
+    _tensor_builder->postVisit(node);
+  }
+}
+
+void KernelGenerator::visit(const model::operation::TransposeConvNode &node)
+{
+  using model::operation::TransposeConvNode;
+
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(TransposeConvNode::Input::INPUT)};
+  const auto ker_index{node.getInputs().at(TransposeConvNode::Input::KERNEL)};
+  const auto output_shape_index{node.getInputs().at(TransposeConvNode::Input::OUTPUT_SHAPE)};
+
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(_current_subg_layout);
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(_current_subg_layout);
+  // Kernel format is [depth_out, kernel_height, kernel_width, depth_in].
+  const auto &ker_shape = _ctx.at(ker_index).shape();
+  const auto ker_height = ker_shape.dim(1);
+  const auto ker_width = ker_shape.dim(2);
+  const auto stride = node.param().stride;
+  const int padding_type = (node.param().padding.type == model::PaddingType::SAME);
+  const auto padding = neurun::util::calculatePadding(node.param().padding, ofm_shape, ifm_shape,
+                                                      stride, ker_width, ker_height);
+
+  const auto ofm_backend_shape =
+      ::neurun::backend::srcn::kernel::getShape(_ctx.at(ofm_index), _current_subg_layout);
+  const auto ifm_backend_shape =
+      ::neurun::backend::srcn::kernel::getShape(_ctx.at(ifm_index), _current_subg_layout);
+  const auto ker_backend_shape =
+      ::neurun::backend::srcn::kernel::getShape(_ctx.at(ker_index), model::Layout::UNKNOWN);
+
+  auto ofm_alloc = _tensor_builder->at(ofm_index);
+  auto ifm_alloc = _tensor_builder->at(ifm_index);
+  auto ker_alloc = _tensor_builder->at(ker_index);
+
+  auto fn = nnfw::cpp14::make_unique<::neurun::backend::srcn::kernel::TransposeConvLayer>();
+
+  fn->configure(ifm_alloc->buffer(), ifm_backend_shape, ker_alloc->buffer(), ker_backend_shape,
+                padding_type, padding.left, padding.right, padding.top, padding.bottom,
+                stride.horizontal, stride.vertical, ofm_alloc->buffer(), ofm_backend_shape);
+
+  _execution_builder->append(std::move(fn));
+}
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/srcn/KernelGenerator.h b/runtimes/neurun/backend/srcn/KernelGenerator.h
new file mode 100644
index 000000000..f3e92e465
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/KernelGenerator.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_SRCN_KERNEL_GENERATOR_H__
+#define __NEURUN_BACKEND_SRCN_KERNEL_GENERATOR_H__
+
+#include "backend/IKernelGenerator.h"
+#include "model/Operands.h"
+#include "operand/Tensor.h"
+#include "backend/CustomKernelRegistry.h"
+#include "TensorBuilder.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+class KernelGenerator : public IKernelGenerator
+{
+public:
+  KernelGenerator(const neurun::model::Operands &ctx,
+                  const std::shared_ptr<TensorBuilder> &tensor_builder,
+                  const std::shared_ptr<custom::KernelRegistry> &kernel_registry);
+
+  using IKernelGenerator::visit;
+
+  void visit(const model::Subgraph &) override;
+  void visit(const model::operation::TransposeConvNode &) override;
+
+private:
+  const neurun::model::Operands &_ctx;
+  std::shared_ptr<TensorBuilder> _tensor_builder;
+  std::shared_ptr<custom::KernelRegistry> _kernel_registry;
+  model::Layout _current_subg_layout;
+};
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_SRCN_KERNEL_GENERATOR_H__
diff --git a/runtimes/neurun/backend/srcn/MemoryManager.cc b/runtimes/neurun/backend/srcn/MemoryManager.cc
new file mode 100644
index 000000000..ad3f639f6
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/MemoryManager.cc
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "MemoryManager.h"
+
+#include <cassert>
+
+#include "MemoryPlannerFactory.h"
+#include <backend/operand/Object.h>
+#include "util/logging.h"
+#include "util/ConfigSource.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+MemoryManager::MemoryManager() : _mem_planner{createMemoryPlanner()}
+{
+  // DO NOTHING
+}
+
+IMemoryPlanner *MemoryManager::createMemoryPlanner()
+{
+  auto planner_id = util::getConfigString(util::config::CPU_MEMORY_PLANNER);
+  return MemoryPlannerFactory::instance().create(planner_id);
+}
+
+void MemoryManager::buildTensor(const model::OperandIndex &ind, const model::OperandInfo &info)
+{
+  auto tensor = std::make_shared<operand::Tensor>(info);
+  _tensors[ind] = tensor;
+}
+
+void MemoryManager::claimPlan(const model::OperandIndex &ind, uint32_t size)
+{
+  _mem_planner->claim(ind, size);
+}
+
+void MemoryManager::releasePlan(const model::OperandIndex &ind) { _mem_planner->release(ind); }
+
+void MemoryManager::allocate(void)
+{
+  _mem_alloc = std::make_shared<Allocator>(_mem_planner->capacity());
+  assert(_mem_alloc->base());
+
+  for (auto &mem_plan : _mem_planner->memory_plans())
+  {
+    auto ind = mem_plan.first;
+    auto mem_blk = mem_plan.second;
+
+    uint8_t *buffer = _mem_alloc->base() + mem_blk.offset;
+    auto tensor = _tensors[ind];
+    tensor->setBuffer(buffer);
+
+    VERBOSE(CPU_MEMORYMANAGER) << "TENSOR(#" << ind.value() << "): " << static_cast<void *>(buffer)
+                               << std::endl;
+
+    // If we do not make tensor here currently, kernel generation would cause segmentation fault.
+    // See also : Comments in `allocate` method.
+  }
+}
+
+std::shared_ptr<backend::operand::IObject> MemoryManager::wrapTensor(const model::OperandIndex &ind)
+{
+  if (_objects.find(ind) != _objects.end())
+  {
+    return _objects.at(ind);
+  }
+  else
+  {
+    return _objects[ind] = std::make_shared<::neurun::backend::operand::Object>(_tensors.at(ind));
+  }
+}
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/srcn/MemoryManager.h b/runtimes/neurun/backend/srcn/MemoryManager.h
new file mode 100644
index 000000000..f0cf8f0ba
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/MemoryManager.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_SRCN_MEMORY_MANAGER_H__
+#define __NEURUN_BACKEND_SRCN_MEMORY_MANAGER_H__
+
+#include "backend/IMemoryManager.h"
+#include "MemoryPlanner.h"
+#include "operand/Tensor.h"
+#include <backend/operand/Object.h>
+#include "model/OperandIndexMap.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+class MemoryManager : public backend::IMemoryManager
+{
+public:
+  MemoryManager();
+  virtual ~MemoryManager() = default;
+
+  void allocate(void) override;
+  void deallocate(void) override { _mem_alloc->release(); }
+
+  void buildTensor(const model::OperandIndex &ind, const model::OperandInfo &info);
+  void claimPlan(const model::OperandIndex &ind, uint32_t size);
+  void releasePlan(const model::OperandIndex &ind);
+
+  model::OperandIndexMap<std::shared_ptr<operand::Tensor>> &tensors(void) { return _tensors; }
+
+  std::shared_ptr<backend::operand::IObject> wrapTensor(const model::OperandIndex &ind);
+
+private:
+  IMemoryPlanner *createMemoryPlanner();
+
+private:
+  model::OperandIndexMap<std::shared_ptr<operand::Tensor>> _tensors;
+  model::OperandIndexMap<std::shared_ptr<::neurun::backend::operand::Object>> _objects;
+  model::OperandIndexMap<Block> _tensor_mem_map;
+  std::shared_ptr<IMemoryPlanner> _mem_planner;
+  std::shared_ptr<Allocator> _mem_alloc;
+};
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_SRCN_MEMORY_MANAGER_H__
diff --git a/runtimes/neurun/backend/srcn/MemoryPlanner.cc b/runtimes/neurun/backend/srcn/MemoryPlanner.cc
new file mode 100644
index 000000000..96ce27bd8
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/MemoryPlanner.cc
@@ -0,0 +1,123 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "MemoryPlanner.h"
+#include "util/logging.h"
+#include <cassert>
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+Allocator::Allocator(uint32_t capacity)
+{
+  _base = nnfw::cpp14::make_unique<uint8_t[]>(capacity);
+
+  VERBOSE(ALLOC) << "allocation capacity: " << capacity << std::endl;
+  VERBOSE(ALLOC) << "base pointer: " << static_cast<void *>(_base.get()) << std::endl;
+}
+
+void BumpPlanner::claim(const model::OperandIndex &ind, size_t size)
+{
+  assert(size != 0);
+
+  Block blk{_capacity, size};
+  _mem_plans[ind] = blk;
+  _capacity += size;
+
+  VERBOSE(BP_PLANNER) << "CLAIM(#" << ind.value() << "): " << blk.offset << ", " << blk.size
+                      << std::endl;
+}
+
+void BumpPlanner::release(const model::OperandIndex &ind)
+{
+  VERBOSE(BP_PLANNER) << "RELEASE(#" << ind.value() << "): "
+                      << "NOTHING does" << std::endl;
+}
+
+// There are some assumptions for claiming memory(== making a reservation for memory).
+// 1. About _claim_table(std::map).
+//   - The table's data structure is std::map so that it always sorts
+//     value(model::OperandIndex) by key(base_offset).
+//   - This claim() inserts key/value into _claim_table and the release() removes the key/value from
+//     _claim_table.
+//   - _claim_table shows the memory status at a certain point in time. Therefore,
+//     - If _claim_table has an offset and a certain size at a certain point in time,
+//       it means the place at the offset has been already claimed(== can't claim now. need to find
+//       someplace new).
+//     - If _claim_table doesn't have any element for an offset and a certain size at a certain
+//       point in time, it means the place at the offset can be claimed.
+// 2. In the loop for _claim_table, we can assume the current claim_base_offset value is bigger than
+//    the previous claim_base_offset.
+void FirstFitPlanner::claim(const model::OperandIndex &ind, size_t size)
+{
+  assert(size != 0);
+
+  // Find the right position for claiming
+  uint32_t next_offset = 0;
+  for (auto &mem_claim : _claim_table)
+  {
+    auto claimed_base_offset = mem_claim.first;
+    auto claimed_size = _mem_plans[mem_claim.second].size;
+    if (next_offset + size <= claimed_base_offset)
+    {
+      break;
+    }
+    else
+    {
+      next_offset = claimed_base_offset + claimed_size;
+    }
+  }
+
+  // Now next_offset is set to the proper offset
+  _claim_table[next_offset] = ind;
+  _mem_plans[ind] = {next_offset, size};
+
+  VERBOSE(FF_PLANNER) << "claim(#" << ind.value() << "): [+" << next_offset << ", " << size << "sz]"
+                      << std::endl;
+
+  if (_capacity < next_offset + size)
+  {
+    _capacity = next_offset + size;
+  }
+}
+
+void FirstFitPlanner::release(const model::OperandIndex &ind)
+{
+  for (auto it = _claim_table.cbegin(); it != _claim_table.cend(); ++it)
+  {
+    if (it->second == ind)
+    {
+      uint32_t offset = it->first;
+      uint32_t index = ind.value();
+      uint32_t size = _mem_plans[ind].size;
+
+      _claim_table.erase(it);
+
+      VERBOSE(FF_PLANNER) << "release(#" << index << "): [+" << offset << ", " << size << "sz]"
+                          << std::endl;
+      return;
+    }
+  }
+  assert(!"Cannot release for given index. It has been not claimed or released already.");
+}
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/srcn/MemoryPlanner.h b/runtimes/neurun/backend/srcn/MemoryPlanner.h
new file mode 100644
index 000000000..c66efec2f
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/MemoryPlanner.h
@@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file        MemoryPlanner.h
+ * @brief       This file contains Memory Planning related classes
+ */
+
+#ifndef __NEURUN_BACKEND_SRCN_MEMORY_PLANNER_H__
+#define __NEURUN_BACKEND_SRCN_MEMORY_PLANNER_H__
+
+#include <map>
+#include <cpp14/memory.h>
+
+#include "model/OperandIndexMap.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+/**
+ * @brief Structure to have memory offset and size
+ */
+struct Block
+{
+  uint32_t offset;
+  size_t size;
+};
+
+/**
+ * @brief Class to allocate memory
+ */
+class Allocator
+{
+public:
+  Allocator(uint32_t capacity);
+  /**
+   * @brief Get memory base pointer
+   * @return base pointer
+   */
+  uint8_t *base() const { return _base.get(); }
+  void release() { _base.reset(); }
+
+private:
+  std::unique_ptr<uint8_t[]> _base;
+};
+
+/**
+ * @brief Interface to plan memory
+ */
+struct IMemoryPlanner
+{
+  using MemoryPlans = model::OperandIndexMap<Block>;
+
+  /**
+   * @brief Claim memory for operand
+   * @param[in] index The operand index
+   * @param[in] size The size of the memory
+   */
+  virtual void claim(const model::OperandIndex &, size_t) = 0;
+  /**
+   * @brief Release memory for operand
+   * @param[in] index The operand index
+   */
+  virtual void release(const model::OperandIndex &) = 0;
+  /**
+   * @brief Get capacity for memory planning
+   * @return The value of capacity
+   */
+  virtual uint32_t capacity() = 0;
+  /**
+   * @brief Get MemoryPlans
+   * @return MemoryPlans
+   */
+  virtual MemoryPlans &memory_plans() = 0;
+
+  virtual ~IMemoryPlanner() = default;
+};
+
+/**
+ * @brief Class to plan memory by bump way
+ */
+class BumpPlanner : public IMemoryPlanner
+{
+public:
+  /**
+   * @brief Claim memory for operand by bump way
+   * @param[in] index The operand index
+   * @param[in] size The size of the memory
+   */
+  void claim(const model::OperandIndex &, size_t) override;
+  /**
+   * @brief Release memory for operand by bump way
+   * @param[in] index The operand index
+   */
+  void release(const model::OperandIndex &) override;
+  /**
+   * @brief Get capacity for memory planning
+   * @return The value of capacity
+   */
+  uint32_t capacity() override { return _capacity; }
+  /**
+   * @brief Get MemoryPlans
+   * @return MemoryPlans
+   */
+  MemoryPlans &memory_plans() override { return _mem_plans; }
+
+private:
+  uint32_t _capacity = 0;
+  MemoryPlans _mem_plans;
+};
+
+/**
+ * @brief Class to plan memory by firstfit way
+ */
+class FirstFitPlanner : public IMemoryPlanner
+{
+public:
+  /**
+   * @brief Claim memory for operand by firstfit way
+   * @param[in] index The operand index
+   * @param[in] size The size of the memory
+   */
+  void claim(const model::OperandIndex &, size_t) override;
+  /**
+   * @brief Release memory for operand by firstfit way
+   * @param[in] index The operand index
+   */
+  void release(const model::OperandIndex &) override;
+  /**
+   * @brief Get capacity for memory planning
+   * @return The value of capacity
+   */
+  uint32_t capacity() override { return _capacity; }
+  /**
+   * @brief Get MemoryPlans
+   * @return MemoryPlans
+   */
+  MemoryPlans &memory_plans() override { return _mem_plans; }
+
+private:
+  uint32_t _capacity = 0;
+  MemoryPlans _mem_plans;
+  // Use std::map because claim() assumes that _claim_table is sorted by uint32_t(base_offset)
+  std::map<uint32_t, model::OperandIndex> _claim_table;
+};
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_SRCN_MEMORY_PLANNER_H__
diff --git a/runtimes/neurun/backend/srcn/MemoryPlannerFactory.cc b/runtimes/neurun/backend/srcn/MemoryPlannerFactory.cc
new file mode 100644
index 000000000..0029c38cf
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/MemoryPlannerFactory.cc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "MemoryPlannerFactory.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+MemoryPlannerFactory &MemoryPlannerFactory::instance()
+{
+  static MemoryPlannerFactory instance;
+  return instance;
+}
+
+IMemoryPlanner *MemoryPlannerFactory::create(const std::string &key)
+{
+  if (key == "FirstFit")
+  {
+    return new FirstFitPlanner;
+  }
+  else if (key == "Bump")
+  {
+    return new BumpPlanner;
+  }
+  return new FirstFitPlanner; // Default Planner
+}
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/srcn/MemoryPlannerFactory.h b/runtimes/neurun/backend/srcn/MemoryPlannerFactory.h
new file mode 100644
index 000000000..79cb264a6
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/MemoryPlannerFactory.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_SRCN_MEMORY_PLANNER_FACTORY_H__
+#define __NEURUN_BACKEND_SRCN_MEMORY_PLANNER_FACTORY_H__
+
+#include "MemoryPlanner.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+class MemoryPlannerFactory
+{
+public:
+  static MemoryPlannerFactory &instance();
+
+private:
+  MemoryPlannerFactory() = default;
+
+public:
+  IMemoryPlanner *create(const std::string &key);
+};
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_SRCN_MEMORY_PLANNER_FACTORY_H__
diff --git a/runtimes/neurun/backend/srcn/PluginClassesAllocator.cc b/runtimes/neurun/backend/srcn/PluginClassesAllocator.cc
new file mode 100644
index 000000000..9efc6aaaa
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/PluginClassesAllocator.cc
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <util/logging.h>
+
+#include "Backend.h"
+
+extern "C" {
+neurun::backend::Backend *neurun_backend_create()
+{
+  VERBOSE(neurun_backend_create) << "'srcn' loaded\n";
+  return new neurun::backend::srcn::Backend;
+}
+
+void neurun_backend_destroy(neurun::backend::Backend *backend)
+{
+  VERBOSE(neurun_backend_create) << "'srcn' unloaded\n";
+  delete backend;
+}
+}
diff --git a/runtimes/neurun/backend/srcn/ShapeFixer.cc b/runtimes/neurun/backend/srcn/ShapeFixer.cc
new file mode 100644
index 000000000..38f0d9252
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/ShapeFixer.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ShapeFixer.h"
+
+#include <stdexcept>
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+ShapeFixer::ShapeFixer(const neurun::model::Operands &operand_ctx,
+                       const std::shared_ptr<TensorBuilder> &tensor_builder)
+    : _ctx(operand_ctx), _tensor_builder(tensor_builder)
+{
+  assert(tensor_builder);
+}
+
+void ShapeFixer::visit(const model::operation::TransposeConvNode &) { /* DO NOTHING */}
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/srcn/ShapeFixer.h b/runtimes/neurun/backend/srcn/ShapeFixer.h
new file mode 100644
index 000000000..c0a127a34
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/ShapeFixer.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_SRCN_SHAPE_FIXER_H__
+#define __NEURUN_BACKEND_SRCN_SHAPE_FIXER_H__
+
+#include <backend/IShapeFixer.h>
+
+#include "model/Operands.h"
+#include "operand/Tensor.h"
+#include "TensorBuilder.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+class ShapeFixer : public IShapeFixer
+{
+public:
+  ShapeFixer(const neurun::model::Operands &ctx,
+             const std::shared_ptr<TensorBuilder> &tensor_builder);
+
+  std::shared_ptr<ITensorBuilder> tensor_builder() override { return _tensor_builder; }
+
+  void visit(const model::operation::TransposeConvNode &) override;
+
+private:
+  const neurun::model::Operands &_ctx;
+  std::shared_ptr<TensorBuilder> _tensor_builder;
+};
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_SRCN_SHAPE_FIXER_H__
diff --git a/runtimes/neurun/backend/srcn/TensorBuilder.cc b/runtimes/neurun/backend/srcn/TensorBuilder.cc
new file mode 100644
index 000000000..52c11ad37
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/TensorBuilder.cc
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "TensorBuilder.h"
+
+#include <cassert>
+
+#include "util/logging.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+TensorBuilder::TensorBuilder() : _tensor_mgr{new TensorManager()}
+{
+  // DO NOTHING
+}
+
+void TensorBuilder::registerTensorInfo(const model::OperandIndex &ind,
+                                       const model::OperandInfo &info,
+                                       model::Layout /*frontend_layout*/,
+                                       model::Layout /*backend_layout*/, bool as_const)
+{
+  _tensor_info_map.emplace(ind, info);
+
+  // TODO set the layout
+
+  if (as_const)
+    _constants.append(ind);
+}
+
+void TensorBuilder::registerSubTensorInfo(const model::OperandIndex &,
+                                          const compiler::SubTensorInfo &)
+{
+  // Not supported yet
+  assert(false);
+}
+
+void TensorBuilder::notifyFirstUse(const model::OperandIndex &ind)
+{
+  assert(_tensor_info_map.find(ind) != _tensor_info_map.end());
+  const auto &info = _tensor_info_map.at(ind);
+  const auto size = info.total_size();
+  _tensor_mgr->buildTensor(ind, info, _constants.contains(ind));
+  _tensor_mgr->claimPlan(ind, size);
+}
+
+void TensorBuilder::notifyLastUse(const model::OperandIndex &ind) { _tensor_mgr->releasePlan(ind); }
+
+void TensorBuilder::prepare(void)
+{
+  _tensor_mgr->allocateConsts();
+  _tensor_mgr->allocateNonconsts();
+}
+
+// TODO Remove this
+void TensorBuilder::allocate(void)
+{
+  // NOTE For now nothing to do. Allocation is done in prepare stage, which is not appropriate
+  //      This is because SRCN kernels require `ITensor`s to be allocated before Kernel Generation.
+}
+
+void TensorBuilder::allocateConsts()
+{
+  // NOTE For now nothing to do. Allocation is done in prepare stage, which is not appropriate
+  //      This is because SRCN kernels require `ITensor`s to be allocated before Kernel Generation.
+}
+
+void TensorBuilder::allocateNonconsts()
+{
+  // NOTE For now nothing to do. Allocation is done in prepare stage, which is not appropriate
+  //      This is because SRCN kernels require `ITensor`s to be allocated before Kernel Generation.
+}
+
+std::shared_ptr<::neurun::backend::operand::ITensor>
+TensorBuilder::tensorAt(const model::OperandIndex &ind)
+{
+  return _tensor_mgr->at(ind);
+}
+
+std::shared_ptr<backend::operand::IObject> TensorBuilder::wrapTensor(const model::OperandIndex &ind)
+{
+  return _tensor_mgr->wrapTensor(ind);
+}
+
+void TensorBuilder::iterate(const IterateFunction &fn) { _tensor_mgr->iterate(fn); }
+
+std::shared_ptr<operand::Tensor> TensorBuilder::at(const ::neurun::model::OperandIndex &ind)
+{
+  return _tensor_mgr->at(ind);
+}
+
+std::unique_ptr<ITensorManager> TensorBuilder::releaseTensorManager(void)
+{
+  return std::move(_tensor_mgr);
+}
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/srcn/TensorBuilder.h b/runtimes/neurun/backend/srcn/TensorBuilder.h
new file mode 100644
index 000000000..98b45b64f
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/TensorBuilder.h
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_SRCN_TENSOR_BUILDER_H__
+#define __NEURUN_BACKEND_SRCN_TENSOR_BUILDER_H__
+
+#include <unordered_map>
+
+#include <backend/ITensorBuilder.h>
+#include <backend/operand/Object.h>
+#include "operand/Tensor.h"
+#include "model/OperandIndexMap.h"
+#include "TensorManager.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+class TensorBuilder : public ITensorBuilder
+{
+public:
+  TensorBuilder();
+
+  /**
+   * @brief     Register tensor information to allocate on CPU backend
+   * @param[in] ind    Operand index
+   * @param[in] info   Operand information
+   * @param[in] layout Operand data layout
+   */
+  void registerTensorInfo(const model::OperandIndex &ind, const model::OperandInfo &info,
+                          model::Layout frontend_layout, model::Layout backend_layout,
+                          bool as_const) override;
+  /**
+   * @brief     Register subtensor information to allocate on CPU backend
+   * @param[in] ind   Operand index
+   * @param[in] info  Tensor information
+   */
+  void registerSubTensorInfo(const model::OperandIndex &ind,
+                             const compiler::SubTensorInfo &info) override;
+
+  void notifyFirstUse(const model::OperandIndex &) override;
+  void notifyLastUse(const model::OperandIndex &) override;
+
+  void prepare(void) override;
+  void allocate(void) override; // TODO Remove this
+  void allocateConsts() override;
+  void allocateNonconsts() override;
+  void postFunctionPrepare() override { /* DO NOTHING */}
+  void finalize() override { /* DO NOTHING */}
+
+  std::shared_ptr<::neurun::backend::operand::ITensor>
+  tensorAt(const model::OperandIndex &ind) override;
+
+  std::shared_ptr<backend::operand::IObject> wrapTensor(const model::OperandIndex &ind) override;
+
+  void iterate(const IterateFunction &fn) override;
+
+  void preVisit(const model::Operation &) override { /* DO NOTHING */}
+  void postVisit(const model::Operation &) override { /* DO NOTHING */}
+
+  std::unique_ptr<ITensorManager> releaseTensorManager(void) override;
+
+  std::shared_ptr<operand::Tensor> at(const ::neurun::model::OperandIndex &ind);
+
+private:
+  std::unique_ptr<TensorManager> _tensor_mgr;
+  model::OperandIndexMap<model::OperandInfo> _tensor_info_map;
+  model::OperandIndexMap<std::pair<model::Layout, model::Layout>> _tensor_layouts_map;
+  model::OperandIndexSequence _constants;
+};
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_SRCN_TENSOR_BUILDER_H__
diff --git a/runtimes/neurun/backend/srcn/TensorManager.cc b/runtimes/neurun/backend/srcn/TensorManager.cc
new file mode 100644
index 000000000..d0c80273e
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/TensorManager.cc
@@ -0,0 +1,100 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "TensorManager.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+TensorManager::TensorManager() : _const_mgr{new MemoryManager()}, _nonconst_mgr{new MemoryManager()}
+{
+  // DO NOTHING
+}
+
+void TensorManager::allocateConsts(void) { _const_mgr->allocate(); }
+
+void TensorManager::allocateNonconsts(void) { _nonconst_mgr->allocate(); }
+
+void TensorManager::deallocateConsts(void) { _const_mgr->deallocate(); }
+
+void TensorManager::deallocateNonconsts(void) { _nonconst_mgr->deallocate(); }
+
+void TensorManager::buildTensor(const model::OperandIndex &ind,
+                                const model::OperandInfo &tensor_info, bool as_const)
+{
+  assert(_ind_to_mgr.find(ind) == _ind_to_mgr.end());
+  if (as_const)
+  {
+    _const_mgr->buildTensor(ind, tensor_info);
+    _ind_to_mgr.insert({ind, *_const_mgr});
+  }
+  else
+  {
+    _nonconst_mgr->buildTensor(ind, tensor_info);
+    _ind_to_mgr.insert({ind, *_nonconst_mgr});
+  }
+}
+
+void TensorManager::claimPlan(const model::OperandIndex &ind, uint32_t size)
+{
+  assert(_ind_to_mgr.find(ind) != _ind_to_mgr.end());
+  _ind_to_mgr.at(ind).claimPlan(ind, size);
+}
+
+void TensorManager::releasePlan(const model::OperandIndex &ind)
+{
+  assert(_ind_to_mgr.find(ind) != _ind_to_mgr.end());
+  _ind_to_mgr.at(ind).releasePlan(ind);
+}
+
+std::shared_ptr<backend::operand::IObject> TensorManager::wrapTensor(const model::OperandIndex &ind)
+{
+  assert(_ind_to_mgr.find(ind) != _ind_to_mgr.end());
+  return _ind_to_mgr.at(ind).wrapTensor(ind);
+}
+
+std::shared_ptr<operand::Tensor> TensorManager::at(const ::neurun::model::OperandIndex &ind)
+{
+  assert(_ind_to_mgr.find(ind) != _ind_to_mgr.end());
+  return _ind_to_mgr.at(ind).tensors().at(ind);
+}
+
+model::OperandIndexMap<std::shared_ptr<operand::Tensor>> &TensorManager::constTensors(void)
+{
+  return _const_mgr->tensors();
+}
+
+model::OperandIndexMap<std::shared_ptr<operand::Tensor>> &TensorManager::nonconstTensors(void)
+{
+  return _nonconst_mgr->tensors();
+}
+
+void TensorManager::iterate(const std::function<void(const model::OperandIndex &)> &fn)
+{
+  for (auto it : _nonconst_mgr->tensors())
+    fn(it.first);
+
+  for (auto it : _const_mgr->tensors())
+    fn(it.first);
+}
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/srcn/TensorManager.h b/runtimes/neurun/backend/srcn/TensorManager.h
new file mode 100644
index 000000000..61a10d255
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/TensorManager.h
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_SRCN_TENSOR_MANAGER_H__
+#define __NEURUN_BACKEND_SRCN_TENSOR_MANAGER_H__
+
+#include "backend/ITensorManager.h"
+#include "MemoryManager.h"
+#include "model/OperandIndexMap.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+
+class TensorManager : public backend::ITensorManager
+{
+public:
+  TensorManager();
+  virtual ~TensorManager() = default;
+
+  void allocateConsts(void) override;
+  void allocateNonconsts(void) override;
+  void deallocateConsts(void) override;
+  void deallocateNonconsts(void) override;
+
+  void buildTensor(const model::OperandIndex &ind, const model::OperandInfo &tensor_info,
+                   bool as_const);
+
+  void claimPlan(const model::OperandIndex &ind, uint32_t size);
+  void releasePlan(const model::OperandIndex &ind);
+
+  std::shared_ptr<backend::operand::IObject> wrapTensor(const model::OperandIndex &ind);
+  std::shared_ptr<operand::Tensor> at(const ::neurun::model::OperandIndex &ind);
+
+  model::OperandIndexMap<std::shared_ptr<operand::Tensor>> &constTensors(void);
+  model::OperandIndexMap<std::shared_ptr<operand::Tensor>> &nonconstTensors(void);
+
+  void iterate(const std::function<void(const model::OperandIndex &)> &fn);
+
+private:
+  std::unique_ptr<MemoryManager> _const_mgr;
+  std::unique_ptr<MemoryManager> _nonconst_mgr;
+  model::OperandIndexMap<MemoryManager &> _ind_to_mgr;
+};
+
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_SRCN_TENSOR_MANAGER_H__
diff --git a/runtimes/neurun/backend/srcn/kernel/OperationUtils.cc b/runtimes/neurun/backend/srcn/kernel/OperationUtils.cc
new file mode 100644
index 000000000..0df0f7b33
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/kernel/OperationUtils.cc
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "OperationUtils.h"
+
+#include <cmath>
+#include <algorithm>
+#include <cassert>
+
+#include "util/Utils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+namespace kernel
+{
+
+uint32_t MatchingDim(const Shape &shape1, int index1, const Shape &shape2, int index2)
+{
+  UNUSED_RELEASE(shape2);
+  UNUSED_RELEASE(index2);
+  assert(shape1.dimensions[index1] == shape2.dimensions[index2]);
+  return shape1.dimensions[index1];
+}
+
+Coordinates convertCoordinates(const Coordinates &from_coordinates, FilterLayout from_layout,
+                               FilterLayout to_layout)
+{
+  assert(from_coordinates.size() == 4);
+  Coordinates to{from_coordinates};
+  if (from_layout == FilterLayout::OHWI && to_layout == FilterLayout::HWOI)
+  {
+    to.set(0, from_coordinates[1]);
+    to.set(1, from_coordinates[2]);
+    to.set(2, from_coordinates[0]);
+    to.set(3, from_coordinates[3]);
+  }
+  else
+  {
+    throw std::runtime_error{"NYI"};
+  }
+
+  return to;
+}
+
+Shape getShape(const ::neurun::model::Operand &o, ::neurun::model::Layout frontend_layout)
+{
+  Shape shape;
+
+  auto dims = o.shape().dims();
+  if (frontend_layout == ::neurun::model::Layout::NCHW && o.shape().rank() == 4)
+  {
+    // NCHW -> NHWC
+    uint32_t permutation[4] = {0, 2, 3, 1};
+    for (int i = 0; i < o.shape().rank(); ++i)
+    {
+      dims.at(i) = o.shape().dim(permutation[i]);
+    }
+  }
+  shape.dimensions = std::vector<uint32_t>(dims.begin(), dims.end());
+  shape.type = static_cast<OperandType>(static_cast<int32_t>(o.typeInfo().type()));
+  shape.scale = o.typeInfo().scale();
+  shape.offset = o.typeInfo().offset();
+
+  // CPU backend assume that neurun internal shape's rank is always same or less than 4
+  assert(shape.dimensions.size() <= 4);
+
+  return shape;
+}
+
+} // namespace kernel
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/srcn/kernel/OperationUtils.h b/runtimes/neurun/backend/srcn/kernel/OperationUtils.h
new file mode 100644
index 000000000..e9c833565
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/kernel/OperationUtils.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_SRCN_OPERATION_UTILS_H__
+#define __NEURUN_BACKEND_SRCN_OPERATION_UTILS_H__
+
+#include <iostream>
+#include <limits>
+#include <vector>
+
+#include "model/Operand.h"
+#include "model/DataType.h"
+#include <model/InternalType.h>
+
+using OperandType = neurun::model::DataType;
+using neurun::util::Coordinates;
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+namespace kernel
+{
+
+struct Shape
+{
+  OperandType type;
+  std::vector<uint32_t> dimensions;
+  float scale;
+  int32_t offset;
+};
+
+union DataPtr {
+  uint8_t *u8;
+  int8_t *i8;
+  int32_t *i32;
+  float *f;
+  void *v;
+};
+
+enum FilterLayout
+{
+  OHWI = 0, // TfLite Kernel Layout when using NHWC image layout
+  HWOI,     // SRCN Transpose Conv Kernel Layout when using NHWC image layout
+  OIHW,     // SRCN Transpose Conv Kernel Layout when using NCHW image layout
+};
+
+uint32_t MatchingDim(const Shape &shape1, int index1, const Shape &shape2, int index2);
+
+Coordinates convertCoordinates(const Coordinates &from_coordinates, FilterLayout from_layout,
+                               FilterLayout to_layout);
+
+Shape getShape(const ::neurun::model::Operand &o, ::neurun::model::Layout frontend_layout);
+
+} // namespace kernel
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_SRCN_OPERATION_UTILS_H__
diff --git a/runtimes/neurun/backend/srcn/kernel/TransposeConvLayer.cc b/runtimes/neurun/backend/srcn/kernel/TransposeConvLayer.cc
new file mode 100644
index 000000000..59332ab6d
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/kernel/TransposeConvLayer.cc
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "TransposeConvLayer.h"
+
+#include "OperationUtils.h"
+#include "srcn/srcn_conv.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+namespace kernel
+{
+
+TransposeConvLayer::TransposeConvLayer()
+    : _inputData(), _kernelData(), _outputData(), _inputShape(), _kernelShape(), _outputShape(),
+      _paddingType(0), _paddingLeft(0), _paddingTop(0), _paddingRight(0), _paddingBottom(0),
+      _strideWidth(0), _strideHeight(0), _inputType(OperandType::FLOAT32)
+{
+  // DO NOTHING
+}
+
+void TransposeConvLayer::convFloat32()
+{
+  nnfw::srcn::convMat_t in_mat, out_mat, kernel_mat;
+  nnfw::srcn::convParams_t in_param;
+
+  const int batches = MatchingDim(_inputShape, 0, _outputShape, 0);
+  const int input_height = _inputShape.dimensions[1];
+  const int input_width = _inputShape.dimensions[2];
+  const int input_depth = MatchingDim(_inputShape, 3, _kernelShape, 3);
+  in_mat.c = input_depth;
+  in_mat.w = input_width;
+  in_mat.h = input_height;
+  in_mat.n = batches;
+  in_mat.data = _inputData.f;
+
+  const int output_height = _outputShape.dimensions[1];
+  const int output_width = _outputShape.dimensions[2];
+  const int output_depth = MatchingDim(_kernelShape, 0, _outputShape, 3);
+  out_mat.c = output_depth;
+  out_mat.w = output_width;
+  out_mat.h = output_height;
+  out_mat.n = batches;
+  out_mat.data = _outputData.f;
+
+  const int ker_height = _kernelShape.dimensions[1];
+  const int ker_width = _kernelShape.dimensions[2];
+  kernel_mat.c = output_depth;
+  kernel_mat.w = ker_width;
+  kernel_mat.h = ker_height;
+  kernel_mat.n = input_depth;
+  kernel_mat.data = _kernelData.f;
+
+  in_param.kernel_w = ker_width;
+  in_param.kernel_h = ker_height;
+  in_param.stride_w = _strideWidth;
+  in_param.stride_h = _strideHeight;
+  in_param.padding = _paddingType;
+  in_param.pad_w = _paddingLeft;
+  in_param.pad_h = _paddingTop;
+  in_param.dilation_w = 1;
+  in_param.dilation_h = 1;
+
+  nnfw::srcn::srcn_deconvolution2D(in_mat, kernel_mat, out_mat, in_param, 4, nnfw::srcn::col_major);
+}
+
+void TransposeConvLayer::configure(uint8_t *inputData, const Shape inputShape, uint8_t *kernelData,
+                                   const Shape kernelShape, const uint32_t paddingType,
+                                   const uint32_t paddingLeft, const uint32_t paddingRight,
+                                   const uint32_t paddingTop, const uint32_t paddingBottom,
+                                   const uint32_t strideWidth, const uint32_t strideHeight,
+                                   uint8_t *outputData, const Shape outputShape)
+{
+  _inputData.u8 = inputData;
+  _inputShape = inputShape;
+  _inputType = inputShape.type;
+  _kernelData.u8 = kernelData;
+  _kernelShape = kernelShape;
+  _paddingType = paddingType;
+  _paddingLeft = paddingLeft;
+  _paddingRight = paddingRight;
+  _paddingTop = paddingTop;
+  _paddingBottom = paddingBottom;
+  _strideWidth = strideWidth;
+  _strideHeight = strideHeight;
+  _outputData.u8 = outputData;
+  _outputShape = outputShape;
+}
+
+void TransposeConvLayer::run()
+{
+  if (_inputType == OperandType::FLOAT32)
+  {
+    convFloat32();
+  }
+  else if (_inputType == OperandType::QUANT8_ASYMM)
+  {
+    throw std::runtime_error("NYI");
+  }
+}
+
+} // namespace kernel
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/srcn/kernel/TransposeConvLayer.h b/runtimes/neurun/backend/srcn/kernel/TransposeConvLayer.h
new file mode 100644
index 000000000..db9006c22
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/kernel/TransposeConvLayer.h
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_SRCN_KERNEL_TRANSPOSECONV_LAYER_H__
+#define __NEURUN_BACKEND_SRCN_KERNEL_TRANSPOSECONV_LAYER_H__
+
+#include <exec/IFunction.h>
+
+#include "OperationUtils.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+namespace kernel
+{
+
+class TransposeConvLayer : public ::neurun::exec::IFunction
+{
+public:
+  TransposeConvLayer();
+
+public:
+  void convFloat32();
+  void configure(uint8_t *inputData, const Shape inputShape, uint8_t *kernelData,
+                 const Shape kernelShape, const uint32_t paddingType, const uint32_t paddingLeft,
+                 const uint32_t paddingRight, const uint32_t paddingTop,
+                 const uint32_t paddingBottom, const uint32_t strideW, const uint32_t strideH,
+                 uint8_t *outputData, const Shape outputShape);
+
+  void run();
+  void runSync()
+  {
+    // this abstract method is used just for profiling and called for
+    // backend::acl_common::AclFunction
+    run();
+  }
+
+private:
+  DataPtr _inputData;
+  DataPtr _kernelData;
+  DataPtr _outputData;
+
+  Shape _inputShape;
+  Shape _kernelShape;
+  Shape _outputShape;
+
+  uint32_t _paddingType;
+  uint32_t _paddingLeft;
+  uint32_t _paddingTop;
+  uint32_t _paddingRight;
+  uint32_t _paddingBottom;
+
+  uint32_t _strideWidth;
+  uint32_t _strideHeight;
+
+  OperandType _inputType;
+};
+
+} // namespace kernel
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_SRCN_KERNEL_TRANSPOSECONV_LAYER_H__
diff --git a/runtimes/neurun/backend/srcn/operand/Tensor.cc b/runtimes/neurun/backend/srcn/operand/Tensor.cc
new file mode 100644
index 000000000..ef5f67512
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/operand/Tensor.cc
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "Tensor.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+namespace operand
+{
+
+size_t Tensor::calcOffset(const neurun::util::Coordinates &coords) const
+{
+  size_t rank = num_dimensions();
+  size_t offset = 0;
+  for (size_t i = 0; i < rank; ++i)
+  {
+    offset = offset * dimension(i) + coords[i];
+  }
+  offset *= sizeOfDataType(data_type());
+  return offset;
+}
+
+} // namespace operand
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/backend/srcn/operand/Tensor.h b/runtimes/neurun/backend/srcn/operand/Tensor.h
new file mode 100644
index 000000000..762f73837
--- /dev/null
+++ b/runtimes/neurun/backend/srcn/operand/Tensor.h
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_SRCN_OPERAND_TENSOR_H__
+#define __NEURUN_BACKEND_SRCN_OPERAND_TENSOR_H__
+
+#include <backend/operand/ITensor.h>
+#include "model/OperandInfo.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace srcn
+{
+namespace operand
+{
+
+class Tensor : public ::neurun::backend::operand::ITensor
+{
+public:
+  Tensor() = delete;
+
+public:
+  Tensor(const model::OperandInfo &info) : _info(info)
+  {
+    // DO NOTHING
+  }
+
+public:
+  void setBuffer(uint8_t *buffer) { _buffer = buffer; }
+  ::neurun::model::DataType data_type() const { return _info.typeInfo().type(); }
+
+public:
+  uint8_t *buffer() const override { return _buffer; }
+  /**
+   * @brief Get dimension by index
+   *
+   * @param index Index to get diemension
+   * @return size_t Dimension at index
+   * @note N : dimension(0)
+   *       H : dimension(1)
+   *       W : dimension(2)
+   *       C : dimension(3)
+   */
+  size_t dimension(size_t index) const override { return _info.shape().dim(index); }
+  size_t num_dimensions() const override { return _info.shape().rank(); }
+  size_t total_size() const override { return _info.total_size(); }
+  size_t calcOffset(const neurun::util::Coordinates &coords) const override;
+  model::Layout layout() const override { return model::Layout::NHWC; }
+  bool has_padding() const override { return false; }
+
+private:
+  model::OperandInfo _info;
+  uint8_t *_buffer = nullptr;
+};
+
+} // namespace operand
+} // namespace srcn
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_SRCN_OPERAND_TENSOR_H__
diff --git a/runtimes/neurun/core/CMakeLists.txt b/runtimes/neurun/core/CMakeLists.txt
new file mode 100644
index 000000000..d5449a987
--- /dev/null
+++ b/runtimes/neurun/core/CMakeLists.txt
@@ -0,0 +1,18 @@
+file(GLOB_RECURSE SOURCES "src/*.cc")
+
+add_library(neurun_core STATIC ${SOURCES})
+set_target_properties(neurun_core PROPERTIES POSITION_INDEPENDENT_CODE ON)
+target_include_directories(neurun_core PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/include)
+target_include_directories(neurun_core PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/src)
+target_link_libraries(neurun_core PUBLIC nnfw_lib_misc)
+target_link_libraries(neurun_core PUBLIC nnfw_lib_cpp14)
+target_link_libraries(neurun_core PRIVATE nnfw_lib_cker)
+target_link_libraries(neurun_core PRIVATE nnfw_common)
+target_link_libraries(neurun_core PRIVATE nnfw_coverage)
+target_link_libraries(neurun_core PRIVATE dl)
+
+if(ENVVAR_NEURUN_CONFIG)
+  target_compile_definitions(neurun_core PRIVATE ENVVAR_FOR_DEFAULT_CONFIG)
+endif(ENVVAR_NEURUN_CONFIG)
+
+target_link_libraries(neurun_core PUBLIC nnfw-header) # To be removed later
diff --git a/runtimes/neurun/core/include/backend/Backend.h b/runtimes/neurun/core/include/backend/Backend.h
new file mode 100644
index 000000000..e8bfac25c
--- /dev/null
+++ b/runtimes/neurun/core/include/backend/Backend.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_BACKEND_H__
+#define __NEURUN_BACKEND_BACKEND_H__
+
+#include <memory>
+
+#include "model/Operands.h"
+
+namespace neurun
+{
+namespace backend
+{
+
+class Backend;
+struct IConfig;
+class IConstantInitializer;
+class IKernelGenerator;
+class IShapeFixer;
+struct ITensorBuilder;
+
+namespace custom
+{
+class KernelRegistry;
+}
+
+class BackendContext
+{
+public:
+  const Backend *backend;
+  std::shared_ptr<ITensorBuilder> tensor_builder;
+  std::shared_ptr<IConstantInitializer> constant_initializer;
+  std::shared_ptr<IKernelGenerator> kernel_gen;
+  std::shared_ptr<IShapeFixer> shape_fixer;
+};
+
+class Backend
+{
+public:
+  virtual ~Backend() = default;
+  virtual std::shared_ptr<neurun::backend::IConfig> config() const = 0;
+
+  virtual std::unique_ptr<BackendContext>
+  newContext(const model::Operands &operands,
+             const std::shared_ptr<custom::KernelRegistry> &registry) const = 0;
+};
+
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_BACKEND_H__
diff --git a/runtimes/neurun/core/include/backend/CustomKernel.h b/runtimes/neurun/core/include/backend/CustomKernel.h
new file mode 100644
index 000000000..db0c91e46
--- /dev/null
+++ b/runtimes/neurun/core/include/backend/CustomKernel.h
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CUSTOM_KERNEL_H__
+#define __NEURUN_BACKEND_CUSTOM_KERNEL_H__
+
+#include "nnfw_dev.h"
+
+#include "exec/IFunction.h"
+
+#include "misc/tensor/Shape.h"
+#include "model/DataType.h"
+
+#include <vector>
+
+namespace neurun
+{
+namespace backend
+{
+namespace custom
+{
+
+using Shape = nnfw::misc::tensor::Shape;
+
+struct TypeInfo
+{
+  Shape shape;
+  model::DataType dtype;
+};
+
+class Kernel : public ::neurun::exec::IFunction
+{
+public:
+  explicit Kernel(nnfw_custom_eval evalFunction);
+
+  nnfw_custom_kernel_params _params;
+  char *_userdata;
+  size_t _userdata_size;
+
+  nnfw_custom_eval _evalFunction;
+  // nnfw_custom_type_infer _type_infer_function; //Unused for now
+
+  struct CustomKernelConfigParams
+  {
+    std::vector<void *> input_allocations;
+    std::vector<TypeInfo> input_types;
+
+    std::vector<void *> output_allocations;
+    std::vector<TypeInfo> output_types;
+
+    char *userdata;
+    size_t userdata_size;
+  };
+
+  /**
+   * Fills _params field used later by user specified eval function
+   * @param inParams custom kernel parameters
+   */
+  virtual void configure(CustomKernelConfigParams &&inParams);
+
+  void run() override;
+  void runSync() override { run(); }
+};
+
+} // namespace custom
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CUSTOM_KERNEL_H__
diff --git a/runtimes/neurun/core/include/backend/CustomKernelRegistry.h b/runtimes/neurun/core/include/backend/CustomKernelRegistry.h
new file mode 100644
index 000000000..3eb218e11
--- /dev/null
+++ b/runtimes/neurun/core/include/backend/CustomKernelRegistry.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_CUSTOM_KERNEL_REGISTRY_H__
+#define __NEURUN_BACKEND_CUSTOM_KERNEL_REGISTRY_H__
+
+#include "CustomKernel.h"
+
+#include <unordered_map>
+#include <functional>
+#include <memory>
+
+#include <iostream>
+
+namespace neurun
+{
+namespace backend
+{
+
+namespace custom
+{
+
+class KernelRegistry
+{
+public:
+  void registerKernel(const std::string &id, nnfw_custom_eval evalFunction);
+  std::unique_ptr<Kernel> buildKernelForOp(const std::string &id);
+
+private:
+  std::unordered_map<std::string, nnfw_custom_eval> _storage;
+};
+
+} // namespace custom
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_CUSTOM_KERNEL_REGISTRY_H__
diff --git a/runtimes/neurun/core/include/backend/ExecTime.h b/runtimes/neurun/core/include/backend/ExecTime.h
new file mode 100644
index 000000000..4eaf49fab
--- /dev/null
+++ b/runtimes/neurun/core/include/backend/ExecTime.h
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_EXEC_TIME_H__
+#define __NEURUN_BACKEND_EXEC_TIME_H__
+
+#include "backend/Backend.h"
+#include "backend/IConfig.h"
+#include "JSONExecTime.h"
+#include <memory>
+#include <limits>
+#include <map>
+#include <unordered_map>
+#include <vector>
+
+namespace neurun
+{
+namespace backend
+{
+class ExecTime
+{
+public:
+  explicit ExecTime(const std::vector<const Backend *> &backends) : _json(backends, _measurements)
+  {
+  }
+
+public:
+  /**
+   * @brief Get exec time of an operation with input size
+   *        or linearly interpolated value based on size if there is no record for given size
+   *
+   * @param[in] backend id of a backend
+   * @param[in] operation name of an operation
+   * @param[in] quant if input type quantized
+   * @param[in] op_size sum of operation's flattened sizes of inputs and outputs
+   * @return execution time for given input sizes
+   *         -1 if there are no records for given parameters (backend, op, quantization).
+   */
+  int64_t getOperationExecTime(const Backend *backend, const std::string &operation, bool quant,
+                               uint32_t op_size) const;
+  /**
+   * @brief Update exec time of the operation on a backend with given input size or
+   *        add new entity if there is no one.
+   *
+   * @param[in] backend id of a backend
+   * @param[in] operation name of an operation
+   * @param[in] quant if input type quantized
+   * @param[in] op_size sum of operation's flattened sizes of inputs and outputs
+   * @param[in] time real measured value
+   */
+  void updateOperationExecTime(const Backend *backend, const std::string &operation, bool quant,
+                               uint32_t op_size, int64_t time);
+  /**
+   * @brief Get the permute time from one backend to another
+   *
+   * @param[in] from_backend
+   * @param[in] to_backend
+   * @param[in] quant if input type quantized
+   * @param[in] op_size sum of operation's flattened sizes of inputs and outputs
+   * @return permutation time for operation size
+   */
+  int64_t getPermuteTime(const Backend *from_backend, const Backend *to_backend, bool quant,
+                         uint32_t op_size) const;
+  /**
+   * @brief Update permute time from one backend to another
+   *
+   * @param[in] from_backend
+   * @param[in] to_backend
+   * @param[in] quant if input type quantized
+   * @param[in] time measured permutation time
+   * @param[in] op_size sum of operation's flattened sizes of inputs and outputs
+   */
+  void updatePermuteTime(const Backend *from_backend, const Backend *to_backend, bool quant,
+                         uint32_t op_size, int64_t time);
+  /**
+   * @brief Get the max value of int32_t in int64_t
+   * @return max value
+   */
+  static int64_t getMax() { return _MAX; }
+  /**
+   * @brief Update metrics file with new data.
+   */
+  void uploadOperationsExecTime() const { _json.uploadOperationsExecTime(); }
+  static const int64_t NOT_FOUND = -1;
+
+private:
+  /// @brief Measurement data, which is shared with serializer
+  MeasurementData _measurements;
+  // int64_t::max may cause integer overflow
+  static const int64_t _MAX = std::numeric_limits<int32_t>::max();
+  /// @brief Serializer
+  JSON _json;
+};
+
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_EXEC_TIME_H__
diff --git a/runtimes/neurun/core/include/backend/IConfig.h b/runtimes/neurun/core/include/backend/IConfig.h
new file mode 100644
index 000000000..0e9572033
--- /dev/null
+++ b/runtimes/neurun/core/include/backend/IConfig.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ICONFIG_H__
+#define __NEURUN_BACKEND_ICONFIG_H__
+
+#include "util/ITimer.h"
+#include <memory>
+#include <string>
+
+namespace neurun
+{
+namespace backend
+{
+
+struct IConfig
+{
+  virtual ~IConfig() = default;
+
+  virtual std::string id() = 0;
+  virtual void initialize() = 0;
+  // Support subtensor allocation
+  virtual bool SupportSubTensorAlloc() = 0;
+
+  // Timer is used for backend profiling. In case of default (nullptr) timer profiler won't work.
+  virtual std::unique_ptr<util::ITimer> timer() { return nullptr; }
+};
+
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ICONFIG_H__
diff --git a/runtimes/neurun/core/include/backend/IConstantInitializer.h b/runtimes/neurun/core/include/backend/IConstantInitializer.h
new file mode 100644
index 000000000..8393e0fd8
--- /dev/null
+++ b/runtimes/neurun/core/include/backend/IConstantInitializer.h
@@ -0,0 +1,260 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ICONSTANT_INITIALIZER_H__
+#define __NEURUN_BACKEND_ICONSTANT_INITIALIZER_H__
+
+#include <unordered_map>
+#include <functional>
+
+#include "ITensorBuilder.h"
+#include "model/Layout.h"
+#include "model/Operand.h"
+#include "model/Operands.h"
+#include "model/OperationVisitor.h"
+#include "model/Subgraph.h"
+#include "util/logging.h"
+#include "util/Utils.h"
+
+namespace
+{
+template <typename T>
+static void Init(const neurun::model::Operand &model_obj, neurun::backend::operand::IObject &obj,
+                 const bool copy,
+                 const neurun::model::Layout frontend_layout = neurun::model::Layout::UNKNOWN)
+{
+  const auto shape = model_obj.shape();
+  auto base = reinterpret_cast<const T *>(model_obj.data().base());
+
+  obj.access([&](::neurun::backend::operand::ITensor &tensor) {
+    switch (shape.rank())
+    {
+      case 1:
+      {
+        auto vec_size = shape.dim(0);
+        for (int32_t n = 0; n < vec_size; ++n)
+        {
+          const T *from = reinterpret_cast<const T *>(base) + n;
+          const auto value = *from;
+
+          T *into = reinterpret_cast<T *>(tensor.buffer()) + n;
+
+          *into = value;
+        }
+        break;
+      }
+      case 2:
+      {
+        const int32_t copy_len = shape.dim(1);
+
+        for (auto i = 0; i < shape.dim(0); ++i)
+        {
+          neurun::util::Coordinates coords{i, 0};
+          memcpy(tensor.buffer() + tensor.calcOffset(coords), base + i * copy_len,
+                 copy_len * sizeof(T));
+        }
+        break;
+      }
+      case 3:
+      {
+        const int32_t width = shape.dim(1);
+        const int32_t copy_len = shape.dim(2);
+
+        for (auto i = 0; i < shape.dim(0); ++i)
+        {
+          for (auto j = 0; j < shape.dim(1); ++j)
+          {
+            neurun::util::Coordinates coords{i, j, 0};
+            memcpy(tensor.buffer() + tensor.calcOffset(coords),
+                   base + i * width * copy_len + j * copy_len, copy_len * sizeof(T));
+          }
+        }
+        break;
+      }
+      case 4:
+      {
+        const int32_t height = shape.dim(1);
+        const int32_t width = shape.dim(2);
+        const int32_t copy_len = shape.dim(3);
+        for (auto i = 0; i < shape.dim(0); ++i)
+        {
+          for (auto j = 0; j < shape.dim(1); ++j)
+          {
+            for (auto k = 0; k < shape.dim(2); ++k)
+            {
+              if (copy)
+              {
+                neurun::util::Coordinates coords{i, j, k, 0};
+                memcpy(tensor.buffer() + tensor.calcOffset(coords),
+                       base + i * height * width * copy_len + j * width * copy_len + k * copy_len,
+                       copy_len * sizeof(T));
+              }
+              else
+              {
+                for (auto l = 0; l < shape.dim(3); ++l)
+                {
+                  const auto coords = neurun::util::convertCoordinates(
+                      {i, j, k, l}, frontend_layout, tensor.layout());
+                  T *into = reinterpret_cast<T *>(tensor.buffer() + tensor.calcOffset(coords));
+                  T value = *(base + i * height * width * copy_len + j * width * copy_len +
+                              k * copy_len + l);
+                  *into = value;
+                }
+              }
+            }
+          }
+        }
+        break;
+      }
+      default:
+        throw std::runtime_error{"Not yet supported"};
+    }
+  });
+}
+
+template <typename T>
+void copyInit(const neurun::model::Operand &model_obj, neurun::backend::operand::IObject &obj)
+{
+  Init<T>(model_obj, obj, true);
+}
+
+template <typename T>
+void permuteInit(const neurun::model::Operand &model_obj, neurun::backend::operand::IObject &obj,
+                 const neurun::model::Layout frontend_layout)
+{
+  Init<T>(model_obj, obj, false, frontend_layout);
+}
+
+} // namespace
+
+namespace neurun
+{
+namespace backend
+{
+
+class IConstantInitializer : model::OperationVisitor
+{
+public:
+  virtual ~IConstantInitializer() = default;
+
+public:
+  virtual void run() = 0;
+
+public:
+  using Initializer = std::function<void(const model::Operand &, backend::operand::IObject &)>;
+
+  void generate(const model::Subgraph &subg, const model::Operands &operands)
+  {
+    _current_subg_layout = subg.getLayout();
+    subg.accept(*this);
+    for (const auto &e : subg.operations())
+    {
+      for (const auto &ind : e.node->getInputs())
+      {
+        const auto &obj = operands.at(ind);
+        if (obj.isConstant() && !exist(ind))
+        {
+          registerPermuteInitializer(ind, obj);
+        }
+      }
+    }
+  }
+
+protected:
+#define OP(InternalName, IsNnApi) \
+  virtual void visit(const model::operation::InternalName &) override { /* DO NOTHING */}
+#include "model/Operations.lst"
+#undef OP
+
+protected:
+  void registerCopyInitializer(const model::OperandIndex &index, const model::Operand &obj)
+  {
+    // For only CONSTANTS
+    if (!obj.isConstant())
+      return;
+
+    VERBOSE(FillOperandData) << "Fill data for operand " << index.value() << std::endl;
+
+    const auto type = obj.typeInfo().type();
+    using neurun::model::DataType;
+
+    switch (type)
+    {
+      case DataType::FLOAT32:
+        _init_map[index] = copyInit<float>;
+        break;
+      case DataType::INT32:
+        _init_map[index] = copyInit<int32_t>;
+        break;
+      case DataType::UINT32:
+        _init_map[index] = copyInit<uint32_t>;
+        break;
+      case DataType::BOOL8:
+      case DataType::QUANT8_ASYMM:
+        _init_map[index] = copyInit<uint8_t>;
+        break;
+      default:
+        throw std::runtime_error("Not supported, yet");
+        break;
+    }
+  }
+
+protected:
+  void registerPermuteInitializer(const model::OperandIndex &index, const model::Operand &obj)
+  {
+    // For only CONSTANTS
+    if (!obj.isConstant())
+      return;
+
+    VERBOSE(FillOperandData) << "Fill data for operand " << index.value() << std::endl;
+
+    const auto type = obj.typeInfo().type();
+    using neurun::model::DataType;
+    using namespace std::placeholders;
+
+    switch (type)
+    {
+      case DataType::FLOAT32:
+        _init_map[index] = std::bind(permuteInit<float>, _1, _2, _current_subg_layout);
+        break;
+      case DataType::INT32:
+        _init_map[index] = std::bind(permuteInit<int32_t>, _1, _2, _current_subg_layout);
+        break;
+      case DataType::UINT32:
+        _init_map[index] = std::bind(permuteInit<uint32_t>, _1, _2, _current_subg_layout);
+        break;
+      case DataType::BOOL8:
+      case DataType::QUANT8_ASYMM:
+        _init_map[index] = std::bind(permuteInit<uint8_t>, _1, _2, _current_subg_layout);
+        break;
+      default:
+        throw std::runtime_error("Not supported, yet");
+        break;
+    }
+  }
+
+private:
+  bool exist(const model::OperandIndex &ind) { return _init_map.find(ind) != _init_map.end(); }
+
+protected:
+  std::unordered_map<model::OperandIndex, Initializer> _init_map;
+  model::Layout _current_subg_layout;
+};
+
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ICONSTANT_INITIALIZER_H__
diff --git a/runtimes/neurun/core/include/backend/IKernelGenerator.h b/runtimes/neurun/core/include/backend/IKernelGenerator.h
new file mode 100644
index 000000000..542a55338
--- /dev/null
+++ b/runtimes/neurun/core/include/backend/IKernelGenerator.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_IKERNEL_GENERATOR_H__
+#define __NEURUN_BACKEND_IKERNEL_GENERATOR_H__
+
+#include <memory>
+#include <functional>
+
+#include "ITensorBuilder.h"
+#include "compiler/IExecutionBuilder.h"
+#include "model/OperationVisitor.h"
+#include "model/Subgraph.h"
+#include "cpp14/memory.h"
+
+namespace neurun
+{
+namespace backend
+{
+
+class IKernelGenerator : public model::OperationVisitor
+{
+public:
+  virtual ~IKernelGenerator() = default;
+
+  void generate(const model::Operation &node, neurun::compiler::IExecutionBuilder *executionBuilder)
+  {
+    _execution_builder = executionBuilder;
+    node.accept(*this);
+  }
+
+protected:
+  using model::OperationVisitor::visit;
+
+#define OP(InternalName, IsNnApi)                                     \
+  virtual void visit(const model::operation::InternalName &) override \
+  {                                                                   \
+    throw std::runtime_error("NYI");                                  \
+  }
+#include "model/Operations.lst"
+#undef OP
+
+protected:
+  neurun::compiler::IExecutionBuilder *_execution_builder;
+};
+
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_IKERNEL_GENERATOR_H__
diff --git a/runtimes/neurun/core/include/backend/IMemoryManager.h b/runtimes/neurun/core/include/backend/IMemoryManager.h
new file mode 100644
index 000000000..b06bab872
--- /dev/null
+++ b/runtimes/neurun/core/include/backend/IMemoryManager.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_IMEMORY_MANAGER_H__
+#define __NEURUN_BACKEND_IMEMORY_MANAGER_H__
+
+namespace neurun
+{
+namespace backend
+{
+
+struct IMemoryManager
+{
+  virtual ~IMemoryManager() = default;
+
+  virtual void allocate(void) = 0;
+  virtual void deallocate(void) = 0;
+};
+
+} // namespace backend
+} // namespace neurun
+
+#include <unordered_set>
+#include <memory>
+
+namespace neurun
+{
+namespace backend
+{
+
+using MemoryManagerSet = std::unordered_set<std::unique_ptr<backend::IMemoryManager>>;
+
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_IMEMORY_MANAGER_H__
diff --git a/runtimes/neurun/core/include/backend/IShapeFixer.h b/runtimes/neurun/core/include/backend/IShapeFixer.h
new file mode 100644
index 000000000..ad137942c
--- /dev/null
+++ b/runtimes/neurun/core/include/backend/IShapeFixer.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ISHAPE_FIXER_H__
+#define __NEURUN_BACKEND_ISHAPE_FIXER_H__
+
+#include <memory>
+#include <functional>
+
+#include "ITensorBuilder.h"
+#include "model/OperationVisitor.h"
+#include "model/Subgraph.h"
+#include "cpp14/memory.h"
+
+namespace neurun
+{
+namespace backend
+{
+
+class IShapeFixer : model::OperationVisitor
+{
+public:
+  virtual ~IShapeFixer() = default;
+
+  virtual std::shared_ptr<ITensorBuilder> tensor_builder() = 0;
+
+protected:
+#define OP(InternalName, IsNnApi)                                     \
+  virtual void visit(const model::operation::InternalName &) override \
+  {                                                                   \
+    throw std::runtime_error("NYI");                                  \
+  }
+#include "model/Operations.lst"
+#undef OP
+
+public:
+  void fix(const model::Operation &node) { node.accept(*this); }
+};
+
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ISHAPE_FIXER_H__
diff --git a/runtimes/neurun/core/include/backend/ITensorBuilder.h b/runtimes/neurun/core/include/backend/ITensorBuilder.h
new file mode 100644
index 000000000..72079a2fb
--- /dev/null
+++ b/runtimes/neurun/core/include/backend/ITensorBuilder.h
@@ -0,0 +1,94 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ITENSOR_BUILDER_H__
+#define __NEURUN_BACKEND_ITENSOR_BUILDER_H__
+
+#include <map>
+
+#include "model/Index.h"
+#include "model/OperandInfo.h"
+#include "model/Operation.h"
+#include "model/Layout.h"
+#include "operand/IObject.h"
+#include "operand/ITensor.h"
+#include "compiler/SubTensorInfo.h"
+#include "ITensorManager.h"
+
+namespace neurun
+{
+namespace backend
+{
+
+struct ITensorBuilder
+{
+  using IterateFunction = std::function<void(const model::OperandIndex &)>;
+
+  virtual ~ITensorBuilder(void) = default;
+
+  // TODO Merge registerTensorInfo and registerSubTensorInfo using abstraction by internal class
+  /**
+   * @brief Register tensor information to allocate on backend
+   */
+  virtual void registerTensorInfo(const model::OperandIndex &, const model::OperandInfo &,
+                                  model::Layout frontend_layout, model::Layout backend_layout,
+                                  bool as_const) = 0;
+  /**
+   * @brief     Register subtensor information to allocate on backend
+   */
+  virtual void registerSubTensorInfo(const model::OperandIndex &,
+                                     const compiler::SubTensorInfo &) = 0;
+
+  virtual void notifyFirstUse(const model::OperandIndex &) = 0;
+  virtual void notifyLastUse(const model::OperandIndex &) = 0;
+
+  virtual void prepare(void) = 0;
+  // TODO Remove after all of apis appended land
+  virtual void allocate(void) = 0;
+
+  virtual void allocateConsts() = 0;
+  virtual void allocateNonconsts() = 0;
+  virtual void postFunctionPrepare() = 0;
+  virtual void finalize() = 0;
+
+  virtual std::shared_ptr<::neurun::backend::operand::ITensor>
+  tensorAt(const model::OperandIndex &ind) = 0;
+  virtual std::shared_ptr<backend::operand::IObject> wrapTensor(const model::OperandIndex &ind) = 0;
+  virtual void iterate(const IterateFunction &fn) = 0;
+
+  virtual void preVisit(const model::Operation &) = 0;
+  virtual void postVisit(const model::Operation &) = 0;
+
+  virtual std::unique_ptr<ITensorManager> releaseTensorManager(void) = 0;
+};
+
+} // namespace backend
+} // namespace neurun
+
+#include <unordered_set>
+#include <memory>
+
+namespace neurun
+{
+namespace backend
+{
+
+using TensorBuilderSet = std::unordered_set<std::shared_ptr<backend::ITensorBuilder>>;
+
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ITENSOR_BUILDER_H__
diff --git a/runtimes/neurun/core/include/backend/ITensorManager.h b/runtimes/neurun/core/include/backend/ITensorManager.h
new file mode 100644
index 000000000..74506ef59
--- /dev/null
+++ b/runtimes/neurun/core/include/backend/ITensorManager.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_ITENSOR_MANAGER_H__
+#define __NEURUN_BACKEND_ITENSOR_MANAGER_H__
+
+namespace neurun
+{
+namespace backend
+{
+
+// NOTE This name ITensorManager has been discussed whether or not the name is proper.
+// Anyone can argue with any better name.
+/**
+ * @brief Interface as an abstract tensor manager which has MemoryManager
+ */
+struct ITensorManager
+{
+  virtual ~ITensorManager() = default;
+
+  virtual void allocateConsts(void) = 0;
+  virtual void allocateNonconsts(void) = 0;
+  virtual void deallocateConsts(void) = 0;
+  virtual void deallocateNonconsts(void) = 0;
+};
+
+} // namespace backend
+} // namespace neurun
+
+#include <unordered_set>
+#include <memory>
+
+namespace neurun
+{
+namespace backend
+{
+
+using TensorManagerSet = std::unordered_set<std::unique_ptr<backend::ITensorManager>>;
+
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_ITENSOR_MANAGER_H__
diff --git a/runtimes/neurun/core/include/backend/JSONExecTime.h b/runtimes/neurun/core/include/backend/JSONExecTime.h
new file mode 100644
index 000000000..84505e10f
--- /dev/null
+++ b/runtimes/neurun/core/include/backend/JSONExecTime.h
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_JSON_EXEC_TIME_H__
+#define __NEURUN_BACKEND_JSON_EXEC_TIME_H__
+
+#include <fstream>
+#include <unordered_map>
+#include <map>
+#include <vector>
+#include "backend/Backend.h"
+#include "backend/IConfig.h"
+
+namespace neurun
+{
+namespace backend
+{
+
+/**
+ * @brief table, that contains execution time of an operation on some backend for different input
+ * sizes and transfer time from one backend to another for various input sizes (permutation time)
+ *
+ *               backend ->  op ->  quant->  size   --> time
+ * _measurements[Backend*]["string"][bool][uint32_t] = int64_t
+ */
+using MeasurementData = std::unordered_map<
+    const Backend *,
+    std::unordered_map<std::string, std::unordered_map<bool, std::map<uint32_t, int64_t>>>>;
+
+class JSON
+{
+public:
+  explicit JSON(const std::vector<const Backend *> &backends, MeasurementData &measurements)
+      : _measurement_file("exec_time.json"), _backends(), _measurements(measurements)
+  {
+    for (const auto b : backends)
+    {
+      _backends.emplace(b->config()->id(), b);
+    }
+    loadOperationsExecTime();
+  };
+  /**
+   * @brief Update _operations_exec_time_file with new data.
+   */
+  void uploadOperationsExecTime() const;
+
+private:
+  ///@brief file containing measurements
+  std::string _measurement_file;
+  std::unordered_map<std::string, const Backend *> _backends;
+  std::unordered_map<
+      const Backend *,
+      std::unordered_map<std::string, std::unordered_map<bool, std::map<uint32_t, int64_t>>>>
+      &_measurements;
+  /**
+   * @brief Helper function for inserting data to OperationExecTimes
+   *
+   * @param backend String name of backend
+   * @param operation String name of operation
+   * @param quant if input type quantized
+   * @param stream File stream
+   */
+  void readOperation(const std::string &backend, const std::string &operation, bool quant,
+                     std::ifstream &stream);
+
+  /**
+   * @brief Helper function for writing OperationExecTimes to stream
+   *
+   * @param operation_info Map of operations execution information
+   * @param stream File stream
+   */
+  void printOperation(const std::map<uint32_t, int64_t> &operation_info,
+                      std::ofstream &stream) const;
+  /**
+   * @brief Parse and load operations_exec_time from _operations_exec_time_file.
+   */
+  void loadOperationsExecTime();
+};
+
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_JSON_EXEC_TIME_H__
diff --git a/runtimes/neurun/core/include/backend/operand/IObject.h b/runtimes/neurun/core/include/backend/operand/IObject.h
new file mode 100644
index 000000000..56eea34a8
--- /dev/null
+++ b/runtimes/neurun/core/include/backend/operand/IObject.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_OPERAND_I_OBJECT_H__
+#define __NEURUN_BACKEND_OPERAND_I_OBJECT_H__
+
+#include <functional>
+
+#include "ITensor.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace operand
+{
+
+struct IObject
+{
+  virtual ~IObject() = default;
+  virtual operand::ITensor *ptr(void) const = 0;
+  virtual void access(const std::function<void(operand::ITensor &tensor)> &fn) const = 0;
+};
+
+} // namespace operand
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_OPERAND_I_OBJECT_H__
diff --git a/runtimes/neurun/core/include/backend/operand/ITensor.h b/runtimes/neurun/core/include/backend/operand/ITensor.h
new file mode 100644
index 000000000..f762ad03c
--- /dev/null
+++ b/runtimes/neurun/core/include/backend/operand/ITensor.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_OPERAND_I_TENSOR_H__
+#define __NEURUN_BACKEND_OPERAND_I_TENSOR_H__
+
+#include <cstring>
+#include <cstdint>
+
+#include "model/Layout.h"
+#include "util/Coordinates.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace operand
+{
+
+class ITensor
+{
+public:
+  virtual ~ITensor() = default;
+
+public:
+  virtual uint8_t *buffer() const = 0;
+  virtual size_t total_size() const = 0;
+  virtual size_t dimension(size_t index) const = 0;
+  virtual size_t num_dimensions() const = 0;
+  virtual size_t calcOffset(const neurun::util::Coordinates &coords) const = 0;
+  virtual model::Layout layout() const = 0;
+  virtual bool has_padding() const = 0;
+};
+
+} // namespace operand
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_OPERAND_I_TENSOR_H__
diff --git a/runtimes/neurun/core/include/backend/operand/Object.h b/runtimes/neurun/core/include/backend/operand/Object.h
new file mode 100644
index 000000000..e6f6d926d
--- /dev/null
+++ b/runtimes/neurun/core/include/backend/operand/Object.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_OPERAND_OBJECT_H__
+#define __NEURUN_BACKEND_OPERAND_OBJECT_H__
+
+#include <memory>
+#include "ITensor.h"
+
+#include "IObject.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace operand
+{
+
+class Object : public IObject
+{
+public:
+  Object() = default;
+
+public:
+  Object(const std::shared_ptr<ITensor> &tensor) : _tensor{tensor}
+  {
+    // DO NOTHING
+  }
+
+public:
+  ITensor *ptr(void) const override { return _tensor.get(); }
+
+private:
+  std::shared_ptr<ITensor> _tensor;
+
+public:
+  void access(const std::function<void(ITensor &tensor)> &fn) const override { fn(*_tensor); }
+};
+
+} // namespace operand
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_OPERAND_OBJECT_H__
diff --git a/runtimes/neurun/core/include/compiler/Compiler.h b/runtimes/neurun/core/include/compiler/Compiler.h
new file mode 100644
index 000000000..094ffe853
--- /dev/null
+++ b/runtimes/neurun/core/include/compiler/Compiler.h
@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file  Compiler.h
+ * @brief This file contains Compiler class to define and run compilation phase
+ */
+
+#ifndef __NEURUN_COMPILER_COMPILE_H_
+#define __NEURUN_COMPILER_COMPILE_H_
+
+#include "graph/Graph.h"
+#include "exec/IExecutor.h"
+
+namespace neurun
+{
+
+namespace compiler
+{
+
+enum class State
+{
+  CREATED, // Before compilation
+  STARTED, // Compile is started
+  LOWERED, // Backend is decided
+  COMPILED // Success compilation
+};
+
+/**
+ * @brief Class to compile graph model
+ */
+class Compiler
+{
+public:
+  /**
+   * @brief     Construct a new Compiler object
+   * @param[in] model Graph model
+   */
+  Compiler(const std::shared_ptr<graph::Graph> &graph)
+      : _graph{graph}, _executor{nullptr}, _state{State::CREATED}
+  {
+    // DO NOTHING
+  }
+
+public:
+  /**
+   * @brief   Run compilation. Compilation result will be saved in _plan
+   */
+  void compile(void);
+  /**
+   * @brief       Pass plan reference
+   * @param[out]  plan  Plan reference to return\n
+   *                    Set nullptr if compile is not run yet
+   */
+  void release(std::shared_ptr<exec::IExecutor> &executor) { executor = _executor; }
+
+  void state(State state) { _state = state; }
+  State state(void) const { return _state; }
+
+  /**
+   * @brief   Check if model can compile
+   * @return  @c true if model can compile, otherwise @c false
+   * @note    This method don't check model correctness,\n
+   *          so model verification should be done before calling this method
+   */
+  bool checkCompilable();
+
+private:
+  std::shared_ptr<graph::Graph> _graph;
+  std::shared_ptr<exec::IExecutor> _executor;
+  State _state;
+};
+
+} // namespace compiler
+
+} // namespace neurun
+
+#endif // __NEURUN_COMPILER_COMPILE_H_
diff --git a/runtimes/neurun/core/include/compiler/IExecutionBuilder.h b/runtimes/neurun/core/include/compiler/IExecutionBuilder.h
new file mode 100644
index 000000000..c5a06fec0
--- /dev/null
+++ b/runtimes/neurun/core/include/compiler/IExecutionBuilder.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_COMPILER_I_EXECUTION_BUILDER_H__
+#define __NEURUN_COMPILER_I_EXECUTION_BUILDER_H__
+
+#include <memory>
+
+#include "exec/IFunction.h"
+
+namespace neurun
+{
+namespace compiler
+{
+
+struct IExecutionBuilder
+{
+  virtual ~IExecutionBuilder() = default;
+
+  virtual void append(std::unique_ptr<::neurun::exec::IFunction> &&f) = 0;
+};
+
+} // namespace compiler
+} // namespace neurun
+
+#endif // __NEURUN_COMPILER_I_EXECUTION_BUILDER_H__
diff --git a/runtimes/neurun/core/include/compiler/SubTensorInfo.h b/runtimes/neurun/core/include/compiler/SubTensorInfo.h
new file mode 100644
index 000000000..92b2759ea
--- /dev/null
+++ b/runtimes/neurun/core/include/compiler/SubTensorInfo.h
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file  SubTensorInfo.h
+ * @brief This file contains SubTensorInfo to represent subsumption between tensors
+ *        for backend tensor allocation
+ */
+#ifndef __NEURUN_COMPILER_SUBTENSOR_INFO_H__
+#define __NEURUN_COMPILER_SUBTENSOR_INFO_H__
+
+#include "model/Operand.h"
+
+namespace neurun
+{
+namespace compiler
+{
+
+/**
+ * @brief Class to represent information of subtensor
+ */
+class SubTensorInfo
+{
+public:
+  SubTensorInfo() = delete;
+
+  /**
+   * @brief     Construct a new SubTensorInfo object
+   * @param[in] obj SubTensor object
+   */
+  SubTensorInfo(const model::Operand &obj)
+      : _parent{obj.parent_info()->parent()}, _shape{obj.shape()}, _type{obj.typeInfo()},
+        _offset{obj.parent_info()->offset()}
+  {
+    // DO NOTHING
+  }
+
+public:
+  /**
+   * @brief   Return parent tensor index
+   * @return  Parent tensor index
+   */
+  const model::OperandIndex parent(void) const { return _parent; }
+  /**
+   * @brief   Return tensor shape
+   * @return  Tensor shape
+   */
+  const model::Shape shape(void) const { return _shape; }
+  /**
+   * @brief   Return tensor type
+   * @return  Tensor type
+   */
+  const model::TypeInfo type(void) const { return _type; }
+  /**
+   * @brief   Return tensor's offset in parent tensor
+   * @return  Tensor offset
+   */
+  const neurun::util::Coordinates offset(void) const { return _offset; }
+
+private:
+  const model::OperandIndex _parent;
+  const model::Shape _shape;
+  const model::TypeInfo _type;
+  const neurun::util::Coordinates _offset;
+};
+
+} // compiler
+} // neurun
+
+#endif // __NEURUN_COMPILER_SUBTENSOR_INFO_H__
diff --git a/runtimes/neurun/core/include/exec/Execution.h b/runtimes/neurun/core/include/exec/Execution.h
new file mode 100644
index 000000000..a5b47f039
--- /dev/null
+++ b/runtimes/neurun/core/include/exec/Execution.h
@@ -0,0 +1,118 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file  Execution.h
+ * @brief This file defines execution
+ */
+#ifndef __NEURUN_EXEC_EXECUTION_H__
+#define __NEURUN_EXEC_EXECUTION_H__
+
+#include "exec/IExecutor.h"
+#include "IODescription.h"
+
+#include <thread>
+
+namespace neurun
+{
+namespace exec
+{
+
+/**
+ * @brief Class to define execution instance to collect input/output information for inference
+ *        and prepare executor run (TODO)
+ */
+class Execution
+{
+
+public:
+  /**
+   * @brief     Construct a new Execution object
+   * @param[in] executor  Model executor
+   */
+  Execution(const std::shared_ptr<IExecutor> &executor);
+
+public:
+  /**
+   * @brief   Returns model object
+   * @return  Model object
+   */
+  const model::Model &model() const { return _executor->model(); }
+  /**
+   * @brief     Set input data's information
+   * @param[in] index   Input index
+   * @param[in] buffer  Input data's buffer pointer
+   * @param[in] length  Input data's length
+   */
+  void setInput(const model::IOIndex &index, const void *buffer, size_t length);
+  /**
+   * @brief     Set input data's information, especially to specify unknown dimensions on model
+   * build time.
+   * @param[in] index   Input index
+   * @param[in] type    Input data's type info
+   * @param[in] shape   Input data's shape
+   * @param[in] buffer  Input data's buffer pointer
+   * @param[in] length  Input data's length
+   */
+  void setInput(const model::IOIndex &index, const model::TypeInfo &type, const model::Shape &shape,
+                const void *buffer, size_t length);
+  /**
+   * @brief     Set output data's information
+   * @param[in] index   Output index
+   * @param[in] buffer  Output data's buffer pointer
+   * @param[in] length  Output data's length
+   */
+  void setOutput(const model::IOIndex &index, void *buffer, size_t length);
+  /**
+   * @brief     Set output data's information, especially to specify unknown dimensions on model
+   * build time.
+   * @param[in] index   Output index
+   * @param[in] type    Output data's type info
+   * @param[in] shape   Output data's shape
+   * @param[in] buffer  Output data's buffer pointer
+   * @param[in] length  Output data's length
+   */
+  void setOutput(const model::IOIndex &index, const model::TypeInfo &type,
+                 const model::Shape &shape, void *buffer, size_t length);
+  /**
+   * @brief  Execution
+   * @note   It should be called after setting input and output buffer
+   */
+  void execute();
+
+  /**
+   * @brief Start asynchronous execution
+   * @note  It returns after execution thread is started
+   *        It should be called after setting input and output buffer
+   */
+  void startExecute(void);
+
+  /**
+   * @brief Return when execution is finished
+   * @note  It waits until execution is finished
+   */
+  void waitFinish(void);
+
+private:
+  const std::shared_ptr<IExecutor> _executor;
+  IODescription _io_desc;
+  std::unique_ptr<std::thread> _exec_thread;
+};
+
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_EXECUTION_H__
diff --git a/runtimes/neurun/core/include/exec/ExecutionObservers.h b/runtimes/neurun/core/include/exec/ExecutionObservers.h
new file mode 100644
index 000000000..61c8bf1b2
--- /dev/null
+++ b/runtimes/neurun/core/include/exec/ExecutionObservers.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_EXEC_OBSREVERS_H__
+#define __NEURUN_EXEC_OBSREVERS_H__
+
+#include "exec/IFunction.h"
+#include "model/Operation.h"
+#include "backend/ExecTime.h"
+#include "util/ITimer.h"
+#include "IExecutor.h"
+
+namespace neurun
+{
+namespace exec
+{
+class IExecutionObserver
+{
+public:
+  /// @brief Invoked just before model (not individual operation) execution begins
+  virtual void handleBegin(IExecutor *) { return; }
+
+  virtual void handleBegin(IExecutor *, const model::Operation *, const backend::Backend *) = 0;
+  virtual void handleEnd(IExecutor *, const model::Operation *, const backend::Backend *) = 0;
+
+  /// @brief Invoked just after model (not individual operation) execution ends
+  virtual void handleEnd(IExecutor *) { return; }
+
+  virtual ~IExecutionObserver() = default;
+};
+
+class ProfileObserver : public IExecutionObserver
+{
+public:
+  explicit ProfileObserver(std::shared_ptr<backend::ExecTime> et) : _et(std::move(et)) {}
+  void handleBegin(IExecutor *, const model::Operation *, const backend::Backend *) override;
+  void handleEnd(IExecutor *, const model::Operation *, const backend::Backend *) override;
+
+  void handleEnd(IExecutor *) override { uploadExecTime(); }
+
+private:
+  void uploadExecTime() { _et->uploadOperationsExecTime(); }
+
+private:
+  std::unique_ptr<util::ITimer> _timer;
+  std::shared_ptr<backend::ExecTime> _et;
+};
+
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_OBSREVERS_H__
diff --git a/runtimes/neurun/core/include/exec/IExecutor.h b/runtimes/neurun/core/include/exec/IExecutor.h
new file mode 100644
index 000000000..eb4f5e302
--- /dev/null
+++ b/runtimes/neurun/core/include/exec/IExecutor.h
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file  IExecutor.h
+ * @brief This file defines interface of Executor
+ */
+#ifndef __NEURUN_EXEC_I_EXECUTOR_H_
+#define __NEURUN_EXEC_I_EXECUTOR_H_
+
+#include "model/Model.h"
+#include "IFunction.h"
+#include "IODescription.h"
+#include "model/OperationIndexMap.h"
+
+namespace neurun
+{
+namespace exec
+{
+class IExecutionObserver;
+/**
+ * @brief Struct to define interface of Executor
+ */
+struct IExecutor
+{
+  /**
+   * @brief Construct a new IExecutor object
+   */
+  IExecutor() = default;
+  /**
+   * @brief Destroy the IExecutor object
+   */
+  virtual ~IExecutor() = default;
+
+  /**
+   * @brief Returns model object
+   *
+   * @return Model object
+   */
+  virtual const model::Model &model() = 0;
+
+  /**
+   * @brief     Set an ordering on operations
+   * @param[in] ranks   The table encoding the ordering
+   */
+  virtual void setIndexedRanks(std::shared_ptr<model::OperationIndexMap<int64_t>>) = 0;
+
+  /**
+   * @brief     Start execution
+   * @param[in] desc Input and output description
+   * @note      This method should be thread-safe
+   */
+  virtual void execute(const IODescription &desc) = 0;
+};
+
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_I_EXECUTOR_H_
diff --git a/runtimes/neurun/core/include/exec/IFunction.h b/runtimes/neurun/core/include/exec/IFunction.h
new file mode 100644
index 000000000..5cc29ea75
--- /dev/null
+++ b/runtimes/neurun/core/include/exec/IFunction.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_EXEC_I_FUNCTION_H__
+#define __NEURUN_EXEC_I_FUNCTION_H__
+
+namespace neurun
+{
+namespace exec
+{
+
+class IFunction
+{
+public:
+  virtual ~IFunction() = default;
+  virtual void run() = 0;
+  virtual void runSync() = 0;
+  virtual void prepare() {}
+};
+
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_I_FUNCTION_H__
diff --git a/runtimes/neurun/core/include/exec/IODescription.h b/runtimes/neurun/core/include/exec/IODescription.h
new file mode 100644
index 000000000..4809f34fe
--- /dev/null
+++ b/runtimes/neurun/core/include/exec/IODescription.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_EXEC_IO_DESCRIPTION_H__
+#define __NEURUN_EXEC_IO_DESCRIPTION_H__
+
+#include <vector>
+
+#include "model/OperandInfo.h"
+
+namespace neurun
+{
+namespace exec
+{
+
+struct InputDesc
+{
+  const model::OperandInfo info;
+  const void *buffer;
+  const size_t size;
+
+  InputDesc(void) = delete;
+  InputDesc(const model::OperandInfo &info, const void *buffer, const size_t size)
+      : info(info), buffer(buffer), size(size)
+  {
+  }
+};
+
+struct OutputDesc
+{
+  const model::OperandInfo info;
+  void *buffer;
+  const size_t size;
+
+  OutputDesc(void) = delete;
+  OutputDesc(const model::OperandInfo &info, void *buffer, const size_t size)
+      : info(info), buffer(buffer), size(size)
+  {
+  }
+};
+
+struct IODescription
+{
+  std::vector<std::unique_ptr<InputDesc>> inputs;
+  std::vector<std::unique_ptr<OutputDesc>> outputs;
+};
+
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_IO_DESCRIPTION_H__
diff --git a/runtimes/neurun/core/include/exec/NopFunction.h b/runtimes/neurun/core/include/exec/NopFunction.h
new file mode 100644
index 000000000..5cbd7e5ce
--- /dev/null
+++ b/runtimes/neurun/core/include/exec/NopFunction.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file  NopFunction.h
+ * @brief This file defines NopFunction
+ */
+#ifndef __NEURUN_EXEC_NOP_FUNCTION_H_
+#define __NEURUN_EXEC_NOP_FUNCTION_H_
+
+#include "IFunction.h"
+
+namespace neurun
+{
+namespace exec
+{
+
+/**
+ * @brief A derivative of IFunction tha does nothing
+ *
+ */
+class NopFunction : public IFunction
+{
+public:
+  NopFunction() = default;
+  void run() override
+  {
+    // DO NOTHING
+  }
+  void runSync() override
+  {
+    // this abstract method is used just for profiling and called for
+    // backend::acl_common::AclFunction
+    run();
+  }
+};
+
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_NOP_FUNCTION_H_
diff --git a/runtimes/neurun/core/include/graph/BackendSet.h b/runtimes/neurun/core/include/graph/BackendSet.h
new file mode 100644
index 000000000..a3a508697
--- /dev/null
+++ b/runtimes/neurun/core/include/graph/BackendSet.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_GRAPH_OPERAND_BACKEND_SET_H__
+#define __NEURUN_GRAPH_OPERAND_BACKEND_SET_H__
+
+#include "util/Set.h"
+
+namespace neurun
+{
+namespace backend
+{
+class Backend;
+} // namespace backend
+} // namespace neurun
+
+namespace neurun
+{
+namespace graph
+{
+
+using BackendSet = util::Set<const backend::Backend *>;
+
+} // namespace graph
+} // namespace neurun
+
+#endif // __NEURUN_GRAPH_OPERAND_BACKEND_SET_H__
diff --git a/runtimes/neurun/core/include/graph/Graph.h b/runtimes/neurun/core/include/graph/Graph.h
new file mode 100644
index 000000000..b3e6d54ff
--- /dev/null
+++ b/runtimes/neurun/core/include/graph/Graph.h
@@ -0,0 +1,204 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_GRAPH_GRAPH_H__
+#define __NEURUN_GRAPH_GRAPH_H__
+
+#include <functional>
+
+#include "model/Operation.h"
+#include "model/Model.h"
+#include "graph/LowerInfoMap.h"
+#include "model/Subgraph.h"
+#include "model/Subgraphs.h"
+
+namespace neurun
+{
+namespace graph
+{
+namespace operand
+{
+class LowerInfo;
+} // namespace operand
+} // namespace graph
+} // namespace neurun
+
+namespace neurun
+{
+namespace compiler
+{
+class Linear;
+} // namespace linear
+} // namespace neurun
+
+namespace neurun
+{
+namespace compiler
+{
+class BackendResolver;
+} // namespace compiler
+} // namespace neurun
+
+namespace neurun
+{
+namespace backend
+{
+namespace custom
+{
+class KernelRegistry;
+} // namespace neurun
+} // namespace backend
+} // namespace neurun
+
+namespace neurun
+{
+namespace graph
+{
+
+class Graph
+{
+private:
+  enum class Phase
+  {
+    BUILDING,
+    MODEL
+  };
+
+public:
+  template <bool is_const> class Iterator
+  {
+  public:
+    using GraphRef = typename std::conditional<is_const, const Graph &, Graph &>::type;
+    using IndexRef = const model::OperationIndex &;
+    using NodeRef =
+        typename std::conditional<is_const, const model::Operation &, model::Operation &>::type;
+    using IterFn = std::function<void(IndexRef, NodeRef)>;
+
+  public:
+    virtual ~Iterator() = default;
+    virtual void iterate(GraphRef graph, const IterFn &fn) const = 0;
+  };
+
+  template <bool is_const = false> class DefaultIterator final : public Iterator<is_const>
+  {
+  public:
+    using GraphRef = typename Iterator<is_const>::GraphRef;
+    using IndexRef = typename Iterator<is_const>::IndexRef;
+    using NodeRef = typename Iterator<is_const>::NodeRef;
+    using IterFn = typename Iterator<is_const>::IterFn;
+
+  public:
+    void iterate(GraphRef graph, const IterFn &fn) const;
+  };
+  using DefaultConstIterator = DefaultIterator<true>;
+
+  template <bool is_const = false> class PostDfsIterator final : public Iterator<is_const>
+  {
+  public:
+    using GraphRef = typename Iterator<is_const>::GraphRef;
+    using IndexRef = typename Iterator<is_const>::IndexRef;
+    using NodeRef = typename Iterator<is_const>::NodeRef;
+    using IterFn = typename Iterator<is_const>::IterFn;
+
+  public:
+    void iterate(GraphRef graph, const IterFn &fn) const;
+  };
+  using PostDfsConstIterator = PostDfsIterator<true>;
+
+public:
+  Graph(void) = delete;
+  Graph(std::unique_ptr<model::Model> &&model);
+  ~Graph(void);
+
+  // Graph Building
+public:
+  model::OperandIndex addOperand(const model::Shape &shape, const model::TypeInfo &type);
+  model::OperationIndex addOperation(std::unique_ptr<model::Operation> &&node);
+  void setOperandValue(const model::OperandIndex &ind, std::unique_ptr<model::Data> &&data);
+  void addInput(const model::OperandIndex &ind);
+  void addOutput(const model::OperandIndex &ind);
+  void finishBuilding(void);
+  void lower(void);
+  void removeOperand(const model::OperandIndex &ind) { _model->operands.remove(ind); }
+  std::unique_ptr<compiler::Linear> linearize(void);
+  bool isBuildingPhase(void) const { return _phase == Phase::BUILDING; }
+  std::shared_ptr<const model::Model> shareModel() { return _model; }
+  std::unique_ptr<graph::LowerInfoMap> releaseLowerInfo() { return std::move(_lower_info_map); }
+  std::unique_ptr<model::Subgraphs> releaseSubgraphs() { return std::move(_subgraphs); }
+
+private:
+  void initializeUseDef();
+
+  // Custom operations support
+public:
+  void bindKernelRegistry(const std::shared_ptr<backend::custom::KernelRegistry> &registry)
+  {
+    _kernel_registry = registry;
+  }
+
+  const std::shared_ptr<backend::custom::KernelRegistry> &getKernelRegistry() const
+  {
+    return _kernel_registry;
+  }
+
+private:
+  std::shared_ptr<backend::custom::KernelRegistry> _kernel_registry;
+
+  // Accessors
+public:
+  const model::OperandIndexSequence &getInputs() const { return _model->inputs; }
+  model::OperandIndexSequence &getInputs() { return _model->inputs; }
+  const model::OperandIndexSequence &getOutputs() const { return _model->outputs; }
+  model::OperandIndexSequence &getOutputs() { return _model->outputs; }
+  const model::Operands &operands() const { return _model->operands; }
+  model::Operands &operands() { return _model->operands; } // TODO Remove this non-const accessor
+  const model::Operations &operations() const { return _model->operations; }
+  model::Operations &operations() { return _model->operations; }
+  const compiler::BackendResolver *backend_resolver() const { return _backend_resolver.get(); }
+
+private:
+  Phase _phase{Phase::BUILDING};
+  std::shared_ptr<model::Model> _model;
+
+  // For LOWERED phase
+public:
+  const operation::LowerInfo *getLowerInfo(const model::SubgraphIndex &subg_index) const;
+  void setLowerInfo(const model::SubgraphIndex &subg_index,
+                    std::unique_ptr<operation::LowerInfo> &&lower_info);
+  const operand::LowerInfo *getLowerInfo(const model::OperandIndex &index) const;
+  operand::LowerInfo *getLowerInfo(const model::OperandIndex &index);
+  void setLowerInfo(const model::OperandIndex &index,
+                    std::unique_ptr<operand::LowerInfo> &&lower_info);
+  model::Subgraphs &subgraphs()
+  {
+    assert(_subgraphs);
+    return *_subgraphs;
+  }
+  const model::Subgraphs *subgraphs() const { return _subgraphs.get(); }
+  void setBackendResolver(std::unique_ptr<compiler::BackendResolver> &&br);
+  std::unique_ptr<compiler::BackendResolver> releaseBackendResolver();
+
+private:
+  std::unique_ptr<compiler::BackendResolver> _backend_resolver;
+  std::unique_ptr<LowerInfoMap> _lower_info_map;
+  // Pass(for Perm) can accept only graph so that Graph has Subgraphs as a member
+  std::unique_ptr<model::Subgraphs> _subgraphs;
+};
+
+} // namespace graph
+} // namespace neurun
+
+#endif // __NEURUN_GRAPH_GRAPH_H__
diff --git a/runtimes/neurun/core/include/graph/LowerInfoMap.h b/runtimes/neurun/core/include/graph/LowerInfoMap.h
new file mode 100644
index 000000000..5b755ead3
--- /dev/null
+++ b/runtimes/neurun/core/include/graph/LowerInfoMap.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_GRAPH_LOWER_INFO_MAP_H__
+#define __NEURUN_GRAPH_LOWER_INFO_MAP_H__
+
+#include <memory>
+#include <unordered_map>
+
+#include "graph/operand/LowerInfo.h"
+#include "graph/operation/LowerInfo.h"
+#include "model/OperandIndexMap.h"
+#include "model/Index.h"
+
+namespace neurun
+{
+namespace graph
+{
+
+struct LowerInfoMap
+{
+  std::unordered_map<model::SubgraphIndex, std::unique_ptr<operation::LowerInfo>> operation;
+  model::OperandIndexMap<std::unique_ptr<operand::LowerInfo>> operand;
+};
+
+} // namespace graph
+} // namespace neurun
+
+#endif // __NEURUN_GRAPH_LOWER_INFO_MAP_H__
diff --git a/runtimes/neurun/core/include/graph/operand/LowerInfo.h b/runtimes/neurun/core/include/graph/operand/LowerInfo.h
new file mode 100644
index 000000000..3558f6cc2
--- /dev/null
+++ b/runtimes/neurun/core/include/graph/operand/LowerInfo.h
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_GRAPH_OPERAND_LOWER_INFO_H__
+#define __NEURUN_GRAPH_OPERAND_LOWER_INFO_H__
+
+#include <functional>
+#include <stdint.h>
+
+#include "graph/operand/PermuteFactor.h"
+#include "util/Set.h"
+
+namespace neurun
+{
+namespace backend
+{
+class Backend;
+} // namespace backend
+} // namespace neurun
+
+namespace neurun
+{
+namespace graph
+{
+namespace operand
+{
+using PermuteFactorSet = util::Set<PermuteFactor>;
+
+class LowerInfo
+{
+public:
+  class Shape4D
+  {
+  public:
+    Shape4D(uint32_t n, uint32_t h, uint32_t w, uint32_t c) : _n{n}, _h{h}, _w{w}, _c{c}
+    {
+      // DO NOTHING
+    }
+
+  public:
+    uint32_t n(void) const { return _n; }
+    uint32_t h(void) const { return _h; }
+    uint32_t w(void) const { return _w; }
+    uint32_t c(void) const { return _c; }
+
+  private:
+    uint32_t _n;
+    uint32_t _h;
+    uint32_t _w;
+    uint32_t _c;
+  };
+
+public:
+  LowerInfo(const Shape4D &shape) : _shape{shape}
+  {
+    // DO NOTHING
+  }
+
+public:
+  const Shape4D &shape(void) const { return _shape; }
+  const PermuteFactorSet &def_factors(void) const { return _def_factors; }
+  const PermuteFactorSet &use_factors(void) const { return _use_factors; }
+
+public:
+  void addDefPermuteFactor(const PermuteFactor &factor) { _def_factors.add(factor); }
+  void addUsePermuteFactor(const PermuteFactor &factor) { _use_factors.add(factor); }
+  void removeDefPermuteFactor(const PermuteFactor &factor) { _def_factors.remove(factor); }
+  void removeUsePermuteFactor(const PermuteFactor &factor) { _use_factors.remove(factor); }
+
+private:
+  Shape4D _shape;
+  PermuteFactorSet _def_factors;
+  PermuteFactorSet _use_factors;
+};
+
+} // namespace operand
+} // namespace graph
+} // namespace neurun
+
+#endif // __NEURUN_GRAPH_OPERAND_LOWED_INFO_H__
diff --git a/runtimes/neurun/core/include/graph/operand/ParentInfo.h b/runtimes/neurun/core/include/graph/operand/ParentInfo.h
new file mode 100644
index 000000000..024925d90
--- /dev/null
+++ b/runtimes/neurun/core/include/graph/operand/ParentInfo.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file  ParentInfo.h
+ * @brief This file contains ParentInfo class and internal Coordinate4D class
+ *        to represent subsumption between operand
+ */
+
+#ifndef __NEURUN_GRAPH_OPERAND_PARENT_INFO_H__
+#define __NEURUN_GRAPH_OPERAND_PARENT_INFO_H__
+
+#include <stdint.h>
+
+#include "model/Index.h"
+#include "util/Coordinates.h"
+
+namespace neurun
+{
+namespace graph
+{
+namespace operand
+{
+
+using neurun::util::Coordinates;
+
+/**
+ * @brief	Class to represent parent operand in child operand
+ */
+class ParentInfo
+{
+public:
+  /**
+   * @brief     Construct a new ParentInfo object
+   * @param[in] parent      Index of parent operand
+   * @param[in] coordinate  Offset of child operand in parent operand
+   * @return
+   */
+  ParentInfo(const model::OperandIndex parent, const Coordinates &coordinate)
+      : _parent{parent}, _coordinate{coordinate}
+  {
+    // DO NOTHING
+  }
+
+public:
+  /**
+   * @brief   Return parent index
+   * @return  Parent index
+   */
+  model::OperandIndex parent(void) const { return _parent; }
+  /**
+   * @brief   Retern offset in parent
+   * @return  Offset
+   */
+  Coordinates offset(void) const { return _coordinate; }
+
+private:
+  model::OperandIndex _parent;
+  Coordinates _coordinate;
+};
+
+} // namespace operand
+} // namespace graph
+} // namespace neurun
+
+#endif // __NEURUN_GRAPH_OPERAND_PARENT_INFO_H__
diff --git a/runtimes/neurun/core/include/graph/operand/PermuteFactor.h b/runtimes/neurun/core/include/graph/operand/PermuteFactor.h
new file mode 100644
index 000000000..480e95c15
--- /dev/null
+++ b/runtimes/neurun/core/include/graph/operand/PermuteFactor.h
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     PermuteFactor.h
+ * @brief    This file contains neurun::graph::operand::PermuteFactor class
+ * @ingroup  COM_AI_RUNTIME
+ */
+
+#ifndef __NEURUN_GRAPH_OPERAND_PERMUTE_FACTOR_H__
+#define __NEURUN_GRAPH_OPERAND_PERMUTE_FACTOR_H__
+
+#include <functional>
+
+#include "model/Layout.h"
+
+namespace neurun
+{
+namespace backend
+{
+class Backend;
+} // namespace backend
+} // namespace neurun
+
+namespace neurun
+{
+namespace graph
+{
+namespace operand
+{
+
+/**
+ * @brief Class that has factors of permutation
+ */
+class PermuteFactor
+{
+public:
+  /**
+   * @brief Construct PermuteFactor object.
+   * @param backend  The backend factor
+   * @param backend  The layout factor
+   */
+  PermuteFactor(const backend::Backend *backend, model::Layout layout)
+      : _backend{backend}, _layout{layout}
+  {
+    // DO NOTHING
+  }
+  /**
+   * @brief Construct PermuteFactor object by copy semantics.
+   */
+  PermuteFactor(const PermuteFactor &f) : _backend{f._backend}, _layout{f._layout}
+  {
+    // DO NOTHING
+  }
+  /**
+   * @brief Construct PermuteFactor object by move semantics.
+   */
+  PermuteFactor(PermuteFactor &&) = default;
+
+public:
+  /**
+   * @brief Get backend
+   *
+   * @return Backend factor
+   */
+  const backend::Backend *backend() const { return _backend; }
+  /**
+   * @brief Get layout
+   *
+   * @return Layout factor
+   */
+  model::Layout layout() const { return _layout; }
+
+public:
+  /**
+   * @brief operator overloading function for `==`
+   *
+   * @return Whether two PermuteFactor are the same
+   */
+  bool operator==(const PermuteFactor &other) const
+  {
+    return _backend == other.backend() && _layout == other.layout();
+  }
+  /**
+   * @brief operator overloading function for `!=`
+   *
+   * @return Whether two PermuteFactor are differenct
+   */
+  bool operator!=(const PermuteFactor &other) const { return !(*this == other); }
+
+private:
+  const backend::Backend *_backend{nullptr};
+  model::Layout _layout{model::Layout::UNKNOWN};
+};
+
+} // namespace operand
+} // namespace graph
+} // namespace neurun
+
+namespace std
+{
+
+using PermuteFactor = ::neurun::graph::operand::PermuteFactor;
+
+/**
+ * @brief Structure that provides hash value of PermuteFactor
+ */
+template <> struct hash<PermuteFactor>
+{
+  size_t operator()(const PermuteFactor &factor) const noexcept
+  {
+    hash<const ::neurun::backend::Backend *> b_hash{};
+    hash<::neurun::model::Layout> l_hash{};
+    return b_hash(factor.backend()) ^ (l_hash(factor.layout()) << 1);
+  }
+};
+
+} // namespace std
+
+#endif // __NEURUN_GRAPH_OPERAND_PERMUTE_FACTOR_H__
diff --git a/runtimes/neurun/core/include/graph/operation/LowerInfo.h b/runtimes/neurun/core/include/graph/operation/LowerInfo.h
new file mode 100644
index 000000000..fb9f5206c
--- /dev/null
+++ b/runtimes/neurun/core/include/graph/operation/LowerInfo.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_GRAPH_OPERATION_LOWER_INFO_H__
+#define __NEURUN_GRAPH_OPERATION_LOWER_INFO_H__
+
+#include <string>
+
+#include <graph/operand/PermuteFactor.h>
+
+namespace neurun
+{
+namespace backend
+{
+class Backend;
+} // namespace backend
+} // namespace neurun
+
+namespace neurun
+{
+namespace graph
+{
+namespace operation
+{
+
+class LowerInfo
+{
+public:
+  LowerInfo(const backend::Backend *backend, model::Layout layout);
+  const backend::Backend *backend() const { return _permute_factor.backend(); }
+  model::Layout layout() const { return _permute_factor.layout(); }
+
+private:
+  graph::operand::PermuteFactor _permute_factor;
+};
+
+} // namespace operation
+} // namespace graph
+} // namespace neurun
+
+#endif // __NEURUN_GRAPH_OPERATION_LOWER_INFO_H__
diff --git a/runtimes/neurun/core/include/model/Data.h b/runtimes/neurun/core/include/model/Data.h
new file mode 100644
index 000000000..3316ad874
--- /dev/null
+++ b/runtimes/neurun/core/include/model/Data.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_DATA_H__
+#define __NEURUN_MODEL_DATA_H__
+
+#include <algorithm>
+
+namespace neurun
+{
+namespace model
+{
+
+struct Data
+{
+  virtual ~Data() = default;
+
+  virtual size_t size(void) const = 0;
+  virtual const uint8_t *base(void) const = 0;
+};
+
+class CachedData final : public Data
+{
+public:
+  CachedData(const uint8_t *base, size_t size) : _base{new uint8_t[size]}, _size{size}
+  {
+    std::copy(base, base + size, _base);
+  }
+
+public:
+  ~CachedData() { delete[] _base; }
+
+public:
+  size_t size(void) const override { return _size; }
+  const uint8_t *base(void) const override { return _base; }
+
+private:
+  uint8_t *_base;
+  size_t _size;
+};
+
+class ExternalData final : public Data
+{
+public:
+  ExternalData(const uint8_t *base, size_t size) : _base{base}, _size{size}
+  {
+    // DO NOTHING
+  }
+
+public:
+  size_t size(void) const override { return _size; }
+  const uint8_t *base(void) const override { return _base; }
+
+private:
+  const uint8_t *_base;
+  const size_t _size;
+};
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_DATA_H__
diff --git a/runtimes/neurun/core/include/model/DataType.h b/runtimes/neurun/core/include/model/DataType.h
new file mode 100644
index 000000000..7b68dabea
--- /dev/null
+++ b/runtimes/neurun/core/include/model/DataType.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_DATATYPE_H__
+#define __NEURUN_MODEL_DATATYPE_H__
+
+#include <stdexcept>
+
+namespace neurun
+{
+namespace model
+{
+
+enum class DataType
+{
+  FLOAT32 = 0,
+  INT32 = 1,
+  UINT32 = 2,
+  QUANT8_ASYMM = 3,
+  BOOL8 = 4,
+};
+
+inline size_t sizeOfDataType(DataType data_type)
+{
+  switch (data_type)
+  {
+    case DataType::FLOAT32:
+      return sizeof(float);
+    case DataType::INT32:
+      return sizeof(int32_t);
+    case DataType::UINT32:
+      return sizeof(uint32_t);
+    case DataType::BOOL8:
+    case DataType::QUANT8_ASYMM:
+      return sizeof(uint8_t);
+    default:
+      throw std::runtime_error{"Unsupported type size"};
+  }
+}
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_DATATYPE_H__
diff --git a/runtimes/neurun/core/include/model/Index.h b/runtimes/neurun/core/include/model/Index.h
new file mode 100644
index 000000000..e4218d51d
--- /dev/null
+++ b/runtimes/neurun/core/include/model/Index.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERAND_INDEX_H__
+#define __NEURUN_MODEL_OPERAND_INDEX_H__
+
+#include "util/Index.h"
+
+namespace neurun
+{
+namespace model
+{
+
+struct OperationIndexTag;
+using OperationIndex = ::neurun::util::Index<uint32_t, OperationIndexTag>;
+
+struct OperandIndexTag;
+using OperandIndex = ::neurun::util::Index<uint32_t, OperandIndexTag>;
+
+struct IOIndexTag;
+using IOIndex = ::neurun::util::Index<uint32_t, IOIndexTag>;
+
+struct SubgraphIndexTag;
+using SubgraphIndex = ::neurun::util::Index<uint32_t, SubgraphIndexTag>;
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERAND_INDEX_H__
diff --git a/runtimes/neurun/core/include/model/InternalType.h b/runtimes/neurun/core/include/model/InternalType.h
new file mode 100644
index 000000000..fccf2fe04
--- /dev/null
+++ b/runtimes/neurun/core/include/model/InternalType.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_INTERNAL_TYPE_H__
+#define __NEURUN_MODEL_INTERNAL_TYPE_H__
+
+#include <cstdint>
+
+namespace neurun
+{
+namespace model
+{
+
+enum class Activation
+{
+  NONE = 0,
+  RELU = 1,
+  RELU1 = 2,
+  RELU6 = 3,
+  TANH = 4,
+  SIGMOID = 5
+};
+
+enum class PaddingType
+{
+  EXPLICIT = 0,
+  SAME = 1,
+  VALID = 2
+};
+
+struct ExplicitPadding
+{
+  uint32_t left;
+  uint32_t right;
+  uint32_t top;
+  uint32_t bottom;
+};
+
+// TODO Resolve explicit padding param at frontend and save in value field
+struct Padding
+{
+  PaddingType type;
+  ExplicitPadding param;
+};
+
+struct Stride
+{
+  uint32_t vertical;
+  uint32_t horizontal;
+};
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_INTERNAL_TYPE_H__
diff --git a/runtimes/neurun/core/include/model/Layout.h b/runtimes/neurun/core/include/model/Layout.h
new file mode 100644
index 000000000..db46f42de
--- /dev/null
+++ b/runtimes/neurun/core/include/model/Layout.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_LAYOUT_H__
+#define __NEURUN_MODEL_LAYOUT_H__
+
+#include <functional>
+#include <string>
+
+namespace neurun
+{
+namespace model
+{
+
+enum class Layout
+{
+  UNKNOWN = 0,
+  NHWC,
+  NCHW
+};
+
+inline std::string to_string(model::Layout layout)
+{
+  switch (layout)
+  {
+    case Layout::NHWC:
+      return std::string{"NHWC"};
+    case model::Layout::NCHW:
+      return std::string{"NCHW"};
+    case model::Layout::UNKNOWN:
+      return std::string{"UNKNOWN"};
+    default:
+      throw std::runtime_error("WRONG LAYOUT");
+  }
+}
+
+} // namespace model
+} // namespace neurun
+
+namespace std
+{
+
+template <> struct hash<::neurun::model::Layout>
+{
+  size_t operator()(::neurun::model::Layout value) const noexcept
+  {
+    using type = typename std::underlying_type<::neurun::model::Layout>::type;
+    return hash<type>()(static_cast<type>(value));
+  }
+};
+
+} // namespace std
+
+#endif // __NEURUN_MODEL_LAYOUT_H__
diff --git a/runtimes/neurun/core/include/model/Model.h b/runtimes/neurun/core/include/model/Model.h
new file mode 100644
index 000000000..365bef198
--- /dev/null
+++ b/runtimes/neurun/core/include/model/Model.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_MODEL_H__
+#define __NEURUN_MODEL_MODEL_H__
+
+#include "model/Operations.h"
+#include "model/OperandIndexSequence.h"
+#include "model/Operands.h"
+
+namespace neurun
+{
+namespace model
+{
+
+struct Model
+{
+  model::Operations operations;
+  model::Operands operands;
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+};
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_MODEL_H__
diff --git a/runtimes/neurun/core/include/model/Operand.h b/runtimes/neurun/core/include/model/Operand.h
new file mode 100644
index 000000000..6cfe40cb9
--- /dev/null
+++ b/runtimes/neurun/core/include/model/Operand.h
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERAND_H__
+#define __NEURUN_MODEL_OPERAND_H__
+
+#include <cassert>
+#include <cstdint>
+#include <cpp14/memory.h>
+#include <algorithm>
+
+#include "Data.h"
+#include "DataType.h"
+#include "OperandInfo.h"
+#include "graph/operand/ParentInfo.h" // TODO Remove this dependency
+#include "model/OperationIndexList.h"
+
+namespace neurun
+{
+namespace model
+{
+
+class Operand
+{
+public:
+  explicit Operand(const Shape &shape, const TypeInfo &type) : _info{shape, type}
+  {
+    // DO NOTHING
+  }
+
+public:
+  const Shape &shape(void) const { return _info.shape(); }
+  const TypeInfo &typeInfo(void) const { return _info.typeInfo(); }
+  Layout layout() const { return _info.layout(); }
+  const OperandInfo &info(void) const { return _info; }
+  size_t operandSize(void) const;
+
+  const OperationIndexList &getUses() const { return _uses; }
+  const OperationIndexList &getDef() const { return _def; }
+  void appendUse(const OperationIndex &idx);
+  void removeUse(const OperationIndex &idx);
+  void appendDef(const OperationIndex &idx);
+  void removeDef(const OperationIndex &idx);
+
+public:
+  void type(const DataType &type) { _info.type(type); };
+
+public:
+  void data(std::unique_ptr<Data> &&data) { _data = std::move(data); }
+  const Data &data(void) const
+  {
+    assert(_data);
+    return *_data;
+  }
+
+  /**
+   * @brief Get true if Operand has data, otherwise @c false
+   a @return @c true if Operand has data, otherwise @c false
+   */
+  bool isConstant(void) const { return _data != nullptr; }
+
+public:
+  template <typename T, typename... Args> void data(Args &&... args)
+  {
+    data(nnfw::cpp14::make_unique<T>(std::forward<Args>(args)...));
+  }
+
+public:
+  template <typename T> T asScalar(void) const
+  {
+    assert((shape().rank() == 0) || ((shape().rank() == 1) && (shape().dim(0) == 1)));
+    assert(_data != nullptr);
+    assert((_data->base() != nullptr) && (_data->size() == sizeof(T)));
+
+    return *(reinterpret_cast<const T *>(_data->base()));
+  }
+
+public:
+  /**
+   * @brief     Set parent information
+   * @param[in] parent_info Parent information
+   */
+  void parent_info(std::unique_ptr<graph::operand::ParentInfo> &&parent_info);
+  /**
+   * @brief   Return parent information pointer as constant
+   * @return  Parent information pointer
+   */
+  const graph::operand::ParentInfo *parent_info() const;
+  /**
+   * @brief   Return parent information pointer
+   * @return  Perent information pointer
+   */
+  graph::operand::ParentInfo *parent_info();
+
+private:
+  OperandInfo _info;
+  std::unique_ptr<Data> _data;
+
+  OperationIndexList _uses;
+  OperationIndexList _def; // size is 0 (constant) or 1 (from def operation)
+
+  std::unique_ptr<graph::operand::ParentInfo> _parent_info;
+};
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERAND_H__
diff --git a/runtimes/neurun/core/include/model/OperandConstraint.h b/runtimes/neurun/core/include/model/OperandConstraint.h
new file mode 100644
index 000000000..c3145d20d
--- /dev/null
+++ b/runtimes/neurun/core/include/model/OperandConstraint.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERAND_CONSTRAINT_H__
+#define __NEURUN_MODEL_OPERAND_CONSTRAINT_H__
+
+#include <stdint.h>
+#include <limits>
+#include <set>
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class OperandConstraint
+{
+private:
+  static const uint32_t INF = std::numeric_limits<uint32_t>::max();
+
+public:
+  static OperandConstraint createAny() { return OperandConstraint{0u, INF}; }
+  static OperandConstraint createExact(uint32_t exact) { return OperandConstraint{exact, exact}; }
+  static OperandConstraint createAtMost(uint32_t end) { return OperandConstraint{0u, end}; }
+  static OperandConstraint createAtLeast(uint32_t begin) { return OperandConstraint{begin, INF}; }
+  static OperandConstraint createInRange(uint32_t begin, uint32_t end)
+  {
+    return OperandConstraint{begin, end};
+  }
+
+private:
+  OperandConstraint(uint32_t begin, uint32_t end) : _begin{begin}, _end{end} {}
+
+public:
+  bool check(uint32_t ind) const { return _begin <= ind && ind <= _end; }
+
+private:
+  uint32_t _begin;
+  uint32_t _end;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERAND_CONSTRAINT_H__
diff --git a/runtimes/neurun/core/include/model/OperandIndexMap.h b/runtimes/neurun/core/include/model/OperandIndexMap.h
new file mode 100644
index 000000000..c3492d4d0
--- /dev/null
+++ b/runtimes/neurun/core/include/model/OperandIndexMap.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERAND_INDEX_MAP_H__
+#define __NEURUN_MODEL_OPERAND_INDEX_MAP_H__
+
+#include <unordered_map>
+
+#include "Index.h"
+
+namespace neurun
+{
+namespace model
+{
+
+template <typename T> using OperandIndexMap = std::unordered_map<model::OperandIndex, T>;
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERAND_INDEX_MAP_H__
diff --git a/runtimes/neurun/core/include/model/OperandIndexSequence.h b/runtimes/neurun/core/include/model/OperandIndexSequence.h
new file mode 100644
index 000000000..2cf060df2
--- /dev/null
+++ b/runtimes/neurun/core/include/model/OperandIndexSequence.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERAND_INDEX_SEQUENCE_H__
+#define __NEURUN_MODEL_OPERAND_INDEX_SEQUENCE_H__
+
+#include <initializer_list>
+#include <vector>
+
+#include "Index.h"
+
+namespace neurun
+{
+namespace model
+{
+
+class OperandIndexSequence
+{
+public:
+  OperandIndexSequence(void) = default;
+  OperandIndexSequence(std::initializer_list<OperandIndex> list);
+  OperandIndexSequence(std::initializer_list<int32_t> list);
+  OperandIndexSequence(std::initializer_list<uint32_t> list);
+
+public:
+  void append(const OperandIndex &index) { _set.emplace_back(index); }
+
+public:
+  uint32_t size() const { return static_cast<uint32_t>(_set.size()); }
+  const OperandIndex &at(IOIndex set_index) const { return _set.at(set_index.value()); }
+  const OperandIndex &at(uint32_t index) const { return _set.at(index); }
+  bool contains(const OperandIndex &index) const;
+  void replace(const OperandIndex &from, const OperandIndex &to);
+
+public:
+  std::vector<OperandIndex>::const_iterator begin(void) const { return _set.begin(); }
+  std::vector<OperandIndex>::const_iterator end(void) const { return _set.end(); }
+
+private:
+  std::vector<OperandIndex> _set;
+};
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERAND_INDEX_SET_H__
diff --git a/runtimes/neurun/core/include/model/OperandInfo.h b/runtimes/neurun/core/include/model/OperandInfo.h
new file mode 100644
index 000000000..036306e76
--- /dev/null
+++ b/runtimes/neurun/core/include/model/OperandInfo.h
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file  OperandInfo.h
+ * @brief This file contains OperandInfo class
+ */
+#ifndef __NEURUN_MODEL_OPERAND_INFO_H__
+#define __NEURUN_MODEL_OPERAND_INFO_H__
+
+#include "Shape.h"
+#include "TypeInfo.h"
+#include "Layout.h"
+
+namespace neurun
+{
+namespace model
+{
+
+/**
+ * @brief Class to save tensor's shape and type
+ */
+class OperandInfo
+{
+public:
+  /**
+   * @brief Construct a new OperandInfo object (deleted)
+   */
+  OperandInfo() = delete;
+  /**
+   * @brief     Construct a new OperandInfo object
+   * @param[in] shape     Tensor shape
+   * @param[in] typeInfo  Tensor data type
+   */
+  OperandInfo(const Shape &shape, const TypeInfo &typeInfo, Layout layout = Layout::NHWC)
+      : _shape(shape), _typeInfo(typeInfo), _layout(layout)
+  {
+    // DO NOTHING
+  }
+  /**
+   * @brief     Construct a new OperandInfo object
+   * @param[in] origin info for copy
+   */
+  OperandInfo(const OperandInfo &origin)
+      : _shape(origin.shape()), _typeInfo(origin.typeInfo()), _layout(origin.layout())
+  {
+    // DO NOTHING
+  }
+
+public:
+  /**
+   * @brief   Return tensor shape
+   * @return  Tensor shape
+   */
+  const Shape &shape() const { return _shape; }
+  /**
+   * @brief   Return tensor data type info
+   * @return  Tensor data type
+   */
+  const TypeInfo &typeInfo() const { return _typeInfo; }
+  /**
+   * @brief   Return operand shape layout in model
+   * @return  Tensor shape layout
+   */
+  Layout layout() const { return _layout; }
+  /**
+   * @brief   Set tensor data type
+   */
+  void type(const DataType &type) { _typeInfo.type(type); }
+  /**
+   * @brief   Return size of tensor (bytes)
+   * @return  Tensor size
+   */
+  size_t total_size() const { return _shape.num_elements() * sizeOfDataType(_typeInfo.type()); }
+
+private:
+  Shape _shape;
+  TypeInfo _typeInfo;
+  Layout _layout;
+};
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERAND_INFO_H__
diff --git a/runtimes/neurun/core/include/model/Operands.h b/runtimes/neurun/core/include/model/Operands.h
new file mode 100644
index 000000000..517d2ff2b
--- /dev/null
+++ b/runtimes/neurun/core/include/model/Operands.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERANDS_H__
+#define __NEURUN_MODEL_OPERANDS_H__
+
+#include <memory>
+#include <unordered_map>
+
+#include "Operand.h"
+#include "Index.h"
+#include "util/ObjectManager.h"
+
+namespace neurun
+{
+namespace model
+{
+
+class Operands : public util::ObjectManager<OperandIndex, Operand>
+{
+};
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERAND_SET_H__
diff --git a/runtimes/neurun/core/include/model/Operation.h b/runtimes/neurun/core/include/model/Operation.h
new file mode 100644
index 000000000..029684dbd
--- /dev/null
+++ b/runtimes/neurun/core/include/model/Operation.h
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_H__
+#define __NEURUN_MODEL_OPERATION_H__
+
+#include <memory>
+
+#include "model/Operand.h"
+#include "model/OperandIndexSequence.h"
+#include "model/OperandConstraint.h"
+
+namespace neurun
+{
+namespace graph
+{
+namespace operation
+{
+class LowerInfo;
+} // namespace operation
+} // namespace graph
+} // namespace neurun
+
+namespace neurun
+{
+namespace model
+{
+struct OperationVisitor;
+} // namespace model
+} // namespace neurun
+
+namespace neurun
+{
+namespace model
+{
+
+using OperandConstraint = ::neurun::model::operation::OperandConstraint;
+
+class Operation
+{
+public:
+  Operation(OperandConstraint input_constr, const OperandIndexSequence &inputs,
+            const OperandIndexSequence &outputs);
+  explicit Operation(OperandConstraint input_constr);
+
+  Operation(const Operation &) = delete;
+  Operation(Operation &&) = default;
+  Operation &operator=(const Operation &) = delete;
+  Operation &operator=(Operation &&) = default;
+
+  virtual ~Operation();
+
+public:
+  virtual void accept(OperationVisitor &v) const = 0;
+  virtual std::string getName() const = 0;
+
+public:
+  void replaceInput(const OperandIndex &from, const OperandIndex &to);
+  void replaceOutput(const OperandIndex &from, const OperandIndex &to);
+  const OperandIndexSequence &getInputs() const { return _inputs; }
+  const OperandIndexSequence &getOutputs() const { return _outputs; }
+  // It's for only input/output tensors but const data.
+  void setInputs(const OperandIndexSequence &indexes);
+  void setOutputs(const OperandIndexSequence &indexes);
+
+private:
+  OperandConstraint _input_constr;
+  OperandIndexSequence _inputs;
+  OperandIndexSequence _outputs;
+};
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_H__
diff --git a/runtimes/neurun/core/include/model/OperationIndexList.h b/runtimes/neurun/core/include/model/OperationIndexList.h
new file mode 100644
index 000000000..924af7925
--- /dev/null
+++ b/runtimes/neurun/core/include/model/OperationIndexList.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_INDEX_LIST_H__
+#define __NEURUN_MODEL_OPERATION_INDEX_LIST_H__
+
+#include <initializer_list>
+#include <list>
+
+#include "model/Index.h"
+
+namespace neurun
+{
+namespace model
+{
+
+class OperationIndexList
+{
+public:
+  OperationIndexList(void) = default;
+  OperationIndexList(std::initializer_list<OperationIndex> list);
+
+public:
+  void append(const OperationIndex &index) { _list.push_back(index); }
+  void remove(const OperationIndex &index) { _list.remove(index); }
+
+public:
+  uint32_t size() const { return static_cast<uint32_t>(_list.size()); }
+  const std::list<OperationIndex> &list() const { return _list; }
+  bool contains(const OperationIndex &index) const;
+
+private:
+  std::list<OperationIndex> _list;
+};
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_INDEX_LIST_H__
diff --git a/runtimes/neurun/core/include/model/OperationIndexMap.h b/runtimes/neurun/core/include/model/OperationIndexMap.h
new file mode 100644
index 000000000..e0399ef3c
--- /dev/null
+++ b/runtimes/neurun/core/include/model/OperationIndexMap.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_INDEX_MAP_H__
+#define __NEURUN_MODEL_OPERATION_INDEX_MAP_H__
+
+#include <unordered_map>
+
+#include "Index.h"
+
+namespace neurun
+{
+namespace model
+{
+
+template <typename T> using OperationIndexMap = std::unordered_map<model::OperationIndex, T>;
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_INDEX_MAP_H__
diff --git a/runtimes/neurun/core/include/model/OperationVisitor.h b/runtimes/neurun/core/include/model/OperationVisitor.h
new file mode 100644
index 000000000..200e62dd6
--- /dev/null
+++ b/runtimes/neurun/core/include/model/OperationVisitor.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_VISITOR_H__
+#define __NEURUN_MODEL_OPERATION_VISITOR_H__
+
+#include "Operations.Include.h"
+#include "Subgraph.h"
+
+namespace neurun
+{
+namespace model
+{
+
+struct OperationVisitor
+{
+  virtual ~OperationVisitor() = default;
+
+#define OP(InternalName, IsNnApi) \
+  virtual void visit(const operation::InternalName &) {}
+#include "model/Operations.lst"
+#undef OP
+
+  // This Subgraph node should be handled specially so that
+  // Op.lst doesn't have Subgraph
+  virtual void visit(const Subgraph &subgraph)
+  {
+    for (const auto &e : subgraph.operations())
+    {
+      e.node->accept(*this);
+    }
+  }
+};
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_VISITOR_H__
diff --git a/runtimes/neurun/core/include/model/Operations.Include.h b/runtimes/neurun/core/include/model/Operations.Include.h
new file mode 100644
index 000000000..e6790c93b
--- /dev/null
+++ b/runtimes/neurun/core/include/model/Operations.Include.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+// This file has no ifdef guard intentionally
+
+#include "operation/Conv2DNode.h"
+#include "operation/MaxPool2DNode.h"
+#include "operation/AvgPool2DNode.h"
+#include "operation/ConcatNode.h"
+#include "operation/ReshapeNode.h"
+#include "operation/FullyConnectedNode.h"
+#include "operation/SoftmaxNode.h"
+#include "operation/TransposeNode.h"
+#include "operation/PermuteNode.h"
+#include "operation/ReduceSumNode.h"
+#include "operation/AddNode.h"
+#include "operation/SubNode.h"
+#include "operation/DepthwiseConv2DNode.h"
+#include "operation/StridedSliceNode.h"
+#include "operation/MulNode.h"
+#include "operation/SqueezeNode.h"
+#include "operation/TanhNode.h"
+#include "operation/LogisticNode.h"
+#include "operation/CastNode.h"
+#include "operation/DivNode.h"
+#include "operation/ExpNode.h"
+#include "operation/ReduceMaxNode.h"
+#include "operation/ComparisonNode.h"
+#include "operation/LogicalAndNode.h"
+#include "operation/LogicalOrNode.h"
+#include "operation/LogicalNotNode.h"
+#include "operation/LSTMNode.h"
+#include "operation/RSQRTNode.h"
+#include "operation/ReLUNode.h"
+#include "operation/ResizeBilinearNode.h"
+#include "operation/ReLU1Node.h"
+#include "operation/ReLU6Node.h"
+#include "operation/RNNNode.h"
+#include "operation/FloorNode.h"
+#include "operation/SpaceToDepthNode.h"
+#include "operation/L2Pool2DNode.h"
+#include "operation/EmbeddingLookupNode.h"
+#include "operation/L2NormalizationNode.h"
+#include "operation/HashtableLookupNode.h"
+#include "operation/PReLUNode.h"
+#include "operation/TransposeConvNode.h"
+#include "operation/SQRTNode.h"
+#include "operation/SquaredDifferenceNode.h"
+#include "operation/TopKV2Node.h"
+#include "operation/GatherNode.h"
+#include "operation/NegNode.h"
+#include "operation/AbsNode.h"
+#include "operation/ArgMaxNode.h"
+#include "operation/DequantizeNode.h"
+#include "operation/MeanNode.h"
+#include "operation/LocalResponseNormalizationNode.h"
+#include "operation/DepthToSpaceNode.h"
+#include "operation/ReduceMinNode.h"
+#include "operation/SplitNode.h"
+#include "operation/UnpackNode.h"
+#include "operation/PadNode.h"
+#include "operation/CustomNode.h"
diff --git a/runtimes/neurun/core/include/model/Operations.h b/runtimes/neurun/core/include/model/Operations.h
new file mode 100644
index 000000000..4a1b2ca8d
--- /dev/null
+++ b/runtimes/neurun/core/include/model/Operations.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATIONS_H__
+#define __NEURUN_MODEL_OPERATIONS_H__
+
+#include "model/Index.h"
+#include "model/Operation.h"
+#include "util/ObjectManager.h"
+
+namespace neurun
+{
+namespace model
+{
+
+class Operations : public util::ObjectManager<OperationIndex, Operation>
+{
+};
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_MANAGER_H__
diff --git a/runtimes/neurun/core/include/model/Operations.lst b/runtimes/neurun/core/include/model/Operations.lst
new file mode 100644
index 000000000..ef645dd35
--- /dev/null
+++ b/runtimes/neurun/core/include/model/Operations.lst
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef OP
+#error  Define OP before including this file
+#endif
+
+// NOTE The relation between "Internal Name" and "NN API" is "1 : N".
+
+// Internal Name                  | NN API?
+OP(AddNode                        , true)
+OP(SubNode                        , true)
+OP(CastNode                       , true)
+OP(Conv2DNode                     , true)
+OP(DepthwiseConv2DNode            , true)
+OP(AvgPool2DNode                  , true)
+OP(MaxPool2DNode                  , true)
+OP(ConcatNode                     , true)
+OP(FullyConnectedNode             , true)
+OP(ReduceSumNode                  , true)
+OP(ReshapeNode                    , true)
+OP(MulNode                        , true)
+OP(SoftmaxNode                    , true)
+OP(SqueezeNode                    , true)
+OP(StridedSliceNode               , true)
+OP(TanhNode                       , true)
+OP(LogisticNode                   , true)
+OP(DivNode                        , true)
+OP(TransposeNode                  , true)
+OP(ExpNode                        , true)
+OP(ReduceMaxNode                  , true)
+OP(ComparisonNode                 , true)
+OP(LogicalAndNode                 , true)
+OP(LogicalOrNode                  , true)
+OP(LogicalNotNode                 , true)
+OP(LSTMNode                       , true)
+OP(RSQRTNode                      , true)
+OP(ReLUNode                       , true)
+OP(ResizeBilinearNode             , true)
+OP(ReLU1Node                      , true)
+OP(ReLU6Node                      , true)
+OP(RNNNode                        , true)
+OP(FloorNode                      , true)
+OP(SpaceToDepthNode               , true)
+OP(L2Pool2DNode                   , true)
+OP(EmbeddingLookupNode            , true)
+OP(L2NormalizationNode            , true)
+OP(HashtableLookupNode            , true)
+OP(PReLUNode                      , true)
+OP(TransposeConvNode              , true)
+OP(SQRTNode                       , true)
+OP(SquaredDifferenceNode          , true)
+OP(TopKV2Node                     , true)
+OP(GatherNode                     , true)
+OP(NegNode                        , true)
+OP(AbsNode                        , true)
+OP(ArgMaxNode                     , true)
+OP(DequantizeNode                 , true)
+OP(MeanNode                       , true)
+OP(LocalResponseNormalizationNode , true)
+OP(DepthToSpaceNode               , true)
+OP(ReduceMinNode                  , true)
+OP(SplitNode                      , true)
+OP(UnpackNode                     , true)
+OP(PadNode                        , true)
+OP(CustomNode                     , true)
+OP(PermuteNode                    , false)
+
diff --git a/runtimes/neurun/core/include/model/Shape.h b/runtimes/neurun/core/include/model/Shape.h
new file mode 100644
index 000000000..c8d986633
--- /dev/null
+++ b/runtimes/neurun/core/include/model/Shape.h
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_SHAPE_H__
+#define __NEURUN_MODEL_SHAPE_H__
+
+#include "Layout.h"
+#include "misc/feature/Shape.h"
+
+#include <cstdint>
+#include <vector>
+
+namespace neurun
+{
+namespace model
+{
+
+// TODO Remove this dependency.
+using FeatureShape = nnfw::misc::feature::Shape;
+
+struct Shape
+{
+public:
+  Shape() = default;
+
+  explicit Shape(int rank) : _dimensions(rank) {}
+
+  Shape(std::initializer_list<int32_t> dimensions) : _dimensions(dimensions) {}
+
+  int rank() const { return _dimensions.size(); }
+
+  const std::vector<int32_t> &dims() const { return _dimensions; }
+
+  int32_t dim(int i) const { return _dimensions.at(i); }
+
+  int32_t &dim(int i) { return _dimensions.at(i); }
+
+  uint64_t num_elements() const;
+
+public:
+  FeatureShape asFeature(Layout layout) const;
+
+  /**
+   * @brief Add dimension to the beginning
+   * @param[in] d dimension to add to the beginning
+   */
+  void prepend(int32_t d) { _dimensions.insert(_dimensions.cbegin(), d); }
+
+  /**
+   * @brief Add dimension to the end
+   * @param[in] d dimension to add to the end
+   */
+  void append(int32_t d) { _dimensions.emplace_back(d); }
+
+  /**
+   * @brief Extend rank of Shape object for operand with param.
+   * @param[in] to_rank The rank value to be extended to
+   */
+  void extendRank(int to_rank);
+
+private:
+  std::vector<int32_t> _dimensions;
+};
+
+inline bool operator==(const Shape &lhs, const Shape &rhs) { return lhs.dims() == rhs.dims(); }
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_SHAPE_H__
diff --git a/runtimes/neurun/core/include/model/Subgraph.h b/runtimes/neurun/core/include/model/Subgraph.h
new file mode 100644
index 000000000..70abf6a1c
--- /dev/null
+++ b/runtimes/neurun/core/include/model/Subgraph.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_SUBGRAPH_H__
+#define __NEURUN_MODEL_SUBGRAPH_H__
+
+#include <vector>
+#include <string>
+#include <memory>
+
+#include "Layout.h"
+#include "Index.h"
+#include "Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+
+// To support ValueSwappable, Element doesn't have members which are classes
+// as value(or can have members which are classes as value and the classes
+// support Swappable)
+struct Element
+{
+  OperationIndex index;
+  const Operation *node;
+
+  Element(const OperationIndex *i, const Operation *n) : index{*i}, node{n}
+  {
+    // DO NOTHING
+  }
+};
+
+class Subgraph : public Operation
+{
+public:
+  explicit Subgraph(model::Layout layout);
+  Subgraph(const Subgraph &) = delete;
+
+public:
+  void accept(OperationVisitor &v) const override;
+
+  virtual std::string getName(void) const override { return "Subgraph"; }
+
+public:
+  void appendOperation(const OperationIndex &index, const Operation &node)
+  {
+    _operations.emplace_back(&index, &node);
+  }
+
+  std::vector<Element> &operations(void) { return _operations; }
+
+  const std::vector<Element> &operations(void) const { return _operations; }
+
+  uint32_t size(void) const { return _operations.size(); }
+
+  // TODO: Impl Dumper instead of this method
+  std::string getStr(void) const;
+
+public:
+  Layout getLayout() const { return _layout; }
+
+private:
+  std::vector<Element> _operations;
+
+private:
+  Layout _layout;
+};
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_SUBGRAPH_H__
diff --git a/runtimes/neurun/core/include/model/Subgraphs.h b/runtimes/neurun/core/include/model/Subgraphs.h
new file mode 100644
index 000000000..13bc549be
--- /dev/null
+++ b/runtimes/neurun/core/include/model/Subgraphs.h
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_SUBGRAPHS_H__
+#define __NEURUN_MODEL_SUBGRAPHS_H__
+
+#include "model/Index.h"
+#include "model/Subgraph.h"
+#include "util/ObjectManager.h"
+
+namespace neurun
+{
+namespace model
+{
+
+/**
+ * @brief Class that manages Subgraph objects
+ */
+class Subgraphs : public util::ObjectManager<SubgraphIndex, Subgraph>
+{
+public:
+  /**
+   * @brief Create an instance of Subgraph with given op and push it to objects
+   *
+   * @param[in] op_idx Operation index that is emplaced
+   * @param[in] op Operation that is emplaced
+   * @param[in] layout Subgraph's layout
+   * @return SubgraphIndex
+   */
+  SubgraphIndex emplace(const OperationIndex &op_index, const Operation &op, Layout layout);
+
+  /**
+   * @brief Push an instance of Subgraph to objects
+   *
+   * @param[in] subg An instance of Subgraph
+   * @return SubgraphIndex
+   */
+  SubgraphIndex emplace(std::unique_ptr<Subgraph> &&subg);
+
+  /**
+   * @brief Check if an operation does exist in any subgraphs
+   *
+   * @param operation_index Operation index to find
+   * @return true If such operation exists in any subgraphs otherwise false
+   */
+  bool containsOperation(const OperationIndex &operation_index) const;
+  /**
+   * @brief Find an operation from all subgraphs
+   *
+   * @param operation_index Operation index to find
+   * @return SubgraphIndex Index of Subgraph that contains given operation index
+   */
+  SubgraphIndex getOperation(const OperationIndex &operation_index) const;
+  /**
+   * @brief Dump subgraphs
+   *
+   * @param msg Message that will be displayed
+   */
+  void dump(const std::string &msg) const;
+
+private:
+  SubgraphIndex findOperation(const OperationIndex &operation_index) const;
+};
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_SUBGRAPHS_H__
diff --git a/runtimes/neurun/core/include/model/TypeInfo.h b/runtimes/neurun/core/include/model/TypeInfo.h
new file mode 100644
index 000000000..4d6a5458b
--- /dev/null
+++ b/runtimes/neurun/core/include/model/TypeInfo.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_TYPEINFO_H__
+#define __NEURUN_MODEL_TYPEINFO_H__
+
+#include <cstdint>
+
+#include "DataType.h"
+
+namespace neurun
+{
+namespace model
+{
+
+class TypeInfo
+{
+public:
+  TypeInfo() = delete;
+
+  explicit TypeInfo(DataType type, float scale = 0, int32_t offset = 0)
+      : _type(type), _scale(scale), _offset(offset)
+  {
+  }
+
+public:
+  DataType type() const { return _type; }
+  float scale() const { return _scale; }
+  int32_t offset() const { return _offset; }
+
+public:
+  void type(const DataType &type) { _type = type; }
+
+private:
+  DataType _type;
+  float _scale;
+  int32_t _offset;
+};
+
+bool operator==(const TypeInfo &lhs, const TypeInfo &rhs);
+bool operator!=(const TypeInfo &lhs, const TypeInfo &rhs);
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_TYPEINFO_H__
diff --git a/runtimes/neurun/core/include/model/operation/AbsNode.h b/runtimes/neurun/core/include/model/operation/AbsNode.h
new file mode 100644
index 000000000..a081d05ba
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/AbsNode.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_ABS_NODE_H__
+#define __NEURUN_MODEL_OPERATION_ABS_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class AbsNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+public:
+  AbsNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Abs"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_ABS_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/AddNode.h b/runtimes/neurun/core/include/model/operation/AddNode.h
new file mode 100644
index 000000000..4310cb231
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/AddNode.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_ADD_NODE_H__
+#define __NEURUN_MODEL_OPERATION_ADD_NODE_H__
+
+#include "model/Operation.h"
+#include "model/InternalType.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class AddNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    LHS = 0,
+    RHS
+  };
+
+  struct Param
+  {
+    Activation activation;
+  };
+
+public:
+  AddNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+          const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Add"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_ADD_H__
diff --git a/runtimes/neurun/core/include/model/operation/ArgMaxNode.h b/runtimes/neurun/core/include/model/operation/ArgMaxNode.h
new file mode 100644
index 000000000..1123509ae
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/ArgMaxNode.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_ARG_MAX_NODE_H__
+#define __NEURUN_MODEL_OPERATION_ARG_MAX_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class ArgMaxNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT
+  };
+
+  struct Param
+  {
+    OperandIndex axis_index;
+  };
+
+public:
+  ArgMaxNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+             const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "ArgMax"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_ARG_MAX_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/AvgPool2DNode.h b/runtimes/neurun/core/include/model/operation/AvgPool2DNode.h
new file mode 100644
index 000000000..eb219308e
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/AvgPool2DNode.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_AVGPOOL2D_NODE_H__
+#define __NEURUN_MODEL_OPERATION_AVGPOOL2D_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+#include "model/InternalType.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class AvgPool2DNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+  struct Param
+  {
+    uint32_t kh;
+    uint32_t kw;
+
+    Stride stride;
+    Padding padding;
+    Activation activation;
+  };
+
+public:
+  AvgPool2DNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "AvgPool2D"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_AVGPOOL2D_H__
diff --git a/runtimes/neurun/core/include/model/operation/CastNode.h b/runtimes/neurun/core/include/model/operation/CastNode.h
new file mode 100644
index 000000000..7d774dfca
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/CastNode.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_CAST_NODE_H__
+#define __NEURUN_MODEL_OPERATION_CAST_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class CastNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+public:
+  CastNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Cast"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_CAST_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/ComparisonNode.h b/runtimes/neurun/core/include/model/operation/ComparisonNode.h
new file mode 100644
index 000000000..b8f3074a4
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/ComparisonNode.h
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_COMPARISON_NODE_H__
+#define __NEURUN_MODEL_OPERATION_COMPARISON_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class ComparisonNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT0 = 0,
+    INPUT1
+  };
+
+  enum class ComparisonType
+  {
+    Equal,
+    NotEqual,
+    Greater,
+    GreaterEqual,
+    Less,
+    LessEqual
+  };
+
+  struct Param
+  {
+    ComparisonType comparison_type;
+  };
+
+public:
+  ComparisonNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                 const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Comparison"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_COMPARISON_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/ConcatNode.h b/runtimes/neurun/core/include/model/operation/ConcatNode.h
new file mode 100644
index 000000000..63965f243
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/ConcatNode.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_CONCAT_NODE_H__
+#define __NEURUN_MODEL_OPERATION_CONCAT_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class ConcatNode : public model::Operation
+{
+public:
+  struct Param
+  {
+    int32_t axis;
+  };
+
+public:
+  ConcatNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+             const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Concat"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_CONCAT_H__
diff --git a/runtimes/neurun/core/include/model/operation/Conv2DNode.h b/runtimes/neurun/core/include/model/operation/Conv2DNode.h
new file mode 100644
index 000000000..0e7e5b7fb
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/Conv2DNode.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_CONV2D_NODE_H__
+#define __NEURUN_MODEL_OPERATION_CONV2D_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+#include "model/InternalType.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class Conv2DNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0,
+    KERNEL,
+    BIAS
+  };
+
+  struct Param
+  {
+    Stride stride;
+    Padding padding;
+    Activation activation;
+  };
+
+public:
+  Conv2DNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+             const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Conv2D"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_CONV2D_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/CustomNode.h b/runtimes/neurun/core/include/model/operation/CustomNode.h
new file mode 100644
index 000000000..ea51b9f3e
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/CustomNode.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef __NEURUN_MODEL_OPERATION_CUSTOM_NODE_H__
+#define __NEURUN_MODEL_OPERATION_CUSTOM_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class CustomNode : public model::Operation
+{
+public:
+  struct Userdata
+  {
+    char *data;
+    size_t size;
+  };
+
+  CustomNode(OperandConstraint input_constr, const OperandIndexSequence &inputs,
+             const OperandIndexSequence &outputs, std::string id, const Userdata &userdata);
+
+  void accept(OperationVisitor &v) const override;
+
+public:
+  /**
+   * @return unique operation identifier
+   */
+  const std::string &id() const;
+
+  std::string getName() const override;
+
+  /**
+   * @return user-provided data
+   */
+  const Userdata &userdata() const;
+
+  ~CustomNode() override;
+
+private:
+  std::string _id;
+  Userdata _userdata;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+#endif // __NEURUN_MODEL_OPERATION_CUSTOM_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/DepthToSpaceNode.h b/runtimes/neurun/core/include/model/operation/DepthToSpaceNode.h
new file mode 100644
index 000000000..eee6ab7a5
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/DepthToSpaceNode.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_DEPTH_TO_SPACE_NODE_H__
+#define __NEURUN_MODEL_OPERATION_DEPTH_TO_SPACE_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class DepthToSpaceNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+  struct Param
+  {
+    OperandIndex block_size_index;
+  };
+
+public:
+  DepthToSpaceNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                   const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "DepthToSpace"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_DEPTH_TO_SPACE_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/DepthwiseConv2DNode.h b/runtimes/neurun/core/include/model/operation/DepthwiseConv2DNode.h
new file mode 100644
index 000000000..45122fa2c
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/DepthwiseConv2DNode.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_DEPTHWISECONV2D_NODE_H__
+#define __NEURUN_MODEL_OPERATION_DEPTHWISECONV2D_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+#include "model/InternalType.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class DepthwiseConv2DNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0,
+    KERNEL,
+    BIAS
+  };
+
+  struct Param
+  {
+    Stride stride;
+    Padding padding;
+    uint32_t multiplier;
+    Activation activation;
+  };
+
+public:
+  DepthwiseConv2DNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                      const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "DepthwiseConv2D"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_DEPTHWISECONV2D_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/DequantizeNode.h b/runtimes/neurun/core/include/model/operation/DequantizeNode.h
new file mode 100644
index 000000000..1536c0f09
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/DequantizeNode.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_DEQUANTIZE_NODE_H__
+#define __NEURUN_MODEL_OPERATION_DEQUANTIZE_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class DequantizeNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+public:
+  DequantizeNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Dequantize"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_DEQUANTIZE_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/DivNode.h b/runtimes/neurun/core/include/model/operation/DivNode.h
new file mode 100644
index 000000000..d30efe116
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/DivNode.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_DIV_NODE_H__
+#define __NEURUN_MODEL_OPERATION_DIV_NODE_H__
+
+#include "model/Operation.h"
+#include "model/InternalType.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class DivNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    LHS = 0,
+    RHS
+  };
+
+  struct Param
+  {
+    Activation activation;
+  };
+
+public:
+  DivNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+          const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Div"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_DIV_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/EmbeddingLookupNode.h b/runtimes/neurun/core/include/model/operation/EmbeddingLookupNode.h
new file mode 100644
index 000000000..9b61884db
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/EmbeddingLookupNode.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_EMBEDDING_LOOKUP_NODE_H__
+#define __NEURUN_MODEL_OPERATION_EMBEDDING_LOOKUP_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class EmbeddingLookupNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    LOOKUPS = 0,
+    VALUES = 1
+  };
+
+public:
+  EmbeddingLookupNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "EmbeddingLookup"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_EMBEDDING_LOOKUP_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/ExpNode.h b/runtimes/neurun/core/include/model/operation/ExpNode.h
new file mode 100644
index 000000000..fa7aa1d68
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/ExpNode.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_EXP_NODE_H__
+#define __NEURUN_MODEL_OPERATION_EXP_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class ExpNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+public:
+  ExpNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Exp"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_EXP_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/FloorNode.h b/runtimes/neurun/core/include/model/operation/FloorNode.h
new file mode 100644
index 000000000..13d87e8a7
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/FloorNode.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_FLOOR_NODE_H__
+#define __NEURUN_MODEL_OPERATION_FLOOR_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class FloorNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+public:
+  FloorNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Floor"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_FLOOR_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/FullyConnectedNode.h b/runtimes/neurun/core/include/model/operation/FullyConnectedNode.h
new file mode 100644
index 000000000..61809b660
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/FullyConnectedNode.h
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_FULLYCONNECTED_NODE_H__
+#define __NEURUN_MODEL_OPERATION_FULLYCONNECTED_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+#include "model/InternalType.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class FullyConnectedNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0,
+    WEIGHT,
+    BIAS
+  };
+
+  struct Param
+  {
+    Activation activation;
+  };
+
+public:
+  FullyConnectedNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                     const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "FullyConnected"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_FULLYCONNECTED_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/GatherNode.h b/runtimes/neurun/core/include/model/operation/GatherNode.h
new file mode 100644
index 000000000..fddeefcf0
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/GatherNode.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_GATHER_NODE_H__
+#define __NEURUN_MODEL_OPERATION_GATHER_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class GatherNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0,
+    INDICES,
+  };
+
+  struct Param
+  {
+    OperandIndex axis_index;
+  };
+
+public:
+  GatherNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+             const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Gather"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_GATHER_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/HashtableLookupNode.h b/runtimes/neurun/core/include/model/operation/HashtableLookupNode.h
new file mode 100644
index 000000000..bbf3d309b
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/HashtableLookupNode.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_HASHTABLE_LOOKUP_NODE_H__
+#define __NEURUN_MODEL_OPERATION_HASHTABLE_LOOKUP_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class HashtableLookupNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    LOOKUPS = 0,
+    KEYS = 1,
+    VALUES = 2
+  };
+
+  enum Output
+  {
+    OUTPUT = 0,
+    HITS = 1
+  };
+
+public:
+  HashtableLookupNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "HashTableLookup"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_HASHTABLE_LOOKUP_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/L2NormalizationNode.h b/runtimes/neurun/core/include/model/operation/L2NormalizationNode.h
new file mode 100644
index 000000000..3c126de45
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/L2NormalizationNode.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_L2_NORMALIZATION_NODE_H__
+#define __NEURUN_MODEL_OPERATION_L2_NORMALIZATION_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class L2NormalizationNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+public:
+  L2NormalizationNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "L2Normalization"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_L2_NORMALIZATION_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/L2Pool2DNode.h b/runtimes/neurun/core/include/model/operation/L2Pool2DNode.h
new file mode 100644
index 000000000..76e80d35a
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/L2Pool2DNode.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_L2_POOL_2D_NODE_H__
+#define __NEURUN_MODEL_OPERATION_L2_POOL_2D_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+#include "model/InternalType.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class L2Pool2DNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0,
+  };
+
+  struct Param
+  {
+    Padding padding;
+    Stride stride;
+    uint32_t kw;
+    uint32_t kh;
+    Activation activation;
+  };
+
+public:
+  L2Pool2DNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+               const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "L2Pool2D"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_L2_POOL_2D_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/LSTMNode.h b/runtimes/neurun/core/include/model/operation/LSTMNode.h
new file mode 100644
index 000000000..e453aed6b
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/LSTMNode.h
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef __NEURUN_MODEL_OPERATION_LSTM_NODE_H__
+#define __NEURUN_MODEL_OPERATION_LSTM_NODE_H__
+
+#include "model/InternalType.h"
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class LSTMNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0,
+    INPUT_TO_INPUT_WEIGHTS = 1,
+    INPUT_TO_FORGET_WEIGHTS = 2,
+    INPUT_TO_CELL_WEIGHTS = 3,
+    INPUT_TO_OUTPUT_WEIGHTS = 4,
+    RECURRENT_TO_INPUT_WEIGHTS = 5,
+    RECURRENT_TO_FORGET_WEIGHTS = 6,
+    RECURRENT_TO_CELL_WEIGHTS = 7,
+    RECURRENT_TO_OUTPUT_WEIGHTS = 8,
+    CELL_TO_INPUT_WEIGHTS = 9,
+    CELL_TO_FORGET_WEIGHTS = 10,
+    CELL_TO_OUTPUT_WEIGHTS = 11,
+    INPUT_GATE_BIAS = 12,
+    FORGET_GATE_BIAS = 13,
+    CELL_BIAS = 14,
+    OUTPUT_GATE_BIAS = 15,
+    PROJECTION_WEIGHTS = 16,
+    PROJECTION_BIAS = 17,
+    OUTPUT_STATE_IN = 18,
+    CELL_STATE_IN = 19,
+  };
+
+  enum Output
+  {
+    SCRATCH_BUFFER = 0,
+    OUTPUT_STATE_OUT = 1,
+    CELL_STATE_OUT = 2,
+    OUTPUT = 3
+  };
+
+  struct Param
+  {
+    Activation activation;
+    float cell_threshold;
+    float projection_threshold;
+  };
+
+public:
+  LSTMNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+           const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "LSTM"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_LSTM_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/LocalResponseNormalizationNode.h b/runtimes/neurun/core/include/model/operation/LocalResponseNormalizationNode.h
new file mode 100644
index 000000000..a7c1cd382
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/LocalResponseNormalizationNode.h
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_LOCAL_RESPONSE_NORMALIZATION_NODE_H__
+#define __NEURUN_MODEL_OPERATION_LOCAL_RESPONSE_NORMALIZATION_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class LocalResponseNormalizationNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+  struct Param
+  {
+    OperandIndex radius_index;
+    OperandIndex bias_index;
+    OperandIndex alpha_index;
+    OperandIndex beta_index;
+  };
+
+public:
+  LocalResponseNormalizationNode(const OperandIndexSequence &inputs,
+                                 const OperandIndexSequence &outputs, const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "LocalResponseNormalization"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_LOCAL_RESPONSE_NORMALIZATION_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/LogicalAndNode.h b/runtimes/neurun/core/include/model/operation/LogicalAndNode.h
new file mode 100644
index 000000000..058f457d2
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/LogicalAndNode.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_LOGICAL_AND_NODE_H__
+#define __NEURUN_MODEL_OPERATION_LOGICAL_AND_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class LogicalAndNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT0 = 0,
+    INPUT1 = 1,
+  };
+
+public:
+  LogicalAndNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "LogicalAnd"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_LOGICAL_AND_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/LogicalNotNode.h b/runtimes/neurun/core/include/model/operation/LogicalNotNode.h
new file mode 100644
index 000000000..d694510d7
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/LogicalNotNode.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_LOGICAL_NOT_NODE_H__
+#define __NEURUN_MODEL_OPERATION_LOGICAL_NOT_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class LogicalNotNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0,
+  };
+
+public:
+  LogicalNotNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "LogicalNot"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_LOGICAL_NOT_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/LogicalOrNode.h b/runtimes/neurun/core/include/model/operation/LogicalOrNode.h
new file mode 100644
index 000000000..220aea2c7
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/LogicalOrNode.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_LOGICAL_OR_NODE_H__
+#define __NEURUN_MODEL_OPERATION_LOGICAL_OR_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class LogicalOrNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT0 = 0,
+    INPUT1 = 1,
+  };
+
+public:
+  LogicalOrNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "LogicalOr"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_LOGICAL_OR_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/LogisticNode.h b/runtimes/neurun/core/include/model/operation/LogisticNode.h
new file mode 100644
index 000000000..03577143b
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/LogisticNode.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_LOGISTIC_NODE_H__
+#define __NEURUN_MODEL_OPERATION_LOGISTIC_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class LogisticNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+public:
+  LogisticNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Logistic"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_LOGISTIC_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/MaxPool2DNode.h b/runtimes/neurun/core/include/model/operation/MaxPool2DNode.h
new file mode 100644
index 000000000..e8afe863d
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/MaxPool2DNode.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_MAXPOOL2D_NODE_H__
+#define __NEURUN_MODEL_OPERATION_MAXPOOL2D_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+#include "model/InternalType.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class MaxPool2DNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+  struct Param
+  {
+    uint32_t kh;
+    uint32_t kw;
+    Stride stride;
+    Padding padding;
+    Activation activation;
+  };
+
+public:
+  MaxPool2DNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "MaxPool2D"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_MAXPOOL2D_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/MeanNode.h b/runtimes/neurun/core/include/model/operation/MeanNode.h
new file mode 100644
index 000000000..9d142545d
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/MeanNode.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_MEAN_NODE_H__
+#define __NEURUN_MODEL_OPERATION_MEAN_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class MeanNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT
+  };
+
+  struct Param
+  {
+    OperandIndex axis_index;
+    bool keep_dims;
+  };
+
+public:
+  MeanNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+           const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Mean"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_MEAN_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/MulNode.h b/runtimes/neurun/core/include/model/operation/MulNode.h
new file mode 100644
index 000000000..e76155256
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/MulNode.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_MUL_NODE_H__
+#define __NEURUN_MODEL_OPERATION_MUL_NODE_H__
+
+#include "model/Operation.h"
+#include "model/InternalType.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class MulNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    LHS = 0,
+    RHS
+  };
+
+  struct Param
+  {
+    Activation activation;
+  };
+
+public:
+  MulNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+          const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Mul"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_MUL_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/NegNode.h b/runtimes/neurun/core/include/model/operation/NegNode.h
new file mode 100644
index 000000000..07f27eab7
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/NegNode.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_NEG_NODE_H__
+#define __NEURUN_MODEL_OPERATION_NEG_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class NegNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+public:
+  NegNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Neg"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_NEG_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/PReLUNode.h b/runtimes/neurun/core/include/model/operation/PReLUNode.h
new file mode 100644
index 000000000..e31805d7f
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/PReLUNode.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_PRELU_NODE_H__
+#define __NEURUN_MODEL_OPERATION_PRELU_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class PReLUNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0,
+    ALPHA = 1
+  };
+
+public:
+  PReLUNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "PReLU"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_PRELU_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/PadNode.h b/runtimes/neurun/core/include/model/operation/PadNode.h
new file mode 100644
index 000000000..c4cc18c39
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/PadNode.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_PAD_NODE_H__
+#define __NEURUN_MODEL_OPERATION_PAD_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class PadNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0,
+    PAD = 1,
+    // VALUE = 2 Not allow padding value operand yet
+  };
+
+public:
+  PadNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Pad"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_PAD_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/PermuteNode.h b/runtimes/neurun/core/include/model/operation/PermuteNode.h
new file mode 100644
index 000000000..2339f35ee
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/PermuteNode.h
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_PERMUTE_NODE_H__
+#define __NEURUN_MODEL_OPERATION_PERMUTE_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace backend
+{
+class BackendContext;
+} // namespace backend
+} // namespace neurun
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class PermuteNode : public model::Operation
+{
+public:
+  enum class Type
+  {
+    NHWC_TO_NCHW,
+    NCHW_TO_NHWC,
+    COPY
+  };
+
+  struct Param
+  {
+    const backend::BackendContext *input_backend_ctx;
+    const backend::BackendContext *output_backend_ctx;
+  };
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Permute"; }
+
+public:
+  PermuteNode(const OperandIndex &input, const OperandIndex &output,
+              const backend::BackendContext *input_backend_ctx,
+              const backend::BackendContext *output_backend_ctx, Type type,
+              model::DataType data_type = model::DataType::FLOAT32);
+
+public:
+  const Param &param() const { return _param; }
+  model::DataType getDataType() const { return _dataType; }
+  Type getPermuteType() const { return _type; }
+
+private:
+  Param _param;
+  Type _type;
+  model::DataType _dataType;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_PERMUTE_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/RNNNode.h b/runtimes/neurun/core/include/model/operation/RNNNode.h
new file mode 100644
index 000000000..fb4c9b325
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/RNNNode.h
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef __NEURUN_MODEL_OPERATION_RNN_NODE_H__
+#define __NEURUN_MODEL_OPERATION_RNN_NODE_H__
+
+#include "model/InternalType.h"
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class RNNNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0,
+    WEIGHTS = 1,
+    RECURRENT_WEIGHTS = 2,
+    BIAS = 3,
+    HIDDEN_STATE_IN = 4
+  };
+
+  enum Output
+  {
+    OUTPUT = 0,
+    HIDDEN_STATE_OUT = 1
+  };
+
+  struct Param
+  {
+    Activation activation;
+  };
+
+public:
+  RNNNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+          const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "RNN"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_RNN_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/RSQRTNode.h b/runtimes/neurun/core/include/model/operation/RSQRTNode.h
new file mode 100644
index 000000000..bd3fe2227
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/RSQRTNode.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_RSQRT_NODE_H__
+#define __NEURUN_MODEL_OPERATION_RSQRT_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class RSQRTNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+public:
+  RSQRTNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "RSQRT"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_RSQRT_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/ReLU1Node.h b/runtimes/neurun/core/include/model/operation/ReLU1Node.h
new file mode 100644
index 000000000..d8a325f21
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/ReLU1Node.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_ReLU1_NODE_H__
+#define __NEURUN_MODEL_OPERATION_ReLU1_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class ReLU1Node : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+public:
+  ReLU1Node(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "ReLU1"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_ReLU1_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/ReLU6Node.h b/runtimes/neurun/core/include/model/operation/ReLU6Node.h
new file mode 100644
index 000000000..437f1e07b
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/ReLU6Node.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_ReLU6_NODE_H__
+#define __NEURUN_MODEL_OPERATION_ReLU6_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class ReLU6Node : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+public:
+  ReLU6Node(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "ReLU6"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_ReLU6_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/ReLUNode.h b/runtimes/neurun/core/include/model/operation/ReLUNode.h
new file mode 100644
index 000000000..848ca1b5c
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/ReLUNode.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_RELU_NODE_H__
+#define __NEURUN_MODEL_OPERATION_RELU_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class ReLUNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+public:
+  ReLUNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "ReLU"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_RELU_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/ReduceMaxNode.h b/runtimes/neurun/core/include/model/operation/ReduceMaxNode.h
new file mode 100644
index 000000000..3886ff481
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/ReduceMaxNode.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_REDUCEMAX_NODE_H__
+#define __NEURUN_MODEL_OPERATION_REDUCEMAX_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class ReduceMaxNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+  struct Param
+  {
+    OperandIndex axis_index;
+  };
+
+public:
+  ReduceMaxNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "ReduceMax"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_REDUCEMAX_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/ReduceMinNode.h b/runtimes/neurun/core/include/model/operation/ReduceMinNode.h
new file mode 100644
index 000000000..f0de17c07
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/ReduceMinNode.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_REDUCEMIN_NODE_H__
+#define __NEURUN_MODEL_OPERATION_REDUCEMIN_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class ReduceMinNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+  struct Param
+  {
+    OperandIndex axis_index;
+  };
+
+public:
+  ReduceMinNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "ReduceMin"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_REDUCEMIN_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/ReduceSumNode.h b/runtimes/neurun/core/include/model/operation/ReduceSumNode.h
new file mode 100644
index 000000000..b70c83cff
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/ReduceSumNode.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_REDUCE_SUM_NODE_H__
+#define __NEURUN_MODEL_OPERATION_REDUCE_SUM_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class ReduceSumNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+  struct Param
+  {
+    OperandIndex axis_index;
+  };
+
+public:
+  ReduceSumNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "ReduceSum"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_REDUCE_SUM_H__
diff --git a/runtimes/neurun/core/include/model/operation/ReshapeNode.h b/runtimes/neurun/core/include/model/operation/ReshapeNode.h
new file mode 100644
index 000000000..735aa30e0
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/ReshapeNode.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_RESHAPE_NODE_H__
+#define __NEURUN_MODEL_OPERATION_RESHAPE_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class ReshapeNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+public:
+  ReshapeNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Reshape"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_RESHAPE_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/ResizeBilinearNode.h b/runtimes/neurun/core/include/model/operation/ResizeBilinearNode.h
new file mode 100644
index 000000000..76f0341cc
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/ResizeBilinearNode.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_RESIZE_BILINEAR_NODE_H__
+#define __NEURUN_MODEL_OPERATION_RESIZE_BILINEAR_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class ResizeBilinearNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+  struct Param
+  {
+    OperandIndex height_index;
+    OperandIndex width_index;
+  };
+
+public:
+  ResizeBilinearNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                     const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "ResizeBilinear"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_RESIZE_BILINEAR_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/SQRTNode.h b/runtimes/neurun/core/include/model/operation/SQRTNode.h
new file mode 100644
index 000000000..b693dab94
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/SQRTNode.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_SQRT_NODE_H__
+#define __NEURUN_MODEL_OPERATION_SQRT_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class SQRTNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+public:
+  SQRTNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "SQRT"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_SQRT_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/SoftmaxNode.h b/runtimes/neurun/core/include/model/operation/SoftmaxNode.h
new file mode 100644
index 000000000..0810526f3
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/SoftmaxNode.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_SOFTMAX_NODE_H__
+#define __NEURUN_MODEL_OPERATION_SOFTMAX_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class SoftmaxNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+  struct Param
+  {
+    float beta;
+  };
+
+public:
+  SoftmaxNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+              const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "SoftMax"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_SOFTMAX_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/SpaceToDepthNode.h b/runtimes/neurun/core/include/model/operation/SpaceToDepthNode.h
new file mode 100644
index 000000000..bbf6732f1
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/SpaceToDepthNode.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_SPACE_TO_DEPTH_NODE_H__
+#define __NEURUN_MODEL_OPERATION_SPACE_TO_DEPTH_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class SpaceToDepthNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+  struct Param
+  {
+    OperandIndex block_size_index;
+  };
+
+public:
+  SpaceToDepthNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                   const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "SpaceToDepth"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_SPACE_TO_DEPTH_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/SplitNode.h b/runtimes/neurun/core/include/model/operation/SplitNode.h
new file mode 100644
index 000000000..eee2c4f84
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/SplitNode.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef __NEURUN_MODEL_OPERATION_SPLIT_NODE_H__
+#define __NEURUN_MODEL_OPERATION_SPLIT_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+class SplitNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+  struct Param
+  {
+    OperandIndex axis_index;
+    OperandIndex num_of_splits_index;
+  };
+
+public:
+  SplitNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+            const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Split"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+} // namespace operation
+} // namespace model
+} // namespace neurun
+#endif // __NEURUN_MODEL_OPERATION_SPLIT_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/SquaredDifferenceNode.h b/runtimes/neurun/core/include/model/operation/SquaredDifferenceNode.h
new file mode 100644
index 000000000..180c68731
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/SquaredDifferenceNode.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_SQUARED_DIFFERENCE_NODE_H__
+#define __NEURUN_MODEL_OPERATION_SQUARED_DIFFERENCE_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class SquaredDifferenceNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    LHS = 0,
+    RHS
+  };
+
+public:
+  SquaredDifferenceNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "SquaredDifference"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_SQUARED_DIFFERENCE_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/SqueezeNode.h b/runtimes/neurun/core/include/model/operation/SqueezeNode.h
new file mode 100644
index 000000000..aa2386b94
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/SqueezeNode.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_SQUEEZE_NODE_H__
+#define __NEURUN_MODEL_OPERATION_SQUEEZE_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class SqueezeNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+  struct Param
+  {
+    OperandIndex dims;
+  };
+
+public:
+  SqueezeNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+              const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Squeeze"; }
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_SQUEEZE_H__
diff --git a/runtimes/neurun/core/include/model/operation/StridedSliceNode.h b/runtimes/neurun/core/include/model/operation/StridedSliceNode.h
new file mode 100644
index 000000000..4de5bc9df
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/StridedSliceNode.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_STRIDED_SLICE_H__
+#define __NEURUN_MODEL_OPERATION_STRIDED_SLICE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class StridedSliceNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+  struct Param
+  {
+    OperandIndex startData_index;      //!< index where slicing start from
+    OperandIndex endData_index;        //!< index where slicing ends to
+    OperandIndex stridesData_index;    //!< index for stride value
+    OperandIndex beginMask_index;      //!< index for beginmask
+    OperandIndex endMask_index;        //!< index for endmask
+    OperandIndex shrinkAxisMask_index; //!< index for shrink axis
+  };
+
+public:
+  StridedSliceNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                   const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "StridedSlice"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_STRIDED_SLICE_H__
diff --git a/runtimes/neurun/core/include/model/operation/SubNode.h b/runtimes/neurun/core/include/model/operation/SubNode.h
new file mode 100644
index 000000000..cb930fd95
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/SubNode.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_SUB_NODE_H__
+#define __NEURUN_MODEL_OPERATION_SUB_NODE_H__
+
+#include "model/Operation.h"
+#include "model/InternalType.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class SubNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    LHS = 0,
+    RHS
+  };
+
+  struct Param
+  {
+    Activation activation;
+  };
+
+public:
+  SubNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+          const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Sub"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_SUB_H__
diff --git a/runtimes/neurun/core/include/model/operation/TanhNode.h b/runtimes/neurun/core/include/model/operation/TanhNode.h
new file mode 100644
index 000000000..5af480ab7
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/TanhNode.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_TANH_NODE_H__
+#define __NEURUN_MODEL_OPERATION_TANH_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class TanhNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+public:
+  TanhNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Tanh"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_TANH_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/TopKV2Node.h b/runtimes/neurun/core/include/model/operation/TopKV2Node.h
new file mode 100644
index 000000000..675c19c58
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/TopKV2Node.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_TOPK_V2_H__
+#define __NEURUN_MODEL_OPERATION_TOPK_V2_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class TopKV2Node : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT
+  };
+
+  enum Output
+  {
+    OUTPUT_VALUES = 0,
+    OUTPUT_INDICES,
+  };
+
+  struct Param
+  {
+    OperandIndex k_index;
+  };
+
+public:
+  TopKV2Node(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+             const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "TopKV2"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_TOPK_V2_H__
diff --git a/runtimes/neurun/core/include/model/operation/TransposeConvNode.h b/runtimes/neurun/core/include/model/operation/TransposeConvNode.h
new file mode 100644
index 000000000..72443c810
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/TransposeConvNode.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_TRANSPOSE_CONV_NODE_H__
+#define __NEURUN_MODEL_OPERATION_TRANSPOSE_CONV_NODE_H__
+
+#include <memory>
+
+#include "model/Operation.h"
+#include "model/InternalType.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class TransposeConvNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    OUTPUT_SHAPE = 0,
+    KERNEL,
+    INPUT
+  };
+
+  struct Param
+  {
+    Padding padding;
+    Stride stride;
+  };
+
+public:
+  TransposeConvNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                    const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "TransposeConv"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_TRANSPOSE_CONV_NODE_H__
diff --git a/runtimes/neurun/core/include/model/operation/TransposeNode.h b/runtimes/neurun/core/include/model/operation/TransposeNode.h
new file mode 100644
index 000000000..1a42212e8
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/TransposeNode.h
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_TRANSPOSE_NODE_H__
+#define __NEURUN_MODEL_OPERATION_TRANSPOSE_NODE_H__
+
+#include "model/Operation.h"
+
+#include <utility>
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class TransposeNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0, // for an n-D tensor, specifying the tensor to be transposed.
+  };
+
+  struct Param
+  {
+    // permutation vector is optional.
+    // if permutation vector is provided, set perm.first to true
+    // if permutation vector is NOT provided, set perm.first to false
+    OperandIndex perm;
+  };
+
+public:
+  TransposeNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Transpose"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_TRANSPOSE_H__
diff --git a/runtimes/neurun/core/include/model/operation/UnpackNode.h b/runtimes/neurun/core/include/model/operation/UnpackNode.h
new file mode 100644
index 000000000..08d8979bf
--- /dev/null
+++ b/runtimes/neurun/core/include/model/operation/UnpackNode.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef __NEURUN_MODEL_OPERATION_UNPACK_NODE_H__
+#define __NEURUN_MODEL_OPERATION_UNPACK_NODE_H__
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+class UnpackNode : public model::Operation
+{
+public:
+  enum Input
+  {
+    INPUT = 0
+  };
+
+  struct Param
+  {
+    int32_t num;
+    int32_t axis;
+  };
+
+public:
+  UnpackNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+             const Param &param);
+
+public:
+  void accept(OperationVisitor &v) const override;
+  std::string getName() const override { return "Unpack"; }
+
+public:
+  const Param &param() const { return _param; }
+
+private:
+  Param _param;
+};
+} // namespace operation
+} // namespace model
+} // namespace neurun
+#endif // __NEURUN_MODEL_OPERATION_UNPACK_NODE_H__
diff --git a/runtimes/neurun/core/include/util/Config.lst b/runtimes/neurun/core/include/util/Config.lst
new file mode 100644
index 000000000..c17ac147e
--- /dev/null
+++ b/runtimes/neurun/core/include/util/Config.lst
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef CONFIG
+#error  Define CONFIG before including this file
+#endif
+
+//     Name                    | Type         | Default
+CONFIG(GRAPH_DOT_DUMP          , int          , "0")
+CONFIG(BACKENDS                , std::string  , "cpu;acl_cl;acl_neon;srcn")
+CONFIG(OP_BACKEND_ALLOPS       , std::string  , "acl_cl")
+CONFIG(OP_BACKEND_MAP          , std::string  , "")
+CONFIG(DISABLE_COMPILE         , bool         , "0")
+CONFIG(NEURUN_LOG_ENABLE       , bool         , "0")
+CONFIG(CPU_MEMORY_PLANNER      , std::string  , "FirstFit")
+CONFIG(EXECUTOR                , std::string  , "Linear")
+CONFIG(ACL_LAYOUT              , std::string  , "none")
+CONFIG(PROFILING_MODE          , bool         , "0")
+CONFIG(USE_SCHEDULER           , bool         , "0")
+
+// Auto-generate all operations
+
+#define OP(InternalName, IsNnApi) \
+    CONFIG(OP_BACKEND_ ## InternalName, std::string, "")
+#include "model/Operations.lst"
+#undef OP
+
diff --git a/runtimes/neurun/core/include/util/ConfigSource.h b/runtimes/neurun/core/include/util/ConfigSource.h
new file mode 100644
index 000000000..b1fa9a87d
--- /dev/null
+++ b/runtimes/neurun/core/include/util/ConfigSource.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_UTIL_CONFIG_SOURCE_H__
+#define __NEURUN_UTIL_CONFIG_SOURCE_H__
+
+#include <memory>
+
+#include "IConfigSource.h"
+
+namespace neurun
+{
+namespace util
+{
+
+void config_source(std::unique_ptr<IConfigSource> &&source);
+
+bool getConfigBool(const std::string &key);
+int getConfigInt(const std::string &key);
+std::string getConfigString(const std::string &key);
+
+} // namespace util
+} // namespace neurun
+
+namespace neurun
+{
+namespace util
+{
+namespace config
+{
+
+#define CONFIG(Name, Type, Default) extern const char *Name;
+
+#include "Config.lst"
+
+#undef CONFIG
+
+} // namespace config
+} // namespace util
+} // namespace neurun
+
+#endif // __NEURUN_UTIL_CONFIG_SOURCE_H__
diff --git a/runtimes/neurun/core/include/util/Coordinates.h b/runtimes/neurun/core/include/util/Coordinates.h
new file mode 100644
index 000000000..67947138f
--- /dev/null
+++ b/runtimes/neurun/core/include/util/Coordinates.h
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_UTIL_COORDINATES_H__
+#define __NEURUN_UTIL_COORDINATES_H__
+
+#include <cassert>
+#include <stdint.h>
+#include <vector>
+
+namespace neurun
+{
+namespace util
+{
+
+/**
+ * @brief Class to represent position(offset) of tensor.\n
+ *        Assume that the front is higher dimensional.
+ *        i.g. N: 0, C: 1, H: 2, W: 3 for NCHW layout
+ */
+class Coordinates final
+{
+public:
+  static constexpr size_t num_max_dimensions = 4;
+
+public:
+  /**
+   * @brief     Construct a new Coordinates object
+   * @param[in] init The initialzer_list with coordinates
+   * @return
+   */
+  Coordinates(std::initializer_list<int32_t> init) : _coordinates{init}
+  {
+    assert(init.size() <= num_max_dimensions);
+  }
+
+public:
+  /**
+   * @brief  Set the coordinate of one of the coordinates.
+   *
+   * @param[in] dimension  Dimension for which the coordinate is set.
+   * @param[in] Coordinate Coordinate to be set for the dimension.
+   */
+  void set(size_t dimension, int32_t coordinate)
+  {
+    assert(dimension < num_max_dimensions);
+    if (dimension >= _coordinates.size())
+    {
+      _coordinates.resize(dimension + 1, 0);
+    }
+    _coordinates[dimension] = coordinate;
+  }
+
+public:
+  /**
+   * @brief Return size of coordinates
+   *
+   * @return size of coordinates
+   */
+  size_t size() const { return _coordinates.size(); }
+
+public:
+  int32_t operator[](size_t dimension) const
+  {
+    assert(dimension < _coordinates.size());
+    return _coordinates[dimension];
+  }
+
+public:
+  /**
+   * @brief begin() of const_iterator for this class
+   *
+   * @return The first iterator of the coordinates
+   */
+  std::vector<int32_t>::const_iterator begin() const { return _coordinates.begin(); }
+  /**
+   * @brief end() of const_iterator for this class
+   *
+   * @return The last iterator of the coordinates
+   */
+  std::vector<int32_t>::const_iterator end() const { return _coordinates.end(); }
+
+private:
+  std::vector<int32_t> _coordinates;
+};
+
+} // namespace util
+} // namespace neurun
+
+#endif // __NEURUN_UTIL_COORDINATES_H__
diff --git a/runtimes/neurun/core/include/util/GeneralConfigSource.h b/runtimes/neurun/core/include/util/GeneralConfigSource.h
new file mode 100644
index 000000000..04e3332b3
--- /dev/null
+++ b/runtimes/neurun/core/include/util/GeneralConfigSource.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_UTIL_GLOBAL_CONFIG_SOURCE_H__
+#define __NEURUN_UTIL_GLOBAL_CONFIG_SOURCE_H__
+
+#include <unordered_map>
+
+#include "util/IConfigSource.h"
+
+namespace neurun
+{
+namespace util
+{
+
+class GeneralConfigSource : public IConfigSource
+{
+public:
+  GeneralConfigSource() = default;
+
+  std::string get(const std::string &key) const override;
+  void set(const std::string &key, const std::string &val);
+
+private:
+  std::unordered_map<std::string, std::string> _map;
+};
+
+} // namespace util
+} // namespace neurun
+
+#endif // __NEURUN_UTIL_GLOBAL_CONFIG_SOURCE_H__
diff --git a/runtimes/neurun/core/include/util/IConfigSource.h b/runtimes/neurun/core/include/util/IConfigSource.h
new file mode 100644
index 000000000..a52d87097
--- /dev/null
+++ b/runtimes/neurun/core/include/util/IConfigSource.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_UTIL_I_CONFIG_SOURCE_H__
+#define __NEURUN_UTIL_I_CONFIG_SOURCE_H__
+
+#include <string>
+
+namespace neurun
+{
+namespace util
+{
+
+struct IConfigSource
+{
+  /**
+   * @brief Destroy the IConfigSource object
+   */
+  virtual ~IConfigSource() = default;
+
+  /**
+   * @brief get the value for the matching key
+   *
+   * @param key string key to search
+   * @return string value associated with the key
+   */
+  virtual std::string get(const std::string &key) const = 0;
+};
+
+} // namespace util
+} // namespace neurun
+
+#endif // __NEURUN_UTIL_I_CONFIG_SOURCE_H__
diff --git a/runtimes/neurun/core/include/util/ITimer.h b/runtimes/neurun/core/include/util/ITimer.h
new file mode 100644
index 000000000..79ecdd0ca
--- /dev/null
+++ b/runtimes/neurun/core/include/util/ITimer.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_UTIL_ITIMER_H__
+#define __NEURUN_UTIL_ITIMER_H__
+
+#include <chrono>
+
+namespace neurun
+{
+namespace util
+{
+
+class ITimer
+{
+public:
+  virtual void handleBegin() = 0;
+  virtual void handleEnd() = 0;
+  int getTime() { return _timer_res; };
+
+  virtual ~ITimer() = default;
+
+protected:
+  int _timer_res{0};
+};
+
+class CPUTimer : public ITimer
+{
+public:
+  void handleBegin() override { _start_time = std::chrono::steady_clock::now(); };
+
+  void handleEnd() override
+  {
+    const auto end_time = std::chrono::steady_clock::now();
+    _timer_res =
+        std::chrono::duration_cast<std::chrono::microseconds>(end_time - _start_time).count();
+  };
+
+private:
+  std::chrono::steady_clock::time_point _start_time; // in microseconds
+};
+
+} // namespace util
+} // namespace neurun
+
+#endif // __NEURUN_UTIL_ITIMER_H__
diff --git a/runtimes/neurun/core/include/util/Index.h b/runtimes/neurun/core/include/util/Index.h
new file mode 100644
index 000000000..d1fdc237c
--- /dev/null
+++ b/runtimes/neurun/core/include/util/Index.h
@@ -0,0 +1,158 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_UTIL_INDEX_H__
+#define __NEURUN_UTIL_INDEX_H__
+
+#include <functional>
+#include <limits>
+#include <stdint.h>
+
+namespace neurun
+{
+namespace util
+{
+
+/**
+ * @brief A wrapper class for unsigned integral Index
+ *        NOTE : Max value of the underlying type is used as the invalid value
+ *
+ * @tparam T Underlying type. Must be unsigned integral type otherwise its behavior is undefined.
+ * @tparam DummyTag Dummy type to distinguish types with a same underlying type. Using an opaque
+ * type is recommended.
+ */
+template <typename T, typename DummyTag> class Index
+{
+private:
+  static const T UNDEFINED = std::numeric_limits<T>::max();
+
+public:
+  /**
+   * @brief Construct a new Index object
+   */
+  explicit Index(void) : _index{UNDEFINED} {}
+  /**
+   * @brief Construct a new Index object with a value in the underlying type
+   *
+   * @param o Value in the underlying type
+   */
+  explicit Index(T o) : _index{o} {}
+  /**
+   * @brief Copy Constructor
+   *
+   * @param o Object to be copied
+   */
+  Index(const Index &o) : _index{o._index} {}
+
+  /**
+   * @brief Assign a value in the underlying time
+   *
+   * @param o Value in the underlying type
+   * @return Index& Reference of this pointer
+   */
+  Index &operator=(T o)
+  {
+    _index = o;
+    return *this;
+  }
+
+  /**
+   * @brief Copy assignment operator
+   *
+   * @param o Object to be copied
+   * @return Index& Reference of this pointer
+   */
+  Index &operator=(const T &o)
+  {
+    _index = o._index;
+    return *this;
+  }
+
+  /**
+   * @brief Equality operator
+   *
+   * @param o The other value in the underlying type to compare
+   * @return true if underlying value is the same, false otherwise
+   */
+  bool operator==(T o) const { return _index == o; }
+  /**
+   * @brief Equality operator
+   *
+   * @param o The other object to compare
+   * @return true if underlying value is the same, false otherwise
+   */
+  bool operator==(const Index &o) const { return _index == o._index; }
+  /**
+   * @brief Inquality operator
+   *
+   * @param o The other value in the underlying type to compare
+   * @return true if underlying value is the same, false otherwise
+   */
+  bool operator!=(T o) const { return !(*this == o); }
+  /**
+   * @brief Inquality operator
+   *
+   * @param o The other object to compare
+   * @return true if underlying value is the same, false otherwise
+   */
+  bool operator!=(const Index &o) const { return !(*this == o); }
+
+  /**
+   * @brief Post increment operator
+   *
+   * @return Index Index before increment
+   */
+  Index operator++(int)
+  {
+    Index temp = *this;
+    _index++;
+    return temp;
+  }
+
+  /**
+   * @brief Check whether the value is valid or not
+   *
+   * @return true if valid, false otherwise
+   */
+  bool valid() const { return _index != UNDEFINED; }
+  /**
+   * @brief Return underlying value
+   *
+   * @return T Underlying value
+   */
+  T value() const { return _index; }
+
+private:
+  T _index;
+};
+
+} // namespace util
+} // namespace neurun
+
+namespace std
+{
+
+template <typename T, typename Tag> struct hash<::neurun::util::Index<T, Tag>>
+{
+  size_t operator()(const ::neurun::util::Index<T, Tag> &index) const noexcept
+  {
+    return hash<T>()(index.value());
+  }
+};
+
+} // namespace std
+
+#endif // __NEURUN_UTIL_INDEX_H__
diff --git a/runtimes/neurun/core/include/util/ObjectManager.h b/runtimes/neurun/core/include/util/ObjectManager.h
new file mode 100644
index 000000000..fd2c3f295
--- /dev/null
+++ b/runtimes/neurun/core/include/util/ObjectManager.h
@@ -0,0 +1,144 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_UTIL_OBJECT_MANAGER_H__
+#define __NEURUN_UTIL_OBJECT_MANAGER_H__
+
+#include <unordered_map>
+#include <memory>
+
+namespace neurun
+{
+namespace util
+{
+
+/**
+ * @brief Class that owns objects and maps them with indices as a handle for them
+ *
+ */
+template <typename Index, typename Object> class ObjectManager
+{
+public:
+  ObjectManager() : _index_count{0u} {}
+
+public:
+  /**
+   * @brief Create an object with args and put it in the container with a new Index for that
+   *
+   * @param[in] args Arguments for creating Operand object
+   * @return Created index that is associated to the object
+   */
+  template <class... Args> Index emplace(Args &&... args)
+  {
+    auto index = generateIndex();
+    _objects.emplace(index, nnfw::cpp14::make_unique<Object>(std::forward<Args>(args)...));
+    return index;
+  }
+
+  /**
+   * @brief Put object in the container with a new Index for that
+   *
+   * @param[in] object Object to be pushed
+   * @return Created index that is associated to the object
+   */
+  Index push(std::unique_ptr<Object> &&object)
+  {
+    auto index = generateIndex();
+    _objects.emplace(index, std::move(object));
+    return index;
+  }
+
+  /**
+   * @brief Remove the object that is associated with the given index
+   *
+   * @param[in] index Index of the object to be removed
+   * @return N/A
+   */
+  void remove(const Index &index) { _objects.erase(index); };
+
+  /**
+   * @brief Get the object that is associated with the given index
+   *
+   * @param[in] index Index of the object to be returned
+   * @return Object
+   */
+  const Object &at(const Index &index) const { return *(_objects.at(index)); }
+  /**
+   * @brief Get the object that is associated with the given index
+   *
+   * @param[in] index Index of the object to be returned
+   * @return Object
+   */
+  Object &at(const Index &index) { return *(_objects.at(index)); }
+  /**
+   * @brief Get the object that is associated with the given index
+   *
+   * @param[in] index Index of the object to be returned
+   * @return true if such entry exists otherwise false
+   */
+  bool exist(const Index &index) const
+  {
+    auto it = _objects.find(index);
+    return it != _objects.end();
+  }
+  /**
+   * @brief Iterate over the container with given function
+   *
+   * @param[in] fn Function to be run for every container entry
+   * @return N/A
+   */
+  void iterate(const std::function<void(const Index &, const Object &)> &fn) const
+  {
+    for (const auto &e : _objects)
+    {
+      fn(e.first, *e.second);
+    }
+  }
+  /**
+   * @brief Iterate over the container with given function
+   *
+   * @param[in] fn Function to be run for every container entry
+   * @return N/A
+   */
+  void iterate(const std::function<void(const Index &, Object &)> &fn)
+  {
+    // TODO Remove this workaround
+    // This implementation is a workaround in case of adding operands while iteration
+    std::list<Index> l;
+
+    for (auto &e : _objects)
+    {
+      l.push_back(e.first);
+    }
+
+    for (auto index : l)
+    {
+      fn(index, *_objects[index]);
+    }
+  }
+
+private:
+  Index generateIndex() { return Index{_index_count++}; }
+
+private:
+  std::unordered_map<Index, std::unique_ptr<Object>> _objects;
+  uint32_t _index_count;
+};
+
+} // namespace util
+} // namespace neurun
+
+#endif // __NEURUN_UTIL_OBJECT_MANAGER_H__
diff --git a/runtimes/neurun/core/include/util/Padding.h b/runtimes/neurun/core/include/util/Padding.h
new file mode 100644
index 000000000..230013238
--- /dev/null
+++ b/runtimes/neurun/core/include/util/Padding.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_UTIL_PADDING_H__
+#define __NEURUN_UTIL_PADDING_H__
+
+#include <stdint.h>
+
+#include "model/Shape.h"
+#include "model/InternalType.h"
+
+namespace neurun
+{
+namespace util
+{
+
+model::ExplicitPadding validPadding(void);
+model::ExplicitPadding samePadding(const model::FeatureShape &ifm_shape,
+                                   const model::FeatureShape &ofm_shape,
+                                   const model::Stride &stride, uint32_t kw, uint32_t kh);
+model::ExplicitPadding calculatePadding(const model::Padding &padding,
+                                        const model::FeatureShape &ifm_shape,
+                                        const model::FeatureShape &ofm_shape,
+                                        const model::Stride &stride, uint32_t kw, uint32_t kh);
+
+} // namespace util
+} // namespace neurun
+
+#endif // __NEURUN_UTIL_PADDING_H__
diff --git a/runtimes/neurun/core/include/util/Set.h b/runtimes/neurun/core/include/util/Set.h
new file mode 100644
index 000000000..13213511d
--- /dev/null
+++ b/runtimes/neurun/core/include/util/Set.h
@@ -0,0 +1,166 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     Set.h
+ * @brief    This file contains neurun::util::Set class
+ * @ingroup  COM_AI_RUNTIME
+ */
+
+#ifndef __NEURUN_UTIL_SET_H__
+#define __NEURUN_UTIL_SET_H__
+
+#include <cassert>
+#include <unordered_set>
+
+namespace neurun
+{
+namespace util
+{
+
+/**
+ * @brief Class for set of custom element
+ & @tparam Element  Key type of Set
+ */
+template <typename Element> class Set
+{
+public:
+  /**
+   * @brief Construct default Set object.
+   */
+  Set() = default;
+  /**
+   * @brief Construct Set object by copy semantics.
+   */
+  Set(const Set<Element> &) = default;
+  /**
+   * @brief Construct move Set object by move semantics.
+   */
+  Set(Set<Element> &&) = default;
+
+public:
+  /**
+   * @brief Add a given element to the set
+   *
+   * @param e Element added
+   */
+  void add(const Element &e) { _set.insert(e); }
+  /**
+   * @brief remove a given element from the set
+   *
+   * @param e Element removed
+   */
+  void remove(const Element &e) { _set.erase(e); }
+  /**
+   * @brief Get size of the set
+   *
+   * @return The size of the set
+   */
+  uint32_t size() const { return static_cast<uint32_t>(_set.size()); }
+  /**
+   * @brief Get whether the set is empty
+   *
+   * @return Whether the set is empty
+   */
+  bool empty() const { return _set.empty(); }
+  /**
+   * @brief Get whether a given element exists in the set
+   *
+   * @param e A given element
+   *
+   * @return Whether a given element exists in the set
+   */
+  bool contains(const Element &e) const { return _set.find(e) != _set.end(); }
+  /**
+   * @brief Get first element of the set
+   *
+   * @return first element of the set
+   */
+  const Element &getOnlyElement() const
+  {
+    assert(_set.size() == 1u);
+    return *_set.begin();
+  }
+
+public:
+  /**
+   * @brief operator overloading function for `|`
+   *
+   * @return A set with two sets combined
+   */
+  Set<Element> operator|(const Set<Element> &other) const // Union
+  {
+    auto ret = *this;
+    for (auto e : other)
+    {
+      ret.add(e);
+    }
+    return ret;
+  }
+  /**
+   * @brief operator overloading function for `&`
+   *
+   * @return A set of elements that overlap in two sets
+   */
+  Set<Element> operator&(const Set<Element> &other) const // Intersect
+  {
+    Set<Element> ret;
+    for (auto e : other)
+    {
+      if (contains(e))
+      {
+        ret.add(e);
+      }
+    }
+    return ret;
+  }
+  /**
+   * @brief operator overloading function for `-`
+   *
+   * @return A set of subtracted from another set
+   */
+  Set<Element> operator-(const Set<Element> &other) const // Minus
+  {
+    auto ret = *this;
+    for (auto e : other)
+    {
+      ret.remove(e);
+    }
+    return ret;
+  }
+
+public:
+  /**
+   * @brief begin() of const_iterator for this class
+   *
+   * @return The first iterator of the set
+   */
+  typename std::unordered_set<Element>::const_iterator begin() const { return _set.begin(); }
+  /**
+   * @brief end() of const_iterator for this class
+   *
+   * @return The last iterator of the set
+   */
+  typename std::unordered_set<Element>::const_iterator end() const { return _set.end(); }
+
+private:
+  std::unordered_set<Element> _set;
+};
+
+} // namespace util
+} // namespace neurun
+
+#endif // __NEURUN_UTIL_SET_H__
diff --git a/runtimes/neurun/core/include/util/ShapeInference.h b/runtimes/neurun/core/include/util/ShapeInference.h
new file mode 100644
index 000000000..54076199b
--- /dev/null
+++ b/runtimes/neurun/core/include/util/ShapeInference.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_GRAPH_SHAPE_INFERENCE_H__
+#define __NEURUN_GRAPH_SHAPE_INFERENCE_H__
+
+#include "model/operation/AvgPool2DNode.h"
+#include "model/operation/ConcatNode.h"
+#include "model/operation/MaxPool2DNode.h"
+#include "model/operation/Conv2DNode.h"
+#include "model/operation/DepthwiseConv2DNode.h"
+#include "model/Operands.h"
+#include "model/Index.h"
+#include "model/Layout.h"
+
+namespace neurun
+{
+namespace shape_inference
+{
+
+using Shapes = std::vector<model::Shape>;
+
+Shapes inferEltwiseShape(const model::Shape &lhs_shape, const model::Shape &rhs_shape);
+
+Shapes inferAvgPoolShape(const model::Shape &in_shape,
+                         const model::operation::AvgPool2DNode::Param &param,
+                         model::Layout layout = model::Layout::NHWC);
+
+Shapes inferConcatShape(const Shapes &in_shapes, const model::operation::ConcatNode::Param &param);
+
+Shapes inferMaxPoolShape(const model::Shape &in_shape,
+                         const model::operation::MaxPool2DNode::Param &param,
+                         model::Layout layout = model::Layout::NHWC);
+
+Shapes inferConv2DShape(const model::Shape &in_shape, const model::Shape &ker_shape,
+                        const model::operation::Conv2DNode::Param &param,
+                        model::Layout layout = model::Layout::NHWC);
+
+Shapes inferDepthwiseConv2DShape(const model::Shape &in_shape, const model::Shape &ker_shape,
+                                 const model::operation::DepthwiseConv2DNode::Param &param,
+                                 model::Layout layout = model::Layout::NHWC);
+
+Shapes inferFullyConnectedShape(const model::Shape &in_shape, const model::Shape &ker_shape);
+
+} // namespace shape_inference
+} // namespace neurun
+
+#endif // __NEURUN_GRAPH_SHAPE_INFERENCE_H__
diff --git a/runtimes/neurun/core/include/util/Utils.h b/runtimes/neurun/core/include/util/Utils.h
new file mode 100644
index 000000000..c472dd7c8
--- /dev/null
+++ b/runtimes/neurun/core/include/util/Utils.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file     Utils.h
+ * @brief    This file contains utility functions
+ * @ingroup  COM_AI_RUNTIME
+ */
+
+#ifndef __NEURUN_UTIL_UTILS_H__
+#define __NEURUN_UTIL_UTILS_H__
+
+#include "model/InternalType.h"
+#include "model/Layout.h"
+#include "model/Operand.h"
+#include "util/Coordinates.h"
+#include "backend/operand/IObject.h"
+
+#define UNUSED_RELEASE(a) (void)(a)
+
+namespace neurun
+{
+namespace util
+{
+
+/**
+ * @brief Converts a internal padding type to const char*
+ * @param[in] code Padding type to be converted
+ * @return A string holding the converted value
+ */
+const char *to_string(const model::PaddingType &type);
+
+Coordinates convertCoordinates(const Coordinates &from_coordinates, model::Layout from_layout,
+                               model::Layout to_layout);
+
+} // namespace util
+} // namespace neurun
+
+#endif // __NEURUN_UTIL_UTILS_H__
diff --git a/runtimes/neurun/core/include/util/feature/Coordinate4D.h b/runtimes/neurun/core/include/util/feature/Coordinate4D.h
new file mode 100644
index 000000000..b020ed239
--- /dev/null
+++ b/runtimes/neurun/core/include/util/feature/Coordinate4D.h
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_UTIL_FEATURE_COORDINATE_4D_H__
+#define __NEURUN_UTIL_FEATURE_COORDINATE_4D_H__
+
+#include <stdint.h>
+
+namespace neurun
+{
+namespace util
+{
+namespace feature
+{
+
+/**
+ * @brief Class to represent position(offset) of subtensor.\n
+ *        Assume that parent and child are already lowered (can get Shape4D).
+ */
+class Coordinate4D
+{
+public:
+  /**
+   * @brief Construct a new Coordinate4D object
+   */
+  Coordinate4D(void) : _n{0}, _h{0}, _w{0}, _c{0}
+  {
+    // DO NOTHING
+  }
+  /**
+   * @brief     Construct a new Coordinate4D object
+   * @param[in] n Batch offset
+   * @param[in] h Height offset
+   * @param[in] w Width offset
+   * @param[in] c Channel offset
+   * @return
+   */
+  Coordinate4D(int32_t n, int32_t h, int32_t w, int32_t c) : _n{n}, _h{h}, _w{w}, _c{c}
+  {
+    // DO NOTHING
+  }
+
+public:
+  /**
+   * @brief   Set batch offset
+   * @param[in] n Batch offset
+   */
+  void n(int32_t n) { _n = n; }
+  /**
+   * @brief   Set height offset
+   * @param[in] h Height offset
+   */
+  void h(int32_t h) { _h = h; }
+  /**
+   * @brief   Set width offset
+   * @param[in] w Width offset
+   */
+  void w(int32_t w) { _w = w; }
+  /**
+   * @brief   Set channel offset
+   * @param[in] c Channel offset
+   */
+  void c(int32_t c) { _c = c; }
+
+public:
+  /**
+   * @brief   Return batch offset
+   * @return  Batch offset
+   */
+  int32_t n(void) const { return _n; }
+  /**
+   * @brief   Return height offset
+   * @return  Height offset
+   */
+  int32_t h(void) const { return _h; }
+  /**
+   * @brief   Return width offset
+   * @return  Width offset
+   */
+  int32_t w(void) const { return _w; }
+  /**
+   * @brief   Return channel offset
+   * @return  Channel offset
+   */
+  int32_t c(void) const { return _c; }
+
+private:
+  int32_t _n;
+  int32_t _h;
+  int32_t _w;
+  int32_t _c;
+};
+
+} // namespace feature
+} // namespace util
+} // namespace neurun
+
+#endif // __NEURUN_UTIL_FEATURE_COORDINATE_4D_H__
diff --git a/runtimes/neurun/core/include/util/feature/nchw/View.h b/runtimes/neurun/core/include/util/feature/nchw/View.h
new file mode 100644
index 000000000..37ee8e398
--- /dev/null
+++ b/runtimes/neurun/core/include/util/feature/nchw/View.h
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_UTIL_FEATURE_NCHW_VIEW_H__
+#define __NEURUN_UTIL_FEATURE_NCHW_VIEW_H__
+
+#include "misc/feature/Reader.h"
+#include "misc/feature/Shape.h"
+
+#include "backend/operand/ITensor.h"
+#include "util/Coordinates.h"
+
+#include <cassert>
+
+namespace neurun
+{
+namespace util
+{
+namespace feature
+{
+namespace nchw
+{
+
+template <typename T> class View final : public nnfw::misc::feature::Reader<T>
+{
+public:
+  View(::neurun::backend::operand::ITensor *tensor) : _tensor{tensor}
+  {
+    assert(tensor->num_dimensions() == 4 && tensor->layout() == model::Layout::NCHW);
+    _shape.N = tensor->dimension(0);
+    _shape.C = tensor->dimension(1);
+    _shape.H = tensor->dimension(2);
+    _shape.W = tensor->dimension(3);
+  }
+
+public:
+  const ::nnfw::misc::feature::Shape &shape(void) const { return _shape; }
+
+public:
+  T at(uint32_t ch, uint32_t row, uint32_t col) const override
+  {
+    const auto offset = feature_index_to_byte_offset(0, ch, row, col);
+
+    T *ptr = reinterpret_cast<T *>(_tensor->buffer() + offset);
+
+    return *ptr;
+  }
+  T at(uint32_t batch, uint32_t ch, uint32_t row, uint32_t col) const override
+  {
+    const auto offset = feature_index_to_byte_offset(batch, ch, row, col);
+
+    T *ptr = reinterpret_cast<T *>(_tensor->buffer() + offset);
+
+    return *ptr;
+  }
+
+public:
+  T &at(uint32_t ch, uint32_t row, uint32_t col)
+  {
+    const auto offset = feature_index_to_byte_offset(0, ch, row, col);
+
+    T *ptr = reinterpret_cast<T *>(_tensor->buffer() + offset);
+
+    return *ptr;
+  }
+  T &at(uint32_t batch, uint32_t ch, uint32_t row, uint32_t col)
+  {
+    const auto offset = feature_index_to_byte_offset(batch, ch, row, col);
+
+    T *ptr = reinterpret_cast<T *>(_tensor->buffer() + offset);
+
+    return *ptr;
+  }
+
+private:
+  size_t feature_index_to_byte_offset(uint32_t batch, uint32_t ch, uint32_t row, uint32_t col) const
+  {
+    return _tensor->calcOffset(
+        neurun::util::Coordinates{static_cast<int32_t>(batch), static_cast<int32_t>(ch),
+                                  static_cast<int32_t>(row), static_cast<int32_t>(col)});
+  }
+
+private:
+  ::nnfw::misc::feature::Shape _shape;
+  ::neurun::backend::operand::ITensor *_tensor;
+};
+
+} // namespace nchw
+} // namespace feature
+} // namespace util
+} // namespace neurun
+
+#endif // __NEURUN_UTIL_FEATURE_NCHW_VIEW_H__
diff --git a/runtimes/neurun/core/include/util/feature/nhwc/Reader.h b/runtimes/neurun/core/include/util/feature/nhwc/Reader.h
new file mode 100644
index 000000000..471f62a4b
--- /dev/null
+++ b/runtimes/neurun/core/include/util/feature/nhwc/Reader.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_UTIL_FEATURE_NHWC_READER_H__
+#define __NEURUN_UTIL_FEATURE_NHWC_READER_H__
+
+#include "util/Utils.h"
+#include "Utils.h"
+
+#include "misc/feature/Reader.h"
+
+namespace neurun
+{
+namespace util
+{
+namespace feature
+{
+namespace nhwc
+{
+
+template <typename T> class Reader final : public nnfw::misc::feature::Reader<T>
+{
+public:
+  Reader(const ::nnfw::misc::feature::Shape &shape, const T *ptr, size_t len)
+      : _shape{shape}, _ptr{ptr}
+  {
+    UNUSED_RELEASE(len); // Workaround for unused variable in release mode
+    assert(shape.N * shape.C * shape.H * shape.W * sizeof(T) == len);
+  }
+
+public:
+  const nnfw::misc::feature::Shape &shape(void) const { return _shape; }
+
+public:
+  T at(uint32_t ch, uint32_t row, uint32_t col) const override
+  {
+    uint32_t index = index_of(_shape, ch, row, col);
+
+    return _ptr[index];
+  }
+  T at(uint32_t batch, uint32_t ch, uint32_t row, uint32_t col) const override
+  {
+    uint32_t index = index_of(_shape, batch, ch, row, col);
+
+    return _ptr[index];
+  }
+
+private:
+  nnfw::misc::feature::Shape _shape;
+
+private:
+  const T *_ptr;
+};
+
+} // namespace nhwc
+} // namespace feature
+} // namespace util
+} // namespace neurun
+
+#endif // __NEURUN_UTIL_FEATURE_NHWC_READER_H__
diff --git a/runtimes/neurun/src/util/feature/nhwc/Utils.h b/runtimes/neurun/core/include/util/feature/nhwc/Utils.h
index 3dab4261c..3dab4261c 100644
--- a/runtimes/neurun/src/util/feature/nhwc/Utils.h
+++ b/runtimes/neurun/core/include/util/feature/nhwc/Utils.h
diff --git a/runtimes/neurun/core/include/util/feature/nhwc/View.h b/runtimes/neurun/core/include/util/feature/nhwc/View.h
new file mode 100644
index 000000000..cfaab8ea4
--- /dev/null
+++ b/runtimes/neurun/core/include/util/feature/nhwc/View.h
@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_UTIL_FEATURE_NHWC_VIEW_H__
+#define __NEURUN_UTIL_FEATURE_NHWC_VIEW_H__
+
+#include <cassert>
+#include <cstddef>
+
+#include "Utils.h"
+#include "util/Utils.h"
+
+#include "misc/feature/Reader.h"
+
+namespace neurun
+{
+namespace util
+{
+namespace feature
+{
+namespace nhwc
+{
+
+// This class is for cpu buffer only, and do not support padding.
+template <typename T> class View final : public nnfw::misc::feature::Reader<T>
+{
+public:
+  View(const ::nnfw::misc::feature::Shape &shape, T *ptr, size_t len) : _shape{shape}, _ptr{ptr}
+  {
+    UNUSED_RELEASE(len); // Workaround for unused variable in release mode
+    assert(shape.N * shape.C * shape.H * shape.W * sizeof(T) == len);
+  }
+
+public:
+  const nnfw::misc::feature::Shape &shape(void) const { return _shape; }
+
+public:
+  T at(uint32_t ch, uint32_t row, uint32_t col) const override
+  {
+    uint32_t index = index_of(_shape, ch, row, col);
+
+    return _ptr[index];
+  }
+
+  T at(uint32_t batch, uint32_t ch, uint32_t row, uint32_t col) const override
+  {
+    uint32_t index = index_of(_shape, batch, ch, row, col);
+
+    return _ptr[index];
+  }
+
+  T &at(uint32_t ch, uint32_t row, uint32_t col)
+  {
+    uint32_t index = index_of(_shape, ch, row, col);
+
+    return _ptr[index];
+  }
+
+  T &at(uint32_t batch, uint32_t ch, uint32_t row, uint32_t col)
+  {
+    uint32_t index = index_of(_shape, batch, ch, row, col);
+
+    return _ptr[index];
+  }
+
+private:
+  nnfw::misc::feature::Shape _shape;
+
+private:
+  T *_ptr;
+};
+
+} // namespace nhwc
+} // namespace feature
+} // namespace util
+} // namespace neurun
+
+#endif // __NEURUN_UTIL_FEATURE_NHWC_VIEW_H__
diff --git a/runtimes/neurun/core/include/util/logging.h b/runtimes/neurun/core/include/util/logging.h
new file mode 100644
index 000000000..a2fdbdd59
--- /dev/null
+++ b/runtimes/neurun/core/include/util/logging.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_UTIL_LOGGING_H__
+#define __NEURUN_UTIL_LOGGING_H__
+
+#include <iostream>
+
+#include "util/ConfigSource.h"
+
+namespace neurun
+{
+namespace util
+{
+namespace logging
+{
+
+class Context
+{
+public:
+  Context() : _enabled{false}
+  {
+    const auto env = util::getConfigBool(util::config::NEURUN_LOG_ENABLE);
+
+    if (env)
+    {
+      _enabled = true;
+    }
+  }
+
+public:
+  bool enabled(void) const { return _enabled; }
+
+private:
+  bool _enabled;
+};
+
+static Context ctx;
+
+} // namespace logging
+} // namespace util
+} // namespace neurun
+
+#define VERBOSE(name)                         \
+  if (::neurun::util::logging::ctx.enabled()) \
+  std::cout << "[" << #name << "] "
+
+#endif // __NEURUN_UTIL_LOGGING_H__
diff --git a/runtimes/neurun/core/src/backend/Backend.cc b/runtimes/neurun/core/src/backend/Backend.cc
new file mode 100644
index 000000000..c2f745f8f
--- /dev/null
+++ b/runtimes/neurun/core/src/backend/Backend.cc
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "backend/Backend.h"
+
+#include "backend/IConfig.h"
+#include "backend/ITensorBuilder.h"
+#include "backend/IKernelGenerator.h"
+#include "backend/IShapeFixer.h"
+
+namespace neurun
+{
+namespace backend
+{
+
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/backend/BackendManager.cc b/runtimes/neurun/core/src/backend/BackendManager.cc
new file mode 100644
index 000000000..155f7f51a
--- /dev/null
+++ b/runtimes/neurun/core/src/backend/BackendManager.cc
@@ -0,0 +1,124 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <memory>
+#include <dlfcn.h>
+#include "BackendManager.h"
+
+#include "backend/Backend.h"
+#include "backend/IConfig.h"
+#include "util/logging.h"
+#include "util/ConfigSource.h"
+
+namespace neurun
+{
+namespace backend
+{
+
+BackendManager &BackendManager::instance()
+{
+  static BackendManager object;
+  return object;
+}
+
+template <typename T, class... Types>
+void BackendManager::loadObjectFromPlugin(std::shared_ptr<T> &object_of_plugin_class,
+                                          const std::string obj_creator_func_name, void *handle,
+                                          Types &&... args)
+{
+  T *(*allocate_obj)(Types && ... Args);
+  // load object creator function
+  allocate_obj = (T * (*)(Types && ... Args))dlsym(handle, obj_creator_func_name.c_str());
+  if (allocate_obj == nullptr)
+  {
+    fprintf(stderr, "BackendManager: unable to open function %s: %s\n",
+            obj_creator_func_name.c_str(), dlerror());
+    abort();
+  }
+
+  object_of_plugin_class.reset(allocate_obj(args...));
+}
+
+void BackendManager::loadBackend(const std::string &backend)
+{
+  const std::string backend_plugin = "libbackend_" + backend + ".so";
+  void *handle = dlopen(backend_plugin.c_str(), RTLD_LAZY | RTLD_LOCAL);
+  if (handle == nullptr)
+  {
+    fprintf(stderr, "BackendManager::loadBackend failed to load plugin of %s backend: %s\n",
+            backend.c_str(), dlerror());
+    abort();
+  }
+  VERBOSE(BackendManager::loadBackend) << "loaded " << backend_plugin << " as a plugin of "
+                                       << backend << " backend\n";
+
+  {
+    // load object creator function
+    auto backend_create = (backend_create_t)dlsym(handle, "neurun_backend_create");
+    if (backend_create == nullptr)
+    {
+      fprintf(stderr, "BackendManager: unable to open function neurun_backend_create : %s\n",
+              dlerror());
+      abort();
+    }
+
+    // load object creator function
+    auto backend_destroy = (backend_destroy_t)dlsym(handle, "neurun_backend_destroy");
+    if (backend_destroy == nullptr)
+    {
+      fprintf(stderr, "BackendManager: unable to open function neurun_backend_destroy : %s\n",
+              dlerror());
+      abort();
+    }
+
+    auto backend_object =
+        std::unique_ptr<backend::Backend, backend_destroy_t>(backend_create(), backend_destroy);
+    auto backend_object_raw = backend_object.get();
+    backend_object->config()->initialize(); // Call initialize here?
+    _gen_map.emplace(backend_object->config()->id(), std::move(backend_object));
+    _available_backends.push_back(backend_object_raw);
+  }
+
+  // Save backend handle (avoid warning by handle lost without dlclose())
+  _handle_map.emplace(backend, handle);
+}
+
+BackendManager::BackendManager()
+{
+  const auto backends = util::getConfigString(util::config::BACKENDS);
+  size_t prev_pos = 0;
+  auto pos = backends.find(";");
+  while (pos != std::string::npos)
+  {
+    loadBackend(backends.substr(prev_pos, pos - prev_pos));
+    prev_pos = pos + 1;
+    pos = backends.find(";", prev_pos);
+  }
+  // if backends doesn't terminate with ";"
+  if (prev_pos < backends.size())
+  {
+    loadBackend(backends.substr(prev_pos));
+  }
+}
+
+Backend *BackendManager::get(const std::string &key) { return _gen_map.at(key).get(); }
+
+const Backend *BackendManager::get(const std::string &key) const { return _gen_map.at(key).get(); }
+
+const Backend *BackendManager::getDefault() const { return get("cpu"); }
+
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/backend/BackendManager.h b/runtimes/neurun/core/src/backend/BackendManager.h
new file mode 100644
index 000000000..ef102123c
--- /dev/null
+++ b/runtimes/neurun/core/src/backend/BackendManager.h
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_BACKEND_BACKEND_MANAGER_H__
+#define __NEURUN_BACKEND_BACKEND_MANAGER_H__
+
+#include <memory>
+#include <map>
+
+#include "model/Operands.h"
+#include "backend/Backend.h"
+
+namespace neurun
+{
+namespace backend
+{
+
+class BackendManager
+{
+public:
+  using backend_create_t = Backend *(*)();
+  using backend_destroy_t = void (*)(Backend *);
+
+  static BackendManager &instance();
+
+public:
+  Backend *get(const std::string &key);
+  const Backend *get(const std::string &key) const;
+  const Backend *getDefault() const;
+  const std::vector<const Backend *> &getAll() const { return _available_backends; };
+
+private:
+  BackendManager();
+
+private:
+  std::vector<const Backend *> _available_backends;
+  std::map<std::string, std::unique_ptr<Backend, backend_destroy_t>> _gen_map;
+  std::map<std::string, void *> _handle_map;
+  /**
+   * @brief Allocate an object of a class of a plugin by loading a plugin function, that does
+   * allocation, and calling it
+   *
+   * @param object_of_plugin_class target object
+   * @param obj_creator_func_name name of the plugin function, that allocates an object
+   * @param handle handle of the plugin
+   * @param args arguments to pass to constructor of the plugin class
+   *
+   * @return
+   */
+  template <typename T, class... Types>
+  void loadObjectFromPlugin(std::shared_ptr<T> &object_of_plugin_class,
+                            const std::string obj_creator_func_name, void *handle,
+                            Types &&... args);
+
+  /**
+   * @brief load backend plugin
+   *
+   * @param backend backend to be loaded
+   *
+   * @return
+   */
+  void loadBackend(const std::string &backend);
+};
+
+} // namespace backend
+} // namespace neurun
+
+#endif // __NEURUN_BACKEND_BACKEND_MANAGER_H__
diff --git a/runtimes/neurun/core/src/backend/CustomKernel.cc b/runtimes/neurun/core/src/backend/CustomKernel.cc
new file mode 100644
index 000000000..198e223cf
--- /dev/null
+++ b/runtimes/neurun/core/src/backend/CustomKernel.cc
@@ -0,0 +1,97 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "backend/CustomKernel.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace custom
+{
+
+// TODO move this elsewhere
+class APIConverter
+{
+public:
+  static nnfw_operand convertOperand(void *alloc, const TypeInfo &type)
+  {
+    nnfw_operand api_operand;
+    api_operand.allocation = alloc;
+    api_operand.type = convertType(type);
+    return api_operand;
+  }
+
+  static nnfw_tensorinfo convertType(const TypeInfo &type)
+  {
+    nnfw_tensorinfo api_type;
+    api_type.rank = type.shape.rank();
+    assert(type.shape.rank() <= 6);
+    std::copy(type.shape.dims().begin(), type.shape.dims().end(), std::begin(api_type.dims));
+
+    switch (type.dtype)
+    {
+      case model::DataType::FLOAT32:
+        api_type.dtype = NNFW_TYPE_TENSOR_FLOAT32;
+        break;
+      case model::DataType::INT32:
+        api_type.dtype = NNFW_TYPE_TENSOR_INT32;
+        break;
+      case model::DataType::QUANT8_ASYMM:
+        api_type.dtype = NNFW_TYPE_TENSOR_QUANT8_ASYMM;
+        break;
+      case model::DataType::BOOL8:
+        api_type.dtype = NNFW_TYPE_TENSOR_BOOL;
+        break;
+      default:
+        throw std::runtime_error("Unsupported tensor datatype");
+    }
+    return api_type;
+  }
+};
+
+Kernel::Kernel(const nnfw_custom_eval evalFunction)
+    : _params(), _userdata(nullptr), _userdata_size(0), _evalFunction(evalFunction)
+{
+}
+
+void Kernel::configure(Kernel::CustomKernelConfigParams &&inParams)
+{
+  _userdata = inParams.userdata;
+  _userdata_size = inParams.userdata_size;
+
+  _params.ninputs = inParams.input_allocations.size();
+  _params.inputs = new nnfw_operand[_params.ninputs];
+  for (size_t i = 0; i < _params.ninputs; ++i)
+  {
+    _params.inputs[i] =
+        APIConverter::convertOperand(inParams.input_allocations[i], inParams.input_types[i]);
+  }
+
+  _params.noutputs = inParams.output_allocations.size();
+  _params.outputs = new nnfw_operand[_params.noutputs];
+  for (size_t i = 0; i < _params.noutputs; ++i)
+  {
+    _params.outputs[i] =
+        APIConverter::convertOperand(inParams.output_allocations[i], inParams.output_types[i]);
+  }
+}
+
+void Kernel::run() { _evalFunction(&_params, _userdata, _userdata_size); }
+
+} // namespace custom
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/backend/CustomKernelRegistry.cc b/runtimes/neurun/core/src/backend/CustomKernelRegistry.cc
new file mode 100644
index 000000000..4acab70a9
--- /dev/null
+++ b/runtimes/neurun/core/src/backend/CustomKernelRegistry.cc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "backend/CustomKernelRegistry.h"
+
+#include "cpp14/memory.h"
+
+namespace neurun
+{
+namespace backend
+{
+namespace custom
+{
+
+void KernelRegistry::registerKernel(const std::string &id, nnfw_custom_eval evalFunction)
+{
+  _storage.emplace(id, evalFunction);
+}
+
+std::unique_ptr<Kernel> KernelRegistry::buildKernelForOp(const std::string &id)
+{
+  auto it = _storage.find(id);
+  if (it == _storage.end())
+  {
+    throw std::runtime_error("Unable to find associated kernel for op");
+  }
+
+  return nnfw::cpp14::make_unique<custom::Kernel>(it->second);
+}
+
+} // namespace custom
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/backend/ExecTime.cc b/runtimes/neurun/core/src/backend/ExecTime.cc
new file mode 100644
index 000000000..d5aa679d7
--- /dev/null
+++ b/runtimes/neurun/core/src/backend/ExecTime.cc
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "backend/ExecTime.h"
+
+#include <fstream>
+#include <cassert>
+#include <limits>
+#include <algorithm>
+
+namespace neurun
+{
+namespace backend
+{
+
+int64_t ExecTime::getOperationExecTime(const Backend *backend, const std::string &operation,
+                                       bool quant, uint32_t op_size) const
+{
+  auto found_backend = _measurements.find(backend);
+  if (found_backend == _measurements.end())
+    return NOT_FOUND; // no execution time for this backend
+
+  auto found_operation_with_type = found_backend->second.find(operation);
+  if (found_operation_with_type == found_backend->second.end())
+    // no execution time for this operation
+    return NOT_FOUND;
+
+  auto found_operation = found_operation_with_type->second.find(quant);
+  if (found_operation == found_operation_with_type->second.end())
+    // no execution time for this operation
+    return NOT_FOUND;
+
+  auto found_size = found_operation->second.find(op_size);
+  if (found_size != found_operation->second.end())
+    return found_size->second; // found execution time
+
+  // Try to interpolate
+  if (found_operation->second.size() < 2)
+    // not possible to do linear interpolation
+    return found_operation->second.begin()->second;
+
+  // if we reach here, then this means, that there is no record, that is equal to op_size
+  auto upper_bound = found_operation->second.upper_bound(op_size); // > op_size
+  auto lower_bound = upper_bound;
+
+  if (upper_bound == found_operation->second.end()) // all values <= op_size
+  {
+    upper_bound--;
+    lower_bound = upper_bound;
+    lower_bound--;
+  }
+  else if (upper_bound == found_operation->second.begin()) // all values > op_size
+  {
+    upper_bound++;
+  }
+  else // op_size between
+  {
+    lower_bound--;
+  }
+
+  // Linear interpolation
+  const auto x0 = static_cast<int64_t>(lower_bound->first); // size
+  const auto x1 = static_cast<int64_t>(upper_bound->first); // size
+  const int64_t y0 = lower_bound->second;                   // time
+  const int64_t y1 = upper_bound->second;                   // time
+  const auto x = static_cast<int64_t>(op_size);
+
+  int64_t interpolated_value = y0 + (x - x0) * (y1 - y0) / (x1 - x0);
+
+  // In some cases ops with smaller inputs is executed slower than the one
+  // with larger inputs, more likely because of a backend's load difference
+  if (interpolated_value < 0 && x > x1)
+  {
+    return y0;
+  }
+  // It must be non-positive ONLY if it's lesser than both of them
+  assert(interpolated_value > 0 || x < x0);
+
+  // execution time must be non-negative
+  return std::max<int64_t>(interpolated_value, 1);
+}
+
+void ExecTime::updateOperationExecTime(const Backend *backend, const std::string &operation,
+                                       bool quant, uint32_t op_size, int64_t time)
+{
+  // If the op is not implemented for some input, it should not be scheduled
+  const auto &recs = _measurements[backend][operation][quant];
+  if (time == getMax() ||
+      std::any_of(recs.begin(), recs.end(),
+                  [](std::pair<const uint32_t, const int64_t> p) { return p.second == getMax(); }))
+  {
+    _measurements[backend][operation][quant].clear();
+    _measurements[backend][operation][quant].emplace(op_size, getMax());
+  }
+  else
+  {
+    auto it = _measurements[backend][operation][quant].emplace(op_size, time);
+    if (!it.second)
+    {
+      // affect of the last measurement is bigger than the previous ones:
+      //   this prefers new metrics than older once, so will adapt backend changes
+      it.first->second = (it.first->second + time) / 2;
+    }
+  }
+}
+
+void ExecTime::updatePermuteTime(const Backend *from_backend, const Backend *to_backend, bool quant,
+                                 uint32_t op_size, int64_t time)
+{
+  updateOperationExecTime(from_backend, to_backend->config()->id(), quant, op_size, time);
+}
+
+int64_t ExecTime::getPermuteTime(const Backend *from_backend, const Backend *to_backend, bool quant,
+                                 uint32_t op_size) const
+{
+  return getOperationExecTime(from_backend, to_backend->config()->id(), quant, op_size);
+}
+
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/backend/JSONExecTime.cc b/runtimes/neurun/core/src/backend/JSONExecTime.cc
new file mode 100644
index 000000000..e2404b2c8
--- /dev/null
+++ b/runtimes/neurun/core/src/backend/JSONExecTime.cc
@@ -0,0 +1,231 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "backend/JSONExecTime.h"
+#include "backend/IConfig.h"
+#include <fstream>
+
+namespace neurun
+{
+namespace backend
+{
+/**
+ * @brief Helper function for reading string from stream
+ *
+ * @param str Output string
+ * @param stream File stream
+ */
+void readString(std::string &str, std::ifstream &stream)
+{
+  str.clear();
+  char buf;
+  while (stream.good())
+  {
+    stream.get(buf);
+    if (buf == '"')
+      break;
+    str.push_back(buf);
+  }
+}
+
+/**
+ * @brief Helper function for reading bool from stream
+ *
+ * @param quant Output bool
+ * @param stream File stream
+ */
+void readBool(bool &quant, std::ifstream &stream)
+{
+  char buf;
+  stream.get(buf);
+  quant = (buf == '1');
+  stream.get(buf);
+}
+
+void printString(const std::string &str, std::ofstream &stream) { stream << "\"" << str << "\""; }
+
+void printBool(bool quant, std::ofstream &stream) { stream << "\"" << quant << "\""; }
+
+void JSON::readOperation(const std::string &backend, const std::string &operation, bool quant,
+                         std::ifstream &stream)
+{
+  uint32_t size = 0;
+  int64_t time = 0;
+
+  std::string int_buf;
+  char buf;
+  int number_of_closed_braces = 0;
+  int number_of_commas = 0;
+
+  while (stream.good())
+  {
+    stream.get(buf);
+
+    switch (buf)
+    {
+      case ']':
+      {
+        number_of_closed_braces++;
+        break;
+      }
+      case '[':
+      {
+        number_of_closed_braces--;
+        break;
+      }
+      default:
+      {
+        if (std::isdigit(buf))
+        {
+          int_buf.push_back(buf);
+        }
+        break;
+      }
+    }
+
+    if (number_of_closed_braces == 1)
+      break;
+
+    if ((buf == ']' && number_of_closed_braces == 0) ||
+        (buf == ',' && number_of_closed_braces == -1))
+    {
+      switch (number_of_commas % 2)
+      {
+        case 0:
+        {
+          size = static_cast<uint32_t>(std::atoi(int_buf.c_str()));
+          break;
+        }
+        case 1:
+        {
+          time = static_cast<int64_t>(std::atol(int_buf.c_str()));
+          auto bf = _backends.find(backend);
+          if (bf != _backends.end())
+          {
+            _measurements[bf->second][operation][quant][size] = time;
+          } // we ignore the records for unsupported backends
+          break;
+        }
+      }
+      number_of_commas++;
+      int_buf.clear();
+    }
+  }
+}
+void JSON::printOperation(const std::map<uint32_t, int64_t> &operation_info,
+                          std::ofstream &stream) const
+{
+  for (const auto &items : operation_info)
+  {
+    stream << "[" << items.first << ", " << items.second << "], ";
+  }
+  stream.seekp(-2, std::ofstream::end);
+}
+
+void JSON::uploadOperationsExecTime() const
+{
+  std::ofstream stream(_measurement_file);
+  if (!stream.is_open())
+  {
+    throw std::runtime_error("Failed to save backend config file");
+  }
+  else
+  {
+    stream << "{";
+    for (const auto &backend : _measurements)
+    {
+      printString(backend.first->config()->id(), stream);
+      stream << ": {";
+      for (const auto &operation : backend.second)
+      {
+        printString(operation.first, stream);
+        stream << ": {";
+        for (const auto &type : operation.second)
+        {
+          printBool(type.first, stream);
+          stream << ": [";
+          printOperation(type.second, stream);
+          stream << "], ";
+        }
+        stream.seekp(-2, std::ofstream::end);
+        stream << "}, ";
+      }
+      stream.seekp(-2, std::ofstream::end);
+      stream << "}, ";
+    }
+    stream.seekp(-2, std::ofstream::end);
+    stream << "}";
+    stream.close();
+  }
+}
+
+void JSON::loadOperationsExecTime()
+{
+  std::ifstream stream(_measurement_file);
+  if (stream.is_open())
+  {
+    std::string backend;
+    std::string operation;
+    bool quant = false;
+    char buf;
+    int number_of_open_braces = 0;
+
+    while (stream.good())
+    {
+      stream.get(buf);
+      switch (buf)
+      {
+        case '{':
+          number_of_open_braces++;
+          break;
+        case '}':
+          number_of_open_braces--;
+          break;
+        case '"':
+        {
+          if (number_of_open_braces == 1)
+          {
+            // read backend string
+            readString(backend, stream);
+          }
+          if (number_of_open_braces == 2)
+          {
+            // read operation string
+            readString(operation, stream);
+          }
+          if (number_of_open_braces == 3)
+          {
+            // read operation string
+            readBool(quant, stream);
+          }
+          break;
+        }
+        case '[':
+        {
+          // reading and creating all info for operation
+          readOperation(backend, operation, quant, stream);
+          break;
+        }
+        default:
+          break;
+      }
+    }
+    stream.close();
+  }
+}
+
+} // namespace backend
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/compiler/BackendResolver.cc b/runtimes/neurun/core/src/compiler/BackendResolver.cc
new file mode 100644
index 000000000..0c544190c
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/BackendResolver.cc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "BackendResolver.h"
+
+namespace neurun
+{
+namespace compiler
+{
+
+BackendResolver::BackendResolver(const BackendResolver &obj)
+    : _context_manager{}, _gen_map{obj._gen_map}
+{
+  for (const auto &e : obj._context_manager)
+  {
+    _context_manager.emplace(e.first, nnfw::cpp14::make_unique<backend::BackendContext>(*e.second));
+  }
+}
+
+BackendResolver &BackendResolver::operator=(const BackendResolver &obj)
+{
+  _gen_map = obj._gen_map;
+
+  _context_manager.clear();
+  for (const auto &e : obj._context_manager)
+  {
+    _context_manager.emplace(e.first, nnfw::cpp14::make_unique<backend::BackendContext>(*e.second));
+  }
+
+  return *this;
+}
+
+} // namespace compiler
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/compiler/BackendResolver.h b/runtimes/neurun/core/src/compiler/BackendResolver.h
new file mode 100644
index 000000000..248ef2f2e
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/BackendResolver.h
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_COMPILER_BACKEND_RESOLVER_H__
+#define __NEURUN_COMPILER_BACKEND_RESOLVER_H__
+
+#include <unordered_map>
+#include <typeindex>
+
+#include "util/logging.h"
+#include "backend/Backend.h"
+#include "backend/BackendManager.h"
+#include "backend/ITensorBuilder.h"
+#include "model/OperationIndexMap.h"
+
+namespace neurun
+{
+namespace compiler
+{
+
+class BackendResolver
+{
+public:
+  BackendResolver(const model::Operands &operands,
+                  const std::vector<const backend::Backend *> &backends,
+                  const std::shared_ptr<backend::custom::KernelRegistry> &registry)
+  {
+    for (const auto backend : backends)
+    {
+      _context_manager.emplace(backend, backend->newContext(operands, registry));
+    }
+  }
+
+  ~BackendResolver() = default;
+  BackendResolver(const BackendResolver &obj);
+  BackendResolver(BackendResolver &&obj) = default;
+  BackendResolver &operator=(const BackendResolver &obj);
+  BackendResolver &operator=(BackendResolver &&obj) = default;
+
+public:
+  const backend::BackendContext *getBackendContext(const model::OperationIndex &index) const
+  {
+    return _context_manager.at(_gen_map.at(index)).get();
+  }
+
+  const backend::BackendContext *getBackendContext(const backend::Backend *backend) const
+  {
+    return _context_manager.at(backend).get();
+  }
+
+  backend::TensorBuilderSet tensor_builders() const
+  {
+    backend::TensorBuilderSet ret;
+    for (const auto &e : _context_manager)
+    {
+      ret.insert(e.second->tensor_builder);
+    }
+    return ret;
+  }
+
+  const backend::Backend *getBackend(const model::OperationIndex &index) const
+  {
+    return getBackendContext(index)->backend;
+  }
+
+  void setBackend(const model::OperationIndex &index, const backend::Backend *backend)
+  {
+    _gen_map[index] = backend;
+  }
+
+  void iterate(const std::function<void(const model::OperationIndex &,
+                                        const backend::BackendContext &)> &fn) const
+  {
+    for (const auto &e : _gen_map)
+    {
+      fn(e.first, *_context_manager.at(e.second));
+    }
+  }
+
+private:
+  std::unordered_map<const backend::Backend *, std::unique_ptr<backend::BackendContext>>
+      _context_manager;
+  model::OperationIndexMap<const backend::Backend *> _gen_map;
+};
+
+} // namespace compiler
+} // namespace neurun
+
+#endif // __NEURUN_COMPILER_BACKEND_RESOLVER_H__
diff --git a/runtimes/neurun/core/src/compiler/Compiler.cc b/runtimes/neurun/core/src/compiler/Compiler.cc
new file mode 100644
index 000000000..6a378faa9
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/Compiler.cc
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "compiler/Compiler.h"
+
+#include "BackendResolver.h"
+#include "ParamChecker.h"
+#include "ExecutorFactory.h"
+
+#include "compiler/IScheduler.h"
+#include "compiler/ManualScheduler.h"
+#include "compiler/HEScheduler.h"
+#include "backend/ExecTime.h"
+#include "graph/operation/LowerInfo.h"
+#include "dumper/dot/DotDumper.h"
+#include "compiler/Linear.h"
+#include "exec/interp/ExecManager.h"
+#include "backend/ExecTime.h"
+#include "util/ConfigSource.h"
+
+namespace neurun
+{
+
+namespace compiler
+{
+
+void Compiler::compile(void)
+{
+  _state = State::STARTED;
+
+  if (!checkCompilable())
+  {
+    _executor = std::make_shared<exec::interp::ExecManager>(_graph->shareModel());
+    return;
+  }
+
+  /***************************************************
+   * Backend independent analysis & optimization phase
+   ***************************************************/
+  // Schedule
+  std::unique_ptr<BackendResolver> br;
+  std::shared_ptr<model::OperationIndexMap<int64_t>> indexed_ranks;
+  if (util::getConfigBool(util::config::USE_SCHEDULER))
+  {
+    auto scheduler =
+        compiler::HEScheduler(_graph->operands(), backend::BackendManager::instance().getAll(),
+                              _graph->getKernelRegistry());
+    br = scheduler.schedule(*_graph);
+    indexed_ranks = scheduler.getIndexedRanks();
+  }
+  else
+  {
+    auto scheduler = compiler::ManualScheduler();
+    br = scheduler.schedule(*_graph);
+  }
+  _graph->setBackendResolver(std::move(br));
+  /*************************************************************
+   *  Backend independent analysis & optimization phase finished
+   *************************************************************/
+
+  // dump graph to .dot
+  auto dump_level =
+      static_cast<dumper::dot::DotDumper::Level>(util::getConfigInt(util::config::GRAPH_DOT_DUMP));
+  neurun::dumper::dot::DotDumper dot_dumper(*_graph, dump_level);
+  dot_dumper.dump("before_lower");
+
+  // Lower: decide backend
+  _graph->lower();
+  _state = State::LOWERED;
+
+  dot_dumper.dump("after_lower");
+
+  const std::string executor_str = util::getConfigString(util::config::EXECUTOR);
+
+  _executor =
+      std::shared_ptr<exec::IExecutor>{ExecutorFactory::instance().create(executor_str, *_graph)};
+  _executor->setIndexedRanks(indexed_ranks);
+  /********************************
+   * Code generation phase finished
+   ********************************/
+  _state = State::COMPILED;
+}
+
+bool Compiler::checkCompilable()
+{
+  // Disable compile phase
+  // When ready to use interpreter backend, remove this config and use backend setting
+  const auto env_disable_compile = util::getConfigBool(util::config::DISABLE_COMPILE);
+  if (env_disable_compile)
+  {
+    return false;
+  }
+
+  // TODO check unspecified operand shape
+
+  // Check compilable parameter
+  ParamChecker paramChecker{_graph};
+  paramChecker();
+  if (paramChecker.haveNoneConstParam())
+  {
+    return false;
+  }
+
+  return true;
+}
+
+} // namespace compiler
+
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/compiler/ExecutorFactory.cc b/runtimes/neurun/core/src/compiler/ExecutorFactory.cc
new file mode 100644
index 000000000..2ff32a57e
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/ExecutorFactory.cc
@@ -0,0 +1,351 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ExecutorFactory.h"
+
+#include <functional>
+#include "exec/ExecutionObservers.h"
+#include "exec/LinearExecutor.h"
+#include "exec/DataflowExecutor.h"
+#include "exec/ParallelExecutor.h"
+#include "compiler/BackendResolver.h"
+#include "backend/ExecTime.h"
+#include "compiler/Linear.h"
+#include "graph/dumper/Dumper.h"
+#include "OperationValidator.h"
+#include "SubTensorAnalyzer.h"
+#include "backend/IConstantInitializer.h"
+#include "backend/IKernelGenerator.h"
+#include "backend/IShapeFixer.h"
+#include "cpp14/memory.h"
+
+namespace neurun
+{
+namespace compiler
+{
+
+ExecutorFactory &ExecutorFactory::instance()
+{
+  static ExecutorFactory singleton;
+  return singleton;
+}
+
+ExecutorFactory::ExecutorFactory()
+{
+  _map["Linear"] = createLinearExecutor;
+  _map["Dataflow"] = std::bind(createDataflowExecutor, std::placeholders::_1, false);
+  _map["Parallel"] = std::bind(createDataflowExecutor, std::placeholders::_1, true);
+}
+
+exec::IExecutor *ExecutorFactory::create(const std::string &id, graph::Graph &graph)
+{
+  return _map.at(id)(graph);
+}
+
+exec::IExecutor *ExecutorFactory::createLinearExecutor(graph::Graph &graph)
+{
+  auto operand_context = std::make_shared<OperandContext>();
+  const auto &operands = graph.operands();
+
+  // Compilation result will be filled in operand_context and operation_sequence
+  auto function_sequence = std::make_shared<exec::FunctionSequence>();
+
+  // linearize
+  auto linear = graph.linearize();
+
+  // Dump ops
+  linear->accept(neurun::graph::dumper::Dumper{});
+
+  linear->accept(OperationValidator{operands});
+
+  /*************************************************
+   * Backend dependent analysis & optimization phase
+   *************************************************/
+
+  // SubTensorInfo should be generated after lower, before shape correction and finalize
+  // because SubTensorAnalyzer assume that insert permutation is already finished
+  //    lower: decide backend and insert permutation
+  //    fix shapes: prepare codegen to optimization
+  //    generate tensor objects: generate tensor using subtensor info
+  //    generate kernels
+  //    allocate tesor memory
+  //    constant intialization: fill the constants with values
+  // Generated SubTensorInfo is in operand(Object)
+  // for easy pass SubTensorInfo to plan builder and tensor builder
+  linear->accept(SubTensorAnalyzer{graph.operands()});
+
+  /**********************************************************
+   * Backend dependent analysis & optimization phase finished
+   **********************************************************/
+
+  /***********************
+   * Code generation phase
+   ***********************/
+
+  // Fix shapes
+  linear->iterate([&](const compiler::Linear::Element &element) {
+    auto backend = element.lower_info->backend();
+    auto shape_fixer = linear->getBackendContext(backend)->shape_fixer;
+    shape_fixer->fix(*element.subgraph);
+  });
+
+  linear->planTensors();
+
+  auto tensor_builders = linear->backend_resolver()->tensor_builders();
+
+  // Prepare tensors
+  for (auto &tensor_builder : tensor_builders)
+  {
+    tensor_builder->prepare();
+  }
+
+  // Generate initializers
+  linear->generateConstantInitializers();
+
+  class ExecutionBuilder final : public IExecutionBuilder
+  {
+  public:
+    ExecutionBuilder(exec::FunctionSequence &functions) : _functions{functions}
+    {
+      // DO NOTHING
+    }
+
+  public:
+    void append(std::unique_ptr<::neurun::exec::IFunction> &&f) override
+    {
+      _functions.append(std::move(f));
+    }
+
+  private:
+    exec::FunctionSequence &_functions;
+  };
+
+  auto execution_builder = nnfw::cpp14::make_unique<ExecutionBuilder>(*function_sequence);
+
+  // Generate kernels
+  linear->iterate([&](const compiler::Linear::Element &element) {
+    auto backend = element.lower_info->backend();
+    auto kernel_gen = linear->getBackendContext(backend)->kernel_gen;
+    kernel_gen->generate(*element.subgraph, execution_builder.get());
+  });
+
+  // Allocate Tensor Memory
+  for (auto &tensor_builder : tensor_builders)
+  {
+    tensor_builder->allocate();
+  }
+
+  // TODO Add optimization passes
+
+  // Initialize constant tensors
+  for (const auto backend : backend::BackendManager::instance().getAll())
+  {
+    linear->getBackendContext(backend)->constant_initializer->run();
+  }
+
+  for (auto &tensor_builder : tensor_builders)
+  {
+    tensor_builder->finalize();
+  }
+
+  // Wrap tensors as Object and store them to plan
+  for (auto &tensor_builder : tensor_builders)
+  {
+    tensor_builder->iterate([&](const model::OperandIndex &index) {
+      auto object = tensor_builder->wrapTensor(index);
+      operand_context->set(index, object);
+    });
+  }
+
+  // Prepare each TensorManager on each backend
+  auto tensor_mgrs = nnfw::cpp14::make_unique<backend::TensorManagerSet>();
+  for (auto &tensor_builder : tensor_builders)
+  {
+    tensor_mgrs->insert(tensor_builder->releaseTensorManager());
+  }
+
+  return new exec::LinearExecutor{graph.shareModel(),     linear->releaseSubgraphs(),
+                                  operand_context,        linear->releaseLowerInfo(),
+                                  std::move(tensor_mgrs), linear->releaseElements(),
+                                  function_sequence};
+}
+
+exec::IExecutor *ExecutorFactory::createDataflowExecutor(graph::Graph &graph, bool parallel)
+{
+  auto operand_context = std::make_shared<OperandContext>();
+
+  graph.subgraphs().iterate([&](const model::SubgraphIndex &, const model::Subgraph &subg) {
+    auto subtensor_analyzer = SubTensorAnalyzer{graph.operands()};
+    subg.accept(subtensor_analyzer);
+  });
+
+  // Fix shapes
+  graph.subgraphs().iterate(
+      [&](const model::SubgraphIndex &subg_index, const model::Subgraph &subg) {
+        auto backend = graph.getLowerInfo(subg_index)->backend();
+        auto shape_fixer = graph.backend_resolver()->getBackendContext(backend)->shape_fixer;
+        shape_fixer->fix(subg);
+      });
+
+  graph.operands().iterate([&](const model::OperandIndex &ind, const model::Operand &obj) {
+    const auto lower_info = graph.getLowerInfo(ind);
+    for (auto factor : lower_info->def_factors())
+    {
+      bool isSubTensor = false;
+      auto backend = factor.backend();
+      auto tensor_builder = graph.backend_resolver()->getBackendContext(backend)->tensor_builder;
+
+      if (backend->config()->SupportSubTensorAlloc())
+      {
+        const auto parentInfo = obj.parent_info();
+        if (parentInfo != nullptr)
+        {
+          isSubTensor = true;
+        }
+      }
+
+      if (isSubTensor)
+      {
+        const compiler::SubTensorInfo info(obj);
+        tensor_builder->registerSubTensorInfo(ind, info);
+      }
+      else
+      {
+        const auto info = obj.info();
+        // NOTE This assumes an operand can have one layout, and only PermutateNode can have
+        // different layouts for input and output
+        const auto &def = *obj.getDef().list().cbegin();
+        auto frontend_layout =
+            graph.subgraphs().at(graph.subgraphs().getOperation(def)).getLayout();
+        if (frontend_layout == model::Layout::UNKNOWN)
+        {
+          const auto &use = *obj.getUses().list().cbegin();
+          frontend_layout = graph.subgraphs().at(graph.subgraphs().getOperation(use)).getLayout();
+        }
+        const auto backend_layout = lower_info->def_factors().getOnlyElement().layout();
+        tensor_builder->registerTensorInfo(ind, info, frontend_layout, backend_layout,
+                                           obj.isConstant());
+        // To make this never be deallocated, this is a workaround to use static memory planner
+        tensor_builder->notifyFirstUse(ind);
+      }
+    }
+  });
+
+  auto tensor_builders = graph.backend_resolver()->tensor_builders();
+
+  for (auto &tensor_builder : tensor_builders)
+  {
+    tensor_builder->prepare();
+  }
+
+  class ExecutionBuilder : public IExecutionBuilder
+  {
+  public:
+    void append(std::unique_ptr<exec::IFunction> &&fn) override
+    {
+      auto itr = _code_map.find(_next_index);
+      if (itr == _code_map.end())
+      {
+        _code_map[_next_index] = nnfw::cpp14::make_unique<exec::FunctionSequence>();
+      }
+      _code_map[_next_index]->append(std::move(fn));
+    };
+
+    // TODO Remove this method and make `append` to get index value as an argument
+    void setNextIndex(const model::SubgraphIndex next_index) { _next_index = next_index; }
+
+    exec::DataflowExecutor::CodeMap &&releaseCodeMap() { return std::move(_code_map); }
+
+  private:
+    model::SubgraphIndex _next_index;
+    exec::DataflowExecutor::CodeMap _code_map;
+  };
+
+  auto execution_builder = nnfw::cpp14::make_unique<ExecutionBuilder>();
+
+  // Generate kernels
+  graph.subgraphs().iterate(
+      [&](const model::SubgraphIndex &subg_index, const model::Subgraph &subg) {
+        auto backend = graph.getLowerInfo(subg_index)->backend();
+        auto constant_initializer =
+            graph.backend_resolver()->getBackendContext(backend)->constant_initializer;
+        constant_initializer->generate(subg, graph.operands());
+        // TODO This approach is temporal. See declaration of `setNextIndex`.
+        execution_builder->setNextIndex(subg_index);
+        auto kernel_gen = graph.backend_resolver()->getBackendContext(backend)->kernel_gen;
+        kernel_gen->generate(subg, execution_builder.get());
+      });
+
+  for (const auto &tensor_builder : tensor_builders)
+  {
+    tensor_builder->allocate();
+  }
+
+  // Initialize constant tensors
+  for (const auto backend : backend::BackendManager::instance().getAll())
+  {
+    graph.backend_resolver()->getBackendContext(backend)->constant_initializer->run();
+  }
+
+  auto lower_info = graph.releaseLowerInfo();
+
+  for (auto &tensor_builder : tensor_builders)
+  {
+    tensor_builder->finalize();
+  }
+
+  // Wrap tensors as Object and store them to plan
+  for (auto &tensor_builder : tensor_builders)
+  {
+    tensor_builder->iterate([&](const model::OperandIndex &index) {
+      auto object = tensor_builder->wrapTensor(index);
+      operand_context->set(index, object);
+    });
+  }
+
+  // Prepare each TensorManager on each backend
+  auto tensor_mgrs = nnfw::cpp14::make_unique<backend::TensorManagerSet>();
+  for (auto &tensor_builder : tensor_builders)
+  {
+    tensor_mgrs->insert(tensor_builder->releaseTensorManager());
+  }
+
+  if (parallel)
+  {
+    return new exec::ParallelExecutor{
+        graph.shareModel(),     graph.releaseSubgraphs(),
+        operand_context,        std::move(lower_info),
+        std::move(tensor_mgrs), std::move(execution_builder->releaseCodeMap())};
+  }
+  else
+  {
+    auto exec = new exec::DataflowExecutor{
+        graph.shareModel(),     graph.releaseSubgraphs(),
+        operand_context,        std::move(lower_info),
+        std::move(tensor_mgrs), std::move(execution_builder->releaseCodeMap())};
+    if (util::getConfigBool(util::config::PROFILING_MODE))
+    {
+      auto et = std::make_shared<backend::ExecTime>(backend::BackendManager::instance().getAll());
+      std::unique_ptr<exec::IExecutionObserver> obs =
+          nnfw::cpp14::make_unique<exec::ProfileObserver>(et);
+      exec->addObserver(std::move(obs));
+    }
+    return exec;
+  }
+}
+
+} // namespace compiler
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/compiler/ExecutorFactory.h b/runtimes/neurun/core/src/compiler/ExecutorFactory.h
new file mode 100644
index 000000000..894fec1b5
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/ExecutorFactory.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_COMPILER_EXECUTOR_FACTORY_H__
+#define __NEURUN_COMPILER_EXECUTOR_FACTORY_H__
+
+#include <unordered_map>
+
+#include "exec/IExecutor.h"
+#include "graph/Graph.h"
+
+namespace neurun
+{
+namespace compiler
+{
+
+class ExecutorFactory
+{
+public:
+  static ExecutorFactory &instance();
+
+public:
+  exec::IExecutor *create(const std::string &id, graph::Graph &graph);
+
+private:
+  ExecutorFactory();
+
+private:
+  static exec::IExecutor *createLinearExecutor(graph::Graph &graph);
+  static exec::IExecutor *createDataflowExecutor(graph::Graph &graph, bool parallel);
+
+private:
+  std::unordered_map<std::string, std::function<exec::IExecutor *(graph::Graph &)>> _map;
+};
+
+} // namespace compiler
+} // namespace neurun
+
+#endif // __NEURUN_COMPILER_EXECUTOR_FACTORY_H__
diff --git a/runtimes/neurun/core/src/compiler/HEScheduler.cc b/runtimes/neurun/core/src/compiler/HEScheduler.cc
new file mode 100644
index 000000000..a3d1a5990
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/HEScheduler.cc
@@ -0,0 +1,577 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/Operand.h"
+#include "compiler/HEScheduler.h"
+#include "graph/Graph.h"
+#include "util/ConfigSource.h"
+#include "compiler/IExecutionBuilder.h"
+#include "compiler/BackendResolver.h"
+#include "backend/IShapeFixer.h"
+#include "util/logging.h"
+#include "util/Utils.h"
+#include "exec/FunctionSequence.h"
+#include <cassert>
+#include <cmath>
+#include <chrono>
+
+namespace neurun
+{
+
+namespace compiler
+{
+static uint32_t getOperationsFlattenedIOSize(const graph::Graph &graph,
+                                             const model::Operation &node)
+{
+  uint32_t size = 0;
+  for (const auto &input : node.getInputs())
+  {
+    size += graph.operands().at(input).info().total_size();
+  }
+  for (const auto &output : node.getOutputs())
+  {
+    size += graph.operands().at(output).info().total_size();
+  }
+  return size;
+}
+
+static bool isQuant(const graph::Graph &graph, const model::Operation &node)
+{
+  for (const auto &input : node.getInputs())
+  {
+    const auto &obj = graph.operands().at(input);
+    if (obj.typeInfo().type() == model::DataType::QUANT8_ASYMM)
+    {
+      return true;
+    }
+  }
+  return false;
+}
+
+static bool isWorkaroundSkip(const graph::Graph &graph, const backend::Backend *backend,
+                             const model::Operation &node, bool quant)
+{
+  /* TODO: this is workaround, come up with better solution if have.
+      Adding exception in stage doesn't help. Because if there is a record for add without
+      broadcast, scheduling will select it since it doesn't distinguish broadcast and
+      non-broadcast like it does for quant non-quantized*/
+  if (backend->config()->id() == "cpu" && node.getName() == "Add")
+  {
+    const auto lhs_index{node.getInputs().at(model::operation::AddNode::Input::LHS)};
+    const auto rhs_index{node.getInputs().at(model::operation::AddNode::Input::RHS)};
+    /*Broadcasting isn't supported on CPU: no way to differ the existing exec_time record of
+     * Add with and without broadcasting*/
+    /*Quant is also unsupported: throws an exception in run(): in case of scheduling without warm-up
+      it isn't catched by tryBackend()*/
+    if (quant ||
+        !(graph.operands().at(lhs_index).shape() == graph.operands().at(rhs_index).shape()))
+    {
+      return true;
+    }
+  }
+  /* TODO: this is workaround, come up with better solution if have.
+          Adding exception in stage doesn't help. Because if there is a record for Mul without
+          broadcast, scheduling will select it since it doesn't distinguish broadcast and
+          non-broadcast like it does for quant non-quantized*/
+  else if (backend->config()->id() == "acl_neon" && node.getName() == "Mul")
+  {
+    const auto lhs_index{node.getInputs().at(model::operation::MulNode::Input::LHS)};
+    const auto rhs_index{node.getInputs().at(model::operation::MulNode::Input::RHS)};
+
+    // Nontrivial broadcasting isn't supported yet
+    if (quant ||
+        !(graph.operands().at(lhs_index).shape() == graph.operands().at(rhs_index).shape()))
+    {
+      return true;
+    }
+  }
+  return false;
+}
+
+// if a node can be merged into subgraph
+static bool isMergable(const graph::Graph &graph, const model::Operation &node)
+{
+  size_t prev_op_cnt = 0;
+  for (const auto &input : node.getInputs())
+  {
+    // only valid_inputs
+    const auto &operand = graph.operands().at(input);
+    if (operand.isConstant())
+      continue;
+
+    // This operand is input of operation, not weight or bias
+    if (operand.getDef().list().size() > 0)
+      ++prev_op_cnt;
+
+    // Current node has multiple inputs as concat or at the beginning of the separated branch
+    if (prev_op_cnt > 1 || operand.getUses().list().size() > 1)
+    {
+      return false;
+    }
+  }
+  return true;
+}
+
+void HEScheduler::scheduleShufflingBackends()
+{
+  VERBOSE(HEScheduler::scheduleNode)
+      << "Started task scheduling: uses all backends to get more metrics for data transfer"
+      << std::endl;
+  size_t backend_ind = 0;
+  for (const auto &rank : _rank_to_op)
+  {
+    VERBOSE(HEScheduler::scheduleNode) << "scheduling (" << rank.second.value() << ")" << std::endl;
+    const auto &node = _graph->operations().at(rank.second);
+    const bool quant = isQuant(*_graph, node);
+    const auto size = getOperationsFlattenedIOSize(*_graph, node);
+    for (size_t i = 0;; ++i)
+    {
+      if (i == _all_backends.size())
+      {
+        // wasn't able to find backend
+        assert(false);
+        break;
+      }
+      if (backend_ind == _all_backends.size())
+      {
+        backend_ind = 0;
+      }
+      if (isWorkaroundSkip(*_graph, _all_backends[backend_ind], node, quant))
+      {
+        ++backend_ind;
+        continue;
+      }
+      const auto exec_time =
+          _exec_time->getOperationExecTime(_all_backends[backend_ind], node.getName(), quant, size);
+      // Scheduling to measure data transfer must be done after measuring all backends separately
+      assert(exec_time != _exec_time->NOT_FOUND);
+      if (exec_time == _exec_time->getMax())
+      {
+        ++backend_ind;
+        continue;
+      }
+      _backend_resolver->setBackend(rank.second, _all_backends[backend_ind]);
+      VERBOSE(HEScheduler::schedule) << "backend for " << node.getName() << " is "
+                                     << _all_backends[backend_ind]->config()->id() << std::endl;
+      ++backend_ind;
+      break;
+    }
+  }
+}
+
+bool HEScheduler::isNodeProfiled(const model::Operation &node)
+{
+  const bool quant = isQuant(*_graph, node);
+  const auto size = getOperationsFlattenedIOSize(*_graph, node);
+  for (const auto *backend : _all_backends)
+  {
+    const auto exec_time = _exec_time->getOperationExecTime(backend, node.getName(), quant, size);
+    if (exec_time == _exec_time->NOT_FOUND)
+      return false;
+  }
+  return true;
+}
+
+std::unique_ptr<compiler::BackendResolver> HEScheduler::schedule(const graph::Graph &graph)
+{
+  _graph = &graph;
+  VERBOSE(HEScheduler::schedule) << "task scheduling started" << std::endl;
+  // Make ranks and save in descending order
+  makeRank();
+
+  for (const auto *backend : _all_backends)
+  {
+    _backends_avail_time.emplace(backend, std::map<int64_t, int64_t>{{0, 0}});
+  }
+
+  const bool is_profiling = util::getConfigBool(util::config::PROFILING_MODE);
+  if (is_profiling)
+  {
+    // Check if profiling info about all backend/node pairs already exists
+    bool all_nodes_are_profiled = true;
+    _graph->operations().iterate([&](const model::OperationIndex &, const model::Operation &op) {
+      if (all_nodes_are_profiled)
+        all_nodes_are_profiled = isNodeProfiled(op);
+    });
+
+    // If all nodes are already profiled - schedule backends in such order, so more profiling
+    // information about between-backends data transfer could be collected
+    if (all_nodes_are_profiled)
+    {
+      scheduleShufflingBackends();
+      VERBOSE(HEScheduler::schedule) << "task scheduling finished" << std::endl;
+      return std::move(_backend_resolver);
+    }
+  }
+
+  // for each task select the backend with the smallest earliest finishing time(eft)
+  for (const auto &rank : _rank_to_op)
+  {
+    scheduleNode(rank.second);
+  }
+  VERBOSE(HEScheduler::schedule) << "task scheduling finished" << std::endl;
+  return std::move(_backend_resolver);
+}
+
+int64_t HEScheduler::getOpTime(const backend::Backend *backend, const std::string &operation,
+                               bool quant, uint32_t size)
+{
+  const auto time = _exec_time->getOperationExecTime(backend, operation, quant, size);
+  if (time != _exec_time->NOT_FOUND)
+    return time;
+
+  return _is_supported.at(backend).at(operation) ? 1 : _exec_time->getMax();
+}
+
+int64_t HEScheduler::getPermuteTime(const backend::Backend *src_backend,
+                                    const backend::Backend *dst_backend, bool quant, uint32_t size)
+{
+  const auto time = _exec_time->getPermuteTime(src_backend, dst_backend, quant, size);
+  if (time != _exec_time->NOT_FOUND)
+    return time;
+
+  // Makes the scheduler prefer keeping computations on one backend
+  return size / 200;
+}
+
+int64_t HEScheduler::tryBackend(const model::Operation &node, const backend::Backend *backend)
+{
+  auto iter = _is_supported.find(backend);
+  if (iter != _is_supported.end())
+  {
+    auto it2 = iter->second.find(node.getName());
+    if (it2 != iter->second.end())
+    {
+      return _is_supported[backend][node.getName()] ? 1 : _exec_time->getMax();
+    }
+  }
+  try
+  {
+    _backend_resolver->getBackendContext(backend)->shape_fixer->fix(node);
+
+    if (!util::getConfigBool(util::config::PROFILING_MODE))
+      throw std::runtime_error("You are trying to run heterogeneous scheduler with disabled "
+                               "profiling mode, while there is no profiling information about some "
+                               "nodes. Run scheduler with enabled profiling mode first.");
+
+    _is_supported[backend][node.getName()] = true;
+  }
+  catch (std::runtime_error &e)
+  {
+    _is_supported[backend][node.getName()] = false;
+  }
+  return _is_supported[backend][node.getName()] ? 1 : _exec_time->getMax();
+}
+
+void HEScheduler::makeRank()
+{
+  VERBOSE(HEScheduler::makeRank) << "task prioritizing" << std::endl;
+
+  _graph->operations().iterate(
+      [&](const model::OperationIndex &index, const model::Operation &) { DFSMaxRank(index); });
+
+  // Check that ranks are calculated for all operations(nodes)
+  _graph->operations().iterate([&](const model::OperationIndex &index, const model::Operation &) {
+    UNUSED_RELEASE(index);
+    assert(_op_to_rank->find(index) != _op_to_rank->end());
+  });
+  VERBOSE(HEScheduler::makeRank) << "task prioritizing finished" << std::endl;
+}
+
+int64_t HEScheduler::DFSMaxRank(const model::OperationIndex &index)
+{
+  auto op_to_rank_it = _op_to_rank->find(index);
+  if (op_to_rank_it != _op_to_rank->end())
+    return op_to_rank_it->second;
+
+  const auto &node = _graph->operations().at(index);
+  int64_t rank = 0;
+  const bool quant = isQuant(*_graph, node);
+  const auto size = getOperationsFlattenedIOSize(*_graph, node);
+  auto supported_backends_quantity = static_cast<int64_t>(_all_backends.size());
+
+  const auto max_child_rank = DFSChildrenMaxRank(index);
+
+  // get average exec time of this op
+  for (const auto &backend : _all_backends)
+  {
+    auto exec_time = _exec_time->getOperationExecTime(backend, node.getName(), quant, size);
+    if (exec_time == _exec_time->NOT_FOUND)
+    {
+      exec_time = tryBackend(node, backend);
+    }
+    if (exec_time < _exec_time->getMax())
+    {
+      rank += exec_time;
+    }
+    else
+    {
+      // this operation isn't supported in this backend
+      --supported_backends_quantity;
+    }
+  }
+  assert((supported_backends_quantity > 0) && "Encountered unsupported op");
+  rank /= supported_backends_quantity;
+
+  // get standard deviation
+  int64_t std = 0;
+  for (const auto backend : _all_backends)
+  {
+    const auto exec_time = getOpTime(backend, node.getName(), quant, size);
+    if (exec_time < _exec_time->getMax())
+    {
+      std += (exec_time - rank) * (exec_time - rank);
+    }
+  }
+  std /= supported_backends_quantity;
+  if (std > 0)
+  {
+    std = static_cast<int>(std::sqrt(std));
+    rank *= std;
+  }
+  rank += max_child_rank;
+
+  assert(rank >= 0);
+  _rank_to_op.emplace(rank, index);
+  _op_to_rank->emplace(index, rank);
+  VERBOSE(HEScheduler::DFSMaxRank) << "rank of operation (" << index.value() << ")"
+                                   << node.getName() << " is " << rank << std::endl;
+
+  return rank;
+}
+
+int64_t HEScheduler::DFSChildrenMaxRank(const model::OperationIndex &index)
+{
+  const auto &node = _graph->operations().at(index);
+  int64_t max_child_rank = 0;
+  for (const auto &output : node.getOutputs())
+  {
+    const auto &operand = _graph->operands().at(output);
+    const bool quant = operand.typeInfo().type() == model::DataType::QUANT8_ASYMM;
+    // average data transfer cost of this operand's data
+    int64_t avg_transfer_cost = 1;
+    for (const auto *backend : _all_backends)
+    {
+      for (const auto *other_backend : _all_backends)
+      {
+        if (backend == other_backend)
+        {
+          continue;
+        }
+        auto transfer_cost =
+            _exec_time->getPermuteTime(backend, other_backend, quant, operand.info().total_size());
+        if (transfer_cost == _exec_time->NOT_FOUND)
+        {
+          // Makes the scheduler prefer keeping computations on one backend
+          transfer_cost = operand.info().total_size() / 100;
+        }
+        avg_transfer_cost += transfer_cost;
+      }
+    }
+    avg_transfer_cost /= _all_backends.size();
+    for (const auto &use : operand.getUses().list())
+    {
+      const auto cur_child_rank = DFSMaxRank(use);
+      max_child_rank = std::max(max_child_rank, cur_child_rank + avg_transfer_cost);
+    }
+  }
+  return max_child_rank;
+}
+
+int64_t HEScheduler::backendAvailableTime(const backend::Backend *backend,
+                                          const int64_t &starting_time, const int64_t &time_amount)
+{
+  const auto backend_times = _backends_avail_time.at(backend);
+  // finishing and starting times of an op, that will come after current op
+  auto next_op_fst = backend_times.upper_bound(starting_time);
+  // finishing time of an op, that will come before current op
+  auto prev_op_ft = starting_time;
+  // until reach the "hole/gap", that is enough to run this op
+  while (next_op_fst != backend_times.end() && next_op_fst->second - prev_op_ft <= time_amount)
+  {
+    prev_op_ft = next_op_fst->first + 1;
+    ++next_op_fst;
+  }
+  return prev_op_ft;
+}
+
+void HEScheduler::scheduleNode(const model::OperationIndex &index)
+{
+  VERBOSE(HEScheduler::scheduleNode) << "scheduling (" << index.value() << ")" << std::endl;
+  int64_t eft = std::numeric_limits<int64_t>::max(), selected_exec_time = 0;
+  const auto &node = _graph->operations().at(index);
+
+  std::multimap<int64_t, int64_t> selected_transfer_st_exec_time;
+  // select the backend with the smallest eft of this task
+  const backend::Backend *chosen_backend = nullptr;
+  for (const auto *backend : _all_backends)
+  {
+    std::multimap<int64_t, int64_t> transfer_st_exec_time;
+    const auto est_and_et = ESTAndExecTime(backend, index, transfer_st_exec_time);
+
+    if (eft > est_and_et.first + est_and_et.second)
+    {
+      eft = est_and_et.first + est_and_et.second;
+      selected_exec_time = est_and_et.second;
+      chosen_backend = backend;
+      selected_transfer_st_exec_time = transfer_st_exec_time;
+    }
+  }
+
+  if (chosen_backend == nullptr)
+  {
+    throw std::runtime_error{"Fail to choose backend on scheduler"};
+  }
+
+  for (const auto &it : selected_transfer_st_exec_time)
+  {
+    auto prev_op_ft = backendAvailableTime(_cpu_backend, it.first, it.second);
+    _backends_avail_time[_cpu_backend].insert({prev_op_ft + it.second, prev_op_ft});
+  }
+
+  _ops_eft[index] = eft;
+  _backends_avail_time[chosen_backend].emplace(eft, eft - selected_exec_time);
+  _backend_resolver->setBackend(index, chosen_backend);
+
+  VERBOSE(HEScheduler::scheduleNode) << "backend for " << node.getName() << " is "
+                                     << chosen_backend->config()->id() << ". Its eft: " << eft
+                                     << std::endl;
+}
+
+std::pair<int64_t, int64_t>
+HEScheduler::ESTAndExecTime(const backend::Backend *backend, const model::OperationIndex &index,
+                            std::multimap<int64_t, int64_t> &transfer_st_exec_time)
+{
+  const bool is_linear_exec = "Linear" == util::getConfigString(util::config::EXECUTOR);
+  const bool is_parallel_exec = "Parallel" == util::getConfigString(util::config::EXECUTOR);
+  // Permutation will cause creating a separate subgraph that contains just this permutation node.
+  // This isn't needed for Linear executor since it doesn't use subgraphs
+  // Number 1 ms is picked experimentally
+  int64_t permute_fine = 1000;
+  // Multiply cpu operations' exec time by 2 because in parallel executor it might be busy with
+  // permutation on other branches or non-nnfw specific tasks and have to wait for it.
+  // Number 2 is picked experimentally
+  const int64_t CPU_DELAY = 2;
+  const auto &node = _graph->operations().at(index);
+  const bool quant = isQuant(*_graph, node);
+  const auto size = getOperationsFlattenedIOSize(*_graph, node);
+  // if this node can be part of a subgraph, then assigning different backend will cause creating
+  // another subgraph
+  if (isMergable(*_graph, node))
+  {
+    permute_fine *= 2;
+  }
+  if (isWorkaroundSkip(*_graph, backend, node, quant))
+  {
+    return {_exec_time->getMax(), _exec_time->getMax()};
+  }
+  // get average exec time of the op on this backend
+  auto exec_time = getOpTime(backend, node.getName(), quant, size);
+  if (backend->config()->id() == "cpu" && is_parallel_exec)
+  {
+    exec_time *= CPU_DELAY;
+  }
+
+  // get max eft of direct (one level above) predecessors
+  auto max_pred_eft = predMaxEFT(backend, node, transfer_st_exec_time);
+
+  int64_t total_transfer_cost = 0;
+  std::vector<std::multimap<int64_t, int64_t>::iterator> inserted_permutations;
+  // Find free time for data transferring and insert it into backend taskset. This is needed:
+  //  1. Time for multiple permutations for this node's input is found correctly
+  //  2. If backend==cpu, then free time for this node must come after permutations
+  for (auto &it : transfer_st_exec_time)
+  {
+    if (is_parallel_exec)
+    {
+      it.second *= CPU_DELAY;
+    }
+    if (!is_linear_exec)
+    {
+      it.second += permute_fine;
+    }
+    total_transfer_cost += it.second;
+
+    const auto prev_op_ft = backendAvailableTime(_cpu_backend, it.first, it.second);
+
+    max_pred_eft = std::max(max_pred_eft, prev_op_ft + it.second);
+
+    const auto tmp = _backends_avail_time[_cpu_backend].emplace(prev_op_ft + it.second, prev_op_ft);
+    inserted_permutations.push_back(tmp.first);
+  }
+  // find the hole/gap, where this op can be put or the finishing time of the last assigned op
+  auto prev_op_ft = backendAvailableTime(backend, max_pred_eft, exec_time);
+
+  // Remove inserted permutation from cpu's task set
+  for (const auto &it : inserted_permutations)
+  {
+    _backends_avail_time[_cpu_backend].erase(it);
+  }
+
+  /* In case non-parallel executor measure just exec time and data transfer time
+   * because EFT(prev_op_ft) is the same for all backends. Since two operations
+   * can't be run simultaneously, finish of running operation must be waited for.
+   * When an operation starts, all backends are free. So, they need time just for
+   * data transfer.*/
+  if (!is_parallel_exec)
+  {
+    VERBOSE(HEScheduler::ESTAndExecTime)
+        << "exec_time of (" << index.value() << ") " << node.getName() << " quant==" << quant
+        << " on " << backend->config()->id() << " is " << exec_time
+        << " microseconds. Data transfer cost: " << total_transfer_cost << std::endl;
+
+    return {total_transfer_cost, exec_time};
+  }
+  VERBOSE(HEScheduler::ESTAndExecTime)
+      << "exec_time of (" << index.value() << ") " << node.getName() << " quant==" << quant
+      << " on " << backend->config()->id() << ": " << exec_time
+      << " microseconds. Backend available time: " << prev_op_ft
+      << " Parent's max eft: " << max_pred_eft - total_transfer_cost
+      << " data transfer cost: " << total_transfer_cost << std::endl;
+
+  return {prev_op_ft, exec_time};
+}
+
+int64_t HEScheduler::predMaxEFT(const backend::Backend *backend, const model::Operation &node,
+                                std::multimap<int64_t, int64_t> &transfer_st_exec_time)
+{
+  int64_t max_pred_eft = 0;
+  for (const auto &input_operand_idx : node.getInputs())
+  {
+    const auto &input_operand = _graph->operands().at(input_operand_idx);
+    const bool quant = input_operand.typeInfo().type() == model::DataType::QUANT8_ASYMM;
+
+    for (const auto &input_node_idx : input_operand.getDef().list())
+    {
+      // Data transfer cost from parent's node backend to current node's backend:
+      auto parent_backend = _backend_resolver->getBackend(input_node_idx);
+
+      max_pred_eft = std::max(max_pred_eft, _ops_eft.at(input_node_idx));
+      if (parent_backend != backend)
+      {
+        // Multiply operand size by 2 because size must describe input+output size
+        int64_t transfer_cost =
+            getPermuteTime(parent_backend, backend, quant, input_operand.info().total_size() * 2);
+        transfer_st_exec_time.emplace(_ops_eft.at(input_node_idx), transfer_cost);
+      }
+    }
+  }
+  return max_pred_eft;
+}
+
+} // namespace compiler
+
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/compiler/HEScheduler.h b/runtimes/neurun/core/src/compiler/HEScheduler.h
new file mode 100644
index 000000000..2b818f248
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/HEScheduler.h
@@ -0,0 +1,164 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file  HEScheduler.h
+ * @brief This file contains HEScheduler class to define and run task Heterogeneous Execution
+ * Scheduler
+ */
+
+#ifndef __NEURUN_COMPILER_H_E_SCHEDULER_H_
+#define __NEURUN_COMPILER_H_E_SCHEDULER_H_
+
+#include "compiler/IScheduler.h"
+#include "graph/Graph.h"
+#include "backend/ExecTime.h"
+#include "backend/Backend.h"
+#include "cpp14/memory.h"
+#include "model/OperationIndexMap.h"
+#include <map>
+#include <memory>
+
+namespace neurun
+{
+
+namespace compiler
+{
+/**
+ * @brief Class to schedule tasks
+ */
+class HEScheduler : IScheduler
+{
+public:
+  /**
+   * @brief     Construct a new Heterogeneous Execution Scheduler object
+   * @param[in] model Graph model
+   * @param[in] backend_resolver backend resolver
+   */
+  HEScheduler(const neurun::model::Operands &operands,
+              std::vector<const backend::Backend *> backends,
+              const std::shared_ptr<backend::custom::KernelRegistry> &registry)
+      : _is_supported{}, _backends_avail_time{}, _ops_eft{},
+        _op_to_rank{std::make_shared<model::OperationIndexMap<int64_t>>()},
+        _all_backends(std::move(backends))
+  {
+    _backend_resolver =
+        nnfw::cpp14::make_unique<compiler::BackendResolver>(operands, _all_backends, registry);
+    _exec_time = nnfw::cpp14::make_unique<backend::ExecTime>(_all_backends);
+
+    // Find cpu backend
+    auto cpu_backend_it = std::find_if(
+        _all_backends.begin(), _all_backends.end(),
+        [](const backend::Backend *backend) { return backend->config()->id() == "cpu"; });
+    if (cpu_backend_it == _all_backends.end())
+      throw std::runtime_error("HEScheduler could be used only if 'cpu' backend is available");
+    _cpu_backend = *cpu_backend_it;
+  }
+
+public:
+  /**
+   * @brief   Task scheduling
+   *
+   * @note    The main idea is taken from HSIP algo:
+   *          https://www.hindawi.com/journals/sp/2016/3676149/
+   */
+  std::unique_ptr<compiler::BackendResolver> schedule(const graph::Graph &graph) final;
+  std::shared_ptr<model::OperationIndexMap<int64_t>> getIndexedRanks() { return _op_to_rank; }
+
+private:
+  bool isNodeProfiled(const model::Operation &);
+
+  void scheduleNode(const model::OperationIndex &);
+  /**
+   * @brief   Get earliest starting time and execution time of an operation on a backend.
+   *
+   * @note  Returns a time when operation's inputs are ready and backend is available
+   *        It also returns exec time. If this is "cpu" backend, then exec_time*CPU_DELAY
+   *
+   * @param[in] backend: backend, for which to return the time
+   * @param[in] index: index of an operation
+   * @param[out] transfer_st_exec_time: est and exec time of data transfer operation
+   *
+   * @return earliest starting time and execution time
+   */
+  std::pair<int64_t, int64_t>
+  ESTAndExecTime(const backend::Backend *backend, const model::OperationIndex &index,
+                 std::multimap<int64_t, int64_t> &transfer_st_exec_time);
+  /**
+   * @brief   Returns the latest finishing time of parents of a node.
+   *
+   * @param[in] backend: backend, for which to return the time
+   * @param[in] node: node to get eft of parents
+   * @param[out] transfer_st_exec_time: est and exec time of data transfer operation
+   *
+   * @return earliest finishing time of parent nodes
+   */
+  int64_t predMaxEFT(const backend::Backend *backend, const model::Operation &node,
+                     std::multimap<int64_t, int64_t> &transfer_st_exec_time);
+
+  void makeRank();
+
+  int64_t DFSMaxRank(const model::OperationIndex &index);
+
+  int64_t DFSChildrenMaxRank(const model::OperationIndex &index);
+  /**
+   * @brief   Returns the time, when backend is available for at least given amount of time.
+   *
+   * @note  Returns either hole/gap between two performing two already scheduled operations,
+   *        or the finishing time of the last scheduled operation
+   *
+   * @param[in] backend backend, for which to return the time
+   * @param[in] starting_time time, starting which to look for gap
+   * @param[in] time_amount amount of the time, for which to look gap
+   *
+   * @return time, when backend has at least time_amount free time
+   */
+  int64_t backendAvailableTime(const backend::Backend *backend, const int64_t &starting_time,
+                               const int64_t &time_amount);
+
+  int64_t getOpTime(const backend::Backend *backend, const std::string &operation, bool quant,
+                    uint32_t size);
+
+  int64_t getPermuteTime(const backend::Backend *src_backend, const backend::Backend *dst_backend,
+                         bool quant, uint32_t size);
+
+  void scheduleShufflingBackends();
+
+  int64_t tryBackend(const model::Operation &node, const backend::Backend *backend);
+
+private:
+  // This variable stores backend/node pairs with unknown execution time, and hints scheduler
+  // whether it should assign these backends to these nodes:
+  // * It stores false for unsupported nodes
+  // * During rank calculation with enabled profiling mode it stores true for supported nodes
+  std::unordered_map<const backend::Backend *, std::unordered_map<std::string, bool>> _is_supported;
+  // Finishing and starting time of each backend
+  std::unordered_map<const backend::Backend *, std::map<int64_t, int64_t>> _backends_avail_time;
+  model::OperationIndexMap<int64_t> _ops_eft;
+  std::multimap<int64_t, model::OperationIndex, std::greater<int64_t>> _rank_to_op;
+  std::shared_ptr<model::OperationIndexMap<int64_t>> _op_to_rank;
+  std::unique_ptr<compiler::BackendResolver> _backend_resolver;
+  std::unique_ptr<backend::ExecTime> _exec_time;
+  const graph::Graph *_graph{nullptr};
+  const std::vector<const backend::Backend *> _all_backends;
+  const backend::Backend *_cpu_backend{nullptr};
+};
+
+} // namespace compiler
+
+} // namespace neurun
+
+#endif // __NEURUN_COMPILER_H_E_SCHEDULER_H_
diff --git a/runtimes/neurun/core/src/compiler/IScheduler.h b/runtimes/neurun/core/src/compiler/IScheduler.h
new file mode 100644
index 000000000..5b425bf45
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/IScheduler.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_CORE_COMPILER_I_SCHEDULER_H__
+#define __NEURUN_CORE_COMPILER_I_SCHEDULER_H__
+
+#include "BackendResolver.h"
+#include "graph/Graph.h"
+
+namespace neurun
+{
+namespace compiler
+{
+
+struct IScheduler
+{
+  virtual ~IScheduler() = default;
+
+  virtual std::unique_ptr<BackendResolver> schedule(const graph::Graph &graph) = 0;
+};
+
+} // namespace compiler
+} // namespace neurun
+
+#endif // __NEURUN_CORE_COMPILER_I_SCHEDULER_H__
diff --git a/runtimes/neurun/core/src/compiler/Linear.cc b/runtimes/neurun/core/src/compiler/Linear.cc
new file mode 100644
index 000000000..72d0fdb8f
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/Linear.cc
@@ -0,0 +1,355 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <algorithm>
+
+#include "Linear.h"
+
+#include "graph/operation/LowerInfo.h"
+#include "graph/operand/LowerInfo.h"
+#include "backend/IShapeFixer.h"
+#include "backend/IConfig.h"
+#include "backend/IConstantInitializer.h"
+#include "backend/Backend.h"
+#include "compiler/SubTensorInfo.h"
+#include "model/OperandInfo.h"
+#include "model/OperandIndexMap.h"
+
+#include "util/logging.h"
+
+namespace neurun
+{
+namespace compiler
+{
+
+Linear::Linear(const std::shared_ptr<const model::Model> &model,
+               std::unique_ptr<model::Subgraphs> subgraphs,
+               std::unique_ptr<graph::LowerInfoMap> lower_info_map,
+               std::unique_ptr<compiler::BackendResolver> backend_resolver)
+    : _model(model), _subgraphs{std::move(subgraphs)}, _lower_info_map{std::move(lower_info_map)},
+      _backend_resolver{std::move(backend_resolver)}
+{
+  assert(_model && _subgraphs && _lower_info_map);
+
+  // Get SubgraphSequence by topological sorting
+  {
+    // _subgraphs can't access a subgraph by an operand so that input_to_subgs can offer it
+    std::unordered_map<model::OperandIndex, std::list<model::SubgraphIndex>> input_to_subgs;
+
+    // Get the relations between input/subgraph to be used for dfs-post-iter
+    //
+    //      [0]             # input -> _input_to_subgraphes[0] = {SUBG0}
+    //       |
+    //     [SUBG0]
+    //       |
+    //      [1]-----.       # input -> _input_to_subgraphes[1] = {SUBG1, SUBG2}
+    //       |      |
+    //     [SUBG1] [SUBG2]
+    //       |      |
+    //      [2]    [3]      # input -> _input_to_subgraphes[2] = {SUBG3}
+    //       \      /       # input -> _input_to_subgraphes[3] = {SUBG3}
+    //       [SUBG3]
+    //         |
+    //        [4]
+    _subgraphs->iterate([&](const model::SubgraphIndex &subg_idx, model::Subgraph &subg) {
+      for (auto input : subg.getInputs())
+      {
+        // only valid_inputs
+        const auto &operand = _model->operands.at(input);
+        if (operand.isConstant())
+          continue;
+
+        auto it = input_to_subgs.find(input);
+        if (it == input_to_subgs.end())
+        {
+          std::list<model::SubgraphIndex> list{subg_idx};
+          input_to_subgs[input] = list;
+        }
+        else
+        {
+          it->second.push_back(subg_idx);
+        }
+      }
+    });
+
+    std::unordered_map<model::SubgraphIndex, bool> visited;
+    _subgraphs->iterate([&](const model::SubgraphIndex &index, const model::Subgraph &) {
+      visited[index] = false;
+    });
+
+    std::function<void(const model::SubgraphIndex &, model::Subgraph &)> dfs_recursive =
+        [&](const model::SubgraphIndex &index, model::Subgraph &subg) -> void {
+      if (visited[index])
+        return;
+      visited[index] = true;
+
+      // The outputs should be not constants
+      for (auto output : subg.getOutputs())
+      {
+        const auto it = input_to_subgs.find(output);
+        if (it != input_to_subgs.end())
+        {
+          const auto &subg_index_list = it->second;
+          for (const auto &index : subg_index_list)
+          {
+            auto &subg = _subgraphs->at(index);
+            dfs_recursive(index, subg);
+          }
+        }
+      }
+
+      _elements.emplace_back(&_subgraphs->at(index), getLowerInfo(index));
+    };
+
+    _subgraphs->iterate(dfs_recursive);
+
+    // All of the nodes must have been visited.
+    assert(
+        std::all_of(visited.begin(), visited.end(),
+                    [](const std::pair<const model::SubgraphIndex, bool> &v) { return v.second; }));
+
+    // NOTE. Now these subgraph are on the reverse order
+    std::reverse(_elements.begin(), _elements.end());
+  }
+
+  {
+    const auto &backendToString = [](const neurun::backend::Backend *backend) {
+      assert(backend);
+      std::string str;
+      str += backend->config()->id();
+      str += " ";
+      return "{ " + str + "}";
+    };
+
+    VERBOSE(Linear) << "Final SubgraphSequence" << std::endl;
+    for (const auto &element : _elements)
+    {
+      const auto subg = element.subgraph;
+      const auto lower_info = element.lower_info;
+      VERBOSE(Linear) << "* SUBG"
+                      << " " << backendToString(lower_info->backend()) << " " << subg->getStr()
+                      << std::endl;
+    }
+  }
+}
+
+void Linear::accept(model::OperationVisitor &&visitor) const
+{
+  for (const auto &e : _elements)
+  {
+    e.subgraph->accept(visitor);
+  }
+}
+
+void Linear::planTensors()
+{
+  model::OperandIndexMap<std::shared_ptr<backend::ITensorBuilder>> tensor_builder_map;
+
+  // NOTE
+  // While current ITensorBuilder exposes registerSubTensorInfo for subtensor,
+  // this stage uses registerSubTensorInfo() and notify{First|Last}Use()
+  // but handling subtensor should be processed on each backend. See #5726.
+  model::OperandIndexMap<uint32_t> uses_map;
+  model::OperandIndexMap<uint32_t> def_map;
+  model::OperandIndexSequence constants;
+
+  // Prepare scanning
+  _model->operands.iterate([&](const model::OperandIndex &ind, const model::Operand &obj) {
+    const auto lower_info = getLowerInfo(ind);
+    // TODO Remove if neurun doesn't support anymore such as
+    // GeneratedTests.reshape_quant8_weights_as_inputs
+    if (lower_info->def_factors().size() == 0 && lower_info->use_factors().size() == 0 &&
+        _model->inputs.contains(ind) == false)
+    {
+      VERBOSE(LINEAR) << "Operand #" << ind.value() << " will be not used. no more process."
+                      << std::endl;
+      return;
+    }
+
+    uses_map[ind] = obj.getUses().size();
+    def_map[ind] = obj.getDef().size(); // should be 1 or 0
+
+    bool is_const = obj.isConstant();
+    if (is_const)
+    {
+      constants.append(ind);
+    }
+
+    for (auto factor : lower_info->def_factors())
+    {
+      bool isSubTensor = false;
+      auto backend = factor.backend();
+      auto tensor_builder = _backend_resolver->getBackendContext(backend)->tensor_builder;
+
+      if (backend->config()->SupportSubTensorAlloc())
+      {
+        const auto parentInfo = obj.parent_info();
+        if (parentInfo != nullptr)
+        {
+          isSubTensor = true;
+        }
+      }
+
+      if (isSubTensor)
+      {
+        const compiler::SubTensorInfo info(obj);
+        tensor_builder->registerSubTensorInfo(ind, info);
+      }
+      else
+      {
+        const auto info = obj.info();
+
+        // NOTE This assumes an operand can have one layout, and only PermutateNode can have
+        // different layouts for input and output
+        const auto &def = *obj.getDef().list().cbegin();
+        auto frontend_layout = _subgraphs->at(_subgraphs->getOperation(def)).getLayout();
+        if (frontend_layout == model::Layout::UNKNOWN)
+        {
+          const auto &use = *obj.getUses().list().cbegin();
+          frontend_layout = _subgraphs->at(_subgraphs->getOperation(use)).getLayout();
+        }
+        const auto backend_layout = lower_info->def_factors().getOnlyElement().layout();
+        tensor_builder->registerTensorInfo(ind, info, frontend_layout, backend_layout, is_const);
+      }
+
+      tensor_builder_map[ind] = tensor_builder;
+    }
+  });
+
+  // If a tensor is model output, increase the use of the tensor.
+  // This aim is same to above one.
+  for (const auto &ind : _model->outputs)
+  {
+    uses_map[ind]++;
+  }
+
+  // Start scanning to do notify{First|Last}Use for each tensor
+
+  // If a tensor is a constant, increase the use of the tensor.
+  // It makes the tensor not be dealloced. It means these will be deallocated last.
+  // And allocate constant operands first
+  VERBOSE(LINEAR) << "TENSORS as CONSTANT" << std::endl;
+  for (const auto &ind : constants)
+  {
+    uses_map[ind]++;
+    tensor_builder_map[ind]->notifyFirstUse(ind);
+  }
+
+  // Allocate Model's inputs
+  VERBOSE(LINEAR) << "TENSORS as MODEL INPUT" << std::endl;
+  for (const auto &ind : _model->inputs)
+  {
+    auto tensor_builder = tensor_builder_map[ind];
+    if (!tensor_builder) // for GeneratedTests.xxx_weights_as_inputs
+      continue;
+    tensor_builder->notifyFirstUse(ind);
+  }
+
+  // At each operation,
+  // 1. Scan DEF of outputs. If the DEF, allocate it
+  // 2. Scan USE of inputs. Decrease the USE and deallocate if the USE is 0
+  VERBOSE(LINEAR) << "TENSORS" << std::endl;
+  for (const auto &e : _elements)
+  {
+    for (const auto &op : e.subgraph->operations())
+    {
+      for (const auto &ind : op.node->getOutputs())
+      {
+        assert(def_map.find(ind) != def_map.end());
+        if (def_map[ind])
+        {
+          def_map[ind] = 0;
+          tensor_builder_map[ind]->notifyFirstUse(ind);
+        }
+      }
+
+      for (const auto &ind : op.node->getInputs())
+      {
+        assert(uses_map.find(ind) != uses_map.end());
+        assert(uses_map[ind] > 0);
+        uses_map[ind]--;
+        if (uses_map[ind] == 0)
+        {
+          tensor_builder_map[ind]->notifyLastUse(ind);
+        }
+      }
+    }
+  }
+
+  // Dispose and validate
+  for (const auto &ind : _model->outputs)
+  {
+    --uses_map[ind];
+    assert(uses_map[ind] == 0);
+    tensor_builder_map[ind]->notifyLastUse(ind);
+  }
+
+  for (const auto &ind : constants)
+  {
+    --uses_map[ind];
+    assert(uses_map[ind] == 0);
+    tensor_builder_map[ind]->notifyLastUse(ind);
+  }
+
+  assert(std::all_of(
+      uses_map.begin(), uses_map.end(),
+      [](std::pair<const model::OperandIndex, uint32_t> it) { return it.second == 0; }));
+
+  assert(std::all_of(
+      def_map.begin(), def_map.end(),
+      [](std::pair<const model::OperandIndex, uint32_t> it) { return it.second == 0; }));
+}
+
+void Linear::iterate(const std::function<void(const Element &element)> &fn) const
+{
+  for (const auto &e : _elements)
+  {
+    fn(e);
+  }
+}
+
+void Linear::generateConstantInitializers(void) const
+{
+  iterate([&](const compiler::Linear::Element &element) {
+    auto backend = element.lower_info->backend();
+
+    auto constant_initializer = _backend_resolver->getBackendContext(backend)->constant_initializer;
+    constant_initializer->generate(*element.subgraph, _model->operands);
+  });
+}
+
+const graph::operation::LowerInfo *Linear::getLowerInfo(const model::SubgraphIndex &index) const
+{
+  if (!_lower_info_map)
+    return nullptr;
+  auto itr = _lower_info_map->operation.find(index);
+  if (itr == _lower_info_map->operation.end())
+    return nullptr;
+  return itr->second.get();
+}
+
+const graph::operand::LowerInfo *Linear::getLowerInfo(const model::OperandIndex &index) const
+{
+  if (!_lower_info_map)
+    return nullptr;
+  auto itr = _lower_info_map->operand.find(index);
+  if (itr == _lower_info_map->operand.end())
+    return nullptr;
+  return itr->second.get();
+}
+
+} // namespace compiler
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/compiler/Linear.h b/runtimes/neurun/core/src/compiler/Linear.h
new file mode 100644
index 000000000..78c782a78
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/Linear.h
@@ -0,0 +1,108 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_COMPILER_LINEAR_H__
+#define __NEURUN_COMPILER_LINEAR_H__
+
+#include <vector>
+#include <memory>
+
+#include "model/Model.h"
+#include "model/Subgraphs.h"
+#include "backend/ITensorBuilder.h"
+#include "graph/LowerInfoMap.h"
+#include "compiler/BackendResolver.h"
+
+namespace neurun
+{
+namespace graph
+{
+namespace operation
+{
+struct OperationVisitor;
+} // namespace operation
+} // namespace graph
+} // namespace neurun
+
+namespace neurun
+{
+namespace compiler
+{
+
+class Linear
+{
+public:
+  struct Element
+  {
+    const model::Subgraph *subgraph;
+    const graph::operation::LowerInfo *lower_info;
+
+    Element(const model::Subgraph *subgraph, const graph::operation::LowerInfo *lower_info)
+        : subgraph{subgraph}, lower_info{lower_info}
+    {
+      // DO NOTHING
+    }
+  };
+
+public:
+  Linear(const std::shared_ptr<const model::Model> &model,
+         std::unique_ptr<model::Subgraphs> subgraphs,
+         std::unique_ptr<graph::LowerInfoMap> lower_info_map,
+         std::unique_ptr<compiler::BackendResolver> backend_resolver);
+
+public:
+  Linear(const Linear &linear) = delete;
+
+public:
+  void accept(model::OperationVisitor &&visitor) const;
+
+  void planTensors();
+
+  void iterate(const std::function<void(const Element &element)> &fn) const;
+
+  void generateConstantInitializers(void) const;
+
+  std::unique_ptr<graph::LowerInfoMap> releaseLowerInfo() { return std::move(_lower_info_map); }
+  graph::LowerInfoMap *getLowerInfo() { return _lower_info_map.get(); }
+
+  std::unique_ptr<model::Subgraphs> releaseSubgraphs() { return std::move(_subgraphs); }
+
+  std::vector<Element> &&releaseElements() { return std::move(_elements); }
+
+  const backend::BackendContext *getBackendContext(const backend::Backend *backend)
+  {
+    return _backend_resolver->getBackendContext(backend);
+  }
+
+  const compiler::BackendResolver *backend_resolver() const { return _backend_resolver.get(); }
+
+private:
+  // TODO Replace these getLowerInfo methods with ones of LowerInfoMap in the future
+  const graph::operation::LowerInfo *getLowerInfo(const model::SubgraphIndex &index) const;
+  const graph::operand::LowerInfo *getLowerInfo(const model::OperandIndex &index) const;
+
+private:
+  std::shared_ptr<const model::Model> _model;
+  std::unique_ptr<model::Subgraphs> _subgraphs;
+  std::unique_ptr<graph::LowerInfoMap> _lower_info_map;
+  std::vector<Element> _elements;
+  std::unique_ptr<compiler::BackendResolver> _backend_resolver;
+};
+
+} // namespace compiler
+} // namespace neurun
+
+#endif // __NEURUN_COMPILER_LINEAR_H__
diff --git a/runtimes/neurun/core/src/compiler/ManualScheduler.cc b/runtimes/neurun/core/src/compiler/ManualScheduler.cc
new file mode 100644
index 000000000..efd5ccc31
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/ManualScheduler.cc
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ManualScheduler.h"
+#include "model/Operations.Include.h"
+#include "backend/Backend.h"
+#include "backend/BackendManager.h"
+#include "backend/IConfig.h"
+#include "util/ConfigSource.h"
+#include "misc/string_helpers.h"
+
+namespace neurun
+{
+namespace compiler
+{
+
+std::unique_ptr<BackendResolver> ManualScheduler::schedule(const graph::Graph &graph)
+{
+  auto backend_resolver = nnfw::cpp14::make_unique<compiler::BackendResolver>(
+      graph.operands(), backend::BackendManager::instance().getAll(), graph.getKernelRegistry());
+
+  // 1. Backend for All operations
+  const auto backend_all_str = util::getConfigString(util::config::OP_BACKEND_ALLOPS);
+  auto backend_all = backend::BackendManager::instance().get(backend_all_str);
+
+  VERBOSE(ManualScheduler) << "Default backend for all ops: " << backend_all_str << std::endl;
+
+  graph.operations().iterate([&](const model::OperationIndex &index, const model::Operation &) {
+    backend_resolver->setBackend(index, backend_all);
+  });
+
+  // 2. Backend per operation type
+  std::unordered_map<std::type_index, backend::Backend *> op_type_map;
+  // By default, CustomNode uses cpu backend
+  op_type_map[typeid(model::operation::CustomNode)] =
+      backend::BackendManager::instance().get("cpu");
+#define OP(InternalName, IsNnApi)                                                             \
+  if (IsNnApi)                                                                                \
+  {                                                                                           \
+    const auto &backend_str = util::getConfigString(util::config::OP_BACKEND_##InternalName); \
+    if (!backend_str.empty())                                                                 \
+    {                                                                                         \
+      auto backend = backend::BackendManager::instance().get(backend_str);                    \
+      VERBOSE(Lower) << "backend for " << #InternalName << ": " << backend_str << std::endl;  \
+      op_type_map[typeid(model::operation::InternalName)] = backend;                          \
+    }                                                                                         \
+  }
+#include "model/Operations.lst"
+#undef OP
+  graph.operations().iterate(
+      [&](const model::OperationIndex &index, const model::Operation &operation) {
+        auto itr = op_type_map.find(typeid(operation));
+        if (itr != op_type_map.end())
+        {
+          backend_resolver->setBackend(index, itr->second);
+        }
+      });
+
+  // 3. Backend per operation
+  try
+  {
+    auto map_str = util::getConfigString(util::config::OP_BACKEND_MAP);
+    auto key_val_list = nnfw::misc::split(map_str, ';');
+    for (const auto &key_val_str : key_val_list)
+    {
+      if (key_val_str.empty())
+      {
+        continue;
+      }
+
+      auto key_val = nnfw::misc::split(key_val_str, '=');
+      const auto &key_str = key_val.at(0);
+      const auto &val = key_val.at(1);
+      auto key = static_cast<uint32_t>(std::stoi(key_str));
+
+      graph.operations().at(model::OperationIndex{key}); // Check if exist, or this wil throw
+      backend_resolver->setBackend(model::OperationIndex{key},
+                                   backend::BackendManager::instance().get(val));
+    }
+  }
+  catch (...)
+  {
+    VERBOSE(ManualScheduler) << "Invalid value from " << util::config::OP_BACKEND_MAP
+                             << ". Some of the given values are ignored" << std::endl;
+  }
+
+  // Dump final assignment
+  backend_resolver->iterate(
+      [&](const model::OperationIndex &index, const backend::BackendContext &backend_ctx) {
+        VERBOSE(ManualScheduler) << "backend for operation #" << index.value() << ": "
+                                 << backend_ctx.backend->config()->id() << std::endl;
+      });
+
+  return backend_resolver;
+}
+
+} // namespace compiler
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/compiler/ManualScheduler.h b/runtimes/neurun/core/src/compiler/ManualScheduler.h
new file mode 100644
index 000000000..c40318a70
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/ManualScheduler.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_CORE_COMPILER_MANUAL_SCHEDULER_H__
+#define __NEURUN_CORE_COMPILER_MANUAL_SCHEDULER_H__
+
+#include "IScheduler.h"
+
+namespace neurun
+{
+namespace compiler
+{
+
+class ManualScheduler : public IScheduler
+{
+public:
+  std::unique_ptr<BackendResolver> schedule(const graph::Graph &graph) override;
+};
+
+} // namespace compiler
+} // namespace neurun
+
+#endif // __NEURUN_CORE_COMPILER_MANUAL_SCHEDULER_H__
diff --git a/runtimes/neurun/core/src/compiler/OperandContext.cc b/runtimes/neurun/core/src/compiler/OperandContext.cc
new file mode 100644
index 000000000..77adc556c
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/OperandContext.cc
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "OperandContext.h"
+
+#include <cassert>
+
+namespace neurun
+{
+namespace compiler
+{
+
+OperandContext &OperandContext::set(const model::OperandIndex &id,
+                                    const std::shared_ptr<backend::operand::IObject> &object)
+{
+  // Only one object for an id
+  assert(_objects.find(id) == _objects.end());
+  _objects[id] = object;
+  return (*this);
+}
+
+void OperandContext::iterate(
+    const std::function<void(const model::OperandIndex &, backend::operand::IObject &)> &fn)
+{
+  for (auto &e : _objects)
+  {
+    fn(e.first, *e.second);
+  }
+}
+
+} // namespace compiler
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/compiler/OperandContext.h b/runtimes/neurun/core/src/compiler/OperandContext.h
new file mode 100644
index 000000000..169122500
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/OperandContext.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_COMPILER_OPERAND_CONTEXT_H__
+#define __NEURUN_COMPILER_OPERAND_CONTEXT_H__
+
+#include "backend/operand/IObject.h"
+#include "model/OperandIndexMap.h"
+#include <unordered_map>
+#include <memory>
+
+namespace neurun
+{
+namespace compiler
+{
+
+class OperandContext
+{
+public:
+  OperandContext &set(const model::OperandIndex &ind,
+                      const std::shared_ptr<backend::operand::IObject> &object);
+
+public:
+  bool exist(const ::neurun::model::OperandIndex &ind) const
+  {
+    return _objects.find(ind) != _objects.end();
+  }
+
+public:
+  std::shared_ptr<backend::operand::IObject> at(const model::OperandIndex &ind) const
+  {
+    return _objects.at(ind);
+  }
+
+  std::shared_ptr<backend::operand::IObject> &at(const model::OperandIndex &ind)
+  {
+    return _objects.at(ind);
+  }
+
+  void
+  iterate(const std::function<void(const model::OperandIndex &, backend::operand::IObject &)> &fn);
+
+private:
+  model::OperandIndexMap<std::shared_ptr<backend::operand::IObject>> _objects;
+};
+
+} // namespace compiler
+} // namespace neurun
+
+#endif // __NEURUN_COMPILER_OPERAND_CONTEXT_H__
diff --git a/runtimes/neurun/core/src/compiler/OperationValidator.cc b/runtimes/neurun/core/src/compiler/OperationValidator.cc
new file mode 100644
index 000000000..0be680941
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/OperationValidator.cc
@@ -0,0 +1,879 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "OperationValidator.h"
+
+#include <typeinfo>
+
+#include "model/Operands.h"
+#include "graph/operation/LowerInfo.h"
+
+#include "util/logging.h"
+#include "util/Utils.h"
+
+namespace neurun
+{
+namespace compiler
+{
+
+void OperationValidator::visit(const model::Subgraph &subgraph)
+{
+  _current_subg_layout = subgraph.getLayout();
+  for (const auto &e : subgraph.operations())
+  {
+    const auto &node = *(e.node);
+    node.accept(*this);
+  }
+}
+
+void OperationValidator::visit(const model::operation::CastNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(0)};
+
+  UNUSED_RELEASE(output_index);
+  UNUSED_RELEASE(input_index);
+
+  assert(_ctx.at(output_index).shape() == _ctx.at(input_index).shape());
+}
+
+void OperationValidator::visit(const model::operation::ComparisonNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto lhs_index{node.getInputs().at(model::operation::ComparisonNode::Input::INPUT0)};
+  const auto rhs_index{node.getInputs().at(model::operation::ComparisonNode::Input::INPUT1)};
+
+  UNUSED_RELEASE(output_index);
+  UNUSED_RELEASE(lhs_index);
+  UNUSED_RELEASE(rhs_index);
+
+  assert(_ctx.at(lhs_index).typeInfo().type() == _ctx.at(rhs_index).typeInfo().type());
+  assert(_ctx.at(output_index).typeInfo().type() == model::DataType::BOOL8);
+}
+
+void OperationValidator::visit(const model::operation::SoftmaxNode &node)
+{
+  VERBOSE(Softmax) << "Configure SOFTMAX operation" << std::endl;
+
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(0)};
+
+  UNUSED_RELEASE(output_index);
+  UNUSED_RELEASE(input_index);
+
+  assert(_ctx.at(output_index).shape().rank() == _ctx.at(input_index).shape().rank());
+}
+
+void OperationValidator::visit(const model::operation::PermuteNode &node)
+{
+  VERBOSE(Permute) << "Configure Permute operation" << std::endl;
+
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(0)};
+
+  UNUSED_RELEASE(output_index);
+  UNUSED_RELEASE(input_index);
+
+  assert(_ctx.at(output_index).shape().rank() == _ctx.at(input_index).shape().rank());
+}
+
+void OperationValidator::visit(const model::operation::ReduceSumNode &node)
+{
+  VERBOSE(Permute) << "Configure ReduceSum operation" << std::endl;
+
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::ReduceSumNode::Input::INPUT)};
+  const auto axis_index{node.param().axis_index};
+
+  UNUSED_RELEASE(output_index);
+  UNUSED_RELEASE(input_index);
+  UNUSED_RELEASE(axis_index);
+
+  const auto input_shape = _ctx.at(input_index).shape();
+  const auto output_shape = _ctx.at(output_index).shape();
+  const auto axis_shape = _ctx.at(axis_index).shape();
+
+  UNUSED_RELEASE(output_shape);
+  UNUSED_RELEASE(input_shape);
+  UNUSED_RELEASE(axis_shape);
+
+  assert(input_shape.rank() <= 4);
+  assert(output_shape.rank() <= input_shape.rank());
+  assert(_ctx.at(axis_index).isConstant());
+  assert(axis_shape.rank() == 0 || axis_shape.rank() == 1);
+
+  // NOTE For the 4-dimensions, if the rank of input and output are different, this runtime only
+  // supports cases reducing height and width or reducing depth.
+  // TODO We have to support all cases of dimensions up to 4.
+  // For correct permuting, we have to set output's shape to be equal in dimension position of the
+  // input. But the positions of the same dimensions in the input and output may be set differently.
+  // For example {2,3,4,5}(input's shape) can be reduced to {3,5}(output's shape). The original
+  // output shape should be {1,3,1,5}, but real output shape may be {3,5}. If you simply try to
+  // extend it in 4 dimensions, it should be {1,1,3,5}.
+  // Even if output shape is changed to {1,3,1,5}, there is another problem. It is that shape of
+  // output tensor used at next operation is changed to {1,3,1,5} after this operation even if the
+  // next operation is not desired.
+  if (input_shape.rank() == 4 && input_shape.rank() != output_shape.rank())
+  {
+    if (output_shape.rank() == 2)
+    {
+      // Reducing HW
+      assert(input_shape.dim(0) == output_shape.dim(0) &&
+             input_shape.dim(3) == output_shape.dim(1));
+    }
+    else if (output_shape.rank() == 3)
+    {
+      // Reducing C or
+      // (Reducing H and C(input and output) == 1) or (Reducing W and C(input and output) == 1)
+      assert((input_shape.dim(0) == output_shape.dim(0) &&
+              input_shape.dim(1) == output_shape.dim(1) &&
+              input_shape.dim(2) == output_shape.dim(2)) ||
+             (input_shape.dim(0) == output_shape.dim(0) &&
+              (input_shape.dim(1) == output_shape.dim(1) ||
+               input_shape.dim(2) == output_shape.dim(1)) &&
+              input_shape.dim(3) == 1 && output_shape.dim(2) == 1));
+    }
+  }
+}
+
+void OperationValidator::visit(const model::operation::TransposeNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::TransposeNode::Input::INPUT)};
+  const auto perm_idx{node.param().perm};
+
+  const auto &output_shape = _ctx.at(output_index).shape();
+  const auto &input_shape = _ctx.at(input_index).shape();
+  const auto &perm_shape = _ctx.at(perm_idx).shape();
+
+  UNUSED_RELEASE(output_shape);
+  UNUSED_RELEASE(input_shape);
+  UNUSED_RELEASE(perm_shape);
+
+  assert(perm_shape.rank() == 1);
+  assert(input_shape.rank() == perm_shape.dim(0));
+  assert(input_shape.rank() == output_shape.rank());
+}
+
+void OperationValidator::visit(const model::operation::ReduceMaxNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::ReduceMaxNode::Input::INPUT)};
+  const auto axis_index{node.param().axis_index};
+
+  auto output_shape = _ctx.at(output_index).shape();
+  auto input_shape = _ctx.at(input_index).shape();
+  auto axis_shape = _ctx.at(axis_index).shape();
+
+  UNUSED_RELEASE(output_shape);
+  UNUSED_RELEASE(input_shape);
+  UNUSED_RELEASE(axis_shape);
+
+  assert(input_shape.rank() <= 4);
+  assert(output_shape.rank() <= input_shape.rank());
+  assert(_ctx.at(axis_index).isConstant());
+  assert(axis_shape.rank() == 0 || axis_shape.rank() == 1);
+
+  // NOTE For the 4-dimensions, if the rank of input and output are different, this runtime only
+  // supports cases reducing height and width or reducing depth.
+  // TODO We have to support all cases of dimensions up to 4.
+  // For correct permuting, we have to set output's shape to be equal in dimension position of the
+  // input. But the positions of the same dimensions in the input and output may be set differently.
+  // For example {2,3,4,5}(input's shape) can be reduced to {3,5}(output's shape). The original
+  // output shape should be {1,3,1,5}, but real output shape may be {3,5}. If you simply try to
+  // extend it in 4 dimensions, it should be {1,1,3,5}.
+  // Even if output shape is changed to {1,3,1,5}, there is another problem. It is that shape of
+  // output tensor used at next operation is changed to {1,3,1,5} after this operation even if the
+  // next operation is not desired.
+  if (input_shape.rank() == 4 && input_shape.rank() != output_shape.rank())
+  {
+    if (output_shape.rank() == 2)
+    {
+      // Reducing HW
+      assert(input_shape.dim(0) == output_shape.dim(0) &&
+             input_shape.dim(3) == output_shape.dim(1));
+    }
+    else if (output_shape.rank() == 3)
+    {
+      // Reducing C or
+      // (Reducing H and C(ifm and ofm) == 1) or (Reducing W and C(ifm and ofm) == 1)
+      assert((input_shape.dim(0) == output_shape.dim(0) &&
+              input_shape.dim(1) == output_shape.dim(1) &&
+              input_shape.dim(2) == output_shape.dim(2)) ||
+             (input_shape.dim(0) == output_shape.dim(0) &&
+              (input_shape.dim(1) == output_shape.dim(1) ||
+               input_shape.dim(2) == output_shape.dim(1)) &&
+              input_shape.dim(3) == 1 && output_shape.dim(2) == 1));
+    }
+  }
+}
+
+void OperationValidator::visit(const model::operation::RNNNode &node)
+{
+  // NOTE This validation is for static rnn(non-dynamic shape), but not for dynamic rnn
+  // TODO Support dynamic rnn
+  const auto output_index{node.getOutputs().at(model::operation::RNNNode::Output::OUTPUT)};
+  const auto hidden_state_out_index{
+      node.getOutputs().at(model::operation::RNNNode::Output::HIDDEN_STATE_OUT)};
+
+  const auto input_index{node.getInputs().at(model::operation::RNNNode::Input::INPUT)};
+  const auto weights_index{node.getInputs().at(model::operation::RNNNode::Input::WEIGHTS)};
+  const auto recurrent_weights_index{
+      node.getInputs().at(model::operation::RNNNode::Input::RECURRENT_WEIGHTS)};
+  const auto bias_index{node.getInputs().at(model::operation::RNNNode::Input::BIAS)};
+  const auto hidden_state_in_index{
+      node.getInputs().at(model::operation::RNNNode::Input::HIDDEN_STATE_IN)};
+
+  const auto batch_size = _ctx.at(output_index).shape().dim(0);
+  const auto num_units = _ctx.at(output_index).shape().dim(1);
+
+  UNUSED_RELEASE(output_index);
+  UNUSED_RELEASE(hidden_state_out_index);
+  UNUSED_RELEASE(input_index);
+  UNUSED_RELEASE(weights_index);
+  UNUSED_RELEASE(recurrent_weights_index);
+  UNUSED_RELEASE(bias_index);
+  UNUSED_RELEASE(hidden_state_in_index);
+  UNUSED_RELEASE(batch_size);
+  UNUSED_RELEASE(num_units);
+
+  assert(_ctx.at(output_index).shape().rank() == 2 &&
+         _ctx.at(hidden_state_out_index).shape().rank() == 2 &&
+         _ctx.at(input_index).shape().rank() == 2 && _ctx.at(weights_index).shape().rank() == 2 &&
+         _ctx.at(recurrent_weights_index).shape().rank() == 2 &&
+         _ctx.at(hidden_state_in_index).shape().rank() == 2);
+  assert(_ctx.at(bias_index).shape().rank() == 1);
+
+  assert(batch_size == _ctx.at(input_index).shape().dim(0) &&
+         batch_size == _ctx.at(hidden_state_in_index).shape().dim(0) &&
+         batch_size == _ctx.at(hidden_state_out_index).shape().dim(0));
+  assert(_ctx.at(input_index).shape().dim(1) == _ctx.at(weights_index).shape().dim(1));
+
+  assert(num_units == _ctx.at(weights_index).shape().dim(0) &&
+         num_units == _ctx.at(recurrent_weights_index).shape().dim(0) &&
+         num_units == _ctx.at(bias_index).shape().dim(0));
+  assert(num_units == _ctx.at(output_index).shape().dim(1) &&
+         num_units == _ctx.at(recurrent_weights_index).shape().dim(1) &&
+         num_units == _ctx.at(hidden_state_in_index).shape().dim(1) &&
+         num_units == _ctx.at(hidden_state_out_index).shape().dim(1));
+}
+
+void OperationValidator::visit(const model::operation::SpaceToDepthNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::SpaceToDepthNode::Input::INPUT)};
+  const auto block_size_index{node.param().block_size_index};
+
+  const auto frontend_layout = _current_subg_layout;
+  const auto input_shape = _ctx.at(ifm_index).shape().asFeature(frontend_layout);
+  const auto output_shape = _ctx.at(ofm_index).shape().asFeature(frontend_layout);
+  const auto block_size = _ctx.at(block_size_index).asScalar<int32_t>();
+
+  UNUSED_RELEASE(input_shape);
+  UNUSED_RELEASE(output_shape);
+  UNUSED_RELEASE(block_size);
+
+  // All assertions as per NNAPI specification.
+  assert(_ctx.at(ifm_index).shape().rank() == 4);
+  assert(_ctx.at(ofm_index).shape().rank() == 4);
+  assert((block_size >= 1) && (input_shape.H % block_size == 0) &&
+         (input_shape.W % block_size == 0));
+  assert(input_shape.N == output_shape.N);
+  assert(input_shape.C * block_size * block_size == output_shape.C);
+}
+
+void OperationValidator::visit(const model::operation::EmbeddingLookupNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto lookups_index{
+      node.getInputs().at(model::operation::EmbeddingLookupNode::Input::LOOKUPS)};
+  const auto values_index{
+      node.getInputs().at(model::operation::EmbeddingLookupNode::Input::VALUES)};
+
+  const auto &output_obj = _ctx.at(output_index);
+  const auto &lookups_obj = _ctx.at(lookups_index);
+  const auto &values_obj = _ctx.at(values_index);
+
+  UNUSED_RELEASE(output_obj);
+  UNUSED_RELEASE(lookups_obj);
+  UNUSED_RELEASE(values_obj);
+
+  // Verify operand here, not at SimpleEmbeddingLookup::configure() to avoid acl's modifying
+  // TensorShape sometimes(Issue: https://github.sec.samsung.net/STAR/nnfw/issues/729)
+  {
+    assert(lookups_obj.typeInfo().type() == neurun::model::DataType::INT32);
+
+    const auto &output_shape = output_obj.shape();
+    const auto &lookups_shape = lookups_obj.shape();
+    const auto &values_shape = values_obj.shape();
+
+    UNUSED_RELEASE(output_shape);
+    UNUSED_RELEASE(lookups_shape);
+    UNUSED_RELEASE(values_shape);
+
+    assert(lookups_shape.rank() == 1);
+    assert(values_shape.rank() >= 2);
+
+    // output should be a n-D tensor with the same rank and shape as the values tensor, except for
+    // the first dimension which has the same size as lookups' only dimension.
+    assert(output_shape.rank() == values_shape.rank());
+    assert(output_shape.dim(0) == lookups_shape.dim(0));
+    for (int n = 1; n < output_shape.rank(); ++n)
+    {
+      assert(output_shape.dim(n) == values_shape.dim(n));
+    }
+  }
+}
+
+void OperationValidator::visit(const model::operation::ExpNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::ExpNode::Input::INPUT)};
+
+  UNUSED_RELEASE(output_index);
+  UNUSED_RELEASE(input_index);
+
+  assert(_ctx.at(output_index).shape() == _ctx.at(input_index).shape());
+  assert(_ctx.at(output_index).typeInfo().type() == _ctx.at(input_index).typeInfo().type());
+}
+
+void OperationValidator::visit(const model::operation::FloorNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::FloorNode::Input::INPUT)};
+
+  UNUSED_RELEASE(output_index);
+  UNUSED_RELEASE(input_index);
+
+  assert(_ctx.at(output_index).shape() == _ctx.at(input_index).shape());
+  assert(_ctx.at(output_index).typeInfo().type() == _ctx.at(input_index).typeInfo().type());
+}
+
+void OperationValidator::visit(const model::operation::HashtableLookupNode &node)
+{
+  const auto output_index{
+      node.getOutputs().at(model::operation::HashtableLookupNode::Output::OUTPUT)};
+  const auto hits_index{node.getOutputs().at(model::operation::HashtableLookupNode::Output::HITS)};
+
+  const auto lookups_index{
+      node.getInputs().at(model::operation::HashtableLookupNode::Input::LOOKUPS)};
+  const auto keys_index{node.getInputs().at(model::operation::HashtableLookupNode::Input::KEYS)};
+  const auto values_index{
+      node.getInputs().at(model::operation::HashtableLookupNode::Input::VALUES)};
+
+  const auto &output_obj = _ctx.at(output_index);
+  const auto &hits_obj = _ctx.at(hits_index);
+
+  const auto &lookups_obj = _ctx.at(lookups_index);
+  const auto &keys_obj = _ctx.at(keys_index);
+  const auto &values_obj = _ctx.at(values_index);
+
+  assert(lookups_obj.typeInfo().type() == neurun::model::DataType::INT32);
+  assert(keys_obj.typeInfo().type() == neurun::model::DataType::INT32);
+  assert(hits_obj.typeInfo().type() == neurun::model::DataType::QUANT8_ASYMM);
+
+  const auto &output_shape = output_obj.shape();
+  const auto &hits_shape = hits_obj.shape();
+
+  const auto &lookups_shape = lookups_obj.shape();
+  const auto &keys_shape = keys_obj.shape();
+  const auto &values_shape = values_obj.shape();
+
+  UNUSED_RELEASE(output_shape);
+  UNUSED_RELEASE(hits_shape);
+  UNUSED_RELEASE(lookups_shape);
+  UNUSED_RELEASE(keys_shape);
+  UNUSED_RELEASE(values_shape);
+
+  assert(values_shape.rank() == output_shape.rank());
+  assert(lookups_shape.rank() == 1);
+  assert(keys_shape.rank() == 1);
+  assert(values_shape.dim(0) == keys_shape.dim(0));
+  assert(lookups_shape.dim(0) == output_shape.dim(0));
+}
+
+void OperationValidator::visit(const model::operation::TransposeConvNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto out_shape_index{
+      node.getInputs().at(model::operation::TransposeConvNode::Input::OUTPUT_SHAPE)};
+  const auto ifm_index{node.getInputs().at(model::operation::TransposeConvNode::Input::INPUT)};
+  const auto ker_index{node.getInputs().at(model::operation::TransposeConvNode::Input::KERNEL)};
+
+  // Only 4D tensors are supported
+  assert(_ctx.at(ofm_index).shape().rank() == 4);
+  assert(_ctx.at(ofm_index).shape().rank() == _ctx.at(ifm_index).shape().rank());
+  assert(_ctx.at(ofm_index).shape().rank() == _ctx.at(ker_index).shape().rank());
+
+  const auto frontend_layout = _current_subg_layout;
+  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature(frontend_layout);
+  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature(frontend_layout);
+  // The kernel has only IHWO layout on frontend
+  // So ker_shape is treated here below
+  // I -> N
+  // H -> H
+  // W -> W
+  // O -> C
+  const auto ker_shape = _ctx.at(ker_index).shape().asFeature(model::Layout::NHWC);
+
+  UNUSED_RELEASE(ofm_shape);
+  UNUSED_RELEASE(ifm_shape);
+  UNUSED_RELEASE(ker_shape);
+
+  assert((node.param().padding.type == model::PaddingType::SAME) ||
+         (node.param().padding.type == model::PaddingType::VALID));
+  assert(ifm_shape.N == ofm_shape.N);
+  assert(ifm_shape.C == ker_shape.C);
+  assert(ker_shape.N == ofm_shape.C);
+}
+
+void OperationValidator::visit(const model::operation::GatherNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+
+  const auto ifm_index{node.getInputs().at(model::operation::GatherNode::Input::INPUT)};
+  const auto indices_index{node.getInputs().at(model::operation::GatherNode::Input::INDICES)};
+
+  const auto axis_index{node.param().axis_index};
+
+  const auto ifm_shape = _ctx.at(ifm_index).shape();
+  const auto indices_shape = _ctx.at(indices_index).shape();
+  const auto axis_shape = _ctx.at(axis_index).shape();
+  const auto ofm_shape = _ctx.at(ofm_index).shape();
+
+  UNUSED_RELEASE(ifm_shape);
+  UNUSED_RELEASE(indices_shape);
+  UNUSED_RELEASE(axis_shape);
+  UNUSED_RELEASE(ofm_shape);
+
+  assert(ifm_shape.rank() <= 4);
+  assert(indices_shape.rank() <= 3);
+  assert(ofm_shape.rank() <= 4);
+  assert(_ctx.at(axis_index).isConstant());
+  assert(axis_shape.rank() == 0);
+}
+
+void OperationValidator::visit(const model::operation::DequantizeNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::DequantizeNode::Input::INPUT)};
+
+  UNUSED_RELEASE(output_index);
+  UNUSED_RELEASE(input_index);
+
+  assert(_ctx.at(input_index).shape().rank() <= 4);
+  assert(_ctx.at(input_index).shape() == _ctx.at(output_index).shape());
+  assert(_ctx.at(input_index).typeInfo().type() == neurun::model::DataType::QUANT8_ASYMM);
+  assert(_ctx.at(output_index).typeInfo().type() == neurun::model::DataType::FLOAT32);
+}
+
+void OperationValidator::visit(const model::operation::MeanNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::MeanNode::Input::INPUT)};
+
+  const auto ifm_shape = _ctx.at(ifm_index).shape();
+  const auto ofm_shape = _ctx.at(ofm_index).shape();
+
+  // NOTE For the 4-dimensions, if the rank of input and output are different, this runtime only
+  // supports cases reducing height and width or reducing depth.
+  // TODO We have to support all cases of dimensions up to 4.
+  // For correct permuting, we have to set output's shape to be equal in dimension position of the
+  // input. But the positions of the same dimensions in the input and output may be set differently.
+  // For example {2,3,4,5}(input's shape) can be reduced to {3,5}(output's shape). The original
+  // output shape should be {1,3,1,5}, but real output shape may be {3,5}. If you simply try to
+  // extend it in 4 dimensions, it should be {1,1,3,5}.
+  // Even if output shape is changed to {1,3,1,5}, there is another problem. It is that shape of
+  // output tensor used at next operation is changed to {1,3,1,5} after this operation even if the
+  // next operation is not desired.
+  if (ifm_shape.rank() == 4 && ifm_shape.rank() != ofm_shape.rank())
+  {
+    if (ofm_shape.rank() == 2)
+    {
+      // Reducing HW
+      assert(ifm_shape.dim(0) == ofm_shape.dim(0) && ifm_shape.dim(3) == ofm_shape.dim(1));
+    }
+    else if (ofm_shape.rank() == 3)
+    {
+      // Reducing C or
+      // (Reducing H and C(ifm and ofm) == 1) or (Reducing W and C(ifm and ofm) == 1)
+      assert((ifm_shape.dim(0) == ofm_shape.dim(0) && ifm_shape.dim(1) == ofm_shape.dim(1) &&
+              ifm_shape.dim(2) == ofm_shape.dim(2)) ||
+             (ifm_shape.dim(0) == ofm_shape.dim(0) &&
+              (ifm_shape.dim(1) == ofm_shape.dim(1) || ifm_shape.dim(2) == ofm_shape.dim(1)) &&
+              ifm_shape.dim(3) == 1 && ofm_shape.dim(2) == 1));
+    }
+  }
+}
+
+void OperationValidator::visit(const model::operation::DepthToSpaceNode &node)
+{
+  const auto output_index{node.getOutputs().at(0)};
+  const auto input_index{node.getInputs().at(model::operation::DepthToSpaceNode::Input::INPUT)};
+  const auto block_size_index{node.param().block_size_index};
+
+  const auto frontend_layout = _current_subg_layout;
+  const auto output_shape = _ctx.at(output_index).shape().asFeature(frontend_layout);
+  const auto input_shape = _ctx.at(input_index).shape().asFeature(frontend_layout);
+
+  UNUSED_RELEASE(output_shape);
+  UNUSED_RELEASE(input_shape);
+
+  assert(_ctx.at(input_index).shape().rank() == 4);
+  assert(_ctx.at(output_index).shape().rank() == 4);
+
+  int32_t block_size = _ctx.at(block_size_index).asScalar<int32_t>();
+
+  UNUSED_RELEASE(block_size);
+
+  assert(block_size > 0);
+
+  { // assertions block
+    assert(output_shape.N == input_shape.N);
+    assert(output_shape.H == input_shape.H * block_size);
+    assert(output_shape.W == input_shape.W * block_size);
+    assert(input_shape.C % (block_size * block_size) == 0);
+    assert(output_shape.C == input_shape.C / (block_size * block_size));
+  }
+}
+
+void OperationValidator::visit(const model::operation::ReduceMinNode &node)
+{
+  const auto ofm_index{node.getOutputs().at(0)};
+  const auto ifm_index{node.getInputs().at(model::operation::ReduceMinNode::Input::INPUT)};
+  const auto axis_index{node.param().axis_index};
+
+  auto ifm_shape = _ctx.at(ifm_index).shape();
+  auto ofm_shape = _ctx.at(ofm_index).shape();
+  auto axis_shape = _ctx.at(axis_index).shape();
+
+  UNUSED_RELEASE(ifm_shape);
+  UNUSED_RELEASE(ofm_shape);
+  UNUSED_RELEASE(axis_shape);
+
+  assert(ifm_shape.rank() <= 4);
+  assert(ofm_shape.rank() <= ifm_shape.rank());
+  assert(_ctx.at(axis_index).isConstant());
+  assert(axis_shape.rank() == 0 || axis_shape.rank() == 1);
+
+  // NOTE For the 4-dimensions, if the rank of input and output are different, this runtime only
+  // supports cases reducing height and width or reducing depth.
+  // TODO We have to support all cases of dimensions up to 4.
+  // For correct permuting, we have to set output's shape to be equal in dimension position of the
+  // input. But the positions of the same dimensions in the input and output may be set differently.
+  // For example {2,3,4,5}(input's shape) can be reduced to {3,5}(output's shape). The original
+  // output shape should be {1,3,1,5}, but real output shape may be {3,5}. If you simply try to
+  // extend it in 4 dimensions, it should be {1,1,3,5}.
+  // Even if output shape is changed to {1,3,1,5}, there is another problem. It is that shape of
+  // output tensor used at next operation is changed to {1,3,1,5} after this operation even if the
+  // next operation is not desired.
+  if (ifm_shape.rank() == 4 && ifm_shape.rank() != ofm_shape.rank())
+  {
+    if (ofm_shape.rank() == 2)
+    {
+      // Reducing HW
+      assert(ifm_shape.dim(0) == ofm_shape.dim(0) && ifm_shape.dim(3) == ofm_shape.dim(1));
+    }
+    else if (ofm_shape.rank() == 3)
+    {
+      // Reducing C or
+      // (Reducing H and C(ifm and ofm) == 1) or (Reducing W and C(ifm and ofm) == 1)
+      assert((ifm_shape.dim(0) == ofm_shape.dim(0) && ifm_shape.dim(1) == ofm_shape.dim(1) &&
+              ifm_shape.dim(2) == ofm_shape.dim(2)) ||
+             (ifm_shape.dim(0) == ofm_shape.dim(0) &&
+              (ifm_shape.dim(1) == ofm_shape.dim(1) || ifm_shape.dim(2) == ofm_shape.dim(1)) &&
+              ifm_shape.dim(3) == 1 && ofm_shape.dim(2) == 1));
+    }
+  }
+}
+
+void OperationValidator::visit(const model::operation::LSTMNode &node)
+{
+  // NOTE This validation is for static rnn(non-dynamic shape), but not for dynamic rnn
+  // TODO Support dynamic rnn
+  const auto scratch_buffer_index{
+      node.getOutputs().at(model::operation::LSTMNode::Output::SCRATCH_BUFFER)};
+  const auto output_state_out_index{
+      node.getOutputs().at(model::operation::LSTMNode::Output::OUTPUT_STATE_OUT)};
+  const auto cell_state_out_index{
+      node.getOutputs().at(model::operation::LSTMNode::Output::CELL_STATE_OUT)};
+  const auto output_index{node.getOutputs().at(model::operation::LSTMNode::Output::OUTPUT)};
+
+  const auto input_index{node.getInputs().at(model::operation::LSTMNode::Input::INPUT)};
+  const auto input_to_input_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::INPUT_TO_INPUT_WEIGHTS)};
+  const auto input_to_forget_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::INPUT_TO_FORGET_WEIGHTS)};
+  const auto input_to_cell_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::INPUT_TO_CELL_WEIGHTS)};
+  const auto input_to_output_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::INPUT_TO_OUTPUT_WEIGHTS)};
+  const auto recurrent_to_input_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::RECURRENT_TO_INPUT_WEIGHTS)};
+  const auto recurrent_to_forget_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::RECURRENT_TO_FORGET_WEIGHTS)};
+  const auto recurrent_to_cell_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::RECURRENT_TO_CELL_WEIGHTS)};
+  const auto recurrent_to_output_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::RECURRENT_TO_OUTPUT_WEIGHTS)};
+  const auto cell_to_input_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::CELL_TO_INPUT_WEIGHTS)};
+  const auto cell_to_forget_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::CELL_TO_FORGET_WEIGHTS)};
+  const auto cell_to_output_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::CELL_TO_OUTPUT_WEIGHTS)};
+  const auto input_gate_bias_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::INPUT_GATE_BIAS)};
+  const auto forget_gate_bias_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::FORGET_GATE_BIAS)};
+  const auto cell_bias_index{node.getInputs().at(model::operation::LSTMNode::Input::CELL_BIAS)};
+  const auto output_gate_bias_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::OUTPUT_GATE_BIAS)};
+  const auto projection_weights_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::PROJECTION_WEIGHTS)};
+  const auto projection_bias_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::PROJECTION_BIAS)};
+  const auto output_state_in_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::OUTPUT_STATE_IN)};
+  const auto cell_state_in_index{
+      node.getInputs().at(model::operation::LSTMNode::Input::CELL_STATE_IN)};
+
+  UNUSED_RELEASE(scratch_buffer_index);
+  UNUSED_RELEASE(output_state_out_index);
+  UNUSED_RELEASE(cell_state_out_index);
+  UNUSED_RELEASE(output_index);
+
+  UNUSED_RELEASE(input_index);
+  UNUSED_RELEASE(input_to_input_weights_index);
+  UNUSED_RELEASE(input_to_forget_weights_index);
+  UNUSED_RELEASE(input_to_cell_weights_index);
+  UNUSED_RELEASE(input_to_output_weights_index);
+  UNUSED_RELEASE(recurrent_to_input_weights_index);
+  UNUSED_RELEASE(recurrent_to_forget_weights_index);
+  UNUSED_RELEASE(recurrent_to_cell_weights_index);
+  UNUSED_RELEASE(recurrent_to_output_weights_index);
+  UNUSED_RELEASE(cell_to_input_weights_index);
+  UNUSED_RELEASE(cell_to_forget_weights_index);
+  UNUSED_RELEASE(cell_to_output_weights_index);
+  UNUSED_RELEASE(input_gate_bias_index);
+  UNUSED_RELEASE(forget_gate_bias_index);
+  UNUSED_RELEASE(cell_bias_index);
+  UNUSED_RELEASE(output_gate_bias_index);
+  UNUSED_RELEASE(projection_weights_index);
+  UNUSED_RELEASE(projection_bias_index);
+  UNUSED_RELEASE(output_state_in_index);
+  UNUSED_RELEASE(cell_state_in_index);
+
+  assert(_ctx.at(scratch_buffer_index).shape().rank() == 2 &&
+         _ctx.at(output_state_out_index).shape().rank() == 2 &&
+         _ctx.at(cell_state_out_index).shape().rank() == 2 &&
+         _ctx.at(output_index).shape().rank() == 2 && _ctx.at(input_index).shape().rank() == 2 &&
+         _ctx.at(input_to_input_weights_index).shape().rank() == 2 &&
+         _ctx.at(input_to_forget_weights_index).shape().rank() == 2 &&
+         _ctx.at(input_to_cell_weights_index).shape().rank() == 2 &&
+         _ctx.at(input_to_output_weights_index).shape().rank() == 2 &&
+         _ctx.at(recurrent_to_input_weights_index).shape().rank() == 2 &&
+         _ctx.at(recurrent_to_forget_weights_index).shape().rank() == 2 &&
+         _ctx.at(recurrent_to_cell_weights_index).shape().rank() == 2 &&
+         _ctx.at(recurrent_to_output_weights_index).shape().rank() == 2 &&
+         _ctx.at(projection_weights_index).shape().rank() == 2 &&
+         _ctx.at(output_state_in_index).shape().rank() == 2 &&
+         _ctx.at(cell_state_in_index).shape().rank() == 2);
+
+  assert(_ctx.at(cell_to_input_weights_index).shape().rank() == 1 &&
+         _ctx.at(cell_to_forget_weights_index).shape().rank() == 1 &&
+         _ctx.at(cell_to_output_weights_index).shape().rank() == 1 &&
+         _ctx.at(input_gate_bias_index).shape().rank() == 1 &&
+         _ctx.at(forget_gate_bias_index).shape().rank() == 1 &&
+         _ctx.at(cell_bias_index).shape().rank() == 1 &&
+         _ctx.at(output_gate_bias_index).shape().rank() == 1 &&
+         _ctx.at(projection_bias_index).shape().rank() == 1);
+
+  // CIFG assertion
+  assert((_ctx.at(input_to_input_weights_index).shape().dim(0) == 0 &&
+          _ctx.at(input_to_input_weights_index).shape().dim(1) == 0 &&
+          _ctx.at(recurrent_to_input_weights_index).shape().dim(0) == 0 &&
+          _ctx.at(recurrent_to_input_weights_index).shape().dim(1) == 0 &&
+          _ctx.at(input_gate_bias_index).shape().dim(0) == 0 &&
+          _ctx.at(cell_to_input_weights_index).shape().dim(0) == 0) ||
+         (_ctx.at(input_to_input_weights_index).shape().dim(0) != 0 &&
+          _ctx.at(input_to_input_weights_index).shape().dim(1) != 0 &&
+          _ctx.at(recurrent_to_input_weights_index).shape().dim(0) != 0 &&
+          _ctx.at(recurrent_to_input_weights_index).shape().dim(1) != 0 &&
+          _ctx.at(input_gate_bias_index).shape().dim(0) != 0));
+
+  // Peephole assertion
+  assert((_ctx.at(cell_to_forget_weights_index).shape().dim(0) == 0 &&
+          _ctx.at(cell_to_output_weights_index).shape().dim(0) == 0) ||
+         (_ctx.at(cell_to_forget_weights_index).shape().dim(0) != 0 &&
+          _ctx.at(cell_to_output_weights_index).shape().dim(0) != 0));
+
+  bool has_input_to_input_weights = _ctx.at(input_to_input_weights_index).shape().dim(0) != 0 &&
+                                    _ctx.at(input_to_input_weights_index).shape().dim(1) != 0;
+  bool has_recurrent_to_input_weights =
+      _ctx.at(recurrent_to_input_weights_index).shape().dim(0) != 0 &&
+      _ctx.at(recurrent_to_input_weights_index).shape().dim(1) != 0;
+  bool has_input_gate_bias = _ctx.at(input_gate_bias_index).shape().dim(0) != 0;
+  bool has_cell_to_input_weights = _ctx.at(cell_to_input_weights_index).shape().dim(0) != 0;
+  bool has_cell_to_forget_weights = _ctx.at(cell_to_forget_weights_index).shape().dim(0) != 0;
+  bool has_cell_to_output_weights = _ctx.at(cell_to_output_weights_index).shape().dim(0) != 0;
+  bool has_projection_weights = _ctx.at(projection_weights_index).shape().dim(0) != 0 &&
+                                _ctx.at(projection_weights_index).shape().dim(1) != 0;
+  bool has_projection_bias = _ctx.at(projection_bias_index).shape().dim(0);
+
+  // NOTE The cell_to_input_weights do not exist in non-peephole although regular LSTM(non-CIFG).
+  // true: no CIFG
+  // false: CIFG
+  bool has_cifg_param = has_input_to_input_weights && has_recurrent_to_input_weights;
+
+  // NOTE The cell_to_input_weights do not exist in regular CIFG although peephole.
+  // true: peephole
+  // false: no peephole
+  bool has_peephole_param = has_cell_to_forget_weights && has_cell_to_output_weights;
+
+  // NOTE The projection weights may have data but the projection bias may not.
+  bool has_projection_param = has_projection_weights;
+
+  UNUSED_RELEASE(has_input_to_input_weights);
+  UNUSED_RELEASE(has_recurrent_to_input_weights);
+  UNUSED_RELEASE(has_input_gate_bias);
+  UNUSED_RELEASE(has_cell_to_input_weights);
+  UNUSED_RELEASE(has_cell_to_forget_weights);
+  UNUSED_RELEASE(has_cell_to_output_weights);
+  UNUSED_RELEASE(has_projection_weights);
+  UNUSED_RELEASE(has_projection_bias);
+  UNUSED_RELEASE(has_cifg_param);
+  UNUSED_RELEASE(has_peephole_param);
+  UNUSED_RELEASE(has_projection_param);
+
+  const auto batch_size = _ctx.at(input_index).shape().dim(0);
+  UNUSED_RELEASE(batch_size);
+  assert(batch_size == _ctx.at(output_state_in_index).shape().dim(0) &&
+         batch_size == _ctx.at(cell_state_in_index).shape().dim(0) &&
+         batch_size == _ctx.at(scratch_buffer_index).shape().dim(0) &&
+         batch_size == _ctx.at(output_state_out_index).shape().dim(0) &&
+         batch_size == _ctx.at(cell_state_out_index).shape().dim(0) &&
+         batch_size == _ctx.at(output_index).shape().dim(0));
+
+  const auto input_size = _ctx.at(input_index).shape().dim(1);
+  UNUSED_RELEASE(input_size);
+  assert(input_size == _ctx.at(input_to_forget_weights_index).shape().dim(1) &&
+         input_size == _ctx.at(input_to_cell_weights_index).shape().dim(1) &&
+         input_size == _ctx.at(input_to_output_weights_index).shape().dim(1));
+
+  const auto num_units = _ctx.at(cell_state_out_index).shape().dim(1);
+  UNUSED_RELEASE(num_units);
+  assert(num_units == _ctx.at(input_to_forget_weights_index).shape().dim(0) &&
+         num_units == _ctx.at(input_to_cell_weights_index).shape().dim(0) &&
+         num_units == _ctx.at(input_to_output_weights_index).shape().dim(0) &&
+         num_units == _ctx.at(recurrent_to_forget_weights_index).shape().dim(0) &&
+         num_units == _ctx.at(recurrent_to_cell_weights_index).shape().dim(0) &&
+         num_units == _ctx.at(recurrent_to_output_weights_index).shape().dim(0) &&
+         num_units == _ctx.at(forget_gate_bias_index).shape().dim(0) &&
+         num_units == _ctx.at(cell_bias_index).shape().dim(0) &&
+         num_units == _ctx.at(output_gate_bias_index).shape().dim(0) &&
+         num_units == _ctx.at(cell_state_in_index).shape().dim(1) &&
+         (((num_units * 3) == _ctx.at(scratch_buffer_index).shape().dim(1)) ||
+          ((num_units * 4) == _ctx.at(scratch_buffer_index).shape().dim(1))));
+
+  const auto output_size = _ctx.at(output_index).shape().dim(1);
+  UNUSED_RELEASE(output_size);
+  assert(output_size == _ctx.at(recurrent_to_forget_weights_index).shape().dim(1) &&
+         output_size == _ctx.at(recurrent_to_cell_weights_index).shape().dim(1) &&
+         output_size == _ctx.at(recurrent_to_output_weights_index).shape().dim(1) &&
+         output_size == _ctx.at(output_state_in_index).shape().dim(1) &&
+         output_size == _ctx.at(output_state_out_index).shape().dim(1));
+
+  if (has_cifg_param)
+  {
+    assert(input_size == _ctx.at(input_to_input_weights_index).shape().dim(1));
+    assert(num_units == _ctx.at(input_to_input_weights_index).shape().dim(0) &&
+           num_units == _ctx.at(recurrent_to_input_weights_index).shape().dim(0) &&
+           (num_units == _ctx.at(cell_to_input_weights_index).shape().dim(0) ||
+            _ctx.at(cell_to_input_weights_index).shape().dim(0) == 0 /* non-peephole */) &&
+           num_units == _ctx.at(input_gate_bias_index).shape().dim(0));
+    assert(output_size == _ctx.at(recurrent_to_input_weights_index).shape().dim(1));
+    assert(has_input_to_input_weights && has_recurrent_to_input_weights && has_input_gate_bias);
+    if (has_cell_to_input_weights)
+    {
+      // NOTE The cell_to_input_weights exist only in case of non-CIFG and peephole.
+      assert(has_peephole_param);
+    }
+    assert(_ctx.at(scratch_buffer_index).shape().dim(1) == num_units * 4);
+  }
+  else
+  {
+    assert(_ctx.at(scratch_buffer_index).shape().dim(1) == num_units * 3);
+  }
+
+  if (has_peephole_param)
+  {
+    assert(num_units == _ctx.at(cell_to_forget_weights_index).shape().dim(0) &&
+           num_units == _ctx.at(cell_to_output_weights_index).shape().dim(0) &&
+           (num_units == _ctx.at(cell_to_input_weights_index).shape().dim(0) ||
+            _ctx.at(cell_to_input_weights_index).shape().dim(0) == 0 /* CIFG */));
+  }
+
+  if (has_projection_param)
+  {
+    assert(num_units == _ctx.at(projection_weights_index).shape().dim(1));
+    assert(output_size == _ctx.at(projection_weights_index).shape().dim(0));
+    if (has_projection_bias)
+    {
+      assert(output_size == _ctx.at(projection_bias_index).shape().dim(0));
+    }
+  }
+}
+
+void OperationValidator::visit(const model::operation::UnpackNode &node)
+{
+  const auto input_index{node.getInputs().at(model::operation::UnpackNode::Input::INPUT)};
+  const auto num{node.param().num};
+  const auto axis{node.param().axis};
+
+  const auto &input_shape = _ctx.at(input_index).shape();
+  const auto input_rank = static_cast<int32_t>(input_shape.rank());
+
+  UNUSED_RELEASE(num);
+  UNUSED_RELEASE(axis);
+  UNUSED_RELEASE(input_rank);
+
+  assert(num == static_cast<int32_t>(node.getOutputs().size()));
+  assert(axis >= -input_rank && axis < input_rank);
+}
+
+void OperationValidator::visit(const model::operation::PadNode &node)
+{
+  const auto input_index{node.getInputs().at(model::operation::PadNode::Input::INPUT)};
+  const auto pad_index{node.getInputs().at(model::operation::PadNode::Input::PAD)};
+  const auto output_index{node.getInputs().at(0)};
+
+  const auto &pad_shape = _ctx.at(pad_index).shape();
+  const auto input_rank = static_cast<int32_t>(_ctx.at(input_index).shape().rank());
+
+  UNUSED_RELEASE(pad_shape);
+  UNUSED_RELEASE(input_rank);
+  UNUSED_RELEASE(output_index);
+
+  assert(pad_shape.rank() == 2);
+  assert(pad_shape.dim(0) == input_rank);
+  assert(pad_shape.dim(1) == 2);
+  assert(_ctx.at(pad_index).typeInfo().type() == model::DataType::INT32);
+  assert(_ctx.at(input_index).shape().rank() == _ctx.at(output_index).shape().rank());
+}
+
+} // namespace compiler
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/compiler/OperationValidator.h b/runtimes/neurun/core/src/compiler/OperationValidator.h
new file mode 100644
index 000000000..76774daeb
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/OperationValidator.h
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_COMPILER_OPERATION_VALIDATOR_H__
+#define __NEURUN_COMPILER_OPERATION_VALIDATOR_H__
+
+#include "model/Layout.h"
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+class Operands;
+} // namespace graph
+} // namespace neurun
+
+namespace neurun
+{
+namespace compiler
+{
+
+class OperationValidator : public model::OperationVisitor
+{
+public:
+  OperationValidator(const neurun::model::Operands &ctx)
+      : _ctx{ctx}, _current_subg_layout{model::Layout::UNKNOWN}
+  {
+  }
+
+public:
+  void visit(const model::Subgraph &node) override;
+  void visit(const model::operation::CastNode &node) override;
+  void visit(const model::operation::ComparisonNode &node) override;
+  void visit(const model::operation::SoftmaxNode &node) override;
+  void visit(const model::operation::PermuteNode &node) override;
+  void visit(const model::operation::ReduceSumNode &node) override;
+  void visit(const model::operation::TransposeNode &node) override;
+  void visit(const model::operation::ReduceMaxNode &node) override;
+  void visit(const model::operation::RNNNode &node) override;
+  void visit(const model::operation::SpaceToDepthNode &node) override;
+  void visit(const model::operation::EmbeddingLookupNode &node) override;
+  void visit(const model::operation::ExpNode &node) override;
+  void visit(const model::operation::FloorNode &node) override;
+  void visit(const model::operation::HashtableLookupNode &node) override;
+  void visit(const model::operation::TransposeConvNode &node) override;
+  void visit(const model::operation::GatherNode &node) override;
+  void visit(const model::operation::DequantizeNode &node) override;
+  void visit(const model::operation::MeanNode &node) override;
+  void visit(const model::operation::DepthToSpaceNode &node) override;
+  void visit(const model::operation::ReduceMinNode &node) override;
+  void visit(const model::operation::LSTMNode &node) override;
+  void visit(const model::operation::UnpackNode &node) override;
+  void visit(const model::operation::PadNode &node) override;
+
+private:
+  const neurun::model::Operands &_ctx;
+  model::Layout _current_subg_layout;
+};
+
+} // namespace compiler
+} // namespace neurun
+
+#endif // __NEURUN_COMPILER_OPERATION_VALIDATOR_H__
diff --git a/runtimes/neurun/core/src/compiler/ParamChecker.cc b/runtimes/neurun/core/src/compiler/ParamChecker.cc
new file mode 100644
index 000000000..10bfa1ea3
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/ParamChecker.cc
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ParamChecker.h"
+
+#include "graph/Graph.h"
+
+namespace neurun
+{
+namespace compiler
+{
+
+void ParamChecker::operator()()
+{
+  _model->operations().iterate(
+      [&](const model::OperationIndex &, const model::Operation &node) { node.accept(*this); });
+}
+
+} // namespace compiler
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/compiler/ParamChecker.h b/runtimes/neurun/core/src/compiler/ParamChecker.h
new file mode 100644
index 000000000..82f46692d
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/ParamChecker.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file ParamChecker.h
+ * @brief This file contains ParamChecker to check\n
+ *        operations' parameters are compilable at machine independent phase\n
+ *        ex) Check param is constant
+ */
+#ifndef __NEURUN_COMPILER_PARAM_CHECKER_H__
+#define __NEURUN_COMPILER_PARAM_CHECKER_H__
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace graph
+{
+class Graph;
+} // namespace graph
+} // namespace neurun
+
+namespace neurun
+{
+namespace compiler
+{
+
+class ParamChecker : public model::OperationVisitor
+{
+public:
+  /**
+   * @brief Construct a new Param Checker object (deleted)
+   */
+  ParamChecker(void) = delete;
+  /**
+   * @brief Construct a new Param Checker object
+   * @param[in] model Graph model to check
+   */
+  ParamChecker(std::shared_ptr<graph::Graph> model) : _model{model} {}
+
+public:
+  /**
+   * @brief Run parameter analysis
+   */
+  void operator()();
+  /**
+   * @brief   Return analysis result if model have non-const parameter
+   * @return  @c true if there is non-const parameter, otherwise @c false
+   */
+  bool haveNoneConstParam(void) { return _nonConstParam; }
+
+private:
+  const std::shared_ptr<graph::Graph> _model;
+  bool _nonConstParam{false};
+};
+
+} // namespace compiler
+} // namespace neurun
+
+#endif // __NEURUN_COMPILER_OPERATION_VALIDATOR_H__
diff --git a/runtimes/neurun/core/src/compiler/SubTensorAnalyzer.cc b/runtimes/neurun/core/src/compiler/SubTensorAnalyzer.cc
new file mode 100644
index 000000000..c2c6da290
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/SubTensorAnalyzer.cc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "SubTensorAnalyzer.h"
+
+#include <typeinfo>
+
+#include "cpp14/memory.h"
+#include "model/OperandIndexSequence.h"
+#include "util/logging.h"
+#include "util/Coordinates.h"
+
+namespace neurun
+{
+namespace compiler
+{
+
+void SubTensorAnalyzer::visit(const model::operation::ConcatNode &node)
+{
+  //  If operator is concat (or other operators related with subsumption), fill subsumption info
+  //  TODO: if one tensor is subset of many parents or model input
+  //        Solution 1. Handle 1st parent only, ignore others (need to invert for other children)
+  //        Solution 2. Insert copy operation for other parents
+  int32_t axis_raw = node.param().axis;
+
+  auto &output_index = node.getOutputs().at(0);
+  auto &inputs = node.getInputs();
+
+  int32_t axis_point = 0;
+  const auto rank = _ctx.at(output_index).shape().rank();
+  int32_t axis = axis_raw < 0 ? (axis_raw + rank) : axis_raw;
+  assert(rank > axis);
+
+  // NOTE Not support multiple parent tensor yet
+  for (auto &input_index : inputs)
+  {
+    if (_ctx.at(input_index).parent_info() != nullptr)
+    {
+      return;
+    }
+  }
+
+  for (auto &input_index : inputs)
+  {
+    auto input_shape = _ctx.at(input_index).shape();
+    assert(rank == input_shape.rank());
+
+    neurun::util::Coordinates coordinate_info{};
+    for (int i = 0; i < rank; i++)
+    {
+      coordinate_info.set(i, 0);
+    }
+    coordinate_info.set(axis, axis_point);
+
+    std::unique_ptr<graph::operand::ParentInfo> parentInfo =
+        nnfw::cpp14::make_unique<graph::operand::ParentInfo>(output_index, coordinate_info);
+
+    _ctx.at(input_index).parent_info(std::move(parentInfo));
+
+    axis_point += input_shape.dim(axis);
+  }
+}
+
+} // namespace compiler
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/compiler/SubTensorAnalyzer.h b/runtimes/neurun/core/src/compiler/SubTensorAnalyzer.h
new file mode 100644
index 000000000..606d755b7
--- /dev/null
+++ b/runtimes/neurun/core/src/compiler/SubTensorAnalyzer.h
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file  SubTensorAnalyzer.h
+ * @brief This file contains SubTensorAnalyzer to analyze tensor subsumption
+ *        using operation visitor
+ */
+
+#ifndef __NEURUN_COMPILER_SUBTENSOR_ANALYZER_H__
+#define __NEURUN_COMPILER_SUBTENSOR_ANALYZER_H__
+
+#include "model/OperationVisitor.h"
+#include "graph/Graph.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operand
+{
+class Set;
+} // namespace operation
+} // namespace graph
+} // namespace neurun
+
+namespace neurun
+{
+namespace compiler
+{
+
+/**
+ * @brief Class to analyze tensor subsumption
+ */
+class SubTensorAnalyzer : public model::OperationVisitor
+{
+public:
+  /**
+   * @brief     Construct a new SubTensorAnalyzer object
+   * @param[in] ctx Graph operand set
+   */
+  SubTensorAnalyzer(neurun::model::Operands &ctx) : _ctx{ctx}
+  {
+    // DO NOTHING
+  }
+
+public:
+  void visit(const model::operation::ConcatNode &) override;
+
+private:
+  neurun::model::Operands &_ctx; // TODO Refactor : Do not update Operands
+};
+
+} // namespace compiler
+} // namespace neurun
+
+#endif // __NEURUN_COMPILER_SUBTENSOR_ANALYZER_H__
diff --git a/runtimes/neurun/core/src/dumper/dot/DotBuilder.cc b/runtimes/neurun/core/src/dumper/dot/DotBuilder.cc
new file mode 100644
index 000000000..8563b4cf0
--- /dev/null
+++ b/runtimes/neurun/core/src/dumper/dot/DotBuilder.cc
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "DotBuilder.h"
+
+namespace neurun
+{
+namespace dumper
+{
+namespace dot
+{
+
+// DotDumper
+DotBuilder::DotBuilder() {}
+
+void DotBuilder::update(const Node &node_info)
+{
+  addNode(node_info);
+  for (auto edge : node_info.edges())
+  {
+    addEdge(node_info, *edge);
+  }
+}
+
+void DotBuilder::addSubgraph(const DotSubgraphInfo &subgraph_info)
+{
+  _dot << "subgraph cluster_" << subgraph_info.index().value() << " {\n";
+  _dot << "  label=\"" << subgraph_info.label() << "\";\n";
+  _dot << "  style=filled;\n";
+  _dot << "  color=lightgrey;\n";
+  _dot << "  ";
+  for (auto op : subgraph_info.operations())
+  {
+    _dot << "operation" << op.value() << "; ";
+  }
+  for (auto op : subgraph_info.operands())
+  {
+    _dot << "operand" << op.value() << "; ";
+  }
+  _dot << "\n";
+  _dot << "}\n";
+}
+
+void DotBuilder::writeDot(std::ostream &os)
+{
+  os << "digraph D {\n"
+     << _dot.str() << "\n"
+     << "}\n";
+}
+
+void DotBuilder::addNode(const Node &node)
+{
+  _dot << node.id();
+  std::stringstream ss;
+  _dot << "[";
+  for (auto attr : node.attributes())
+  {
+    _dot << attr.first << "=\"" << attr.second << "\" ";
+  }
+  _dot << "];\n";
+}
+
+void DotBuilder::addEdge(const Node &node1, const Node &node2)
+{
+  _dot << node1.id() << " -> " << node2.id() << ";\n";
+}
+
+} // namespace dot
+} // namespace dumper
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/dumper/dot/DotBuilder.h b/runtimes/neurun/core/src/dumper/dot/DotBuilder.h
new file mode 100644
index 000000000..b78fd4469
--- /dev/null
+++ b/runtimes/neurun/core/src/dumper/dot/DotBuilder.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_DUMPER_DOT_DOT_BUILDER_H__
+#define __NEURUN_DUMPER_DOT_DOT_BUILDER_H__
+
+#include <sstream>
+
+#include "model/Index.h"
+#include "model/Operation.h"
+#include "model/Operand.h"
+
+#include "OperationNode.h"
+#include "OperandNode.h"
+#include "DotSubgraphInfo.h"
+
+using Operation = neurun::model::Operation;
+using Object = neurun::model::Operand;
+
+namespace neurun
+{
+namespace dumper
+{
+namespace dot
+{
+
+class DotBuilder
+{
+public:
+  DotBuilder();
+
+public:
+  void update(const Node &dotinfo);
+  void addSubgraph(const DotSubgraphInfo &subgraph_info);
+
+  void writeDot(std::ostream &os);
+
+private:
+  void addNode(const Node &dotinfo);
+  void addEdge(const Node &dotinfo1, const Node &dotinfo2);
+
+  std::stringstream _dot;
+};
+
+} // namespace dot
+} // namespace dumper
+} // namespace neurun
+
+#endif // __NEURUN_DUMPER_DOT_DOT_BUILDER_H__
diff --git a/runtimes/neurun/core/src/dumper/dot/DotDumper.cc b/runtimes/neurun/core/src/dumper/dot/DotDumper.cc
new file mode 100644
index 000000000..d01b472c3
--- /dev/null
+++ b/runtimes/neurun/core/src/dumper/dot/DotDumper.cc
@@ -0,0 +1,198 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <fstream>
+#include <unordered_map>
+
+#include "DotDumper.h"
+#include "DotBuilder.h"
+#include "DotSubgraphInfo.h"
+#include "model/Subgraph.h"
+#include "model/OperationIndexMap.h"
+#include "backend/Backend.h"
+#include "backend/BackendManager.h"
+#include "backend/IConfig.h"
+
+namespace neurun
+{
+namespace dumper
+{
+namespace dot
+{
+
+using namespace neurun::graph;
+
+void DotDumper::dump(const std::string &tag)
+{
+  if (_level == Level::OFF)
+  {
+    return;
+  }
+
+  neurun::dumper::dot::DotBuilder dot_builder;
+
+  auto &operations = _graph.operations();
+  auto &operands = _graph.operands();
+
+  model::OperationIndexMap<std::unique_ptr<OperationNode>> operation_nodes;
+  std::unordered_map<model::OperandIndex, std::unique_ptr<OperandNode>> operand_nodes;
+
+  operations.iterate([&](const model::OperationIndex &index, const model::Operation &op) {
+    auto node = nnfw::cpp14::make_unique<OperationNode>(index, op);
+
+    for (auto output : op.getOutputs())
+    {
+      using neurun::dumper::dot::OperandNode;
+      auto child = std::make_shared<OperandNode>(output, OperandNode::Type::MODEL_OUTPUT);
+      node->addEdge(child);
+    }
+
+    operation_nodes.emplace(index, std::move(node));
+  });
+
+  auto backend_to_fillcolor = [](const backend::Backend *backend) {
+    static const auto map = []() {
+      std::unordered_map<const backend::Backend *, std::string> ret;
+      uint32_t index = 1; // Start from 1 to avoid 0(red) which is too dark :(
+      for (const auto backend : backend::BackendManager::instance().getAll())
+      {
+        ret.emplace(backend, Node::BG_COLORS[index]);
+        index = (index + 1) % (sizeof(Node::BG_COLORS) / sizeof(Node::BG_COLORS[0]));
+      }
+      return ret;
+    }();
+
+    auto itr = map.find(backend);
+    if (itr == map.end())
+    {
+      return Node::DEFAULT_FILLCOLOR;
+    }
+    else
+    {
+      return itr->second;
+    }
+  };
+
+  util::Set<model::OperandIndex> shown_operand_set;
+
+  operands.iterate([&](const model::OperandIndex &index, const model::Operand &object) {
+    bool showing_cond = false;
+    if (_level == Level::ALL)
+    {
+      showing_cond = true;
+    }
+    else
+    {
+      showing_cond = !object.isConstant();
+    }
+    if (object.isConstant() || _graph.getInputs().contains(index))
+    {
+      showing_cond = showing_cond && (object.getUses().size() > 0);
+    }
+    if (showing_cond)
+    {
+      shown_operand_set.add(index);
+
+      auto type = [&]() {
+        using neurun::dumper::dot::OperandNode;
+        if (_graph.getInputs().contains(index))
+          return OperandNode::Type::MODEL_INPUT;
+        if (_graph.getOutputs().contains(index))
+          return OperandNode::Type::MODEL_OUTPUT;
+        return OperandNode::Type::INTERNAL;
+      }();
+
+      auto lower_info = _graph.getLowerInfo(index);
+      auto node = nnfw::cpp14::make_unique<OperandNode>(index, type);
+
+      {
+        // Display LowerInfo attributes
+        std::string label = std::to_string(index.value());
+        std::string fillcolor = "";
+        if (lower_info)
+        {
+          const auto &def_factors = lower_info->def_factors();
+          label += "\\n[";
+          label += def_factors.getOnlyElement().backend()->config()->id();
+          label += "]";
+
+          fillcolor = backend_to_fillcolor(lower_info->def_factors().getOnlyElement().backend());
+        }
+        node->setAttribute("label", label);
+        node->setAttribute("fillcolor", fillcolor);
+      }
+
+      for (auto operation_index : object.getUses().list())
+      {
+        auto &operation = operations.at(operation_index);
+        auto child = std::make_shared<OperationNode>(operation_index, operation);
+        node->addEdge(child);
+      }
+
+      operand_nodes.emplace(index, std::move(node));
+    }
+  });
+
+  const auto subgraphs = _graph.subgraphs();
+  if (subgraphs)
+  {
+    subgraphs->iterate([&](const model::SubgraphIndex &index, const model::Subgraph &subgraph) {
+      const auto lower_info = _graph.getLowerInfo(index);
+      auto fillcolor = backend_to_fillcolor(lower_info->backend());
+      std::string label =
+          std::to_string(index.value()) + " [" + lower_info->backend()->config()->id() + "]";
+      DotSubgraphInfo subgraph_info{index, subgraph, shown_operand_set};
+      subgraph_info.label(label);
+      subgraph_info.fillcolor(fillcolor);
+      dot_builder.addSubgraph(subgraph_info);
+
+      // Set fillcolor of all operations in the subgraph
+      for (const auto &op : subgraph.operations())
+      {
+        auto found = operation_nodes.find(op.index);
+        if (found != operation_nodes.end())
+        {
+          auto &&op = found->second;
+          op->setAttribute("fillcolor", fillcolor);
+        }
+      }
+    });
+  }
+
+  for (const auto &e : operation_nodes)
+    dot_builder.update(*e.second);
+  for (const auto &e : operand_nodes)
+    dot_builder.update(*e.second);
+
+  // Dump to file
+  {
+    std::string file_name;
+    file_name += tag;
+    file_name += ".dot";
+    std::filebuf fb;
+
+    fb.open(file_name, std::ios::out);
+    std::ostream os(&fb);
+
+    dot_builder.writeDot(os);
+
+    fb.close();
+  }
+}
+
+} // namespace dot
+} // namespace dumper
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/dumper/dot/DotDumper.h b/runtimes/neurun/core/src/dumper/dot/DotDumper.h
new file mode 100644
index 000000000..4ccaac882
--- /dev/null
+++ b/runtimes/neurun/core/src/dumper/dot/DotDumper.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "graph/Graph.h"
+
+#ifndef __NEURUN_DUMPER_DOT_DOT_DUMPER_H__
+#define __NEURUN_DUMPER_DOT_DOT_DUMPER_H__
+
+namespace neurun
+{
+namespace dumper
+{
+namespace dot
+{
+
+class DotDumper
+{
+public:
+  enum Level
+  {
+    OFF = 0,               //< Do not dump
+    ALL_BUT_CONSTANTS = 1, //< Emit all operations and operands but constants
+    ALL = 2                //< Emit all operations and operands
+  };
+
+public:
+  DotDumper(const neurun::graph::Graph &graph, Level level) : _graph(graph), _level{level} {}
+
+public:
+  /**
+   * @brief Dump to dot file as tag name if "GRAPH_DOT_DUMP" is set
+   *
+   * @param[in] tag    The name of dot file that would be created
+   * @return N/A
+   */
+  void dump(const std::string &tag);
+
+private:
+  const neurun::graph::Graph &_graph;
+  Level _level;
+};
+
+} // namespace dot
+} // namespace dumper
+} // namespace neurun
+
+#endif // __NEURUN_DUMPER_DOT_DOT_DUMPER_H__
diff --git a/runtimes/neurun/core/src/dumper/dot/DotSubgraphInfo.cc b/runtimes/neurun/core/src/dumper/dot/DotSubgraphInfo.cc
new file mode 100644
index 000000000..1ea681bdb
--- /dev/null
+++ b/runtimes/neurun/core/src/dumper/dot/DotSubgraphInfo.cc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "DotSubgraphInfo.h"
+
+#include <sstream>
+
+namespace neurun
+{
+namespace dumper
+{
+namespace dot
+{
+
+DotSubgraphInfo::DotSubgraphInfo(const model::SubgraphIndex &index, const model::Subgraph &subgraph,
+                                 const util::Set<model::OperandIndex> &shown_operands)
+    : _index{index}
+{
+  for (const auto &element : subgraph.operations())
+  {
+    _operations.insert(element.index);
+    for (auto o : element.node->getInputs())
+    {
+      // Must be a shown operand, not subgraph's inputs
+      if (shown_operands.contains(o) && !subgraph.getInputs().contains(o))
+      {
+        _operands.insert(o);
+      }
+    }
+    for (auto o : element.node->getOutputs())
+    {
+      // Must be a shown operand, not subgraph's inputs
+      if (shown_operands.contains(o) && !subgraph.getOutputs().contains(o))
+      {
+        _operands.insert(o);
+      }
+    }
+  }
+}
+
+} // namespace dot
+} // namespace dumper
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/dumper/dot/DotSubgraphInfo.h b/runtimes/neurun/core/src/dumper/dot/DotSubgraphInfo.h
new file mode 100644
index 000000000..771c5552e
--- /dev/null
+++ b/runtimes/neurun/core/src/dumper/dot/DotSubgraphInfo.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_CORE_DUMPER_DOT_DOT_SUBGRAPH_INFO_H__
+#define __NEURUN_CORE_DUMPER_DOT_DOT_SUBGRAPH_INFO_H__
+
+#include <unordered_set>
+
+#include "model/Index.h"
+#include "model/Subgraph.h"
+#include "util/Set.h"
+
+namespace neurun
+{
+namespace dumper
+{
+namespace dot
+{
+
+class DotSubgraphInfo
+{
+public:
+  DotSubgraphInfo(const model::SubgraphIndex &index, const model::Subgraph &subgraph,
+                  const util::Set<model::OperandIndex> &shown_operands);
+
+  model::SubgraphIndex index() const { return _index; }
+  std::string label() const { return _label; }
+  void label(const std::string &val) { _label = val; }
+  std::string fillcolor() const { return _fillcolor; }
+  void fillcolor(const std::string &val) { _fillcolor = val; }
+  const std::unordered_set<model::OperationIndex> &operations() const { return _operations; }
+  const std::unordered_set<model::OperandIndex> &operands() const { return _operands; }
+
+private:
+  model::SubgraphIndex _index;
+  std::string _label;
+  std::string _fillcolor;
+  std::unordered_set<model::OperationIndex> _operations;
+  std::unordered_set<model::OperandIndex> _operands;
+};
+
+} // namespace dot
+} // namespace dumper
+} // namespace neurun
+
+#endif // __NEURUN_CORE_DUMPER_DOT_DOT_SUBGRAPH_INFO_H__
diff --git a/runtimes/neurun/core/src/dumper/dot/Node.cc b/runtimes/neurun/core/src/dumper/dot/Node.cc
new file mode 100644
index 000000000..166f0f40f
--- /dev/null
+++ b/runtimes/neurun/core/src/dumper/dot/Node.cc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "Node.h"
+
+namespace neurun
+{
+namespace dumper
+{
+namespace dot
+{
+
+const std::string Node::DEFAULT_COLORSCHEME = "x11";
+const std::string Node::DEFAULT_FILLCOLOR = "white";
+// RED, BLUE, GREEN, PURPLE, ORANGE, YELLOW, BROWN, PINK
+const std::string Node::BG_COLORS[8] = {"1", "2", "3", "4", "5", "6", "7", "8"};
+
+Node::Node(const std::string &id) : _id{id}
+{
+  // Set default values
+  _attributes["style"] = "filled";
+  _attributes["colorscheme"] = DEFAULT_COLORSCHEME;
+  _attributes["fillcolor"] = DEFAULT_FILLCOLOR;
+}
+
+void Node::setAttribute(const std::string &key, const std::string &val) { _attributes[key] = val; }
+
+std::string Node::getAttribute(const std::string &key)
+{
+  auto itr = _attributes.find(key);
+  if (itr == _attributes.end())
+  {
+    return "";
+  }
+  else
+  {
+    return itr->second;
+  }
+}
+
+} // namespace dot
+} // namespace dumper
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/dumper/dot/Node.h b/runtimes/neurun/core/src/dumper/dot/Node.h
new file mode 100644
index 000000000..364cb08a4
--- /dev/null
+++ b/runtimes/neurun/core/src/dumper/dot/Node.h
@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file Node.h
+ * @brief    This file contains Node class
+ * @ingroup  COM_AI_RUNTIME
+ *
+ */
+
+#ifndef __NEURUN_DUMPER_DOT_NODE_H__
+#define __NEURUN_DUMPER_DOT_NODE_H__
+
+#include <string>
+#include <memory>
+#include <vector>
+#include <unordered_map>
+
+namespace neurun
+{
+namespace dumper
+{
+namespace dot
+{
+
+enum BGCOLORS : int
+{
+  RED,
+  BLUE,
+  GREEN,
+  PUPLE,
+  ORANGE,
+  YELLOW,
+  BROWN,
+  PINK
+};
+
+/**
+ * @brief Class that represents a Node in "dot" format
+ *
+*/
+class Node
+{
+public:
+  const static std::string DEFAULT_FILLCOLOR;
+  const static std::string DEFAULT_COLORSCHEME;
+  const static std::string BG_COLORS[8];
+
+public:
+  /**
+   * @brief Destroy the Node object
+   *
+  */
+  virtual ~Node() = default;
+
+  /**
+   * @brief Construct a new Node object
+   *
+   * @param id
+  */
+  Node(const std::string &id);
+
+  /**
+   * @brief return id
+   *
+   * @return id
+  */
+  std::string id() const { return _id; }
+
+  /**
+   * @brief return attributes
+   *
+   * @return const reference of attributes object
+  */
+  const std::unordered_map<std::string, std::string> &attributes() const { return _attributes; }
+  /**
+   * @brief Store an attribute with key-value pair
+   *
+   * @param[in] key attribute's key
+   * @param[in] val attribute's value that is associated with the key
+  */
+  void setAttribute(const std::string &key, const std::string &val);
+  /**
+   * @brief Get the attributte value that is associated with key
+   *
+   * @param[in] key key of the attribute
+   * @return value that is associated with the key
+  */
+  std::string getAttribute(const std::string &key);
+
+  /**
+   * @brief Add an edge in the graph, which is an outgoing edge
+   *
+   * @param[in] dotinfo A node that the new edge will be connected to
+  */
+  void addEdge(std::shared_ptr<Node> dotinfo) { _children.emplace_back(dotinfo); }
+  /**
+   * @brief Return list of edges
+   *
+   * @return Edges
+  */
+  const std::vector<std::shared_ptr<Node>> &edges() const { return _children; }
+
+private:
+  std::string _id;
+  std::unordered_map<std::string, std::string> _attributes;
+  std::vector<std::shared_ptr<Node>> _children;
+};
+
+} // namespace dot
+} // namespace dumper
+} // namespace neurun
+
+#endif // __NEURUN_DUMPER_DOT_NODE_H__
diff --git a/runtimes/neurun/core/src/dumper/dot/OperandNode.cc b/runtimes/neurun/core/src/dumper/dot/OperandNode.cc
new file mode 100644
index 000000000..338dfc4b6
--- /dev/null
+++ b/runtimes/neurun/core/src/dumper/dot/OperandNode.cc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <sstream>
+
+#include "OperandNode.h"
+#include "graph/Graph.h"
+#include "graph/operand/LowerInfo.h"
+
+namespace neurun
+{
+namespace dumper
+{
+namespace dot
+{
+
+const std::string OperandNode::INPUT_SHAPE = "doublecircle";
+const std::string OperandNode::OUTPUT_SHAPE = "doublecircle";
+const std::string OperandNode::OPERAND_SHAPE = "ellipse";
+const std::string OperandNode::BG_COLOR_SCHEME = "set18";
+
+OperandNode::OperandNode(const neurun::model::OperandIndex &index, Type type)
+    : Node{"operand" + std::to_string(index.value())}
+{
+  {
+    auto type_to_shape = [](Type type) {
+      switch (type)
+      {
+        case Type::MODEL_INPUT:
+          return INPUT_SHAPE;
+        case Type::MODEL_OUTPUT:
+          return OUTPUT_SHAPE;
+        case Type::UNDEFINED:
+        case Type::INTERNAL:
+        default:
+          return OPERAND_SHAPE;
+      }
+    };
+    setAttribute("shape", type_to_shape(type));
+  }
+
+  setAttribute("colorscheme", BG_COLOR_SCHEME);
+}
+
+} // namespace dot
+} // namespace dumper
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/dumper/dot/OperandNode.h b/runtimes/neurun/core/src/dumper/dot/OperandNode.h
new file mode 100644
index 000000000..40f715eac
--- /dev/null
+++ b/runtimes/neurun/core/src/dumper/dot/OperandNode.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file OperandNode.h
+ * @brief    This file contains OperandNode
+ * @ingroup  COM_AI_RUNTIME
+ *
+ */
+
+#ifndef __NEURUN_DUMPER_DOT_DOT_OPERAND_INFO_H__
+#define __NEURUN_DUMPER_DOT_DOT_OPERAND_INFO_H__
+
+#include <vector>
+
+#include "Node.h"
+#include "model/Operand.h"
+#include "model/Index.h"
+
+namespace neurun
+{
+namespace dumper
+{
+namespace dot
+{
+
+/**
+ * @brief Class that represents an Operand
+ *
+ */
+class OperandNode : public Node
+{
+public:
+  enum class Type
+  {
+    UNDEFINED,
+    MODEL_INPUT,
+    MODEL_OUTPUT,
+    INTERNAL
+  };
+
+public:
+  static const std::string INPUT_SHAPE;
+  static const std::string OUTPUT_SHAPE;
+  static const std::string OPERAND_SHAPE;
+  static const std::string BG_COLOR_SCHEME;
+
+public:
+  /**
+   * @brief Construct a new Operand Node object
+   *
+   * @param[in] index Operand index
+   * @param[in] type Operand type
+   * @param[in] lower_info Operand LowerInfo
+   */
+  OperandNode(const neurun::model::OperandIndex &index, Type type);
+
+private:
+  void addBackendLabel();
+};
+
+} // namespace dot
+} // namespace dumper
+} // namespace neurun
+
+#endif // __NEURUN_DUMPER_DOT_DOT_OPERAND_INFO_H__
diff --git a/runtimes/neurun/core/src/dumper/dot/OperationNode.cc b/runtimes/neurun/core/src/dumper/dot/OperationNode.cc
new file mode 100644
index 000000000..040241daa
--- /dev/null
+++ b/runtimes/neurun/core/src/dumper/dot/OperationNode.cc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <sstream>
+
+#include "OperationNode.h"
+#include "graph/Graph.h"
+#include "graph/operation/LowerInfo.h"
+#include "backend/IConfig.h"
+#include "backend/Backend.h"
+
+namespace neurun
+{
+namespace dumper
+{
+namespace dot
+{
+
+const std::string OperationNode::OPERATION_SHAPE = "rect";
+const std::string OperationNode::BG_COLOR_SCHEME = "pastel18";
+
+OperationNode::OperationNode(const neurun::model::OperationIndex &index,
+                             const neurun::model::Operation &node)
+    : Node{"operation" + std::to_string(index.value())}
+{
+  setAttribute("label", std::to_string(index.value()) + " : " + node.getName());
+  setAttribute("shape", OPERATION_SHAPE);
+  setAttribute("colorscheme", BG_COLOR_SCHEME);
+  setAttribute("fillcolor", DEFAULT_FILLCOLOR);
+}
+
+} // namespace dot
+} // namespace dumper
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/dumper/dot/OperationNode.h b/runtimes/neurun/core/src/dumper/dot/OperationNode.h
new file mode 100644
index 000000000..6b8dede2d
--- /dev/null
+++ b/runtimes/neurun/core/src/dumper/dot/OperationNode.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file OperationNode.h
+ * @brief    This file contains OperationNode
+ * @ingroup  COM_AI_RUNTIME
+ *
+ */
+
+#ifndef __NEURUN_DUMPER_DOT_DOT_NODE_INFO_H__
+#define __NEURUN_DUMPER_DOT_DOT_NODE_INFO_H__
+
+#include "Node.h"
+#include "model/Operation.h"
+#include "model/Index.h"
+
+namespace neurun
+{
+namespace dumper
+{
+namespace dot
+{
+
+/**
+ * @brief Class that represents an Operation
+ *
+ */
+class OperationNode : public Node
+{
+public:
+  static const std::string OPERATION_SHAPE;
+  static const std::string BG_COLOR_SCHEME;
+
+public:
+  /**
+   * @brief Construct a new Operation Node object
+   *
+   * @param[in] index operation index
+   * @param[in] node operation object
+  */
+  OperationNode(const neurun::model::OperationIndex &index, const neurun::model::Operation &node);
+};
+
+} // namespace dot
+} // namespace dumper
+} // namespace neurun
+
+#endif // __NEURUN_DUMPER_DOT_DOT_NODE_INFO_H__
diff --git a/runtimes/neurun/core/src/exec/DataflowExecutor.cc b/runtimes/neurun/core/src/exec/DataflowExecutor.cc
new file mode 100644
index 000000000..75d616131
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/DataflowExecutor.cc
@@ -0,0 +1,206 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "DataflowExecutor.h"
+
+#include <cassert>
+
+#include "util/logging.h"
+
+namespace neurun
+{
+namespace exec
+{
+
+int64_t DataflowExecutor::calculateRank(const std::vector<model::Element> &operations)
+{
+  int64_t rank = 0;
+  if (!_indexed_ranks)
+  {
+    return rank;
+  }
+  for (const auto &element : operations)
+  {
+    auto it = _indexed_ranks->find(element.index);
+    if (it == _indexed_ranks->end())
+    {
+      assert(element.node->getName() == "Permute");
+      // assign int32_t::max to prevent integer overflow
+      rank += std::numeric_limits<int32_t>::max();
+    }
+    else
+    {
+      rank += it->second;
+    }
+  }
+  return rank;
+}
+
+void DataflowExecutor::emplaceToReadyJobs(const uint32_t &id)
+{
+  auto &job = _waiting_jobs[id];
+  assert(job != nullptr);
+  auto &subg = _subgraphs->at(_job_to_subgraph[job->index()]);
+  auto rank = calculateRank(subg.operations());
+  _ready_jobs.emplace(rank, std::move(job));
+}
+
+void DataflowExecutor::notify(uint32_t finished_job_id)
+{
+  for (auto id : _output_info[finished_job_id])
+  {
+    assert(_input_info[id] > 0);
+    auto count = --_input_info[id];
+    if (count == 0) // No dependent jobs left, ready for execution
+    {
+      emplaceToReadyJobs(id);
+    }
+  }
+}
+bool DataflowExecutor::noWaitingJobs()
+{
+  return std::all_of(_waiting_jobs.begin(), _waiting_jobs.end(),
+                     [](const std::unique_ptr<Job> &job) { return job == nullptr; });
+}
+
+DataflowExecutor::DataflowExecutor(const std::shared_ptr<const model::Model> &model,
+                                   std::unique_ptr<model::Subgraphs> subgraphs,
+                                   const std::shared_ptr<compiler::OperandContext> &operand_context,
+                                   std::unique_ptr<graph::LowerInfoMap> lower_info,
+                                   std::unique_ptr<backend::TensorManagerSet> tensor_mgrs,
+                                   CodeMap &&code_map)
+    : ExecutorBase{model, std::move(subgraphs), operand_context, std::move(lower_info),
+                   std::move(tensor_mgrs)},
+      _code_map{std::move(code_map)}
+{
+  VERBOSE(DataflowExecutor) << "Constructing Dataflow Executor" << std::endl;
+
+  assert(_subgraphs);
+  // Assign jobs convert SubgraphIndex to job index(uint32_t)
+  uint32_t next_job_index = 0;
+  std::unordered_map<model::SubgraphIndex, uint32_t> subgraph_to_job;
+  _subgraphs->iterate([&](const model::SubgraphIndex &subg_index, const model::Subgraph &) {
+    VERBOSE(DataflowExecutor) << "Create a job #" << next_job_index << " with SubgraphIndex "
+                              << subg_index.value() << std::endl;
+    _finished_jobs.emplace_back(
+        nnfw::cpp14::make_unique<Job>(next_job_index, _code_map.at(subg_index).get(),
+                                      _lower_info->operation.at(subg_index)->backend()));
+    subgraph_to_job[subg_index] = next_job_index++;
+  });
+
+  _waiting_jobs.resize(next_job_index);
+  _output_info.resize(next_job_index);
+  _initial_input_info.resize(next_job_index, 0);
+
+  _subgraphs->iterate([&](const model::SubgraphIndex &subg_index, const model::Subgraph &subg) {
+    auto job_index = subgraph_to_job[subg_index];
+    for (auto output : subg.getOutputs())
+    {
+      // Update output and input info
+      _subgraphs->iterate(
+          [&](const model::SubgraphIndex &subg_cur_index, const model::Subgraph &subg_cur) {
+            if (subg_cur.getInputs().contains(output))
+            {
+              auto dep_index = subgraph_to_job[subg_cur_index];
+              ++_initial_input_info[dep_index];
+              _output_info[job_index].push_back(dep_index);
+            }
+          });
+    }
+  });
+  for (const auto &s : subgraph_to_job)
+    _job_to_subgraph.emplace(s.second, s.first);
+
+  _input_info = _initial_input_info;
+}
+
+void DataflowExecutor::executeImpl()
+{
+  assert(noWaitingJobs());
+
+  // Execution setup
+  _waiting_jobs.swap(_finished_jobs); // Move finished jobs to waiting jobs
+
+  for (uint32_t i = 0; i < _waiting_jobs.size(); ++i)
+  {
+    if (_input_info[i] == 0)
+    {
+      emplaceToReadyJobs(i);
+    }
+  }
+  assert(!_ready_jobs.empty()); // Cannot begin if there is no initial jobs
+  bool is_profiling = util::getConfigBool(util::config::PROFILING_MODE);
+  // TODO Fix indentation
+  {
+    // Notifiy Execution Begin
+    for (auto &o : _observers)
+    {
+      o->handleBegin(this);
+    }
+  }
+
+  while (!_ready_jobs.empty())
+  {
+    auto job = std::move((_ready_jobs.begin())->second);
+    _ready_jobs.erase(_ready_jobs.begin());
+    auto job_index = job->index();
+    VERBOSE(DataflowExecutor) << "Run job #" << job_index << std::endl;
+    notifyJobBegin(job_index);
+    if (is_profiling)
+      job->fn()->runSync();
+    else
+      job->run();
+    notifyJobEnd(job_index);
+    notify(job_index);
+    _finished_jobs[job_index] = std::move(job);
+  }
+  assert(noWaitingJobs());
+
+  for (auto &o : _observers)
+  {
+    o->handleEnd(this);
+  }
+
+  // Reset input info for the next execution
+  _input_info = _initial_input_info;
+}
+
+void DataflowExecutor::notifyJobBegin(uint32_t job_index)
+{
+  auto subgraph_index = _job_to_subgraph[job_index];
+  // Workaround - assumes only one operation
+  auto node = _subgraphs->at(subgraph_index).operations().at(0).node;
+  const backend::Backend *backend = _lower_info->operation.at(subgraph_index)->backend();
+  for (auto &o : _observers)
+  {
+    o->handleBegin(this, node, backend);
+  }
+}
+
+void DataflowExecutor::notifyJobEnd(uint32_t job_index)
+{
+  auto subgraph_index = _job_to_subgraph[job_index];
+  // Workaround - assumes only one operation
+  auto node = _subgraphs->at(subgraph_index).operations().at(0).node;
+  const backend::Backend *backend = _lower_info->operation.at(subgraph_index)->backend();
+  for (auto &o : _observers)
+  {
+    o->handleEnd(this, node, backend);
+  }
+}
+
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/DataflowExecutor.h b/runtimes/neurun/core/src/exec/DataflowExecutor.h
new file mode 100644
index 000000000..935f9976d
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/DataflowExecutor.h
@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_EXEC_DATAFLOW_EXECUTOR_H__
+#define __NEURUN_EXEC_DATAFLOW_EXECUTOR_H__
+
+#include <list>
+#include <map>
+#include <unordered_map>
+
+#include "FunctionSequence.h"
+#include "Job.h"
+#include "model/OperandIndexSequence.h"
+#include "model/Index.h"
+#include "model/Model.h"
+#include "cpp14/memory.h"
+#include "exec/ExecutorBase.h"
+
+namespace neurun
+{
+namespace exec
+{
+
+class DataflowExecutor : public ExecutorBase
+{
+public:
+  using CodeMap = std::unordered_map<model::SubgraphIndex, std::unique_ptr<FunctionSequence>>;
+
+protected:
+  virtual void notify(uint32_t finished_job_id);
+  bool noWaitingJobs();
+
+public:
+  /**
+   * @brief Constructs a DataflowExecutor object
+   *
+   * @param model Model object
+   * @param operand_context (Only for input/output operand data access)
+   * @param lower_info LowerInfo object (Only to know input/output operands layout)
+   * @param code_map Compiled code map
+   * @param ranks Operation ranks for ordering execution
+   */
+  DataflowExecutor(const std::shared_ptr<const model::Model> &model,
+                   std::unique_ptr<model::Subgraphs> subgraphs,
+                   const std::shared_ptr<compiler::OperandContext> &operand_context,
+                   std::unique_ptr<graph::LowerInfoMap> lower_info,
+                   std::unique_ptr<backend::TensorManagerSet> tensor_mgrs, CodeMap &&code_map);
+
+  void executeImpl() override;
+
+  void notifyJobEnd(uint32_t job_index);
+  void notifyJobBegin(uint32_t job_index);
+
+  void addObserver(std::unique_ptr<IExecutionObserver> ref)
+  {
+    _observers.emplace_back(std::move(ref));
+  };
+  void removeObserver(std::unique_ptr<IExecutionObserver> ref) { _observers.remove(ref); };
+
+protected:
+  int64_t calculateRank(const std::vector<model::Element> &operations);
+  void emplaceToReadyJobs(const uint32_t &id);
+
+protected:
+  CodeMap _code_map;
+  /**
+   * @brief A vector of finished jobs for current execution
+   *        After a run it has all the jobs of this execution for the next run
+   */
+  std::vector<std::unique_ptr<Job>> _finished_jobs;
+  /**
+   * @brief A vector of waiting jobs for current execution
+   *        All the jobs are moved from #_finished_jobs to it when start a run
+   */
+  std::vector<std::unique_ptr<Job>> _waiting_jobs;
+  /**
+   * @brief Jobs' output info
+   *        Used for notifying after finishing a job
+   */
+  std::vector<std::list<uint32_t>> _output_info;
+  std::vector<uint32_t> _initial_input_info;
+  std::vector<uint32_t> _input_info;
+  /**
+   * @brief A collection of jobs that are ready for execution
+   *        Jobs in it are ready to be scheduled.
+   *        Ordered by priority from `_indexed_ranks`
+   */
+  std::multimap<int64_t, std::unique_ptr<Job>, std::greater<int64_t>> _ready_jobs;
+
+  /// @brief Which job runs which op and function.
+  std::unordered_map<uint32_t, model::SubgraphIndex> _job_to_subgraph;
+};
+
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_DATAFLOW_EXECUTOR_H__
diff --git a/runtimes/neurun/core/src/exec/Execution.cc b/runtimes/neurun/core/src/exec/Execution.cc
new file mode 100644
index 000000000..01114d8c8
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/Execution.cc
@@ -0,0 +1,108 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "exec/Execution.h"
+
+#include "util/logging.h"
+
+namespace neurun
+{
+namespace exec
+{
+
+Execution::Execution(const std::shared_ptr<IExecutor> &executor) : _executor{executor}
+{
+  _io_desc.inputs.resize(_executor->model().inputs.size());
+  _io_desc.outputs.resize(_executor->model().outputs.size());
+}
+
+void Execution::setInput(const model::IOIndex &index, const void *buffer, size_t length)
+{
+  const auto input_index = model().inputs.at(index);
+  const auto info = model().operands.at(input_index).info();
+
+  if (length < info.total_size())
+  {
+    throw std::runtime_error{"Too small length"};
+  }
+
+  _io_desc.inputs.at(index.value()) = nnfw::cpp14::make_unique<InputDesc>(info, buffer, length);
+}
+
+void Execution::setInput(const model::IOIndex &index, const model::TypeInfo &type,
+                         const model::Shape &shape, const void *buffer, size_t length)
+{
+  const model::OperandInfo info{shape, type};
+
+  if (length < info.total_size())
+  {
+    throw std::runtime_error{"Too small length"};
+  }
+
+  _io_desc.inputs.at(index.value()) = nnfw::cpp14::make_unique<InputDesc>(info, buffer, length);
+}
+
+void Execution::setOutput(const model::IOIndex &index, void *buffer, size_t length)
+{
+  const auto output_index = model().outputs.at(index);
+  const auto info = model().operands.at(output_index).info();
+
+  if (length < info.total_size())
+  {
+    throw std::runtime_error{"Too small length"};
+  }
+
+  _io_desc.outputs.at(index.value()) = nnfw::cpp14::make_unique<OutputDesc>(info, buffer, length);
+}
+
+void Execution::setOutput(const model::IOIndex &index, const model::TypeInfo &type,
+                          const model::Shape &shape, void *buffer, size_t length)
+{
+  const model::OperandInfo info{shape, type};
+
+  if (length < info.total_size())
+  {
+    throw std::runtime_error{"Too small length"};
+  }
+
+  _io_desc.outputs.at(index.value()) = nnfw::cpp14::make_unique<OutputDesc>(info, buffer, length);
+}
+
+void Execution::execute()
+{
+  VERBOSE(Execution) << "Start execution" << std::endl;
+
+  _executor->execute(_io_desc);
+
+  VERBOSE(Execution) << "Execution finished" << std::endl;
+}
+
+void Execution::startExecute()
+{
+  VERBOSE(Execution) << "Create asynchronous execution thread" << std::endl;
+
+  _exec_thread = nnfw::cpp14::make_unique<std::thread>(&Execution::execute, this);
+}
+
+void Execution::waitFinish()
+{
+  VERBOSE(Execution) << "Wait to finish execution" << std::endl;
+
+  _exec_thread->join();
+}
+
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/ExecutionObservers.cc b/runtimes/neurun/core/src/exec/ExecutionObservers.cc
new file mode 100644
index 000000000..e6561fe5c
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/ExecutionObservers.cc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "exec/ExecutionObservers.h"
+#include "util/logging.h"
+#include "model/operation/PermuteNode.h"
+#include "exec/IExecutor.h"
+#include "misc/polymorphic_downcast.h"
+
+namespace neurun
+{
+
+namespace exec
+{
+
+void ProfileObserver::handleBegin(neurun::exec::IExecutor *, const neurun::model::Operation *,
+                                  const neurun::backend::Backend *backend)
+{
+  _timer = backend->config()->timer();
+  if (_timer == nullptr)
+    throw std::runtime_error("To profile backend timer() method must be implemented");
+  _timer->handleBegin();
+}
+
+void ProfileObserver::handleEnd(IExecutor *exec, const model::Operation *node,
+                                const backend::Backend *backend)
+{
+  _timer->handleEnd();
+  const auto timer_res = _timer->getTime();
+
+  auto node_name = node->getName();
+  VERBOSE(ProfileInfo) << "Time for " << node_name << " : " << timer_res << std::endl;
+
+  // fill ExecTime:
+  bool is_quantized = exec->model().operands.at(node->getInputs().at(0)).typeInfo().type() ==
+                      model::DataType::QUANT8_ASYMM;
+
+  uint32_t size = 0;
+  for (const auto &input : node->getInputs())
+  {
+    size += exec->model().operands.at(input).info().total_size();
+  }
+  for (const auto &output : node->getOutputs())
+  {
+    size += exec->model().operands.at(output).info().total_size();
+  }
+  if (node_name == "Permute")
+  {
+    auto *permute_node =
+        nnfw::misc::polymorphic_downcast<const model::operation::PermuteNode *>(node);
+    assert(permute_node != nullptr);
+    _et->updatePermuteTime(permute_node->param().input_backend_ctx->backend,
+                           permute_node->param().output_backend_ctx->backend, is_quantized, size,
+                           timer_res);
+  }
+  else
+  {
+    _et->updateOperationExecTime(backend, node_name, is_quantized, size, timer_res);
+  }
+};
+
+} // namespace exec
+
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/ExecutorBase.cc b/runtimes/neurun/core/src/exec/ExecutorBase.cc
new file mode 100644
index 000000000..827d4dc8b
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/ExecutorBase.cc
@@ -0,0 +1,140 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ExecutorBase.h"
+#include "util/logging.h"
+namespace neurun
+{
+namespace exec
+{
+
+ExecutorBase::ExecutorBase(const std::shared_ptr<const model::Model> &model,
+                           std::unique_ptr<model::Subgraphs> subgraphs,
+                           const std::shared_ptr<compiler::OperandContext> &operand_context,
+                           std::unique_ptr<graph::LowerInfoMap> lower_info,
+                           std::unique_ptr<backend::TensorManagerSet> tensor_mgrs)
+    : _observers(), _model{model}, _subgraphs{std::move(subgraphs)},
+      _operand_context{operand_context}, _lower_info{std::move(lower_info)},
+      _tensor_mgrs{std::move(tensor_mgrs)}, _mutex()
+{
+  // DO NOTHING
+}
+
+std::unique_ptr<ISource> ExecutorBase::source(const model::IOIndex &index,
+                                              const model::TypeInfo &type, const void *buffer,
+                                              size_t length)
+{
+  using ::neurun::model::DataType;
+  switch (type.type())
+  {
+    case DataType::FLOAT32:
+      return source<float>(index, buffer, length);
+    case DataType::INT32:
+      return source<int32_t>(index, buffer, length);
+    case DataType::UINT32:
+      return source<uint32_t>(index, buffer, length);
+    case DataType::BOOL8:
+    case DataType::QUANT8_ASYMM:
+      return source<uint8_t>(index, buffer, length);
+    default:
+      throw std::runtime_error("Not supported yet");
+  }
+}
+
+std::unique_ptr<ISink> ExecutorBase::sink(const model::IOIndex &index, const model::TypeInfo &type,
+                                          void *buffer, size_t length)
+{
+  using ::neurun::model::DataType;
+  switch (type.type())
+  {
+    case DataType::FLOAT32:
+      return sink<float>(index, buffer, length);
+    case DataType::INT32:
+      return sink<int32_t>(index, buffer, length);
+    case DataType::UINT32:
+      return sink<uint32_t>(index, buffer, length);
+    case DataType::BOOL8:
+    case DataType::QUANT8_ASYMM:
+      return sink<uint8_t>(index, buffer, length);
+    default:
+      throw std::runtime_error("Not supported yet");
+  }
+}
+
+void ExecutorBase::execute(const IODescription &desc)
+{
+  // For thread-safe, use mutex
+  // TODO: if all used backends on this executor are thread-safe,
+  //       do not need to use mutex (otherwise, use mutex)
+  std::lock_guard<std::mutex> lock(_mutex);
+
+  std::vector<std::unique_ptr<ISource>> sources{_model->inputs.size()};
+  std::vector<std::unique_ptr<ISink>> sinks{_model->outputs.size()};
+
+  // Set input(s)
+  for (uint32_t n = 0; n < _model->inputs.size(); ++n)
+  {
+    model::IOIndex input_index{n};
+    model::OperandIndex index{_model->inputs.at(input_index)};
+
+    if (desc.inputs.at(n) == nullptr)
+    {
+      // Optional input
+      continue;
+    }
+
+    const auto operand_li = _lower_info->operand.at(index).get();
+    if (operand_li->def_factors().empty())
+    {
+      // This input is not used (i.e. constant, EX. reshape's axis)
+      continue;
+    }
+
+    const auto &input = *desc.inputs.at(n);
+    sources.at(n) = source(input_index, input.info.typeInfo(), input.buffer, input.size);
+
+    auto setter = [&](::neurun::backend::operand::ITensor &tensor) { sources.at(n)->push(tensor); };
+
+    auto object = _operand_context->at(index);
+
+    object->access(setter);
+  }
+
+  executeImpl();
+
+  // Get output(s)
+  for (uint32_t n = 0; n < _model->outputs.size(); ++n)
+  {
+    neurun::model::IOIndex output_index{n};
+    // Optional output
+    if (desc.outputs.at(n) == nullptr)
+    {
+      continue;
+    }
+    const auto &output = *desc.outputs.at(n);
+    sinks.at(n) = sink(output_index, output.info.typeInfo(), output.buffer, output.size);
+
+    auto getter = [&](::neurun::backend::operand::ITensor &tensor) { sinks.at(n)->pull(tensor); };
+
+    ::neurun::model::OperandIndex index{_model->outputs.at(output_index)};
+    auto object = _operand_context->at(index);
+
+    object->access(getter);
+  }
+}
+
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/ExecutorBase.h b/runtimes/neurun/core/src/exec/ExecutorBase.h
new file mode 100644
index 000000000..c283e7f61
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/ExecutorBase.h
@@ -0,0 +1,124 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_EXEC_EXECUTOR_BASE_H__
+#define __NEURUN_EXEC_EXECUTOR_BASE_H__
+
+#include <mutex>
+
+#include "Source.h"
+#include "exec/ExecutionObservers.h"
+#include "Sink.h"
+#include "exec/IExecutor.h"
+#include "model/Model.h"
+#include "graph/LowerInfoMap.h"
+#include "backend/IConfig.h"
+#include "model/OperandInfo.h"
+#include "backend/Backend.h"
+#include "compiler/OperandContext.h"
+#include "model/Subgraphs.h"
+#include "model/Subgraph.h"
+#include "backend/ExecTime.h"
+#include "exec/IFunction.h"
+#include "backend/ITensorManager.h"
+#include <list>
+
+namespace neurun
+{
+namespace exec
+{
+
+class ExecutorBase : public IExecutor
+{
+public:
+  ExecutorBase(const std::shared_ptr<const model::Model> &model,
+               std::unique_ptr<model::Subgraphs> subgraphs,
+               const std::shared_ptr<compiler::OperandContext> &operand_context,
+               std::unique_ptr<graph::LowerInfoMap> lower_info,
+               std::unique_ptr<backend::TensorManagerSet> tensor_mgrs);
+
+  virtual ~ExecutorBase() = default;
+
+  const model::Model &model() override { return *_model; }
+
+  void execute(const IODescription &desc) final;
+
+  // Used only in Dataflow and Parallel Executors
+  void setIndexedRanks(std::shared_ptr<model::OperationIndexMap<int64_t>> ranks) final
+  {
+    _indexed_ranks = std::move(ranks);
+  };
+
+  virtual void executeImpl(void) = 0;
+
+private:
+  std::unique_ptr<ISource> source(const model::IOIndex &index, const model::TypeInfo &type,
+                                  const void *buffer, size_t length);
+  std::unique_ptr<ISink> sink(const model::IOIndex &index, const model::TypeInfo &type,
+                              void *buffer, size_t length);
+
+  template <typename T>
+  std::unique_ptr<ISource> source(const model::IOIndex &index, const void *buffer, size_t length)
+  {
+    const auto operand_index = _model->inputs.at(index);
+    const auto &operand = _model->operands.at(operand_index);
+
+    const auto tensor = _operand_context->at(operand_index)->ptr();
+    const auto output_layout = tensor->layout();
+    // TODO Set input_layout as frontend model's input layout
+    auto input_layout = model::Layout::NHWC;
+    if ((input_layout == model::Layout::NHWC) && (output_layout == model::Layout::NCHW))
+    {
+      return nnfw::cpp14::make_unique<PermutateSource<T>>(buffer, length, operand.shape());
+    }
+    // TODO Supports NCHW -> NHWC
+
+    return nnfw::cpp14::make_unique<CopySource<T>>(buffer, length, operand.shape());
+  }
+
+  template <typename T>
+  std::unique_ptr<ISink> sink(const model::IOIndex &index, void *buffer, size_t length)
+  {
+    const auto operand_index = _model->outputs.at(index);
+    const auto &operand = _model->operands.at(operand_index);
+    const auto tensor = _operand_context->at(operand_index)->ptr();
+    const auto input_layout = tensor->layout();
+    // TODO Set output_layout as frontend model's output layout
+    auto output_layout = model::Layout::NHWC;
+    if ((input_layout == model::Layout::NCHW) && (output_layout == model::Layout::NHWC))
+    {
+      return nnfw::cpp14::make_unique<PermutateSink<T>>(buffer, length, operand.shape());
+    }
+    // TODO Supports NHWC -> NCHW
+
+    return nnfw::cpp14::make_unique<CopySink<T>>(buffer, length, operand.shape());
+  }
+
+protected:
+  std::list<std::unique_ptr<IExecutionObserver>> _observers;
+  std::shared_ptr<model::OperationIndexMap<int64_t>> _indexed_ranks;
+  std::shared_ptr<const model::Model> _model;
+  std::unique_ptr<model::Subgraphs> _subgraphs;
+  std::shared_ptr<compiler::OperandContext> _operand_context;
+  std::unique_ptr<graph::LowerInfoMap> _lower_info;
+  std::unique_ptr<backend::TensorManagerSet> _tensor_mgrs;
+  std::mutex _mutex;
+};
+
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_EXECUTOR_BASE_H__
diff --git a/runtimes/neurun/core/src/exec/FunctionSequence.cc b/runtimes/neurun/core/src/exec/FunctionSequence.cc
new file mode 100644
index 000000000..00214fcfa
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/FunctionSequence.cc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "FunctionSequence.h"
+
+namespace neurun
+{
+namespace exec
+{
+
+void FunctionSequence::run()
+{
+  for (const auto &function : _functions)
+  {
+    function->run();
+  }
+}
+
+void FunctionSequence::runSync()
+{
+  for (const auto &function : _functions)
+  {
+    function->runSync();
+  }
+}
+
+void FunctionSequence::prepare()
+{
+  for (const auto &function : _functions)
+  {
+    function->prepare();
+  }
+}
+
+void FunctionSequence::append(std::unique_ptr<IFunction> &&function)
+{
+  _functions.push_back(std::move(function));
+}
+
+void FunctionSequence::iterate(const std::function<void(IFunction &)> &fn)
+{
+  for (const auto &func : _functions)
+  {
+    fn(*func);
+  }
+}
+
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/FunctionSequence.h b/runtimes/neurun/core/src/exec/FunctionSequence.h
new file mode 100644
index 000000000..2ba5c0b08
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/FunctionSequence.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_EXEC_FUNCTION_SEQUENCE_H__
+#define __NEURUN_EXEC_FUNCTION_SEQUENCE_H__
+
+#include <memory>
+#include <vector>
+#include <functional>
+
+#include "exec/IFunction.h"
+
+namespace neurun
+{
+namespace exec
+{
+
+class FunctionSequence : public IFunction
+{
+public:
+  virtual ~FunctionSequence() = default;
+
+  void run() override;
+  void runSync() override;
+  void prepare() override;
+
+  /**
+   * @brief Appends an IFunction object to the function sequence
+   *
+   * @param function IFunction object to be appended
+   */
+  void append(std::unique_ptr<IFunction> &&function);
+
+  void iterate(const std::function<void(IFunction &)> &fn);
+
+private:
+  std::vector<std::unique_ptr<IFunction>> _functions;
+};
+
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_FUNCTION_SEQUENCE_H__
diff --git a/runtimes/neurun/core/src/exec/Job.cc b/runtimes/neurun/core/src/exec/Job.cc
new file mode 100644
index 000000000..6ce3a84f9
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/Job.cc
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "Job.h"
+
+#include <cassert>
+
+#include "util/logging.h"
+
+namespace neurun
+{
+namespace exec
+{
+
+Job::Job(uint32_t index, IFunction *fn, const backend::Backend *backend)
+    : _index{index}, _fn{fn}, _backend{backend}
+{
+}
+
+void Job::run() { _fn->run(); }
+
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/Job.h b/runtimes/neurun/core/src/exec/Job.h
new file mode 100644
index 000000000..108f39e99
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/Job.h
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_EXEC_JOB_H__
+#define __NEURUN_EXEC_JOB_H__
+
+#include <unordered_set>
+
+#include "exec/IFunction.h"
+#include "model/Index.h"
+#include "model/OperandIndexSequence.h"
+#include "backend/Backend.h"
+
+namespace neurun
+{
+namespace exec
+{
+
+class Job
+{
+public:
+  /**
+   * @brief Constructs a Job object
+   *
+   * @param index Operation index for this job
+   * @param fn compiled code to run this job
+   * @param inputs Input operand list
+   * @param outputs Output operand list
+   */
+  Job(uint32_t index, IFunction *fn, const backend::Backend *backend);
+  /**
+   * @brief Execute the compiled code
+   */
+  void run();
+  /**
+   * @brief Return job index
+   *
+   * @return Job index
+   */
+  uint32_t index() const { return _index; }
+  /**
+   * @brief Return the function to be executed
+   *
+   * @return Pointer of the function
+   */
+  IFunction *fn() { return _fn; }
+
+  /**
+   * @brief Return the backend
+   *
+   * @return Backend
+   */
+  const backend::Backend *backend() { return _backend; }
+
+private:
+  uint32_t _index;
+  IFunction *_fn;
+  const backend::Backend *_backend;
+};
+
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_JOB_H__
diff --git a/runtimes/neurun/core/src/exec/LinearExecutor.cc b/runtimes/neurun/core/src/exec/LinearExecutor.cc
new file mode 100644
index 000000000..35197a257
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/LinearExecutor.cc
@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "LinearExecutor.h"
+
+namespace neurun
+{
+namespace exec
+{
+
+void LinearExecutor::executeImpl() { _fn_seq->run(); }
+
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/LinearExecutor.h b/runtimes/neurun/core/src/exec/LinearExecutor.h
new file mode 100644
index 000000000..58c1ea9ae
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/LinearExecutor.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file  LinearExecutor.h
+ * @brief This file contains LinearExecutor class to define and run execution phase
+ */
+
+#ifndef __NEURUN_EXEC_EXECUTOR_H_
+#define __NEURUN_EXEC_EXECUTOR_H_
+
+#include "ExecutorBase.h"
+#include "compiler/Linear.h"
+#include "exec/FunctionSequence.h"
+
+namespace neurun
+{
+namespace exec
+{
+
+/**
+ * @brief Class to handle execution phase. Simple run the sequence of operations that is sorted in
+ *        topological order
+ */
+class LinearExecutor final : public ExecutorBase
+{
+public:
+  /**
+   * @brief Construct a new LinearExecutor object
+   * @param[in] plan  Execution plan generated by compiled result
+   */
+  LinearExecutor(const std::shared_ptr<const model::Model> &model,
+                 std::unique_ptr<model::Subgraphs> subgraphs,
+                 const std::shared_ptr<compiler::OperandContext> &operand_context,
+                 std::unique_ptr<graph::LowerInfoMap> lower_info,
+                 std::unique_ptr<backend::TensorManagerSet> tensor_mgrs,
+                 std::vector<compiler::Linear::Element> &&elements,
+                 const std::shared_ptr<exec::FunctionSequence> &fn_seq)
+      : ExecutorBase{model, std::move(subgraphs), operand_context, std::move(lower_info),
+                     std::move(tensor_mgrs)},
+        _fn_seq{fn_seq}, _elements{std::move(elements)}
+  {
+  }
+
+public:
+  void executeImpl(void) override;
+
+private:
+  std::shared_ptr<exec::FunctionSequence> _fn_seq;
+  std::vector<compiler::Linear::Element> _elements;
+};
+
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_EXECUTOR_H_
diff --git a/runtimes/neurun/core/src/exec/ParallelExecutor.cc b/runtimes/neurun/core/src/exec/ParallelExecutor.cc
new file mode 100644
index 000000000..81d4ac03f
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/ParallelExecutor.cc
@@ -0,0 +1,140 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ParallelExecutor.h"
+
+#include <cassert>
+
+#include "util/logging.h"
+#include "exec/IFunction.h"
+
+namespace neurun
+{
+namespace exec
+{
+
+class HookFunction : public IFunction
+{
+public:
+  HookFunction(IFunction *fn, std::function<void()> teardown) : _fn{fn}, _teardown{teardown} {}
+
+public:
+  void run() override
+  {
+    // TODO Introduce and call setup() function here
+    _fn->run();
+    _teardown();
+  }
+  void runSync() override { throw("runSync is needed just for profiling in Dataflow executor"); }
+
+private:
+  IFunction *_fn;
+  std::function<void()> _teardown;
+};
+
+void ParallelExecutor::notify(uint32_t finished_job_id)
+{
+  std::unique_lock<std::mutex> lock{_mu_jobs};
+
+  DataflowExecutor::notify(finished_job_id);
+
+  lock.unlock();
+  _cv_jobs.notify_all();
+}
+
+ParallelExecutor::ParallelExecutor(const std::shared_ptr<const model::Model> &model,
+                                   std::unique_ptr<model::Subgraphs> subgraphs,
+                                   const std::shared_ptr<compiler::OperandContext> &operand_context,
+                                   std::unique_ptr<graph::LowerInfoMap> lower_info,
+                                   std::unique_ptr<backend::TensorManagerSet> tensor_mgrs,
+                                   CodeMap &&code_map)
+    : DataflowExecutor{model,
+                       std::move(subgraphs),
+                       operand_context,
+                       std::move(lower_info),
+                       std::move(tensor_mgrs),
+                       std::move(code_map)}
+{
+  VERBOSE(ParallelExecutor) << "Constructing Parallel Executor" << std::endl;
+}
+
+void ParallelExecutor::executeImpl()
+{
+  // Init scheduler
+  // TODO Consider to have distinct backend set in LowerInfoMap
+  graph::BackendSet backends;
+  for (auto &itr : _lower_info->operation)
+  {
+    backends.add(itr.second->backend());
+  }
+  _scheduler = nnfw::cpp14::make_unique<ParallelScheduler>(backends);
+
+  assert(noWaitingJobs());
+
+  // Execution setup
+  _waiting_jobs.swap(_finished_jobs); // Move finished jobs to waiting jobs
+
+  for (uint32_t i = 0; i < _waiting_jobs.size(); ++i)
+  {
+    VERBOSE(ParallelExecutor) << i << ": " << _input_info[i] << std::endl;
+    if (_input_info[i] == 0)
+    {
+      emplaceToReadyJobs(i);
+    }
+  }
+  assert(!_ready_jobs.empty()); // Cannot begin if there is no initial jobs
+
+  VERBOSE(ParallelExecutor) << "INITIAL JOBS : " << _ready_jobs.size() << std::endl;
+
+  while (true)
+  {
+    std::unique_lock<std::mutex> lock{_mu_jobs};
+
+    if (_ready_jobs.empty())
+    {
+      _cv_jobs.wait(lock, [this] { return !_ready_jobs.empty() || noWaitingJobs(); });
+      // Check finish condition
+      if (_ready_jobs.empty() && noWaitingJobs())
+      {
+        break;
+      }
+    }
+
+    auto job = std::move(_ready_jobs.begin()->second);
+    _ready_jobs.erase(_ready_jobs.begin());
+
+    lock.unlock();
+
+    VERBOSE(ParallelExecutor) << "Assigning fn #" << job->index() << std::endl;
+
+    auto job_index = job->index();
+    auto teardown = [&, job_index]() { notify(job_index); };
+
+    _scheduler->assign(nnfw::cpp14::make_unique<HookFunction>(job->fn(), teardown), job->backend());
+    _finished_jobs[job_index] = std::move(job);
+  }
+
+  assert(noWaitingJobs());
+
+  // Wait for all the jobs done
+  _scheduler->finish();
+
+  // Reset input info for the next execution
+  _input_info = _initial_input_info;
+}
+
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/ParallelExecutor.h b/runtimes/neurun/core/src/exec/ParallelExecutor.h
new file mode 100644
index 000000000..7a4673b9c
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/ParallelExecutor.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_EXEC_PARALLEL_EXECUTOR_H__
+#define __NEURUN_EXEC_PARALLEL_EXECUTOR_H__
+
+#include <list>
+#include <queue>
+#include <unordered_map>
+
+#include "FunctionSequence.h"
+#include "Job.h"
+#include "model/OperandIndexSequence.h"
+#include "model/Index.h"
+#include "model/Model.h"
+#include "cpp14/memory.h"
+#include "exec/DataflowExecutor.h"
+#include "ParallelScheduler.h"
+
+namespace neurun
+{
+namespace exec
+{
+
+/**
+ * @brief Class to execute Graph in parallel
+ */
+class ParallelExecutor : public DataflowExecutor
+{
+protected:
+  void notify(uint32_t finished_job_id) override;
+
+public:
+  /**
+   * @brief Constructs a ParallelExecutor object
+   *
+   * @param model Model object
+   * @param operand_context (Only for input/output operand data access)
+   * @param lower_info LowerInfo object (Only to know input/output operands layout)
+   * @param code_map Compiled code map
+   * @param ranks Operation ranks for ordering execution
+   */
+  ParallelExecutor(const std::shared_ptr<const model::Model> &model,
+                   std::unique_ptr<model::Subgraphs> subgraphs,
+                   const std::shared_ptr<compiler::OperandContext> &operand_context,
+                   std::unique_ptr<graph::LowerInfoMap> lower_info,
+                   std::unique_ptr<backend::TensorManagerSet> tensor_mgrs, CodeMap &&code_map);
+
+  void executeImpl() override;
+
+private:
+  std::condition_variable _cv_jobs;
+  std::mutex _mu_jobs;
+  std::unique_ptr<ParallelScheduler> _scheduler;
+};
+
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_PARALLEL_EXECUTOR_H__
diff --git a/runtimes/neurun/core/src/exec/ParallelScheduler.cc b/runtimes/neurun/core/src/exec/ParallelScheduler.cc
new file mode 100644
index 000000000..44f1a5f08
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/ParallelScheduler.cc
@@ -0,0 +1,170 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ParallelScheduler.h"
+
+#include <cassert>
+
+#include "cpp14/memory.h"
+#include "util/logging.h"
+
+namespace neurun
+{
+namespace exec
+{
+
+WorkQueue::~WorkQueue()
+{
+  {
+    std::unique_lock<std::mutex> lock(_mu);
+    _state = State::FORCE_FINISHING;
+  }
+  _cv.notify_all();
+}
+
+void WorkQueue::operator()()
+{
+  while (true)
+  {
+    std::unique_ptr<IFunction> fn = nullptr;
+
+    {
+      std::unique_lock<std::mutex> lock{_mu};
+      _cv.wait(lock, [this] {
+        return (_state == State::FORCE_FINISHING) || (_state == State::FINISHING) ||
+               (_state == State::ONLINE && !_functions.empty());
+      });
+
+      if (_state == State::FORCE_FINISHING)
+      {
+        assert(_functions.empty() && "Terminating with unfinished jobs");
+        return;
+      }
+      else if (_state == State::FINISHING && _functions.empty())
+      {
+        return;
+      }
+      else
+      {
+        assert(((_state == State::FINISHING) || (_state == State::ONLINE)) && !_functions.empty());
+        fn = std::move(_functions.front());
+        _functions.pop();
+      }
+    }
+
+    assert(fn);
+    fn->run();
+  }
+}
+
+void WorkQueue::enqueue(std::unique_ptr<IFunction> &&fn)
+{
+  {
+    std::unique_lock<std::mutex> lock{_mu};
+    _functions.emplace(std::move(fn));
+  }
+  _cv.notify_one();
+}
+
+void WorkQueue::terminate()
+{
+  {
+    std::unique_lock<std::mutex> lock{_mu};
+    _state = State::FORCE_FINISHING;
+  }
+  _cv.notify_all();
+}
+
+void WorkQueue::finish()
+{
+  {
+    std::unique_lock<std::mutex> lock{_mu};
+    _state = State::FINISHING;
+  }
+  _cv.notify_all();
+}
+
+uint32_t WorkQueue::numJobsInQueue()
+{
+  std::unique_lock<std::mutex> lock{_mu};
+  return _functions.size();
+}
+
+ThreadPool::ThreadPool(uint32_t num_threads)
+{
+  assert(num_threads >= 1);
+
+  for (uint32_t i = 0; i < num_threads; i++)
+  {
+    _threads.emplace_back(std::ref(_worker));
+  }
+}
+
+ThreadPool::~ThreadPool()
+{
+  if (!_threads.empty())
+  {
+    _worker.terminate();
+    join();
+  }
+}
+
+void ThreadPool::enqueue(std::unique_ptr<IFunction> &&fn) { _worker.enqueue(std::move(fn)); }
+
+uint32_t ThreadPool::numJobsInQueue() { return _worker.numJobsInQueue(); }
+
+void ThreadPool::join()
+{
+  for (auto &thread : _threads)
+  {
+    thread.join();
+  }
+  _threads.clear();
+}
+
+void ThreadPool::finish()
+{
+  _worker.finish();
+  join();
+}
+
+ParallelScheduler::ParallelScheduler(const graph::BackendSet &backends)
+{
+  assert(!backends.empty());
+
+  for (auto backend : backends)
+  {
+    _thread_pools[backend] = nnfw::cpp14::make_unique<ThreadPool>();
+  }
+}
+
+void ParallelScheduler::assign(std::unique_ptr<IFunction> &&fn, const backend::Backend *backend)
+{
+  assert(!_thread_pools.empty());
+
+  _thread_pools.at(backend)->enqueue(std::move(fn));
+}
+
+void ParallelScheduler::finish()
+{
+  for (auto &itr : _thread_pools)
+  {
+    itr.second->finish();
+  }
+}
+
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/ParallelScheduler.h b/runtimes/neurun/core/src/exec/ParallelScheduler.h
new file mode 100644
index 000000000..9660478e8
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/ParallelScheduler.h
@@ -0,0 +1,158 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_EXEC_PARALLEL_SCHEDULER_H__
+#define __NEURUN_EXEC_PARALLEL_SCHEDULER_H__
+
+#include <unordered_map>
+#include <thread>
+#include <mutex>
+#include <condition_variable>
+#include <memory>
+#include <queue>
+#include <vector>
+#include <unordered_set>
+
+#include "exec/IFunction.h"
+#include "graph/BackendSet.h"
+
+namespace neurun
+{
+namespace exec
+{
+
+// TODO Extract this class to a separate file
+class WorkQueue
+{
+public:
+  enum class State
+  {
+    ONLINE,
+    FINISHING,
+    FORCE_FINISHING
+  };
+
+public:
+  /**
+   * @brief Create WorkQueue object
+   */
+  WorkQueue() = default;
+  /**
+   * @brief Destroy WorkQueue object
+   */
+  ~WorkQueue();
+  /**
+   * @brief Thread entry function
+   */
+  void operator()();
+  /**
+   * @brief Push the given Task to the job queue
+   *
+   * @param fn Function to be executed(a job)
+   */
+  void enqueue(std::unique_ptr<IFunction> &&fn);
+  /**
+   * @brief Flag as terminating so all the worker threads can terminate
+   */
+  void terminate();
+  /**
+   * @brief Flag as terminating so all the worker threads can terminate
+   */
+  void finish();
+  /**
+   * @brief Check if it has pending jobs. Even if this returns fals, WorkQueue threads may be still
+   * running
+   *
+   * @return true if the job queue not empty otherwise false
+   */
+  uint32_t numJobsInQueue();
+
+private:
+  State _state{State::ONLINE};
+  std::queue<std::unique_ptr<IFunction>> _functions;
+  std::mutex _mu;
+  std::condition_variable _cv;
+};
+
+// TODO Extract this class to a separate file
+class ThreadPool
+{
+public:
+  /**
+   * @brief Coustruct ThreadPool object
+   *
+   * @param num_threads Number of threads
+   */
+  ThreadPool(uint32_t num_threads = 1);
+  /**
+   * @brief Destroy ThreadPool object
+   */
+  ~ThreadPool();
+  /**
+   * @brief Enqueue a function
+   *
+   * @param fn A function to be queued
+   */
+  void enqueue(std::unique_ptr<IFunction> &&fn);
+  /**
+   * @brief Get number of jobs in worker's queue
+   *
+   * @return Number of jobs
+   */
+  uint32_t numJobsInQueue();
+
+  /**
+   * @brief Block until all jobs are finished
+   */
+  void finish();
+
+private:
+  void join();
+
+private:
+  WorkQueue _worker;
+  std::vector<std::thread> _threads;
+};
+
+class ParallelScheduler
+{
+public:
+  /**
+   * @brief Constructs ParallelScheduler object
+   *
+   * @param backends Backend set
+   */
+  ParallelScheduler(const graph::BackendSet &backends);
+  /**
+   * @brief Assign a task to the given backend
+   *
+   * @param[in] fn Function to be assigned
+   * @param[in] fn Target backend
+   */
+  void assign(std::unique_ptr<IFunction> &&fn, const backend::Backend *backend);
+  /**
+   * @brief Block until all jobs are finished
+   */
+  void finish();
+
+private:
+  std::unordered_map<const backend::Backend *, std::unique_ptr<ThreadPool>> _thread_pools;
+};
+
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_PARALLEL_SCHEDULER_H__
diff --git a/runtimes/neurun/core/src/exec/Sink.h b/runtimes/neurun/core/src/exec/Sink.h
new file mode 100644
index 000000000..7ec3efa22
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/Sink.h
@@ -0,0 +1,182 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_EXEC_SINK_H__
+#define __NEURUN_EXEC_SINK_H__
+
+#include <cassert>
+
+#include "cpp14/memory.h"
+#include "util/feature/nhwc/View.h"
+#include "util/feature/nchw/View.h"
+#include "util/Utils.h"
+#include <misc/feature/IndexIterator.h>
+
+namespace neurun
+{
+namespace exec
+{
+struct ISink
+{
+  virtual ~ISink() = default;
+
+  virtual void pull(::neurun::backend::operand::ITensor &tensor) const = 0;
+};
+
+// Create second lever inheritance: the first lever is used as a reference type in use-case places
+template <typename T> class ITemplSink : public ISink
+{
+public:
+  ITemplSink(void *output_buffer, const size_t &output_size, const model::Shape &shape,
+             const bool copy)
+      : _output_buffer{reinterpret_cast<T *>(output_buffer)}, _output_size{output_size},
+        _shape{shape}, _copy{copy}
+  {
+  }
+
+protected:
+  void pullUnif(neurun::backend::operand::ITensor &tensor) const
+  {
+    auto input_buffer = tensor.buffer();
+    auto rank = _shape.rank();
+
+    if (!tensor.has_padding() && rank < 4 + _copy)
+    {
+      memcpy(_output_buffer, input_buffer, _output_size);
+      return;
+    }
+
+    switch (rank)
+    {
+      case 0:
+      case 1:
+      {
+        memcpy(_output_buffer, input_buffer, _output_size);
+        break;
+      }
+      case 2:
+      {
+        const int32_t copy_len = _shape.dim(1);
+
+        for (auto i = 0; i < _shape.dim(0); ++i)
+        {
+          neurun::util::Coordinates coords{i, 0};
+          memcpy(_output_buffer + i * copy_len, input_buffer + tensor.calcOffset(coords),
+                 copy_len * sizeof(T));
+        }
+        break;
+      }
+      case 3:
+      {
+        const int32_t dim1 = _shape.dim(1);
+        const int32_t dim2 = _shape.dim(2);
+
+        for (auto i = 0; i < _shape.dim(0); ++i)
+        {
+          for (auto j = 0; j < _shape.dim(1); ++j)
+          {
+            neurun::util::Coordinates coords{i, j, 0};
+            memcpy(_output_buffer + i * dim1 * dim2 + j * dim2,
+                   input_buffer + tensor.calcOffset(coords), dim2 * sizeof(T));
+          }
+        }
+        break;
+      }
+      case 4:
+      {
+        if (_copy)
+        {
+          const int32_t dim1 = _shape.dim(1);
+          const int32_t dim2 = _shape.dim(2);
+          const int32_t dim3 = _shape.dim(3);
+
+          for (auto i = 0; i < _shape.dim(0); ++i)
+          {
+            for (auto j = 0; j < _shape.dim(1); ++j)
+            {
+              for (auto k = 0; k < _shape.dim(2); ++k)
+              {
+                neurun::util::Coordinates coords{i, j, k, 0};
+                memcpy(_output_buffer + i * dim1 * dim2 * dim3 + j * dim2 * dim3 + k * dim3,
+                       input_buffer + tensor.calcOffset(coords), dim3 * sizeof(T));
+              }
+            }
+          }
+        }
+        else
+        {
+          // TODO Support from nhwc to nchw
+          auto feature = _shape.asFeature(model::Layout::NHWC);
+
+          const util::feature::nchw::View<T> from{&tensor};
+          util::feature::nhwc::View<T> into{feature, _output_buffer, _output_size};
+
+          ::nnfw::misc::feature::iterate(feature)
+              << [&](uint32_t batch, uint32_t ch, uint32_t row, uint32_t col) {
+                   const auto value = from.at(batch, ch, row, col);
+                   into.at(batch, ch, row, col) = value;
+                 };
+        }
+        break;
+      }
+      default:
+        throw std::runtime_error("NYI");
+        break;
+    }
+  }
+
+private:
+  T *_output_buffer;
+  const size_t _output_size;
+  const model::Shape _shape;
+  const bool _copy;
+};
+
+template <typename T> class PermutateSink final : public ITemplSink<T>
+{
+public:
+  PermutateSink(void *output_buffer, const size_t &output_size, const model::Shape &shape)
+      : ITemplSink<T>(output_buffer, output_size, shape, false)
+  {
+  }
+
+public:
+  void pull(neurun::backend::operand::ITensor &tensor) const override
+  {
+    ITemplSink<T>::pullUnif(tensor);
+  }
+};
+
+// Only supports NHWC format front-end(NNAPI) now
+template <typename T> class CopySink final : public ITemplSink<T>
+{
+public:
+  CopySink(void *output_buffer, const size_t &output_size, const model::Shape &shape)
+      : ITemplSink<T>(output_buffer, output_size, shape, true)
+  {
+  }
+
+public:
+  void pull(neurun::backend::operand::ITensor &tensor) const override
+  {
+    ITemplSink<T>::pullUnif(tensor);
+  }
+};
+
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_SINK_H__
diff --git a/runtimes/neurun/core/src/exec/Source.h b/runtimes/neurun/core/src/exec/Source.h
new file mode 100644
index 000000000..5b914f714
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/Source.h
@@ -0,0 +1,187 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_EXEC_SOURCE_H__
+#define __NEURUN_EXEC_SOURCE_H__
+
+#include <cassert>
+
+#include "cpp14/memory.h"
+#include "util/feature/nchw/View.h"
+#include "util/feature/nhwc/Reader.h"
+#include "util/Utils.h"
+#include <misc/feature/IndexIterator.h>
+#include "model/Shape.h"
+
+namespace neurun
+{
+namespace exec
+{
+
+struct ISource
+{
+  virtual ~ISource() = default;
+
+  virtual void push(::neurun::backend::operand::ITensor &tensor) const = 0;
+};
+
+// Create second lever inheritance: the first lever is used as a reference type in use-case places
+template <typename T> class ITemplSource : public ISource
+{
+public:
+  ITemplSource(const void *input_buffer, const size_t &input_size, const model::Shape &shape,
+               const bool copy)
+      : _input_buffer{reinterpret_cast<const T *>(input_buffer)}, _input_size{input_size},
+        _shape{shape}, _copy(copy)
+  {
+  }
+
+  virtual void push(::neurun::backend::operand::ITensor &tensor) const = 0;
+
+protected:
+  void pushUnif(neurun::backend::operand::ITensor &tensor) const
+  {
+    auto output_buffer = tensor.buffer();
+    auto rank = _shape.rank();
+
+    if (!tensor.has_padding() && rank < 4 + _copy)
+    {
+      memcpy(output_buffer, _input_buffer, _input_size);
+      return;
+    }
+
+    switch (rank)
+    {
+      case 0:
+      case 1:
+      {
+        memcpy(output_buffer, _input_buffer, _input_size);
+        break;
+      }
+      case 2:
+      {
+        const int32_t copy_len = _shape.dim(1);
+
+        for (auto i = 0; i < _shape.dim(0); ++i)
+        {
+          neurun::util::Coordinates coords{i, 0};
+          memcpy(output_buffer + tensor.calcOffset(coords), _input_buffer + i * copy_len,
+                 copy_len * sizeof(T));
+        }
+        break;
+      }
+      case 3:
+      {
+        const int32_t dim1 = _shape.dim(1);
+        const int32_t dim2 = _shape.dim(2);
+
+        for (auto i = 0; i < _shape.dim(0); ++i)
+        {
+          for (auto j = 0; j < _shape.dim(1); ++j)
+          {
+            neurun::util::Coordinates coords{i, j, 0};
+            memcpy(output_buffer + tensor.calcOffset(coords),
+                   _input_buffer + i * dim1 * dim2 + j * dim2, dim2 * sizeof(T));
+          }
+        }
+        break;
+      }
+      case 4:
+      {
+        if (_copy)
+        {
+          const int32_t dim1 = _shape.dim(1);
+          const int32_t dim2 = _shape.dim(2);
+          const int32_t dim3 = _shape.dim(3);
+          for (auto i = 0; i < _shape.dim(0); ++i)
+          {
+            for (auto j = 0; j < _shape.dim(1); ++j)
+            {
+              for (auto k = 0; k < _shape.dim(2); ++k)
+              {
+                neurun::util::Coordinates coords{i, j, k, 0};
+                memcpy(output_buffer + tensor.calcOffset(coords),
+                       _input_buffer + i * dim1 * dim2 * dim3 + j * dim2 * dim3 + k * dim3,
+                       dim3 * sizeof(T));
+              }
+            }
+          }
+        }
+        else
+        {
+          auto feature = _shape.asFeature(model::Layout::NHWC);
+
+          const util::feature::nhwc::Reader<T> from{feature, _input_buffer, _input_size};
+          util::feature::nchw::View<T> into{&tensor};
+
+          ::nnfw::misc::feature::iterate(feature)
+              << [&](uint32_t batch, uint32_t ch, uint32_t row, uint32_t col) {
+                   const auto value = from.at(batch, ch, row, col);
+                   into.at(batch, ch, row, col) = value;
+                 };
+        }
+
+        break;
+      }
+      default:
+        throw std::runtime_error("NYI");
+        break;
+    }
+  }
+
+private:
+  const T *_input_buffer;
+  const size_t _input_size;
+  const model::Shape _shape;
+  const bool _copy;
+};
+
+template <typename T> class PermutateSource final : public ITemplSource<T>
+{
+public:
+  PermutateSource(const void *input_buffer, const size_t &input_size, const model::Shape &shape)
+      : ITemplSource<T>(input_buffer, input_size, shape, false)
+  {
+  }
+
+public:
+  void push(neurun::backend::operand::ITensor &tensor) const override
+  {
+    // do NHWC_TO_NCHW permutation
+    ITemplSource<T>::pushUnif(tensor);
+  }
+};
+
+// Only supports NHWC format front-end(NNAPI) now
+template <typename T> class CopySource final : public ITemplSource<T>
+{
+public:
+  CopySource(const void *input_buffer, const size_t &input_size, const model::Shape &shape)
+      : ITemplSource<T>(input_buffer, input_size, shape, true)
+  {
+  }
+
+public:
+  void push(neurun::backend::operand::ITensor &tensor) const override
+  {
+    ITemplSource<T>::pushUnif(tensor);
+  }
+};
+
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_SOURCE_H__
diff --git a/runtimes/neurun/core/src/exec/interp/Buffer.h b/runtimes/neurun/core/src/exec/interp/Buffer.h
new file mode 100644
index 000000000..3528e0819
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/Buffer.h
@@ -0,0 +1,94 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file  Buffer.h
+ * @brief This file contains Buffer interface and InternalBuffer, ExternalBuffer class
+ */
+#ifndef __NEURUN_EXEC_INTERP_BUFFER_H__
+#define __NEURUN_EXEC_INTERP_BUFFER_H__
+
+#include <cpp14/memory.h>
+
+#include "model/Data.h"
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+
+/**
+ * @brief Interface for writable data area
+ */
+class Buffer : public model::Data
+{
+public:
+  /**
+   * @brief   Return writable pointer for data area
+   * @return  Writable pointer
+   */
+  virtual uint8_t *baseWritable(void) const = 0;
+};
+
+/**
+ * @brief Class for internally allocated data area
+ */
+class InternalBuffer final : public Buffer
+{
+public:
+  InternalBuffer(size_t size) : _base{nnfw::cpp14::make_unique<uint8_t[]>(size)}, _size{size}
+  {
+    // DO NOTHING
+  }
+
+public:
+  size_t size(void) const override { return _size; }
+  const uint8_t *base(void) const override { return _base.get(); }
+  uint8_t *baseWritable(void) const override { return _base.get(); }
+
+private:
+  std::unique_ptr<uint8_t[]> _base;
+  size_t _size;
+};
+
+/**
+ * @brief Class for data area from outside
+ */
+class ExternalBuffer final : public Buffer
+{
+public:
+  ExternalBuffer(uint8_t *base, size_t size) : _base{base}, _size{size}
+  {
+    // DO NOTHING
+  }
+
+public:
+  size_t size(void) const override { return _size; }
+  const uint8_t *base(void) const override { return _base; }
+  uint8_t *baseWritable(void) const override { return _base; }
+
+private:
+  uint8_t *_base;
+  size_t _size;
+};
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_INTERP_BUFFER_H__
diff --git a/runtimes/neurun/core/src/exec/interp/ExecEnv.h b/runtimes/neurun/core/src/exec/interp/ExecEnv.h
new file mode 100644
index 000000000..c270d723c
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/ExecEnv.h
@@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file  ExecEnv.h
+ * @brief This file contains ExecEnv to access interpreter tensor and execution status
+ */
+#ifndef __NEURUN_EXEC_INTERP_EXEC_ENV_H_
+#define __NEURUN_EXEC_INTERP_EXEC_ENV_H_
+
+#include <unordered_set>
+
+#include "model/Model.h"
+#include "Tensor.h"
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+
+/**
+ * @brief Class to gather interpreter execution environment
+ *        Each interpreter instance own execution environment
+ */
+class ExecEnv
+{
+public:
+  /**
+   * @brief Construct a new Exec Env object (deleted)
+   */
+  ExecEnv(void) = delete;
+  /**
+   * @brief Construct a new ExecEnv object
+   * @param[in] model Model to execute by interpreter
+   */
+  ExecEnv(const std::shared_ptr<const model::Model> &model) : _model{model}
+  {
+    // DO NOTHING
+  }
+
+public:
+  /**
+   * @brief   Return model to execute
+   * @return  Model
+   */
+  const model::Model &model(void) const { return *_model; }
+  /**
+   * @brief     Assign tensor to environment which have allocated or assigned buffer
+   * @param[in] index   Tensor index
+   * @param[in] tensor  Tensor
+   */
+  void assignTensor(const model::OperandIndex index, std::shared_ptr<ITensor> tensor)
+  {
+    assert(tensor->bufferRO() != nullptr);
+    _tensors.emplace(index, tensor);
+  }
+
+  /**
+   * @brief     Return tensor pointer in environment
+   * @param[in] index Tensor index
+   * @return    Tensor pointer
+   */
+  const ITensor *tensorAt(const model::OperandIndex index) const
+  {
+    return _tensors.at(index).get();
+  }
+
+  /**
+   * @brief     Check environment contains tensor
+   * @param[in] index Tensor index
+   * @return    @c true if environment contain tensor, otherwise @c false
+   */
+  bool contains(const model::OperandIndex index) const
+  {
+    return (_tensors.find(index) != _tensors.end());
+  }
+
+  /**
+   * @brief     Allocate tensor using operand info
+   * @param[in] index     Tensor index
+   * @param[in] info      Operand info
+   * @note      If already allocated, just return
+   * @TODO      More smart allocation policy
+   */
+  void allocateIfNeeded(const model::OperandIndex index, const model::OperandInfo &info)
+  {
+    // already allocated, or constant
+    if (contains(index))
+    {
+      return;
+    }
+
+    auto tensor = std::make_shared<Tensor>(info);
+    tensor->setBuffer(std::make_shared<InternalBuffer>(tensor->total_size()));
+    assignTensor(index, tensor);
+    _buffers.insert(index);
+  }
+
+  /**
+   * @brief     Allocate read-only tensor and share data with other tensor
+   * @param[in] index           Tensor index
+   * @param[in] info            Operand info
+   * @param[in] index_to_share  Tensor index that have data to share
+   */
+  void allocateAndShareIfNeeded(const model::OperandIndex index, const model::OperandInfo &info,
+                                const model::OperandIndex index_to_share)
+  {
+    if (!contains(index_to_share))
+    {
+      throw std::runtime_error{"Cannot find tensor to share data"};
+    }
+
+    // already allocated
+    if (contains(index))
+    {
+      return;
+    }
+    else
+    {
+      auto tensor = std::make_shared<ROTensor>(info);
+      tensor->setData(tensorAt(index_to_share)->shareData());
+      assignTensor(index, tensor);
+      _buffers.insert(index);
+    }
+  }
+
+  /**
+   * @brief     Free buffer if allocated by allocateIfNeed
+   * @param[in] index Tensor index
+   * @note      If allocated by outside, just return
+   */
+  void freeIfAllocated(const model::OperandIndex index)
+  {
+    if (_buffers.find(index) != _buffers.end())
+    {
+      _tensors.at(index)->releaseData();
+    }
+  }
+
+private:
+  std::shared_ptr<const model::Model> _model;
+  // Tensor map to use in interpreter
+  // It should map tensors that have allocated or assigned buffer pointer
+  std::unordered_map<model::OperandIndex, std::shared_ptr<ITensor>> _tensors;
+  // Tensors allocated by allocateIfNeed (buffer)
+  std::unordered_set<model::OperandIndex> _buffers;
+};
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_INTERP_EXEC_ENV_H_
diff --git a/runtimes/neurun/core/src/exec/interp/ExecManager.cc b/runtimes/neurun/core/src/exec/interp/ExecManager.cc
new file mode 100644
index 000000000..96f503eea
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/ExecManager.cc
@@ -0,0 +1,125 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ExecManager.h"
+#include "ExecEnv.h"
+#include "Interpreter.h"
+
+#include "util/logging.h"
+
+#include <cpp14/memory.h>
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+
+void ExecManager::execute(const IODescription &desc)
+{
+  /************************************************************************
+   * Prepare execution model (submodel)
+     It may execute divided model
+     but now consider model inference is done at interpreter
+   ***********************************************************************/
+  model::OperandIndexMap<std::shared_ptr<ITensor>> tensor_map;
+
+  for (uint32_t n = 0; n < _model->inputs.size(); n++)
+  {
+    neurun::model::IOIndex index{n};
+    const auto input_index = _model->inputs.at(index);
+    const auto &input = *desc.inputs.at(n);
+
+    auto input_tensor = std::make_shared<ROTensor>(input.info);
+    input_tensor->setData(std::make_shared<const model::ExternalData>(
+        reinterpret_cast<const uint8_t *>(input.buffer), input.size));
+    tensor_map[input_index] = input_tensor;
+  }
+
+  for (uint32_t n = 0; n < _model->outputs.size(); n++)
+  {
+    neurun::model::IOIndex index{n};
+    const auto output_index = _model->outputs.at(index);
+    const auto &output = *desc.outputs.at(n);
+
+    auto output_tensor = std::make_shared<Tensor>(output.info);
+    output_tensor->setBuffer(
+        std::make_shared<ExternalBuffer>(reinterpret_cast<uint8_t *>(output.buffer), output.size));
+    tensor_map[output_index] = output_tensor;
+  }
+
+  /************************************************************************
+   * Prepare execution environment
+     Execution environment will be assigned to invoked interpreter instance
+   ***********************************************************************/
+
+  std::unique_ptr<ExecEnv> interp_env = nnfw::cpp14::make_unique<ExecEnv>(_model);
+
+  // Assign input tensor into interpreter execution environment
+  for (auto index : _model->inputs)
+  {
+    if (tensor_map.find(index) != tensor_map.end())
+    {
+      VERBOSE(INTERPRETER) << "Assign input tensor. operand index:" << index.value() << std::endl;
+      interp_env->assignTensor(index, tensor_map.at(index));
+    }
+  }
+
+  // Assign output tensor into interpreter execution environment
+  for (auto index : _model->outputs)
+  {
+    if (tensor_map.find(index) != tensor_map.end())
+    {
+      VERBOSE(INTERPRETER) << "Assign output tensor. operand index: " << index.value() << std::endl;
+      interp_env->assignTensor(index, tensor_map.at(index));
+    }
+  }
+
+  // Allocate constant tensor
+  _model->operands.iterate([&](const model::OperandIndex &ind, const model::Operand &obj) {
+    if (obj.isConstant())
+    {
+      VERBOSE(INTERPRETER) << "Allocate and assign constant tensor. operand index:" << ind.value()
+                           << std::endl;
+
+      auto const_tensor = std::make_shared<ROTensor>(obj.info());
+      // Assume that interpreter's tensor layout is same with model (NHWC)
+      const_tensor->setData(
+          std::make_shared<model::ExternalData>(obj.data().base(), obj.info().total_size()));
+      interp_env->assignTensor(ind, const_tensor);
+    }
+  });
+
+  /*****************************************************************************
+   * Invoke interpreter
+   ****************************************************************************/
+
+  Interpreter interp(std::move(interp_env));
+  interp.run();
+
+  /*****************************************************************************
+   * Invoked interpreter run is finished
+   ****************************************************************************/
+
+  // If interpreter execute submodel
+  //  1. Get tensor output of submodel into tensor_map to save result
+  //  2. Generate new ExecEnv for next interpretation
+}
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/interp/ExecManager.h b/runtimes/neurun/core/src/exec/interp/ExecManager.h
new file mode 100644
index 000000000..77486dcaf
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/ExecManager.h
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file  ExecManager.h
+ * @brief This file contains ExecManager class\n
+ *        to manage interpreter execution and environment
+ */
+#ifndef __NEURUN_EXEC_INTERP_EXEC_MANAGER_H_
+#define __NEURUN_EXEC_INTERP_EXEC_MANAGER_H_
+
+#include "model/OperandIndexMap.h"
+#include "model/OperationIndexMap.h"
+#include "exec/IExecutor.h"
+#include "Tensor.h"
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+
+/**
+ * @brief Class to execute model using interpreter
+ */
+class ExecManager final : public IExecutor
+{
+public:
+  ExecManager(const std::shared_ptr<const model::Model> &model) : _model{model}
+  {
+    // DO NOTHING
+  }
+
+public:
+  /**
+   * @brief   Return graph model
+   * @return  Graph model
+   */
+  const model::Model &model() override { return *_model; }
+  void setIndexedRanks(std::shared_ptr<model::OperationIndexMap<int64_t>>) override{
+      // Not implemented
+  };
+  /**
+   * @brief  Start execution
+   * @note   It should be called after setting input and output buffer
+   */
+  void execute(const IODescription &desc) final;
+
+private:
+  std::shared_ptr<const model::Model> _model;
+  model::OperandIndexMap<std::shared_ptr<ITensor>> _tensor_map;
+};
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_INTERP_EXEC_MANAGER_H_
diff --git a/runtimes/neurun/core/src/exec/interp/Interpreter.cc b/runtimes/neurun/core/src/exec/interp/Interpreter.cc
new file mode 100644
index 000000000..81de27c36
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/Interpreter.cc
@@ -0,0 +1,202 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "Interpreter.h"
+
+#include <stack>
+#include <unordered_set>
+
+#include "Registration.h"
+
+#include "model/OperandIndexMap.h"
+#include "util/logging.h"
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+
+// TODO more structured execution kernel implementation
+// TODO use cker for execution
+// TODO divide tensor prepare and execution
+// TODO introduce memory manager (buffer allocate and free)
+class OperationExecutor : model::OperationVisitor
+{
+public:
+#define OP(InternalName, IsNnApi) InternalName,
+  enum class NodeName
+  {
+#include "model/Operations.lst"
+  };
+#undef OP
+
+public:
+  OperationExecutor(ExecEnv *env) : _env{env}
+  {
+    _kernels[NodeName::AddNode] = getAddNode();
+    _kernels[NodeName::Conv2DNode] = getConv2DNode();
+    _kernels[NodeName::MaxPool2DNode] = getMaxPool2DNode();
+    _kernels[NodeName::ConcatNode] = getConcatNode();
+    _kernels[NodeName::AvgPool2DNode] = getAvgPool2DNode();
+    _kernels[NodeName::FullyConnectedNode] = getFullyConnectedNode();
+    _kernels[NodeName::SoftmaxNode] = getSoftMaxNode();
+    _kernels[NodeName::ReshapeNode] = getReshapeNode();
+    _kernels[NodeName::DepthwiseConv2DNode] = getDepthwiseConvNode();
+  }
+
+  void execute(const model::OperationIndex &idx)
+  {
+    const auto nodeName = _env->model().operations.at(idx).getName();
+    VERBOSE(INTERPRETER) << "Prepare output operands and execute " << nodeName
+                         << " operation (id: " << idx.value() << ")" << std::endl;
+    _env->model().operations.at(idx).accept(*this);
+  }
+
+private:
+#define OP(InternalName, IsNnApi)                                         \
+  virtual void visit(const model::operation::InternalName &node) override \
+  {                                                                       \
+    if (_kernels[NodeName::InternalName]->prepare != nullptr)             \
+    {                                                                     \
+      _kernels[NodeName::InternalName]->prepare(_env, node);              \
+    }                                                                     \
+    _kernels[NodeName::InternalName]->invoke(_env, node);                 \
+  }
+#include "model/Operations.lst"
+#undef OP
+
+private:
+  ExecEnv *_env;
+  std::unordered_map<NodeName, OpKernel *> _kernels;
+};
+
+void Interpreter::run()
+{
+  VERBOSE(INTERPRETER) << "Interpreter is invoked " << std::endl;
+
+  // operand_stack: save operands prepared to use
+  std::stack<model::OperandIndex> operand_stack;
+
+  // Note: We should push input first, then constant.
+  //       We use use-def for find operators ready to execution,
+  //       but Use-Def cannot handle parameters (maybe constant, but not always)
+  // Note: If all model inputs are constant, it may not work (depend on tensors' order).
+  //       But that scenario may not exist
+  for (auto ind : _env->model().inputs)
+  {
+    VERBOSE(INTERPRETER) << "Input: Push to operand stack " << ind.value() << std::endl;
+
+    operand_stack.push(ind);
+  }
+
+  _env->model().operands.iterate([&](const model::OperandIndex &ind, const model::Operand &obj) {
+    if (obj.isConstant())
+    {
+      VERBOSE(INTERPRETER) << "Constant: Push to operand stack " << ind.value() << std::endl;
+
+      operand_stack.push(ind);
+    }
+  });
+
+  // Execution
+  std::unordered_set<model::OperandIndex> ready_check;
+  std::unordered_set<model::OperationIndex> executed;
+  OperationExecutor executor{_env.get()};
+  while (!operand_stack.empty())
+  {
+    const auto current_operand_index = operand_stack.top();
+    operand_stack.pop();
+    VERBOSE(INTERPRETER) << "Poped operand " << current_operand_index.value()
+                         << " is checked ready to use" << std::endl;
+
+    assert(ready_check.find(current_operand_index) == ready_check.end());
+    ready_check.insert(current_operand_index);
+
+    // Find prepared operations by scan use of current operand
+    std::stack<model::OperationIndex> operation_stack;
+    const auto use_operators = _env->model().operands.at(current_operand_index).getUses();
+    for (auto use_operator : use_operators.list())
+    {
+      // Assumption: all parameters are ready to use
+      bool operator_ready = true;
+      for (auto input_index : _env->model().operations.at(use_operator).getInputs())
+      {
+        if (ready_check.find(input_index) == ready_check.end())
+        {
+          operator_ready = false;
+          break;
+        }
+      }
+
+      if (operator_ready)
+      {
+        VERBOSE(INTERPRETER) << "Ready to execute operation " << use_operator.value() << std::endl;
+        operation_stack.push(use_operator);
+      }
+    }
+
+    while (!operation_stack.empty())
+    {
+      const auto current_operation_index = operation_stack.top();
+      operation_stack.pop();
+      VERBOSE(INTERPRETER) << "Poped operation: " << current_operation_index.value() << "("
+                           << _env->model().operations.at(current_operation_index).getName() << ")"
+                           << std::endl;
+
+      // execution
+      // 1. Prepare output tensor
+      // 2. Call operation kernel
+      executor.execute(current_operation_index);
+      executed.insert(current_operation_index);
+
+      // 3. Push each output into operand stack
+      const auto def_operands = _env->model().operations.at(current_operation_index).getOutputs();
+      for (auto def_operand : def_operands)
+      {
+        VERBOSE(INTERPRETER) << "Buffer: Push to operand stack " << def_operand.value()
+                             << std::endl;
+        operand_stack.push(def_operand);
+      }
+
+      // 4. Free if lifetime of buffer operands used by input is finished
+      for (auto input_index : _env->model().operations.at(current_operation_index).getInputs())
+      {
+        const auto use_operators = _env->model().operands.at(input_index).getUses();
+        bool dead_buffer = true;
+        for (auto use_operator : use_operators.list())
+        {
+          if (executed.find(use_operator) == executed.end())
+          {
+            dead_buffer = false;
+            break;
+          }
+        }
+
+        if (dead_buffer)
+        {
+          _env->freeIfAllocated(input_index);
+        }
+      }
+    }
+  }
+}
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/interp/Interpreter.h b/runtimes/neurun/core/src/exec/interp/Interpreter.h
new file mode 100644
index 000000000..1b73592b3
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/Interpreter.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file  Interpreter.h
+ * @brief This file contains Interpreter class for interpretation
+ */
+#ifndef __NEURUN_EXEC_INTERP_INTERPRETER_H__
+#define __NEURUN_EXEC_INTERP_INTERPRETER_H__
+
+#include "ExecEnv.h"
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+
+/**
+ * @brief Class for interpretation
+ */
+class Interpreter
+{
+
+public:
+  /**
+   * @brief Construct a new Interpreter object (deleted)
+   */
+  Interpreter() = delete;
+  /**
+   * @brief     Construct a new Interpreter object
+   * @param[in] env Execution environment variable for interpreter object
+   */
+  Interpreter(std::unique_ptr<ExecEnv> env) : _env{std::move(env)}
+  {
+    // DO NOTHING
+  }
+
+public:
+  /**
+   * @brief Run interpreter until there is no operation to execute
+   */
+  void run();
+
+private:
+  std::unique_ptr<ExecEnv> _env;
+};
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_INTERP_INTERPRETER_H__
diff --git a/runtimes/neurun/core/src/exec/interp/Registration.h b/runtimes/neurun/core/src/exec/interp/Registration.h
new file mode 100644
index 000000000..37c591f9d
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/Registration.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_EXEC_INTERP_REGISTRATION_H__
+#define __NEURUN_EXEC_INTERP_REGISTRATION_H__
+
+#include "ExecEnv.h"
+
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+
+struct OpKernel
+{
+  std::function<void(ExecEnv *, const model::Operation &)> prepare;
+  std::function<void(const ExecEnv *, const model::Operation &)> invoke;
+};
+
+// Defined in operations/ directory
+OpKernel *getAddNode();
+OpKernel *getConv2DNode();
+OpKernel *getMaxPool2DNode();
+OpKernel *getConcatNode();
+OpKernel *getAvgPool2DNode();
+OpKernel *getFullyConnectedNode();
+OpKernel *getSoftMaxNode();
+OpKernel *getDepthwiseConvNode();
+OpKernel *getReshapeNode();
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_INTERP_REGISTRATION_H__
diff --git a/runtimes/neurun/core/src/exec/interp/Tensor.cc b/runtimes/neurun/core/src/exec/interp/Tensor.cc
new file mode 100644
index 000000000..becb73786
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/Tensor.cc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "Tensor.h"
+
+#define NO_USE(a) (void)(a)
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+
+size_t ROTensor::calcOffset(const neurun::util::Coordinates &coords) const
+{
+  NO_USE(coords);
+  throw std::runtime_error("offset_element_in_bytes is not supported for cpu::Tensor now.");
+}
+
+size_t Tensor::calcOffset(const neurun::util::Coordinates &coords) const
+{
+  NO_USE(coords);
+  throw std::runtime_error("offset_element_in_bytes is not supported for cpu::Tensor now.");
+}
+
+model::Layout ROTensor::layout() const
+{
+  // TODO Changes to return frontend layout
+  return model::Layout::NHWC;
+}
+
+model::Layout Tensor::layout() const
+{
+  // TODO Changes to return frontend layout
+  return model::Layout::NHWC;
+}
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/interp/Tensor.h b/runtimes/neurun/core/src/exec/interp/Tensor.h
new file mode 100644
index 000000000..c8237de1e
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/Tensor.h
@@ -0,0 +1,179 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file  Tensor.h
+ * @brief This file contains ITensor interface, ROTensor class, and Tensor class
+ */
+#ifndef __NEURUN_EXEC_INTERP_TENSOR_H__
+#define __NEURUN_EXEC_INTERP_TENSOR_H__
+
+#include "Buffer.h"
+
+#include "model/OperandInfo.h"
+#include "backend/operand/ITensor.h"
+#include "model/Layout.h"
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+
+/**
+ * @brief Interface to handle Tensor in interpreter
+ */
+class ITensor : public backend::operand::ITensor
+{
+public:
+  virtual ~ITensor() = default;
+
+public:
+  virtual uint8_t *buffer() const = 0;
+  /**
+   * @brief   Return shared pointer for buffer
+   * @return  Buffer shared pointer
+   */
+  virtual std::shared_ptr<const Buffer> shareBuffer() const = 0;
+  /**
+   * @brief   Return read-only buffer pointer
+   * @return  Read-only buffer pointer
+   */
+  virtual const uint8_t *bufferRO() const = 0;
+  /**
+   * @brief   Return shared pointer for data
+   * @return  Data shared pointer
+   */
+  virtual std::shared_ptr<const model::Data> shareData() const = 0;
+  /**
+   * @brief     Set internal/external buffer
+   * @param[in] buffer  Buffer pointer
+   */
+  virtual void setBuffer(std::shared_ptr<const Buffer> buffer) = 0;
+  /**
+   * @brief     Set data reference (including constant, input)
+   * @param[in] data  Data pointer
+   */
+  virtual void setData(std::shared_ptr<const model::Data> data) = 0;
+  virtual void releaseData() = 0;
+
+  virtual size_t total_size() const = 0;
+  virtual size_t dimension(size_t index) const = 0;
+  virtual size_t num_dimensions() const = 0;
+  virtual size_t calcOffset(const util::Coordinates &coords) const = 0;
+
+  virtual bool has_padding() const = 0;
+  /**
+   * @brief   Return data type of tensor
+   * @return  Data type of tensor
+   */
+  virtual model::DataType data_type() const = 0;
+  /**
+   * @brief   Return TensorInfo
+   * @return  TensorInfo
+   */
+  virtual const model::OperandInfo &tensorInfo() const = 0;
+  /**
+   * @brief   Return number of elements
+   * @return  Number of elements
+   */
+  virtual uint64_t num_elements() const = 0;
+};
+
+/**
+ * @brief Class to handle tensor in interpreter as read-only
+ */
+class ROTensor final : public ITensor
+{
+public:
+  ROTensor() = delete;
+  ROTensor(const model::OperandInfo &info) : _info(info)
+  {
+    // DO NOTHING
+  }
+
+public:
+  uint8_t *buffer() const override { throw std::runtime_error{"Read only tensor"}; }
+  std::shared_ptr<const Buffer> shareBuffer() const override
+  {
+    throw std::runtime_error{"Read only tensor"};
+  }
+  const uint8_t *bufferRO() const override { return _data->base(); }
+  std::shared_ptr<const model::Data> shareData() const override { return _data; }
+  void setBuffer(std::shared_ptr<const Buffer> buffer) override { _data = buffer; }
+  void setData(std::shared_ptr<const model::Data> data) override { _data = data; }
+  void releaseData() override { _data = nullptr; }
+
+  size_t total_size() const override { return _info.total_size(); }
+  size_t dimension(size_t index) const override { return _info.shape().dim(index); }
+  size_t num_dimensions() const override { return _info.shape().rank(); }
+  size_t calcOffset(const util::Coordinates &coords) const override;
+  model::Layout layout() const override;
+  bool has_padding() const override { return false; }
+  model::DataType data_type() const override { return _info.typeInfo().type(); }
+  const model::OperandInfo &tensorInfo() const override { return _info; }
+  uint64_t num_elements() const override { return _info.shape().num_elements(); };
+
+private:
+  const model::OperandInfo _info;
+  std::shared_ptr<const model::Data> _data{nullptr};
+};
+
+/**
+ * @brief Class to handle tensor in interpreter as writable
+ */
+class Tensor final : public ITensor
+{
+public:
+  Tensor() = delete;
+  Tensor(const model::OperandInfo &info) : _info(info)
+  {
+    // DO NOTHING
+  }
+
+public:
+  uint8_t *buffer() const override { return _buffer->baseWritable(); }
+  std::shared_ptr<const Buffer> shareBuffer() const override { return _buffer; };
+  const uint8_t *bufferRO() const override { return _buffer->base(); }
+  std::shared_ptr<const model::Data> shareData() const override { return _buffer; }
+  void setBuffer(std::shared_ptr<const Buffer> buffer) override { _buffer = buffer; }
+  void setData(std::shared_ptr<const model::Data>) override
+  {
+    throw std::runtime_error{"Passed data may read-only"};
+  }
+  void releaseData() override { _buffer = nullptr; }
+
+  size_t total_size() const override { return _info.total_size(); }
+  size_t dimension(size_t index) const override { return _info.shape().dim(index); }
+  size_t num_dimensions() const override { return _info.shape().rank(); }
+  size_t calcOffset(const util::Coordinates &coords) const override;
+  model::Layout layout() const override;
+  bool has_padding() const override { return false; }
+  model::DataType data_type() const override { return _info.typeInfo().type(); }
+  const model::OperandInfo &tensorInfo() const override { return _info; }
+  uint64_t num_elements() const override { return _info.shape().num_elements(); };
+
+private:
+  const model::OperandInfo _info;
+  std::shared_ptr<const Buffer> _buffer{nullptr};
+};
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_INTERP_TENSOR_H__
diff --git a/runtimes/neurun/core/src/exec/interp/operations/Add.cc b/runtimes/neurun/core/src/exec/interp/operations/Add.cc
new file mode 100644
index 000000000..666c3cba6
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/operations/Add.cc
@@ -0,0 +1,146 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <cker/operation/Add.h>
+
+#include "OperationUtil.h"
+
+#include "exec/interp/Registration.h"
+#include "model/operation/AddNode.h"
+#include "misc/polymorphic_downcast.h"
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+namespace add
+{
+
+void prepareAdd(ExecEnv *env, const model::Operation &node)
+{
+  const auto &add_node = nnfw::misc::polymorphic_downcast<const model::operation::AddNode &>(node);
+
+  const auto lhs_index = node.getInputs().at(add_node.LHS);
+  const auto rhs_index = node.getInputs().at(add_node.RHS);
+  const auto out_index = node.getOutputs().at(0);
+
+  // Check lhs shape is same with rhs (with broadcast)
+  const auto lhs_tensor = env->tensorAt(lhs_index);
+  const auto rhs_tensor = env->tensorAt(rhs_index);
+  UNUSED_RELEASE(rhs_tensor);
+
+  // Check shape and type lhs is same with rhs
+  // TODO Util function to compare TensorInfo
+  // TODO Handle broadcasting
+  assert(lhs_tensor->data_type() == rhs_tensor->data_type());
+  assert(lhs_tensor->num_dimensions() == rhs_tensor->num_dimensions());
+  for (uint32_t i = 0; i < lhs_tensor->num_dimensions(); i++)
+  {
+    assert(lhs_tensor->dimension(i) == rhs_tensor->dimension(i));
+  }
+
+  // Output's shape and type should be same with input (don't consider broadcast)
+  auto output_info = lhs_tensor->tensorInfo();
+  // We can handle already allocated (ex. model output)
+  env->allocateIfNeeded(out_index, output_info);
+
+  auto out_tensor = env->tensorAt(out_index);
+  UNUSED_RELEASE(out_tensor);
+
+  // Check shape and type lhs is same with output
+  // TODO Util function to compare TensorInfo
+  // TODO Handle broadcasting
+  assert(lhs_tensor->data_type() == out_tensor->data_type());
+  assert(lhs_tensor->num_dimensions() == out_tensor->num_dimensions());
+  for (uint32_t i = 0; i < lhs_tensor->num_dimensions(); i++)
+  {
+    assert(lhs_tensor->dimension(i) == out_tensor->dimension(i));
+  }
+}
+
+inline void setActivationParams(float min, float max, nnfw::cker::AddParam *params)
+{
+  params->float_activation_min = min;
+  params->float_activation_max = max;
+}
+
+inline void setActivationParams(int32_t min, int32_t max, nnfw::cker::AddParam *params)
+{
+  params->quantized_activation_min = min;
+  params->quantized_activation_max = max;
+}
+
+template <typename raw_type>
+void invoke(const ITensor *lhs_tensor, const ITensor *rhs_tensor, const ITensor *out_tensor,
+            const model::operation::AddNode::Param &param)
+{
+  const auto lhs_buffer = lhs_tensor->bufferRO();
+  const auto rhs_buffer = rhs_tensor->bufferRO();
+  auto out_buffer = out_tensor->buffer();
+
+  nnfw::cker::AddParam cker_param;
+  raw_type activation_min, activation_max;
+  calculateActivationRange(param.activation, &activation_min, &activation_max);
+  setActivationParams(activation_min, activation_max, &cker_param);
+  const auto lhs_shape = convertShape(lhs_tensor->tensorInfo().shape());
+  const auto rhs_shape = convertShape(rhs_tensor->tensorInfo().shape());
+  const auto out_shape = convertShape(out_tensor->tensorInfo().shape());
+  const raw_type *lhs_ptr = reinterpret_cast<const raw_type *>(lhs_buffer);
+  const raw_type *rhs_ptr = reinterpret_cast<const raw_type *>(rhs_buffer);
+  raw_type *out_ptr = reinterpret_cast<raw_type *>(out_buffer);
+
+  // Calculate
+  nnfw::cker::Add(cker_param, lhs_shape, lhs_ptr, rhs_shape, rhs_ptr, out_shape, out_ptr);
+}
+
+void invokeAdd(const ExecEnv *env, const model::Operation &node)
+{
+  const auto &add_node = nnfw::misc::polymorphic_downcast<const model::operation::AddNode &>(node);
+
+  const auto lhs_index = node.getInputs().at(add_node.LHS);
+  const auto rhs_index = node.getInputs().at(add_node.RHS);
+  const auto out_index = node.getOutputs().at(0);
+  const auto lhs_tensor = env->tensorAt(lhs_index);
+  const auto rhs_tensor = env->tensorAt(rhs_index);
+  const auto out_tensor = env->tensorAt(out_index);
+  const auto data_type = lhs_tensor->data_type();
+
+  if (data_type == model::DataType::INT32)
+  {
+    invoke<int32_t>(lhs_tensor, rhs_tensor, out_tensor, add_node.param());
+  }
+  else if (data_type == model::DataType::FLOAT32)
+  {
+    invoke<float>(lhs_tensor, rhs_tensor, out_tensor, add_node.param());
+  }
+  else
+  {
+    throw std::runtime_error{"NYI: Unsupported data type"};
+  }
+}
+} // namespace add
+
+OpKernel *getAddNode()
+{
+  static OpKernel kernel = {add::prepareAdd, add::invokeAdd};
+  return &kernel;
+}
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/interp/operations/AvgPool2D.cc b/runtimes/neurun/core/src/exec/interp/operations/AvgPool2D.cc
new file mode 100644
index 000000000..b6dfba85c
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/operations/AvgPool2D.cc
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <cker/operation/AveragePool.h>
+
+#include "OperationUtil.h"
+
+#include "exec/interp/Registration.h"
+#include "model/operation/AvgPool2DNode.h"
+#include "util/Utils.h"
+#include "util/Padding.h"
+#include "util/ShapeInference.h"
+#include "misc/polymorphic_downcast.h"
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+namespace avgpool2d
+{
+
+void prepareAvgPool2D(ExecEnv *env, const model::Operation &node)
+{
+  const auto in_index = node.getInputs().at(0);
+  const auto out_index = node.getOutputs().at(0);
+
+  const auto in_tensor = env->tensorAt(in_index);
+  UNUSED_RELEASE(in_tensor);
+
+  assert(in_tensor->num_dimensions() == 4);
+
+  const auto output_info = env->model().operands.at(out_index).info();
+  if (output_info.total_size() == 0)
+  {
+    // Handle unspecified output shape
+    const auto &avgpool_node =
+        nnfw::misc::polymorphic_downcast<const model::operation::AvgPool2DNode &>(node);
+    const auto infered_output_shapes =
+        shape_inference::inferAvgPoolShape(in_tensor->tensorInfo().shape(), avgpool_node.param());
+    env->allocateIfNeeded(out_index, {infered_output_shapes[0], output_info.typeInfo()});
+  }
+  else
+  {
+    env->allocateIfNeeded(out_index, output_info);
+  }
+
+  auto out_tensor = env->tensorAt(out_index);
+  UNUSED_RELEASE(out_tensor);
+
+  // Handle same ifm & ofm data type only
+  assert(in_tensor->data_type() == out_tensor->data_type());
+  assert(out_tensor->num_dimensions() == 4);
+}
+
+void invoke(const ITensor *in_tensor, const ITensor *out_tensor,
+            const model::operation::AvgPool2DNode::Param &param)
+{
+  // TODO Support NCHW frontend
+  const auto ifm_shape = in_tensor->tensorInfo().shape().asFeature(model::Layout::NHWC);
+  const auto ofm_shape = out_tensor->tensorInfo().shape().asFeature(model::Layout::NHWC);
+  const auto padding = neurun::util::calculatePadding(param.padding, ifm_shape, ofm_shape,
+                                                      param.stride, param.kw, param.kh);
+  // Calculate
+  nnfw::cker::AveragePoolParams cker_param;
+  calculateActivationRange(param.activation, &cker_param.float_activation_min,
+                           &cker_param.float_activation_max);
+  cker_param.filter_width = param.kw;
+  cker_param.filter_height = param.kh;
+  cker_param.padding_values.width = padding.left;
+  cker_param.padding_values.height = padding.top;
+  cker_param.stride_width = param.stride.horizontal;
+  cker_param.stride_height = param.stride.vertical;
+
+  const auto in_shape = convertShape(in_tensor->tensorInfo().shape());
+  const auto out_shape = convertShape(out_tensor->tensorInfo().shape());
+  const float *in_ptr = reinterpret_cast<const float *>(in_tensor->bufferRO());
+  float *out_ptr = reinterpret_cast<float *>(out_tensor->buffer());
+
+  nnfw::cker::AveragePool(cker_param, in_shape, in_ptr, out_shape, out_ptr);
+}
+
+void invokeAvgPool2D(const ExecEnv *env, const model::Operation &node)
+{
+  const auto &avgpool_node =
+      nnfw::misc::polymorphic_downcast<const model::operation::AvgPool2DNode &>(node);
+
+  const auto in_index = node.getInputs().at(0);
+  const auto out_index = node.getOutputs().at(0);
+
+  // Check lhs shape is same with rhs (with broadcast)
+  const auto in_tensor = env->tensorAt(in_index);
+  const auto out_tensor = env->tensorAt(out_index);
+
+  const auto data_type = in_tensor->data_type();
+  if (data_type == model::DataType::FLOAT32)
+  {
+    invoke(in_tensor, out_tensor, avgpool_node.param());
+  }
+  else
+  {
+    throw std::runtime_error{"NYI: Support float only"};
+  }
+}
+} // namespace avgpool2d
+
+OpKernel *getAvgPool2DNode()
+{
+  static OpKernel kernel = {avgpool2d::prepareAvgPool2D, avgpool2d::invokeAvgPool2D};
+  return &kernel;
+}
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/interp/operations/Concat.cc b/runtimes/neurun/core/src/exec/interp/operations/Concat.cc
new file mode 100644
index 000000000..09a86c179
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/operations/Concat.cc
@@ -0,0 +1,152 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <cker/operation/Concatenation.h>
+
+#include "OperationUtil.h"
+
+#include "exec/interp/Registration.h"
+#include "model/operation/ConcatNode.h"
+#include "misc/polymorphic_downcast.h"
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+namespace concat
+{
+
+void prepareConcat(ExecEnv *env, const model::Operation &node)
+{
+  const auto &concat_node =
+      nnfw::misc::polymorphic_downcast<const model::operation::ConcatNode &>(node);
+
+  const auto first_index = node.getInputs().at(0);
+  const auto out_index = node.getOutputs().at(0);
+
+  const auto first_tensor = env->tensorAt(first_index);
+  uint32_t out_axis_dimension = 0;
+  const int32_t axis_raw = concat_node.param().axis;
+  const uint32_t axis = (axis_raw < 0) ? (axis_raw + first_tensor->num_dimensions()) : axis_raw;
+
+  // All inputs shape should be same except axis dimension
+  // All inputs type should be same
+  for (auto input : node.getInputs())
+  {
+    assert(first_tensor->num_dimensions() == env->tensorAt(input)->num_dimensions());
+    assert(first_tensor->data_type() == env->tensorAt(input)->data_type());
+    for (uint32_t i = 0; i < first_tensor->num_dimensions(); i++)
+    {
+      if (i == axis)
+      {
+        out_axis_dimension += env->tensorAt(input)->dimension(i);
+        continue;
+      }
+      assert(first_tensor->dimension(i) == env->tensorAt(input)->dimension(i));
+    }
+  }
+
+  // Make output tensor info using first input tensor info, and accumulated axis dimension value
+  auto out_shape = first_tensor->tensorInfo().shape();
+  out_shape.dim(axis) = out_axis_dimension;
+  env->allocateIfNeeded(out_index,
+                        model::OperandInfo{out_shape, first_tensor->tensorInfo().typeInfo()});
+
+  auto out_tensor = env->tensorAt(out_index);
+  UNUSED_RELEASE(out_tensor);
+
+  // Output shape should be same with input except axis dimension
+  // Output type should be same with input
+  assert(first_tensor->data_type() == out_tensor->data_type());
+  for (uint32_t i = 0; i < first_tensor->num_dimensions(); i++)
+  {
+    if (i == axis)
+    {
+      continue;
+    }
+    assert(first_tensor->dimension(i) == out_tensor->dimension(i));
+  }
+}
+
+void invoke(const std::vector<const ITensor *> in_tensors, const ITensor *out_tensor, uint32_t axis)
+{
+  const uint32_t count = in_tensors.size();
+
+  // Calculate
+  nnfw::cker::ConcatenationParams cker_param;
+  cker_param.axis = (int8_t)axis;
+  cker_param.inputs_count = count;
+
+  const auto out_shape = convertShape(out_tensor->tensorInfo().shape());
+
+  std::vector<nnfw::cker::Shape> in_shapes;
+  std::vector<const nnfw::cker::Shape *> in_shape_ptrs;
+  in_shapes.reserve(count);
+  in_shape_ptrs.reserve(count);
+  std::vector<const float *> in_ptrs;
+  for (uint32_t i = 0; i < count; i++)
+  {
+    in_shapes.push_back(convertShape(in_tensors[i]->tensorInfo().shape()));
+    in_shape_ptrs.push_back(&in_shapes[i]);
+    in_ptrs.push_back(reinterpret_cast<const float *>(in_tensors[i]->bufferRO()));
+  }
+
+  auto out_buffer = out_tensor->buffer();
+  float *out_ptr = reinterpret_cast<float *>(out_buffer);
+
+  nnfw::cker::Concatenation<float>(cker_param, in_shape_ptrs.data(), in_ptrs.data(), out_shape,
+                                   out_ptr);
+}
+
+void invokeConcat(const ExecEnv *env, const model::Operation &node)
+{
+  const auto &concat_node =
+      nnfw::misc::polymorphic_downcast<const model::operation::ConcatNode &>(node);
+  const int32_t axis_raw = concat_node.param().axis;
+
+  std::vector<const ITensor *> in_tensors;
+  for (const auto &e : concat_node.getInputs())
+  {
+    in_tensors.emplace_back(env->tensorAt(e));
+  }
+
+  const auto out_index = node.getOutputs().at(0);
+  const auto out_tensor = env->tensorAt(out_index);
+  const uint32_t axis = (axis_raw < 0) ? (axis_raw + out_tensor->num_dimensions()) : axis_raw;
+
+  const auto data_type = in_tensors[0]->data_type();
+  if (data_type == model::DataType::FLOAT32)
+  {
+    invoke(in_tensors, out_tensor, axis);
+  }
+  else
+  {
+    throw std::runtime_error{"NYI: Support float32 only"};
+  }
+}
+} // namespace concat
+
+OpKernel *getConcatNode()
+{
+  static OpKernel kernel = {concat::prepareConcat, concat::invokeConcat};
+  return &kernel;
+}
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/interp/operations/Conv2D.cc b/runtimes/neurun/core/src/exec/interp/operations/Conv2D.cc
new file mode 100644
index 000000000..92f4f6415
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/operations/Conv2D.cc
@@ -0,0 +1,154 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <cker/operation/Conv.h>
+
+#include "OperationUtil.h"
+
+#include "exec/interp/Registration.h"
+#include "model/operation/Conv2DNode.h"
+#include "util/Utils.h"
+#include "util/Padding.h"
+#include "util/ShapeInference.h"
+#include "misc/polymorphic_downcast.h"
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+namespace conv2d
+{
+
+void prepareConv2D(ExecEnv *env, const model::Operation &node)
+{
+  const auto in_index = node.getInputs().at(model::operation::Conv2DNode::INPUT);
+  const auto kernel_index = node.getInputs().at(model::operation::Conv2DNode::KERNEL);
+  const auto bias_index = node.getInputs().at(model::operation::Conv2DNode::BIAS);
+  const auto out_index = node.getOutputs().at(0);
+
+  const auto in_tensor = env->tensorAt(in_index);
+  const auto kernel_tensor = env->tensorAt(kernel_index);
+  const auto bias_tensor = env->tensorAt(bias_index);
+
+  assert(in_tensor->num_dimensions() == 4);
+  assert(kernel_tensor->num_dimensions() == 4);
+  assert(bias_tensor->num_dimensions() == 1);
+
+  UNUSED_RELEASE(in_tensor);
+  UNUSED_RELEASE(kernel_tensor);
+  UNUSED_RELEASE(bias_tensor);
+
+  const auto output_info = env->model().operands.at(out_index).info();
+  if (output_info.total_size() == 0)
+  {
+    // Handle unspecified output shape
+    const auto &conv_node =
+        nnfw::misc::polymorphic_downcast<const model::operation::Conv2DNode &>(node);
+    const auto infered_output_shapes = shape_inference::inferConv2DShape(
+        in_tensor->tensorInfo().shape(), kernel_tensor->tensorInfo().shape(), conv_node.param());
+    env->allocateIfNeeded(out_index, {infered_output_shapes[0], output_info.typeInfo()});
+  }
+  else
+  {
+    env->allocateIfNeeded(out_index, output_info);
+  }
+
+  auto out_tensor = env->tensorAt(out_index);
+  UNUSED_RELEASE(out_tensor);
+
+  // Handle same ifm & ofm data type only
+  assert(in_tensor->data_type() == out_tensor->data_type());
+  assert(out_tensor->num_dimensions() == 4);
+}
+
+void invoke(const ITensor *ifm_tensor, const ITensor *ker_tensor, const ITensor *bias_tensor,
+            const ITensor *ofm_tensor, const model::operation::Conv2DNode::Param &param)
+{
+  // TODO Support NCHW frontned
+  const auto ifm_shape = ifm_tensor->tensorInfo().shape().asFeature(model::Layout::NHWC);
+  const auto ofm_shape = ofm_tensor->tensorInfo().shape().asFeature(model::Layout::NHWC);
+  // Kernel format is [depth_out, kernel_height, kernel_width, depth_in].
+  const auto &ker_shape = ker_tensor->tensorInfo().shape();
+  const auto ker_height = ker_shape.dim(1);
+  const auto ker_width = ker_shape.dim(2);
+  const auto padding = neurun::util::calculatePadding(param.padding, ifm_shape, ofm_shape,
+                                                      param.stride, ker_width, ker_height);
+
+  // Calculate
+  float activation_min, activation_max;
+  calculateActivationRange(param.activation, &activation_min, &activation_max);
+
+  nnfw::cker::ConvParams cker_param;
+  cker_param.padding_values.width = padding.left;
+  cker_param.padding_values.height = padding.top;
+  cker_param.stride_width = param.stride.horizontal;
+  cker_param.stride_height = param.stride.vertical;
+  cker_param.dilation_width_factor = 1;
+  cker_param.dilation_height_factor = 1;
+  cker_param.float_activation_min = activation_min;
+  cker_param.float_activation_max = activation_max;
+
+  const auto cker_ifm_shape = convertShape(ifm_tensor->tensorInfo().shape());
+  const auto cker_ker_shape = convertShape(ker_tensor->tensorInfo().shape());
+  const auto cker_bias_shape = convertShape(bias_tensor->tensorInfo().shape());
+  const auto cker_ofm_shape = convertShape(ofm_tensor->tensorInfo().shape());
+  const float *ifm_ptr = reinterpret_cast<const float *>(ifm_tensor->bufferRO());
+  const float *ker_ptr = reinterpret_cast<const float *>(ker_tensor->bufferRO());
+  const float *bias_ptr = reinterpret_cast<const float *>(bias_tensor->bufferRO());
+  float *ofm_ptr = reinterpret_cast<float *>(ofm_tensor->buffer());
+
+  nnfw::cker::Conv(cker_param, cker_ifm_shape, ifm_ptr, cker_ker_shape, ker_ptr, cker_bias_shape,
+                   bias_ptr, cker_ofm_shape, ofm_ptr);
+}
+
+void invokeConv2D(const ExecEnv *env, const model::Operation &node)
+{
+  const auto &conv_node =
+      nnfw::misc::polymorphic_downcast<const model::operation::Conv2DNode &>(node);
+
+  const auto ifm_index = node.getInputs().at(model::operation::Conv2DNode::INPUT);
+  const auto ker_index = node.getInputs().at(model::operation::Conv2DNode::KERNEL);
+  const auto bias_index = node.getInputs().at(model::operation::Conv2DNode::BIAS);
+  const auto ofm_index = node.getOutputs().at(0);
+
+  const auto ifm_tensor = env->tensorAt(ifm_index);
+  const auto ker_tensor = env->tensorAt(ker_index);
+  const auto bias_tensor = env->tensorAt(bias_index);
+  const auto ofm_tensor = env->tensorAt(ofm_index);
+
+  const auto data_type = ifm_tensor->data_type();
+  if (data_type == model::DataType::FLOAT32)
+  {
+    invoke(ifm_tensor, ker_tensor, bias_tensor, ofm_tensor, conv_node.param());
+  }
+  else
+  {
+    throw std::runtime_error{"NYI: Support float32 only"};
+  }
+}
+} // namespace conv2d
+
+OpKernel *getConv2DNode()
+{
+  static OpKernel kernel = {conv2d::prepareConv2D, conv2d::invokeConv2D};
+  return &kernel;
+}
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/interp/operations/DepthwiseConv.cc b/runtimes/neurun/core/src/exec/interp/operations/DepthwiseConv.cc
new file mode 100644
index 000000000..e1e7c0674
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/operations/DepthwiseConv.cc
@@ -0,0 +1,159 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <cker/operation/DepthwiseConv.h>
+#include <misc/polymorphic_downcast.h>
+
+#include "OperationUtil.h"
+
+#include "exec/interp/Registration.h"
+#include "model/operation/DepthwiseConv2DNode.h"
+#include "util/Padding.h"
+#include "util/Utils.h"
+#include "util/ShapeInference.h"
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+
+namespace
+{
+
+void prepareDepthwiseConv(ExecEnv *env, const model::Operation &node)
+{
+  const auto in_index = node.getInputs().at(model::operation::DepthwiseConv2DNode::INPUT);
+  const auto kernel_index = node.getInputs().at(model::operation::DepthwiseConv2DNode::KERNEL);
+  const auto bias_index = node.getInputs().at(model::operation::DepthwiseConv2DNode::BIAS);
+  const auto out_index = node.getOutputs().at(0);
+
+  const auto in_tensor = env->tensorAt(in_index);
+  const auto kernel_tensor = env->tensorAt(kernel_index);
+  const auto bias_tensor = env->tensorAt(bias_index);
+
+  assert(in_tensor->num_dimensions() == 4);
+  assert(kernel_tensor->num_dimensions() == 4);
+  assert(bias_tensor->num_dimensions() == 1);
+
+  UNUSED_RELEASE(in_tensor);
+  UNUSED_RELEASE(kernel_tensor);
+  UNUSED_RELEASE(bias_tensor);
+
+  // TODO handle unspecified output shape:
+  //      calculate output shape using ifm shape, kernel shape, padding, stride
+  const auto output_info = env->model().operands.at(out_index).info();
+  if (output_info.total_size() == 0)
+  {
+    // Handle unspecified output shape
+    const auto &depth_conv_node =
+        nnfw::misc::polymorphic_downcast<const model::operation::DepthwiseConv2DNode &>(node);
+    const auto infered_output_shapes = shape_inference::inferDepthwiseConv2DShape(
+        in_tensor->tensorInfo().shape(), kernel_tensor->tensorInfo().shape(),
+        depth_conv_node.param());
+    env->allocateIfNeeded(out_index, {infered_output_shapes[0], output_info.typeInfo()});
+  }
+  else
+  {
+    env->allocateIfNeeded(out_index, output_info);
+  }
+
+  auto out_tensor = env->tensorAt(out_index);
+  UNUSED_RELEASE(out_tensor);
+
+  // Handle same ifm & ofm data type only
+  assert(in_tensor->data_type() == out_tensor->data_type());
+  assert(out_tensor->num_dimensions() == 4);
+}
+
+void invoke(const ITensor *ifm_tensor, const ITensor *ker_tensor, const ITensor *bias_tensor,
+            const ITensor *ofm_tensor, const model::operation::DepthwiseConv2DNode::Param &param)
+{
+  // TODO Support NCHW frontend
+  const auto ifm_shape = ifm_tensor->tensorInfo().shape().asFeature(model::Layout::NHWC);
+  const auto ofm_shape = ofm_tensor->tensorInfo().shape().asFeature(model::Layout::NHWC);
+  // Kernel format is [1, kernel_height, kernel_width, depth_out].
+  const auto &ker_shape = ker_tensor->tensorInfo().shape();
+  const auto ker_height = ker_shape.dim(1);
+  const auto ker_width = ker_shape.dim(2);
+  const auto padding = neurun::util::calculatePadding(param.padding, ifm_shape, ofm_shape,
+                                                      param.stride, ker_width, ker_height);
+
+  // Calculate
+  float activation_min, activation_max;
+  calculateActivationRange(param.activation, &activation_min, &activation_max);
+
+  nnfw::cker::DepthwiseConvParams cker_param;
+  cker_param.padding_values.width = padding.left;
+  cker_param.padding_values.height = padding.top;
+  cker_param.depth_multiplier = param.multiplier;
+  cker_param.stride_width = param.stride.horizontal;
+  cker_param.stride_height = param.stride.vertical;
+  cker_param.dilation_width_factor = 1;
+  cker_param.dilation_height_factor = 1;
+  cker_param.float_activation_min = activation_min;
+  cker_param.float_activation_max = activation_max;
+
+  const auto cker_ifm_shape = convertShape(ifm_tensor->tensorInfo().shape());
+  const auto cker_ker_shape = convertShape(ker_tensor->tensorInfo().shape());
+  const auto cker_bias_shape = convertShape(bias_tensor->tensorInfo().shape());
+  const auto cker_ofm_shape = convertShape(ofm_tensor->tensorInfo().shape());
+  const float *ifm_ptr = reinterpret_cast<const float *>(ifm_tensor->bufferRO());
+  const float *ker_ptr = reinterpret_cast<const float *>(ker_tensor->bufferRO());
+  const float *bias_ptr = reinterpret_cast<const float *>(bias_tensor->bufferRO());
+  float *ofm_ptr = reinterpret_cast<float *>(ofm_tensor->buffer());
+
+  nnfw::cker::DepthwiseConv(cker_param, cker_ifm_shape, ifm_ptr, cker_ker_shape, ker_ptr,
+                            cker_bias_shape, bias_ptr, cker_ofm_shape, ofm_ptr);
+}
+
+void invokeDepthwiseConv(const ExecEnv *env, const model::Operation &node)
+{
+  const auto &conv_node = static_cast<const model::operation::DepthwiseConv2DNode &>(node);
+
+  const auto ifm_index = node.getInputs().at(model::operation::DepthwiseConv2DNode::INPUT);
+  const auto ker_index = node.getInputs().at(model::operation::DepthwiseConv2DNode::KERNEL);
+  const auto bias_index = node.getInputs().at(model::operation::DepthwiseConv2DNode::BIAS);
+  const auto ofm_index = node.getOutputs().at(0);
+
+  const auto ifm_tensor = env->tensorAt(ifm_index);
+  const auto ker_tensor = env->tensorAt(ker_index);
+  const auto bias_tensor = env->tensorAt(bias_index);
+  const auto ofm_tensor = env->tensorAt(ofm_index);
+
+  const auto data_type = ifm_tensor->data_type();
+  if (data_type == model::DataType::FLOAT32)
+  {
+    invoke(ifm_tensor, ker_tensor, bias_tensor, ofm_tensor, conv_node.param());
+  }
+  else
+  {
+    throw std::runtime_error{"NYI: Support float32 only"};
+  }
+}
+
+} // namespace
+
+OpKernel *getDepthwiseConvNode()
+{
+  static OpKernel kernel = {prepareDepthwiseConv, invokeDepthwiseConv};
+  return &kernel;
+}
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/interp/operations/FullyConnected.cc b/runtimes/neurun/core/src/exec/interp/operations/FullyConnected.cc
new file mode 100644
index 000000000..466c220b1
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/operations/FullyConnected.cc
@@ -0,0 +1,137 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <cker/operation/FullyConnected.h>
+
+#include "OperationUtil.h"
+
+#include "exec/interp/Registration.h"
+#include "model/operation/FullyConnectedNode.h"
+#include "misc/polymorphic_downcast.h"
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+namespace fc
+{
+
+void prepareFC(ExecEnv *env, const model::Operation &node)
+{
+  const auto in_index = node.getInputs().at(model::operation::FullyConnectedNode::INPUT);
+  const auto kernel_index = node.getInputs().at(model::operation::FullyConnectedNode::WEIGHT);
+  const auto bias_index = node.getInputs().at(model::operation::FullyConnectedNode::BIAS);
+  const auto out_index = node.getOutputs().at(0);
+
+  const auto in_tensor = env->tensorAt(in_index);
+  const auto kernel_tensor = env->tensorAt(kernel_index);
+  const auto bias_tensor = env->tensorAt(bias_index);
+
+  UNUSED_RELEASE(in_tensor);
+  UNUSED_RELEASE(kernel_tensor);
+  UNUSED_RELEASE(bias_tensor);
+
+  assert(in_tensor->num_dimensions() >= 2);
+  assert(kernel_tensor->num_dimensions() == 2);
+  assert(bias_tensor->num_dimensions() == 1);
+
+  const auto input_size_with_batch = in_tensor->num_elements();
+  const auto num_units = kernel_tensor->dimension(0);
+  const auto input_size = kernel_tensor->dimension(1);
+  const auto batch_size = input_size_with_batch / input_size;
+  assert(input_size_with_batch % input_size == 0);
+  assert(num_units == bias_tensor->dimension(0));
+
+  // Make output tensor info
+  model::Shape output_shape(2);
+  output_shape.dim(0) = batch_size;
+  output_shape.dim(1) = num_units;
+  const model::OperandInfo out_info{output_shape, in_tensor->tensorInfo().typeInfo()};
+  env->allocateIfNeeded(out_index, out_info);
+
+  auto out_tensor = env->tensorAt(out_index);
+  UNUSED_RELEASE(out_tensor);
+
+  // Handle same ifm & ofm data type only
+  assert(in_tensor->data_type() == out_tensor->data_type());
+  assert(out_tensor->num_dimensions() == 2);
+  assert(out_tensor->dimension(0) == batch_size);
+  assert(out_tensor->dimension(1) == num_units);
+}
+
+void invoke(const ITensor *ifm_tensor, const ITensor *ker_tensor, const ITensor *bias_tensor,
+            const ITensor *ofm_tensor, const model::operation::FullyConnectedNode::Param &param)
+{
+  const auto ifm_buffer = ifm_tensor->bufferRO();
+  const auto ker_buffer = ker_tensor->bufferRO();
+  const auto bias_buffer = bias_tensor->bufferRO();
+  auto ofm_buffer = ofm_tensor->buffer();
+
+  // Calculate
+  nnfw::cker::FullyConnectedParams cker_param;
+  calculateActivationRange(param.activation, &cker_param.float_activation_min,
+                           &cker_param.float_activation_max);
+  const auto cker_ifm_shape = convertExtendShape(ifm_tensor->tensorInfo().shape());
+  const auto cker_ker_shape = convertExtendShape(ker_tensor->tensorInfo().shape());
+  const auto cker_bias_shape = convertExtendShape(bias_tensor->tensorInfo().shape());
+  const auto cker_ofm_shape = convertExtendShape(ofm_tensor->tensorInfo().shape());
+  const float *ifm_ptr = reinterpret_cast<const float *>(ifm_buffer);
+  const float *ker_ptr = reinterpret_cast<const float *>(ker_buffer);
+  const float *bias_ptr = reinterpret_cast<const float *>(bias_buffer);
+  float *ofm_ptr = reinterpret_cast<float *>(ofm_buffer);
+
+  nnfw::cker::FullyConnected(cker_param, cker_ifm_shape, ifm_ptr, cker_ker_shape, ker_ptr,
+                             cker_bias_shape, bias_ptr, cker_ofm_shape, ofm_ptr);
+}
+
+void invokeFC(const ExecEnv *env, const model::Operation &node)
+{
+  const auto &conv_node =
+      nnfw::misc::polymorphic_downcast<const model::operation::FullyConnectedNode &>(node);
+
+  const auto ifm_index = node.getInputs().at(model::operation::FullyConnectedNode::INPUT);
+  const auto ker_index = node.getInputs().at(model::operation::FullyConnectedNode::WEIGHT);
+  const auto bias_index = node.getInputs().at(model::operation::FullyConnectedNode::BIAS);
+  const auto ofm_index = node.getOutputs().at(0);
+
+  const auto ifm_tensor = env->tensorAt(ifm_index);
+  const auto ker_tensor = env->tensorAt(ker_index);
+  const auto bias_tensor = env->tensorAt(bias_index);
+  const auto ofm_tensor = env->tensorAt(ofm_index);
+
+  const auto data_type = ifm_tensor->data_type();
+  if (data_type == model::DataType::FLOAT32)
+  {
+    invoke(ifm_tensor, ker_tensor, bias_tensor, ofm_tensor, conv_node.param());
+  }
+  else
+  {
+    throw std::runtime_error{"NYI: Support float only"};
+  }
+}
+} // namespace fc
+
+OpKernel *getFullyConnectedNode()
+{
+  static OpKernel kernel = {fc::prepareFC, fc::invokeFC};
+  return &kernel;
+}
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/interp/operations/MaxPool2D.cc b/runtimes/neurun/core/src/exec/interp/operations/MaxPool2D.cc
new file mode 100644
index 000000000..e53fa1473
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/operations/MaxPool2D.cc
@@ -0,0 +1,128 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <cker/operation/MaxPool.h>
+
+#include "OperationUtil.h"
+
+#include "exec/interp/Registration.h"
+#include "model/operation/MaxPool2DNode.h"
+#include "util/Utils.h"
+#include "util/Padding.h"
+#include "util/ShapeInference.h"
+#include "misc/polymorphic_downcast.h"
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+namespace
+{
+
+void prepareMaxPool2D(ExecEnv *env, const model::Operation &node)
+{
+  const auto in_index = node.getInputs().at(0);
+  const auto out_index = node.getOutputs().at(0);
+
+  const auto in_tensor = env->tensorAt(in_index);
+
+  assert(in_tensor->num_dimensions() == 4);
+  UNUSED_RELEASE(in_tensor);
+
+  const auto output_info = env->model().operands.at(out_index).info();
+  if (output_info.total_size() == 0)
+  {
+    // Handle unspecified output shape
+    const auto &maxpool_node =
+        nnfw::misc::polymorphic_downcast<const model::operation::MaxPool2DNode &>(node);
+    const auto infered_output_shapes =
+        shape_inference::inferMaxPoolShape(in_tensor->tensorInfo().shape(), maxpool_node.param());
+    env->allocateIfNeeded(out_index, {infered_output_shapes[0], output_info.typeInfo()});
+  }
+  else
+  {
+    env->allocateIfNeeded(out_index, output_info);
+  }
+
+  auto out_tensor = env->tensorAt(out_index);
+  UNUSED_RELEASE(out_tensor);
+
+  // Handle same ifm & ofm data type only
+  assert(in_tensor->data_type() == out_tensor->data_type());
+  assert(out_tensor->num_dimensions() == 4);
+}
+
+void invoke(const ITensor *in_tensor, const ITensor *out_tensor,
+            const model::operation::MaxPool2DNode::Param &param)
+{
+  // TODO support NCHW frontend
+  const auto ifm_shape = in_tensor->tensorInfo().shape().asFeature(model::Layout::NHWC);
+  const auto ofm_shape = out_tensor->tensorInfo().shape().asFeature(model::Layout::NHWC);
+  const auto padding = neurun::util::calculatePadding(param.padding, ifm_shape, ofm_shape,
+                                                      param.stride, param.kw, param.kh);
+  // Calculate
+  nnfw::cker::MaxPoolParams cker_param;
+  calculateActivationRange(param.activation, &cker_param.float_activation_min,
+                           &cker_param.float_activation_max);
+  cker_param.filter_width = param.kw;
+  cker_param.filter_height = param.kh;
+  cker_param.padding_values.width = padding.left;
+  cker_param.padding_values.height = padding.top;
+  cker_param.stride_width = param.stride.horizontal;
+  cker_param.stride_height = param.stride.vertical;
+
+  const auto in_shape = convertShape(in_tensor->tensorInfo().shape());
+  const auto out_shape = convertShape(out_tensor->tensorInfo().shape());
+  const float *in_ptr = reinterpret_cast<const float *>(in_tensor->bufferRO());
+  float *out_ptr = reinterpret_cast<float *>(out_tensor->buffer());
+
+  nnfw::cker::MaxPool(cker_param, in_shape, in_ptr, out_shape, out_ptr);
+}
+
+void invokeMaxPool2D(const ExecEnv *env, const model::Operation &node)
+{
+  const auto &maxpool_node =
+      nnfw::misc::polymorphic_downcast<const model::operation::MaxPool2DNode &>(node);
+
+  const auto in_index = node.getInputs().at(0);
+  const auto out_index = node.getOutputs().at(0);
+
+  const auto in_tensor = env->tensorAt(in_index);
+  const auto out_tensor = env->tensorAt(out_index);
+
+  const auto data_type = in_tensor->data_type();
+  if (data_type == model::DataType::FLOAT32)
+  {
+    invoke(in_tensor, out_tensor, maxpool_node.param());
+  }
+  else
+  {
+    throw std::runtime_error{"NYI: Support float32 only"};
+  }
+}
+} // namespace
+
+OpKernel *getMaxPool2DNode()
+{
+  static OpKernel kernel = {prepareMaxPool2D, invokeMaxPool2D};
+  return &kernel;
+}
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/interp/operations/OperationUtil.h b/runtimes/neurun/core/src/exec/interp/operations/OperationUtil.h
new file mode 100644
index 000000000..4d2b4e1d8
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/operations/OperationUtil.h
@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_EXEC_INTERP_OPERATIONS_OPERATION_UTILS_H_
+#define __NEURUN_EXEC_INTERP_OPERATIONS_OPERATION_UTILS_H_
+
+#include "model/Shape.h"
+#include "model/InternalType.h"
+
+#include <cker/Shape.h>
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+
+inline nnfw::cker::Shape convertShape(const model::Shape &shape)
+{
+  auto dimensions = std::vector<uint32_t>(shape.dims().begin(), shape.dims().end());
+
+  std::vector<int32_t> raw_shape;
+  raw_shape.resize(4);
+
+  for (uint32_t i = 0; i < 4; ++i)
+  {
+    if (i >= dimensions.size())
+    {
+      raw_shape[i] = 1;
+    }
+    else
+    {
+      raw_shape[i] = dimensions[i];
+    }
+  }
+
+  return nnfw::cker::GetShape(raw_shape);
+}
+
+inline nnfw::cker::Shape convertExtendShape(const model::Shape &shape)
+{
+  auto dimensions = std::vector<uint32_t>(shape.dims().begin(), shape.dims().end());
+
+  std::vector<int32_t> raw_shape;
+  raw_shape.resize(4);
+  uint32_t start = 4 - dimensions.size();
+
+  for (uint32_t i = 0; i < 4; ++i)
+  {
+    if (i < start)
+    {
+      raw_shape[i] = 1;
+    }
+    else
+    {
+      raw_shape[i] = dimensions[i - start];
+    }
+  }
+
+  return nnfw::cker::GetShape(raw_shape);
+}
+
+template <typename T>
+void calculateActivationRange(model::Activation activation, T *activation_min, T *activation_max)
+{
+  if (activation == model::Activation::RELU)
+  {
+    *activation_min = 0;
+    *activation_max = std::numeric_limits<T>::max();
+  }
+  else if (activation == model::Activation::RELU6)
+  {
+    *activation_min = 0;
+    *activation_max = 6;
+  }
+  else if (activation == model::Activation::RELU1)
+  {
+    *activation_min = -1;
+    *activation_max = 1;
+  }
+  else if (activation == model::Activation::NONE)
+  {
+    *activation_min = std::numeric_limits<T>::lowest();
+    *activation_max = std::numeric_limits<T>::max();
+  }
+  else
+  {
+    throw std::runtime_error{"Unsupported activation type"};
+  }
+}
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
+
+#endif // __NEURUN_EXEC_INTERP_OPERATIONS_OPERATION_UTILS_H_
diff --git a/runtimes/neurun/core/src/exec/interp/operations/Reshape.cc b/runtimes/neurun/core/src/exec/interp/operations/Reshape.cc
new file mode 100644
index 000000000..a45c3b3f2
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/operations/Reshape.cc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "exec/interp/Registration.h"
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+namespace
+{
+
+void prepare(ExecEnv *env, const model::Operation &node)
+{
+  const auto in_index = node.getInputs().at(0);
+  const auto out_index = node.getOutputs().at(0);
+
+  // Unspecified shape is not supported in operation node spec now
+  const auto output_info = env->model().operands.at(out_index).info();
+  env->allocateAndShareIfNeeded(out_index, output_info, in_index);
+
+  assert(output_info.total_size() == env->model().operands.at(in_index).info().total_size());
+}
+
+void invoke(const ExecEnv *env, const model::Operation &node)
+{
+  const auto in_index = node.getInputs().at(0);
+  const auto out_index = node.getOutputs().at(0);
+
+  if (env->tensorAt(in_index)->bufferRO() == env->tensorAt(out_index)->bufferRO())
+  {
+    // Same data
+    return;
+  }
+
+  const auto output_info = env->model().operands.at(out_index).info();
+  memcpy(env->tensorAt(out_index)->buffer(), env->tensorAt(in_index)->bufferRO(),
+         output_info.total_size());
+}
+
+} // namespace {anonymous}
+
+OpKernel *getReshapeNode()
+{
+  static OpKernel kernel = {prepare, invoke};
+  return &kernel;
+}
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/exec/interp/operations/SoftMax.cc b/runtimes/neurun/core/src/exec/interp/operations/SoftMax.cc
new file mode 100644
index 000000000..07865969b
--- /dev/null
+++ b/runtimes/neurun/core/src/exec/interp/operations/SoftMax.cc
@@ -0,0 +1,164 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <cker/operation/SoftMax.h>
+
+#include "OperationUtil.h"
+
+#include "exec/interp/Registration.h"
+#include "model/operation/SoftmaxNode.h"
+#include "misc/polymorphic_downcast.h"
+
+namespace neurun
+{
+namespace exec
+{
+namespace interp
+{
+namespace
+{
+
+void Softmax2D(const float *in, const int input_size, const int batch_size, const float beta,
+               float *out)
+{
+  assert(input_size > 0);
+
+  // For each batch
+  for (int b = 0; b < batch_size; b++)
+  {
+    // Find the max coeff.
+    float max_coeff = in[0];
+    for (int i = 1; i < input_size; i++)
+    {
+      if (in[i] > max_coeff)
+        max_coeff = in[i];
+    }
+
+    // Compute the normalized sum of exps.
+    float exp_sum = 0.0;
+    for (int i = 0; i < input_size; i++)
+    {
+      out[i] = std::exp((in[i] - max_coeff) * beta);
+      exp_sum += out[i];
+    }
+
+    // Divide by the sum of exps.
+    float reciprocal_sum_exp = 1.f / exp_sum;
+    for (int i = 0; i < input_size; i++)
+    {
+      out[i] *= reciprocal_sum_exp;
+    }
+
+    // Advance in and out pointers for the next batch.
+    in += input_size;
+    out += input_size;
+  }
+}
+
+void prepareSoftMax(ExecEnv *env, const model::Operation &node)
+{
+  const auto in_index = node.getInputs().at(0);
+  const auto out_index = node.getOutputs().at(0);
+
+  const auto in_tensor = env->tensorAt(in_index);
+  UNUSED_RELEASE(in_tensor);
+
+  assert((in_tensor->num_dimensions() == 4) || (in_tensor->num_dimensions() == 2));
+
+  // Output shape should be same with input
+  // Output type is pre-defined in model
+  const auto output_shape = env->model().operands.at(in_index).info().shape();
+  const auto output_type = env->model().operands.at(out_index).info().typeInfo();
+
+  const model::OperandInfo output_info{output_shape, output_type};
+  env->allocateIfNeeded(out_index, output_info);
+
+  auto out_tensor = env->tensorAt(out_index);
+  UNUSED_RELEASE(out_tensor);
+
+  // Check output shape is same with input
+  assert(out_tensor->num_dimensions() == out_tensor->num_dimensions());
+  for (uint32_t i = 0; i < in_tensor->num_dimensions(); i++)
+  {
+    assert(in_tensor->dimension(i) == out_tensor->dimension(i));
+  }
+}
+
+void invoke(const ITensor *in_tensor, const ITensor *out_tensor,
+            const model::operation::SoftmaxNode::Param &param)
+{
+  const float *in_ptr = reinterpret_cast<const float *>(in_tensor->bufferRO());
+  float *out_ptr = reinterpret_cast<float *>(out_tensor->buffer());
+
+  float beta = param.beta;
+
+  if (in_tensor->num_dimensions() == 2)
+  {
+    uint32_t batch_size = in_tensor->dimension(0);
+    uint32_t input_size = in_tensor->dimension(1);
+
+    Softmax2D(in_ptr, input_size, batch_size, beta, out_ptr);
+  }
+  else if (in_tensor->num_dimensions() == 4)
+  {
+    const auto in_shape = convertShape(in_tensor->tensorInfo().shape());
+    const auto out_shape = convertShape(out_tensor->tensorInfo().shape());
+
+    nnfw::cker::SoftmaxParams cker_param;
+    cker_param.beta = beta;
+
+    nnfw::cker::Softmax(cker_param, in_shape, in_ptr, out_shape, out_ptr);
+  }
+  else
+  {
+    throw std::runtime_error{"Unsuported input dimension: support 2D or 4D"};
+  }
+}
+
+void invokeSoftMax(const ExecEnv *env, const model::Operation &node)
+{
+  const auto &softmax_node =
+      nnfw::misc::polymorphic_downcast<const model::operation::SoftmaxNode &>(node);
+
+  const auto in_index = node.getInputs().at(0);
+  const auto out_index = node.getOutputs().at(0);
+
+  const auto in_tensor = env->tensorAt(in_index);
+  const auto out_tensor = env->tensorAt(out_index);
+
+  const auto in_data_type = in_tensor->data_type();
+  const auto out_data_type = out_tensor->data_type();
+  if ((in_data_type == model::DataType::FLOAT32) && (out_data_type == model::DataType::FLOAT32))
+  {
+    invoke(in_tensor, out_tensor, softmax_node.param());
+  }
+  else
+  {
+    throw std::runtime_error{"NYI: Support float32 only"};
+  }
+}
+
+} // namespace
+
+OpKernel *getSoftMaxNode()
+{
+  static OpKernel kernel = {prepareSoftMax, invokeSoftMax};
+  return &kernel;
+}
+
+} // namespace interp
+} // namespace exec
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/graph/Graph.cc b/runtimes/neurun/core/src/graph/Graph.cc
new file mode 100644
index 000000000..4264b1a8a
--- /dev/null
+++ b/runtimes/neurun/core/src/graph/Graph.cc
@@ -0,0 +1,589 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "graph/Graph.h"
+
+#include <algorithm>
+#include <bitset>
+
+#include "util/logging.h"
+#include "verifier/Verifier.h"
+#include "cpp14/memory.h"
+#include "compiler/Linear.h"
+#include "graph/operation/LowerInfo.h"
+#include "graph/operand/LowerInfo.h"
+#include "graph/operand/PermuteFactor.h"
+#include "operand/Shape4DConvert.h"
+#include "compiler/BackendResolver.h"
+#include "backend/IConfig.h"
+#include "pass/PermutationInsertionPass.h"
+#include "pass/PermutationEliminationPass.h"
+
+namespace neurun
+{
+namespace graph
+{
+
+Graph::Graph(std::unique_ptr<model::Model> &&model) : _model{std::move(model)}
+{
+  // DO NOTHING
+}
+
+Graph::~Graph(void) = default;
+
+model::OperandIndex Graph::addOperand(const model::Shape &shape, const model::TypeInfo &type)
+{
+  return _model->operands.emplace(shape, type);
+}
+
+model::OperationIndex Graph::addOperation(std::unique_ptr<model::Operation> &&node)
+{
+  assert(isBuildingPhase());
+  return _model->operations.push(std::move(node));
+}
+
+void Graph::setOperandValue(const model::OperandIndex &ind, std::unique_ptr<model::Data> &&data)
+{
+  assert(isBuildingPhase());
+  assert(_model->operands.exist(ind));
+  _model->operands.at(ind).data(std::move(data));
+}
+
+void Graph::addInput(const model::OperandIndex &ind)
+{
+  assert(isBuildingPhase());
+  _model->inputs.append(ind);
+}
+
+void Graph::addOutput(const model::OperandIndex &ind)
+{
+  assert(isBuildingPhase());
+  _model->outputs.append(ind);
+}
+
+void Graph::finishBuilding(void)
+{
+  assert(isBuildingPhase());
+  _phase = Phase::MODEL;
+
+  // Initialize operand use-def
+  initializeUseDef();
+
+  // Call graph verifications for the MODEL phase
+  {
+    assert(verifier::DAGChecker().verify(*this));
+    assert(verifier::EdgeConsistencyChecker().verify(*this));
+  }
+}
+
+void Graph::lower(void)
+{
+  assert(_phase == Phase::MODEL);
+
+  _subgraphs = nnfw::cpp14::make_unique<model::Subgraphs>();
+  bool is_profiling = util::getConfigBool(util::config::PROFILING_MODE);
+
+  // Lower
+  {
+    // operand::LowerInfo holder
+    model::OperandIndexMap<std::unique_ptr<operand::LowerInfo>> operands_lower_info;
+
+    _model->operands.iterate([&](const model::OperandIndex &index, const model::Operand &object) {
+      operands_lower_info[index] =
+          nnfw::cpp14::make_unique<operand::LowerInfo>(graph::operand::asShape4D(object.shape()));
+    });
+
+    _lower_info_map = nnfw::cpp14::make_unique<LowerInfoMap>();
+
+    // Are they mergeable?
+    // 1. the same backend id and layout?
+    // 2. if 1 is true, the subg and a node are connected?
+    auto mergeable = [&](const model::SubgraphIndex &subg_index,
+                         const model::OperationIndex &node_index, model::Layout layout) {
+      const auto &subg = _subgraphs->at(subg_index);
+      const auto &node = _model->operations.at(node_index);
+
+      // The same backend id and layout?
+      {
+        const auto subg_backend_layout = getLowerInfo(subg_index)->layout();
+        const auto &subg_backend_id = getLowerInfo(subg_index)->backend()->config()->id();
+        const auto &node_backend_id = _backend_resolver->getBackend(node_index)->config()->id();
+        VERBOSE(Lower) << "SUBG#" << subg_index.value() << " { " << subg_backend_id << "("
+                       << model::to_string(subg_backend_layout) << ") } "
+                       << " NODE#" << node_index.value() << " (" << node.getName() << ") { "
+                       << node_backend_id << "(" << model::to_string(layout) << ") } " << std::endl;
+        if (subg_backend_id != node_backend_id || subg_backend_layout != layout)
+          return false;
+      }
+
+      // Connected?
+      // an input of one node is an output of the other node? or vice-versa?
+      {
+        const auto &node_inputs = node.getInputs();
+        const auto &node_outputs = node.getOutputs();
+
+        // subg's operations are in order so that we just check the first and the last
+        std::vector<model::Element> subg_ops{subg.operations()[0]};
+        if (subg.operations().size() > 1)
+          subg_ops.emplace_back(subg.operations()[subg.operations().size() - 1]);
+
+        for (const auto &elem : subg_ops)
+        {
+          const auto &n_index = elem.index;
+          const auto &n = *elem.node;
+
+          // node's output == subg's input?
+          const auto &n_inputs = n.getInputs();
+          for (auto input : n_inputs)
+          {
+            if (node_outputs.contains(input))
+            {
+              VERBOSE(Lower) << "SUBG#" << subg_index.value() << " 's NODE#" << n_index.value()
+                             << "(" << n.getName() << ") is connected to NODE#"
+                             << node_index.value() << "(" << node.getName() << ")" << std::endl;
+              return true;
+            }
+          }
+
+          // node's input == subg's output?
+          const auto &n_outputs = n.getOutputs();
+          for (auto output : n_outputs)
+          {
+            if (node_inputs.contains(output))
+            {
+              VERBOSE(Lower) << "SUBG#" << subg_index.value() << " 's NODE#" << n_index.value()
+                             << " (" << n.getName() << ") is connected to NODE#"
+                             << node_index.value() << std::endl;
+              return true;
+            }
+          }
+        }
+
+        VERBOSE(Lower) << "SUBG#" << subg_index.value() << " is not connected to NODE#"
+                       << node_index.value() << "(" << node.getName() << ")" << std::endl;
+      }
+
+      return false;
+    };
+
+    // Create a fresh subgraph with one operation, and append it to subgraphs
+    auto append_fresh_single_op_subgraph = [&](const model::OperationIndex &node_index,
+                                               const model::Operation &node, model::Layout layout) {
+      // Create a fresh subgraph
+      auto subg = nnfw::cpp14::make_unique<model::Subgraph>(layout);
+
+      // Add an operation
+      subg->appendOperation(node_index, node);
+
+      // Update input/output
+      subg->setOutputs(node.getOutputs());
+      subg->setInputs(node.getInputs());
+
+      return _subgraphs->emplace(std::move(subg));
+    };
+
+    model::Subgraph *subg = nullptr;
+    model::SubgraphIndex subg_index;
+
+    // Make subgraphs while checking whether a node can be merged into a subgraph.
+    // NOTE: The below method appends nodes while making one subgraph if needed. If something better
+    // ways, happy to update this code.
+    Graph::PostDfsConstIterator().iterate(*this, [&](const model::OperationIndex &node_index,
+                                                     const model::Operation &node) {
+      // LowerInfo for in/output operands
+      auto backend = _backend_resolver->getBackend(node_index);
+      // TODO How to get layout of this node from IR
+      auto frontend_layout = model::Layout::NHWC;
+      auto backend_layout = frontend_layout;
+      const std::string acl_layout_str = util::getConfigString(util::config::ACL_LAYOUT);
+      if (acl_layout_str == "NHWC")
+      {
+        backend_layout = model::Layout::NHWC;
+      }
+      else if (acl_layout_str == "NCHW")
+      {
+        backend_layout = model::Layout::NCHW;
+      }
+
+      // CPU supports only NHWC now
+      if (backend->config()->id() == "cpu")
+      {
+        backend_layout = model::Layout::NHWC;
+      }
+
+      for (auto operand : node.getInputs())
+      {
+        auto &&lower_info = operands_lower_info.at(operand);
+        lower_info->addUsePermuteFactor(operand::PermuteFactor{backend, backend_layout});
+      }
+      for (auto operand : node.getOutputs())
+      {
+        auto &&lower_info = operands_lower_info.at(operand);
+        lower_info->addDefPermuteFactor(operand::PermuteFactor{backend, backend_layout});
+      }
+      /*for profiling each subgraph must contain just one node,
+        so that we can measure a node separately*/
+      if (!subg || is_profiling || !mergeable(subg_index, node_index, backend_layout))
+      {
+        auto new_subg_index = append_fresh_single_op_subgraph(node_index, node, frontend_layout);
+
+        // Subgraph LowerInfo
+        setLowerInfo(new_subg_index, nnfw::cpp14::make_unique<graph::operation::LowerInfo>(
+                                         backend, backend_layout));
+
+        subg_index = new_subg_index;
+        subg = &(_subgraphs->at(new_subg_index));
+
+        VERBOSE(Lower) << "SUBG#" << subg_index.value() << " is created for "
+                       << "NODE#" << node_index.value() << "(" << node.getName() << ")"
+                       << std::endl;
+      }
+      else
+      {
+        subg->appendOperation(node_index, node);
+        subg->setInputs(node.getInputs());
+
+        VERBOSE(Lower) << "SUBG#" << subg_index.value() << " merges "
+                       << "NODE#" << node_index.value() << "(" << node.getName() << ")"
+                       << std::endl;
+      }
+
+      bool finish = false;
+      {
+        size_t prev_op_cnt = 0;
+        for (auto input : node.getInputs())
+        {
+          // only valid_inputs
+          const auto &operand = _model->operands.at(input);
+          if (operand.isConstant())
+            continue;
+
+          // This operand is input of operation, not weight or bias
+          if (operand.getDef().list().size() > 0)
+            ++prev_op_cnt;
+
+          // Test the node is Concat or BeginningBranch
+          // About (1)isConcat and (2)isBeginningBranch
+          //   (1) Current node has multiple inputs as concat?
+          //     - Does current node have two or more than previous operation?
+          //
+          //        [CONV] [CONV] [CONV]  [MAX_POOL]
+          //         |      |      |       |
+          //        [0]    [1]    [2]     [3]
+          //         \      |      |      /
+          //          [    C O N C A T   ]  # current node
+          //
+          //   (2) Current node is on the separated branch at the beginning?
+          //     - Does current node's input operand's uses have two or more than?
+          //
+          //       [CONV]
+          //         |
+          //        [0]----.
+          //         |     |
+          //       [CONV] [CONV]  # current node
+          //         |      |
+          //        [1]    [2]
+          //         \      /
+          //         [CONCAT]
+          if (prev_op_cnt > 1 || operand.getUses().list().size() > 1)
+          {
+            finish = true;
+            break;
+          }
+        }
+      }
+
+      if (finish)
+        subg = nullptr;
+    });
+
+    _subgraphs->iterate([&](const model::SubgraphIndex &, model::Subgraph &subg) {
+      assert(subg.operations().size() > 0);
+      std::reverse(std::begin(subg.operations()), std::end(subg.operations()));
+    });
+
+    _subgraphs->dump("merged and sorted operations without permutation");
+
+// NOTE This is desired way to handle model input and outputs however getDefaultBackend() is
+// cpu backend dependent for now we cannot use it.
+#if 0
+    // Add def backend to model input/output operand as default backend
+    for (auto index : getInputs())
+    {
+      auto &&lower_info = operands_lower_info.at(index);
+      lower_info->addDefBackend(_backend_resolver->getDefaultBackend());
+    }
+
+    for (auto index : getOutputs())
+    {
+      auto &&lower_info = operands_lower_info.at(index);
+      lower_info->addUseBackend(_backend_resolver->getDefaultBackend());
+    }
+#endif
+
+    // Add DefFactor constants same as UseFactor
+    // NOTE This assumes a constant operand is used by only one operation
+    _model->operations.iterate([&](const model::OperationIndex &, model::Operation &node) {
+      // LowerInfo for input operands
+      for (auto operand : node.getInputs())
+      {
+        auto &&lower_info = operands_lower_info.at(operand);
+        if (lower_info->def_factors().empty())
+        {
+          // NOTE Handling model inputs here is not ideal. See above NOTE comment.
+          // If it is a model input, not a constant
+          if (_model->inputs.contains(operand))
+          {
+            // If one or more elements then any PermuteFactor is OK so pick first one
+            if (!lower_info->use_factors().empty())
+            {
+              lower_info->addDefPermuteFactor(*lower_info->use_factors().begin());
+            }
+          }
+          // If it is a constant
+          else
+          {
+            lower_info->addDefPermuteFactor(lower_info->use_factors().getOnlyElement());
+          }
+        }
+      }
+    });
+
+    // Set LowerInfo for each operand from the operand::LowerInfo holder
+    _model->operands.iterate([&](const model::OperandIndex &index, model::Operand &object) {
+      setLowerInfo(index, std::move(operands_lower_info[index]));
+
+      // Dump operand LowerInfo
+      // TODO Extract this dumping procedure to be reusable
+      if (!getLowerInfo(index)->def_factors().empty() ||
+          !getLowerInfo(index)->use_factors().empty())
+      {
+        auto factors_to_string = [](const operand::PermuteFactorSet &factors) {
+          std::string str;
+          for (auto factor : factors)
+          {
+            str += factor.backend()->config()->id();
+            str += "(" + model::to_string(factor.layout()) + ")";
+            str += " ";
+          }
+          return "{ " + str + "}";
+        };
+
+        auto operation_index_to_string = [](const model::OperationIndexList &operations) {
+          std::string str;
+          for (auto op : operations.list())
+          {
+            str += std::to_string(op.value());
+            str += " ";
+          }
+          return "{ " + str + "}";
+        };
+
+        const auto lower_info = getLowerInfo(index);
+        const auto &shape = object.shape();
+        const auto &lower_shape = lower_info->shape();
+        std::string def_ops = operation_index_to_string(object.getDef());
+        std::string use_ops = operation_index_to_string(object.getUses());
+        std::string def_layouts = factors_to_string(lower_info->def_factors());
+        std::string use_layouts = factors_to_string(lower_info->use_factors());
+        VERBOSE(Lower) << "* Operand #" << index.value() << " LowerInfo" << std::endl;
+        VERBOSE(Lower) << "  - Shape           : { " << shape.dim(0) << " "
+                       << (shape.rank() > 1 ? shape.dim(1) : 0) << " "
+                       << (shape.rank() > 2 ? shape.dim(2) : 0) << " "
+                       << (shape.rank() > 3 ? shape.dim(3) : 0) << " "
+                       << "}" << std::endl;
+        VERBOSE(Lower) << "  - Def Operations  : " << def_ops << std::endl;
+        VERBOSE(Lower) << "  - Use Operations  : " << use_ops << std::endl;
+        VERBOSE(Lower) << "  - Lower Info" << std::endl;
+        VERBOSE(Lower) << "    - 4D Shape (NHWC) : { " << lower_shape.n() << " " << lower_shape.h()
+                       << " " << lower_shape.w() << " " << lower_shape.c() << " "
+                       << "}" << std::endl;
+        VERBOSE(Lower) << "    - Def Backends    : " << def_layouts << std::endl;
+        VERBOSE(Lower) << "    - Use Backends    : " << use_layouts << std::endl;
+      }
+    });
+  }
+
+  // Run PermutationInsertionPass
+  {
+    pass::PermutationInsertionPass pi_pass(*this);
+    pi_pass.run();
+    // Implemented code no longer works.
+    // pass::PermutationEliminationPass pe_pass(*this);
+    // pe_pass.run();
+
+    // TODO merge perm subgraphs if possible
+    _subgraphs->dump("merged and sorted operations with permutation");
+  }
+
+  // Graph verifications for the LOWERED phase
+  {
+    assert(verifier::DAGChecker().verify(*this));
+    assert(verifier::EdgeConsistencyChecker().verify(*this));
+  }
+}
+
+std::unique_ptr<compiler::Linear> Graph::linearize(void)
+{
+  assert(_phase == Phase::MODEL);
+
+  auto linear = nnfw::cpp14::make_unique<compiler::Linear>(
+      shareModel(), releaseSubgraphs(), releaseLowerInfo(), releaseBackendResolver());
+
+  // TODO Move the operations and operands to linear object
+  return linear;
+}
+
+void Graph::initializeUseDef()
+{
+  operations().iterate(
+      [&](const model::OperationIndex &index, const model::Operation &node) -> void {
+        auto outputs = node.getOutputs();
+        for (auto output : outputs)
+        {
+          operands().at(output).appendDef(index);
+        }
+
+        auto inputs = node.getInputs();
+        for (auto input : inputs)
+        {
+          operands().at(input).appendUse(index);
+        }
+      });
+}
+
+const operation::LowerInfo *Graph::getLowerInfo(const model::SubgraphIndex &subg_index) const
+{
+  if (!_lower_info_map)
+    return nullptr;
+  auto itr = _lower_info_map->operation.find(subg_index);
+  if (itr == _lower_info_map->operation.end())
+    return nullptr;
+  return itr->second.get();
+}
+
+void Graph::setLowerInfo(const model::SubgraphIndex &subg_index,
+                         std::unique_ptr<operation::LowerInfo> &&lower_info)
+{
+  assert(_lower_info_map);
+  _lower_info_map->operation.insert(std::make_pair(subg_index, std::move(lower_info)));
+}
+
+const operand::LowerInfo *Graph::getLowerInfo(const model::OperandIndex &index) const
+{
+  if (!_lower_info_map)
+    return nullptr;
+  auto itr = _lower_info_map->operand.find(index);
+  if (itr == _lower_info_map->operand.end())
+    return nullptr;
+  return itr->second.get();
+}
+
+operand::LowerInfo *Graph::getLowerInfo(const model::OperandIndex &index)
+{
+  if (!_lower_info_map)
+    return nullptr;
+  auto itr = _lower_info_map->operand.find(index);
+  if (itr == _lower_info_map->operand.end())
+    return nullptr;
+  return itr->second.get();
+}
+
+void Graph::setLowerInfo(const model::OperandIndex &index,
+                         std::unique_ptr<operand::LowerInfo> &&lower_info)
+{
+  assert(_lower_info_map);
+  _lower_info_map->operand.insert(std::make_pair(index, std::move(lower_info)));
+}
+
+} // namespace graph
+} // namespace neurun
+
+namespace neurun
+{
+namespace graph
+{
+
+// Explicit instantiations to have implementation in the source file.
+
+template class Graph::DefaultIterator<true>;
+template class Graph::DefaultIterator<false>;
+
+template class Graph::PostDfsIterator<true>;
+template class Graph::PostDfsIterator<false>;
+
+//
+// Graph::DefaultIterator
+//
+
+template <bool is_const>
+void Graph::DefaultIterator<is_const>::iterate(GraphRef graph, const IterFn &fn) const
+{
+  graph.operations().iterate(
+      [&](const model::OperationIndex &index, NodeRef node) -> void { fn(index, node); });
+}
+
+//
+// Graph::PostDfsIterator
+//
+
+template <bool is_const>
+void Graph::PostDfsIterator<is_const>::iterate(GraphRef graph, const IterFn &fn) const
+{
+  assert(!graph.isBuildingPhase()); // Restrict iteration condition
+
+  model::OperationIndexMap<bool> visited;
+  graph.operations().iterate(
+      [&](const model::OperationIndex &index, NodeRef) { visited[index] = false; });
+
+  std::function<void(const model::OperationIndex &, NodeRef)> dfs_recursive =
+      [&](const model::OperationIndex &index, NodeRef node) -> void {
+    if (visited[index])
+      return;
+    visited[index] = true;
+
+    for (auto output : node.getOutputs())
+    {
+      const auto &operand = graph.operands().at(output);
+      for (const auto &use : operand.getUses().list())
+      {
+        dfs_recursive(use, graph.operations().at(use));
+      }
+    }
+
+    fn(index, node);
+  };
+
+  graph.operations().iterate(dfs_recursive);
+
+  // All of the operations(nodes) must have been visited.
+  assert(
+      std::all_of(visited.begin(), visited.end(),
+                  [](const std::pair<const model::OperationIndex, bool> &v) { return v.second; }));
+}
+
+void Graph::setBackendResolver(std::unique_ptr<compiler::BackendResolver> &&br)
+{
+  _backend_resolver = std::move(br);
+}
+
+std::unique_ptr<compiler::BackendResolver> Graph::releaseBackendResolver()
+{
+  return std::move(_backend_resolver);
+}
+
+} // namespace graph
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/graph/dumper/Dumper.cc b/runtimes/neurun/core/src/graph/dumper/Dumper.cc
new file mode 100644
index 000000000..315e2cebf
--- /dev/null
+++ b/runtimes/neurun/core/src/graph/dumper/Dumper.cc
@@ -0,0 +1,583 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "Dumper.h"
+
+#include <string>
+
+#include "util/logging.h"
+
+namespace neurun
+{
+namespace graph
+{
+namespace dumper
+{
+
+using namespace neurun::model::operation;
+
+void Dumper::visit(const AbsNode &node)
+{
+  VERBOSE(LIR) << "* Abs" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(AbsNode::Input::INPUT).value() << ")"
+               << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const AddNode &node)
+{
+  VERBOSE(LIR) << "* Add" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(AddNode::Input::LHS).value() << ", "
+               << node.getInputs().at(AddNode::Input::RHS).value() << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const ArgMaxNode &node)
+{
+  VERBOSE(LIR) << "* ArgMax" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(ArgMaxNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const AvgPool2DNode &node)
+{
+  VERBOSE(LIR) << "* AvgPool2D(Implicit)" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : IFM(" << node.getInputs().at(AvgPool2DNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : OFM(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const CastNode &node)
+{
+  VERBOSE(LIR) << "* Cast" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(CastNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const ComparisonNode &node)
+{
+  VERBOSE(LIR) << "* Comparison" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input("
+               << node.getInputs().at(ComparisonNode::Input::INPUT0).value() << ", "
+               << node.getInputs().at(ComparisonNode::Input::INPUT1).value() << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const ConcatNode &node)
+{
+  VERBOSE(LIR) << "* Concat" << std::endl;
+  std::string inputs;
+  for (auto i : node.getInputs())
+  {
+    inputs += std::to_string(i.value()) + ",";
+  }
+  VERBOSE(LIR) << "  - Inputs : IFM(" << inputs << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : OFM(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const Conv2DNode &node)
+{
+  std::string padding_type =
+      node.param().padding.type == model::PaddingType::EXPLICIT ? "Explicit" : "Implicit";
+  VERBOSE(LIR) << "* Conv2D(" << padding_type << ")" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : IFM(" << node.getInputs().at(Conv2DNode::Input::INPUT).value()
+               << ") Kernel(" << node.getInputs().at(Conv2DNode::Input::KERNEL).value() << ") Bias("
+               << node.getInputs().at(Conv2DNode::Input::BIAS).value() << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : OFM(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const DepthToSpaceNode &node)
+{
+  VERBOSE(LIR) << "* DepthToSpace" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input("
+               << node.getInputs().at(DepthToSpaceNode::Input::INPUT).value() << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const DepthwiseConv2DNode &node)
+{
+  std::string padding_type =
+      node.param().padding.type == model::PaddingType::EXPLICIT ? "Explicit" : "Implicit";
+  VERBOSE(LIR) << "* DepthwiseConv2D(" << padding_type << ")" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : IFM("
+               << node.getInputs().at(DepthwiseConv2DNode::Input::INPUT).value() << ") Kernel("
+               << node.getInputs().at(DepthwiseConv2DNode::Input::KERNEL).value() << ") Bias("
+               << node.getInputs().at(DepthwiseConv2DNode::Input::BIAS).value() << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : OFM(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const DequantizeNode &node)
+{
+  VERBOSE(LIR) << "* Dequantize" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(DequantizeNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const DivNode &node)
+{
+  VERBOSE(LIR) << "* Div" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(DivNode::Input::LHS).value() << ", "
+               << node.getInputs().at(DivNode::Input::RHS).value() << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const EmbeddingLookupNode &node)
+{
+  VERBOSE(LIR) << "* EmbeddingLookup" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Lookups("
+               << node.getInputs().at(EmbeddingLookupNode::Input::LOOKUPS).value() << ") VALUES("
+               << node.getInputs().at(EmbeddingLookupNode::Input::VALUES).value() << ")"
+               << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const ExpNode &node)
+{
+  VERBOSE(LIR) << "* Exp" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(ExpNode::Input::INPUT).value() << ")"
+               << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const FloorNode &node)
+{
+  VERBOSE(LIR) << "* Floor" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(FloorNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const FullyConnectedNode &node)
+{
+  VERBOSE(LIR) << "* FullyConnected" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : IFM("
+               << node.getInputs().at(FullyConnectedNode::Input::INPUT).value() << ") Weight("
+               << node.getInputs().at(FullyConnectedNode::Input::WEIGHT).value() << ") Bias("
+               << node.getInputs().at(FullyConnectedNode::Input::BIAS).value() << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : OFM(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const GatherNode &node)
+{
+  VERBOSE(LIR) << "* Gather" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(GatherNode::Input::INPUT).value()
+               << ") Indices(" << node.getInputs().at(GatherNode::Input::INDICES).value() << ")"
+               << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const HashtableLookupNode &node)
+{
+  VERBOSE(LIR) << "* HashTableLookup" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Lookups("
+               << node.getInputs().at(HashtableLookupNode::Input::LOOKUPS).value() << ") Keys("
+               << node.getInputs().at(HashtableLookupNode::Input::KEYS).value() << ") Values("
+               << node.getInputs().at(HashtableLookupNode::Input::VALUES).value() << ")"
+               << std::endl;
+  VERBOSE(LIR) << "  - Outputs : Output("
+               << node.getInputs().at(HashtableLookupNode::Output::OUTPUT).value() << ") Hits("
+               << node.getInputs().at(HashtableLookupNode::Output::HITS).value() << ")"
+               << std::endl;
+}
+
+void Dumper::visit(const L2NormalizationNode &node)
+{
+  VERBOSE(LIR) << "* L2Normalization" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input("
+               << node.getInputs().at(L2NormalizationNode::Input::INPUT).value() << ")"
+               << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const L2Pool2DNode &node)
+{
+  VERBOSE(LIR) << "* L2Pool2D" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(L2Pool2DNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const LocalResponseNormalizationNode &node)
+{
+  VERBOSE(LIR) << "* LocalResponseNormalization" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input("
+               << node.getInputs().at(LocalResponseNormalizationNode::Input::INPUT).value() << ")"
+               << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const LSTMNode &node)
+{
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(LSTMNode::Input::INPUT).value()
+               << ") Input To Input Weights("
+               << node.getInputs().at(LSTMNode::Input::INPUT_TO_INPUT_WEIGHTS).value()
+               << ") Input To Forget Weights("
+               << node.getInputs().at(LSTMNode::Input::INPUT_TO_FORGET_WEIGHTS).value()
+               << ") Input To Cell Weights("
+               << node.getInputs().at(LSTMNode::Input::INPUT_TO_CELL_WEIGHTS).value()
+               << ") Input To Output Weights("
+               << node.getInputs().at(LSTMNode::Input::INPUT_TO_OUTPUT_WEIGHTS).value()
+               << ") Recurrent To Input Weights("
+               << node.getInputs().at(LSTMNode::Input::RECURRENT_TO_INPUT_WEIGHTS).value()
+               << ") Recurrent To Forget Weights("
+               << node.getInputs().at(LSTMNode::Input::RECURRENT_TO_FORGET_WEIGHTS).value()
+               << ") Recurrent To Cell Weights("
+               << node.getInputs().at(LSTMNode::Input::RECURRENT_TO_CELL_WEIGHTS).value()
+               << ") Recurrent To Output Weights("
+               << node.getInputs().at(LSTMNode::Input::RECURRENT_TO_OUTPUT_WEIGHTS).value()
+               << ") Cell To Input Weights("
+               << node.getInputs().at(LSTMNode::Input::CELL_TO_INPUT_WEIGHTS).value()
+               << ") Cell To Forget Weights("
+               << node.getInputs().at(LSTMNode::Input::CELL_TO_FORGET_WEIGHTS).value()
+               << ") Cell To OUTPUT Weights("
+               << node.getInputs().at(LSTMNode::Input::CELL_TO_OUTPUT_WEIGHTS).value()
+               << ") Input Gate Bias("
+               << node.getInputs().at(LSTMNode::Input::INPUT_GATE_BIAS).value()
+               << ") Forget Gate Bias("
+               << node.getInputs().at(LSTMNode::Input::FORGET_GATE_BIAS).value() << ") Cell Bias("
+               << node.getInputs().at(LSTMNode::Input::CELL_BIAS).value() << ") Output Gate Bias("
+               << node.getInputs().at(LSTMNode::Input::OUTPUT_GATE_BIAS).value()
+               << ") Projection Weights("
+               << node.getInputs().at(LSTMNode::Input::PROJECTION_WEIGHTS).value()
+               << ") Projection Bias("
+               << node.getInputs().at(LSTMNode::Input::PROJECTION_BIAS).value()
+               << ") Output State In("
+               << node.getInputs().at(LSTMNode::Input::OUTPUT_STATE_IN).value()
+               << ") Cell State In(" << node.getInputs().at(LSTMNode::Input::CELL_STATE_IN).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Scratch Buffer("
+               << node.getOutputs().at(LSTMNode::Output::SCRATCH_BUFFER).value()
+               << ") Output State Out("
+               << node.getInputs().at(LSTMNode::Output::OUTPUT_STATE_OUT).value()
+               << ") Cell State Out("
+               << node.getInputs().at(LSTMNode::Output::CELL_STATE_OUT).value() << ") Output("
+               << node.getInputs().at(LSTMNode::Output::OUTPUT).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const LogicalAndNode &node)
+{
+  VERBOSE(LIR) << "* LogicalAnd" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input("
+               << node.getInputs().at(LogicalAndNode::Input::INPUT0).value() << ", "
+               << node.getInputs().at(LogicalAndNode::Input::INPUT1).value() << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const LogicalNotNode &node)
+{
+  VERBOSE(LIR) << "* LogicalNot" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(LogicalNotNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const LogicalOrNode &node)
+{
+  VERBOSE(LIR) << "* LogicalOr" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(LogicalOrNode::Input::INPUT0).value()
+               << ", " << node.getInputs().at(LogicalOrNode::Input::INPUT1).value() << ")"
+               << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const LogisticNode &node)
+{
+  VERBOSE(LIR) << "* Logistic" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(LogisticNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const MaxPool2DNode &node)
+{
+  std::string padding_type =
+      node.param().padding.type == model::PaddingType::EXPLICIT ? "Explicit" : "Implicit";
+  VERBOSE(LIR) << "* MaxPool2D(" << padding_type << ")" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : IFM(" << node.getInputs().at(MaxPool2DNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : OFM(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const MeanNode &node)
+{
+  VERBOSE(LIR) << "* Mean" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(MeanNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const MulNode &node)
+{
+  VERBOSE(LIR) << "* Mul" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(MulNode::Input::LHS).value() << ", "
+               << node.getInputs().at(MulNode::Input::RHS).value() << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const NegNode &node)
+{
+  VERBOSE(LIR) << "* Neg" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(NegNode::Input::INPUT).value() << ")"
+               << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const PermuteNode &node)
+{
+  std::string permute_type = "Unknown";
+  switch (node.getPermuteType())
+  {
+    case PermuteNode::Type::COPY:
+      permute_type = "Copy";
+      break;
+    case PermuteNode::Type::NHWC_TO_NCHW:
+      permute_type = "NHWC to NCHW";
+      break;
+    case PermuteNode::Type::NCHW_TO_NHWC:
+      permute_type = "NCHW to NHWC";
+      break;
+  }
+
+  VERBOSE(LIR) << "* Permute(" + permute_type + ")" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(0).value() << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const PReLUNode &node)
+{
+  VERBOSE(LIR) << "* PReLU" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(PReLUNode::Input::INPUT).value()
+               << ") Alpha(" << node.getInputs().at(PReLUNode::Input::ALPHA).value() << ")"
+               << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const ReduceMaxNode &node)
+{
+  VERBOSE(LIR) << "* ReduceMax" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(ReduceMaxNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const ReduceMinNode &node)
+{
+  VERBOSE(LIR) << "* ReduceMin" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(ReduceMinNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const ReduceSumNode &node)
+{
+  VERBOSE(LIR) << "* ReduceSum" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(ReduceSumNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const ReLUNode &node)
+{
+  VERBOSE(LIR) << "* ReLU" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(ReLUNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const ReLU1Node &node)
+{
+  VERBOSE(LIR) << "* ReLU1" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(ReLU1Node::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const ReLU6Node &node)
+{
+  VERBOSE(LIR) << "* ReLU6" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(ReLU6Node::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const ReshapeNode &node)
+{
+  VERBOSE(LIR) << "* Reshape" << std::endl;
+  // TODO The shape index should be "node.getInputs().at(1).value()" but not valid for now
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(ReshapeNode::Input::INPUT).value()
+               << ") Shape("
+               << "?"
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const ResizeBilinearNode &node)
+{
+  VERBOSE(LIR) << "* ResizeBilinear" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input("
+               << node.getInputs().at(ResizeBilinearNode::Input::INPUT).value() << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const RNNNode &node)
+{
+  VERBOSE(LIR) << "* RNN" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(RNNNode::Input::INPUT).value()
+               << ") Weights" << node.getInputs().at(RNNNode::Input::WEIGHTS).value()
+               << ") Recurrent Weights"
+               << node.getInputs().at(RNNNode::Input::RECURRENT_WEIGHTS).value() << ") Bias"
+               << node.getInputs().at(RNNNode::Input::BIAS).value() << ") Hidden State"
+               << node.getInputs().at(RNNNode::Input::HIDDEN_STATE_IN).value() << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(RNNNode::Output::OUTPUT).value()
+               << ") Hidden State" << node.getInputs().at(RNNNode::Output::HIDDEN_STATE_OUT).value()
+               << ")" << std::endl;
+}
+
+void Dumper::visit(const RSQRTNode &node)
+{
+  VERBOSE(LIR) << "* RSQRT" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(RSQRTNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const SoftmaxNode &node)
+{
+  VERBOSE(LIR) << "* Softmax" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(SoftmaxNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const SpaceToDepthNode &node)
+{
+  VERBOSE(LIR) << "* SpaceToDepth" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input("
+               << node.getInputs().at(SpaceToDepthNode::Input::INPUT).value() << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const SplitNode &node)
+{
+  VERBOSE(LIR) << "* Split" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(SplitNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const SQRTNode &node)
+{
+  VERBOSE(LIR) << "* SQRT" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(SQRTNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const SquaredDifferenceNode &node)
+{
+  VERBOSE(LIR) << "* SquaredDifference" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input("
+               << node.getInputs().at(SquaredDifferenceNode::Input::LHS).value() << ", "
+               << node.getInputs().at(SquaredDifferenceNode::Input::RHS).value() << ")"
+               << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const SqueezeNode &node)
+{
+  VERBOSE(LIR) << "* Squeeze" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(SqueezeNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const StridedSliceNode &node)
+{
+  VERBOSE(LIR) << "* StridedSlice" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input("
+               << node.getInputs().at(StridedSliceNode::Input::INPUT).value() << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const SubNode &node)
+{
+  VERBOSE(LIR) << "* Sub" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(SubNode::Input::LHS).value() << ", "
+               << node.getInputs().at(SubNode::Input::RHS).value() << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const TanhNode &node)
+{
+  VERBOSE(LIR) << "* TanH" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(TanhNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const TopKV2Node &node)
+{
+  VERBOSE(LIR) << "* TopKV2" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(TopKV2Node::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Outputs : Values("
+               << node.getOutputs().at(TopKV2Node::Output::OUTPUT_VALUES).value() << ") Indices("
+               << node.getOutputs().at(TopKV2Node::Output::OUTPUT_INDICES).value() << ")"
+               << std::endl;
+}
+
+void Dumper::visit(const TransposeConvNode &node)
+{
+  std::string padding_type =
+      node.param().padding.type == model::PaddingType::EXPLICIT ? "Explicit" : "Implicit";
+  VERBOSE(LIR) << "* TransposeConv(" << padding_type << ")" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Output Shape("
+               << node.getInputs().at(TransposeConvNode::Input::OUTPUT_SHAPE).value() << ") KERNEL("
+               << node.getInputs().at(TransposeConvNode::Input::KERNEL).value() << ") IFM("
+               << node.getInputs().at(TransposeConvNode::Input::INPUT).value() << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : OFM(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const TransposeNode &node)
+{
+  VERBOSE(LIR) << "* Transpose" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(TransposeNode::Input::INPUT).value()
+               << ")" << std::endl;
+  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
+}
+
+void Dumper::visit(const model::operation::UnpackNode &node)
+{
+  VERBOSE(LIR) << "* Unpack" << std::endl;
+  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(UnpackNode::Input::INPUT).value()
+               << ")" << std::endl;
+  std::string outputs;
+  const auto &output_indices = node.getOutputs();
+  for (auto it = std::begin(output_indices); it != std::end(output_indices); ++it)
+  {
+    outputs += std::to_string(it->value());
+    if (std::next(it) != std::end(output_indices))
+      outputs += ", ";
+  }
+  VERBOSE(LIR) << "  - Outputs : Outputs(" << outputs << ")" << std::endl;
+}
+
+} // namespace dumper
+} // namespace graph
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/graph/dumper/Dumper.h b/runtimes/neurun/core/src/graph/dumper/Dumper.h
new file mode 100644
index 000000000..882108ad7
--- /dev/null
+++ b/runtimes/neurun/core/src/graph/dumper/Dumper.h
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_GRAPH_DUMPER_H__
+#define __NEURUN_GRAPH_DUMPER_H__
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace graph
+{
+namespace dumper
+{
+
+class Dumper : public model::OperationVisitor
+{
+public:
+  Dumper() = default;
+
+public:
+  void visit(const model::operation::AbsNode &) override;
+  void visit(const model::operation::AddNode &node) override;
+  void visit(const model::operation::ArgMaxNode &) override;
+  void visit(const model::operation::AvgPool2DNode &node) override;
+  void visit(const model::operation::CastNode &) override;
+  void visit(const model::operation::ComparisonNode &) override;
+  void visit(const model::operation::ConcatNode &node) override;
+  void visit(const model::operation::Conv2DNode &node) override;
+  void visit(const model::operation::DepthToSpaceNode &) override;
+  void visit(const model::operation::DepthwiseConv2DNode &node) override;
+  void visit(const model::operation::DequantizeNode &) override;
+  void visit(const model::operation::DivNode &) override;
+  void visit(const model::operation::EmbeddingLookupNode &) override;
+  void visit(const model::operation::ExpNode &) override;
+  void visit(const model::operation::FloorNode &) override;
+  void visit(const model::operation::FullyConnectedNode &node) override;
+  void visit(const model::operation::GatherNode &) override;
+  void visit(const model::operation::HashtableLookupNode &) override;
+  void visit(const model::operation::L2NormalizationNode &) override;
+  void visit(const model::operation::L2Pool2DNode &) override;
+  void visit(const model::operation::LocalResponseNormalizationNode &) override;
+  void visit(const model::operation::LogicalAndNode &) override;
+  void visit(const model::operation::LogicalNotNode &) override;
+  void visit(const model::operation::LogicalOrNode &) override;
+  void visit(const model::operation::LogisticNode &) override;
+  void visit(const model::operation::LSTMNode &) override;
+  void visit(const model::operation::MaxPool2DNode &node) override;
+  void visit(const model::operation::MeanNode &) override;
+  void visit(const model::operation::MulNode &) override;
+  void visit(const model::operation::NegNode &) override;
+  void visit(const model::operation::PermuteNode &node) override;
+  void visit(const model::operation::PReLUNode &) override;
+  void visit(const model::operation::ReduceMaxNode &) override;
+  void visit(const model::operation::ReduceMinNode &) override;
+  void visit(const model::operation::ReduceSumNode &) override;
+  void visit(const model::operation::ReLUNode &) override;
+  void visit(const model::operation::ReLU1Node &) override;
+  void visit(const model::operation::ReLU6Node &) override;
+  void visit(const model::operation::ReshapeNode &node) override;
+  void visit(const model::operation::ResizeBilinearNode &) override;
+  void visit(const model::operation::RNNNode &) override;
+  void visit(const model::operation::RSQRTNode &) override;
+  void visit(const model::operation::SoftmaxNode &node) override;
+  void visit(const model::operation::SpaceToDepthNode &) override;
+  void visit(const model::operation::SplitNode &) override;
+  void visit(const model::operation::SQRTNode &) override;
+  void visit(const model::operation::SquaredDifferenceNode &) override;
+  void visit(const model::operation::SqueezeNode &) override;
+  void visit(const model::operation::StridedSliceNode &) override;
+  void visit(const model::operation::SubNode &) override;
+  void visit(const model::operation::TanhNode &) override;
+  void visit(const model::operation::TopKV2Node &) override;
+  void visit(const model::operation::TransposeConvNode &) override;
+  void visit(const model::operation::TransposeNode &) override;
+  void visit(const model::operation::UnpackNode &) override;
+};
+
+} // namespace dumper
+} // namespace graph
+} // namespace neurun
+
+#endif // __NEURUN_GRAPH_DUMPER_H__
diff --git a/runtimes/neurun/core/src/graph/operand/LowerInfo.cc b/runtimes/neurun/core/src/graph/operand/LowerInfo.cc
new file mode 100644
index 000000000..e8a4fe553
--- /dev/null
+++ b/runtimes/neurun/core/src/graph/operand/LowerInfo.cc
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "graph/operand/LowerInfo.h"
+
+namespace neurun
+{
+namespace graph
+{
+namespace operand
+{
+
+// NO IMPLEMENTATION YET
+
+} // namespace operand
+} // namespace graph
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/graph/operand/Shape4DConvert.h b/runtimes/neurun/core/src/graph/operand/Shape4DConvert.h
new file mode 100644
index 000000000..9b8d44e1f
--- /dev/null
+++ b/runtimes/neurun/core/src/graph/operand/Shape4DConvert.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_GRAPH_OPERAND_SHAPE4D_CONVERT_H__
+#define __NEURUN_GRAPH_OPERAND_SHAPE4D_CONVERT_H__
+
+#include "graph/operand/LowerInfo.h"
+
+namespace neurun
+{
+namespace graph
+{
+namespace operand
+{
+
+inline LowerInfo::Shape4D asShape4D(const model::Shape &shape)
+{
+  switch (shape.rank())
+  {
+    case 0u:
+      return LowerInfo::Shape4D(1, 1, 1, 1);
+
+    case 1u:
+      return LowerInfo::Shape4D(1, 1, 1, shape.dim(0));
+
+    case 2u:
+      return LowerInfo::Shape4D(1, 1, shape.dim(0), shape.dim(1));
+
+    case 3u:
+      return LowerInfo::Shape4D(1, shape.dim(0), shape.dim(1), shape.dim(2));
+
+    case 4u:
+      return LowerInfo::Shape4D(shape.dim(0), shape.dim(1), shape.dim(2), shape.dim(3));
+
+    default:
+      throw "Unsupported rank > 4";
+  }
+}
+
+} // namespace operand
+} // namespace graph
+} // namespace neurun
+
+#endif // __NEURUN_GRAPH_OPERAND_SHAPE4D_CONVERT_H__
diff --git a/runtimes/neurun/core/src/graph/operation/LowerInfo.cc b/runtimes/neurun/core/src/graph/operation/LowerInfo.cc
new file mode 100644
index 000000000..507dcc7d0
--- /dev/null
+++ b/runtimes/neurun/core/src/graph/operation/LowerInfo.cc
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "graph/operation/LowerInfo.h"
+
+namespace neurun
+{
+namespace graph
+{
+namespace operation
+{
+
+LowerInfo::LowerInfo(const backend::Backend *backend, model::Layout layout)
+    : _permute_factor{backend, layout}
+{
+  // DO NOTHING
+}
+
+} // namespace operation
+} // namespace graph
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/graph/pass/OperandPass.cc b/runtimes/neurun/core/src/graph/pass/OperandPass.cc
new file mode 100644
index 000000000..237833cf4
--- /dev/null
+++ b/runtimes/neurun/core/src/graph/pass/OperandPass.cc
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "OperandPass.h"
+
+#include "graph/Graph.h"
+
+namespace neurun
+{
+namespace graph
+{
+namespace pass
+{
+
+void OperandPass::run()
+{
+  _graph.operands().iterate(
+      [&](const model::OperandIndex &index, model::Operand &object) { callback(index, object); });
+}
+
+} // namespace pass
+} // namespace graph
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/graph/pass/OperandPass.h b/runtimes/neurun/core/src/graph/pass/OperandPass.h
new file mode 100644
index 000000000..4b25929c5
--- /dev/null
+++ b/runtimes/neurun/core/src/graph/pass/OperandPass.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_GRAPH_PASS_OPERAND_PASS_H__
+#define __NEURUN_GRAPH_PASS_OPERAND_PASS_H__
+
+#include "Pass.h"
+#include "model/Index.h"
+
+namespace neurun
+{
+namespace model
+{
+class Operand;
+} // namespace graph
+} // namespace neurun
+
+namespace neurun
+{
+namespace graph
+{
+namespace pass
+{
+
+class OperandPass : public Pass
+{
+public:
+  using Pass::Pass;
+
+public:
+  std::string id() override = 0;
+  void run() override final;
+  virtual void callback(const model::OperandIndex &i, model::Operand &o) = 0;
+};
+
+} // namespace pass
+} // namespace graph
+} // namespace neurun
+
+#endif // __NEURUN_GRAPH_PASS_OPERAND_PASS_H__
diff --git a/runtimes/neurun/core/src/graph/pass/OperationPass.cc b/runtimes/neurun/core/src/graph/pass/OperationPass.cc
new file mode 100644
index 000000000..8e6709873
--- /dev/null
+++ b/runtimes/neurun/core/src/graph/pass/OperationPass.cc
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "OperationPass.h"
+
+#include "graph/Graph.h"
+
+namespace neurun
+{
+namespace graph
+{
+namespace pass
+{
+
+void OperationPass::run()
+{
+  _graph.operations().iterate(
+      [&](const model::OperationIndex &index, model::Operation &node) { callback(index, node); });
+}
+
+} // namespace pass
+} // namespace graph
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/graph/pass/OperationPass.h b/runtimes/neurun/core/src/graph/pass/OperationPass.h
new file mode 100644
index 000000000..ac6a85345
--- /dev/null
+++ b/runtimes/neurun/core/src/graph/pass/OperationPass.h
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file  OperationPass.h
+ * @brief This file contains OperationPass class
+ */
+
+#ifndef __NEURUN_GRAPH_PASS_OPERATION_PASS_H__
+#define __NEURUN_GRAPH_PASS_OPERATION_PASS_H__
+
+#include "Pass.h"
+
+#include "model/Index.h"
+#include "model/Operation.h"
+
+namespace neurun
+{
+namespace graph
+{
+namespace pass
+{
+
+/**
+ * @brief  Class to iterate over operations and calls callback() method
+ */
+class OperationPass : public Pass
+{
+public:
+  using Pass::Pass;
+
+public:
+  /**
+   * @brief Returns string id for this pass. Same with class name.
+   *
+   * @return string id
+   */
+  std::string id() override = 0;
+
+  /**
+   * @brief Run the pass
+   */
+  void run() override final;
+
+  /**
+   * @brief The function that will be executed for each operations
+   *
+   * @param i[in] Index of the operation node
+   * @param n[in] The operation node
+   */
+  virtual void callback(const model::OperationIndex &i, model::Operation &n) = 0;
+};
+
+} // namespace pass
+} // namespace graph
+} // namespace neurun
+
+#endif // __NEURUN_GRAPH_PASS_OPERATION_PASS_H__
diff --git a/runtimes/neurun/src/graph/pass/Pass.cc b/runtimes/neurun/core/src/graph/pass/Pass.cc
index 4c3436961..4c3436961 100644
--- a/runtimes/neurun/src/graph/pass/Pass.cc
+++ b/runtimes/neurun/core/src/graph/pass/Pass.cc
diff --git a/runtimes/neurun/src/graph/pass/Pass.h b/runtimes/neurun/core/src/graph/pass/Pass.h
index 4200936d1..4200936d1 100644
--- a/runtimes/neurun/src/graph/pass/Pass.h
+++ b/runtimes/neurun/core/src/graph/pass/Pass.h
diff --git a/runtimes/neurun/core/src/graph/pass/PermutationEliminationPass.cc b/runtimes/neurun/core/src/graph/pass/PermutationEliminationPass.cc
new file mode 100644
index 000000000..1fc9b69cf
--- /dev/null
+++ b/runtimes/neurun/core/src/graph/pass/PermutationEliminationPass.cc
@@ -0,0 +1,199 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "PermutationEliminationPass.h"
+
+#include "model/Operand.h"
+#include "graph/operand/LowerInfo.h"
+#include "graph/Graph.h"
+#include "backend/IConfig.h"
+#include "util/logging.h"
+#include "compiler/BackendResolver.h"
+
+namespace neurun
+{
+namespace graph
+{
+namespace pass
+{
+void PermutationEliminationPass::callback(const model::OperandIndex &inp_index,
+                                          model::Operand &object)
+{
+  if (_graph.getInputs().contains(inp_index))
+  {
+    eliminateInput(inp_index, object);
+  }
+  else if (_graph.getOutputs().contains(inp_index))
+  {
+    eliminateOutput(inp_index, object);
+  }
+}
+
+void PermutationEliminationPass::eliminateInput(const model::OperandIndex &inp_index,
+                                                model::Operand &object)
+{
+  auto &model_inputs = _graph.getInputs();
+
+  // get uses of the model's given input
+  auto uses = object.getUses();
+
+  // input must be used just by permutation
+  if (uses.size() != 1)
+  {
+    return;
+  }
+
+  for (auto input_use : uses.list())
+  {
+    auto &perm_operation = _graph.operations().at(input_use);
+    auto perm_inputs = perm_operation.getInputs();
+
+    auto perm_outputs = perm_operation.getOutputs();
+
+    if (!isPermuteLayerToEliminate(perm_inputs, perm_outputs, true))
+    {
+      return;
+    }
+
+    assert(perm_inputs.at(0) == inp_index);
+
+    VERBOSE(PermutationEliminationPass::EliminateInput) << "remove NHWC_TO_NCHW permutation\n";
+
+    // set model's new input, which was output of permutation
+    model_inputs.replace(inp_index, perm_outputs.at(0));
+
+    // remove model's input, which is also input of permutation
+    _graph.removeOperand(inp_index);
+
+    // remove permutation operation
+    assert(_graph.subgraphs().containsOperation(input_use));
+    auto subg_idx = _graph.subgraphs().getOperation(input_use);
+    _graph.subgraphs().remove(subg_idx);
+    _graph.operations().remove(input_use);
+
+    VERBOSE(PermutationEliminationPass::EliminateInput)
+        << inp_index.value() << " is model's input and is removed. New input is "
+        << perm_outputs.at(0).value() << "\n"
+        << input_use.value() << " is removed permutation operation\n";
+  }
+}
+
+void PermutationEliminationPass::eliminateOutput(const model::OperandIndex &out_index,
+                                                 model::Operand &object)
+{
+  auto &model_outputs = _graph.getOutputs();
+
+  // get defs of the model's given output
+  auto defs = object.getDef();
+
+  // output must use just permutation
+  if (defs.size() != 1)
+  {
+    return;
+  }
+
+  for (auto output_def : defs.list())
+  {
+    auto &perm_operation = _graph.operations().at(output_def);
+    auto perm_outputs = perm_operation.getOutputs();
+
+    auto perm_inputs = perm_operation.getInputs();
+    if (!isPermuteLayerToEliminate(perm_inputs, perm_outputs, false))
+    {
+      return;
+    }
+
+    assert(perm_outputs.at(0) == out_index);
+
+    VERBOSE(PermutationEliminationPass::EliminateOutput) << "remove NCHW_TO_NHWC permutation\n";
+
+    // Update operations' output that is used by permute operand
+    for (auto perm_input_index : perm_inputs)
+    {
+      auto &perm_input_operand = _graph.operands().at(perm_input_index);
+      perm_input_operand.removeUse(output_def);
+    }
+
+    // set model's new output, which was input of permutation
+    model_outputs.replace(out_index, perm_inputs.at(0));
+
+    // remove model's output, which is also output of permutation
+    _graph.removeOperand(out_index);
+
+    // remove permutation operation
+    assert(_graph.subgraphs().containsOperation(output_def));
+    auto subg_idx = _graph.subgraphs().getOperation(output_def);
+    _graph.subgraphs().remove(subg_idx);
+    _graph.operations().remove(output_def);
+
+    VERBOSE(PermutationEliminationPass::EliminateOutput)
+        << out_index.value() << " is model's output and is removed. New output is "
+        << perm_inputs.at(0).value() << "\n"
+        << output_def.value() << " is removed permutation operation\n";
+  }
+}
+
+bool PermutationEliminationPass::isPermuteLayerToEliminate(
+    const model::OperandIndexSequence &inp_indexes, const model::OperandIndexSequence &out_indexes,
+    bool is_for_model_input)
+{
+  auto input_def_factors = _graph.getLowerInfo(inp_indexes.at(0))->def_factors();
+  auto output_def_factors = _graph.getLowerInfo(out_indexes.at(0))->def_factors();
+
+  auto input_layout = input_def_factors.getOnlyElement().layout();
+  auto output_layout = output_def_factors.getOnlyElement().layout();
+
+  if (input_def_factors.size() != 1 || output_def_factors.size() != 1)
+  {
+    return false;
+  }
+
+  // all operands' factor must be the same
+  for (auto index : inp_indexes)
+  {
+    auto op_factor_set = _graph.getLowerInfo(index)->def_factors();
+    if (op_factor_set.size() != 1 ||
+        input_layout != _graph.getLowerInfo(index)->def_factors().getOnlyElement().layout())
+    {
+      return false;
+    }
+  }
+  // all operands' factor must be the same
+  for (auto index : out_indexes)
+  {
+    auto op_factor_set = _graph.getLowerInfo(index)->def_factors();
+    if (op_factor_set.size() != 1 ||
+        output_layout != _graph.getLowerInfo(index)->def_factors().getOnlyElement().layout())
+    {
+      return false;
+    }
+  }
+
+  if (is_for_model_input)
+  {
+    // check if this is NHWC_TO_NCHW permutation: must have single input, which is model's input
+    return (inp_indexes.size() == 1 && input_layout == model::Layout::NHWC &&
+            output_layout == model::Layout::NCHW);
+  }
+
+  // check if this is NCHW_TO_NHWC permutation: must have single output, which is model's output
+  return (out_indexes.size() == 1 && input_layout == model::Layout::NCHW &&
+          output_layout == model::Layout::NHWC);
+}
+
+} // namespace pass
+} // namespace graph
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/graph/pass/PermutationEliminationPass.h b/runtimes/neurun/core/src/graph/pass/PermutationEliminationPass.h
new file mode 100644
index 000000000..332eeb6f4
--- /dev/null
+++ b/runtimes/neurun/core/src/graph/pass/PermutationEliminationPass.h
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_GRAPH_PASS_PERMUTATION_ELIMINATION_PASS_H__
+#define __NEURUN_GRAPH_PASS_PERMUTATION_ELIMINATION_PASS_H__
+
+#include "OperandPass.h"
+#include "model/Operand.h"
+#include "model/OperandIndexSequence.h"
+
+namespace neurun
+{
+namespace graph
+{
+namespace pass
+{
+
+class PermutationEliminationPass : public OperandPass
+{
+public:
+  using OperandPass::OperandPass;
+
+public:
+  std::string id() override { return "PermutationEliminationPass"; }
+
+  void callback(const model::OperandIndex &index, model::Operand &object) override;
+
+private:
+  /**
+   * @brief Remove Permute operation that permutates input
+   *
+   * Note: This function aslo removes model's input and
+   * sets output of permutation as model's new input
+   *
+   * @param inp_index is the target operand index for the elimination
+   * @param object is the target operand object for the elimination
+   *
+   * @return
+   */
+  void eliminateInput(const model::OperandIndex &inp_index, model::Operand &object);
+
+  /**
+   * @brief Remove Permute operation that permutates output of a model
+   *
+   * Note: This function aslo removes model's output and
+   * sets input of permutation as model's new output
+   *
+   * @param out_index is the target operand index for the elimination
+   * @param object is the target operand object for the elimination
+   *
+   * @return
+   */
+  void eliminateOutput(const model::OperandIndex &out_index, model::Operand &object);
+
+  /**
+   * @brief Determine if passed operands are permute layer's input and output, that must be
+   * eliminated
+   *
+   * @param inp_index indexes of the input operand to operation
+   * @param out_index indexes of the output operand to operation
+   * @param is_for_model_input checking for model's input or output
+   *
+   * @return if it is permutation layer
+   */
+  bool isPermuteLayerToEliminate(const model::OperandIndexSequence &inp_indexes,
+                                 const model::OperandIndexSequence &out_indexes,
+                                 bool is_for_model_input);
+};
+
+} // namespace pass
+} // namespace graph
+} // namespace neurun
+
+#endif // __NEURUN_GRAPH_PASS_PERMUTATION_ELIMINATION_PASS_H__
diff --git a/runtimes/neurun/core/src/graph/pass/PermutationInsertionPass.cc b/runtimes/neurun/core/src/graph/pass/PermutationInsertionPass.cc
new file mode 100644
index 000000000..0f07b47fe
--- /dev/null
+++ b/runtimes/neurun/core/src/graph/pass/PermutationInsertionPass.cc
@@ -0,0 +1,210 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "PermutationInsertionPass.h"
+
+#include <cassert>
+#include <utility>
+#include <unordered_map>
+
+#include "model/Operand.h"
+#include "graph/operation/LowerInfo.h"
+#include "graph/Graph.h"
+#include "backend/IConfig.h"
+#include "util/logging.h"
+#include "cpp14/memory.h"
+#include "model/operation/PermuteNode.h"
+#include "graph/operand/Shape4DConvert.h"
+#include "compiler/BackendResolver.h"
+
+namespace neurun
+{
+namespace graph
+{
+namespace pass
+{
+
+void PermutationInsertionPass::callback(const model::OperandIndex &index, model::Operand &object)
+{
+  auto &&operand_li = _graph.getLowerInfo(index);
+  assert(operand_li);
+
+  // NOTE Later, constants also will have Def
+  // Ignore constants
+  if (operand_li->def_factors().size() == 0)
+  {
+    return;
+  }
+
+  std::list<model::OperationIndex> permute_indexes;
+
+  // Build a map for all necessary type of operands
+  std::unordered_map<operand::PermuteFactor, model::OperandIndex> factor_to_index;
+  {
+    assert(operand_li->def_factors().size() == 1);
+    for (auto factor : operand_li->def_factors())
+    {
+      factor_to_index.emplace(factor, index);
+    }
+
+    auto insert_set = operand_li->use_factors() - operand_li->def_factors();
+    for (auto factor : insert_set)
+    {
+      const auto permute_operation_index = insertPermute(index, factor);
+      permute_indexes.push_back(permute_operation_index);
+      VERBOSE(PermutationInsertionPass) << "Insert 'Permute' operation for operand "
+                                        << index.value() << std::endl;
+      const auto &permute_operation = _graph.operations().at(permute_operation_index);
+      const auto permuted_operand_index = permute_operation.getOutputs().at(0);
+      factor_to_index.emplace(factor, permuted_operand_index);
+    }
+  }
+
+  // Update operations' input that uses this operand
+  {
+    std::list<model::OperationIndex> remove_list;
+
+    auto uses = object.getUses();
+    for (auto use : uses.list())
+    {
+      // If permute operation, ignore it
+      if (std::find(permute_indexes.begin(), permute_indexes.end(), use) != permute_indexes.end())
+        continue;
+
+      auto &operation = _graph.operations().at(use);
+      assert(_graph.subgraphs().containsOperation(use));
+      auto subg_index = _graph.subgraphs().getOperation(use);
+      auto subg_li = _graph.getLowerInfo(subg_index);
+      assert(subg_li);
+      const auto subg_layout = subg_li->layout();
+      const backend::Backend *backend = subg_li->backend();
+      assert(backend);
+      auto use_node_inputs = operation.getInputs();
+      assert(use_node_inputs.contains(index));
+
+      auto new_index = factor_to_index.at({backend, subg_layout});
+      if (index != new_index)
+      {
+        // Update from subgraph
+        _graph.subgraphs().at(subg_index).replaceInput(index, new_index);
+
+        // Update from operation
+        operation.replaceInput(index, new_index);
+
+        // Update from operand
+        remove_list.push_back(
+            use); // Removal should be done in another loop since we are in the loop
+        _graph.operands().at(new_index).appendUse(use);
+      }
+    }
+
+    for (auto &operation : remove_list)
+    {
+      object.removeUse(operation);
+    }
+  }
+}
+
+model::OperationIndex
+PermutationInsertionPass::insertPermute(const model::OperandIndex &operand_index,
+                                        const operand::PermuteFactor &factor)
+{
+  assert(!_graph.isBuildingPhase());
+
+  auto &operand = _graph.operands().at(operand_index);
+
+  // Generate output operand and permute operation
+  auto out_operand_index = _graph.addOperand(operand.shape(), operand.typeInfo());
+  // change model output if operand_index is model output index
+  auto &model_outputs = _graph.getOutputs();
+  if (model_outputs.contains(operand_index))
+  {
+    model_outputs.replace(operand_index, out_operand_index);
+  }
+
+  // Find PermuteNode information
+  auto input_backend = _graph.getLowerInfo(operand_index)->def_factors().getOnlyElement().backend();
+  auto output_backend = factor.backend();
+  // NOTE PermuteNode may not have specific layout because the layout of input and output may be
+  // different.
+  const auto permute_node_layout = model::Layout::UNKNOWN;
+  const auto permute_node_backend = backend::BackendManager::instance().getDefault();
+  const operand::PermuteFactor permute_node_factor{permute_node_backend, permute_node_layout};
+
+  // Update LowerInfo of input operand
+  auto operand_lower_info = _graph.getLowerInfo(operand_index);
+  operand_lower_info->removeUsePermuteFactor(factor);
+  operand_lower_info->addUsePermuteFactor(permute_node_factor);
+
+  // Update LowerInfo of output operand
+  auto out_operand_li =
+      nnfw::cpp14::make_unique<operand::LowerInfo>(operand::asShape4D(operand.shape()));
+
+  // The input and output factors of all nodes will be the same except PermuteNode. So Tensor's
+  // allocators allocates memory using only the information of def permutation factor now.
+  // TODO Change param to permute_node_factor
+  out_operand_li->addDefPermuteFactor(factor);
+  out_operand_li->addUsePermuteFactor(factor);
+  _graph.setLowerInfo(out_operand_index, std::move(out_operand_li));
+
+  auto input_backend_ctx = _graph.backend_resolver()->getBackendContext(input_backend);
+  auto output_backend_ctx = _graph.backend_resolver()->getBackendContext(output_backend);
+
+  // Insert permute operation to the graph
+  const auto input_layout =
+      _graph.getLowerInfo(operand_index)->def_factors().getOnlyElement().layout();
+  const auto output_layout = factor.layout();
+  using PermuteNode = model::operation::PermuteNode;
+  const auto permute_type = [&]() {
+    if (input_layout == model::Layout::NHWC && output_layout == model::Layout::NCHW)
+    {
+      return PermuteNode::Type::NHWC_TO_NCHW;
+    }
+    else if (input_layout == model::Layout::NCHW && output_layout == model::Layout::NHWC)
+    {
+      return PermuteNode::Type::NCHW_TO_NHWC;
+    }
+    else
+    {
+      return PermuteNode::Type::COPY;
+    }
+  }();
+  auto insert_node = nnfw::cpp14::make_unique<PermuteNode>(
+      operand_index, out_operand_index, input_backend_ctx, output_backend_ctx, permute_type);
+
+  auto node_index = _graph.operations().push(std::move(insert_node));
+  const auto &node = _graph.operations().at(node_index);
+
+  // Subgraph
+  {
+    auto subg_index = _graph.subgraphs().emplace(node_index, node, permute_node_layout);
+    auto &subg = _graph.subgraphs().at(subg_index);
+    subg.setInputs(node.getInputs());
+    subg.setOutputs(node.getOutputs());
+    _graph.setLowerInfo(subg_index, nnfw::cpp14::make_unique<graph::operation::LowerInfo>(
+                                        permute_node_backend, permute_node_layout));
+  }
+
+  // Update Use/Def info
+  {
+    _graph.operands().at(operand_index).appendUse(node_index);
+    _graph.operands().at(out_operand_index).appendDef(node_index);
+  }
+  return node_index;
+}
+} // namespace pass
+} // namespace graph
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/graph/pass/PermutationInsertionPass.h b/runtimes/neurun/core/src/graph/pass/PermutationInsertionPass.h
new file mode 100644
index 000000000..b430be8b3
--- /dev/null
+++ b/runtimes/neurun/core/src/graph/pass/PermutationInsertionPass.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_GRAPH_PASS_PERMUTATION_INSERTION_PASS_H__
+#define __NEURUN_GRAPH_PASS_PERMUTATION_INSERTION_PASS_H__
+
+#include "OperandPass.h"
+#include "model/Operand.h" //for model::OperationIndex
+#include "backend/BackendManager.h"
+#include "graph/operand/PermuteFactor.h"
+
+namespace neurun
+{
+namespace graph
+{
+namespace pass
+{
+
+class PermutationInsertionPass : public OperandPass
+{
+public:
+  using OperandPass::OperandPass;
+
+public:
+  std::string id() override { return "PermutationInsertionPass"; }
+  void callback(const model::OperandIndex &index, model::Operand &object) override;
+
+  /**
+   * @brief Insert Permute operation that has given operand as input
+   *
+   * @param operand_index is the target operand index for the insertion
+   * @param factor is the output operand's backend type and layout
+   *
+   * @return model::OperationIndex
+   */
+  model::OperationIndex insertPermute(const model::OperandIndex &operand_index,
+                                      const operand::PermuteFactor &factor);
+
+private:
+};
+
+} // namespace pass
+} // namespace graph
+} // namespace neurun
+
+#endif // __NEURUN_GRAPH_PASS_PERMUTATION_INSERTION_PASS_H__
diff --git a/runtimes/neurun/core/src/graph/verifier/Verifier.cc b/runtimes/neurun/core/src/graph/verifier/Verifier.cc
new file mode 100644
index 000000000..46e2ead55
--- /dev/null
+++ b/runtimes/neurun/core/src/graph/verifier/Verifier.cc
@@ -0,0 +1,97 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "Verifier.h"
+
+#include "graph/Graph.h"
+#include "model/OperationIndexMap.h"
+
+#include "util/logging.h"
+
+namespace neurun
+{
+namespace graph
+{
+namespace verifier
+{
+
+//
+// DAGChecker
+//
+
+bool DAGChecker::verify(const Graph &graph) const
+{
+  auto &operations = graph.operations();
+  bool cyclic = false;
+
+  model::OperationIndexMap<bool> visited;
+  operations.iterate([&](const model::OperationIndex &index, const model::Operation &) {
+    visited[index] = false;
+  });
+  model::OperationIndexMap<bool> on_stack = visited; // Copy from visited
+
+  std::function<void(const model::OperationIndex &index, const model::Operation &)> dfs_recursive =
+      [&](const model::OperationIndex &index, const model::Operation &node) -> void {
+    if (on_stack[index])
+      cyclic = true;
+    if (visited[index])
+      return;
+    visited[index] = true;
+    on_stack[index] = true;
+
+    for (auto output : node.getOutputs())
+    {
+      const auto &operand = graph.operands().at(output);
+      for (const auto &use : operand.getUses().list())
+      {
+        dfs_recursive(use, graph.operations().at(use));
+      }
+    }
+
+    on_stack[index] = false;
+  };
+
+  operations.iterate(dfs_recursive);
+
+  return !cyclic;
+}
+
+//
+// EdgeConsistencyVerifier
+//
+
+bool EdgeConsistencyChecker::verify(const Graph &graph) const
+{
+  auto &operations = graph.operations();
+  uint32_t mismatches = 0;
+  operations.iterate([&](const model::OperationIndex &index, const model::Operation &node) {
+    for (auto operand_index : node.getInputs())
+    {
+      auto &operand = graph.operands().at(operand_index);
+      mismatches += (operand.getUses().contains(index) ? 0 : 1);
+    }
+    for (auto operand_index : node.getOutputs())
+    {
+      auto &operand = graph.operands().at(operand_index);
+      mismatches += (operand.getDef().contains(index) ? 0 : 1);
+    }
+  });
+  return mismatches == 0;
+}
+
+} // namespace verifier
+} // namespace graph
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/graph/verifier/Verifier.h b/runtimes/neurun/core/src/graph/verifier/Verifier.h
new file mode 100644
index 000000000..ebd908832
--- /dev/null
+++ b/runtimes/neurun/core/src/graph/verifier/Verifier.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_GRAPH_VERIFIER_VERIFIER_H__
+#define __NEURUN_GRAPH_VERIFIER_VERIFIER_H__
+
+namespace neurun
+{
+namespace graph
+{
+class Graph;
+} // namespace graph
+} // namespace neurun
+
+namespace neurun
+{
+namespace graph
+{
+namespace verifier
+{
+
+struct IVerifier
+{
+  virtual ~IVerifier() = default;
+  virtual bool verify(const Graph &graph) const = 0;
+};
+
+} // namespace verifier
+} // namespace graph
+} // namespace neurun
+
+namespace neurun
+{
+namespace graph
+{
+namespace verifier
+{
+
+class DAGChecker : public IVerifier
+{
+public:
+  bool verify(const Graph &graph) const override;
+};
+
+class EdgeConsistencyChecker : public IVerifier
+{
+public:
+  bool verify(const Graph &graph) const override;
+};
+
+} // namespace verifier
+} // namespace graph
+} // namespace neurun
+
+#endif // __NEURUN_GRAPH_VERIFIER_VERIFIER_H__
diff --git a/runtimes/neurun/core/src/library_info.cc b/runtimes/neurun/core/src/library_info.cc
new file mode 100644
index 000000000..601d09185
--- /dev/null
+++ b/runtimes/neurun/core/src/library_info.cc
@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+volatile const char info[] = "library information : runtime=neurun";
diff --git a/runtimes/neurun/core/src/model/LayoutSet.cc b/runtimes/neurun/core/src/model/LayoutSet.cc
new file mode 100644
index 000000000..fec6138a7
--- /dev/null
+++ b/runtimes/neurun/core/src/model/LayoutSet.cc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "LayoutSet.h"
+
+namespace neurun
+{
+namespace model
+{
+
+LayoutSet::LayoutSet(std::initializer_list<Layout> layouts)
+{
+  for (auto layout : layouts)
+  {
+    _set.insert(layout);
+  }
+}
+
+LayoutSet LayoutSet::operator|(const LayoutSet &other) const
+{
+  auto ret = *this;
+  for (auto layout : other)
+  {
+    ret.add(layout);
+  }
+  return ret;
+}
+
+LayoutSet LayoutSet::operator&(const LayoutSet &other) const
+{
+  LayoutSet ret;
+  for (auto layout : other)
+  {
+    if (contains(layout))
+    {
+      ret.add(layout);
+    }
+  }
+  return ret;
+}
+
+LayoutSet LayoutSet::operator-(const LayoutSet &other) const
+{
+  auto ret = *this;
+  for (auto layout : other)
+  {
+    ret.remove(layout);
+  }
+  return ret;
+}
+
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/LayoutSet.h b/runtimes/neurun/core/src/model/LayoutSet.h
new file mode 100644
index 000000000..be75c8ee5
--- /dev/null
+++ b/runtimes/neurun/core/src/model/LayoutSet.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_GRAPH_OPERAND_LAYOUT_SET_H__
+#define __NEURUN_GRAPH_OPERAND_LAYOUT_SET_H__
+
+#include <initializer_list>
+#include <unordered_set>
+
+#include "model/Layout.h"
+
+namespace neurun
+{
+namespace model
+{
+
+class LayoutSet
+{
+public:
+  LayoutSet() = default;
+  LayoutSet(std::initializer_list<Layout> layouts);
+
+public:
+  void add(const Layout &layout) { _set.insert(layout); }
+  void remove(const Layout &layout) { _set.erase(layout); }
+  uint32_t size() const { return static_cast<uint32_t>(_set.size()); }
+  bool contains(const Layout &layout) const { return _set.find(layout) != _set.end(); }
+
+public:
+  LayoutSet operator|(const LayoutSet &other) const; // Union
+  LayoutSet operator&(const LayoutSet &other) const; // Intersect
+  LayoutSet operator-(const LayoutSet &other) const; // Minus
+
+public:
+  std::unordered_set<Layout>::const_iterator begin() const { return _set.begin(); }
+  std::unordered_set<Layout>::const_iterator end() const { return _set.end(); }
+
+private:
+  std::unordered_set<Layout> _set;
+};
+
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_GRAPH_OPERAND_LAYOUT_SET_H__
diff --git a/runtimes/neurun/core/src/model/Operand.cc b/runtimes/neurun/core/src/model/Operand.cc
new file mode 100644
index 000000000..4d72fac8c
--- /dev/null
+++ b/runtimes/neurun/core/src/model/Operand.cc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/Operand.h"
+
+namespace neurun
+{
+namespace model
+{
+
+size_t Operand::operandSize(void) const
+{
+  const uint32_t ranks = shape().rank();
+  int32_t elements = 1;
+
+  for (uint32_t rank = 0; rank < ranks; rank++)
+  {
+    elements *= shape().dim(rank);
+  }
+
+  DataType type = typeInfo().type();
+  size_t element_size = sizeOfDataType(type);
+
+  // Value of type is matched with OperandCode enum in NeuralNetworks.h
+  return element_size * elements;
+}
+
+void Operand::appendUse(const ::neurun::model::OperationIndex &idx)
+{
+  assert(!_uses.contains(idx));
+
+  _uses.append(idx);
+}
+
+void Operand::removeUse(const ::neurun::model::OperationIndex &idx)
+{
+  assert(_uses.contains(idx));
+
+  _uses.remove(idx);
+}
+
+void Operand::appendDef(const ::neurun::model::OperationIndex &idx)
+{
+  assert(!isConstant());
+  assert(_def.size() == 0);
+
+  _def.append(idx);
+}
+
+void Operand::removeDef(const ::neurun::model::OperationIndex &idx)
+{
+  assert(_def.contains(idx));
+
+  _def.remove(idx);
+}
+
+void Operand::parent_info(std::unique_ptr<graph::operand::ParentInfo> &&parent_info)
+{
+  _parent_info = std::move(parent_info);
+}
+
+const graph::operand::ParentInfo *Operand::parent_info() const { return _parent_info.get(); }
+
+graph::operand::ParentInfo *Operand::parent_info() { return _parent_info.get(); }
+
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/OperandConstraint.cc b/runtimes/neurun/core/src/model/OperandConstraint.cc
new file mode 100644
index 000000000..2730f712a
--- /dev/null
+++ b/runtimes/neurun/core/src/model/OperandConstraint.cc
@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/OperandConstraint.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/OperandIndexSequence.cc b/runtimes/neurun/core/src/model/OperandIndexSequence.cc
new file mode 100644
index 000000000..a9454df24
--- /dev/null
+++ b/runtimes/neurun/core/src/model/OperandIndexSequence.cc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/OperandIndexSequence.h"
+
+#include <algorithm>
+
+namespace neurun
+{
+namespace model
+{
+
+OperandIndexSequence::OperandIndexSequence(std::initializer_list<OperandIndex> list) : _set(list)
+{
+  // DO NOTHING
+}
+
+OperandIndexSequence::OperandIndexSequence(std::initializer_list<int32_t> list)
+{
+  for (auto val : list)
+  {
+    _set.emplace_back(static_cast<uint32_t>(val));
+  }
+}
+
+OperandIndexSequence::OperandIndexSequence(std::initializer_list<uint32_t> list)
+{
+  for (auto val : list)
+  {
+    _set.emplace_back(val);
+  }
+}
+
+bool OperandIndexSequence::contains(const OperandIndex &index) const
+{
+  return std::find(_set.begin(), _set.end(), index) != _set.end();
+}
+
+void OperandIndexSequence::replace(const OperandIndex &from, const OperandIndex &to)
+{
+  std::replace(_set.begin(), _set.end(), from, to);
+}
+
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/Operation.cc b/runtimes/neurun/core/src/model/Operation.cc
new file mode 100644
index 000000000..fc1bd599e
--- /dev/null
+++ b/runtimes/neurun/core/src/model/Operation.cc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/Operation.h"
+
+#include <cassert>
+
+#include "graph/operation/LowerInfo.h"
+
+namespace neurun
+{
+namespace model
+{
+
+Operation::Operation(OperandConstraint input_constr, const OperandIndexSequence &inputs,
+                     const OperandIndexSequence &outputs)
+    : _input_constr{input_constr}, _inputs{inputs}, _outputs{outputs}
+{
+}
+
+Operation::Operation(OperandConstraint input_constr) : _input_constr{input_constr} {}
+
+Operation::~Operation() = default;
+
+void Operation::setInputs(const OperandIndexSequence &indexes)
+{
+  assert(_input_constr.check(indexes.size()));
+  _inputs = indexes;
+}
+
+void Operation::setOutputs(const OperandIndexSequence &indexes) { _outputs = indexes; }
+
+void Operation::replaceInput(const OperandIndex &from, const OperandIndex &to)
+{
+  _inputs.replace(from, to);
+}
+
+void Operation::replaceOutput(const OperandIndex &from, const OperandIndex &to)
+{
+  _outputs.replace(from, to);
+}
+
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/OperationIndexList.cc b/runtimes/neurun/core/src/model/OperationIndexList.cc
new file mode 100644
index 000000000..e2c077ed4
--- /dev/null
+++ b/runtimes/neurun/core/src/model/OperationIndexList.cc
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/OperationIndexList.h"
+
+#include <algorithm>
+
+namespace neurun
+{
+namespace model
+{
+
+OperationIndexList::OperationIndexList(std::initializer_list<OperationIndex> list) : _list(list)
+{
+  // DO NOTHING
+}
+
+bool OperationIndexList::contains(const ::neurun::model::OperationIndex &index) const
+{
+  return std::find(_list.begin(), _list.end(), index) != _list.end();
+}
+
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/Shape.cc b/runtimes/neurun/core/src/model/Shape.cc
new file mode 100644
index 000000000..b7f7bff68
--- /dev/null
+++ b/runtimes/neurun/core/src/model/Shape.cc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/Shape.h"
+#include "util/Utils.h"
+
+#include <cassert>
+#include <functional>
+#include <numeric>
+
+namespace neurun
+{
+namespace model
+{
+
+FeatureShape Shape::asFeature(Layout layout) const
+{
+  assert(rank() == 4);
+  assert(layout == Layout::NHWC || layout == Layout::NCHW);
+
+  if (layout == Layout::NHWC)
+  {
+    // Feature Map in NHWC layout
+    //  - Dimension(0) -> Batch
+    //  - Dimension(1) -> Height
+    //  - Dimension(2) -> Width
+    //  - Dimension(3) -> Depth
+    const auto batch = dim(0);
+    const auto depth = dim(3);
+    const auto height = dim(1);
+    const auto width = dim(2);
+
+    return {batch, depth, height, width};
+  }
+  else if (layout == Layout::NCHW)
+  {
+    // Feature Map in NHWC layout
+    //  - Dimension(0) -> Batch
+    //  - Dimension(1) -> Depth
+    //  - Dimension(2) -> Height
+    //  - Dimension(3) -> Width
+    const auto batch = dim(0);
+    const auto depth = dim(1);
+    const auto height = dim(2);
+    const auto width = dim(3);
+
+    return {batch, depth, height, width};
+  }
+  else
+  {
+    throw std::runtime_error("Wrong Layout");
+  }
+}
+
+// Extended dimension is filled with 1.
+void Shape::extendRank(int to_rank)
+{
+  assert(to_rank - rank() >= 0);
+  _dimensions.insert(_dimensions.cbegin(), to_rank - rank(), 1);
+}
+
+uint64_t Shape::num_elements() const
+{
+  // All of the nodes must have non-negative dimension
+  assert(std::all_of(_dimensions.begin(), _dimensions.end(),
+                     [](const int32_t &v) { return (v >= 0); }));
+
+  return std::accumulate(_dimensions.cbegin(), _dimensions.cend(), UINT64_C(1),
+                         std::multiplies<uint64_t>());
+}
+
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/Subgraph.cc b/runtimes/neurun/core/src/model/Subgraph.cc
new file mode 100644
index 000000000..4b8402720
--- /dev/null
+++ b/runtimes/neurun/core/src/model/Subgraph.cc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/Subgraph.h"
+#include "model/OperationVisitor.h"
+#include <sstream>
+
+namespace neurun
+{
+namespace model
+{
+
+Subgraph::Subgraph(Layout layout) : Operation{OperandConstraint::createAny()}, _layout{layout}
+{
+  // DO NOTHING
+}
+
+void Subgraph::accept(OperationVisitor &v) const { v.visit(*this); }
+
+// TODO: Impl Dumper instead of this method
+std::string Subgraph::getStr() const
+{
+  // "  subgraph IN(xx,xx,xx) -> { op0, op1, op2 } -> OUT(yy,yy,yy)"
+  std::stringstream ss;
+  ss << "  subgraph IN(";
+  for (const auto &index : getInputs())
+  {
+    ss << " " << index.value();
+  }
+  ss << " ) -> {";
+  for (const auto &elem : _operations)
+  {
+    ss << " " << elem.index.value() << "(" << elem.node->getName() << ")";
+  }
+  ss << " } -> OUT(";
+  for (const auto &index : getOutputs())
+  {
+    ss << " " << index.value();
+  }
+  ss << " )";
+  return ss.str();
+}
+
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/Subgraphs.cc b/runtimes/neurun/core/src/model/Subgraphs.cc
new file mode 100644
index 000000000..64d806dfa
--- /dev/null
+++ b/runtimes/neurun/core/src/model/Subgraphs.cc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/Subgraphs.h"
+#include "util/logging.h"
+#include "cpp14/memory.h"
+
+#include <cassert>
+#include <string>
+
+namespace neurun
+{
+namespace model
+{
+
+SubgraphIndex Subgraphs::emplace(const OperationIndex &index, const Operation &node, Layout layout)
+{
+  std::unique_ptr<Subgraph> subg = nnfw::cpp14::make_unique<model::Subgraph>(layout);
+  subg->appendOperation(index, node);
+  return push(std::move(subg));
+}
+
+SubgraphIndex Subgraphs::emplace(std::unique_ptr<Subgraph> &&subg) { return push(std::move(subg)); }
+
+bool Subgraphs::containsOperation(const OperationIndex &operation_index) const
+{
+  return findOperation(operation_index).valid();
+}
+
+SubgraphIndex Subgraphs::getOperation(const OperationIndex &operation_index) const
+{
+  SubgraphIndex ret = findOperation(operation_index);
+  assert(ret.valid());
+  return ret;
+}
+
+// TODO: Extract this into external helper function
+void Subgraphs::dump(const std::string &msg) const
+{
+  VERBOSE(Subgraphs) << "Subgraphs(" << msg << ")" << std::endl;
+  iterate([&](const SubgraphIndex &idx, const model::Subgraph &subg) {
+    VERBOSE(Subgraphs) << idx.value() << "] " << subg.getStr() << std::endl;
+  });
+}
+
+SubgraphIndex Subgraphs::findOperation(const OperationIndex &operation_index) const
+{
+  SubgraphIndex ret;
+  iterate([&](const SubgraphIndex &index, const Subgraph &object) {
+    for (const auto &elem : object.operations())
+    {
+      if (elem.index == operation_index)
+        ret = index;
+    }
+  });
+  return ret;
+}
+
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/TypeInfo.cc b/runtimes/neurun/core/src/model/TypeInfo.cc
new file mode 100644
index 000000000..46ac2d4de
--- /dev/null
+++ b/runtimes/neurun/core/src/model/TypeInfo.cc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/TypeInfo.h"
+
+namespace neurun
+{
+namespace model
+{
+
+bool operator==(const TypeInfo &lhs, const TypeInfo &rhs)
+{
+  if (lhs.type() != rhs.type())
+  {
+    return false;
+  }
+
+  if (lhs.offset() != rhs.offset())
+  {
+    return false;
+  }
+
+  if (lhs.scale() != rhs.scale())
+  {
+    return false;
+  }
+
+  return true;
+}
+
+bool operator!=(const TypeInfo &lhs, const TypeInfo &rhs) { return !(lhs == rhs); }
+
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/AbsNode.cc b/runtimes/neurun/core/src/model/operation/AbsNode.cc
new file mode 100644
index 000000000..dd9566da9
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/AbsNode.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/AbsNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void AbsNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+AbsNode::AbsNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/AddNode.cc b/runtimes/neurun/core/src/model/operation/AddNode.cc
new file mode 100644
index 000000000..43ad7241f
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/AddNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/AddNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void AddNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+AddNode::AddNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                 const Param &param)
+    : model::Operation{OperandConstraint::createExact(2u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/ArgMaxNode.cc b/runtimes/neurun/core/src/model/operation/ArgMaxNode.cc
new file mode 100644
index 000000000..2486f54b0
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/ArgMaxNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/ArgMaxNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void ArgMaxNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+ArgMaxNode::ArgMaxNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                       const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/AvgPool2DNode.cc b/runtimes/neurun/core/src/model/operation/AvgPool2DNode.cc
new file mode 100644
index 000000000..4c625f973
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/AvgPool2DNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/AvgPool2DNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void AvgPool2DNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+AvgPool2DNode::AvgPool2DNode(const OperandIndexSequence &inputs,
+                             const OperandIndexSequence &outputs, const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/CastNode.cc b/runtimes/neurun/core/src/model/operation/CastNode.cc
new file mode 100644
index 000000000..85d11e3d1
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/CastNode.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/CastNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void CastNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+CastNode::CastNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/ComparisonNode.cc b/runtimes/neurun/core/src/model/operation/ComparisonNode.cc
new file mode 100644
index 000000000..598e61969
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/ComparisonNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/ComparisonNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void ComparisonNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+ComparisonNode::ComparisonNode(const OperandIndexSequence &inputs,
+                               const OperandIndexSequence &outputs, const Param &param)
+    : model::Operation{OperandConstraint::createExact(2u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/ConcatNode.cc b/runtimes/neurun/core/src/model/operation/ConcatNode.cc
new file mode 100644
index 000000000..195952637
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/ConcatNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/ConcatNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void ConcatNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+ConcatNode::ConcatNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                       const Param &param)
+    : model::Operation{OperandConstraint::createAtLeast(1u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/Conv2DNode.cc b/runtimes/neurun/core/src/model/operation/Conv2DNode.cc
new file mode 100644
index 000000000..218c5d193
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/Conv2DNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/Conv2DNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void Conv2DNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+Conv2DNode::Conv2DNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                       const Param &param)
+    : model::Operation{OperandConstraint::createExact(3u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/CustomNode.cc b/runtimes/neurun/core/src/model/operation/CustomNode.cc
new file mode 100644
index 000000000..059786218
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/CustomNode.cc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/CustomNode.h"
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void CustomNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+CustomNode::CustomNode(OperandConstraint input_constr, const OperandIndexSequence &inputs,
+                       const OperandIndexSequence &outputs, std::string id,
+                       const Userdata &userdata)
+    : model::Operation{input_constr, inputs, outputs}, _id(std::move(id)), _userdata(userdata)
+{
+}
+
+const std::string &CustomNode::id() const { return _id; }
+
+const CustomNode::Userdata &CustomNode::userdata() const { return _userdata; }
+
+CustomNode::~CustomNode() { delete[] _userdata.data; }
+
+std::string CustomNode::getName() const { return id(); }
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/DepthToSpaceNode.cc b/runtimes/neurun/core/src/model/operation/DepthToSpaceNode.cc
new file mode 100644
index 000000000..ec3e5433e
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/DepthToSpaceNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/DepthToSpaceNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void DepthToSpaceNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+DepthToSpaceNode::DepthToSpaceNode(const OperandIndexSequence &inputs,
+                                   const OperandIndexSequence &outputs, const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/DepthwiseConv2DNode.cc b/runtimes/neurun/core/src/model/operation/DepthwiseConv2DNode.cc
new file mode 100644
index 000000000..70d107aa7
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/DepthwiseConv2DNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/DepthwiseConv2DNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void DepthwiseConv2DNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+DepthwiseConv2DNode::DepthwiseConv2DNode(const OperandIndexSequence &inputs,
+                                         const OperandIndexSequence &outputs, const Param &param)
+    : model::Operation{OperandConstraint::createExact(3u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/DequantizeNode.cc b/runtimes/neurun/core/src/model/operation/DequantizeNode.cc
new file mode 100644
index 000000000..634d36b26
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/DequantizeNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/DequantizeNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void DequantizeNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+DequantizeNode::DequantizeNode(const OperandIndexSequence &inputs,
+                               const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/DivNode.cc b/runtimes/neurun/core/src/model/operation/DivNode.cc
new file mode 100644
index 000000000..814491aa7
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/DivNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/DivNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void DivNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+DivNode::DivNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                 const Param &param)
+    : model::Operation{OperandConstraint::createExact(2u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/EmbeddingLookupNode.cc b/runtimes/neurun/core/src/model/operation/EmbeddingLookupNode.cc
new file mode 100644
index 000000000..d49ca19b1
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/EmbeddingLookupNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/EmbeddingLookupNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void EmbeddingLookupNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+EmbeddingLookupNode::EmbeddingLookupNode(const OperandIndexSequence &inputs,
+                                         const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(2u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/ExpNode.cc b/runtimes/neurun/core/src/model/operation/ExpNode.cc
new file mode 100644
index 000000000..3f420f8b5
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/ExpNode.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/ExpNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void ExpNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+ExpNode::ExpNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/FloorNode.cc b/runtimes/neurun/core/src/model/operation/FloorNode.cc
new file mode 100644
index 000000000..47b56fbaa
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/FloorNode.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/FloorNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void FloorNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+FloorNode::FloorNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/FullyConnectedNode.cc b/runtimes/neurun/core/src/model/operation/FullyConnectedNode.cc
new file mode 100644
index 000000000..42f18c72d
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/FullyConnectedNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/FullyConnectedNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void FullyConnectedNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+FullyConnectedNode::FullyConnectedNode(const OperandIndexSequence &inputs,
+                                       const OperandIndexSequence &outputs, const Param &param)
+    : model::Operation{OperandConstraint::createExact(3u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/GatherNode.cc b/runtimes/neurun/core/src/model/operation/GatherNode.cc
new file mode 100644
index 000000000..1ecb6f8ec
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/GatherNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/GatherNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void GatherNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+GatherNode::GatherNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                       const Param &param)
+    : model::Operation{OperandConstraint::createExact(2u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/HashtableLookupNode.cc b/runtimes/neurun/core/src/model/operation/HashtableLookupNode.cc
new file mode 100644
index 000000000..d2c144e71
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/HashtableLookupNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/HashtableLookupNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void HashtableLookupNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+HashtableLookupNode::HashtableLookupNode(const OperandIndexSequence &inputs,
+                                         const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(3u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/L2NormalizationNode.cc b/runtimes/neurun/core/src/model/operation/L2NormalizationNode.cc
new file mode 100644
index 000000000..1169785c6
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/L2NormalizationNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/L2NormalizationNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void L2NormalizationNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+L2NormalizationNode::L2NormalizationNode(const OperandIndexSequence &inputs,
+                                         const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/L2Pool2DNode.cc b/runtimes/neurun/core/src/model/operation/L2Pool2DNode.cc
new file mode 100644
index 000000000..fb53f52c6
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/L2Pool2DNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/L2Pool2DNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void L2Pool2DNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+L2Pool2DNode::L2Pool2DNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                           const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/LSTMNode.cc b/runtimes/neurun/core/src/model/operation/LSTMNode.cc
new file mode 100644
index 000000000..31443e8ae
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/LSTMNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/LSTMNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void LSTMNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+LSTMNode::LSTMNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                   const Param &param)
+    : model::Operation{OperandConstraint::createExact(23u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/LocalResponseNormalizationNode.cc b/runtimes/neurun/core/src/model/operation/LocalResponseNormalizationNode.cc
new file mode 100644
index 000000000..4b1dded76
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/LocalResponseNormalizationNode.cc
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/LocalResponseNormalizationNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void LocalResponseNormalizationNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+LocalResponseNormalizationNode::LocalResponseNormalizationNode(const OperandIndexSequence &inputs,
+                                                               const OperandIndexSequence &outputs,
+                                                               const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/LogicalAndNode.cc b/runtimes/neurun/core/src/model/operation/LogicalAndNode.cc
new file mode 100644
index 000000000..9e9a3dbbf
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/LogicalAndNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/LogicalAndNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void LogicalAndNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+LogicalAndNode::LogicalAndNode(const OperandIndexSequence &inputs,
+                               const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(2u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/LogicalNotNode.cc b/runtimes/neurun/core/src/model/operation/LogicalNotNode.cc
new file mode 100644
index 000000000..1a3c324a5
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/LogicalNotNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/LogicalNotNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void LogicalNotNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+LogicalNotNode::LogicalNotNode(const OperandIndexSequence &inputs,
+                               const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/LogicalOrNode.cc b/runtimes/neurun/core/src/model/operation/LogicalOrNode.cc
new file mode 100644
index 000000000..53fa305ae
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/LogicalOrNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/LogicalOrNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void LogicalOrNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+LogicalOrNode::LogicalOrNode(const OperandIndexSequence &inputs,
+                             const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(2u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/LogisticNode.cc b/runtimes/neurun/core/src/model/operation/LogisticNode.cc
new file mode 100644
index 000000000..358ce6acd
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/LogisticNode.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/LogisticNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void LogisticNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+LogisticNode::LogisticNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/MaxPool2DNode.cc b/runtimes/neurun/core/src/model/operation/MaxPool2DNode.cc
new file mode 100644
index 000000000..596aa2df9
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/MaxPool2DNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/MaxPool2DNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void MaxPool2DNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+MaxPool2DNode::MaxPool2DNode(const OperandIndexSequence &inputs,
+                             const OperandIndexSequence &outputs, const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/MeanNode.cc b/runtimes/neurun/core/src/model/operation/MeanNode.cc
new file mode 100644
index 000000000..22b23b27e
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/MeanNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/MeanNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void MeanNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+MeanNode::MeanNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                   const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/MulNode.cc b/runtimes/neurun/core/src/model/operation/MulNode.cc
new file mode 100644
index 000000000..23a66848a
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/MulNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/MulNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void MulNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+MulNode::MulNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                 const Param &param)
+    : model::Operation{OperandConstraint::createExact(2u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/NegNode.cc b/runtimes/neurun/core/src/model/operation/NegNode.cc
new file mode 100644
index 000000000..6f3cf5a0a
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/NegNode.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/NegNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void NegNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+NegNode::NegNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/PReLUNode.cc b/runtimes/neurun/core/src/model/operation/PReLUNode.cc
new file mode 100644
index 000000000..aa8aecdd5
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/PReLUNode.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/PReLUNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void PReLUNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+PReLUNode::PReLUNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(2u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/PadNode.cc b/runtimes/neurun/core/src/model/operation/PadNode.cc
new file mode 100644
index 000000000..9947c9e71
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/PadNode.cc
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/PadNode.h"
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void PadNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+PadNode::PadNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(2u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/PermuteNode.cc b/runtimes/neurun/core/src/model/operation/PermuteNode.cc
new file mode 100644
index 000000000..8affca184
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/PermuteNode.cc
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/PermuteNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void PermuteNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+PermuteNode::PermuteNode(const OperandIndex &input, const OperandIndex &output,
+                         const backend::BackendContext *input_backend_ctx,
+                         const backend::BackendContext *output_backend_ctx, Type type,
+                         model::DataType data_type)
+    : model::Operation{OperandConstraint::createExact(1u)},
+      _param{input_backend_ctx, output_backend_ctx}, _type{type}, _dataType{data_type}
+{
+  setInputs({input});
+  setOutputs({output});
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/RNNNode.cc b/runtimes/neurun/core/src/model/operation/RNNNode.cc
new file mode 100644
index 000000000..fa32059d0
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/RNNNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/RNNNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void RNNNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+RNNNode::RNNNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                 const Param &param)
+    : model::Operation{OperandConstraint::createExact(5u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/RSQRTNode.cc b/runtimes/neurun/core/src/model/operation/RSQRTNode.cc
new file mode 100644
index 000000000..faed11663
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/RSQRTNode.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/RSQRTNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void RSQRTNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+RSQRTNode::RSQRTNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/ReLU1Node.cc b/runtimes/neurun/core/src/model/operation/ReLU1Node.cc
new file mode 100644
index 000000000..b1fe14e09
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/ReLU1Node.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/ReLU1Node.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void ReLU1Node::accept(OperationVisitor &v) const { v.visit(*this); }
+
+ReLU1Node::ReLU1Node(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/ReLU6Node.cc b/runtimes/neurun/core/src/model/operation/ReLU6Node.cc
new file mode 100644
index 000000000..de7c35e1a
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/ReLU6Node.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/ReLU6Node.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void ReLU6Node::accept(OperationVisitor &v) const { v.visit(*this); }
+
+ReLU6Node::ReLU6Node(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/ReLUNode.cc b/runtimes/neurun/core/src/model/operation/ReLUNode.cc
new file mode 100644
index 000000000..d79819d7f
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/ReLUNode.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/ReLUNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void ReLUNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+ReLUNode::ReLUNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/ReduceMaxNode.cc b/runtimes/neurun/core/src/model/operation/ReduceMaxNode.cc
new file mode 100644
index 000000000..486646ac9
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/ReduceMaxNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/ReduceMaxNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void ReduceMaxNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+ReduceMaxNode::ReduceMaxNode(const OperandIndexSequence &inputs,
+                             const OperandIndexSequence &outputs, const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/ReduceMinNode.cc b/runtimes/neurun/core/src/model/operation/ReduceMinNode.cc
new file mode 100644
index 000000000..9f55251c4
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/ReduceMinNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/ReduceMinNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void ReduceMinNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+ReduceMinNode::ReduceMinNode(const OperandIndexSequence &inputs,
+                             const OperandIndexSequence &outputs, const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/ReduceSumNode.cc b/runtimes/neurun/core/src/model/operation/ReduceSumNode.cc
new file mode 100644
index 000000000..5a06ef81b
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/ReduceSumNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/ReduceSumNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void ReduceSumNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+ReduceSumNode::ReduceSumNode(const OperandIndexSequence &inputs,
+                             const OperandIndexSequence &outputs, const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/ReshapeNode.cc b/runtimes/neurun/core/src/model/operation/ReshapeNode.cc
new file mode 100644
index 000000000..cfd987ffb
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/ReshapeNode.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/ReshapeNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void ReshapeNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+ReshapeNode::ReshapeNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/ResizeBilinearNode.cc b/runtimes/neurun/core/src/model/operation/ResizeBilinearNode.cc
new file mode 100644
index 000000000..263668a3c
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/ResizeBilinearNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/ResizeBilinearNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void ResizeBilinearNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+ResizeBilinearNode::ResizeBilinearNode(const OperandIndexSequence &inputs,
+                                       const OperandIndexSequence &outputs, const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/SQRTNode.cc b/runtimes/neurun/core/src/model/operation/SQRTNode.cc
new file mode 100644
index 000000000..835aa3f97
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/SQRTNode.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/SQRTNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void SQRTNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+SQRTNode::SQRTNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/SoftmaxNode.cc b/runtimes/neurun/core/src/model/operation/SoftmaxNode.cc
new file mode 100644
index 000000000..39e6d2bd8
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/SoftmaxNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/SoftmaxNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void SoftmaxNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+SoftmaxNode::SoftmaxNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                         const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/SpaceToDepthNode.cc b/runtimes/neurun/core/src/model/operation/SpaceToDepthNode.cc
new file mode 100644
index 000000000..2622881f4
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/SpaceToDepthNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/SpaceToDepthNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void SpaceToDepthNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+SpaceToDepthNode::SpaceToDepthNode(const OperandIndexSequence &inputs,
+                                   const OperandIndexSequence &outputs, const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/SplitNode.cc b/runtimes/neurun/core/src/model/operation/SplitNode.cc
new file mode 100644
index 000000000..9a542f418
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/SplitNode.cc
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "model/operation/SplitNode.h"
+#include <cassert>
+#include "model/OperationVisitor.h"
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+void SplitNode::accept(OperationVisitor &v) const { v.visit(*this); }
+SplitNode::SplitNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                     const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param{param}
+{
+}
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/SquaredDifferenceNode.cc b/runtimes/neurun/core/src/model/operation/SquaredDifferenceNode.cc
new file mode 100644
index 000000000..6672e08c1
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/SquaredDifferenceNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/SquaredDifferenceNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void SquaredDifferenceNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+SquaredDifferenceNode::SquaredDifferenceNode(const OperandIndexSequence &inputs,
+                                             const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(2u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/SqueezeNode.cc b/runtimes/neurun/core/src/model/operation/SqueezeNode.cc
new file mode 100644
index 000000000..1a82d65b3
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/SqueezeNode.cc
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/SqueezeNode.h"
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void SqueezeNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+SqueezeNode::SqueezeNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                         const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param(param)
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/StridedSliceNode.cc b/runtimes/neurun/core/src/model/operation/StridedSliceNode.cc
new file mode 100644
index 000000000..9d60645a8
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/StridedSliceNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/StridedSliceNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void StridedSliceNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+StridedSliceNode::StridedSliceNode(const OperandIndexSequence &inputs,
+                                   const OperandIndexSequence &outputs, const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/SubNode.cc b/runtimes/neurun/core/src/model/operation/SubNode.cc
new file mode 100644
index 000000000..6a64c4b76
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/SubNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/SubNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void SubNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+SubNode::SubNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                 const Param &param)
+    : model::Operation{OperandConstraint::createExact(2u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/TanhNode.cc b/runtimes/neurun/core/src/model/operation/TanhNode.cc
new file mode 100644
index 000000000..6372b4c73
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/TanhNode.cc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/TanhNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void TanhNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+TanhNode::TanhNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/TopKV2Node.cc b/runtimes/neurun/core/src/model/operation/TopKV2Node.cc
new file mode 100644
index 000000000..6ebcd50b3
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/TopKV2Node.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/TopKV2Node.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void TopKV2Node::accept(OperationVisitor &v) const { v.visit(*this); }
+
+TopKV2Node::TopKV2Node(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                       const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/TransposeConvNode.cc b/runtimes/neurun/core/src/model/operation/TransposeConvNode.cc
new file mode 100644
index 000000000..7ad2d1dca
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/TransposeConvNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/TransposeConvNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void TransposeConvNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+TransposeConvNode::TransposeConvNode(const OperandIndexSequence &inputs,
+                                     const OperandIndexSequence &outputs, const Param &param)
+    : model::Operation{OperandConstraint::createExact(3u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/TransposeNode.cc b/runtimes/neurun/core/src/model/operation/TransposeNode.cc
new file mode 100644
index 000000000..73542a04d
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/TransposeNode.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "model/operation/TransposeNode.h"
+
+#include <cassert>
+
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void TransposeNode::accept(OperationVisitor &v) const { v.visit(*this); }
+
+TransposeNode::TransposeNode(const OperandIndexSequence &inputs,
+                             const OperandIndexSequence &outputs, const Param &param)
+    : model::Operation{OperandConstraint::createExact(2u), inputs, outputs}, _param{param}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/model/operation/UnpackNode.cc b/runtimes/neurun/core/src/model/operation/UnpackNode.cc
new file mode 100644
index 000000000..7717a017a
--- /dev/null
+++ b/runtimes/neurun/core/src/model/operation/UnpackNode.cc
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "model/operation/UnpackNode.h"
+#include "model/OperationVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+void UnpackNode::accept(OperationVisitor &v) const { v.visit(*this); }
+UnpackNode::UnpackNode(const OperandIndexSequence &inputs, const OperandIndexSequence &outputs,
+                       const Param &param)
+    : model::Operation{OperandConstraint::createExact(1u), inputs, outputs}, _param{param}
+{
+}
+} // namespace operation
+} // namespace model
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/util/ConfigSource.cc b/runtimes/neurun/core/src/util/ConfigSource.cc
new file mode 100644
index 000000000..f84e95566
--- /dev/null
+++ b/runtimes/neurun/core/src/util/ConfigSource.cc
@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "util/ConfigSource.h"
+#include "util/GeneralConfigSource.h"
+
+#include <algorithm>
+#include <cassert>
+
+#include "cpp14/memory.h"
+#include "EnvConfigSource.h"
+
+namespace neurun
+{
+namespace util
+{
+
+static std::unique_ptr<IConfigSource> _source;
+
+void config_source(std::unique_ptr<IConfigSource> &&source) { _source = std::move(source); }
+
+static IConfigSource *config_source()
+{
+  if (!_source)
+  {
+#ifdef ENVVAR_FOR_DEFAULT_CONFIG
+    // Default ConfigSource is EnvConfigSource
+    _source = nnfw::cpp14::make_unique<EnvConfigSource>();
+#else
+    _source = nnfw::cpp14::make_unique<GeneralConfigSource>();
+#endif // ENVVAR_FOR_DEFAULT_CONFIG
+  }
+  return _source.get();
+}
+
+static std::string getConfigOrDefault(const std::string &key)
+{
+  static std::unordered_map<std::string, std::string> defaults;
+  if (defaults.empty())
+  {
+#define CONFIG(Name, Type, Default)               \
+  {                                               \
+    auto name = std::string{#Name};               \
+    defaults.emplace(name, std::string{Default}); \
+  }
+
+#include "util/Config.lst"
+
+#undef CONFIG
+  }
+
+  // Treat empty string and absence of the value to be the same
+  auto ret = config_source()->get(key);
+  if (ret.empty())
+  {
+    auto itr = defaults.find(key);
+    if (itr != defaults.end())
+    {
+      // Return the default value if exists
+      ret = itr->second;
+    }
+  }
+
+  return ret;
+}
+
+bool getConfigBool(const std::string &key)
+{
+  auto raw = getConfigOrDefault(key);
+  static const std::array<std::string, 5> false_list{"0", "OFF", "FALSE", "N", "NO"};
+  auto false_found = std::find(false_list.begin(), false_list.end(), raw);
+
+  return (false_found == false_list.end());
+}
+
+int getConfigInt(const std::string &key)
+{
+  auto raw = getConfigOrDefault(key);
+  return std::stoi(raw);
+}
+
+std::string getConfigString(const std::string &key) { return getConfigOrDefault(key); }
+
+} // namespace util
+} // namespace neurun
+
+namespace neurun
+{
+namespace util
+{
+namespace config
+{
+
+#define CONFIG(Name, Type, Default) const char *Name = #Name;
+
+#include "util/Config.lst"
+
+#undef CONFIG
+
+} // namespace config
+} // namespace util
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/util/EnvConfigSource.cc b/runtimes/neurun/core/src/util/EnvConfigSource.cc
new file mode 100644
index 000000000..be8239b9f
--- /dev/null
+++ b/runtimes/neurun/core/src/util/EnvConfigSource.cc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "EnvConfigSource.h"
+
+#include <cstdlib>
+
+namespace neurun
+{
+namespace util
+{
+
+std::string EnvConfigSource::get(const std::string &key) const
+{
+  const char *value = std::getenv(key.c_str());
+  if (value != nullptr)
+  {
+    return value;
+  }
+  else
+  {
+    return "";
+  }
+}
+
+} // namespace util
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/util/EnvConfigSource.h b/runtimes/neurun/core/src/util/EnvConfigSource.h
new file mode 100644
index 000000000..b187ec772
--- /dev/null
+++ b/runtimes/neurun/core/src/util/EnvConfigSource.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_UTIL_ENV_CONFIG_SOURCE_H__
+#define __NEURUN_UTIL_ENV_CONFIG_SOURCE_H__
+
+#include <unordered_map>
+
+#include "util/IConfigSource.h"
+
+namespace neurun
+{
+namespace util
+{
+
+class EnvConfigSource final : public IConfigSource
+{
+public:
+  std::string get(const std::string &key) const override;
+
+private:
+  std::unordered_map<std::string, std::string> _default_attributes;
+};
+
+} // namespace util
+} // namespace neurun
+
+#endif // __NEURUN_UTIL_ENV_CONFIG_SOURCE_H__
diff --git a/runtimes/neurun/core/src/util/GeneralConfigSource.cc b/runtimes/neurun/core/src/util/GeneralConfigSource.cc
new file mode 100644
index 000000000..084e4c109
--- /dev/null
+++ b/runtimes/neurun/core/src/util/GeneralConfigSource.cc
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "util/GeneralConfigSource.h"
+#include "util/logging.h"
+
+namespace neurun
+{
+namespace util
+{
+
+std::string GeneralConfigSource::get(const std::string &key) const
+{
+  auto itr = _map.find(key);
+  if (itr == _map.end())
+  {
+    return "";
+  }
+  else
+  {
+    return itr->second;
+  }
+}
+
+void GeneralConfigSource::set(const std::string &key, const std::string &val)
+{
+  VERBOSE(GeneralConfigSource) << key << " : " << val << std::endl;
+  _map[key] = val;
+}
+
+} // namespace util
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/util/Padding.cc b/runtimes/neurun/core/src/util/Padding.cc
new file mode 100644
index 000000000..dd5a3b502
--- /dev/null
+++ b/runtimes/neurun/core/src/util/Padding.cc
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "util/Padding.h"
+#include "util/Utils.h"
+
+#include <algorithm>
+#include <stdexcept>
+
+namespace neurun
+{
+namespace util
+{
+
+model::ExplicitPadding validPadding(void)
+{
+  //
+  // ANEURALNETWORKS_PADDING_VALID
+  //
+  // VALID padding. No padding.
+  //
+  // When the input size is not evenly divisible by the filter size,
+  // the input at the end that could not fill the whole filter tile
+  // will simply be ignored.
+  //
+  model::ExplicitPadding padding;
+
+  padding.top = 0;
+  padding.bottom = 0;
+  padding.left = 0;
+  padding.right = 0;
+
+  return padding;
+}
+
+model::ExplicitPadding samePaddingUsingIFM(const model::FeatureShape &ifm_shape,
+                                           const model::Stride &stride, uint32_t kw, uint32_t kh)
+{
+  model::ExplicitPadding padding;
+
+  // ANEURALNETWORKS_PADDING_SAME (from NNAPI spec)
+  //
+  // SAME padding. Padding on both ends are the "same":
+  //
+  // padding_to_beginning = total_padding / 2
+  // padding_to_end = (total_padding + 1)/2.
+  //
+  const int32_t vertical_expected_output = (ifm_shape.H + stride.vertical - 1) / stride.vertical;
+  const int32_t horizontal_expected_output =
+      (ifm_shape.W + stride.horizontal - 1) / stride.horizontal;
+
+  const int32_t vertical_needed_input = (vertical_expected_output - 1) * stride.vertical + kh;
+  const int32_t vertical_total_padding = std::max(0, vertical_needed_input - ifm_shape.H);
+
+  const int32_t horizontal_needed_input = (horizontal_expected_output - 1) * stride.horizontal + kw;
+  const int32_t horizontal_total_padding = std::max(0, horizontal_needed_input - ifm_shape.W);
+
+  padding.top = vertical_total_padding / 2;
+  padding.bottom = (vertical_total_padding + 1) / 2;
+  padding.left = horizontal_total_padding / 2;
+  padding.right = (horizontal_total_padding + 1) / 2;
+
+  return padding;
+}
+
+model::ExplicitPadding samePadding(const model::FeatureShape &ifm_shape,
+                                   const model::FeatureShape &ofm_shape,
+                                   const model::Stride &stride, uint32_t kw, uint32_t kh)
+{
+  const int32_t vertical_expected_output = (ifm_shape.H + stride.vertical - 1) / stride.vertical;
+  const int32_t horizontal_expected_output =
+      (ifm_shape.W + stride.horizontal - 1) / stride.horizontal;
+  assert(vertical_expected_output == ofm_shape.H);
+  assert(horizontal_expected_output == ofm_shape.W);
+
+  UNUSED_RELEASE(ofm_shape);
+  UNUSED_RELEASE(vertical_expected_output);
+  UNUSED_RELEASE(horizontal_expected_output);
+
+  return samePaddingUsingIFM(ifm_shape, stride, kw, kh);
+}
+
+model::ExplicitPadding calculatePadding(const model::Padding &padding,
+                                        const model::FeatureShape &ifm_shape,
+                                        const model::FeatureShape &ofm_shape,
+                                        const model::Stride &stride, uint32_t kw, uint32_t kh)
+{
+  if (padding.type == model::PaddingType::EXPLICIT)
+  {
+    return padding.param;
+  }
+  else if (padding.type == model::PaddingType::SAME)
+  {
+    return samePadding(ifm_shape, ofm_shape, stride, kw, kh);
+  }
+  else if (padding.type == model::PaddingType::VALID)
+  {
+    return validPadding();
+  }
+  else
+  {
+    throw std::runtime_error{"Cannot handle padding type"};
+  }
+}
+
+} // namespace util
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/util/ShapeInference.cc b/runtimes/neurun/core/src/util/ShapeInference.cc
new file mode 100644
index 000000000..5a7bfde41
--- /dev/null
+++ b/runtimes/neurun/core/src/util/ShapeInference.cc
@@ -0,0 +1,202 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "util/Utils.h"
+#include "model/InternalType.h"
+#include "model/Shape.h"
+#include "model/operation/AvgPool2DNode.h"
+#include "model/operation/MaxPool2DNode.h"
+#include "util/ShapeInference.h"
+
+namespace neurun
+{
+namespace shape_inference
+{
+
+//
+// Helper functions
+//
+
+namespace
+{
+
+template <typename T, typename U>
+typename std::enable_if<std::is_integral<T>::value && std::is_integral<U>::value,
+                        typename std::common_type<T, U>::type>::type
+ceil_div(T dividend, U divisor)
+{
+  assert(dividend > 0 && divisor > 0 && "this implementations is for positive numbers only");
+  return (dividend + divisor - 1) / divisor;
+}
+
+// Calculate the result of broadcast of two shapes
+model::Shape broadcastShapes(const model::Shape &lhs_shape, const model::Shape &rhs_shape)
+{
+  model::Shape out_shape;
+  auto max_rank = std::max(lhs_shape.rank(), rhs_shape.rank());
+
+  for (int idx = 0; idx < max_rank; ++idx)
+  {
+    // Go over operands dimensions from right to left
+    int lhs_idx = lhs_shape.rank() - idx - 1;
+    int rhs_idx = rhs_shape.rank() - idx - 1;
+
+    int32_t lhs_dim = lhs_idx >= 0 ? lhs_shape.dim(lhs_idx) : 1;
+    int32_t rhs_dim = rhs_idx >= 0 ? rhs_shape.dim(rhs_idx) : 1;
+
+    if (lhs_dim != 1 && rhs_dim != 1 && lhs_dim != rhs_dim)
+      throw std::runtime_error("Incompatible shapes for broadcast");
+
+    out_shape.prepend(std::max(lhs_dim, rhs_dim));
+  }
+
+  return out_shape;
+}
+
+// Calculate output height and width of convolution-like operation
+std::pair<int, int> calcConvLikeHeightAndWidth(const int in_h, const int in_w, const int ker_h,
+                                               const int ker_w, const model::Padding pad,
+                                               const model::Stride stride)
+{
+  int32_t out_h = 0, out_w = 0;
+
+  switch (pad.type)
+  {
+    case model::PaddingType::SAME:
+      out_h = ceil_div(in_h, stride.vertical);
+      out_w = ceil_div(in_w, stride.horizontal);
+      break;
+    case model::PaddingType::VALID:
+      out_h = ceil_div(in_h - ker_h + 1, stride.vertical);
+      out_w = ceil_div(in_w - ker_w + 1, stride.horizontal);
+      break;
+    case model::PaddingType::EXPLICIT:
+      out_h = (in_h + pad.param.top + pad.param.bottom - ker_h) / stride.vertical + 1;
+      out_w = (in_w + pad.param.left + pad.param.right - ker_w) / stride.horizontal + 1;
+      break;
+    default:
+      assert(false);
+  }
+
+  return {out_h, out_w};
+}
+
+} // namespace
+
+//
+// Shape inference
+//
+
+Shapes inferEltwiseShape(const model::Shape &lhs_shape, const model::Shape &rhs_shape)
+{
+  return {broadcastShapes(lhs_shape, rhs_shape)};
+}
+
+Shapes inferAvgPoolShape(const model::Shape &in_shape,
+                         const model::operation::AvgPool2DNode::Param &param,
+                         const model::Layout layout)
+{
+  assert(layout == model::Layout::NHWC);
+  auto ifm_shape = in_shape.asFeature(layout);
+  const auto out_h_w = calcConvLikeHeightAndWidth(ifm_shape.H, ifm_shape.W, param.kh, param.kw,
+                                                  param.padding, param.stride);
+  // Pooling don't change number of channels and batch size
+  return {model::Shape{ifm_shape.N, out_h_w.first, out_h_w.second, ifm_shape.C}};
+}
+
+Shapes inferConcatShape(const Shapes &in_shapes, const model::operation::ConcatNode::Param &param)
+{
+  const int32_t concat_axis = param.axis;
+  const auto &first_in_shape = in_shapes[0];
+
+  // Check that all shapes are equal except for concat axis dimension
+  for (const auto &in_shape : in_shapes)
+  {
+    assert(in_shape.rank() == first_in_shape.rank());
+    for (int64_t dim_idx = 0; dim_idx < in_shape.rank(); ++dim_idx)
+      assert(dim_idx == concat_axis || in_shape.dim(dim_idx) == first_in_shape.dim(dim_idx));
+  }
+
+  // Calculate output shape
+  model::Shape out_shape(first_in_shape);
+  out_shape.dim(concat_axis) = 0;
+  for (const auto &in_shape : in_shapes)
+    out_shape.dim(concat_axis) += in_shape.dim(concat_axis);
+  return {out_shape};
+}
+
+Shapes inferMaxPoolShape(const model::Shape &in_shape,
+                         const model::operation::MaxPool2DNode::Param &param,
+                         const model::Layout layout)
+{
+  assert(layout == model::Layout::NHWC);
+  auto ifm_shape = in_shape.asFeature(layout);
+  const auto out_h_w = calcConvLikeHeightAndWidth(ifm_shape.H, ifm_shape.W, param.kh, param.kw,
+                                                  param.padding, param.stride);
+  // Pooling don't change number of channels and batch size
+  return {model::Shape{ifm_shape.N, out_h_w.first, out_h_w.second, ifm_shape.C}};
+}
+
+Shapes inferConv2DShape(const model::Shape &in_shape, const model::Shape &ker_shape,
+                        const model::operation::Conv2DNode::Param &param, model::Layout layout)
+{
+  assert(layout == model::Layout::NHWC);
+  auto ifm_shape = in_shape.asFeature(layout);
+
+  // Kernel format is [depth_out, kernel_height, kernel_width, depth_in]
+  auto kf_shape = ker_shape.asFeature(layout);
+  assert(ifm_shape.C == kf_shape.C);
+
+  const auto out_h_w = calcConvLikeHeightAndWidth(ifm_shape.H, ifm_shape.W, kf_shape.H, kf_shape.W,
+                                                  param.padding, param.stride);
+
+  return {model::Shape{ifm_shape.N, out_h_w.first, out_h_w.second, kf_shape.N}};
+}
+
+Shapes inferDepthwiseConv2DShape(const model::Shape &in_shape, const model::Shape &ker_shape,
+                                 const model::operation::DepthwiseConv2DNode::Param &param,
+                                 model::Layout layout)
+{
+  assert(layout == model::Layout::NHWC);
+  auto ifm_shape = in_shape.asFeature(layout);
+
+  // Kernel format is [1, kernel_height, kernel_width, depth_out]
+  auto kf_shape = ker_shape.asFeature(layout);
+  assert(kf_shape.C == static_cast<int32_t>(ifm_shape.C * param.multiplier));
+  assert(kf_shape.N == 1);
+
+  const auto out_h_w = calcConvLikeHeightAndWidth(ifm_shape.H, ifm_shape.W, kf_shape.H, kf_shape.W,
+                                                  param.padding, param.stride);
+
+  return {model::Shape{ifm_shape.N, out_h_w.first, out_h_w.second, kf_shape.C}};
+}
+
+Shapes inferFullyConnectedShape(const model::Shape &in_shape, const model::Shape &ker_shape)
+{
+  assert(in_shape.rank() >= 2);
+  assert(ker_shape.rank() == 2);
+
+  const auto input_size_with_batch = in_shape.num_elements();
+  const auto num_units = ker_shape.dim(0);
+  const auto input_size = ker_shape.dim(1);
+  const auto batch_size = input_size_with_batch / input_size;
+  assert(input_size_with_batch % input_size == 0);
+
+  return {{model::Shape({static_cast<int32_t>(batch_size), num_units})}};
+}
+
+} // namespace shape_inference
+} // namespace neurun
diff --git a/runtimes/neurun/core/src/util/Utils.cc b/runtimes/neurun/core/src/util/Utils.cc
new file mode 100644
index 000000000..cd912a810
--- /dev/null
+++ b/runtimes/neurun/core/src/util/Utils.cc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "util/Utils.h"
+
+#include <cassert>
+
+namespace neurun
+{
+namespace util
+{
+
+const char *to_string(const model::PaddingType &type)
+{
+  assert((type == model::PaddingType::EXPLICIT) || (type == model::PaddingType::SAME) ||
+         (type == model::PaddingType::VALID));
+
+  switch (type)
+  {
+    case model::PaddingType::EXPLICIT:
+      return "Padding::EXPLICIT";
+    case model::PaddingType::SAME:
+      return "Padding::SAME";
+    case model::PaddingType::VALID:
+      return "Padding::VALID";
+  }
+
+  return nullptr;
+}
+
+Coordinates convertCoordinates(const Coordinates &from_coordinates, model::Layout from_layout,
+                               model::Layout to_layout)
+{
+  assert(from_coordinates.size() == 4);
+  Coordinates to{from_coordinates};
+  if (from_layout == model::Layout::NHWC && to_layout == model::Layout::NCHW)
+  {
+    to.set(0, from_coordinates[0]);
+    to.set(1, from_coordinates[3]);
+    to.set(2, from_coordinates[1]);
+    to.set(3, from_coordinates[2]);
+  }
+  else if (from_layout == model::Layout::NCHW && to_layout == model::Layout::NHWC)
+  {
+    to.set(0, from_coordinates[0]);
+    to.set(1, from_coordinates[2]);
+    to.set(2, from_coordinates[3]);
+    to.set(3, from_coordinates[1]);
+  }
+
+  return to;
+}
+
+} // namespace util
+} // namespace neurun
diff --git a/runtimes/neurun/frontend/CMakeLists.txt b/runtimes/neurun/frontend/CMakeLists.txt
new file mode 100644
index 000000000..5ea6cdadd
--- /dev/null
+++ b/runtimes/neurun/frontend/CMakeLists.txt
@@ -0,0 +1 @@
+add_subdirectories()
diff --git a/runtimes/neurun/frontend/api/CMakeLists.txt b/runtimes/neurun/frontend/api/CMakeLists.txt
new file mode 100644
index 000000000..10a33a85e
--- /dev/null
+++ b/runtimes/neurun/frontend/api/CMakeLists.txt
@@ -0,0 +1,12 @@
+file(GLOB_RECURSE API_SRC "*.cc")
+
+set(NEURUN_DEV nnfw-dev)
+add_library(${NEURUN_DEV} SHARED ${API_SRC})
+
+target_link_libraries(${NEURUN_DEV} PUBLIC nnfw-header)
+target_link_libraries(${NEURUN_DEV} PUBLIC neurun_core) # TODO Link PRIVATE neurun_core
+target_link_libraries(${NEURUN_DEV} PRIVATE jsoncpp tflite_loader ${LIB_PTHREAD})
+target_link_libraries(${NEURUN_DEV} PRIVATE nnfw_common)
+target_link_libraries(${NEURUN_DEV} PRIVATE nnfw_coverage)
+
+install(TARGETS ${NEURUN_DEV} DESTINATION lib)
diff --git a/runtimes/neurun/frontend/api/nnfw_dev.cc b/runtimes/neurun/frontend/api/nnfw_dev.cc
new file mode 100644
index 000000000..ddb6dd572
--- /dev/null
+++ b/runtimes/neurun/frontend/api/nnfw_dev.cc
@@ -0,0 +1,228 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "wrapper/nnfw_api.hpp"
+
+/*
+ * Create a new session instance
+ *
+ * @param session the session to be created
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_create_session(nnfw_session **session)
+{
+  *session = new nnfw_session();
+
+  return NNFW_STATUS_NO_ERROR;
+}
+
+/*
+ * Close a session instance
+ *
+ * @param session the session to be closed
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_close_session(nnfw_session *session)
+{
+  delete session;
+  return NNFW_STATUS_NO_ERROR;
+}
+
+#define NNFW_RETURN_ERROR_IF_NULL(p) \
+  do                                 \
+  {                                  \
+    if ((p) == NULL)                 \
+      return NNFW_STATUS_ERROR;      \
+  } while (0)
+
+/*
+ * Load model from nnpackage file or directory
+ *
+ * @param session nnfw_session loading the given nnpackage file/dir
+ * @param package_file_path path to the nnpackage file or unzipped directory to be loaded
+ *
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_load_model_from_file(nnfw_session *session, const char *pacakge_file_path)
+{
+  NNFW_RETURN_ERROR_IF_NULL(session);
+  return session->load_model_from_file(pacakge_file_path);
+}
+
+/*
+ * Prepare session to be ready for inference
+ * This phase may finalize model compilation, scheduling, and additional settings.
+ *
+ * @param session the session to be prepared
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_prepare(nnfw_session *session)
+{
+  NNFW_RETURN_ERROR_IF_NULL(session);
+  return session->prepare();
+}
+
+/*
+ * Run inference
+ *
+ * @param session the session to run inference
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_run(nnfw_session *session)
+{
+  NNFW_RETURN_ERROR_IF_NULL(session);
+  return session->run();
+}
+
+/*
+ * Set input
+ *
+ * @param session session to the input is to be set
+ * @param index index of input to be set (0-indexed)
+ * @param type type of the input
+ * @param buffer raw buffer for input
+ * @param length size of bytes of output
+ *
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+
+NNFW_STATUS nnfw_set_input(nnfw_session *session, uint32_t index, NNFW_TYPE type,
+                           const void *buffer, size_t length)
+{
+  NNFW_RETURN_ERROR_IF_NULL(session);
+  return session->set_input(index, type, buffer, length);
+}
+
+/*
+ * Set output
+ *
+ * @param session session from inference output is to be extracted
+ * @param index index of output to be set (0-indexed)
+ * @param type type of the output
+ * @param buffer raw buffer for output
+ * @param length size of bytes of output
+ *
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+
+NNFW_STATUS nnfw_set_output(nnfw_session *session, uint32_t index, NNFW_TYPE type, void *buffer,
+                            size_t length)
+{
+  NNFW_RETURN_ERROR_IF_NULL(session);
+  return session->set_output(index, type, buffer, length);
+}
+
+/*
+ * Get the number of inputs
+ *
+ * @param[in] session session from input information is to be extracted
+ * @param[out] number variable which the number of inputs is put into
+ *
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+
+NNFW_STATUS nnfw_input_size(nnfw_session *session, uint32_t *number)
+{
+  NNFW_RETURN_ERROR_IF_NULL(session);
+  return session->input_size(number);
+}
+
+/*
+ * Get the number of outputs
+ *
+ * @param[in] session session from output information is to be extracted
+ * @param[out] number variable which the number of outputs is put into
+ *
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_output_size(nnfw_session *session, uint32_t *number)
+{
+  NNFW_RETURN_ERROR_IF_NULL(session);
+  return session->output_size(number);
+}
+
+/*
+ * Get i-th input tensor info
+ *
+ * @param[in] session session from input information is to be extracted
+ * @param[in] index index of input
+ * @param[out] tensor_info nnfw_tensor_info
+ *
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_input_tensorinfo(nnfw_session *session, uint32_t index,
+                                  nnfw_tensorinfo *tensor_info)
+{
+  NNFW_RETURN_ERROR_IF_NULL(session);
+  return session->input_tensorinfo(index, tensor_info);
+}
+
+/*
+ * Get i-th output tensor info
+ *
+ * @param[in] session session from output information is to be extracted
+ * @param[in] index index of output
+ * @param[out] tensor_info nnfw_tensor_info
+ *
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_output_tensorinfo(nnfw_session *session, uint32_t index,
+                                   nnfw_tensorinfo *tensor_info)
+{
+  NNFW_RETURN_ERROR_IF_NULL(session);
+  return session->output_tensorinfo(index, tensor_info);
+}
+
+/*
+ * Register custom operation
+ * @param session session to register this operation
+ * @param id operation id
+ * @param info registration info ( eval function, etc. )
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_register_custom_op_info(nnfw_session *session, const char *id,
+                                         custom_kernel_registration_info *info)
+{
+  NNFW_RETURN_ERROR_IF_NULL(session);
+  return session->register_custom_operation(id, info->eval_function);
+}
+
+/*
+ * Set default backend
+ *
+ * @param[in] session session to which a default backend is set
+ * @param[in] backend default backend
+ */
+NNFW_STATUS nnfw_set_default_backend(nnfw_session *session, const char *backend)
+{
+  NNFW_RETURN_ERROR_IF_NULL(session);
+  return session->set_default_backend(backend);
+}
+
+/*
+ * Set the operation's backend
+ *
+ * @param[in] session session to be modified
+ * @param[in] op operation to be set
+ * @param[in] backend bakcend on which operation run
+ *
+ * @return NNFW_STATUS_NO_ERROR if successful
+ */
+NNFW_STATUS nnfw_set_op_backend(nnfw_session *session, const char *op, const char *backend)
+{
+  NNFW_RETURN_ERROR_IF_NULL(session);
+  return session->set_op_backend(op, backend);
+}
diff --git a/runtimes/neurun/frontend/api/wrapper/nnfw_api.cc b/runtimes/neurun/frontend/api/wrapper/nnfw_api.cc
new file mode 100644
index 000000000..a6021f0da
--- /dev/null
+++ b/runtimes/neurun/frontend/api/wrapper/nnfw_api.cc
@@ -0,0 +1,366 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "nnfw_api.hpp"
+#include "backend/CustomKernelRegistry.h"
+#include "compiler/Compiler.h"
+#include "exec/Execution.h"
+#include "loader.h"
+#include "json/json.h"
+#include <iostream>
+#include <string>
+#include <dirent.h>
+#include <limits.h>
+#include <stdint.h>
+#include <util/ConfigSource.h>
+
+/*
+ * API does not accept string argument longer than max length below
+ */
+#define MAX_BACKEND_NAME_LENGTH 32
+#define MAX_OP_NAME_LENGTH 64
+
+// Is null-terminating in length ?
+static bool null_terminating(const char *str, uint32_t length)
+{
+  for (uint32_t i = 0; i < length; i++)
+  {
+    if (*(str + i) == '\0')
+    {
+      return true;
+    }
+  }
+  return false;
+}
+
+nnfw_session::nnfw_session()
+    : _graph{nullptr}, _execution{nullptr},
+      _kernel_registry{std::make_shared<neurun::backend::custom::KernelRegistry>()},
+      _source{nnfw::cpp14::make_unique<neurun::util::GeneralConfigSource>()}
+{
+  // DO NOTHING
+}
+
+NNFW_STATUS nnfw_session::load_model_from_file(const char *package_dir)
+{
+  // TODO : add support for zipped package file load
+  DIR *dir;
+  if (!(dir = opendir(package_dir)))
+  {
+    std::cerr << "invalid nnpackge directory: " << package_dir << std::endl;
+    return NNFW_STATUS_ERROR;
+  }
+  closedir(dir);
+
+  try
+  {
+    std::string manifest_file_name(package_dir);
+    manifest_file_name += "/metadata/MANIFEST";
+    std::ifstream mfs(manifest_file_name);
+
+    // extract the filename of the first(index 0) model
+    // e.g. In MANIFEST file, { "models" : [ "firstmodel.tflite", "2nd.tflite" ] }
+    Json::Value root;
+    mfs >> root;
+    Json::Value models = root["models"];
+
+    auto model = nnfw::cpp14::make_unique<neurun::model::Model>();
+    _graph = std::make_shared<neurun::graph::Graph>(std::move(model));
+    _graph->bindKernelRegistry(_kernel_registry);
+    tflite_loader::Loader loader(*_graph);
+    auto model_file_path = package_dir + std::string("/") + models[0].asString(); // first model
+    loader.loadFromFile(model_file_path.c_str());
+  }
+  catch (...)
+  {
+    std::cerr << "Error during model loading" << std::endl;
+    return NNFW_STATUS_ERROR;
+  }
+
+  return NNFW_STATUS_NO_ERROR;
+}
+
+NNFW_STATUS nnfw_session::prepare()
+{
+  // TODO : add additional setting routine(executor type, backend)
+  // Note that we assume acl_cl backend
+
+  try
+  {
+    // config_source setting
+    using neurun::util::config_source;
+    config_source(std::move(_source));
+
+    auto compiler = nnfw::cpp14::make_unique<neurun::compiler::Compiler>(_graph);
+    compiler->compile();
+    std::shared_ptr<neurun::exec::IExecutor> executor;
+    compiler->release(executor);
+    _execution = std::make_shared<neurun::exec::Execution>(executor);
+  }
+  catch (...)
+  {
+    std::cerr << "Error during model prepare" << std::endl;
+    return NNFW_STATUS_ERROR;
+  }
+  return NNFW_STATUS_NO_ERROR;
+}
+
+NNFW_STATUS nnfw_session::run()
+{
+  try
+  {
+    _execution->execute();
+  }
+  catch (...)
+  {
+    std::cerr << "Error during nnfw_session::run" << std::endl;
+    return NNFW_STATUS_ERROR;
+  }
+
+  return NNFW_STATUS_NO_ERROR;
+}
+
+NNFW_STATUS nnfw_session::set_input(uint32_t index, NNFW_TYPE /*type*/, const void *buffer,
+                                    size_t length)
+{
+  try
+  {
+    _execution->setInput(neurun::model::IOIndex(index), buffer, length);
+  }
+  catch (...)
+  {
+    std::cerr << "Error during nnfw_session::set_input" << std::endl;
+    return NNFW_STATUS_ERROR;
+  }
+  return NNFW_STATUS_NO_ERROR;
+}
+
+NNFW_STATUS nnfw_session::set_output(uint32_t index, NNFW_TYPE /*type*/, void *buffer,
+                                     size_t length)
+{
+  try
+  {
+    _execution->setOutput(neurun::model::IOIndex(index), buffer, length);
+  }
+  catch (...)
+  {
+    std::cerr << "Error during nnfw_session::set_output" << std::endl;
+    return NNFW_STATUS_ERROR;
+  }
+  return NNFW_STATUS_NO_ERROR;
+}
+
+NNFW_STATUS nnfw_session::input_size(uint32_t *number)
+{
+  try
+  {
+    if (number == nullptr)
+    {
+      std::cerr << "Error during nnfw_session::input_size, number is null pointer." << std::endl;
+      return NNFW_STATUS_ERROR;
+    }
+    *number = _graph->getInputs().size();
+  }
+  catch (...)
+  {
+    std::cerr << "Error during nnfw_session::input_size" << std::endl;
+    return NNFW_STATUS_ERROR;
+  }
+  return NNFW_STATUS_NO_ERROR;
+}
+
+NNFW_STATUS nnfw_session::output_size(uint32_t *number)
+{
+  try
+  {
+    if (number == nullptr)
+    {
+      std::cerr << "Error during nnfw_session::output_size, number is null pointer." << std::endl;
+      return NNFW_STATUS_ERROR;
+    }
+    *number = _graph->getOutputs().size();
+  }
+  catch (...)
+  {
+    std::cerr << "Error during nnfw_session::output_size" << std::endl;
+    return NNFW_STATUS_ERROR;
+  }
+  return NNFW_STATUS_NO_ERROR;
+}
+
+static NNFW_TYPE datatype_to_nnfw_dtype(neurun::model::DataType dt)
+{
+  using neurun::model::DataType;
+  switch (dt)
+  {
+    case DataType::FLOAT32:
+      return NNFW_TYPE_TENSOR_FLOAT32;
+    case DataType::INT32:
+      return NNFW_TYPE_TENSOR_INT32;
+    case DataType::QUANT8_ASYMM:
+      return NNFW_TYPE_TENSOR_QUANT8_ASYMM;
+    case DataType::BOOL8:
+      return NNFW_TYPE_TENSOR_BOOL;
+    case DataType::UINT32:
+    default:
+      std::cerr << "Error: Model has type that runtime API does not support." << std::endl;
+      exit(-1);
+  }
+}
+
+NNFW_STATUS nnfw_session::input_tensorinfo(uint32_t index, nnfw_tensorinfo *ti)
+{
+  try
+  {
+    if (ti == nullptr)
+    {
+      std::cerr << "Error during nnfw_session::input_tensorinfo, tensorinfo is null pointer."
+                << std::endl;
+      return NNFW_STATUS_ERROR;
+    }
+    if (index >= _graph->getInputs().size())
+    {
+      std::cerr << "Error during nnfw_session::input_tensorinfo, index is out of range."
+                << std::endl;
+      return NNFW_STATUS_ERROR;
+    }
+    auto opidx = _graph->getInputs().at(index);
+    auto shape = _graph->operands().at(opidx).shape();
+    ti->rank = shape.rank();
+    for (int j = 0; j < ti->rank; ++j)
+    {
+      ti->dims[j] = shape.dim(j);
+    }
+    ti->dtype = datatype_to_nnfw_dtype(_graph->operands().at(opidx).typeInfo().type());
+  }
+  catch (...)
+  {
+    std::cerr << "Error during nnfw_session::input_tensorinfo." << std::endl;
+    return NNFW_STATUS_ERROR;
+  }
+  return NNFW_STATUS_NO_ERROR;
+}
+
+NNFW_STATUS nnfw_session::output_tensorinfo(uint32_t index, nnfw_tensorinfo *ti)
+{
+  try
+  {
+    if (ti == nullptr)
+    {
+      std::cerr << "Error during nnfw_session::output_tensorinfo, tensorinfo is null pointer."
+                << std::endl;
+      return NNFW_STATUS_ERROR;
+    }
+    if (index >= _graph->getOutputs().size())
+    {
+      std::cerr << "Error during nnfw_session::output_tensorinfo, index is out of range."
+                << std::endl;
+      return NNFW_STATUS_ERROR;
+    }
+    auto opidx = _graph->getOutputs().at(index);
+    auto shape = _graph->operands().at(opidx).shape();
+    ti->rank = shape.rank();
+    for (int j = 0; j < ti->rank; ++j)
+    {
+      ti->dims[j] = shape.dim(j);
+    }
+    ti->dtype = datatype_to_nnfw_dtype(_graph->operands().at(opidx).typeInfo().type());
+  }
+  catch (...)
+  {
+    std::cerr << "Error during nnfw_session::output_tensorinfo." << std::endl;
+    return NNFW_STATUS_ERROR;
+  }
+  return NNFW_STATUS_NO_ERROR;
+}
+
+NNFW_STATUS nnfw_session::register_custom_operation(const std::string &id,
+                                                    nnfw_custom_eval eval_func)
+{
+  _kernel_registry->registerKernel(id, eval_func);
+  return NNFW_STATUS_NO_ERROR;
+}
+
+static std::string get_op_backend_string(std::string op)
+{
+  // TODO: Provide complete set of operations
+  static std::unordered_map<std::string, std::string> operation_map = {
+      {"TRANSPOSE_CONV", "OP_BACKEND_TransposeConvNode"},
+      {"CONV_2D", "OP_BACKEND_Conv2DNode"},
+      {"DEPTHWISE_CONV_2D", "OP_BACKEND_DepthwiseConv2DNode"},
+      {"MEAN", "OP_BACKEND_MeanNode"},
+      {"AVERAGE_POOL_2D", "OP_BACKEND_AvgPool2DNode"},
+      {"MAX_POOL_2D", "OP_BACKEND_MaxPool2DNode"},
+  };
+
+  auto n = operation_map.find(op);
+
+  if (n == operation_map.end())
+  {
+    // this return value is handled by a caller to return error code
+    return std::string("");
+  }
+  else
+  {
+    return n->second;
+  }
+}
+
+NNFW_STATUS nnfw_session::set_default_backend(const char *backend)
+{
+  try
+  {
+    if (!backend || null_terminating(backend, MAX_BACKEND_NAME_LENGTH) == false)
+    {
+      return NNFW_STATUS_ERROR;
+    }
+
+    _source->set("OP_BACKEND_ALLOPS", backend);
+  }
+  catch (...)
+  {
+    std::cerr << "Error during nnfw_session::set_default_backend" << std::endl;
+    return NNFW_STATUS_ERROR;
+  }
+  return NNFW_STATUS_NO_ERROR;
+}
+
+NNFW_STATUS nnfw_session::set_op_backend(const char *op, const char *backend)
+{
+  try
+  {
+    if (!op || !null_terminating(op, MAX_OP_NAME_LENGTH) || !backend ||
+        !null_terminating(backend, MAX_BACKEND_NAME_LENGTH))
+    {
+      return NNFW_STATUS_ERROR;
+    }
+
+    auto key = get_op_backend_string(op);
+
+    if (key.empty())
+    {
+      return NNFW_STATUS_ERROR;
+    }
+
+    _source->set(key, backend);
+  }
+  catch (...)
+  {
+    std::cerr << "Error during nnfw_session::set_op_backend." << std::endl;
+    return NNFW_STATUS_ERROR;
+  }
+  return NNFW_STATUS_NO_ERROR;
+}
diff --git a/runtimes/neurun/frontend/api/wrapper/nnfw_api.hpp b/runtimes/neurun/frontend/api/wrapper/nnfw_api.hpp
new file mode 100644
index 000000000..84514161e
--- /dev/null
+++ b/runtimes/neurun/frontend/api/wrapper/nnfw_api.hpp
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __API_NNFW_INTERNAL_HPP__
+#define __API_NNFW_INTERNAL_HPP__
+
+#include "nnfw.h"
+#include "nnfw_dev.h"
+
+#include <util/GeneralConfigSource.h>
+
+#include <string>
+#include <memory>
+
+namespace neurun
+{
+namespace backend
+{
+namespace custom
+{
+class KernelRegistry;
+}
+}
+namespace exec
+{
+class Execution;
+}
+namespace graph
+{
+class Graph;
+}
+}
+
+struct nnfw_session
+{
+public:
+  nnfw_session();
+
+  NNFW_STATUS load_model_from_file(const char *package_file_path);
+  NNFW_STATUS prepare();
+  NNFW_STATUS run();
+
+  NNFW_STATUS set_input(uint32_t index, NNFW_TYPE type, const void *buffer, size_t length);
+  NNFW_STATUS set_output(uint32_t index, NNFW_TYPE type, void *buffer, size_t length);
+
+  NNFW_STATUS input_size(uint32_t *number);
+  NNFW_STATUS output_size(uint32_t *number);
+
+  NNFW_STATUS input_tensorinfo(uint32_t index, nnfw_tensorinfo *ti);
+  NNFW_STATUS output_tensorinfo(uint32_t index, nnfw_tensorinfo *ti);
+
+  NNFW_STATUS register_custom_operation(const std::string &id, nnfw_custom_eval eval_func);
+
+  NNFW_STATUS set_default_backend(const char *backend);
+  NNFW_STATUS set_op_backend(const char *op, const char *backend);
+
+private:
+  std::shared_ptr<neurun::graph::Graph> _graph;
+  std::shared_ptr<neurun::exec::Execution> _execution;
+  std::shared_ptr<neurun::backend::custom::KernelRegistry> _kernel_registry;
+  std::unique_ptr<neurun::util::GeneralConfigSource> _source;
+};
+
+#endif // __API_NNFW_INTERNAL_HPP__
diff --git a/runtimes/neurun/frontend/nnapi/ANeuralNetworksModel.test.cc b/runtimes/neurun/frontend/nnapi/ANeuralNetworksModel.test.cc
new file mode 100644
index 000000000..15a279a7e
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/ANeuralNetworksModel.test.cc
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <gtest/gtest.h>
+
+#include "wrapper/ANeuralNetworksModel.h"
+
+TEST(MODEL, model_build)
+{
+  ANeuralNetworksModel model;
+  ASSERT_EQ(model.isFinished(), false);
+}
diff --git a/runtimes/neurun/frontend/nnapi/CMakeLists.txt b/runtimes/neurun/frontend/nnapi/CMakeLists.txt
new file mode 100644
index 000000000..bd58de91b
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/CMakeLists.txt
@@ -0,0 +1,21 @@
+file(GLOB_RECURSE SOURCES_FRONTEND "*.cc")
+file(GLOB_RECURSE TESTS_FRONTEND "*.test.cc")
+list(REMOVE_ITEM SOURCES_FRONTEND ${TESTS_FRONTEND})
+
+add_library(${LIB_NEURUN} SHARED ${SOURCES_FRONTEND})
+target_link_libraries(${LIB_NEURUN} PUBLIC nnfw-header)
+target_link_libraries(${LIB_NEURUN} PUBLIC neurun_core) # TODO Link PRIVATE neurun_core
+target_link_libraries(${LIB_NEURUN} PRIVATE nnfw_common)
+target_link_libraries(${LIB_NEURUN} PRIVATE nnfw_coverage)
+
+set_target_properties(${LIB_NEURUN} PROPERTIES OUTPUT_NAME neuralnetworks)
+
+install(TARGETS ${LIB_NEURUN} DESTINATION lib)
+
+add_executable(test_neurun_frontend_nnapi ${TESTS_FRONTEND})
+
+target_link_libraries(test_neurun_frontend_nnapi PRIVATE ${LIB_NEURUN})
+target_link_libraries(test_neurun_frontend_nnapi PRIVATE gtest)
+target_link_libraries(test_neurun_frontend_nnapi PRIVATE gtest_main)
+
+install(TARGETS test_neurun_frontend_nnapi DESTINATION unittest)
diff --git a/runtimes/neurun/frontend/nnapi/compilation.cc b/runtimes/neurun/frontend/nnapi/compilation.cc
new file mode 100644
index 000000000..c35314989
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/compilation.cc
@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <NeuralNetworks.h>
+
+#include <new>
+
+#include "wrapper/ANeuralNetworksModel.h"
+#include "wrapper/ANeuralNetworksCompilation.h"
+#include "util/logging.h"
+
+//
+// NNAPI Implementation
+//
+int ANeuralNetworksCompilation_create(ANeuralNetworksModel *model,
+                                      ANeuralNetworksCompilation **compilation)
+{
+  if ((model == nullptr) || (compilation == nullptr))
+  {
+    VERBOSE(NNAPI::Compilation) << "create: Incorrect null pointer parameter(s)" << std::endl;
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  if (!model->isFinished())
+  {
+    VERBOSE(NNAPI::Compilation) << "create: Model define is not finished" << std::endl;
+    return ANEURALNETWORKS_BAD_STATE;
+  }
+
+  std::shared_ptr<neurun::graph::Graph> internal;
+
+  model->release(internal);
+
+  *compilation = new (std::nothrow) ANeuralNetworksCompilation(internal);
+  if (*compilation == nullptr)
+  {
+    VERBOSE(NNAPI::Compilation) << "create: ail to create compilation object" << std::endl;
+    return ANEURALNETWORKS_OUT_OF_MEMORY;
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
+
+int ANeuralNetworksCompilation_finish(ANeuralNetworksCompilation *compilation)
+{
+  if (compilation == nullptr)
+  {
+    VERBOSE(NNAPI::Compilation) << "finish: Incorrect null pointer parameter" << std::endl;
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  if (compilation->state() != ::neurun::compiler::State::CREATED)
+  {
+    VERBOSE(NNAPI::Compilation) << "finish: Already finished" << std::endl;
+    return ANEURALNETWORKS_BAD_STATE;
+  }
+
+  if (!compilation->finish())
+  {
+    VERBOSE(NNAPI::Compilation) << "finish: Fail to compile" << std::endl;
+    return ANEURALNETWORKS_BAD_STATE;
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
+
+void ANeuralNetworksCompilation_free(ANeuralNetworksCompilation *compilation)
+{
+  delete compilation;
+}
+
+int ANeuralNetworksCompilation_setPreference(ANeuralNetworksCompilation *compilation,
+                                             int32_t preference)
+{
+  if (compilation == nullptr)
+  {
+    VERBOSE(NNAPI::Compilation) << "setPreference: Incorrect null pointer parameter" << std::endl;
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  if (compilation->state() != ::neurun::compiler::State::CREATED)
+  {
+    VERBOSE(NNAPI::Compilation) << "setPreference: Already finished" << std::endl;
+    return ANEURALNETWORKS_BAD_STATE;
+  }
+
+  const PreferenceCode FIRST_PREFERENCE_CODE = ANEURALNETWORKS_PREFER_LOW_POWER;
+  const PreferenceCode LAST_PREFERENCE_CODE = ANEURALNETWORKS_PREFER_SUSTAINED_SPEED;
+  if ((preference < FIRST_PREFERENCE_CODE) || (preference > LAST_PREFERENCE_CODE))
+  {
+    VERBOSE(NNAPI::Compilation) << "setPreference: Incorrect preference code" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  // NYI: nothing to set
+  return ANEURALNETWORKS_NO_ERROR;
+}
diff --git a/runtimes/neurun/frontend/nnapi/event.cc b/runtimes/neurun/frontend/nnapi/event.cc
new file mode 100644
index 000000000..593b74e90
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/event.cc
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <NeuralNetworks.h>
+
+#include "wrapper/ANeuralNetworksEvent.h"
+
+int ANeuralNetworksEvent_wait(ANeuralNetworksEvent *event)
+{
+  if (event == nullptr)
+  {
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  if (!event->waitFinish())
+  {
+    return ANEURALNETWORKS_BAD_STATE;
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
+
+void ANeuralNetworksEvent_free(ANeuralNetworksEvent *event) { delete event; }
diff --git a/runtimes/neurun/frontend/nnapi/execution.cc b/runtimes/neurun/frontend/nnapi/execution.cc
new file mode 100644
index 000000000..837cab0fa
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/execution.cc
@@ -0,0 +1,411 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <NeuralNetworks.h>
+
+#include <new>
+
+#include "wrapper/ANeuralNetworksCompilation.h"
+#include "wrapper/ANeuralNetworksExecution.h"
+#include "wrapper/ANeuralNetworksMemory.h"
+#include "wrapper/ANeuralNetworksEvent.h"
+#include "wrapper/NNAPIConvert.h"
+#include "util/logging.h"
+
+//
+// NNAPI Implementation
+//
+int ANeuralNetworksExecution_create(ANeuralNetworksCompilation *compilation,
+                                    ANeuralNetworksExecution **execution)
+{
+  if ((compilation == nullptr) || (execution == nullptr))
+  {
+    VERBOSE(NNAPI::Execution) << "create: Incorrect null pointer parameter(s)" << std::endl;
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  std::shared_ptr<neurun::exec::IExecutor> executor;
+
+  compilation->publish(executor);
+
+  if (executor == nullptr)
+  {
+    VERBOSE(NNAPI::Execution) << "create: Never compiled yet" << std::endl;
+    return ANEURALNETWORKS_BAD_STATE;
+  }
+
+  *execution = new (std::nothrow) ANeuralNetworksExecution{executor};
+  if (*execution == nullptr)
+  {
+    VERBOSE(NNAPI::Execution) << "create: Fail to create execution object" << std::endl;
+    return ANEURALNETWORKS_OUT_OF_MEMORY;
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
+
+// NOTE Handle optional input
+//  Unspecified shape on model build
+//    Optional and omitted input on execution: skip input setting (workaround for LSTM)
+//    Optional but not omitted input on execution: cannot handle
+//    Normal input on execution: cannot handle
+//  Fully specified shape on model build
+//    Optional input on execution: cannot handle
+//    Normal input: handle normally
+int ANeuralNetworksExecution_setInput(ANeuralNetworksExecution *execution, int32_t index,
+                                      const ANeuralNetworksOperandType *type, const void *buffer,
+                                      size_t length)
+{
+  // Don't check type
+  // Comment about ANeuralNetworksOperandType in NeuralNetworks.h:
+  //  If the input or output is optional and omitted then it need not have a fully specified tensor
+  //  operand type
+  if ((execution == nullptr) || ((buffer == nullptr) && (length != 0)))
+  {
+    VERBOSE(NNAPI::Execution) << "setInput: Incorrect null pointer parameter(s)" << std::endl;
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  if ((buffer != nullptr) && (length == 0))
+  {
+    VERBOSE(NNAPI::Execution) << "setInput: Zero length input" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  const auto operand_index = execution->getInputOperandIndex(index);
+  if (!operand_index.valid())
+  {
+    VERBOSE(NNAPI::Execution) << "setInput: Invalid input index" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  // Omitted optional input
+  // LSTM operation's some inputs can be optional input
+  if ((buffer == nullptr) && (length == 0))
+  {
+    if (execution->haveUnspecifiedDims(operand_index))
+    {
+      return ANEURALNETWORKS_NO_ERROR;
+    }
+    else
+    {
+      VERBOSE(NNAPI::Execution) << "setInput: Cannot handle fully-specified shape on model build "
+                                   "but omitted input on execution"
+                                << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+  }
+
+  if (type != nullptr)
+  {
+    if (!execution->compareDataType(type, operand_index))
+    {
+      VERBOSE(NNAPI::Execution) << "setInput: Data type mismatch" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+
+    if (!execution->compareShape(type, operand_index))
+    {
+      VERBOSE(NNAPI::Execution) << "setInput: Shape mismatch" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+
+    if (NNAPIConvert::calculateSizeFromType(type) != length)
+    {
+      VERBOSE(NNAPI::Execution) << "setInput: Invalid length" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+  }
+  else
+  {
+    if (execution->haveUnspecifiedDims(operand_index))
+    {
+      VERBOSE(NNAPI::Execution) << "setInput: Unspecified dimension value" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+
+    if (execution->getOperandSize(operand_index) != length)
+    {
+      VERBOSE(NNAPI::Execution) << "setInput: Invalid length" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+  }
+
+  if (!execution->setInput(index, type, buffer, length))
+  {
+    VERBOSE(NNAPI::Execution) << "setInput: Fail to set input" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
+
+int ANeuralNetworksExecution_setOutput(ANeuralNetworksExecution *execution, int32_t index,
+                                       const ANeuralNetworksOperandType *type, void *buffer,
+                                       size_t length)
+{
+  // Don't check type
+  // Comment about ANeuralNetworksOperandType in NeuralNetworks.h:
+  //  If the input or output is optional and omitted then it need not have a fully specified tensor
+  //  operand type
+  if ((execution == nullptr) || ((buffer == nullptr) && (length != 0)))
+  {
+    VERBOSE(NNAPI::Execution) << "setOutput: Incorrect null pointer parameter(s)" << std::endl;
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  if ((buffer != nullptr) && (length == 0))
+  {
+    VERBOSE(NNAPI::Execution) << "setOutput: Zero length output" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  // Handle optional output
+  if (buffer == nullptr)
+  {
+    return ANEURALNETWORKS_NO_ERROR;
+  }
+
+  const auto operand_index = execution->getOutputOperandIndex(index);
+  if (!operand_index.valid())
+  {
+    VERBOSE(NNAPI::Execution) << "setOutput: Invalid output index" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  if (type != nullptr)
+  {
+    if (!execution->compareDataType(type, operand_index))
+    {
+      VERBOSE(NNAPI::Execution) << "setOutput: Data type mismatch" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+
+    if (!execution->compareShape(type, operand_index))
+    {
+      VERBOSE(NNAPI::Execution) << "setOutput: Shape mismatch" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+
+    if (NNAPIConvert::calculateSizeFromType(type) != length)
+    {
+      VERBOSE(NNAPI::Execution) << "setOutput: Invalid length" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+  }
+  else
+  {
+    if (execution->haveUnspecifiedDims(operand_index))
+    {
+      VERBOSE(NNAPI::Execution) << "setOutput: Unspecified dimension value" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+
+    if (execution->getOperandSize(operand_index) != length)
+    {
+      VERBOSE(NNAPI::Execution) << "setInput: Invalid length" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+  }
+
+  if (!execution->setOutput(index, type, buffer, length))
+  {
+    VERBOSE(NNAPI::Execution) << "setOutput: Fail to set output" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
+
+int ANeuralNetworksExecution_startCompute(ANeuralNetworksExecution *execution,
+                                          ANeuralNetworksEvent **event)
+{
+  if ((execution == nullptr) || (event == nullptr))
+  {
+    VERBOSE(NNAPI::Execution) << "startCompute: Incorrect null pointer parameter(s)" << std::endl;
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  // TODO: Handle event
+  auto instance = execution->instance();
+  *event = new (std::nothrow) ANeuralNetworksEvent{instance};
+  if (*event == nullptr)
+  {
+    VERBOSE(NNAPI::Execution) << "startCompute: Fail to create event" << std::endl;
+    return ANEURALNETWORKS_OUT_OF_MEMORY;
+  }
+
+  if (!execution->startExecute())
+  {
+    VERBOSE(NNAPI::Execution) << "startCompute: Fail to start execution" << std::endl;
+    return ANEURALNETWORKS_BAD_STATE;
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
+
+void ANeuralNetworksExecution_free(ANeuralNetworksExecution *execution) { delete execution; }
+
+int ANeuralNetworksExecution_setInputFromMemory(ANeuralNetworksExecution *execution, int32_t index,
+                                                const ANeuralNetworksOperandType *type,
+                                                const ANeuralNetworksMemory *memory, size_t offset,
+                                                size_t length)
+{
+  if ((execution == nullptr) || (memory == nullptr))
+  {
+    VERBOSE(NNAPI::Execution) << "setInputFromMemory: Incorrect null pointer parameter(s)"
+                              << std::endl;
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  if (length == 0)
+  {
+    VERBOSE(NNAPI::Execution) << "setInputFromMemory: Zero length input" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  const auto operand_index = execution->getInputOperandIndex(index);
+  if (!operand_index.valid())
+  {
+    VERBOSE(NNAPI::Execution) << "setInputFromMemory: Invalid input index" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  if (type != nullptr)
+  {
+    if (!execution->compareDataType(type, operand_index))
+    {
+      VERBOSE(NNAPI::Execution) << "setInputFromMemory: Data type mismatch" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+
+    if (!execution->compareShape(type, operand_index))
+    {
+      VERBOSE(NNAPI::Execution) << "setInputFromMemory: Shape mismatch" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+
+    if (NNAPIConvert::calculateSizeFromType(type) != length)
+    {
+      VERBOSE(NNAPI::Execution) << "setInputFromMemory: Invalid length" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+  }
+  else
+  {
+    if (execution->haveUnspecifiedDims(operand_index))
+    {
+      VERBOSE(NNAPI::Execution) << "setInputFromMemory: Unspecified dimension value" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+
+    if (execution->getOperandSize(operand_index) != length)
+    {
+      VERBOSE(NNAPI::Execution) << "setInputFromMemory: Invalid length" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+  }
+
+  if (!memory->vaildAccess(offset, length))
+  {
+    VERBOSE(NNAPI::Execution) << "setInputFromMemory: Invalid memory access" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  if (!execution->setInput(index, type, reinterpret_cast<const void *>(memory->base() + offset),
+                           length))
+  {
+    VERBOSE(NNAPI::Execution) << "setInputFromMemory: Fail to set input" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
+
+int ANeuralNetworksExecution_setOutputFromMemory(ANeuralNetworksExecution *execution, int32_t index,
+                                                 const ANeuralNetworksOperandType *type,
+                                                 const ANeuralNetworksMemory *memory, size_t offset,
+                                                 size_t length)
+{
+  if ((execution == nullptr) || (memory == nullptr))
+  {
+    VERBOSE(NNAPI::Execution) << "setOutputFromMemory: Incorrect null pointer parameter(s)"
+                              << std::endl;
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  if (length == 0)
+  {
+    VERBOSE(NNAPI::Execution) << "setOutputFromMemory: Zero length input" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  const auto operand_index = execution->getOutputOperandIndex(index);
+  if (!operand_index.valid())
+  {
+    VERBOSE(NNAPI::Execution) << "setOutputFromMemory: Invalid output index" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  if (type != nullptr)
+  {
+    if (!execution->compareDataType(type, operand_index))
+    {
+      VERBOSE(NNAPI::Execution) << "setOutputFromMemory: Data type mismatch" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+
+    if (!execution->compareShape(type, operand_index))
+    {
+      VERBOSE(NNAPI::Execution) << "setOutputFromMemory: Shape mismatch" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+
+    if (NNAPIConvert::calculateSizeFromType(type) != length)
+    {
+      VERBOSE(NNAPI::Execution) << "setOutputFromMemory: Invalid length" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+  }
+  else
+  {
+    if (execution->haveUnspecifiedDims(operand_index))
+    {
+      VERBOSE(NNAPI::Execution) << "setOutputFromMemory: Unspecified dimension value" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+
+    if (execution->getOperandSize(operand_index) != length)
+    {
+      VERBOSE(NNAPI::Execution) << "setOutputFromMemory: Invalid length" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+  }
+
+  if (!memory->vaildAccess(offset, length))
+  {
+    VERBOSE(NNAPI::Execution) << "setOutputFromMemory: Invalid memory access" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  if (!execution->setOutput(index, type, reinterpret_cast<void *>(memory->base() + offset), length))
+  {
+    VERBOSE(NNAPI::Execution) << "setOutputFromMemory: Fail to set input" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
diff --git a/runtimes/neurun/frontend/nnapi/memory.cc b/runtimes/neurun/frontend/nnapi/memory.cc
new file mode 100644
index 000000000..fbe1a48e8
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/memory.cc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <NeuralNetworks.h>
+#include <sys/mman.h>
+#include <new>
+#include <memory>
+
+#include "cpp14/memory.h"
+#include "wrapper/ANeuralNetworksMemory.h"
+
+int ANeuralNetworksMemory_createFromFd(size_t size, int protect, int fd, size_t offset,
+                                       ANeuralNetworksMemory **memory)
+{
+  if (memory == nullptr)
+  {
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  *memory = new (std::nothrow) ANeuralNetworksMemory{size, protect, fd, offset};
+  if (*memory == nullptr)
+  {
+    return ANEURALNETWORKS_OUT_OF_MEMORY;
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
+
+void ANeuralNetworksMemory_free(ANeuralNetworksMemory *memory) { delete memory; }
diff --git a/runtimes/neurun/frontend/nnapi/model.cc b/runtimes/neurun/frontend/nnapi/model.cc
new file mode 100644
index 000000000..e854b1694
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/model.cc
@@ -0,0 +1,396 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <NeuralNetworks.h>
+#include <NeuralNetworksEx.h>
+
+#include <new>
+
+#include "wrapper/ANeuralNetworksModel.h"
+#include "wrapper/ANeuralNetworksMemory.h"
+#include "util/logging.h"
+
+int ANeuralNetworksModel_create(ANeuralNetworksModel **model)
+{
+  if (model == nullptr)
+  {
+    VERBOSE(NNAPI::Model) << "create: Incorrect null pointer parameter" << std::endl;
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  *model = new (std::nothrow) ANeuralNetworksModel{};
+  if (*model == nullptr)
+  {
+    VERBOSE(NNAPI::Model) << "create: Fail to create model object" << std::endl;
+    return ANEURALNETWORKS_OUT_OF_MEMORY;
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
+
+void ANeuralNetworksModel_free(ANeuralNetworksModel *model) { delete model; }
+
+int ANeuralNetworksModel_addOperand(ANeuralNetworksModel *model,
+                                    const ANeuralNetworksOperandType *type)
+{
+  if ((model == nullptr) || (type == nullptr))
+  {
+    VERBOSE(NNAPI::Model) << "addOperand: Incorrect null pointer parameter(s)" << std::endl;
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  if (model->isFinished())
+  {
+    VERBOSE(NNAPI::Model) << "addOperand: Already finished" << std::endl;
+    return ANEURALNETWORKS_BAD_STATE;
+  }
+
+  // scale and zeroPoint should be zero for scalars and non-fixed point tensors
+  // Quantized:
+  //  scale: a 32 bit floating point value greater than zero
+  //  zeroPoint: a 32 bit integer, in range [0, 255]
+  if (type->type == ANEURALNETWORKS_TENSOR_QUANT8_ASYMM)
+  {
+    if (!(type->scale > 0.0f))
+    {
+      VERBOSE(NNAPI::Model) << "addOperand: Incorrect scale value for quantization" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+
+    if ((type->zeroPoint < 0) || (type->zeroPoint > 255))
+    {
+      VERBOSE(NNAPI::Model) << "addOperand: Incorrect zeroPoint value for quantization"
+                            << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+  }
+  // NOTE Validation of scale and zeroPoint would be skipped for a while.
+  //      We do not know whether scalar type can have scale and zeroPoint.
+  //      To pass ValidationTest and GeneratedTest, this validation code
+  //      would not be implemented until we can define this issue clearly.
+  //
+  // scale and zeroPoint should be zero for scalars and non-fixed point tensors
+  // else if ((type->scale != 0.0f) || (type->zeroPoint != 0))
+  // {
+  //   return ANEURALNETWORKS_BAD_DATA;
+  // }
+
+  // dimensionCount should be zero for scalars
+  if ((type->dimensionCount != 0) &&
+      ((type->type == ANEURALNETWORKS_FLOAT32) || (type->type == ANEURALNETWORKS_INT32) ||
+       (type->type == ANEURALNETWORKS_UINT32)))
+  {
+    VERBOSE(NNAPI::Model) << "addOperand: Incorrect data type" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  if (!model->addOperand(type))
+  {
+    VERBOSE(NNAPI::Model) << "addOperand: Fail to add operand" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
+
+int ANeuralNetworksModel_setOperandValue(ANeuralNetworksModel *model, int32_t index,
+                                         const void *buffer, size_t length)
+{
+  const bool optional_operand = ((buffer == nullptr) && (length == 0));
+
+  if ((model == nullptr) || ((buffer == nullptr) && (length != 0)))
+  {
+    VERBOSE(NNAPI::Model) << "setOperandValue: Incorrect null pointer parameter(s)" << std::endl;
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  if (model->isFinished())
+  {
+    VERBOSE(NNAPI::Model) << "setOperandValue: Already finished" << std::endl;
+    return ANEURALNETWORKS_BAD_STATE;
+  }
+
+  // Negative index value is not allowed
+  if (index < 0)
+  {
+    VERBOSE(NNAPI::Model) << "setOperandValue: Invalid index value (negative)" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+  // NOTE ::neurun::model::OperandIndex uses uint32_t as its underlying type as various NNAPI
+  //      functions such as ANeuralNetworksModel_addOperation use uint32_t to represent operand
+  //      index
+  //      ANeuralNetworksModel_setOperandValue, however, uses int32_t to represent operand index.
+  //
+  //      Below, static_cast<uint32_t>(...) is introduced to eliminate compiler warning.
+  uint32_t ind = static_cast<uint32_t>(index);
+
+  if (!model->isExistOperand(ind))
+  {
+    VERBOSE(NNAPI::Model) << "setOperandValue: Invalid index value (not exist)" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  if (!optional_operand && (model->operandSize(ind) != length))
+  {
+    VERBOSE(NNAPI::Model) << "setOperandValue: Invalid data length" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  if (model->isUsageSet(ind))
+  {
+    VERBOSE(NNAPI::Model) << "setOperandValue: Already set operand" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  // NNAPI spec in NeuralNetworks.h
+  // For values of length greater than ANEURALNETWORKS_MAX_SIZE_OF_IMMEDIATELY_COPIED_VALUES,
+  // the application is responsible for not changing the content of this region
+  // until all executions using this model have completed
+  bool copy_value = false;
+  if (length <= ANEURALNETWORKS_MAX_SIZE_OF_IMMEDIATELY_COPIED_VALUES)
+  {
+    copy_value = true;
+  }
+
+  if (!model->setOperandValue(ind, buffer, length, optional_operand, copy_value))
+  {
+    VERBOSE(NNAPI::Model) << "setOperandValue: Fail to set operand value" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
+
+int ANeuralNetworksModel_setOperandValueFromMemory(ANeuralNetworksModel *model, int32_t index,
+                                                   const ANeuralNetworksMemory *memory,
+                                                   size_t offset, size_t length)
+{
+  if ((model == nullptr) || (memory == nullptr))
+  {
+    VERBOSE(NNAPI::Model) << "setOperandValueFromMemory: Incorrect null pointer parameter(s)"
+                          << std::endl;
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  if (model->isFinished())
+  {
+    VERBOSE(NNAPI::Model) << "setOperandValueFromMemory: Already finished" << std::endl;
+    return ANEURALNETWORKS_BAD_STATE;
+  }
+
+  // Negative index value is not allowed
+  if (index < 0)
+  {
+    VERBOSE(NNAPI::Model) << "setOperandValueFromMemory: Invalid index value (negative)"
+                          << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+  // NOTE ::neurun::model::OperandIndex uses uint32_t as its underlying type as various NNAPI
+  //      functions such as ANeuralNetworksModel_addOperation use uint32_t to represent operand
+  //      index
+  //      ANeuralNetworksModel_setOperandValue, however, uses int32_t to represent operand index.
+  //
+  //      Below, static_cast<uint32_t>(...) is introduced to eliminate compiler warning.
+  uint32_t ind = static_cast<uint32_t>(index);
+
+  if (!model->isExistOperand(ind))
+  {
+    VERBOSE(NNAPI::Model) << "setOperandValueFromMemory: Invalid index value (not exist)"
+                          << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  if ((model->operandSize(ind) != length) || (memory->size() < (offset + length)))
+  {
+    VERBOSE(NNAPI::Model) << "setOperandValueFromMemory: Invalid data length" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  if (model->isUsageSet(ind))
+  {
+    VERBOSE(NNAPI::Model) << "setOperandValueFromMemory: Already set operand" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  if (!model->setOperandValue(ind, memory->base() + offset, length))
+  {
+    VERBOSE(NNAPI::Model) << "setOperandValueFromMemory: Fail to set operand value" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
+
+int ANeuralNetworksModel_addOperation(ANeuralNetworksModel *model,
+                                      ANeuralNetworksOperationType type, uint32_t inputCount,
+                                      const uint32_t *inputs, uint32_t outputCount,
+                                      const uint32_t *outputs)
+{
+  if ((model == nullptr) || (inputs == nullptr) || (outputs == nullptr))
+  {
+    VERBOSE(NNAPI::Model) << "addOperation: Incorrect null pointer parameter(s)" << std::endl;
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  if (model->isFinished())
+  {
+    VERBOSE(NNAPI::Model) << "addOperation: Already finished" << std::endl;
+    return ANEURALNETWORKS_BAD_STATE;
+  }
+
+  const ANeuralNetworksOperationType FIRST_OPERATION = ANEURALNETWORKS_ADD;
+  const ANeuralNetworksOperationType LAST_OPERATION = ANEURALNETWORKS_TRANSPOSE;
+  if ((type < FIRST_OPERATION) || (type > LAST_OPERATION))
+  {
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  for (uint32_t i = 0; i < outputCount; i++)
+  {
+    if (model->isUsageSet(outputs[i]))
+    {
+      VERBOSE(NNAPI::Model) << "addOperation: Already set output operand" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+  }
+
+  if (!model->addOperation(type, inputCount, inputs, outputCount, outputs))
+  {
+    VERBOSE(NNAPI::Model) << "addOperation: Fail to add operation" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
+
+int ANeuralNetworksModel_addOperationEx(ANeuralNetworksModel *model,
+                                        ANeuralNetworksOperationTypeEx type, uint32_t inputCount,
+                                        const uint32_t *inputs, uint32_t outputCount,
+                                        const uint32_t *outputs)
+{
+  if ((model == nullptr) || (inputs == nullptr) || (outputs == nullptr))
+  {
+    VERBOSE(NNAPI::Model) << "addOperation: Incorrect null pointer parameter(s)" << std::endl;
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  if (model->isFinished())
+  {
+    VERBOSE(NNAPI::Model) << "addOperation: Already finished" << std::endl;
+    return ANEURALNETWORKS_BAD_STATE;
+  }
+
+  const ANeuralNetworksOperationTypeEx FIRST_OPERATION = ANEURALNETWORKS_CAST_EX;
+  const ANeuralNetworksOperationTypeEx LAST_OPERATION = ANEURALNETWORKS_LESS_EX;
+  if ((type < FIRST_OPERATION) || (type > LAST_OPERATION))
+  {
+    VERBOSE(NNAPI::Model) << "addOperation: Invalid operation type" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  for (uint32_t i = 0; i < outputCount; i++)
+  {
+    if (model->isUsageSet(outputs[i]))
+    {
+      VERBOSE(NNAPI::Model) << "addOperation: Already set output operand" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+  }
+
+  if (!model->addOperationEx(type, inputCount, inputs, outputCount, outputs))
+  {
+    VERBOSE(NNAPI::Model) << "addOperation: Fail to add operation" << std::endl;
+    return ANEURALNETWORKS_BAD_DATA;
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
+
+int ANeuralNetworksModel_identifyInputsAndOutputs(ANeuralNetworksModel *model, uint32_t inputCount,
+                                                  const uint32_t *inputs, uint32_t outputCount,
+                                                  const uint32_t *outputs)
+{
+  if ((model == nullptr) || (inputs == nullptr) || (outputs == nullptr))
+  {
+    VERBOSE(NNAPI::Model) << "identifyInputsAndOutputs: Incorrect null pointer parameter(s)"
+                          << std::endl;
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  if (model->isFinished())
+  {
+    VERBOSE(NNAPI::Model) << "identifyInputsAndOutputs: Already finished" << std::endl;
+    return ANEURALNETWORKS_BAD_STATE;
+  }
+
+  for (uint32_t n = 0; n < inputCount; ++n)
+  {
+    uint32_t ind = inputs[n];
+    if (model->isUsageSet(ind))
+    {
+      VERBOSE(NNAPI::Model) << "identifyInputsAndOutputs: Already set input operand" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+
+    if (!model->addModelInput(ind))
+    {
+      VERBOSE(NNAPI::Model) << "identifyInputsAndOutputs: Fail to add input" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+  }
+
+  for (uint32_t n = 0; n < outputCount; ++n)
+  {
+    uint32_t ind = outputs[n];
+
+    if (!model->isOperationOutput(ind))
+    {
+      VERBOSE(NNAPI::Model) << "identifyInputsAndOutputs: Need to set output operand" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+
+    if (!model->addModelOutput(ind))
+    {
+      VERBOSE(NNAPI::Model) << "identifyInputsAndOutputs: Fail to add output" << std::endl;
+      return ANEURALNETWORKS_BAD_DATA;
+    }
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
+
+int ANeuralNetworksModel_finish(ANeuralNetworksModel *model)
+{
+  if (model == nullptr)
+  {
+    VERBOSE(NNAPI::Model) << "finish: Incorrect null pointer parameter" << std::endl;
+    return ANEURALNETWORKS_UNEXPECTED_NULL;
+  }
+
+  if (model->isFinished())
+  {
+    VERBOSE(NNAPI::Model) << "finish: Already finished" << std::endl;
+    return ANEURALNETWORKS_BAD_STATE;
+  }
+
+  if (!model->finish())
+  {
+    VERBOSE(NNAPI::Model) << "finish: Fail to generate internal graph" << std::endl;
+    return ANEURALNETWORKS_BAD_STATE;
+  }
+
+  return ANEURALNETWORKS_NO_ERROR;
+}
diff --git a/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksCompilation.cc b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksCompilation.cc
new file mode 100644
index 000000000..96a3e918e
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksCompilation.cc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ANeuralNetworksCompilation.h"
+
+#include "util/logging.h"
+
+ANeuralNetworksCompilation::ANeuralNetworksCompilation(
+    const std::shared_ptr<neurun::graph::Graph> &model) noexcept
+    : _compiler{new neurun::compiler::Compiler{model}}
+{
+  // DO NOTHING
+}
+
+bool ANeuralNetworksCompilation::finish() noexcept
+{
+  try
+  {
+    _compiler->compile();
+  }
+  catch (const std::exception &e)
+  {
+    VERBOSE(EXCEPTION) << e.what() << std::endl;
+
+    return false;
+  }
+
+  return true;
+}
diff --git a/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksCompilation.h b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksCompilation.h
new file mode 100644
index 000000000..7a4ee98f9
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksCompilation.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __COMPILATION_H__
+#define __COMPILATION_H__
+
+#include "compiler/Compiler.h"
+#include "graph/Graph.h"
+#include "exec/IExecutor.h"
+
+struct ANeuralNetworksCompilation
+{
+public:
+  ANeuralNetworksCompilation(const std::shared_ptr<neurun::graph::Graph> &graph) noexcept;
+
+public:
+  bool finish() noexcept;
+
+  neurun::compiler::State state(void) noexcept { return _compiler->state(); }
+  void publish(std::shared_ptr<neurun::exec::IExecutor> &executor) noexcept
+  {
+    _compiler->release(executor);
+  }
+
+private:
+  std::shared_ptr<neurun::compiler::Compiler> _compiler;
+};
+
+#endif
diff --git a/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksEvent.cc b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksEvent.cc
new file mode 100644
index 000000000..b09f9abe6
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksEvent.cc
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ANeuralNetworksEvent.h"
+
+#include "exec/Execution.h"
+#include "util/logging.h"
+
+ANeuralNetworksEvent::ANeuralNetworksEvent(
+    const std::shared_ptr<neurun::exec::Execution> &execution)
+    : _execution{execution}
+{
+  // DO NOTHING
+}
+
+bool ANeuralNetworksEvent::waitFinish(void) noexcept
+{
+  try
+  {
+    _execution->waitFinish();
+  }
+  catch (const std::exception &e)
+  {
+    VERBOSE(EXCEPTION) << e.what() << std::endl;
+
+    return false;
+  }
+
+  return true;
+}
diff --git a/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksEvent.h b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksEvent.h
new file mode 100644
index 000000000..e499bab77
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksEvent.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __EVENT_H__
+#define __EVENT_H__
+
+#include <NeuralNetworks.h>
+
+#include <memory>
+
+namespace neurun
+{
+namespace exec
+{
+class Execution;
+} // namespace exec
+} // namespace neurun
+
+struct ANeuralNetworksEvent
+{
+public:
+  ANeuralNetworksEvent(const std::shared_ptr<neurun::exec::Execution> &execution);
+
+public:
+  bool waitFinish(void) noexcept;
+
+private:
+  const std::shared_ptr<neurun::exec::Execution> _execution;
+};
+
+#endif
diff --git a/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksExecution.cc b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksExecution.cc
new file mode 100644
index 000000000..ee621e31d
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksExecution.cc
@@ -0,0 +1,190 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ANeuralNetworksExecution.h"
+#include "NNAPIConvert.h"
+#include "util/logging.h"
+
+const neurun::model::OperandIndex
+ANeuralNetworksExecution::getInputOperandIndex(int32_t index) noexcept
+{
+  if (index < 0)
+  {
+    // Negative index: return invalid index
+    return neurun::model::OperandIndex{};
+  }
+
+  uint32_t cast_index = static_cast<uint32_t>(index);
+  if (cast_index >= _execution->model().inputs.size())
+  {
+    // Return invalid index
+    return neurun::model::OperandIndex{};
+  }
+
+  neurun::model::IOIndex input_index{cast_index};
+  const auto operand_index = _execution->model().inputs.at(input_index);
+  return operand_index;
+}
+
+const neurun::model::OperandIndex
+ANeuralNetworksExecution::getOutputOperandIndex(int32_t index) noexcept
+{
+  if (index < 0)
+  {
+    // Negative index: return invalid index
+    return neurun::model::OperandIndex{};
+  }
+
+  uint32_t cast_index = static_cast<uint32_t>(index);
+  if (cast_index >= _execution->model().outputs.size())
+  {
+    // Return invalid index
+    return neurun::model::OperandIndex{};
+  }
+
+  neurun::model::IOIndex output_index{cast_index};
+  const auto operand_index = _execution->model().outputs.at(output_index);
+  return operand_index;
+}
+
+bool ANeuralNetworksExecution::compareDataType(const ANeuralNetworksOperandType *type,
+                                               const neurun::model::OperandIndex index) noexcept
+{
+  try
+  {
+    const auto operand_type = _execution->model().operands.at(index).typeInfo();
+    const auto typeInfo = NNAPIConvert::getTypeInfo(type);
+
+    if (operand_type != typeInfo)
+    {
+      // Data type mismatch
+      return false;
+    }
+  }
+  catch (const std::exception &e)
+  {
+    VERBOSE(EXCEPTION) << e.what() << std::endl;
+
+    return false;
+  }
+
+  return true;
+}
+
+bool ANeuralNetworksExecution::compareShape(const ANeuralNetworksOperandType *type,
+                                            const neurun::model::OperandIndex index) noexcept
+{
+  // Passed shape should be specified
+  if (haveUnspecifiedDims(index))
+  {
+    return false;
+  }
+
+  const auto &operand_shape = _execution->model().operands.at(index).shape();
+  const auto &shape_from_type = NNAPIConvert::getShape(type);
+
+  return operand_shape == shape_from_type;
+}
+
+bool ANeuralNetworksExecution::haveUnspecifiedDims(const neurun::model::OperandIndex index) noexcept
+{
+  const auto operand_shape = _execution->model().operands.at(index).shape();
+
+  return operand_shape.num_elements() == 0;
+}
+
+size_t ANeuralNetworksExecution::getOperandSize(const neurun::model::OperandIndex index) noexcept
+{
+  try
+  {
+    return _execution->model().operands.at(index).operandSize();
+  }
+  catch (const std::exception &e)
+  {
+    VERBOSE(EXCEPTION) << e.what() << std::endl;
+
+    return 0;
+  }
+}
+
+bool ANeuralNetworksExecution::setInput(uint32_t index, const ANeuralNetworksOperandType *type,
+                                        const void *buffer, size_t length) noexcept
+{
+  try
+  {
+    neurun::model::IOIndex input_index{index};
+    const auto operand_index = getInputOperandIndex(index);
+
+    const auto type_info = _execution->model().operands.at(operand_index).typeInfo();
+    const auto shape = ((type != nullptr) ? NNAPIConvert::getShape(type)
+                                          : _execution->model().operands.at(operand_index).shape());
+
+    _execution->setInput(input_index, type_info, shape, buffer, length);
+  }
+  catch (const std::exception &e)
+  {
+    VERBOSE(EXCEPTION) << e.what() << std::endl;
+
+    return false;
+  }
+
+  return true;
+}
+
+bool ANeuralNetworksExecution::setOutput(uint32_t index, const ANeuralNetworksOperandType *type,
+                                         void *buffer, size_t length) noexcept
+{
+  try
+  {
+    neurun::model::IOIndex output_index{index};
+    const auto operand_index = getOutputOperandIndex(index);
+
+    const auto type_info = _execution->model().operands.at(operand_index).typeInfo();
+    const auto shape = ((type != nullptr) ? NNAPIConvert::getShape(type)
+                                          : _execution->model().operands.at(operand_index).shape());
+
+    _execution->setOutput(output_index, type_info, shape, buffer, length);
+  }
+  catch (const std::exception &e)
+  {
+    VERBOSE(EXCEPTION) << e.what() << std::endl;
+
+    return false;
+  }
+
+  return true;
+}
+
+bool ANeuralNetworksExecution::startExecute(void) noexcept
+{
+  try
+  {
+    _execution->startExecute();
+  }
+  catch (const std::exception &e)
+  {
+    VERBOSE(EXCEPTION) << e.what() << std::endl;
+
+    return false;
+  }
+
+  return true;
+}
+
+const std::shared_ptr<neurun::exec::Execution> ANeuralNetworksExecution::instance(void) noexcept
+{
+  return _execution;
+}
diff --git a/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksExecution.h b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksExecution.h
new file mode 100644
index 000000000..946a12db8
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksExecution.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __EXECUTION_H__
+#define __EXECUTION_H__
+
+#include <NeuralNetworks.h>
+
+#include <memory>
+
+#include "exec/Execution.h"
+
+struct ANeuralNetworksExecution
+{
+public:
+  ANeuralNetworksExecution(const std::shared_ptr<neurun::exec::IExecutor> &executor)
+      : _execution{std::make_shared<neurun::exec::Execution>(executor)}
+  {
+    // DO NOTHING
+  }
+
+public:
+  bool setInput(uint32_t index, const ANeuralNetworksOperandType *type, const void *buffer,
+                size_t length) noexcept;
+  bool setOutput(uint32_t index, const ANeuralNetworksOperandType *type, void *buffer,
+                 size_t length) noexcept;
+  bool startExecute(void) noexcept;
+
+  const neurun::model::OperandIndex getInputOperandIndex(int32_t index) noexcept;
+  const neurun::model::OperandIndex getOutputOperandIndex(int32_t index) noexcept;
+  bool compareDataType(const ANeuralNetworksOperandType *type,
+                       const neurun::model::OperandIndex index) noexcept;
+  bool compareShape(const ANeuralNetworksOperandType *type,
+                    const neurun::model::OperandIndex index) noexcept;
+  bool haveUnspecifiedDims(const neurun::model::OperandIndex index) noexcept;
+  size_t getOperandSize(const neurun::model::OperandIndex index) noexcept;
+  const std::shared_ptr<neurun::exec::Execution> instance(void) noexcept;
+
+private:
+  std::shared_ptr<neurun::exec::Execution> _execution;
+};
+
+#endif
diff --git a/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksMemory.cc b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksMemory.cc
new file mode 100644
index 000000000..9cc100585
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksMemory.cc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <NeuralNetworks.h>
+#include <sys/mman.h>
+
+#include "ANeuralNetworksMemory.h"
+
+//
+// ANeuralNetworksMemory
+//
+ANeuralNetworksMemory::ANeuralNetworksMemory(size_t size, int protect, int fd, size_t offset)
+{
+  _base = reinterpret_cast<uint8_t *>(mmap(nullptr, size, protect, MAP_PRIVATE, fd, offset));
+  _size = size;
+}
+
+ANeuralNetworksMemory::~ANeuralNetworksMemory() { munmap(reinterpret_cast<void *>(_base), _size); }
+
+bool ANeuralNetworksMemory::vaildAccess(size_t offset, size_t length) const
+{
+  if ((offset >= _size) || (length > _size))
+  {
+    return false;
+  }
+
+  if ((offset + length) >= _size)
+  {
+    return false;
+  }
+
+  return true;
+}
diff --git a/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksMemory.h b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksMemory.h
new file mode 100644
index 000000000..48a1bc5fc
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksMemory.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __MEMORY_H__
+#define __MEMORY_H__
+
+#include <cstdint>
+
+struct ANeuralNetworksMemory
+{
+public:
+  ANeuralNetworksMemory(size_t size, int protect, int fd, size_t offset);
+  ~ANeuralNetworksMemory();
+
+public:
+  size_t size(void) const { return _size; }
+  uint8_t *base(void) { return _base; }
+  uint8_t *base(void) const { return _base; }
+  bool vaildAccess(size_t offset, size_t length) const;
+
+private:
+  size_t _size;
+  uint8_t *_base;
+};
+
+#endif // __MEMORY_H__
diff --git a/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksModel.cc b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksModel.cc
new file mode 100644
index 000000000..e3bb29161
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksModel.cc
@@ -0,0 +1,257 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ANeuralNetworksModel.h"
+#include "OperationFactory.h"
+#include "NNAPIConvert.h"
+
+#include "model/Operations.Include.h"
+#include "util/logging.h"
+
+#include "cpp14/memory.h"
+
+//
+// ANeuralNetworksModel
+//
+ANeuralNetworksModel::ANeuralNetworksModel() noexcept
+    : _model{new neurun::model::Model}, _graph{nullptr}, _optional_operands{}, _operand_usages{}
+{
+  // DO NOTHING
+}
+
+bool ANeuralNetworksModel::addOperand(const ANeuralNetworksOperandType *type) noexcept
+{
+  try
+  {
+    const auto shape = NNAPIConvert::getShape(type);
+    const auto typeInfo = NNAPIConvert::getTypeInfo(type);
+    _model->operands.emplace(shape, typeInfo);
+    _operand_usages.emplace_back(OperandUsage::NOT_DEFINED);
+  }
+  catch (const std::exception &e)
+  {
+    VERBOSE(EXCEPTION) << e.what() << std::endl;
+
+    return false;
+  }
+
+  return true;
+}
+
+bool ANeuralNetworksModel::setOperandValue(uint32_t index, const void *buffer, size_t length,
+                                           bool optional, bool copy) noexcept
+{
+  const neurun::model::OperandIndex ind{index};
+
+  try
+  {
+    _operand_usages[index] = OperandUsage::CONSTANT;
+
+    // Remain operands.at(ind).data()->base() as nullptr for optional operand
+    // This will be filled when model finished
+    if (optional)
+    {
+      setOptionalOperand(ind);
+    }
+
+    using ::neurun::model::CachedData;
+    using ::neurun::model::ExternalData;
+    if (copy)
+    {
+      _model->operands.at(ind).data(
+          nnfw::cpp14::make_unique<CachedData>(reinterpret_cast<const uint8_t *>(buffer), length));
+    }
+    else
+    {
+      _model->operands.at(ind).data(nnfw::cpp14::make_unique<ExternalData>(
+          reinterpret_cast<const uint8_t *>(buffer), length));
+    }
+  }
+  catch (const std::exception &e)
+  {
+    VERBOSE(EXCEPTION) << e.what() << std::endl;
+
+    return false;
+  }
+
+  return true;
+}
+
+bool ANeuralNetworksModel::addOperation(ANeuralNetworksOperationType type, uint32_t inputCount,
+                                        const uint32_t *inputs, uint32_t outputCount,
+                                        const uint32_t *outputs) noexcept
+{
+  try
+  {
+    for (uint32_t i = 0; i < outputCount; i++)
+    {
+      _operand_usages[outputs[i]] = OperandUsage::OPERATION_OUTPUT;
+    }
+
+    auto &factory = OperationFactory::instance();
+    OperationFactory::Param param{inputCount, inputs, outputCount, outputs};
+
+    auto node = factory.create(type, param, _model->operands);
+    _model->operations.push(std::unique_ptr<neurun::model::Operation>{node});
+  }
+  catch (const std::exception &e)
+  {
+    VERBOSE(EXCEPTION) << e.what() << std::endl;
+
+    return false;
+  }
+
+  return true;
+}
+
+bool ANeuralNetworksModel::addOperationEx(ANeuralNetworksOperationTypeEx type, uint32_t inputCount,
+                                          const uint32_t *inputs, uint32_t outputCount,
+                                          const uint32_t *outputs) noexcept
+{
+  try
+  {
+    for (uint32_t i = 0; i < outputCount; i++)
+    {
+      _operand_usages[outputs[i]] = OperandUsage::OPERATION_OUTPUT;
+    }
+
+    auto &factory = OperationFactory::instance();
+    OperationFactory::Param param{inputCount, inputs, outputCount, outputs};
+
+    auto node = factory.create(type, param, _model->operands);
+    _model->operations.push(std::unique_ptr<neurun::model::Operation>{node});
+  }
+  catch (const std::exception &e)
+  {
+    return false;
+  }
+  return true;
+}
+
+bool ANeuralNetworksModel::addModelInput(uint32_t index) noexcept
+{
+  try
+  {
+    _operand_usages[index] = OperandUsage::MODEL_INPUT;
+
+    const neurun::model::OperandIndex ind{index};
+    _model->inputs.append(ind);
+  }
+  catch (const std::exception &e)
+  {
+    VERBOSE(EXCEPTION) << e.what() << std::endl;
+
+    return false;
+  }
+
+  return true;
+}
+bool ANeuralNetworksModel::addModelOutput(uint32_t index) noexcept
+{
+  try
+  {
+    const neurun::model::OperandIndex ind{index};
+
+    // Duplicated output is not allowed
+    if (_model->outputs.contains(ind))
+    {
+      return false;
+    }
+
+    _model->outputs.append(ind);
+  }
+  catch (const std::exception &e)
+  {
+    VERBOSE(EXCEPTION) << e.what() << std::endl;
+
+    return false;
+  }
+
+  return true;
+}
+
+bool ANeuralNetworksModel::finish() noexcept
+{
+  try
+  {
+    fillOptionalOperand();
+
+    _graph = std::make_shared<neurun::graph::Graph>(std::move(_model));
+
+    _graph->finishBuilding();
+
+    _operand_usages.clear();
+  }
+  catch (const std::exception &e)
+  {
+    VERBOSE(EXCEPTION) << e.what() << '\n';
+
+    return false;
+  }
+
+  return true;
+}
+
+bool ANeuralNetworksModel::isFinished() noexcept { return _graph != nullptr; }
+
+bool ANeuralNetworksModel::isExistOperand(uint32_t index) noexcept
+{
+  return _model->operands.exist(neurun::model::OperandIndex{index});
+}
+
+size_t ANeuralNetworksModel::operandSize(uint32_t index) noexcept
+{
+  try
+  {
+    return _model->operands.at(neurun::model::OperandIndex{index}).operandSize();
+  }
+  catch (const std::exception &e)
+  {
+    VERBOSE(EXCEPTION) << e.what() << '\n';
+
+    return 0;
+  }
+}
+
+bool ANeuralNetworksModel::isUsageSet(uint32_t index) noexcept
+{
+  return (_operand_usages[index] != OperandUsage::NOT_DEFINED);
+}
+
+bool ANeuralNetworksModel::isOperationOutput(uint32_t index) noexcept
+{
+  return (_operand_usages[index] == OperandUsage::OPERATION_OUTPUT);
+}
+
+void ANeuralNetworksModel::setOptionalOperand(const neurun::model::OperandIndex idx)
+{
+  _optional_operands.insert(idx);
+}
+
+void ANeuralNetworksModel::fillOptionalOperand(void)
+{
+  _model->operations.iterate(
+      [&](const ::neurun::model::OperationIndex &, ::neurun::model::Operation &node) {
+        for (auto input : node.getInputs())
+        {
+          // TODO fill default value for optional operands
+          if (_optional_operands.find(input) != _optional_operands.end())
+          {
+            throw std::runtime_error{"Optional operand is not supported yet"};
+          }
+        }
+      });
+}
diff --git a/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksModel.h b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksModel.h
new file mode 100644
index 000000000..1cd1e2699
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/wrapper/ANeuralNetworksModel.h
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __MODEL_H__
+#define __MODEL_H__
+
+#include <unordered_set>
+#include <NeuralNetworks.h>
+#include <NeuralNetworksEx.h>
+
+#include "graph/Graph.h"
+
+struct ANeuralNetworksModel
+{
+public:
+  enum class OperandUsage
+  {
+    NOT_DEFINED = 0,
+    MODEL_INPUT,
+    CONSTANT,
+    OPERATION_OUTPUT,
+  };
+
+public:
+  ANeuralNetworksModel() noexcept;
+
+public:
+  bool addOperand(const ANeuralNetworksOperandType *type) noexcept;
+  bool setOperandValue(uint32_t index, const void *buffer, size_t length, bool optional = false,
+                       bool copy = false) noexcept;
+  bool addOperation(ANeuralNetworksOperationType type, uint32_t inputCount, const uint32_t *inputs,
+                    uint32_t outputCount, const uint32_t *outputs) noexcept;
+  bool addOperationEx(ANeuralNetworksOperationTypeEx type, uint32_t inputCount,
+                      const uint32_t *inputs, uint32_t outputCount,
+                      const uint32_t *outputs) noexcept;
+  bool addModelInput(uint32_t index) noexcept;
+  bool addModelOutput(uint32_t index) noexcept;
+  bool finish() noexcept;
+
+  neurun::graph::Graph &deref(void) { return *_graph; }
+  bool isFinished() noexcept;
+  bool isExistOperand(uint32_t index) noexcept;
+  size_t operandSize(uint32_t index) noexcept;
+  bool isUsageSet(uint32_t index) noexcept;
+  bool isOperationOutput(uint32_t index) noexcept;
+  void release(std::shared_ptr<neurun::graph::Graph> &graph) { graph = _graph; }
+
+private:
+  void setOptionalOperand(const neurun::model::OperandIndex idx);
+  void fillOptionalOperand(void);
+
+private:
+  std::unique_ptr<neurun::model::Model> _model;
+  std::shared_ptr<neurun::graph::Graph> _graph;
+  std::unordered_set<neurun::model::OperandIndex> _optional_operands;
+  std::vector<OperandUsage> _operand_usages;
+};
+
+#endif // __MODEL_H__
diff --git a/runtimes/neurun/frontend/nnapi/wrapper/NNAPIConvert.cc b/runtimes/neurun/frontend/nnapi/wrapper/NNAPIConvert.cc
new file mode 100644
index 000000000..a44c279cc
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/wrapper/NNAPIConvert.cc
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "NNAPIConvert.h"
+
+#include <numeric>
+
+using namespace ::neurun::model;
+
+DataType NNAPIConvert::getDataType(OperandCode type)
+{
+  switch (type)
+  {
+    case ANEURALNETWORKS_FLOAT32:
+    case ANEURALNETWORKS_TENSOR_FLOAT32:
+      return DataType::FLOAT32;
+    case ANEURALNETWORKS_INT32:
+    case ANEURALNETWORKS_TENSOR_INT32:
+      return DataType::INT32;
+    case ANEURALNETWORKS_UINT32:
+      return DataType::UINT32;
+    case ANEURALNETWORKS_TENSOR_QUANT8_ASYMM:
+      return DataType::QUANT8_ASYMM;
+    default:
+      throw std::runtime_error("Unsupported type");
+  }
+}
+
+TypeInfo NNAPIConvert::getTypeInfo(const ANeuralNetworksOperandType *type)
+{
+  return TypeInfo(getDataType((OperandCode)(type->type)), type->scale, type->zeroPoint);
+}
+
+Shape NNAPIConvert::getShape(const ANeuralNetworksOperandType *type)
+{
+  Shape shape(type->dimensionCount);
+
+  for (uint32_t axis = 0; axis < type->dimensionCount; ++axis)
+  {
+    shape.dim(axis) = type->dimensions[axis];
+  }
+
+  return shape;
+}
+
+size_t NNAPIConvert::calculateSizeFromType(const ANeuralNetworksOperandType *type)
+{
+  auto shape = getShape(type);
+  auto data_type = getDataType((OperandCode)(type->type));
+
+  return shape.num_elements() * sizeOfDataType(data_type);
+}
+
+Activation NNAPIConvert::getFusedActivation(FuseCode act)
+{
+  switch (act)
+  {
+    case ANEURALNETWORKS_FUSED_NONE:
+      return Activation::NONE;
+    case ANEURALNETWORKS_FUSED_RELU:
+      return Activation::RELU;
+    case ANEURALNETWORKS_FUSED_RELU1:
+      return Activation::RELU1;
+    case ANEURALNETWORKS_FUSED_RELU6:
+      return Activation::RELU6;
+    default:
+      throw std::runtime_error("Unsupported activation type");
+  }
+}
+
+PaddingType NNAPIConvert::getPaddingType(PaddingCode type)
+{
+  switch (type)
+  {
+    case ANEURALNETWORKS_PADDING_SAME:
+      return PaddingType::SAME;
+    case ANEURALNETWORKS_PADDING_VALID:
+      return PaddingType::VALID;
+    default:
+      throw std::runtime_error("Unsupported type");
+  }
+}
diff --git a/runtimes/neurun/frontend/nnapi/wrapper/NNAPIConvert.h b/runtimes/neurun/frontend/nnapi/wrapper/NNAPIConvert.h
new file mode 100644
index 000000000..bd7fc6cdd
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/wrapper/NNAPIConvert.h
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file  NNAPIConvert.h
+ * @brief This file contains convereter(s)\n
+ *        from NNAPI frontend's struct to neurun's internal struct
+ */
+#ifndef __NEURUN_NNAPI_CONVERT_H__
+#define __NEURUN_NNAPI_CONVERT_H__
+
+#include <NeuralNetworks.h>
+
+#include <model/TypeInfo.h>
+#include <model/Shape.h>
+#include <model/InternalType.h>
+
+class NNAPIConvert
+{
+
+public:
+  /**
+   * @brief     Convert data type from NNAPI to internal data type
+   * @param[in] type  NNAPI's data type
+   * @return    neurun's internal data type
+   * @note      Now neurun::model::DataType shares the same enum value\n
+                with OperandCode in NeuralNetworks.h.\n
+                If we don't share same value, we must fix this mapping function.
+   */
+  static ::neurun::model::DataType getDataType(OperandCode type);
+
+  /**
+   * @brief     Convert operand type info from NNAPI to interanl operand type info
+   * @param[in] type  NNAPI's operand type
+   * @return    neurun's internal operand type info
+   */
+  static ::neurun::model::TypeInfo getTypeInfo(const ANeuralNetworksOperandType *type);
+
+  /**
+   * @brief     Convert operand shape info from NNAPI to internal operand shape
+   * @param[in] type  NNAPI's operand type
+   * @return    neurun's internal operand shape
+   */
+  static ::neurun::model::Shape getShape(const ANeuralNetworksOperandType *type);
+
+  /**
+   * @brief     Calcaulate operand size from NNAPI type
+   * @param[in] type  NNAPI's operand type
+   * @return    Operand size
+   */
+  static size_t calculateSizeFromType(const ANeuralNetworksOperandType *type);
+
+  /**
+   * @brief     Convert NNAPI FuseCode to internal activation type
+   * @param[in] act NNAPI's FuseCode type
+   * @return    neurun's internal activation type
+   */
+  static ::neurun::model::Activation getFusedActivation(FuseCode act);
+
+  /**
+   * @brief     Convert NNAPI PaddingCode to internal padding type
+   * @param[in] act NNAPI's PaddingCode type
+   * @return    neurun's internal padding type
+   */
+  static ::neurun::model::PaddingType getPaddingType(PaddingCode type);
+};
+
+#endif // __NEURUN_NNAPI_CONVERT_H__
diff --git a/runtimes/neurun/frontend/nnapi/wrapper/OperationFactory.cc b/runtimes/neurun/frontend/nnapi/wrapper/OperationFactory.cc
new file mode 100644
index 000000000..cd9d869a0
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/wrapper/OperationFactory.cc
@@ -0,0 +1,1524 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "OperationFactory.h"
+#include "NNAPIConvert.h"
+
+#include <model/Operations.Include.h>
+
+namespace
+{
+using namespace neurun::model;
+
+void replaceDataType(Operands &operands, const OperandIndex &index, const DataType &type)
+{
+  assert(operands.exist(index));
+  operands.at(index).type(type);
+}
+
+ExplicitPadding makeExplicitPadding(Operands &operands, const OperandIndex &left_index,
+                                    const OperandIndex &right_index, const OperandIndex &top_index,
+                                    const OperandIndex &bottom_index)
+{
+  auto left = operands.at(left_index).asScalar<int32_t>();
+  auto right = operands.at(right_index).asScalar<int32_t>();
+  auto top = operands.at(top_index).asScalar<int32_t>();
+  auto bottom = operands.at(bottom_index).asScalar<int32_t>();
+
+  if (left < 0 || right < 0 || top < 0 || bottom < 0)
+  {
+    throw std::runtime_error{"Cannot handle negative explicit padding value"};
+  }
+
+  ExplicitPadding param;
+  param.left = static_cast<uint32_t>(left);
+  param.right = static_cast<uint32_t>(right);
+  param.top = static_cast<uint32_t>(top);
+  param.bottom = static_cast<uint32_t>(bottom);
+
+  return param;
+}
+
+Stride makeStride(Operands &operands, const OperandIndex &horizontal_index,
+                  const OperandIndex &vertical_index)
+{
+  auto horizontal = operands.at(horizontal_index).asScalar<int32_t>();
+  auto vertical = operands.at(vertical_index).asScalar<int32_t>();
+
+  if (vertical < 0 || horizontal < 0)
+  {
+    throw std::runtime_error{"Cannot handle negative stride value"};
+  }
+
+  Stride stride;
+  stride.horizontal = static_cast<uint32_t>(horizontal);
+  stride.vertical = static_cast<uint32_t>(vertical);
+
+  return stride;
+}
+
+uint32_t getUint32Scalar(Operands &operands, const OperandIndex index)
+{
+  auto int32_value = operands.at(index).asScalar<int32_t>();
+  if (int32_value < 0)
+  {
+    throw std::runtime_error{"Cannot handle negative value"};
+  }
+
+  return static_cast<uint32_t>(int32_value);
+}
+
+} // namespace
+
+OperationFactory &OperationFactory::instance()
+{
+  static OperationFactory factory;
+  return factory;
+}
+
+OperationFactory::OperationFactory()
+{
+  using namespace neurun::model;
+
+  _map[ANEURALNETWORKS_DEPTHWISE_CONV_2D] = [](const OperationFactory::Param &init_param,
+                                               Operands &operands) {
+    assert((init_param.input_count == 8 || init_param.input_count == 11) &&
+           init_param.output_count == 1);
+
+    // In common
+    // 0 -> IFM Tensor Index
+    // 1 -> Kernel Tensor Index
+    // 2 -> Bias Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1], init_param.inputs[2]};
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    operation::DepthwiseConv2DNode::Param param;
+    if (init_param.input_count == 8)
+    {
+      // Imlicit Padding case
+      // Each input should be interpreted as follows:
+      //
+      // 3 -> Padding Code (ANEURALNETWORKS_PADDING_SAME or ANEURALNETWORKS_PADDING_VALID) Index
+      // 4 -> Stride (width) Index
+      // 5 -> Stride (height) INdex
+      // 6 -> Depthwise multiplier
+      // 7 -> Activation Index
+
+      const auto padding_index = OperandIndex{init_param.inputs[3]};
+      const auto hstride_index = OperandIndex{init_param.inputs[4]};
+      const auto vstride_index = OperandIndex{init_param.inputs[5]};
+      const auto multiplier_index = OperandIndex{init_param.inputs[6]};
+      const auto activation_index = OperandIndex{init_param.inputs[7]};
+
+      param.padding.type =
+          NNAPIConvert::getPaddingType(operands.at(padding_index).asScalar<PaddingCode>());
+      param.stride = makeStride(operands, hstride_index, vstride_index);
+      param.multiplier = getUint32Scalar(operands, multiplier_index);
+      param.activation =
+          NNAPIConvert::getFusedActivation(operands.at(activation_index).asScalar<FuseCode>());
+    }
+    else
+    {
+      // Explicit Padding case
+      // Each input should be interpreted as follows:
+      //
+      // 3 -> Padding On the Left
+      // 4 -> Padding On the Right
+      // 5 -> Padding On the Top
+      // 6 -> Padding On the Bottom
+      // 7 -> Stride (width) Index
+      // 8 -> Stride (height) Index
+      // 9 -> Depthwise multiplier
+      // 10-> Activation Index
+
+      const auto padding_left_index = OperandIndex{init_param.inputs[3]};
+      const auto padding_right_index = OperandIndex{init_param.inputs[4]};
+      const auto padding_top_index = OperandIndex{init_param.inputs[5]};
+      const auto padding_bottom_index = OperandIndex{init_param.inputs[6]};
+      const auto hstride_index = OperandIndex{init_param.inputs[7]};
+      const auto vstride_index = OperandIndex{init_param.inputs[8]};
+      const auto multiplier_index = OperandIndex{init_param.inputs[9]};
+      const auto activation_index = OperandIndex{init_param.inputs[10]};
+
+      param.padding.type = PaddingType::EXPLICIT;
+      param.padding.param = makeExplicitPadding(operands, padding_left_index, padding_right_index,
+                                                padding_top_index, padding_bottom_index);
+      param.stride = makeStride(operands, hstride_index, vstride_index);
+      param.multiplier = getUint32Scalar(operands, multiplier_index);
+      param.activation =
+          NNAPIConvert::getFusedActivation(operands.at(activation_index).asScalar<FuseCode>());
+    }
+
+    return new operation::DepthwiseConv2DNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_MAX_POOL_2D] = [](const OperationFactory::Param &init_param,
+                                         Operands &operands) {
+    assert(init_param.input_count == 7 || init_param.input_count == 10);
+    assert(init_param.output_count == 1);
+
+    // In common
+    //  0 -> IFM Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    operation::MaxPool2DNode::Param param;
+    if (init_param.input_count == 7) // support implicit padding
+    {
+      // Each input should be interpreted as follows:
+      //
+      //  1 -> Padding Code (ANEURALNETWORKS_PADDING_SAME or ANEURALNETWORKS_PADDING_VALID) Index
+      //  2 -> Horizontal (over width) Stride Index
+      //  3 -> Vertial (over height) Stride Index
+      //  4 -> Filter Width Index
+      //  5 -> Filter Height Index
+      //  6 -> FuseCode (activation) Index
+
+      const auto padding_index = OperandIndex{init_param.inputs[1]};
+      const auto hstride_index = OperandIndex{init_param.inputs[2]};
+      const auto vstride_index = OperandIndex{init_param.inputs[3]};
+      const auto kw_index = OperandIndex{init_param.inputs[4]};
+      const auto kh_index = OperandIndex{init_param.inputs[5]};
+      const auto activation_index = OperandIndex{init_param.inputs[6]};
+
+      param.padding.type =
+          NNAPIConvert::getPaddingType(operands.at(padding_index).asScalar<PaddingCode>());
+      param.stride = makeStride(operands, hstride_index, vstride_index);
+      param.kw = getUint32Scalar(operands, kw_index);
+      param.kh = operands.at(kh_index).asScalar<uint32_t>();
+      param.activation =
+          NNAPIConvert::getFusedActivation(operands.at(activation_index).asScalar<FuseCode>());
+    }
+    else if (init_param.input_count == 10) // support explicit padding
+    {
+      // Each input should be interpreted as follows:
+      //
+      //  1 -> Padding_left index
+      //  2 -> Padding_right index
+      //  3 -> Padding_top index
+      //  4 -> Padding_bottom index
+      //  5 -> Horizontal (over width) Stride Index
+      //  6 -> Vertial (over height) Stride Index
+      //  7 -> Filter Width Index
+      //  8 -> Filter Height Index
+      //  9 -> FuseCode (activation) Index
+
+      const auto padding_left_index = OperandIndex{init_param.inputs[1]};
+      const auto padding_right_index = OperandIndex{init_param.inputs[2]};
+      const auto padding_top_index = OperandIndex{init_param.inputs[3]};
+      const auto padding_bottom_index = OperandIndex{init_param.inputs[4]};
+      const auto hstride_index = OperandIndex{init_param.inputs[5]};
+      const auto vstride_index = OperandIndex{init_param.inputs[6]};
+      const auto kw_index = OperandIndex{init_param.inputs[7]};
+      const auto kh_index = OperandIndex{init_param.inputs[8]};
+      const auto activation_index = OperandIndex{init_param.inputs[9]};
+
+      param.padding.type = PaddingType::EXPLICIT;
+      param.padding.param = makeExplicitPadding(operands, padding_left_index, padding_right_index,
+                                                padding_top_index, padding_bottom_index);
+      param.stride = makeStride(operands, hstride_index, vstride_index);
+      param.kw = getUint32Scalar(operands, kw_index);
+      param.kh = getUint32Scalar(operands, kh_index);
+      param.activation =
+          NNAPIConvert::getFusedActivation(operands.at(activation_index).asScalar<FuseCode>());
+    }
+    return new operation::MaxPool2DNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_AVERAGE_POOL_2D] = [](const OperationFactory::Param &init_param,
+                                             Operands &operands) {
+    // TODO We may reuse code here for MAX_POOL_2D. Seems like these two are identical
+    assert(init_param.input_count == 7 || init_param.input_count == 10);
+    assert(init_param.output_count == 1);
+
+    // In common
+    //  0 -> IFM Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    operation::AvgPool2DNode::Param param;
+    if (init_param.input_count == 7) // support implicit padding
+    {
+      // Each input should be interpreted as follows:
+      //
+      //  1 -> Padding Code (ANEURALNETWORKS_PADDING_SAME or ANEURALNETWORKS_PADDING_VALID) Index
+      //  2 -> Horizontal (over width) Stride Index
+      //  3 -> Vertial (over height) Stride Index
+      //  4 -> Filter Width Index
+      //  5 -> Filter Height Index
+      //  6 -> FuseCode (activation) Index
+
+      const auto padding_index = OperandIndex{init_param.inputs[1]};
+      const auto hstride_index = OperandIndex{init_param.inputs[2]};
+      const auto vstride_index = OperandIndex{init_param.inputs[3]};
+      const auto kw_index = OperandIndex{init_param.inputs[4]};
+      const auto kh_index = OperandIndex{init_param.inputs[5]};
+      const auto activation_index = OperandIndex{init_param.inputs[6]};
+
+      param.padding.type =
+          NNAPIConvert::getPaddingType(operands.at(padding_index).asScalar<PaddingCode>());
+      param.stride = makeStride(operands, hstride_index, vstride_index);
+      param.kw = getUint32Scalar(operands, kw_index);
+      param.kh = getUint32Scalar(operands, kh_index);
+      param.activation =
+          NNAPIConvert::getFusedActivation(operands.at(activation_index).asScalar<FuseCode>());
+    }
+    else if (init_param.input_count == 10) // support explicit padding
+    {
+      // Each input should be interpreted as follows:
+      //
+      //  1 -> Padding_left index
+      //  2 -> Padding_right index
+      //  3 -> Padding_top index
+      //  4 -> Padding_bottom index
+      //  5 -> Horizontal (over width) Stride Index
+      //  6 -> Vertial (over height) Stride Index
+      //  7 -> Filter Width Index
+      //  8 -> Filter Height Index
+      //  9 -> FuseCode (activation) Index
+
+      const auto padding_left_index = OperandIndex{init_param.inputs[1]};
+      const auto padding_right_index = OperandIndex{init_param.inputs[2]};
+      const auto padding_top_index = OperandIndex{init_param.inputs[3]};
+      const auto padding_bottom_index = OperandIndex{init_param.inputs[4]};
+      const auto hstride_index = OperandIndex{init_param.inputs[5]};
+      const auto vstride_index = OperandIndex{init_param.inputs[6]};
+      const auto kw_index = OperandIndex{init_param.inputs[7]};
+      const auto kh_index = OperandIndex{init_param.inputs[8]};
+      const auto activation_index = OperandIndex{init_param.inputs[9]};
+
+      param.padding.type = PaddingType::EXPLICIT;
+      param.padding.param = makeExplicitPadding(operands, padding_left_index, padding_right_index,
+                                                padding_top_index, padding_bottom_index);
+      param.stride = makeStride(operands, hstride_index, vstride_index);
+      param.kw = getUint32Scalar(operands, kw_index);
+      param.kh = getUint32Scalar(operands, kh_index);
+      param.activation =
+          NNAPIConvert::getFusedActivation(operands.at(activation_index).asScalar<FuseCode>());
+    }
+
+    return new operation::AvgPool2DNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_CONCATENATION] = [](const OperationFactory::Param &init_param,
+                                           neurun::model::Operands &operands) {
+    assert(init_param.input_count >= 2); // At least one one input tensor and axis
+    assert(init_param.output_count == 1);
+
+    // When there are N + 1 inputs, each input should be interpreted as follows:
+    //
+    //  [0, N) -> Input tensors
+    //  N -> Axis
+    //
+
+    OperandIndexSequence inputs;
+    for (uint32_t n = 0; n < init_param.input_count - 1; ++n)
+    {
+      inputs.append(OperandIndex{init_param.inputs[n]});
+    }
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    operation::ConcatNode::Param param;
+    const OperandIndex axis_index{init_param.inputs[init_param.input_count - 1]};
+    param.axis = operands.at(axis_index).asScalar<int32_t>();
+
+    return new operation::ConcatNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_RESHAPE] = [](const OperationFactory::Param &init_param,
+                                     neurun::model::Operands &) {
+    assert(init_param.input_count == 2 && init_param.output_count == 1);
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> A tensor, specifying the tensor to be reshaped.
+    //  1 -> A 1-D tensor of type ANEURALNETWORKS_TENSOR_INT32, defining the shape of the output
+    //  tensor
+
+    // TODO Second input should be shape tensor (init_param.inputs[1])
+    //      Currently unused since assume that it is same with output tensor size
+    OperandIndexSequence inputs{init_param.inputs[0] /* , init_param.inputs[1] */};
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    return new operation::ReshapeNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_FULLY_CONNECTED] = [](const OperationFactory::Param &init_param,
+                                             Operands &operands) {
+    assert(init_param.input_count == 4 && init_param.output_count == 1);
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> A tensor, specifying the input.
+    //  1 -> A 2-D tensor, specifying the weights
+    //  2 -> A 1-D tensor, specifying the bias
+    //  3 -> An INT32 value, and has to be one of the FuseCode values
+
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1], init_param.inputs[2]};
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    operation::FullyConnectedNode::Param param;
+    const auto activation_index = OperandIndex{init_param.inputs[3]};
+    param.activation =
+        NNAPIConvert::getFusedActivation(operands.at(activation_index).asScalar<FuseCode>());
+
+    return new operation::FullyConnectedNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_SOFTMAX] = [](const OperationFactory::Param &init_param,
+                                     Operands &operands) {
+    assert(init_param.input_count == 2 && init_param.output_count == 1);
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> A 2-D or 4-D tensor, specifying the tensor to be reshaped.
+    //  1 ->  FLOAT32 value, specifying the positive scaling factor for the exponent, beta.
+
+    OperandIndexSequence inputs{init_param.inputs[0]};
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    const auto beta_index = OperandIndex{init_param.inputs[1]};
+
+    operation::SoftmaxNode::Param param;
+    param.beta = operands.at(beta_index).asScalar<float>();
+
+    return new operation::SoftmaxNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_CAST_EX] = [](const OperationFactory::Param &init_param,
+                                     neurun::model::Operands &) {
+    assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //  0 -> input Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    return new operation::CastNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_CONV_2D] = [](const OperationFactory::Param &init_param,
+                                     Operands &operands) {
+    using neurun::model::operation::Conv2DNode;
+
+    // inputCount is either 7 or 10 acccording to NN API specification.
+    //  - Padding is implicit when inputCount is 7
+    //  - Padding is explicit when inputCount is 10
+    assert(init_param.input_count == 7 || init_param.input_count == 10);
+    assert(init_param.output_count == 1);
+
+    //  0 -> IFM Tensor Index
+    //  1 -> Kernel Tensor Index
+    //  2 -> Bias Tensor Index
+
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1], init_param.inputs[2]};
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    Conv2DNode::Param param;
+
+    if (init_param.input_count == 7) // support implicit padding
+    {
+      // Each input should be interpreted as follows:
+      //
+      //  3 -> Padding Code (ANEURALNETWORKS_PADDING_SAME or ANEURALNETWORKS_PADDING_VALID) Index
+      //  4 -> Stride (width) Index
+      //  5 -> Stride (height) INdex
+      //  6 -> Activation Index
+
+      const auto padding_index = OperandIndex{init_param.inputs[3]};
+      const auto hstride_index = OperandIndex{init_param.inputs[4]};
+      const auto vstride_index = OperandIndex{init_param.inputs[5]};
+      const auto activation_index = OperandIndex{init_param.inputs[6]};
+
+      param.padding.type =
+          NNAPIConvert::getPaddingType(operands.at(padding_index).asScalar<PaddingCode>());
+      param.stride = makeStride(operands, hstride_index, vstride_index);
+      param.activation =
+          NNAPIConvert::getFusedActivation(operands.at(activation_index).asScalar<FuseCode>());
+    }
+    else if (init_param.input_count == 10) // support explicit padding
+    {
+      // Each input should be interpreted as follows:
+      //
+      //  3 -> Padding_left index
+      //  4 -> Padding_right index
+      //  5 -> Padding_top index
+      //  6 -> Padding_bottom index
+      //  7 -> Stride (width) Index
+      //  8 -> Stride (height) INdex
+      //  9 -> Activation Index
+
+      const auto padding_left_index = OperandIndex{init_param.inputs[3]};
+      const auto padding_right_index = OperandIndex{init_param.inputs[4]};
+      const auto padding_top_index = OperandIndex{init_param.inputs[5]};
+      const auto padding_bottom_index = OperandIndex{init_param.inputs[6]};
+      const auto hstride_index = OperandIndex{init_param.inputs[7]};
+      const auto vstride_index = OperandIndex{init_param.inputs[8]};
+      const auto activation_index = OperandIndex{init_param.inputs[9]};
+
+      param.padding.type = PaddingType::EXPLICIT;
+      param.padding.param = makeExplicitPadding(operands, padding_left_index, padding_right_index,
+                                                padding_top_index, padding_bottom_index);
+      param.stride = makeStride(operands, hstride_index, vstride_index);
+      param.activation =
+          NNAPIConvert::getFusedActivation(operands.at(activation_index).asScalar<FuseCode>());
+    }
+
+    return new Conv2DNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_ADD] = [](const OperationFactory::Param &init_param, Operands &operands) {
+    assert(init_param.input_count == 3);
+    assert(init_param.output_count == 1);
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Lefthand side operand
+    //  1 -> Righthand side operand
+
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1]};
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    operation::AddNode::Param param;
+
+    const auto activation_index = OperandIndex{init_param.inputs[2]};
+    param.activation =
+        NNAPIConvert::getFusedActivation(operands.at(activation_index).asScalar<FuseCode>());
+
+    return new operation::AddNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_REDUCE_SUM_EX] = [](const OperationFactory::Param &init_param,
+                                           neurun::model::Operands &) {
+    assert(init_param.input_count == 2);
+    assert(init_param.output_count == 1);
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Input Tensor Index
+    //  1 -> Reduced Axes Tensor Index
+
+    OperandIndexSequence inputs{init_param.inputs[0]};
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    operation::ReduceSumNode::Param param;
+
+    param.axis_index = OperandIndex{init_param.inputs[1]};
+
+    return new operation::ReduceSumNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_SUB] = [](const OperationFactory::Param &init_param, Operands &operands) {
+    assert(init_param.input_count == 3);
+    assert(init_param.output_count == 1);
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Lefthand side operand
+    //  1 -> Righthand side operand
+
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1]};
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    operation::SubNode::Param param;
+
+    const auto activation_index = OperandIndex{init_param.inputs[2]};
+    param.activation =
+        NNAPIConvert::getFusedActivation(operands.at(activation_index).asScalar<FuseCode>());
+
+    return new operation::SubNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_STRIDED_SLICE] = [](const OperationFactory::Param &init_param,
+                                           neurun::model::Operands &) {
+    assert(init_param.input_count == 7 && init_param.output_count == 1);
+
+    OperandIndexSequence inputs{init_param.inputs[0]};
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  1 -> A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the starts of
+    //       the dimensions of the input tensor to be sliced. The length must be
+    //       of rank(input0).
+    //  2 -> A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the ends of
+    //       the dimensions of the input tensor to be sliced. The length must be
+    //       of rank(input0).
+    //  3 -> A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the strides of
+    //       the dimensions of the input tensor to be sliced. The length must be
+    //       of rank(input0).
+    //  4 -> An {@link ANEURALNETWORKS_INT32} scalar, begin_mask. If the ith bit
+    //       of begin_mask is set, begin[i] is ignored and the fullest possible
+    //       range in that dimension is used instead.
+    //  5 -> An {@link ANEURALNETWORKS_INT32} scalar, end_mask. If the ith bit of
+    //       end_mask is set, end[i] is ignored and the fullest possible range in
+    //       that dimension is used instead.
+    //  6 -> An {@link ANEURALNETWORKS_INT32} scalar, shrink_axis_mask. An int32
+    //       mask. If the ith bit of shrink_axis_mask is set, it implies that the
+    //       ith specification shrinks the dimensionality by 1. A slice of size 1
+    //       starting from begin[i] in the dimension must be preserved.
+
+    operation::StridedSliceNode::Param param;
+
+    param.startData_index = OperandIndex{init_param.inputs[1]};
+    param.endData_index = OperandIndex{init_param.inputs[2]};
+    param.stridesData_index = OperandIndex{init_param.inputs[3]};
+    param.beginMask_index = OperandIndex{init_param.inputs[4]};
+    param.endMask_index = OperandIndex{init_param.inputs[5]};
+    param.shrinkAxisMask_index = OperandIndex{init_param.inputs[6]};
+
+    return new operation::StridedSliceNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_TRANSPOSE] = [](const OperationFactory::Param &init_param,
+                                       neurun::model::Operands &) {
+    // TODO make this work with init_param.input_count == 1 (when permutation vector is optional)
+
+    // Inputs
+    // 0: An n-D tensor, specifying the tensor to be transposed.
+    // 1: An optional 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32},
+    //    the permutation of the dimensions of the input tensor.
+    //    The returned tensor's dimension i corresponds to the input dimension
+    //    perm[i]. If perm is not given, it is set to (n-1...0), where n is the
+    //    rank of the input tensor. Hence by default, this operation performs a
+    //    regular matrix transpose on 2-D input Tensors.
+    assert(init_param.input_count == 2);
+    assert(init_param.output_count == 1);
+
+    OperandIndexSequence inputs{init_param.inputs[0]};
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    operation::TransposeNode::Param param;
+    param.perm = OperandIndex{init_param.inputs[1]};
+
+    return new operation::TransposeNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_MUL] = [](const OperationFactory::Param &init_param, Operands &operands) {
+    assert(init_param.input_count == 3 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> LHS Tensor Index
+    //  1 -> RHS Tensor Index
+    //  2 -> Activation Index
+
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1]};
+
+    operation::MulNode::Param param;
+
+    const auto activation_index = OperandIndex{init_param.inputs[2]};
+    param.activation =
+        NNAPIConvert::getFusedActivation(operands.at(activation_index).asScalar<FuseCode>());
+
+    return new operation::MulNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_SQUEEZE] = [](const OperationFactory::Param &init_param,
+                                     neurun::model::Operands &) {
+    assert(init_param.input_count == 1 || init_param.input_count == 2);
+    assert(init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    // 0 -> An n-D tensor, the tensor to be squeezed.
+    // 1 -> An optional 1-D tensor of ANEURALNETWORKS_TENSOR_INT32. The dimensions to squeeze.
+    //      If specified only squeezes the dimensions listed. Otherwise, squeezes all dimensions.
+    //      The dimension index starts at 0. An error must be reported if squeezing a dimension that
+    //      is not 1.
+
+    // Add mandatory input index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    // Add dims index if specified
+    operation::SqueezeNode::Param param;
+    if (init_param.input_count == 2)
+    {
+      param.dims = OperandIndex{init_param.inputs[1]};
+    }
+
+    return new operation::SqueezeNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_TANH] = [](const OperationFactory::Param &init_param,
+                                  neurun::model::Operands &) {
+    assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Input Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    return new operation::TanhNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_LOGISTIC] = [](const OperationFactory::Param &init_param,
+                                      neurun::model::Operands &) {
+    assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Input Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    return new operation::LogisticNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_DIV] = [](const OperationFactory::Param &init_param, Operands &operands) {
+    assert(init_param.input_count == 3 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> LHS Tensor Index
+    //  1 -> RHS Tensor Index
+    //  2 -> Activation Index
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1]};
+
+    operation::DivNode::Param param;
+
+    const auto activation_index = OperandIndex{init_param.inputs[2]};
+    param.activation =
+        NNAPIConvert::getFusedActivation(operands.at(activation_index).asScalar<FuseCode>());
+
+    return new operation::DivNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_EXP_EX] = [](const OperationFactory::Param &init_param,
+                                    neurun::model::Operands &) {
+    assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Input Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    return new operation::ExpNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_GREATER_EQUAL_EX] = [](const OperationFactory::Param &init_param,
+                                              neurun::model::Operands &operands) {
+    assert(init_param.input_count == 2 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> input0 Tensor Index
+    //  1 -> input1 Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1]};
+
+    operation::ComparisonNode::Param param;
+    param.comparison_type = operation::ComparisonNode::ComparisonType::GreaterEqual;
+
+    // Output operand type must be boolean
+    replaceDataType(operands, outputs.at(0), DataType::BOOL8);
+
+    return new operation::ComparisonNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_LESS_EX] = [](const OperationFactory::Param &init_param,
+                                     neurun::model::Operands &operands) {
+    assert(init_param.input_count == 2 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> input0 Tensor Index
+    //  1 -> input1 Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1]};
+
+    operation::ComparisonNode::Param param;
+    param.comparison_type = operation::ComparisonNode::ComparisonType::Less;
+
+    // Output operand type must be boolean
+    replaceDataType(operands, outputs.at(0), DataType::BOOL8);
+
+    return new operation::ComparisonNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_REDUCE_MAX_EX] = [](const OperationFactory::Param &init_param,
+                                           neurun::model::Operands &) {
+    assert(init_param.input_count == 2 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Input Tensor Index
+    //  1 -> Axis Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    operation::ReduceMaxNode::Param param;
+    param.axis_index = OperandIndex{init_param.inputs[1]};
+
+    return new operation::ReduceMaxNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_NOT_EQUAL_EX] = [](const OperationFactory::Param &init_param,
+                                          neurun::model::Operands &operands) {
+    assert(init_param.input_count == 2 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> input1 Tensor Index
+    //  1 -> input2 Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1]};
+
+    operation::ComparisonNode::Param param;
+    param.comparison_type = operation::ComparisonNode::ComparisonType::NotEqual;
+
+    // Output operand type must be boolean
+    replaceDataType(operands, outputs.at(0), DataType::BOOL8);
+
+    return new operation::ComparisonNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_LOGICAL_AND_EX] = [](const OperationFactory::Param &init_param,
+                                            neurun::model::Operands &operands) {
+    assert(init_param.input_count == 2 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> input0 Tensor Index
+    //  1 -> input1 Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1]};
+
+    // This operation's operands must be boolean type.
+    replaceDataType(operands, inputs.at(0), DataType::BOOL8);
+    replaceDataType(operands, inputs.at(1), DataType::BOOL8);
+    replaceDataType(operands, outputs.at(0), DataType::BOOL8);
+
+    return new operation::LogicalAndNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_RSQRT_EX] = [](const OperationFactory::Param &init_param,
+                                      neurun::model::Operands &) {
+    assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Input Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    return new operation::RSQRTNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_RELU] = [](const OperationFactory::Param &init_param,
+                                  neurun::model::Operands &) {
+    assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Input Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    return new operation::ReLUNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_RESIZE_BILINEAR] = [](const OperationFactory::Param &init_param,
+                                             neurun::model::Operands &) {
+    assert(init_param.input_count == 3 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> IFM Index
+    //  1 -> Height Index
+    //  2 -> Width Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    operation::ResizeBilinearNode::Param param;
+    param.height_index = OperandIndex{init_param.inputs[1]};
+    param.width_index = OperandIndex{init_param.inputs[2]};
+
+    return new operation::ResizeBilinearNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_RELU1] = [](const OperationFactory::Param &init_param,
+                                   neurun::model::Operands &) {
+    assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> input Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    return new operation::ReLU1Node{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_RELU6] = [](const OperationFactory::Param &init_param,
+                                   neurun::model::Operands &) {
+    assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> input Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    return new operation::ReLU6Node{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_RNN] = [](const OperationFactory::Param &init_param,
+                                 neurun::model::Operands &operands) {
+    assert(init_param.input_count == 6 && init_param.output_count == 2);
+
+    // Each input should be interpreted as follows:
+    //
+    // 0 -> Input Tensor Index
+    // 1 -> Weights Tensor Index
+    // 2 -> Recurrent Weights Tensor Index
+    // 3 -> Bias Tensor Index
+    // 4 -> Hidden state (in) Index
+    // 5 -> Activation Index
+
+    OperandIndexSequence inputs;
+    for (uint32_t n = 0; n < init_param.input_count - 1; ++n)
+    {
+      inputs.append(OperandIndex{init_param.inputs[n]});
+    }
+    OperandIndexSequence outputs;
+    for (uint32_t n = 0; n < init_param.output_count; ++n)
+    {
+      outputs.append(OperandIndex{init_param.outputs[n]});
+    }
+
+    operation::RNNNode::Param param;
+    const auto activation_index = OperandIndex{init_param.inputs[5]};
+    param.activation =
+        NNAPIConvert::getFusedActivation(operands.at(activation_index).asScalar<FuseCode>());
+
+    return new operation::RNNNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_FLOOR] = [](const OperationFactory::Param &init_param,
+                                   neurun::model::Operands &) {
+    assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //  0 -> input Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    return new operation::FloorNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_SPACE_TO_DEPTH] = [](const OperationFactory::Param &init_param,
+                                            neurun::model::Operands &) {
+    assert(init_param.input_count == 2 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Input Tensor Index
+    //  1 -> Block size Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    operation::SpaceToDepthNode::Param param;
+    param.block_size_index = OperandIndex{init_param.inputs[1]};
+
+    return new operation::SpaceToDepthNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_L2_POOL_2D] = [](const OperationFactory::Param &init_param,
+                                        Operands &operands) {
+    assert(init_param.input_count == 10 || init_param.input_count == 7);
+    assert(init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> IFM Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    operation::L2Pool2DNode::Param param;
+
+    if (init_param.input_count == 7) // Imlicit Padding case
+    {
+      //  1 -> Padding Code (ANEURALNETWORKS_PADDING_SAME or ANEURALNETWORKS_PADDING_VALID) Index
+      //  2 -> Horizontal (over width) Stride Index
+      //  3 -> Vertial (over height) Stride Index
+      //  4 -> Filter Width Index
+      //  5 -> Filter Height Index
+      //  6 -> FuseCode (activation) Index
+      const auto padding_index = OperandIndex{init_param.inputs[1]};
+      const auto hstride_index = OperandIndex{init_param.inputs[2]};
+      const auto vstride_index = OperandIndex{init_param.inputs[3]};
+      const auto kw_index = OperandIndex{init_param.inputs[4]};
+      const auto kh_index = OperandIndex{init_param.inputs[5]};
+      const auto activation_index = OperandIndex{init_param.inputs[6]};
+
+      param.padding.type =
+          NNAPIConvert::getPaddingType(operands.at(padding_index).asScalar<PaddingCode>());
+      param.stride = makeStride(operands, hstride_index, vstride_index);
+      param.kw = getUint32Scalar(operands, kw_index);
+      param.kh = getUint32Scalar(operands, kh_index);
+      param.activation =
+          NNAPIConvert::getFusedActivation(operands.at(activation_index).asScalar<FuseCode>());
+    }
+    else // Explicit Padding case
+    {
+      //  1 -> Padding_left index
+      //  2 -> Padding_right index
+      //  3 -> Padding_top index
+      //  4 -> Padding_bottom index
+      //  5 -> Horizontal (over width) Stride Index
+      //  6 -> Vertial (over height) Stride Index
+      //  7 -> Filter Width Index
+      //  8 -> Filter Height Index
+      //  9 -> FuseCode (activation) Index
+      const auto padding_left_index = OperandIndex{init_param.inputs[1]};
+      const auto padding_right_index = OperandIndex{init_param.inputs[2]};
+      const auto padding_top_index = OperandIndex{init_param.inputs[3]};
+      const auto padding_bottom_index = OperandIndex{init_param.inputs[4]};
+      const auto hstride_index = OperandIndex{init_param.inputs[5]};
+      const auto vstride_index = OperandIndex{init_param.inputs[6]};
+      const auto kw_index = OperandIndex{init_param.inputs[7]};
+      const auto kh_index = OperandIndex{init_param.inputs[8]};
+      const auto activation_index = OperandIndex{init_param.inputs[9]};
+
+      param.padding.type = PaddingType::EXPLICIT;
+      param.padding.param = makeExplicitPadding(operands, padding_left_index, padding_right_index,
+                                                padding_top_index, padding_bottom_index);
+      param.stride = makeStride(operands, hstride_index, vstride_index);
+      param.kw = getUint32Scalar(operands, kw_index);
+      param.kh = getUint32Scalar(operands, kh_index);
+      param.activation =
+          NNAPIConvert::getFusedActivation(operands.at(activation_index).asScalar<FuseCode>());
+    }
+
+    return new operation::L2Pool2DNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_EMBEDDING_LOOKUP] = [](const OperationFactory::Param &init_param,
+                                              neurun::model::Operands &) {
+    assert(init_param.input_count == 2 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Lookups Index
+    //  1 -> Values Index
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1]};
+
+    return new operation::EmbeddingLookupNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_L2_NORMALIZATION] = [](const OperationFactory::Param &init_param,
+                                              neurun::model::Operands &) {
+    assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //  0 -> input Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    return new operation::L2NormalizationNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_HASHTABLE_LOOKUP] = [](const OperationFactory::Param &init_param,
+                                              neurun::model::Operands &) {
+    assert(init_param.input_count == 3 && init_param.output_count == 2);
+
+    // Each output should be interpreted as follows:
+    //
+    //  0 -> Output Index
+    //  1 -> Hits Index
+    OperandIndexSequence outputs{init_param.outputs[0], init_param.outputs[1]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Lookups Index
+    //  1 -> Keys Index
+    //  2 -> Values Index
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1], init_param.inputs[2]};
+
+    return new operation::HashtableLookupNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_PRELU_EX] = [](const OperationFactory::Param &init_param,
+                                      neurun::model::Operands &) {
+    assert(init_param.input_count == 2 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> input Tensor Index
+    //  1 -> alpha Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1]};
+
+    return new operation::PReLUNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_TRANSPOSE_CONV_EX] = [](const OperationFactory::Param &init_param,
+                                               Operands &operands) {
+    assert(init_param.input_count == 6 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Output Shape Index
+    //  1 -> Weights Index
+    //  2 -> Input Tensor Index
+    //  3 -> Padding Type
+    //  4 -> Stride width
+    //  5 -> Stride height
+
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1], init_param.inputs[2]};
+
+    operation::TransposeConvNode::Param param;
+
+    const auto padding_index = OperandIndex{init_param.inputs[3]};
+    const auto hstride_index = OperandIndex{init_param.inputs[4]};
+    const auto vstride_index = OperandIndex{init_param.inputs[5]};
+
+    param.padding.type =
+        NNAPIConvert::getPaddingType(operands.at(padding_index).asScalar<PaddingCode>());
+    param.stride = makeStride(operands, hstride_index, vstride_index);
+
+    return new operation::TransposeConvNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_SQRT_EX] = [](const OperationFactory::Param &init_param,
+                                     neurun::model::Operands &) {
+    assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //  0 -> input Tensor Index
+
+    OperandIndexSequence inputs{init_param.inputs[0]};
+    return new operation::SQRTNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_LOGICAL_OR_EX] = [](const OperationFactory::Param &init_param,
+                                           neurun::model::Operands &operands) {
+    assert(init_param.input_count == 2 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> input0 Tensor Index
+    //  1 -> input1 Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1]};
+
+    // This operation's operands must be boolean type.
+    replaceDataType(operands, inputs.at(0), DataType::BOOL8);
+    replaceDataType(operands, inputs.at(1), DataType::BOOL8);
+    replaceDataType(operands, outputs.at(0), DataType::BOOL8);
+
+    return new operation::LogicalOrNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_LOGICAL_NOT_EX] = [](const OperationFactory::Param &init_param,
+                                            neurun::model::Operands &operands) {
+    assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> input Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    // This operation's operands must be boolean type.
+    replaceDataType(operands, inputs.at(0), DataType::BOOL8);
+    replaceDataType(operands, outputs.at(0), DataType::BOOL8);
+
+    return new operation::LogicalNotNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_LSTM] = [](const OperationFactory::Param &init_param,
+                                  neurun::model::Operands &operands) {
+    assert(init_param.input_count == 23 && init_param.output_count == 4);
+
+    // Each input should be interpreted as follows:
+    //
+    // 0 -> Input Tensor Index
+    // 1 -> Input to Input Tensor Index
+    // 2 -> Input to Forget Tensor Index
+    // 3 -> Input to Cell Tensor Index
+    // 4 -> Input to Output Tensor Index
+    // 5 -> Recurrent to Input Weights Tensor Index
+    // 6 -> Recurrent to Forget Weights Tensor Index
+    // 7 -> Recurrent to Cell Weights Tensor Index
+    // 8 -> Recurrent to Output Weights Tensor Index
+    // 9 -> Cell to Input Weights Tensor Index
+    // 10 -> Cell to Forget Weights Tensor Index
+    // 11 -> Cell to Output Weights Tensor Index
+    // 12 -> Input Gate Bias Tensor Index
+    // 13 -> Forget Gate Bias Tensor Index
+    // 14 -> Cell Bias Tensor Index
+    // 15 -> Output Gate Bias Tensor Index
+    // 16 -> Projection Weights Tensor Index
+    // 17 -> Projection Bias Tensor Index
+    // 18 -> Output State In Tensor Index
+    // 19 -> Cell State In Tensor Index
+    OperandIndexSequence inputs;
+    for (uint32_t n = 0; n < init_param.input_count - 3; ++n)
+    {
+      inputs.append(OperandIndex{init_param.inputs[n]});
+    }
+
+    // Each output should be interpreted as follows:
+    //
+    // 0 -> Scratch Buffer Tensor Index
+    // 1 -> Output State Out Tensor Index
+    // 2 -> Cell State Out Tensor Index
+    // 3 -> Output Tensor Index
+    OperandIndexSequence outputs;
+    for (uint32_t n = 0; n < init_param.output_count; ++n)
+    {
+      outputs.append(OperandIndex{init_param.outputs[n]});
+    }
+
+    operation::LSTMNode::Param param;
+    const auto activation_index = OperandIndex{init_param.inputs[20]};
+    switch (operands.at(activation_index).asScalar<int32_t>())
+    {
+      case 0:
+        param.activation = Activation::NONE;
+        break;
+      case 1:
+        param.activation = Activation::RELU;
+        break;
+      case 2:
+        param.activation = Activation::RELU1;
+        break;
+      case 3:
+        param.activation = Activation::RELU6;
+        break;
+      case 4:
+        param.activation = Activation::TANH;
+        break;
+      case 6:
+        param.activation = Activation::SIGMOID;
+        break;
+      default:
+        throw std::runtime_error("Unsupported activation type");
+        break;
+    }
+    param.cell_threshold = operands.at(OperandIndex{init_param.inputs[21]}).asScalar<float>();
+    param.projection_threshold = operands.at(OperandIndex{init_param.inputs[22]}).asScalar<float>();
+
+    return new operation::LSTMNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_EQUAL_EX] = [](const OperationFactory::Param &init_param,
+                                      neurun::model::Operands &operands) {
+    assert(init_param.input_count == 2 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> input0 Tensor Index
+    //  1 -> input1 Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1]};
+
+    operation::ComparisonNode::Param param;
+    param.comparison_type = operation::ComparisonNode::ComparisonType::Equal;
+
+    // Output operand type must be boolean
+    replaceDataType(operands, outputs.at(0), DataType::BOOL8);
+
+    return new operation::ComparisonNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_SQUARED_DIFFERENCE_EX] = [](const OperationFactory::Param &init_param,
+                                                   neurun::model::Operands &) {
+    assert(init_param.input_count == 2 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> LHS Tensor Index
+    //  1 -> RHS Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1]};
+
+    return new operation::SquaredDifferenceNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_TOPK_V2_EX] = [](const OperationFactory::Param &init_param,
+                                        neurun::model::Operands &) {
+    assert(init_param.input_count == 2 && init_param.output_count == 2);
+
+    // Each output should be interpreted as follows:
+    //
+    //  0 -> Index for Output Values
+    //  1 -> Index for Output Indices
+    OperandIndexSequence outputs{init_param.outputs[0], init_param.outputs[1]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Index for Input Data
+    //  1 -> Index for K
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    operation::TopKV2Node::Param param;
+    param.k_index = OperandIndex{init_param.inputs[1]};
+
+    return new operation::TopKV2Node{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_GATHER_EX] = [](const OperationFactory::Param &init_param,
+                                       neurun::model::Operands &) {
+    assert(init_param.input_count == 3 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> input Tensor Index
+    //  1 -> indices Tensor Index
+    //  2 -> axis Index
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1]};
+
+    operation::GatherNode::Param param;
+    param.axis_index = OperandIndex{init_param.inputs[2]};
+
+    return new operation::GatherNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_NEG_EX] = [](const OperationFactory::Param &init_param,
+                                    neurun::model::Operands &) {
+    assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Input Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    return new operation::NegNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_ABS_EX] = [](const OperationFactory::Param &init_param,
+                                    neurun::model::Operands &) {
+    assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Input Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    return new operation::AbsNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_ARGMAX_EX] = [](const OperationFactory::Param &init_param,
+                                       neurun::model::Operands &) {
+    assert(init_param.input_count == 2 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Input Tensor Index
+    //  1 -> Axis Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    operation::ArgMaxNode::Param param;
+    param.axis_index = OperandIndex{init_param.inputs[1]};
+
+    return new operation::ArgMaxNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_DEQUANTIZE] = [](const OperationFactory::Param &init_param,
+                                        neurun::model::Operands &) {
+    assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Input Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    return new operation::DequantizeNode{inputs, outputs};
+  };
+
+  _map[ANEURALNETWORKS_MEAN] = [](const OperationFactory::Param &init_param,
+                                  neurun::model::Operands &operands) {
+    assert(init_param.input_count == 3 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> ifm Tensor Index
+    //  1 -> axis Tensor Index
+    //  2 -> keep_dims Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    operation::MeanNode::Param param;
+    param.axis_index = OperandIndex{init_param.inputs[1]};
+    param.keep_dims = operands.at(OperandIndex{init_param.inputs[2]}).asScalar<int32_t>() != 0;
+
+    return new operation::MeanNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_LOCAL_RESPONSE_NORMALIZATION] = [](const OperationFactory::Param &init_param,
+                                                          neurun::model::Operands &) {
+    assert(init_param.input_count == 5 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    operation::LocalResponseNormalizationNode::Param param;
+    param.radius_index = OperandIndex{init_param.inputs[1]};
+    param.bias_index = OperandIndex{init_param.inputs[2]};
+    param.alpha_index = OperandIndex{init_param.inputs[3]};
+    param.beta_index = OperandIndex{init_param.inputs[4]};
+
+    return new operation::LocalResponseNormalizationNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_DEPTH_TO_SPACE] = [](const OperationFactory::Param &init_param,
+                                            neurun::model::Operands &) {
+    assert(init_param.input_count == 2 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Input Tensor Index
+    //  1 -> Block size Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    operation::DepthToSpaceNode::Param param;
+    param.block_size_index = OperandIndex{init_param.inputs[1]};
+
+    return new operation::DepthToSpaceNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_REDUCE_MIN_EX] = [](const OperationFactory::Param &init_param,
+                                           neurun::model::Operands &) {
+    assert(init_param.input_count == 2 && init_param.output_count == 1);
+
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    // Each input should be interpreted as follows:
+    //
+    //  0 -> Input Tensor Index
+    //  1 -> Axis Tensor Index
+    OperandIndexSequence inputs{init_param.inputs[0]};
+
+    operation::ReduceMinNode::Param param;
+    param.axis_index = OperandIndex{init_param.inputs[1]};
+
+    return new operation::ReduceMinNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_SPLIT_EX] = [](const OperationFactory::Param &init_param,
+                                      neurun::model::Operands &) {
+    assert(init_param.input_count == 3);
+    assert(init_param.output_count >= 1); // At least one output tensor and axis
+
+    OperandIndexSequence inputs{init_param.inputs[0]};
+    OperandIndexSequence outputs;
+    for (uint32_t n = 0; n < init_param.output_count; ++n)
+    {
+      outputs.append(OperandIndex{init_param.outputs[n]});
+    }
+
+    operation::SplitNode::Param param;
+    param.axis_index = OperandIndex{init_param.inputs[1]};
+    param.num_of_splits_index = OperandIndex{init_param.inputs[2]};
+
+    return new operation::SplitNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_UNPACK_EX] = [](const OperationFactory::Param &init_param,
+                                       neurun::model::Operands &operands) {
+    assert(init_param.input_count == 3 && init_param.output_count >= 1);
+
+    OperandIndexSequence inputs{init_param.inputs[0]};
+    OperandIndexSequence outputs;
+    for (uint32_t n = 0; n < init_param.output_count; ++n)
+    {
+      outputs.append(OperandIndex{init_param.outputs[n]});
+    }
+
+    operation::UnpackNode::Param param;
+    const auto num_index = OperandIndex{init_param.inputs[1]};
+    const auto axis_index = OperandIndex{init_param.inputs[2]};
+    param.num = operands.at(num_index).asScalar<int32_t>();
+    param.axis = operands.at(axis_index).asScalar<int32_t>();
+
+    return new operation::UnpackNode{inputs, outputs, param};
+  };
+
+  _map[ANEURALNETWORKS_PAD] = [](const OperationFactory::Param &init_param, Operands &) {
+    assert(init_param.input_count == 2 && init_param.output_count >= 1);
+
+    OperandIndexSequence inputs{init_param.inputs[0], init_param.inputs[1]};
+    OperandIndexSequence outputs{init_param.outputs[0]};
+
+    return new operation::PadNode{inputs, outputs};
+  };
+}
+
+neurun::model::Operation *OperationFactory::create(ANeuralNetworksOperationType type,
+                                                   const OperationFactory::Param &param,
+                                                   neurun::model::Operands &operands)
+{
+  auto it = _map.find(type);
+  if (it == _map.end())
+  {
+    throw std::runtime_error("Unsupported operation type: " + std::to_string(type));
+  }
+  return it->second(param, operands);
+}
diff --git a/runtimes/neurun/frontend/nnapi/wrapper/OperationFactory.h b/runtimes/neurun/frontend/nnapi/wrapper/OperationFactory.h
new file mode 100644
index 000000000..ae2a53088
--- /dev/null
+++ b/runtimes/neurun/frontend/nnapi/wrapper/OperationFactory.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __OPERATION_FACTORY_H__
+#define __OPERATION_FACTORY_H__
+
+#include <unordered_map>
+
+#include "model/Operands.h"
+#include "model/Operation.h"
+#include "NeuralNetworks.h"
+#include "NeuralNetworksEx.h"
+
+/**
+ * @brief A class to create a neurun operation object from NN API input parameters
+ */
+class OperationFactory
+{
+public:
+  struct Param
+  {
+    uint32_t input_count;
+    const uint32_t *inputs;
+    uint32_t output_count;
+    const uint32_t *outputs;
+  };
+
+public:
+  using Generator = std::function<neurun::model::Operation *(const OperationFactory::Param &,
+                                                             neurun::model::Operands &)>;
+
+public:
+  static OperationFactory &instance();
+
+private:
+  OperationFactory();
+
+public:
+  neurun::model::Operation *create(ANeuralNetworksOperationType,
+                                   const OperationFactory::Param &param,
+                                   neurun::model::Operands &operands);
+  // TODO add "register" method for separating registration, possibly supporting custom-ops
+
+private:
+  std::unordered_map<ANeuralNetworksOperationType, Generator> _map;
+};
+
+#endif // __OPERATION_FACTORY_H__
diff --git a/runtimes/neurun/frontend/tflite/CMakeLists.txt b/runtimes/neurun/frontend/tflite/CMakeLists.txt
new file mode 100644
index 000000000..738a692dc
--- /dev/null
+++ b/runtimes/neurun/frontend/tflite/CMakeLists.txt
@@ -0,0 +1,17 @@
+if(NOT BUILD_TFLITE_LOADER)
+  return()
+endif(NOT BUILD_TFLITE_LOADER)
+
+file(GLOB_RECURSE SOURCES_TFLITE_LOADER "*.cc")
+
+# tflite_loader lib
+add_library(tflite_loader SHARED ${SOURCES_TFLITE_LOADER})
+nnfw_find_package(FlatBuffersSource REQUIRED)
+target_include_directories(tflite_loader PUBLIC ${FlatBuffersSource_DIR}/include .)
+
+target_link_libraries(tflite_loader PUBLIC neurun_core) # TODO Link PRIVATE neurun_core
+target_link_libraries(tflite_loader PUBLIC nnfw_lib_misc nnfw_lib_cpp14)
+target_link_libraries(tflite_loader PRIVATE nnfw_common)
+target_link_libraries(tflite_loader PRIVATE nnfw_coverage)
+
+install(TARGETS tflite_loader DESTINATION lib)
diff --git a/runtimes/neurun/frontend/tflite/loader.cc b/runtimes/neurun/frontend/tflite/loader.cc
new file mode 100644
index 000000000..14acbfc6d
--- /dev/null
+++ b/runtimes/neurun/frontend/tflite/loader.cc
@@ -0,0 +1,700 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "loader.h"
+
+#include "model/Operations.Include.h"
+
+#include "cpp14/memory.h"
+
+namespace
+{
+
+using namespace tflite;
+using namespace neurun;
+
+model::Activation convertActivation(const ActivationFunctionType type)
+{
+  return static_cast<model::Activation>(static_cast<uint32_t>(type));
+}
+
+} // namespace anonymous
+
+namespace tflite_loader
+{
+using namespace tflite;
+using namespace neurun;
+
+void Loader::loadFromFile(const char *file_path)
+{
+  std::ifstream stream(file_path, std::fstream::in | std::fstream::binary);
+
+  stream.seekg(0, stream.end);
+  auto size = stream.tellg();
+  stream.seekg(0, stream.beg);
+
+  _buffer.resize(size);
+  stream.read(_buffer.data(), size);
+
+  stream.close();
+  loadModel();
+}
+
+void Loader::loadFromBuffer(std::pair<const char *, const char *> ref)
+{
+  _buffer.reserve(ref.second - ref.first);
+  std::copy(ref.first, ref.second, _buffer.begin());
+  loadModel();
+}
+
+model::DataType tensorTypeToDataType(const TensorType &type)
+{
+  switch (type)
+  {
+    case TensorType::TensorType_FLOAT32:
+      return model::DataType::FLOAT32;
+    case TensorType::TensorType_INT32:
+      return model::DataType::INT32;
+    case TensorType::TensorType_BOOL:
+      return model::DataType::BOOL8;
+    case TensorType::TensorType_INT8:
+      return model::DataType::QUANT8_ASYMM;
+    default:
+      throw std::runtime_error("NYI");
+  }
+}
+
+void Loader::loadOperand(const tflite::Tensor *tensor)
+{
+  model::Shape shape;
+  std::unique_ptr<model::Data> data_ptr;
+  // Shape
+  const auto *tensor_shape = tensor->shape();
+  for (const auto &dim : *tensor_shape)
+  {
+    shape.append(dim);
+  }
+  // Type
+  model::DataType data_type = tensorTypeToDataType(tensor->type());
+  // Create TypeInfo
+  model::TypeInfo type_info(data_type);
+  // Create operand
+  const auto &operand_index = _graph.addOperand(shape, type_info);
+  // Buffer index
+  if (tensor->buffer() != 0)
+    _tensor_to_operand[tensor->buffer()] = operand_index;
+  // Name unused
+  // auto name = tensor->name();
+  // Quantization
+  auto quantization = tensor->quantization();
+  if (quantization != nullptr)
+  {
+    auto scale = quantization->scale();
+    auto zero_point = quantization->zero_point();
+    if (scale != nullptr || zero_point != nullptr)
+      throw std::runtime_error("Quantization is not supported!");
+
+    auto details = quantization->details_as_CustomQuantization();
+    if (details != nullptr)
+      throw std::runtime_error("Custom Quantization is not supported");
+  }
+  // Variablie
+  if (tensor->is_variable())
+    throw std::runtime_error("Variable tensor not supported!");
+}
+
+void loadOperationIO(const tflite::Operator *op, model::OperandIndexSequence &inputs,
+                     model::OperandIndexSequence &outputs)
+{
+  for (const auto &idx : *op->inputs())
+  {
+    inputs.append(model::OperandIndex(idx));
+  }
+
+  for (const auto &idx : *op->outputs())
+  {
+    outputs.append(model::OperandIndex(idx));
+  }
+}
+
+template <typename T>
+neurun::model::OperandIndex Loader::createOperand(const uint8_t *ptr,
+                                                  const neurun::model::Shape &shape,
+                                                  const neurun::model::TypeInfo &type_info)
+{
+  const auto &operand_index = _graph.addOperand(shape, type_info);
+  if (ptr != nullptr)
+  {
+    size_t size = shape.num_elements();
+    auto data = nnfw::cpp14::make_unique<model::CachedData>(ptr, size * sizeof(T));
+    auto &created_operand = _graph.operands().at(operand_index);
+    created_operand.data(std::move(data));
+  }
+  return operand_index;
+}
+
+template <typename Param, typename OptionsType>
+void Loader::loadStridesAndPaddings(Param &param, const OptionsType *options)
+{
+  model::Shape shape;
+  model::TypeInfo type_info(neurun::model::DataType::INT32);
+  // Strides
+  param.stride.vertical = options->stride_w();
+  param.stride.horizontal = options->stride_h();
+  // Paddings
+  if (options->padding() == Padding::Padding_SAME)
+    param.padding.type = neurun::model::PaddingType::SAME;
+  if (options->padding() == Padding::Padding_VALID)
+    param.padding.type = neurun::model::PaddingType::VALID;
+  // param paddings indexes unused
+}
+
+template <typename Param> void Loader::loadPool2D(Param &param, const Pool2DOptions *options)
+{
+  // Strides and Paddings
+  loadStridesAndPaddings(param, options);
+  // Filter width and height
+  model::Shape shape;
+  model::TypeInfo type_info(neurun::model::DataType::INT32);
+  // Strides
+  param.kw = options->filter_width();
+  param.kh = options->filter_height();
+  // Activation
+  param.activation = convertActivation(options->fused_activation_function());
+}
+
+void Loader::loadConv2D(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  model::operation::Conv2DNode::Param param;
+  const auto *options = op->builtin_options_as_Conv2DOptions();
+  param.activation = convertActivation(options->fused_activation_function());
+  loadStridesAndPaddings(param, options);
+  // Dilation h/w factor unused
+  std::unique_ptr<model::Operation> new_op(
+      new model::operation::Conv2DNode(inputs, outputs, param));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadDepthwiseConv2D(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  model::operation::DepthwiseConv2DNode::Param param;
+  const auto *options = op->builtin_options_as_DepthwiseConv2DOptions();
+  param.activation = convertActivation(options->fused_activation_function());
+  loadStridesAndPaddings(param, options);
+  // Multiplier
+  model::Shape shape;
+  model::TypeInfo type_info(neurun::model::DataType::INT32);
+  param.multiplier = options->depth_multiplier();
+  // Dilation h/w factor unused
+  std::unique_ptr<model::Operation> new_op(
+      new model::operation::DepthwiseConv2DNode(inputs, outputs, param));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadTransposeConv(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  model::operation::TransposeConvNode::Param param;
+  const auto *options = op->builtin_options_as_TransposeConvOptions();
+  loadStridesAndPaddings(param, options);
+  std::unique_ptr<model::Operation> new_op(
+      new model::operation::TransposeConvNode(inputs, outputs, param));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadAvgPool2D(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  neurun::model::operation::AvgPool2DNode::Param param;
+  const auto *options = op->builtin_options_as_Pool2DOptions();
+
+  loadPool2D(param, options);
+
+  std::unique_ptr<model::Operation> new_op(
+      new model::operation::AvgPool2DNode(inputs, outputs, param));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadReshape(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  // const auto *options = op->builtin_options_as_ReshapeOptions();
+  // No params
+
+  std::unique_ptr<model::Operation> new_op(new model::operation::ReshapeNode(inputs, outputs));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadSoftmax(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  model::operation::SoftmaxNode::Param param;
+  const auto *options = op->builtin_options_as_SoftmaxOptions();
+  // Beta
+  param.beta = options->beta();
+
+  std::unique_ptr<model::Operation> new_op(
+      new model::operation::SoftmaxNode(inputs, outputs, param));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadMaxPool2D(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  model::operation::MaxPool2DNode::Param param;
+  const auto *options = op->builtin_options_as_Pool2DOptions();
+
+  loadPool2D(param, options);
+
+  std::unique_ptr<model::Operation> new_op(
+      new model::operation::MaxPool2DNode(inputs, outputs, param));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadConcatenation(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  model::operation::ConcatNode::Param param;
+  const auto *options = op->builtin_options_as_ConcatenationOptions();
+  // Axis
+  model::Shape shape;
+  model::TypeInfo type_info(neurun::model::DataType::INT32);
+  param.axis = options->axis();
+  // activation unused
+
+  std::unique_ptr<model::Operation> new_op(
+      new model::operation::ConcatNode(inputs, outputs, param));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadFC(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  model::operation::FullyConnectedNode::Param param;
+  const auto *options = op->builtin_options_as_FullyConnectedOptions();
+
+  param.activation = convertActivation(options->fused_activation_function());
+  // weights_format unused
+
+  std::unique_ptr<model::Operation> new_op(
+      new model::operation::FullyConnectedNode(inputs, outputs, param));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadAdd(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  model::operation::AddNode::Param param;
+  const auto *options = op->builtin_options_as_AddOptions();
+
+  param.activation = convertActivation(options->fused_activation_function());
+
+  std::unique_ptr<model::Operation> new_op(new model::operation::AddNode(inputs, outputs, param));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadSub(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  model::operation::SubNode::Param param;
+  const auto *options = op->builtin_options_as_SubOptions();
+
+  param.activation = convertActivation(options->fused_activation_function());
+
+  std::unique_ptr<model::Operation> new_op(new model::operation::SubNode(inputs, outputs, param));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadMul(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  model::operation::SubNode::Param param;
+  const auto *options = op->builtin_options_as_SubOptions();
+
+  param.activation = convertActivation(options->fused_activation_function());
+
+  std::unique_ptr<model::Operation> new_op(new model::operation::SubNode(inputs, outputs, param));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadDiv(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  model::operation::DivNode::Param param;
+  const auto *options = op->builtin_options_as_DivOptions();
+
+  param.activation = convertActivation(options->fused_activation_function());
+
+  std::unique_ptr<model::Operation> new_op(new model::operation::DivNode(inputs, outputs, param));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadRelu(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  std::unique_ptr<model::Operation> new_op(new model::operation::ReLUNode(inputs, outputs));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadRelu6(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  std::unique_ptr<model::Operation> new_op(new model::operation::ReLU6Node(inputs, outputs));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadRsqrt(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  std::unique_ptr<model::Operation> new_op(new model::operation::RSQRTNode(inputs, outputs));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadSqrt(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  std::unique_ptr<model::Operation> new_op(new model::operation::SQRTNode(inputs, outputs));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadSquaredDifference(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  std::unique_ptr<model::Operation> new_op(
+      new model::operation::SquaredDifferenceNode(inputs, outputs));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadTanh(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  loadOperationIO(op, inputs, outputs);
+
+  std::unique_ptr<model::Operation> new_op(new model::operation::TanhNode(inputs, outputs));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadTranspose(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  const auto input_index = (*op->inputs())[0];
+  inputs.append(model::OperandIndex(input_index));
+  const auto output_index = (*op->outputs())[0];
+  outputs.append(model::OperandIndex(output_index));
+
+  model::operation::TransposeNode::Param param;
+  if (op->inputs()->size() == 2)
+  {
+    const auto perm_index = (*op->inputs())[1];
+    param.perm = model::OperandIndex(perm_index);
+  }
+
+  std::unique_ptr<model::Operation> new_op(
+      new model::operation::TransposeNode(inputs, outputs, param));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadMean(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  const auto input_index = (*op->inputs())[0];
+  inputs.append(model::OperandIndex(input_index));
+  const auto output_index = (*op->outputs())[0];
+  outputs.append(model::OperandIndex(output_index));
+
+  model::operation::MeanNode::Param param;
+  param.axis_index = model::OperandIndex((*op->inputs())[1]);
+  param.keep_dims = op->builtin_options_as_ReducerOptions()->keep_dims();
+
+  std::unique_ptr<model::Operation> new_op(new model::operation::MeanNode(inputs, outputs, param));
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadCustom(const tflite::Operator *op)
+{
+  model::OperandIndexSequence inputs;
+  model::OperandIndexSequence outputs;
+
+  for (auto in_idx : *op->inputs())
+  {
+    inputs.append(model::OperandIndex(in_idx));
+  }
+
+  for (auto out_idx : *op->outputs())
+  {
+    outputs.append(model::OperandIndex(out_idx));
+  }
+
+  auto custom_op_id = _opcode_index_to_custom_opcode.at(op->opcode_index());
+
+  auto constraint = model::operation::OperandConstraint::createExact(inputs.size());
+
+  assert(op->custom_options_format() == CustomOptionsFormat_FLEXBUFFERS &&
+         "Unsupported custom operation options format");
+
+  size_t custom_op_data_size = op->custom_options()->size();
+  auto custom_op_data = new char[custom_op_data_size];
+  std::copy(op->custom_options()->begin(), op->custom_options()->end(), custom_op_data);
+
+  model::operation::CustomNode::Userdata userdata{};
+  userdata.data = custom_op_data;
+  userdata.size = custom_op_data_size;
+
+  auto new_op = nnfw::cpp14::make_unique<model::operation::CustomNode>(constraint, inputs, outputs,
+                                                                       custom_op_id, userdata);
+
+  _graph.addOperation(std::move(new_op));
+}
+
+void Loader::loadOperation(const tflite::Operator *op)
+{
+  switch (_op_code_to_builtin_op[op->opcode_index()])
+  {
+    case BuiltinOperator_CONV_2D:
+      loadConv2D(op);
+      return;
+    case BuiltinOperator_AVERAGE_POOL_2D:
+      loadAvgPool2D(op);
+      return;
+    case BuiltinOperator_DEPTHWISE_CONV_2D:
+      loadDepthwiseConv2D(op);
+      return;
+    case BuiltinOperator_TRANSPOSE_CONV:
+      loadTransposeConv(op);
+      return;
+    case BuiltinOperator_RESHAPE:
+      loadReshape(op);
+      return;
+    case BuiltinOperator_SOFTMAX:
+      loadSoftmax(op);
+      return;
+    case BuiltinOperator_MAX_POOL_2D:
+      loadMaxPool2D(op);
+      return;
+    case BuiltinOperator_CONCATENATION:
+      loadConcatenation(op);
+      return;
+    case BuiltinOperator_FULLY_CONNECTED:
+      loadFC(op);
+      return;
+    case BuiltinOperator_ADD:
+      loadAdd(op);
+      return;
+    case BuiltinOperator_SUB:
+      loadSub(op);
+      return;
+    case BuiltinOperator_MUL:
+      loadMul(op);
+      return;
+    case BuiltinOperator_DIV:
+      loadDiv(op);
+      return;
+    case BuiltinOperator_RELU:
+      loadRelu(op);
+      return;
+    case BuiltinOperator_RELU6:
+      loadRelu6(op);
+      return;
+    case BuiltinOperator_RSQRT:
+      loadRsqrt(op);
+      return;
+    case BuiltinOperator_SQRT:
+      loadSqrt(op);
+      return;
+    case BuiltinOperator_SQUARED_DIFFERENCE:
+      loadSquaredDifference(op);
+      return;
+    case BuiltinOperator_TANH:
+      loadTanh(op);
+      return;
+    case BuiltinOperator_TRANSPOSE:
+      loadTranspose(op);
+      return;
+    case BuiltinOperator_MEAN:
+      loadMean(op);
+      return;
+    case BuiltinOperator_CUSTOM:
+      loadCustom(op);
+      return;
+    default:
+      auto *names = EnumNamesBuiltinOperator();
+      int enum_value = static_cast<int>(_op_code_to_builtin_op[op->opcode_index()]);
+      throw std::runtime_error(std::string("Unsupported operation: ").append(names[enum_value]));
+  }
+}
+
+void Loader::loadSubgraph(const SubGraph *subgraph)
+{
+  // Load tensors
+  for (const auto *tensor : *subgraph->tensors())
+  {
+    loadOperand(tensor);
+  }
+  // Set inputs
+  for (const auto &input_ind : *subgraph->inputs())
+  {
+    _graph.addInput(model::OperandIndex(input_ind));
+  }
+  // Set outputs
+  for (const auto &output_ind : *subgraph->outputs())
+  {
+    _graph.addOutput(model::OperandIndex(output_ind));
+  }
+  // Create operations
+  for (const auto *op : *subgraph->operators())
+  {
+    loadOperation(op);
+  }
+  // Name unused
+}
+
+void Loader::loadConstantTensor(const Buffer *buffer, const uint32_t &index)
+{
+  const auto *data = buffer->data();
+  if (data != nullptr)
+  {
+    auto ptr = nnfw::cpp14::make_unique<model::CachedData>(data->data(), data->size());
+    const auto &operand_index = _tensor_to_operand[index];
+    auto &operand = _graph.operands().at(operand_index);
+    operand.data(std::move(ptr));
+  }
+}
+
+void Loader::loadModel()
+{
+  flatbuffers::Verifier verifier(reinterpret_cast<const std::uint8_t *>(_buffer.data()),
+                                 _buffer.size());
+  if (!tflite::VerifyModelBuffer(verifier))
+    throw std::runtime_error{"Invalid tflite model"};
+
+  const auto *model = GetModel(_buffer.data());
+  // Version unused
+  // const auto version = model->version();
+  const auto *op_codes = model->operator_codes();
+  const auto *subgraphs = model->subgraphs();
+  // Description unused
+  // const auto *description = model->description();
+  const auto *buffers = model->buffers();
+  // Metabuffer unsued
+  // const auto *metadata_buffer = model->metadata_buffer();
+  // Use operator codes
+  for (const auto *op_code : *op_codes)
+  {
+    _op_code_to_builtin_op.push_back(op_code->builtin_code());
+
+    if (op_code->builtin_code() == BuiltinOperator_CUSTOM)
+    {
+      auto id = op_code->custom_code()->str();
+      _opcode_index_to_custom_opcode[_op_code_to_builtin_op.size() - 1] = id;
+    }
+    // Custom code unsued
+    // Version unused
+  }
+  // Load subgraphs
+  for (const auto *subgraph : *subgraphs)
+  {
+    loadSubgraph(subgraph);
+  }
+  // Load buffers with constant tensors
+  for (uint32_t ind = 0; ind < buffers->size(); ind++)
+  {
+    loadConstantTensor(buffers->Get(ind), ind);
+  }
+
+  _graph.finishBuilding();
+}
+
+} // namespace tflite_loader
diff --git a/runtimes/neurun/frontend/tflite/loader.h b/runtimes/neurun/frontend/tflite/loader.h
new file mode 100644
index 000000000..c398cbc00
--- /dev/null
+++ b/runtimes/neurun/frontend/tflite/loader.h
@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __TFLITE_LOADER_LOADER_H__
+#define __TFLITE_LOADER_LOADER_H__
+
+#include "schema_generated.h"
+
+#include "graph/Graph.h"
+
+#include <fstream>
+#include <map>
+
+namespace tflite_loader
+{
+/**
+ * @brief TFLite model loader
+ */
+class Loader
+{
+public:
+  /**
+   * @brief Construct a new Loader object
+   *
+   * @param graph reference on graph
+   */
+  explicit Loader(neurun::graph::Graph &graph) : _graph(graph){};
+  ~Loader() = default;
+  /**
+   * @brief Load a model from file
+   *
+   * @param file_path
+   */
+  void loadFromFile(const char *file_path);
+  /**
+   * @brief Load a model from buffer
+   *
+   * @param ref Pointers on begin and end of buffer
+   */
+  void loadFromBuffer(std::pair<const char *, const char *> ref);
+
+private:
+  void loadModel();
+  // Helper functions
+  // Load subgraphs
+  void loadSubgraph(const tflite::SubGraph *subgraph);
+  // Load data from buffer to tensor on index
+  void loadConstantTensor(const tflite::Buffer *buffer, const uint32_t &index);
+  // Create operands form tflite::Tensor
+  void loadOperand(const tflite::Tensor *tensor);
+  // Create operations from tflite::Operator
+  void loadOperation(const tflite::Operator *op);
+  // Load Strides and Paddings from options to param
+  template <typename Param, typename OptionsType>
+  void loadStridesAndPaddings(Param &param, const OptionsType *options);
+  // Load Pool2D param
+  template <typename Param> void loadPool2D(Param &param, const tflite::Pool2DOptions *options);
+  // Create new Operand from Shape and TypeInfo
+  template <typename T>
+  neurun::model::OperandIndex createOperand(const uint8_t *ptr, const neurun::model::Shape &shape,
+                                            const neurun::model::TypeInfo &type_info);
+
+  // Operations
+  void loadConv2D(const tflite::Operator *op);
+  void loadDepthwiseConv2D(const tflite::Operator *op);
+  void loadTransposeConv(const tflite::Operator *op);
+  void loadAvgPool2D(const tflite::Operator *op);
+  void loadReshape(const tflite::Operator *op);
+  void loadSoftmax(const tflite::Operator *op);
+  void loadMaxPool2D(const tflite::Operator *op);
+  void loadConcatenation(const tflite::Operator *op);
+  void loadFC(const tflite::Operator *op);
+  void loadAdd(const tflite::Operator *op);
+  void loadSub(const tflite::Operator *op);
+  void loadMul(const tflite::Operator *op);
+  void loadDiv(const tflite::Operator *op);
+  void loadRelu(const tflite::Operator *op);
+  void loadRelu6(const tflite::Operator *op);
+  void loadRsqrt(const tflite::Operator *op);
+  void loadSqrt(const tflite::Operator *op);
+  void loadSquaredDifference(const tflite::Operator *op);
+  void loadTanh(const tflite::Operator *op);
+  void loadTranspose(const tflite::Operator *op);
+  void loadMean(const tflite::Operator *op);
+
+  void loadCustom(const tflite::Operator *op);
+
+private:
+  // Buffer for loading (if needed)
+  std::vector<char> _buffer;
+  // Reference on loadable Graph
+  neurun::graph::Graph &_graph;
+  // Mapping from tflite tensor index to Graph OperandIndex
+  std::map<uint32_t, neurun::model::OperandIndex> _tensor_to_operand;
+  // Mapping from operator code to BuiltinOperator
+  std::vector<tflite::BuiltinOperator> _op_code_to_builtin_op;
+  std::unordered_map<uint32_t, std::string> _opcode_index_to_custom_opcode;
+};
+
+} // namespace tflite_loader
+
+#endif //__TFLITE_LOADER_LOADER_H__
diff --git a/runtimes/neurun/frontend/tflite/schema.fbs b/runtimes/neurun/frontend/tflite/schema.fbs
new file mode 100644
index 000000000..980f13b19
--- /dev/null
+++ b/runtimes/neurun/frontend/tflite/schema.fbs
@@ -0,0 +1,794 @@
+// Copyright 2017 The TensorFlow Authors. All Rights Reserved.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+// Revision History
+// Version 0: Initial version.
+// Version 1: Add subgraphs to schema.
+// Version 2: Rename operators to conform to NN API.
+// Version 3: Move buffer data from Model.Subgraph.Tensors to Model.Buffers.
+
+namespace tflite;
+
+// This corresponds to the version.
+file_identifier "TFL3";
+// File extension of any written files.
+file_extension "tflite";
+
+// IMPORTANT: All new members of tables, enums and unions must be added at the
+// end to ensure backwards compatibility.
+
+// The type of data stored in a tensor.
+enum TensorType : byte {
+  FLOAT32 = 0,
+  FLOAT16 = 1,
+  INT32 = 2,
+  UINT8 = 3,
+  INT64 = 4,
+  STRING = 5,
+  BOOL = 6,
+  INT16 = 7,
+  COMPLEX64 = 8,
+  INT8 = 9,
+}
+
+// Custom quantization parameters for experimenting with new quantization
+// techniques.
+table CustomQuantization {
+  custom:[ubyte] (force_align: 16);
+}
+
+// Represents a specific quantization technique's parameters.
+union QuantizationDetails {
+  CustomQuantization,
+}
+
+// Parameters for converting a quantized tensor back to float.
+table QuantizationParameters {
+  // These four parameters are the asymmetric linear quantization parameters.
+  // Given a quantized value q, the corresponding float value f should be:
+  //   f = scale * (q - zero_point)
+  // For other quantization types, the QuantizationDetails below is used.
+  min:[float];  // For importing back into tensorflow.
+  max:[float];  // For importing back into tensorflow.
+  scale:[float];  // For dequantizing the tensor's values.
+  zero_point:[long];
+
+  // If this is not none, the quantization parameters above are ignored and the
+  // value of the QuantizationDetails union below should be used.
+  details:QuantizationDetails;
+}
+
+table Tensor {
+  // The tensor shape. The meaning of each entry is operator-specific but
+  // builtin ops use: [batch size, height, width, number of channels] (That's
+  // Tensorflow's NHWC).
+  shape:[int];
+  type:TensorType;
+  // An index that refers to the buffers table at the root of the model. Or,
+  // if there is no data buffer associated (i.e. intermediate results), then
+  // this is 0 (which refers to an always existent empty buffer).
+  //
+  // The data_buffer itself is an opaque container, with the assumption that the
+  // target device is little-endian. In addition, all builtin operators assume
+  // the memory is ordered such that if `shape` is [4, 3, 2], then index
+  // [i, j, k] maps to data_buffer[i*3*2 + j*2 + k].
+  buffer:uint;
+  name:string;  // For debugging and importing back into tensorflow.
+  quantization:QuantizationParameters;  // Optional.
+
+  is_variable:bool = false;
+}
+
+// A list of builtin operators. Builtin operators are slightly faster than custom
+// ones, but not by much. Moreover, while custom operators accept an opaque
+// object containing configuration parameters, builtins have a predetermined
+// set of acceptable options.
+enum BuiltinOperator : byte {
+  ADD = 0,
+  AVERAGE_POOL_2D = 1,
+  CONCATENATION = 2,
+  CONV_2D = 3,
+  DEPTHWISE_CONV_2D = 4,
+  // DEPTH_TO_SPACE = 5,
+  DEQUANTIZE = 6,
+  EMBEDDING_LOOKUP = 7,
+  FLOOR = 8,
+  FULLY_CONNECTED = 9,
+  HASHTABLE_LOOKUP = 10,
+  L2_NORMALIZATION = 11,
+  L2_POOL_2D = 12,
+  LOCAL_RESPONSE_NORMALIZATION = 13,
+  LOGISTIC = 14,
+  LSH_PROJECTION = 15,
+  LSTM = 16,
+  MAX_POOL_2D = 17,
+  MUL = 18,
+  RELU = 19,
+  // NOTE(aselle): RELU_N1_TO_1 used to be called RELU1, but it was renamed
+  // since different model developers use RELU1 in different ways. Never
+  // create another op called RELU1.
+  RELU_N1_TO_1 = 20,
+  RELU6 = 21,
+  RESHAPE = 22,
+  RESIZE_BILINEAR = 23,
+  RNN = 24,
+  SOFTMAX = 25,
+  SPACE_TO_DEPTH = 26,
+  SVDF = 27,
+  TANH = 28,
+  // TODO(aselle): Consider rename to CONCATENATE_EMBEDDINGS
+  CONCAT_EMBEDDINGS = 29,
+  SKIP_GRAM = 30,
+  CALL = 31,
+  CUSTOM = 32,
+  EMBEDDING_LOOKUP_SPARSE = 33,
+  PAD = 34,
+  UNIDIRECTIONAL_SEQUENCE_RNN = 35,
+  GATHER = 36,
+  BATCH_TO_SPACE_ND = 37,
+  SPACE_TO_BATCH_ND = 38,
+  TRANSPOSE = 39,
+  MEAN = 40,
+  SUB = 41,
+  DIV = 42,
+  SQUEEZE = 43,
+  UNIDIRECTIONAL_SEQUENCE_LSTM = 44,
+  STRIDED_SLICE = 45,
+  BIDIRECTIONAL_SEQUENCE_RNN = 46,
+  EXP = 47,
+  TOPK_V2 = 48,
+  SPLIT = 49,
+  LOG_SOFTMAX = 50,
+  // DELEGATE is a special op type for the operations which are delegated to
+  // other backends.
+  // WARNING: Experimental interface, subject to change
+  DELEGATE = 51,
+  BIDIRECTIONAL_SEQUENCE_LSTM = 52,
+  CAST = 53,
+  PRELU = 54,
+  MAXIMUM = 55,
+  ARG_MAX = 56,
+  MINIMUM = 57,
+  LESS = 58,
+  NEG = 59,
+  PADV2 = 60,
+  GREATER = 61,
+  GREATER_EQUAL = 62,
+  LESS_EQUAL = 63,
+  SELECT = 64,
+  SLICE = 65,
+  SIN = 66,
+  TRANSPOSE_CONV = 67,
+  SPARSE_TO_DENSE = 68,
+  TILE = 69,
+  EXPAND_DIMS = 70,
+  EQUAL = 71,
+  NOT_EQUAL = 72,
+  LOG = 73,
+  SUM = 74,
+  SQRT = 75,
+  RSQRT = 76,
+  SHAPE = 77,
+  POW = 78,
+  ARG_MIN = 79,
+  FAKE_QUANT = 80,
+  REDUCE_PROD = 81,
+  REDUCE_MAX = 82,
+  PACK = 83,
+  LOGICAL_OR = 84,
+  ONE_HOT = 85,
+  LOGICAL_AND = 86,
+  LOGICAL_NOT = 87,
+  UNPACK = 88,
+  REDUCE_MIN = 89,
+  FLOOR_DIV = 90,
+  REDUCE_ANY = 91,
+  SQUARE = 92,
+  ZEROS_LIKE = 93,
+  FILL = 94,
+  FLOOR_MOD = 95,
+  RANGE = 96,
+  RESIZE_NEAREST_NEIGHBOR = 97,
+  LEAKY_RELU = 98,
+  SQUARED_DIFFERENCE = 99,
+  MIRROR_PAD = 100,
+  ABS = 101,
+  SPLIT_V = 102,
+}
+
+// Options for the builtin operators.
+union BuiltinOptions {
+  Conv2DOptions,
+  DepthwiseConv2DOptions,
+  ConcatEmbeddingsOptions,
+  LSHProjectionOptions,
+  Pool2DOptions,
+  SVDFOptions,
+  RNNOptions,
+  FullyConnectedOptions,
+  SoftmaxOptions,
+  ConcatenationOptions,
+  AddOptions,
+  L2NormOptions,
+  LocalResponseNormalizationOptions,
+  LSTMOptions,
+  ResizeBilinearOptions,
+  CallOptions,
+  ReshapeOptions,
+  SkipGramOptions,
+  SpaceToDepthOptions,
+  EmbeddingLookupSparseOptions,
+  MulOptions,
+  PadOptions,
+  GatherOptions,
+  BatchToSpaceNDOptions,
+  SpaceToBatchNDOptions,
+  TransposeOptions,
+  ReducerOptions,
+  SubOptions,
+  DivOptions,
+  SqueezeOptions,
+  SequenceRNNOptions,
+  StridedSliceOptions,
+  ExpOptions,
+  TopKV2Options,
+  SplitOptions,
+  LogSoftmaxOptions,
+  CastOptions,
+  DequantizeOptions,
+  MaximumMinimumOptions,
+  ArgMaxOptions,
+  LessOptions,
+  NegOptions,
+  PadV2Options,
+  GreaterOptions,
+  GreaterEqualOptions,
+  LessEqualOptions,
+  SelectOptions,
+  SliceOptions,
+  TransposeConvOptions,
+  SparseToDenseOptions,
+  TileOptions,
+  ExpandDimsOptions,
+  EqualOptions,
+  NotEqualOptions,
+  ShapeOptions,
+  PowOptions,
+  ArgMinOptions,
+  FakeQuantOptions,
+  PackOptions,
+  LogicalOrOptions,
+  OneHotOptions,
+  LogicalAndOptions,
+  LogicalNotOptions,
+  UnpackOptions,
+  FloorDivOptions,
+  SquareOptions,
+  ZerosLikeOptions,
+  FillOptions,
+  BidirectionalSequenceLSTMOptions,
+  BidirectionalSequenceRNNOptions,
+  UnidirectionalSequenceLSTMOptions,
+  FloorModOptions,
+  RangeOptions,
+  ResizeNearestNeighborOptions,
+  LeakyReluOptions,
+  SquaredDifferenceOptions,
+  MirrorPadOptions,
+  AbsOptions,
+  SplitVOptions,
+}
+
+enum Padding : byte { SAME, VALID }
+
+enum ActivationFunctionType : byte {
+  NONE = 0,
+  RELU = 1,
+  RELU_N1_TO_1 = 2,
+  RELU6 = 3,
+  TANH = 4,
+  SIGN_BIT = 5,
+}
+
+table Conv2DOptions {
+  padding:Padding;
+  stride_w:int;
+  stride_h:int;
+  fused_activation_function:ActivationFunctionType;
+  dilation_w_factor:int = 1;
+  dilation_h_factor:int = 1;
+}
+
+table Pool2DOptions {
+  padding:Padding;
+  stride_w:int;
+  stride_h:int;
+  filter_width:int;
+  filter_height:int;
+  fused_activation_function:ActivationFunctionType;
+}
+
+table DepthwiseConv2DOptions {
+  // Parameters for DepthwiseConv version 1 or above.
+  padding:Padding;
+  stride_w:int;
+  stride_h:int;
+  depth_multiplier:int;
+  fused_activation_function:ActivationFunctionType;
+  // Parameters for DepthwiseConv version 2 or above.
+  dilation_w_factor:int = 1;
+  dilation_h_factor:int = 1;
+}
+
+table ConcatEmbeddingsOptions {
+  num_channels:int;
+  num_columns_per_channel:[int];
+  embedding_dim_per_channel:[int]; // This could be inferred from parameters.
+}
+
+enum LSHProjectionType: byte {
+  UNKNOWN = 0,
+  SPARSE = 1,
+  DENSE = 2,
+}
+
+table LSHProjectionOptions {
+  type: LSHProjectionType;
+}
+
+table SVDFOptions {
+  rank:int;
+  fused_activation_function:ActivationFunctionType;
+}
+
+// An implementation of TensorFlow RNNCell.
+table RNNOptions {
+  fused_activation_function:ActivationFunctionType;
+}
+
+// An implementation of TensorFlow dynamic_rnn with RNNCell.
+table SequenceRNNOptions {
+  time_major:bool;
+  fused_activation_function:ActivationFunctionType;
+}
+
+// An implementation of TensorFlow bidrectional_dynamic_rnn with RNNCell.
+table BidirectionalSequenceRNNOptions {
+  time_major:bool;
+  fused_activation_function:ActivationFunctionType;
+  merge_outputs: bool;
+}
+
+enum FullyConnectedOptionsWeightsFormat: byte {
+  DEFAULT = 0,
+  SHUFFLED4x16INT8 = 1,
+}
+
+// An implementation of TensorFlow fully_connected (a.k.a Dense) layer.
+table FullyConnectedOptions {
+  // Parameters for FullyConnected version 1 or above.
+  fused_activation_function:ActivationFunctionType;
+
+  // Parameters for FullyConnected version 2 or above.
+  weights_format:FullyConnectedOptionsWeightsFormat = DEFAULT;
+}
+
+table SoftmaxOptions {
+  beta: float;
+}
+
+// An implementation of TensorFlow concat.
+table ConcatenationOptions {
+  axis:int;
+  fused_activation_function:ActivationFunctionType;
+}
+
+table AddOptions {
+  fused_activation_function:ActivationFunctionType;
+}
+
+table MulOptions {
+  fused_activation_function:ActivationFunctionType;
+}
+
+table L2NormOptions {
+  fused_activation_function:ActivationFunctionType;
+}
+
+table LocalResponseNormalizationOptions {
+  radius:int;
+  bias:float;
+  alpha:float;
+  beta:float;
+}
+
+enum LSTMKernelType : byte {
+  // Full LSTM kernel which supports peephole and projection.
+  FULL = 0,
+  // Basic LSTM kernels. Equivalent to TensorFlow BasicLSTMCell.
+  BASIC = 1,
+}
+
+// An implementation of TensorFlow LSTMCell and CoupledInputForgetGateLSTMCell
+table LSTMOptions {
+  // Parameters for LSTM version 1 or above.
+  fused_activation_function:ActivationFunctionType;
+  cell_clip: float; // Optional, 0.0 means no clipping
+  proj_clip: float; // Optional, 0.0 means no clipping
+
+  // Parameters for LSTM version 2 or above.
+  // Basic kernel is only supported in version 2 or above.
+  kernel_type: LSTMKernelType = FULL;
+}
+
+// An implementation of TensorFlow dynamic_rnn with LSTMCell.
+table UnidirectionalSequenceLSTMOptions {
+  fused_activation_function:ActivationFunctionType;
+  cell_clip: float; // Optional, 0.0 means no clipping
+  proj_clip: float; // Optional, 0.0 means no clipping
+
+  // If true then first dimension is sequence, otherwise batch.
+  time_major:bool;
+}
+
+table BidirectionalSequenceLSTMOptions {
+  fused_activation_function:ActivationFunctionType;
+  cell_clip: float; // Optional, 0.0 means no clipping
+  proj_clip: float; // Optional, 0.0 means no clipping
+
+  // If true, store the outputs of both directions into the first output.
+  merge_outputs: bool;
+}
+
+table ResizeBilinearOptions {
+  new_height: int (deprecated);
+  new_width: int (deprecated);
+  align_corners: bool;
+}
+
+table ResizeNearestNeighborOptions {
+  align_corners: bool;
+}
+
+// A call operation options
+table CallOptions {
+  // The subgraph index that needs to be called.
+  subgraph:uint;
+}
+
+table PadOptions {
+}
+
+table PadV2Options {
+}
+
+table ReshapeOptions {
+  new_shape:[int];
+}
+
+table SpaceToBatchNDOptions {
+}
+
+table BatchToSpaceNDOptions {
+}
+
+table SkipGramOptions {
+  ngram_size: int;
+  max_skip_size: int;
+  include_all_ngrams: bool;
+}
+
+table SpaceToDepthOptions {
+  block_size: int;
+}
+
+table SubOptions {
+  fused_activation_function:ActivationFunctionType;
+}
+
+table DivOptions {
+  fused_activation_function:ActivationFunctionType;
+}
+
+table TopKV2Options {
+}
+
+enum CombinerType : byte {
+  SUM = 0,
+  MEAN = 1,
+  SQRTN = 2,
+}
+
+table EmbeddingLookupSparseOptions {
+  combiner:CombinerType;
+}
+
+table GatherOptions {
+  axis: int;
+}
+
+table TransposeOptions {
+}
+
+table ExpOptions {
+}
+
+table ReducerOptions {
+  keep_dims: bool;
+}
+
+table SqueezeOptions {
+  squeeze_dims:[int];
+}
+
+table SplitOptions {
+  num_splits: int;
+}
+
+table SplitVOptions {
+  num_splits: int;
+}
+
+table StridedSliceOptions {
+  begin_mask: int;
+  end_mask: int;
+  ellipsis_mask: int;
+  new_axis_mask: int;
+  shrink_axis_mask: int;
+}
+
+table LogSoftmaxOptions {
+}
+
+table CastOptions {
+  in_data_type: TensorType;
+  out_data_type: TensorType;
+}
+
+table DequantizeOptions {
+}
+
+table MaximumMinimumOptions {
+}
+
+table TileOptions {
+}
+
+table ArgMaxOptions {
+  output_type : TensorType;
+}
+
+table ArgMinOptions {
+  output_type : TensorType;
+}
+
+table GreaterOptions {
+}
+
+table GreaterEqualOptions {
+}
+
+table LessOptions {
+}
+
+table LessEqualOptions {
+}
+
+table NegOptions {
+}
+
+table SelectOptions {
+}
+
+table SliceOptions {
+}
+
+table TransposeConvOptions {
+  padding:Padding;
+  stride_w:int;
+  stride_h:int;
+}
+
+table ExpandDimsOptions {
+}
+
+table SparseToDenseOptions {
+  validate_indices:bool;
+}
+
+table EqualOptions {
+}
+
+table NotEqualOptions {
+}
+
+table ShapeOptions {
+  // Optional output type of the operation (int32 or int64). Defaults to int32.
+  out_type : TensorType;
+}
+
+table PowOptions {
+}
+
+table FakeQuantOptions {
+  // Parameters supported by version 1:
+  min:float;
+  max:float;
+  num_bits:int;
+
+  // Parameters supported by version 2:
+  narrow_range:bool;
+}
+
+table PackOptions {
+  values_count:int;
+  axis:int;
+}
+
+table LogicalOrOptions {
+}
+
+table OneHotOptions {
+  axis:int;
+}
+
+table AbsOptions {
+}
+
+
+table LogicalAndOptions {
+}
+
+table LogicalNotOptions {
+}
+
+table UnpackOptions {
+  num:int;
+  axis:int;
+}
+
+table FloorDivOptions {
+}
+
+table SquareOptions {
+}
+
+table ZerosLikeOptions {
+}
+
+table FillOptions {
+}
+
+table FloorModOptions {
+}
+
+table RangeOptions {
+}
+
+table LeakyReluOptions {
+  alpha:float;
+}
+
+table SquaredDifferenceOptions {
+}
+
+enum MirrorPadMode : byte {
+  // Doesn't include borders.
+  REFLECT = 0,
+  // Includes borders.
+  SYMMETRIC = 1,
+}
+
+table MirrorPadOptions {
+  mode:MirrorPadMode;
+}
+
+// An OperatorCode can be an enum value (BuiltinOperator) if the operator is a
+// builtin, or a string if the operator is custom.
+table OperatorCode {
+  builtin_code:BuiltinOperator;
+  custom_code:string;
+
+  // The version of the operator. The version need to be bumped whenever new
+  // parameters are introduced into an op.
+  version:int = 1;
+}
+
+enum CustomOptionsFormat : byte {
+  FLEXBUFFERS = 0,
+}
+
+// An operator takes tensors as inputs and outputs. The type of operation being
+// performed is determined by an index into the list of valid OperatorCodes,
+// while the specifics of each operations is configured using builtin_options
+// or custom_options.
+table Operator {
+  // Index into the operator_codes array. Using an integer here avoids
+  // complicate map lookups.
+  opcode_index:uint;
+
+  // Optional input and output tensors are indicated by -1.
+  inputs:[int];
+  outputs:[int];
+
+  builtin_options:BuiltinOptions;
+  custom_options:[ubyte];
+  custom_options_format:CustomOptionsFormat;
+
+  // A list of booleans indicating the input tensors which are being mutated by
+  // this operator.(e.g. used by RNN and LSTM).
+  // For example, if the "inputs" array refers to 5 tensors and the second and
+  // fifth are mutable variables, then this list will contain
+  // [false, true, false, false, true].
+  //
+  // If the list is empty, no variable is mutated in this operator.
+  // The list either has the same length as `inputs`, or is empty.
+  mutating_variable_inputs:[bool];
+}
+
+// The root type, defining a subgraph, which typically represents an entire
+// model.
+table SubGraph {
+  // A list of all tensors used in this subgraph.
+  tensors:[Tensor];
+
+  // Indices of the tensors that are inputs into this subgraph. Note this is
+  // the list of non-static tensors that feed into the subgraph for inference.
+  inputs:[int];
+
+  // Indices of the tensors that are outputs out of this subgraph. Note this is
+  // the list of output tensors that are considered the product of the
+  // subgraph's inference.
+  outputs:[int];
+
+  // All operators, in execution order.
+  operators:[Operator];
+
+  // Name of this subgraph (used for debugging).
+  name:string;
+}
+
+// Table of raw data buffers (used for constant tensors). Referenced by tensors
+// by index. The generous alignment accommodates mmap-friendly data structures.
+table Buffer {
+  data:[ubyte] (force_align: 16);
+}
+
+table Model {
+  // Version of the schema.
+  version:uint;
+
+  // A list of all operator codes used in this model. This is
+  // kept in order because operators carry an index into this
+  // vector.
+  operator_codes:[OperatorCode];
+
+  // All the subgraphs of the model. The 0th is assumed to be the main
+  // model.
+  subgraphs:[SubGraph];
+
+  // A description of the model.
+  description:string;
+
+  // Buffers of the model.
+  // Note the 0th entry of this array must be an empty buffer (sentinel).
+  // This is a convention so that tensors without a buffer can provide 0 as
+  // their buffer.
+  buffers:[Buffer];
+
+  // Metadata about the model.  Indirects into the existings buffers list.
+  metadata_buffer:[int];
+}
+
+root_type Model;
diff --git a/runtimes/neurun/frontend/tflite/schema_generated.h b/runtimes/neurun/frontend/tflite/schema_generated.h
new file mode 100644
index 000000000..4a11f9a7a
--- /dev/null
+++ b/runtimes/neurun/frontend/tflite/schema_generated.h
@@ -0,0 +1,7272 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+// automatically generated by the FlatBuffers compiler, do not modify
+
+#ifndef FLATBUFFERS_GENERATED_SCHEMA_TFLITE_H_
+#define FLATBUFFERS_GENERATED_SCHEMA_TFLITE_H_
+
+#include "flatbuffers/flatbuffers.h"
+
+namespace tflite
+{
+
+struct CustomQuantization;
+
+struct QuantizationParameters;
+
+struct Tensor;
+
+struct Conv2DOptions;
+
+struct Pool2DOptions;
+
+struct DepthwiseConv2DOptions;
+
+struct ConcatEmbeddingsOptions;
+
+struct LSHProjectionOptions;
+
+struct SVDFOptions;
+
+struct RNNOptions;
+
+struct SequenceRNNOptions;
+
+struct BidirectionalSequenceRNNOptions;
+
+struct FullyConnectedOptions;
+
+struct SoftmaxOptions;
+
+struct ConcatenationOptions;
+
+struct AddOptions;
+
+struct MulOptions;
+
+struct L2NormOptions;
+
+struct LocalResponseNormalizationOptions;
+
+struct LSTMOptions;
+
+struct UnidirectionalSequenceLSTMOptions;
+
+struct BidirectionalSequenceLSTMOptions;
+
+struct ResizeBilinearOptions;
+
+struct ResizeNearestNeighborOptions;
+
+struct CallOptions;
+
+struct PadOptions;
+
+struct PadV2Options;
+
+struct ReshapeOptions;
+
+struct SpaceToBatchNDOptions;
+
+struct BatchToSpaceNDOptions;
+
+struct SkipGramOptions;
+
+struct SpaceToDepthOptions;
+
+struct SubOptions;
+
+struct DivOptions;
+
+struct TopKV2Options;
+
+struct EmbeddingLookupSparseOptions;
+
+struct GatherOptions;
+
+struct TransposeOptions;
+
+struct ExpOptions;
+
+struct ReducerOptions;
+
+struct SqueezeOptions;
+
+struct SplitOptions;
+
+struct SplitVOptions;
+
+struct StridedSliceOptions;
+
+struct LogSoftmaxOptions;
+
+struct CastOptions;
+
+struct DequantizeOptions;
+
+struct MaximumMinimumOptions;
+
+struct TileOptions;
+
+struct ArgMaxOptions;
+
+struct ArgMinOptions;
+
+struct GreaterOptions;
+
+struct GreaterEqualOptions;
+
+struct LessOptions;
+
+struct LessEqualOptions;
+
+struct NegOptions;
+
+struct SelectOptions;
+
+struct SliceOptions;
+
+struct TransposeConvOptions;
+
+struct ExpandDimsOptions;
+
+struct SparseToDenseOptions;
+
+struct EqualOptions;
+
+struct NotEqualOptions;
+
+struct ShapeOptions;
+
+struct PowOptions;
+
+struct FakeQuantOptions;
+
+struct PackOptions;
+
+struct LogicalOrOptions;
+
+struct OneHotOptions;
+
+struct AbsOptions;
+
+struct LogicalAndOptions;
+
+struct LogicalNotOptions;
+
+struct UnpackOptions;
+
+struct FloorDivOptions;
+
+struct SquareOptions;
+
+struct ZerosLikeOptions;
+
+struct FillOptions;
+
+struct FloorModOptions;
+
+struct RangeOptions;
+
+struct LeakyReluOptions;
+
+struct SquaredDifferenceOptions;
+
+struct MirrorPadOptions;
+
+struct OperatorCode;
+
+struct Operator;
+
+struct SubGraph;
+
+struct Buffer;
+
+struct Model;
+
+enum TensorType
+{
+  TensorType_FLOAT32 = 0,
+  TensorType_FLOAT16 = 1,
+  TensorType_INT32 = 2,
+  TensorType_UINT8 = 3,
+  TensorType_INT64 = 4,
+  TensorType_STRING = 5,
+  TensorType_BOOL = 6,
+  TensorType_INT16 = 7,
+  TensorType_COMPLEX64 = 8,
+  TensorType_INT8 = 9,
+  TensorType_MIN = TensorType_FLOAT32,
+  TensorType_MAX = TensorType_INT8
+};
+
+inline const TensorType (&EnumValuesTensorType())[10]
+{
+  static const TensorType values[] = {TensorType_FLOAT32, TensorType_FLOAT16, TensorType_INT32,
+                                      TensorType_UINT8,   TensorType_INT64,   TensorType_STRING,
+                                      TensorType_BOOL,    TensorType_INT16,   TensorType_COMPLEX64,
+                                      TensorType_INT8};
+  return values;
+}
+
+inline const char *const *EnumNamesTensorType()
+{
+  static const char *const names[] = {"FLOAT32", "FLOAT16", "INT32",     "UINT8", "INT64", "STRING",
+                                      "BOOL",    "INT16",   "COMPLEX64", "INT8",  nullptr};
+  return names;
+}
+
+inline const char *EnumNameTensorType(TensorType e)
+{
+  const size_t index = static_cast<int>(e);
+  return EnumNamesTensorType()[index];
+}
+
+enum QuantizationDetails
+{
+  QuantizationDetails_NONE = 0,
+  QuantizationDetails_CustomQuantization = 1,
+  QuantizationDetails_MIN = QuantizationDetails_NONE,
+  QuantizationDetails_MAX = QuantizationDetails_CustomQuantization
+};
+
+inline const QuantizationDetails (&EnumValuesQuantizationDetails())[2]
+{
+  static const QuantizationDetails values[] = {QuantizationDetails_NONE,
+                                               QuantizationDetails_CustomQuantization};
+  return values;
+}
+
+inline const char *const *EnumNamesQuantizationDetails()
+{
+  static const char *const names[] = {"NONE", "CustomQuantization", nullptr};
+  return names;
+}
+
+inline const char *EnumNameQuantizationDetails(QuantizationDetails e)
+{
+  const size_t index = static_cast<int>(e);
+  return EnumNamesQuantizationDetails()[index];
+}
+
+template <typename T> struct QuantizationDetailsTraits
+{
+  static const QuantizationDetails enum_value = QuantizationDetails_NONE;
+};
+
+template <> struct QuantizationDetailsTraits<CustomQuantization>
+{
+  static const QuantizationDetails enum_value = QuantizationDetails_CustomQuantization;
+};
+
+bool VerifyQuantizationDetails(flatbuffers::Verifier &verifier, const void *obj,
+                               QuantizationDetails type);
+bool VerifyQuantizationDetailsVector(flatbuffers::Verifier &verifier,
+                                     const flatbuffers::Vector<flatbuffers::Offset<void>> *values,
+                                     const flatbuffers::Vector<uint8_t> *types);
+
+enum BuiltinOperator
+{
+  BuiltinOperator_ADD = 0,
+  BuiltinOperator_AVERAGE_POOL_2D = 1,
+  BuiltinOperator_CONCATENATION = 2,
+  BuiltinOperator_CONV_2D = 3,
+  BuiltinOperator_DEPTHWISE_CONV_2D = 4,
+  BuiltinOperator_DEQUANTIZE = 6,
+  BuiltinOperator_EMBEDDING_LOOKUP = 7,
+  BuiltinOperator_FLOOR = 8,
+  BuiltinOperator_FULLY_CONNECTED = 9,
+  BuiltinOperator_HASHTABLE_LOOKUP = 10,
+  BuiltinOperator_L2_NORMALIZATION = 11,
+  BuiltinOperator_L2_POOL_2D = 12,
+  BuiltinOperator_LOCAL_RESPONSE_NORMALIZATION = 13,
+  BuiltinOperator_LOGISTIC = 14,
+  BuiltinOperator_LSH_PROJECTION = 15,
+  BuiltinOperator_LSTM = 16,
+  BuiltinOperator_MAX_POOL_2D = 17,
+  BuiltinOperator_MUL = 18,
+  BuiltinOperator_RELU = 19,
+  BuiltinOperator_RELU_N1_TO_1 = 20,
+  BuiltinOperator_RELU6 = 21,
+  BuiltinOperator_RESHAPE = 22,
+  BuiltinOperator_RESIZE_BILINEAR = 23,
+  BuiltinOperator_RNN = 24,
+  BuiltinOperator_SOFTMAX = 25,
+  BuiltinOperator_SPACE_TO_DEPTH = 26,
+  BuiltinOperator_SVDF = 27,
+  BuiltinOperator_TANH = 28,
+  BuiltinOperator_CONCAT_EMBEDDINGS = 29,
+  BuiltinOperator_SKIP_GRAM = 30,
+  BuiltinOperator_CALL = 31,
+  BuiltinOperator_CUSTOM = 32,
+  BuiltinOperator_EMBEDDING_LOOKUP_SPARSE = 33,
+  BuiltinOperator_PAD = 34,
+  BuiltinOperator_UNIDIRECTIONAL_SEQUENCE_RNN = 35,
+  BuiltinOperator_GATHER = 36,
+  BuiltinOperator_BATCH_TO_SPACE_ND = 37,
+  BuiltinOperator_SPACE_TO_BATCH_ND = 38,
+  BuiltinOperator_TRANSPOSE = 39,
+  BuiltinOperator_MEAN = 40,
+  BuiltinOperator_SUB = 41,
+  BuiltinOperator_DIV = 42,
+  BuiltinOperator_SQUEEZE = 43,
+  BuiltinOperator_UNIDIRECTIONAL_SEQUENCE_LSTM = 44,
+  BuiltinOperator_STRIDED_SLICE = 45,
+  BuiltinOperator_BIDIRECTIONAL_SEQUENCE_RNN = 46,
+  BuiltinOperator_EXP = 47,
+  BuiltinOperator_TOPK_V2 = 48,
+  BuiltinOperator_SPLIT = 49,
+  BuiltinOperator_LOG_SOFTMAX = 50,
+  BuiltinOperator_DELEGATE = 51,
+  BuiltinOperator_BIDIRECTIONAL_SEQUENCE_LSTM = 52,
+  BuiltinOperator_CAST = 53,
+  BuiltinOperator_PRELU = 54,
+  BuiltinOperator_MAXIMUM = 55,
+  BuiltinOperator_ARG_MAX = 56,
+  BuiltinOperator_MINIMUM = 57,
+  BuiltinOperator_LESS = 58,
+  BuiltinOperator_NEG = 59,
+  BuiltinOperator_PADV2 = 60,
+  BuiltinOperator_GREATER = 61,
+  BuiltinOperator_GREATER_EQUAL = 62,
+  BuiltinOperator_LESS_EQUAL = 63,
+  BuiltinOperator_SELECT = 64,
+  BuiltinOperator_SLICE = 65,
+  BuiltinOperator_SIN = 66,
+  BuiltinOperator_TRANSPOSE_CONV = 67,
+  BuiltinOperator_SPARSE_TO_DENSE = 68,
+  BuiltinOperator_TILE = 69,
+  BuiltinOperator_EXPAND_DIMS = 70,
+  BuiltinOperator_EQUAL = 71,
+  BuiltinOperator_NOT_EQUAL = 72,
+  BuiltinOperator_LOG = 73,
+  BuiltinOperator_SUM = 74,
+  BuiltinOperator_SQRT = 75,
+  BuiltinOperator_RSQRT = 76,
+  BuiltinOperator_SHAPE = 77,
+  BuiltinOperator_POW = 78,
+  BuiltinOperator_ARG_MIN = 79,
+  BuiltinOperator_FAKE_QUANT = 80,
+  BuiltinOperator_REDUCE_PROD = 81,
+  BuiltinOperator_REDUCE_MAX = 82,
+  BuiltinOperator_PACK = 83,
+  BuiltinOperator_LOGICAL_OR = 84,
+  BuiltinOperator_ONE_HOT = 85,
+  BuiltinOperator_LOGICAL_AND = 86,
+  BuiltinOperator_LOGICAL_NOT = 87,
+  BuiltinOperator_UNPACK = 88,
+  BuiltinOperator_REDUCE_MIN = 89,
+  BuiltinOperator_FLOOR_DIV = 90,
+  BuiltinOperator_REDUCE_ANY = 91,
+  BuiltinOperator_SQUARE = 92,
+  BuiltinOperator_ZEROS_LIKE = 93,
+  BuiltinOperator_FILL = 94,
+  BuiltinOperator_FLOOR_MOD = 95,
+  BuiltinOperator_RANGE = 96,
+  BuiltinOperator_RESIZE_NEAREST_NEIGHBOR = 97,
+  BuiltinOperator_LEAKY_RELU = 98,
+  BuiltinOperator_SQUARED_DIFFERENCE = 99,
+  BuiltinOperator_MIRROR_PAD = 100,
+  BuiltinOperator_ABS = 101,
+  BuiltinOperator_SPLIT_V = 102,
+  BuiltinOperator_MIN = BuiltinOperator_ADD,
+  BuiltinOperator_MAX = BuiltinOperator_SPLIT_V
+};
+
+inline const BuiltinOperator (&EnumValuesBuiltinOperator())[102]
+{
+  static const BuiltinOperator values[] = {BuiltinOperator_ADD,
+                                           BuiltinOperator_AVERAGE_POOL_2D,
+                                           BuiltinOperator_CONCATENATION,
+                                           BuiltinOperator_CONV_2D,
+                                           BuiltinOperator_DEPTHWISE_CONV_2D,
+                                           BuiltinOperator_DEQUANTIZE,
+                                           BuiltinOperator_EMBEDDING_LOOKUP,
+                                           BuiltinOperator_FLOOR,
+                                           BuiltinOperator_FULLY_CONNECTED,
+                                           BuiltinOperator_HASHTABLE_LOOKUP,
+                                           BuiltinOperator_L2_NORMALIZATION,
+                                           BuiltinOperator_L2_POOL_2D,
+                                           BuiltinOperator_LOCAL_RESPONSE_NORMALIZATION,
+                                           BuiltinOperator_LOGISTIC,
+                                           BuiltinOperator_LSH_PROJECTION,
+                                           BuiltinOperator_LSTM,
+                                           BuiltinOperator_MAX_POOL_2D,
+                                           BuiltinOperator_MUL,
+                                           BuiltinOperator_RELU,
+                                           BuiltinOperator_RELU_N1_TO_1,
+                                           BuiltinOperator_RELU6,
+                                           BuiltinOperator_RESHAPE,
+                                           BuiltinOperator_RESIZE_BILINEAR,
+                                           BuiltinOperator_RNN,
+                                           BuiltinOperator_SOFTMAX,
+                                           BuiltinOperator_SPACE_TO_DEPTH,
+                                           BuiltinOperator_SVDF,
+                                           BuiltinOperator_TANH,
+                                           BuiltinOperator_CONCAT_EMBEDDINGS,
+                                           BuiltinOperator_SKIP_GRAM,
+                                           BuiltinOperator_CALL,
+                                           BuiltinOperator_CUSTOM,
+                                           BuiltinOperator_EMBEDDING_LOOKUP_SPARSE,
+                                           BuiltinOperator_PAD,
+                                           BuiltinOperator_UNIDIRECTIONAL_SEQUENCE_RNN,
+                                           BuiltinOperator_GATHER,
+                                           BuiltinOperator_BATCH_TO_SPACE_ND,
+                                           BuiltinOperator_SPACE_TO_BATCH_ND,
+                                           BuiltinOperator_TRANSPOSE,
+                                           BuiltinOperator_MEAN,
+                                           BuiltinOperator_SUB,
+                                           BuiltinOperator_DIV,
+                                           BuiltinOperator_SQUEEZE,
+                                           BuiltinOperator_UNIDIRECTIONAL_SEQUENCE_LSTM,
+                                           BuiltinOperator_STRIDED_SLICE,
+                                           BuiltinOperator_BIDIRECTIONAL_SEQUENCE_RNN,
+                                           BuiltinOperator_EXP,
+                                           BuiltinOperator_TOPK_V2,
+                                           BuiltinOperator_SPLIT,
+                                           BuiltinOperator_LOG_SOFTMAX,
+                                           BuiltinOperator_DELEGATE,
+                                           BuiltinOperator_BIDIRECTIONAL_SEQUENCE_LSTM,
+                                           BuiltinOperator_CAST,
+                                           BuiltinOperator_PRELU,
+                                           BuiltinOperator_MAXIMUM,
+                                           BuiltinOperator_ARG_MAX,
+                                           BuiltinOperator_MINIMUM,
+                                           BuiltinOperator_LESS,
+                                           BuiltinOperator_NEG,
+                                           BuiltinOperator_PADV2,
+                                           BuiltinOperator_GREATER,
+                                           BuiltinOperator_GREATER_EQUAL,
+                                           BuiltinOperator_LESS_EQUAL,
+                                           BuiltinOperator_SELECT,
+                                           BuiltinOperator_SLICE,
+                                           BuiltinOperator_SIN,
+                                           BuiltinOperator_TRANSPOSE_CONV,
+                                           BuiltinOperator_SPARSE_TO_DENSE,
+                                           BuiltinOperator_TILE,
+                                           BuiltinOperator_EXPAND_DIMS,
+                                           BuiltinOperator_EQUAL,
+                                           BuiltinOperator_NOT_EQUAL,
+                                           BuiltinOperator_LOG,
+                                           BuiltinOperator_SUM,
+                                           BuiltinOperator_SQRT,
+                                           BuiltinOperator_RSQRT,
+                                           BuiltinOperator_SHAPE,
+                                           BuiltinOperator_POW,
+                                           BuiltinOperator_ARG_MIN,
+                                           BuiltinOperator_FAKE_QUANT,
+                                           BuiltinOperator_REDUCE_PROD,
+                                           BuiltinOperator_REDUCE_MAX,
+                                           BuiltinOperator_PACK,
+                                           BuiltinOperator_LOGICAL_OR,
+                                           BuiltinOperator_ONE_HOT,
+                                           BuiltinOperator_LOGICAL_AND,
+                                           BuiltinOperator_LOGICAL_NOT,
+                                           BuiltinOperator_UNPACK,
+                                           BuiltinOperator_REDUCE_MIN,
+                                           BuiltinOperator_FLOOR_DIV,
+                                           BuiltinOperator_REDUCE_ANY,
+                                           BuiltinOperator_SQUARE,
+                                           BuiltinOperator_ZEROS_LIKE,
+                                           BuiltinOperator_FILL,
+                                           BuiltinOperator_FLOOR_MOD,
+                                           BuiltinOperator_RANGE,
+                                           BuiltinOperator_RESIZE_NEAREST_NEIGHBOR,
+                                           BuiltinOperator_LEAKY_RELU,
+                                           BuiltinOperator_SQUARED_DIFFERENCE,
+                                           BuiltinOperator_MIRROR_PAD,
+                                           BuiltinOperator_ABS,
+                                           BuiltinOperator_SPLIT_V};
+  return values;
+}
+
+inline const char *const *EnumNamesBuiltinOperator()
+{
+  static const char *const names[] = {"ADD",
+                                      "AVERAGE_POOL_2D",
+                                      "CONCATENATION",
+                                      "CONV_2D",
+                                      "DEPTHWISE_CONV_2D",
+                                      "",
+                                      "DEQUANTIZE",
+                                      "EMBEDDING_LOOKUP",
+                                      "FLOOR",
+                                      "FULLY_CONNECTED",
+                                      "HASHTABLE_LOOKUP",
+                                      "L2_NORMALIZATION",
+                                      "L2_POOL_2D",
+                                      "LOCAL_RESPONSE_NORMALIZATION",
+                                      "LOGISTIC",
+                                      "LSH_PROJECTION",
+                                      "LSTM",
+                                      "MAX_POOL_2D",
+                                      "MUL",
+                                      "RELU",
+                                      "RELU_N1_TO_1",
+                                      "RELU6",
+                                      "RESHAPE",
+                                      "RESIZE_BILINEAR",
+                                      "RNN",
+                                      "SOFTMAX",
+                                      "SPACE_TO_DEPTH",
+                                      "SVDF",
+                                      "TANH",
+                                      "CONCAT_EMBEDDINGS",
+                                      "SKIP_GRAM",
+                                      "CALL",
+                                      "CUSTOM",
+                                      "EMBEDDING_LOOKUP_SPARSE",
+                                      "PAD",
+                                      "UNIDIRECTIONAL_SEQUENCE_RNN",
+                                      "GATHER",
+                                      "BATCH_TO_SPACE_ND",
+                                      "SPACE_TO_BATCH_ND",
+                                      "TRANSPOSE",
+                                      "MEAN",
+                                      "SUB",
+                                      "DIV",
+                                      "SQUEEZE",
+                                      "UNIDIRECTIONAL_SEQUENCE_LSTM",
+                                      "STRIDED_SLICE",
+                                      "BIDIRECTIONAL_SEQUENCE_RNN",
+                                      "EXP",
+                                      "TOPK_V2",
+                                      "SPLIT",
+                                      "LOG_SOFTMAX",
+                                      "DELEGATE",
+                                      "BIDIRECTIONAL_SEQUENCE_LSTM",
+                                      "CAST",
+                                      "PRELU",
+                                      "MAXIMUM",
+                                      "ARG_MAX",
+                                      "MINIMUM",
+                                      "LESS",
+                                      "NEG",
+                                      "PADV2",
+                                      "GREATER",
+                                      "GREATER_EQUAL",
+                                      "LESS_EQUAL",
+                                      "SELECT",
+                                      "SLICE",
+                                      "SIN",
+                                      "TRANSPOSE_CONV",
+                                      "SPARSE_TO_DENSE",
+                                      "TILE",
+                                      "EXPAND_DIMS",
+                                      "EQUAL",
+                                      "NOT_EQUAL",
+                                      "LOG",
+                                      "SUM",
+                                      "SQRT",
+                                      "RSQRT",
+                                      "SHAPE",
+                                      "POW",
+                                      "ARG_MIN",
+                                      "FAKE_QUANT",
+                                      "REDUCE_PROD",
+                                      "REDUCE_MAX",
+                                      "PACK",
+                                      "LOGICAL_OR",
+                                      "ONE_HOT",
+                                      "LOGICAL_AND",
+                                      "LOGICAL_NOT",
+                                      "UNPACK",
+                                      "REDUCE_MIN",
+                                      "FLOOR_DIV",
+                                      "REDUCE_ANY",
+                                      "SQUARE",
+                                      "ZEROS_LIKE",
+                                      "FILL",
+                                      "FLOOR_MOD",
+                                      "RANGE",
+                                      "RESIZE_NEAREST_NEIGHBOR",
+                                      "LEAKY_RELU",
+                                      "SQUARED_DIFFERENCE",
+                                      "MIRROR_PAD",
+                                      "ABS",
+                                      "SPLIT_V",
+                                      nullptr};
+  return names;
+}
+
+inline const char *EnumNameBuiltinOperator(BuiltinOperator e)
+{
+  const size_t index = static_cast<int>(e);
+  return EnumNamesBuiltinOperator()[index];
+}
+
+enum BuiltinOptions
+{
+  BuiltinOptions_NONE = 0,
+  BuiltinOptions_Conv2DOptions = 1,
+  BuiltinOptions_DepthwiseConv2DOptions = 2,
+  BuiltinOptions_ConcatEmbeddingsOptions = 3,
+  BuiltinOptions_LSHProjectionOptions = 4,
+  BuiltinOptions_Pool2DOptions = 5,
+  BuiltinOptions_SVDFOptions = 6,
+  BuiltinOptions_RNNOptions = 7,
+  BuiltinOptions_FullyConnectedOptions = 8,
+  BuiltinOptions_SoftmaxOptions = 9,
+  BuiltinOptions_ConcatenationOptions = 10,
+  BuiltinOptions_AddOptions = 11,
+  BuiltinOptions_L2NormOptions = 12,
+  BuiltinOptions_LocalResponseNormalizationOptions = 13,
+  BuiltinOptions_LSTMOptions = 14,
+  BuiltinOptions_ResizeBilinearOptions = 15,
+  BuiltinOptions_CallOptions = 16,
+  BuiltinOptions_ReshapeOptions = 17,
+  BuiltinOptions_SkipGramOptions = 18,
+  BuiltinOptions_SpaceToDepthOptions = 19,
+  BuiltinOptions_EmbeddingLookupSparseOptions = 20,
+  BuiltinOptions_MulOptions = 21,
+  BuiltinOptions_PadOptions = 22,
+  BuiltinOptions_GatherOptions = 23,
+  BuiltinOptions_BatchToSpaceNDOptions = 24,
+  BuiltinOptions_SpaceToBatchNDOptions = 25,
+  BuiltinOptions_TransposeOptions = 26,
+  BuiltinOptions_ReducerOptions = 27,
+  BuiltinOptions_SubOptions = 28,
+  BuiltinOptions_DivOptions = 29,
+  BuiltinOptions_SqueezeOptions = 30,
+  BuiltinOptions_SequenceRNNOptions = 31,
+  BuiltinOptions_StridedSliceOptions = 32,
+  BuiltinOptions_ExpOptions = 33,
+  BuiltinOptions_TopKV2Options = 34,
+  BuiltinOptions_SplitOptions = 35,
+  BuiltinOptions_LogSoftmaxOptions = 36,
+  BuiltinOptions_CastOptions = 37,
+  BuiltinOptions_DequantizeOptions = 38,
+  BuiltinOptions_MaximumMinimumOptions = 39,
+  BuiltinOptions_ArgMaxOptions = 40,
+  BuiltinOptions_LessOptions = 41,
+  BuiltinOptions_NegOptions = 42,
+  BuiltinOptions_PadV2Options = 43,
+  BuiltinOptions_GreaterOptions = 44,
+  BuiltinOptions_GreaterEqualOptions = 45,
+  BuiltinOptions_LessEqualOptions = 46,
+  BuiltinOptions_SelectOptions = 47,
+  BuiltinOptions_SliceOptions = 48,
+  BuiltinOptions_TransposeConvOptions = 49,
+  BuiltinOptions_SparseToDenseOptions = 50,
+  BuiltinOptions_TileOptions = 51,
+  BuiltinOptions_ExpandDimsOptions = 52,
+  BuiltinOptions_EqualOptions = 53,
+  BuiltinOptions_NotEqualOptions = 54,
+  BuiltinOptions_ShapeOptions = 55,
+  BuiltinOptions_PowOptions = 56,
+  BuiltinOptions_ArgMinOptions = 57,
+  BuiltinOptions_FakeQuantOptions = 58,
+  BuiltinOptions_PackOptions = 59,
+  BuiltinOptions_LogicalOrOptions = 60,
+  BuiltinOptions_OneHotOptions = 61,
+  BuiltinOptions_LogicalAndOptions = 62,
+  BuiltinOptions_LogicalNotOptions = 63,
+  BuiltinOptions_UnpackOptions = 64,
+  BuiltinOptions_FloorDivOptions = 65,
+  BuiltinOptions_SquareOptions = 66,
+  BuiltinOptions_ZerosLikeOptions = 67,
+  BuiltinOptions_FillOptions = 68,
+  BuiltinOptions_BidirectionalSequenceLSTMOptions = 69,
+  BuiltinOptions_BidirectionalSequenceRNNOptions = 70,
+  BuiltinOptions_UnidirectionalSequenceLSTMOptions = 71,
+  BuiltinOptions_FloorModOptions = 72,
+  BuiltinOptions_RangeOptions = 73,
+  BuiltinOptions_ResizeNearestNeighborOptions = 74,
+  BuiltinOptions_LeakyReluOptions = 75,
+  BuiltinOptions_SquaredDifferenceOptions = 76,
+  BuiltinOptions_MirrorPadOptions = 77,
+  BuiltinOptions_AbsOptions = 78,
+  BuiltinOptions_SplitVOptions = 79,
+  BuiltinOptions_MIN = BuiltinOptions_NONE,
+  BuiltinOptions_MAX = BuiltinOptions_SplitVOptions
+};
+
+inline const BuiltinOptions (&EnumValuesBuiltinOptions())[80]
+{
+  static const BuiltinOptions values[] = {BuiltinOptions_NONE,
+                                          BuiltinOptions_Conv2DOptions,
+                                          BuiltinOptions_DepthwiseConv2DOptions,
+                                          BuiltinOptions_ConcatEmbeddingsOptions,
+                                          BuiltinOptions_LSHProjectionOptions,
+                                          BuiltinOptions_Pool2DOptions,
+                                          BuiltinOptions_SVDFOptions,
+                                          BuiltinOptions_RNNOptions,
+                                          BuiltinOptions_FullyConnectedOptions,
+                                          BuiltinOptions_SoftmaxOptions,
+                                          BuiltinOptions_ConcatenationOptions,
+                                          BuiltinOptions_AddOptions,
+                                          BuiltinOptions_L2NormOptions,
+                                          BuiltinOptions_LocalResponseNormalizationOptions,
+                                          BuiltinOptions_LSTMOptions,
+                                          BuiltinOptions_ResizeBilinearOptions,
+                                          BuiltinOptions_CallOptions,
+                                          BuiltinOptions_ReshapeOptions,
+                                          BuiltinOptions_SkipGramOptions,
+                                          BuiltinOptions_SpaceToDepthOptions,
+                                          BuiltinOptions_EmbeddingLookupSparseOptions,
+                                          BuiltinOptions_MulOptions,
+                                          BuiltinOptions_PadOptions,
+                                          BuiltinOptions_GatherOptions,
+                                          BuiltinOptions_BatchToSpaceNDOptions,
+                                          BuiltinOptions_SpaceToBatchNDOptions,
+                                          BuiltinOptions_TransposeOptions,
+                                          BuiltinOptions_ReducerOptions,
+                                          BuiltinOptions_SubOptions,
+                                          BuiltinOptions_DivOptions,
+                                          BuiltinOptions_SqueezeOptions,
+                                          BuiltinOptions_SequenceRNNOptions,
+                                          BuiltinOptions_StridedSliceOptions,
+                                          BuiltinOptions_ExpOptions,
+                                          BuiltinOptions_TopKV2Options,
+                                          BuiltinOptions_SplitOptions,
+                                          BuiltinOptions_LogSoftmaxOptions,
+                                          BuiltinOptions_CastOptions,
+                                          BuiltinOptions_DequantizeOptions,
+                                          BuiltinOptions_MaximumMinimumOptions,
+                                          BuiltinOptions_ArgMaxOptions,
+                                          BuiltinOptions_LessOptions,
+                                          BuiltinOptions_NegOptions,
+                                          BuiltinOptions_PadV2Options,
+                                          BuiltinOptions_GreaterOptions,
+                                          BuiltinOptions_GreaterEqualOptions,
+                                          BuiltinOptions_LessEqualOptions,
+                                          BuiltinOptions_SelectOptions,
+                                          BuiltinOptions_SliceOptions,
+                                          BuiltinOptions_TransposeConvOptions,
+                                          BuiltinOptions_SparseToDenseOptions,
+                                          BuiltinOptions_TileOptions,
+                                          BuiltinOptions_ExpandDimsOptions,
+                                          BuiltinOptions_EqualOptions,
+                                          BuiltinOptions_NotEqualOptions,
+                                          BuiltinOptions_ShapeOptions,
+                                          BuiltinOptions_PowOptions,
+                                          BuiltinOptions_ArgMinOptions,
+                                          BuiltinOptions_FakeQuantOptions,
+                                          BuiltinOptions_PackOptions,
+                                          BuiltinOptions_LogicalOrOptions,
+                                          BuiltinOptions_OneHotOptions,
+                                          BuiltinOptions_LogicalAndOptions,
+                                          BuiltinOptions_LogicalNotOptions,
+                                          BuiltinOptions_UnpackOptions,
+                                          BuiltinOptions_FloorDivOptions,
+                                          BuiltinOptions_SquareOptions,
+                                          BuiltinOptions_ZerosLikeOptions,
+                                          BuiltinOptions_FillOptions,
+                                          BuiltinOptions_BidirectionalSequenceLSTMOptions,
+                                          BuiltinOptions_BidirectionalSequenceRNNOptions,
+                                          BuiltinOptions_UnidirectionalSequenceLSTMOptions,
+                                          BuiltinOptions_FloorModOptions,
+                                          BuiltinOptions_RangeOptions,
+                                          BuiltinOptions_ResizeNearestNeighborOptions,
+                                          BuiltinOptions_LeakyReluOptions,
+                                          BuiltinOptions_SquaredDifferenceOptions,
+                                          BuiltinOptions_MirrorPadOptions,
+                                          BuiltinOptions_AbsOptions,
+                                          BuiltinOptions_SplitVOptions};
+  return values;
+}
+
+inline const char *const *EnumNamesBuiltinOptions()
+{
+  static const char *const names[] = {"NONE",
+                                      "Conv2DOptions",
+                                      "DepthwiseConv2DOptions",
+                                      "ConcatEmbeddingsOptions",
+                                      "LSHProjectionOptions",
+                                      "Pool2DOptions",
+                                      "SVDFOptions",
+                                      "RNNOptions",
+                                      "FullyConnectedOptions",
+                                      "SoftmaxOptions",
+                                      "ConcatenationOptions",
+                                      "AddOptions",
+                                      "L2NormOptions",
+                                      "LocalResponseNormalizationOptions",
+                                      "LSTMOptions",
+                                      "ResizeBilinearOptions",
+                                      "CallOptions",
+                                      "ReshapeOptions",
+                                      "SkipGramOptions",
+                                      "SpaceToDepthOptions",
+                                      "EmbeddingLookupSparseOptions",
+                                      "MulOptions",
+                                      "PadOptions",
+                                      "GatherOptions",
+                                      "BatchToSpaceNDOptions",
+                                      "SpaceToBatchNDOptions",
+                                      "TransposeOptions",
+                                      "ReducerOptions",
+                                      "SubOptions",
+                                      "DivOptions",
+                                      "SqueezeOptions",
+                                      "SequenceRNNOptions",
+                                      "StridedSliceOptions",
+                                      "ExpOptions",
+                                      "TopKV2Options",
+                                      "SplitOptions",
+                                      "LogSoftmaxOptions",
+                                      "CastOptions",
+                                      "DequantizeOptions",
+                                      "MaximumMinimumOptions",
+                                      "ArgMaxOptions",
+                                      "LessOptions",
+                                      "NegOptions",
+                                      "PadV2Options",
+                                      "GreaterOptions",
+                                      "GreaterEqualOptions",
+                                      "LessEqualOptions",
+                                      "SelectOptions",
+                                      "SliceOptions",
+                                      "TransposeConvOptions",
+                                      "SparseToDenseOptions",
+                                      "TileOptions",
+                                      "ExpandDimsOptions",
+                                      "EqualOptions",
+                                      "NotEqualOptions",
+                                      "ShapeOptions",
+                                      "PowOptions",
+                                      "ArgMinOptions",
+                                      "FakeQuantOptions",
+                                      "PackOptions",
+                                      "LogicalOrOptions",
+                                      "OneHotOptions",
+                                      "LogicalAndOptions",
+                                      "LogicalNotOptions",
+                                      "UnpackOptions",
+                                      "FloorDivOptions",
+                                      "SquareOptions",
+                                      "ZerosLikeOptions",
+                                      "FillOptions",
+                                      "BidirectionalSequenceLSTMOptions",
+                                      "BidirectionalSequenceRNNOptions",
+                                      "UnidirectionalSequenceLSTMOptions",
+                                      "FloorModOptions",
+                                      "RangeOptions",
+                                      "ResizeNearestNeighborOptions",
+                                      "LeakyReluOptions",
+                                      "SquaredDifferenceOptions",
+                                      "MirrorPadOptions",
+                                      "AbsOptions",
+                                      "SplitVOptions",
+                                      nullptr};
+  return names;
+}
+
+inline const char *EnumNameBuiltinOptions(BuiltinOptions e)
+{
+  const size_t index = static_cast<int>(e);
+  return EnumNamesBuiltinOptions()[index];
+}
+
+template <typename T> struct BuiltinOptionsTraits
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_NONE;
+};
+
+template <> struct BuiltinOptionsTraits<Conv2DOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_Conv2DOptions;
+};
+
+template <> struct BuiltinOptionsTraits<DepthwiseConv2DOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_DepthwiseConv2DOptions;
+};
+
+template <> struct BuiltinOptionsTraits<ConcatEmbeddingsOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_ConcatEmbeddingsOptions;
+};
+
+template <> struct BuiltinOptionsTraits<LSHProjectionOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_LSHProjectionOptions;
+};
+
+template <> struct BuiltinOptionsTraits<Pool2DOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_Pool2DOptions;
+};
+
+template <> struct BuiltinOptionsTraits<SVDFOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_SVDFOptions;
+};
+
+template <> struct BuiltinOptionsTraits<RNNOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_RNNOptions;
+};
+
+template <> struct BuiltinOptionsTraits<FullyConnectedOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_FullyConnectedOptions;
+};
+
+template <> struct BuiltinOptionsTraits<SoftmaxOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_SoftmaxOptions;
+};
+
+template <> struct BuiltinOptionsTraits<ConcatenationOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_ConcatenationOptions;
+};
+
+template <> struct BuiltinOptionsTraits<AddOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_AddOptions;
+};
+
+template <> struct BuiltinOptionsTraits<L2NormOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_L2NormOptions;
+};
+
+template <> struct BuiltinOptionsTraits<LocalResponseNormalizationOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_LocalResponseNormalizationOptions;
+};
+
+template <> struct BuiltinOptionsTraits<LSTMOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_LSTMOptions;
+};
+
+template <> struct BuiltinOptionsTraits<ResizeBilinearOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_ResizeBilinearOptions;
+};
+
+template <> struct BuiltinOptionsTraits<CallOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_CallOptions;
+};
+
+template <> struct BuiltinOptionsTraits<ReshapeOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_ReshapeOptions;
+};
+
+template <> struct BuiltinOptionsTraits<SkipGramOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_SkipGramOptions;
+};
+
+template <> struct BuiltinOptionsTraits<SpaceToDepthOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_SpaceToDepthOptions;
+};
+
+template <> struct BuiltinOptionsTraits<EmbeddingLookupSparseOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_EmbeddingLookupSparseOptions;
+};
+
+template <> struct BuiltinOptionsTraits<MulOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_MulOptions;
+};
+
+template <> struct BuiltinOptionsTraits<PadOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_PadOptions;
+};
+
+template <> struct BuiltinOptionsTraits<GatherOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_GatherOptions;
+};
+
+template <> struct BuiltinOptionsTraits<BatchToSpaceNDOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_BatchToSpaceNDOptions;
+};
+
+template <> struct BuiltinOptionsTraits<SpaceToBatchNDOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_SpaceToBatchNDOptions;
+};
+
+template <> struct BuiltinOptionsTraits<TransposeOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_TransposeOptions;
+};
+
+template <> struct BuiltinOptionsTraits<ReducerOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_ReducerOptions;
+};
+
+template <> struct BuiltinOptionsTraits<SubOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_SubOptions;
+};
+
+template <> struct BuiltinOptionsTraits<DivOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_DivOptions;
+};
+
+template <> struct BuiltinOptionsTraits<SqueezeOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_SqueezeOptions;
+};
+
+template <> struct BuiltinOptionsTraits<SequenceRNNOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_SequenceRNNOptions;
+};
+
+template <> struct BuiltinOptionsTraits<StridedSliceOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_StridedSliceOptions;
+};
+
+template <> struct BuiltinOptionsTraits<ExpOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_ExpOptions;
+};
+
+template <> struct BuiltinOptionsTraits<TopKV2Options>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_TopKV2Options;
+};
+
+template <> struct BuiltinOptionsTraits<SplitOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_SplitOptions;
+};
+
+template <> struct BuiltinOptionsTraits<LogSoftmaxOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_LogSoftmaxOptions;
+};
+
+template <> struct BuiltinOptionsTraits<CastOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_CastOptions;
+};
+
+template <> struct BuiltinOptionsTraits<DequantizeOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_DequantizeOptions;
+};
+
+template <> struct BuiltinOptionsTraits<MaximumMinimumOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_MaximumMinimumOptions;
+};
+
+template <> struct BuiltinOptionsTraits<ArgMaxOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_ArgMaxOptions;
+};
+
+template <> struct BuiltinOptionsTraits<LessOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_LessOptions;
+};
+
+template <> struct BuiltinOptionsTraits<NegOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_NegOptions;
+};
+
+template <> struct BuiltinOptionsTraits<PadV2Options>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_PadV2Options;
+};
+
+template <> struct BuiltinOptionsTraits<GreaterOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_GreaterOptions;
+};
+
+template <> struct BuiltinOptionsTraits<GreaterEqualOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_GreaterEqualOptions;
+};
+
+template <> struct BuiltinOptionsTraits<LessEqualOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_LessEqualOptions;
+};
+
+template <> struct BuiltinOptionsTraits<SelectOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_SelectOptions;
+};
+
+template <> struct BuiltinOptionsTraits<SliceOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_SliceOptions;
+};
+
+template <> struct BuiltinOptionsTraits<TransposeConvOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_TransposeConvOptions;
+};
+
+template <> struct BuiltinOptionsTraits<SparseToDenseOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_SparseToDenseOptions;
+};
+
+template <> struct BuiltinOptionsTraits<TileOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_TileOptions;
+};
+
+template <> struct BuiltinOptionsTraits<ExpandDimsOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_ExpandDimsOptions;
+};
+
+template <> struct BuiltinOptionsTraits<EqualOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_EqualOptions;
+};
+
+template <> struct BuiltinOptionsTraits<NotEqualOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_NotEqualOptions;
+};
+
+template <> struct BuiltinOptionsTraits<ShapeOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_ShapeOptions;
+};
+
+template <> struct BuiltinOptionsTraits<PowOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_PowOptions;
+};
+
+template <> struct BuiltinOptionsTraits<ArgMinOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_ArgMinOptions;
+};
+
+template <> struct BuiltinOptionsTraits<FakeQuantOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_FakeQuantOptions;
+};
+
+template <> struct BuiltinOptionsTraits<PackOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_PackOptions;
+};
+
+template <> struct BuiltinOptionsTraits<LogicalOrOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_LogicalOrOptions;
+};
+
+template <> struct BuiltinOptionsTraits<OneHotOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_OneHotOptions;
+};
+
+template <> struct BuiltinOptionsTraits<LogicalAndOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_LogicalAndOptions;
+};
+
+template <> struct BuiltinOptionsTraits<LogicalNotOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_LogicalNotOptions;
+};
+
+template <> struct BuiltinOptionsTraits<UnpackOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_UnpackOptions;
+};
+
+template <> struct BuiltinOptionsTraits<FloorDivOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_FloorDivOptions;
+};
+
+template <> struct BuiltinOptionsTraits<SquareOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_SquareOptions;
+};
+
+template <> struct BuiltinOptionsTraits<ZerosLikeOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_ZerosLikeOptions;
+};
+
+template <> struct BuiltinOptionsTraits<FillOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_FillOptions;
+};
+
+template <> struct BuiltinOptionsTraits<BidirectionalSequenceLSTMOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_BidirectionalSequenceLSTMOptions;
+};
+
+template <> struct BuiltinOptionsTraits<BidirectionalSequenceRNNOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_BidirectionalSequenceRNNOptions;
+};
+
+template <> struct BuiltinOptionsTraits<UnidirectionalSequenceLSTMOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_UnidirectionalSequenceLSTMOptions;
+};
+
+template <> struct BuiltinOptionsTraits<FloorModOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_FloorModOptions;
+};
+
+template <> struct BuiltinOptionsTraits<RangeOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_RangeOptions;
+};
+
+template <> struct BuiltinOptionsTraits<ResizeNearestNeighborOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_ResizeNearestNeighborOptions;
+};
+
+template <> struct BuiltinOptionsTraits<LeakyReluOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_LeakyReluOptions;
+};
+
+template <> struct BuiltinOptionsTraits<SquaredDifferenceOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_SquaredDifferenceOptions;
+};
+
+template <> struct BuiltinOptionsTraits<MirrorPadOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_MirrorPadOptions;
+};
+
+template <> struct BuiltinOptionsTraits<AbsOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_AbsOptions;
+};
+
+template <> struct BuiltinOptionsTraits<SplitVOptions>
+{
+  static const BuiltinOptions enum_value = BuiltinOptions_SplitVOptions;
+};
+
+bool VerifyBuiltinOptions(flatbuffers::Verifier &verifier, const void *obj, BuiltinOptions type);
+bool VerifyBuiltinOptionsVector(flatbuffers::Verifier &verifier,
+                                const flatbuffers::Vector<flatbuffers::Offset<void>> *values,
+                                const flatbuffers::Vector<uint8_t> *types);
+
+enum Padding
+{
+  Padding_SAME = 0,
+  Padding_VALID = 1,
+  Padding_MIN = Padding_SAME,
+  Padding_MAX = Padding_VALID
+};
+
+inline const Padding (&EnumValuesPadding())[2]
+{
+  static const Padding values[] = {Padding_SAME, Padding_VALID};
+  return values;
+}
+
+inline const char *const *EnumNamesPadding()
+{
+  static const char *const names[] = {"SAME", "VALID", nullptr};
+  return names;
+}
+
+inline const char *EnumNamePadding(Padding e)
+{
+  const size_t index = static_cast<int>(e);
+  return EnumNamesPadding()[index];
+}
+
+enum ActivationFunctionType
+{
+  ActivationFunctionType_NONE = 0,
+  ActivationFunctionType_RELU = 1,
+  ActivationFunctionType_RELU_N1_TO_1 = 2,
+  ActivationFunctionType_RELU6 = 3,
+  ActivationFunctionType_TANH = 4,
+  ActivationFunctionType_SIGN_BIT = 5,
+  ActivationFunctionType_MIN = ActivationFunctionType_NONE,
+  ActivationFunctionType_MAX = ActivationFunctionType_SIGN_BIT
+};
+
+inline const ActivationFunctionType (&EnumValuesActivationFunctionType())[6]
+{
+  static const ActivationFunctionType values[] = {
+      ActivationFunctionType_NONE,         ActivationFunctionType_RELU,
+      ActivationFunctionType_RELU_N1_TO_1, ActivationFunctionType_RELU6,
+      ActivationFunctionType_TANH,         ActivationFunctionType_SIGN_BIT};
+  return values;
+}
+
+inline const char *const *EnumNamesActivationFunctionType()
+{
+  static const char *const names[] = {"NONE", "RELU",     "RELU_N1_TO_1", "RELU6",
+                                      "TANH", "SIGN_BIT", nullptr};
+  return names;
+}
+
+inline const char *EnumNameActivationFunctionType(ActivationFunctionType e)
+{
+  const size_t index = static_cast<int>(e);
+  return EnumNamesActivationFunctionType()[index];
+}
+
+enum LSHProjectionType
+{
+  LSHProjectionType_UNKNOWN = 0,
+  LSHProjectionType_SPARSE = 1,
+  LSHProjectionType_DENSE = 2,
+  LSHProjectionType_MIN = LSHProjectionType_UNKNOWN,
+  LSHProjectionType_MAX = LSHProjectionType_DENSE
+};
+
+inline const LSHProjectionType (&EnumValuesLSHProjectionType())[3]
+{
+  static const LSHProjectionType values[] = {LSHProjectionType_UNKNOWN, LSHProjectionType_SPARSE,
+                                             LSHProjectionType_DENSE};
+  return values;
+}
+
+inline const char *const *EnumNamesLSHProjectionType()
+{
+  static const char *const names[] = {"UNKNOWN", "SPARSE", "DENSE", nullptr};
+  return names;
+}
+
+inline const char *EnumNameLSHProjectionType(LSHProjectionType e)
+{
+  const size_t index = static_cast<int>(e);
+  return EnumNamesLSHProjectionType()[index];
+}
+
+enum FullyConnectedOptionsWeightsFormat
+{
+  FullyConnectedOptionsWeightsFormat_DEFAULT = 0,
+  FullyConnectedOptionsWeightsFormat_SHUFFLED4x16INT8 = 1,
+  FullyConnectedOptionsWeightsFormat_MIN = FullyConnectedOptionsWeightsFormat_DEFAULT,
+  FullyConnectedOptionsWeightsFormat_MAX = FullyConnectedOptionsWeightsFormat_SHUFFLED4x16INT8
+};
+
+inline const FullyConnectedOptionsWeightsFormat (&EnumValuesFullyConnectedOptionsWeightsFormat())[2]
+{
+  static const FullyConnectedOptionsWeightsFormat values[] = {
+      FullyConnectedOptionsWeightsFormat_DEFAULT,
+      FullyConnectedOptionsWeightsFormat_SHUFFLED4x16INT8};
+  return values;
+}
+
+inline const char *const *EnumNamesFullyConnectedOptionsWeightsFormat()
+{
+  static const char *const names[] = {"DEFAULT", "SHUFFLED4x16INT8", nullptr};
+  return names;
+}
+
+inline const char *EnumNameFullyConnectedOptionsWeightsFormat(FullyConnectedOptionsWeightsFormat e)
+{
+  const size_t index = static_cast<int>(e);
+  return EnumNamesFullyConnectedOptionsWeightsFormat()[index];
+}
+
+enum LSTMKernelType
+{
+  LSTMKernelType_FULL = 0,
+  LSTMKernelType_BASIC = 1,
+  LSTMKernelType_MIN = LSTMKernelType_FULL,
+  LSTMKernelType_MAX = LSTMKernelType_BASIC
+};
+
+inline const LSTMKernelType (&EnumValuesLSTMKernelType())[2]
+{
+  static const LSTMKernelType values[] = {LSTMKernelType_FULL, LSTMKernelType_BASIC};
+  return values;
+}
+
+inline const char *const *EnumNamesLSTMKernelType()
+{
+  static const char *const names[] = {"FULL", "BASIC", nullptr};
+  return names;
+}
+
+inline const char *EnumNameLSTMKernelType(LSTMKernelType e)
+{
+  const size_t index = static_cast<int>(e);
+  return EnumNamesLSTMKernelType()[index];
+}
+
+enum CombinerType
+{
+  CombinerType_SUM = 0,
+  CombinerType_MEAN = 1,
+  CombinerType_SQRTN = 2,
+  CombinerType_MIN = CombinerType_SUM,
+  CombinerType_MAX = CombinerType_SQRTN
+};
+
+inline const CombinerType (&EnumValuesCombinerType())[3]
+{
+  static const CombinerType values[] = {CombinerType_SUM, CombinerType_MEAN, CombinerType_SQRTN};
+  return values;
+}
+
+inline const char *const *EnumNamesCombinerType()
+{
+  static const char *const names[] = {"SUM", "MEAN", "SQRTN", nullptr};
+  return names;
+}
+
+inline const char *EnumNameCombinerType(CombinerType e)
+{
+  const size_t index = static_cast<int>(e);
+  return EnumNamesCombinerType()[index];
+}
+
+enum MirrorPadMode
+{
+  MirrorPadMode_REFLECT = 0,
+  MirrorPadMode_SYMMETRIC = 1,
+  MirrorPadMode_MIN = MirrorPadMode_REFLECT,
+  MirrorPadMode_MAX = MirrorPadMode_SYMMETRIC
+};
+
+inline const MirrorPadMode (&EnumValuesMirrorPadMode())[2]
+{
+  static const MirrorPadMode values[] = {MirrorPadMode_REFLECT, MirrorPadMode_SYMMETRIC};
+  return values;
+}
+
+inline const char *const *EnumNamesMirrorPadMode()
+{
+  static const char *const names[] = {"REFLECT", "SYMMETRIC", nullptr};
+  return names;
+}
+
+inline const char *EnumNameMirrorPadMode(MirrorPadMode e)
+{
+  const size_t index = static_cast<int>(e);
+  return EnumNamesMirrorPadMode()[index];
+}
+
+enum CustomOptionsFormat
+{
+  CustomOptionsFormat_FLEXBUFFERS = 0,
+  CustomOptionsFormat_MIN = CustomOptionsFormat_FLEXBUFFERS,
+  CustomOptionsFormat_MAX = CustomOptionsFormat_FLEXBUFFERS
+};
+
+inline const CustomOptionsFormat (&EnumValuesCustomOptionsFormat())[1]
+{
+  static const CustomOptionsFormat values[] = {CustomOptionsFormat_FLEXBUFFERS};
+  return values;
+}
+
+inline const char *const *EnumNamesCustomOptionsFormat()
+{
+  static const char *const names[] = {"FLEXBUFFERS", nullptr};
+  return names;
+}
+
+inline const char *EnumNameCustomOptionsFormat(CustomOptionsFormat e)
+{
+  const size_t index = static_cast<int>(e);
+  return EnumNamesCustomOptionsFormat()[index];
+}
+
+struct CustomQuantization FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_CUSTOM = 4
+  };
+  const flatbuffers::Vector<uint8_t> *custom() const
+  {
+    return GetPointer<const flatbuffers::Vector<uint8_t> *>(VT_CUSTOM);
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyOffset(verifier, VT_CUSTOM) &&
+           verifier.VerifyVector(custom()) && verifier.EndTable();
+  }
+};
+
+struct CustomQuantizationBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_custom(flatbuffers::Offset<flatbuffers::Vector<uint8_t>> custom)
+  {
+    fbb_.AddOffset(CustomQuantization::VT_CUSTOM, custom);
+  }
+  explicit CustomQuantizationBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  CustomQuantizationBuilder &operator=(const CustomQuantizationBuilder &);
+  flatbuffers::Offset<CustomQuantization> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<CustomQuantization>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<CustomQuantization>
+CreateCustomQuantization(flatbuffers::FlatBufferBuilder &_fbb,
+                         flatbuffers::Offset<flatbuffers::Vector<uint8_t>> custom = 0)
+{
+  CustomQuantizationBuilder builder_(_fbb);
+  builder_.add_custom(custom);
+  return builder_.Finish();
+}
+
+inline flatbuffers::Offset<CustomQuantization>
+CreateCustomQuantizationDirect(flatbuffers::FlatBufferBuilder &_fbb,
+                               const std::vector<uint8_t> *custom = nullptr)
+{
+  return tflite::CreateCustomQuantization(_fbb, custom ? _fbb.CreateVector<uint8_t>(*custom) : 0);
+}
+
+struct QuantizationParameters FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_MIN = 4,
+    VT_MAX = 6,
+    VT_SCALE = 8,
+    VT_ZERO_POINT = 10,
+    VT_DETAILS_TYPE = 12,
+    VT_DETAILS = 14
+  };
+  const flatbuffers::Vector<float> *min() const
+  {
+    return GetPointer<const flatbuffers::Vector<float> *>(VT_MIN);
+  }
+  const flatbuffers::Vector<float> *max() const
+  {
+    return GetPointer<const flatbuffers::Vector<float> *>(VT_MAX);
+  }
+  const flatbuffers::Vector<float> *scale() const
+  {
+    return GetPointer<const flatbuffers::Vector<float> *>(VT_SCALE);
+  }
+  const flatbuffers::Vector<int64_t> *zero_point() const
+  {
+    return GetPointer<const flatbuffers::Vector<int64_t> *>(VT_ZERO_POINT);
+  }
+  QuantizationDetails details_type() const
+  {
+    return static_cast<QuantizationDetails>(GetField<uint8_t>(VT_DETAILS_TYPE, 0));
+  }
+  const void *details() const { return GetPointer<const void *>(VT_DETAILS); }
+  template <typename T> const T *details_as() const;
+  const CustomQuantization *details_as_CustomQuantization() const
+  {
+    return details_type() == QuantizationDetails_CustomQuantization
+               ? static_cast<const CustomQuantization *>(details())
+               : nullptr;
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyOffset(verifier, VT_MIN) &&
+           verifier.VerifyVector(min()) && VerifyOffset(verifier, VT_MAX) &&
+           verifier.VerifyVector(max()) && VerifyOffset(verifier, VT_SCALE) &&
+           verifier.VerifyVector(scale()) && VerifyOffset(verifier, VT_ZERO_POINT) &&
+           verifier.VerifyVector(zero_point()) && VerifyField<uint8_t>(verifier, VT_DETAILS_TYPE) &&
+           VerifyOffset(verifier, VT_DETAILS) &&
+           VerifyQuantizationDetails(verifier, details(), details_type()) && verifier.EndTable();
+  }
+};
+
+template <>
+inline const CustomQuantization *QuantizationParameters::details_as<CustomQuantization>() const
+{
+  return details_as_CustomQuantization();
+}
+
+struct QuantizationParametersBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_min(flatbuffers::Offset<flatbuffers::Vector<float>> min)
+  {
+    fbb_.AddOffset(QuantizationParameters::VT_MIN, min);
+  }
+  void add_max(flatbuffers::Offset<flatbuffers::Vector<float>> max)
+  {
+    fbb_.AddOffset(QuantizationParameters::VT_MAX, max);
+  }
+  void add_scale(flatbuffers::Offset<flatbuffers::Vector<float>> scale)
+  {
+    fbb_.AddOffset(QuantizationParameters::VT_SCALE, scale);
+  }
+  void add_zero_point(flatbuffers::Offset<flatbuffers::Vector<int64_t>> zero_point)
+  {
+    fbb_.AddOffset(QuantizationParameters::VT_ZERO_POINT, zero_point);
+  }
+  void add_details_type(QuantizationDetails details_type)
+  {
+    fbb_.AddElement<uint8_t>(QuantizationParameters::VT_DETAILS_TYPE,
+                             static_cast<uint8_t>(details_type), 0);
+  }
+  void add_details(flatbuffers::Offset<void> details)
+  {
+    fbb_.AddOffset(QuantizationParameters::VT_DETAILS, details);
+  }
+  explicit QuantizationParametersBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  QuantizationParametersBuilder &operator=(const QuantizationParametersBuilder &);
+  flatbuffers::Offset<QuantizationParameters> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<QuantizationParameters>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<QuantizationParameters>
+CreateQuantizationParameters(flatbuffers::FlatBufferBuilder &_fbb,
+                             flatbuffers::Offset<flatbuffers::Vector<float>> min = 0,
+                             flatbuffers::Offset<flatbuffers::Vector<float>> max = 0,
+                             flatbuffers::Offset<flatbuffers::Vector<float>> scale = 0,
+                             flatbuffers::Offset<flatbuffers::Vector<int64_t>> zero_point = 0,
+                             QuantizationDetails details_type = QuantizationDetails_NONE,
+                             flatbuffers::Offset<void> details = 0)
+{
+  QuantizationParametersBuilder builder_(_fbb);
+  builder_.add_details(details);
+  builder_.add_zero_point(zero_point);
+  builder_.add_scale(scale);
+  builder_.add_max(max);
+  builder_.add_min(min);
+  builder_.add_details_type(details_type);
+  return builder_.Finish();
+}
+
+inline flatbuffers::Offset<QuantizationParameters> CreateQuantizationParametersDirect(
+    flatbuffers::FlatBufferBuilder &_fbb, const std::vector<float> *min = nullptr,
+    const std::vector<float> *max = nullptr, const std::vector<float> *scale = nullptr,
+    const std::vector<int64_t> *zero_point = nullptr,
+    QuantizationDetails details_type = QuantizationDetails_NONE,
+    flatbuffers::Offset<void> details = 0)
+{
+  return tflite::CreateQuantizationParameters(
+      _fbb, min ? _fbb.CreateVector<float>(*min) : 0, max ? _fbb.CreateVector<float>(*max) : 0,
+      scale ? _fbb.CreateVector<float>(*scale) : 0,
+      zero_point ? _fbb.CreateVector<int64_t>(*zero_point) : 0, details_type, details);
+}
+
+struct Tensor FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_SHAPE = 4,
+    VT_TYPE = 6,
+    VT_BUFFER = 8,
+    VT_NAME = 10,
+    VT_QUANTIZATION = 12,
+    VT_IS_VARIABLE = 14
+  };
+  const flatbuffers::Vector<int32_t> *shape() const
+  {
+    return GetPointer<const flatbuffers::Vector<int32_t> *>(VT_SHAPE);
+  }
+  TensorType type() const { return static_cast<TensorType>(GetField<int8_t>(VT_TYPE, 0)); }
+  uint32_t buffer() const { return GetField<uint32_t>(VT_BUFFER, 0); }
+  const flatbuffers::String *name() const
+  {
+    return GetPointer<const flatbuffers::String *>(VT_NAME);
+  }
+  const QuantizationParameters *quantization() const
+  {
+    return GetPointer<const QuantizationParameters *>(VT_QUANTIZATION);
+  }
+  bool is_variable() const { return GetField<uint8_t>(VT_IS_VARIABLE, 0) != 0; }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyOffset(verifier, VT_SHAPE) &&
+           verifier.VerifyVector(shape()) && VerifyField<int8_t>(verifier, VT_TYPE) &&
+           VerifyField<uint32_t>(verifier, VT_BUFFER) && VerifyOffset(verifier, VT_NAME) &&
+           verifier.VerifyString(name()) && VerifyOffset(verifier, VT_QUANTIZATION) &&
+           verifier.VerifyTable(quantization()) && VerifyField<uint8_t>(verifier, VT_IS_VARIABLE) &&
+           verifier.EndTable();
+  }
+};
+
+struct TensorBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_shape(flatbuffers::Offset<flatbuffers::Vector<int32_t>> shape)
+  {
+    fbb_.AddOffset(Tensor::VT_SHAPE, shape);
+  }
+  void add_type(TensorType type)
+  {
+    fbb_.AddElement<int8_t>(Tensor::VT_TYPE, static_cast<int8_t>(type), 0);
+  }
+  void add_buffer(uint32_t buffer) { fbb_.AddElement<uint32_t>(Tensor::VT_BUFFER, buffer, 0); }
+  void add_name(flatbuffers::Offset<flatbuffers::String> name)
+  {
+    fbb_.AddOffset(Tensor::VT_NAME, name);
+  }
+  void add_quantization(flatbuffers::Offset<QuantizationParameters> quantization)
+  {
+    fbb_.AddOffset(Tensor::VT_QUANTIZATION, quantization);
+  }
+  void add_is_variable(bool is_variable)
+  {
+    fbb_.AddElement<uint8_t>(Tensor::VT_IS_VARIABLE, static_cast<uint8_t>(is_variable), 0);
+  }
+  explicit TensorBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  TensorBuilder &operator=(const TensorBuilder &);
+  flatbuffers::Offset<Tensor> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<Tensor>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<Tensor>
+CreateTensor(flatbuffers::FlatBufferBuilder &_fbb,
+             flatbuffers::Offset<flatbuffers::Vector<int32_t>> shape = 0,
+             TensorType type = TensorType_FLOAT32, uint32_t buffer = 0,
+             flatbuffers::Offset<flatbuffers::String> name = 0,
+             flatbuffers::Offset<QuantizationParameters> quantization = 0, bool is_variable = false)
+{
+  TensorBuilder builder_(_fbb);
+  builder_.add_quantization(quantization);
+  builder_.add_name(name);
+  builder_.add_buffer(buffer);
+  builder_.add_shape(shape);
+  builder_.add_is_variable(is_variable);
+  builder_.add_type(type);
+  return builder_.Finish();
+}
+
+inline flatbuffers::Offset<Tensor> CreateTensorDirect(
+    flatbuffers::FlatBufferBuilder &_fbb, const std::vector<int32_t> *shape = nullptr,
+    TensorType type = TensorType_FLOAT32, uint32_t buffer = 0, const char *name = nullptr,
+    flatbuffers::Offset<QuantizationParameters> quantization = 0, bool is_variable = false)
+{
+  return tflite::CreateTensor(_fbb, shape ? _fbb.CreateVector<int32_t>(*shape) : 0, type, buffer,
+                              name ? _fbb.CreateString(name) : 0, quantization, is_variable);
+}
+
+struct Conv2DOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_PADDING = 4,
+    VT_STRIDE_W = 6,
+    VT_STRIDE_H = 8,
+    VT_FUSED_ACTIVATION_FUNCTION = 10,
+    VT_DILATION_W_FACTOR = 12,
+    VT_DILATION_H_FACTOR = 14
+  };
+  Padding padding() const { return static_cast<Padding>(GetField<int8_t>(VT_PADDING, 0)); }
+  int32_t stride_w() const { return GetField<int32_t>(VT_STRIDE_W, 0); }
+  int32_t stride_h() const { return GetField<int32_t>(VT_STRIDE_H, 0); }
+  ActivationFunctionType fused_activation_function() const
+  {
+    return static_cast<ActivationFunctionType>(GetField<int8_t>(VT_FUSED_ACTIVATION_FUNCTION, 0));
+  }
+  int32_t dilation_w_factor() const { return GetField<int32_t>(VT_DILATION_W_FACTOR, 1); }
+  int32_t dilation_h_factor() const { return GetField<int32_t>(VT_DILATION_H_FACTOR, 1); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int8_t>(verifier, VT_PADDING) &&
+           VerifyField<int32_t>(verifier, VT_STRIDE_W) &&
+           VerifyField<int32_t>(verifier, VT_STRIDE_H) &&
+           VerifyField<int8_t>(verifier, VT_FUSED_ACTIVATION_FUNCTION) &&
+           VerifyField<int32_t>(verifier, VT_DILATION_W_FACTOR) &&
+           VerifyField<int32_t>(verifier, VT_DILATION_H_FACTOR) && verifier.EndTable();
+  }
+};
+
+struct Conv2DOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_padding(Padding padding)
+  {
+    fbb_.AddElement<int8_t>(Conv2DOptions::VT_PADDING, static_cast<int8_t>(padding), 0);
+  }
+  void add_stride_w(int32_t stride_w)
+  {
+    fbb_.AddElement<int32_t>(Conv2DOptions::VT_STRIDE_W, stride_w, 0);
+  }
+  void add_stride_h(int32_t stride_h)
+  {
+    fbb_.AddElement<int32_t>(Conv2DOptions::VT_STRIDE_H, stride_h, 0);
+  }
+  void add_fused_activation_function(ActivationFunctionType fused_activation_function)
+  {
+    fbb_.AddElement<int8_t>(Conv2DOptions::VT_FUSED_ACTIVATION_FUNCTION,
+                            static_cast<int8_t>(fused_activation_function), 0);
+  }
+  void add_dilation_w_factor(int32_t dilation_w_factor)
+  {
+    fbb_.AddElement<int32_t>(Conv2DOptions::VT_DILATION_W_FACTOR, dilation_w_factor, 1);
+  }
+  void add_dilation_h_factor(int32_t dilation_h_factor)
+  {
+    fbb_.AddElement<int32_t>(Conv2DOptions::VT_DILATION_H_FACTOR, dilation_h_factor, 1);
+  }
+  explicit Conv2DOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  Conv2DOptionsBuilder &operator=(const Conv2DOptionsBuilder &);
+  flatbuffers::Offset<Conv2DOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<Conv2DOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<Conv2DOptions>
+CreateConv2DOptions(flatbuffers::FlatBufferBuilder &_fbb, Padding padding = Padding_SAME,
+                    int32_t stride_w = 0, int32_t stride_h = 0,
+                    ActivationFunctionType fused_activation_function = ActivationFunctionType_NONE,
+                    int32_t dilation_w_factor = 1, int32_t dilation_h_factor = 1)
+{
+  Conv2DOptionsBuilder builder_(_fbb);
+  builder_.add_dilation_h_factor(dilation_h_factor);
+  builder_.add_dilation_w_factor(dilation_w_factor);
+  builder_.add_stride_h(stride_h);
+  builder_.add_stride_w(stride_w);
+  builder_.add_fused_activation_function(fused_activation_function);
+  builder_.add_padding(padding);
+  return builder_.Finish();
+}
+
+struct Pool2DOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_PADDING = 4,
+    VT_STRIDE_W = 6,
+    VT_STRIDE_H = 8,
+    VT_FILTER_WIDTH = 10,
+    VT_FILTER_HEIGHT = 12,
+    VT_FUSED_ACTIVATION_FUNCTION = 14
+  };
+  Padding padding() const { return static_cast<Padding>(GetField<int8_t>(VT_PADDING, 0)); }
+  int32_t stride_w() const { return GetField<int32_t>(VT_STRIDE_W, 0); }
+  int32_t stride_h() const { return GetField<int32_t>(VT_STRIDE_H, 0); }
+  int32_t filter_width() const { return GetField<int32_t>(VT_FILTER_WIDTH, 0); }
+  int32_t filter_height() const { return GetField<int32_t>(VT_FILTER_HEIGHT, 0); }
+  ActivationFunctionType fused_activation_function() const
+  {
+    return static_cast<ActivationFunctionType>(GetField<int8_t>(VT_FUSED_ACTIVATION_FUNCTION, 0));
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int8_t>(verifier, VT_PADDING) &&
+           VerifyField<int32_t>(verifier, VT_STRIDE_W) &&
+           VerifyField<int32_t>(verifier, VT_STRIDE_H) &&
+           VerifyField<int32_t>(verifier, VT_FILTER_WIDTH) &&
+           VerifyField<int32_t>(verifier, VT_FILTER_HEIGHT) &&
+           VerifyField<int8_t>(verifier, VT_FUSED_ACTIVATION_FUNCTION) && verifier.EndTable();
+  }
+};
+
+struct Pool2DOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_padding(Padding padding)
+  {
+    fbb_.AddElement<int8_t>(Pool2DOptions::VT_PADDING, static_cast<int8_t>(padding), 0);
+  }
+  void add_stride_w(int32_t stride_w)
+  {
+    fbb_.AddElement<int32_t>(Pool2DOptions::VT_STRIDE_W, stride_w, 0);
+  }
+  void add_stride_h(int32_t stride_h)
+  {
+    fbb_.AddElement<int32_t>(Pool2DOptions::VT_STRIDE_H, stride_h, 0);
+  }
+  void add_filter_width(int32_t filter_width)
+  {
+    fbb_.AddElement<int32_t>(Pool2DOptions::VT_FILTER_WIDTH, filter_width, 0);
+  }
+  void add_filter_height(int32_t filter_height)
+  {
+    fbb_.AddElement<int32_t>(Pool2DOptions::VT_FILTER_HEIGHT, filter_height, 0);
+  }
+  void add_fused_activation_function(ActivationFunctionType fused_activation_function)
+  {
+    fbb_.AddElement<int8_t>(Pool2DOptions::VT_FUSED_ACTIVATION_FUNCTION,
+                            static_cast<int8_t>(fused_activation_function), 0);
+  }
+  explicit Pool2DOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  Pool2DOptionsBuilder &operator=(const Pool2DOptionsBuilder &);
+  flatbuffers::Offset<Pool2DOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<Pool2DOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<Pool2DOptions>
+CreatePool2DOptions(flatbuffers::FlatBufferBuilder &_fbb, Padding padding = Padding_SAME,
+                    int32_t stride_w = 0, int32_t stride_h = 0, int32_t filter_width = 0,
+                    int32_t filter_height = 0,
+                    ActivationFunctionType fused_activation_function = ActivationFunctionType_NONE)
+{
+  Pool2DOptionsBuilder builder_(_fbb);
+  builder_.add_filter_height(filter_height);
+  builder_.add_filter_width(filter_width);
+  builder_.add_stride_h(stride_h);
+  builder_.add_stride_w(stride_w);
+  builder_.add_fused_activation_function(fused_activation_function);
+  builder_.add_padding(padding);
+  return builder_.Finish();
+}
+
+struct DepthwiseConv2DOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_PADDING = 4,
+    VT_STRIDE_W = 6,
+    VT_STRIDE_H = 8,
+    VT_DEPTH_MULTIPLIER = 10,
+    VT_FUSED_ACTIVATION_FUNCTION = 12,
+    VT_DILATION_W_FACTOR = 14,
+    VT_DILATION_H_FACTOR = 16
+  };
+  Padding padding() const { return static_cast<Padding>(GetField<int8_t>(VT_PADDING, 0)); }
+  int32_t stride_w() const { return GetField<int32_t>(VT_STRIDE_W, 0); }
+  int32_t stride_h() const { return GetField<int32_t>(VT_STRIDE_H, 0); }
+  int32_t depth_multiplier() const { return GetField<int32_t>(VT_DEPTH_MULTIPLIER, 0); }
+  ActivationFunctionType fused_activation_function() const
+  {
+    return static_cast<ActivationFunctionType>(GetField<int8_t>(VT_FUSED_ACTIVATION_FUNCTION, 0));
+  }
+  int32_t dilation_w_factor() const { return GetField<int32_t>(VT_DILATION_W_FACTOR, 1); }
+  int32_t dilation_h_factor() const { return GetField<int32_t>(VT_DILATION_H_FACTOR, 1); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int8_t>(verifier, VT_PADDING) &&
+           VerifyField<int32_t>(verifier, VT_STRIDE_W) &&
+           VerifyField<int32_t>(verifier, VT_STRIDE_H) &&
+           VerifyField<int32_t>(verifier, VT_DEPTH_MULTIPLIER) &&
+           VerifyField<int8_t>(verifier, VT_FUSED_ACTIVATION_FUNCTION) &&
+           VerifyField<int32_t>(verifier, VT_DILATION_W_FACTOR) &&
+           VerifyField<int32_t>(verifier, VT_DILATION_H_FACTOR) && verifier.EndTable();
+  }
+};
+
+struct DepthwiseConv2DOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_padding(Padding padding)
+  {
+    fbb_.AddElement<int8_t>(DepthwiseConv2DOptions::VT_PADDING, static_cast<int8_t>(padding), 0);
+  }
+  void add_stride_w(int32_t stride_w)
+  {
+    fbb_.AddElement<int32_t>(DepthwiseConv2DOptions::VT_STRIDE_W, stride_w, 0);
+  }
+  void add_stride_h(int32_t stride_h)
+  {
+    fbb_.AddElement<int32_t>(DepthwiseConv2DOptions::VT_STRIDE_H, stride_h, 0);
+  }
+  void add_depth_multiplier(int32_t depth_multiplier)
+  {
+    fbb_.AddElement<int32_t>(DepthwiseConv2DOptions::VT_DEPTH_MULTIPLIER, depth_multiplier, 0);
+  }
+  void add_fused_activation_function(ActivationFunctionType fused_activation_function)
+  {
+    fbb_.AddElement<int8_t>(DepthwiseConv2DOptions::VT_FUSED_ACTIVATION_FUNCTION,
+                            static_cast<int8_t>(fused_activation_function), 0);
+  }
+  void add_dilation_w_factor(int32_t dilation_w_factor)
+  {
+    fbb_.AddElement<int32_t>(DepthwiseConv2DOptions::VT_DILATION_W_FACTOR, dilation_w_factor, 1);
+  }
+  void add_dilation_h_factor(int32_t dilation_h_factor)
+  {
+    fbb_.AddElement<int32_t>(DepthwiseConv2DOptions::VT_DILATION_H_FACTOR, dilation_h_factor, 1);
+  }
+  explicit DepthwiseConv2DOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  DepthwiseConv2DOptionsBuilder &operator=(const DepthwiseConv2DOptionsBuilder &);
+  flatbuffers::Offset<DepthwiseConv2DOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<DepthwiseConv2DOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<DepthwiseConv2DOptions> CreateDepthwiseConv2DOptions(
+    flatbuffers::FlatBufferBuilder &_fbb, Padding padding = Padding_SAME, int32_t stride_w = 0,
+    int32_t stride_h = 0, int32_t depth_multiplier = 0,
+    ActivationFunctionType fused_activation_function = ActivationFunctionType_NONE,
+    int32_t dilation_w_factor = 1, int32_t dilation_h_factor = 1)
+{
+  DepthwiseConv2DOptionsBuilder builder_(_fbb);
+  builder_.add_dilation_h_factor(dilation_h_factor);
+  builder_.add_dilation_w_factor(dilation_w_factor);
+  builder_.add_depth_multiplier(depth_multiplier);
+  builder_.add_stride_h(stride_h);
+  builder_.add_stride_w(stride_w);
+  builder_.add_fused_activation_function(fused_activation_function);
+  builder_.add_padding(padding);
+  return builder_.Finish();
+}
+
+struct ConcatEmbeddingsOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_NUM_CHANNELS = 4,
+    VT_NUM_COLUMNS_PER_CHANNEL = 6,
+    VT_EMBEDDING_DIM_PER_CHANNEL = 8
+  };
+  int32_t num_channels() const { return GetField<int32_t>(VT_NUM_CHANNELS, 0); }
+  const flatbuffers::Vector<int32_t> *num_columns_per_channel() const
+  {
+    return GetPointer<const flatbuffers::Vector<int32_t> *>(VT_NUM_COLUMNS_PER_CHANNEL);
+  }
+  const flatbuffers::Vector<int32_t> *embedding_dim_per_channel() const
+  {
+    return GetPointer<const flatbuffers::Vector<int32_t> *>(VT_EMBEDDING_DIM_PER_CHANNEL);
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int32_t>(verifier, VT_NUM_CHANNELS) &&
+           VerifyOffset(verifier, VT_NUM_COLUMNS_PER_CHANNEL) &&
+           verifier.VerifyVector(num_columns_per_channel()) &&
+           VerifyOffset(verifier, VT_EMBEDDING_DIM_PER_CHANNEL) &&
+           verifier.VerifyVector(embedding_dim_per_channel()) && verifier.EndTable();
+  }
+};
+
+struct ConcatEmbeddingsOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_num_channels(int32_t num_channels)
+  {
+    fbb_.AddElement<int32_t>(ConcatEmbeddingsOptions::VT_NUM_CHANNELS, num_channels, 0);
+  }
+  void add_num_columns_per_channel(
+      flatbuffers::Offset<flatbuffers::Vector<int32_t>> num_columns_per_channel)
+  {
+    fbb_.AddOffset(ConcatEmbeddingsOptions::VT_NUM_COLUMNS_PER_CHANNEL, num_columns_per_channel);
+  }
+  void add_embedding_dim_per_channel(
+      flatbuffers::Offset<flatbuffers::Vector<int32_t>> embedding_dim_per_channel)
+  {
+    fbb_.AddOffset(ConcatEmbeddingsOptions::VT_EMBEDDING_DIM_PER_CHANNEL,
+                   embedding_dim_per_channel);
+  }
+  explicit ConcatEmbeddingsOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  ConcatEmbeddingsOptionsBuilder &operator=(const ConcatEmbeddingsOptionsBuilder &);
+  flatbuffers::Offset<ConcatEmbeddingsOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<ConcatEmbeddingsOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<ConcatEmbeddingsOptions> CreateConcatEmbeddingsOptions(
+    flatbuffers::FlatBufferBuilder &_fbb, int32_t num_channels = 0,
+    flatbuffers::Offset<flatbuffers::Vector<int32_t>> num_columns_per_channel = 0,
+    flatbuffers::Offset<flatbuffers::Vector<int32_t>> embedding_dim_per_channel = 0)
+{
+  ConcatEmbeddingsOptionsBuilder builder_(_fbb);
+  builder_.add_embedding_dim_per_channel(embedding_dim_per_channel);
+  builder_.add_num_columns_per_channel(num_columns_per_channel);
+  builder_.add_num_channels(num_channels);
+  return builder_.Finish();
+}
+
+inline flatbuffers::Offset<ConcatEmbeddingsOptions>
+CreateConcatEmbeddingsOptionsDirect(flatbuffers::FlatBufferBuilder &_fbb, int32_t num_channels = 0,
+                                    const std::vector<int32_t> *num_columns_per_channel = nullptr,
+                                    const std::vector<int32_t> *embedding_dim_per_channel = nullptr)
+{
+  return tflite::CreateConcatEmbeddingsOptions(
+      _fbb, num_channels,
+      num_columns_per_channel ? _fbb.CreateVector<int32_t>(*num_columns_per_channel) : 0,
+      embedding_dim_per_channel ? _fbb.CreateVector<int32_t>(*embedding_dim_per_channel) : 0);
+}
+
+struct LSHProjectionOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_TYPE = 4
+  };
+  LSHProjectionType type() const
+  {
+    return static_cast<LSHProjectionType>(GetField<int8_t>(VT_TYPE, 0));
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int8_t>(verifier, VT_TYPE) &&
+           verifier.EndTable();
+  }
+};
+
+struct LSHProjectionOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_type(LSHProjectionType type)
+  {
+    fbb_.AddElement<int8_t>(LSHProjectionOptions::VT_TYPE, static_cast<int8_t>(type), 0);
+  }
+  explicit LSHProjectionOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  LSHProjectionOptionsBuilder &operator=(const LSHProjectionOptionsBuilder &);
+  flatbuffers::Offset<LSHProjectionOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<LSHProjectionOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<LSHProjectionOptions>
+CreateLSHProjectionOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                           LSHProjectionType type = LSHProjectionType_UNKNOWN)
+{
+  LSHProjectionOptionsBuilder builder_(_fbb);
+  builder_.add_type(type);
+  return builder_.Finish();
+}
+
+struct SVDFOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_RANK = 4,
+    VT_FUSED_ACTIVATION_FUNCTION = 6
+  };
+  int32_t rank() const { return GetField<int32_t>(VT_RANK, 0); }
+  ActivationFunctionType fused_activation_function() const
+  {
+    return static_cast<ActivationFunctionType>(GetField<int8_t>(VT_FUSED_ACTIVATION_FUNCTION, 0));
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int32_t>(verifier, VT_RANK) &&
+           VerifyField<int8_t>(verifier, VT_FUSED_ACTIVATION_FUNCTION) && verifier.EndTable();
+  }
+};
+
+struct SVDFOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_rank(int32_t rank) { fbb_.AddElement<int32_t>(SVDFOptions::VT_RANK, rank, 0); }
+  void add_fused_activation_function(ActivationFunctionType fused_activation_function)
+  {
+    fbb_.AddElement<int8_t>(SVDFOptions::VT_FUSED_ACTIVATION_FUNCTION,
+                            static_cast<int8_t>(fused_activation_function), 0);
+  }
+  explicit SVDFOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  SVDFOptionsBuilder &operator=(const SVDFOptionsBuilder &);
+  flatbuffers::Offset<SVDFOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<SVDFOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<SVDFOptions>
+CreateSVDFOptions(flatbuffers::FlatBufferBuilder &_fbb, int32_t rank = 0,
+                  ActivationFunctionType fused_activation_function = ActivationFunctionType_NONE)
+{
+  SVDFOptionsBuilder builder_(_fbb);
+  builder_.add_rank(rank);
+  builder_.add_fused_activation_function(fused_activation_function);
+  return builder_.Finish();
+}
+
+struct RNNOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_FUSED_ACTIVATION_FUNCTION = 4
+  };
+  ActivationFunctionType fused_activation_function() const
+  {
+    return static_cast<ActivationFunctionType>(GetField<int8_t>(VT_FUSED_ACTIVATION_FUNCTION, 0));
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) &&
+           VerifyField<int8_t>(verifier, VT_FUSED_ACTIVATION_FUNCTION) && verifier.EndTable();
+  }
+};
+
+struct RNNOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_fused_activation_function(ActivationFunctionType fused_activation_function)
+  {
+    fbb_.AddElement<int8_t>(RNNOptions::VT_FUSED_ACTIVATION_FUNCTION,
+                            static_cast<int8_t>(fused_activation_function), 0);
+  }
+  explicit RNNOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  RNNOptionsBuilder &operator=(const RNNOptionsBuilder &);
+  flatbuffers::Offset<RNNOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<RNNOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<RNNOptions>
+CreateRNNOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                 ActivationFunctionType fused_activation_function = ActivationFunctionType_NONE)
+{
+  RNNOptionsBuilder builder_(_fbb);
+  builder_.add_fused_activation_function(fused_activation_function);
+  return builder_.Finish();
+}
+
+struct SequenceRNNOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_TIME_MAJOR = 4,
+    VT_FUSED_ACTIVATION_FUNCTION = 6
+  };
+  bool time_major() const { return GetField<uint8_t>(VT_TIME_MAJOR, 0) != 0; }
+  ActivationFunctionType fused_activation_function() const
+  {
+    return static_cast<ActivationFunctionType>(GetField<int8_t>(VT_FUSED_ACTIVATION_FUNCTION, 0));
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<uint8_t>(verifier, VT_TIME_MAJOR) &&
+           VerifyField<int8_t>(verifier, VT_FUSED_ACTIVATION_FUNCTION) && verifier.EndTable();
+  }
+};
+
+struct SequenceRNNOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_time_major(bool time_major)
+  {
+    fbb_.AddElement<uint8_t>(SequenceRNNOptions::VT_TIME_MAJOR, static_cast<uint8_t>(time_major),
+                             0);
+  }
+  void add_fused_activation_function(ActivationFunctionType fused_activation_function)
+  {
+    fbb_.AddElement<int8_t>(SequenceRNNOptions::VT_FUSED_ACTIVATION_FUNCTION,
+                            static_cast<int8_t>(fused_activation_function), 0);
+  }
+  explicit SequenceRNNOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  SequenceRNNOptionsBuilder &operator=(const SequenceRNNOptionsBuilder &);
+  flatbuffers::Offset<SequenceRNNOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<SequenceRNNOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<SequenceRNNOptions> CreateSequenceRNNOptions(
+    flatbuffers::FlatBufferBuilder &_fbb, bool time_major = false,
+    ActivationFunctionType fused_activation_function = ActivationFunctionType_NONE)
+{
+  SequenceRNNOptionsBuilder builder_(_fbb);
+  builder_.add_fused_activation_function(fused_activation_function);
+  builder_.add_time_major(time_major);
+  return builder_.Finish();
+}
+
+struct BidirectionalSequenceRNNOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_TIME_MAJOR = 4,
+    VT_FUSED_ACTIVATION_FUNCTION = 6,
+    VT_MERGE_OUTPUTS = 8
+  };
+  bool time_major() const { return GetField<uint8_t>(VT_TIME_MAJOR, 0) != 0; }
+  ActivationFunctionType fused_activation_function() const
+  {
+    return static_cast<ActivationFunctionType>(GetField<int8_t>(VT_FUSED_ACTIVATION_FUNCTION, 0));
+  }
+  bool merge_outputs() const { return GetField<uint8_t>(VT_MERGE_OUTPUTS, 0) != 0; }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<uint8_t>(verifier, VT_TIME_MAJOR) &&
+           VerifyField<int8_t>(verifier, VT_FUSED_ACTIVATION_FUNCTION) &&
+           VerifyField<uint8_t>(verifier, VT_MERGE_OUTPUTS) && verifier.EndTable();
+  }
+};
+
+struct BidirectionalSequenceRNNOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_time_major(bool time_major)
+  {
+    fbb_.AddElement<uint8_t>(BidirectionalSequenceRNNOptions::VT_TIME_MAJOR,
+                             static_cast<uint8_t>(time_major), 0);
+  }
+  void add_fused_activation_function(ActivationFunctionType fused_activation_function)
+  {
+    fbb_.AddElement<int8_t>(BidirectionalSequenceRNNOptions::VT_FUSED_ACTIVATION_FUNCTION,
+                            static_cast<int8_t>(fused_activation_function), 0);
+  }
+  void add_merge_outputs(bool merge_outputs)
+  {
+    fbb_.AddElement<uint8_t>(BidirectionalSequenceRNNOptions::VT_MERGE_OUTPUTS,
+                             static_cast<uint8_t>(merge_outputs), 0);
+  }
+  explicit BidirectionalSequenceRNNOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  BidirectionalSequenceRNNOptionsBuilder &operator=(const BidirectionalSequenceRNNOptionsBuilder &);
+  flatbuffers::Offset<BidirectionalSequenceRNNOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<BidirectionalSequenceRNNOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<BidirectionalSequenceRNNOptions> CreateBidirectionalSequenceRNNOptions(
+    flatbuffers::FlatBufferBuilder &_fbb, bool time_major = false,
+    ActivationFunctionType fused_activation_function = ActivationFunctionType_NONE,
+    bool merge_outputs = false)
+{
+  BidirectionalSequenceRNNOptionsBuilder builder_(_fbb);
+  builder_.add_merge_outputs(merge_outputs);
+  builder_.add_fused_activation_function(fused_activation_function);
+  builder_.add_time_major(time_major);
+  return builder_.Finish();
+}
+
+struct FullyConnectedOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_FUSED_ACTIVATION_FUNCTION = 4,
+    VT_WEIGHTS_FORMAT = 6
+  };
+  ActivationFunctionType fused_activation_function() const
+  {
+    return static_cast<ActivationFunctionType>(GetField<int8_t>(VT_FUSED_ACTIVATION_FUNCTION, 0));
+  }
+  FullyConnectedOptionsWeightsFormat weights_format() const
+  {
+    return static_cast<FullyConnectedOptionsWeightsFormat>(GetField<int8_t>(VT_WEIGHTS_FORMAT, 0));
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) &&
+           VerifyField<int8_t>(verifier, VT_FUSED_ACTIVATION_FUNCTION) &&
+           VerifyField<int8_t>(verifier, VT_WEIGHTS_FORMAT) && verifier.EndTable();
+  }
+};
+
+struct FullyConnectedOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_fused_activation_function(ActivationFunctionType fused_activation_function)
+  {
+    fbb_.AddElement<int8_t>(FullyConnectedOptions::VT_FUSED_ACTIVATION_FUNCTION,
+                            static_cast<int8_t>(fused_activation_function), 0);
+  }
+  void add_weights_format(FullyConnectedOptionsWeightsFormat weights_format)
+  {
+    fbb_.AddElement<int8_t>(FullyConnectedOptions::VT_WEIGHTS_FORMAT,
+                            static_cast<int8_t>(weights_format), 0);
+  }
+  explicit FullyConnectedOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  FullyConnectedOptionsBuilder &operator=(const FullyConnectedOptionsBuilder &);
+  flatbuffers::Offset<FullyConnectedOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<FullyConnectedOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<FullyConnectedOptions> CreateFullyConnectedOptions(
+    flatbuffers::FlatBufferBuilder &_fbb,
+    ActivationFunctionType fused_activation_function = ActivationFunctionType_NONE,
+    FullyConnectedOptionsWeightsFormat weights_format = FullyConnectedOptionsWeightsFormat_DEFAULT)
+{
+  FullyConnectedOptionsBuilder builder_(_fbb);
+  builder_.add_weights_format(weights_format);
+  builder_.add_fused_activation_function(fused_activation_function);
+  return builder_.Finish();
+}
+
+struct SoftmaxOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_BETA = 4
+  };
+  float beta() const { return GetField<float>(VT_BETA, 0.0f); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<float>(verifier, VT_BETA) &&
+           verifier.EndTable();
+  }
+};
+
+struct SoftmaxOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_beta(float beta) { fbb_.AddElement<float>(SoftmaxOptions::VT_BETA, beta, 0.0f); }
+  explicit SoftmaxOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  SoftmaxOptionsBuilder &operator=(const SoftmaxOptionsBuilder &);
+  flatbuffers::Offset<SoftmaxOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<SoftmaxOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<SoftmaxOptions>
+CreateSoftmaxOptions(flatbuffers::FlatBufferBuilder &_fbb, float beta = 0.0f)
+{
+  SoftmaxOptionsBuilder builder_(_fbb);
+  builder_.add_beta(beta);
+  return builder_.Finish();
+}
+
+struct ConcatenationOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_AXIS = 4,
+    VT_FUSED_ACTIVATION_FUNCTION = 6
+  };
+  int32_t axis() const { return GetField<int32_t>(VT_AXIS, 0); }
+  ActivationFunctionType fused_activation_function() const
+  {
+    return static_cast<ActivationFunctionType>(GetField<int8_t>(VT_FUSED_ACTIVATION_FUNCTION, 0));
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int32_t>(verifier, VT_AXIS) &&
+           VerifyField<int8_t>(verifier, VT_FUSED_ACTIVATION_FUNCTION) && verifier.EndTable();
+  }
+};
+
+struct ConcatenationOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_axis(int32_t axis) { fbb_.AddElement<int32_t>(ConcatenationOptions::VT_AXIS, axis, 0); }
+  void add_fused_activation_function(ActivationFunctionType fused_activation_function)
+  {
+    fbb_.AddElement<int8_t>(ConcatenationOptions::VT_FUSED_ACTIVATION_FUNCTION,
+                            static_cast<int8_t>(fused_activation_function), 0);
+  }
+  explicit ConcatenationOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  ConcatenationOptionsBuilder &operator=(const ConcatenationOptionsBuilder &);
+  flatbuffers::Offset<ConcatenationOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<ConcatenationOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<ConcatenationOptions> CreateConcatenationOptions(
+    flatbuffers::FlatBufferBuilder &_fbb, int32_t axis = 0,
+    ActivationFunctionType fused_activation_function = ActivationFunctionType_NONE)
+{
+  ConcatenationOptionsBuilder builder_(_fbb);
+  builder_.add_axis(axis);
+  builder_.add_fused_activation_function(fused_activation_function);
+  return builder_.Finish();
+}
+
+struct AddOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_FUSED_ACTIVATION_FUNCTION = 4
+  };
+  ActivationFunctionType fused_activation_function() const
+  {
+    return static_cast<ActivationFunctionType>(GetField<int8_t>(VT_FUSED_ACTIVATION_FUNCTION, 0));
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) &&
+           VerifyField<int8_t>(verifier, VT_FUSED_ACTIVATION_FUNCTION) && verifier.EndTable();
+  }
+};
+
+struct AddOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_fused_activation_function(ActivationFunctionType fused_activation_function)
+  {
+    fbb_.AddElement<int8_t>(AddOptions::VT_FUSED_ACTIVATION_FUNCTION,
+                            static_cast<int8_t>(fused_activation_function), 0);
+  }
+  explicit AddOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  AddOptionsBuilder &operator=(const AddOptionsBuilder &);
+  flatbuffers::Offset<AddOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<AddOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<AddOptions>
+CreateAddOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                 ActivationFunctionType fused_activation_function = ActivationFunctionType_NONE)
+{
+  AddOptionsBuilder builder_(_fbb);
+  builder_.add_fused_activation_function(fused_activation_function);
+  return builder_.Finish();
+}
+
+struct MulOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_FUSED_ACTIVATION_FUNCTION = 4
+  };
+  ActivationFunctionType fused_activation_function() const
+  {
+    return static_cast<ActivationFunctionType>(GetField<int8_t>(VT_FUSED_ACTIVATION_FUNCTION, 0));
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) &&
+           VerifyField<int8_t>(verifier, VT_FUSED_ACTIVATION_FUNCTION) && verifier.EndTable();
+  }
+};
+
+struct MulOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_fused_activation_function(ActivationFunctionType fused_activation_function)
+  {
+    fbb_.AddElement<int8_t>(MulOptions::VT_FUSED_ACTIVATION_FUNCTION,
+                            static_cast<int8_t>(fused_activation_function), 0);
+  }
+  explicit MulOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  MulOptionsBuilder &operator=(const MulOptionsBuilder &);
+  flatbuffers::Offset<MulOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<MulOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<MulOptions>
+CreateMulOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                 ActivationFunctionType fused_activation_function = ActivationFunctionType_NONE)
+{
+  MulOptionsBuilder builder_(_fbb);
+  builder_.add_fused_activation_function(fused_activation_function);
+  return builder_.Finish();
+}
+
+struct L2NormOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_FUSED_ACTIVATION_FUNCTION = 4
+  };
+  ActivationFunctionType fused_activation_function() const
+  {
+    return static_cast<ActivationFunctionType>(GetField<int8_t>(VT_FUSED_ACTIVATION_FUNCTION, 0));
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) &&
+           VerifyField<int8_t>(verifier, VT_FUSED_ACTIVATION_FUNCTION) && verifier.EndTable();
+  }
+};
+
+struct L2NormOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_fused_activation_function(ActivationFunctionType fused_activation_function)
+  {
+    fbb_.AddElement<int8_t>(L2NormOptions::VT_FUSED_ACTIVATION_FUNCTION,
+                            static_cast<int8_t>(fused_activation_function), 0);
+  }
+  explicit L2NormOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  L2NormOptionsBuilder &operator=(const L2NormOptionsBuilder &);
+  flatbuffers::Offset<L2NormOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<L2NormOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<L2NormOptions>
+CreateL2NormOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                    ActivationFunctionType fused_activation_function = ActivationFunctionType_NONE)
+{
+  L2NormOptionsBuilder builder_(_fbb);
+  builder_.add_fused_activation_function(fused_activation_function);
+  return builder_.Finish();
+}
+
+struct LocalResponseNormalizationOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_RADIUS = 4,
+    VT_BIAS = 6,
+    VT_ALPHA = 8,
+    VT_BETA = 10
+  };
+  int32_t radius() const { return GetField<int32_t>(VT_RADIUS, 0); }
+  float bias() const { return GetField<float>(VT_BIAS, 0.0f); }
+  float alpha() const { return GetField<float>(VT_ALPHA, 0.0f); }
+  float beta() const { return GetField<float>(VT_BETA, 0.0f); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int32_t>(verifier, VT_RADIUS) &&
+           VerifyField<float>(verifier, VT_BIAS) && VerifyField<float>(verifier, VT_ALPHA) &&
+           VerifyField<float>(verifier, VT_BETA) && verifier.EndTable();
+  }
+};
+
+struct LocalResponseNormalizationOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_radius(int32_t radius)
+  {
+    fbb_.AddElement<int32_t>(LocalResponseNormalizationOptions::VT_RADIUS, radius, 0);
+  }
+  void add_bias(float bias)
+  {
+    fbb_.AddElement<float>(LocalResponseNormalizationOptions::VT_BIAS, bias, 0.0f);
+  }
+  void add_alpha(float alpha)
+  {
+    fbb_.AddElement<float>(LocalResponseNormalizationOptions::VT_ALPHA, alpha, 0.0f);
+  }
+  void add_beta(float beta)
+  {
+    fbb_.AddElement<float>(LocalResponseNormalizationOptions::VT_BETA, beta, 0.0f);
+  }
+  explicit LocalResponseNormalizationOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb)
+      : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  LocalResponseNormalizationOptionsBuilder &
+  operator=(const LocalResponseNormalizationOptionsBuilder &);
+  flatbuffers::Offset<LocalResponseNormalizationOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<LocalResponseNormalizationOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<LocalResponseNormalizationOptions>
+CreateLocalResponseNormalizationOptions(flatbuffers::FlatBufferBuilder &_fbb, int32_t radius = 0,
+                                        float bias = 0.0f, float alpha = 0.0f, float beta = 0.0f)
+{
+  LocalResponseNormalizationOptionsBuilder builder_(_fbb);
+  builder_.add_beta(beta);
+  builder_.add_alpha(alpha);
+  builder_.add_bias(bias);
+  builder_.add_radius(radius);
+  return builder_.Finish();
+}
+
+struct LSTMOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_FUSED_ACTIVATION_FUNCTION = 4,
+    VT_CELL_CLIP = 6,
+    VT_PROJ_CLIP = 8,
+    VT_KERNEL_TYPE = 10
+  };
+  ActivationFunctionType fused_activation_function() const
+  {
+    return static_cast<ActivationFunctionType>(GetField<int8_t>(VT_FUSED_ACTIVATION_FUNCTION, 0));
+  }
+  float cell_clip() const { return GetField<float>(VT_CELL_CLIP, 0.0f); }
+  float proj_clip() const { return GetField<float>(VT_PROJ_CLIP, 0.0f); }
+  LSTMKernelType kernel_type() const
+  {
+    return static_cast<LSTMKernelType>(GetField<int8_t>(VT_KERNEL_TYPE, 0));
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) &&
+           VerifyField<int8_t>(verifier, VT_FUSED_ACTIVATION_FUNCTION) &&
+           VerifyField<float>(verifier, VT_CELL_CLIP) &&
+           VerifyField<float>(verifier, VT_PROJ_CLIP) &&
+           VerifyField<int8_t>(verifier, VT_KERNEL_TYPE) && verifier.EndTable();
+  }
+};
+
+struct LSTMOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_fused_activation_function(ActivationFunctionType fused_activation_function)
+  {
+    fbb_.AddElement<int8_t>(LSTMOptions::VT_FUSED_ACTIVATION_FUNCTION,
+                            static_cast<int8_t>(fused_activation_function), 0);
+  }
+  void add_cell_clip(float cell_clip)
+  {
+    fbb_.AddElement<float>(LSTMOptions::VT_CELL_CLIP, cell_clip, 0.0f);
+  }
+  void add_proj_clip(float proj_clip)
+  {
+    fbb_.AddElement<float>(LSTMOptions::VT_PROJ_CLIP, proj_clip, 0.0f);
+  }
+  void add_kernel_type(LSTMKernelType kernel_type)
+  {
+    fbb_.AddElement<int8_t>(LSTMOptions::VT_KERNEL_TYPE, static_cast<int8_t>(kernel_type), 0);
+  }
+  explicit LSTMOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  LSTMOptionsBuilder &operator=(const LSTMOptionsBuilder &);
+  flatbuffers::Offset<LSTMOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<LSTMOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<LSTMOptions>
+CreateLSTMOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                  ActivationFunctionType fused_activation_function = ActivationFunctionType_NONE,
+                  float cell_clip = 0.0f, float proj_clip = 0.0f,
+                  LSTMKernelType kernel_type = LSTMKernelType_FULL)
+{
+  LSTMOptionsBuilder builder_(_fbb);
+  builder_.add_proj_clip(proj_clip);
+  builder_.add_cell_clip(cell_clip);
+  builder_.add_kernel_type(kernel_type);
+  builder_.add_fused_activation_function(fused_activation_function);
+  return builder_.Finish();
+}
+
+struct UnidirectionalSequenceLSTMOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_FUSED_ACTIVATION_FUNCTION = 4,
+    VT_CELL_CLIP = 6,
+    VT_PROJ_CLIP = 8,
+    VT_TIME_MAJOR = 10
+  };
+  ActivationFunctionType fused_activation_function() const
+  {
+    return static_cast<ActivationFunctionType>(GetField<int8_t>(VT_FUSED_ACTIVATION_FUNCTION, 0));
+  }
+  float cell_clip() const { return GetField<float>(VT_CELL_CLIP, 0.0f); }
+  float proj_clip() const { return GetField<float>(VT_PROJ_CLIP, 0.0f); }
+  bool time_major() const { return GetField<uint8_t>(VT_TIME_MAJOR, 0) != 0; }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) &&
+           VerifyField<int8_t>(verifier, VT_FUSED_ACTIVATION_FUNCTION) &&
+           VerifyField<float>(verifier, VT_CELL_CLIP) &&
+           VerifyField<float>(verifier, VT_PROJ_CLIP) &&
+           VerifyField<uint8_t>(verifier, VT_TIME_MAJOR) && verifier.EndTable();
+  }
+};
+
+struct UnidirectionalSequenceLSTMOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_fused_activation_function(ActivationFunctionType fused_activation_function)
+  {
+    fbb_.AddElement<int8_t>(UnidirectionalSequenceLSTMOptions::VT_FUSED_ACTIVATION_FUNCTION,
+                            static_cast<int8_t>(fused_activation_function), 0);
+  }
+  void add_cell_clip(float cell_clip)
+  {
+    fbb_.AddElement<float>(UnidirectionalSequenceLSTMOptions::VT_CELL_CLIP, cell_clip, 0.0f);
+  }
+  void add_proj_clip(float proj_clip)
+  {
+    fbb_.AddElement<float>(UnidirectionalSequenceLSTMOptions::VT_PROJ_CLIP, proj_clip, 0.0f);
+  }
+  void add_time_major(bool time_major)
+  {
+    fbb_.AddElement<uint8_t>(UnidirectionalSequenceLSTMOptions::VT_TIME_MAJOR,
+                             static_cast<uint8_t>(time_major), 0);
+  }
+  explicit UnidirectionalSequenceLSTMOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb)
+      : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  UnidirectionalSequenceLSTMOptionsBuilder &
+  operator=(const UnidirectionalSequenceLSTMOptionsBuilder &);
+  flatbuffers::Offset<UnidirectionalSequenceLSTMOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<UnidirectionalSequenceLSTMOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<UnidirectionalSequenceLSTMOptions>
+CreateUnidirectionalSequenceLSTMOptions(
+    flatbuffers::FlatBufferBuilder &_fbb,
+    ActivationFunctionType fused_activation_function = ActivationFunctionType_NONE,
+    float cell_clip = 0.0f, float proj_clip = 0.0f, bool time_major = false)
+{
+  UnidirectionalSequenceLSTMOptionsBuilder builder_(_fbb);
+  builder_.add_proj_clip(proj_clip);
+  builder_.add_cell_clip(cell_clip);
+  builder_.add_time_major(time_major);
+  builder_.add_fused_activation_function(fused_activation_function);
+  return builder_.Finish();
+}
+
+struct BidirectionalSequenceLSTMOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_FUSED_ACTIVATION_FUNCTION = 4,
+    VT_CELL_CLIP = 6,
+    VT_PROJ_CLIP = 8,
+    VT_MERGE_OUTPUTS = 10
+  };
+  ActivationFunctionType fused_activation_function() const
+  {
+    return static_cast<ActivationFunctionType>(GetField<int8_t>(VT_FUSED_ACTIVATION_FUNCTION, 0));
+  }
+  float cell_clip() const { return GetField<float>(VT_CELL_CLIP, 0.0f); }
+  float proj_clip() const { return GetField<float>(VT_PROJ_CLIP, 0.0f); }
+  bool merge_outputs() const { return GetField<uint8_t>(VT_MERGE_OUTPUTS, 0) != 0; }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) &&
+           VerifyField<int8_t>(verifier, VT_FUSED_ACTIVATION_FUNCTION) &&
+           VerifyField<float>(verifier, VT_CELL_CLIP) &&
+           VerifyField<float>(verifier, VT_PROJ_CLIP) &&
+           VerifyField<uint8_t>(verifier, VT_MERGE_OUTPUTS) && verifier.EndTable();
+  }
+};
+
+struct BidirectionalSequenceLSTMOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_fused_activation_function(ActivationFunctionType fused_activation_function)
+  {
+    fbb_.AddElement<int8_t>(BidirectionalSequenceLSTMOptions::VT_FUSED_ACTIVATION_FUNCTION,
+                            static_cast<int8_t>(fused_activation_function), 0);
+  }
+  void add_cell_clip(float cell_clip)
+  {
+    fbb_.AddElement<float>(BidirectionalSequenceLSTMOptions::VT_CELL_CLIP, cell_clip, 0.0f);
+  }
+  void add_proj_clip(float proj_clip)
+  {
+    fbb_.AddElement<float>(BidirectionalSequenceLSTMOptions::VT_PROJ_CLIP, proj_clip, 0.0f);
+  }
+  void add_merge_outputs(bool merge_outputs)
+  {
+    fbb_.AddElement<uint8_t>(BidirectionalSequenceLSTMOptions::VT_MERGE_OUTPUTS,
+                             static_cast<uint8_t>(merge_outputs), 0);
+  }
+  explicit BidirectionalSequenceLSTMOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb)
+      : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  BidirectionalSequenceLSTMOptionsBuilder &
+  operator=(const BidirectionalSequenceLSTMOptionsBuilder &);
+  flatbuffers::Offset<BidirectionalSequenceLSTMOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<BidirectionalSequenceLSTMOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<BidirectionalSequenceLSTMOptions> CreateBidirectionalSequenceLSTMOptions(
+    flatbuffers::FlatBufferBuilder &_fbb,
+    ActivationFunctionType fused_activation_function = ActivationFunctionType_NONE,
+    float cell_clip = 0.0f, float proj_clip = 0.0f, bool merge_outputs = false)
+{
+  BidirectionalSequenceLSTMOptionsBuilder builder_(_fbb);
+  builder_.add_proj_clip(proj_clip);
+  builder_.add_cell_clip(cell_clip);
+  builder_.add_merge_outputs(merge_outputs);
+  builder_.add_fused_activation_function(fused_activation_function);
+  return builder_.Finish();
+}
+
+struct ResizeBilinearOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_ALIGN_CORNERS = 8
+  };
+  bool align_corners() const { return GetField<uint8_t>(VT_ALIGN_CORNERS, 0) != 0; }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<uint8_t>(verifier, VT_ALIGN_CORNERS) &&
+           verifier.EndTable();
+  }
+};
+
+struct ResizeBilinearOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_align_corners(bool align_corners)
+  {
+    fbb_.AddElement<uint8_t>(ResizeBilinearOptions::VT_ALIGN_CORNERS,
+                             static_cast<uint8_t>(align_corners), 0);
+  }
+  explicit ResizeBilinearOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  ResizeBilinearOptionsBuilder &operator=(const ResizeBilinearOptionsBuilder &);
+  flatbuffers::Offset<ResizeBilinearOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<ResizeBilinearOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<ResizeBilinearOptions>
+CreateResizeBilinearOptions(flatbuffers::FlatBufferBuilder &_fbb, bool align_corners = false)
+{
+  ResizeBilinearOptionsBuilder builder_(_fbb);
+  builder_.add_align_corners(align_corners);
+  return builder_.Finish();
+}
+
+struct ResizeNearestNeighborOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_ALIGN_CORNERS = 4
+  };
+  bool align_corners() const { return GetField<uint8_t>(VT_ALIGN_CORNERS, 0) != 0; }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<uint8_t>(verifier, VT_ALIGN_CORNERS) &&
+           verifier.EndTable();
+  }
+};
+
+struct ResizeNearestNeighborOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_align_corners(bool align_corners)
+  {
+    fbb_.AddElement<uint8_t>(ResizeNearestNeighborOptions::VT_ALIGN_CORNERS,
+                             static_cast<uint8_t>(align_corners), 0);
+  }
+  explicit ResizeNearestNeighborOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  ResizeNearestNeighborOptionsBuilder &operator=(const ResizeNearestNeighborOptionsBuilder &);
+  flatbuffers::Offset<ResizeNearestNeighborOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<ResizeNearestNeighborOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<ResizeNearestNeighborOptions>
+CreateResizeNearestNeighborOptions(flatbuffers::FlatBufferBuilder &_fbb, bool align_corners = false)
+{
+  ResizeNearestNeighborOptionsBuilder builder_(_fbb);
+  builder_.add_align_corners(align_corners);
+  return builder_.Finish();
+}
+
+struct CallOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_SUBGRAPH = 4
+  };
+  uint32_t subgraph() const { return GetField<uint32_t>(VT_SUBGRAPH, 0); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<uint32_t>(verifier, VT_SUBGRAPH) &&
+           verifier.EndTable();
+  }
+};
+
+struct CallOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_subgraph(uint32_t subgraph)
+  {
+    fbb_.AddElement<uint32_t>(CallOptions::VT_SUBGRAPH, subgraph, 0);
+  }
+  explicit CallOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  CallOptionsBuilder &operator=(const CallOptionsBuilder &);
+  flatbuffers::Offset<CallOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<CallOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<CallOptions> CreateCallOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                                                          uint32_t subgraph = 0)
+{
+  CallOptionsBuilder builder_(_fbb);
+  builder_.add_subgraph(subgraph);
+  return builder_.Finish();
+}
+
+struct PadOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct PadOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit PadOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  PadOptionsBuilder &operator=(const PadOptionsBuilder &);
+  flatbuffers::Offset<PadOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<PadOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<PadOptions> CreatePadOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  PadOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct PadV2Options FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct PadV2OptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit PadV2OptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  PadV2OptionsBuilder &operator=(const PadV2OptionsBuilder &);
+  flatbuffers::Offset<PadV2Options> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<PadV2Options>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<PadV2Options> CreatePadV2Options(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  PadV2OptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct ReshapeOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_NEW_SHAPE = 4
+  };
+  const flatbuffers::Vector<int32_t> *new_shape() const
+  {
+    return GetPointer<const flatbuffers::Vector<int32_t> *>(VT_NEW_SHAPE);
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyOffset(verifier, VT_NEW_SHAPE) &&
+           verifier.VerifyVector(new_shape()) && verifier.EndTable();
+  }
+};
+
+struct ReshapeOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_new_shape(flatbuffers::Offset<flatbuffers::Vector<int32_t>> new_shape)
+  {
+    fbb_.AddOffset(ReshapeOptions::VT_NEW_SHAPE, new_shape);
+  }
+  explicit ReshapeOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  ReshapeOptionsBuilder &operator=(const ReshapeOptionsBuilder &);
+  flatbuffers::Offset<ReshapeOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<ReshapeOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<ReshapeOptions>
+CreateReshapeOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                     flatbuffers::Offset<flatbuffers::Vector<int32_t>> new_shape = 0)
+{
+  ReshapeOptionsBuilder builder_(_fbb);
+  builder_.add_new_shape(new_shape);
+  return builder_.Finish();
+}
+
+inline flatbuffers::Offset<ReshapeOptions>
+CreateReshapeOptionsDirect(flatbuffers::FlatBufferBuilder &_fbb,
+                           const std::vector<int32_t> *new_shape = nullptr)
+{
+  return tflite::CreateReshapeOptions(_fbb, new_shape ? _fbb.CreateVector<int32_t>(*new_shape) : 0);
+}
+
+struct SpaceToBatchNDOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct SpaceToBatchNDOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit SpaceToBatchNDOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  SpaceToBatchNDOptionsBuilder &operator=(const SpaceToBatchNDOptionsBuilder &);
+  flatbuffers::Offset<SpaceToBatchNDOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<SpaceToBatchNDOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<SpaceToBatchNDOptions>
+CreateSpaceToBatchNDOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  SpaceToBatchNDOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct BatchToSpaceNDOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct BatchToSpaceNDOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit BatchToSpaceNDOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  BatchToSpaceNDOptionsBuilder &operator=(const BatchToSpaceNDOptionsBuilder &);
+  flatbuffers::Offset<BatchToSpaceNDOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<BatchToSpaceNDOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<BatchToSpaceNDOptions>
+CreateBatchToSpaceNDOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  BatchToSpaceNDOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct SkipGramOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_NGRAM_SIZE = 4,
+    VT_MAX_SKIP_SIZE = 6,
+    VT_INCLUDE_ALL_NGRAMS = 8
+  };
+  int32_t ngram_size() const { return GetField<int32_t>(VT_NGRAM_SIZE, 0); }
+  int32_t max_skip_size() const { return GetField<int32_t>(VT_MAX_SKIP_SIZE, 0); }
+  bool include_all_ngrams() const { return GetField<uint8_t>(VT_INCLUDE_ALL_NGRAMS, 0) != 0; }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int32_t>(verifier, VT_NGRAM_SIZE) &&
+           VerifyField<int32_t>(verifier, VT_MAX_SKIP_SIZE) &&
+           VerifyField<uint8_t>(verifier, VT_INCLUDE_ALL_NGRAMS) && verifier.EndTable();
+  }
+};
+
+struct SkipGramOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_ngram_size(int32_t ngram_size)
+  {
+    fbb_.AddElement<int32_t>(SkipGramOptions::VT_NGRAM_SIZE, ngram_size, 0);
+  }
+  void add_max_skip_size(int32_t max_skip_size)
+  {
+    fbb_.AddElement<int32_t>(SkipGramOptions::VT_MAX_SKIP_SIZE, max_skip_size, 0);
+  }
+  void add_include_all_ngrams(bool include_all_ngrams)
+  {
+    fbb_.AddElement<uint8_t>(SkipGramOptions::VT_INCLUDE_ALL_NGRAMS,
+                             static_cast<uint8_t>(include_all_ngrams), 0);
+  }
+  explicit SkipGramOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  SkipGramOptionsBuilder &operator=(const SkipGramOptionsBuilder &);
+  flatbuffers::Offset<SkipGramOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<SkipGramOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<SkipGramOptions>
+CreateSkipGramOptions(flatbuffers::FlatBufferBuilder &_fbb, int32_t ngram_size = 0,
+                      int32_t max_skip_size = 0, bool include_all_ngrams = false)
+{
+  SkipGramOptionsBuilder builder_(_fbb);
+  builder_.add_max_skip_size(max_skip_size);
+  builder_.add_ngram_size(ngram_size);
+  builder_.add_include_all_ngrams(include_all_ngrams);
+  return builder_.Finish();
+}
+
+struct SpaceToDepthOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_BLOCK_SIZE = 4
+  };
+  int32_t block_size() const { return GetField<int32_t>(VT_BLOCK_SIZE, 0); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int32_t>(verifier, VT_BLOCK_SIZE) &&
+           verifier.EndTable();
+  }
+};
+
+struct SpaceToDepthOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_block_size(int32_t block_size)
+  {
+    fbb_.AddElement<int32_t>(SpaceToDepthOptions::VT_BLOCK_SIZE, block_size, 0);
+  }
+  explicit SpaceToDepthOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  SpaceToDepthOptionsBuilder &operator=(const SpaceToDepthOptionsBuilder &);
+  flatbuffers::Offset<SpaceToDepthOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<SpaceToDepthOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<SpaceToDepthOptions>
+CreateSpaceToDepthOptions(flatbuffers::FlatBufferBuilder &_fbb, int32_t block_size = 0)
+{
+  SpaceToDepthOptionsBuilder builder_(_fbb);
+  builder_.add_block_size(block_size);
+  return builder_.Finish();
+}
+
+struct SubOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_FUSED_ACTIVATION_FUNCTION = 4
+  };
+  ActivationFunctionType fused_activation_function() const
+  {
+    return static_cast<ActivationFunctionType>(GetField<int8_t>(VT_FUSED_ACTIVATION_FUNCTION, 0));
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) &&
+           VerifyField<int8_t>(verifier, VT_FUSED_ACTIVATION_FUNCTION) && verifier.EndTable();
+  }
+};
+
+struct SubOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_fused_activation_function(ActivationFunctionType fused_activation_function)
+  {
+    fbb_.AddElement<int8_t>(SubOptions::VT_FUSED_ACTIVATION_FUNCTION,
+                            static_cast<int8_t>(fused_activation_function), 0);
+  }
+  explicit SubOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  SubOptionsBuilder &operator=(const SubOptionsBuilder &);
+  flatbuffers::Offset<SubOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<SubOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<SubOptions>
+CreateSubOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                 ActivationFunctionType fused_activation_function = ActivationFunctionType_NONE)
+{
+  SubOptionsBuilder builder_(_fbb);
+  builder_.add_fused_activation_function(fused_activation_function);
+  return builder_.Finish();
+}
+
+struct DivOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_FUSED_ACTIVATION_FUNCTION = 4
+  };
+  ActivationFunctionType fused_activation_function() const
+  {
+    return static_cast<ActivationFunctionType>(GetField<int8_t>(VT_FUSED_ACTIVATION_FUNCTION, 0));
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) &&
+           VerifyField<int8_t>(verifier, VT_FUSED_ACTIVATION_FUNCTION) && verifier.EndTable();
+  }
+};
+
+struct DivOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_fused_activation_function(ActivationFunctionType fused_activation_function)
+  {
+    fbb_.AddElement<int8_t>(DivOptions::VT_FUSED_ACTIVATION_FUNCTION,
+                            static_cast<int8_t>(fused_activation_function), 0);
+  }
+  explicit DivOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  DivOptionsBuilder &operator=(const DivOptionsBuilder &);
+  flatbuffers::Offset<DivOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<DivOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<DivOptions>
+CreateDivOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                 ActivationFunctionType fused_activation_function = ActivationFunctionType_NONE)
+{
+  DivOptionsBuilder builder_(_fbb);
+  builder_.add_fused_activation_function(fused_activation_function);
+  return builder_.Finish();
+}
+
+struct TopKV2Options FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct TopKV2OptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit TopKV2OptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  TopKV2OptionsBuilder &operator=(const TopKV2OptionsBuilder &);
+  flatbuffers::Offset<TopKV2Options> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<TopKV2Options>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<TopKV2Options> CreateTopKV2Options(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  TopKV2OptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct EmbeddingLookupSparseOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_COMBINER = 4
+  };
+  CombinerType combiner() const
+  {
+    return static_cast<CombinerType>(GetField<int8_t>(VT_COMBINER, 0));
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int8_t>(verifier, VT_COMBINER) &&
+           verifier.EndTable();
+  }
+};
+
+struct EmbeddingLookupSparseOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_combiner(CombinerType combiner)
+  {
+    fbb_.AddElement<int8_t>(EmbeddingLookupSparseOptions::VT_COMBINER,
+                            static_cast<int8_t>(combiner), 0);
+  }
+  explicit EmbeddingLookupSparseOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  EmbeddingLookupSparseOptionsBuilder &operator=(const EmbeddingLookupSparseOptionsBuilder &);
+  flatbuffers::Offset<EmbeddingLookupSparseOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<EmbeddingLookupSparseOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<EmbeddingLookupSparseOptions>
+CreateEmbeddingLookupSparseOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                                   CombinerType combiner = CombinerType_SUM)
+{
+  EmbeddingLookupSparseOptionsBuilder builder_(_fbb);
+  builder_.add_combiner(combiner);
+  return builder_.Finish();
+}
+
+struct GatherOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_AXIS = 4
+  };
+  int32_t axis() const { return GetField<int32_t>(VT_AXIS, 0); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int32_t>(verifier, VT_AXIS) &&
+           verifier.EndTable();
+  }
+};
+
+struct GatherOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_axis(int32_t axis) { fbb_.AddElement<int32_t>(GatherOptions::VT_AXIS, axis, 0); }
+  explicit GatherOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  GatherOptionsBuilder &operator=(const GatherOptionsBuilder &);
+  flatbuffers::Offset<GatherOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<GatherOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<GatherOptions> CreateGatherOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                                                              int32_t axis = 0)
+{
+  GatherOptionsBuilder builder_(_fbb);
+  builder_.add_axis(axis);
+  return builder_.Finish();
+}
+
+struct TransposeOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct TransposeOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit TransposeOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  TransposeOptionsBuilder &operator=(const TransposeOptionsBuilder &);
+  flatbuffers::Offset<TransposeOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<TransposeOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<TransposeOptions>
+CreateTransposeOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  TransposeOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct ExpOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct ExpOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit ExpOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  ExpOptionsBuilder &operator=(const ExpOptionsBuilder &);
+  flatbuffers::Offset<ExpOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<ExpOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<ExpOptions> CreateExpOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  ExpOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct ReducerOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_KEEP_DIMS = 4
+  };
+  bool keep_dims() const { return GetField<uint8_t>(VT_KEEP_DIMS, 0) != 0; }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<uint8_t>(verifier, VT_KEEP_DIMS) &&
+           verifier.EndTable();
+  }
+};
+
+struct ReducerOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_keep_dims(bool keep_dims)
+  {
+    fbb_.AddElement<uint8_t>(ReducerOptions::VT_KEEP_DIMS, static_cast<uint8_t>(keep_dims), 0);
+  }
+  explicit ReducerOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  ReducerOptionsBuilder &operator=(const ReducerOptionsBuilder &);
+  flatbuffers::Offset<ReducerOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<ReducerOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<ReducerOptions>
+CreateReducerOptions(flatbuffers::FlatBufferBuilder &_fbb, bool keep_dims = false)
+{
+  ReducerOptionsBuilder builder_(_fbb);
+  builder_.add_keep_dims(keep_dims);
+  return builder_.Finish();
+}
+
+struct SqueezeOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_SQUEEZE_DIMS = 4
+  };
+  const flatbuffers::Vector<int32_t> *squeeze_dims() const
+  {
+    return GetPointer<const flatbuffers::Vector<int32_t> *>(VT_SQUEEZE_DIMS);
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyOffset(verifier, VT_SQUEEZE_DIMS) &&
+           verifier.VerifyVector(squeeze_dims()) && verifier.EndTable();
+  }
+};
+
+struct SqueezeOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_squeeze_dims(flatbuffers::Offset<flatbuffers::Vector<int32_t>> squeeze_dims)
+  {
+    fbb_.AddOffset(SqueezeOptions::VT_SQUEEZE_DIMS, squeeze_dims);
+  }
+  explicit SqueezeOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  SqueezeOptionsBuilder &operator=(const SqueezeOptionsBuilder &);
+  flatbuffers::Offset<SqueezeOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<SqueezeOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<SqueezeOptions>
+CreateSqueezeOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                     flatbuffers::Offset<flatbuffers::Vector<int32_t>> squeeze_dims = 0)
+{
+  SqueezeOptionsBuilder builder_(_fbb);
+  builder_.add_squeeze_dims(squeeze_dims);
+  return builder_.Finish();
+}
+
+inline flatbuffers::Offset<SqueezeOptions>
+CreateSqueezeOptionsDirect(flatbuffers::FlatBufferBuilder &_fbb,
+                           const std::vector<int32_t> *squeeze_dims = nullptr)
+{
+  return tflite::CreateSqueezeOptions(_fbb,
+                                      squeeze_dims ? _fbb.CreateVector<int32_t>(*squeeze_dims) : 0);
+}
+
+struct SplitOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_NUM_SPLITS = 4
+  };
+  int32_t num_splits() const { return GetField<int32_t>(VT_NUM_SPLITS, 0); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int32_t>(verifier, VT_NUM_SPLITS) &&
+           verifier.EndTable();
+  }
+};
+
+struct SplitOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_num_splits(int32_t num_splits)
+  {
+    fbb_.AddElement<int32_t>(SplitOptions::VT_NUM_SPLITS, num_splits, 0);
+  }
+  explicit SplitOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  SplitOptionsBuilder &operator=(const SplitOptionsBuilder &);
+  flatbuffers::Offset<SplitOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<SplitOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<SplitOptions> CreateSplitOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                                                            int32_t num_splits = 0)
+{
+  SplitOptionsBuilder builder_(_fbb);
+  builder_.add_num_splits(num_splits);
+  return builder_.Finish();
+}
+
+struct SplitVOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_NUM_SPLITS = 4
+  };
+  int32_t num_splits() const { return GetField<int32_t>(VT_NUM_SPLITS, 0); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int32_t>(verifier, VT_NUM_SPLITS) &&
+           verifier.EndTable();
+  }
+};
+
+struct SplitVOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_num_splits(int32_t num_splits)
+  {
+    fbb_.AddElement<int32_t>(SplitVOptions::VT_NUM_SPLITS, num_splits, 0);
+  }
+  explicit SplitVOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  SplitVOptionsBuilder &operator=(const SplitVOptionsBuilder &);
+  flatbuffers::Offset<SplitVOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<SplitVOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<SplitVOptions> CreateSplitVOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                                                              int32_t num_splits = 0)
+{
+  SplitVOptionsBuilder builder_(_fbb);
+  builder_.add_num_splits(num_splits);
+  return builder_.Finish();
+}
+
+struct StridedSliceOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_BEGIN_MASK = 4,
+    VT_END_MASK = 6,
+    VT_ELLIPSIS_MASK = 8,
+    VT_NEW_AXIS_MASK = 10,
+    VT_SHRINK_AXIS_MASK = 12
+  };
+  int32_t begin_mask() const { return GetField<int32_t>(VT_BEGIN_MASK, 0); }
+  int32_t end_mask() const { return GetField<int32_t>(VT_END_MASK, 0); }
+  int32_t ellipsis_mask() const { return GetField<int32_t>(VT_ELLIPSIS_MASK, 0); }
+  int32_t new_axis_mask() const { return GetField<int32_t>(VT_NEW_AXIS_MASK, 0); }
+  int32_t shrink_axis_mask() const { return GetField<int32_t>(VT_SHRINK_AXIS_MASK, 0); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int32_t>(verifier, VT_BEGIN_MASK) &&
+           VerifyField<int32_t>(verifier, VT_END_MASK) &&
+           VerifyField<int32_t>(verifier, VT_ELLIPSIS_MASK) &&
+           VerifyField<int32_t>(verifier, VT_NEW_AXIS_MASK) &&
+           VerifyField<int32_t>(verifier, VT_SHRINK_AXIS_MASK) && verifier.EndTable();
+  }
+};
+
+struct StridedSliceOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_begin_mask(int32_t begin_mask)
+  {
+    fbb_.AddElement<int32_t>(StridedSliceOptions::VT_BEGIN_MASK, begin_mask, 0);
+  }
+  void add_end_mask(int32_t end_mask)
+  {
+    fbb_.AddElement<int32_t>(StridedSliceOptions::VT_END_MASK, end_mask, 0);
+  }
+  void add_ellipsis_mask(int32_t ellipsis_mask)
+  {
+    fbb_.AddElement<int32_t>(StridedSliceOptions::VT_ELLIPSIS_MASK, ellipsis_mask, 0);
+  }
+  void add_new_axis_mask(int32_t new_axis_mask)
+  {
+    fbb_.AddElement<int32_t>(StridedSliceOptions::VT_NEW_AXIS_MASK, new_axis_mask, 0);
+  }
+  void add_shrink_axis_mask(int32_t shrink_axis_mask)
+  {
+    fbb_.AddElement<int32_t>(StridedSliceOptions::VT_SHRINK_AXIS_MASK, shrink_axis_mask, 0);
+  }
+  explicit StridedSliceOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  StridedSliceOptionsBuilder &operator=(const StridedSliceOptionsBuilder &);
+  flatbuffers::Offset<StridedSliceOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<StridedSliceOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<StridedSliceOptions>
+CreateStridedSliceOptions(flatbuffers::FlatBufferBuilder &_fbb, int32_t begin_mask = 0,
+                          int32_t end_mask = 0, int32_t ellipsis_mask = 0,
+                          int32_t new_axis_mask = 0, int32_t shrink_axis_mask = 0)
+{
+  StridedSliceOptionsBuilder builder_(_fbb);
+  builder_.add_shrink_axis_mask(shrink_axis_mask);
+  builder_.add_new_axis_mask(new_axis_mask);
+  builder_.add_ellipsis_mask(ellipsis_mask);
+  builder_.add_end_mask(end_mask);
+  builder_.add_begin_mask(begin_mask);
+  return builder_.Finish();
+}
+
+struct LogSoftmaxOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct LogSoftmaxOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit LogSoftmaxOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  LogSoftmaxOptionsBuilder &operator=(const LogSoftmaxOptionsBuilder &);
+  flatbuffers::Offset<LogSoftmaxOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<LogSoftmaxOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<LogSoftmaxOptions>
+CreateLogSoftmaxOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  LogSoftmaxOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct CastOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_IN_DATA_TYPE = 4,
+    VT_OUT_DATA_TYPE = 6
+  };
+  TensorType in_data_type() const
+  {
+    return static_cast<TensorType>(GetField<int8_t>(VT_IN_DATA_TYPE, 0));
+  }
+  TensorType out_data_type() const
+  {
+    return static_cast<TensorType>(GetField<int8_t>(VT_OUT_DATA_TYPE, 0));
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int8_t>(verifier, VT_IN_DATA_TYPE) &&
+           VerifyField<int8_t>(verifier, VT_OUT_DATA_TYPE) && verifier.EndTable();
+  }
+};
+
+struct CastOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_in_data_type(TensorType in_data_type)
+  {
+    fbb_.AddElement<int8_t>(CastOptions::VT_IN_DATA_TYPE, static_cast<int8_t>(in_data_type), 0);
+  }
+  void add_out_data_type(TensorType out_data_type)
+  {
+    fbb_.AddElement<int8_t>(CastOptions::VT_OUT_DATA_TYPE, static_cast<int8_t>(out_data_type), 0);
+  }
+  explicit CastOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  CastOptionsBuilder &operator=(const CastOptionsBuilder &);
+  flatbuffers::Offset<CastOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<CastOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<CastOptions>
+CreateCastOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                  TensorType in_data_type = TensorType_FLOAT32,
+                  TensorType out_data_type = TensorType_FLOAT32)
+{
+  CastOptionsBuilder builder_(_fbb);
+  builder_.add_out_data_type(out_data_type);
+  builder_.add_in_data_type(in_data_type);
+  return builder_.Finish();
+}
+
+struct DequantizeOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct DequantizeOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit DequantizeOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  DequantizeOptionsBuilder &operator=(const DequantizeOptionsBuilder &);
+  flatbuffers::Offset<DequantizeOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<DequantizeOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<DequantizeOptions>
+CreateDequantizeOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  DequantizeOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct MaximumMinimumOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct MaximumMinimumOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit MaximumMinimumOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  MaximumMinimumOptionsBuilder &operator=(const MaximumMinimumOptionsBuilder &);
+  flatbuffers::Offset<MaximumMinimumOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<MaximumMinimumOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<MaximumMinimumOptions>
+CreateMaximumMinimumOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  MaximumMinimumOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct TileOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct TileOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit TileOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  TileOptionsBuilder &operator=(const TileOptionsBuilder &);
+  flatbuffers::Offset<TileOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<TileOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<TileOptions> CreateTileOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  TileOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct ArgMaxOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_OUTPUT_TYPE = 4
+  };
+  TensorType output_type() const
+  {
+    return static_cast<TensorType>(GetField<int8_t>(VT_OUTPUT_TYPE, 0));
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int8_t>(verifier, VT_OUTPUT_TYPE) &&
+           verifier.EndTable();
+  }
+};
+
+struct ArgMaxOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_output_type(TensorType output_type)
+  {
+    fbb_.AddElement<int8_t>(ArgMaxOptions::VT_OUTPUT_TYPE, static_cast<int8_t>(output_type), 0);
+  }
+  explicit ArgMaxOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  ArgMaxOptionsBuilder &operator=(const ArgMaxOptionsBuilder &);
+  flatbuffers::Offset<ArgMaxOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<ArgMaxOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<ArgMaxOptions>
+CreateArgMaxOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                    TensorType output_type = TensorType_FLOAT32)
+{
+  ArgMaxOptionsBuilder builder_(_fbb);
+  builder_.add_output_type(output_type);
+  return builder_.Finish();
+}
+
+struct ArgMinOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_OUTPUT_TYPE = 4
+  };
+  TensorType output_type() const
+  {
+    return static_cast<TensorType>(GetField<int8_t>(VT_OUTPUT_TYPE, 0));
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int8_t>(verifier, VT_OUTPUT_TYPE) &&
+           verifier.EndTable();
+  }
+};
+
+struct ArgMinOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_output_type(TensorType output_type)
+  {
+    fbb_.AddElement<int8_t>(ArgMinOptions::VT_OUTPUT_TYPE, static_cast<int8_t>(output_type), 0);
+  }
+  explicit ArgMinOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  ArgMinOptionsBuilder &operator=(const ArgMinOptionsBuilder &);
+  flatbuffers::Offset<ArgMinOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<ArgMinOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<ArgMinOptions>
+CreateArgMinOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                    TensorType output_type = TensorType_FLOAT32)
+{
+  ArgMinOptionsBuilder builder_(_fbb);
+  builder_.add_output_type(output_type);
+  return builder_.Finish();
+}
+
+struct GreaterOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct GreaterOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit GreaterOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  GreaterOptionsBuilder &operator=(const GreaterOptionsBuilder &);
+  flatbuffers::Offset<GreaterOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<GreaterOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<GreaterOptions>
+CreateGreaterOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  GreaterOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct GreaterEqualOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct GreaterEqualOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit GreaterEqualOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  GreaterEqualOptionsBuilder &operator=(const GreaterEqualOptionsBuilder &);
+  flatbuffers::Offset<GreaterEqualOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<GreaterEqualOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<GreaterEqualOptions>
+CreateGreaterEqualOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  GreaterEqualOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct LessOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct LessOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit LessOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  LessOptionsBuilder &operator=(const LessOptionsBuilder &);
+  flatbuffers::Offset<LessOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<LessOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<LessOptions> CreateLessOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  LessOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct LessEqualOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct LessEqualOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit LessEqualOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  LessEqualOptionsBuilder &operator=(const LessEqualOptionsBuilder &);
+  flatbuffers::Offset<LessEqualOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<LessEqualOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<LessEqualOptions>
+CreateLessEqualOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  LessEqualOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct NegOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct NegOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit NegOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  NegOptionsBuilder &operator=(const NegOptionsBuilder &);
+  flatbuffers::Offset<NegOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<NegOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<NegOptions> CreateNegOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  NegOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct SelectOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct SelectOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit SelectOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  SelectOptionsBuilder &operator=(const SelectOptionsBuilder &);
+  flatbuffers::Offset<SelectOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<SelectOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<SelectOptions> CreateSelectOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  SelectOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct SliceOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct SliceOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit SliceOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  SliceOptionsBuilder &operator=(const SliceOptionsBuilder &);
+  flatbuffers::Offset<SliceOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<SliceOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<SliceOptions> CreateSliceOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  SliceOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct TransposeConvOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_PADDING = 4,
+    VT_STRIDE_W = 6,
+    VT_STRIDE_H = 8
+  };
+  Padding padding() const { return static_cast<Padding>(GetField<int8_t>(VT_PADDING, 0)); }
+  int32_t stride_w() const { return GetField<int32_t>(VT_STRIDE_W, 0); }
+  int32_t stride_h() const { return GetField<int32_t>(VT_STRIDE_H, 0); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int8_t>(verifier, VT_PADDING) &&
+           VerifyField<int32_t>(verifier, VT_STRIDE_W) &&
+           VerifyField<int32_t>(verifier, VT_STRIDE_H) && verifier.EndTable();
+  }
+};
+
+struct TransposeConvOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_padding(Padding padding)
+  {
+    fbb_.AddElement<int8_t>(TransposeConvOptions::VT_PADDING, static_cast<int8_t>(padding), 0);
+  }
+  void add_stride_w(int32_t stride_w)
+  {
+    fbb_.AddElement<int32_t>(TransposeConvOptions::VT_STRIDE_W, stride_w, 0);
+  }
+  void add_stride_h(int32_t stride_h)
+  {
+    fbb_.AddElement<int32_t>(TransposeConvOptions::VT_STRIDE_H, stride_h, 0);
+  }
+  explicit TransposeConvOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  TransposeConvOptionsBuilder &operator=(const TransposeConvOptionsBuilder &);
+  flatbuffers::Offset<TransposeConvOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<TransposeConvOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<TransposeConvOptions>
+CreateTransposeConvOptions(flatbuffers::FlatBufferBuilder &_fbb, Padding padding = Padding_SAME,
+                           int32_t stride_w = 0, int32_t stride_h = 0)
+{
+  TransposeConvOptionsBuilder builder_(_fbb);
+  builder_.add_stride_h(stride_h);
+  builder_.add_stride_w(stride_w);
+  builder_.add_padding(padding);
+  return builder_.Finish();
+}
+
+struct ExpandDimsOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct ExpandDimsOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit ExpandDimsOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  ExpandDimsOptionsBuilder &operator=(const ExpandDimsOptionsBuilder &);
+  flatbuffers::Offset<ExpandDimsOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<ExpandDimsOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<ExpandDimsOptions>
+CreateExpandDimsOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  ExpandDimsOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct SparseToDenseOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_VALIDATE_INDICES = 4
+  };
+  bool validate_indices() const { return GetField<uint8_t>(VT_VALIDATE_INDICES, 0) != 0; }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<uint8_t>(verifier, VT_VALIDATE_INDICES) &&
+           verifier.EndTable();
+  }
+};
+
+struct SparseToDenseOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_validate_indices(bool validate_indices)
+  {
+    fbb_.AddElement<uint8_t>(SparseToDenseOptions::VT_VALIDATE_INDICES,
+                             static_cast<uint8_t>(validate_indices), 0);
+  }
+  explicit SparseToDenseOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  SparseToDenseOptionsBuilder &operator=(const SparseToDenseOptionsBuilder &);
+  flatbuffers::Offset<SparseToDenseOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<SparseToDenseOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<SparseToDenseOptions>
+CreateSparseToDenseOptions(flatbuffers::FlatBufferBuilder &_fbb, bool validate_indices = false)
+{
+  SparseToDenseOptionsBuilder builder_(_fbb);
+  builder_.add_validate_indices(validate_indices);
+  return builder_.Finish();
+}
+
+struct EqualOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct EqualOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit EqualOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  EqualOptionsBuilder &operator=(const EqualOptionsBuilder &);
+  flatbuffers::Offset<EqualOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<EqualOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<EqualOptions> CreateEqualOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  EqualOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct NotEqualOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct NotEqualOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit NotEqualOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  NotEqualOptionsBuilder &operator=(const NotEqualOptionsBuilder &);
+  flatbuffers::Offset<NotEqualOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<NotEqualOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<NotEqualOptions>
+CreateNotEqualOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  NotEqualOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct ShapeOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_OUT_TYPE = 4
+  };
+  TensorType out_type() const { return static_cast<TensorType>(GetField<int8_t>(VT_OUT_TYPE, 0)); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int8_t>(verifier, VT_OUT_TYPE) &&
+           verifier.EndTable();
+  }
+};
+
+struct ShapeOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_out_type(TensorType out_type)
+  {
+    fbb_.AddElement<int8_t>(ShapeOptions::VT_OUT_TYPE, static_cast<int8_t>(out_type), 0);
+  }
+  explicit ShapeOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  ShapeOptionsBuilder &operator=(const ShapeOptionsBuilder &);
+  flatbuffers::Offset<ShapeOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<ShapeOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<ShapeOptions>
+CreateShapeOptions(flatbuffers::FlatBufferBuilder &_fbb, TensorType out_type = TensorType_FLOAT32)
+{
+  ShapeOptionsBuilder builder_(_fbb);
+  builder_.add_out_type(out_type);
+  return builder_.Finish();
+}
+
+struct PowOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct PowOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit PowOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  PowOptionsBuilder &operator=(const PowOptionsBuilder &);
+  flatbuffers::Offset<PowOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<PowOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<PowOptions> CreatePowOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  PowOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct FakeQuantOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_MIN = 4,
+    VT_MAX = 6,
+    VT_NUM_BITS = 8,
+    VT_NARROW_RANGE = 10
+  };
+  float min() const { return GetField<float>(VT_MIN, 0.0f); }
+  float max() const { return GetField<float>(VT_MAX, 0.0f); }
+  int32_t num_bits() const { return GetField<int32_t>(VT_NUM_BITS, 0); }
+  bool narrow_range() const { return GetField<uint8_t>(VT_NARROW_RANGE, 0) != 0; }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<float>(verifier, VT_MIN) &&
+           VerifyField<float>(verifier, VT_MAX) && VerifyField<int32_t>(verifier, VT_NUM_BITS) &&
+           VerifyField<uint8_t>(verifier, VT_NARROW_RANGE) && verifier.EndTable();
+  }
+};
+
+struct FakeQuantOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_min(float min) { fbb_.AddElement<float>(FakeQuantOptions::VT_MIN, min, 0.0f); }
+  void add_max(float max) { fbb_.AddElement<float>(FakeQuantOptions::VT_MAX, max, 0.0f); }
+  void add_num_bits(int32_t num_bits)
+  {
+    fbb_.AddElement<int32_t>(FakeQuantOptions::VT_NUM_BITS, num_bits, 0);
+  }
+  void add_narrow_range(bool narrow_range)
+  {
+    fbb_.AddElement<uint8_t>(FakeQuantOptions::VT_NARROW_RANGE, static_cast<uint8_t>(narrow_range),
+                             0);
+  }
+  explicit FakeQuantOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  FakeQuantOptionsBuilder &operator=(const FakeQuantOptionsBuilder &);
+  flatbuffers::Offset<FakeQuantOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<FakeQuantOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<FakeQuantOptions>
+CreateFakeQuantOptions(flatbuffers::FlatBufferBuilder &_fbb, float min = 0.0f, float max = 0.0f,
+                       int32_t num_bits = 0, bool narrow_range = false)
+{
+  FakeQuantOptionsBuilder builder_(_fbb);
+  builder_.add_num_bits(num_bits);
+  builder_.add_max(max);
+  builder_.add_min(min);
+  builder_.add_narrow_range(narrow_range);
+  return builder_.Finish();
+}
+
+struct PackOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_VALUES_COUNT = 4,
+    VT_AXIS = 6
+  };
+  int32_t values_count() const { return GetField<int32_t>(VT_VALUES_COUNT, 0); }
+  int32_t axis() const { return GetField<int32_t>(VT_AXIS, 0); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int32_t>(verifier, VT_VALUES_COUNT) &&
+           VerifyField<int32_t>(verifier, VT_AXIS) && verifier.EndTable();
+  }
+};
+
+struct PackOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_values_count(int32_t values_count)
+  {
+    fbb_.AddElement<int32_t>(PackOptions::VT_VALUES_COUNT, values_count, 0);
+  }
+  void add_axis(int32_t axis) { fbb_.AddElement<int32_t>(PackOptions::VT_AXIS, axis, 0); }
+  explicit PackOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  PackOptionsBuilder &operator=(const PackOptionsBuilder &);
+  flatbuffers::Offset<PackOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<PackOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<PackOptions>
+CreatePackOptions(flatbuffers::FlatBufferBuilder &_fbb, int32_t values_count = 0, int32_t axis = 0)
+{
+  PackOptionsBuilder builder_(_fbb);
+  builder_.add_axis(axis);
+  builder_.add_values_count(values_count);
+  return builder_.Finish();
+}
+
+struct LogicalOrOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct LogicalOrOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit LogicalOrOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  LogicalOrOptionsBuilder &operator=(const LogicalOrOptionsBuilder &);
+  flatbuffers::Offset<LogicalOrOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<LogicalOrOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<LogicalOrOptions>
+CreateLogicalOrOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  LogicalOrOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct OneHotOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_AXIS = 4
+  };
+  int32_t axis() const { return GetField<int32_t>(VT_AXIS, 0); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int32_t>(verifier, VT_AXIS) &&
+           verifier.EndTable();
+  }
+};
+
+struct OneHotOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_axis(int32_t axis) { fbb_.AddElement<int32_t>(OneHotOptions::VT_AXIS, axis, 0); }
+  explicit OneHotOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  OneHotOptionsBuilder &operator=(const OneHotOptionsBuilder &);
+  flatbuffers::Offset<OneHotOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<OneHotOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<OneHotOptions> CreateOneHotOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                                                              int32_t axis = 0)
+{
+  OneHotOptionsBuilder builder_(_fbb);
+  builder_.add_axis(axis);
+  return builder_.Finish();
+}
+
+struct AbsOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct AbsOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit AbsOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  AbsOptionsBuilder &operator=(const AbsOptionsBuilder &);
+  flatbuffers::Offset<AbsOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<AbsOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<AbsOptions> CreateAbsOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  AbsOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct LogicalAndOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct LogicalAndOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit LogicalAndOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  LogicalAndOptionsBuilder &operator=(const LogicalAndOptionsBuilder &);
+  flatbuffers::Offset<LogicalAndOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<LogicalAndOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<LogicalAndOptions>
+CreateLogicalAndOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  LogicalAndOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct LogicalNotOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct LogicalNotOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit LogicalNotOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  LogicalNotOptionsBuilder &operator=(const LogicalNotOptionsBuilder &);
+  flatbuffers::Offset<LogicalNotOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<LogicalNotOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<LogicalNotOptions>
+CreateLogicalNotOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  LogicalNotOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct UnpackOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_NUM = 4,
+    VT_AXIS = 6
+  };
+  int32_t num() const { return GetField<int32_t>(VT_NUM, 0); }
+  int32_t axis() const { return GetField<int32_t>(VT_AXIS, 0); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int32_t>(verifier, VT_NUM) &&
+           VerifyField<int32_t>(verifier, VT_AXIS) && verifier.EndTable();
+  }
+};
+
+struct UnpackOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_num(int32_t num) { fbb_.AddElement<int32_t>(UnpackOptions::VT_NUM, num, 0); }
+  void add_axis(int32_t axis) { fbb_.AddElement<int32_t>(UnpackOptions::VT_AXIS, axis, 0); }
+  explicit UnpackOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  UnpackOptionsBuilder &operator=(const UnpackOptionsBuilder &);
+  flatbuffers::Offset<UnpackOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<UnpackOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<UnpackOptions> CreateUnpackOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                                                              int32_t num = 0, int32_t axis = 0)
+{
+  UnpackOptionsBuilder builder_(_fbb);
+  builder_.add_axis(axis);
+  builder_.add_num(num);
+  return builder_.Finish();
+}
+
+struct FloorDivOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct FloorDivOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit FloorDivOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  FloorDivOptionsBuilder &operator=(const FloorDivOptionsBuilder &);
+  flatbuffers::Offset<FloorDivOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<FloorDivOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<FloorDivOptions>
+CreateFloorDivOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  FloorDivOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct SquareOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct SquareOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit SquareOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  SquareOptionsBuilder &operator=(const SquareOptionsBuilder &);
+  flatbuffers::Offset<SquareOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<SquareOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<SquareOptions> CreateSquareOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  SquareOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct ZerosLikeOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct ZerosLikeOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit ZerosLikeOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  ZerosLikeOptionsBuilder &operator=(const ZerosLikeOptionsBuilder &);
+  flatbuffers::Offset<ZerosLikeOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<ZerosLikeOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<ZerosLikeOptions>
+CreateZerosLikeOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  ZerosLikeOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct FillOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct FillOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit FillOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  FillOptionsBuilder &operator=(const FillOptionsBuilder &);
+  flatbuffers::Offset<FillOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<FillOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<FillOptions> CreateFillOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  FillOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct FloorModOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct FloorModOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit FloorModOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  FloorModOptionsBuilder &operator=(const FloorModOptionsBuilder &);
+  flatbuffers::Offset<FloorModOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<FloorModOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<FloorModOptions>
+CreateFloorModOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  FloorModOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct RangeOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct RangeOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit RangeOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  RangeOptionsBuilder &operator=(const RangeOptionsBuilder &);
+  flatbuffers::Offset<RangeOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<RangeOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<RangeOptions> CreateRangeOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  RangeOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct LeakyReluOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_ALPHA = 4
+  };
+  float alpha() const { return GetField<float>(VT_ALPHA, 0.0f); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<float>(verifier, VT_ALPHA) &&
+           verifier.EndTable();
+  }
+};
+
+struct LeakyReluOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_alpha(float alpha) { fbb_.AddElement<float>(LeakyReluOptions::VT_ALPHA, alpha, 0.0f); }
+  explicit LeakyReluOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  LeakyReluOptionsBuilder &operator=(const LeakyReluOptionsBuilder &);
+  flatbuffers::Offset<LeakyReluOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<LeakyReluOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<LeakyReluOptions>
+CreateLeakyReluOptions(flatbuffers::FlatBufferBuilder &_fbb, float alpha = 0.0f)
+{
+  LeakyReluOptionsBuilder builder_(_fbb);
+  builder_.add_alpha(alpha);
+  return builder_.Finish();
+}
+
+struct SquaredDifferenceOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && verifier.EndTable();
+  }
+};
+
+struct SquaredDifferenceOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  explicit SquaredDifferenceOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  SquaredDifferenceOptionsBuilder &operator=(const SquaredDifferenceOptionsBuilder &);
+  flatbuffers::Offset<SquaredDifferenceOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<SquaredDifferenceOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<SquaredDifferenceOptions>
+CreateSquaredDifferenceOptions(flatbuffers::FlatBufferBuilder &_fbb)
+{
+  SquaredDifferenceOptionsBuilder builder_(_fbb);
+  return builder_.Finish();
+}
+
+struct MirrorPadOptions FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_MODE = 4
+  };
+  MirrorPadMode mode() const { return static_cast<MirrorPadMode>(GetField<int8_t>(VT_MODE, 0)); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int8_t>(verifier, VT_MODE) &&
+           verifier.EndTable();
+  }
+};
+
+struct MirrorPadOptionsBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_mode(MirrorPadMode mode)
+  {
+    fbb_.AddElement<int8_t>(MirrorPadOptions::VT_MODE, static_cast<int8_t>(mode), 0);
+  }
+  explicit MirrorPadOptionsBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  MirrorPadOptionsBuilder &operator=(const MirrorPadOptionsBuilder &);
+  flatbuffers::Offset<MirrorPadOptions> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<MirrorPadOptions>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<MirrorPadOptions>
+CreateMirrorPadOptions(flatbuffers::FlatBufferBuilder &_fbb,
+                       MirrorPadMode mode = MirrorPadMode_REFLECT)
+{
+  MirrorPadOptionsBuilder builder_(_fbb);
+  builder_.add_mode(mode);
+  return builder_.Finish();
+}
+
+struct OperatorCode FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_BUILTIN_CODE = 4,
+    VT_CUSTOM_CODE = 6,
+    VT_VERSION = 8
+  };
+  BuiltinOperator builtin_code() const
+  {
+    return static_cast<BuiltinOperator>(GetField<int8_t>(VT_BUILTIN_CODE, 0));
+  }
+  const flatbuffers::String *custom_code() const
+  {
+    return GetPointer<const flatbuffers::String *>(VT_CUSTOM_CODE);
+  }
+  int32_t version() const { return GetField<int32_t>(VT_VERSION, 1); }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<int8_t>(verifier, VT_BUILTIN_CODE) &&
+           VerifyOffset(verifier, VT_CUSTOM_CODE) && verifier.VerifyString(custom_code()) &&
+           VerifyField<int32_t>(verifier, VT_VERSION) && verifier.EndTable();
+  }
+};
+
+struct OperatorCodeBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_builtin_code(BuiltinOperator builtin_code)
+  {
+    fbb_.AddElement<int8_t>(OperatorCode::VT_BUILTIN_CODE, static_cast<int8_t>(builtin_code), 0);
+  }
+  void add_custom_code(flatbuffers::Offset<flatbuffers::String> custom_code)
+  {
+    fbb_.AddOffset(OperatorCode::VT_CUSTOM_CODE, custom_code);
+  }
+  void add_version(int32_t version)
+  {
+    fbb_.AddElement<int32_t>(OperatorCode::VT_VERSION, version, 1);
+  }
+  explicit OperatorCodeBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  OperatorCodeBuilder &operator=(const OperatorCodeBuilder &);
+  flatbuffers::Offset<OperatorCode> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<OperatorCode>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<OperatorCode>
+CreateOperatorCode(flatbuffers::FlatBufferBuilder &_fbb,
+                   BuiltinOperator builtin_code = BuiltinOperator_ADD,
+                   flatbuffers::Offset<flatbuffers::String> custom_code = 0, int32_t version = 1)
+{
+  OperatorCodeBuilder builder_(_fbb);
+  builder_.add_version(version);
+  builder_.add_custom_code(custom_code);
+  builder_.add_builtin_code(builtin_code);
+  return builder_.Finish();
+}
+
+inline flatbuffers::Offset<OperatorCode>
+CreateOperatorCodeDirect(flatbuffers::FlatBufferBuilder &_fbb,
+                         BuiltinOperator builtin_code = BuiltinOperator_ADD,
+                         const char *custom_code = nullptr, int32_t version = 1)
+{
+  return tflite::CreateOperatorCode(_fbb, builtin_code,
+                                    custom_code ? _fbb.CreateString(custom_code) : 0, version);
+}
+
+struct Operator FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_OPCODE_INDEX = 4,
+    VT_INPUTS = 6,
+    VT_OUTPUTS = 8,
+    VT_BUILTIN_OPTIONS_TYPE = 10,
+    VT_BUILTIN_OPTIONS = 12,
+    VT_CUSTOM_OPTIONS = 14,
+    VT_CUSTOM_OPTIONS_FORMAT = 16,
+    VT_MUTATING_VARIABLE_INPUTS = 18
+  };
+  uint32_t opcode_index() const { return GetField<uint32_t>(VT_OPCODE_INDEX, 0); }
+  const flatbuffers::Vector<int32_t> *inputs() const
+  {
+    return GetPointer<const flatbuffers::Vector<int32_t> *>(VT_INPUTS);
+  }
+  const flatbuffers::Vector<int32_t> *outputs() const
+  {
+    return GetPointer<const flatbuffers::Vector<int32_t> *>(VT_OUTPUTS);
+  }
+  BuiltinOptions builtin_options_type() const
+  {
+    return static_cast<BuiltinOptions>(GetField<uint8_t>(VT_BUILTIN_OPTIONS_TYPE, 0));
+  }
+  const void *builtin_options() const { return GetPointer<const void *>(VT_BUILTIN_OPTIONS); }
+  template <typename T> const T *builtin_options_as() const;
+  const Conv2DOptions *builtin_options_as_Conv2DOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_Conv2DOptions
+               ? static_cast<const Conv2DOptions *>(builtin_options())
+               : nullptr;
+  }
+  const DepthwiseConv2DOptions *builtin_options_as_DepthwiseConv2DOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_DepthwiseConv2DOptions
+               ? static_cast<const DepthwiseConv2DOptions *>(builtin_options())
+               : nullptr;
+  }
+  const ConcatEmbeddingsOptions *builtin_options_as_ConcatEmbeddingsOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_ConcatEmbeddingsOptions
+               ? static_cast<const ConcatEmbeddingsOptions *>(builtin_options())
+               : nullptr;
+  }
+  const LSHProjectionOptions *builtin_options_as_LSHProjectionOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_LSHProjectionOptions
+               ? static_cast<const LSHProjectionOptions *>(builtin_options())
+               : nullptr;
+  }
+  const Pool2DOptions *builtin_options_as_Pool2DOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_Pool2DOptions
+               ? static_cast<const Pool2DOptions *>(builtin_options())
+               : nullptr;
+  }
+  const SVDFOptions *builtin_options_as_SVDFOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_SVDFOptions
+               ? static_cast<const SVDFOptions *>(builtin_options())
+               : nullptr;
+  }
+  const RNNOptions *builtin_options_as_RNNOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_RNNOptions
+               ? static_cast<const RNNOptions *>(builtin_options())
+               : nullptr;
+  }
+  const FullyConnectedOptions *builtin_options_as_FullyConnectedOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_FullyConnectedOptions
+               ? static_cast<const FullyConnectedOptions *>(builtin_options())
+               : nullptr;
+  }
+  const SoftmaxOptions *builtin_options_as_SoftmaxOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_SoftmaxOptions
+               ? static_cast<const SoftmaxOptions *>(builtin_options())
+               : nullptr;
+  }
+  const ConcatenationOptions *builtin_options_as_ConcatenationOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_ConcatenationOptions
+               ? static_cast<const ConcatenationOptions *>(builtin_options())
+               : nullptr;
+  }
+  const AddOptions *builtin_options_as_AddOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_AddOptions
+               ? static_cast<const AddOptions *>(builtin_options())
+               : nullptr;
+  }
+  const L2NormOptions *builtin_options_as_L2NormOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_L2NormOptions
+               ? static_cast<const L2NormOptions *>(builtin_options())
+               : nullptr;
+  }
+  const LocalResponseNormalizationOptions *
+  builtin_options_as_LocalResponseNormalizationOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_LocalResponseNormalizationOptions
+               ? static_cast<const LocalResponseNormalizationOptions *>(builtin_options())
+               : nullptr;
+  }
+  const LSTMOptions *builtin_options_as_LSTMOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_LSTMOptions
+               ? static_cast<const LSTMOptions *>(builtin_options())
+               : nullptr;
+  }
+  const ResizeBilinearOptions *builtin_options_as_ResizeBilinearOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_ResizeBilinearOptions
+               ? static_cast<const ResizeBilinearOptions *>(builtin_options())
+               : nullptr;
+  }
+  const CallOptions *builtin_options_as_CallOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_CallOptions
+               ? static_cast<const CallOptions *>(builtin_options())
+               : nullptr;
+  }
+  const ReshapeOptions *builtin_options_as_ReshapeOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_ReshapeOptions
+               ? static_cast<const ReshapeOptions *>(builtin_options())
+               : nullptr;
+  }
+  const SkipGramOptions *builtin_options_as_SkipGramOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_SkipGramOptions
+               ? static_cast<const SkipGramOptions *>(builtin_options())
+               : nullptr;
+  }
+  const SpaceToDepthOptions *builtin_options_as_SpaceToDepthOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_SpaceToDepthOptions
+               ? static_cast<const SpaceToDepthOptions *>(builtin_options())
+               : nullptr;
+  }
+  const EmbeddingLookupSparseOptions *builtin_options_as_EmbeddingLookupSparseOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_EmbeddingLookupSparseOptions
+               ? static_cast<const EmbeddingLookupSparseOptions *>(builtin_options())
+               : nullptr;
+  }
+  const MulOptions *builtin_options_as_MulOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_MulOptions
+               ? static_cast<const MulOptions *>(builtin_options())
+               : nullptr;
+  }
+  const PadOptions *builtin_options_as_PadOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_PadOptions
+               ? static_cast<const PadOptions *>(builtin_options())
+               : nullptr;
+  }
+  const GatherOptions *builtin_options_as_GatherOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_GatherOptions
+               ? static_cast<const GatherOptions *>(builtin_options())
+               : nullptr;
+  }
+  const BatchToSpaceNDOptions *builtin_options_as_BatchToSpaceNDOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_BatchToSpaceNDOptions
+               ? static_cast<const BatchToSpaceNDOptions *>(builtin_options())
+               : nullptr;
+  }
+  const SpaceToBatchNDOptions *builtin_options_as_SpaceToBatchNDOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_SpaceToBatchNDOptions
+               ? static_cast<const SpaceToBatchNDOptions *>(builtin_options())
+               : nullptr;
+  }
+  const TransposeOptions *builtin_options_as_TransposeOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_TransposeOptions
+               ? static_cast<const TransposeOptions *>(builtin_options())
+               : nullptr;
+  }
+  const ReducerOptions *builtin_options_as_ReducerOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_ReducerOptions
+               ? static_cast<const ReducerOptions *>(builtin_options())
+               : nullptr;
+  }
+  const SubOptions *builtin_options_as_SubOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_SubOptions
+               ? static_cast<const SubOptions *>(builtin_options())
+               : nullptr;
+  }
+  const DivOptions *builtin_options_as_DivOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_DivOptions
+               ? static_cast<const DivOptions *>(builtin_options())
+               : nullptr;
+  }
+  const SqueezeOptions *builtin_options_as_SqueezeOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_SqueezeOptions
+               ? static_cast<const SqueezeOptions *>(builtin_options())
+               : nullptr;
+  }
+  const SequenceRNNOptions *builtin_options_as_SequenceRNNOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_SequenceRNNOptions
+               ? static_cast<const SequenceRNNOptions *>(builtin_options())
+               : nullptr;
+  }
+  const StridedSliceOptions *builtin_options_as_StridedSliceOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_StridedSliceOptions
+               ? static_cast<const StridedSliceOptions *>(builtin_options())
+               : nullptr;
+  }
+  const ExpOptions *builtin_options_as_ExpOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_ExpOptions
+               ? static_cast<const ExpOptions *>(builtin_options())
+               : nullptr;
+  }
+  const TopKV2Options *builtin_options_as_TopKV2Options() const
+  {
+    return builtin_options_type() == BuiltinOptions_TopKV2Options
+               ? static_cast<const TopKV2Options *>(builtin_options())
+               : nullptr;
+  }
+  const SplitOptions *builtin_options_as_SplitOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_SplitOptions
+               ? static_cast<const SplitOptions *>(builtin_options())
+               : nullptr;
+  }
+  const LogSoftmaxOptions *builtin_options_as_LogSoftmaxOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_LogSoftmaxOptions
+               ? static_cast<const LogSoftmaxOptions *>(builtin_options())
+               : nullptr;
+  }
+  const CastOptions *builtin_options_as_CastOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_CastOptions
+               ? static_cast<const CastOptions *>(builtin_options())
+               : nullptr;
+  }
+  const DequantizeOptions *builtin_options_as_DequantizeOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_DequantizeOptions
+               ? static_cast<const DequantizeOptions *>(builtin_options())
+               : nullptr;
+  }
+  const MaximumMinimumOptions *builtin_options_as_MaximumMinimumOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_MaximumMinimumOptions
+               ? static_cast<const MaximumMinimumOptions *>(builtin_options())
+               : nullptr;
+  }
+  const ArgMaxOptions *builtin_options_as_ArgMaxOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_ArgMaxOptions
+               ? static_cast<const ArgMaxOptions *>(builtin_options())
+               : nullptr;
+  }
+  const LessOptions *builtin_options_as_LessOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_LessOptions
+               ? static_cast<const LessOptions *>(builtin_options())
+               : nullptr;
+  }
+  const NegOptions *builtin_options_as_NegOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_NegOptions
+               ? static_cast<const NegOptions *>(builtin_options())
+               : nullptr;
+  }
+  const PadV2Options *builtin_options_as_PadV2Options() const
+  {
+    return builtin_options_type() == BuiltinOptions_PadV2Options
+               ? static_cast<const PadV2Options *>(builtin_options())
+               : nullptr;
+  }
+  const GreaterOptions *builtin_options_as_GreaterOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_GreaterOptions
+               ? static_cast<const GreaterOptions *>(builtin_options())
+               : nullptr;
+  }
+  const GreaterEqualOptions *builtin_options_as_GreaterEqualOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_GreaterEqualOptions
+               ? static_cast<const GreaterEqualOptions *>(builtin_options())
+               : nullptr;
+  }
+  const LessEqualOptions *builtin_options_as_LessEqualOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_LessEqualOptions
+               ? static_cast<const LessEqualOptions *>(builtin_options())
+               : nullptr;
+  }
+  const SelectOptions *builtin_options_as_SelectOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_SelectOptions
+               ? static_cast<const SelectOptions *>(builtin_options())
+               : nullptr;
+  }
+  const SliceOptions *builtin_options_as_SliceOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_SliceOptions
+               ? static_cast<const SliceOptions *>(builtin_options())
+               : nullptr;
+  }
+  const TransposeConvOptions *builtin_options_as_TransposeConvOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_TransposeConvOptions
+               ? static_cast<const TransposeConvOptions *>(builtin_options())
+               : nullptr;
+  }
+  const SparseToDenseOptions *builtin_options_as_SparseToDenseOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_SparseToDenseOptions
+               ? static_cast<const SparseToDenseOptions *>(builtin_options())
+               : nullptr;
+  }
+  const TileOptions *builtin_options_as_TileOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_TileOptions
+               ? static_cast<const TileOptions *>(builtin_options())
+               : nullptr;
+  }
+  const ExpandDimsOptions *builtin_options_as_ExpandDimsOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_ExpandDimsOptions
+               ? static_cast<const ExpandDimsOptions *>(builtin_options())
+               : nullptr;
+  }
+  const EqualOptions *builtin_options_as_EqualOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_EqualOptions
+               ? static_cast<const EqualOptions *>(builtin_options())
+               : nullptr;
+  }
+  const NotEqualOptions *builtin_options_as_NotEqualOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_NotEqualOptions
+               ? static_cast<const NotEqualOptions *>(builtin_options())
+               : nullptr;
+  }
+  const ShapeOptions *builtin_options_as_ShapeOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_ShapeOptions
+               ? static_cast<const ShapeOptions *>(builtin_options())
+               : nullptr;
+  }
+  const PowOptions *builtin_options_as_PowOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_PowOptions
+               ? static_cast<const PowOptions *>(builtin_options())
+               : nullptr;
+  }
+  const ArgMinOptions *builtin_options_as_ArgMinOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_ArgMinOptions
+               ? static_cast<const ArgMinOptions *>(builtin_options())
+               : nullptr;
+  }
+  const FakeQuantOptions *builtin_options_as_FakeQuantOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_FakeQuantOptions
+               ? static_cast<const FakeQuantOptions *>(builtin_options())
+               : nullptr;
+  }
+  const PackOptions *builtin_options_as_PackOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_PackOptions
+               ? static_cast<const PackOptions *>(builtin_options())
+               : nullptr;
+  }
+  const LogicalOrOptions *builtin_options_as_LogicalOrOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_LogicalOrOptions
+               ? static_cast<const LogicalOrOptions *>(builtin_options())
+               : nullptr;
+  }
+  const OneHotOptions *builtin_options_as_OneHotOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_OneHotOptions
+               ? static_cast<const OneHotOptions *>(builtin_options())
+               : nullptr;
+  }
+  const LogicalAndOptions *builtin_options_as_LogicalAndOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_LogicalAndOptions
+               ? static_cast<const LogicalAndOptions *>(builtin_options())
+               : nullptr;
+  }
+  const LogicalNotOptions *builtin_options_as_LogicalNotOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_LogicalNotOptions
+               ? static_cast<const LogicalNotOptions *>(builtin_options())
+               : nullptr;
+  }
+  const UnpackOptions *builtin_options_as_UnpackOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_UnpackOptions
+               ? static_cast<const UnpackOptions *>(builtin_options())
+               : nullptr;
+  }
+  const FloorDivOptions *builtin_options_as_FloorDivOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_FloorDivOptions
+               ? static_cast<const FloorDivOptions *>(builtin_options())
+               : nullptr;
+  }
+  const SquareOptions *builtin_options_as_SquareOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_SquareOptions
+               ? static_cast<const SquareOptions *>(builtin_options())
+               : nullptr;
+  }
+  const ZerosLikeOptions *builtin_options_as_ZerosLikeOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_ZerosLikeOptions
+               ? static_cast<const ZerosLikeOptions *>(builtin_options())
+               : nullptr;
+  }
+  const FillOptions *builtin_options_as_FillOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_FillOptions
+               ? static_cast<const FillOptions *>(builtin_options())
+               : nullptr;
+  }
+  const BidirectionalSequenceLSTMOptions *
+  builtin_options_as_BidirectionalSequenceLSTMOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_BidirectionalSequenceLSTMOptions
+               ? static_cast<const BidirectionalSequenceLSTMOptions *>(builtin_options())
+               : nullptr;
+  }
+  const BidirectionalSequenceRNNOptions *builtin_options_as_BidirectionalSequenceRNNOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_BidirectionalSequenceRNNOptions
+               ? static_cast<const BidirectionalSequenceRNNOptions *>(builtin_options())
+               : nullptr;
+  }
+  const UnidirectionalSequenceLSTMOptions *
+  builtin_options_as_UnidirectionalSequenceLSTMOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_UnidirectionalSequenceLSTMOptions
+               ? static_cast<const UnidirectionalSequenceLSTMOptions *>(builtin_options())
+               : nullptr;
+  }
+  const FloorModOptions *builtin_options_as_FloorModOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_FloorModOptions
+               ? static_cast<const FloorModOptions *>(builtin_options())
+               : nullptr;
+  }
+  const RangeOptions *builtin_options_as_RangeOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_RangeOptions
+               ? static_cast<const RangeOptions *>(builtin_options())
+               : nullptr;
+  }
+  const ResizeNearestNeighborOptions *builtin_options_as_ResizeNearestNeighborOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_ResizeNearestNeighborOptions
+               ? static_cast<const ResizeNearestNeighborOptions *>(builtin_options())
+               : nullptr;
+  }
+  const LeakyReluOptions *builtin_options_as_LeakyReluOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_LeakyReluOptions
+               ? static_cast<const LeakyReluOptions *>(builtin_options())
+               : nullptr;
+  }
+  const SquaredDifferenceOptions *builtin_options_as_SquaredDifferenceOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_SquaredDifferenceOptions
+               ? static_cast<const SquaredDifferenceOptions *>(builtin_options())
+               : nullptr;
+  }
+  const MirrorPadOptions *builtin_options_as_MirrorPadOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_MirrorPadOptions
+               ? static_cast<const MirrorPadOptions *>(builtin_options())
+               : nullptr;
+  }
+  const AbsOptions *builtin_options_as_AbsOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_AbsOptions
+               ? static_cast<const AbsOptions *>(builtin_options())
+               : nullptr;
+  }
+  const SplitVOptions *builtin_options_as_SplitVOptions() const
+  {
+    return builtin_options_type() == BuiltinOptions_SplitVOptions
+               ? static_cast<const SplitVOptions *>(builtin_options())
+               : nullptr;
+  }
+  const flatbuffers::Vector<uint8_t> *custom_options() const
+  {
+    return GetPointer<const flatbuffers::Vector<uint8_t> *>(VT_CUSTOM_OPTIONS);
+  }
+  CustomOptionsFormat custom_options_format() const
+  {
+    return static_cast<CustomOptionsFormat>(GetField<int8_t>(VT_CUSTOM_OPTIONS_FORMAT, 0));
+  }
+  const flatbuffers::Vector<uint8_t> *mutating_variable_inputs() const
+  {
+    return GetPointer<const flatbuffers::Vector<uint8_t> *>(VT_MUTATING_VARIABLE_INPUTS);
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<uint32_t>(verifier, VT_OPCODE_INDEX) &&
+           VerifyOffset(verifier, VT_INPUTS) && verifier.VerifyVector(inputs()) &&
+           VerifyOffset(verifier, VT_OUTPUTS) && verifier.VerifyVector(outputs()) &&
+           VerifyField<uint8_t>(verifier, VT_BUILTIN_OPTIONS_TYPE) &&
+           VerifyOffset(verifier, VT_BUILTIN_OPTIONS) &&
+           VerifyBuiltinOptions(verifier, builtin_options(), builtin_options_type()) &&
+           VerifyOffset(verifier, VT_CUSTOM_OPTIONS) && verifier.VerifyVector(custom_options()) &&
+           VerifyField<int8_t>(verifier, VT_CUSTOM_OPTIONS_FORMAT) &&
+           VerifyOffset(verifier, VT_MUTATING_VARIABLE_INPUTS) &&
+           verifier.VerifyVector(mutating_variable_inputs()) && verifier.EndTable();
+  }
+};
+
+template <> inline const Conv2DOptions *Operator::builtin_options_as<Conv2DOptions>() const
+{
+  return builtin_options_as_Conv2DOptions();
+}
+
+template <>
+inline const DepthwiseConv2DOptions *Operator::builtin_options_as<DepthwiseConv2DOptions>() const
+{
+  return builtin_options_as_DepthwiseConv2DOptions();
+}
+
+template <>
+inline const ConcatEmbeddingsOptions *Operator::builtin_options_as<ConcatEmbeddingsOptions>() const
+{
+  return builtin_options_as_ConcatEmbeddingsOptions();
+}
+
+template <>
+inline const LSHProjectionOptions *Operator::builtin_options_as<LSHProjectionOptions>() const
+{
+  return builtin_options_as_LSHProjectionOptions();
+}
+
+template <> inline const Pool2DOptions *Operator::builtin_options_as<Pool2DOptions>() const
+{
+  return builtin_options_as_Pool2DOptions();
+}
+
+template <> inline const SVDFOptions *Operator::builtin_options_as<SVDFOptions>() const
+{
+  return builtin_options_as_SVDFOptions();
+}
+
+template <> inline const RNNOptions *Operator::builtin_options_as<RNNOptions>() const
+{
+  return builtin_options_as_RNNOptions();
+}
+
+template <>
+inline const FullyConnectedOptions *Operator::builtin_options_as<FullyConnectedOptions>() const
+{
+  return builtin_options_as_FullyConnectedOptions();
+}
+
+template <> inline const SoftmaxOptions *Operator::builtin_options_as<SoftmaxOptions>() const
+{
+  return builtin_options_as_SoftmaxOptions();
+}
+
+template <>
+inline const ConcatenationOptions *Operator::builtin_options_as<ConcatenationOptions>() const
+{
+  return builtin_options_as_ConcatenationOptions();
+}
+
+template <> inline const AddOptions *Operator::builtin_options_as<AddOptions>() const
+{
+  return builtin_options_as_AddOptions();
+}
+
+template <> inline const L2NormOptions *Operator::builtin_options_as<L2NormOptions>() const
+{
+  return builtin_options_as_L2NormOptions();
+}
+
+template <>
+inline const LocalResponseNormalizationOptions *
+Operator::builtin_options_as<LocalResponseNormalizationOptions>() const
+{
+  return builtin_options_as_LocalResponseNormalizationOptions();
+}
+
+template <> inline const LSTMOptions *Operator::builtin_options_as<LSTMOptions>() const
+{
+  return builtin_options_as_LSTMOptions();
+}
+
+template <>
+inline const ResizeBilinearOptions *Operator::builtin_options_as<ResizeBilinearOptions>() const
+{
+  return builtin_options_as_ResizeBilinearOptions();
+}
+
+template <> inline const CallOptions *Operator::builtin_options_as<CallOptions>() const
+{
+  return builtin_options_as_CallOptions();
+}
+
+template <> inline const ReshapeOptions *Operator::builtin_options_as<ReshapeOptions>() const
+{
+  return builtin_options_as_ReshapeOptions();
+}
+
+template <> inline const SkipGramOptions *Operator::builtin_options_as<SkipGramOptions>() const
+{
+  return builtin_options_as_SkipGramOptions();
+}
+
+template <>
+inline const SpaceToDepthOptions *Operator::builtin_options_as<SpaceToDepthOptions>() const
+{
+  return builtin_options_as_SpaceToDepthOptions();
+}
+
+template <>
+inline const EmbeddingLookupSparseOptions *
+Operator::builtin_options_as<EmbeddingLookupSparseOptions>() const
+{
+  return builtin_options_as_EmbeddingLookupSparseOptions();
+}
+
+template <> inline const MulOptions *Operator::builtin_options_as<MulOptions>() const
+{
+  return builtin_options_as_MulOptions();
+}
+
+template <> inline const PadOptions *Operator::builtin_options_as<PadOptions>() const
+{
+  return builtin_options_as_PadOptions();
+}
+
+template <> inline const GatherOptions *Operator::builtin_options_as<GatherOptions>() const
+{
+  return builtin_options_as_GatherOptions();
+}
+
+template <>
+inline const BatchToSpaceNDOptions *Operator::builtin_options_as<BatchToSpaceNDOptions>() const
+{
+  return builtin_options_as_BatchToSpaceNDOptions();
+}
+
+template <>
+inline const SpaceToBatchNDOptions *Operator::builtin_options_as<SpaceToBatchNDOptions>() const
+{
+  return builtin_options_as_SpaceToBatchNDOptions();
+}
+
+template <> inline const TransposeOptions *Operator::builtin_options_as<TransposeOptions>() const
+{
+  return builtin_options_as_TransposeOptions();
+}
+
+template <> inline const ReducerOptions *Operator::builtin_options_as<ReducerOptions>() const
+{
+  return builtin_options_as_ReducerOptions();
+}
+
+template <> inline const SubOptions *Operator::builtin_options_as<SubOptions>() const
+{
+  return builtin_options_as_SubOptions();
+}
+
+template <> inline const DivOptions *Operator::builtin_options_as<DivOptions>() const
+{
+  return builtin_options_as_DivOptions();
+}
+
+template <> inline const SqueezeOptions *Operator::builtin_options_as<SqueezeOptions>() const
+{
+  return builtin_options_as_SqueezeOptions();
+}
+
+template <>
+inline const SequenceRNNOptions *Operator::builtin_options_as<SequenceRNNOptions>() const
+{
+  return builtin_options_as_SequenceRNNOptions();
+}
+
+template <>
+inline const StridedSliceOptions *Operator::builtin_options_as<StridedSliceOptions>() const
+{
+  return builtin_options_as_StridedSliceOptions();
+}
+
+template <> inline const ExpOptions *Operator::builtin_options_as<ExpOptions>() const
+{
+  return builtin_options_as_ExpOptions();
+}
+
+template <> inline const TopKV2Options *Operator::builtin_options_as<TopKV2Options>() const
+{
+  return builtin_options_as_TopKV2Options();
+}
+
+template <> inline const SplitOptions *Operator::builtin_options_as<SplitOptions>() const
+{
+  return builtin_options_as_SplitOptions();
+}
+
+template <> inline const LogSoftmaxOptions *Operator::builtin_options_as<LogSoftmaxOptions>() const
+{
+  return builtin_options_as_LogSoftmaxOptions();
+}
+
+template <> inline const CastOptions *Operator::builtin_options_as<CastOptions>() const
+{
+  return builtin_options_as_CastOptions();
+}
+
+template <> inline const DequantizeOptions *Operator::builtin_options_as<DequantizeOptions>() const
+{
+  return builtin_options_as_DequantizeOptions();
+}
+
+template <>
+inline const MaximumMinimumOptions *Operator::builtin_options_as<MaximumMinimumOptions>() const
+{
+  return builtin_options_as_MaximumMinimumOptions();
+}
+
+template <> inline const ArgMaxOptions *Operator::builtin_options_as<ArgMaxOptions>() const
+{
+  return builtin_options_as_ArgMaxOptions();
+}
+
+template <> inline const LessOptions *Operator::builtin_options_as<LessOptions>() const
+{
+  return builtin_options_as_LessOptions();
+}
+
+template <> inline const NegOptions *Operator::builtin_options_as<NegOptions>() const
+{
+  return builtin_options_as_NegOptions();
+}
+
+template <> inline const PadV2Options *Operator::builtin_options_as<PadV2Options>() const
+{
+  return builtin_options_as_PadV2Options();
+}
+
+template <> inline const GreaterOptions *Operator::builtin_options_as<GreaterOptions>() const
+{
+  return builtin_options_as_GreaterOptions();
+}
+
+template <>
+inline const GreaterEqualOptions *Operator::builtin_options_as<GreaterEqualOptions>() const
+{
+  return builtin_options_as_GreaterEqualOptions();
+}
+
+template <> inline const LessEqualOptions *Operator::builtin_options_as<LessEqualOptions>() const
+{
+  return builtin_options_as_LessEqualOptions();
+}
+
+template <> inline const SelectOptions *Operator::builtin_options_as<SelectOptions>() const
+{
+  return builtin_options_as_SelectOptions();
+}
+
+template <> inline const SliceOptions *Operator::builtin_options_as<SliceOptions>() const
+{
+  return builtin_options_as_SliceOptions();
+}
+
+template <>
+inline const TransposeConvOptions *Operator::builtin_options_as<TransposeConvOptions>() const
+{
+  return builtin_options_as_TransposeConvOptions();
+}
+
+template <>
+inline const SparseToDenseOptions *Operator::builtin_options_as<SparseToDenseOptions>() const
+{
+  return builtin_options_as_SparseToDenseOptions();
+}
+
+template <> inline const TileOptions *Operator::builtin_options_as<TileOptions>() const
+{
+  return builtin_options_as_TileOptions();
+}
+
+template <> inline const ExpandDimsOptions *Operator::builtin_options_as<ExpandDimsOptions>() const
+{
+  return builtin_options_as_ExpandDimsOptions();
+}
+
+template <> inline const EqualOptions *Operator::builtin_options_as<EqualOptions>() const
+{
+  return builtin_options_as_EqualOptions();
+}
+
+template <> inline const NotEqualOptions *Operator::builtin_options_as<NotEqualOptions>() const
+{
+  return builtin_options_as_NotEqualOptions();
+}
+
+template <> inline const ShapeOptions *Operator::builtin_options_as<ShapeOptions>() const
+{
+  return builtin_options_as_ShapeOptions();
+}
+
+template <> inline const PowOptions *Operator::builtin_options_as<PowOptions>() const
+{
+  return builtin_options_as_PowOptions();
+}
+
+template <> inline const ArgMinOptions *Operator::builtin_options_as<ArgMinOptions>() const
+{
+  return builtin_options_as_ArgMinOptions();
+}
+
+template <> inline const FakeQuantOptions *Operator::builtin_options_as<FakeQuantOptions>() const
+{
+  return builtin_options_as_FakeQuantOptions();
+}
+
+template <> inline const PackOptions *Operator::builtin_options_as<PackOptions>() const
+{
+  return builtin_options_as_PackOptions();
+}
+
+template <> inline const LogicalOrOptions *Operator::builtin_options_as<LogicalOrOptions>() const
+{
+  return builtin_options_as_LogicalOrOptions();
+}
+
+template <> inline const OneHotOptions *Operator::builtin_options_as<OneHotOptions>() const
+{
+  return builtin_options_as_OneHotOptions();
+}
+
+template <> inline const LogicalAndOptions *Operator::builtin_options_as<LogicalAndOptions>() const
+{
+  return builtin_options_as_LogicalAndOptions();
+}
+
+template <> inline const LogicalNotOptions *Operator::builtin_options_as<LogicalNotOptions>() const
+{
+  return builtin_options_as_LogicalNotOptions();
+}
+
+template <> inline const UnpackOptions *Operator::builtin_options_as<UnpackOptions>() const
+{
+  return builtin_options_as_UnpackOptions();
+}
+
+template <> inline const FloorDivOptions *Operator::builtin_options_as<FloorDivOptions>() const
+{
+  return builtin_options_as_FloorDivOptions();
+}
+
+template <> inline const SquareOptions *Operator::builtin_options_as<SquareOptions>() const
+{
+  return builtin_options_as_SquareOptions();
+}
+
+template <> inline const ZerosLikeOptions *Operator::builtin_options_as<ZerosLikeOptions>() const
+{
+  return builtin_options_as_ZerosLikeOptions();
+}
+
+template <> inline const FillOptions *Operator::builtin_options_as<FillOptions>() const
+{
+  return builtin_options_as_FillOptions();
+}
+
+template <>
+inline const BidirectionalSequenceLSTMOptions *
+Operator::builtin_options_as<BidirectionalSequenceLSTMOptions>() const
+{
+  return builtin_options_as_BidirectionalSequenceLSTMOptions();
+}
+
+template <>
+inline const BidirectionalSequenceRNNOptions *
+Operator::builtin_options_as<BidirectionalSequenceRNNOptions>() const
+{
+  return builtin_options_as_BidirectionalSequenceRNNOptions();
+}
+
+template <>
+inline const UnidirectionalSequenceLSTMOptions *
+Operator::builtin_options_as<UnidirectionalSequenceLSTMOptions>() const
+{
+  return builtin_options_as_UnidirectionalSequenceLSTMOptions();
+}
+
+template <> inline const FloorModOptions *Operator::builtin_options_as<FloorModOptions>() const
+{
+  return builtin_options_as_FloorModOptions();
+}
+
+template <> inline const RangeOptions *Operator::builtin_options_as<RangeOptions>() const
+{
+  return builtin_options_as_RangeOptions();
+}
+
+template <>
+inline const ResizeNearestNeighborOptions *
+Operator::builtin_options_as<ResizeNearestNeighborOptions>() const
+{
+  return builtin_options_as_ResizeNearestNeighborOptions();
+}
+
+template <> inline const LeakyReluOptions *Operator::builtin_options_as<LeakyReluOptions>() const
+{
+  return builtin_options_as_LeakyReluOptions();
+}
+
+template <>
+inline const SquaredDifferenceOptions *
+Operator::builtin_options_as<SquaredDifferenceOptions>() const
+{
+  return builtin_options_as_SquaredDifferenceOptions();
+}
+
+template <> inline const MirrorPadOptions *Operator::builtin_options_as<MirrorPadOptions>() const
+{
+  return builtin_options_as_MirrorPadOptions();
+}
+
+template <> inline const AbsOptions *Operator::builtin_options_as<AbsOptions>() const
+{
+  return builtin_options_as_AbsOptions();
+}
+
+template <> inline const SplitVOptions *Operator::builtin_options_as<SplitVOptions>() const
+{
+  return builtin_options_as_SplitVOptions();
+}
+
+struct OperatorBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_opcode_index(uint32_t opcode_index)
+  {
+    fbb_.AddElement<uint32_t>(Operator::VT_OPCODE_INDEX, opcode_index, 0);
+  }
+  void add_inputs(flatbuffers::Offset<flatbuffers::Vector<int32_t>> inputs)
+  {
+    fbb_.AddOffset(Operator::VT_INPUTS, inputs);
+  }
+  void add_outputs(flatbuffers::Offset<flatbuffers::Vector<int32_t>> outputs)
+  {
+    fbb_.AddOffset(Operator::VT_OUTPUTS, outputs);
+  }
+  void add_builtin_options_type(BuiltinOptions builtin_options_type)
+  {
+    fbb_.AddElement<uint8_t>(Operator::VT_BUILTIN_OPTIONS_TYPE,
+                             static_cast<uint8_t>(builtin_options_type), 0);
+  }
+  void add_builtin_options(flatbuffers::Offset<void> builtin_options)
+  {
+    fbb_.AddOffset(Operator::VT_BUILTIN_OPTIONS, builtin_options);
+  }
+  void add_custom_options(flatbuffers::Offset<flatbuffers::Vector<uint8_t>> custom_options)
+  {
+    fbb_.AddOffset(Operator::VT_CUSTOM_OPTIONS, custom_options);
+  }
+  void add_custom_options_format(CustomOptionsFormat custom_options_format)
+  {
+    fbb_.AddElement<int8_t>(Operator::VT_CUSTOM_OPTIONS_FORMAT,
+                            static_cast<int8_t>(custom_options_format), 0);
+  }
+  void add_mutating_variable_inputs(
+      flatbuffers::Offset<flatbuffers::Vector<uint8_t>> mutating_variable_inputs)
+  {
+    fbb_.AddOffset(Operator::VT_MUTATING_VARIABLE_INPUTS, mutating_variable_inputs);
+  }
+  explicit OperatorBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  OperatorBuilder &operator=(const OperatorBuilder &);
+  flatbuffers::Offset<Operator> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<Operator>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<Operator>
+CreateOperator(flatbuffers::FlatBufferBuilder &_fbb, uint32_t opcode_index = 0,
+               flatbuffers::Offset<flatbuffers::Vector<int32_t>> inputs = 0,
+               flatbuffers::Offset<flatbuffers::Vector<int32_t>> outputs = 0,
+               BuiltinOptions builtin_options_type = BuiltinOptions_NONE,
+               flatbuffers::Offset<void> builtin_options = 0,
+               flatbuffers::Offset<flatbuffers::Vector<uint8_t>> custom_options = 0,
+               CustomOptionsFormat custom_options_format = CustomOptionsFormat_FLEXBUFFERS,
+               flatbuffers::Offset<flatbuffers::Vector<uint8_t>> mutating_variable_inputs = 0)
+{
+  OperatorBuilder builder_(_fbb);
+  builder_.add_mutating_variable_inputs(mutating_variable_inputs);
+  builder_.add_custom_options(custom_options);
+  builder_.add_builtin_options(builtin_options);
+  builder_.add_outputs(outputs);
+  builder_.add_inputs(inputs);
+  builder_.add_opcode_index(opcode_index);
+  builder_.add_custom_options_format(custom_options_format);
+  builder_.add_builtin_options_type(builtin_options_type);
+  return builder_.Finish();
+}
+
+inline flatbuffers::Offset<Operator>
+CreateOperatorDirect(flatbuffers::FlatBufferBuilder &_fbb, uint32_t opcode_index = 0,
+                     const std::vector<int32_t> *inputs = nullptr,
+                     const std::vector<int32_t> *outputs = nullptr,
+                     BuiltinOptions builtin_options_type = BuiltinOptions_NONE,
+                     flatbuffers::Offset<void> builtin_options = 0,
+                     const std::vector<uint8_t> *custom_options = nullptr,
+                     CustomOptionsFormat custom_options_format = CustomOptionsFormat_FLEXBUFFERS,
+                     const std::vector<uint8_t> *mutating_variable_inputs = nullptr)
+{
+  return tflite::CreateOperator(
+      _fbb, opcode_index, inputs ? _fbb.CreateVector<int32_t>(*inputs) : 0,
+      outputs ? _fbb.CreateVector<int32_t>(*outputs) : 0, builtin_options_type, builtin_options,
+      custom_options ? _fbb.CreateVector<uint8_t>(*custom_options) : 0, custom_options_format,
+      mutating_variable_inputs ? _fbb.CreateVector<uint8_t>(*mutating_variable_inputs) : 0);
+}
+
+struct SubGraph FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_TENSORS = 4,
+    VT_INPUTS = 6,
+    VT_OUTPUTS = 8,
+    VT_OPERATORS = 10,
+    VT_NAME = 12
+  };
+  const flatbuffers::Vector<flatbuffers::Offset<Tensor>> *tensors() const
+  {
+    return GetPointer<const flatbuffers::Vector<flatbuffers::Offset<Tensor>> *>(VT_TENSORS);
+  }
+  const flatbuffers::Vector<int32_t> *inputs() const
+  {
+    return GetPointer<const flatbuffers::Vector<int32_t> *>(VT_INPUTS);
+  }
+  const flatbuffers::Vector<int32_t> *outputs() const
+  {
+    return GetPointer<const flatbuffers::Vector<int32_t> *>(VT_OUTPUTS);
+  }
+  const flatbuffers::Vector<flatbuffers::Offset<Operator>> *operators() const
+  {
+    return GetPointer<const flatbuffers::Vector<flatbuffers::Offset<Operator>> *>(VT_OPERATORS);
+  }
+  const flatbuffers::String *name() const
+  {
+    return GetPointer<const flatbuffers::String *>(VT_NAME);
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyOffset(verifier, VT_TENSORS) &&
+           verifier.VerifyVector(tensors()) && verifier.VerifyVectorOfTables(tensors()) &&
+           VerifyOffset(verifier, VT_INPUTS) && verifier.VerifyVector(inputs()) &&
+           VerifyOffset(verifier, VT_OUTPUTS) && verifier.VerifyVector(outputs()) &&
+           VerifyOffset(verifier, VT_OPERATORS) && verifier.VerifyVector(operators()) &&
+           verifier.VerifyVectorOfTables(operators()) && VerifyOffset(verifier, VT_NAME) &&
+           verifier.VerifyString(name()) && verifier.EndTable();
+  }
+};
+
+struct SubGraphBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_tensors(flatbuffers::Offset<flatbuffers::Vector<flatbuffers::Offset<Tensor>>> tensors)
+  {
+    fbb_.AddOffset(SubGraph::VT_TENSORS, tensors);
+  }
+  void add_inputs(flatbuffers::Offset<flatbuffers::Vector<int32_t>> inputs)
+  {
+    fbb_.AddOffset(SubGraph::VT_INPUTS, inputs);
+  }
+  void add_outputs(flatbuffers::Offset<flatbuffers::Vector<int32_t>> outputs)
+  {
+    fbb_.AddOffset(SubGraph::VT_OUTPUTS, outputs);
+  }
+  void
+  add_operators(flatbuffers::Offset<flatbuffers::Vector<flatbuffers::Offset<Operator>>> operators)
+  {
+    fbb_.AddOffset(SubGraph::VT_OPERATORS, operators);
+  }
+  void add_name(flatbuffers::Offset<flatbuffers::String> name)
+  {
+    fbb_.AddOffset(SubGraph::VT_NAME, name);
+  }
+  explicit SubGraphBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  SubGraphBuilder &operator=(const SubGraphBuilder &);
+  flatbuffers::Offset<SubGraph> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<SubGraph>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<SubGraph> CreateSubGraph(
+    flatbuffers::FlatBufferBuilder &_fbb,
+    flatbuffers::Offset<flatbuffers::Vector<flatbuffers::Offset<Tensor>>> tensors = 0,
+    flatbuffers::Offset<flatbuffers::Vector<int32_t>> inputs = 0,
+    flatbuffers::Offset<flatbuffers::Vector<int32_t>> outputs = 0,
+    flatbuffers::Offset<flatbuffers::Vector<flatbuffers::Offset<Operator>>> operators = 0,
+    flatbuffers::Offset<flatbuffers::String> name = 0)
+{
+  SubGraphBuilder builder_(_fbb);
+  builder_.add_name(name);
+  builder_.add_operators(operators);
+  builder_.add_outputs(outputs);
+  builder_.add_inputs(inputs);
+  builder_.add_tensors(tensors);
+  return builder_.Finish();
+}
+
+inline flatbuffers::Offset<SubGraph>
+CreateSubGraphDirect(flatbuffers::FlatBufferBuilder &_fbb,
+                     const std::vector<flatbuffers::Offset<Tensor>> *tensors = nullptr,
+                     const std::vector<int32_t> *inputs = nullptr,
+                     const std::vector<int32_t> *outputs = nullptr,
+                     const std::vector<flatbuffers::Offset<Operator>> *operators = nullptr,
+                     const char *name = nullptr)
+{
+  return tflite::CreateSubGraph(
+      _fbb, tensors ? _fbb.CreateVector<flatbuffers::Offset<Tensor>>(*tensors) : 0,
+      inputs ? _fbb.CreateVector<int32_t>(*inputs) : 0,
+      outputs ? _fbb.CreateVector<int32_t>(*outputs) : 0,
+      operators ? _fbb.CreateVector<flatbuffers::Offset<Operator>>(*operators) : 0,
+      name ? _fbb.CreateString(name) : 0);
+}
+
+struct Buffer FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_DATA = 4
+  };
+  const flatbuffers::Vector<uint8_t> *data() const
+  {
+    return GetPointer<const flatbuffers::Vector<uint8_t> *>(VT_DATA);
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyOffset(verifier, VT_DATA) &&
+           verifier.VerifyVector(data()) && verifier.EndTable();
+  }
+};
+
+struct BufferBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_data(flatbuffers::Offset<flatbuffers::Vector<uint8_t>> data)
+  {
+    fbb_.AddOffset(Buffer::VT_DATA, data);
+  }
+  explicit BufferBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  BufferBuilder &operator=(const BufferBuilder &);
+  flatbuffers::Offset<Buffer> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<Buffer>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<Buffer>
+CreateBuffer(flatbuffers::FlatBufferBuilder &_fbb,
+             flatbuffers::Offset<flatbuffers::Vector<uint8_t>> data = 0)
+{
+  BufferBuilder builder_(_fbb);
+  builder_.add_data(data);
+  return builder_.Finish();
+}
+
+inline flatbuffers::Offset<Buffer> CreateBufferDirect(flatbuffers::FlatBufferBuilder &_fbb,
+                                                      const std::vector<uint8_t> *data = nullptr)
+{
+  return tflite::CreateBuffer(_fbb, data ? _fbb.CreateVector<uint8_t>(*data) : 0);
+}
+
+struct Model FLATBUFFERS_FINAL_CLASS : private flatbuffers::Table
+{
+  enum
+  {
+    VT_VERSION = 4,
+    VT_OPERATOR_CODES = 6,
+    VT_SUBGRAPHS = 8,
+    VT_DESCRIPTION = 10,
+    VT_BUFFERS = 12,
+    VT_METADATA_BUFFER = 14
+  };
+  uint32_t version() const { return GetField<uint32_t>(VT_VERSION, 0); }
+  const flatbuffers::Vector<flatbuffers::Offset<OperatorCode>> *operator_codes() const
+  {
+    return GetPointer<const flatbuffers::Vector<flatbuffers::Offset<OperatorCode>> *>(
+        VT_OPERATOR_CODES);
+  }
+  const flatbuffers::Vector<flatbuffers::Offset<SubGraph>> *subgraphs() const
+  {
+    return GetPointer<const flatbuffers::Vector<flatbuffers::Offset<SubGraph>> *>(VT_SUBGRAPHS);
+  }
+  const flatbuffers::String *description() const
+  {
+    return GetPointer<const flatbuffers::String *>(VT_DESCRIPTION);
+  }
+  const flatbuffers::Vector<flatbuffers::Offset<Buffer>> *buffers() const
+  {
+    return GetPointer<const flatbuffers::Vector<flatbuffers::Offset<Buffer>> *>(VT_BUFFERS);
+  }
+  const flatbuffers::Vector<int32_t> *metadata_buffer() const
+  {
+    return GetPointer<const flatbuffers::Vector<int32_t> *>(VT_METADATA_BUFFER);
+  }
+  bool Verify(flatbuffers::Verifier &verifier) const
+  {
+    return VerifyTableStart(verifier) && VerifyField<uint32_t>(verifier, VT_VERSION) &&
+           VerifyOffset(verifier, VT_OPERATOR_CODES) && verifier.VerifyVector(operator_codes()) &&
+           verifier.VerifyVectorOfTables(operator_codes()) &&
+           VerifyOffset(verifier, VT_SUBGRAPHS) && verifier.VerifyVector(subgraphs()) &&
+           verifier.VerifyVectorOfTables(subgraphs()) && VerifyOffset(verifier, VT_DESCRIPTION) &&
+           verifier.VerifyString(description()) && VerifyOffset(verifier, VT_BUFFERS) &&
+           verifier.VerifyVector(buffers()) && verifier.VerifyVectorOfTables(buffers()) &&
+           VerifyOffset(verifier, VT_METADATA_BUFFER) && verifier.VerifyVector(metadata_buffer()) &&
+           verifier.EndTable();
+  }
+};
+
+struct ModelBuilder
+{
+  flatbuffers::FlatBufferBuilder &fbb_;
+  flatbuffers::uoffset_t start_;
+  void add_version(uint32_t version) { fbb_.AddElement<uint32_t>(Model::VT_VERSION, version, 0); }
+  void add_operator_codes(
+      flatbuffers::Offset<flatbuffers::Vector<flatbuffers::Offset<OperatorCode>>> operator_codes)
+  {
+    fbb_.AddOffset(Model::VT_OPERATOR_CODES, operator_codes);
+  }
+  void
+  add_subgraphs(flatbuffers::Offset<flatbuffers::Vector<flatbuffers::Offset<SubGraph>>> subgraphs)
+  {
+    fbb_.AddOffset(Model::VT_SUBGRAPHS, subgraphs);
+  }
+  void add_description(flatbuffers::Offset<flatbuffers::String> description)
+  {
+    fbb_.AddOffset(Model::VT_DESCRIPTION, description);
+  }
+  void add_buffers(flatbuffers::Offset<flatbuffers::Vector<flatbuffers::Offset<Buffer>>> buffers)
+  {
+    fbb_.AddOffset(Model::VT_BUFFERS, buffers);
+  }
+  void add_metadata_buffer(flatbuffers::Offset<flatbuffers::Vector<int32_t>> metadata_buffer)
+  {
+    fbb_.AddOffset(Model::VT_METADATA_BUFFER, metadata_buffer);
+  }
+  explicit ModelBuilder(flatbuffers::FlatBufferBuilder &_fbb) : fbb_(_fbb)
+  {
+    start_ = fbb_.StartTable();
+  }
+  ModelBuilder &operator=(const ModelBuilder &);
+  flatbuffers::Offset<Model> Finish()
+  {
+    const auto end = fbb_.EndTable(start_);
+    auto o = flatbuffers::Offset<Model>(end);
+    return o;
+  }
+};
+
+inline flatbuffers::Offset<Model> CreateModel(
+    flatbuffers::FlatBufferBuilder &_fbb, uint32_t version = 0,
+    flatbuffers::Offset<flatbuffers::Vector<flatbuffers::Offset<OperatorCode>>> operator_codes = 0,
+    flatbuffers::Offset<flatbuffers::Vector<flatbuffers::Offset<SubGraph>>> subgraphs = 0,
+    flatbuffers::Offset<flatbuffers::String> description = 0,
+    flatbuffers::Offset<flatbuffers::Vector<flatbuffers::Offset<Buffer>>> buffers = 0,
+    flatbuffers::Offset<flatbuffers::Vector<int32_t>> metadata_buffer = 0)
+{
+  ModelBuilder builder_(_fbb);
+  builder_.add_metadata_buffer(metadata_buffer);
+  builder_.add_buffers(buffers);
+  builder_.add_description(description);
+  builder_.add_subgraphs(subgraphs);
+  builder_.add_operator_codes(operator_codes);
+  builder_.add_version(version);
+  return builder_.Finish();
+}
+
+inline flatbuffers::Offset<Model>
+CreateModelDirect(flatbuffers::FlatBufferBuilder &_fbb, uint32_t version = 0,
+                  const std::vector<flatbuffers::Offset<OperatorCode>> *operator_codes = nullptr,
+                  const std::vector<flatbuffers::Offset<SubGraph>> *subgraphs = nullptr,
+                  const char *description = nullptr,
+                  const std::vector<flatbuffers::Offset<Buffer>> *buffers = nullptr,
+                  const std::vector<int32_t> *metadata_buffer = nullptr)
+{
+  return tflite::CreateModel(
+      _fbb, version,
+      operator_codes ? _fbb.CreateVector<flatbuffers::Offset<OperatorCode>>(*operator_codes) : 0,
+      subgraphs ? _fbb.CreateVector<flatbuffers::Offset<SubGraph>>(*subgraphs) : 0,
+      description ? _fbb.CreateString(description) : 0,
+      buffers ? _fbb.CreateVector<flatbuffers::Offset<Buffer>>(*buffers) : 0,
+      metadata_buffer ? _fbb.CreateVector<int32_t>(*metadata_buffer) : 0);
+}
+
+inline bool VerifyQuantizationDetails(flatbuffers::Verifier &verifier, const void *obj,
+                                      QuantizationDetails type)
+{
+  switch (type)
+  {
+    case QuantizationDetails_NONE:
+    {
+      return true;
+    }
+    case QuantizationDetails_CustomQuantization:
+    {
+      auto ptr = reinterpret_cast<const CustomQuantization *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    default:
+      return false;
+  }
+}
+
+inline bool
+VerifyQuantizationDetailsVector(flatbuffers::Verifier &verifier,
+                                const flatbuffers::Vector<flatbuffers::Offset<void>> *values,
+                                const flatbuffers::Vector<uint8_t> *types)
+{
+  if (!values || !types)
+    return !values && !types;
+  if (values->size() != types->size())
+    return false;
+  for (flatbuffers::uoffset_t i = 0; i < values->size(); ++i)
+  {
+    if (!VerifyQuantizationDetails(verifier, values->Get(i),
+                                   types->GetEnum<QuantizationDetails>(i)))
+    {
+      return false;
+    }
+  }
+  return true;
+}
+
+inline bool VerifyBuiltinOptions(flatbuffers::Verifier &verifier, const void *obj,
+                                 BuiltinOptions type)
+{
+  switch (type)
+  {
+    case BuiltinOptions_NONE:
+    {
+      return true;
+    }
+    case BuiltinOptions_Conv2DOptions:
+    {
+      auto ptr = reinterpret_cast<const Conv2DOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_DepthwiseConv2DOptions:
+    {
+      auto ptr = reinterpret_cast<const DepthwiseConv2DOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_ConcatEmbeddingsOptions:
+    {
+      auto ptr = reinterpret_cast<const ConcatEmbeddingsOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_LSHProjectionOptions:
+    {
+      auto ptr = reinterpret_cast<const LSHProjectionOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_Pool2DOptions:
+    {
+      auto ptr = reinterpret_cast<const Pool2DOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_SVDFOptions:
+    {
+      auto ptr = reinterpret_cast<const SVDFOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_RNNOptions:
+    {
+      auto ptr = reinterpret_cast<const RNNOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_FullyConnectedOptions:
+    {
+      auto ptr = reinterpret_cast<const FullyConnectedOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_SoftmaxOptions:
+    {
+      auto ptr = reinterpret_cast<const SoftmaxOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_ConcatenationOptions:
+    {
+      auto ptr = reinterpret_cast<const ConcatenationOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_AddOptions:
+    {
+      auto ptr = reinterpret_cast<const AddOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_L2NormOptions:
+    {
+      auto ptr = reinterpret_cast<const L2NormOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_LocalResponseNormalizationOptions:
+    {
+      auto ptr = reinterpret_cast<const LocalResponseNormalizationOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_LSTMOptions:
+    {
+      auto ptr = reinterpret_cast<const LSTMOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_ResizeBilinearOptions:
+    {
+      auto ptr = reinterpret_cast<const ResizeBilinearOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_CallOptions:
+    {
+      auto ptr = reinterpret_cast<const CallOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_ReshapeOptions:
+    {
+      auto ptr = reinterpret_cast<const ReshapeOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_SkipGramOptions:
+    {
+      auto ptr = reinterpret_cast<const SkipGramOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_SpaceToDepthOptions:
+    {
+      auto ptr = reinterpret_cast<const SpaceToDepthOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_EmbeddingLookupSparseOptions:
+    {
+      auto ptr = reinterpret_cast<const EmbeddingLookupSparseOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_MulOptions:
+    {
+      auto ptr = reinterpret_cast<const MulOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_PadOptions:
+    {
+      auto ptr = reinterpret_cast<const PadOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_GatherOptions:
+    {
+      auto ptr = reinterpret_cast<const GatherOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_BatchToSpaceNDOptions:
+    {
+      auto ptr = reinterpret_cast<const BatchToSpaceNDOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_SpaceToBatchNDOptions:
+    {
+      auto ptr = reinterpret_cast<const SpaceToBatchNDOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_TransposeOptions:
+    {
+      auto ptr = reinterpret_cast<const TransposeOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_ReducerOptions:
+    {
+      auto ptr = reinterpret_cast<const ReducerOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_SubOptions:
+    {
+      auto ptr = reinterpret_cast<const SubOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_DivOptions:
+    {
+      auto ptr = reinterpret_cast<const DivOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_SqueezeOptions:
+    {
+      auto ptr = reinterpret_cast<const SqueezeOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_SequenceRNNOptions:
+    {
+      auto ptr = reinterpret_cast<const SequenceRNNOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_StridedSliceOptions:
+    {
+      auto ptr = reinterpret_cast<const StridedSliceOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_ExpOptions:
+    {
+      auto ptr = reinterpret_cast<const ExpOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_TopKV2Options:
+    {
+      auto ptr = reinterpret_cast<const TopKV2Options *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_SplitOptions:
+    {
+      auto ptr = reinterpret_cast<const SplitOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_LogSoftmaxOptions:
+    {
+      auto ptr = reinterpret_cast<const LogSoftmaxOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_CastOptions:
+    {
+      auto ptr = reinterpret_cast<const CastOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_DequantizeOptions:
+    {
+      auto ptr = reinterpret_cast<const DequantizeOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_MaximumMinimumOptions:
+    {
+      auto ptr = reinterpret_cast<const MaximumMinimumOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_ArgMaxOptions:
+    {
+      auto ptr = reinterpret_cast<const ArgMaxOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_LessOptions:
+    {
+      auto ptr = reinterpret_cast<const LessOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_NegOptions:
+    {
+      auto ptr = reinterpret_cast<const NegOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_PadV2Options:
+    {
+      auto ptr = reinterpret_cast<const PadV2Options *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_GreaterOptions:
+    {
+      auto ptr = reinterpret_cast<const GreaterOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_GreaterEqualOptions:
+    {
+      auto ptr = reinterpret_cast<const GreaterEqualOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_LessEqualOptions:
+    {
+      auto ptr = reinterpret_cast<const LessEqualOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_SelectOptions:
+    {
+      auto ptr = reinterpret_cast<const SelectOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_SliceOptions:
+    {
+      auto ptr = reinterpret_cast<const SliceOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_TransposeConvOptions:
+    {
+      auto ptr = reinterpret_cast<const TransposeConvOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_SparseToDenseOptions:
+    {
+      auto ptr = reinterpret_cast<const SparseToDenseOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_TileOptions:
+    {
+      auto ptr = reinterpret_cast<const TileOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_ExpandDimsOptions:
+    {
+      auto ptr = reinterpret_cast<const ExpandDimsOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_EqualOptions:
+    {
+      auto ptr = reinterpret_cast<const EqualOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_NotEqualOptions:
+    {
+      auto ptr = reinterpret_cast<const NotEqualOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_ShapeOptions:
+    {
+      auto ptr = reinterpret_cast<const ShapeOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_PowOptions:
+    {
+      auto ptr = reinterpret_cast<const PowOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_ArgMinOptions:
+    {
+      auto ptr = reinterpret_cast<const ArgMinOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_FakeQuantOptions:
+    {
+      auto ptr = reinterpret_cast<const FakeQuantOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_PackOptions:
+    {
+      auto ptr = reinterpret_cast<const PackOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_LogicalOrOptions:
+    {
+      auto ptr = reinterpret_cast<const LogicalOrOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_OneHotOptions:
+    {
+      auto ptr = reinterpret_cast<const OneHotOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_LogicalAndOptions:
+    {
+      auto ptr = reinterpret_cast<const LogicalAndOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_LogicalNotOptions:
+    {
+      auto ptr = reinterpret_cast<const LogicalNotOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_UnpackOptions:
+    {
+      auto ptr = reinterpret_cast<const UnpackOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_FloorDivOptions:
+    {
+      auto ptr = reinterpret_cast<const FloorDivOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_SquareOptions:
+    {
+      auto ptr = reinterpret_cast<const SquareOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_ZerosLikeOptions:
+    {
+      auto ptr = reinterpret_cast<const ZerosLikeOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_FillOptions:
+    {
+      auto ptr = reinterpret_cast<const FillOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_BidirectionalSequenceLSTMOptions:
+    {
+      auto ptr = reinterpret_cast<const BidirectionalSequenceLSTMOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_BidirectionalSequenceRNNOptions:
+    {
+      auto ptr = reinterpret_cast<const BidirectionalSequenceRNNOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_UnidirectionalSequenceLSTMOptions:
+    {
+      auto ptr = reinterpret_cast<const UnidirectionalSequenceLSTMOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_FloorModOptions:
+    {
+      auto ptr = reinterpret_cast<const FloorModOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_RangeOptions:
+    {
+      auto ptr = reinterpret_cast<const RangeOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_ResizeNearestNeighborOptions:
+    {
+      auto ptr = reinterpret_cast<const ResizeNearestNeighborOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_LeakyReluOptions:
+    {
+      auto ptr = reinterpret_cast<const LeakyReluOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_SquaredDifferenceOptions:
+    {
+      auto ptr = reinterpret_cast<const SquaredDifferenceOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_MirrorPadOptions:
+    {
+      auto ptr = reinterpret_cast<const MirrorPadOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_AbsOptions:
+    {
+      auto ptr = reinterpret_cast<const AbsOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    case BuiltinOptions_SplitVOptions:
+    {
+      auto ptr = reinterpret_cast<const SplitVOptions *>(obj);
+      return verifier.VerifyTable(ptr);
+    }
+    default:
+      return false;
+  }
+}
+
+inline bool VerifyBuiltinOptionsVector(flatbuffers::Verifier &verifier,
+                                       const flatbuffers::Vector<flatbuffers::Offset<void>> *values,
+                                       const flatbuffers::Vector<uint8_t> *types)
+{
+  if (!values || !types)
+    return !values && !types;
+  if (values->size() != types->size())
+    return false;
+  for (flatbuffers::uoffset_t i = 0; i < values->size(); ++i)
+  {
+    if (!VerifyBuiltinOptions(verifier, values->Get(i), types->GetEnum<BuiltinOptions>(i)))
+    {
+      return false;
+    }
+  }
+  return true;
+}
+
+inline const tflite::Model *GetModel(const void *buf)
+{
+  return flatbuffers::GetRoot<tflite::Model>(buf);
+}
+
+inline const tflite::Model *GetSizePrefixedModel(const void *buf)
+{
+  return flatbuffers::GetSizePrefixedRoot<tflite::Model>(buf);
+}
+
+inline const char *ModelIdentifier() { return "TFL3"; }
+
+inline bool ModelBufferHasIdentifier(const void *buf)
+{
+  return flatbuffers::BufferHasIdentifier(buf, ModelIdentifier());
+}
+
+inline bool VerifyModelBuffer(flatbuffers::Verifier &verifier)
+{
+  return verifier.VerifyBuffer<tflite::Model>(ModelIdentifier());
+}
+
+inline bool VerifySizePrefixedModelBuffer(flatbuffers::Verifier &verifier)
+{
+  return verifier.VerifySizePrefixedBuffer<tflite::Model>(ModelIdentifier());
+}
+
+inline const char *ModelExtension() { return "tflite"; }
+
+inline void FinishModelBuffer(flatbuffers::FlatBufferBuilder &fbb,
+                              flatbuffers::Offset<tflite::Model> root)
+{
+  fbb.Finish(root, ModelIdentifier());
+}
+
+inline void FinishSizePrefixedModelBuffer(flatbuffers::FlatBufferBuilder &fbb,
+                                          flatbuffers::Offset<tflite::Model> root)
+{
+  fbb.FinishSizePrefixed(root, ModelIdentifier());
+}
+
+} // namespace tflite
+
+#endif // FLATBUFFERS_GENERATED_SCHEMA_TFLITE_H_
diff --git a/runtimes/neurun/src/backend/BackendManager.cc b/runtimes/neurun/src/backend/BackendManager.cc
deleted file mode 100644
index 5d19d4015..000000000
--- a/runtimes/neurun/src/backend/BackendManager.cc
+++ /dev/null
@@ -1,118 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <dlfcn.h>
-#include "BackendManager.h"
-
-#include "backend/interface/IConfig.h"
-#include "backend/interface/ITensorBuilder.h"
-#include "backend/interface/IStageGenerator.h"
-#include "util/logging.h"
-#include "util/config/ConfigManager.h"
-
-namespace neurun
-{
-namespace backend
-{
-
-Backend::Backend(const std::shared_ptr<neurun::backend::IConfig> &backend_config,
-                 const std::shared_ptr<neurun::backend::IStageGenerator> &stage_gen)
-    : _config(backend_config), _stage_gen(stage_gen)
-{
-  backend_config->initialize();
-}
-
-const std::shared_ptr<neurun::backend::IConfig> Backend::config() const { return _config; }
-
-const std::shared_ptr<neurun::backend::IStageGenerator> Backend::stage_gen() const
-{
-  return _stage_gen;
-}
-
-const std::shared_ptr<neurun::backend::ITensorBuilder> Backend::tensor_builder() const
-{
-  return _stage_gen->tensor_builder();
-}
-
-template <typename T, class... Types>
-void BackendManager::loadObjectFromPlugin(std::shared_ptr<T> &object_of_plugin_class,
-                                          const std::string obj_creator_func_name, void *handle,
-                                          Types &&... args)
-{
-  T *(*allocate_obj)(Types && ... Args);
-  // load object creator function
-  allocate_obj = (T * (*)(Types && ... Args))dlsym(handle, obj_creator_func_name.c_str());
-  if (allocate_obj == nullptr)
-  {
-    fprintf(stderr, "BackendManager: unable to open function %s: %s\n",
-            obj_creator_func_name.c_str(), dlerror());
-    abort();
-  }
-
-  object_of_plugin_class.reset(allocate_obj(args...));
-}
-
-void BackendManager::loadBackend(const std::string &backend,
-                                 const neurun::model::operand::Set &operands)
-{
-  const std::string backend_plugin = "libbackend_" + backend + ".so";
-  void *handle = dlopen(backend_plugin.c_str(), RTLD_LAZY | RTLD_LOCAL);
-  if (handle == nullptr)
-  {
-    fprintf(stderr, "BackendManager::loadBackend failed to load plugin of %s backend: %s\n",
-            backend.c_str(), dlerror());
-    abort();
-  }
-  VERBOSE(BackendManager::loadBackend) << "loaded " << backend_plugin << " as a plugin of "
-                                       << backend << " backend\n";
-
-  // load Config
-  std::shared_ptr<neurun::backend::IConfig> config;
-  loadObjectFromPlugin(config, std::string("allocate_Config"), handle);
-
-  // load TensorBuilder
-  std::shared_ptr<neurun::backend::ITensorBuilder> tensor_builder;
-  loadObjectFromPlugin(tensor_builder, std::string("allocate_TensorBuilder"), handle);
-
-  // load StageGenerator
-  std::shared_ptr<neurun::backend::IStageGenerator> stage_gen;
-  loadObjectFromPlugin(stage_gen, std::string("allocate_StageGenerator"), handle, operands,
-                       tensor_builder);
-  _gen_map[config->id()] = {config, stage_gen};
-}
-
-BackendManager::BackendManager(const neurun::model::operand::Set &operands)
-{
-  const auto backends = config::ConfigManager::instance().get<std::string>("BACKENDS");
-  size_t prev_pos = 0;
-  auto pos = backends.find(";");
-  while (pos != std::string::npos)
-  {
-    loadBackend(backends.substr(prev_pos, pos - prev_pos), operands);
-    prev_pos = pos + 1;
-    pos = backends.find(";", prev_pos);
-  }
-  // if backends doesn't terminate with ";"
-  if (prev_pos < backends.size())
-  {
-    loadBackend(backends.substr(prev_pos), operands);
-  }
-}
-
-Backend *BackendManager::get(const std::string &key) { return &_gen_map.at(key); }
-
-} // namespace backend
-} // namespace neurun
diff --git a/runtimes/neurun/src/backend/BackendManager.h b/runtimes/neurun/src/backend/BackendManager.h
deleted file mode 100644
index 428542b1e..000000000
--- a/runtimes/neurun/src/backend/BackendManager.h
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_BACKEND_MANAGER_H__
-#define __NEURUN_BACKEND_BACKEND_MANAGER_H__
-
-#include <memory>
-#include <map>
-
-#include "model/operand/Set.h"
-
-namespace neurun
-{
-namespace backend
-{
-
-struct IConfig;
-struct IStageGenerator;
-struct ITensorBuilder;
-
-class Backend
-{
-public:
-  Backend(const std::shared_ptr<neurun::backend::IConfig> &backend_config,
-          const std::shared_ptr<neurun::backend::IStageGenerator> &stage_gen);
-
-  Backend(void) : _config(nullptr), _stage_gen(nullptr)
-  {
-    // DO NOTHING
-  }
-
-public:
-  const std::shared_ptr<neurun::backend::IConfig> config() const;
-  const std::shared_ptr<neurun::backend::IStageGenerator> stage_gen() const;
-  const std::shared_ptr<neurun::backend::ITensorBuilder> tensor_builder() const;
-
-private:
-  std::shared_ptr<neurun::backend::IConfig> _config;
-  std::shared_ptr<neurun::backend::IStageGenerator> _stage_gen;
-};
-
-class BackendManager
-{
-public:
-  BackendManager(const neurun::model::operand::Set &operands);
-
-  Backend *get(const std::string &key);
-
-private:
-  std::map<std::string, Backend> _gen_map;
-  /**
-   * @brief Allocate an object of a class of a plugin by loading a plugin function, that does
-   * allocation, and calling it
-   *
-   * @param object_of_plugin_class target object
-   * @param obj_creator_func_name name of the plugin function, that allocates an object
-   * @param handle handle of the plugin
-   * @param args arguments to pass to constructor of the plugin class
-   *
-   * @return
-   */
-  template <typename T, class... Types>
-  void loadObjectFromPlugin(std::shared_ptr<T> &object_of_plugin_class,
-                            const std::string obj_creator_func_name, void *handle,
-                            Types &&... args);
-
-  /**
-   * @brief load backend plugin
-   *
-   * @param backend backend to be loaded
-   * @param operands operands to construct StageGenerator
-   *
-   * @return
-   */
-  void loadBackend(const std::string &backend, const neurun::model::operand::Set &operands);
-};
-
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_BACKEND_MANAGER_H__
diff --git a/runtimes/neurun/src/backend/CMakeLists.txt b/runtimes/neurun/src/backend/CMakeLists.txt
deleted file mode 100644
index a39823102..000000000
--- a/runtimes/neurun/src/backend/CMakeLists.txt
+++ /dev/null
@@ -1,2 +0,0 @@
-add_subdirectory(cpu)
-add_subdirectory(acl_cl)
diff --git a/runtimes/neurun/src/backend/acl_cl/CMakeLists.txt b/runtimes/neurun/src/backend/acl_cl/CMakeLists.txt
deleted file mode 100644
index f1ea22bc5..000000000
--- a/runtimes/neurun/src/backend/acl_cl/CMakeLists.txt
+++ /dev/null
@@ -1,15 +0,0 @@
-file(GLOB_RECURSE SOURCES "*.cc")
-
-add_library(${LIB_NEURUN_BACKEND_ACL_CL} SHARED ${SOURCES})
-
-target_include_directories(${LIB_NEURUN_BACKEND_ACL_CL} PUBLIC ${NNFW_INCLUDE_DIR})
-target_include_directories(${LIB_NEURUN_BACKEND_ACL_CL} PUBLIC ${NEURUN_INCLUDE_DIR})
-
-target_link_libraries(${LIB_NEURUN_BACKEND_ACL_CL} arm_compute)
-target_link_libraries(${LIB_NEURUN_BACKEND_ACL_CL} ${LIB_NEURUN_KERNEL_ACL_CL})
-target_link_libraries(${LIB_NEURUN_BACKEND_ACL_CL} ${LIB_NEURUN})
-
-target_compile_options(${LIB_NEURUN_BACKEND_ACL_CL} PRIVATE -Wall -Wextra -Werror -Wno-unused-parameter)
-
-set_target_properties(${LIB_NEURUN_BACKEND_ACL_CL} PROPERTIES OUTPUT_NAME backend_acl_cl)
-install(TARGETS ${LIB_NEURUN_BACKEND_ACL_CL} DESTINATION lib/neurun)
diff --git a/runtimes/neurun/src/backend/acl_cl/Config.cc b/runtimes/neurun/src/backend/acl_cl/Config.cc
deleted file mode 100644
index cad9b8988..000000000
--- a/runtimes/neurun/src/backend/acl_cl/Config.cc
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <arm_compute/runtime/CL/CLScheduler.h>
-
-#include "backend/acl_cl/Config.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace acl_cl
-{
-
-void Config::initialize() { arm_compute::CLScheduler::get().default_init(); }
-
-} // namespace acl_cl
-} // namespace backend
-} // namespace neurun
diff --git a/runtimes/neurun/src/backend/acl_cl/Config.h b/runtimes/neurun/src/backend/acl_cl/Config.h
deleted file mode 100644
index cb43bfbe0..000000000
--- a/runtimes/neurun/src/backend/acl_cl/Config.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_ACL_CL_CONFIG_H__
-#define __NEURUN_BACKEND_ACL_CL_CONFIG_H__
-
-#include "backend/interface/IConfig.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace acl_cl
-{
-
-class Config : public IConfig
-{
-public:
-  Config()
-  {
-    // DO NOTHING
-  }
-
-  virtual std::string id() override { return "acl_cl"; }
-  virtual void initialize() override;
-  virtual graph::operand::Layout getOperandLayout() { return graph::operand::Layout::NCHW; }
-  virtual bool SupportSubTensorAlloc() override { return true; }
-};
-
-} // namespace acl_cl
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_ACL_CL_CONFIG_H__
diff --git a/runtimes/neurun/src/backend/acl_cl/Convert.cc b/runtimes/neurun/src/backend/acl_cl/Convert.cc
deleted file mode 100644
index ed0a089c4..000000000
--- a/runtimes/neurun/src/backend/acl_cl/Convert.cc
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Convert.h"
-
-#include "Swizzle.h"
-#include "model/operand/DataType.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace acl_cl
-{
-
-::arm_compute::TensorShape asTensorShape(const ::neurun::model::operand::Shape &shape,
-                                         bool apply_dim_correction)
-{
-  const uint32_t rank = shape.rank();
-
-  ::arm_compute::TensorShape res{};
-
-  res.set_num_dimensions(rank);
-
-  for (uint32_t axis = 0; axis < rank; ++axis)
-  {
-    // NOTE In some cases, in incorrect dimensions is required.
-    // For example, intput_size is 1 in LSTM. The input-to-input weights([num_units, input_size]) of
-    // LSTM is used as the weight of the FullyConnected.
-    // The FullyConnected's weight must be greater or equal than 2-dimensions.
-    // However, if the dimension correction is applied to input_to_input_weights with input_size
-    // equal to 1, it will be changed to 1-D.
-    // So input_to_input_weights is not used by the weight of FullyConnected.
-    res.set(ToARMComputeAxis(rank, axis).value(), shape.dim(axis), apply_dim_correction);
-  }
-
-  return res;
-}
-
-::arm_compute::DataType asDataType(const ::neurun::model::operand::DataType &type)
-{
-  switch (type)
-  {
-    case ::neurun::model::operand::DataType::SCALAR_FLOAT32:
-    case ::neurun::model::operand::DataType::TENSOR_FLOAT32:
-      return ::arm_compute::DataType::F32;
-    case ::neurun::model::operand::DataType::SCALAR_INT32:
-    case ::neurun::model::operand::DataType::TENSOR_INT32:
-      return ::arm_compute::DataType::S32;
-    case ::neurun::model::operand::DataType::SCALAR_UINT32:
-      return ::arm_compute::DataType::U32;
-    case ::neurun::model::operand::DataType::TENSOR_QUANT8_ASYMM:
-      return ::arm_compute::DataType::QASYMM8;
-    default:
-      throw std::runtime_error("Not supported, yet");
-      break;
-  }
-}
-
-::arm_compute::QuantizationInfo asQuantizationInfo(const float scale, const int32_t offset)
-{
-  return ::arm_compute::QuantizationInfo(scale, offset);
-}
-
-::arm_compute::TensorInfo asTensorInfo(const ::neurun::model::operand::Shape &shape,
-                                       const ::neurun::model::operand::TypeInfo &typeInfo)
-{
-  return ::arm_compute::TensorInfo(asTensorShape(shape), 1, asDataType(typeInfo.type()),
-                                   asQuantizationInfo(typeInfo.scale(), typeInfo.offset()));
-}
-
-} // namespace acl_cl
-} // namespace backend
-} // namespace neurun
diff --git a/runtimes/neurun/src/backend/acl_cl/Convert.h b/runtimes/neurun/src/backend/acl_cl/Convert.h
deleted file mode 100644
index 1a233fb87..000000000
--- a/runtimes/neurun/src/backend/acl_cl/Convert.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_ACL_CL_CONVERT_H__
-#define __NEURUN_BACKEND_ACL_CL_CONVERT_H__
-
-#include <arm_compute/core/TensorInfo.h>
-#include <arm_compute/core/SubTensorInfo.h>
-#include <arm_compute/core/TensorShape.h>
-
-#include "model/operand/Object.h"
-#include "model/operand/Shape.h"
-#include "model/operand/TypeInfo.h"
-#include "misc/feature/Shape.h"
-#include "misc/kernel/Shape.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace acl_cl
-{
-
-::arm_compute::TensorShape asTensorShape(const ::neurun::model::operand::Shape &shape,
-                                         bool apply_dim_correction = true);
-::arm_compute::DataType asDataType(const ::neurun::model::operand::DataType &type);
-::arm_compute::TensorInfo asTensorInfo(const ::neurun::model::operand::Shape &shape,
-                                       const ::neurun::model::operand::TypeInfo &typeInfo);
-
-} // namespace acl_cl
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_ACL_CL_CONVERT_H__
diff --git a/runtimes/neurun/src/backend/acl_cl/PluginClassesAllocator.cc b/runtimes/neurun/src/backend/acl_cl/PluginClassesAllocator.cc
deleted file mode 100644
index f33e71d33..000000000
--- a/runtimes/neurun/src/backend/acl_cl/PluginClassesAllocator.cc
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <memory>
-#include "TensorBuilder.h"
-#include "StageGenerator.h"
-#include "Config.h"
-#include "util/logging.h"
-
-extern "C" {
-neurun::backend::acl_cl::TensorBuilder *allocate_TensorBuilder()
-{
-  VERBOSE(allocate_TensorBuilder) << "loaded from acl_cl\n";
-  return new neurun::backend::acl_cl::TensorBuilder;
-}
-
-neurun::backend::acl_cl::StageGenerator *allocate_StageGenerator(
-    const neurun::model::operand::Set &operand_ctx,
-    const std::shared_ptr<neurun::backend::acl_cl::TensorBuilder> &tensor_builder)
-{
-  VERBOSE(allocate_StageGenerator) << "loaded from acl_cl\n";
-  return new neurun::backend::acl_cl::StageGenerator(operand_ctx, tensor_builder);
-}
-
-neurun::backend::acl_cl::Config *allocate_Config()
-{
-  VERBOSE(allocate_Config) << "loaded from acl_cl\n";
-  return new neurun::backend::acl_cl::Config;
-}
-}
diff --git a/runtimes/neurun/src/backend/acl_cl/StageGenerator.cc b/runtimes/neurun/src/backend/acl_cl/StageGenerator.cc
deleted file mode 100644
index 89bbd7bd2..000000000
--- a/runtimes/neurun/src/backend/acl_cl/StageGenerator.cc
+++ /dev/null
@@ -1,593 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "backend/acl_cl/StageGenerator.h"
-
-#include "kernel/acl_cl/CLFunction.h"
-
-#include <arm_compute/runtime/CL/functions/CLConvolutionLayer.h>
-#include <arm_compute/runtime/CL/functions/CLPoolingLayer.h>
-#include <arm_compute/runtime/CL/functions/CLActivationLayer.h>
-#include <arm_compute/runtime/CL/functions/CLReshapeLayer.h>
-#include <arm_compute/runtime/CL/functions/CLFullyConnectedLayer.h>
-#include <arm_compute/runtime/CL/functions/CLSoftmaxLayer.h>
-
-#include "kernel/acl_cl/ConcatLayer.h"
-
-#include "util/Padding.h"
-
-#include "model/operand/Index.h"
-
-#include "util/logging.h"
-
-#include "NeuralNetworks.h"
-
-#include "util/Utils.h"
-
-template <typename T> std::unique_ptr<T> make_layer(void) { return std::unique_ptr<T>{new T}; }
-
-std::unique_ptr<::neurun::kernel::acl_cl::CLFunction>
-make_cl_function(std::unique_ptr<::arm_compute::IFunction> &&layer)
-{
-  return std::unique_ptr<::neurun::kernel::acl_cl::CLFunction>(
-      new ::neurun::kernel::acl_cl::CLFunction(std::move(layer)));
-}
-
-::arm_compute::PadStrideInfo asPadStringInfo(const neurun::util::Padding &padding,
-                                             const neurun::util::Stride &stride)
-{
-  return ::arm_compute::PadStrideInfo{stride.horizontal,
-                                      stride.vertical,
-                                      padding.left,
-                                      padding.right,
-                                      padding.top,
-                                      padding.bottom,
-                                      ::arm_compute::DimensionRoundingType::FLOOR};
-}
-
-namespace neurun
-{
-namespace backend
-{
-namespace acl_cl
-{
-
-//
-// ActivationBuilder
-//
-class ActivationBuilder
-{
-public:
-  ActivationBuilder(IExecutionBuilder &builder) : _builder(builder)
-  {
-    // DO NOTHING
-  }
-
-private:
-  void appendReLU(::arm_compute::ICLTensor *tensor);
-
-public:
-  void append(FuseCode code, ::arm_compute::ICLTensor *tensor);
-
-private:
-  IExecutionBuilder &_builder;
-};
-
-void ActivationBuilder::appendReLU(::arm_compute::ICLTensor *ifm_alloc)
-{
-  const ::arm_compute::ActivationLayerInfo act_info{
-      ::arm_compute::ActivationLayerInfo::ActivationFunction::RELU};
-
-  auto fn = make_layer<::arm_compute::CLActivationLayer>();
-
-  fn->configure(ifm_alloc, nullptr, act_info);
-
-  auto acl_fn = make_cl_function(std::move(fn));
-
-  _builder.append(std::move(acl_fn));
-}
-
-void ActivationBuilder::append(FuseCode code, ::arm_compute::ICLTensor *ifm_alloc)
-{
-  switch (code)
-  {
-    case ANEURALNETWORKS_FUSED_NONE:
-    {
-      // DO NOTHING
-      break;
-    }
-    case ANEURALNETWORKS_FUSED_RELU:
-    {
-      appendReLU(ifm_alloc);
-      break;
-    }
-    default:
-    {
-      throw std::runtime_error("Not supported, yet");
-    }
-  }
-}
-
-//
-// StageGenerator
-//
-StageGenerator::StageGenerator(const neurun::model::operand::Set &ctx,
-                               const std::shared_ptr<TensorBuilder> &tensor_builder)
-    : _ctx(ctx), _tensor_builder(tensor_builder)
-{
-  // DO NOTHING
-}
-
-void StageGenerator::visit(const model::operation::Conv2DNode &node)
-{
-  using model::operation::Conv2DNode;
-
-  const auto ofm_index{node.getOutputs().at(0)};
-  const auto ifm_index{node.getInputs().at(Conv2DNode::Input::INPUT)};
-  const auto ker_index{node.getInputs().at(Conv2DNode::Input::KERNEL)};
-  const auto bias_index{node.getInputs().at(Conv2DNode::Input::BIAS)};
-
-  const auto vstride_index{node.param().vstride_index};
-  const auto hstride_index{node.param().hstride_index};
-
-  const auto padding_index{node.param().padding_index};
-  const auto activation_index{node.param().activation_index};
-
-  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature();
-  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature();
-  const auto ker_shape = _ctx.at(ker_index).shape().asKernel();
-
-  const PaddingCode padding_type =
-      static_cast<PaddingCode>(_ctx.at(padding_index).asScalar<int32_t>());
-
-  assert((ANEURALNETWORKS_PADDING_SAME == padding_type) ||
-         (ANEURALNETWORKS_PADDING_VALID == padding_type));
-
-  neurun::util::Stride stride;
-
-  stride.vertical = _ctx.at(vstride_index).asScalar<int32_t>();
-  stride.horizontal = _ctx.at(hstride_index).asScalar<int32_t>();
-
-  // Construct operation parameters
-  struct Param
-  {
-    model::operand::Index ofm_index;
-    model::operand::Index ifm_index;
-    model::operand::Index ker_index;
-    model::operand::Index bias_index;
-
-    neurun::util::Padding padding;
-    neurun::util::Stride stride;
-
-    FuseCode activation;
-  };
-
-  Param param;
-
-  param.ofm_index = ofm_index;
-  param.ifm_index = ifm_index;
-  param.ker_index = ker_index;
-  param.bias_index = bias_index;
-
-  param.stride = stride;
-  param.padding =
-      (padding_type == ANEURALNETWORKS_PADDING_SAME)
-          ? neurun::util::same_padding(ifm_shape, ofm_shape, stride, ker_shape.W, ker_shape.H)
-          : neurun::util::valid_padding();
-
-  param.activation = static_cast<FuseCode>(_ctx.at(activation_index).asScalar<int32_t>());
-
-  auto tensors = _tensor_builder;
-
-  returnStage([tensors, param](IExecutionBuilder &builder) {
-    auto ofm_alloc = tensors->at(param.ofm_index).get();
-    auto ifm_alloc = tensors->at(param.ifm_index).get();
-    auto ker_alloc = tensors->at(param.ker_index).get();
-    auto bias_alloc = tensors->at(param.bias_index).get();
-
-    const auto conv_info = asPadStringInfo(param.padding, param.stride);
-
-    std::unique_ptr<::arm_compute::CLConvolutionLayer> fn{new ::arm_compute::CLConvolutionLayer};
-
-    fn->configure(ifm_alloc->handle(), ker_alloc->handle(), bias_alloc->handle(),
-                  ofm_alloc->handle(), conv_info);
-
-    auto acl_fn = make_cl_function(std::move(fn));
-
-    builder.append(std::move(acl_fn));
-
-    ActivationBuilder{builder}.append(param.activation, ofm_alloc->handle());
-  });
-}
-
-void StageGenerator::visit(const model::operation::MaxPool2DNode &node)
-{
-  const auto ofm_index{node.getOutputs().at(0)};
-  const auto ifm_index{node.getInputs().at(model::operation::MaxPool2DNode::Input::INPUT)};
-
-  const auto kh_index{node.param().kh_index};
-  const auto kw_index{node.param().kw_index};
-
-  const auto vstride_index{node.param().vstride_index};
-  const auto hstride_index{node.param().hstride_index};
-
-  const auto padding_index{node.param().padding_index};
-
-  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature();
-  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature();
-
-  const int32_t kh = _ctx.at(kh_index).asScalar<int32_t>();
-  const int32_t kw = _ctx.at(kw_index).asScalar<int32_t>();
-
-  const int32_t vstride = _ctx.at(vstride_index).asScalar<int32_t>();
-  const int32_t hstride = _ctx.at(hstride_index).asScalar<int32_t>();
-
-  const PaddingCode padding_type =
-      static_cast<PaddingCode>(_ctx.at(padding_index).asScalar<int32_t>());
-
-  // Construct operation parameters
-  struct Param
-  {
-    model::operand::Index ofm_index;
-    model::operand::Index ifm_index;
-
-    uint32_t kw;
-    uint32_t kh;
-
-    neurun::util::Padding padding;
-    neurun::util::Stride stride;
-
-    // TODO Add 'activation' field
-  };
-
-  Param param;
-
-  param.ofm_index = ofm_index;
-  param.ifm_index = ifm_index;
-
-  param.kh = kh;
-  param.kw = kw;
-
-  param.stride.vertical = vstride;
-  param.stride.horizontal = hstride;
-
-  param.padding = (padding_type == ANEURALNETWORKS_PADDING_SAME)
-                      ? neurun::util::same_padding(ifm_shape, ofm_shape, param.stride, kw, kh)
-                      : neurun::util::valid_padding();
-
-  VERBOSE(MaxPool2D) << "IFM_H: " << ifm_shape.H << std::endl;
-  VERBOSE(MaxPool2D) << "IFM_W: " << ifm_shape.W << std::endl;
-  VERBOSE(MaxPool2D) << "OFM_H: " << ofm_shape.H << std::endl;
-  VERBOSE(MaxPool2D) << "OFM_W: " << ofm_shape.W << std::endl;
-  VERBOSE(MaxPool2D) << "KER_H: " << kh << std::endl;
-  VERBOSE(MaxPool2D) << "KER_W: " << kw << std::endl;
-  VERBOSE(MaxPool2D) << "STRIDE_H: " << vstride << std::endl;
-  VERBOSE(MaxPool2D) << "STRIDE_W: " << hstride << std::endl;
-  VERBOSE(MaxPool2D) << "PAD(T): " << param.padding.top << std::endl;
-  VERBOSE(MaxPool2D) << "PAD(B): " << param.padding.bottom << std::endl;
-  VERBOSE(MaxPool2D) << "PAD(L): " << param.padding.left << std::endl;
-  VERBOSE(MaxPool2D) << "PAD(R): " << param.padding.right << std::endl;
-
-  auto tensors = _tensor_builder;
-
-  returnStage([tensors, param](IExecutionBuilder &builder) {
-    auto ofm_alloc = tensors->at(param.ofm_index).get();
-    auto ifm_alloc = tensors->at(param.ifm_index).get();
-
-    ::arm_compute::PoolingLayerInfo info{::arm_compute::PoolingType::MAX,
-                                         ::arm_compute::Size2D{param.kw, param.kh},
-                                         asPadStringInfo(param.padding, param.stride)};
-
-    std::unique_ptr<::arm_compute::CLPoolingLayer> fn{new ::arm_compute::CLPoolingLayer};
-
-    fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), info);
-
-    auto acl_fn = make_cl_function(std::move(fn));
-
-    builder.append((std::move(acl_fn)));
-  });
-}
-
-void StageGenerator::visit(const model::operation::AvgPool2DNode &node)
-{
-  const auto ofm_index{node.getOutputs().at(0)};
-  const auto ifm_index{node.getInputs().at(model::operation::AvgPool2DNode::Input::INPUT)};
-
-  const auto kh_index{node.param().kh_index};
-  const auto kw_index{node.param().kw_index};
-
-  const auto vstride_index{node.param().vstride_index};
-  const auto hstride_index{node.param().hstride_index};
-
-  const auto padding_index{node.param().padding_index};
-
-  const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature();
-  const auto ifm_shape = _ctx.at(ifm_index).shape().asFeature();
-
-  const int32_t kh = _ctx.at(kh_index).asScalar<int32_t>();
-  const int32_t kw = _ctx.at(kw_index).asScalar<int32_t>();
-
-  const int32_t vstride = _ctx.at(vstride_index).asScalar<int32_t>();
-  const int32_t hstride = _ctx.at(hstride_index).asScalar<int32_t>();
-
-  const PaddingCode padding_type =
-      static_cast<PaddingCode>(_ctx.at(padding_index).asScalar<int32_t>());
-
-  assert((ANEURALNETWORKS_PADDING_SAME == padding_type) ||
-         (ANEURALNETWORKS_PADDING_VALID == padding_type));
-
-  // Construct operation parameters
-  struct Param
-  {
-    model::operand::Index ofm_index;
-    model::operand::Index ifm_index;
-
-    uint32_t kw;
-    uint32_t kh;
-
-    neurun::util::Padding padding;
-    neurun::util::Stride stride;
-
-    // TODO Add 'activation' field
-  };
-
-  Param param;
-
-  param.ofm_index = ofm_index;
-  param.ifm_index = ifm_index;
-
-  param.kh = kh;
-  param.kw = kw;
-
-  param.stride.vertical = vstride;
-  param.stride.horizontal = hstride;
-
-  param.padding = (padding_type == ANEURALNETWORKS_PADDING_SAME)
-                      ? neurun::util::same_padding(ifm_shape, ofm_shape, param.stride, kw, kh)
-                      : neurun::util::valid_padding();
-
-  VERBOSE(AvgPool2D) << "IFM_H: " << ifm_shape.H << std::endl;
-  VERBOSE(AvgPool2D) << "IFM_W: " << ifm_shape.W << std::endl;
-  VERBOSE(AvgPool2D) << "OFM_H: " << ofm_shape.H << std::endl;
-  VERBOSE(AvgPool2D) << "OFM_W: " << ofm_shape.W << std::endl;
-  VERBOSE(AvgPool2D) << "KER_H: " << kh << std::endl;
-  VERBOSE(AvgPool2D) << "KER_W: " << kw << std::endl;
-  VERBOSE(AvgPool2D) << "STRIDE_H: " << vstride << std::endl;
-  VERBOSE(AvgPool2D) << "STRIDE_W: " << hstride << std::endl;
-  VERBOSE(AvgPool2D) << "PAD: " << neurun::util::to_string(padding_type) << std::endl;
-  VERBOSE(AvgPool2D) << "PAD(T): " << param.padding.top << std::endl;
-  VERBOSE(AvgPool2D) << "PAD(B): " << param.padding.bottom << std::endl;
-  VERBOSE(AvgPool2D) << "PAD(L): " << param.padding.left << std::endl;
-  VERBOSE(AvgPool2D) << "PAD(R): " << param.padding.right << std::endl;
-
-  auto tensors = _tensor_builder;
-
-  returnStage([tensors, param](IExecutionBuilder &builder) {
-    auto ofm_alloc = tensors->at(param.ofm_index).get();
-    auto ifm_alloc = tensors->at(param.ifm_index).get();
-
-    ::arm_compute::PoolingLayerInfo info{
-        ::arm_compute::PoolingType::AVG, ::arm_compute::Size2D{param.kw, param.kh},
-        asPadStringInfo(param.padding, param.stride), true /* exclude_padding */};
-
-    std::unique_ptr<::arm_compute::CLPoolingLayer> fn{new ::arm_compute::CLPoolingLayer};
-
-    fn->configure(ifm_alloc->handle(), ofm_alloc->handle(), info);
-
-    auto acl_fn = make_cl_function(std::move(fn));
-
-    builder.append((std::move(acl_fn)));
-  });
-}
-
-void StageGenerator::visit(const model::operation::ConcatNode &node)
-{
-  const auto ofm_index{node.getOutputs().at(0)};
-  const auto axis_index{node.param().axis_index};
-
-  struct Param
-  {
-    model::operand::Index output_index;
-    std::vector<model::operand::Index> input_indexes;
-
-    int32_t axis;
-  };
-
-  Param param;
-
-  param.output_index = ofm_index;
-  for (const auto &e : node.getInputs())
-  {
-    param.input_indexes.emplace_back(e);
-  }
-  param.axis = _ctx.at(axis_index).asScalar<int32_t>();
-
-  auto tensors = _tensor_builder;
-
-  returnStage([tensors, param](IExecutionBuilder &builder) {
-    // If tensor allocator allocate as subtensor
-    bool canEliminate = true;
-    for (auto ifm_ind : param.input_indexes)
-    {
-      if (!tensors->isSubTensorOf(param.output_index, ifm_ind))
-      {
-        canEliminate = false;
-        break;
-      }
-    }
-    if (canEliminate)
-    {
-      // If concat eliminated, return with nothing to do
-      return;
-    }
-
-    auto output_alloc = tensors->at(param.output_index).get();
-
-    std::vector<::neurun::backend::acl_cl::operand::ICLTensor *> input_allocs;
-    for (auto ifm_ind : param.input_indexes)
-    {
-      input_allocs.emplace_back(
-          dynamic_cast<::neurun::backend::acl_cl::operand::CLTensor *>(tensors->at(ifm_ind).get()));
-    }
-
-    std::unique_ptr<::neurun::kernel::acl_cl::ConcatLayer> fn{
-        new ::neurun::kernel::acl_cl::ConcatLayer};
-
-    fn->configure(input_allocs, param.axis,
-                  dynamic_cast<::neurun::backend::acl_cl::operand::CLTensor *>(output_alloc));
-
-    auto acl_fn = make_cl_function(std::move(fn));
-
-    builder.append(std::move(acl_fn));
-  });
-}
-
-void StageGenerator::visit(const model::operation::FullyConnectedNode &node)
-{
-  using model::operation::FullyConnectedNode;
-
-  const auto output_index{node.getOutputs().at(0)};
-  const auto input_index{node.getInputs().at(FullyConnectedNode::Input::INPUT)};
-  const auto weight_index{node.getInputs().at(FullyConnectedNode::Input::WEIGHT)};
-  const auto bias_index{node.getInputs().at(FullyConnectedNode::Input::BIAS)};
-  const auto activation_index{node.param().activation_index};
-
-  // Construct operation parameters
-  struct Param
-  {
-    model::operand::Index output_index;
-
-    model::operand::Index input_index;
-    model::operand::Index weight_index;
-    model::operand::Index bias_index;
-
-    FuseCode activation;
-  };
-
-  Param param;
-
-  param.output_index = output_index;
-  param.input_index = input_index;
-  param.weight_index = weight_index;
-  param.bias_index = bias_index;
-
-  param.activation = static_cast<FuseCode>(_ctx.at(activation_index).asScalar<int32_t>());
-
-  auto tensors = _tensor_builder;
-
-  returnStage([tensors, param](IExecutionBuilder &builder) {
-    auto output_alloc = tensors->at(param.output_index).get();
-    auto input_alloc = tensors->at(param.input_index).get();
-    auto weight_alloc = tensors->at(param.weight_index).get();
-    auto bias_alloc = tensors->at(param.bias_index).get();
-
-    auto fn = make_layer<::arm_compute::CLFullyConnectedLayer>();
-
-    fn->configure(input_alloc->handle(), weight_alloc->handle(), bias_alloc->handle(),
-                  output_alloc->handle());
-
-    auto acl_fn = make_cl_function(std::move(fn));
-
-    builder.append(std::move(acl_fn));
-
-    ActivationBuilder{builder}.append(param.activation, output_alloc->handle());
-  });
-}
-
-void StageGenerator::visit(const model::operation::ReshapeNode &node)
-{
-  const auto output_index{node.getOutputs().at(0)};
-  const auto input_index{node.getInputs().at(model::operation::ReshapeNode::Input::INPUT)};
-
-  struct Param
-  {
-    model::operand::Index output_index;
-    model::operand::Index input_index;
-  };
-
-  Param param;
-
-  param.output_index = output_index;
-  param.input_index = input_index;
-
-  auto tensors = _tensor_builder;
-
-  returnStage([tensors, param](IExecutionBuilder &builder) {
-    auto output_alloc = tensors->at(param.output_index).get();
-    auto input_alloc = tensors->at(param.input_index).get();
-
-    auto fn = make_layer<::arm_compute::CLReshapeLayer>();
-
-    fn->configure(input_alloc->handle(), output_alloc->handle());
-
-    auto acl_fn = make_cl_function(std::move(fn));
-
-    builder.append(std::move(acl_fn));
-  });
-}
-
-void StageGenerator::visit(const model::operation::SoftmaxNode &node)
-{
-  const auto output_index{node.getOutputs().at(0)};
-  const auto input_index{node.getInputs().at(model::operation::SoftmaxNode::Input::INPUT)};
-  const auto scale_index{node.param().scale_index};
-
-  assert(_ctx.at(scale_index).shape().rank() == 0);
-
-  struct Param
-  {
-    model::operand::Index output_index;
-    model::operand::Index input_index;
-    float scale;
-  };
-
-  Param param;
-
-  param.output_index = output_index;
-  param.input_index = input_index;
-  param.scale = _ctx.at(scale_index).asScalar<float>();
-
-  auto tensors = _tensor_builder;
-
-  returnStage([tensors, param](IExecutionBuilder &builder) {
-    auto output_alloc = tensors->at(param.output_index).get();
-    auto input_alloc = tensors->at(param.input_index).get();
-
-    auto fn = make_layer<::arm_compute::CLSoftmaxLayer>();
-
-    fn->configure(input_alloc->handle(), output_alloc->handle(), param.scale);
-
-    auto acl_fn = make_cl_function(std::move(fn));
-
-    builder.append(std::move(acl_fn));
-  });
-}
-
-void StageGenerator::visit(const model::operation::PermuteNode & /* node */)
-{
-  throw "Unsupported";
-}
-
-void StageGenerator::visit(const model::operation::AddNode &)
-{
-  VERBOSE(Add) << "generate CPU Add" << std::endl;
-
-  throw std::runtime_error("NYI");
-}
-
-} // namespace acl_cl
-} // namespace backend
-} // namespace neurun
diff --git a/runtimes/neurun/src/backend/acl_cl/StageGenerator.h b/runtimes/neurun/src/backend/acl_cl/StageGenerator.h
deleted file mode 100644
index 1dac2592b..000000000
--- a/runtimes/neurun/src/backend/acl_cl/StageGenerator.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_ACL_CL_STAGE_GENERATOR_H__
-#define __NEURUN_BACKEND_ACL_CL_STAGE_GENERATOR_H__
-
-#include "backend/interface/IStageGenerator.h"
-
-#include "model/operand/Set.h"
-#include "backend/acl_cl/TensorBuilder.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace acl_cl
-{
-
-class StageGenerator : public IStageGenerator
-{
-public:
-  StageGenerator(const neurun::model::operand::Set &ctx,
-                 const std::shared_ptr<TensorBuilder> &tensor_builder);
-
-  virtual std::shared_ptr<ITensorBuilder> tensor_builder() override { return _tensor_builder; }
-
-#define OP(InternalName, IsNnApi, NnApiName) \
-  virtual void visit(const model::operation::InternalName &) override;
-#include "model/operation/Op.lst"
-#undef OP
-
-private:
-  const neurun::model::operand::Set &_ctx;
-  std::shared_ptr<TensorBuilder> _tensor_builder;
-};
-
-} // namespace acl_cl
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_ACL_CL_STAGE_GENERATOR_H__
diff --git a/runtimes/neurun/src/backend/acl_cl/Swizzle.h b/runtimes/neurun/src/backend/acl_cl/Swizzle.h
deleted file mode 100644
index 838e57162..000000000
--- a/runtimes/neurun/src/backend/acl_cl/Swizzle.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_ACL_CL_SWIZZLE_H__
-#define __NEURUN_BACKEND_ACL_CL_SWIZZLE_H__
-
-#include <cassert>
-
-namespace neurun
-{
-namespace backend
-{
-namespace acl_cl
-{
-
-class ARMComputeAxis
-{
-public:
-  ARMComputeAxis() = default;
-
-public:
-  explicit ARMComputeAxis(uint32_t value) : _value{value}
-  {
-    // DO NOTHING
-  }
-
-public:
-  uint32_t value(void) const { return _value; }
-
-private:
-  uint32_t _value;
-};
-
-// Convert T/F Lite / NNAPI axis (based on ...NHWC) to ARMCompute axis (WHCN...)
-inline ARMComputeAxis ToARMComputeAxis(uint32_t rank, uint32_t axis)
-{
-  assert(rank > axis);
-  const ARMComputeAxis reversed{(rank - axis) - 1};
-
-  if (rank < 4)
-  {
-    return reversed;
-  }
-
-  // DEPTH
-  if (0 == reversed.value())
-  {
-    return ARMComputeAxis{2};
-  }
-  // WIDTH
-  if (1 == reversed.value())
-  {
-    return ARMComputeAxis{0};
-  }
-  // HEIGHT
-  if (2 == reversed.value())
-  {
-    return ARMComputeAxis{1};
-  }
-
-  // ELSE
-  return reversed;
-}
-
-template <typename T> inline T ReorderBits(T in, size_t numOfBits)
-{
-  assert(numOfBits > 0);
-  T out = 0;
-  for (int32_t i = numOfBits - 1; i >= 0; --i)
-  {
-    const uint32_t toShift = numOfBits - ToARMComputeAxis(numOfBits, i).value() - 1;
-    out += ((in & 1) << toShift);
-    in >>= 1;
-  }
-  return out;
-}
-
-} // namespace acl_cl
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_ACL_CL_SWIZZLE_H__
diff --git a/runtimes/neurun/src/backend/acl_cl/TensorBuilder.cc b/runtimes/neurun/src/backend/acl_cl/TensorBuilder.cc
deleted file mode 100644
index b5c038200..000000000
--- a/runtimes/neurun/src/backend/acl_cl/TensorBuilder.cc
+++ /dev/null
@@ -1,246 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "backend/acl_cl/TensorBuilder.h"
-
-#include <cassert>
-#include <stack>
-
-#include "operand/Object.h"
-#include "Convert.h"
-
-#include "util/logging.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace acl_cl
-{
-
-TensorBuilder::TensorBuilder()
-{
-  // DO NOTHING
-}
-
-void TensorBuilder::registerTensorInfo(const model::operand::Index &ind,
-                                       const compiler::TensorInfo &info)
-{
-  assert(_tensors.size() == 0);
-
-  _tensor_info_map.insert({ind, info});
-}
-
-void TensorBuilder::registerSubTensorInfo(const model::operand::Index &ind,
-                                          const compiler::SubTensorInfo &info)
-{
-  assert(_tensors.size() == 0);
-
-  _subtensor_info_map.insert({ind, info});
-}
-
-void TensorBuilder::notifyFirstUse(const model::operand::Index &)
-{
-  // DO NOTHING
-}
-
-void TensorBuilder::notifyLastUse(const model::operand::Index &)
-{
-  // DO NOTHING
-}
-
-void TensorBuilder::prepare(void)
-{
-  assert(_tensors.size() == 0);
-
-  // TODO Handle SubTensor(subsumption)
-  //      Currently this TensorBuilder does not have subsumption info yet
-  //      Allocated subtensor will be mapped to _subtensors instead of _tensors
-  assert(_subtensors.size() == 0);
-
-  for (auto &entry : _tensor_info_map)
-  {
-    auto ind = entry.first;
-    const auto &info = entry.second;
-    auto tensor = std::make_shared<::neurun::backend::acl_cl::operand::CLTensor>(info);
-    _tensors[ind] = tensor;
-  }
-
-  // To make subtensor, parent tensor must be made first
-  // For this condition, use stack
-  //  1) Push one subtensor index to stack (iterate subtensors)
-  //  2) If tensor at stack top is already made, pop and go to 4)
-  //  3) If tensor pushed at 1) is not made, check parent tensor
-  //    3-1) If parent tensor is already made, we can make child tensor
-  //         Make child tensor and pop, go to 4)
-  //    3-2) If parent tensor is not made, we can't make child tensor yet
-  //         Push parent tensor index to stack and return to 4)
-  //  4) If stack is empty, return to 1), else return to 2)
-  for (auto &entry : _subtensor_info_map)
-  {
-    model::operand::Index ind = entry.first;
-
-    std::stack<model::operand::Index> stack;
-    stack.push(ind);
-
-    while (!stack.empty())
-    {
-      const auto current = stack.top();
-      const auto &info = _subtensor_info_map.at(current);
-
-      // Already generated CLSubTensor
-      if (_subtensors.find(current) != _subtensors.end())
-      {
-        stack.pop();
-        continue;
-      }
-
-      auto parent = info.parent();
-      std::shared_ptr<::neurun::backend::acl_cl::operand::ICLTensor> parent_tensor;
-
-      if (_tensors.find(parent) != _tensors.end())
-      {
-        // Parent is allocated as tensor
-        parent_tensor = _tensors[parent];
-      }
-      else if (_subtensors.find(parent) != _subtensors.end())
-      {
-        // Parent is allocated as subtensor
-        parent_tensor = _subtensors[parent];
-      }
-      else
-      {
-        // Cannot find allocated parent tensor: allocate parent first
-        assert(_subtensor_info_map.find(parent) != _subtensor_info_map.end());
-        stack.push(parent);
-        continue;
-      }
-      assert(parent_tensor != nullptr);
-
-      // Child's type should be same with parent
-      assert(info.type().offset() == parent_tensor->info()->quantization_info().offset);
-      assert(info.type().scale() == parent_tensor->info()->quantization_info().scale);
-      assert(asDataType(info.type().type()) == parent_tensor->info()->data_type());
-      auto shape = asTensorShape(info.shape());
-
-      // Only support axis: 3 (channel)
-      ::arm_compute::Coordinates coordinates;
-      coordinates.set_num_dimensions(4);
-      assert(info.offset().h() == 0);
-      assert(info.offset().n() == 0);
-      assert(info.offset().w() == 0);
-      coordinates[2] = info.offset().c();
-      auto tensor = std::make_shared<::neurun::backend::acl_cl::operand::CLSubTensor>(
-          parent_tensor.get(), shape, coordinates, true);
-      _subtensors[current] = tensor;
-      stack.pop();
-    }
-  }
-}
-
-void TensorBuilder::allocate(void)
-{
-  assert(_tensor_info_map.size() == _tensors.size());
-
-  for (const auto &tensor_entry : _tensors)
-  {
-    auto tensor = tensor_entry.second;
-    tensor->allocator()->allocate();
-  }
-}
-
-std::shared_ptr<::neurun::backend::operand::ITensor>
-TensorBuilder::tensorAt(const model::operand::Index &ind)
-{
-  if (_tensors.find(ind) != _tensors.end())
-  {
-    return _tensors.at(ind);
-  }
-  else
-  {
-    return _subtensors.at(ind);
-  }
-}
-
-std::shared_ptr<backend::operand::IObject>
-TensorBuilder::wrapTensor(const model::operand::Index &ind)
-{
-  if (_objects.find(ind) != _objects.end())
-  {
-    return _objects.at(ind);
-  }
-  else
-  {
-    if (_tensors.find(ind) != _tensors.end())
-    {
-      return _objects[ind] = std::make_shared<operand::Object>(_tensors.at(ind));
-    }
-    else
-    {
-      return _objects[ind] = std::make_shared<operand::Object>(_subtensors.at(ind));
-    }
-  }
-}
-
-void TensorBuilder::iterate(const IterateFunction &fn)
-{
-  for (auto it : _tensors)
-  {
-    fn(it.first);
-  }
-  for (auto it : _subtensors)
-  {
-    fn(it.first);
-  }
-}
-
-std::shared_ptr<::neurun::backend::acl_cl::operand::ICLTensor>
-TensorBuilder::at(const ::neurun::model::operand::Index &ind)
-{
-  if (_tensors.find(ind) != _tensors.end())
-  {
-    return _tensors.at(ind);
-  }
-  else
-  {
-    return _subtensors.at(ind);
-  }
-}
-
-bool TensorBuilder::isSubTensorOf(const model::operand::Index &parent,
-                                  const model::operand::Index &child)
-{
-  if (_subtensor_info_map.find(child) == _subtensor_info_map.end())
-  {
-    return false;
-  }
-
-  if (_subtensors.find(child) == _subtensors.end())
-  {
-    return false;
-  }
-
-  if (_subtensor_info_map.at(child).parent() != parent)
-  {
-    return false;
-  }
-
-  return true;
-}
-
-} // namespace acl_cl
-} // namespace backend
-} // namespace neurun
diff --git a/runtimes/neurun/src/backend/acl_cl/TensorBuilder.h b/runtimes/neurun/src/backend/acl_cl/TensorBuilder.h
deleted file mode 100644
index 64d81721a..000000000
--- a/runtimes/neurun/src/backend/acl_cl/TensorBuilder.h
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_ACL_CL_TENSOR_BUILDER_H__
-#define __NEURUN_BACKEND_ACL_CL_TENSOR_BUILDER_H__
-
-#include "backend/interface/ITensorBuilder.h"
-#include "backend/acl_cl/operand/CLTensor.h"
-#include "backend/acl_cl/operand/CLSubTensor.h"
-#include "backend/acl_cl/operand/Object.h"
-
-#include <unordered_map>
-
-namespace neurun
-{
-namespace backend
-{
-namespace acl_cl
-{
-
-class TensorBuilder : public ITensorBuilder
-{
-public:
-  TensorBuilder();
-
-  /**
-   * @brief     Register tensor information to allocate on ACL-CL backend
-   * @param[in] ind   Operand index
-   * @param[in] info  Tensor information
-   */
-  virtual void registerTensorInfo(const model::operand::Index &ind,
-                                  const compiler::TensorInfo &info) override;
-  /**
-   * @brief     Register subtensor information to allocate on ACL-CL backend
-   * @param[in] ind   Operand index
-   * @param[in] info  Tensor information
-   */
-  virtual void registerSubTensorInfo(const model::operand::Index &ind,
-                                     const compiler::SubTensorInfo &info) override;
-
-  virtual void notifyFirstUse(const model::operand::Index &) override;
-  virtual void notifyLastUse(const model::operand::Index &) override;
-
-  virtual void prepare(void) override;
-  virtual void allocate(void) override;
-
-  virtual std::shared_ptr<::neurun::backend::operand::ITensor>
-  tensorAt(const model::operand::Index &ind) override;
-  virtual std::shared_ptr<backend::operand::IObject>
-  wrapTensor(const model::operand::Index &ind) override;
-  virtual void iterate(const IterateFunction &fn) override;
-
-  std::shared_ptr<::neurun::backend::acl_cl::operand::ICLTensor>
-  at(const ::neurun::model::operand::Index &ind);
-  /**
-   * @brief     Check child tensor is allocated as subtensor of parent tensor
-   * @param[in] parent  Index of parent
-   * @param[in] child   Index of child
-   * @return    @c true if child is allocated as subtensor of parent, otherwise @c false
-   */
-  bool isSubTensorOf(const model::operand::Index &parent, const model::operand::Index &child);
-
-private:
-  std::unordered_map<model::operand::Index, compiler::TensorInfo> _tensor_info_map;
-  std::unordered_map<model::operand::Index, compiler::SubTensorInfo> _subtensor_info_map;
-  std::unordered_map<model::operand::Index,
-                     std::shared_ptr<::neurun::backend::acl_cl::operand::CLTensor>>
-      _tensors;
-  std::unordered_map<model::operand::Index,
-                     std::shared_ptr<::neurun::backend::acl_cl::operand::CLSubTensor>>
-      _subtensors;
-  std::unordered_map<model::operand::Index,
-                     std::shared_ptr<::neurun::backend::acl_cl::operand::Object>>
-      _objects;
-};
-
-} // namespace acl_cl
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_ACL_CL_TENSOR_BUILDER_H__
diff --git a/runtimes/neurun/src/backend/acl_cl/operand/CLSubTensor.cc b/runtimes/neurun/src/backend/acl_cl/operand/CLSubTensor.cc
deleted file mode 100644
index f64b521dd..000000000
--- a/runtimes/neurun/src/backend/acl_cl/operand/CLSubTensor.cc
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "CLSubTensor.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace acl_cl
-{
-namespace operand
-{
-
-CLSubTensor::CLSubTensor(ICLTensor *parent, const arm_compute::TensorShape &tensor_shape,
-                         const arm_compute::Coordinates &coords, bool extend_parent)
-    : _cl_sub_tensor(std::make_shared<arm_compute::CLSubTensor>(parent->handle(), tensor_shape,
-                                                                coords, extend_parent))
-{
-  // DO NOTHING
-}
-
-arm_compute::CLSubTensor *CLSubTensor::handle() const { return _cl_sub_tensor.get(); }
-
-arm_compute::CLSubTensor *CLSubTensor::handle() { return _cl_sub_tensor.get(); }
-
-void CLSubTensor::map(bool blocking) { _cl_sub_tensor->map(blocking); }
-
-void CLSubTensor::unmap() { _cl_sub_tensor->unmap(); }
-
-uint8_t *CLSubTensor::doMap(cl::CommandQueue &q, bool blocking)
-{
-  assert(cl_buffer().get() == nullptr);
-  return static_cast<uint8_t *>(q.enqueueMapBuffer(cl_buffer(), blocking ? CL_TRUE : CL_FALSE,
-                                                   CL_MAP_READ | CL_MAP_WRITE, 0,
-                                                   info()->total_size()));
-}
-
-void CLSubTensor::doUnmap(cl::CommandQueue &q)
-{
-  assert(cl_buffer().get() == nullptr);
-  q.enqueueUnmapMemObject(cl_buffer(), buffer());
-}
-
-} // namespace operand
-} // namespace acl_cl
-} // namespace backend
-} // namespace neurun
diff --git a/runtimes/neurun/src/backend/acl_cl/operand/CLSubTensor.h b/runtimes/neurun/src/backend/acl_cl/operand/CLSubTensor.h
deleted file mode 100644
index cef78c196..000000000
--- a/runtimes/neurun/src/backend/acl_cl/operand/CLSubTensor.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_ACL_CL_OPERAND_CL_SUB_TENSOR_H__
-#define __NEURUN_BACKEND_ACL_CL_OPERAND_CL_SUB_TENSOR_H__
-
-#include <arm_compute/runtime/CL/CLSubTensor.h>
-#include "ICLTensor.h"
-#include "compiler/SubTensorInfo.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace acl_cl
-{
-namespace operand
-{
-
-class CLSubTensor : public ICLTensor
-{
-public:
-  CLSubTensor() = delete;
-
-public:
-  CLSubTensor(ICLTensor *parent, const arm_compute::TensorShape &tensor_shape,
-              const arm_compute::Coordinates &coords, bool extend_parent = false);
-
-public:
-  arm_compute::CLSubTensor *handle() const override;
-  arm_compute::CLSubTensor *handle() override;
-
-public:
-  void map(bool blocking = true);
-  void unmap();
-
-protected:
-  uint8_t *doMap(cl::CommandQueue &q, bool blocking) override;
-  virtual void doUnmap(cl::CommandQueue &q) override;
-
-private:
-  std::shared_ptr<arm_compute::CLSubTensor> _cl_sub_tensor;
-};
-
-} // namespace operand
-} // namespace acl_cl
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_ACL_CL_OPERAND_CL_SUB_TENSOR_H__
diff --git a/runtimes/neurun/src/backend/acl_cl/operand/CLTensor.cc b/runtimes/neurun/src/backend/acl_cl/operand/CLTensor.cc
deleted file mode 100644
index e7b718df3..000000000
--- a/runtimes/neurun/src/backend/acl_cl/operand/CLTensor.cc
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <arm_compute/runtime/CL/CLScheduler.h>
-#include <arm_compute/runtime/CL/CLMemory.h>
-#include <arm_compute/runtime/CL/CLMemoryRegion.h>
-#include "CLTensor.h"
-
-#include "backend/acl_cl/Convert.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace acl_cl
-{
-namespace operand
-{
-
-CLTensor::CLTensor(const compiler::TensorInfo &info)
-    : _cl_tensor(std::make_shared<arm_compute::CLTensor>())
-{
-  auto acl_cl_info = asTensorInfo(info.shape(), info.typeInfo());
-  allocator()->init(acl_cl_info);
-}
-
-arm_compute::CLTensor *CLTensor::handle() const { return _cl_tensor.get(); }
-
-arm_compute::CLTensor *CLTensor::handle() { return _cl_tensor.get(); }
-
-arm_compute::CLTensorAllocator *CLTensor::allocator() { return _cl_tensor->allocator(); }
-
-void CLTensor::map(bool blocking) { _cl_tensor->map(blocking); }
-
-void CLTensor::unmap() { _cl_tensor->unmap(); }
-
-uint8_t *CLTensor::doMap(cl::CommandQueue &q, bool blocking)
-{
-  return allocator()->map(q, blocking);
-}
-
-void CLTensor::doUnmap(cl::CommandQueue &q) { allocator()->unmap(q, buffer()); }
-
-// handle() is Deprecated on acl v18.11
-// TODO Update this
-#if 0
-void CLTensor::setBuffer(void *host_ptr)
-{
-  // create empty MemoryRegion: just context. Since flag isn't used here, no matter which flag to
-  // pass
-  auto memory = arm_compute::CLMemory(std::make_shared<arm_compute::CLBufferMemoryRegion>(
-      arm_compute::CLScheduler::get().context(), CL_MEM_USE_HOST_PTR | CL_MEM_READ_WRITE, 0));
-
-  // set buffer
-  auto mem = reinterpret_cast<cl::Buffer *>(memory.region()->handle());
-  *mem = cl::Buffer(arm_compute::CLScheduler::get().context(),
-                    CL_MEM_USE_HOST_PTR | CL_MEM_READ_WRITE, info()->total_size(), host_ptr);
-  // set correct buffer size
-  memory.region()->set_size(info()->total_size());
-  // import memory
-  allocator()->import_memory(memory);
-}
-#endif
-
-} // namespace operand
-} // namespace acl_cl
-} // namespace backend
-} // namespace neurun
diff --git a/runtimes/neurun/src/backend/acl_cl/operand/CLTensor.h b/runtimes/neurun/src/backend/acl_cl/operand/CLTensor.h
deleted file mode 100644
index 31c96e201..000000000
--- a/runtimes/neurun/src/backend/acl_cl/operand/CLTensor.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_ACL_CL_OPERAND_CL_TENSOR_H__
-#define __NEURUN_BACKEND_ACL_CL_OPERAND_CL_TENSOR_H__
-
-#include <arm_compute/core/TensorInfo.h>
-#include <arm_compute/runtime/CL/CLTensor.h>
-#include <arm_compute/runtime/CL/CLScheduler.h>
-#include "arm_compute/runtime/CL/CLTensorAllocator.h"
-#include "ICLTensor.h"
-#include "compiler/TensorInfo.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace acl_cl
-{
-namespace operand
-{
-
-class CLTensor : public ICLTensor
-{
-public:
-  CLTensor() = delete;
-
-public:
-  CLTensor(const compiler::TensorInfo &info);
-
-public:
-  arm_compute::CLTensor *handle() const override;
-  arm_compute::CLTensor *handle() override;
-
-public:
-  arm_compute::CLTensorAllocator *allocator();
-  void map(bool blocking = true);
-  void unmap();
-  void setBuffer(void *host_ptr);
-
-protected:
-  uint8_t *doMap(cl::CommandQueue &q, bool blocking) override;
-  void doUnmap(cl::CommandQueue &q) override;
-
-private:
-  std::shared_ptr<arm_compute::CLTensor> _cl_tensor;
-};
-
-} // namespace operand
-} // namespace acl_cl
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_ACL_CL_OPERAND_CL_TENSOR_H__
diff --git a/runtimes/neurun/src/backend/acl_cl/operand/ICLTensor.cc b/runtimes/neurun/src/backend/acl_cl/operand/ICLTensor.cc
deleted file mode 100644
index 23d723de4..000000000
--- a/runtimes/neurun/src/backend/acl_cl/operand/ICLTensor.cc
+++ /dev/null
@@ -1,48 +0,0 @@
-#include "ICLTensor.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace acl_cl
-{
-namespace operand
-{
-
-size_t ICLTensor::total_size() const { return info()->total_size(); }
-
-size_t ICLTensor::dimension(size_t index) const { return info()->dimension(index); }
-
-size_t ICLTensor::num_dimensions() const { return info()->num_dimensions(); }
-
-size_t ICLTensor::calcOffset(const neurun::util::feature::Coordinate4D &coords)
-{
-  int32_t N = coords.n();
-  int32_t C = coords.c();
-  int32_t H = coords.h();
-  int32_t W = coords.w();
-
-  ::arm_compute::Coordinates coordinates{W, H, C, N};
-  return info()->offset_element_in_bytes(coordinates);
-}
-
-arm_compute::DataType ICLTensor::data_type() const { return info()->data_type(); }
-
-uint8_t *ICLTensor::buffer() const { return handle()->buffer(); }
-
-const cl::Buffer &ICLTensor::cl_buffer() const { return handle()->cl_buffer(); }
-
-arm_compute::ITensorInfo *ICLTensor::info() const { return handle()->info(); }
-
-arm_compute::ITensorInfo *ICLTensor::info() { return handle()->info(); }
-
-void ICLTensor::map(cl::CommandQueue &q, bool blocking) { return handle()->map(q, blocking); }
-
-void ICLTensor::unmap(cl::CommandQueue &q) { return handle()->unmap(q); }
-
-void ICLTensor::clear(cl::CommandQueue &q) { return handle()->clear(q); }
-
-} // namespace operand
-} // namespace acl_cl
-} // namespace backend
-} // namespace neurun
diff --git a/runtimes/neurun/src/backend/acl_cl/operand/ICLTensor.h b/runtimes/neurun/src/backend/acl_cl/operand/ICLTensor.h
deleted file mode 100644
index 226fbf814..000000000
--- a/runtimes/neurun/src/backend/acl_cl/operand/ICLTensor.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_ACL_CL_OPERAND_I_CL_TENSOR_H__
-#define __NEURUN_BACKEND_ACL_CL_OPERAND_I_CL_TENSOR_H__
-
-#include <arm_compute/core/ITensorInfo.h>
-#include <arm_compute/core/CL/ICLTensor.h>
-#include "backend/interface/operand/ITensor.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace acl_cl
-{
-namespace operand
-{
-
-class ICLTensor : public ::neurun::backend::operand::ITensor
-{
-public:
-  ICLTensor() = default;
-  ICLTensor(const ICLTensor &) = delete;
-  ICLTensor &operator=(const ICLTensor &) = delete;
-  ICLTensor(ICLTensor &&) = default;
-  ICLTensor &operator=(ICLTensor &&) = default;
-  virtual ~ICLTensor() = default;
-
-public:
-  virtual arm_compute::ICLTensor *handle() = 0;
-  virtual arm_compute::ICLTensor *handle() const = 0;
-
-public:
-  uint8_t *buffer() const override;
-  size_t total_size() const override;
-  size_t dimension(size_t index) const override;
-  size_t num_dimensions() const override;
-  size_t calcOffset(const neurun::util::feature::Coordinate4D &coords) override;
-
-public:
-  arm_compute::DataType data_type() const;
-  const cl::Buffer &cl_buffer() const;
-  arm_compute::ITensorInfo *info() const;
-  arm_compute::ITensorInfo *info();
-  void map(cl::CommandQueue &q, bool blocking = true);
-  void unmap(cl::CommandQueue &q);
-  void clear(cl::CommandQueue &q);
-
-protected:
-  virtual uint8_t *doMap(cl::CommandQueue &q, bool blocking) = 0;
-  virtual void doUnmap(cl::CommandQueue &q) = 0;
-};
-
-} // namespace operand
-} // namespace acl_cl
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_ACL_CL_OPERAND_I_CL_TENSOR_H__
diff --git a/runtimes/neurun/src/backend/acl_cl/operand/Object.cc b/runtimes/neurun/src/backend/acl_cl/operand/Object.cc
deleted file mode 100644
index a84fa2366..000000000
--- a/runtimes/neurun/src/backend/acl_cl/operand/Object.cc
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Object.h"
-
-#include <arm_compute/runtime/CL/CLScheduler.h>
-
-namespace neurun
-{
-namespace backend
-{
-namespace acl_cl
-{
-namespace operand
-{
-
-void Object::access(
-    const std::function<void(::neurun::backend::operand::ITensor &tensor)> &fn) const
-{
-  auto &queue = ::arm_compute::CLScheduler::get().queue();
-
-  _tensor->map(queue);
-  fn(*_tensor);
-  _tensor->unmap(queue);
-}
-
-} // namespace operand
-} // namespace acl_cl
-} // namespace backend
-} // namespace neurun
diff --git a/runtimes/neurun/src/backend/acl_cl/operand/Object.h b/runtimes/neurun/src/backend/acl_cl/operand/Object.h
deleted file mode 100644
index 4ba22b269..000000000
--- a/runtimes/neurun/src/backend/acl_cl/operand/Object.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_ACL_CL_OPERAND_OBJECT_H__
-#define __NEURUN_BACKEND_ACL_CL_OPERAND_OBJECT_H__
-
-#include <memory>
-
-#include "backend/interface/operand/IObject.h"
-#include "backend/acl_cl/operand/ICLTensor.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace acl_cl
-{
-namespace operand
-{
-
-class Object : public backend::operand::IObject
-{
-public:
-  Object() = default;
-
-public:
-  Object(const std::shared_ptr<::neurun::backend::acl_cl::operand::ICLTensor> &tensor)
-      : _tensor{tensor}
-  {
-    // DO NOTHING
-  }
-
-public:
-  ::neurun::backend::acl_cl::operand::ICLTensor *ptr(void) const override { return _tensor.get(); }
-
-private:
-  std::shared_ptr<::neurun::backend::acl_cl::operand::ICLTensor> _tensor;
-
-public:
-  void
-  access(const std::function<void(::neurun::backend::operand::ITensor &tensor)> &fn) const override;
-};
-
-} // namespace operand
-} // namespace acl_cl
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_ACL_CL_OPERAND_OBJECT_H__
diff --git a/runtimes/neurun/src/backend/cpu/CMakeLists.txt b/runtimes/neurun/src/backend/cpu/CMakeLists.txt
deleted file mode 100644
index dc4406a65..000000000
--- a/runtimes/neurun/src/backend/cpu/CMakeLists.txt
+++ /dev/null
@@ -1,18 +0,0 @@
-file(GLOB_RECURSE SOURCES "*.cc")
-
-add_library(${LIB_NEURUN_BACKEND_CPU} SHARED ${SOURCES})
-
-target_include_directories(${LIB_NEURUN_BACKEND_CPU} PUBLIC ${NNFW_INCLUDE_DIR})
-target_include_directories(${LIB_NEURUN_BACKEND_CPU} PUBLIC ${NEURUN_INCLUDE_DIR})
-target_include_directories(${LIB_NEURUN_BACKEND_CPU} PUBLIC ${CMAKE_SOURCE_DIR}/externals/tensorflow)
-
-target_link_libraries(${LIB_NEURUN_BACKEND_CPU} tensorflow-lite)
-target_link_libraries(${LIB_NEURUN_BACKEND_CPU} nnfw_lib_misc)
-target_link_libraries(${LIB_NEURUN_BACKEND_CPU} nnfw_lib_cpp14)
-target_link_libraries(${LIB_NEURUN_BACKEND_CPU} ${LIB_NEURUN_KERNEL_CPU})
-target_link_libraries(${LIB_NEURUN_BACKEND_CPU} ${LIB_NEURUN})
-
-target_compile_options(${LIB_NEURUN_BACKEND_CPU} PRIVATE -Wall -Wextra -Werror)
-
-set_target_properties(${LIB_NEURUN_BACKEND_CPU} PROPERTIES OUTPUT_NAME backend_cpu)
-install(TARGETS ${LIB_NEURUN_BACKEND_CPU} DESTINATION lib/neurun)
diff --git a/runtimes/neurun/src/backend/cpu/Config.cc b/runtimes/neurun/src/backend/cpu/Config.cc
deleted file mode 100644
index 001ba9d02..000000000
--- a/runtimes/neurun/src/backend/cpu/Config.cc
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "backend/cpu/Config.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace cpu
-{
-
-void Config::initialize()
-{
-  // DO NOTHING
-}
-
-} // namespace cpu
-} // namespace backend
-} // namespace neurun
diff --git a/runtimes/neurun/src/backend/cpu/Config.h b/runtimes/neurun/src/backend/cpu/Config.h
deleted file mode 100644
index ad9ca0ee8..000000000
--- a/runtimes/neurun/src/backend/cpu/Config.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_CPU_CONFIG_H__
-#define __NEURUN_BACKEND_CPU_CONFIG_H__
-
-#include "backend/interface/IConfig.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace cpu
-{
-
-class Config : public IConfig
-{
-public:
-  Config()
-  {
-    // DO NOTHING
-  }
-
-  virtual std::string id() override { return "cpu"; }
-  virtual void initialize() override;
-  virtual graph::operand::Layout getOperandLayout() { return graph::operand::Layout::NHWC; }
-  virtual bool SupportSubTensorAlloc() override
-  {
-    // NOTE CPU allocator cannot support subtensor allocation yet
-    return false;
-  }
-};
-
-} // namespace cpu
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_CPU_CONFIG_H__
diff --git a/runtimes/neurun/src/backend/cpu/MemoryPlanner.cc b/runtimes/neurun/src/backend/cpu/MemoryPlanner.cc
deleted file mode 100644
index 2d0995b8a..000000000
--- a/runtimes/neurun/src/backend/cpu/MemoryPlanner.cc
+++ /dev/null
@@ -1,127 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "MemoryPlanner.h"
-#include "util/logging.h"
-#include <cassert>
-
-namespace neurun
-{
-namespace backend
-{
-namespace cpu
-{
-
-Allocator::Allocator(uint32_t capacity)
-{
-  assert(!_base && capacity != 0);
-
-  _base = new uint8_t[capacity];
-
-  VERBOSE(ALLOC) << "allocation capacity: " << capacity << std::endl;
-  VERBOSE(ALLOC) << "base pointer: " << static_cast<void *>(_base) << std::endl;
-}
-
-Allocator::~Allocator() { delete[] _base; }
-
-void BumpPlanner::claim(const model::operand::Index &ind, size_t size)
-{
-  assert(size != 0);
-
-  Block blk{_capacity, size};
-  _mem_plans[ind] = blk;
-  _capacity += size;
-
-  VERBOSE(BP_PLANNER) << "CLAIM(#" << ind.value() << "): " << blk.offset << ", " << blk.size
-                      << std::endl;
-}
-
-void BumpPlanner::release(const model::operand::Index &ind)
-{
-  VERBOSE(BP_PLANNER) << "RELEASE(#" << ind.value() << "): "
-                      << "NOTHING does" << std::endl;
-}
-
-// There are some assumptions for claiming memory(== making a reservation for memory).
-// 1. About _claim_table(std::map).
-//   - The table's data structure is std::map so that it always sorts
-//     value(model::operand::Index) by key(base_offset).
-//   - This claim() inserts key/value into _claim_table and the release() removes the key/value from
-//     _claim_table.
-//   - _claim_table shows the memory status at a certain point in time. Therefore,
-//     - If _claim_table has an offset and a certain size at a certain point in time,
-//       it means the place at the offset has been already claimed(== can't claim now. need to find
-//       someplace new).
-//     - If _claim_table doesn't have any element for an offset and a certain size at a certain
-//       point in time, it means the place at the offset can be claimed.
-// 2. In the loop for _claim_table, we can assume the current claim_base_offset value is bigger than
-//    the previous claim_base_offset.
-void FirstFitPlanner::claim(const model::operand::Index &ind, size_t size)
-{
-  assert(size != 0);
-
-  // Find the right position for claiming
-  uint32_t next_offset = 0;
-  for (auto &mem_claim : _claim_table)
-  {
-    auto claimed_base_offset = mem_claim.first;
-    auto claimed_size = _mem_plans[mem_claim.second].size;
-    if (next_offset + size <= claimed_base_offset)
-    {
-      break;
-    }
-    else
-    {
-      next_offset = claimed_base_offset + claimed_size;
-    }
-  }
-
-  // Now next_offset is set to the proper offset
-  _claim_table[next_offset] = ind;
-  _mem_plans[ind] = {next_offset, size};
-
-  VERBOSE(FF_PLANNER) << "claim(#" << ind.value() << "): [+" << next_offset << ", " << size << "sz]"
-                      << std::endl;
-
-  if (_capacity < next_offset + size)
-  {
-    _capacity = next_offset + size;
-  }
-}
-
-void FirstFitPlanner::release(const model::operand::Index &ind)
-{
-  for (auto it = _claim_table.cbegin(); it != _claim_table.cend(); ++it)
-  {
-    if (it->second == ind)
-    {
-      uint32_t offset = it->first;
-      uint32_t index = ind.value();
-      uint32_t size = _mem_plans[ind].size;
-
-      _claim_table.erase(it);
-
-      VERBOSE(FF_PLANNER) << "release(#" << index << "): [+" << offset << ", " << size << "sz]"
-                          << std::endl;
-      return;
-    }
-  }
-  assert(!"Cannot release for given index. It has been not claimed or released already.");
-}
-
-} // namespace cpu
-} // namespace backend
-} // namespace neurun
diff --git a/runtimes/neurun/src/backend/cpu/MemoryPlanner.h b/runtimes/neurun/src/backend/cpu/MemoryPlanner.h
deleted file mode 100644
index 4b2661223..000000000
--- a/runtimes/neurun/src/backend/cpu/MemoryPlanner.h
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file        MemoryPlanner.h
- * @brief       This file contains Memory Planning related classes
- */
-
-#ifndef __NEURUN_BACKEND_CPU_MEMORY_PLANNER_H__
-#define __NEURUN_BACKEND_CPU_MEMORY_PLANNER_H__
-
-#include <map>
-#include <unordered_map>
-
-#include "model/operand/Index.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace cpu
-{
-
-/**
- * @brief Structure to have memory offset and size
- */
-struct Block
-{
-  uint32_t offset;
-  uint32_t size;
-};
-
-/**
- * @brief Class to allocate memory
- */
-class Allocator
-{
-public:
-  Allocator(uint32_t capacity);
-  ~Allocator();
-  /**
-   * @brief Get memory base pointer
-   * @return base pointer
-   */
-  uint8_t *base() const { return _base; }
-
-private:
-  uint8_t *_base = nullptr;
-};
-
-/**
- * @brief Interface to plan memory
- */
-struct IMemoryPlanner
-{
-  using MemoryPlans = std::unordered_map<model::operand::Index, Block>;
-
-  /**
-   * @brief Claim memory for operand
-   * @param[in] index The operand index
-   * @param[in] size The size of the memory
-   */
-  virtual void claim(const model::operand::Index &, size_t) = 0;
-  /**
-   * @brief Release memory for operand
-   * @param[in] index The operand index
-   */
-  virtual void release(const model::operand::Index &) = 0;
-  /**
-   * @brief Get capacity for memory planning
-   * @return The value of capacity
-   */
-  virtual uint32_t capacity() = 0;
-  /**
-   * @brief Get MemoryPlans
-   * @return MemoryPlans
-   */
-  virtual MemoryPlans &memory_plans() = 0;
-};
-
-/**
- * @brief Class to plan memory by bump way
- */
-class BumpPlanner : public IMemoryPlanner
-{
-public:
-  /**
-   * @brief Claim memory for operand by bump way
-   * @param[in] index The operand index
-   * @param[in] size The size of the memory
-   */
-  virtual void claim(const model::operand::Index &, size_t) override;
-  /**
-   * @brief Release memory for operand by bump way
-   * @param[in] index The operand index
-   */
-  virtual void release(const model::operand::Index &) override;
-  /**
-   * @brief Get capacity for memory planning
-   * @return The value of capacity
-   */
-  virtual uint32_t capacity() override { return _capacity; }
-  /**
-   * @brief Get MemoryPlans
-   * @return MemoryPlans
-   */
-  virtual MemoryPlans &memory_plans() override { return _mem_plans; }
-
-private:
-  uint32_t _capacity = 0;
-  MemoryPlans _mem_plans;
-};
-
-/**
- * @brief Class to plan memory by firstfit way
- */
-class FirstFitPlanner : public IMemoryPlanner
-{
-public:
-  /**
-   * @brief Claim memory for operand by firstfit way
-   * @param[in] index The operand index
-   * @param[in] size The size of the memory
-   */
-  virtual void claim(const model::operand::Index &, size_t) override;
-  /**
-   * @brief Release memory for operand by firstfit way
-   * @param[in] index The operand index
-   */
-  virtual void release(const model::operand::Index &) override;
-  /**
-   * @brief Get capacity for memory planning
-   * @return The value of capacity
-   */
-  virtual uint32_t capacity() override { return _capacity; }
-  /**
-   * @brief Get MemoryPlans
-   * @return MemoryPlans
-   */
-  virtual MemoryPlans &memory_plans() override { return _mem_plans; }
-
-private:
-  uint32_t _capacity = 0;
-  MemoryPlans _mem_plans;
-  // Use std::map because claim() assumes that _claim_table is sorted by uint32_t(base_offset)
-  std::map<uint32_t, model::operand::Index> _claim_table;
-};
-
-} // namespace cpu
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_CPU_MEMORY_PLANNER_H__
diff --git a/runtimes/neurun/src/backend/cpu/PluginClassesAllocator.cc b/runtimes/neurun/src/backend/cpu/PluginClassesAllocator.cc
deleted file mode 100644
index 26d4d8858..000000000
--- a/runtimes/neurun/src/backend/cpu/PluginClassesAllocator.cc
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <memory>
-#include "TensorBuilder.h"
-#include "StageGenerator.h"
-#include "Config.h"
-#include "util/logging.h"
-
-extern "C" {
-neurun::backend::cpu::TensorBuilder *allocate_TensorBuilder()
-{
-  VERBOSE(allocate_TensorBuilder) << "loaded from CPU\n";
-  return new neurun::backend::cpu::TensorBuilder;
-}
-
-neurun::backend::cpu::StageGenerator *
-allocate_StageGenerator(const neurun::model::operand::Set &operand_ctx,
-                        const std::shared_ptr<neurun::backend::cpu::TensorBuilder> &tensor_builder)
-{
-  VERBOSE(allocate_StageGenerator) << "loaded from CPU\n";
-  return new neurun::backend::cpu::StageGenerator(operand_ctx, tensor_builder);
-}
-
-neurun::backend::cpu::Config *allocate_Config()
-{
-  VERBOSE(allocate_Config) << "loaded from CPU\n";
-  return new neurun::backend::cpu::Config;
-}
-}
diff --git a/runtimes/neurun/src/backend/cpu/StageGenerator.cc b/runtimes/neurun/src/backend/cpu/StageGenerator.cc
deleted file mode 100644
index c53b320a4..000000000
--- a/runtimes/neurun/src/backend/cpu/StageGenerator.cc
+++ /dev/null
@@ -1,547 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "StageGenerator.h"
-
-#include <stdexcept>
-
-#include "cpp14/memory.h"
-#include "util/Padding.h"
-#include "kernel/cpu/OperationUtils.h"
-#include "kernel/cpu/ConvolutionLayer.h"
-#include "kernel/cpu/AvgPoolLayer.h"
-#include "kernel/cpu/MaxPoolLayer.h"
-#include "kernel/cpu/ConcatLayer.h"
-#include "kernel/cpu/FullyConnectedLayer.h"
-#include "kernel/cpu/ReshapeLayer.h"
-#include "kernel/cpu/SoftMaxLayer.h"
-#include "kernel/cpu/PermuteLayer.h"
-#include "backend/BackendManager.h"
-#include "backend/interface/IConfig.h"
-
-#include "util/logging.h"
-
-#include "util/Utils.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace cpu
-{
-
-StageGenerator::StageGenerator(const neurun::model::operand::Set &operand_ctx,
-                               const std::shared_ptr<TensorBuilder> &tensor_builder)
-    : _ctx(operand_ctx), _tensor_builder(tensor_builder)
-{
-  // DO NOTHING
-}
-
-void StageGenerator::visit(const model::operation::Conv2DNode &node)
-{
-  using model::operation::Conv2DNode;
-
-  const auto ofm_index{node.getOutputs().at(0)};
-  const auto ifm_index{node.getInputs().at(Conv2DNode::Input::INPUT)};
-  const auto ker_index{node.getInputs().at(Conv2DNode::Input::KERNEL)};
-  const auto bias_index{node.getInputs().at(Conv2DNode::Input::BIAS)};
-
-  const auto vstride_index{node.param().vstride_index};
-  const auto hstride_index{node.param().hstride_index};
-
-  const auto padding_index{node.param().padding_index};
-  const auto activation_index{node.param().activation_index};
-
-  const PaddingCode padding_type =
-      static_cast<PaddingCode>(_ctx.at(padding_index).asScalar<int32_t>());
-
-  assert((ANEURALNETWORKS_PADDING_SAME == padding_type) ||
-         (ANEURALNETWORKS_PADDING_VALID == padding_type));
-
-  util::Stride stride;
-
-  stride.vertical = _ctx.at(vstride_index).asScalar<int32_t>();
-  stride.horizontal = _ctx.at(hstride_index).asScalar<int32_t>();
-
-  // Construct operation parameters
-  struct Param
-  {
-    model::operand::Index ofm_index;
-    model::operand::Index ifm_index;
-    model::operand::Index ker_index;
-    model::operand::Index bias_index;
-
-    ::neurun::kernel::cpu::Shape ofm_shape;
-    ::neurun::kernel::cpu::Shape ifm_shape;
-    ::neurun::kernel::cpu::Shape ker_shape;
-    ::neurun::kernel::cpu::Shape bias_shape;
-
-    util::Padding padding;
-    util::Stride stride;
-
-    FuseCode activation;
-  };
-
-  Param param;
-
-  param.ofm_index = ofm_index;
-  param.ifm_index = ifm_index;
-  param.ker_index = ker_index;
-  param.bias_index = bias_index;
-
-  param.ofm_shape = ::neurun::kernel::cpu::getShape(_ctx.at(ofm_index));
-  param.ifm_shape = ::neurun::kernel::cpu::getShape(_ctx.at(ifm_index));
-  param.ker_shape = ::neurun::kernel::cpu::getShape(_ctx.at(ker_index));
-  param.bias_shape = ::neurun::kernel::cpu::getShape(_ctx.at(bias_index));
-
-  param.stride = stride;
-  param.padding = (padding_type == ANEURALNETWORKS_PADDING_SAME)
-                      ? util::same_padding(_ctx.at(ifm_index).shape().asFeature(),
-                                           _ctx.at(ofm_index).shape().asFeature(), stride,
-                                           _ctx.at(ker_index).shape().asKernel().W,
-                                           _ctx.at(ker_index).shape().asKernel().H)
-                      : util::valid_padding();
-
-  param.activation = static_cast<FuseCode>(_ctx.at(activation_index).asScalar<int32_t>());
-
-  auto tensors = _tensor_builder;
-
-  returnStage([tensors, param](IExecutionBuilder &builder) {
-    auto ofm_alloc = tensors->at(param.ofm_index);
-    auto ifm_alloc = tensors->at(param.ifm_index);
-    auto ker_alloc = tensors->at(param.ker_index);
-    auto bias_alloc = tensors->at(param.bias_index);
-
-    std::unique_ptr<::neurun::kernel::cpu::ConvolutionLayer> fn{
-        new ::neurun::kernel::cpu::ConvolutionLayer};
-
-    fn->configure(ifm_alloc->buffer(), param.ifm_shape, ker_alloc->buffer(), param.ker_shape,
-                  bias_alloc->buffer(), param.bias_shape, param.padding.left, param.padding.right,
-                  param.padding.top, param.padding.bottom, param.stride.horizontal,
-                  param.stride.vertical, param.activation, ofm_alloc->buffer(), param.ofm_shape);
-
-    builder.append(std::move(fn));
-  });
-}
-
-void StageGenerator::visit(const model::operation::MaxPool2DNode &node)
-{
-  const auto ofm_index{node.getOutputs().at(0)};
-  const auto ifm_index{node.getInputs().at(model::operation::MaxPool2DNode::Input::INPUT)};
-
-  const auto kh_index{node.param().kh_index};
-  const auto kw_index{node.param().kw_index};
-
-  const auto vstride_index{node.param().vstride_index};
-  const auto hstride_index{node.param().hstride_index};
-
-  const auto padding_index{node.param().padding_index};
-  const auto activation_index{node.param().activation_index};
-
-  const int32_t kh = _ctx.at(kh_index).asScalar<int32_t>();
-  const int32_t kw = _ctx.at(kw_index).asScalar<int32_t>();
-
-  const int32_t vstride = _ctx.at(vstride_index).asScalar<int32_t>();
-  const int32_t hstride = _ctx.at(hstride_index).asScalar<int32_t>();
-
-  const PaddingCode padding_type =
-      static_cast<PaddingCode>(_ctx.at(padding_index).asScalar<int32_t>());
-
-  // Construct operation parameters
-  struct Param
-  {
-    model::operand::Index ofm_index;
-    model::operand::Index ifm_index;
-
-    uint32_t kw;
-    uint32_t kh;
-
-    ::neurun::kernel::cpu::Shape ofm_shape;
-    ::neurun::kernel::cpu::Shape ifm_shape;
-
-    util::Padding padding;
-    util::Stride stride;
-
-    FuseCode activation;
-  };
-
-  Param param;
-
-  param.ofm_index = ofm_index;
-  param.ifm_index = ifm_index;
-
-  param.kh = kh;
-  param.kw = kw;
-
-  param.ofm_shape = ::neurun::kernel::cpu::getShape(_ctx.at(ofm_index));
-  param.ifm_shape = ::neurun::kernel::cpu::getShape(_ctx.at(ifm_index));
-
-  param.stride.vertical = vstride;
-  param.stride.horizontal = hstride;
-
-  param.padding =
-      (padding_type == ANEURALNETWORKS_PADDING_SAME)
-          ? util::same_padding(_ctx.at(ifm_index).shape().asFeature(),
-                               _ctx.at(ofm_index).shape().asFeature(), param.stride, kw, kh)
-          : util::valid_padding();
-
-  param.activation = static_cast<FuseCode>(_ctx.at(activation_index).asScalar<int32_t>());
-
-  auto tensors = _tensor_builder;
-
-  returnStage([tensors, param](IExecutionBuilder &builder) {
-    auto ofm_alloc = tensors->at(param.ofm_index).get();
-    auto ifm_alloc = tensors->at(param.ifm_index).get();
-
-    std::unique_ptr<::neurun::kernel::cpu::MaxPoolLayer> fn{
-        new ::neurun::kernel::cpu::MaxPoolLayer};
-
-    fn->configure(ifm_alloc->buffer(), param.ifm_shape, param.padding.left, param.padding.right,
-                  param.padding.top, param.padding.bottom, param.stride.horizontal,
-                  param.stride.vertical, param.kw, param.kh, param.activation, ofm_alloc->buffer(),
-                  param.ofm_shape);
-
-    builder.append(std::move(fn));
-  });
-}
-
-void StageGenerator::visit(const model::operation::AvgPool2DNode &node)
-{
-  const auto ofm_index{node.getOutputs().at(0)};
-  const auto ifm_index{node.getInputs().at(model::operation::AvgPool2DNode::Input::INPUT)};
-
-  const auto kh_index{node.param().kh_index};
-  const auto kw_index{node.param().kw_index};
-
-  const auto vstride_index{node.param().vstride_index};
-  const auto hstride_index{node.param().hstride_index};
-
-  const auto padding_index{node.param().padding_index};
-  const auto activation_index{node.param().activation_index};
-
-  const int32_t kh = _ctx.at(kh_index).asScalar<int32_t>();
-  const int32_t kw = _ctx.at(kw_index).asScalar<int32_t>();
-
-  const int32_t vstride = _ctx.at(vstride_index).asScalar<int32_t>();
-  const int32_t hstride = _ctx.at(hstride_index).asScalar<int32_t>();
-
-  const PaddingCode padding_type =
-      static_cast<PaddingCode>(_ctx.at(padding_index).asScalar<int32_t>());
-
-  assert((ANEURALNETWORKS_PADDING_SAME == padding_type) ||
-         (ANEURALNETWORKS_PADDING_VALID == padding_type));
-
-  // Construct operation parameters
-  struct Param
-  {
-    model::operand::Index ofm_index;
-    model::operand::Index ifm_index;
-
-    uint32_t kw;
-    uint32_t kh;
-
-    ::neurun::kernel::cpu::Shape ofm_shape;
-    ::neurun::kernel::cpu::Shape ifm_shape;
-
-    util::Padding padding;
-    util::Stride stride;
-
-    FuseCode activation;
-  };
-
-  Param param;
-
-  param.ofm_index = ofm_index;
-  param.ifm_index = ifm_index;
-
-  param.kh = kh;
-  param.kw = kw;
-
-  param.ofm_shape = ::neurun::kernel::cpu::getShape(_ctx.at(ofm_index));
-  param.ifm_shape = ::neurun::kernel::cpu::getShape(_ctx.at(ifm_index));
-
-  param.stride.vertical = vstride;
-  param.stride.horizontal = hstride;
-
-  param.padding =
-      (padding_type == ANEURALNETWORKS_PADDING_SAME)
-          ? util::same_padding(_ctx.at(ifm_index).shape().asFeature(),
-                               _ctx.at(ofm_index).shape().asFeature(), param.stride, kw, kh)
-          : util::valid_padding();
-
-  param.activation = static_cast<FuseCode>(_ctx.at(activation_index).asScalar<int32_t>());
-
-  auto tensors = _tensor_builder;
-
-  returnStage([tensors, param](IExecutionBuilder &builder) {
-    auto ofm_alloc = tensors->at(param.ofm_index).get();
-    auto ifm_alloc = tensors->at(param.ifm_index).get();
-
-    std::unique_ptr<::neurun::kernel::cpu::AvgPoolLayer> fn{
-        new ::neurun::kernel::cpu::AvgPoolLayer};
-
-    fn->configure(ifm_alloc->buffer(), param.ifm_shape, param.padding.left, param.padding.right,
-                  param.padding.top, param.padding.bottom, param.stride.horizontal,
-                  param.stride.vertical, param.kw, param.kh, param.activation, ofm_alloc->buffer(),
-                  param.ofm_shape);
-
-    builder.append(std::move(fn));
-  });
-}
-
-void StageGenerator::visit(const model::operation::ConcatNode &node)
-{
-  const auto ofm_index{node.getOutputs().at(0)};
-  const auto axis_index{node.param().axis_index};
-
-  struct Param
-  {
-    model::operand::Index output_index;
-    std::vector<model::operand::Index> input_indexes;
-
-    int32_t axis;
-
-    ::neurun::kernel::cpu::Shape ofm_shape;
-    std::vector<::neurun::kernel::cpu::Shape> ifm_shapes;
-  };
-
-  Param param;
-
-  param.output_index = ofm_index;
-  for (const auto &e : node.getInputs())
-  {
-    param.input_indexes.emplace_back(e);
-  }
-  param.axis = _ctx.at(axis_index).asScalar<int32_t>();
-
-  param.ofm_shape = ::neurun::kernel::cpu::getShape(_ctx.at(ofm_index));
-
-  for (auto e : node.getInputs())
-  {
-    param.ifm_shapes.emplace_back(::neurun::kernel::cpu::getShape(_ctx.at(e)));
-  }
-
-  auto tensors = _tensor_builder;
-
-  returnStage([tensors, param](IExecutionBuilder &builder) {
-    auto output_alloc = tensors->at(param.output_index).get();
-
-    std::vector<const uint8_t *> input_buffers;
-    for (auto ifm_ind : param.input_indexes)
-    {
-      input_buffers.emplace_back(tensors->at(ifm_ind).get()->buffer());
-    }
-
-    std::unique_ptr<::neurun::kernel::cpu::ConcatLayer> fn{new ::neurun::kernel::cpu::ConcatLayer};
-
-    fn->configure(input_buffers, param.ifm_shapes, param.axis, output_alloc->buffer(),
-                  param.ofm_shape);
-
-    builder.append(std::move(fn));
-  });
-}
-
-void StageGenerator::visit(const model::operation::FullyConnectedNode &node)
-{
-  using model::operation::FullyConnectedNode;
-
-  const auto output_index{node.getOutputs().at(0)};
-  const auto input_index{node.getInputs().at(FullyConnectedNode::Input::INPUT)};
-  const auto weight_index{node.getInputs().at(FullyConnectedNode::Input::WEIGHT)};
-  const auto bias_index{node.getInputs().at(FullyConnectedNode::Input::BIAS)};
-  const auto activation_index{node.param().activation_index};
-
-  // Construct operation parameters
-  struct Param
-  {
-    model::operand::Index output_index;
-    model::operand::Index input_index;
-    model::operand::Index weight_index;
-    model::operand::Index bias_index;
-
-    ::neurun::kernel::cpu::Shape ofm_shape;
-    ::neurun::kernel::cpu::Shape ifm_shape;
-    ::neurun::kernel::cpu::Shape weight_shape;
-    ::neurun::kernel::cpu::Shape bias_shape;
-
-    FuseCode activation;
-  };
-
-  Param param;
-
-  param.output_index = output_index;
-  param.input_index = input_index;
-  param.weight_index = weight_index;
-  param.bias_index = bias_index;
-
-  param.ofm_shape = ::neurun::kernel::cpu::getShape(_ctx.at(output_index));
-  param.ifm_shape = ::neurun::kernel::cpu::getShape(_ctx.at(input_index));
-  param.weight_shape = ::neurun::kernel::cpu::getShape(_ctx.at(weight_index));
-  param.bias_shape = ::neurun::kernel::cpu::getShape(_ctx.at(bias_index));
-
-  param.activation = static_cast<FuseCode>(_ctx.at(activation_index).asScalar<int32_t>());
-
-  auto tensors = _tensor_builder;
-
-  returnStage([tensors, param](IExecutionBuilder &builder) {
-    auto output_alloc = tensors->at(param.output_index).get();
-    auto input_alloc = tensors->at(param.input_index).get();
-    auto weight_alloc = tensors->at(param.weight_index).get();
-    auto bias_alloc = tensors->at(param.bias_index).get();
-
-    std::unique_ptr<::neurun::kernel::cpu::FullyConnectedLayer> fn{
-        new ::neurun::kernel::cpu::FullyConnectedLayer};
-
-    fn->configure(input_alloc->buffer(), param.ifm_shape, weight_alloc->buffer(),
-                  param.weight_shape, bias_alloc->buffer(), param.bias_shape, param.activation,
-                  output_alloc->buffer(), param.ofm_shape);
-
-    builder.append(std::move(fn));
-  });
-}
-
-void StageGenerator::visit(const model::operation::ReshapeNode &node)
-{
-  const auto output_index{node.getOutputs().at(0)};
-  const auto input_index{node.getInputs().at(model::operation::ReshapeNode::Input::INPUT)};
-
-  struct Param
-  {
-    model::operand::Index output_index;
-    model::operand::Index input_index;
-
-    ::neurun::kernel::cpu::Shape ofm_shape;
-    ::neurun::kernel::cpu::Shape ifm_shape;
-  };
-
-  Param param;
-
-  param.output_index = output_index;
-  param.input_index = input_index;
-
-  param.ofm_shape = ::neurun::kernel::cpu::getShape(_ctx.at(output_index));
-  param.ifm_shape = ::neurun::kernel::cpu::getShape(_ctx.at(input_index));
-
-  auto tensors = _tensor_builder;
-
-  returnStage([tensors, param](IExecutionBuilder &builder) {
-    auto output_alloc = tensors->at(param.output_index).get();
-    auto input_alloc = tensors->at(param.input_index).get();
-
-    std::unique_ptr<::neurun::kernel::cpu::ReshapeLayer> fn{
-        new ::neurun::kernel::cpu::ReshapeLayer};
-
-    fn->configure(input_alloc->buffer(), param.ifm_shape, output_alloc->buffer(), param.ofm_shape);
-
-    builder.append(std::move(fn));
-  });
-}
-
-void StageGenerator::visit(const model::operation::SoftmaxNode &node)
-{
-  const auto output_index{node.getOutputs().at(0)};
-  const auto input_index{node.getInputs().at(model::operation::SoftmaxNode::Input::INPUT)};
-  const auto scale_index{node.param().scale_index};
-
-  struct Param
-  {
-    model::operand::Index output_index;
-    model::operand::Index input_index;
-
-    ::neurun::kernel::cpu::Shape ofm_shape;
-    ::neurun::kernel::cpu::Shape ifm_shape;
-
-    float scale;
-  };
-
-  Param param;
-
-  param.output_index = output_index;
-  param.input_index = input_index;
-
-  param.ofm_shape = ::neurun::kernel::cpu::getShape(_ctx.at(output_index));
-  param.ifm_shape = ::neurun::kernel::cpu::getShape(_ctx.at(input_index));
-
-  param.scale = _ctx.at(scale_index).asScalar<float>();
-
-  auto tensors = _tensor_builder;
-
-  returnStage([tensors, param](IExecutionBuilder &builder) {
-    auto output_alloc = tensors->at(param.output_index).get();
-    auto input_alloc = tensors->at(param.input_index).get();
-
-    std::unique_ptr<::neurun::kernel::cpu::SoftMaxLayer> fn{
-        new ::neurun::kernel::cpu::SoftMaxLayer};
-
-    fn->configure(input_alloc->buffer(), param.ifm_shape, param.scale, output_alloc->buffer(),
-                  param.ofm_shape);
-
-    builder.append(std::move(fn));
-  });
-}
-
-void StageGenerator::visit(const model::operation::PermuteNode &node)
-{
-  const auto output_index{node.getOutputs().at(0)};
-  const auto input_index{node.getInputs().at(0)};
-
-  using PermuteType = model::operation::PermuteNode::Type;
-
-  struct Param
-  {
-    model::operand::Index output_index;
-    model::operand::Index input_index;
-
-    model::operand::Shape shape;
-
-    PermuteType type{PermuteType::COPY};
-  };
-
-  Param param;
-
-  param.output_index = output_index;
-  param.input_index = input_index;
-
-  param.shape = _ctx.at(output_index).shape();
-  param.type = node.param().type;
-
-  //  assert(param.shape == _ctx.at(input_index));
-
-  const auto &input_li = _ctx.at(input_index).lower_info();
-  const auto &output_li = _ctx.at(output_index).lower_info();
-  const auto input_backend = input_li->def_backends().getOnlyElement();
-  const auto output_backend = output_li->def_backends().getOnlyElement();
-
-  const auto input_tensors = input_backend->tensor_builder();
-  const auto output_tensors = output_backend->tensor_builder();
-
-  returnStage([input_tensors, output_tensors, param](IExecutionBuilder &builder) {
-    auto output_object = output_tensors->wrapTensor(param.output_index);
-    auto input_object = input_tensors->wrapTensor(param.input_index);
-
-    auto fn = nnfw::cpp14::make_unique<::neurun::kernel::cpu::PermuteLayer>();
-
-    fn->configure(input_object, output_object, param.shape, param.type);
-
-    builder.append(std::move(fn));
-  });
-}
-
-void StageGenerator::visit(const model::operation::AddNode &) { throw std::runtime_error("NYI"); }
-
-} // namespace neurun
-} // namespace backend
-} // namespace cpu
diff --git a/runtimes/neurun/src/backend/cpu/StageGenerator.h b/runtimes/neurun/src/backend/cpu/StageGenerator.h
deleted file mode 100644
index 6a0e387da..000000000
--- a/runtimes/neurun/src/backend/cpu/StageGenerator.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_CPU_STAGE_GENERATOR_H__
-#define __NEURUN_BACKEND_CPU_STAGE_GENERATOR_H__
-
-#include "backend/interface/IStageGenerator.h"
-
-#include "model/operand/Set.h"
-#include "backend/cpu/operand/Tensor.h"
-#include "TensorBuilder.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace cpu
-{
-
-class StageGenerator : public IStageGenerator
-{
-public:
-  StageGenerator(const neurun::model::operand::Set &ctx,
-                 const std::shared_ptr<TensorBuilder> &tensor_builder);
-
-  virtual std::shared_ptr<ITensorBuilder> tensor_builder() override { return _tensor_builder; }
-
-#define OP(InternalName, IsNnApi, NnApiName) \
-  virtual void visit(const model::operation::InternalName &) override;
-#include "model/operation/Op.lst"
-#undef OP
-
-private:
-  const neurun::model::operand::Set &_ctx;
-  std::shared_ptr<TensorBuilder> _tensor_builder;
-};
-
-} // namespace cpu
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_CPU_STAGE_GENERATOR_H__
diff --git a/runtimes/neurun/src/backend/cpu/TensorBuilder.cc b/runtimes/neurun/src/backend/cpu/TensorBuilder.cc
deleted file mode 100644
index 9c39b9c00..000000000
--- a/runtimes/neurun/src/backend/cpu/TensorBuilder.cc
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "TensorBuilder.h"
-
-#include <cassert>
-
-#include "operand/Object.h"
-#include "util/logging.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace cpu
-{
-
-TensorBuilder::TensorBuilder() : _mem_planner(std::make_shared<FirstFitPlanner>())
-{
-  // DO NOTHING
-}
-
-void TensorBuilder::registerTensorInfo(const model::operand::Index &ind,
-                                       const compiler::TensorInfo &info)
-{
-  _tensor_info_map.insert({ind, info});
-}
-
-void TensorBuilder::registerSubTensorInfo(const model::operand::Index &,
-                                          const compiler::SubTensorInfo &)
-{
-  // Not supported yet
-  assert(false);
-}
-
-void TensorBuilder::notifyFirstUse(const model::operand::Index &ind)
-{
-  assert(_tensor_info_map.find(ind) != _tensor_info_map.end());
-  const auto &info = _tensor_info_map.at(ind);
-
-  const auto size = info.total_size();
-  _mem_planner->claim(ind, size);
-}
-
-void TensorBuilder::notifyLastUse(const model::operand::Index &ind) { _mem_planner->release(ind); }
-
-void TensorBuilder::prepare(void)
-{
-  assert(_tensors.size() == 0);
-
-  _mem_alloc = std::make_shared<Allocator>(_mem_planner->capacity());
-  assert(_mem_alloc->base());
-
-  for (auto &mem_plan : _mem_planner->memory_plans())
-  {
-    auto ind = mem_plan.first;
-    auto mem_blk = mem_plan.second;
-    const auto &info = _tensor_info_map[ind];
-
-    uint8_t *buffer = _mem_alloc->base() + mem_blk.offset;
-    auto tensor = std::make_shared<operand::Tensor>(info);
-    tensor->setBuffer(buffer);
-    _tensors[ind] = tensor;
-
-    VERBOSE(CPU_TENSORBUILDER) << "TENSOR(#" << ind.value() << "): " << static_cast<void *>(buffer)
-                               << std::endl;
-
-    // If we do not make tensor here currently, stages would cause segment fault
-  }
-}
-
-void TensorBuilder::allocate(void)
-{
-  // NOTE For now nothing to do. Allocation is done in prepare stage, which is wrong
-}
-
-std::shared_ptr<::neurun::backend::operand::ITensor>
-TensorBuilder::tensorAt(const model::operand::Index &ind)
-{
-  return _tensors.at(ind);
-}
-
-std::shared_ptr<backend::operand::IObject>
-TensorBuilder::wrapTensor(const model::operand::Index &ind)
-{
-  if (_objects.find(ind) != _objects.end())
-  {
-    return _objects.at(ind);
-  }
-  else
-  {
-    return _objects[ind] = std::make_shared<operand::Object>(_tensors.at(ind));
-  }
-}
-
-void TensorBuilder::iterate(const IterateFunction &fn)
-{
-  for (auto it : _tensors)
-  {
-    fn(it.first);
-  }
-}
-
-std::shared_ptr<operand::Tensor> TensorBuilder::at(const ::neurun::model::operand::Index &ind)
-{
-  return _tensors.at(ind);
-}
-
-} // namespace cpu
-} // namespace backend
-} // namespace neurun
diff --git a/runtimes/neurun/src/backend/cpu/TensorBuilder.h b/runtimes/neurun/src/backend/cpu/TensorBuilder.h
deleted file mode 100644
index 2715d57f0..000000000
--- a/runtimes/neurun/src/backend/cpu/TensorBuilder.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_CPU_TENSOR_BUILDER_H__
-#define __NEURUN_BACKEND_CPU_TENSOR_BUILDER_H__
-
-#include <unordered_map>
-
-#include "backend/interface/ITensorBuilder.h"
-#include "backend/cpu/operand/Tensor.h"
-#include "backend/cpu/operand/Object.h"
-#include "model/operand/Index.h"
-#include "MemoryPlanner.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace cpu
-{
-
-class TensorBuilder : public ITensorBuilder
-{
-public:
-  TensorBuilder();
-
-  /**
-   * @brief     Register tensor information to allocate on CPU backend
-   * @param[in] ind   Operand index
-   * @param[in] info  Tensor information
-   */
-  virtual void registerTensorInfo(const model::operand::Index &ind,
-                                  const compiler::TensorInfo &info) override;
-  /**
-   * @brief     Register subtensor information to allocate on CPU backend
-   * @param[in] ind   Operand index
-   * @param[in] info  Tensor information
-   */
-  virtual void registerSubTensorInfo(const model::operand::Index &ind,
-                                     const compiler::SubTensorInfo &info) override;
-
-  virtual void notifyFirstUse(const model::operand::Index &) override;
-  virtual void notifyLastUse(const model::operand::Index &) override;
-
-  virtual void prepare(void) override;
-  virtual void allocate(void) override;
-
-  virtual std::shared_ptr<::neurun::backend::operand::ITensor>
-  tensorAt(const model::operand::Index &ind) override;
-  virtual std::shared_ptr<backend::operand::IObject>
-  wrapTensor(const model::operand::Index &ind) override;
-  virtual void iterate(const IterateFunction &fn) override;
-
-  std::shared_ptr<operand::Tensor> at(const ::neurun::model::operand::Index &ind);
-
-private:
-  std::unordered_map<model::operand::Index, compiler::TensorInfo> _tensor_info_map;
-  std::unordered_map<model::operand::Index, std::shared_ptr<operand::Tensor>> _tensors;
-  std::unordered_map<model::operand::Index, std::shared_ptr<operand::Object>> _objects;
-  std::unordered_map<model::operand::Index, Block> _tensor_mem_map;
-  std::shared_ptr<IMemoryPlanner> _mem_planner;
-  std::shared_ptr<Allocator> _mem_alloc;
-};
-
-} // namespace cpu
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_CPU_TENSOR_BUILDER_H__
diff --git a/runtimes/neurun/src/backend/cpu/operand/Object.cc b/runtimes/neurun/src/backend/cpu/operand/Object.cc
deleted file mode 100644
index 011747a8c..000000000
--- a/runtimes/neurun/src/backend/cpu/operand/Object.cc
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Object.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace cpu
-{
-namespace operand
-{
-
-void Object::access(
-    const std::function<void(::neurun::backend::operand::ITensor &tensor)> &fn) const
-{
-  fn(*_tensor);
-}
-
-} // namespace operand
-} // namespace cpu
-} // namespace backend
-} // namespace neurun
diff --git a/runtimes/neurun/src/backend/cpu/operand/Object.h b/runtimes/neurun/src/backend/cpu/operand/Object.h
deleted file mode 100644
index 5ef7c4fbf..000000000
--- a/runtimes/neurun/src/backend/cpu/operand/Object.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_CPU_OPERAND_OBJECT_H__
-#define __NEURUN_BACKEND_CPU_OPERAND_OBJECT_H__
-
-#include <memory>
-#include "backend/interface/operand/ITensor.h"
-
-#include "backend/interface/operand/IObject.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace cpu
-{
-namespace operand
-{
-
-class Object : public backend::operand::IObject
-{
-public:
-  Object() = default;
-
-public:
-  Object(const std::shared_ptr<::neurun::backend::operand::ITensor> &tensor) : _tensor{tensor}
-  {
-    // DO NOTHING
-  }
-
-public:
-  ::neurun::backend::operand::ITensor *ptr(void) const override { return _tensor.get(); }
-
-private:
-  std::shared_ptr<::neurun::backend::operand::ITensor> _tensor;
-
-public:
-  void
-  access(const std::function<void(::neurun::backend::operand::ITensor &tensor)> &fn) const override;
-};
-
-} // namespace operand
-} // namespace cpu
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_CPU_OPERAND_OBJECT_H__
diff --git a/runtimes/neurun/src/backend/cpu/operand/Tensor.cc b/runtimes/neurun/src/backend/cpu/operand/Tensor.cc
deleted file mode 100644
index a5251292e..000000000
--- a/runtimes/neurun/src/backend/cpu/operand/Tensor.cc
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Tensor.h"
-
-#define NO_USE(a) (void)(a)
-
-namespace neurun
-{
-namespace backend
-{
-namespace cpu
-{
-namespace operand
-{
-
-size_t Tensor::calcOffset(const neurun::util::feature::Coordinate4D &coords)
-{
-  NO_USE(coords);
-  throw std::runtime_error("offset_element_in_bytes is not supported for cpu::Tensor now.");
-}
-
-} // namespace operand
-} // namespace cpu
-} // namespace backend
-} // namespace neurun
diff --git a/runtimes/neurun/src/backend/cpu/operand/Tensor.h b/runtimes/neurun/src/backend/cpu/operand/Tensor.h
deleted file mode 100644
index 7500f890f..000000000
--- a/runtimes/neurun/src/backend/cpu/operand/Tensor.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_CPU_OPERAND_TENSOR_H__
-#define __NEURUN_BACKEND_CPU_OPERAND_TENSOR_H__
-
-#include "backend/interface/operand/ITensor.h"
-#include "compiler/TensorInfo.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace cpu
-{
-namespace operand
-{
-
-class Tensor : public ::neurun::backend::operand::ITensor
-{
-public:
-  Tensor() = delete;
-
-public:
-  Tensor(const compiler::TensorInfo &info) : _info(info)
-  {
-    // DO NOTHING
-  }
-
-public:
-  void setBuffer(uint8_t *buffer) { _buffer = buffer; }
-  ::neurun::model::operand::DataType data_type() const { return _info.typeInfo().type(); }
-
-public:
-  uint8_t *buffer() const override { return _buffer; }
-  /**
-   * @brief Get dimension by index
-   *
-   * @param index Index to get diemension
-   * @return size_t Dimension at index
-   * @note N : dimension(0)
-   *       H : dimension(1)
-   *       W : dimension(2)
-   *       C : dimension(3)
-   */
-  size_t dimension(size_t index) const override { return _info.shape().dim(index); }
-  size_t num_dimensions() const override { return _info.shape().dims().size(); }
-  size_t total_size() const override { return _info.total_size(); }
-  size_t calcOffset(const neurun::util::feature::Coordinate4D &coords) override;
-
-private:
-  compiler::TensorInfo _info;
-  uint8_t *_buffer = nullptr;
-};
-
-} // namespace operand
-} // namespace cpu
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_CPU_OPERAND_TENSOR_H__
diff --git a/runtimes/neurun/src/backend/interface/IConfig.h b/runtimes/neurun/src/backend/interface/IConfig.h
deleted file mode 100644
index 82789d0ff..000000000
--- a/runtimes/neurun/src/backend/interface/IConfig.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_ICONFIG_H__
-#define __NEURUN_BACKEND_ICONFIG_H__
-
-#include <string>
-
-#include "graph/operand/Layout.h"
-
-namespace neurun
-{
-namespace backend
-{
-
-struct IConfig
-{
-  virtual ~IConfig() = default;
-
-  virtual std::string id() = 0;
-  virtual void initialize() = 0;
-  // NOTE Assume backend has only one type of operand layout
-  virtual graph::operand::Layout getOperandLayout() = 0;
-  // Support subtensor allocation
-  virtual bool SupportSubTensorAlloc() = 0;
-};
-
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_ICONFIG_H__
diff --git a/runtimes/neurun/src/backend/interface/IStageGenerator.h b/runtimes/neurun/src/backend/interface/IStageGenerator.h
deleted file mode 100644
index 878a50e3f..000000000
--- a/runtimes/neurun/src/backend/interface/IStageGenerator.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_ISTAGE_GENERATOR_H__
-#define __NEURUN_BACKEND_ISTAGE_GENERATOR_H__
-
-#include <memory>
-#include <functional>
-
-#include "exec/interface/IFunction.h"
-
-#include "backend/interface/ITensorBuilder.h"
-#include "model/operation/NodeVisitor.h"
-
-struct IExecutionBuilder
-{
-  virtual ~IExecutionBuilder() = default;
-
-  virtual void append(std::unique_ptr<::neurun::exec::IFunction> &&f) = 0;
-};
-
-using Stage = std::function<void(IExecutionBuilder &)>;
-
-namespace neurun
-{
-namespace backend
-{
-
-class IStageGenerator : model::operation::NodeVisitor
-{
-public:
-  virtual ~IStageGenerator() = default;
-
-  virtual std::shared_ptr<ITensorBuilder> tensor_builder() = 0;
-
-protected:
-#define OP(InternalName, IsNnApi, NnApiName) \
-  virtual void visit(const model::operation::InternalName &) override {}
-#include "model/operation/Op.lst"
-#undef OP
-
-protected:
-  void returnStage(const Stage &stage) { _return = stage; }
-
-public:
-  Stage generate(const model::operation::Node &node)
-  {
-    node.accept(std::move(*this));
-    return _return;
-  }
-
-private:
-  Stage _return = nullptr;
-};
-
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_ISTAGE_GENERATOR_H__
diff --git a/runtimes/neurun/src/backend/interface/ITensorBuilder.h b/runtimes/neurun/src/backend/interface/ITensorBuilder.h
deleted file mode 100644
index 354a270e6..000000000
--- a/runtimes/neurun/src/backend/interface/ITensorBuilder.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_ITENSOR_BUILDER_H__
-#define __NEURUN_BACKEND_ITENSOR_BUILDER_H__
-
-#include <map>
-
-#include "model/operand/Index.h"
-#include "operand/IObject.h"
-#include "compiler/SubTensorInfo.h"
-#include "compiler/TensorInfo.h"
-#include "backend/interface/operand/ITensor.h"
-
-namespace neurun
-{
-namespace backend
-{
-
-struct ITensorBuilder
-{
-  using IterateFunction = std::function<void(const model::operand::Index &)>;
-
-  virtual ~ITensorBuilder(void) = default;
-
-  // TODO Merge registerTensorInfo and registerSubTensorInfo using abstraction by internal class
-  /**
-   * @brief Register tensor information to allocate on backend
-   */
-  virtual void registerTensorInfo(const model::operand::Index &, const compiler::TensorInfo &) = 0;
-  /**
-   * @brief     Register subtensor information to allocate on backend
-   */
-  virtual void registerSubTensorInfo(const model::operand::Index &,
-                                     const compiler::SubTensorInfo &) = 0;
-
-  virtual void notifyFirstUse(const model::operand::Index &) = 0;
-  virtual void notifyLastUse(const model::operand::Index &) = 0;
-
-  virtual void prepare(void) = 0;
-  virtual void allocate(void) = 0;
-
-  virtual std::shared_ptr<::neurun::backend::operand::ITensor>
-  tensorAt(const model::operand::Index &ind) = 0;
-  virtual std::shared_ptr<backend::operand::IObject>
-  wrapTensor(const model::operand::Index &ind) = 0;
-  virtual void iterate(const IterateFunction &fn) = 0;
-};
-
-} // namespace backend
-} // namespace neurun
-
-#include <set>
-#include <memory>
-
-namespace neurun
-{
-namespace backend
-{
-
-using TensorBuilderSet = std::set<std::shared_ptr<backend::ITensorBuilder>>;
-
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_ITENSOR_BUILDER_H__
diff --git a/runtimes/neurun/src/backend/interface/operand/IObject.h b/runtimes/neurun/src/backend/interface/operand/IObject.h
deleted file mode 100644
index 44b33b080..000000000
--- a/runtimes/neurun/src/backend/interface/operand/IObject.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_OPERAND_I_OBJECT_H__
-#define __NEURUN_BACKEND_OPERAND_I_OBJECT_H__
-
-#include <functional>
-
-#include "ITensor.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace operand
-{
-
-struct IObject
-{
-  virtual ~IObject() = default;
-  virtual ::neurun::backend::operand::ITensor *ptr(void) const = 0;
-  virtual void
-  access(const std::function<void(::neurun::backend::operand::ITensor &tensor)> &fn) const = 0;
-};
-
-} // namespace operand
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_OPERAND_I_OBJECT_H__
diff --git a/runtimes/neurun/src/backend/interface/operand/ITensor.h b/runtimes/neurun/src/backend/interface/operand/ITensor.h
deleted file mode 100644
index 8bc3ff465..000000000
--- a/runtimes/neurun/src/backend/interface/operand/ITensor.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_BACKEND_OPERAND_I_TENSOR_H__
-#define __NEURUN_BACKEND_OPERAND_I_TENSOR_H__
-
-#include <cstring>
-#include <cstdint>
-
-#include "util/feature/Coordinate4D.h"
-
-namespace neurun
-{
-namespace backend
-{
-namespace operand
-{
-
-class ITensor
-{
-public:
-  virtual ~ITensor() = default;
-
-public:
-  virtual uint8_t *buffer() const = 0;
-  virtual size_t total_size() const = 0;
-  virtual size_t dimension(size_t index) const = 0;
-  virtual size_t num_dimensions() const = 0;
-  virtual size_t calcOffset(const neurun::util::feature::Coordinate4D &coords) = 0;
-};
-
-} // namespace operand
-} // namespace backend
-} // namespace neurun
-
-#endif // __NEURUN_BACKEND_OPERAND_I_TENSOR_H__
diff --git a/runtimes/neurun/src/compiler/BackendResolver.cc b/runtimes/neurun/src/compiler/BackendResolver.cc
deleted file mode 100644
index 6c1f32603..000000000
--- a/runtimes/neurun/src/compiler/BackendResolver.cc
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "BackendResolver.h"
-
-namespace neurun
-{
-namespace compiler
-{
-
-// NOT IMPLEMENTED
-
-} // namespace compiler
-} // namespace neurun
diff --git a/runtimes/neurun/src/compiler/BackendResolver.h b/runtimes/neurun/src/compiler/BackendResolver.h
deleted file mode 100644
index 4742b2d94..000000000
--- a/runtimes/neurun/src/compiler/BackendResolver.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_COMPILER_BACKEND_RESOLVER_H__
-#define __NEURUN_COMPILER_BACKEND_RESOLVER_H__
-
-#include <set>
-#include <unordered_map>
-#include <typeindex>
-
-#include "util/logging.h"
-#include "util/config/ConfigManager.h"
-#include "backend/BackendManager.h"
-#include "backend/interface/IStageGenerator.h"
-
-namespace neurun
-{
-namespace compiler
-{
-
-class BackendResolver
-{
-public:
-  BackendResolver(const neurun::model::operand::Set &operands)
-  {
-    _backend_manager = std::make_shared<backend::BackendManager>(operands);
-
-    const auto backend_all_str =
-        config::ConfigManager::instance().get<std::string>("OP_BACKEND_ALLOPS");
-    if (backend_all_str.compare("none") != 0)
-    {
-      VERBOSE(BackendResolver) << "Use backend for all ops: " << backend_all_str << std::endl;
-#define OP(InternalName, IsNnApi, NnApiName)                    \
-  if (IsNnApi)                                                  \
-  {                                                             \
-    auto backend = _backend_manager->get(backend_all_str);      \
-    _gen_map[typeid(model::operation::InternalName)] = backend; \
-  }
-#include "model/operation/Op.lst"
-#undef OP
-    }
-    else
-    {
-#define OP(InternalName, IsNnApi, NnApiName)                                                      \
-  if (IsNnApi)                                                                                    \
-  {                                                                                               \
-    const auto &backend_str =                                                                     \
-        config::ConfigManager::instance().get<std::string>("OP_BACKEND_" #NnApiName);             \
-    auto backend = _backend_manager->get(backend_str);                                            \
-    VERBOSE(BackendResolver) << "backend for " << #NnApiName << ": " << backend_str << std::endl; \
-    _gen_map[typeid(model::operation::InternalName)] = backend;                                   \
-  }
-
-#include "model/operation/Op.lst"
-#undef OP
-    }
-  }
-
-public:
-  const backend::Backend *getBackend(const std::type_index &type) { return _gen_map[type]; }
-  const backend::Backend *getDefaultBackend() const
-  {
-    backend::Backend *default_backend = _backend_manager->get("cpu");
-    return default_backend;
-  }
-
-private:
-  std::unordered_map<std::type_index, backend::Backend *> _gen_map;
-  std::shared_ptr<backend::BackendManager> _backend_manager;
-};
-
-} // namespace compiler
-} // namespace neurun
-
-#endif // __NEURUN_COMPILER_BACKEND_RESOLVER_H__
diff --git a/runtimes/neurun/src/compiler/Compiler.cc b/runtimes/neurun/src/compiler/Compiler.cc
deleted file mode 100644
index 92ec69afb..000000000
--- a/runtimes/neurun/src/compiler/Compiler.cc
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Compiler.h"
-
-#include "OperationValidator.h"
-#include "SubTensorAnalyzer.h"
-#include "PlanBuilder.h"
-#include "ConstantInitializer.h"
-
-#include "graph/dumper/Dumper.h"
-#include "graph/operation/LowerInfo.h"
-#include "dumper/dot/DotDumper.h"
-#include "linear/Linear.h"
-
-namespace neurun
-{
-
-namespace compiler
-{
-
-void Compiler::compile(void)
-{
-  auto &plan = this->plan();
-  auto &graph = plan.model();
-  const auto &operands = graph.operands();
-
-  // Disable compile phase
-  // When ready to use interpreter backend, remove this config and use backend setting
-  const auto env_disable_compile = config::ConfigManager::instance().get<bool>("DISABLE_COMPILE");
-  if (env_disable_compile)
-  {
-    plan.state(State::NOT_COMPILED);
-    return;
-  }
-
-  /***************************************************
-   * Backend independent analysis & optimization phase
-   ***************************************************/
-
-  /*************************************************************
-   *  Backend independent analysis & optimization phase finished
-   *************************************************************/
-
-  // dump graph to .dot
-  neurun::dumper::dot::DotDumper dot_dumper(graph);
-  dot_dumper.dumpIfNeeded("before_lower");
-
-  // Lower: decide backend
-  graph.lower();
-  plan.state(State::LOWERED);
-
-  dot_dumper.dumpIfNeeded("after_lower");
-
-  auto linear = graph.linearize();
-  plan.state(State::LINEARIZED);
-
-  // Dump ops
-  linear->accept(neurun::graph::dumper::Dumper{});
-
-  linear->accept(OperationValidator{operands});
-
-  /*************************************************
-   * Backend dependent analysis & optimization phase
-   *************************************************/
-
-  // SubTensorInfo should be generated after lower, before stage generation and finalize
-  // because SubTensorAnalyzer assume that insert permutation is already finished
-  //    lower: decide backend and insert permutation
-  //    stage generation: prepare codegen to optimization
-  //    finalize: generate tensor using subtensor info, then execute stage
-  // Generated SubTensorInfo is in operand(Object)
-  // for easy pass SubTensorInfo to plan builder and tensor builder
-  linear->accept(SubTensorAnalyzer{graph.operands()});
-
-  /**********************************************************
-   * Backend dependent analysis & optimization phase finished
-   **********************************************************/
-
-  /***********************
-   * Code generation phase
-   ***********************/
-
-  PlanBuilder plan_builder{plan};
-
-  // Plan building
-  linear->iterate([&](const linear::Element &element) {
-    auto backend = element.lower_info->backend();
-
-    // Generate Stage
-    auto stage_gen = backend->stage_gen();
-    plan_builder.addStage(stage_gen->generate(*element.node));
-  });
-
-  auto tensor_builders = linear->planTensors();
-
-  // TODO Add optimization passes
-  plan_builder.finalize(tensor_builders);
-
-  ConstantInitializer{graph, plan}();
-
-  /********************************
-   * Code generation phase finished
-   ********************************/
-
-  plan.state(State::COMPILED);
-}
-
-} // namespace compiler
-
-} // namespace neurun
diff --git a/runtimes/neurun/src/compiler/Compiler.h b/runtimes/neurun/src/compiler/Compiler.h
deleted file mode 100644
index d8f620a10..000000000
--- a/runtimes/neurun/src/compiler/Compiler.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file  Compiler.h
- * @brief This file contains Compiler class to define and run compilation phase
- */
-
-#ifndef __NEURUN_COMPILER_COMPILE_H_
-#define __NEURUN_COMPILER_COMPILE_H_
-
-#include "graph/Graph.h"
-#include "Plan.h"
-
-namespace neurun
-{
-
-namespace compiler
-{
-
-/**
- * @brief Class to compile graph model
- */
-class Compiler
-{
-public:
-  /**
-   * @brief     Construct a new Compiler object
-   * @param[in] model Graph model
-   */
-  Compiler(const std::shared_ptr<graph::Graph> &model) : _plan{new Plan{model}}
-  {
-    // DO NOTHING
-  }
-
-public:
-  /**
-   * @brief   Return plan
-   * @return  Plan
-   */
-  Plan &plan(void) { return *_plan; }
-  /**
-   * @brief   Run compilation
-   */
-  void compile(void);
-  /**
-   * @brief       Pass plan reference
-   * @param[out]  plan  Plan reference to return
-   */
-  void release(std::shared_ptr<const Plan> &plan) { plan = _plan; }
-
-private:
-  std::shared_ptr<Plan> _plan;
-};
-
-} // namespace compiler
-
-} // namespace neurun
-
-#endif // __NEURUN_COMPILER_COMPILE_H_
diff --git a/runtimes/neurun/src/compiler/ConstantInitializer.cc b/runtimes/neurun/src/compiler/ConstantInitializer.cc
deleted file mode 100644
index d6d58e273..000000000
--- a/runtimes/neurun/src/compiler/ConstantInitializer.cc
+++ /dev/null
@@ -1,188 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ConstantInitializer.h"
-
-#include "backend/interface/operand/IObject.h"
-#include "backend/interface/IConfig.h"
-#include "backend/BackendManager.h"
-#include "model/operation/FullyConnectedNode.h"
-#include "util/feature/nhwc/Reader.h"
-#include "util/feature/nhwc/View.h"
-#include "util/feature/nchw/View.h"
-#include "misc/feature/IndexIterator.h"
-#include "util/logging.h"
-
-namespace neurun
-{
-namespace compiler
-{
-
-ConstantInitializer::ConstantInitializer(const graph::Graph &graph, Plan &plan)
-    : _graph{graph}, _plan{plan}
-{
-}
-
-void ConstantInitializer::operator()()
-{
-  // Fill operand data
-  _plan.operands().iterate([&](int ind, neurun::backend::operand::IObject &obj) {
-    neurun::model::operand::Index index(ind);
-    const auto &model_obj = _graph.operands().at(index);
-
-    // For only CONSTANTS
-    if (model_obj.getUsage() != neurun::model::operand::OperandUsage::CONSTANT)
-      return;
-
-    // Only float32 is supported
-    auto type = model_obj.typeInfo().type();
-    if (type != ::neurun::model::operand::DataType::TENSOR_FLOAT32)
-      throw std::runtime_error{"Unsupported data type. Only TENSOR_FLOAT32 is supported."};
-
-    VERBOSE(FillOperandData) << "Fill data for operand " << ind << std::endl;
-
-    auto layout =
-        model_obj.lower_info()->def_backends().getOnlyElement()->config()->getOperandLayout();
-    const auto shape = model_obj.shape();
-    auto base = reinterpret_cast<const float *>(model_obj.data().base());
-    auto size = model_obj.data().size();
-
-    obj.access([&](::neurun::backend::operand::ITensor &tensor) {
-      switch (shape.rank())
-      {
-        case 1:
-        {
-          auto vec_size = shape.asVector();
-          for (int32_t n = 0; n < vec_size; ++n)
-          {
-            const float *from = reinterpret_cast<const float *>(base) + n;
-            const auto value = *from;
-
-            float *into = reinterpret_cast<float *>(tensor.buffer()) + n;
-
-            *into = value;
-          }
-          break;
-        }
-        case 2:
-        {
-          // NOTE This is a WORKAROUND which supports FullyConnected weight only
-          //      For FullyConnected, we must know the IFM shape to deduce 2D weight shape from 4D
-          //      IFM.
-          //      This is because of NHWC/NCHW layout, the order of mapping will be different.
-          // TODO Support general case - explicitly insert Reshape op for IFM as 2D
-
-          // Find corresponding FullyConnected IFM
-          auto operation_index = _graph.operands().at(index).getUses().list().front();
-          auto operation = &_graph.operations().at(operation_index);
-          auto fc_operation =
-              dynamic_cast<const neurun::model::operation::FullyConnectedNode *>(operation);
-
-          if (fc_operation == nullptr)
-            break;
-
-          auto ifm_index = fc_operation->getInputs().at(
-              neurun::model::operation::FullyConnectedNode::Input::INPUT);
-          const auto &ifm = _graph.operands().at(ifm_index);
-          const auto ifm_shape = ifm.shape().asFeature();
-          const auto num_output = shape.dim(0);
-
-          const ::nnfw::misc::feature::Shape ker_shape{num_output, ifm_shape.C, ifm_shape.H,
-                                                       ifm_shape.W};
-          const util::feature::nhwc::Reader<float> from{ker_shape, base, size};
-
-          if (layout == neurun::graph::operand::Layout::NHWC)
-          {
-            ::nnfw::misc::feature::iterate(ker_shape)
-                << [&](uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) {
-                     const auto value = from.at(nth, ch, row, col);
-
-                     uint32_t offset = 0;
-
-                     // NNAPI uses NHWC ordering
-                     offset += nth * ifm_shape.H * ifm_shape.W * ifm_shape.C;
-                     offset += row * ifm_shape.W * ifm_shape.C;
-                     offset += col * ifm_shape.C;
-                     offset += ch;
-
-                     float *into = reinterpret_cast<float *>(tensor.buffer()) + offset;
-
-                     *into = value;
-                   };
-          }
-          else
-          {
-            assert(layout == neurun::graph::operand::Layout::NCHW);
-
-            ::nnfw::misc::feature::iterate(ker_shape)
-                << [&](uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) {
-                     const auto value = from.at(nth, ch, row, col);
-
-                     uint32_t offset = 0;
-
-                     // 'NCHW' ordering
-                     offset += nth * ifm_shape.C * ifm_shape.H * ifm_shape.W;
-                     offset += ch * ifm_shape.H * ifm_shape.W;
-                     offset += row * ifm_shape.W;
-                     offset += col;
-
-                     float *into = reinterpret_cast<float *>(tensor.buffer()) + offset;
-
-                     *into = value;
-                   };
-          }
-
-          break;
-        }
-        case 4:
-        {
-          auto ker_shape = shape.asFeature();
-          auto from = util::feature::nhwc::Reader<float>{ker_shape, base, size};
-
-          if (layout == neurun::graph::operand::Layout::NHWC)
-          {
-            auto into = util::feature::nhwc::View<float>{
-                ker_shape, reinterpret_cast<float *>(tensor.buffer()), size};
-
-            ::nnfw::misc::feature::iterate(ker_shape)
-                << [&](uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) {
-                     const auto value = from.at(nth, ch, row, col);
-                     into.at(nth, ch, row, col) = value;
-                   };
-          }
-          else
-          {
-            assert(layout == neurun::graph::operand::Layout::NCHW);
-
-            auto into = util::feature::nchw::View<float>{&tensor};
-
-            ::nnfw::misc::feature::iterate(ker_shape)
-                << [&](uint32_t nth, uint32_t ch, uint32_t row, uint32_t col) {
-                     const auto value = from.at(nth, ch, row, col);
-                     into.at(nth, ch, row, col) = value;
-                   };
-          }
-          break;
-        }
-        default:
-          throw std::runtime_error{"Not yet supported"};
-      }
-    });
-  });
-}
-
-} // namespace codegen
-} // namespace neurun
diff --git a/runtimes/neurun/src/compiler/ConstantInitializer.h b/runtimes/neurun/src/compiler/ConstantInitializer.h
deleted file mode 100644
index 7d9231908..000000000
--- a/runtimes/neurun/src/compiler/ConstantInitializer.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_COMPILER_CONSTANT_INITIALIZER_H__
-#define __NEURUN_COMPILER_CONSTANT_INITIALIZER_H__
-
-#include "graph/Graph.h"
-#include "Plan.h"
-
-namespace neurun
-{
-namespace compiler
-{
-
-class ConstantInitializer
-{
-public:
-  ConstantInitializer(const graph::Graph &graph, Plan &plan);
-
-  void operator()();
-
-private:
-  const graph::Graph &_graph;
-  Plan &_plan;
-};
-
-} // namespace compiler
-} // namespace neurun
-
-#endif // __NEURUN_COMPILER_CONSTANT_INITIALIZER_H__
diff --git a/runtimes/neurun/src/compiler/OperationValidator.cc b/runtimes/neurun/src/compiler/OperationValidator.cc
deleted file mode 100644
index 0110eccb8..000000000
--- a/runtimes/neurun/src/compiler/OperationValidator.cc
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "OperationValidator.h"
-
-#include <typeinfo>
-
-#include "model/operand/Set.h"
-#include "graph/operation/LowerInfo.h"
-
-#include "util/logging.h"
-
-namespace neurun
-{
-namespace compiler
-{
-
-void OperationValidator::visit(const model::operation::Conv2DNode &)
-{
-  // DO NOTHING
-}
-
-void OperationValidator::visit(const model::operation::MaxPool2DNode &)
-{
-  // DO NOTHING
-}
-
-void OperationValidator::visit(const model::operation::AvgPool2DNode &)
-{
-  // DO NOTHING
-}
-
-void OperationValidator::visit(const model::operation::ConcatNode &node)
-{
-  (void)node; // NOTE To prevent from unused variable warning
-
-  // NOTE This implementation assumes concat over feature depth
-  // TODO Remove this assumption
-  assert(_ctx.at(::neurun::model::operand::Index{node.param().axis_index}).asScalar<int32_t>() ==
-         3);
-}
-
-void OperationValidator::visit(const model::operation::FullyConnectedNode &)
-{
-  // DO NOTHING
-}
-
-void OperationValidator::visit(const model::operation::ReshapeNode &node)
-{
-  (void)node; // NOTE To prevent from unused variable warning
-
-  const auto output_index{node.getOutputs().at(0)};
-  const auto input_index{node.getInputs().at(0)};
-
-  // NOTE The content of a tensor specified by shape_index should be aligned with
-  //      output tensor shape
-  // TODO Check consistency of ouput shape
-
-  // 'Feature Map' to 'Vector' reshape
-  assert(_ctx.at(input_index).shape().rank() == 4);
-  assert(_ctx.at(output_index).shape().rank() == 2);
-  assert(_ctx.at(output_index).shape().dim(0) == 1);
-
-  // NOTE Vector element ordering issue arises when H or W is not 1
-  assert(_ctx.at(input_index).shape().dim(1) == 1); // H
-  assert(_ctx.at(input_index).shape().dim(2) == 1); // W
-  // input(4D)'s C * H * W == output(2D)'s W
-  assert((_ctx.at(input_index).shape().dim(3) * _ctx.at(input_index).shape().dim(1) *
-          _ctx.at(input_index).shape().dim(2)) == _ctx.at(output_index).shape().dim(1));
-}
-
-void OperationValidator::visit(const model::operation::SoftmaxNode &node)
-{
-  (void)node; // NOTE To prevent from unused variable warning
-
-  VERBOSE(Softmax) << "Configure SOFTMAX operation" << std::endl;
-
-  const auto output_index{node.getOutputs().at(0)};
-  const auto input_index{node.getInputs().at(0)};
-
-  assert(_ctx.at(output_index).shape().rank() == _ctx.at(input_index).shape().rank());
-
-  // TODO Support 'feature map' input
-  assert(_ctx.at(input_index).shape().rank() == 2);
-  assert(_ctx.at(input_index).shape().dim(0) == 1);
-  assert(_ctx.at(input_index).shape().dim(0) == _ctx.at(output_index).shape().dim(0));
-  assert(_ctx.at(input_index).shape().dim(1) == _ctx.at(output_index).shape().dim(1));
-}
-
-void OperationValidator::visit(const model::operation::PermuteNode &node)
-{
-  (void)node; // NOTE To prevent from unused variable warning
-
-  VERBOSE(Permute) << "Configure Permute operation" << std::endl;
-
-  const auto output_index{node.getOutputs().at(0)};
-  const auto input_index{node.getInputs().at(0)};
-
-  assert(_ctx.at(output_index).shape().rank() == _ctx.at(input_index).shape().rank());
-}
-
-void OperationValidator::visit(const model::operation::AddNode &)
-{
-  // DO NOTHING
-}
-
-} // namespace compiler
-} // namespace neurun
diff --git a/runtimes/neurun/src/compiler/OperationValidator.h b/runtimes/neurun/src/compiler/OperationValidator.h
deleted file mode 100644
index f4ed533ed..000000000
--- a/runtimes/neurun/src/compiler/OperationValidator.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_COMPILER_OPERATION_VALIDATOR_H__
-#define __NEURUN_COMPILER_OPERATION_VALIDATOR_H__
-
-#include "model/operation/NodeVisitor.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operand
-{
-class Set;
-} // namespace operand
-} // namespace graph
-} // namespace neurun
-
-namespace neurun
-{
-namespace compiler
-{
-
-class OperationValidator : public model::operation::NodeVisitor
-{
-public:
-  OperationValidator(const neurun::model::operand::Set &ctx) : _ctx{ctx} {}
-
-public:
-#define OP(InternalName, IsNnApi, NnApiName) \
-  virtual void visit(const model::operation::InternalName &) override;
-#include "model/operation/Op.lst"
-#undef OP
-
-private:
-  const neurun::model::operand::Set &_ctx;
-};
-
-} // namespace compiler
-} // namespace neurun
-
-#endif // __NEURUN_COMPILER_OPERATION_VALIDATOR_H__
diff --git a/runtimes/neurun/src/compiler/Plan.cc b/runtimes/neurun/src/compiler/Plan.cc
deleted file mode 100644
index b7637b189..000000000
--- a/runtimes/neurun/src/compiler/Plan.cc
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Plan.h"
-
-namespace neurun
-{
-namespace codegen
-{
-
-// NO IMPLEMENTATION YET
-
-} // namespace codegen
-} // namespace neurun
diff --git a/runtimes/neurun/src/compiler/Plan.h b/runtimes/neurun/src/compiler/Plan.h
deleted file mode 100644
index f2a526e0e..000000000
--- a/runtimes/neurun/src/compiler/Plan.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_CODEGEN_PLAN_H__
-#define __NEURUN_CODEGEN_PLAN_H__
-
-#include "graph/Graph.h"
-#include "compiler/operand/Context.h"
-#include "compiler/operation/Sequence.h"
-
-namespace neurun
-{
-namespace compiler
-{
-
-enum class State
-{
-  NONE,        // Initial state
-  LOWERED,     // Backend is decided
-  LINEARIZED,  // Everything is moved to Linear object so this Graph object is no longer effective
-  COMPILED,    // Success compilation
-  NOT_COMPILED // Not compiled by environment or graph status
-};
-
-class Plan
-{
-public:
-  Plan(const std::shared_ptr<neurun::graph::Graph> &model) : _model(model), _state(State::NONE)
-  {
-    // DO NOTHING
-  }
-
-public:
-  neurun::graph::Graph &model(void) { return *_model; }
-  const neurun::graph::Graph &model(void) const { return *_model; }
-
-  void state(State state) { _state = state; }
-  State state(void) const { return _state; }
-
-public:
-  operand::Context &operands(void) { return _operands; }
-  const operand::Context &operands(void) const { return _operands; }
-
-public:
-  operation::Sequence &operations(void) { return _ops; }
-  const operation::Sequence &operations(void) const { return _ops; }
-
-private:
-  std::shared_ptr<neurun::graph::Graph> _model;
-  operand::Context _operands;
-  operation::Sequence _ops;
-  State _state;
-};
-
-} // namespace compiler
-} // namespace neurun
-
-#endif // __NEURUN_CODEGEN_PLAN_H__
diff --git a/runtimes/neurun/src/compiler/PlanBuilder.cc b/runtimes/neurun/src/compiler/PlanBuilder.cc
deleted file mode 100644
index 8ef3fedbf..000000000
--- a/runtimes/neurun/src/compiler/PlanBuilder.cc
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "PlanBuilder.h"
-
-#include "backend/interface/operand/IObject.h"
-
-namespace neurun
-{
-namespace compiler
-{
-
-void PlanBuilder::addStage(const Stage &stage) { _stages.emplace_back(stage); }
-
-void PlanBuilder::finalize(const backend::TensorBuilderSet &tensor_builders)
-{
-  auto &operands = _plan.operands();
-
-  // Prepare tensors
-  for (auto &tensor_builder : tensor_builders)
-  {
-    tensor_builder->prepare();
-
-    // Wrap tensors as Object and store them to plan
-    tensor_builder->iterate([&](const model::operand::Index &index) {
-      auto object = tensor_builder->wrapTensor(index);
-      operands.set(index, object);
-    });
-  }
-
-  // Process Stage
-  ExecutionBuilder execution_builder{_plan};
-
-  for (const auto &stage : _stages)
-  {
-    stage(execution_builder);
-  }
-
-  // Allocate Tensor Memory for cl_tensors
-  for (auto &tensor_builder : tensor_builders)
-  {
-    tensor_builder->allocate();
-  }
-}
-
-} // namepsace compiler
-} // namespace neurun
diff --git a/runtimes/neurun/src/compiler/PlanBuilder.h b/runtimes/neurun/src/compiler/PlanBuilder.h
deleted file mode 100644
index 3231906d2..000000000
--- a/runtimes/neurun/src/compiler/PlanBuilder.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_COMPILER_PLAN_BUILDER_H__
-#define __NEURUN_COMPILER_PLAN_BUILDER_H__
-
-#include "Plan.h"
-#include "backend/interface/IStageGenerator.h"
-#include "backend/interface/ITensorBuilder.h"
-
-namespace neurun
-{
-namespace compiler
-{
-
-class ExecutionBuilder final : public IExecutionBuilder
-{
-public:
-  ExecutionBuilder(Plan &plan) : _plan{plan}
-  {
-    // DO NOTHING
-  }
-
-public:
-  void append(std::unique_ptr<::neurun::exec::IFunction> &&f) override
-  {
-    _plan.operations().append(std::move(f));
-  }
-
-private:
-  Plan &_plan;
-};
-
-class PlanBuilder
-{
-public:
-  PlanBuilder(Plan &plan) : _plan{plan}
-  {
-    // DO NOTHING
-  }
-
-public:
-  void addStage(const Stage &stage);
-
-public:
-  // TODO Remove the argument `tensor_builders`
-  void finalize(const backend::TensorBuilderSet &tensor_builders);
-
-private:
-  Plan &_plan;
-
-private:
-  std::vector<Stage> _stages;
-};
-
-} // namepsace compiler
-} // namespace neurun
-
-#endif // __NEURUN_COMPILER_PLAN_BUILDER_H__
diff --git a/runtimes/neurun/src/compiler/SubTensorAnalyzer.cc b/runtimes/neurun/src/compiler/SubTensorAnalyzer.cc
deleted file mode 100644
index 0851b7991..000000000
--- a/runtimes/neurun/src/compiler/SubTensorAnalyzer.cc
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "SubTensorAnalyzer.h"
-
-#include <typeinfo>
-
-#include "cpp14/memory.h"
-#include "model/operand/Set.h"
-#include "graph/operation/LowerInfo.h"
-#include "util/logging.h"
-
-namespace neurun
-{
-namespace compiler
-{
-
-void SubTensorAnalyzer::visit(const model::operation::ConcatNode &node)
-{
-  //  If operator is concat (or other operators related with subsumption), fill subsumption info
-  //  TODO: if one tensor is subset of many parents or model input
-  //        Solution 1. Handle 1st parent only, ignore others (need to invert for other childrun)
-  //        Solution 2. Insert copy operation for other parents
-  auto axis_index = node.param().axis_index;
-
-  // To prepare concat elimination, axis should be constant
-  if (_ctx.at(axis_index).getUsage() != model::operand::OperandUsage::CONSTANT)
-  {
-    VERBOSE(SUBTENSOR) << "Cannot handle non-constant axis" << std::endl;
-    return;
-  }
-
-  // NOTE This implementation assumes concat over feature depth
-  // TODO Remove this assumption
-  int32_t axis = _ctx.at(axis_index).asScalar<int32_t>();
-  if (axis != 3)
-  {
-    VERBOSE(SUBTENSOR) << "Cannot handle axis is not channel" << std::endl;
-    return;
-  }
-
-  auto &output_index = node.getOutputs().at(0);
-  auto &inputs = node.getInputs();
-
-  int32_t axis_point = 0;
-  for (auto &input_index : inputs)
-  {
-    auto input_shape_4D = _ctx.at(input_index).lower_info()->shape();
-    std::vector<int32_t> offset = {0, 0, 0, 0};
-    offset[axis] = axis_point;
-    neurun::util::feature::Coordinate4D coordinate_info(offset[0], offset[1], offset[2], offset[3]);
-    std::unique_ptr<graph::operand::ParentInfo> parentInfo =
-        nnfw::cpp14::make_unique<graph::operand::ParentInfo>(output_index, coordinate_info);
-
-    // NOTD Not support multiple parent tensor yet
-    assert(_ctx.at(input_index).parent_info() == nullptr);
-    _ctx.at(input_index).parent_info(std::move(parentInfo));
-
-    // NOTE Only support when axis is 3(channel)
-    axis_point += input_shape_4D.c();
-  }
-}
-
-} // namespace compiler
-} // namespace neurun
diff --git a/runtimes/neurun/src/compiler/SubTensorAnalyzer.h b/runtimes/neurun/src/compiler/SubTensorAnalyzer.h
deleted file mode 100644
index ddfd10263..000000000
--- a/runtimes/neurun/src/compiler/SubTensorAnalyzer.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file  SubTensorAnalyzer.h
- * @brief This file contains SubTensorAnalyzer to analyze tensor subsumption
- *        using operation visitor
- */
-
-#ifndef __NEURUN_COMPILER_SUBTENSOR_ANALYZER_H__
-#define __NEURUN_COMPILER_SUBTENSOR_ANALYZER_H__
-
-#include "model/operation/NodeVisitor.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operand
-{
-class Set;
-} // namespace operation
-} // namespace graph
-} // namespace neurun
-
-namespace neurun
-{
-namespace compiler
-{
-
-/**
- * @brief Class to analyze tensor subsumption
- */
-class SubTensorAnalyzer : public model::operation::NodeVisitor
-{
-public:
-  /**
-   * @brief     Construct a new SubTensorAnalyzer object
-   * @param[in] ctx Graph operand set
-   */
-  SubTensorAnalyzer(neurun::model::operand::Set &ctx) : _ctx{ctx} {}
-
-public:
-  virtual void visit(const model::operation::ConcatNode &) override;
-
-private:
-  neurun::model::operand::Set &_ctx;
-};
-
-} // namespace compiler
-} // namespace neurun
-
-#endif // __NEURUN_COMPILER_SUBTENSOR_ANALYZER_H__
diff --git a/runtimes/neurun/src/compiler/SubTensorInfo.h b/runtimes/neurun/src/compiler/SubTensorInfo.h
deleted file mode 100644
index c0fb857d0..000000000
--- a/runtimes/neurun/src/compiler/SubTensorInfo.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file  SubTensorInfo.h
- * @brief This file contains SubTensorInfo to represent subsumption between tensors
- *        for backend tensor allocation
- */
-#ifndef __NEURUN_COMPILER_SUBTENSOR_INFO_H__
-#define __NEURUN_COMPILER_SUBTENSOR_INFO_H__
-
-#include "model/operand/Object.h"
-#include "util/feature/Coordinate4D.h"
-
-namespace neurun
-{
-namespace compiler
-{
-
-/**
- * @brief Class to represent information of subtensor
- */
-class SubTensorInfo
-{
-public:
-  SubTensorInfo() = delete;
-
-  /**
-   * @brief     Construct a new SubTensorInfo object
-   * @param[in] obj SubTensor object
-   */
-  SubTensorInfo(const model::operand::Object &obj)
-      : _parent{obj.parent_info()->parent()}, _shape{obj.shape()}, _type{obj.typeInfo()},
-        _offset{obj.parent_info()->offset()}
-  {
-    // DO NOTHING
-  }
-
-public:
-  /**
-   * @brief   Return parent tensor index
-   * @return  Parent tensor index
-   */
-  const model::operand::Index parent(void) const { return _parent; }
-  /**
-   * @brief   Return tensor shape
-   * @return  Tensor shape
-   */
-  const model::operand::Shape shape(void) const { return _shape; }
-  /**
-   * @brief   Return tensor type
-   * @return  Tensor type
-   */
-  const model::operand::TypeInfo type(void) const { return _type; }
-  /**
-   * @brief   Return tensor's offset in parent tensor
-   * @return  Tensor offset
-   */
-  const neurun::util::feature::Coordinate4D offset(void) const { return _offset; }
-
-private:
-  const model::operand::Index _parent;
-  const model::operand::Shape _shape;
-  const model::operand::TypeInfo _type;
-  const neurun::util::feature::Coordinate4D _offset;
-};
-
-} // compiler
-} // neurun
-
-#endif // __NEURUN_COMPILER_SUBTENSOR_INFO_H__
diff --git a/runtimes/neurun/src/compiler/TensorInfo.h b/runtimes/neurun/src/compiler/TensorInfo.h
deleted file mode 100644
index 787c433e5..000000000
--- a/runtimes/neurun/src/compiler/TensorInfo.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_COMPILER_TENSOR_INFO_H__
-#define __NEURUN_COMPILER_TENSOR_INFO_H__
-
-#include "model/operand/Shape.h"
-#include "model/operand/TypeInfo.h"
-
-#include <numeric>
-
-namespace neurun
-{
-namespace compiler
-{
-
-class TensorInfo
-{
-public:
-  TensorInfo() = default;
-
-public:
-  TensorInfo(const ::neurun::model::operand::Shape &shape,
-             const ::neurun::model::operand::TypeInfo &typeInfo)
-      : _shape(shape), _typeInfo(typeInfo)
-  {
-    // DO NOTHING
-  }
-
-public:
-  const ::neurun::model::operand::Shape &shape() const { return _shape; }
-  const ::neurun::model::operand::TypeInfo &typeInfo() const { return _typeInfo; }
-  size_t total_size() const
-  {
-    const auto &dims = _shape.dims();
-    return std::accumulate(dims.begin(), dims.end(), 4, std::multiplies<size_t>());
-  }
-
-private:
-  ::neurun::model::operand::Shape _shape;
-  ::neurun::model::operand::TypeInfo _typeInfo;
-};
-
-} // namespace compiler
-} // namespace neurun
-
-#endif // __NEURUN_COMPILER_TENSOR_INFO_H__
diff --git a/runtimes/neurun/src/compiler/operand/Context.cc b/runtimes/neurun/src/compiler/operand/Context.cc
deleted file mode 100644
index 3fa529995..000000000
--- a/runtimes/neurun/src/compiler/operand/Context.cc
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Context.h"
-
-#include <cassert>
-
-namespace neurun
-{
-namespace compiler
-{
-namespace operand
-{
-
-Context &Context::set(const model::operand::Index &id,
-                      const std::shared_ptr<backend::operand::IObject> &object)
-{
-  // Only one object for an id
-  assert(_objects.find(id.value()) == _objects.end());
-  _objects[id.value()] = object;
-  return (*this);
-}
-
-void Context::iterate(const std::function<void(int, backend::operand::IObject &)> &fn)
-{
-  for (auto &e : _objects)
-  {
-    fn(e.first, *e.second);
-  }
-}
-
-} // namespace operand
-} // namespace compiler
-} // namespace neurun
diff --git a/runtimes/neurun/src/compiler/operand/Context.h b/runtimes/neurun/src/compiler/operand/Context.h
deleted file mode 100644
index bc558404e..000000000
--- a/runtimes/neurun/src/compiler/operand/Context.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_COMPILER_OPERAND_CONTEXT_H__
-#define __NEURUN_COMPILER_OPERAND_CONTEXT_H__
-
-#include "backend/interface/operand/IObject.h"
-#include "model/operand/Index.h"
-
-#include <map>
-#include <memory>
-
-namespace neurun
-{
-namespace compiler
-{
-namespace operand
-{
-
-class Context
-{
-public:
-  Context &set(const model::operand::Index &ind,
-               const std::shared_ptr<backend::operand::IObject> &object);
-
-public:
-  bool exist(const ::neurun::model::operand::Index &ind) const
-  {
-    return _objects.find(ind.asInt()) != _objects.end();
-  }
-
-public:
-  std::shared_ptr<backend::operand::IObject> at(const model::operand::Index &ind) const
-  {
-    return _objects.at(ind.asInt());
-  }
-
-  std::shared_ptr<backend::operand::IObject> &at(const model::operand::Index &ind)
-  {
-    return _objects.at(ind.asInt());
-  }
-
-  void iterate(const std::function<void(int, backend::operand::IObject &)> &fn);
-
-private:
-  std::map<int, std::shared_ptr<backend::operand::IObject>> _objects;
-};
-
-} // namespace operand
-} // namespace compiler
-} // namespace neurun
-
-#endif // __NEURUN_COMPILER_OPERAND_CONTEXT_H__
diff --git a/runtimes/neurun/src/compiler/operation/Sequence.cc b/runtimes/neurun/src/compiler/operation/Sequence.cc
deleted file mode 100644
index 3160e04b6..000000000
--- a/runtimes/neurun/src/compiler/operation/Sequence.cc
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Sequence.h"
-
-namespace neurun
-{
-namespace compiler
-{
-namespace operation
-{
-
-// NO IMPLEMENTATION YET
-
-} // namespace operation
-} // namespace compiler
-} // namespace neurun
diff --git a/runtimes/neurun/src/compiler/operation/Sequence.h b/runtimes/neurun/src/compiler/operation/Sequence.h
deleted file mode 100644
index d69cfcfe3..000000000
--- a/runtimes/neurun/src/compiler/operation/Sequence.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_COMPILER_OPERATION_SEQUENCE_H__
-#define __NEURUN_COMPILER_OPERATION_SEQUENCE_H__
-#include <stdint.h>
-#include "exec/interface/IFunction.h"
-#include <memory>
-#include <vector>
-
-namespace neurun
-{
-namespace compiler
-{
-namespace operation
-{
-
-class Sequence
-{
-public:
-  uint32_t size(void) const { return _functions.size(); }
-
-public:
-  Sequence &append(std::unique_ptr<::neurun::exec::IFunction> &&func)
-  {
-    _functions.emplace_back(std::move(func));
-    return (*this);
-  }
-
-public:
-  ::neurun::exec::IFunction &at(uint32_t n) const { return *(_functions.at(n)); }
-
-private:
-  std::vector<std::unique_ptr<::neurun::exec::IFunction>> _functions;
-};
-
-} // namespace operation
-} // namespace compiler
-} // namespace neurun
-
-#endif // __NEURUN_COMPILER_OPERATION_SEQUENCE_H__
diff --git a/runtimes/neurun/src/dumper/dot/DotBuilder.cc b/runtimes/neurun/src/dumper/dot/DotBuilder.cc
deleted file mode 100644
index d694323b4..000000000
--- a/runtimes/neurun/src/dumper/dot/DotBuilder.cc
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "DotBuilder.h"
-
-namespace neurun
-{
-namespace dumper
-{
-namespace dot
-{
-
-// NodeAttr
-NodeAttr &NodeAttr::addAttr(const std::string &name, const std::string &attr)
-{
-  _attrs.emplace_back(name, attr);
-
-  return *this;
-}
-
-void NodeAttr::finish()
-{
-  _attr_stream << "[";
-  for (auto attr : _attrs)
-  {
-    _attr_stream << attr.first << "="
-                 << "\"" << attr.second << "\" ";
-  }
-  _attr_stream << "];\n";
-}
-
-// DotDumper
-DotBuilder::DotBuilder() {}
-
-void DotBuilder::update(const IDotInfo &node_info)
-{
-  addNode(node_info);
-  for (auto child : node_info.children())
-  {
-    addEdge(node_info, *child);
-  }
-}
-
-void DotBuilder::writeDot(std::ostream &os)
-{
-  os << "digraph D {\n"
-     << _dot.str() << "\n"
-     << "}\n";
-}
-
-void DotBuilder::addNode(const IDotInfo &dotinfo)
-{
-  NodeAttr attr;
-  attr.addAttr("shape", dotinfo.dot_shape())
-      .addAttr("label", dotinfo.label())
-      .addAttr("style", "filled")
-      .addAttr("colorscheme", dotinfo.bg_color_scheme())
-      .addAttr("fillcolor", dotinfo.bg_color());
-
-  attr.finish();
-
-  _dot << dotinfo.index_str() << attr.attr_stream();
-}
-
-void DotBuilder::addEdge(const IDotInfo &dotinfo1, const IDotInfo &dotinfo2)
-{
-  _dot << dotinfo1.index_str() << " -> " << dotinfo2.index_str() << ";\n";
-}
-
-} // namespace dot
-} // namespace dumper
-} // namespace neurun
diff --git a/runtimes/neurun/src/dumper/dot/DotBuilder.h b/runtimes/neurun/src/dumper/dot/DotBuilder.h
deleted file mode 100644
index 783e92b80..000000000
--- a/runtimes/neurun/src/dumper/dot/DotBuilder.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_DUMPER_DOT_DOT_BUILDER_H__
-#define __NEURUN_DUMPER_DOT_DOT_BUILDER_H__
-
-#include <sstream>
-
-#include "model/operation/Index.h"
-#include "model/operand/Index.h"
-
-#include "model/operation/Node.h"
-#include "model/operand/Object.h"
-
-#include "DotNodeInfo.h"
-#include "DotOperandInfo.h"
-
-using Node = neurun::model::operation::Node;
-using Object = neurun::model::operand::Object;
-
-namespace neurun
-{
-namespace dumper
-{
-namespace dot
-{
-
-class NodeAttr
-{
-public:
-  NodeAttr() = default;
-
-public:
-  void finish();
-  NodeAttr &addAttr(const std::string &name, const std::string &attr);
-
-public:
-  std::stringbuf *attr_stream() { return _attr_stream.rdbuf(); }
-
-private:
-  std::vector<std::pair<std::string, std::string>> _attrs;
-  std::stringstream _attr_stream;
-};
-
-class DotBuilder
-{
-public:
-  DotBuilder();
-
-public:
-  void update(const IDotInfo &dotinfo);
-
-  void writeDot(std::ostream &os);
-
-private:
-  void addNode(const IDotInfo &dotinfo);
-  void addEdge(const IDotInfo &dotinfo1, const IDotInfo &dotinfo2);
-
-  std::stringstream _dot;
-};
-
-} // namespace dot
-} // namespace dumper
-} // namespace neurun
-
-#endif // __NEURUN_DUMPER_DOT_DOT_BUILDER_H__
diff --git a/runtimes/neurun/src/dumper/dot/DotDumper.cc b/runtimes/neurun/src/dumper/dot/DotDumper.cc
deleted file mode 100644
index 1e53ece19..000000000
--- a/runtimes/neurun/src/dumper/dot/DotDumper.cc
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <fstream>
-
-#include "DotDumper.h"
-#include "DotBuilder.h"
-
-namespace neurun
-{
-namespace dumper
-{
-namespace dot
-{
-
-using namespace neurun::graph;
-
-void DotDumper::dumpIfNeeded(const std::string &tag)
-{
-  if (_option == OPTIONS::DUMP_OFF)
-  {
-    return;
-  }
-  neurun::dumper::dot::DotBuilder dot_builder;
-
-  auto &operations = _graph.operations();
-  auto &operands = _graph.operands();
-
-  operations.iterate([&](const model::operation::Index &index, const model::operation::Node &node) {
-    neurun::dumper::dot::DotNodeInfo node_info(_graph, index, node);
-
-    for (auto output : node.getOutputs())
-    {
-      using neurun::dumper::dot::DotOperandInfo;
-      auto child = std::make_shared<DotOperandInfo>(output, operands.at(output),
-                                                    DotOperandInfo::Type::MODEL_OUTPUT);
-      node_info.appendChild(child);
-    }
-
-    dot_builder.update(node_info);
-  });
-
-  operands.iterate([&](const model::operand::Index &index, const model::operand::Object &object) {
-    bool showing_cond = false;
-    auto usage = object.getUsage();
-    if (_option == OPTIONS::SHOW_CONSTANTS)
-    {
-      showing_cond = object.usageIsDefined();
-    }
-    else
-    {
-      showing_cond = (usage == model::operand::OperandUsage::MODEL_INPUT) ||
-                     (usage == model::operand::OperandUsage::OPERATION_OUTPUT);
-    }
-    if (usage != model::operand::OperandUsage::OPERATION_OUTPUT)
-    {
-      showing_cond = showing_cond && (object.getUses().size() > 0);
-    }
-    if (showing_cond)
-    {
-      auto type = [&]() {
-        using neurun::dumper::dot::DotOperandInfo;
-        if (_graph.getInputs().contains(index))
-          return DotOperandInfo::Type::MODEL_INPUT;
-        if (_graph.getOutputs().contains(index))
-          return DotOperandInfo::Type::MODEL_OUTPUT;
-        return DotOperandInfo::Type::INTERNAL;
-      }();
-
-      neurun::dumper::dot::DotOperandInfo operand_info(index, object, type);
-
-      for (auto operation_index : object.getUses().list())
-      {
-        auto &node = operations.at(operation_index);
-        auto child =
-            std::make_shared<neurun::dumper::dot::DotNodeInfo>(_graph, operation_index, node);
-        operand_info.appendChild(child);
-      }
-
-      dot_builder.update(operand_info);
-    }
-  });
-
-  // Dump to file
-  {
-    std::string file_name;
-    file_name += tag;
-    file_name += ".dot";
-    std::filebuf fb;
-
-    fb.open(file_name, std::ios::out);
-    std::ostream os(&fb);
-
-    dot_builder.writeDot(os);
-
-    fb.close();
-  }
-}
-
-} // namespace dot
-} // namespace dumper
-} // namespace neurun
diff --git a/runtimes/neurun/src/dumper/dot/DotDumper.h b/runtimes/neurun/src/dumper/dot/DotDumper.h
deleted file mode 100644
index 0c0a9b8df..000000000
--- a/runtimes/neurun/src/dumper/dot/DotDumper.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "graph/Graph.h"
-#include "util/config/ConfigManager.h"
-
-#ifndef __NEURUN_DUMPER_DOT_DOT_DUMPER_H__
-#define __NEURUN_DUMPER_DOT_DOT_DUMPER_H__
-
-namespace neurun
-{
-namespace dumper
-{
-namespace dot
-{
-
-enum OPTIONS
-{
-  DUMP_OFF = 0,  // Don't dump
-  DEFAULT = 1,   // Show default dot graph
-  SHOW_CONSTANTS // Show dot graph with input constants
-};
-
-class DotDumper
-{
-public:
-  DotDumper(const neurun::graph::Graph &graph) : _graph(graph)
-  {
-    _option = config::ConfigManager::instance().get<int>("GRAPH_DOT_DUMP");
-  }
-
-public:
-  /**
-   * @brief Dump to dot file as tag name if "GRAPH_DOT_DUMP" is set
-   *
-   * @param[in] tag    The name of dot file that would be created
-   * @return N/A
-   */
-  void dumpIfNeeded(const std::string &tag);
-
-private:
-  const neurun::graph::Graph &_graph;
-  uint32_t _option;
-};
-
-} // namespace dot
-} // namespace dumper
-} // namespace neurun
-
-#endif // __NEURUN_DUMPER_DOT_DOT_DUMPER_H__
diff --git a/runtimes/neurun/src/dumper/dot/DotNodeInfo.cc b/runtimes/neurun/src/dumper/dot/DotNodeInfo.cc
deleted file mode 100644
index aefe12e2a..000000000
--- a/runtimes/neurun/src/dumper/dot/DotNodeInfo.cc
+++ /dev/null
@@ -1,108 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <sstream>
-
-#include "DotNodeInfo.h"
-#include "graph/Graph.h"
-#include "graph/operation/LowerInfo.h"
-#include "backend/interface/IConfig.h"
-
-namespace neurun
-{
-namespace dumper
-{
-namespace dot
-{
-
-const std::string DotNodeInfo::NODE_SHAPE = "rect";
-const std::string DotNodeInfo::BG_COLOR_SCHEME = "pastel18";
-// RED BLUE ORANGE YELLOW GREEN PUPLE CYAN PINK
-const std::string DotNodeInfo::BG_COLORS[8] = {"1", "2", "5", "6", "3", "4", "7", "8"};
-
-DotNodeInfo::DotNodeInfo(const neurun::graph::Graph &graph,
-                         const neurun::model::operation::Index &index,
-                         const neurun::model::operation::Node &node)
-    : _index(index), _node(node), _lower_info(graph.getLowerInfo(index))
-{
-  addBackendLabel();
-}
-
-std::string DotNodeInfo::index_str() const
-{
-  std::stringstream ss;
-  ss << "node" << _index.value();
-
-  return ss.str();
-}
-
-std::string DotNodeInfo::label() const
-{
-  std::stringstream ss;
-  ss << _index.value() << " : " << _node.getName() << std::endl;
-  for (auto label : _labels)
-  {
-    ss << label << std::endl;
-  }
-
-  return ss.str();
-}
-
-std::string DotNodeInfo::dot_shape() const { return NODE_SHAPE; }
-
-std::string DotNodeInfo::bg_color_scheme() const { return BG_COLOR_SCHEME; }
-
-std::string DotNodeInfo::bg_color() const
-{
-  if (!_lower_info)
-    return DEFAULT_BG_COLOR;
-  assert(_lower_info != nullptr);
-  const auto &backend = _lower_info->backend();
-  assert(backend != nullptr);
-
-  std::string backend_id = backend->config()->id();
-  // TODO : This is just workaround it can be made more efficient.
-  if (backend_id == "acl_cl")
-  {
-    return BG_COLORS[RED];
-  }
-  else if (backend_id == "cpu")
-  {
-    return BG_COLORS[BLUE];
-  }
-  else
-  {
-    return DEFAULT_BG_COLOR;
-  }
-}
-
-void DotNodeInfo::addBackendLabel()
-{
-  if (!_lower_info)
-    return;
-
-  std::string label;
-  const auto &backend = _lower_info->backend();
-  assert(backend != nullptr);
-
-  label += "[Backend] : ";
-  label += backend->config()->id();
-  _labels.emplace_back(label);
-}
-
-} // namespace dot
-} // namespace dumper
-} // namespace neurun
diff --git a/runtimes/neurun/src/dumper/dot/DotNodeInfo.h b/runtimes/neurun/src/dumper/dot/DotNodeInfo.h
deleted file mode 100644
index 656a05af6..000000000
--- a/runtimes/neurun/src/dumper/dot/DotNodeInfo.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_DUMPER_DOT_DOT_NODE_INFO_H__
-#define __NEURUN_DUMPER_DOT_DOT_NODE_INFO_H__
-
-#include "IDotInfo.h"
-#include "model/operation/Node.h"
-#include "model/operation/Index.h"
-
-namespace neurun
-{
-namespace graph
-{
-class Graph;
-} // namespace graph
-} // namespace neurun
-
-namespace neurun
-{
-namespace dumper
-{
-namespace dot
-{
-
-class DotNodeInfo : public IDotInfo
-{
-public:
-  static const std::string NODE_SHAPE;
-  static const std::string BG_COLOR_SCHEME;
-  static const std::string BG_COLORS[8];
-
-public:
-  DotNodeInfo(const neurun::graph::Graph &graph, const neurun::model::operation::Index &index,
-              const neurun::model::operation::Node &node);
-
-public:
-  virtual std::string index_str() const override;
-  virtual std::string label() const override;
-  virtual std::string dot_shape() const override;
-  virtual std::string bg_color_scheme() const override;
-  virtual std::string bg_color() const override;
-
-private:
-  void addBackendLabel();
-
-private:
-  neurun::model::operation::Index _index;
-  const neurun::model::operation::Node &_node;
-  const neurun::graph::operation::LowerInfo *_lower_info;
-  std::vector<std::string> _labels;
-};
-
-} // namespace dot
-} // namespace dumper
-} // namespace neurun
-
-#endif // __NEURUN_DUMPER_DOT_DOT_NODE_INFO_H__
diff --git a/runtimes/neurun/src/dumper/dot/DotOperandInfo.cc b/runtimes/neurun/src/dumper/dot/DotOperandInfo.cc
deleted file mode 100644
index 8f5905020..000000000
--- a/runtimes/neurun/src/dumper/dot/DotOperandInfo.cc
+++ /dev/null
@@ -1,129 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <sstream>
-
-#include "DotOperandInfo.h"
-#include "graph/operand/LowerInfo.h"
-#include "backend/interface/IConfig.h"
-#include "backend/BackendManager.h"
-
-namespace neurun
-{
-namespace dumper
-{
-namespace dot
-{
-
-const std::string DotOperandInfo::INPUT_SHAPE = "doublecircle";
-const std::string DotOperandInfo::OUTPUT_SHAPE = "doublecircle";
-const std::string DotOperandInfo::OPERAND_SHAPE = "ellipse";
-const std::string DotOperandInfo::BG_COLOR_SCHEME = "set38";
-// RED BLUE ORANGE YELLOW GREEN PUPLE CYAN PINK
-const std::string DotOperandInfo::BG_COLORS[8] = {"4", "5", "6", "2", "7", "3", "1", "8"};
-
-DotOperandInfo::DotOperandInfo(const neurun::model::operand::Index &index,
-                               const neurun::model::operand::Object &object, Type type)
-    : _index(index), _object(object), _type(type)
-{
-  const auto &lower_info = object.lower_info();
-  if (lower_info)
-  {
-    addBackendLabel();
-  }
-}
-
-std::string DotOperandInfo::index_str() const
-{
-  std::stringstream ss;
-  ss << "obj" << _index.value();
-
-  return ss.str();
-}
-
-std::string DotOperandInfo::label() const
-{
-  std::stringstream ss;
-  ss << _index.value() << std::endl;
-  for (auto label : _labels)
-  {
-    ss << label << std::endl;
-  }
-
-  return ss.str();
-}
-
-std::string DotOperandInfo::dot_shape() const
-{
-  switch (_type)
-  {
-    case Type::MODEL_INPUT:
-      return INPUT_SHAPE;
-
-    case Type::MODEL_OUTPUT:
-      return OUTPUT_SHAPE;
-
-    case Type::UNDEFINED:
-    case Type::INTERNAL:
-    default:
-      return OPERAND_SHAPE;
-  }
-}
-
-std::string DotOperandInfo::bg_color_scheme() const { return BG_COLOR_SCHEME; }
-
-std::string DotOperandInfo::bg_color() const
-{
-  const auto &lower_info = _object.lower_info();
-  if (!lower_info)
-    return DEFAULT_BG_COLOR;
-  assert(lower_info != nullptr);
-  const auto &def_backends = lower_info->def_backends();
-  assert(def_backends.size() == 1);
-
-  std::string backend_id = def_backends.getOnlyElement()->config()->id();
-  // TODO : This is just workaround it can be made more efficient.
-  if (backend_id == "acl_cl")
-  {
-    return BG_COLORS[RED];
-  }
-  else if (backend_id == "cpu")
-  {
-    return BG_COLORS[BLUE];
-  }
-  else
-  {
-    return DEFAULT_BG_COLOR;
-  }
-}
-
-void DotOperandInfo::addBackendLabel()
-{
-  std::string label;
-  const auto &lower_info = _object.lower_info();
-  assert(lower_info != nullptr);
-  const auto &def_backends = lower_info->def_backends();
-  assert(def_backends.size() == 1);
-
-  label += "[";
-  label += def_backends.getOnlyElement()->config()->id();
-  label += "]";
-  _labels.emplace_back(label);
-}
-
-} // namespace dot
-} // namespace dumper
-} // namespace neurun
diff --git a/runtimes/neurun/src/dumper/dot/DotOperandInfo.h b/runtimes/neurun/src/dumper/dot/DotOperandInfo.h
deleted file mode 100644
index c54da444d..000000000
--- a/runtimes/neurun/src/dumper/dot/DotOperandInfo.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_DUMPER_DOT_DOT_OPERAND_INFO_H__
-#define __NEURUN_DUMPER_DOT_DOT_OPERAND_INFO_H__
-
-#include <vector>
-
-#include "IDotInfo.h"
-#include "model/operand/Object.h"
-#include "model/operand/Index.h"
-
-namespace neurun
-{
-namespace dumper
-{
-namespace dot
-{
-
-class DotOperandInfo : public IDotInfo
-{
-public:
-  enum class Type
-  {
-    UNDEFINED,
-    MODEL_INPUT,
-    MODEL_OUTPUT,
-    INTERNAL
-  };
-
-public:
-  static const std::string INPUT_SHAPE;
-  static const std::string OUTPUT_SHAPE;
-  static const std::string OPERAND_SHAPE;
-  static const std::string BG_COLOR_SCHEME;
-  static const std::string BG_COLORS[8];
-
-public:
-  DotOperandInfo(const neurun::model::operand::Index &index,
-                 const neurun::model::operand::Object &object, Type type);
-
-public:
-  virtual std::string index_str() const override;
-  virtual std::string label() const override;
-  virtual std::string dot_shape() const override;
-  virtual std::string bg_color_scheme() const override;
-  virtual std::string bg_color() const override;
-
-private:
-  void addBackendLabel();
-
-private:
-  const neurun::model::operand::Index &_index;
-  const neurun::model::operand::Object &_object;
-  Type _type;
-
-  std::vector<std::string> _labels;
-};
-
-} // namespace dot
-} // namespace dumper
-} // namespace neurun
-
-#endif // __NEURUN_DUMPER_DOT_DOT_OPERAND_INFO_H__
diff --git a/runtimes/neurun/src/dumper/dot/IDotInfo.h b/runtimes/neurun/src/dumper/dot/IDotInfo.h
deleted file mode 100644
index d507e724a..000000000
--- a/runtimes/neurun/src/dumper/dot/IDotInfo.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_DUMPER_DOT_IDOTINFO_H__
-#define __NEURUN_DUMPER_DOT_IDOTINFO_H__
-
-#include <string>
-#include <memory>
-#include <vector>
-
-namespace neurun
-{
-namespace dumper
-{
-namespace dot
-{
-
-#define DEFAULT_BG_COLOR_SCHEME "x11"
-#define DEFAULT_BG_COLOR "white"
-
-enum BGCOLORS : int
-{
-  RED,
-  BLUE,
-  ORANGE,
-  YELLOW,
-  GREEN,
-  PUPLE,
-  CYAN,
-  PINK
-};
-
-struct IDotInfo
-{
-  virtual ~IDotInfo() = default;
-
-  virtual std::string index_str() const = 0;
-  virtual std::string label() const = 0;
-  virtual std::string dot_shape() const = 0;
-  virtual std::string bg_color_scheme() const { return DEFAULT_BG_COLOR_SCHEME; }
-  virtual std::string bg_color() const { return DEFAULT_BG_COLOR; }
-
-  void appendChild(std::shared_ptr<IDotInfo> dotinfo) { _children.emplace_back(dotinfo); }
-  const std::vector<std::shared_ptr<IDotInfo>> &children() const { return _children; }
-
-private:
-  std::vector<std::shared_ptr<IDotInfo>> _children;
-};
-
-} // namespace dot
-} // namespace dumper
-} // namespace neurun
-
-#endif // __NEURUN_DUMPER_DOT_IDOTINFO_H__
diff --git a/runtimes/neurun/src/exec/Sink.h b/runtimes/neurun/src/exec/Sink.h
deleted file mode 100644
index fe23e8ac3..000000000
--- a/runtimes/neurun/src/exec/Sink.h
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_EXEC_SINK_H__
-#define __NEURUN_EXEC_SINK_H__
-
-#include <cassert>
-
-#include "cpp14/memory.h"
-#include "util/feature/nhwc/View.h"
-#include "util/feature/nchw/View.h"
-#include <misc/feature/IndexIterator.h>
-
-namespace neurun
-{
-namespace exec
-{
-
-struct ISink
-{
-  virtual ~ISink() = default;
-
-  virtual void pull(::neurun::backend::operand::ITensor &tensor) const = 0;
-};
-
-template <typename T> class Sink final : public ISink
-{
-public:
-  Sink(T *base, const size_t size) : _base{base}, _size{size} {}
-
-public:
-  void pull(::neurun::backend::operand::ITensor &tensor) const override
-  {
-    memcpy(_base, tensor.buffer(), _size);
-  }
-
-private:
-  T *const _base;
-  const size_t _size;
-};
-
-class PermutateSink final : public ISink
-{
-public:
-  PermutateSink(void *output_buffer, const size_t &output_size, const model::operand::Shape &shape)
-      : _output_buffer{(uint8_t *)output_buffer}, _output_size{output_size}, _shape{shape}
-  {
-  }
-
-public:
-  void pull(neurun::backend::operand::ITensor &tensor) const override
-  {
-    // do NCHW_TO_NHWC permutation
-    auto input_buffer = tensor.buffer();
-    auto rank = _shape.rank();
-
-    switch (rank)
-    {
-      case 0:
-      case 1:
-      {
-        memcpy(_output_buffer, input_buffer, _output_size);
-        break;
-      }
-      case 2:
-      {
-        auto matrix_shape = _shape.asMatrix();
-
-        for (auto h = 0; h < matrix_shape.H; ++h)
-        {
-          neurun::util::feature::Coordinate4D coord{0, h, 0, 0};
-          memcpy(_output_buffer + h * matrix_shape.W, input_buffer + tensor.calcOffset(coord),
-                 matrix_shape.W * sizeof(float));
-        }
-        break;
-      }
-      case 3:
-      {
-        const int32_t depth = _shape.dim(0);
-        const int32_t height = _shape.dim(1);
-        const int32_t width = _shape.dim(2);
-
-        for (auto c = 0; c < depth; ++c)
-        {
-          for (auto h = 0; h < height; ++h)
-          {
-            neurun::util::feature::Coordinate4D coord{0, h, 0, c};
-            memcpy(_output_buffer + c * height * width + h * width,
-                   input_buffer + tensor.calcOffset(coord), width * sizeof(float));
-          }
-        }
-        break;
-      }
-      case 4:
-      {
-        auto feature = _shape.asFeature();
-
-        const util::feature::nchw::View<float> from{&tensor};
-        util::feature::nhwc::View<float> into{feature, reinterpret_cast<float *>(_output_buffer),
-                                              _output_size};
-
-        ::nnfw::misc::feature::iterate(feature)
-            << [&](uint32_t batch, uint32_t ch, uint32_t row, uint32_t col) {
-                 const auto value = from.at(batch, ch, row, col);
-                 into.at(batch, ch, row, col) = value;
-               };
-        break;
-      }
-      default:
-        throw "NYI";
-        break;
-    }
-  }
-
-private:
-  uint8_t *_output_buffer;
-  const size_t _output_size;
-  const model::operand::Shape _shape;
-};
-
-} // namespace exec
-} // namespace neurun
-
-#endif // __NEURUN_EXEC_SINK_H__
diff --git a/runtimes/neurun/src/exec/Source.h b/runtimes/neurun/src/exec/Source.h
deleted file mode 100644
index 169f8b386..000000000
--- a/runtimes/neurun/src/exec/Source.h
+++ /dev/null
@@ -1,139 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_EXEC_SOURCE_H__
-#define __NEURUN_EXEC_SOURCE_H__
-
-#include <cassert>
-
-#include "cpp14/memory.h"
-#include "util/feature/nchw/View.h"
-#include "util/feature/nhwc/Reader.h"
-#include "util/feature/Coordinate4D.h"
-#include <misc/feature/IndexIterator.h>
-
-namespace neurun
-{
-namespace exec
-{
-
-struct ISource
-{
-  virtual ~ISource() = default;
-
-  virtual void push(::neurun::backend::operand::ITensor &tensor) const = 0;
-};
-
-template <typename T> class Source final : public ISource
-{
-public:
-  Source(const T *base, const size_t size) : _base{base}, _size{size} {}
-
-public:
-  void push(::neurun::backend::operand::ITensor &tensor) const override
-  {
-    memcpy(tensor.buffer(), _base, _size);
-  }
-
-private:
-  const T *const _base;
-  const size_t _size;
-};
-
-class PermutateSource final : public ISource
-{
-public:
-  PermutateSource(const void *input_buffer, const size_t &input_size,
-                  const model::operand::Shape &shape)
-      : _input_buffer{(uint8_t *)input_buffer}, _input_size{input_size}, _shape{shape}
-  {
-  }
-
-public:
-  void push(neurun::backend::operand::ITensor &tensor) const override
-  {
-    // do NHWC_TO_NCHW permutation
-    auto output_buffer = tensor.buffer();
-    auto rank = _shape.rank();
-
-    switch (rank)
-    {
-      case 0:
-      case 1:
-      {
-        memcpy(output_buffer, _input_buffer, _input_size);
-        break;
-      }
-      case 2:
-      {
-        auto matrix_shape = _shape.asMatrix();
-
-        for (auto h = 0; h < matrix_shape.H; ++h)
-        {
-          neurun::util::feature::Coordinate4D coord{0, h, 0, 0};
-          memcpy(output_buffer + tensor.calcOffset(coord), _input_buffer + h * matrix_shape.W,
-                 matrix_shape.W * sizeof(float));
-        }
-        break;
-      }
-      case 3:
-      {
-        const int32_t depth = _shape.dim(0);
-        const int32_t height = _shape.dim(1);
-        const int32_t width = _shape.dim(2);
-
-        for (auto c = 0; c < depth; ++c)
-        {
-          for (auto h = 0; h < height; ++h)
-          {
-            neurun::util::feature::Coordinate4D coord{0, h, 0, c};
-            memcpy(output_buffer + tensor.calcOffset(coord),
-                   _input_buffer + c * height * width + h * width, width * sizeof(float));
-          }
-        }
-        break;
-      }
-      case 4:
-      {
-        auto feature = _shape.asFeature();
-
-        const util::feature::nhwc::Reader<float> from{
-            feature, reinterpret_cast<const float *>(_input_buffer), _input_size};
-        util::feature::nchw::View<float> into{&tensor};
-
-        ::nnfw::misc::feature::iterate(feature)
-            << [&](uint32_t batch, uint32_t ch, uint32_t row, uint32_t col) {
-                 const auto value = from.at(batch, ch, row, col);
-                 into.at(batch, ch, row, col) = value;
-               };
-        break;
-      }
-      default:
-        throw "NYI";
-        break;
-    }
-  }
-
-private:
-  const uint8_t *_input_buffer;
-  const size_t _input_size;
-  const model::operand::Shape _shape;
-};
-
-} // namespace exec
-} // namespace neurun
-
-#endif // __NEURUN_EXEC_SOURCE_H__
diff --git a/runtimes/neurun/src/exec/interface/IFunction.h b/runtimes/neurun/src/exec/interface/IFunction.h
deleted file mode 100644
index b7a721d1d..000000000
--- a/runtimes/neurun/src/exec/interface/IFunction.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_EXEC_I_FUNCTION_H__
-#define __NEURUN_EXEC_I_FUNCTION_H__
-
-namespace neurun
-{
-namespace exec
-{
-
-class IFunction
-{
-public:
-  virtual ~IFunction() = default;
-  virtual void run() = 0;
-  virtual void prepare() {}
-};
-
-} // namespace exec
-} // namespace neurun
-
-#endif // __NEURUN_EXEC_I_FUNCTION_H__
diff --git a/runtimes/neurun/src/frontend/compilation.cc b/runtimes/neurun/src/frontend/compilation.cc
deleted file mode 100644
index 9b0719f46..000000000
--- a/runtimes/neurun/src/frontend/compilation.cc
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <NeuralNetworks.h>
-
-#include <new>
-
-#include "frontend/wrapper/model.h"
-#include "frontend/wrapper/compilation.h"
-
-//
-// NNAPI Implementation
-//
-int ANeuralNetworksCompilation_create(ANeuralNetworksModel *model,
-                                      ANeuralNetworksCompilation **compilation)
-{
-  if ((model == nullptr) || (compilation == nullptr))
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  if (!model->isFinished())
-  {
-    return ANEURALNETWORKS_BAD_STATE;
-  }
-
-  std::shared_ptr<neurun::graph::Graph> internal;
-
-  model->release(internal);
-
-  *compilation = new (std::nothrow) ANeuralNetworksCompilation(internal);
-  if (*compilation == nullptr)
-  {
-    return ANEURALNETWORKS_OUT_OF_MEMORY;
-  }
-
-  return ANEURALNETWORKS_NO_ERROR;
-}
-
-int ANeuralNetworksCompilation_finish(ANeuralNetworksCompilation *compilation)
-{
-  if (compilation == nullptr)
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  return compilation->finish();
-}
-
-void ANeuralNetworksCompilation_free(ANeuralNetworksCompilation *compilation)
-{
-  delete compilation;
-}
-
-int ANeuralNetworksCompilation_setPreference(ANeuralNetworksCompilation *compilation,
-                                             int32_t /* preference */)
-{
-  if (compilation == nullptr)
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  // NYi
-  return ANEURALNETWORKS_NO_ERROR;
-}
diff --git a/runtimes/neurun/src/frontend/event.cc b/runtimes/neurun/src/frontend/event.cc
deleted file mode 100644
index cd47cc691..000000000
--- a/runtimes/neurun/src/frontend/event.cc
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <NeuralNetworks.h>
-
-#include "frontend/wrapper/event.h"
-
-int ANeuralNetworksEvent_wait(ANeuralNetworksEvent *event)
-{
-  if (event == nullptr)
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  return ANEURALNETWORKS_NO_ERROR;
-}
-
-void ANeuralNetworksEvent_free(ANeuralNetworksEvent *event) { delete event; }
diff --git a/runtimes/neurun/src/frontend/execution.cc b/runtimes/neurun/src/frontend/execution.cc
deleted file mode 100644
index 5f1729b30..000000000
--- a/runtimes/neurun/src/frontend/execution.cc
+++ /dev/null
@@ -1,328 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <NeuralNetworks.h>
-
-#include <new>
-
-#include "frontend/wrapper/compilation.h"
-#include "frontend/wrapper/execution.h"
-#include "frontend/wrapper/event.h"
-
-#include "model/operand/DataType.h"
-#include "model/operand/Index.h"
-#include "graph/operand/Layout.h"
-#include "backend/BackendManager.h"
-#include "backend/interface/IConfig.h"
-#include "compiler/BackendResolver.h"
-#include "compiler/TensorInfo.h"
-#include "backend/interface/operand/ITensor.h"
-
-inline void source(ANeuralNetworksExecution *execution,
-                   const ::neurun::model::operand::DataType &type, int32_t index,
-                   const void *buffer, size_t length)
-{
-  const auto &operands = execution->plan().model().operands();
-  neurun::model::operand::IO::Index input_index{index};
-
-  const auto operand_index = execution->plan().model().getInputs().at(input_index);
-  auto operand = &operands.at(operand_index);
-  auto operand_li = operand->lower_info();
-  const auto output_backend = operand_li->def_backends().getOnlyElement();
-  const auto output_layout = output_backend->config()->getOperandLayout();
-  auto input_layout = execution->plan()
-                          .model()
-                          .backend_resolver()
-                          ->getDefaultBackend()
-                          ->config()
-                          ->getOperandLayout();
-  if (input_layout == neurun::graph::operand::Layout::NHWC &&
-      output_layout == neurun::graph::operand::Layout::NCHW)
-  {
-    const auto tensor_info = neurun::compiler::TensorInfo(operand->shape(), operand->typeInfo());
-
-    execution->source<::neurun::exec::PermutateSource>(index, buffer, tensor_info.total_size(),
-                                                       operand->shape());
-    return;
-  }
-  using ::neurun::model::operand::DataType;
-  switch (type)
-  {
-    case DataType::SCALAR_FLOAT32:
-    case DataType::TENSOR_FLOAT32:
-      execution->source<::neurun::exec::Source<float>>(
-          index, reinterpret_cast<const float *>(buffer), length);
-      break;
-    case DataType::SCALAR_INT32:
-    case DataType::TENSOR_INT32:
-      execution->source<::neurun::exec::Source<int32_t>>(
-          index, reinterpret_cast<const int32_t *>(buffer), length);
-      break;
-    case DataType::SCALAR_UINT32:
-      execution->source<::neurun::exec::Source<uint32_t>>(
-          index, reinterpret_cast<const uint32_t *>(buffer), length);
-      break;
-    case DataType::TENSOR_QUANT8_ASYMM:
-      execution->source<::neurun::exec::Source<uint8_t>>(
-          index, reinterpret_cast<const uint8_t *>(buffer), length);
-      break;
-    default:
-      throw std::runtime_error("Not supported, yet");
-      break;
-  }
-}
-
-inline void sink(ANeuralNetworksExecution *execution,
-                 const ::neurun::model::operand::DataType &type, int32_t index, void *buffer,
-                 size_t length)
-{
-  const auto &operands = execution->plan().model().operands();
-  neurun::model::operand::IO::Index input_index{index};
-
-  const auto operand_index = execution->plan().model().getOutputs().at(input_index);
-  auto operand = &operands.at(operand_index);
-  auto operand_li = operand->lower_info();
-  const auto input_backend = operand_li->def_backends().getOnlyElement();
-  const auto input_layout = input_backend->config()->getOperandLayout();
-  auto output_layout = execution->plan()
-                           .model()
-                           .backend_resolver()
-                           ->getDefaultBackend()
-                           ->config()
-                           ->getOperandLayout();
-  if (input_layout == neurun::graph::operand::Layout::NCHW &&
-      output_layout == neurun::graph::operand::Layout::NHWC)
-  {
-    const auto tensor_info = neurun::compiler::TensorInfo(operand->shape(), operand->typeInfo());
-
-    execution->sink<::neurun::exec::PermutateSink>(index, buffer, tensor_info.total_size(),
-                                                   operand->shape());
-    return;
-  }
-  using ::neurun::model::operand::DataType;
-  switch (type)
-  {
-    case DataType::SCALAR_FLOAT32:
-    case DataType::TENSOR_FLOAT32:
-      execution->sink<::neurun::exec::Sink<float>>(index, reinterpret_cast<float *>(buffer),
-                                                   length);
-      break;
-    case DataType::SCALAR_INT32:
-    case DataType::TENSOR_INT32:
-      execution->sink<::neurun::exec::Sink<int32_t>>(index, reinterpret_cast<int32_t *>(buffer),
-                                                     length);
-      break;
-    case DataType::SCALAR_UINT32:
-      execution->sink<::neurun::exec::Sink<uint32_t>>(index, reinterpret_cast<uint32_t *>(buffer),
-                                                      length);
-      break;
-    case DataType::TENSOR_QUANT8_ASYMM:
-      execution->sink<::neurun::exec::Sink<uint8_t>>(index, reinterpret_cast<uint8_t *>(buffer),
-                                                     length);
-      break;
-    default:
-      throw std::runtime_error("Not supported, yet");
-      break;
-  }
-}
-
-//
-// NNAPI Implementation
-//
-int ANeuralNetworksExecution_create(ANeuralNetworksCompilation *compilation,
-                                    ANeuralNetworksExecution **execution)
-{
-  if ((compilation == nullptr) || (execution == nullptr))
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  // Can handle compiled state only
-  if (compilation->plan().state() != neurun::compiler::State::COMPILED)
-  {
-    return ANEURALNETWORKS_BAD_STATE;
-  }
-
-  std::shared_ptr<const neurun::compiler::Plan> plan;
-
-  compilation->publish(plan);
-
-  *execution = new (std::nothrow) ANeuralNetworksExecution{plan};
-  if (*execution == nullptr)
-  {
-    return ANEURALNETWORKS_OUT_OF_MEMORY;
-  }
-
-  return ANEURALNETWORKS_NO_ERROR;
-}
-
-int ANeuralNetworksExecution_setInput(ANeuralNetworksExecution *execution, int32_t index,
-                                      const ANeuralNetworksOperandType * /* type */,
-                                      const void *buffer, size_t length)
-{
-  // Don't check type
-  // Comment about ANeuralNetworksOperandType in NeuralNetworks.h:
-  //  If the input or output is optional and omitted then it need not have a fully specified tensor
-  //  operand type
-  if ((execution == nullptr) || ((buffer == nullptr) && (length != 0)))
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  // TODO Handle optional input
-  if (buffer == nullptr)
-  {
-    throw std::runtime_error("Not supported optional input, yet");
-  }
-
-  const auto &operands = execution->plan().model().operands();
-
-  // TODO Check type conflicts
-
-  neurun::model::operand::IO::Index input_index{index};
-
-  const auto operand_index = execution->plan().model().getInputs().at(input_index);
-  const auto data_type = operands.at(operand_index).typeInfo().type();
-  const auto operand_shape = operands.at(operand_index).shape();
-
-  source(execution, data_type, index, buffer, length);
-
-  return ANEURALNETWORKS_NO_ERROR;
-}
-
-int ANeuralNetworksExecution_setOutput(ANeuralNetworksExecution *execution, int32_t index,
-                                       const ANeuralNetworksOperandType * /* type */, void *buffer,
-                                       size_t length)
-{
-  // Don't check type
-  // Comment about ANeuralNetworksOperandType in NeuralNetworks.h:
-  //  If the input or output is optional and omitted then it need not have a fully specified tensor
-  //  operand type
-  if ((execution == nullptr) || ((buffer == nullptr) && (length != 0)))
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  // Handle optional output
-  if (buffer == nullptr)
-  {
-    return ANEURALNETWORKS_NO_ERROR;
-  }
-
-  const auto &operands = execution->plan().model().operands();
-
-  // TODO Check type conflicts
-
-  neurun::model::operand::IO::Index output_index{index};
-
-  const auto operand_index = execution->plan().model().getOutputs().at(output_index);
-  const auto data_type = operands.at(operand_index).typeInfo().type();
-  const auto operand_shape = operands.at(operand_index).shape();
-
-  sink(execution, data_type, index, buffer, length);
-
-  return ANEURALNETWORKS_NO_ERROR;
-}
-
-int ANeuralNetworksExecution_startCompute(ANeuralNetworksExecution *execution,
-                                          ANeuralNetworksEvent **event)
-{
-  if ((execution == nullptr) || (event == nullptr))
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  // TODO: Handle event
-  *event = new (std::nothrow) ANeuralNetworksEvent{};
-  if (*event == nullptr)
-  {
-    return ANEURALNETWORKS_OUT_OF_MEMORY;
-  }
-
-  const auto &plan = execution->plan();
-  const auto &model = plan.model();
-
-  // Set input(s)
-  for (uint32_t n = 0; n < model.getInputs().size(); ++n)
-  {
-    auto setter = [&](::neurun::backend::operand::ITensor &tensor) {
-      execution->source(n).push(tensor);
-    };
-
-    neurun::model::operand::IO::Index input_index{n};
-
-    ::neurun::model::operand::Index index{model.getInputs().at(input_index)};
-    auto object = plan.operands().at(index);
-
-    object->access(setter);
-  }
-
-  const auto &operations = execution->plan().operations();
-
-  for (uint32_t n = 0; n < operations.size(); ++n)
-  {
-    operations.at(n).run();
-  }
-
-  // Get output(s)
-  for (uint32_t n = 0; n < model.getOutputs().size(); ++n)
-  {
-    auto getter = [&](::neurun::backend::operand::ITensor &tensor) {
-      execution->sink(n).pull(tensor);
-    };
-
-    neurun::model::operand::IO::Index output_index{n};
-
-    ::neurun::model::operand::Index index{model.getOutputs().at(output_index)};
-    auto object = plan.operands().at(index);
-
-    object->access(getter);
-  }
-
-  return ANEURALNETWORKS_NO_ERROR;
-}
-
-void ANeuralNetworksExecution_free(ANeuralNetworksExecution * /* execution */) {}
-
-int ANeuralNetworksExecution_setInputFromMemory(ANeuralNetworksExecution *execution,
-                                                int32_t /* index */,
-                                                const ANeuralNetworksOperandType * /* type */,
-                                                const ANeuralNetworksMemory *memory,
-                                                size_t /* offset */, size_t /* length */)
-{
-  if ((execution == nullptr) || (memory == nullptr))
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  // NYI
-  return ANEURALNETWORKS_NO_ERROR;
-}
-
-int ANeuralNetworksExecution_setOutputFromMemory(ANeuralNetworksExecution *execution,
-                                                 int32_t /* index */,
-                                                 const ANeuralNetworksOperandType * /* type */,
-                                                 const ANeuralNetworksMemory *memory,
-                                                 size_t /* offset */, size_t /* length */)
-{
-  if ((execution == nullptr) || (memory == nullptr))
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  // NYI
-  return ANEURALNETWORKS_NO_ERROR;
-}
diff --git a/runtimes/neurun/src/frontend/memory.cc b/runtimes/neurun/src/frontend/memory.cc
deleted file mode 100644
index b2f6ab2d0..000000000
--- a/runtimes/neurun/src/frontend/memory.cc
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <NeuralNetworks.h>
-#include <sys/mman.h>
-#include <new>
-#include <memory>
-
-#include "cpp14/memory.h"
-#include "frontend/wrapper/memory.h"
-
-int ANeuralNetworksMemory_createFromFd(size_t size, int protect, int fd, size_t offset,
-                                       ANeuralNetworksMemory **memory)
-{
-  if (memory == nullptr)
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  // Use unique pointer to avoid memory leak
-  std::unique_ptr<ANeuralNetworksMemory> memory_ptr =
-      nnfw::cpp14::make_unique<ANeuralNetworksMemory>(size, protect, fd, offset);
-  if (memory_ptr == nullptr)
-  {
-    return ANEURALNETWORKS_OUT_OF_MEMORY;
-  }
-  *memory = memory_ptr.release();
-
-  return ANEURALNETWORKS_NO_ERROR;
-}
-
-void ANeuralNetworksMemory_free(ANeuralNetworksMemory *memory) { delete memory; }
diff --git a/runtimes/neurun/src/frontend/model.cc b/runtimes/neurun/src/frontend/model.cc
deleted file mode 100644
index 3aa2aa2ff..000000000
--- a/runtimes/neurun/src/frontend/model.cc
+++ /dev/null
@@ -1,480 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <NeuralNetworks.h>
-#include <NeuralNetworksEx.h>
-
-#include <cassert>
-#include <stdexcept>
-#include <new>
-
-#include "cpp14/memory.h"
-
-#include "graph/Graph.h"
-#include "frontend/wrapper/model.h"
-#include "frontend/wrapper/memory.h"
-#include "model/operation/Node.Include.h"
-
-int ANeuralNetworksModel_create(ANeuralNetworksModel **model)
-{
-  if (model == nullptr)
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  *model = new (std::nothrow) ANeuralNetworksModel{};
-  if (*model == nullptr)
-  {
-    return ANEURALNETWORKS_OUT_OF_MEMORY;
-  }
-
-  return ANEURALNETWORKS_NO_ERROR;
-}
-
-void ANeuralNetworksModel_free(ANeuralNetworksModel *model) { delete model; }
-
-int ANeuralNetworksModel_addOperand(ANeuralNetworksModel *model,
-                                    const ANeuralNetworksOperandType *type)
-{
-  if ((model == nullptr) || (type == nullptr))
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  if (model->isFinished())
-  {
-    return ANEURALNETWORKS_BAD_STATE;
-  }
-
-  // scale and zeroPoint should be zero for scalars and non-fixed point tensors
-  // Quantized:
-  //  scale: a 32 bit floating point value greater than zero
-  //  zeroPoint: a 32 bit integer, in range [0, 255]
-  if (type->type == ANEURALNETWORKS_TENSOR_QUANT8_ASYMM)
-  {
-    if (!(type->scale > 0.0f))
-    {
-      return ANEURALNETWORKS_BAD_DATA;
-    }
-
-    if ((type->zeroPoint < 0) || (type->zeroPoint > 255))
-    {
-      return ANEURALNETWORKS_BAD_DATA;
-    }
-  }
-  else if ((type->scale != 0.0f) || (type->zeroPoint != 0))
-  {
-    return ANEURALNETWORKS_BAD_DATA;
-  }
-
-  // dimensionCount should be zero for scalars
-  if ((type->dimensionCount != 0) &&
-      ((type->type == ANEURALNETWORKS_FLOAT32) || (type->type == ANEURALNETWORKS_INT32) ||
-       (type->type == ANEURALNETWORKS_UINT32)))
-  {
-    return ANEURALNETWORKS_BAD_DATA;
-  }
-
-  ::neurun::model::operand::Shape shape(type->dimensionCount);
-  ::neurun::model::operand::TypeInfo typeInfo((OperandCode)(type->type), type->scale,
-                                              type->zeroPoint);
-
-  for (uint32_t axis = 0; axis < type->dimensionCount; ++axis)
-  {
-    shape.dim(axis) = type->dimensions[axis];
-  }
-
-  model->deref().addOperand(shape, typeInfo);
-
-  // NOTE We do NOT allocate CLTensor here as we do not how to interpret this one.
-  //      TensorFlow Lite may interpret a rank-4 tensor either as a feature map (with batch) or
-  //      a convolution kernel.
-
-  return ANEURALNETWORKS_NO_ERROR;
-}
-
-int ANeuralNetworksModel_setOperandValue(ANeuralNetworksModel *model, int32_t index,
-                                         const void *buffer, size_t length)
-{
-  const bool isOptional = ((buffer == nullptr) && (length == 0));
-
-  if ((model == nullptr) || ((buffer == nullptr) && (length != 0)))
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  if (model->isFinished())
-  {
-    return ANEURALNETWORKS_BAD_STATE;
-  }
-
-  // Negative index value is not allowed
-  if (index < 0)
-  {
-    return ANEURALNETWORKS_BAD_DATA;
-  }
-  const neurun::model::operand::Index ind{static_cast<uint32_t>(index)};
-
-  if (!model->deref().operands().exist(ind))
-  {
-    return ANEURALNETWORKS_BAD_DATA;
-  }
-
-  auto &obj = model->deref().operands().at(ind);
-  if ((obj.operandSize() != length) && !isOptional)
-  {
-    return ANEURALNETWORKS_BAD_DATA;
-  }
-  if (!obj.setAsConstant())
-  {
-    return ANEURALNETWORKS_BAD_DATA;
-  }
-
-  using ::neurun::model::operand::CachedData;
-  using ::neurun::model::operand::ExternalData;
-
-  // Remain operands.at(ind).data()->base() as nullptr for optional operand
-  // This will be filled when model finished
-  if (isOptional)
-  {
-    model->setOptionalOperand(ind);
-  }
-
-  // NNAPI spec in NeuralNetworks.h
-  // For values of length greater than ANEURALNETWORKS_MAX_SIZE_OF_IMMEDIATELY_COPIED_VALUES,
-  // the application is responsible for not changing the content of this region
-  // until all executions using this model have completed
-  if (length <= ANEURALNETWORKS_MAX_SIZE_OF_IMMEDIATELY_COPIED_VALUES)
-  {
-    model->deref().setOperandValue(ind, nnfw::cpp14::make_unique<CachedData>(
-                                            reinterpret_cast<const uint8_t *>(buffer), length));
-  }
-  else
-  {
-    model->deref().setOperandValue(ind, nnfw::cpp14::make_unique<ExternalData>(
-                                            reinterpret_cast<const uint8_t *>(buffer), length));
-  }
-
-  return ANEURALNETWORKS_NO_ERROR;
-}
-
-int ANeuralNetworksModel_setOperandValueFromMemory(ANeuralNetworksModel *model, int32_t index,
-                                                   const ANeuralNetworksMemory *memory,
-                                                   size_t offset, size_t length)
-{
-  if ((model == nullptr) || (memory == nullptr))
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  if (model->isFinished())
-  {
-    return ANEURALNETWORKS_BAD_STATE;
-  }
-
-  // Negative index value is not allowed
-  if (index < 0)
-  {
-    return ANEURALNETWORKS_BAD_DATA;
-  }
-  const neurun::model::operand::Index ind{static_cast<uint32_t>(index)};
-
-  if (!model->deref().operands().exist(ind))
-  {
-    return ANEURALNETWORKS_BAD_DATA;
-  }
-
-  auto &obj = model->deref().operands().at(ind);
-  if ((obj.operandSize() != length) || (memory->size() < (offset + length)))
-  {
-    return ANEURALNETWORKS_BAD_DATA;
-  }
-  if (!obj.setAsConstant())
-  {
-    return ANEURALNETWORKS_BAD_DATA;
-  }
-
-  using ::neurun::model::operand::ExternalData;
-
-  model->deref().setOperandValue(
-      ind, nnfw::cpp14::make_unique<ExternalData>(
-               reinterpret_cast<const uint8_t *>(memory->base() + offset), length));
-
-  return ANEURALNETWORKS_NO_ERROR;
-}
-
-int ANeuralNetworksModel_addOperation(ANeuralNetworksModel *model,
-                                      ANeuralNetworksOperationType type, uint32_t inputCount,
-                                      const uint32_t *inputs, uint32_t outputCount,
-                                      const uint32_t *outputs)
-{
-  if ((model == nullptr) || (inputs == nullptr) || (outputs == nullptr))
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  const ANeuralNetworksOperationType FIRST_OPERATION = ANEURALNETWORKS_ADD;
-  const ANeuralNetworksOperationType LAST_OPERATION = ANEURALNETWORKS_TRANSPOSE;
-  if ((type < FIRST_OPERATION) || (type > LAST_OPERATION))
-  {
-    return ANEURALNETWORKS_BAD_DATA;
-  }
-
-  if (model->isFinished())
-  {
-    return ANEURALNETWORKS_BAD_STATE;
-  }
-
-  for (uint32_t i = 0; i < outputCount; i++)
-  {
-    const ::neurun::model::operand::Index ind{outputs[i]};
-    auto &obj = model->deref().operands().at(ind);
-
-    if (!obj.setAsOperationOutput())
-    {
-      return ANEURALNETWORKS_BAD_DATA;
-    }
-  }
-
-  auto &graph = model->deref();
-
-  auto node_param =
-      neurun::model::operation::Node::InitParam{inputCount, inputs, outputCount, outputs};
-
-  try
-  {
-    switch (type)
-    {
-      case ANEURALNETWORKS_CONV_2D:
-      {
-        // inputCount is either 7 or 10 acccording to NN API specification.
-        //  - Padding is implicit when inputCount is 7
-        //  - Padding is explicit when inputCount is 10
-        assert(inputCount == 7 || inputCount == 10);
-        assert(outputCount == 1);
-
-        if (inputCount == 7)
-        {
-          using GraphNode = neurun::model::operation::Conv2DNode;
-
-          graph.addOperation(nnfw::cpp14::make_unique<GraphNode>(node_param));
-        }
-        else
-        {
-          throw std::runtime_error{"Explicit padding in Conv2D is not supported, yet"};
-        }
-
-        break;
-      }
-      case ANEURALNETWORKS_MAX_POOL_2D:
-      {
-        // inputCount is either 7 or 10 acccording to NN API specification.
-        //  - Padding is implicit when inputCount is 7
-        //  - Padding is explicit when inputCount is 10
-        assert(inputCount == 7 || inputCount == 10);
-        assert(outputCount == 1);
-
-        if (inputCount == 7)
-        {
-          using GraphNode = neurun::model::operation::MaxPool2DNode;
-
-          graph.addOperation(nnfw::cpp14::make_unique<GraphNode>(node_param));
-        }
-        else
-        {
-          throw std::runtime_error{"Explicit padding in MaxPool2D is not supported, yet"};
-        }
-
-        break;
-      }
-      case ANEURALNETWORKS_AVERAGE_POOL_2D:
-      {
-        // inputCount is either 7 or 10 acccording to NN API specification.
-        //  - Padding is implicit when inputCount is 7
-        //  - Padding is explicit when inputCount is 10
-        assert(inputCount == 7 || inputCount == 10);
-        assert(outputCount == 1);
-
-        if (inputCount == 7)
-        {
-          using GraphNode = neurun::model::operation::AvgPool2DNode;
-
-          graph.addOperation(nnfw::cpp14::make_unique<GraphNode>(node_param));
-        }
-        else
-        {
-          throw std::runtime_error{"Explicit padding in AvgPool2D is not supported, yet"};
-        }
-
-        break;
-      }
-      case ANEURALNETWORKS_CONCATENATION:
-      {
-        using GraphNode = neurun::model::operation::ConcatNode;
-
-        graph.addOperation(nnfw::cpp14::make_unique<GraphNode>(node_param));
-
-        break;
-      }
-      case ANEURALNETWORKS_RESHAPE:
-      {
-        using GraphNode = neurun::model::operation::ReshapeNode;
-
-        graph.addOperation(nnfw::cpp14::make_unique<GraphNode>(node_param));
-
-        break;
-      }
-      case ANEURALNETWORKS_FULLY_CONNECTED:
-      {
-        using GraphNode = neurun::model::operation::FullyConnectedNode;
-
-        graph.addOperation(nnfw::cpp14::make_unique<GraphNode>(node_param));
-
-        break;
-      }
-      case ANEURALNETWORKS_SOFTMAX:
-      {
-        using GraphNode = neurun::model::operation::SoftmaxNode;
-
-        graph.addOperation(nnfw::cpp14::make_unique<GraphNode>(node_param));
-
-        break;
-      }
-      default:
-        throw std::runtime_error{"Not supported operation"};
-    };
-  }
-  catch (const std::exception &e)
-  {
-    return ANEURALNETWORKS_BAD_STATE;
-  }
-
-  return ANEURALNETWORKS_NO_ERROR;
-}
-
-int ANeuralNetworksModel_addOperationEx(ANeuralNetworksModel *model,
-                                        ANeuralNetworksOperationTypeEx type, uint32_t inputCount,
-                                        const uint32_t *inputs, uint32_t outputCount,
-                                        const uint32_t *outputs)
-{
-  if ((model == nullptr) || (inputs == nullptr) || (outputs == nullptr))
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  if (model->isFinished())
-  {
-    return ANEURALNETWORKS_BAD_STATE;
-  }
-
-  const ANeuralNetworksOperationTypeEx FIRST_OPERATION = ANEURALNETWORKS_GATHER_EX;
-  const ANeuralNetworksOperationTypeEx LAST_OPERATION = ANEURALNETWORKS_PRELU_EX;
-  if ((type < FIRST_OPERATION) || (type > LAST_OPERATION))
-  {
-    return ANEURALNETWORKS_BAD_DATA;
-  }
-
-  for (uint32_t i = 0; i < outputCount; i++)
-  {
-    const ::neurun::model::operand::Index ind{outputs[i]};
-    auto &obj = model->deref().operands().at(ind);
-
-    if (!obj.setAsOperationOutput())
-    {
-      return ANEURALNETWORKS_BAD_DATA;
-    }
-  }
-
-  // Workaround: to avoid compile error by unused-parameter, use inputCount
-  if (inputCount == 0)
-  {
-    return ANEURALNETWORKS_BAD_DATA;
-  }
-
-  try
-  {
-    switch (type)
-    {
-      default:
-        throw std::runtime_error{"Not supported operation"};
-    }
-  }
-  catch (const std::exception &e)
-  {
-    return ANEURALNETWORKS_BAD_STATE;
-  }
-
-  return ANEURALNETWORKS_NO_ERROR;
-}
-
-int ANeuralNetworksModel_identifyInputsAndOutputs(ANeuralNetworksModel *model, uint32_t inputCount,
-                                                  const uint32_t *inputs, uint32_t outputCount,
-                                                  const uint32_t *outputs)
-{
-  if ((model == nullptr) || (inputs == nullptr) || (outputs == nullptr))
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  if (model->isFinished())
-  {
-    return ANEURALNETWORKS_BAD_STATE;
-  }
-
-  // NOTE ::neurun::model::operand::Index uses int as its underlying type as various NNAPI
-  //      functions such as ANeuralNetworksModel_setOperandValue use int to represent operand index
-  //
-  //      ANeuralNetworksModel_identifyInputsAndOutputs, however, uses uint32_t to represent operand
-  //      index.
-  //
-  //      Below, static_cast<int>(...) is introduced to eliminate compiler warning.
-  for (uint32_t n = 0; n < inputCount; ++n)
-  {
-    const neurun::model::operand::Index ind{static_cast<uint32_t>(inputs[n])};
-    model->deref().addInput(ind);
-
-    auto &obj = model->deref().operands().at(ind);
-    if (!obj.setAsModelInput())
-    {
-      return ANEURALNETWORKS_BAD_DATA;
-    }
-  }
-
-  for (uint32_t n = 0; n < outputCount; ++n)
-  {
-    const neurun::model::operand::Index ind{static_cast<uint32_t>(outputs[n])};
-    model->deref().addOutput(ind);
-
-    auto &obj = model->deref().operands().at(ind);
-    // Model output cannot become model input
-    if (obj.isModelInput())
-    {
-      return ANEURALNETWORKS_BAD_DATA;
-    }
-  }
-
-  return ANEURALNETWORKS_NO_ERROR;
-}
-
-int ANeuralNetworksModel_finish(ANeuralNetworksModel *model)
-{
-  if (model == nullptr)
-  {
-    return ANEURALNETWORKS_UNEXPECTED_NULL;
-  }
-
-  return model->finish();
-}
diff --git a/runtimes/neurun/src/frontend/wrapper/compilation.cc b/runtimes/neurun/src/frontend/wrapper/compilation.cc
deleted file mode 100644
index e4aa99f7a..000000000
--- a/runtimes/neurun/src/frontend/wrapper/compilation.cc
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "compilation.h"
-
-int ANeuralNetworksCompilation::finish()
-{
-  try
-  {
-    _compiler->compile();
-  }
-  catch (const std::exception &e)
-  {
-    return ANEURALNETWORKS_BAD_STATE;
-  }
-
-  return ANEURALNETWORKS_NO_ERROR;
-}
diff --git a/runtimes/neurun/src/frontend/wrapper/compilation.h b/runtimes/neurun/src/frontend/wrapper/compilation.h
deleted file mode 100644
index d4ba32ea5..000000000
--- a/runtimes/neurun/src/frontend/wrapper/compilation.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __COMPILATION_H__
-#define __COMPILATION_H__
-
-#include "compiler/Compiler.h"
-#include "graph/Graph.h"
-
-struct ANeuralNetworksCompilation
-{
-public:
-  ANeuralNetworksCompilation(const std::shared_ptr<neurun::graph::Graph> &model)
-      : _compiler{new neurun::compiler::Compiler{model}}
-  {
-    // DO NOTHING
-  }
-
-public:
-  neurun::compiler::Plan &plan(void) { return _compiler->plan(); }
-
-public:
-  void publish(std::shared_ptr<const neurun::compiler::Plan> &plan) { _compiler->release(plan); }
-  int finish();
-
-private:
-  std::shared_ptr<neurun::compiler::Compiler> _compiler;
-};
-
-#endif
diff --git a/runtimes/neurun/src/frontend/wrapper/event.h b/runtimes/neurun/src/frontend/wrapper/event.h
deleted file mode 100644
index d144b7c07..000000000
--- a/runtimes/neurun/src/frontend/wrapper/event.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __EVENT_H__
-#define __EVENT_H__
-
-struct ANeuralNetworksEvent
-{
-};
-
-#endif
diff --git a/runtimes/neurun/src/frontend/wrapper/execution.h b/runtimes/neurun/src/frontend/wrapper/execution.h
deleted file mode 100644
index b68a7b967..000000000
--- a/runtimes/neurun/src/frontend/wrapper/execution.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __EXECUTION_H__
-#define __EXECUTION_H__
-
-#include "compiler/Plan.h"
-#include "exec/Source.h"
-#include "exec/Sink.h"
-
-struct ANeuralNetworksExecution
-{
-public:
-  ANeuralNetworksExecution(const std::shared_ptr<const neurun::compiler::Plan> &plan) : _plan{plan}
-  {
-    _sources.resize(_plan->model().getInputs().size());
-    _sinks.resize(_plan->model().getOutputs().size());
-  }
-
-public:
-  const neurun::compiler::Plan &plan(void) const { return *_plan; }
-
-private:
-  std::shared_ptr<const neurun::compiler::Plan> _plan;
-
-public:
-  // TODO Use InputIndex instead of int
-  void source(int n, std::unique_ptr<neurun::exec::ISource> &&source)
-  {
-    _sources.at(n) = std::move(source);
-  }
-  template <typename T, typename... Args> void source(int n, Args &&... args)
-  {
-    source(n, std::unique_ptr<T>{new T{std::forward<Args>(args)...}});
-  }
-
-public:
-  const neurun::exec::ISource &source(int n) const { return *(_sources.at(n)); }
-
-public:
-  // TODO Use OutputIndex instead of int
-  void sink(int n, std::unique_ptr<neurun::exec::ISink> &&sink) { _sinks.at(n) = std::move(sink); }
-  template <typename T, typename... Args> void sink(int n, Args &&... args)
-  {
-    sink(n, std::unique_ptr<T>{new T{std::forward<Args>(args)...}});
-  }
-
-public:
-  const neurun::exec::ISink &sink(int n) const { return *(_sinks.at(n)); }
-
-private:
-  std::vector<std::unique_ptr<neurun::exec::ISource>> _sources;
-  std::vector<std::unique_ptr<neurun::exec::ISink>> _sinks;
-};
-
-#endif
diff --git a/runtimes/neurun/src/frontend/wrapper/memory.cc b/runtimes/neurun/src/frontend/wrapper/memory.cc
deleted file mode 100644
index 456015123..000000000
--- a/runtimes/neurun/src/frontend/wrapper/memory.cc
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <NeuralNetworks.h>
-#include <sys/mman.h>
-
-#include "memory.h"
-
-//
-// ANeuralNetworksMemory
-//
-ANeuralNetworksMemory::ANeuralNetworksMemory(size_t size, int protect, int fd, size_t offset)
-{
-  _base = reinterpret_cast<uint8_t *>(mmap(nullptr, size, protect, MAP_PRIVATE, fd, offset));
-  _size = size;
-}
-
-ANeuralNetworksMemory::~ANeuralNetworksMemory() { munmap(reinterpret_cast<void *>(_base), _size); }
diff --git a/runtimes/neurun/src/frontend/wrapper/memory.h b/runtimes/neurun/src/frontend/wrapper/memory.h
deleted file mode 100644
index a430bcf49..000000000
--- a/runtimes/neurun/src/frontend/wrapper/memory.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __MEMORY_H__
-#define __MEMORY_H__
-
-#include <cstdint>
-
-struct ANeuralNetworksMemory
-{
-public:
-  ANeuralNetworksMemory(size_t size, int protect, int fd, size_t offset);
-  ~ANeuralNetworksMemory();
-
-public:
-  size_t size(void) const { return _size; }
-  uint8_t *base(void) { return _base; }
-  const uint8_t *base(void) const { return _base; }
-
-private:
-  size_t _size;
-  uint8_t *_base;
-};
-
-#endif // __MEMORY_H__
diff --git a/runtimes/neurun/src/frontend/wrapper/model.cc b/runtimes/neurun/src/frontend/wrapper/model.cc
deleted file mode 100644
index a7a9275fc..000000000
--- a/runtimes/neurun/src/frontend/wrapper/model.cc
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "model.h"
-
-#include "graph/Graph.h"
-
-//
-// ANeuralNetworksModel
-//
-ANeuralNetworksModel::ANeuralNetworksModel()
-    : _model{new neurun::graph::Graph}, _optional_operands{}
-{
-  // DO NOTHING
-}
-
-ResultCode ANeuralNetworksModel::finish()
-{
-  // This function must only be called once for a given model
-  if (isFinished())
-  {
-    return ANEURALNETWORKS_BAD_STATE;
-  }
-
-  fillOptionalOperand();
-
-  _model->finishBuilding();
-
-  return ANEURALNETWORKS_NO_ERROR;
-}
-
-void ANeuralNetworksModel::fillOptionalOperand(void)
-{
-  _model->operations().iterate(
-      [&](const ::neurun::model::operation::Index &, ::neurun::model::operation::Node &node) {
-        for (auto input : node.getInputs())
-        {
-          // TODO fill default value for optional operands
-          if (_optional_operands.find(input) != _optional_operands.end())
-          {
-            throw std::runtime_error{"Optional operand is not supported yet"};
-          }
-        }
-      });
-}
diff --git a/runtimes/neurun/src/frontend/wrapper/model.h b/runtimes/neurun/src/frontend/wrapper/model.h
deleted file mode 100644
index 2386a648d..000000000
--- a/runtimes/neurun/src/frontend/wrapper/model.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __MODEL_H__
-#define __MODEL_H__
-
-#include <NeuralNetworks.h>
-
-#include "graph/Graph.h"
-
-struct ANeuralNetworksModel
-{
-public:
-  ANeuralNetworksModel();
-
-public:
-  neurun::graph::Graph &deref(void) { return *_model; }
-  ResultCode finish();
-  bool isFinished() { return !_model->isBuildingPhase(); }
-  void release(std::shared_ptr<neurun::graph::Graph> &model) { model = _model; }
-  void setOptionalOperand(const neurun::model::operand::Index idx)
-  {
-    _optional_operands.insert(idx);
-  }
-
-private:
-  void fillOptionalOperand(void);
-
-private:
-  std::shared_ptr<neurun::graph::Graph> _model;
-  std::unordered_set<neurun::model::operand::Index> _optional_operands;
-};
-
-#endif // __MODEL_H__
diff --git a/runtimes/neurun/src/graph/Graph.cc b/runtimes/neurun/src/graph/Graph.cc
deleted file mode 100644
index 832e2b887..000000000
--- a/runtimes/neurun/src/graph/Graph.cc
+++ /dev/null
@@ -1,334 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Graph.h"
-
-#include <algorithm>
-#include <bitset>
-
-#include "util/logging.h"
-#include "verifier/Verifier.h"
-#include "cpp14/memory.h"
-#include "linear/Linear.h"
-#include "operation/LowerInfo.h"
-#include "operand/LowerInfo.h"
-#include "operand/Shape4DConvert.h"
-#include "compiler/BackendResolver.h"
-#include "backend/interface/IConfig.h"
-#include "pass/PermutationInsertionPass.h"
-#include "pass/PermutationEliminationPass.h"
-
-namespace neurun
-{
-namespace graph
-{
-
-Graph::Graph(void) = default;
-
-Graph::~Graph(void) = default;
-
-model::operand::Index Graph::addOperand(const model::operand::Shape &shape,
-                                        const model::operand::TypeInfo &type)
-{
-  return _model->operands.append(shape, type);
-}
-
-model::operation::Index Graph::addOperation(std::unique_ptr<model::operation::Node> &&node)
-{
-  assert(isBuildingPhase());
-  return _model->operations.append(std::move(node));
-}
-
-void Graph::setOperandValue(const model::operand::Index &ind,
-                            std::unique_ptr<model::operand::Data> &&data)
-{
-  assert(isBuildingPhase());
-  assert(_model->operands.exist(ind));
-  _model->operands.at(ind).data(std::move(data));
-}
-
-void Graph::addInput(const model::operand::Index &ind)
-{
-  assert(isBuildingPhase());
-  _model->inputs.append(ind);
-}
-
-void Graph::addOutput(const model::operand::Index &ind)
-{
-  assert(isBuildingPhase());
-  _model->outputs.append(ind);
-}
-
-void Graph::finishBuilding(void)
-{
-  assert(isBuildingPhase());
-  _phase = Phase::MODEL;
-
-  // Initialize operand use-def
-  initializeUseDef();
-
-  // Call graph verifications for the MODEL phase
-  {
-    assert(verifier::DAGChecker().verify(*this));
-    assert(verifier::EdgeConsistencyChecker().verify(*this));
-  }
-}
-
-void Graph::lower(void)
-{
-  assert(_phase == Phase::MODEL);
-
-  // Lower
-  {
-    // operand::LowerInfo holder
-    std::unordered_map<model::operand::Index, std::unique_ptr<operand::LowerInfo>>
-        operands_lower_info;
-
-    _model->operands.iterate([&](const model::operand::Index &index,
-                                 const model::operand::Object &object) {
-      operands_lower_info[index] =
-          nnfw::cpp14::make_unique<operand::LowerInfo>(graph::operand::asShape4D(object.shape()));
-    });
-
-    _backend_resolver = nnfw::cpp14::make_unique<compiler::BackendResolver>(_model->operands);
-
-    _model->operations.iterate(
-        [&](const model::operation::Index &index, model::operation::Node &node) {
-          auto backend = _backend_resolver->getBackend(typeid(node));
-
-          // Operation LowerInfo
-          setLowerInfo(index, nnfw::cpp14::make_unique<graph::operation::LowerInfo>(backend));
-
-          // LowerInfo for in/output operands
-          for (auto operand : node.getInputs())
-          {
-            auto &&lower_info = operands_lower_info.at(operand);
-            lower_info->addUseBackend(backend);
-          }
-          for (auto operand : node.getOutputs())
-          {
-            auto &&lower_info = operands_lower_info.at(operand);
-            lower_info->addDefBackend(backend);
-          }
-        });
-
-    // Add def backend to model input/output operand as default backend
-    for (auto index : getInputs())
-    {
-      auto &&lower_info = operands_lower_info.at(index);
-      lower_info->addDefBackend(_backend_resolver->getDefaultBackend());
-    }
-
-    for (auto index : getOutputs())
-    {
-      auto &&lower_info = operands_lower_info.at(index);
-      lower_info->addUseBackend(_backend_resolver->getDefaultBackend());
-    }
-
-    // Add DefBackend constants same as UseBackend
-    // NOTE This assumes a constant operand is used by only one operation
-    _model->operations.iterate([&](const model::operation::Index &, model::operation::Node &node) {
-      // LowerInfo for input operands
-      for (auto operand : node.getInputs())
-      {
-        auto &&lower_info = operands_lower_info.at(operand);
-        if (lower_info->def_backends().empty())
-        {
-          lower_info->addDefBackend(lower_info->use_backends().getOnlyElement());
-        }
-      }
-    });
-
-    // Set LowerInfo for each operand from the operand::LowerInfo holder
-    _model->operands.iterate([&](const model::operand::Index &index,
-                                 model::operand::Object &object) {
-      object.lower_info(std::move(operands_lower_info[index]));
-
-      // Dump operand LowerInfo
-      // TODO Extract this dumping procedure to be reusable
-      if (!object.lower_info()->def_backends().empty() ||
-          !object.lower_info()->use_backends().empty())
-      {
-        auto backends_to_string = [](const operand::BackendSet &backends) {
-          std::string str;
-          for (auto backend : backends)
-          {
-            str += backend->config()->id();
-            str += " ";
-          }
-          return "{ " + str + "}";
-        };
-
-        auto operation_index_to_string = [](const model::operation::IndexList &operations) {
-          std::string str;
-          for (auto op : operations.list())
-          {
-            str += std::to_string(op.value());
-            str += " ";
-          }
-          return "{ " + str + "}";
-        };
-
-        const auto &lower_info = object.lower_info();
-        const auto &shape = object.shape();
-        const auto &lower_shape = lower_info->shape();
-        std::string def_ops = operation_index_to_string(object.getDef());
-        std::string use_ops = operation_index_to_string(object.getUses());
-        std::string def_layouts = backends_to_string(lower_info->def_backends());
-        std::string use_layouts = backends_to_string(lower_info->use_backends());
-        VERBOSE(Lower) << "* Operand #" << index.value() << " LowerInfo" << std::endl;
-        VERBOSE(Lower) << "  - Shape           : { " << shape.dim(0) << " "
-                       << (shape.rank() > 1 ? shape.dim(1) : 0) << " "
-                       << (shape.rank() > 2 ? shape.dim(2) : 0) << " "
-                       << (shape.rank() > 3 ? shape.dim(3) : 0) << " "
-                       << "}" << std::endl;
-        VERBOSE(Lower) << "  - Def Operations  : " << def_ops << std::endl;
-        VERBOSE(Lower) << "  - Use Operations  : " << use_ops << std::endl;
-        VERBOSE(Lower) << "  - Lower Info" << std::endl;
-        VERBOSE(Lower) << "    - 4D Shape (NHWC) : { " << lower_shape.n() << " " << lower_shape.h()
-                       << " " << lower_shape.w() << " " << lower_shape.c() << " "
-                       << "}" << std::endl;
-        VERBOSE(Lower) << "    - Def Backends    : " << def_layouts << std::endl;
-        VERBOSE(Lower) << "    - Use Backends    : " << use_layouts << std::endl;
-      }
-    });
-  }
-
-  // Run PermutationInsertionPass
-  {
-    pass::PermutationInsertionPass pi_pass(*this);
-    pi_pass.run();
-    pass::PermutationEliminationPass pe_pass(*this);
-    pe_pass.run();
-  }
-
-  // Graph verifications for the LOWERED phase
-  {
-    assert(verifier::DAGChecker().verify(*this));
-    assert(verifier::EdgeConsistencyChecker().verify(*this));
-  }
-}
-
-std::unique_ptr<linear::Linear> Graph::linearize(void)
-{
-  assert(_phase == Phase::MODEL);
-
-  auto linear = nnfw::cpp14::make_unique<linear::Linear>(*this);
-
-  // TODO Move the operations and operands to linear object
-  return std::move(linear);
-}
-
-void Graph::initializeUseDef()
-{
-  operations().iterate(
-      [&](const model::operation::Index &index, const model::operation::Node &node) -> void {
-        auto outputs = node.getOutputs();
-        for (auto output : outputs)
-        {
-          operands().at(output).appendDef(index);
-        }
-
-        auto inputs = node.getInputs();
-        for (auto input : inputs)
-        {
-          operands().at(input).appendUse(index);
-        }
-      });
-}
-
-const operation::LowerInfo *Graph::getLowerInfo(const model::operation::Index &index) const
-{
-  auto itr = _operation_lower_info.find(index);
-  if (itr == _operation_lower_info.end())
-    return nullptr;
-  return itr->second.get();
-}
-
-void Graph::setLowerInfo(const model::operation::Index &index,
-                         std::unique_ptr<operation::LowerInfo> &&lower_info)
-{
-  _operation_lower_info.insert(std::make_pair(index, std::move(lower_info)));
-}
-
-} // namespace graph
-} // namespace neurun
-
-namespace neurun
-{
-namespace graph
-{
-
-// Explicit instantiations to have implementation in the source file.
-
-template class Graph::DefaultIterator<true>;
-template class Graph::DefaultIterator<false>;
-
-template class Graph::PostDfsIterator<true>;
-template class Graph::PostDfsIterator<false>;
-
-//
-// Graph::DefaultIterator
-//
-
-template <bool is_const>
-void Graph::DefaultIterator<is_const>::iterate(GraphRef graph, const IterFn &fn) const
-{
-  graph.operations().iterate(
-      [&](const model::operation::Index &index, NodeRef node) -> void { fn(index, node); });
-}
-
-//
-// Graph::PostDfsIterator
-//
-
-template <bool is_const>
-void Graph::PostDfsIterator<is_const>::iterate(GraphRef graph, const IterFn &fn) const
-{
-  assert(!graph.isBuildingPhase()); // Restrict iteration condition
-
-  std::unordered_map<model::operation::Index, bool> visited;
-  graph.operations().iterate(
-      [&](const model::operation::Index &index, NodeRef) { visited[index] = false; });
-
-  std::function<void(const model::operation::Index &, NodeRef)> dfs_recursive =
-      [&](const model::operation::Index &index, NodeRef node) -> void {
-    if (visited[index])
-      return;
-    visited[index] = true;
-
-    for (auto output : node.getOutputs())
-    {
-      const auto &operand = graph.operands().at(output);
-      for (const auto &use : operand.getUses().list())
-      {
-        dfs_recursive(use, graph.operations().at(use));
-      }
-    }
-
-    fn(index, node);
-  };
-
-  graph.operations().iterate(dfs_recursive);
-
-  // All of the operations(nodes) must have been visited.
-  assert(std::all_of(
-      visited.begin(), visited.end(),
-      [](const std::pair<const model::operation::Index, bool> &v) { return v.second; }));
-}
-
-} // namespace graph
-} // namespace neurun
diff --git a/runtimes/neurun/src/graph/Graph.h b/runtimes/neurun/src/graph/Graph.h
deleted file mode 100644
index afcfdce12..000000000
--- a/runtimes/neurun/src/graph/Graph.h
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_GRAPH_GRAPH_H__
-#define __NEURUN_GRAPH_GRAPH_H__
-
-#include <functional>
-
-#include "model/operation/Node.h"
-#include "graph/Model.h"
-
-namespace neurun
-{
-namespace linear
-{
-class Linear;
-} // namespace linear
-} // namespace neurun
-
-namespace neurun
-{
-namespace compiler
-{
-class BackendResolver;
-} // namespace compiler
-} // namespace neurun
-
-namespace neurun
-{
-namespace graph
-{
-
-class Graph
-{
-private:
-  enum class Phase
-  {
-    BUILDING,
-    MODEL
-  };
-
-public:
-  template <bool is_const> class Iterator
-  {
-  public:
-    using GraphRef = typename std::conditional<is_const, const Graph &, Graph &>::type;
-    using IndexRef = const model::operation::Index &;
-    using NodeRef = typename std::conditional<is_const, const model::operation::Node &,
-                                              model::operation::Node &>::type;
-    using IterFn = std::function<void(IndexRef, NodeRef)>;
-
-  public:
-    virtual ~Iterator() = default;
-    virtual void iterate(GraphRef graph, const IterFn &fn) const = 0;
-  };
-
-  template <bool is_const = false> class DefaultIterator final : public Iterator<is_const>
-  {
-  public:
-    using GraphRef = typename Iterator<is_const>::GraphRef;
-    using IndexRef = typename Iterator<is_const>::IndexRef;
-    using NodeRef = typename Iterator<is_const>::NodeRef;
-    using IterFn = typename Iterator<is_const>::IterFn;
-
-  public:
-    void iterate(GraphRef graph, const IterFn &fn) const;
-  };
-  using DefaultConstIterator = DefaultIterator<true>;
-
-  template <bool is_const = false> class PostDfsIterator final : public Iterator<is_const>
-  {
-  public:
-    using GraphRef = typename Iterator<is_const>::GraphRef;
-    using IndexRef = typename Iterator<is_const>::IndexRef;
-    using NodeRef = typename Iterator<is_const>::NodeRef;
-    using IterFn = typename Iterator<is_const>::IterFn;
-
-  public:
-    void iterate(GraphRef graph, const IterFn &fn) const;
-  };
-  using PostDfsConstIterator = PostDfsIterator<true>;
-
-public:
-  Graph(void);
-  ~Graph(void);
-
-  // Graph Building
-public:
-  model::operand::Index addOperand(const model::operand::Shape &shape,
-                                   const model::operand::TypeInfo &type);
-  model::operation::Index addOperation(std::unique_ptr<model::operation::Node> &&node);
-  void setOperandValue(const model::operand::Index &ind,
-                       std::unique_ptr<model::operand::Data> &&data);
-  void addInput(const model::operand::Index &ind);
-  void addOutput(const model::operand::Index &ind);
-  void finishBuilding(void);
-  void lower(void);
-  void removeOperand(const model::operand::Index &ind) { _model->operands.remove(ind); }
-  std::unique_ptr<linear::Linear> linearize(void);
-  bool isBuildingPhase(void) const { return _phase == Phase::BUILDING; }
-
-private:
-  void initializeUseDef();
-
-  // Accessors
-public:
-  const model::operand::IndexSet &getInputs() const { return _model->inputs; }
-  model::operand::IndexSet &getInputs() { return _model->inputs; }
-  const model::operand::IndexSet &getOutputs() const { return _model->outputs; }
-  model::operand::IndexSet &getOutputs() { return _model->outputs; }
-  const model::operand::Set &operands() const { return _model->operands; }
-  model::operand::Set &operands()
-  {
-    return _model->operands;
-  } // TODO Remove this non-const accessor
-  const model::operation::Set &operations() const { return _model->operations; }
-  model::operation::Set &operations() { return _model->operations; }
-  const compiler::BackendResolver *backend_resolver() const { return _backend_resolver.get(); }
-
-private:
-  Phase _phase{Phase::BUILDING};
-  std::unique_ptr<Model> _model{new Model};
-
-  // For LOWERED phase
-public:
-  const operation::LowerInfo *getLowerInfo(const model::operation::Index &index) const;
-  void setLowerInfo(const model::operation::Index &index,
-                    std::unique_ptr<operation::LowerInfo> &&lower_info);
-
-private:
-  std::unique_ptr<compiler::BackendResolver> _backend_resolver;
-  std::unordered_map<model::operation::Index, std::unique_ptr<operation::LowerInfo>>
-      _operation_lower_info;
-};
-
-} // namespace graph
-} // namespace neurun
-
-#endif // __NEURUN_GRAPH_GRAPH_H__
diff --git a/runtimes/neurun/src/graph/Index.h b/runtimes/neurun/src/graph/Index.h
deleted file mode 100644
index 3263d12ad..000000000
--- a/runtimes/neurun/src/graph/Index.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_GRAPH_INDEX_H__
-#define __NEURUN_GRAPH_INDEX_H__
-
-#include <functional>
-#include <limits>
-#include <stdint.h>
-
-namespace neurun
-{
-namespace graph
-{
-
-template <typename T, typename DummyTag> class Index
-{
-private:
-  static const T UNDEFINED = std::numeric_limits<T>::max();
-
-public:
-  explicit Index(void) : _index{UNDEFINED} {}
-  explicit Index(T o) : _index{o} {}
-  explicit Index(int32_t o) : _index{static_cast<T>(o)} {} // For legacy code compatibility
-  Index(const Index &o) : _index{o._index} {}
-
-  Index &operator=(T o)
-  {
-    _index = o;
-    return *this;
-  }
-
-  Index &operator=(const T &o)
-  {
-    _index = o._index;
-    return *this;
-  }
-
-  bool operator==(T o) const { return _index == o; }
-  bool operator==(const Index &o) const { return _index == o._index; }
-  bool operator!=(T o) const { return !(*this == o); }
-  bool operator!=(const Index &o) const { return !(*this == o); }
-
-  T value() const { return _index; }
-  int32_t asInt() const { return static_cast<int32_t>(_index); } // For legacy code compatibility
-
-private:
-  T _index;
-};
-
-} // namespace graph
-} // namespace neurun
-
-namespace std
-{
-
-template <typename T, typename Tag> struct hash<::neurun::graph::Index<T, Tag>>
-{
-  size_t operator()(const ::neurun::graph::Index<T, Tag> &index) const noexcept
-  {
-    return hash<T>()(index.value());
-  }
-};
-
-} // namespace std
-
-#endif // __NEURUN_GRAPH_INDEX_H__
diff --git a/runtimes/neurun/src/graph/Model.h b/runtimes/neurun/src/graph/Model.h
deleted file mode 100644
index 20bb713af..000000000
--- a/runtimes/neurun/src/graph/Model.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_GRAPH_MODEL_H__
-#define __NEURUN_GRAPH_MODEL_H__
-
-#include "model/operation/Set.h"
-#include "model/operand/IndexSet.h"
-#include "model/operand/Set.h"
-
-namespace neurun
-{
-namespace graph
-{
-
-struct Model
-{
-  model::operation::Set operations;
-  model::operand::Set operands;
-  model::operand::IndexSet inputs;
-  model::operand::IndexSet outputs;
-};
-
-} // namespace graph
-} // namespace neurun
-
-#endif // __NEURUN_GRAPH_MODEL_H__
diff --git a/runtimes/neurun/src/graph/dumper/Dumper.cc b/runtimes/neurun/src/graph/dumper/Dumper.cc
deleted file mode 100644
index efffc5849..000000000
--- a/runtimes/neurun/src/graph/dumper/Dumper.cc
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Dumper.h"
-
-#include <string>
-
-#include "util/logging.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace dumper
-{
-
-using namespace neurun::model::operation;
-
-void Dumper::visit(const Conv2DNode &node)
-{
-  VERBOSE(LIR) << "* Conv2D(Implicit)" << std::endl;
-  VERBOSE(LIR) << "  - Inputs : IFM(" << node.getInputs().at(0).value() << ") Kernel("
-               << node.getInputs().at(1).value() << ") Bias(" << node.getInputs().at(2).value()
-               << ")" << std::endl;
-  VERBOSE(LIR) << "  - Output : OFM(" << node.getOutputs().at(0).value() << ")" << std::endl;
-}
-
-void Dumper::visit(const MaxPool2DNode &node)
-{
-  VERBOSE(LIR) << "* MaxPool2D(Implicit)" << std::endl;
-  VERBOSE(LIR) << "  - Inputs : IFM(" << node.getInputs().at(0).value() << ")" << std::endl;
-  VERBOSE(LIR) << "  - Output : OFM(" << node.getOutputs().at(0).value() << ")" << std::endl;
-}
-
-void Dumper::visit(const AvgPool2DNode &node)
-{
-  VERBOSE(LIR) << "* AvgPool2D(Implicit)" << std::endl;
-  VERBOSE(LIR) << "  - Inputs : IFM(" << node.getInputs().at(0).value() << ")" << std::endl;
-  VERBOSE(LIR) << "  - Output : OFM(" << node.getOutputs().at(0).value() << ")" << std::endl;
-}
-
-void Dumper::visit(const ConcatNode &node)
-{
-  VERBOSE(LIR) << "* Concat" << std::endl;
-  std::string inputs;
-  for (auto i : node.getInputs())
-  {
-    inputs += std::to_string(i.value()) + ",";
-  }
-  VERBOSE(LIR) << "  - Inputs : IFM(" << inputs << ")" << std::endl;
-  VERBOSE(LIR) << "  - Output : OFM(" << node.getOutputs().at(0).value() << ")" << std::endl;
-}
-
-void Dumper::visit(const FullyConnectedNode &node)
-{
-  VERBOSE(LIR) << "* FullyConnected" << std::endl;
-  VERBOSE(LIR) << "  - Inputs : IFM(" << node.getInputs().at(0).value() << ") Weight("
-               << node.getInputs().at(1).value() << ") Bias(" << node.getInputs().at(2).value()
-               << ")" << std::endl;
-  VERBOSE(LIR) << "  - Output : OFM(" << node.getOutputs().at(0).value() << ")" << std::endl;
-}
-
-void Dumper::visit(const ReshapeNode &node)
-{
-  VERBOSE(LIR) << "* Reshape" << std::endl;
-  // TODO The shape index should be "node.getInputs().at(1).value()" but not valid for now
-  VERBOSE(LIR) << "  - Inputs : IFM(" << node.getInputs().at(0).value() << ") Shape("
-               << "?"
-               << ")" << std::endl;
-  VERBOSE(LIR) << "  - Output : OFM(" << node.getOutputs().at(0).value() << ")" << std::endl;
-}
-
-void Dumper::visit(const SoftmaxNode &node)
-{
-  VERBOSE(LIR) << "* Softmax" << std::endl;
-  VERBOSE(LIR) << "  - Inputs : IFM(" << node.getInputs().at(0).value() << ")" << std::endl;
-  VERBOSE(LIR) << "  - Output : OFM(" << node.getOutputs().at(0).value() << ")" << std::endl;
-}
-
-void Dumper::visit(const PermuteNode &node)
-{
-  VERBOSE(LIR) << "* Permute" << std::endl;
-  VERBOSE(LIR) << "  - Inputs : IFM(" << node.getInputs().at(0).value() << ")" << std::endl;
-  VERBOSE(LIR) << "  - Output : OFM(" << node.getOutputs().at(0).value() << ")" << std::endl;
-}
-
-void Dumper::visit(const AddNode &node)
-{
-  VERBOSE(LIR) << "* Add" << std::endl;
-  VERBOSE(LIR) << "  - Inputs : Input(" << node.getInputs().at(0).value() << ", "
-               << node.getInputs().at(1).value() << ")" << std::endl;
-  VERBOSE(LIR) << "  - Output : Output(" << node.getOutputs().at(0).value() << ")" << std::endl;
-}
-
-} // namespace dumper
-} // namespace graph
-} // namespace neurun
diff --git a/runtimes/neurun/src/graph/dumper/Dumper.h b/runtimes/neurun/src/graph/dumper/Dumper.h
deleted file mode 100644
index 8c079a11d..000000000
--- a/runtimes/neurun/src/graph/dumper/Dumper.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_GRAPH_DUMPER_H__
-#define __NEURUN_GRAPH_DUMPER_H__
-
-#include "model/operation/NodeVisitor.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace dumper
-{
-
-class Dumper : public model::operation::NodeVisitor
-{
-public:
-  Dumper() = default;
-
-public:
-  void visit(const model::operation::Conv2DNode &node) override;
-  void visit(const model::operation::MaxPool2DNode &node) override;
-  void visit(const model::operation::AvgPool2DNode &node) override;
-  void visit(const model::operation::ConcatNode &node) override;
-  void visit(const model::operation::FullyConnectedNode &node) override;
-  void visit(const model::operation::ReshapeNode &node) override;
-  void visit(const model::operation::SoftmaxNode &node) override;
-  void visit(const model::operation::PermuteNode &node) override;
-  void visit(const model::operation::AddNode &node) override;
-};
-
-} // namespace dumper
-} // namespace graph
-} // namespace neurun
-
-#endif // __NEURUN_GRAPH_DUMPER_H__
diff --git a/runtimes/neurun/src/graph/operand/BackendSet.cc b/runtimes/neurun/src/graph/operand/BackendSet.cc
deleted file mode 100644
index 9a284d722..000000000
--- a/runtimes/neurun/src/graph/operand/BackendSet.cc
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "BackendSet.h"
-
-#include <cassert>
-
-namespace neurun
-{
-namespace graph
-{
-namespace operand
-{
-
-BackendSet::BackendSet(std::initializer_list<const backend::Backend *> backends)
-{
-  for (auto backend : backends)
-  {
-    _set.insert(backend);
-  }
-}
-
-const backend::Backend *BackendSet::getOnlyElement() const
-{
-  assert(_set.size() == 1u);
-  return *_set.begin();
-}
-
-BackendSet BackendSet::operator|(const BackendSet &other) const
-{
-  auto ret = *this;
-  for (auto backend : other)
-  {
-    ret.add(backend);
-  }
-  return ret;
-}
-
-BackendSet BackendSet::operator&(const BackendSet &other) const
-{
-  BackendSet ret;
-  for (auto backend : other)
-  {
-    if (contains(backend))
-    {
-      ret.add(backend);
-    }
-  }
-  return ret;
-}
-
-BackendSet BackendSet::operator-(const BackendSet &other) const
-{
-  auto ret = *this;
-  for (auto backend : other)
-  {
-    ret.remove(backend);
-  }
-  return ret;
-}
-
-} // namespace operand
-} // namespace graph
-} // namespace neurun
diff --git a/runtimes/neurun/src/graph/operand/BackendSet.h b/runtimes/neurun/src/graph/operand/BackendSet.h
deleted file mode 100644
index 8b457a084..000000000
--- a/runtimes/neurun/src/graph/operand/BackendSet.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_GRAPH_OPERAND_BACKEND_SET_H__
-#define __NEURUN_GRAPH_OPERAND_BACKEND_SET_H__
-
-#include <initializer_list>
-#include <unordered_set>
-
-namespace neurun
-{
-namespace backend
-{
-class Backend;
-} // namespace backend
-} // namespace neurun
-
-namespace neurun
-{
-namespace graph
-{
-namespace operand
-{
-
-class BackendSet
-{
-public:
-  BackendSet() = default;
-  BackendSet(std::initializer_list<const backend::Backend *> backends);
-
-public:
-  void add(const backend::Backend *backend) { _set.insert(backend); }
-  void remove(const backend::Backend *backend) { _set.erase(backend); }
-  uint32_t size() const { return static_cast<uint32_t>(_set.size()); }
-  bool empty() const { return _set.empty(); }
-  bool contains(const backend::Backend *backend) const { return _set.find(backend) != _set.end(); }
-  const backend::Backend *getOnlyElement() const;
-
-public:
-  BackendSet operator|(const BackendSet &other) const; // Union
-  BackendSet operator&(const BackendSet &other) const; // Intersect
-  BackendSet operator-(const BackendSet &other) const; // Minus
-
-public:
-  std::unordered_set<const backend::Backend *>::const_iterator begin() const
-  {
-    return _set.begin();
-  }
-  std::unordered_set<const backend::Backend *>::const_iterator end() const { return _set.end(); }
-
-private:
-  std::unordered_set<const backend::Backend *> _set;
-};
-
-} // namespace operand
-} // namespace graph
-} // namespace neurun
-
-#endif // __NEURUN_GRAPH_OPERAND_BACKEND_SET_H__
diff --git a/runtimes/neurun/src/graph/operand/Layout.h b/runtimes/neurun/src/graph/operand/Layout.h
deleted file mode 100644
index 023ecbdad..000000000
--- a/runtimes/neurun/src/graph/operand/Layout.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_GRAPH_OPERAND_LAYOUT_H__
-#define __NEURUN_GRAPH_OPERAND_LAYOUT_H__
-
-#include <functional>
-
-namespace neurun
-{
-namespace graph
-{
-namespace operand
-{
-
-enum class Layout
-{
-  UNKNOWN = 0,
-  NHWC,
-  NCHW
-};
-
-} // namespace operand
-} // namespace graph
-} // namespace neurun
-
-namespace std
-{
-
-template <> struct hash<::neurun::graph::operand::Layout>
-{
-  size_t operator()(const ::neurun::graph::operand::Layout &value) const noexcept
-  {
-    using type = typename std::underlying_type<::neurun::graph::operand::Layout>::type;
-    return hash<type>()(static_cast<type>(value));
-  }
-};
-
-} // namespace std
-
-#endif // __NEURUN_GRAPH_OPERAND_LAYOUT_H__
diff --git a/runtimes/neurun/src/graph/operand/LayoutSet.cc b/runtimes/neurun/src/graph/operand/LayoutSet.cc
deleted file mode 100644
index 47bb5900a..000000000
--- a/runtimes/neurun/src/graph/operand/LayoutSet.cc
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "LayoutSet.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace operand
-{
-
-LayoutSet::LayoutSet(std::initializer_list<Layout> layouts)
-{
-  for (auto layout : layouts)
-  {
-    _set.insert(layout);
-  }
-}
-
-LayoutSet LayoutSet::operator|(const LayoutSet &other) const
-{
-  auto ret = *this;
-  for (auto layout : other)
-  {
-    ret.add(layout);
-  }
-  return ret;
-}
-
-LayoutSet LayoutSet::operator&(const LayoutSet &other) const
-{
-  LayoutSet ret;
-  for (auto layout : other)
-  {
-    if (contains(layout))
-    {
-      ret.add(layout);
-    }
-  }
-  return ret;
-}
-
-LayoutSet LayoutSet::operator-(const LayoutSet &other) const
-{
-  auto ret = *this;
-  for (auto layout : other)
-  {
-    ret.remove(layout);
-  }
-  return ret;
-}
-
-} // namespace operand
-} // namespace graph
-} // namespace neurun
diff --git a/runtimes/neurun/src/graph/operand/LayoutSet.h b/runtimes/neurun/src/graph/operand/LayoutSet.h
deleted file mode 100644
index 928259c87..000000000
--- a/runtimes/neurun/src/graph/operand/LayoutSet.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_GRAPH_OPERAND_LAYOUT_SET_H__
-#define __NEURUN_GRAPH_OPERAND_LAYOUT_SET_H__
-
-#include <initializer_list>
-#include <unordered_set>
-
-#include "Layout.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace operand
-{
-
-class LayoutSet
-{
-public:
-  LayoutSet() = default;
-  LayoutSet(std::initializer_list<Layout> layouts);
-
-public:
-  void add(const Layout &layout) { _set.insert(layout); }
-  void remove(const Layout &layout) { _set.erase(layout); }
-  uint32_t size() const { return static_cast<uint32_t>(_set.size()); }
-  bool contains(const Layout &layout) const { return _set.find(layout) != _set.end(); }
-
-public:
-  LayoutSet operator|(const LayoutSet &other) const; // Union
-  LayoutSet operator&(const LayoutSet &other) const; // Intersect
-  LayoutSet operator-(const LayoutSet &other) const; // Minus
-
-public:
-  std::unordered_set<Layout>::const_iterator begin() const { return _set.begin(); }
-  std::unordered_set<Layout>::const_iterator end() const { return _set.end(); }
-
-private:
-  std::unordered_set<Layout> _set;
-};
-
-} // namespace operand
-} // namespace graph
-} // namespace neurun
-
-#endif // __NEURUN_GRAPH_OPERAND_LAYOUT_SET_H__
diff --git a/runtimes/neurun/src/graph/operand/LowerInfo.cc b/runtimes/neurun/src/graph/operand/LowerInfo.cc
deleted file mode 100644
index c26965911..000000000
--- a/runtimes/neurun/src/graph/operand/LowerInfo.cc
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "LowerInfo.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace operand
-{
-
-// NO IMPLEMENTATION YET
-
-} // namespace operand
-} // namespace graph
-} // namespace neurun
diff --git a/runtimes/neurun/src/graph/operand/LowerInfo.h b/runtimes/neurun/src/graph/operand/LowerInfo.h
deleted file mode 100644
index 7900e54d9..000000000
--- a/runtimes/neurun/src/graph/operand/LowerInfo.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_GRAPH_OPERAND_LOWER_INFO_H__
-#define __NEURUN_GRAPH_OPERAND_LOWER_INFO_H__
-
-#include <stdint.h>
-
-#include "BackendSet.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace operand
-{
-
-class LowerInfo
-{
-public:
-  class Shape4D
-  {
-  public:
-    Shape4D(uint32_t n, uint32_t h, uint32_t w, uint32_t c) : _n{n}, _h{h}, _w{w}, _c{c}
-    {
-      // DO NOTHING
-    }
-
-  public:
-    uint32_t n(void) const { return _n; }
-    uint32_t h(void) const { return _h; }
-    uint32_t w(void) const { return _w; }
-    uint32_t c(void) const { return _c; }
-
-  private:
-    uint32_t _n;
-    uint32_t _h;
-    uint32_t _w;
-    uint32_t _c;
-  };
-
-public:
-  LowerInfo(const Shape4D &shape) : _shape{shape}
-  {
-    // DO NOTHING
-  }
-
-public:
-  const Shape4D &shape(void) const { return _shape; }
-  const BackendSet &def_backends(void) const { return _def_backends; }
-  const BackendSet &use_backends(void) const { return _use_backends; }
-
-public:
-  void addDefBackend(const backend::Backend *backend) { _def_backends.add(backend); }
-  void addUseBackend(const backend::Backend *backend) { _use_backends.add(backend); }
-  void removeDefBackend(const backend::Backend *backend) { _def_backends.remove(backend); }
-  void removeUseBackend(const backend::Backend *backend) { _use_backends.remove(backend); }
-
-private:
-  Shape4D _shape;
-  BackendSet _def_backends;
-  BackendSet _use_backends;
-};
-
-} // namespace operand
-} // namespace graph
-} // namespace neurun
-
-#endif // __NEURUN_GRAPH_OPERAND_LOWED_INFO_H__
diff --git a/runtimes/neurun/src/graph/operand/ParentInfo.h b/runtimes/neurun/src/graph/operand/ParentInfo.h
deleted file mode 100644
index 5e6f56237..000000000
--- a/runtimes/neurun/src/graph/operand/ParentInfo.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file  ParentInfo.h
- * @brief This file contains ParentInfo class and internal Coordinate4D class
- *        to represent subsumption between operand
- */
-
-#ifndef __NEURUN_GRAPH_OPERAND_PARENT_INFO_H__
-#define __NEURUN_GRAPH_OPERAND_PARENT_INFO_H__
-
-#include <stdint.h>
-
-#include "model/operand/Index.h"
-#include "util/feature/Coordinate4D.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace operand
-{
-
-using neurun::util::feature::Coordinate4D;
-
-/**
- * @brief	Class to represent parent operand in child operand
- */
-class ParentInfo
-{
-public:
-  /**
-   * @brief     Construct a new ParentInfo object
-   * @param[in] parent      Index of parent operand
-   * @param[in] coordinate  Offset of child operand in parent operand
-   * @return
-   */
-  ParentInfo(const model::operand::Index parent, const Coordinate4D &coordinate)
-      : _parent{parent}, _coordinate{coordinate}
-  {
-    // DO NOTHING
-  }
-
-public:
-  /**
-   * @brief   Return parent index
-   * @return  Parent index
-   */
-  model::operand::Index parent(void) const { return _parent; }
-  /**
-   * @brief   Retern offset in parent
-   * @return  Offset
-   */
-  Coordinate4D offset(void) const { return _coordinate; }
-
-private:
-  model::operand::Index _parent;
-  Coordinate4D _coordinate;
-};
-
-} // namespace operand
-} // namespace graph
-} // namespace neurun
-
-#endif // __NEURUN_GRAPH_OPERAND_PARENT_INFO_H__
diff --git a/runtimes/neurun/src/graph/operand/Shape4DConvert.h b/runtimes/neurun/src/graph/operand/Shape4DConvert.h
deleted file mode 100644
index 73cf0903a..000000000
--- a/runtimes/neurun/src/graph/operand/Shape4DConvert.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_GRAPH_OPERAND_SHAPE4D_CONVERT_H__
-#define __NEURUN_GRAPH_OPERAND_SHAPE4D_CONVERT_H__
-
-#include "LowerInfo.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace operand
-{
-
-inline LowerInfo::Shape4D asShape4D(const model::operand::Shape &shape)
-{
-  switch (shape.rank())
-  {
-    case 0u:
-      return LowerInfo::Shape4D(1, 1, 1, 1);
-
-    case 1u:
-      return LowerInfo::Shape4D(shape.dim(0), 1, 1, 1);
-
-    case 2u:
-      return LowerInfo::Shape4D(shape.dim(0), shape.dim(1), 1, 1);
-
-    case 3u:
-      return LowerInfo::Shape4D(shape.dim(0), shape.dim(1), shape.dim(2), 1);
-
-    case 4u:
-      return LowerInfo::Shape4D(shape.dim(0), shape.dim(1), shape.dim(2), shape.dim(3));
-
-    default:
-      throw "Unsupported rank > 4";
-  }
-}
-
-} // namespace operand
-} // namespace graph
-} // namespace neurun
-
-#endif // __NEURUN_GRAPH_OPERAND_SHAPE4D_CONVERT_H__
diff --git a/runtimes/neurun/src/graph/operation/LowerInfo.cc b/runtimes/neurun/src/graph/operation/LowerInfo.cc
deleted file mode 100644
index 7862fd0c9..000000000
--- a/runtimes/neurun/src/graph/operation/LowerInfo.cc
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "LowerInfo.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace operation
-{
-
-LowerInfo::LowerInfo(const backend::Backend *backend) : _backend(backend)
-{
-  // DO NOTHING
-}
-
-} // namespace operation
-} // namespace graph
-} // namespace neurun
diff --git a/runtimes/neurun/src/graph/operation/LowerInfo.h b/runtimes/neurun/src/graph/operation/LowerInfo.h
deleted file mode 100644
index e920b0eb9..000000000
--- a/runtimes/neurun/src/graph/operation/LowerInfo.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_GRAPH_OPERATION_LOWER_INFO_H__
-#define __NEURUN_GRAPH_OPERATION_LOWER_INFO_H__
-
-#include <string>
-
-#include "backend/BackendManager.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace operation
-{
-
-class LowerInfo
-{
-public:
-  LowerInfo(const backend::Backend *backend);
-  const backend::Backend *backend() const { return _backend; }
-
-private:
-  const backend::Backend *_backend;
-};
-
-} // namespace operation
-} // namespace graph
-} // namespace neurun
-
-#endif // __NEURUN_GRAPH_OPERATION_LOWER_INFO_H__
diff --git a/runtimes/neurun/src/graph/pass/OperandPass.cc b/runtimes/neurun/src/graph/pass/OperandPass.cc
deleted file mode 100644
index 3c24d3830..000000000
--- a/runtimes/neurun/src/graph/pass/OperandPass.cc
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "OperandPass.h"
-
-#include "graph/Graph.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace pass
-{
-
-void OperandPass::run()
-{
-  _graph.operands().iterate([&](const model::operand::Index &index,
-                                model::operand::Object &object) { callback(index, object); });
-}
-
-} // namespace pass
-} // namespace graph
-} // namespace neurun
diff --git a/runtimes/neurun/src/graph/pass/OperandPass.h b/runtimes/neurun/src/graph/pass/OperandPass.h
deleted file mode 100644
index b84391082..000000000
--- a/runtimes/neurun/src/graph/pass/OperandPass.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_GRAPH_PASS_OPERAND_PASS_H__
-#define __NEURUN_GRAPH_PASS_OPERAND_PASS_H__
-
-#include "Pass.h"
-#include "model/operand/Index.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operand
-{
-class Object;
-} // namespace operand
-} // namespace graph
-} // namespace neurun
-
-namespace neurun
-{
-namespace graph
-{
-namespace pass
-{
-
-class OperandPass : public Pass
-{
-public:
-  using Pass::Pass;
-
-public:
-  virtual std::string id() = 0;
-  virtual void run() override final;
-  virtual void callback(const model::operand::Index &i, model::operand::Object &o) = 0;
-};
-
-} // namespace pass
-} // namespace graph
-} // namespace neurun
-
-#endif // __NEURUN_GRAPH_PASS_OPERAND_PASS_H__
diff --git a/runtimes/neurun/src/graph/pass/OperationPass.cc b/runtimes/neurun/src/graph/pass/OperationPass.cc
deleted file mode 100644
index e71f79188..000000000
--- a/runtimes/neurun/src/graph/pass/OperationPass.cc
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "OperationPass.h"
-
-#include "graph/Graph.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace pass
-{
-
-void OperationPass::run()
-{
-  _graph.operations().iterate([&](const model::operation::Index &index,
-                                  model::operation::Node &node) { callback(index, node); });
-}
-
-} // namespace pass
-} // namespace graph
-} // namespace neurun
diff --git a/runtimes/neurun/src/graph/pass/OperationPass.h b/runtimes/neurun/src/graph/pass/OperationPass.h
deleted file mode 100644
index e86f1aa57..000000000
--- a/runtimes/neurun/src/graph/pass/OperationPass.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file  OperationPass.h
- * @brief This file contains OperationPass class
- */
-
-#ifndef __NEURUN_GRAPH_PASS_OPERATION_PASS_H__
-#define __NEURUN_GRAPH_PASS_OPERATION_PASS_H__
-
-#include "Pass.h"
-
-#include "model/operation/Index.h"
-#include "model/operation/Node.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace pass
-{
-
-/**
- * @brief  Class to iterate over operations and calls callback() method
- */
-class OperationPass : public Pass
-{
-public:
-  using Pass::Pass;
-
-public:
-  /**
-   * @brief Returns string id for this pass. Same with class name.
-   *
-   * @return string id
-   */
-  virtual std::string id() = 0;
-
-  /**
-   * @brief Run the pass
-   */
-  virtual void run() override final;
-
-  /**
-   * @brief The function that will be executed for each operations
-   *
-   * @param i[in] Index of the operation node
-   * @param n[in] The operation node
-   */
-  virtual void callback(const model::operation::Index &i, model::operation::Node &n) = 0;
-};
-
-} // namespace pass
-} // namespace graph
-} // namespace neurun
-
-#endif // __NEURUN_GRAPH_PASS_OPERATION_PASS_H__
diff --git a/runtimes/neurun/src/graph/pass/PermutationEliminationPass.cc b/runtimes/neurun/src/graph/pass/PermutationEliminationPass.cc
deleted file mode 100644
index 848f6b574..000000000
--- a/runtimes/neurun/src/graph/pass/PermutationEliminationPass.cc
+++ /dev/null
@@ -1,192 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "PermutationEliminationPass.h"
-
-#include "model/operand/Object.h"
-#include "graph/Graph.h"
-#include "backend/interface/IConfig.h"
-#include "util/logging.h"
-#include "compiler/BackendResolver.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace pass
-{
-void PermutationEliminationPass::callback(const model::operand::Index &inp_index,
-                                          model::operand::Object &object)
-{
-  if (_graph.getInputs().contains(inp_index))
-  {
-    eliminateInput(inp_index, object);
-  }
-  else if (_graph.getOutputs().contains(inp_index))
-  {
-    eliminateOutput(inp_index, object);
-  }
-}
-
-void PermutationEliminationPass::eliminateInput(const model::operand::Index &inp_index,
-                                                model::operand::Object &object)
-{
-  auto &model_inputs = _graph.getInputs();
-
-  // get uses of the model's given input
-  auto uses = object.getUses();
-
-  // input must be used just by permutation
-  if (uses.size() != 1)
-  {
-    return;
-  }
-
-  for (auto input_use : uses.list())
-  {
-    auto &perm_operation = _graph.operations().at(input_use);
-    auto perm_inputs = perm_operation.getInputs();
-
-    auto perm_outputs = perm_operation.getOutputs();
-
-    if (!isPermuteLayerToEliminate(perm_inputs, perm_outputs, true))
-    {
-      return;
-    }
-
-    assert(perm_inputs.at(0) == inp_index);
-
-    VERBOSE(PermutationEliminationPass::EliminateInput) << "remove NHWC_TO_NCHW permutation\n";
-
-    // set model's new input, which was output of permutation
-    model_inputs.replace(inp_index, perm_outputs.at(0));
-
-    // remove model's input, which is also input of permutation
-    _graph.removeOperand(inp_index);
-
-    // remove permutation operation
-    _graph.operations().remove(input_use);
-
-    VERBOSE(PermutationEliminationPass::EliminateInput)
-        << inp_index.value() << " is model's input and is removed. New input is "
-        << perm_outputs.at(0).value() << "\n"
-        << input_use.value() << " is removed permutation operation\n";
-  }
-}
-
-void PermutationEliminationPass::eliminateOutput(const model::operand::Index &out_index,
-                                                 model::operand::Object &object)
-{
-  auto &model_outputs = _graph.getOutputs();
-
-  // get defs of the model's given output
-  auto defs = object.getDef();
-
-  // output must use just permutation
-  if (defs.size() != 1)
-  {
-    return;
-  }
-
-  for (auto output_def : defs.list())
-  {
-    auto &perm_operation = _graph.operations().at(output_def);
-    auto perm_outputs = perm_operation.getOutputs();
-
-    auto perm_inputs = perm_operation.getInputs();
-    if (!isPermuteLayerToEliminate(perm_inputs, perm_outputs, false))
-    {
-      return;
-    }
-
-    assert(perm_outputs.at(0) == out_index);
-
-    VERBOSE(PermutationEliminationPass::EliminateOutput) << "remove NCHW_TO_NHWC permutation\n";
-
-    // Update operations' output that is used by permute operand
-    for (auto perm_input_index : perm_inputs)
-    {
-      auto &perm_input_operand = _graph.operands().at(perm_input_index);
-      perm_input_operand.removeUse(output_def);
-    }
-
-    // set model's new output, which was input of permutation
-    model_outputs.replace(out_index, perm_inputs.at(0));
-
-    // remove model's output, which is also output of permutation
-    _graph.removeOperand(out_index);
-
-    // remove permutation operation
-    _graph.operations().remove(output_def);
-
-    VERBOSE(PermutationEliminationPass::EliminateOutput)
-        << out_index.value() << " is model's output and is removed. New output is "
-        << perm_inputs.at(0).value() << "\n"
-        << output_def.value() << " is removed permutation operation\n";
-  }
-}
-
-bool PermutationEliminationPass::isPermuteLayerToEliminate(
-    const model::operand::IndexSet &inp_indexes, const model::operand::IndexSet &out_indexes,
-    bool is_for_model_input)
-{
-  auto input_def_backends = _graph.operands().at(inp_indexes.at(0)).lower_info()->def_backends();
-  auto output_def_backends = _graph.operands().at(out_indexes.at(0)).lower_info()->def_backends();
-
-  auto input_layout = input_def_backends.getOnlyElement()->config()->getOperandLayout();
-  auto output_layout = output_def_backends.getOnlyElement()->config()->getOperandLayout();
-
-  if (input_def_backends.size() != 1 || output_def_backends.size() != 1)
-  {
-    return false;
-  }
-
-  // all operands' backend must be the same
-  for (auto index : inp_indexes)
-  {
-    auto op_backend_set = _graph.operands().at(index).lower_info()->def_backends();
-    if (op_backend_set.size() != 1 ||
-        input_layout != op_backend_set.getOnlyElement()->config()->getOperandLayout())
-    {
-      return false;
-    }
-  }
-  // all operands' backend must be the same
-  for (auto index : out_indexes)
-  {
-    auto op_backend_set = _graph.operands().at(index).lower_info()->def_backends();
-    if (op_backend_set.size() != 1 ||
-        output_layout != op_backend_set.getOnlyElement()->config()->getOperandLayout())
-    {
-      return false;
-    }
-  }
-
-  if (is_for_model_input)
-  {
-    // check if this is NHWC_TO_NCHW permutation: must have single input, which is model's input
-    return (inp_indexes.size() == 1 && input_layout == graph::operand::Layout::NHWC &&
-            output_layout == graph::operand::Layout::NCHW);
-  }
-
-  // check if this is NCHW_TO_NHWC permutation: must have single output, which is model's output
-  return (out_indexes.size() == 1 && input_layout == graph::operand::Layout::NCHW &&
-          output_layout == graph::operand::Layout::NHWC);
-}
-
-} // namespace pass
-} // namespace graph
-} // namespace neurun
diff --git a/runtimes/neurun/src/graph/pass/PermutationEliminationPass.h b/runtimes/neurun/src/graph/pass/PermutationEliminationPass.h
deleted file mode 100644
index 2b528c479..000000000
--- a/runtimes/neurun/src/graph/pass/PermutationEliminationPass.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_GRAPH_PASS_PERMUTATION_ELIMINATION_PASS_H__
-#define __NEURUN_GRAPH_PASS_PERMUTATION_ELIMINATION_PASS_H__
-
-#include "OperandPass.h"
-#include "model/operand/Object.h"
-#include "model/operand/IndexSet.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace pass
-{
-
-class PermutationEliminationPass : public OperandPass
-{
-public:
-  using OperandPass::OperandPass;
-
-public:
-  virtual std::string id() override { return "PermutationEliminationPass"; }
-
-  virtual void callback(const model::operand::Index &index, model::operand::Object &object);
-
-private:
-  /**
-   * @brief Remove Permute operation that permutates input
-   *
-   * Note: This function aslo removes model's input and
-   * sets output of permutation as model's new input
-   *
-   * @param inp_index is the target operand index for the elimination
-   * @param object is the target operand object for the elimination
-   *
-   * @return
-   */
-  void eliminateInput(const model::operand::Index &inp_index, model::operand::Object &object);
-
-  /**
-   * @brief Remove Permute operation that permutates output of a model
-   *
-   * Note: This function aslo removes model's output and
-   * sets input of permutation as model's new output
-   *
-   * @param out_index is the target operand index for the elimination
-   * @param object is the target operand object for the elimination
-   *
-   * @return
-   */
-  void eliminateOutput(const model::operand::Index &out_index, model::operand::Object &object);
-
-  /**
-   * @brief Determine if passed operands are permute layer's input and output, that must be
-   * eliminated
-   *
-   * @param inp_index indexes of the input operand to operation
-   * @param out_index indexes of the output operand to operation
-   * @param is_for_model_input checking for model's input or output
-   *
-   * @return if it is permutation layer
-   */
-  bool isPermuteLayerToEliminate(const model::operand::IndexSet &inp_indexes,
-                                 const model::operand::IndexSet &out_indexes,
-                                 bool is_for_model_input);
-};
-
-} // namespace pass
-} // namespace graph
-} // namespace neurun
-
-#endif // __NEURUN_GRAPH_PASS_PERMUTATION_ELIMINATION_PASS_H__
diff --git a/runtimes/neurun/src/graph/pass/PermutationInsertionPass.cc b/runtimes/neurun/src/graph/pass/PermutationInsertionPass.cc
deleted file mode 100644
index 9b833b8c5..000000000
--- a/runtimes/neurun/src/graph/pass/PermutationInsertionPass.cc
+++ /dev/null
@@ -1,191 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "PermutationInsertionPass.h"
-
-#include <cassert>
-#include <utility>
-#include <unordered_map>
-
-#include "model/operand/Object.h"
-#include "graph/operation/LowerInfo.h"
-#include "graph/Graph.h"
-#include "backend/interface/IConfig.h"
-#include "util/logging.h"
-#include "cpp14/memory.h"
-#include "model/operation/PermuteNode.h"
-#include "graph/operand/Shape4DConvert.h"
-#include "compiler/BackendResolver.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace pass
-{
-
-void PermutationInsertionPass::callback(const model::operand::Index &index,
-                                        model::operand::Object &object)
-{
-  auto &&operand_li = object.lower_info();
-  assert(operand_li);
-
-  // NOTE Later, constants also will have Def
-  // Ignore constants
-  if (operand_li->def_backends().size() == 0)
-  {
-    return;
-  }
-
-  std::list<model::operation::Index> permute_indexes;
-
-  // Build a map for all necessary type of operands
-  std::unordered_map<const backend::Backend *, model::operand::Index> backend_to_index;
-  {
-    assert(operand_li->def_backends().size() == 1);
-    for (auto backend : operand_li->def_backends())
-    {
-      backend_to_index.insert({backend, index});
-    }
-
-    auto insert_set = operand_li->use_backends() - operand_li->def_backends();
-    for (auto backend : insert_set)
-    {
-      const auto permute_operation_index = insertPermute(index, backend);
-      permute_indexes.push_back(permute_operation_index);
-      VERBOSE(PermutationInsertionPass) << "Insert 'Permute' operation for operand "
-                                        << index.value() << std::endl;
-      const auto &permute_operation = _graph.operations().at(permute_operation_index);
-      const auto permuted_operand_index = permute_operation.getOutputs().at(0);
-      backend_to_index.insert({backend, permuted_operand_index});
-    }
-  }
-
-  // Update operations' input that uses this operand
-  {
-    std::list<model::operation::Index> remove_list;
-
-    auto uses = object.getUses();
-    for (auto use : uses.list())
-    {
-      // If permute operation, ignore it
-      if (std::find(permute_indexes.begin(), permute_indexes.end(), use) != permute_indexes.end())
-        continue;
-
-      auto &operation = _graph.operations().at(use);
-      auto operation_li = _graph.getLowerInfo(use);
-      assert(operation_li);
-      auto backend = operation_li->backend();
-
-      auto use_node_inputs = operation.getInputs();
-      assert(use_node_inputs.contains(index));
-
-      auto new_index = backend_to_index.at(backend);
-      if (index != new_index)
-      {
-        // Update from operation
-        operation.replaceInput(index, new_index);
-
-        // Update from operand
-        remove_list.push_back(
-            use); // Removal should be done in another loop since we are in the loop
-        _graph.operands().at(new_index).appendUse(use);
-      }
-    }
-
-    for (auto &operation : remove_list)
-    {
-      object.removeUse(operation);
-    }
-  }
-}
-
-model::operation::Index
-PermutationInsertionPass::insertPermute(const model::operand::Index &operand_index,
-                                        const backend::Backend *backend)
-{
-  assert(!_graph.isBuildingPhase());
-
-  auto &operand = _graph.operands().at(operand_index);
-
-  // Generate output operand and permute operation
-  auto out_operand_index = _graph.addOperand(operand.shape(), operand.typeInfo());
-  auto &out_operand = _graph.operands().at(out_operand_index);
-  out_operand.setAsOperationOutput();
-  // change model output if operand_index is model output index
-  auto &model_outputs = _graph.getOutputs();
-  if (model_outputs.contains(operand_index))
-  {
-    model_outputs.replace(operand_index, out_operand_index);
-  }
-  out_operand.setAsOperationOutput();
-  auto out_operand_li =
-      nnfw::cpp14::make_unique<operand::LowerInfo>(operand::asShape4D(operand.shape()));
-  out_operand_li->addDefBackend(backend);
-  out_operand_li->addUseBackend(backend);
-  out_operand.lower_info(std::move(out_operand_li));
-
-  // Update LowerInfo of input operand
-  operand.lower_info()->removeUseBackend(backend);
-  operand.lower_info()->addUseBackend(operand.lower_info()->def_backends().getOnlyElement());
-
-  using PermuteNode = model::operation::PermuteNode;
-
-  // Find Permutation Type
-  auto type = [&]() {
-    auto input_layout =
-        operand.lower_info()->def_backends().getOnlyElement()->config()->getOperandLayout();
-    auto output_layout =
-        out_operand.lower_info()->def_backends().getOnlyElement()->config()->getOperandLayout();
-
-    if (input_layout == graph::operand::Layout::NHWC &&
-        output_layout == graph::operand::Layout::NCHW)
-    {
-      return PermuteNode::Type::NHWC_TO_NCHW;
-    }
-    else if (input_layout == graph::operand::Layout::NCHW &&
-             output_layout == graph::operand::Layout::NHWC)
-    {
-      return PermuteNode::Type::NCHW_TO_NHWC;
-    }
-    else
-    {
-      return PermuteNode::Type::COPY;
-    }
-  }();
-
-  // Insert permute operation to the graph
-  auto insert_node = nnfw::cpp14::make_unique<PermuteNode>(operand_index, out_operand_index, type);
-
-  auto node_index = _graph.operations().append(std::move(insert_node));
-  const auto &node = _graph.operations().at(node_index);
-
-  _graph.setLowerInfo(node_index, nnfw::cpp14::make_unique<graph::operation::LowerInfo>(
-                                      _graph.backend_resolver()->getDefaultBackend()));
-
-  // Update Use/Def info
-  {
-    _graph.operands().at(operand_index).appendUse(node_index);
-
-    auto node_out_indexes = node.getOutputs();
-    auto node_out_index = node_out_indexes.at(model::operand::IO::Index{0});
-    _graph.operands().at(node_out_index).appendDef(node_index);
-  }
-  return node_index;
-}
-} // namespace pass
-} // namespace graph
-} // namespace neurun
diff --git a/runtimes/neurun/src/graph/pass/PermutationInsertionPass.h b/runtimes/neurun/src/graph/pass/PermutationInsertionPass.h
deleted file mode 100644
index b2d417e82..000000000
--- a/runtimes/neurun/src/graph/pass/PermutationInsertionPass.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_GRAPH_PASS_PERMUTATION_INSERTION_PASS_H__
-#define __NEURUN_GRAPH_PASS_PERMUTATION_INSERTION_PASS_H__
-
-#include "OperandPass.h"
-#include "model/operand/Object.h" //for model::operation::Index
-
-namespace neurun
-{
-namespace graph
-{
-namespace pass
-{
-
-class PermutationInsertionPass : public OperandPass
-{
-public:
-  using OperandPass::OperandPass;
-
-public:
-  virtual std::string id() override { return "PermutationInsertionPass"; }
-  virtual void callback(const model::operand::Index &index, model::operand::Object &object);
-
-  /**
-   * @brief Insert Permute operation that has given operand as input
-   *
-   * @param operand_index is the target operand index for the insertion
-   * @param backend is the output operand's backend type
-   *
-   * @return model::operation::Index
-   */
-  model::operation::Index insertPermute(const model::operand::Index &operand_index,
-                                        const backend::Backend *backend);
-
-private:
-};
-
-} // namespace pass
-} // namespace graph
-} // namespace neurun
-
-#endif // __NEURUN_GRAPH_PASS_PERMUTATION_INSERTION_PASS_H__
diff --git a/runtimes/neurun/src/graph/verifier/Verifier.cc b/runtimes/neurun/src/graph/verifier/Verifier.cc
deleted file mode 100644
index a5b53af85..000000000
--- a/runtimes/neurun/src/graph/verifier/Verifier.cc
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Verifier.h"
-
-#include "graph/Graph.h"
-
-#include "util/logging.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace verifier
-{
-
-//
-// DAGChecker
-//
-
-bool DAGChecker::verify(const Graph &graph) const
-{
-  auto &operations = graph.operations();
-  bool cyclic = false;
-
-  std::unordered_map<model::operation::Index, bool> visited;
-  operations.iterate([&](const model::operation::Index &index, const model::operation::Node &) {
-    visited[index] = false;
-  });
-  std::unordered_map<model::operation::Index, bool> on_stack = visited; // Copy from visited
-
-  std::function<void(const model::operation::Index &index, const model::operation::Node &)>
-      dfs_recursive =
-          [&](const model::operation::Index &index, const model::operation::Node &node) -> void {
-    if (on_stack[index])
-      cyclic = true;
-    if (visited[index])
-      return;
-    visited[index] = true;
-    on_stack[index] = true;
-
-    for (auto output : node.getOutputs())
-    {
-      const auto &operand = graph.operands().at(output);
-      for (const auto &use : operand.getUses().list())
-      {
-        dfs_recursive(use, graph.operations().at(use));
-      }
-    }
-
-    on_stack[index] = false;
-  };
-
-  operations.iterate(dfs_recursive);
-
-  return !cyclic;
-}
-
-//
-// EdgeConsistencyVerifier
-//
-
-bool EdgeConsistencyChecker::verify(const Graph &graph) const
-{
-  auto &operations = graph.operations();
-  uint32_t mismatches = 0;
-  operations.iterate([&](const model::operation::Index &index, const model::operation::Node &node) {
-    for (auto operand_index : node.getInputs())
-    {
-      auto &operand = graph.operands().at(operand_index);
-      mismatches += (operand.getUses().contains(index) ? 0 : 1);
-    }
-    for (auto operand_index : node.getOutputs())
-    {
-      auto &operand = graph.operands().at(operand_index);
-      mismatches += (operand.getDef().contains(index) ? 0 : 1);
-    }
-  });
-  return mismatches == 0;
-}
-
-} // namespace verifier
-} // namespace graph
-} // namespace neurun
diff --git a/runtimes/neurun/src/graph/verifier/Verifier.h b/runtimes/neurun/src/graph/verifier/Verifier.h
deleted file mode 100644
index 5f1f79ee6..000000000
--- a/runtimes/neurun/src/graph/verifier/Verifier.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_GRAPH_VERIFIER_VERIFIER_H__
-#define __NEURUN_GRAPH_VERIFIER_VERIFIER_H__
-
-namespace neurun
-{
-namespace graph
-{
-class Graph;
-} // namespace graph
-} // namespace neurun
-
-namespace neurun
-{
-namespace graph
-{
-namespace verifier
-{
-
-struct IVerifier
-{
-  virtual ~IVerifier() = default;
-  virtual bool verify(const Graph &graph) const = 0;
-};
-
-} // namespace verifier
-} // namespace graph
-} // namespace neurun
-
-namespace neurun
-{
-namespace graph
-{
-namespace verifier
-{
-
-class DAGChecker : public IVerifier
-{
-public:
-  virtual bool verify(const Graph &graph) const override;
-};
-
-class EdgeConsistencyChecker : public IVerifier
-{
-public:
-  virtual bool verify(const Graph &graph) const override;
-};
-
-} // namespace verifier
-} // namespace graph
-} // namespace neurun
-
-#endif // __NEURUN_GRAPH_VERIFIER_VERIFIER_H__
diff --git a/runtimes/neurun/src/kernel/CMakeLists.txt b/runtimes/neurun/src/kernel/CMakeLists.txt
deleted file mode 100644
index a39823102..000000000
--- a/runtimes/neurun/src/kernel/CMakeLists.txt
+++ /dev/null
@@ -1,2 +0,0 @@
-add_subdirectory(cpu)
-add_subdirectory(acl_cl)
diff --git a/runtimes/neurun/src/kernel/acl_cl/CLFunction.h b/runtimes/neurun/src/kernel/acl_cl/CLFunction.h
deleted file mode 100644
index f34210c8a..000000000
--- a/runtimes/neurun/src/kernel/acl_cl/CLFunction.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_KERNEL_ACL_CL_CL_FUNCTION_H__
-#define __NEURUN_KERNEL_ACL_CL_CL_FUNCTION_H__
-
-#include "exec/interface/IFunction.h"
-#include <arm_compute/runtime/IFunction.h>
-#include <memory>
-
-namespace neurun
-{
-namespace kernel
-{
-namespace acl_cl
-{
-
-class CLFunction : public ::neurun::exec::IFunction
-{
-public:
-  CLFunction() = delete;
-
-public:
-  CLFunction(std::unique_ptr<::arm_compute::IFunction> &&func)
-      : _func(std::forward<std::unique_ptr<::arm_compute::IFunction>>(func))
-  {
-    // DO NOTHING
-  }
-
-public:
-  void run() override { _func->run(); }
-  void prepare() override { _func->prepare(); }
-
-private:
-  std::unique_ptr<::arm_compute::IFunction> _func;
-};
-
-} // namespace acl_cl
-} // namespace kernel
-} // namespace neurun
-
-#endif // __NEURUN_KERNEL_ACL_CL_CL_FUNCTION_H__
diff --git a/runtimes/neurun/src/kernel/acl_cl/CMakeLists.txt b/runtimes/neurun/src/kernel/acl_cl/CMakeLists.txt
deleted file mode 100644
index 0658effea..000000000
--- a/runtimes/neurun/src/kernel/acl_cl/CMakeLists.txt
+++ /dev/null
@@ -1,13 +0,0 @@
-file(GLOB SOURCES "*.cc")
-
-add_library(${LIB_NEURUN_KERNEL_ACL_CL} STATIC ${SOURCES})
-
-target_include_directories(${LIB_NEURUN_KERNEL_ACL_CL} PUBLIC ${NNFW_INCLUDE_DIR})
-target_include_directories(${LIB_NEURUN_KERNEL_ACL_CL} PUBLIC ${NEURUN_INCLUDE_DIR})
-
-target_link_libraries(${LIB_NEURUN_KERNEL_ACL_CL} arm_compute)
-target_link_libraries(${LIB_NEURUN_KERNEL_ACL_CL} nnfw_lib_misc)
-
-set_target_properties(${LIB_NEURUN_KERNEL_ACL_CL} PROPERTIES POSITION_INDEPENDENT_CODE ON)
-set_target_properties(${LIB_NEURUN_KERNEL_ACL_CL} PROPERTIES OUTPUT_NAME kernel_acl_cl)
-install(TARGETS ${LIB_NEURUN_KERNEL_ACL_CL} DESTINATION lib/neurun)
diff --git a/runtimes/neurun/src/kernel/acl_cl/ConcatLayer.cc b/runtimes/neurun/src/kernel/acl_cl/ConcatLayer.cc
deleted file mode 100644
index 3844317ab..000000000
--- a/runtimes/neurun/src/kernel/acl_cl/ConcatLayer.cc
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ConcatLayer.h"
-
-#include <arm_compute/runtime/CL/CLScheduler.h>
-
-#include "util/feature/nchw/View.h"
-#include "util/logging.h"
-
-namespace
-{
-
-bool matchSizeExceptAxis(const ::neurun::backend::acl_cl::operand::ICLTensor *t1,
-                         const ::neurun::backend::acl_cl::operand::ICLTensor *t2, uint32_t axis)
-{
-  assert(t1->num_dimensions() <= 4);
-  assert(t2->num_dimensions() <= 4);
-
-  for (uint32_t i = 0; i < 4; i++)
-  {
-    if (axis == i)
-      continue;
-    if (t1->dimension(i) != t2->dimension(i))
-      return false;
-  }
-  return true;
-}
-
-} // namespace {anonymous}
-
-namespace neurun
-{
-namespace kernel
-{
-namespace acl_cl
-{
-
-ConcatLayer::ConcatLayer()
-    : _input_allocs(), _output_alloc(nullptr), _axis(0), _input_type(OperandType::SCALAR_FLOAT32)
-{
-  // DO NOTHING
-}
-
-bool ConcatLayer::concatenationFloat32()
-{
-  // Input and output size check
-  {
-    // NOTE Support only tensor with dimension 4 or less
-
-    uint32_t axis_sum = 0;
-
-    for (auto input : _input_allocs)
-    {
-      assert(matchSizeExceptAxis(_output_alloc, input, _axis));
-      axis_sum += input->dimension(_axis);
-    }
-
-    assert(_output_alloc->dimension(_axis) == axis_sum);
-  }
-
-  VERBOSE(Concat_RUN) << "START Concat" << std::endl;
-
-  // Perform operation
-  {
-    uint32_t axis_offset = 0;
-
-    auto &queue = ::arm_compute::CLScheduler::get().queue();
-
-    _output_alloc->map(queue);
-    util::feature::nchw::View<float> output_view{_output_alloc};
-
-    for (auto input : _input_allocs)
-    {
-      input->map(queue);
-      const util::feature::nchw::View<float> input_reader{input};
-
-      for (uint32_t n = 0; n < input_reader.shape().N; n++)
-      {
-        for (uint32_t c = 0; c < input_reader.shape().C; c++)
-        {
-          for (uint32_t h = 0; h < input_reader.shape().H; h++)
-          {
-            for (uint32_t w = 0; w < input_reader.shape().W; w++)
-            {
-              uint32_t no = (_axis == 3) ? axis_offset : 0;
-              uint32_t co = (_axis == 2) ? axis_offset : 0;
-              uint32_t ho = (_axis == 1) ? axis_offset : 0;
-              uint32_t wo = (_axis == 0) ? axis_offset : 0;
-              output_view.at(n + no, c + co, h + ho, w + wo) = input_reader.at(n, c, h, w);
-            }
-          }
-        }
-      }
-      if (_axis == 3)
-        axis_offset += input_reader.shape().N;
-      if (_axis == 2)
-        axis_offset += input_reader.shape().C;
-      if (_axis == 1)
-        axis_offset += input_reader.shape().H;
-      if (_axis == 0)
-        axis_offset += input_reader.shape().W;
-
-      input->unmap(queue);
-    }
-    _output_alloc->unmap(queue);
-  }
-
-  VERBOSE(Concat_RUN) << "End   Concat" << std::endl;
-
-  return true;
-}
-
-void ConcatLayer::configure(
-    const std::vector<::neurun::backend::acl_cl::operand::ICLTensor *> &input_allocs, int32_t axis,
-    ::neurun::backend::acl_cl::operand::ICLTensor *output_alloc)
-{
-  _input_allocs = input_allocs;
-  _output_alloc = output_alloc;
-
-  assert(axis < 4);
-
-  // This map converts NHWC to NCHW(reversed)
-  // NHWC -> WHCN
-  static const uint32_t axis_map[] = {3, 1, 0, 2};
-  _axis = axis_map[axis];
-
-  // TODO Support Quant8
-  _input_type = OperandType::TENSOR_FLOAT32;
-}
-
-void ConcatLayer::run()
-{
-  if (_input_type == OperandType::TENSOR_FLOAT32)
-  {
-    concatenationFloat32();
-  }
-  else if (_input_type == OperandType::TENSOR_QUANT8_ASYMM)
-  {
-    throw std::runtime_error("NYI - concatenationQuant8()");
-  }
-}
-
-} // namespace acl_cl
-} // namespace kernel
-} // namespace neurun
diff --git a/runtimes/neurun/src/kernel/acl_cl/ConcatLayer.h b/runtimes/neurun/src/kernel/acl_cl/ConcatLayer.h
deleted file mode 100644
index d468a6dfb..000000000
--- a/runtimes/neurun/src/kernel/acl_cl/ConcatLayer.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_KERNEL_ACL_CL_CONCAT_LAYER_H__
-#define __NEURUN_KERNEL_ACL_CL_CONCAT_LAYER_H__
-
-#include <NeuralNetworks.h>
-
-#include <arm_compute/runtime/IFunction.h>
-
-#include "model/operand/DataType.h"
-#include "backend/acl_cl/operand/ICLTensor.h"
-
-using OperandType = neurun::model::operand::DataType;
-
-namespace neurun
-{
-namespace kernel
-{
-namespace acl_cl
-{
-
-//
-// neurun::kernel::acl_cl::ConcatLayer
-// A naive implementation of ConcatLayer for ACL
-//
-
-class ConcatLayer : public ::arm_compute::IFunction
-{
-public:
-  ConcatLayer();
-
-public:
-  void configure(const std::vector<::neurun::backend::acl_cl::operand::ICLTensor *> &input_allocs,
-                 int32_t axis /* NNAPI tensor axis from NHWC order */,
-                 ::neurun::backend::acl_cl::operand::ICLTensor *output_alloc);
-
-  void run();
-
-private:
-  bool concatenationFloat32();
-
-private:
-  std::vector<::neurun::backend::acl_cl::operand::ICLTensor *> _input_allocs;
-  ::neurun::backend::acl_cl::operand::ICLTensor *_output_alloc;
-  int32_t _axis;
-  OperandType _input_type;
-};
-
-} // namespace acl_cl
-} // namespace kernel
-} // namespace neurun
-
-#endif // __NEURUN_KERNEL_ACL_CL_CONCAT_LAYER_H__
diff --git a/runtimes/neurun/src/kernel/cpu/AvgPoolLayer.cc b/runtimes/neurun/src/kernel/cpu/AvgPoolLayer.cc
deleted file mode 100644
index f434a6dec..000000000
--- a/runtimes/neurun/src/kernel/cpu/AvgPoolLayer.cc
+++ /dev/null
@@ -1,118 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "AvgPoolLayer.h"
-
-#include "tensorflow/contrib/lite/kernels/internal/optimized/optimized_ops.h"
-#include "kernel/cpu/OperationUtils.h"
-
-namespace neurun
-{
-namespace kernel
-{
-namespace cpu
-{
-
-#define AVGPOOLING_PARAMETERS                            \
-  tflite::PoolParams op_params;                          \
-  op_params.stride_height = _strideHeight;               \
-  op_params.stride_width = _strideWidth;                 \
-  op_params.filter_height = _kernelHeight;               \
-  op_params.filter_width = _kernelWidth;                 \
-  op_params.padding_values.height = (int8_t)_paddingTop; \
-  op_params.padding_values.width = (int8_t)_paddingLeft;
-
-AvgPoolLayer::AvgPoolLayer()
-    : _inputData(nullptr), _outputData(nullptr), _inputShape(), _outputShape(), _paddingLeft(0),
-      _paddingTop(0), _paddingRight(0), _paddingBottom(0), _strideWidth(0), _strideHeight(0),
-      _kernelWidth(0), _kernelHeight(0), _activation(ANEURALNETWORKS_FUSED_NONE),
-      _inputType(OperandType::SCALAR_FLOAT32)
-{
-  // DO NOTHING
-}
-
-bool AvgPoolLayer::averagePoolFloat32()
-{
-  AVGPOOLING_PARAMETERS
-  float output_activation_min, output_activation_max;
-  CalculateActivationRangeFloat(_activation, &output_activation_min, &output_activation_max);
-  op_params.float_activation_min = output_activation_min;
-  op_params.float_activation_max = output_activation_max;
-
-  ::tflite::optimized_ops::AveragePool(op_params, convertShapeToTFLiteShape(_inputShape),
-                                       reinterpret_cast<const float *>(_inputData),
-                                       convertShapeToTFLiteShape(_outputShape),
-                                       reinterpret_cast<float *>(_outputData));
-  return true;
-}
-bool AvgPoolLayer::averagePoolQuant8()
-{
-  AVGPOOLING_PARAMETERS
-  int32_t output_activation_min = 0;
-  int32_t output_activation_max = 0;
-  CalculateActivationRangeUint8(_activation, _outputShape, &output_activation_min,
-                                &output_activation_max);
-  op_params.quantized_activation_min = output_activation_min;
-  op_params.quantized_activation_max = output_activation_max;
-
-  ::tflite::optimized_ops::AveragePool(op_params, convertShapeToTFLiteShape(_inputShape),
-                                       _inputData, convertShapeToTFLiteShape(_outputShape),
-                                       _outputData);
-  return true;
-}
-
-void AvgPoolLayer::configure(uint8_t *inputData, const Shape inputShape, const uint32_t paddingLeft,
-                             const uint32_t paddingRight, const uint32_t paddingTop,
-                             const uint32_t paddingBottom, const uint32_t strideWidth,
-                             const uint32_t strideHeight, const uint32_t kernelWidth,
-                             const uint32_t kernelHeight, const FuseCode activation,
-                             uint8_t *outputData, const Shape outputShape)
-{
-  _inputData = inputData;
-  _inputShape = inputShape;
-  _inputType = inputShape.type;
-  _paddingLeft = paddingLeft;
-  _paddingRight = paddingRight;
-  _paddingTop = paddingTop;
-  _paddingBottom = paddingBottom;
-  _strideWidth = strideWidth;
-  _strideHeight = strideHeight;
-  _kernelWidth = kernelWidth;
-  _kernelHeight = kernelHeight;
-  _activation = activation;
-  _outputData = outputData;
-  _outputShape = outputShape;
-}
-
-void AvgPoolLayer::run()
-{
-  if (_inputType == OperandType::TENSOR_FLOAT32)
-  {
-    averagePoolFloat32();
-  }
-  else if (_inputType == OperandType::TENSOR_QUANT8_ASYMM)
-  {
-    throw std::runtime_error{"AvgPoolLayer : Not tested for TENSOR_QUANT8_ASYMM"};
-    // averagePoolQuant8();
-  }
-}
-
-#undef AVGPOOLING_PARAMETERS
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
diff --git a/runtimes/neurun/src/kernel/cpu/AvgPoolLayer.h b/runtimes/neurun/src/kernel/cpu/AvgPoolLayer.h
deleted file mode 100644
index 280f7ae5f..000000000
--- a/runtimes/neurun/src/kernel/cpu/AvgPoolLayer.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_KERNEL_CPU_AVGPOOLLAYER_H__
-#define __NEURUN_KERNEL_CPU_AVGPOOLLAYER_H__
-
-#include <NeuralNetworks.h>
-
-#include "exec/interface/IFunction.h"
-
-#include "kernel/cpu/OperationUtils.h"
-
-namespace neurun
-{
-namespace kernel
-{
-namespace cpu
-{
-
-class AvgPoolLayer : public ::neurun::exec::IFunction
-{
-public:
-  AvgPoolLayer();
-
-public:
-  bool averagePoolFloat32();
-
-  bool averagePoolQuant8();
-
-  void configure(uint8_t *inputData, const Shape inputShape, const uint32_t paddingLeft,
-                 const uint32_t paddingRight, const uint32_t paddingTop,
-                 const uint32_t paddingBottom, const uint32_t strideWidth,
-                 const uint32_t strideHeight, const uint32_t kernelWidth,
-                 const uint32_t kernelHeight, const FuseCode activation, uint8_t *outputData,
-                 const Shape outputShape);
-
-  void run();
-
-private:
-  uint8_t *_inputData;
-  uint8_t *_outputData;
-
-  Shape _inputShape;
-  Shape _outputShape;
-
-  uint32_t _paddingLeft;
-  uint32_t _paddingTop;
-  uint32_t _paddingRight;
-  uint32_t _paddingBottom;
-
-  uint32_t _strideWidth;
-  uint32_t _strideHeight;
-  uint32_t _kernelWidth;
-  uint32_t _kernelHeight;
-
-  FuseCode _activation;
-
-  OperandType _inputType;
-};
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
-
-#endif // __NEURUN_KERNEL_CPU_AVGPOOLLAYER_H__
diff --git a/runtimes/neurun/src/kernel/cpu/CMakeLists.txt b/runtimes/neurun/src/kernel/cpu/CMakeLists.txt
deleted file mode 100644
index 436cb898c..000000000
--- a/runtimes/neurun/src/kernel/cpu/CMakeLists.txt
+++ /dev/null
@@ -1,14 +0,0 @@
-file(GLOB SOURCES "*.cc")
-
-add_library(${LIB_NEURUN_KERNEL_CPU} STATIC ${SOURCES})
-
-target_include_directories(${LIB_NEURUN_KERNEL_CPU} PUBLIC ${NNFW_INCLUDE_DIR})
-target_include_directories(${LIB_NEURUN_KERNEL_CPU} PUBLIC ${NEURUN_INCLUDE_DIR})
-target_include_directories(${LIB_NEURUN_KERNEL_CPU} PUBLIC ${CMAKE_SOURCE_DIR}/externals/tensorflow)
-
-target_link_libraries(${LIB_NEURUN_KERNEL_CPU} tensorflow-lite)
-target_link_libraries(${LIB_NEURUN_KERNEL_CPU} nnfw_lib_misc)
-
-set_target_properties(${LIB_NEURUN_KERNEL_CPU} PROPERTIES POSITION_INDEPENDENT_CODE ON)
-set_target_properties(${LIB_NEURUN_KERNEL_CPU} PROPERTIES OUTPUT_NAME kernel_cpu)
-install(TARGETS ${LIB_NEURUN_KERNEL_CPU} DESTINATION lib/neurun)
diff --git a/runtimes/neurun/src/kernel/cpu/ConcatLayer.cc b/runtimes/neurun/src/kernel/cpu/ConcatLayer.cc
deleted file mode 100644
index be093b437..000000000
--- a/runtimes/neurun/src/kernel/cpu/ConcatLayer.cc
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ConcatLayer.h"
-
-#include "tensorflow/contrib/lite/kernels/internal/optimized/optimized_ops.h"
-#include "kernel/cpu/OperationUtils.h"
-
-namespace neurun
-{
-namespace kernel
-{
-
-namespace cpu
-{
-
-ConcatLayer::ConcatLayer()
-    : _inputDataPtrs(), _outputData(nullptr), _axis(0), _inputShapes(), _outputShape(),
-      _inputType(OperandType::SCALAR_FLOAT32)
-{
-  // DO NOTHING
-}
-
-bool ConcatLayer::concatenationFloat32()
-{
-  uint32_t num_inputs = _inputShapes.size();
-
-  tflite::ConcatenationParams op_params;
-  op_params.axis = _axis;
-  op_params.inputs_count = num_inputs;
-
-  std::vector<::tflite::RuntimeShape *> inputDimsPtr;
-  std::vector<::tflite::RuntimeShape> inputDims;
-  inputDimsPtr.reserve(num_inputs);
-  inputDims.reserve(num_inputs);
-
-  for (uint32_t i = 0; i < num_inputs; i++)
-  {
-    inputDims.push_back(convertShapeToTFLiteShape(_inputShapes[i]));
-    inputDimsPtr.push_back(&inputDims[i]);
-  }
-
-  std::vector<const float *> inputFloatPtrs;
-
-  for (auto ptr : _inputDataPtrs)
-  {
-    inputFloatPtrs.emplace_back(reinterpret_cast<const float *>(ptr));
-  }
-
-  ::tflite::optimized_ops::Concatenation<float>(
-      op_params, inputDimsPtr.data(), inputFloatPtrs.data(),
-      convertShapeToTFLiteShape(_outputShape), reinterpret_cast<float *>(_outputData));
-  return true;
-}
-bool ConcatLayer::concatenationQuant8()
-{
-  int num_inputs = _inputShapes.size();
-
-  std::vector<int32_t> input_zeropoints(num_inputs);
-  std::vector<float> input_scales(num_inputs);
-  for (uint32_t i = 0; i < num_inputs; i++)
-  {
-    input_zeropoints[i] = _inputShapes[i].offset;
-    input_scales[i] = _inputShapes[i].scale;
-  }
-
-  tflite::ConcatenationParams op_params;
-  op_params.axis = _axis;
-  op_params.inputs_count = num_inputs;
-  op_params.input_zeropoint = input_zeropoints.data();
-  op_params.input_scale = input_scales.data();
-  op_params.output_zeropoint = _outputShape.offset;
-  op_params.output_scale = _outputShape.scale;
-
-  std::vector<::tflite::RuntimeShape *> inputDimsPtr;
-  std::vector<::tflite::RuntimeShape> inputDims;
-  inputDimsPtr.reserve(num_inputs);
-  inputDims.reserve(num_inputs);
-  for (uint32_t i = 0; i < num_inputs; i++)
-  {
-    inputDims.push_back(convertShapeToTFLiteShape(_inputShapes[i]));
-    inputDimsPtr.push_back(&inputDims[i]);
-  }
-
-  ::tflite::optimized_ops::Concatenation<uint8_t>(
-      op_params, inputDimsPtr.data(), _inputDataPtrs.data(),
-      convertShapeToTFLiteShape(_outputShape), _outputData);
-  return true;
-}
-
-void ConcatLayer::configure(const std::vector<const uint8_t *> &inputDataPtrs,
-                            const std::vector<Shape> &inputShapes, int32_t axis,
-                            uint8_t *outputData, const Shape outputShape)
-{
-  _inputDataPtrs = inputDataPtrs;
-
-  for (auto shape : inputShapes)
-  {
-    _inputShapes.emplace_back(shape);
-    _inputType = shape.type;
-  }
-
-  _axis = axis;
-
-  _outputData = outputData;
-  _outputShape = outputShape;
-}
-
-void ConcatLayer::run()
-{
-  if (_inputType == OperandType::TENSOR_FLOAT32)
-  {
-    concatenationFloat32();
-  }
-  else if (_inputType == OperandType::TENSOR_QUANT8_ASYMM)
-  {
-    throw std::runtime_error{"ConcatLayer : Not tested for TENSOR_QUANT8_ASYMM"};
-    // concatenationQuant8();
-  }
-}
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
diff --git a/runtimes/neurun/src/kernel/cpu/ConcatLayer.h b/runtimes/neurun/src/kernel/cpu/ConcatLayer.h
deleted file mode 100644
index 64f813508..000000000
--- a/runtimes/neurun/src/kernel/cpu/ConcatLayer.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_KERNEL_CPU_CONCATLAYER_H__
-#define __NEURUN_KERNEL_CPU_CONCATLAYER_H__
-
-#include <NeuralNetworks.h>
-
-#include "exec/interface/IFunction.h"
-
-#include "kernel/cpu/OperationUtils.h"
-
-namespace neurun
-{
-namespace kernel
-{
-namespace cpu
-{
-
-class ConcatLayer : public ::neurun::exec::IFunction
-{
-public:
-  ConcatLayer();
-
-public:
-  bool concatenationFloat32();
-
-  bool concatenationQuant8();
-
-  void configure(const std::vector<const uint8_t *> &inputDataPtrs,
-                 const std::vector<Shape> &inputShapes, int32_t axis, uint8_t *outputData,
-                 const Shape outputShape);
-
-  void run();
-
-private:
-  std::vector<const uint8_t *> _inputDataPtrs;
-  uint8_t *_outputData;
-
-  int32_t _axis;
-
-  std::vector<Shape> _inputShapes;
-  Shape _outputShape;
-
-  OperandType _inputType;
-};
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
-
-#endif // __NEURUN_KERNEL_CPU_CONCATLAYER_H__
diff --git a/runtimes/neurun/src/kernel/cpu/ConvolutionLayer.cc b/runtimes/neurun/src/kernel/cpu/ConvolutionLayer.cc
deleted file mode 100644
index c694fa75f..000000000
--- a/runtimes/neurun/src/kernel/cpu/ConvolutionLayer.cc
+++ /dev/null
@@ -1,228 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ConvolutionLayer.h"
-
-#include "tensorflow/contrib/lite/kernels/internal/optimized/optimized_ops.h"
-#include "kernel/cpu/OperationUtils.h"
-
-#include <mutex>
-
-namespace neurun
-{
-namespace kernel
-{
-namespace cpu
-{
-
-// If possible we will use this static buffer for the tensor.
-static constexpr int kStaticBufferSize = 1605632;
-static char static_scratch_buffer[kStaticBufferSize];
-static std::mutex executionMutex;
-
-#define ANDROID_NN_CONV_PARAMETERS(Type)                                     \
-  uint32_t height = getSizeOfDimension(_inputShape, 1);                      \
-  uint32_t width = getSizeOfDimension(_inputShape, 2);                       \
-  uint32_t kernelHeight = getSizeOfDimension(_kernelShape, 1);               \
-  uint32_t kernelWidth = getSizeOfDimension(_kernelShape, 2);                \
-  uint32_t outHeight = getSizeOfDimension(_outputShape, 1);                  \
-  uint32_t outWidth = getSizeOfDimension(_outputShape, 2);                   \
-  uint32_t inDepth = getSizeOfDimension(_inputShape, 3);                     \
-                                                                             \
-  uint32_t paddingHeight = (uint32_t)_paddingTop;                            \
-  uint32_t paddingWidth = (uint32_t)_paddingLeft;                            \
-                                                                             \
-  Shape im2colShape;                                                         \
-  im2colShape.dimensions.resize(4);                                          \
-  im2colShape.dimensions[0] = getSizeOfDimension(_outputShape, 0);           \
-  im2colShape.dimensions[1] = getSizeOfDimension(_outputShape, 1);           \
-  im2colShape.dimensions[2] = getSizeOfDimension(_outputShape, 2);           \
-  im2colShape.dimensions[3] = inDepth * kernelHeight * kernelWidth;          \
-                                                                             \
-  Type *im2colData = nullptr;                                                \
-  uint64_t im2colByteSize = sizeof(Type);                                    \
-  std::unique_ptr<Type[]> im2colGuard;                                       \
-  for (int i = 0; i < 4; i++)                                                \
-  {                                                                          \
-    im2colByteSize *= im2colShape.dimensions[i];                             \
-  }                                                                          \
-  /* http://b/77982879, tflite::optimized_ops::Conv uses int for offsets */  \
-  if (im2colByteSize >= 0x7fffffff)                                          \
-  {                                                                          \
-    std::cout << "Conv size is too large, not enough memory" << std::endl;   \
-    return false;                                                            \
-  }                                                                          \
-  if (im2colByteSize <= kStaticBufferSize)                                   \
-  {                                                                          \
-    im2colData = reinterpret_cast<Type *>(static_scratch_buffer);            \
-  }                                                                          \
-  else                                                                       \
-  {                                                                          \
-    im2colData = new (std::nothrow) Type[im2colByteSize / sizeof(Type)];     \
-    if (im2colData == nullptr)                                               \
-    {                                                                        \
-      std::cout << "Conv size is too large, not enough memory" << std::endl; \
-      return false;                                                          \
-    }                                                                        \
-    im2colGuard.reset(im2colData);                                           \
-  }
-
-ConvolutionLayer::ConvolutionLayer()
-    : _inputData(nullptr), _kernelData(nullptr), _outputData(nullptr), _biasData(nullptr),
-      _inputShape(), _kernelShape(), _outputShape(), _biasShape(), _paddingLeft(0), _paddingTop(0),
-      _paddingRight(0), _paddingBottom(0), _strideWidth(0), _strideHeight(0),
-      _activation(ANEURALNETWORKS_FUSED_NONE), _inputType(OperandType::SCALAR_FLOAT32)
-{
-  // DO NOTHING
-}
-
-bool ConvolutionLayer::convFloat32()
-{
-  ANDROID_NN_CONV_PARAMETERS(float)
-
-  const ::tflite::Dims<4> &kernel_dim = convertShapeToDims(_kernelShape);
-  const int kernel_width = ArraySize(kernel_dim, 1);
-  const int kernel_height = ArraySize(kernel_dim, 2);
-  const bool need_im2col =
-      _strideWidth != 1 || _strideHeight != 1 || kernel_width != 1 || kernel_height != 1;
-
-  float *im2colDataToPass = nullptr;
-  if (need_im2col)
-  {
-    im2colDataToPass = im2colData;
-  }
-
-  float output_activation_min, output_activation_max;
-  CalculateActivationRangeFloat(_activation, &output_activation_min, &output_activation_max);
-  int32_t dilationWidthFactor = 1, dilationHeightFactor = 1;
-
-  ::tflite::ConvParams op_params;
-  op_params.padding_type = ::tflite::PaddingType::kSame;
-  op_params.padding_values.width = paddingWidth;
-  op_params.padding_values.height = paddingHeight;
-  op_params.stride_width = _strideWidth;
-  op_params.stride_height = _strideHeight;
-  op_params.dilation_width_factor = dilationWidthFactor;
-  op_params.dilation_height_factor = dilationHeightFactor;
-  op_params.float_activation_min = output_activation_min;
-  op_params.float_activation_max = output_activation_max;
-
-  ::tflite::optimized_ops::Conv(
-      op_params, convertShapeToTFLiteShape(_inputShape),
-      reinterpret_cast<const float *>(_inputData), convertShapeToTFLiteShape(_kernelShape),
-      reinterpret_cast<const float *>(_kernelData), convertShapeToTFLiteShape(_biasShape),
-      reinterpret_cast<const float *>(_biasData), convertShapeToTFLiteShape(_outputShape),
-      reinterpret_cast<float *>(_outputData), convertShapeToTFLiteShape(im2colShape),
-      im2colDataToPass);
-  return true;
-}
-
-bool ConvolutionLayer::convQuant8()
-{
-  ANDROID_NN_CONV_PARAMETERS(uint8_t)
-
-  int32_t inputOffset = -_inputShape.offset;
-  int32_t kernelOffset = -_kernelShape.offset;
-  int32_t outputOffset = _outputShape.offset;
-  float real_multiplier = 0.0;
-  int32_t output_multiplier = 0;
-  int32_t output_shift = 0;
-  int32_t output_activation_min = 0;
-  int32_t output_activation_max = 0;
-  if (!GetQuantizedConvolutionMultipler(_inputShape, _kernelShape, _biasShape, _outputShape,
-                                        &real_multiplier) ||
-      !QuantizeMultiplierSmallerThanOne(real_multiplier, &output_multiplier, &output_shift))
-  {
-    return false;
-  }
-  CalculateActivationRangeUint8(_activation, _outputShape, &output_activation_min,
-                                &output_activation_max);
-  int32_t dilationWidthFactor = 1, dilationHeightFactor = 1;
-
-  ::tflite::ConvParams op_params;
-  op_params.padding_type = ::tflite::PaddingType::kSame;
-  op_params.padding_values.width = paddingWidth;
-  op_params.padding_values.height = paddingHeight;
-  op_params.stride_width = _strideWidth;
-  op_params.stride_height = _strideHeight;
-  op_params.dilation_width_factor = dilationWidthFactor;
-  op_params.dilation_height_factor = dilationHeightFactor;
-  op_params.input_offset = inputOffset;
-  op_params.weights_offset = kernelOffset;
-  op_params.output_offset = outputOffset;
-  op_params.output_multiplier = output_multiplier;
-  op_params.output_shift = output_shift;
-  op_params.quantized_activation_min = output_activation_min;
-  op_params.quantized_activation_max = output_activation_max;
-
-  static gemmlowp::GemmContext gemm_context;
-  // Prevent concurrent executions that may access the scratch buffer and
-  // gemm_context.
-  std::unique_lock<std::mutex> lock(executionMutex);
-  // Alow gemmlowp automatically decide how many threads to use.
-  gemm_context.set_max_num_threads(0);
-  ::tflite::optimized_ops::Conv(
-      op_params, convertShapeToTFLiteShape(_inputShape), _inputData,
-      convertShapeToTFLiteShape(_kernelShape), _kernelData, convertShapeToTFLiteShape(_biasShape),
-      reinterpret_cast<const int32_t *>(_biasData), convertShapeToTFLiteShape(_outputShape),
-      _outputData, convertShapeToTFLiteShape(im2colShape), im2colData, &gemm_context);
-  return true;
-}
-
-void ConvolutionLayer::configure(uint8_t *inputData, const Shape inputShape, uint8_t *kernelData,
-                                 const Shape kernelShape, uint8_t *biasData, const Shape biasShape,
-                                 const uint32_t paddingLeft, const uint32_t paddingRight,
-                                 const uint32_t paddingTop, const uint32_t paddingBottom,
-                                 const uint32_t strideWidth, const uint32_t strideHeight,
-                                 const FuseCode activation, uint8_t *outputData,
-                                 const Shape outputShape)
-{
-  _inputData = inputData;
-  _inputShape = inputShape;
-  _inputType = inputShape.type;
-  _kernelData = kernelData;
-  _kernelShape = kernelShape;
-  _biasData = biasData;
-  _biasShape = biasShape;
-  _paddingLeft = paddingLeft;
-  _paddingRight = paddingRight;
-  _paddingTop = paddingTop;
-  _paddingBottom = paddingBottom;
-  _strideWidth = strideWidth;
-  _strideHeight = strideHeight;
-  _activation = activation;
-  _outputData = outputData;
-  _outputShape = outputShape;
-}
-
-void ConvolutionLayer::run()
-{
-  if (_inputType == OperandType::TENSOR_FLOAT32)
-  {
-    convFloat32();
-  }
-  else if (_inputType == OperandType::TENSOR_QUANT8_ASYMM)
-  {
-    throw std::runtime_error{"ConvolutionLayer : Not tested for TENSOR_QUANT8_ASYMM"};
-    // convQuant8();
-  }
-}
-
-#undef ANDROID_NN_CONV_PARAMETERS
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
diff --git a/runtimes/neurun/src/kernel/cpu/ConvolutionLayer.h b/runtimes/neurun/src/kernel/cpu/ConvolutionLayer.h
deleted file mode 100644
index 9b7f55ff1..000000000
--- a/runtimes/neurun/src/kernel/cpu/ConvolutionLayer.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_KERNEL_CPU_CONVOLUTIONLAYER_H__
-#define __NEURUN_KERNEL_CPU_CONVOLUTIONLAYER_H__
-
-#include <NeuralNetworks.h>
-
-#include "exec/interface/IFunction.h"
-
-#include "kernel/cpu/OperationUtils.h"
-
-namespace neurun
-{
-namespace kernel
-{
-namespace cpu
-{
-
-class ConvolutionLayer : public ::neurun::exec::IFunction
-{
-public:
-  ConvolutionLayer();
-
-public:
-  bool convFloat32();
-
-  bool convQuant8();
-
-  void configure(uint8_t *inputData, const Shape inputShape, uint8_t *kernelData,
-                 const Shape kernelShape, uint8_t *biasData, const Shape biasShape,
-                 const uint32_t paddingLeft, const uint32_t paddingRight, const uint32_t paddingTop,
-                 const uint32_t paddingBottom, const uint32_t strideW, const uint32_t strideH,
-                 const FuseCode activation, uint8_t *outputData, const Shape outputShape);
-
-  void run();
-
-private:
-  uint8_t *_inputData;
-  uint8_t *_kernelData;
-  uint8_t *_outputData;
-  uint8_t *_biasData;
-
-  Shape _inputShape;
-  Shape _kernelShape;
-  Shape _outputShape;
-  Shape _biasShape;
-
-  uint32_t _paddingLeft;
-  uint32_t _paddingTop;
-  uint32_t _paddingRight;
-  uint32_t _paddingBottom;
-
-  uint32_t _strideWidth;
-  uint32_t _strideHeight;
-
-  FuseCode _activation;
-
-  OperandType _inputType;
-};
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
-
-#endif // __NEURUN_KERNEL_CPU_CONVOLUTIONLAYER_H__
diff --git a/runtimes/neurun/src/kernel/cpu/FullyConnectedLayer.cc b/runtimes/neurun/src/kernel/cpu/FullyConnectedLayer.cc
deleted file mode 100644
index abe82db5e..000000000
--- a/runtimes/neurun/src/kernel/cpu/FullyConnectedLayer.cc
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "FullyConnectedLayer.h"
-
-#include "tensorflow/contrib/lite/kernels/internal/optimized/optimized_ops.h"
-#include "tensorflow/contrib/lite/kernels/internal/reference/reference_ops.h"
-#include "kernel/cpu/OperationUtils.h"
-
-#include <mutex>
-
-namespace neurun
-{
-namespace kernel
-{
-namespace cpu
-{
-
-FullyConnectedLayer::FullyConnectedLayer()
-    : _inputData(nullptr), _weightsData(nullptr), _biasData(nullptr), _outputData(nullptr),
-      _inputShape(), _weightsShape(), _biasShape(), _outputShape(),
-      _activation(ANEURALNETWORKS_FUSED_NONE), _inputType(OperandType::SCALAR_FLOAT32)
-{
-  // DO NOTHING
-}
-
-// executionMutex is used to protect concurrent access of non-threadsafe resources
-// like gemmlowp::GemmContext.
-// std::mutex is safe for pthreads on Android.
-static std::mutex executionMutex;
-bool FullyConnectedLayer::fullyConnectedFloat32()
-{
-  int total_input_size = 1;
-  for (int i = 0; i < _inputShape.dimensions.size(); i++)
-  {
-    total_input_size *= _inputShape.dimensions[i];
-  }
-
-  int input_size = _weightsShape.dimensions[1];
-  const int batch_size = total_input_size / input_size;
-  const int num_units = _weightsShape.dimensions[0];
-
-  TfLiteFusedActivation act = convertFusedActivation(_activation);
-
-  ::tflite::tensor_utils::VectorBatchVectorAssign(reinterpret_cast<const float *>(_biasData),
-                                                  num_units, batch_size,
-                                                  reinterpret_cast<float *>(_outputData));
-
-  // Compute output += weight * input
-  ::tflite::tensor_utils::MatrixBatchVectorMultiplyAccumulate(
-      reinterpret_cast<const float *>(_weightsData), num_units, input_size,
-      reinterpret_cast<const float *>(_inputData), batch_size,
-      reinterpret_cast<float *>(_outputData), /*result_stride=*/1);
-
-  // Apply activation function
-  ::tflite::tensor_utils::ApplyActivationToVector(reinterpret_cast<float *>(_outputData),
-                                                  batch_size * num_units, act,
-                                                  reinterpret_cast<float *>(_outputData));
-
-  return true;
-}
-
-bool FullyConnectedLayer::fullyConnectedQuant8()
-{
-  throw std::runtime_error{"FullyConnectedLayer : Not tested for TENSOR_QUANT8_ASYMM"};
-}
-
-void FullyConnectedLayer::configure(uint8_t *inputData, const Shape inputShape,
-                                    uint8_t *weightsData, const Shape weightsShape,
-                                    uint8_t *biasData, const Shape biasShape, FuseCode activation,
-                                    uint8_t *outputData, const Shape outputShape)
-{
-  _inputData = inputData;
-  _inputShape = inputShape;
-  _inputType = inputShape.type;
-  _weightsData = weightsData;
-  _weightsShape = weightsShape;
-  _biasData = biasData;
-  _biasShape = biasShape;
-  _activation = activation;
-  _outputData = outputData;
-  _outputShape = outputShape;
-}
-
-void FullyConnectedLayer::run()
-{
-  if (_inputType == OperandType::TENSOR_FLOAT32)
-  {
-    fullyConnectedFloat32();
-  }
-  else if (_inputType == OperandType::TENSOR_QUANT8_ASYMM)
-  {
-    throw std::runtime_error{"FullyConnectedLayer : Not tested for TENSOR_QUANT8_ASYMM"};
-    // fullyConnectedQuant8();
-  }
-}
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
diff --git a/runtimes/neurun/src/kernel/cpu/FullyConnectedLayer.h b/runtimes/neurun/src/kernel/cpu/FullyConnectedLayer.h
deleted file mode 100644
index 20a388349..000000000
--- a/runtimes/neurun/src/kernel/cpu/FullyConnectedLayer.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_KERNEL_CPU_FULLYCONNECTEDLAYER_H__
-#define __NEURUN_KERNEL_CPU_FULLYCONNECTEDLAYER_H__
-
-#include <NeuralNetworks.h>
-
-#include "exec/interface/IFunction.h"
-
-#include "kernel/cpu/OperationUtils.h"
-
-namespace neurun
-{
-namespace kernel
-{
-namespace cpu
-{
-
-class FullyConnectedLayer : public ::neurun::exec::IFunction
-{
-public:
-  FullyConnectedLayer();
-
-public:
-  bool fullyConnectedFloat32();
-
-  bool fullyConnectedQuant8();
-
-  void configure(uint8_t *inputData, const Shape inputShape, uint8_t *weightsData,
-                 const Shape weightsShape, uint8_t *biasData, const Shape biasShape,
-                 FuseCode activation, uint8_t *outputData, const Shape outputShape);
-
-  void run();
-
-private:
-  uint8_t *_inputData;
-  uint8_t *_weightsData;
-  uint8_t *_biasData;
-  uint8_t *_outputData;
-
-  Shape _inputShape;
-  Shape _weightsShape;
-  Shape _biasShape;
-  Shape _outputShape;
-
-  FuseCode _activation;
-
-  OperandType _inputType;
-};
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
-
-#endif // __NEURUN_KERNEL_CPU_FULLYCONNECTEDLAYER_H__
diff --git a/runtimes/neurun/src/kernel/cpu/MaxPoolLayer.cc b/runtimes/neurun/src/kernel/cpu/MaxPoolLayer.cc
deleted file mode 100644
index c4a288b07..000000000
--- a/runtimes/neurun/src/kernel/cpu/MaxPoolLayer.cc
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "MaxPoolLayer.h"
-
-#include "tensorflow/contrib/lite/kernels/internal/optimized/optimized_ops.h"
-#include "kernel/cpu/OperationUtils.h"
-
-namespace neurun
-{
-namespace kernel
-{
-namespace cpu
-{
-
-#define MAXPOOLING_PARAMETERS                            \
-  tflite::PoolParams op_params;                          \
-  op_params.stride_height = _strideHeight;               \
-  op_params.stride_width = _strideWidth;                 \
-  op_params.filter_height = _kernelHeight;               \
-  op_params.filter_width = _kernelWidth;                 \
-  op_params.padding_values.height = (int8_t)_paddingTop; \
-  op_params.padding_values.width = (int8_t)_paddingLeft;
-
-MaxPoolLayer::MaxPoolLayer()
-    : _inputData(nullptr), _outputData(nullptr), _inputShape(), _outputShape(), _paddingLeft(0),
-      _paddingTop(0), _paddingRight(0), _paddingBottom(0), _strideWidth(0), _strideHeight(0),
-      _kernelWidth(0), _kernelHeight(0), _activation(ANEURALNETWORKS_FUSED_NONE),
-      _inputType(OperandType::SCALAR_FLOAT32)
-{
-  // DO NOTHING
-}
-
-bool MaxPoolLayer::maxPoolFloat32()
-{
-  MAXPOOLING_PARAMETERS
-  float output_activation_min, output_activation_max;
-  CalculateActivationRangeFloat(_activation, &output_activation_min, &output_activation_max);
-  op_params.float_activation_min = output_activation_min;
-  op_params.float_activation_max = output_activation_max;
-
-  ::tflite::optimized_ops::MaxPool(op_params, convertShapeToTFLiteShape(_inputShape),
-                                   reinterpret_cast<const float *>(_inputData),
-                                   convertShapeToTFLiteShape(_outputShape),
-                                   reinterpret_cast<float *>(_outputData));
-  return true;
-}
-bool MaxPoolLayer::maxPoolQuant8()
-{
-  MAXPOOLING_PARAMETERS
-  int32_t output_activation_min = 0;
-  int32_t output_activation_max = 0;
-  CalculateActivationRangeUint8(_activation, _outputShape, &output_activation_min,
-                                &output_activation_max);
-  op_params.quantized_activation_min = output_activation_min;
-  op_params.quantized_activation_max = output_activation_max;
-
-  ::tflite::optimized_ops::MaxPool(op_params, convertShapeToTFLiteShape(_inputShape), _inputData,
-                                   convertShapeToTFLiteShape(_outputShape), _outputData);
-  return true;
-}
-
-void MaxPoolLayer::configure(uint8_t *inputData, const Shape inputShape, const uint32_t paddingLeft,
-                             const uint32_t paddingRight, const uint32_t paddingTop,
-                             const uint32_t paddingBottom, const uint32_t strideWidth,
-                             const uint32_t strideHeight, const uint32_t kernelWidth,
-                             const uint32_t kernelHeight, const FuseCode activation,
-                             uint8_t *outputData, const Shape outputShape)
-{
-  _inputData = inputData;
-
-  _inputShape = inputShape;
-  _inputType = inputShape.type;
-  _paddingLeft = paddingLeft;
-  _paddingRight = paddingRight;
-  _paddingTop = paddingTop;
-  _paddingBottom = paddingBottom;
-  _strideWidth = strideWidth;
-  _strideHeight = strideHeight;
-  _kernelWidth = kernelWidth;
-  _kernelHeight = kernelHeight;
-  _activation = activation;
-  _outputData = outputData;
-  _outputShape = outputShape;
-}
-
-void MaxPoolLayer::run()
-{
-  if (_inputType == OperandType::TENSOR_FLOAT32)
-  {
-    maxPoolFloat32();
-  }
-  else if (_inputType == OperandType::TENSOR_QUANT8_ASYMM)
-  {
-    throw std::runtime_error{"MaxPoolLayer : Not tested for TENSOR_QUANT8_ASYMM"};
-    // maxPoolQuant8();
-  }
-}
-
-#undef MAXPOOLING_PARAMETERS
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
diff --git a/runtimes/neurun/src/kernel/cpu/MaxPoolLayer.h b/runtimes/neurun/src/kernel/cpu/MaxPoolLayer.h
deleted file mode 100644
index 2b185550b..000000000
--- a/runtimes/neurun/src/kernel/cpu/MaxPoolLayer.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_KERNEL_CPU_MAXPOOLLAYER_H__
-#define __NEURUN_KERNEL_CPU_MAXPOOLLAYER_H__
-
-#include <NeuralNetworks.h>
-
-#include "exec/interface/IFunction.h"
-
-#include "kernel/cpu/OperationUtils.h"
-
-namespace neurun
-{
-namespace kernel
-{
-namespace cpu
-{
-
-class MaxPoolLayer : public ::neurun::exec::IFunction
-{
-public:
-  MaxPoolLayer();
-
-public:
-  bool maxPoolFloat32();
-
-  bool maxPoolQuant8();
-
-  void configure(uint8_t *inputData, const Shape inputShape, const uint32_t paddingLeft,
-                 const uint32_t paddingRight, const uint32_t paddingTop,
-                 const uint32_t paddingBottom, const uint32_t strideWidth,
-                 const uint32_t strideHeight, const uint32_t kernelWidth,
-                 const uint32_t kernelHeight, const FuseCode activation, uint8_t *outputData,
-                 const Shape outputShape);
-
-  void run();
-
-private:
-  uint8_t *_inputData;
-  uint8_t *_outputData;
-
-  Shape _inputShape;
-  Shape _outputShape;
-
-  uint32_t _paddingLeft;
-  uint32_t _paddingTop;
-  uint32_t _paddingRight;
-  uint32_t _paddingBottom;
-
-  uint32_t _strideWidth;
-  uint32_t _strideHeight;
-  uint32_t _kernelWidth;
-  uint32_t _kernelHeight;
-
-  FuseCode _activation;
-
-  OperandType _inputType;
-};
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
-
-#endif // __NEURUN_KERNEL_CPU_MAXPOOLLAYER_H__
diff --git a/runtimes/neurun/src/kernel/cpu/OperationUtils.cc b/runtimes/neurun/src/kernel/cpu/OperationUtils.cc
deleted file mode 100644
index b28508c27..000000000
--- a/runtimes/neurun/src/kernel/cpu/OperationUtils.cc
+++ /dev/null
@@ -1,230 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "kernel/cpu/OperationUtils.h"
-
-#include <cmath>
-#include <algorithm>
-#include <cassert>
-
-namespace neurun
-{
-namespace kernel
-{
-namespace cpu
-{
-
-uint32_t getNumberOfDimensions(const Shape &shape) { return shape.dimensions.size(); }
-
-uint32_t getNumberOfElements(const Shape &shape)
-{
-  uint32_t count = 1;
-  for (size_t i = 0; i < shape.dimensions.size(); i++)
-  {
-    count *= shape.dimensions[i];
-  }
-  return count;
-}
-
-uint32_t getSizeOfDimension(const Shape &shape, uint32_t dimensionIdx)
-{
-  if (dimensionIdx >= shape.dimensions.size())
-  {
-    // TODO, log the error
-    return 0;
-  }
-  return shape.dimensions[dimensionIdx];
-}
-
-bool QuantizeMultiplierSmallerThanOne(double double_multiplier, int32_t *quantized_multiplier,
-                                      int32_t *right_shift)
-{
-  assert(double_multiplier >= 0.);
-  assert(double_multiplier < 1.);
-  if (double_multiplier == 0.)
-  {
-    *quantized_multiplier = 0;
-    *right_shift = 0;
-    return true;
-  }
-  assert(double_multiplier > 0.);
-  const double q = std::frexp(double_multiplier, right_shift);
-  *right_shift *= -1;
-  int64_t q_fixed = static_cast<int64_t>(std::round(q * (1ll << 31)));
-  assert(q_fixed <= (1ll << 31));
-  if (q_fixed == (1ll << 31))
-  {
-    q_fixed /= 2;
-    --*right_shift;
-  }
-  assert(*right_shift >= 0);
-  assert(q_fixed <= std::numeric_limits<int32_t>::max());
-  *quantized_multiplier = static_cast<int32_t>(q_fixed);
-  return true;
-}
-
-bool GetQuantizedConvolutionMultipler(const Shape &inputShape, const Shape &filterShape,
-                                      const Shape &biasShape, const Shape &outputShape,
-                                      float *multiplier)
-{
-  const float input_product_scale = inputShape.scale * filterShape.scale;
-  const float bias_scale = biasShape.scale;
-  const float output_scale = outputShape.scale;
-  // The following conditions must be guaranteed by the training pipeline.
-  assert(std::abs(input_product_scale - bias_scale) <=
-         1e-6 * std::min(input_product_scale, bias_scale));
-  assert(input_product_scale >= 0);
-  assert(input_product_scale < output_scale);
-  *multiplier = input_product_scale / output_scale;
-  return true;
-}
-
-bool QuantizeMultiplierGreaterThanOne(double double_multiplier, int32_t *quantized_multiplier,
-                                      int *left_shift)
-{
-  assert(double_multiplier > 1.);
-  const double q = std::frexp(double_multiplier, left_shift);
-  int64_t q_fixed = static_cast<int64_t>(std::round(q * (1ll << 31)));
-  assert(q_fixed <= (1ll << 31));
-  if (q_fixed == (1ll << 31))
-  {
-    q_fixed /= 2;
-    ++*left_shift;
-  }
-  assert(*left_shift >= 0);
-  assert(q_fixed <= std::numeric_limits<int32_t>::max());
-  *quantized_multiplier = static_cast<int32_t>(q_fixed);
-  return true;
-}
-
-void CalculateActivationRangeFloat(int32_t activation, float *activation_min, float *activation_max)
-{
-  if (activation == ANEURALNETWORKS_FUSED_RELU)
-  {
-    *activation_min = 0.f;
-    *activation_max = std::numeric_limits<float>::max();
-  }
-  else if (activation == ANEURALNETWORKS_FUSED_RELU6)
-  {
-    *activation_min = 0.f;
-    *activation_max = 6.f;
-  }
-  else if (activation == ANEURALNETWORKS_FUSED_RELU1)
-  {
-    *activation_min = -1.f;
-    *activation_max = 1.f;
-  }
-  else if (activation == ANEURALNETWORKS_FUSED_NONE)
-  {
-    *activation_min = std::numeric_limits<float>::lowest();
-    *activation_max = std::numeric_limits<float>::max();
-  }
-  else
-  {
-    std::cout << "Unsupported fused activation function." << std::endl;
-  }
-}
-
-void CalculateActivationRangeUint8(int32_t activation, const Shape &outputShape, int32_t *act_min,
-                                   int32_t *act_max)
-{
-  const int32_t qmin = std::numeric_limits<uint8_t>::min();
-  const int32_t qmax = std::numeric_limits<uint8_t>::max();
-  const auto scale = outputShape.scale;
-  const auto zero_point = outputShape.offset;
-  auto quantize = [scale, zero_point](float f) {
-    return zero_point + static_cast<int32_t>(std::round(f / scale));
-  };
-  if (activation == ANEURALNETWORKS_FUSED_RELU)
-  {
-    *act_min = std::max(qmin, quantize(0.0));
-    *act_max = qmax;
-  }
-  else if (activation == ANEURALNETWORKS_FUSED_RELU6)
-  {
-    *act_min = std::max(qmin, quantize(0.0));
-    *act_max = std::min(qmax, quantize(6.0));
-  }
-  else if (activation == ANEURALNETWORKS_FUSED_RELU1)
-  {
-    *act_min = std::max(qmin, quantize(-1.0));
-    *act_max = std::min(qmax, quantize(1.0));
-  }
-  else if (activation == ANEURALNETWORKS_FUSED_NONE)
-  {
-    *act_min = qmin;
-    *act_max = qmax;
-  }
-  else
-  {
-    std::cout << "Unsupported fused activation function." << std::endl;
-  }
-}
-
-int32_t CalculateInputRadius(int input_integer_bits, int input_left_shift)
-{
-  const double max_input_rescaled = 1.0 * ((1 << input_integer_bits) - 1) *
-                                    (1ll << (31 - input_integer_bits)) / (1ll << input_left_shift);
-  // Tighten bound using floor.  Suppose that we could use the exact value.
-  // After scaling the difference, the result would be at the maximum.  Thus we
-  // must ensure that our value has lower magnitude.
-  return static_cast<int32_t>(std::floor(max_input_rescaled));
-}
-
-Shape getShape(const ::neurun::model::operand::Object &o)
-{
-  Shape shape;
-
-  shape.type = static_cast<OperandType>(static_cast<int32_t>(o.typeInfo().type()));
-  shape.dimensions = std::vector<uint32_t>(o.shape().dims().begin(), o.shape().dims().end());
-  shape.scale = o.typeInfo().scale();
-  // shape.offset = _offset;
-
-  return shape;
-}
-
-size_t sizeOfData(OperandType type, const std::vector<uint32_t> &dimensions)
-{
-  size_t size = 4;
-
-  switch (type)
-  {
-    case OperandType::SCALAR_FLOAT32:
-    case OperandType::SCALAR_INT32:
-    case OperandType::SCALAR_UINT32:
-    case OperandType::TENSOR_FLOAT32:
-    case OperandType::TENSOR_INT32:
-      size = 4;
-      break;
-    case OperandType::TENSOR_QUANT8_ASYMM:
-      size = 1;
-      break;
-    default:
-      throw std::runtime_error("Not supported operand type.");
-      break;
-  }
-
-  for (auto d : dimensions)
-  {
-    size *= d;
-  }
-
-  return size;
-}
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
diff --git a/runtimes/neurun/src/kernel/cpu/OperationUtils.h b/runtimes/neurun/src/kernel/cpu/OperationUtils.h
deleted file mode 100644
index 3610990a5..000000000
--- a/runtimes/neurun/src/kernel/cpu/OperationUtils.h
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NNFW_SUPPORT_NNAPI_OPERATION_UTILS_H__
-#define __NNFW_SUPPORT_NNAPI_OPERATION_UTILS_H__
-
-#include <NeuralNetworks.h>
-
-#include <iostream>
-#include <limits>
-#include <vector>
-
-#include "tensorflow/contrib/lite/c/builtin_op_data.h"
-#include "tensorflow/contrib/lite/kernels/internal/types.h"
-#include "tensorflow/contrib/lite/kernels/internal/tensor.h"
-#include "model/operand/Object.h"
-#include "model/operand/DataType.h"
-
-using OperandType = neurun::model::operand::DataType;
-
-namespace neurun
-{
-namespace kernel
-{
-namespace cpu
-{
-
-struct Shape
-{
-  OperandType type;
-  std::vector<uint32_t> dimensions;
-  float scale;
-  int32_t offset;
-};
-
-uint32_t getNumberOfDimensions(const Shape &shape);
-
-uint32_t getNumberOfElements(const Shape &shape);
-
-uint32_t getSizeOfDimension(const Shape &shape, uint32_t dimensionIdx);
-
-inline ::tflite::Dims<4> convertShapeToDims(const Shape &shape)
-{
-  // nnAssert(shape.dimensions.size() <= 4);
-  ::tflite::Dims<4> dims;
-  // The dimensions are reversed in Dims<4>.
-  for (int i = 0; i < 4; ++i)
-  {
-    int src = static_cast<int>(shape.dimensions.size()) - i - 1;
-    if (src >= 0)
-    {
-      dims.sizes[i] = static_cast<int>(getSizeOfDimension(shape, src));
-    }
-    else
-    {
-      dims.sizes[i] = 1;
-    }
-  }
-  dims.strides[0] = 1;
-  for (int i = 1; i < 4; i++)
-  {
-    dims.strides[i] = dims.strides[i - 1] * dims.sizes[i - 1];
-  }
-  return dims;
-}
-
-inline ::tflite::RuntimeShape convertShapeToTFLiteShape(const Shape &shape)
-{
-  std::vector<int32_t> raw_shape;
-  raw_shape.resize(4);
-
-  for (uint32_t i = 0; i < 4; ++i)
-  {
-    if (i >= shape.dimensions.size())
-    {
-      raw_shape[i] = 1;
-    }
-    else
-    {
-      raw_shape[i] = shape.dimensions[i];
-    }
-  }
-
-  return ::tflite::GetTensorShape(raw_shape);
-}
-
-inline TfLiteFusedActivation convertFusedActivation(FuseCode act)
-{
-  if (act == ANEURALNETWORKS_FUSED_NONE)
-  {
-    return kTfLiteActNone;
-  }
-
-  if (act == ANEURALNETWORKS_FUSED_RELU)
-  {
-    return kTfLiteActRelu;
-  }
-
-  if (act == ANEURALNETWORKS_FUSED_RELU1)
-  {
-    return kTfLiteActRelu1;
-  }
-
-  if (act == ANEURALNETWORKS_FUSED_RELU6)
-  {
-    return kTfLiteActRelu6;
-  }
-
-  return kTfLiteActNone;
-}
-
-__wur bool QuantizeMultiplierSmallerThanOne(double double_multiplier, int32_t *quantized_multiplier,
-                                            int32_t *right_shift);
-
-__wur bool GetQuantizedConvolutionMultipler(const Shape &inputShape, const Shape &filterShape,
-                                            const Shape &biasShape, const Shape &outputShape,
-                                            float *multiplier);
-__wur bool QuantizeMultiplierGreaterThanOne(double double_multiplier, int32_t *quantized_multiplier,
-                                            int *left_shift);
-
-void CalculateActivationRangeFloat(int32_t activation, float *activation_min,
-                                   float *activation_max);
-
-void CalculateActivationRangeUint8(int32_t activation, const Shape &outputShape, int32_t *act_min,
-                                   int32_t *act_max);
-
-int32_t CalculateInputRadius(int input_integer_bits, int input_left_shift);
-
-Shape getShape(const ::neurun::model::operand::Object &o);
-
-uint32_t sizeOfData(OperandType type, const std::vector<uint32_t> &dimensions);
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
-
-#endif // __NNFW_SUPPORT_NNAPI_OPERATION_UTILS_H__
diff --git a/runtimes/neurun/src/kernel/cpu/PermuteLayer.cc b/runtimes/neurun/src/kernel/cpu/PermuteLayer.cc
deleted file mode 100644
index ba8c5ab92..000000000
--- a/runtimes/neurun/src/kernel/cpu/PermuteLayer.cc
+++ /dev/null
@@ -1,201 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "PermuteLayer.h"
-
-#include "util/feature/nhwc/Reader.h"
-#include "util/feature/nhwc/View.h"
-#include "util/feature/nchw/View.h"
-#include "util/feature/Coordinate4D.h"
-
-#include <misc/feature/IndexIterator.h>
-
-namespace neurun
-{
-namespace kernel
-{
-namespace cpu
-{
-
-using Type = model::operation::PermuteNode::Type;
-
-void PermuteLayer::configure(std::shared_ptr<::neurun::backend::operand::IObject> input,
-                             std::shared_ptr<::neurun::backend::operand::IObject> output,
-                             const model::operand::Shape &shape, Type type)
-{
-  _input = input;
-  _output = output;
-  _shape = shape;
-  _type = type;
-}
-
-void PermuteLayer::run()
-{
-  auto rank = _shape.rank();
-
-  switch (_type)
-  {
-    case Type::NHWC_TO_NCHW:
-    {
-      auto fn = [&](::neurun::backend::operand::ITensor &tensor) {
-        auto input_tensor = _input->ptr();
-
-        auto input_buffer = input_tensor->buffer();
-        auto input_size = input_tensor->total_size();
-
-        auto output_buffer = tensor.buffer();
-        auto output_size = tensor.total_size();
-        switch (rank)
-        {
-          case 0:
-          case 1:
-          {
-            memcpy(output_buffer, input_buffer, input_size);
-            break;
-          }
-          case 2:
-          {
-            auto matrix_shape = _shape.asMatrix();
-
-            for (auto h = 0; h < matrix_shape.H; ++h)
-            {
-              neurun::util::feature::Coordinate4D coord{0, h, 0, 0};
-              memcpy(output_buffer + tensor.calcOffset(coord), input_buffer + h * matrix_shape.W,
-                     matrix_shape.W * sizeof(float));
-            }
-            break;
-          }
-          case 3:
-          {
-            const int32_t depth = _shape.dim(0);
-            const int32_t height = _shape.dim(1);
-            const int32_t width = _shape.dim(2);
-
-            for (auto c = 0; c < depth; ++c)
-            {
-              for (auto h = 0; h < height; ++h)
-              {
-                neurun::util::feature::Coordinate4D coord{0, h, 0, c};
-                memcpy(output_buffer + tensor.calcOffset(coord),
-                       input_buffer + c * height * width + h * width, width * sizeof(float));
-              }
-            }
-            break;
-          }
-          case 4:
-          {
-            auto feature = _shape.asFeature();
-
-            const util::feature::nhwc::Reader<float> from{
-                feature, reinterpret_cast<const float *>(input_buffer), input_size};
-            util::feature::nchw::View<float> into{&tensor};
-
-            ::nnfw::misc::feature::iterate(feature)
-                << [&](uint32_t batch, uint32_t ch, uint32_t row, uint32_t col) {
-                     const auto value = from.at(batch, ch, row, col);
-                     into.at(batch, ch, row, col) = value;
-                   };
-            break;
-          }
-          default:
-            throw "NYI";
-            break;
-        }
-      };
-      _output->access(fn);
-      break;
-    }
-    case Type::NCHW_TO_NHWC:
-    {
-      auto fn = [&](::neurun::backend::operand::ITensor &tensor) {
-        auto input_buffer = tensor.buffer();
-        auto input_size = tensor.total_size();
-
-        auto output_tensor = _output->ptr();
-
-        auto output_buffer = output_tensor->buffer();
-        auto output_size = output_tensor->total_size();
-
-        switch (rank)
-        {
-          case 0:
-          case 1:
-          {
-            memcpy(output_buffer, input_buffer, output_size);
-            break;
-          }
-          case 2:
-          {
-            auto matrix_shape = _shape.asMatrix();
-
-            for (auto h = 0; h < matrix_shape.H; ++h)
-            {
-              neurun::util::feature::Coordinate4D coord{0, h, 0, 0};
-              memcpy(output_buffer + h * matrix_shape.W, input_buffer + tensor.calcOffset(coord),
-                     matrix_shape.W * sizeof(float));
-            }
-            break;
-          }
-          case 3:
-          {
-            const int32_t depth = _shape.dim(0);
-            const int32_t height = _shape.dim(1);
-            const int32_t width = _shape.dim(2);
-
-            for (auto c = 0; c < depth; ++c)
-            {
-              for (auto h = 0; h < height; ++h)
-              {
-                neurun::util::feature::Coordinate4D coord{0, h, 0, c};
-                memcpy(output_buffer + c * height * width + h * width,
-                       input_buffer + tensor.calcOffset(coord), width * sizeof(float));
-              }
-            }
-            break;
-          }
-          case 4:
-          {
-            auto feature = _shape.asFeature();
-
-            const util::feature::nchw::View<float> from{&tensor};
-            util::feature::nhwc::View<float> into{feature, reinterpret_cast<float *>(output_buffer),
-                                                  output_size};
-
-            ::nnfw::misc::feature::iterate(feature)
-                << [&](uint32_t batch, uint32_t ch, uint32_t row, uint32_t col) {
-                     const auto value = from.at(batch, ch, row, col);
-                     into.at(batch, ch, row, col) = value;
-                   };
-            break;
-          }
-          default:
-            throw "NYI";
-            break;
-        }
-      };
-      _input->access(fn);
-      break;
-    }
-    case Type::COPY:
-      // If two different backends using same tensor layout, we need this.
-      throw "NYI";
-      break;
-  }
-}
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
diff --git a/runtimes/neurun/src/kernel/cpu/PermuteLayer.h b/runtimes/neurun/src/kernel/cpu/PermuteLayer.h
deleted file mode 100644
index d9e1709bc..000000000
--- a/runtimes/neurun/src/kernel/cpu/PermuteLayer.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_KERNEL_CPU_PERMUTE_LAYER_H__
-#define __NEURUN_KERNEL_CPU_PERMUTE_LAYER_H__
-
-#include <NeuralNetworks.h>
-
-#include "exec/interface/IFunction.h"
-
-#include "util/feature/nhwc/View.h"
-#include "OperationUtils.h"
-#include "backend/interface/operand/IObject.h"
-#include "model/operation/PermuteNode.h"
-
-namespace neurun
-{
-namespace kernel
-{
-namespace cpu
-{
-
-class PermuteLayer : public ::neurun::exec::IFunction
-{
-public:
-  PermuteLayer() = default;
-
-public:
-  void configure(std::shared_ptr<::neurun::backend::operand::IObject> input,
-                 std::shared_ptr<::neurun::backend::operand::IObject> output,
-                 const model::operand::Shape &shape, model::operation::PermuteNode::Type type);
-  void run();
-
-private:
-  std::shared_ptr<::neurun::backend::operand::IObject> _input;
-  std::shared_ptr<::neurun::backend::operand::IObject> _output;
-  model::operand::Shape _shape;
-  model::operation::PermuteNode::Type _type;
-};
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
-
-#endif // __NEURUN_KERNEL_CPU_PERMUTE_LAYER_H__
diff --git a/runtimes/neurun/src/kernel/cpu/ReshapeLayer.cc b/runtimes/neurun/src/kernel/cpu/ReshapeLayer.cc
deleted file mode 100644
index 377f783e0..000000000
--- a/runtimes/neurun/src/kernel/cpu/ReshapeLayer.cc
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ReshapeLayer.h"
-
-#include "tensorflow/contrib/lite/kernels/internal/optimized/optimized_ops.h"
-#include "tensorflow/contrib/lite/kernels/internal/reference/reference_ops.h"
-#include "kernel/cpu/OperationUtils.h"
-
-namespace neurun
-{
-namespace kernel
-{
-namespace cpu
-{
-
-ReshapeLayer::ReshapeLayer()
-    : _inputData(nullptr), _outputData(nullptr), _inputShape(), _outputShape()
-{
-  // DO NOTHING
-}
-
-bool ReshapeLayer::reshapeGeneric()
-{
-  size_t count = sizeOfData(_inputShape.type, _inputShape.dimensions);
-  memcpy(reinterpret_cast<void *>(_outputData), reinterpret_cast<const void *>(_inputData), count);
-  return true;
-}
-
-void ReshapeLayer::configure(uint8_t *inputData, const Shape &inputShape, uint8_t *outputData,
-                             const Shape &outputShape)
-{
-  _inputData = inputData;
-  _inputShape = inputShape;
-  _outputData = outputData;
-  _outputShape = outputShape;
-}
-
-void ReshapeLayer::run() { reshapeGeneric(); }
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
diff --git a/runtimes/neurun/src/kernel/cpu/ReshapeLayer.h b/runtimes/neurun/src/kernel/cpu/ReshapeLayer.h
deleted file mode 100644
index 51d0bacee..000000000
--- a/runtimes/neurun/src/kernel/cpu/ReshapeLayer.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_KERNEL_CPU_RESHAPELAYER_H__
-#define __NEURUN_KERNEL_CPU_RESHAPELAYER_H__
-
-#include <NeuralNetworks.h>
-
-#include "exec/interface/IFunction.h"
-
-#include "kernel/cpu/OperationUtils.h"
-
-namespace neurun
-{
-namespace kernel
-{
-namespace cpu
-{
-
-class ReshapeLayer : public ::neurun::exec::IFunction
-{
-public:
-  ReshapeLayer();
-
-public:
-  bool reshapeGeneric();
-
-  void configure(uint8_t *inputData, const Shape &inputShape, uint8_t *outputData,
-                 const Shape &outputShape);
-
-  void run();
-
-private:
-  uint8_t *_inputData;
-  uint8_t *_outputData;
-
-  Shape _inputShape;
-  Shape _outputShape;
-};
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
-
-#endif // __NEURUN_KERNEL_CPU_RESHAPELAYER_H__
diff --git a/runtimes/neurun/src/kernel/cpu/SoftMaxLayer.cc b/runtimes/neurun/src/kernel/cpu/SoftMaxLayer.cc
deleted file mode 100644
index c998c65f6..000000000
--- a/runtimes/neurun/src/kernel/cpu/SoftMaxLayer.cc
+++ /dev/null
@@ -1,174 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "SoftMaxLayer.h"
-
-#include "tensorflow/contrib/lite/kernels/internal/optimized/optimized_ops.h"
-#include "kernel/cpu/OperationUtils.h"
-
-namespace neurun
-{
-namespace kernel
-{
-namespace cpu
-{
-
-SoftMaxLayer::SoftMaxLayer()
-    : _inputData(nullptr), _outputData(nullptr), _beta(0.0), _inputShape(), _outputShape(),
-      _inputType(OperandType::SCALAR_FLOAT32)
-{
-  // DO NOTHING
-}
-
-// Performs softmax along the input of size (input_size * batch_size).
-void Softmax(const float *in, const int input_size, const int batch_size, const float beta,
-             float *out)
-{
-  TF_LITE_ASSERT(input_size > 0);
-
-  // For each batch
-  for (int b = 0; b < batch_size; b++)
-  {
-    // Find the max coeff.
-    float max_coeff = in[0];
-    for (int i = 1; i < input_size; i++)
-    {
-      if (in[i] > max_coeff)
-        max_coeff = in[i];
-    }
-
-    // Compute the normalized sum of exps.
-    float exp_sum = 0.0;
-    for (int i = 0; i < input_size; i++)
-    {
-      out[i] = std::exp((in[i] - max_coeff) * beta);
-      exp_sum += out[i];
-    }
-
-    // Divide by the sum of exps.
-    float reciprocal_sum_exp = 1.f / exp_sum;
-    for (int i = 0; i < input_size; i++)
-    {
-      out[i] *= reciprocal_sum_exp;
-    }
-
-    // Advance in and out pointers for the next batch.
-    in += input_size;
-    out += input_size;
-  }
-}
-
-bool SoftMaxLayer::softmaxFloat32()
-{
-  Shape shapeIn4D;
-
-  if (getNumberOfDimensions(_inputShape) == 2)
-  {
-    uint32_t batch_size = getSizeOfDimension(_inputShape, 0);
-    uint32_t input_size = getNumberOfElements(_inputShape) / batch_size;
-    Softmax(reinterpret_cast<const float *>(_inputData), input_size, batch_size, _beta,
-            reinterpret_cast<float *>(_outputData));
-  }
-  else if (getNumberOfDimensions(_inputShape) == 4)
-  {
-    ::tflite::SoftmaxParams op_params;
-    op_params.beta = _beta;
-    ::tflite::optimized_ops::Softmax(op_params, convertShapeToTFLiteShape(_inputShape),
-                                     reinterpret_cast<const float *>(_inputData),
-                                     convertShapeToTFLiteShape(_outputShape),
-                                     reinterpret_cast<float *>(_outputData));
-  }
-  else
-  {
-    std::cout << "only 2D and 4D tensors supported" << std::endl;
-    return false;
-  }
-
-  return true;
-}
-
-bool SoftMaxLayer::softmaxQuant8()
-{
-  Shape shapeIn4D = _inputShape;
-
-  if (getNumberOfDimensions(_inputShape) == 2)
-  {
-    uint32_t batch_size = getSizeOfDimension(_inputShape, 0);
-    uint32_t input_size = getNumberOfElements(_inputShape) / batch_size;
-    shapeIn4D.dimensions = {batch_size, 1, 1, input_size};
-  }
-  else if (getNumberOfDimensions(_inputShape) == 4)
-  {
-    shapeIn4D = _inputShape;
-  }
-  else
-  {
-    std::cout << "only 2D and 4D tensors supported" << std::endl;
-    return false;
-  }
-  if (_outputShape.offset != 0 || _outputShape.scale != 1.f / 256)
-  {
-    std::cout << "incorrect scale / offset for output" << std::endl;
-    return false;
-  }
-  static const int32_t kScaledDiffIntegerBits = 5;
-  const double input_beta_real_multiplier = std::min(
-      1.0 * _beta * _inputShape.scale * (1 << (31 - kScaledDiffIntegerBits)), (1ll << 31) - 1.0);
-  int32_t input_multiplier = 0;
-  int32_t input_left_shift = 0;
-  if (!QuantizeMultiplierGreaterThanOne(input_beta_real_multiplier, &input_multiplier,
-                                        &input_left_shift))
-  {
-    return false;
-  }
-  float diff_min = -1.0f * CalculateInputRadius(kScaledDiffIntegerBits, input_left_shift);
-
-  ::tflite::SoftmaxParams op_params;
-  op_params.input_multiplier = input_multiplier;
-  op_params.input_left_shift = input_left_shift;
-  op_params.diff_min = diff_min;
-  ::tflite::optimized_ops::Softmax(op_params, convertShapeToTFLiteShape(shapeIn4D), _inputData,
-                                   convertShapeToTFLiteShape(shapeIn4D), _outputData);
-  return true;
-}
-
-void SoftMaxLayer::configure(uint8_t *inputData, const Shape &inputShape, const float beta,
-                             uint8_t *outputData, const Shape &outputShape)
-{
-  _inputData = inputData;
-  _inputShape = inputShape;
-  _inputType = inputShape.type;
-  _outputData = outputData;
-  _outputShape = outputShape;
-  _beta = beta;
-}
-
-void SoftMaxLayer::run()
-{
-  if (_inputType == OperandType::TENSOR_FLOAT32)
-  {
-    softmaxFloat32();
-  }
-  else if (_inputType == OperandType::TENSOR_QUANT8_ASYMM)
-  {
-    throw std::runtime_error{"SoftMaxLayer : Not tested for TENSOR_QUANT8_ASYMM"};
-    // softmaxQuant8();
-  }
-}
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
diff --git a/runtimes/neurun/src/kernel/cpu/SoftMaxLayer.h b/runtimes/neurun/src/kernel/cpu/SoftMaxLayer.h
deleted file mode 100644
index df1aa4044..000000000
--- a/runtimes/neurun/src/kernel/cpu/SoftMaxLayer.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_KERNEL_CPU_SOFTMAXLAYER_H__
-#define __NEURUN_KERNEL_CPU_SOFTMAXLAYER_H__
-
-#include <NeuralNetworks.h>
-
-#include "exec/interface/IFunction.h"
-
-#include "kernel/cpu/OperationUtils.h"
-
-namespace neurun
-{
-namespace kernel
-{
-namespace cpu
-{
-
-class SoftMaxLayer : public ::neurun::exec::IFunction
-{
-public:
-  SoftMaxLayer();
-
-public:
-  bool softmaxFloat32();
-
-  bool softmaxQuant8();
-
-  void configure(uint8_t *inputData, const Shape &inputShape, const float beta, uint8_t *outputData,
-                 const Shape &outputShape);
-
-  void run();
-
-private:
-  uint8_t *_inputData;
-  uint8_t *_outputData;
-
-  float _beta;
-
-  Shape _inputShape;
-  Shape _outputShape;
-
-  OperandType _inputType;
-};
-
-} // namespace cpu
-} // namespace kernel
-} // namespace neurun
-
-#endif // __NEURUN_KERNEL_CPU_SOFTMAXLAYER_H__
diff --git a/runtimes/neurun/src/library_info.cc b/runtimes/neurun/src/library_info.cc
deleted file mode 100644
index 4adf70465..000000000
--- a/runtimes/neurun/src/library_info.cc
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-volatile static const char info[] = "library information : runtime=neurun";
diff --git a/runtimes/neurun/src/linear/Linear.cc b/runtimes/neurun/src/linear/Linear.cc
deleted file mode 100644
index 6452bbd49..000000000
--- a/runtimes/neurun/src/linear/Linear.cc
+++ /dev/null
@@ -1,199 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <algorithm>
-
-#include "Linear.h"
-
-#include "graph/Graph.h"
-
-#include "graph/operation/LowerInfo.h"
-#include "backend/interface/IStageGenerator.h"
-#include "backend/interface/IConfig.h"
-#include "compiler/SubTensorInfo.h"
-#include "compiler/TensorInfo.h"
-
-#include "util/logging.h"
-
-namespace neurun
-{
-namespace linear
-{
-
-Linear::Linear(const graph::Graph &graph) : _graph(graph)
-{
-  // Linearize with topological sort
-  //
-  // Topological sort algorithm
-  //   1. Iterate with DFS
-  //   2. Append the node to vector when DFS for the node finishes(post order)
-  //   3. Reverse the order of nodes
-
-  graph::Graph::PostDfsConstIterator().iterate(
-      graph, [&](const model::operation::Index &index, const model::operation::Node &node) {
-        const auto lower_info = graph.getLowerInfo(index);
-        _operations.emplace_back(&node, lower_info);
-      });
-
-  std::reverse(std::begin(_operations), std::end(_operations));
-}
-
-void Linear::accept(model::operation::NodeVisitor &&visitor) const
-{
-  for (const auto op : _operations)
-  {
-    op.node->accept(std::move(visitor));
-  }
-}
-
-backend::TensorBuilderSet Linear::planTensors()
-{
-  using ITensorBuilderPtr = std::shared_ptr<backend::ITensorBuilder>;
-  using FnOnTensorBuilder =
-      std::function<void(const model::operand::Index &ind, ITensorBuilderPtr)>;
-
-  const auto &operands = _graph.operands();
-  auto iterTensorBuilders = [&operands](const model::operand::Index &ind, FnOnTensorBuilder fn) {
-    const auto &obj = operands.at(ind);
-    for (auto backend : obj.lower_info()->def_backends())
-    {
-      auto tensor_builder = backend->tensor_builder();
-      fn(ind, tensor_builder);
-    }
-  };
-
-  backend::TensorBuilderSet tensor_builders;
-
-  std::unordered_map<model::operand::Index, uint32_t> uses_map;
-  std::vector<model::operand::Index> constants;
-
-  _graph.operands().iterate(
-      [&](const model::operand::Index &ind, const model::operand::Object &obj) {
-        uses_map[ind] = obj.getUses().size();
-
-        // If a tensor is a constant, increase the use of the tensor.
-        // It makes the tensor not be dealloced.
-        if (obj.getUsage() == model::operand::OperandUsage::CONSTANT)
-        {
-          constants.push_back(ind);
-          uses_map[ind]++;
-        }
-
-        for (auto backend : obj.lower_info()->def_backends())
-        {
-          bool isSubTensor = false;
-          auto tensor_builder = backend->tensor_builder();
-
-          if (backend->config()->SupportSubTensorAlloc())
-          {
-            const auto parentInfo = obj.parent_info();
-            if (parentInfo != nullptr)
-            {
-              isSubTensor = true;
-            }
-          }
-
-          if (isSubTensor)
-          {
-            const compiler::SubTensorInfo info(obj);
-            tensor_builder->registerSubTensorInfo(ind, info);
-          }
-          else
-          {
-            const auto info = compiler::TensorInfo(obj.shape(), obj.typeInfo());
-            tensor_builder->registerTensorInfo(ind, info);
-          }
-
-          // Prepare tensor builders to be returned
-          tensor_builders.insert(tensor_builder);
-        }
-      });
-
-  // If a tensor is model output, increase the use of the tensor.
-  // This aim is same to above one.
-  for (const auto &ind : _graph.getOutputs())
-  {
-    uses_map[ind]++;
-  }
-
-  // Allocate constant operands first
-  VERBOSE(LINEAR) << "TENSORS as CONSTANT" << std::endl;
-  for (const auto &ind : constants)
-  {
-    iterTensorBuilders(ind, [](const model::operand::Index &ind, ITensorBuilderPtr tensor_builder) {
-      tensor_builder->notifyFirstUse(ind);
-    });
-  }
-
-  // Allocate Model's inputs
-  VERBOSE(LINEAR) << "TENSORS as MODEL INPUT" << std::endl;
-  for (const auto &ind : _graph.getInputs())
-  {
-    iterTensorBuilders(ind, [](const model::operand::Index &ind, ITensorBuilderPtr tensor_builder) {
-      tensor_builder->notifyFirstUse(ind);
-    });
-  }
-
-  // At each operation,
-  //   1. Scan USE of inputs. Decrease the USE and deallocate if the USE is 0
-  //   2. Scan DEF of outputs. If the DEF, allocate it
-  VERBOSE(LINEAR) << "TENSORS" << std::endl;
-  for (const auto op : _operations)
-  {
-    for (const auto &ind : op.node->getOutputs())
-    {
-      const auto &obj = operands.at(ind);
-      if (obj.getDef().size())
-      {
-        iterTensorBuilders(ind,
-                           [](const model::operand::Index &ind, ITensorBuilderPtr tensor_builder) {
-                             tensor_builder->notifyFirstUse(ind);
-                           });
-      }
-    }
-
-    for (const auto &ind : op.node->getInputs())
-    {
-      uses_map[ind]--;
-      if (uses_map[ind] == 0)
-      {
-        iterTensorBuilders(ind,
-                           [](const model::operand::Index &ind, ITensorBuilderPtr tensor_builder) {
-                             tensor_builder->notifyLastUse(ind);
-                           });
-      }
-    }
-  }
-
-  // Now, model outputs should be not deallocated
-  assert(std::all_of(_graph.getOutputs().begin(), _graph.getOutputs().end(),
-                     [&uses_map](const model::operand::Index &ind) { return uses_map[ind] > 0; }));
-
-  // Set subtensor information
-  // Todo: move this phase outside as optimization phase
-  return tensor_builders;
-}
-
-void Linear::iterate(const std::function<void(const Element &element)> &fn) const
-{
-  for (const auto op : _operations)
-  {
-    fn(op);
-  }
-}
-
-} // namespace linear
-} // namespace neurun
diff --git a/runtimes/neurun/src/linear/Linear.h b/runtimes/neurun/src/linear/Linear.h
deleted file mode 100644
index fb3f539d4..000000000
--- a/runtimes/neurun/src/linear/Linear.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_LINEAR_LINEAR_H__
-#define __NEURUN_LINEAR_LINEAR_H__
-
-#include <vector>
-
-#include "model/operation/Node.h"
-#include "backend/interface/ITensorBuilder.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace operation
-{
-struct NodeVisitor;
-} // namespace operation
-} // namespace graph
-} // namespace neurun
-
-namespace neurun
-{
-namespace graph
-{
-class Graph;
-} // namespace graph
-} // namespace neurun
-
-namespace neurun
-{
-namespace linear
-{
-
-struct Element
-{
-  const model::operation::Node *node;
-  const graph::operation::LowerInfo *lower_info;
-
-  Element(const model::operation::Node *node, const graph::operation::LowerInfo *lower_info)
-      : node{node}, lower_info{lower_info}
-  {
-  }
-};
-
-class Linear
-{
-public:
-  Linear(const graph::Graph &graph);
-
-public:
-  Linear(const Linear &linear) = delete;
-
-public:
-  void accept(model::operation::NodeVisitor &&visitor) const;
-
-  // TODO Should not return TensorBuilderSet
-  backend::TensorBuilderSet planTensors();
-
-  void iterate(const std::function<void(const Element &element)> &fn) const;
-
-private:
-  const graph::Graph &_graph;
-  std::vector<Element> _operations;
-};
-
-} // namespace linear
-} // namespace neurun
-
-#endif // __NEURUN_LINEAR_LINEAR_H__
diff --git a/runtimes/neurun/src/model/operand/Data.h b/runtimes/neurun/src/model/operand/Data.h
deleted file mode 100644
index 506cb185a..000000000
--- a/runtimes/neurun/src/model/operand/Data.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERAND_DATA_H__
-#define __NEURUN_MODEL_OPERAND_DATA_H__
-
-#include <algorithm>
-
-namespace neurun
-{
-namespace model
-{
-namespace operand
-{
-
-struct Data
-{
-  virtual ~Data() = default;
-
-  virtual size_t size(void) const = 0;
-  virtual const uint8_t *base(void) const = 0;
-};
-
-class CachedData final : public Data
-{
-public:
-  CachedData(const uint8_t *base, size_t size) : _base{new uint8_t[size]}, _size{size}
-  {
-    std::copy(base, base + size, _base);
-  }
-
-public:
-  ~CachedData() { delete[] _base; }
-
-public:
-  size_t size(void) const override { return _size; }
-  const uint8_t *base(void) const override { return _base; }
-
-private:
-  uint8_t *_base;
-  size_t _size;
-};
-
-class ExternalData final : public Data
-{
-public:
-  ExternalData(const uint8_t *base, size_t size) : _base{base}, _size{size}
-  {
-    // DO NOTHING
-  }
-
-public:
-  size_t size(void) const override { return _size; }
-  const uint8_t *base(void) const override { return _base; }
-
-private:
-  const uint8_t *_base;
-  const size_t _size;
-};
-
-} // namespace operand
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERAND_DATA_H__
diff --git a/runtimes/neurun/src/model/operand/DataType.h b/runtimes/neurun/src/model/operand/DataType.h
deleted file mode 100644
index d75a0dbf1..000000000
--- a/runtimes/neurun/src/model/operand/DataType.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERAND_DATATYPE_H__
-#define __NEURUN_MODEL_OPERAND_DATATYPE_H__
-
-namespace neurun
-{
-namespace model
-{
-namespace operand
-{
-
-enum class DataType
-{
-  SCALAR_FLOAT32 = 0,
-  SCALAR_INT32 = 1,
-  SCALAR_UINT32 = 2,
-
-  TENSOR_FLOAT32 = 3,
-  TENSOR_INT32 = 4,
-
-  TENSOR_QUANT8_ASYMM = 5,
-};
-
-} // namespace operand
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERAND_DATATYPE_H__
diff --git a/runtimes/neurun/src/model/operand/Index.h b/runtimes/neurun/src/model/operand/Index.h
deleted file mode 100644
index 1c84ba451..000000000
--- a/runtimes/neurun/src/model/operand/Index.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERAND_INDEX_H__
-#define __NEURUN_MODEL_OPERAND_INDEX_H__
-
-#include "graph/Index.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operand
-{
-
-using Index = ::neurun::graph::Index<uint32_t, struct IndexTag>;
-
-} // namespace operand
-} // namespace model
-} // namespace neurun
-
-namespace neurun
-{
-namespace model
-{
-namespace operand
-{
-namespace IO
-{
-
-using Index = ::neurun::graph::Index<uint32_t, struct IndexTag>;
-
-} // namespace IO
-} // namespace operand
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERAND_INDEX_H__
diff --git a/runtimes/neurun/src/model/operand/IndexSet.cc b/runtimes/neurun/src/model/operand/IndexSet.cc
deleted file mode 100644
index b83d314e4..000000000
--- a/runtimes/neurun/src/model/operand/IndexSet.cc
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "IndexSet.h"
-
-#include <algorithm>
-
-namespace neurun
-{
-namespace model
-{
-namespace operand
-{
-
-IndexSet::IndexSet(std::initializer_list<Index> list) : _set(list)
-{
-  // DO NOTHING
-}
-
-IndexSet::IndexSet(std::initializer_list<int32_t> list)
-{
-  for (auto val : list)
-  {
-    _set.emplace_back(static_cast<uint32_t>(val));
-  }
-}
-
-IndexSet::IndexSet(std::initializer_list<uint32_t> list)
-{
-  for (auto val : list)
-  {
-    _set.emplace_back(val);
-  }
-}
-
-bool IndexSet::contains(const Index &index) const
-{
-  return std::find(_set.begin(), _set.end(), index) != _set.end();
-}
-
-void IndexSet::replace(const Index &from, const Index &to)
-{
-  std::replace(_set.begin(), _set.end(), from, to);
-}
-
-} // namespace operand
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operand/IndexSet.h b/runtimes/neurun/src/model/operand/IndexSet.h
deleted file mode 100644
index e8827de9c..000000000
--- a/runtimes/neurun/src/model/operand/IndexSet.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERAND_INDEX_SET_H__
-#define __NEURUN_MODEL_OPERAND_INDEX_SET_H__
-
-#include <initializer_list>
-#include <vector>
-
-#include "Index.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operand
-{
-
-class IndexSet
-{
-public:
-  IndexSet(void) = default;
-  IndexSet(std::initializer_list<Index> list);
-  IndexSet(std::initializer_list<int32_t> list);
-  IndexSet(std::initializer_list<uint32_t> list);
-
-public:
-  void append(const Index &index) { _set.emplace_back(index); }
-
-public:
-  uint32_t size() const { return static_cast<uint32_t>(_set.size()); }
-  const Index &at(IO::Index set_index) const { return _set.at(set_index.asInt()); }
-  const Index &at(uint32_t index) const { return _set.at(index); }
-  bool contains(const Index &index) const;
-  void replace(const Index &from, const Index &to);
-
-public:
-  std::vector<Index>::const_iterator begin(void) const { return _set.begin(); }
-  std::vector<Index>::const_iterator end(void) const { return _set.end(); }
-
-private:
-  std::vector<Index> _set;
-};
-
-} // namespace operand
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERAND_INDEX_SET_H__
diff --git a/runtimes/neurun/src/model/operand/Object.cc b/runtimes/neurun/src/model/operand/Object.cc
deleted file mode 100644
index 63cf29bd3..000000000
--- a/runtimes/neurun/src/model/operand/Object.cc
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Object.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operand
-{
-
-size_t Object::operandSize(void) const
-{
-  const uint32_t ranks = _shape.rank();
-  int32_t elements = 1;
-
-  for (uint32_t rank = 0; rank < ranks; rank++)
-  {
-    elements *= _shape.dim(rank);
-  }
-
-  DataType type = _type.type();
-  size_t element_size = 0;
-
-  // Value of type is matched with OperandCode enum in NeuralNetworks.h
-  switch (type)
-  {
-    case DataType::SCALAR_FLOAT32:
-    case DataType::TENSOR_FLOAT32:
-      element_size = sizeof(float);
-      break;
-    case DataType::SCALAR_INT32:
-    case DataType::TENSOR_INT32:
-      element_size = sizeof(int32_t);
-      break;
-    case DataType::SCALAR_UINT32:
-      element_size = sizeof(uint32_t);
-      break;
-    case DataType::TENSOR_QUANT8_ASYMM:
-      element_size = sizeof(uint8_t);
-      break;
-    default:
-      throw std::runtime_error{"Unsuppported type size"};
-  }
-
-  return element_size * elements;
-}
-
-bool Object::setUsage(const OperandUsage usage)
-{
-  if (usageIsDefined() && (_usage != usage))
-  {
-    // Already set as different type
-    return false;
-  }
-
-  _usage = usage;
-
-  return true;
-}
-
-void Object::appendUse(const ::neurun::model::operation::Index &idx)
-{
-  assert(_usage != OperandUsage::NOT_DEFINED);
-  assert(!_uses.contains(idx));
-
-  _uses.append(idx);
-}
-
-void Object::removeUse(const ::neurun::model::operation::Index &idx)
-{
-  assert(_usage != OperandUsage::NOT_DEFINED);
-  assert(_uses.contains(idx));
-
-  _uses.remove(idx);
-}
-
-void Object::appendDef(const ::neurun::model::operation::Index &idx)
-{
-  assert(_usage != OperandUsage::NOT_DEFINED && _usage != OperandUsage::CONSTANT);
-  assert(_def.size() == 0);
-
-  _def.append(idx);
-}
-
-void Object::removeDef(const ::neurun::model::operation::Index &idx)
-{
-  assert(_usage != OperandUsage::NOT_DEFINED);
-  assert(_def.contains(idx));
-
-  _def.remove(idx);
-}
-
-void Object::lower_info(std::unique_ptr<graph::operand::LowerInfo> &&lower_info)
-{
-  _lower_info = std::move(lower_info);
-}
-
-const graph::operand::LowerInfo *Object::lower_info() const { return _lower_info.get(); }
-
-graph::operand::LowerInfo *Object::lower_info() { return _lower_info.get(); }
-
-void Object::parent_info(std::unique_ptr<graph::operand::ParentInfo> &&parent_info)
-{
-  _parent_info = std::move(parent_info);
-}
-
-const graph::operand::ParentInfo *Object::parent_info() const { return _parent_info.get(); }
-
-graph::operand::ParentInfo *Object::parent_info() { return _parent_info.get(); }
-
-} // namespace operand
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operand/Object.h b/runtimes/neurun/src/model/operand/Object.h
deleted file mode 100644
index eb5f6275e..000000000
--- a/runtimes/neurun/src/model/operand/Object.h
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERAND_OBJECT_H__
-#define __NEURUN_MODEL_OPERAND_OBJECT_H__
-
-#include <cassert>
-#include <cstdint>
-#include <memory>
-#include <algorithm>
-
-#include "Shape.h"
-#include "Data.h"
-#include "TypeInfo.h"
-#include "graph/operand/LowerInfo.h"  // TODO Remove this dependency
-#include "graph/operand/ParentInfo.h" // TODO Remove this dependency
-#include "model/operation/IndexList.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operand
-{
-
-// Operand usage should be exact one of these
-enum class OperandUsage
-{
-  NOT_DEFINED,
-  MODEL_INPUT,
-  CONSTANT,
-  OPERATION_OUTPUT,
-};
-
-class Object
-{
-public:
-  explicit Object(const Shape &shape, const TypeInfo &type)
-      : _shape{shape}, _type{type}, _usage{OperandUsage::NOT_DEFINED}
-  {
-    // DO NOTHING
-  }
-
-public:
-  const Shape &shape(void) const { return _shape; }
-  const TypeInfo &typeInfo(void) const { return _type; }
-  size_t operandSize(void) const;
-  bool setAsConstant() { return setUsage(OperandUsage::CONSTANT); }
-  bool setAsModelInput() { return setUsage(OperandUsage::MODEL_INPUT); }
-  bool setAsOperationOutput() { return setUsage(OperandUsage::OPERATION_OUTPUT); }
-  bool usageIsDefined(void) const { return _usage != OperandUsage::NOT_DEFINED; }
-  bool isModelInput(void) const { return _usage == OperandUsage::MODEL_INPUT; }
-  OperandUsage getUsage() const { return _usage; }
-
-  const operation::IndexList &getUses() const { return _uses; }
-  const operation::IndexList &getDef() const { return _def; }
-  void appendUse(const operation::Index &idx);
-  void removeUse(const operation::Index &idx);
-  void appendDef(const operation::Index &idx);
-  void removeDef(const operation::Index &idx);
-
-private:
-  bool setUsage(OperandUsage usage);
-
-public:
-  void data(std::unique_ptr<Data> &&data) { _data = std::move(data); }
-  const Data &data(void) const { return *_data; }
-
-public:
-  template <typename T, typename... Args> void data(Args &&... args)
-  {
-    data(std::unique_ptr<T>(new T{std::forward<Args>(args)...}));
-  }
-
-public:
-  template <typename T> T asScalar(void) const
-  {
-    assert((_shape.rank() == 0) || ((_shape.rank() == 1) && (_shape.dim(0) == 1)));
-    assert(_data != nullptr);
-    assert((_data->base() != nullptr) && (_data->size() == sizeof(T)));
-
-    return *(reinterpret_cast<const T *>(_data->base()));
-  }
-
-public:
-  void lower_info(std::unique_ptr<graph::operand::LowerInfo> &&lower_info);
-  const graph::operand::LowerInfo *lower_info() const;
-  graph::operand::LowerInfo *lower_info();
-  /**
-   * @brief     Set parent information
-   * @param[in] parent_info Parent information
-   */
-  void parent_info(std::unique_ptr<graph::operand::ParentInfo> &&parent_info);
-  /**
-   * @brief   Return parent information pointer as constant
-   * @return  Parent information pointer
-   */
-  const graph::operand::ParentInfo *parent_info() const;
-  /**
-   * @brief   Return parent information pointer
-   * @return  Perent information pointer
-   */
-  graph::operand::ParentInfo *parent_info();
-
-private:
-  const Shape _shape;
-  const TypeInfo _type;
-  std::unique_ptr<Data> _data;
-  OperandUsage _usage;
-
-  operation::IndexList _uses;
-  operation::IndexList _def; // size is 0 (constant) or 1 (from def operation)
-
-  std::unique_ptr<graph::operand::LowerInfo> _lower_info;
-  std::unique_ptr<graph::operand::ParentInfo> _parent_info;
-};
-
-} // namespace operand
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERAND_OBJECT_H__
diff --git a/runtimes/neurun/src/model/operand/Set.cc b/runtimes/neurun/src/model/operand/Set.cc
deleted file mode 100644
index d93c21514..000000000
--- a/runtimes/neurun/src/model/operand/Set.cc
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Set.h"
-
-#include "cpp14/memory.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operand
-{
-
-const Index Set::generateIndex()
-{
-  assert((_index_count) <= 0x7fffffff);
-
-  return Index{_index_count++};
-}
-
-Index Set::append(const Shape &shape, const TypeInfo &type)
-{
-  auto index = generateIndex();
-
-  _objects[index] = nnfw::cpp14::make_unique<Object>(shape, type);
-
-  return index;
-}
-
-const Object &Set::at(const Index &index) const { return *(_objects.at(index)); }
-
-Object &Set::at(const Index &index) { return *(_objects.at(index)); }
-
-bool Set::exist(const Index &index) const { return index.value() < _objects.size(); }
-
-void Set::iterate(const std::function<void(const Index &, const Object &)> &fn) const
-{
-  for (const auto &e : _objects)
-  {
-    fn(e.first, *e.second);
-  }
-}
-
-void Set::iterate(const std::function<void(const Index &, Object &)> &fn)
-{
-  // TODO Remove this workaround
-  //      This implementation is a workaround in case of adding operands while iteration
-  //
-  //      // Original Implementation (We probably should be back to this)
-  //      for (auto &e : _objects)
-  //      {
-  //        fn(e.first, *e.second);
-  //      }
-
-  std::list<Index> l;
-
-  for (auto &e : _objects)
-  {
-    l.push_back(e.first);
-  }
-
-  for (auto index : l)
-  {
-    fn(index, *_objects[index]);
-  }
-}
-
-} // namespace operand
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operand/Set.h b/runtimes/neurun/src/model/operand/Set.h
deleted file mode 100644
index 9dff7ec3c..000000000
--- a/runtimes/neurun/src/model/operand/Set.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERAND_SET_H__
-#define __NEURUN_MODEL_OPERAND_SET_H__
-
-#include <memory>
-#include <unordered_map>
-
-#include "Object.h"
-#include "Index.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operand
-{
-
-class Set
-{
-public:
-  Set() : _index_count(0) {}
-
-public:
-  Index append(const Shape &, const TypeInfo &);
-  void remove(const Index &index) { _objects.erase(index); };
-
-public:
-  const Object &at(const Index &) const;
-  Object &at(const Index &);
-  bool exist(const Index &) const;
-  void iterate(const std::function<void(const Index &, const Object &)> &fn) const;
-  void iterate(const std::function<void(const Index &, Object &)> &fn);
-
-private:
-  const Index generateIndex();
-
-private:
-  std::unordered_map<Index, std::unique_ptr<Object>> _objects;
-  uint32_t _index_count;
-};
-
-} // namespace operand
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERAND_SET_H__
diff --git a/runtimes/neurun/src/model/operand/Shape.cc b/runtimes/neurun/src/model/operand/Shape.cc
deleted file mode 100644
index f74c48d88..000000000
--- a/runtimes/neurun/src/model/operand/Shape.cc
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <cassert>
-
-#include "Shape.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operand
-{
-
-Shape::Shape(uint32_t rank) { _dims.resize(rank); }
-
-int32_t Shape::asVector(void) const
-{
-  assert(rank() == 1);
-
-  return dim(0);
-}
-
-nnfw::misc::matrix::Shape Shape::asMatrix(void) const
-{
-  assert(rank() == 2);
-
-  const auto height = dim(0);
-  const auto width = dim(1);
-
-  return nnfw::misc::matrix::Shape(height, width);
-}
-
-nnfw::misc::feature::Shape Shape::asFeature(void) const
-{
-  assert(rank() == 4);
-
-  // Feature Map in NNAPI
-  //  - Dimension(0) -> Batch
-  //  - Dimension(1) -> Height
-  //  - Dimension(2) -> Width
-  //  - Dimension(3) -> Depth
-  const auto batch = dim(0);
-  const auto depth = dim(3);
-  const auto height = dim(1);
-  const auto width = dim(2);
-
-  return nnfw::misc::feature::Shape(batch, depth, height, width);
-}
-
-nnfw::misc::kernel::Shape Shape::asKernel(void) const
-{
-  assert(rank() == 4);
-
-  // Convolution Kernel in NNAPI
-  //  - Dimension(0) -> Count
-  //  - Dimension(1) -> Height
-  //  - Dimension(2) -> Width
-  //  - Dimension(3) -> Depth
-  const auto count = dim(0);
-  const auto depth = dim(3);
-  const auto height = dim(1);
-  const auto width = dim(2);
-
-  return nnfw::misc::kernel::Shape(count, depth, height, width);
-}
-
-nnfw::misc::tensor::Shape Shape::asTensor(void) const
-{
-  nnfw::misc::tensor::Shape shape{};
-  for (uint32_t i = 0; i < rank(); ++i)
-  {
-    shape.append(dim(i));
-  }
-
-  return shape; // this shape represents shape of NNAPI
-}
-
-} // namespace operand
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operand/Shape.h b/runtimes/neurun/src/model/operand/Shape.h
deleted file mode 100644
index b80f647d5..000000000
--- a/runtimes/neurun/src/model/operand/Shape.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERAND_SHAPE_H__
-#define __NEURUN_MODEL_OPERAND_SHAPE_H__
-
-#include <vector>
-#include <cstdint>
-
-#include "misc/feature/Shape.h"
-#include "misc/kernel/Shape.h"
-#include "misc/matrix/Shape.h"
-#include "misc/tensor/Shape.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operand
-{
-
-struct Shape
-{
-public:
-  Shape(uint32_t rank = 0);
-
-public:
-  uint32_t rank(void) const { return _dims.size(); }
-
-public:
-  int32_t dim(uint32_t n) const { return _dims.at(n); }
-  int32_t &dim(uint32_t n) { return _dims.at(n); }
-  const std::vector<int32_t> &dims() const { return _dims; }
-
-public:
-  int32_t asVector(void) const;
-  nnfw::misc::matrix::Shape asMatrix(void) const;
-  nnfw::misc::feature::Shape asFeature(void) const;
-  nnfw::misc::kernel::Shape asKernel(void) const;
-  nnfw::misc::tensor::Shape asTensor(void) const;
-
-private:
-  std::vector<int32_t> _dims;
-};
-
-} // namespace operand
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERAND_SHAPE_H__
diff --git a/runtimes/neurun/src/model/operand/TypeInfo.cc b/runtimes/neurun/src/model/operand/TypeInfo.cc
deleted file mode 100644
index 0b9f63c93..000000000
--- a/runtimes/neurun/src/model/operand/TypeInfo.cc
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "TypeInfo.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operand
-{
-
-DataType TypeInfo::typeFromOperandCode(OperandCode type)
-{
-  // Now neurun::model::operand::DataType share same enum value with OperandCode
-  // in NeuralNetworks.h.
-  return static_cast<DataType>(static_cast<uint32_t>(type));
-}
-
-} // namespace operand
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operand/TypeInfo.h b/runtimes/neurun/src/model/operand/TypeInfo.h
deleted file mode 100644
index d16172a09..000000000
--- a/runtimes/neurun/src/model/operand/TypeInfo.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERAND_TYPEINFO_H__
-#define __NEURUN_MODEL_OPERAND_TYPEINFO_H__
-
-#include <cstdint>
-
-#include <NeuralNetworks.h>
-
-#include "DataType.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operand
-{
-
-class TypeInfo
-{
-public:
-  TypeInfo() = default;
-
-  TypeInfo(OperandCode type, float scale, int32_t offset)
-      : _type(typeFromOperandCode(type)), _scale(scale), _offset(offset)
-  {
-    // DO NOTHING
-  }
-
-public:
-  DataType type() const { return _type; }
-  float scale() const { return _scale; }
-  int32_t offset() const { return _offset; }
-
-private:
-  // Now neurun::model::operand::DataType share same enum value with OperandCode
-  // in NeuralNetworks.h.
-  // If we don't share same value, we must fix this mapping function.
-  DataType typeFromOperandCode(OperandCode type);
-
-private:
-  DataType _type;
-  float _scale;
-  int32_t _offset;
-};
-} // namespace operand
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERAND_TYPEINFO_H__
diff --git a/runtimes/neurun/src/model/operation/AddNode.cc b/runtimes/neurun/src/model/operation/AddNode.cc
deleted file mode 100644
index 0c9d4e09b..000000000
--- a/runtimes/neurun/src/model/operation/AddNode.cc
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "AddNode.h"
-
-#include <cassert>
-
-#include "NodeVisitor.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-void AddNode::accept(NodeVisitor &&v) const { v.visit(*this); }
-
-AddNode::AddNode(const model::operation::Node::InitParam &init_param)
-    : model::operation::Node{OperandConstraint::createExact(2u)}
-{
-  assert(init_param.input_count == 2);
-  assert(init_param.output_count == 1);
-
-  // Each input should be interpreted as follows:
-  //
-  //  0 -> Lefthand side operand
-  //  1 -> Righthand side operand
-
-  setInputs({init_param.inputs[0], init_param.inputs[1]});
-  setOutputs({init_param.outputs[0]});
-}
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operation/AddNode.h b/runtimes/neurun/src/model/operation/AddNode.h
deleted file mode 100644
index 533fb0ab3..000000000
--- a/runtimes/neurun/src/model/operation/AddNode.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERATION_ADD_NODE_H__
-#define __NEURUN_MODEL_OPERATION_ADD_NODE_H__
-
-#include "model/operation/Node.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-class AddNode : public model::operation::Node
-{
-public:
-  AddNode(const model::operation::Node::InitParam &init_param);
-
-  enum Input
-  {
-    LHS = 0,
-    RHS
-  };
-
-  struct Param
-  {
-    operand::Index activation_index;
-  };
-
-public:
-  virtual void accept(NodeVisitor &&) const override;
-  virtual std::string getName() const override { return "Add"; }
-};
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERATION_ADD_H__
diff --git a/runtimes/neurun/src/model/operation/AvgPool2DNode.cc b/runtimes/neurun/src/model/operation/AvgPool2DNode.cc
deleted file mode 100644
index 8c688e60a..000000000
--- a/runtimes/neurun/src/model/operation/AvgPool2DNode.cc
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "AvgPool2DNode.h"
-
-#include <cassert>
-
-#include "NodeVisitor.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-void AvgPool2DNode::accept(NodeVisitor &&v) const { v.visit(*this); }
-
-AvgPool2DNode::AvgPool2DNode(const model::operation::Node::InitParam &init_param)
-    : model::operation::Node{OperandConstraint::createExact(1u)}
-{
-  assert(init_param.input_count == 7);
-  assert(init_param.output_count == 1);
-
-  // Each input should be interpreted as follows:
-  //
-  //  0 -> IFM Tensor Index
-  //  1 -> Padding Code (ANEURALNETWORKS_PADDING_SAME or ANEURALNETWORKS_PADDING_VALID) Index
-  //  2 -> Horizontal (over width) Stride Index
-  //  3 -> Vertial (over height) Stride Index
-  //  4 -> Filter Width Index
-  //  5 -> Filter Height Index
-  //  6 -> FuseCode (activation) Index
-
-  setInputs({init_param.inputs[0]});
-  setOutputs({init_param.outputs[0]});
-
-  _param.padding_index = operand::Index{init_param.inputs[1]};
-  _param.hstride_index = operand::Index{init_param.inputs[2]};
-  _param.vstride_index = operand::Index{init_param.inputs[3]};
-
-  _param.kw_index = operand::Index{init_param.inputs[4]};
-  _param.kh_index = operand::Index{init_param.inputs[5]};
-  _param.activation_index = operand::Index{init_param.inputs[6]};
-}
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operation/AvgPool2DNode.h b/runtimes/neurun/src/model/operation/AvgPool2DNode.h
deleted file mode 100644
index e66e6146e..000000000
--- a/runtimes/neurun/src/model/operation/AvgPool2DNode.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERATION_AVGPOOL2D_NODE_H__
-#define __NEURUN_MODEL_OPERATION_AVGPOOL2D_NODE_H__
-
-#include <memory>
-
-#include "model/operation/Node.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-class AvgPool2DNode : public model::operation::Node
-{
-public:
-  AvgPool2DNode(const model::operation::Node::InitParam &init_param);
-
-  enum Input
-  {
-    INPUT = 0
-  };
-
-  struct Param
-  {
-    operand::Index kw_index;
-    operand::Index kh_index;
-
-    operand::Index hstride_index;
-    operand::Index vstride_index;
-
-    operand::Index padding_index;
-    operand::Index activation_index;
-  };
-
-public:
-  virtual void accept(NodeVisitor &&) const override;
-  virtual std::string getName() const override { return "AvgPool2D"; }
-
-public:
-  const Param &param() const { return _param; }
-
-private:
-  Param _param;
-};
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERATION_AVGPOOL2D_H__
diff --git a/runtimes/neurun/src/model/operation/ConcatNode.cc b/runtimes/neurun/src/model/operation/ConcatNode.cc
deleted file mode 100644
index 23cfef294..000000000
--- a/runtimes/neurun/src/model/operation/ConcatNode.cc
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ConcatNode.h"
-
-#include <cassert>
-
-#include "NodeVisitor.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-void ConcatNode::accept(NodeVisitor &&v) const { v.visit(*this); }
-
-ConcatNode::ConcatNode(const model::operation::Node::InitParam &init_param)
-    : model::operation::Node{OperandConstraint::createAtLeast(2u)}
-{
-  assert(init_param.input_count >= 2); // At least one one input tensor and axis
-  assert(init_param.output_count == 1);
-
-  // When there are N + 1 inputs, each input should be interpreted as follows:
-  //
-  //  [0, N) -> Input tensors
-  //  N -> Axis
-  //
-
-  {
-    operand::IndexSet inds;
-    for (uint32_t n = 0; n < init_param.input_count - 1; ++n)
-    {
-      inds.append(operand::Index{init_param.inputs[n]});
-    }
-    setInputs(inds);
-  }
-  setOutputs({init_param.outputs[0]});
-
-  _param.axis_index = operand::Index{init_param.inputs[init_param.input_count - 1]};
-}
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operation/ConcatNode.h b/runtimes/neurun/src/model/operation/ConcatNode.h
deleted file mode 100644
index b69ee2f23..000000000
--- a/runtimes/neurun/src/model/operation/ConcatNode.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERATION_CONCAT_NODE_H__
-#define __NEURUN_MODEL_OPERATION_CONCAT_NODE_H__
-
-#include <memory>
-
-#include "model/operation/Node.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-class ConcatNode : public model::operation::Node
-{
-public:
-  ConcatNode(const model::operation::Node::InitParam &init_param);
-
-  struct Param
-  {
-    operand::Index axis_index;
-  };
-
-public:
-  virtual void accept(NodeVisitor &&) const override;
-  virtual std::string getName() const override { return "Concat"; }
-
-public:
-  const Param &param() const { return _param; }
-
-private:
-  Param _param;
-};
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERATION_CONCAT_H__
diff --git a/runtimes/neurun/src/model/operation/Conv2DNode.cc b/runtimes/neurun/src/model/operation/Conv2DNode.cc
deleted file mode 100644
index 7eb2b183d..000000000
--- a/runtimes/neurun/src/model/operation/Conv2DNode.cc
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Conv2DNode.h"
-
-#include <cassert>
-
-#include "NodeVisitor.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-void Conv2DNode::accept(NodeVisitor &&v) const { v.visit(*this); }
-
-Conv2DNode::Conv2DNode(const model::operation::Node::InitParam &init_param)
-    : model::operation::Node{OperandConstraint::createExact(3u)}
-{
-  assert(init_param.input_count == 7 && init_param.output_count == 1);
-
-  // Each input should be interpreted as follows:
-  //
-  //
-  //  0 -> IFM Tensor Index
-  //  1 -> Kernel Tensor Index
-  //  2 -> Bias Tensor Index
-  //  3 -> Padding Code (ANEURALNETWORKS_PADDING_SAME or ANEURALNETWORKS_PADDING_VALID) Index
-  //  4 -> Stride (width) Index
-  //  5 -> Stride (height) INdex
-  //  6 -> Activation Index
-
-  setInputs({init_param.inputs[0], init_param.inputs[1], init_param.inputs[2]});
-  setOutputs({init_param.outputs[0]});
-
-  _param.padding_index = operand::Index{init_param.inputs[3]};
-  _param.hstride_index = operand::Index{init_param.inputs[4]};
-  _param.vstride_index = operand::Index{init_param.inputs[5]};
-  _param.activation_index = operand::Index{init_param.inputs[6]};
-}
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operation/Conv2DNode.h b/runtimes/neurun/src/model/operation/Conv2DNode.h
deleted file mode 100644
index 34a95f0d9..000000000
--- a/runtimes/neurun/src/model/operation/Conv2DNode.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERATION_CONV2D_NODE_H__
-#define __NEURUN_MODEL_OPERATION_CONV2D_NODE_H__
-
-#include <memory>
-
-#include "model/operation/Node.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-class Conv2DNode : public model::operation::Node
-{
-public:
-  Conv2DNode(const model::operation::Node::InitParam &);
-
-  enum Input
-  {
-    INPUT = 0,
-    KERNEL,
-    BIAS
-  };
-
-  struct Param
-  {
-    operand::Index hstride_index;
-    operand::Index vstride_index;
-
-    operand::Index padding_index;
-    operand::Index activation_index;
-  };
-
-public:
-  virtual void accept(NodeVisitor &&) const override;
-  virtual std::string getName() const override { return "Conv2D"; }
-
-public:
-  const Param &param() const { return _param; }
-
-private:
-  Param _param;
-};
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERATION_CONV2D_NODE_H__
diff --git a/runtimes/neurun/src/model/operation/FullyConnectedNode.cc b/runtimes/neurun/src/model/operation/FullyConnectedNode.cc
deleted file mode 100644
index 0fde5182d..000000000
--- a/runtimes/neurun/src/model/operation/FullyConnectedNode.cc
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "FullyConnectedNode.h"
-
-#include <cassert>
-
-#include "NodeVisitor.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-void FullyConnectedNode::accept(NodeVisitor &&v) const { v.visit(*this); }
-
-FullyConnectedNode::FullyConnectedNode(const model::operation::Node::InitParam &init_param)
-    : model::operation::Node{OperandConstraint::createExact(3u)}
-{
-  assert(init_param.input_count == 4 && init_param.output_count == 1);
-
-  // Each input should be interpreted as follows:
-  //
-  //  0 -> A tensor, specifying the input.
-  //  1 -> A 2-D tensor, specifying the weights
-  //  2 -> A 1-D tensor, specifying the bias
-  //  3 -> An INT32 value, and has to be one of the FuseCode values
-
-  setInputs({init_param.inputs[0], init_param.inputs[1], init_param.inputs[2]});
-  setOutputs({init_param.outputs[0]});
-
-  _param.activation_index = operand::Index{init_param.inputs[3]};
-}
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operation/FullyConnectedNode.h b/runtimes/neurun/src/model/operation/FullyConnectedNode.h
deleted file mode 100644
index 9820ddc8c..000000000
--- a/runtimes/neurun/src/model/operation/FullyConnectedNode.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERATION_FULLYCONNECTED_NODE_H__
-#define __NEURUN_MODEL_OPERATION_FULLYCONNECTED_NODE_H__
-
-#include <memory>
-
-#include "model/operation/Node.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-class FullyConnectedNode : public model::operation::Node
-{
-public:
-  FullyConnectedNode(const model::operation::Node::InitParam &init_param);
-
-  enum Input
-  {
-    INPUT = 0,
-    WEIGHT,
-    BIAS
-  };
-
-  struct Param
-  {
-    operand::Index activation_index;
-  };
-
-public:
-  virtual void accept(NodeVisitor &&) const override;
-  virtual std::string getName() const override { return "FullyConnected"; }
-
-public:
-  const Param &param() const { return _param; }
-
-private:
-  Param _param;
-};
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERATION_FULLYCONNECTED_NODE_H__
diff --git a/runtimes/neurun/src/model/operation/Index.h b/runtimes/neurun/src/model/operation/Index.h
deleted file mode 100644
index e03dd74d6..000000000
--- a/runtimes/neurun/src/model/operation/Index.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERATION_INDEX_H__
-#define __NEURUN_MODEL_OPERATION_INDEX_H__
-
-#include "graph/Index.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-using Index = ::neurun::graph::Index<uint32_t, struct IndexTag>;
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERATION_INDEX_H__
diff --git a/runtimes/neurun/src/model/operation/IndexList.cc b/runtimes/neurun/src/model/operation/IndexList.cc
deleted file mode 100644
index e46987036..000000000
--- a/runtimes/neurun/src/model/operation/IndexList.cc
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "IndexList.h"
-
-#include <algorithm>
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-IndexList::IndexList(std::initializer_list<Index> list) : _list(list)
-{
-  // DO NOTHING
-}
-
-bool IndexList::contains(const ::neurun::model::operation::Index &index) const
-{
-  return std::find(_list.begin(), _list.end(), index) != _list.end();
-}
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operation/IndexList.h b/runtimes/neurun/src/model/operation/IndexList.h
deleted file mode 100644
index c0af29829..000000000
--- a/runtimes/neurun/src/model/operation/IndexList.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERATION_INDEX_LIST_H__
-#define __NEURUN_MODEL_OPERATION_INDEX_LIST_H__
-
-#include <initializer_list>
-#include <list>
-
-#include "Index.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-class IndexList
-{
-public:
-  IndexList(void) = default;
-  IndexList(std::initializer_list<Index> list);
-
-public:
-  void append(const Index &index) { _list.push_back(index); }
-  void remove(const Index &index) { _list.remove(index); }
-
-public:
-  uint32_t size() const { return static_cast<uint32_t>(_list.size()); }
-  const std::list<Index> &list() const { return _list; }
-  bool contains(const Index &index) const;
-
-private:
-  std::list<Index> _list;
-};
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERATION_INDEX_LIST_H__
diff --git a/runtimes/neurun/src/model/operation/MaxPool2DNode.cc b/runtimes/neurun/src/model/operation/MaxPool2DNode.cc
deleted file mode 100644
index 3d3686b0e..000000000
--- a/runtimes/neurun/src/model/operation/MaxPool2DNode.cc
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "MaxPool2DNode.h"
-
-#include <cassert>
-
-#include "NodeVisitor.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-void MaxPool2DNode::accept(NodeVisitor &&v) const { v.visit(*this); }
-
-MaxPool2DNode::MaxPool2DNode(const model::operation::Node::InitParam &init_param)
-    : model::operation::Node{OperandConstraint::createExact(1u)}
-{
-  assert(init_param.input_count == 7);
-  assert(init_param.output_count == 1);
-
-  // Each input should be interpreted as follows:
-  //
-  //  0 -> IFM Tensor Index
-  //  1 -> Padding Code (ANEURALNETWORKS_PADDING_SAME or ANEURALNETWORKS_PADDING_VALID) Index
-  //  2 -> Horizontal (over width) Stride Index
-  //  3 -> Vertial (over height) Stride Index
-  //  4 -> Filter Width Index
-  //  5 -> Filter Height Index
-  //  6 -> FuseCode (activation) Index
-
-  setInputs({init_param.inputs[0]});
-  setOutputs({init_param.outputs[0]});
-
-  _param.padding_index = operand::Index{init_param.inputs[1]};
-  _param.hstride_index = operand::Index{init_param.inputs[2]};
-  _param.vstride_index = operand::Index{init_param.inputs[3]};
-
-  _param.kw_index = operand::Index{init_param.inputs[4]};
-  _param.kh_index = operand::Index{init_param.inputs[5]};
-  _param.activation_index = operand::Index{init_param.inputs[6]};
-}
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operation/MaxPool2DNode.h b/runtimes/neurun/src/model/operation/MaxPool2DNode.h
deleted file mode 100644
index 96d1210a7..000000000
--- a/runtimes/neurun/src/model/operation/MaxPool2DNode.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERATION_MAXPOOL2D_NODE_H__
-#define __NEURUN_MODEL_OPERATION_MAXPOOL2D_NODE_H__
-
-#include <memory>
-
-#include "model/operation/Node.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-class MaxPool2DNode : public model::operation::Node
-{
-public:
-  MaxPool2DNode(const model::operation::Node::InitParam &init_param);
-
-  enum Input
-  {
-    INPUT = 0
-  };
-
-  struct Param
-  {
-    operand::Index kw_index;
-    operand::Index kh_index;
-
-    operand::Index hstride_index;
-    operand::Index vstride_index;
-
-    operand::Index padding_index;
-    operand::Index activation_index;
-  };
-
-public:
-  virtual void accept(NodeVisitor &&) const override;
-  virtual std::string getName() const override { return "MaxPool2D"; }
-
-public:
-  const Param &param() const { return _param; }
-
-private:
-  Param _param;
-};
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERATION_MAXPOOL2D_NODE_H__
diff --git a/runtimes/neurun/src/model/operation/Node.Include.h b/runtimes/neurun/src/model/operation/Node.Include.h
deleted file mode 100644
index 95e78c7b5..000000000
--- a/runtimes/neurun/src/model/operation/Node.Include.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-// This file has no ifdef guard intentionally
-
-#include "Conv2DNode.h"
-#include "MaxPool2DNode.h"
-#include "AvgPool2DNode.h"
-#include "ConcatNode.h"
-#include "ReshapeNode.h"
-#include "FullyConnectedNode.h"
-#include "SoftmaxNode.h"
-#include "PermuteNode.h"
-#include "AddNode.h"
diff --git a/runtimes/neurun/src/model/operation/Node.cc b/runtimes/neurun/src/model/operation/Node.cc
deleted file mode 100644
index 76397afde..000000000
--- a/runtimes/neurun/src/model/operation/Node.cc
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Node.h"
-
-#include <cassert>
-
-#include "graph/operation/LowerInfo.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-Node::Node(OperandConstraint input_constr) : _input_constr{input_constr} {}
-
-Node::~Node() = default;
-
-void Node::setInputs(const operand::IndexSet &indexes)
-{
-  assert(_input_constr.check(indexes.size()));
-  _inputs = indexes;
-}
-
-void Node::setOutputs(const operand::IndexSet &indexes) { _outputs = indexes; }
-
-void Node::replaceInput(const operand::Index &from, const operand::Index &to)
-{
-  _inputs.replace(from, to);
-}
-
-void Node::replaceOutput(const operand::Index &from, const operand::Index &to)
-{
-  _outputs.replace(from, to);
-}
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operation/Node.h b/runtimes/neurun/src/model/operation/Node.h
deleted file mode 100644
index 76f0d2d00..000000000
--- a/runtimes/neurun/src/model/operation/Node.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERATION_NODE_H__
-#define __NEURUN_MODEL_OPERATION_NODE_H__
-
-#include <memory>
-
-#include "model/operand/Object.h"
-#include "model/operand/IndexSet.h"
-#include "OperandConstraint.h"
-
-namespace neurun
-{
-namespace graph
-{
-namespace operation
-{
-class LowerInfo;
-} // namespace operation
-} // namespace graph
-} // namespace neurun
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-struct NodeVisitor;
-
-class Node
-{
-public:
-  struct InitParam
-  {
-    uint32_t input_count;
-    const uint32_t *inputs;
-    uint32_t output_count;
-    const uint32_t *outputs;
-  };
-
-public:
-  Node(OperandConstraint input_constr);
-  virtual ~Node();
-
-public:
-  virtual void accept(NodeVisitor &&) const = 0;
-  virtual std::string getName() const = 0;
-
-public:
-  void replaceInput(const operand::Index &from, const operand::Index &to);
-  void replaceOutput(const operand::Index &from, const operand::Index &to);
-  const operand::IndexSet &getInputs() const { return _inputs; }
-  const operand::IndexSet &getOutputs() const { return _outputs; }
-  // It's for only input/output tensors but const data.
-  void setInputs(const operand::IndexSet &indexes);
-  void setOutputs(const operand::IndexSet &indexes);
-
-private:
-  operand::IndexSet _inputs;
-  operand::IndexSet _outputs;
-  OperandConstraint _input_constr;
-};
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERATION_NODE_H__
diff --git a/runtimes/neurun/src/model/operation/NodeVisitor.h b/runtimes/neurun/src/model/operation/NodeVisitor.h
deleted file mode 100644
index 8420de998..000000000
--- a/runtimes/neurun/src/model/operation/NodeVisitor.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERATION_NODE_VISITOR_H__
-#define __NEURUN_MODEL_OPERATION_NODE_VISITOR_H__
-
-#include "Node.Include.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-struct NodeVisitor
-{
-  virtual ~NodeVisitor() = default;
-
-#define OP(InternalName, IsNnApi, NnApiName) \
-  virtual void visit(const InternalName &) {}
-#include "model/operation/Op.lst"
-#undef OP
-};
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERATION_NODE_VISITOR_H__
diff --git a/runtimes/neurun/src/model/operation/Op.lst b/runtimes/neurun/src/model/operation/Op.lst
deleted file mode 100644
index 23f4b5118..000000000
--- a/runtimes/neurun/src/model/operation/Op.lst
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef OP
-#error  Define OP before including this file
-#endif
-
-// NOTE The relation between "Internal Name" and "NN API Name" is "1 : N".
-
-// Internal Name           | NN API? | NN API Name
-OP(AddNode                 , true    , ADD)
-OP(Conv2DNode              , true    , CONV_2D)
-OP(AvgPool2DNode           , true    , AVERAGE_POOL_2D)
-OP(MaxPool2DNode           , true    , MAX_POOL_2D)
-OP(ConcatNode              , true    , CONCATENATION)
-OP(FullyConnectedNode      , true    , FULLY_CONNECTED)
-OP(ReshapeNode             , true    , RESHAPE)
-OP(SoftmaxNode             , true    , SOFTMAX)
-OP(PermuteNode             , false   , NOT_AVAILABLE)
diff --git a/runtimes/neurun/src/model/operation/OperandConstraint.cc b/runtimes/neurun/src/model/operation/OperandConstraint.cc
deleted file mode 100644
index 5c69de928..000000000
--- a/runtimes/neurun/src/model/operation/OperandConstraint.cc
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "OperandConstraint.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operation/OperandConstraint.h b/runtimes/neurun/src/model/operation/OperandConstraint.h
deleted file mode 100644
index d1cd8aa2c..000000000
--- a/runtimes/neurun/src/model/operation/OperandConstraint.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERATION_OPERAND_CONSTRAINT_H__
-#define __NEURUN_MODEL_OPERATION_OPERAND_CONSTRAINT_H__
-
-#include <stdint.h>
-#include <limits>
-#include <set>
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-class OperandConstraint
-{
-private:
-  static const uint32_t INF = std::numeric_limits<uint32_t>::max();
-
-public:
-  static OperandConstraint createAny() { return OperandConstraint{0u, INF}; }
-  static OperandConstraint createExact(uint32_t exact) { return OperandConstraint{exact, exact}; }
-  static OperandConstraint createAtMost(uint32_t end) { return OperandConstraint{0u, end}; }
-  static OperandConstraint createAtLeast(uint32_t begin) { return OperandConstraint{begin, INF}; }
-  static OperandConstraint createInRange(uint32_t begin, uint32_t end)
-  {
-    return OperandConstraint{begin, end};
-  }
-
-private:
-  OperandConstraint(uint32_t begin, uint32_t end) : _begin{begin}, _end{end} {}
-
-public:
-  bool check(uint32_t ind) const { return _begin <= ind && ind <= _end; }
-
-private:
-  uint32_t _begin;
-  uint32_t _end;
-};
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERATION_OPERAND_CONSTRAINT_H__
diff --git a/runtimes/neurun/src/model/operation/PermuteNode.cc b/runtimes/neurun/src/model/operation/PermuteNode.cc
deleted file mode 100644
index 174d2a86b..000000000
--- a/runtimes/neurun/src/model/operation/PermuteNode.cc
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "PermuteNode.h"
-
-#include <cassert>
-
-#include "NodeVisitor.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-void PermuteNode::accept(NodeVisitor &&v) const { v.visit(*this); }
-
-PermuteNode::PermuteNode(const operand::Index &input, const operand::Index &output, Type type)
-    : model::operation::Node{OperandConstraint::createExact(1u)}, _param{type}
-{
-  setInputs({input});
-  setOutputs({output});
-}
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operation/PermuteNode.h b/runtimes/neurun/src/model/operation/PermuteNode.h
deleted file mode 100644
index b589975be..000000000
--- a/runtimes/neurun/src/model/operation/PermuteNode.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERATION_PERMUTE_NODE_H__
-#define __NEURUN_MODEL_OPERATION_PERMUTE_NODE_H__
-
-#include "model/operation/Node.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-class PermuteNode : public model::operation::Node
-{
-public:
-  enum class Type
-  {
-    NHWC_TO_NCHW,
-    NCHW_TO_NHWC,
-    COPY
-  };
-
-  struct Param
-  {
-    Type type;
-  };
-
-public:
-  virtual void accept(NodeVisitor &&) const override;
-  virtual std::string getName() const override { return "Permute"; }
-
-public:
-  PermuteNode(const operand::Index &input, const operand::Index &output, Type type);
-
-public:
-  const Param &param() const { return _param; }
-
-private:
-  Param _param;
-};
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERATION_PERMUTE_NODE_H__
diff --git a/runtimes/neurun/src/model/operation/ReshapeNode.cc b/runtimes/neurun/src/model/operation/ReshapeNode.cc
deleted file mode 100644
index 616b8cd65..000000000
--- a/runtimes/neurun/src/model/operation/ReshapeNode.cc
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ReshapeNode.h"
-
-#include <cassert>
-
-#include "NodeVisitor.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-void ReshapeNode::accept(NodeVisitor &&v) const { v.visit(*this); }
-
-ReshapeNode::ReshapeNode(const model::operation::Node::InitParam &init_param)
-    : model::operation::Node{OperandConstraint::createExact(1u)}
-{
-  assert(init_param.input_count == 2 && init_param.output_count == 1);
-
-  // Each input should be interpreted as follows:
-  //
-  //  0 -> A tensor, specifying the tensor to be reshaped.
-  //  1 -> A 1-D tensor of type ANEURALNETWORKS_TENSOR_INT32, defining the shape of the output
-  //  tensor
-
-  // TODO Second input should be shape tensor (init_param.inputs[1])
-  setInputs({init_param.inputs[0] /* , init_param.inputs[1] */});
-  setOutputs({init_param.outputs[0]});
-}
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operation/ReshapeNode.h b/runtimes/neurun/src/model/operation/ReshapeNode.h
deleted file mode 100644
index 1758e9ec8..000000000
--- a/runtimes/neurun/src/model/operation/ReshapeNode.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERATION_RESHAPE_NODE_H__
-#define __NEURUN_MODEL_OPERATION_RESHAPE_NODE_H__
-
-#include <memory>
-
-#include "model/operation/Node.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-class ReshapeNode : public model::operation::Node
-{
-public:
-  ReshapeNode(const model::operation::Node::InitParam &init_param);
-
-  enum Input
-  {
-    INPUT = 0
-  };
-
-public:
-  virtual void accept(NodeVisitor &&) const override;
-  virtual std::string getName() const override { return "Reshape"; }
-};
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERATION_RESHAPE_NODE_H__
diff --git a/runtimes/neurun/src/model/operation/Set.cc b/runtimes/neurun/src/model/operation/Set.cc
deleted file mode 100644
index 14bd4f584..000000000
--- a/runtimes/neurun/src/model/operation/Set.cc
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Set.h"
-
-#include <cassert>
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-const Index Set::generateIndex()
-{
-  assert((_index_count) <= 0x7fffffff);
-
-  return Index{_index_count++};
-}
-
-Index Set::append(std::unique_ptr<Node> &&node)
-{
-  auto index = generateIndex();
-
-  _nodes[index] = std::move(node);
-  return index;
-}
-
-const Node &Set::at(const Index &index) const { return *(_nodes.at(index)); }
-
-Node &Set::at(const Index &index) { return *(_nodes.at(index)); }
-
-bool Set::exist(const Index &index) const { return _nodes.find(index) != _nodes.end(); }
-
-void Set::iterate(const std::function<void(const Index &, const Node &)> &fn) const
-{
-  for (auto it = _nodes.begin(); it != _nodes.end(); ++it)
-  {
-    fn(it->first, *it->second);
-  }
-}
-
-void Set::iterate(const std::function<void(const Index &, Node &)> &fn)
-{
-  for (auto it = _nodes.begin(); it != _nodes.end(); ++it)
-  {
-    fn(it->first, *it->second);
-  }
-}
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operation/Set.h b/runtimes/neurun/src/model/operation/Set.h
deleted file mode 100644
index eebf91e65..000000000
--- a/runtimes/neurun/src/model/operation/Set.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERATION_SET_H__
-#define __NEURUN_MODEL_OPERATION_SET_H__
-
-#include <memory>
-
-#include "model/operation/Index.h"
-#include "Node.h"
-
-#include <unordered_map>
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-class Set
-{
-public:
-  Set() : _index_count(0) {}
-
-public:
-  Index append(std::unique_ptr<Node> &&node);
-  void remove(const Index &index) { _nodes.erase(index); };
-
-public:
-  const Node &at(const Index &) const;
-  Node &at(const Index &);
-  bool exist(const Index &) const;
-  uint32_t size() const { return _nodes.size(); }
-  void iterate(const std::function<void(const Index &, const Node &)> &fn) const;
-  void iterate(const std::function<void(const Index &, Node &)> &fn);
-
-private:
-  const Index generateIndex();
-
-private:
-  std::unordered_map<Index, std::unique_ptr<Node>> _nodes;
-  uint32_t _index_count;
-};
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERATION_SET_H__
diff --git a/runtimes/neurun/src/model/operation/SoftmaxNode.cc b/runtimes/neurun/src/model/operation/SoftmaxNode.cc
deleted file mode 100644
index d157aa4a7..000000000
--- a/runtimes/neurun/src/model/operation/SoftmaxNode.cc
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "SoftmaxNode.h"
-
-#include <cassert>
-
-#include "NodeVisitor.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-void SoftmaxNode::accept(NodeVisitor &&v) const { v.visit(*this); }
-
-SoftmaxNode::SoftmaxNode(const model::operation::Node::InitParam &init_param)
-    : model::operation::Node{OperandConstraint::createExact(1u)}
-{
-  assert(init_param.input_count == 2 && init_param.output_count == 1);
-
-  // Each input should be interpreted as follows:
-  //
-  //  0 -> A 2-D or 4-D tensor, specifying the tensor to be reshaped.
-  //  1 ->  FLOAT32 value, specifying the positive scaling factor for the exponent, beta.
-
-  setInputs({init_param.inputs[0]});
-  setOutputs({init_param.outputs[0]});
-
-  _param.scale_index = operand::Index{init_param.inputs[1]};
-}
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
diff --git a/runtimes/neurun/src/model/operation/SoftmaxNode.h b/runtimes/neurun/src/model/operation/SoftmaxNode.h
deleted file mode 100644
index 4a5a72e5a..000000000
--- a/runtimes/neurun/src/model/operation/SoftmaxNode.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_MODEL_OPERATION_SOFTMAX_NODE_H__
-#define __NEURUN_MODEL_OPERATION_SOFTMAX_NODE_H__
-
-#include <memory>
-
-#include "model/operation/Node.h"
-
-namespace neurun
-{
-namespace model
-{
-namespace operation
-{
-
-class SoftmaxNode : public model::operation::Node
-{
-public:
-  SoftmaxNode(const model::operation::Node::InitParam &init_param);
-  enum Input
-  {
-    INPUT = 0
-  };
-
-  struct Param
-  {
-    operand::Index scale_index;
-  };
-
-public:
-  virtual void accept(NodeVisitor &&) const override;
-  virtual std::string getName() const override { return "SoftMax"; }
-
-public:
-  const Param &param() const { return _param; }
-
-private:
-  Param _param;
-};
-
-} // namespace operation
-} // namespace model
-} // namespace neurun
-
-#endif // __NEURUN_MODEL_OPERATION_SOFTMAX_NODE_H__
diff --git a/runtimes/neurun/src/util/Padding.cc b/runtimes/neurun/src/util/Padding.cc
deleted file mode 100644
index a24c9ddf7..000000000
--- a/runtimes/neurun/src/util/Padding.cc
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "util/Padding.h"
-
-#include <algorithm>
-
-namespace neurun
-{
-namespace util
-{
-
-Padding valid_padding(void)
-{
-  //
-  // ANEURALNETWORKS_PADDING_VALID
-  //
-  // VALID padding. No padding.
-  //
-  // When the input size is not evenly divisible by the filter size,
-  // the input at the end that could not fill the whole filter tile
-  // will simply be ignored.
-  //
-  Padding padding;
-
-  padding.top = 0;
-  padding.bottom = 0;
-  padding.left = 0;
-  padding.right = 0;
-
-  return padding;
-}
-
-Padding same_padding(const nnfw::misc::feature::Shape &ifm_shape,
-                     const nnfw::misc::feature::Shape &ofm_shape, const Stride &stride, uint32_t kw,
-                     uint32_t kh)
-{
-  Padding padding;
-
-  // ANEURALNETWORKS_PADDING_SAME (from NNAPI spec)
-  //
-  // SAME padding. Padding on both ends are the "same":
-  //
-  //	padding_to_beginning = total_padding / 2
-  //  padding_to_end = (total_padding + 1)/2.
-  //
-  const int32_t vertical_needed_input = (ofm_shape.H - 1) * stride.vertical + kh;
-  const int32_t vertical_total_padding = std::max(0, vertical_needed_input - ifm_shape.H);
-
-  const int32_t horizontal_needed_input = (ofm_shape.W - 1) * stride.horizontal + kw;
-  const int32_t horizontal_total_padding = std::max(0, horizontal_needed_input - ifm_shape.W);
-
-  padding.top = vertical_total_padding / 2;
-  padding.bottom = (vertical_total_padding + 1) / 2;
-  padding.left = horizontal_total_padding / 2;
-  padding.right = (horizontal_total_padding + 1) / 2;
-
-  return padding;
-}
-
-} // namespace util
-} // namespace neurun
diff --git a/runtimes/neurun/src/util/Padding.h b/runtimes/neurun/src/util/Padding.h
deleted file mode 100644
index 05a14eb31..000000000
--- a/runtimes/neurun/src/util/Padding.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_UTIL_PADDING_H__
-#define __NEURUN_UTIL_PADDING_H__
-
-#include <stdint.h>
-
-#include <misc/feature/Shape.h>
-
-namespace neurun
-{
-namespace util
-{
-
-struct Padding
-{
-  uint32_t top;
-  uint32_t bottom;
-  uint32_t left;
-  uint32_t right;
-};
-
-struct Stride
-{
-  uint32_t vertical;
-  uint32_t horizontal;
-};
-
-Padding valid_padding(void);
-Padding same_padding(const nnfw::misc::feature::Shape &ifm_shape,
-                     const nnfw::misc::feature::Shape &ofm_shape, const Stride &stride, uint32_t kw,
-                     uint32_t kh);
-
-} // namespace util
-} // namespace neurun
-
-#endif // __NEURUN_UTIL_PADDING_H__
diff --git a/runtimes/neurun/src/util/Utils.cc b/runtimes/neurun/src/util/Utils.cc
deleted file mode 100644
index def02db69..000000000
--- a/runtimes/neurun/src/util/Utils.cc
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "Utils.h"
-
-#include <cassert>
-
-namespace neurun
-{
-namespace util
-{
-
-const char *to_string(const PaddingCode &code)
-{
-  assert((ANEURALNETWORKS_PADDING_SAME == code) || (ANEURALNETWORKS_PADDING_VALID == code));
-
-  switch (code)
-  {
-    case ANEURALNETWORKS_PADDING_SAME:
-      return "ANEURALNETWORKS_PADDING_SAME";
-    case ANEURALNETWORKS_PADDING_VALID:
-      return "ANEURALNETWORKS_PADDING_VALID";
-  }
-
-  return nullptr;
-}
-
-} // namespace util
-} // namespace neurun
diff --git a/runtimes/neurun/src/util/Utils.h b/runtimes/neurun/src/util/Utils.h
deleted file mode 100644
index a1e5bf0ba..000000000
--- a/runtimes/neurun/src/util/Utils.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file     Utils.h
- * @brief    This file contains utility functions
- * @ingroup  COM_AI_RUNTIME
- */
-
-#ifndef __NEURUN_UTIL_UTILS_H__
-#define __NEURUN_UTIL_UTILS_H__
-
-#include "NeuralNetworks.h"
-
-namespace neurun
-{
-namespace util
-{
-
-/**
- * @brief Converts a PaddingCode to const char*
- * @param[in] code The PaddingCode to be converted
- * @return A string holding the converted value
- */
-const char *to_string(const PaddingCode &code);
-
-} // namespace util
-} // namespace neurun
-
-#endif // __NEURUN_UTIL_UTILS_H__
diff --git a/runtimes/neurun/src/util/config/Config.lst b/runtimes/neurun/src/util/config/Config.lst
deleted file mode 100644
index e029ebe37..000000000
--- a/runtimes/neurun/src/util/config/Config.lst
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef CONFIG
-#error  Define CONFIG before including this file
-#endif
-
-//     Name                    | Type         | Default
-CONFIG(GRAPH_DOT_DUMP          , int          , "0")
-CONFIG(BACKENDS                , std::string  , "cpu;acl_cl")
-CONFIG(OP_BACKEND_ALLOPS       , std::string  , "none")
-CONFIG(DISABLE_COMPILE         , bool         , "0")
-
-
-// Auto-generate all operations
-
-#define OP(InternalName, IsNnApi, NnApiName) \
-    CONFIG(OP_BACKEND_ ## NnApiName, std::string, "acl_cl")
-#include "model/operation/Op.lst"
-#undef OP
-
diff --git a/runtimes/neurun/src/util/config/ConfigManager.cc b/runtimes/neurun/src/util/config/ConfigManager.cc
deleted file mode 100644
index 46b80311c..000000000
--- a/runtimes/neurun/src/util/config/ConfigManager.cc
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ConfigManager.h"
-
-#include <cstdlib>
-
-namespace neurun
-{
-namespace config
-{
-
-ConfigManager &ConfigManager::instance()
-{
-  static ConfigManager manager;
-  return manager;
-}
-
-ConfigManager::ConfigManager()
-{
-  auto fetch_from_env_var = [&](const std::string &key) {
-    const char *value = std::getenv(key.c_str());
-    if (value != nullptr)
-    {
-      _map[key] = value;
-    }
-  };
-
-#define CONFIG(Name, Type, Default)                        \
-  _map.insert({std::string{#Name}, std::string{Default}}); \
-  fetch_from_env_var(#Name);
-
-#include "Config.lst"
-
-#undef CONFIG
-}
-
-template <> bool ConfigManager::get<bool>(const std::string &key) const
-{
-  auto raw = _map.at(key);
-
-  static const std::array<std::string, 5> false_list{"0", "OFF", "FALSE", "N", "NO"};
-  auto false_found = std::find(false_list.begin(), false_list.end(), raw);
-
-  return (false_found == false_list.end());
-}
-
-template <> int ConfigManager::get<int>(const std::string &key) const
-{
-  auto raw = _map.at(key);
-  return std::stoi(raw);
-}
-
-template <> std::string ConfigManager::get<std::string>(const std::string &key) const
-{
-  auto raw = _map.at(key);
-  return raw;
-}
-
-} // namespace config
-} // namespace neurun
diff --git a/runtimes/neurun/src/util/config/ConfigManager.h b/runtimes/neurun/src/util/config/ConfigManager.h
deleted file mode 100644
index 78db03dc1..000000000
--- a/runtimes/neurun/src/util/config/ConfigManager.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_CONFIG_CONFIG_MANAGER_H__
-#define __NEURUN_CONFIG_CONFIG_MANAGER_H__
-
-#include <algorithm>
-#include <string>
-#include <unordered_map>
-
-/**
- * @file ConfigManager.h
- * @brief This file contains neurun::config::ConfigManager class
- */
-
-namespace neurun
-{
-namespace config
-{
-
-/**
- * @brief Class that manages configurations
- */
-
-class ConfigManager
-{
-public:
-  static ConfigManager &instance();
-
-private:
-  /**
-   * @brief Construct a new ConfigManager object. Fetch variables from Environment Variables.
-   */
-  ConfigManager();
-
-public:
-  /**
-   * @brief Return the configuration value of given key
-   *
-   * @tparam T Type of the config
-   * @param key String key value
-   *
-   * @return The configuration value of given key value
-   */
-  template <typename T> T get(const std::string &key) const;
-
-private:
-  std::unordered_map<std::string, std::string> _map;
-};
-
-template <> bool ConfigManager::get<bool>(const std::string &key) const;
-template <> int ConfigManager::get<int>(const std::string &key) const;
-template <> std::string ConfigManager::get<std::string>(const std::string &key) const;
-
-} // namespace config
-} // namespace neurun
-
-#endif // __NEURUN_CONFIG_CONFIG_MANAGER_H__
diff --git a/runtimes/neurun/src/util/feature/Coordinate4D.h b/runtimes/neurun/src/util/feature/Coordinate4D.h
deleted file mode 100644
index 27d6f7b9e..000000000
--- a/runtimes/neurun/src/util/feature/Coordinate4D.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_UTIL_FEATURE_COORDINATE_4D_H__
-#define __NEURUN_UTIL_FEATURE_COORDINATE_4D_H__
-
-#include <stdint.h>
-
-namespace neurun
-{
-namespace util
-{
-namespace feature
-{
-
-/**
- * @brief Class to represent position(offset) of subtensor.\n
- *        Assume that parent and child are already lowered (can get Shape4D).
- */
-class Coordinate4D
-{
-public:
-  /**
-   * @brief Construct a new Coordinate4D object
-   */
-  Coordinate4D(void) : _n{0}, _h{0}, _w{0}, _c{0}
-  {
-    // DO NOTHING
-  }
-  /**
-   * @brief     Construct a new Coordinate4D object
-   * @param[in] n Batch offset
-   * @param[in] h Height offset
-   * @param[in] w Width offset
-   * @param[in] c Channel offset
-   * @return
-   */
-  Coordinate4D(int32_t n, int32_t h, int32_t w, int32_t c) : _n{n}, _h{h}, _w{w}, _c{c}
-  {
-    // DO NOTHING
-  }
-
-public:
-  /**
-   * @brief   Return batch offset
-   * @return  Batch offset
-   */
-  int32_t n(void) const { return _n; }
-  /**
-   * @brief   Return height offset
-   * @return  Height offset
-   */
-  int32_t h(void) const { return _h; }
-  /**
-   * @brief   Return width offset
-   * @return  Width offset
-   */
-  int32_t w(void) const { return _w; }
-  /**
-   * @brief   Return channel offset
-   * @return  Channel offset
-   */
-  int32_t c(void) const { return _c; }
-
-private:
-  int32_t _n;
-  int32_t _h;
-  int32_t _w;
-  int32_t _c;
-};
-
-} // namespace feature
-} // namespace util
-} // namespace neurun
-
-#endif // __NEURUN_UTIL_FEATURE_COORDINATE_4D_H__
diff --git a/runtimes/neurun/src/util/feature/nchw/View.h b/runtimes/neurun/src/util/feature/nchw/View.h
deleted file mode 100644
index 048fdecd8..000000000
--- a/runtimes/neurun/src/util/feature/nchw/View.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_UTIL_FEATURE_NCHW_VIEW_H__
-#define __NEURUN_UTIL_FEATURE_NCHW_VIEW_H__
-
-#include "misc/feature/Reader.h"
-#include "misc/feature/Shape.h"
-
-#include "backend/interface/operand/ITensor.h"
-#include "util/feature/Coordinate4D.h"
-
-#include <cassert>
-
-namespace neurun
-{
-namespace util
-{
-namespace feature
-{
-namespace nchw
-{
-
-template <typename T> class View final : public nnfw::misc::feature::Reader<T>
-{
-public:
-  View(::neurun::backend::operand::ITensor *tensor) : _tensor{tensor}
-  {
-    // TODO Validate whether tensor is a feature map, or not
-    _shape.N = tensor->dimension(3);
-    _shape.C = tensor->dimension(2);
-    _shape.H = tensor->dimension(1);
-    _shape.W = tensor->dimension(0);
-  }
-
-public:
-  const ::nnfw::misc::feature::Shape &shape(void) const { return _shape; }
-
-public:
-  T at(uint32_t ch, uint32_t row, uint32_t col) const override
-  {
-    const auto offset = feature_index_to_byte_offset(0, ch, row, col);
-
-    T *ptr = reinterpret_cast<T *>(_tensor->buffer() + offset);
-
-    return *ptr;
-  }
-  T at(uint32_t batch, uint32_t ch, uint32_t row, uint32_t col) const override
-  {
-    const auto offset = feature_index_to_byte_offset(batch, ch, row, col);
-
-    T *ptr = reinterpret_cast<T *>(_tensor->buffer() + offset);
-
-    return *ptr;
-  }
-
-public:
-  T &at(uint32_t ch, uint32_t row, uint32_t col)
-  {
-    const auto offset = feature_index_to_byte_offset(0, ch, row, col);
-
-    T *ptr = reinterpret_cast<T *>(_tensor->buffer() + offset);
-
-    return *ptr;
-  }
-  T &at(uint32_t batch, uint32_t ch, uint32_t row, uint32_t col)
-  {
-    const auto offset = feature_index_to_byte_offset(batch, ch, row, col);
-
-    T *ptr = reinterpret_cast<T *>(_tensor->buffer() + offset);
-
-    return *ptr;
-  }
-
-private:
-  size_t feature_index_to_byte_offset(uint32_t batch, uint32_t ch, uint32_t row, uint32_t col) const
-  {
-    return _tensor->calcOffset(
-        neurun::util::feature::Coordinate4D{static_cast<int32_t>(batch), static_cast<int32_t>(row),
-                                            static_cast<int32_t>(col), static_cast<int32_t>(ch)});
-  }
-
-private:
-  ::nnfw::misc::feature::Shape _shape;
-  ::neurun::backend::operand::ITensor *_tensor;
-};
-
-} // namespace nchw
-} // namespace feature
-} // namespace util
-} // namespace neurun
-
-#endif // __NEURUN_UTIL_FEATURE_NCHW_VIEW_H__
diff --git a/runtimes/neurun/src/util/feature/nhwc/Reader.h b/runtimes/neurun/src/util/feature/nhwc/Reader.h
deleted file mode 100644
index 85b8cab74..000000000
--- a/runtimes/neurun/src/util/feature/nhwc/Reader.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_UTIL_FEATURE_NHWC_READER_H__
-#define __NEURUN_UTIL_FEATURE_NHWC_READER_H__
-
-#include "Utils.h"
-
-#include "misc/feature/Reader.h"
-
-namespace neurun
-{
-namespace util
-{
-namespace feature
-{
-namespace nhwc
-{
-
-template <typename T> class Reader final : public nnfw::misc::feature::Reader<T>
-{
-public:
-  Reader(const ::nnfw::misc::feature::Shape &shape, const T *ptr, size_t len)
-      : _shape{shape}, _ptr{ptr}
-  {
-    (void)len; // Workaround for unused variable in release mode
-    assert(shape.N * shape.C * shape.H * shape.W * sizeof(T) == len);
-  }
-
-public:
-  const nnfw::misc::feature::Shape &shape(void) const { return _shape; }
-
-public:
-  T at(uint32_t ch, uint32_t row, uint32_t col) const override
-  {
-    uint32_t index = index_of(_shape, ch, row, col);
-
-    return _ptr[index];
-  }
-  T at(uint32_t batch, uint32_t ch, uint32_t row, uint32_t col) const override
-  {
-    uint32_t index = index_of(_shape, batch, ch, row, col);
-
-    return _ptr[index];
-  }
-
-private:
-  nnfw::misc::feature::Shape _shape;
-
-private:
-  const T *_ptr;
-};
-
-} // namespace nhwc
-} // namespace feature
-} // namespace util
-} // namespace neurun
-
-#endif // __NEURUN_UTIL_FEATURE_NHWC_READER_H__
diff --git a/runtimes/neurun/src/util/feature/nhwc/View.h b/runtimes/neurun/src/util/feature/nhwc/View.h
deleted file mode 100644
index 1b9be9e1d..000000000
--- a/runtimes/neurun/src/util/feature/nhwc/View.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_UTIL_FEATURE_NHWC_VIEW_H__
-#define __NEURUN_UTIL_FEATURE_NHWC_VIEW_H__
-
-#include <cassert>
-
-#include "Utils.h"
-
-#include "misc/feature/Reader.h"
-
-namespace neurun
-{
-namespace util
-{
-namespace feature
-{
-namespace nhwc
-{
-
-template <typename T> class View final : public nnfw::misc::feature::Reader<T>
-{
-public:
-  View(const ::nnfw::misc::feature::Shape &shape, T *ptr, size_t len) : _shape{shape}, _ptr{ptr}
-  {
-    (void)len; // Workaround for unused variable in release mode
-    assert(shape.N * shape.C * shape.H * shape.W * sizeof(T) == len);
-  }
-
-public:
-  const nnfw::misc::feature::Shape &shape(void) const { return _shape; }
-
-public:
-  T at(uint32_t ch, uint32_t row, uint32_t col) const override
-  {
-    uint32_t index = index_of(_shape, ch, row, col);
-
-    return _ptr[index];
-  }
-
-  T at(uint32_t batch, uint32_t ch, uint32_t row, uint32_t col) const override
-  {
-    uint32_t index = index_of(_shape, batch, ch, row, col);
-
-    return _ptr[index];
-  }
-
-  T &at(uint32_t ch, uint32_t row, uint32_t col)
-  {
-    uint32_t index = index_of(_shape, ch, row, col);
-
-    return _ptr[index];
-  }
-
-  T &at(uint32_t batch, uint32_t ch, uint32_t row, uint32_t col)
-  {
-    uint32_t index = index_of(_shape, batch, ch, row, col);
-
-    return _ptr[index];
-  }
-
-private:
-  nnfw::misc::feature::Shape _shape;
-
-private:
-  T *_ptr;
-};
-
-} // namespace nhwc
-} // namespace feature
-} // namespace util
-} // namespace neurun
-
-#endif // __NEURUN_UTIL_FEATURE_NHWC_VIEW_H__
diff --git a/runtimes/neurun/src/util/logging.h b/runtimes/neurun/src/util/logging.h
deleted file mode 100644
index 62d563967..000000000
--- a/runtimes/neurun/src/util/logging.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __NEURUN_UTIL_LOGGING_H__
-#define __NEURUN_UTIL_LOGGING_H__
-
-#include <iostream>
-
-namespace neurun
-{
-namespace util
-{
-namespace logging
-{
-
-class Context
-{
-public:
-  Context() : _enabled{false}
-  {
-    auto env = std::getenv("NEURUN_LOG_ENABLE");
-
-    if (env && std::atoi(env) > 0)
-    {
-      _enabled = true;
-    }
-  }
-
-public:
-  bool enabled(void) const { return _enabled; }
-
-private:
-  bool _enabled;
-};
-
-static Context ctx;
-
-} // namespace logging
-} // namespace util
-} // namespace neurun
-
-#define VERBOSE(name)                         \
-  if (::neurun::util::logging::ctx.enabled()) \
-  std::cout << "[" << #name << "] "
-
-#endif // __NEURUN_UTIL_LOGGING_H__
diff --git a/runtimes/neurun/test/CMakeLists.txt b/runtimes/neurun/test/CMakeLists.txt
new file mode 100644
index 000000000..f21caabc3
--- /dev/null
+++ b/runtimes/neurun/test/CMakeLists.txt
@@ -0,0 +1,15 @@
+set(TEST_NEURUN test_neurun)
+
+file(GLOB_RECURSE TESTS "*.cc")
+
+add_executable(${TEST_NEURUN} ${TESTS})
+
+target_include_directories(${TEST_NEURUN} PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/../core/src)
+
+target_link_libraries(${TEST_NEURUN} neurun_core)
+target_link_libraries(${TEST_NEURUN} gtest)
+target_link_libraries(${TEST_NEURUN} gtest_main)
+target_link_libraries(${TEST_NEURUN} ${LIB_PTHREAD})
+add_test(${TEST_NEURUN} ${TEST_NEURUN})
+
+install(TARGETS ${TEST_NEURUN} DESTINATION unittest)
diff --git a/runtimes/neurun/test/backend/cpu/MemoryPlanner.cc b/runtimes/neurun/test/backend/cpu/MemoryPlanner.cc
deleted file mode 100644
index 04f2e5da4..000000000
--- a/runtimes/neurun/test/backend/cpu/MemoryPlanner.cc
+++ /dev/null
@@ -1,127 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <gtest/gtest.h>
-
-#include "backend/cpu/MemoryPlanner.h"
-#include "model/operand/Index.h"
-
-TEST(Allocator, allocate_test)
-{
-  ::neurun::backend::cpu::Allocator allocator(1024);
-  ASSERT_NE(allocator.base(), nullptr);
-}
-
-TEST(BumpPlanner, claim_test)
-{
-  ::neurun::backend::cpu::BumpPlanner planner;
-
-  auto claim = [&planner](uint32_t index, size_t size, uint32_t expected_offset) {
-    ::neurun::model::operand::Index mem_idx(index);
-    planner.claim(mem_idx, size);
-    auto mem_blk = planner.memory_plans()[mem_idx];
-    ASSERT_EQ(mem_blk.offset, expected_offset);
-    ASSERT_EQ(mem_blk.size, size);
-  };
-
-  claim(0, 10, 0);
-  claim(1, 20, 10);
-  claim(2, 30, 30);
-}
-
-TEST(FirstFitPlanner, claim_release_test)
-{
-  ::neurun::backend::cpu::FirstFitPlanner planner;
-
-  auto claim = [&planner](uint32_t index, size_t size, uint32_t expected_offset) {
-    ::neurun::model::operand::Index mem_idx(index);
-    planner.claim(mem_idx, size);
-    auto mem_blk = planner.memory_plans()[mem_idx];
-    ASSERT_EQ(mem_blk.offset, expected_offset);
-    ASSERT_EQ(mem_blk.size, size);
-  };
-
-  auto release = [&planner](uint32_t index) {
-    ::neurun::model::operand::Index mem_idx(index);
-    planner.release(mem_idx);
-  };
-
-  // 0 CLAIM - 10
-  claim(0, 10, 0);
-
-  // 1 CLAIM - 20
-  claim(1, 20, 10);
-
-  // 2 CLAIM - 30
-  claim(2, 30, 30);
-
-  // 0 RELEASE - 10
-  release(0);
-
-  // 3 CLAIM - 20
-  claim(3, 20, 60);
-
-  // 4 CLAIM - 5
-  claim(4, 5, 0);
-
-  // 5 CLAIM - 10
-  claim(5, 10, 80);
-
-  // 6 CLAIM - 5
-  claim(6, 5, 5);
-
-  // 2 RELEASE - 30
-  release(2);
-
-  // 7 CLAIM - 35
-  claim(7, 35, 90);
-
-  // 8 CLAIM - 10
-  claim(8, 10, 30);
-
-  // 4 RELEASE - 5
-  release(4);
-
-  // 9 CLAIM - 10
-  claim(9, 10, 40);
-
-  // 10 CLAIM - 10
-  claim(10, 10, 50);
-
-  // 6 RELEASE
-  release(6);
-
-  // 1 RELEASE
-  release(1);
-
-  // 8 RELEASE
-  release(8);
-
-  // 9 RELEASE
-  release(9);
-
-  // 10 RELEASE
-  release(10);
-
-  // 3 RELEASE
-  release(3);
-
-  // 5 RELEASE
-  release(5);
-
-  // 7 RELEASE
-  release(7);
-}
diff --git a/runtimes/neurun/test/core/backend/ExecTime.test.cc b/runtimes/neurun/test/core/backend/ExecTime.test.cc
new file mode 100644
index 000000000..0409c0752
--- /dev/null
+++ b/runtimes/neurun/test/core/backend/ExecTime.test.cc
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "backend/ExecTime.h"
+#include "backend/IConfig.h"
+#include "backend/Backend.h"
+#include <gtest/gtest.h>
+#include <string>
+
+namespace
+{
+using namespace neurun;
+using namespace backend;
+
+struct MockConfig : public IConfig
+{
+  std::string id() override { return "b1"; }
+  void initialize() override{};
+  bool SupportSubTensorAlloc() override { return false; }
+};
+
+struct MockBackend : public ::neurun::backend::Backend
+{
+  std::shared_ptr<neurun::backend::IConfig> config() const override
+  {
+    return std::make_shared<MockConfig>();
+  }
+  std::unique_ptr<BackendContext>
+  newContext(const model::Operands &,
+             const std::shared_ptr<backend::custom::KernelRegistry> &) const override
+  {
+    return nullptr;
+  }
+};
+
+TEST(ExecTime, roundtrip_ok)
+{
+  const auto *b = new MockBackend();
+  std::vector<const Backend *> bs = {b};
+  {
+    ExecTime et(bs);
+    et.updateOperationExecTime(b, "op1", true, 100, 100);
+    et.updateOperationExecTime(b, "op1", true, 200, 200);
+    et.updateOperationExecTime(b, "op1", false, 100, 888);
+    et.uploadOperationsExecTime();
+  }
+  {
+    ExecTime et(bs);
+    auto time = et.getOperationExecTime(b, "op1", true, 100);
+    ASSERT_EQ(time, 100);
+    // Check interpolation
+    time = et.getOperationExecTime(b, "op1", true, 150);
+    ASSERT_EQ(time, 150);
+    time = et.getOperationExecTime(b, "op1", false, 100);
+    ASSERT_EQ(time, 888);
+    et.uploadOperationsExecTime();
+  }
+  // clean up
+  EXPECT_EQ(remove("exec_time.json"), 0);
+}
+
+TEST(ExecTime, structure)
+{
+
+  const auto *b = new MockBackend();
+  std::vector<const Backend *> bs = {b};
+  {
+    ExecTime et(bs);
+    et.updateOperationExecTime(b, "op1", true, 100, 100);
+    et.updateOperationExecTime(b, "op1", true, 200, 200);
+    et.uploadOperationsExecTime();
+  }
+  {
+    ExecTime et(bs);
+    auto time = et.getOperationExecTime(b, "op1", true, 100);
+    ASSERT_EQ(time, 100);
+    // Check interpolation
+    time = et.getOperationExecTime(b, "op1", true, 200);
+    ASSERT_EQ(time, 200);
+    et.uploadOperationsExecTime();
+  }
+  // clean up
+  EXPECT_EQ(remove("exec_time.json"), 0);
+}
+} // unnamed namespace
diff --git a/runtimes/neurun/test/core/compiler/Scheduler.cc b/runtimes/neurun/test/core/compiler/Scheduler.cc
new file mode 100644
index 000000000..8c5424a9d
--- /dev/null
+++ b/runtimes/neurun/test/core/compiler/Scheduler.cc
@@ -0,0 +1,554 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <compiler/HEScheduler.h>
+#include <backend/ExecTime.h>
+#include <backend/IShapeFixer.h>
+
+#include <model/Model.h>
+#include <model/Shape.h>
+#include <model/InternalType.h>
+#include <model/TypeInfo.h>
+#include <model/DataType.h>
+
+#include <model/operation/AddNode.h>
+#include <model/operation/SubNode.h>
+#include <model/operation/MulNode.h>
+#include <model/operation/FullyConnectedNode.h>
+
+#include <gtest/gtest.h>
+
+namespace
+{
+using namespace neurun;
+using namespace model;
+using namespace backend;
+using namespace operation;
+
+//
+// Mock backends classes
+//
+
+// Backend could be created without ShapeFixer.
+// But it is used by scheduler to detect which operations are supported by backend.
+struct MockShapeFixer : IShapeFixer
+{
+  void visit(const model::operation::AddNode &) override{};
+  void visit(const model::operation::SubNode &) override{};
+  void visit(const model::operation::MulNode &) override{};
+  void visit(const model::operation::FullyConnectedNode &) override{};
+  std::shared_ptr<ITensorBuilder> tensor_builder() override { return nullptr; };
+};
+
+struct MockConfigCPU : public IConfig
+{
+  std::string id() override { return "cpu"; }
+  void initialize() override{};
+  bool SupportSubTensorAlloc() override { return false; }
+};
+
+struct MockBackendCPU : public Backend
+{
+  std::shared_ptr<IConfig> config() const override { return std::make_shared<MockConfigCPU>(); }
+  std::unique_ptr<BackendContext>
+  newContext(const Operands &,
+             const std::shared_ptr<backend::custom::KernelRegistry> &) const override
+  {
+    return std::unique_ptr<BackendContext>(
+        new BackendContext{this, nullptr, nullptr, nullptr, std::make_shared<MockShapeFixer>()});
+  }
+};
+
+struct MockConfigGPU : public IConfig
+{
+  std::string id() override { return "gpu"; }
+  void initialize() override{};
+  bool SupportSubTensorAlloc() override { return false; }
+};
+
+struct MockBackendGPU : public Backend
+{
+  std::shared_ptr<IConfig> config() const override { return std::make_shared<MockConfigGPU>(); }
+  std::unique_ptr<BackendContext>
+  newContext(const Operands &,
+             const std::shared_ptr<backend::custom::KernelRegistry> &) const override
+  {
+    return std::unique_ptr<BackendContext>(
+        new BackendContext{this, nullptr, nullptr, nullptr, std::make_shared<MockShapeFixer>()});
+  }
+};
+
+struct MockConfigNPU : public IConfig
+{
+  std::string id() override { return "npu"; }
+  void initialize() override{};
+  bool SupportSubTensorAlloc() override { return false; }
+};
+
+struct MockBackendNPU : public Backend
+{
+  std::shared_ptr<IConfig> config() const override { return std::make_shared<MockConfigNPU>(); }
+  std::unique_ptr<BackendContext>
+  newContext(const Operands &,
+             const std::shared_ptr<backend::custom::KernelRegistry> &) const override
+  {
+    return std::unique_ptr<BackendContext>(
+        new BackendContext{this, nullptr, nullptr, nullptr, std::make_shared<MockShapeFixer>()});
+  }
+};
+
+//
+// Constants
+//
+
+const int OPERAND_ELEMS = 268203;
+const int OPERAND_SIZE = OPERAND_ELEMS * 4;
+const int OPERATION_SIZE = OPERAND_SIZE * 3;
+
+const std::string LINEAR("Linear");
+const std::string DATAFLOW("Dataflow");
+const std::string PARALLEL("Parallel");
+
+//
+// Helper functions
+//
+
+// Set executor through environment variable
+void setExecutor(const std::string &executor) { setenv("EXECUTOR", executor.c_str(), true); }
+
+// Set profiling mode through environment variable
+void setProfilingMode(const bool value) { setenv("PROFILING_MODE", value ? "1" : "0", true); }
+
+// Calculate operation size by addition sizes of all input and output operands
+uint32_t calcOpSize(const std::shared_ptr<graph::Graph> &graph, const OperationIndex &op_idx)
+{
+  uint32_t size = 0;
+  for (const auto &input : graph->operations().at(op_idx).getInputs())
+    size += graph->operands().at(input).info().total_size();
+  for (const auto &output : graph->operations().at(op_idx).getOutputs())
+    size += graph->operands().at(output).info().total_size();
+  return size;
+}
+
+// Set execution operation time. This method is needed since ExecutionTime has only
+// 'updateOperationExecTime' method.
+void setOperationExecTime(ExecTime &et, const Backend *backend, const std::string &operation,
+                          bool quant, uint32_t op_size, int64_t time)
+{
+  // You shouldn't set negative time with this method since nnfw JSON deserializer can't read it
+  assert(time > 0);
+  int64_t prev_time = et.getOperationExecTime(backend, operation, quant, op_size);
+  int64_t time_to_set = prev_time == ExecTime::NOT_FOUND ? time : 2 * time - prev_time;
+  et.updateOperationExecTime(backend, operation, quant, op_size, time_to_set);
+  assert(et.getOperationExecTime(backend, operation, quant, op_size) == time);
+}
+
+// Set same execution time for all given backends/operations
+void setOperationsExecutionTime(const std::vector<const Backend *> &backends,
+                                const std::vector<std::string> &op_names,
+                                const std::vector<uint32_t> &op_sizes, int64_t exec_time)
+{
+  assert(op_names.size() == op_sizes.size());
+  ExecTime et(backends);
+  for (int i = 0; i < op_names.size(); ++i)
+  {
+    for (auto &backend : backends)
+      setOperationExecTime(et, backend, op_names[i], false, op_sizes[i], exec_time);
+  }
+  et.uploadOperationsExecTime();
+}
+
+// Set permute time from one backend to another. This method is needed since ExecutionTime has only
+// 'updatePermuteTime' method.
+void setPermutationTime(ExecTime &et, const Backend *from_backend, const Backend *to_backend,
+                        bool quant, uint32_t op_size, int64_t time)
+{
+  // You shouldn't set negative time with this method since nnfw JSON deserializer can't read it
+  assert(time > 0);
+  int64_t prev_time = et.getPermuteTime(from_backend, to_backend, quant, op_size);
+  int64_t time_to_set = prev_time == ExecTime::NOT_FOUND ? time : 2 * time - prev_time;
+  et.updatePermuteTime(from_backend, to_backend, quant, op_size, time_to_set);
+  assert(et.getPermuteTime(from_backend, to_backend, quant, op_size) == time);
+}
+
+// Set same permutation time between all given backends
+void setPermutationsExecutionTime(const std::vector<const Backend *> &backends,
+                                  const int operand_size, const int64_t exec_time)
+{
+  ExecTime et(backends);
+  for (const auto &backend : backends)
+  {
+    for (auto &other_backend : backends)
+    {
+      if (backend == other_backend)
+        continue;
+      setPermutationTime(et, backend, other_backend, false, operand_size, exec_time);
+    }
+  }
+  et.uploadOperationsExecTime();
+}
+
+//
+// Functions for creating graphs
+//
+
+using OIS = OperandIndexSequence;
+
+template <typename NodeT, typename... Types>
+model::OperationIndex createNode(std::shared_ptr<graph::Graph> graph, Types &&... args)
+{
+  typename NodeT::Param op_params{Activation::NONE};
+  auto op = nnfw::cpp14::make_unique<NodeT>(std::forward<Types>(args)..., op_params);
+  auto op_idx = graph->addOperation(std::move(op));
+  // For now in scheduler test all operations in tested graphs has same size (for simplicity)
+  assert(calcOpSize(graph, op_idx) == OPERATION_SIZE);
+  return op_idx;
+}
+
+// Create straight graph: Add->Sub->Mul
+std::shared_ptr<graph::Graph> createStraightGraph()
+{
+  auto graph = std::make_shared<graph::Graph>(nnfw::cpp14::make_unique<Model>());
+  const TypeInfo float_op(DataType::FLOAT32);
+
+  // Create add node
+  auto add_lhs_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  auto add_rhs_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  auto add_out_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  createNode<AddNode>(graph, OIS{add_lhs_idx, add_rhs_idx}, OIS{add_out_idx});
+
+  // Create sub node
+  auto sub_const_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  auto sub_out_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  createNode<SubNode>(graph, OIS{add_out_idx, sub_const_idx}, OIS{sub_out_idx});
+
+  // Create mul node
+  auto mul_const_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  auto mul_out_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  createNode<MulNode>(graph, OIS{sub_out_idx, mul_const_idx}, OIS{mul_out_idx});
+
+  graph->finishBuilding();
+  return graph;
+}
+
+/* Create branched graph:
+ *       [Add]
+ *      //   \\
+ *   [Mul1]  [FC2]
+ *     ||     ||
+ *   [Mul2]  [FC2]
+ *      \\   //
+ *       [Sub]
+ */
+std::shared_ptr<graph::Graph> createBranchedGraph()
+{
+  auto graph = std::make_shared<graph::Graph>(nnfw::cpp14::make_unique<Model>());
+  const TypeInfo float_op(DataType::FLOAT32);
+
+  // Create add node
+  auto add_lhs_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  auto add_rhs_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  auto add_out_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  createNode<AddNode>(graph, OIS{add_lhs_idx, add_rhs_idx}, OIS{add_out_idx});
+
+  // Create mul1 node
+  auto mul1_const_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  auto mul1_out_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  createNode<MulNode>(graph, OIS{add_out_idx, mul1_const_idx}, OIS{mul1_out_idx});
+
+  // Create mul2 node
+  auto mul2_const_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  auto mul2_out_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  createNode<MulNode>(graph, OIS{mul1_out_idx, mul2_const_idx}, OIS{mul2_out_idx});
+
+  // Create fc1 node
+  auto fc1_const_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  auto fc1_out_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  createNode<FullyConnectedNode>(graph, OIS{add_out_idx, fc1_const_idx}, OIS{fc1_out_idx});
+
+  // Create fc2 node
+  auto fc2_const_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  auto fc2_out_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  createNode<FullyConnectedNode>(graph, OIS{fc1_out_idx, fc2_const_idx}, OIS{fc2_out_idx});
+
+  // Create add2 node
+  auto sub_out_idx = graph->addOperand(Shape{OPERAND_ELEMS}, float_op);
+  createNode<SubNode>(graph, OIS{mul2_out_idx, fc2_out_idx}, OIS{sub_out_idx});
+
+  graph->finishBuilding();
+  return graph;
+}
+
+//
+// Tests setup/teardown
+//
+
+// SetUp/TearDown methods runs before/after each test and performs actions common for each test
+class SchedulerTest : public ::testing::Test
+{
+protected:
+  void SetUp() override
+  {
+    // Initialize mock backends
+    _cpu_backend = new MockBackendCPU();
+    _gpu_backend = new MockBackendGPU();
+    _npu_backend = new MockBackendNPU();
+    _mock_backends = {_cpu_backend, _gpu_backend, _npu_backend};
+
+    // Remove previous profile data if it exists
+    if (!remove("exec_time.json"))
+    {
+      // DO NOTHING (no profile data)
+    }
+
+    // Remember original value of 'EXECUTOR' environment variable
+    char *executor = std::getenv("EXECUTOR");
+    _original_executor = executor == nullptr ? "" : executor;
+
+    // Remember original value of 'PROFILING_MODE' environment variable
+    char *profiling_mode = std::getenv("PROFILING_MODE");
+    _original_profiling_mode = profiling_mode == nullptr ? "" : profiling_mode;
+  }
+
+  void TearDown() override
+  {
+    delete _cpu_backend;
+    delete _gpu_backend;
+    delete _npu_backend;
+    EXPECT_EQ(remove("exec_time.json"), 0);
+    setenv("EXECUTOR", _original_executor.c_str(), true);
+    setenv("PROFILING_MODE", _original_profiling_mode.c_str(), true);
+  }
+
+  const MockBackendCPU *_cpu_backend{nullptr};
+  const MockBackendGPU *_gpu_backend{nullptr};
+  const MockBackendNPU *_npu_backend{nullptr};
+  std::vector<const Backend *> _mock_backends;
+
+  std::string _original_executor;
+  std::string _original_profiling_mode;
+};
+
+class SchedulerTestWithExecutorParam : public SchedulerTest,
+                                       public testing::WithParamInterface<std::string>
+{
+};
+
+//
+// HEScheduler tests
+//
+
+// Test scheduler behavior for straight graph with known execution time of all nodes and permutes.
+TEST_P(SchedulerTestWithExecutorParam, straight_graph_known_exec_time)
+{
+  setExecutor(GetParam());
+
+  // Prepare graph
+  auto graph(createStraightGraph());
+  OperationIndex add_op_idx(0), sub_op_idx(1), mul_op_idx(2);
+
+  // Set default execution and transfer time
+  setPermutationsExecutionTime(_mock_backends, OPERAND_SIZE, 1);
+  setOperationsExecutionTime(_mock_backends, {"Add", "Sub", "Mul"},
+                             {OPERATION_SIZE, OPERATION_SIZE, OPERATION_SIZE}, 1e4);
+
+  // Test 1
+  // Expected behaviour: scheduler assigns different backend to each node
+  {
+    // For each backend reduce execution time of one node
+    ExecTime et(_mock_backends);
+    setOperationExecTime(et, _cpu_backend, "Add", false, OPERATION_SIZE, 1);
+    setOperationExecTime(et, _gpu_backend, "Sub", false, OPERATION_SIZE, 1);
+    setOperationExecTime(et, _npu_backend, "Mul", false, OPERATION_SIZE, 1);
+    et.uploadOperationsExecTime();
+
+    // Test scheduler
+    auto scheduler = compiler::HEScheduler(graph->operands(), _mock_backends, nullptr);
+    const auto br = scheduler.schedule(*graph);
+    ASSERT_EQ(br->getBackend(add_op_idx)->config()->id(), "cpu");
+    ASSERT_EQ(br->getBackend(sub_op_idx)->config()->id(), "gpu");
+    ASSERT_EQ(br->getBackend(mul_op_idx)->config()->id(), "npu");
+  }
+
+  // Test 2
+  // Expected behaviour: scheduler assigns single backend to all nodes because of big transfer time
+  {
+    // Increase transfer time
+    setPermutationsExecutionTime(_mock_backends, OPERAND_SIZE, 1e5);
+
+    // Test scheduler
+    auto scheduler = compiler::HEScheduler(graph->operands(), _mock_backends, nullptr);
+    const auto br = scheduler.schedule(*graph);
+    ASSERT_EQ(br->getBackend(add_op_idx)->config()->id(), "cpu");
+    ASSERT_EQ(br->getBackend(sub_op_idx)->config()->id(), "cpu");
+    ASSERT_EQ(br->getBackend(mul_op_idx)->config()->id(), "cpu");
+  }
+}
+
+// Test scheduler behavior for branched graph with known execution time of all nodes and permutes
+TEST_P(SchedulerTestWithExecutorParam, branched_graph_known_exec_time)
+{
+  const int64_t NPU_ET = 5000;
+  setExecutor(GetParam());
+
+  // Prepare graph
+  auto graph(createBranchedGraph());
+  OperationIndex add_op_idx(0), mul1_op_idx(1), mul2_op_idx(2), fc1_op_idx(3), fc2_op_idx(4),
+      sub_op_idx(5);
+
+  // Set default execution and transfer time
+  setPermutationsExecutionTime(_mock_backends, OPERAND_SIZE, 1000);
+  setOperationsExecutionTime(_mock_backends, {"Add", "Sub", "Mul", "FullyConnected"},
+                             {OPERATION_SIZE, OPERATION_SIZE, OPERATION_SIZE, OPERATION_SIZE}, 1e4);
+
+  // Test 1
+  // Expected behaviour: for dataflow and linear executors scheduler assigns fastest backend to all
+  // nodes, in case of parallel executor scheduler assigns different backends to branches.
+  {
+    // Reduce execution time
+    ExecTime et(_mock_backends);
+    setOperationExecTime(et, _npu_backend, "Add", false, OPERATION_SIZE, NPU_ET);
+    setOperationExecTime(et, _npu_backend, "Mul", false, OPERATION_SIZE, NPU_ET);
+    setOperationExecTime(et, _npu_backend, "Sub", false, OPERATION_SIZE, NPU_ET);
+    setOperationExecTime(et, _npu_backend, "FullyConnected", false, OPERATION_SIZE, NPU_ET);
+    setOperationExecTime(et, _gpu_backend, "Mul", false, OPERATION_SIZE, NPU_ET + 1000);
+    setOperationExecTime(et, _gpu_backend, "FullyConnected", false, OPERATION_SIZE, NPU_ET + 1000);
+    et.uploadOperationsExecTime();
+
+    // Test scheduler
+    auto scheduler = compiler::HEScheduler(graph->operands(), _mock_backends, nullptr);
+    const auto br = scheduler.schedule(*graph);
+
+    std::string branch1_expected_backend("npu"), branch2_expected_backend("npu");
+    if (GetParam() == PARALLEL)
+    {
+      branch1_expected_backend =
+          br->getBackend(mul1_op_idx)->config()->id() == "npu" ? "npu" : "gpu";
+      branch2_expected_backend = branch1_expected_backend == "npu" ? "gpu" : "npu";
+    }
+
+    ASSERT_EQ(br->getBackend(add_op_idx)->config()->id(), "npu");
+    ASSERT_EQ(br->getBackend(mul1_op_idx)->config()->id(), branch1_expected_backend);
+    ASSERT_EQ(br->getBackend(mul2_op_idx)->config()->id(), branch1_expected_backend);
+    ASSERT_EQ(br->getBackend(fc1_op_idx)->config()->id(), branch2_expected_backend);
+    ASSERT_EQ(br->getBackend(fc2_op_idx)->config()->id(), branch2_expected_backend);
+    ASSERT_EQ(br->getBackend(sub_op_idx)->config()->id(), "npu");
+  }
+
+  // Test 2
+  // Expected behaviour: scheduler assigns single backend to all nodes
+  {
+    // Increase execution time for GPU backend
+    ExecTime et(_mock_backends);
+    /* for parallel executor: set a time, that is larger than branches_cnt*npu_exec_time
+        so that npu is prefered: the i+1 level node of the first branch will wait for npu
+        until it finishes the i-th nodes of all other branches in BFS order*/
+    setOperationExecTime(et, _gpu_backend, "Mul", false, OPERATION_SIZE, NPU_ET * 2 + 1);
+    /* for parallel executor: set ET of FC larger than Mul's to be determinant:
+        if they are equal and scheduling is done in order mul1->FC1->FC2->mul2,
+        then for mul2 gpu is selected since NPU_ET*3 > GPU_ET(which is NPU_ET * 2 + 1)*/
+    setOperationExecTime(et, _gpu_backend, "FullyConnected", false, OPERATION_SIZE, NPU_ET * 2 + 2);
+    et.uploadOperationsExecTime();
+
+    // Test scheduler
+    auto scheduler = compiler::HEScheduler(graph->operands(), _mock_backends, nullptr);
+    const auto br = scheduler.schedule(*graph);
+    ASSERT_EQ(br->getBackend(add_op_idx)->config()->id(), "npu");
+    ASSERT_EQ(br->getBackend(mul1_op_idx)->config()->id(), "npu");
+    ASSERT_EQ(br->getBackend(mul2_op_idx)->config()->id(), "npu");
+    ASSERT_EQ(br->getBackend(fc1_op_idx)->config()->id(), "npu");
+    ASSERT_EQ(br->getBackend(fc2_op_idx)->config()->id(), "npu");
+    ASSERT_EQ(br->getBackend(sub_op_idx)->config()->id(), "npu");
+  }
+}
+
+// SchedulerTestWithExecutorParam tests are parameterized with executor name and runs three times -
+// one time for each executor
+INSTANTIATE_TEST_CASE_P(AllExecutors, SchedulerTestWithExecutorParam,
+                        testing::Values(LINEAR, DATAFLOW, PARALLEL));
+
+// Test scheduler behavior for branched graph and enabled profiling mode
+TEST_F(SchedulerTest, branched_graph_profiling_mode)
+{
+  const int ET = 1e5;
+
+  // Turn on profiling mode
+  setProfilingMode(true);
+  setExecutor(DATAFLOW);
+
+  // Prepare graph
+  auto graph(createBranchedGraph());
+  OperationIndex add_op_idx(0), mul1_op_idx(1), mul2_op_idx(2), fc1_op_idx(3), fc2_op_idx(4),
+      sub_op_idx(5);
+
+  // Test 1
+  // Expected behaviour: scheduler assigns backends to nodes with unknown execution time
+  {
+    // Set execution time for all backends/nodes except for cpu/Sub, npu/Mul, gpu/FC
+    ExecTime et(_mock_backends);
+    setOperationExecTime(et, _cpu_backend, "Add", false, OPERATION_SIZE, ET);
+    setOperationExecTime(et, _cpu_backend, "Mul", false, OPERATION_SIZE, ET + 1);
+    setOperationExecTime(et, _cpu_backend, "FullyConnected", false, OPERATION_SIZE, ET);
+    setOperationExecTime(et, _npu_backend, "Add", false, OPERATION_SIZE, ET);
+    setOperationExecTime(et, _npu_backend, "FullyConnected", false, OPERATION_SIZE, ET);
+    setOperationExecTime(et, _npu_backend, "Sub", false, OPERATION_SIZE, ET);
+    setOperationExecTime(et, _gpu_backend, "Add", false, OPERATION_SIZE, ET);
+    setOperationExecTime(et, _gpu_backend, "Mul", false, OPERATION_SIZE, ET + 1);
+    setOperationExecTime(et, _gpu_backend, "Sub", false, OPERATION_SIZE, ET);
+    et.uploadOperationsExecTime();
+
+    // Test scheduler
+    auto scheduler = compiler::HEScheduler(graph->operands(), _mock_backends, nullptr);
+    const auto br = scheduler.schedule(*graph);
+    ASSERT_EQ(br->getBackend(mul1_op_idx)->config()->id(), "npu");
+    ASSERT_EQ(br->getBackend(mul2_op_idx)->config()->id(), "npu");
+    ASSERT_EQ(br->getBackend(fc1_op_idx)->config()->id(), "gpu");
+    ASSERT_EQ(br->getBackend(fc2_op_idx)->config()->id(), "gpu");
+    ASSERT_EQ(br->getBackend(sub_op_idx)->config()->id(), "cpu");
+  }
+
+  // Test 2
+  // Expected behaviour: scheduler shuffling backends, so different backends are assigned to
+  // neighbor nodes
+  {
+    // Set execution time for rest backends/nodes (cpu/Sub, npu/Mul, gpu/FC)
+    ExecTime et(_mock_backends);
+    setOperationExecTime(et, _cpu_backend, "Sub", false, OPERATION_SIZE, ET);
+    setOperationExecTime(et, _npu_backend, "Mul", false, OPERATION_SIZE, ET + 1);
+    setOperationExecTime(et, _gpu_backend, "FullyConnected", false, OPERATION_SIZE, ET);
+    et.uploadOperationsExecTime();
+
+    // Test scheduler
+    auto scheduler = compiler::HEScheduler(graph->operands(), _mock_backends, nullptr);
+    const auto br = scheduler.schedule(*graph);
+    ASSERT_NE(br->getBackend(add_op_idx)->config()->id(),
+              br->getBackend(mul1_op_idx)->config()->id());
+    ASSERT_NE(br->getBackend(add_op_idx)->config()->id(),
+              br->getBackend(fc1_op_idx)->config()->id());
+    ASSERT_NE(br->getBackend(mul1_op_idx)->config()->id(),
+              br->getBackend(mul2_op_idx)->config()->id());
+    ASSERT_NE(br->getBackend(fc1_op_idx)->config()->id(),
+              br->getBackend(fc2_op_idx)->config()->id());
+    ASSERT_NE(br->getBackend(mul2_op_idx)->config()->id(),
+              br->getBackend(sub_op_idx)->config()->id());
+    ASSERT_NE(br->getBackend(fc2_op_idx)->config()->id(),
+              br->getBackend(sub_op_idx)->config()->id());
+  }
+}
+
+// TODO: Add tests with unknown execution and permutation time
+
+} // unnamed namespace
diff --git a/runtimes/neurun/test/core/exec/ExecInstance.cc b/runtimes/neurun/test/core/exec/ExecInstance.cc
new file mode 100644
index 000000000..2e962a4b2
--- /dev/null
+++ b/runtimes/neurun/test/core/exec/ExecInstance.cc
@@ -0,0 +1,312 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <gtest/gtest.h>
+#include <thread>
+
+#include "graph/Graph.h"
+#include "model/Model.h"
+#include "compiler/Compiler.h"
+#include "exec/Execution.h"
+#include "model/operation/AddNode.h"
+
+namespace
+{
+
+using namespace neurun::model;
+using DataType = neurun::model::DataType;
+using Model = neurun::model::Model;
+
+class CompiledMockUpModel
+{
+public:
+  CompiledMockUpModel()
+  {
+    // Model: two elementwise add operation
+    // model input: lhs, rhs1
+    // model output: second add result (result2)
+    // constant: rhs2
+    // result1 <= (lhs + rhs)
+    // result2 <= (result1 + rhs2)
+    // lhs, rhs1, rh2, result1, result2 shape: {1, 2, 2, 1}
+    // activation: none (constant)
+    std::unique_ptr<neurun::model::Model> model = nnfw::cpp14::make_unique<neurun::model::Model>();
+    // 1st add operands (result1 <= lhs + rhs1)
+    Shape shape{1, 2, 2, 1};
+    TypeInfo type{DataType::FLOAT32};
+    static float rhs2_data[4] = {3, 1, -1, 5};
+    auto operand_lhs = model->operands.emplace(shape, type);
+    auto operand_rhs1 = model->operands.emplace(shape, type);
+    auto operand_result1 = model->operands.emplace(shape, type);
+    auto operand_rhs2 = model->operands.emplace(shape, type);
+    auto operand_result2 = model->operands.emplace(shape, type);
+    model->operands.at(operand_rhs2)
+        .data(nnfw::cpp14::make_unique<CachedData>(reinterpret_cast<const uint8_t *>(&rhs2_data),
+                                                   16));
+    // 2nd add operations (result2 <= result1 + rhs2)
+    operation::AddNode::Param param1;
+    param1.activation = neurun::model::Activation::NONE;
+    auto input_set1 = OperandIndexSequence{operand_lhs, operand_rhs1};
+    auto output_set1 = OperandIndexSequence{operand_result1};
+    model->operations.push(
+        nnfw::cpp14::make_unique<operation::AddNode>(input_set1, output_set1, param1));
+    operation::AddNode::Param param2;
+    param2.activation = neurun::model::Activation::NONE;
+    auto input_set2 = OperandIndexSequence{operand_result1, operand_rhs2};
+    auto output_set2 = OperandIndexSequence{operand_result2};
+    model->operations.push(
+        nnfw::cpp14::make_unique<operation::AddNode>(input_set2, output_set2, param2));
+    // Identify model inputs and outputs
+    model->inputs.append(operand_lhs);
+    model->inputs.append(operand_rhs1);
+    model->outputs.append(operand_result2);
+    graph = std::make_shared<::neurun::graph::Graph>(std::move(model));
+    graph->finishBuilding();
+
+    // Compile
+    auto compiler = new neurun::compiler::Compiler{graph};
+    compiler->compile();
+    compiler->release(executor);
+    delete compiler;
+  }
+
+public:
+  std::shared_ptr<::neurun::graph::Graph> graph;
+  std::shared_ptr<neurun::exec::IExecutor> executor;
+};
+
+TEST(ExecInstance, simple)
+{
+  auto mockup = CompiledMockUpModel();
+  auto graph = mockup.graph;
+  auto executor = mockup.executor;
+
+  auto input1 = IOIndex{0};
+  auto input2 = IOIndex{1};
+  auto output = IOIndex{0};
+
+  const float input1_buffer[4] = {1, 0, -1, -2};
+  const float input2_buffer[4] = {1, -3, 2, -4};
+  float output_buffer[4] = {};
+  const float output_expected[4] = {5, -2, 0, -1};
+
+  auto execution = new neurun::exec::Execution(executor);
+
+  execution->setInput(input1, reinterpret_cast<const void *>(input1_buffer), 16);
+  execution->setInput(input2, reinterpret_cast<const void *>(input2_buffer), 16);
+  execution->setOutput(output, reinterpret_cast<void *>(output_buffer), 16);
+  execution->execute();
+
+  for (auto i = 0; i < 4; i++)
+  {
+    EXPECT_EQ(output_buffer[i], output_expected[i]);
+  }
+
+  delete execution;
+}
+
+TEST(ExecInstance, twoCompile)
+{
+  auto mockup = CompiledMockUpModel();
+  auto graph = mockup.graph;
+  auto executor1 = mockup.executor;
+  auto execution1 = new neurun::exec::Execution(executor1);
+
+  auto input1 = IOIndex{0};
+  auto input2 = IOIndex{1};
+  auto output = IOIndex{0};
+
+  const float exe1_input1_buffer[4] = {1, 0, -1, -2};
+  const float exe1_input2_buffer[4] = {1, -3, 2, -4};
+  float exe1_output_buffer[4] = {};
+  const float exe1_output_expected[4] = {5, -2, 0, -1};
+
+  execution1->setInput(input1, reinterpret_cast<const void *>(exe1_input1_buffer), 16);
+  execution1->setInput(input2, reinterpret_cast<const void *>(exe1_input2_buffer), 16);
+  execution1->setOutput(output, reinterpret_cast<void *>(exe1_output_buffer), 16);
+
+  // Make new executor: compile again
+  auto compiler = new neurun::compiler::Compiler{graph};
+  compiler->compile();
+  std::shared_ptr<neurun::exec::IExecutor> executor2;
+  compiler->release(executor2);
+  auto execution2 = new neurun::exec::Execution(executor2);
+
+  const float exe2_input1_buffer[4] = {2, 1, -2, 0};
+  const float exe2_input2_buffer[4] = {-3, 3, 1, 2};
+  float exe2_output_buffer[4] = {};
+  const float exe2_output_expected[4] = {2, 5, -2, 7};
+
+  execution2->setInput(input1, reinterpret_cast<const void *>(exe2_input1_buffer), 16);
+  execution2->setInput(input2, reinterpret_cast<const void *>(exe2_input2_buffer), 16);
+  execution2->setOutput(output, reinterpret_cast<void *>(exe2_output_buffer), 16);
+
+  execution1->execute();
+  execution2->execute();
+
+  for (auto i = 0; i < 4; i++)
+  {
+    EXPECT_EQ(exe1_output_buffer[i], exe1_output_expected[i]);
+    EXPECT_EQ(exe2_output_buffer[i], exe2_output_expected[i]);
+  }
+
+  delete compiler;
+  delete execution1;
+  delete execution2;
+}
+
+// Support two initialized execution instance then ordered execution
+TEST(ExecInstance, twoExecution)
+{
+  auto mockup = CompiledMockUpModel();
+  auto executor = mockup.executor;
+  auto input1 = IOIndex{0};
+  auto input2 = IOIndex{1};
+  auto output1 = IOIndex{0};
+
+  const float exe1_input1_buffer[4] = {1, 0, -1, -2};
+  const float exe1_input2_buffer[4] = {1, -3, 2, -4};
+  float exe1_output_buffer[4] = {};
+  const float exe1_output_expected[4] = {5, -2, 0, -1};
+  const float exe2_output_expected[4] = {2, 5, -2, 7};
+
+  auto execution1 = new neurun::exec::Execution(executor);
+  execution1->setInput(input1, reinterpret_cast<const void *>(exe1_input1_buffer), 16);
+  execution1->setInput(input2, reinterpret_cast<const void *>(exe1_input2_buffer), 16);
+  execution1->setOutput(output1, reinterpret_cast<void *>(exe1_output_buffer), 16);
+
+  const float exe2_input1_buffer[4] = {2, 1, -2, 0};
+  const float exe2_input2_buffer[4] = {-3, 3, 1, 2};
+  float exe2_output_buffer[4] = {};
+
+  // Make new execution
+  auto execution2 = new neurun::exec::Execution(executor);
+  execution2->setInput(input1, reinterpret_cast<const void *>(exe2_input1_buffer), 16);
+  execution2->setInput(input2, reinterpret_cast<const void *>(exe2_input2_buffer), 16);
+  execution2->setOutput(output1, reinterpret_cast<void *>(exe2_output_buffer), 16);
+
+  execution1->execute();
+  execution2->execute();
+
+  for (auto i = 0; i < 4; i++)
+  {
+    EXPECT_EQ(exe1_output_buffer[i], exe1_output_expected[i]);
+    EXPECT_EQ(exe2_output_buffer[i], exe2_output_expected[i]);
+  }
+
+  delete execution1;
+  delete execution2;
+}
+
+class Inference
+{
+public:
+  Inference(const float (&input1)[4], const float (&input2)[4], float (&output)[4],
+            std::shared_ptr<neurun::exec::IExecutor> &executor)
+      : _input1{input1}, _input2{input2}, _output{output}, _executor{executor}
+  {
+    // DO NOTHING
+  }
+
+  void inference(void)
+  {
+    auto input1 = IOIndex{0};
+    auto input2 = IOIndex{1};
+    auto output1 = IOIndex{0};
+
+    auto execution = new neurun::exec::Execution(_executor);
+    execution->setInput(input1, reinterpret_cast<const void *>(_input1), 16);
+    execution->setInput(input2, reinterpret_cast<const void *>(_input2), 16);
+    execution->setOutput(output1, reinterpret_cast<void *>(_output), 16);
+
+    execution->execute();
+
+    delete execution;
+  }
+
+private:
+  const float (&_input1)[4];
+  const float (&_input2)[4];
+  float (&_output)[4];
+  std::shared_ptr<neurun::exec::IExecutor> &_executor;
+};
+
+// Support multi-thread execution
+TEST(ExecInstance, twoThreads)
+{
+  auto mockup = CompiledMockUpModel();
+  auto executor = mockup.executor;
+
+  const float exe1_input1_buffer[4] = {1, 0, -1, -2};
+  const float exe1_input2_buffer[4] = {1, -3, 2, -4};
+  float exe1_output_buffer[4] = {};
+  const float exe1_output_expected[4] = {5, -2, 0, -1};
+
+  Inference execution1{exe1_input1_buffer, exe1_input2_buffer, exe1_output_buffer, executor};
+
+  const float exe2_input1_buffer[4] = {2, 1, -2, 0};
+  const float exe2_input2_buffer[4] = {-3, 3, 1, 2};
+  float exe2_output_buffer[4] = {};
+  const float exe2_output_expected[4] = {2, 5, -2, 7};
+
+  Inference execution2{exe2_input1_buffer, exe2_input2_buffer, exe2_output_buffer, executor};
+
+  std::thread t1{&Inference::inference, &execution1};
+  std::thread t2{&Inference::inference, &execution2};
+
+  t1.join();
+  t2.join();
+
+  for (auto i = 0; i < 4; i++)
+  {
+    EXPECT_EQ(exe1_output_buffer[i], exe1_output_expected[i]);
+    EXPECT_EQ(exe2_output_buffer[i], exe2_output_expected[i]);
+  }
+}
+
+// Support asynchronous execution
+TEST(ExecInstance, async)
+{
+  auto mockup = CompiledMockUpModel();
+  auto graph = mockup.graph;
+  auto executor = mockup.executor;
+
+  auto input1 = IOIndex{0};
+  auto input2 = IOIndex{1};
+  auto output = IOIndex{0};
+
+  const float input1_buffer[4] = {1, 0, -1, -2};
+  const float input2_buffer[4] = {1, -3, 2, -4};
+  float output_buffer[4] = {};
+  const float output_expected[4] = {5, -2, 0, -1};
+
+  auto execution = new neurun::exec::Execution(executor);
+
+  execution->setInput(input1, reinterpret_cast<const void *>(input1_buffer), 16);
+  execution->setInput(input2, reinterpret_cast<const void *>(input2_buffer), 16);
+  execution->setOutput(output, reinterpret_cast<void *>(output_buffer), 16);
+  execution->startExecute();
+  execution->waitFinish();
+
+  for (auto i = 0; i < 4; i++)
+  {
+    EXPECT_EQ(output_buffer[i], output_expected[i]);
+  }
+
+  delete execution;
+}
+
+} // namespace
diff --git a/runtimes/neurun/test/core/exec/interp/ExecManager.cc b/runtimes/neurun/test/core/exec/interp/ExecManager.cc
new file mode 100644
index 000000000..501f2b827
--- /dev/null
+++ b/runtimes/neurun/test/core/exec/interp/ExecManager.cc
@@ -0,0 +1,338 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <gtest/gtest.h>
+
+#include <cpp14/memory.h>
+
+#include "graph/Graph.h"
+#include "exec/interp/ExecManager.h"
+#include "exec/Execution.h"
+#include "model/Model.h"
+#include "model/operation/AddNode.h"
+
+namespace
+{
+
+using namespace neurun::model;
+using DataType = neurun::model::DataType;
+using ExecManager = neurun::exec::interp::ExecManager;
+using Execution = neurun::exec::Execution;
+using Model = neurun::model::Model;
+
+class InterpExecManagerTest : public ::testing::Test
+{
+protected:
+  virtual void SetUp() {}
+  void CreateSimpleModel()
+  {
+    // Model: one elementwise add operation
+    // model input: lhs, rhs
+    // model output: add result
+    // lhs, rhs, result shape: {1, 2, 2, 1}
+    // activation: none (constant)
+    std::unique_ptr<neurun::model::Model> model = nnfw::cpp14::make_unique<neurun::model::Model>();
+
+    // Add operands
+
+    Shape shape{1, 2, 2, 1};
+    TypeInfo type{DataType::INT32};
+    Shape shape_scalar(0);
+    TypeInfo type_scalar{DataType::INT32};
+
+    auto operand_lhs = model->operands.emplace(shape, type);
+    auto operand_rhs = model->operands.emplace(shape, type);
+    auto operand_result = model->operands.emplace(shape, type);
+
+    // Add operations
+
+    operation::AddNode::Param param;
+    param.activation = neurun::model::Activation::NONE;
+    auto input_set = OperandIndexSequence{operand_lhs, operand_rhs};
+    auto output_set = OperandIndexSequence{operand_result};
+    model->operations.push(
+        nnfw::cpp14::make_unique<operation::AddNode>(input_set, output_set, param));
+
+    // Identify model inputs and outputs
+
+    model->inputs.append(operand_lhs);
+    model->inputs.append(operand_rhs);
+    model->outputs.append(operand_result);
+
+    _graph = nnfw::cpp14::make_unique<::neurun::graph::Graph>(std::move(model));
+    _graph->finishBuilding();
+
+    _executor = nnfw::cpp14::make_unique<ExecManager>(_graph->shareModel());
+  }
+
+  void CreateTwoStepModel()
+  {
+    // Model: two elementwise add operation
+    // model input: lhs, rhs1
+    // model output: second add result (result2)
+    // constant: rhs2
+    // result1 <= (lhs + rhs)
+    // result2 <= (result1 + rhs2)
+    // lhs, rhs1, rh2, result1, result2 shape: {1, 2, 2, 1}
+    // activation: none (constant)
+    std::unique_ptr<neurun::model::Model> model = nnfw::cpp14::make_unique<neurun::model::Model>();
+
+    // 1st add operands (result1 <= lhs + rhs1)
+
+    Shape shape{1, 2, 2, 1};
+    TypeInfo type{DataType::INT32};
+    Shape shape_scalar(0);
+    TypeInfo type_scalar{DataType::INT32};
+
+    static int32_t rhs2_data[4] = {3, 1, -1, 5};
+
+    auto operand_lhs = model->operands.emplace(shape, type);
+    auto operand_rhs1 = model->operands.emplace(shape, type);
+    auto operand_result1 = model->operands.emplace(shape, type);
+    auto operand_rhs2 = model->operands.emplace(shape, type);
+    auto operand_result2 = model->operands.emplace(shape, type);
+    model->operands.at(operand_rhs2)
+        .data(nnfw::cpp14::make_unique<CachedData>(reinterpret_cast<const uint8_t *>(&rhs2_data),
+                                                   16));
+
+    // 2nd add operations (result2 <= result1 + rhs2)
+
+    operation::AddNode::Param param1;
+    param1.activation = neurun::model::Activation::NONE;
+    auto input_set1 = OperandIndexSequence{operand_lhs, operand_rhs1};
+    auto output_set1 = OperandIndexSequence{operand_result1};
+    model->operations.push(
+        nnfw::cpp14::make_unique<operation::AddNode>(input_set1, output_set1, param1));
+
+    operation::AddNode::Param param2;
+    param2.activation = neurun::model::Activation::NONE;
+    auto input_set2 = OperandIndexSequence{operand_result1, operand_rhs2};
+    auto output_set2 = OperandIndexSequence{operand_result2};
+    model->operations.push(
+        nnfw::cpp14::make_unique<operation::AddNode>(input_set2, output_set2, param2));
+
+    // Identify model inputs and outputs
+
+    model->inputs.append(operand_lhs);
+    model->inputs.append(operand_rhs1);
+    model->outputs.append(operand_result2);
+
+    _graph = nnfw::cpp14::make_unique<::neurun::graph::Graph>(std::move(model));
+    _graph->finishBuilding();
+
+    _executor = nnfw::cpp14::make_unique<ExecManager>(_graph->shareModel());
+  }
+
+  void CreateUnspecifiedDimensionsModel()
+  {
+    // Model: one elementwise add operation
+    // model input: lhs, rhs
+    // model output: add result
+    // lhs, rhs, result shape: {1, unknown, 2, 1}
+    // activation: none (constant)
+    std::unique_ptr<neurun::model::Model> model = nnfw::cpp14::make_unique<neurun::model::Model>();
+
+    // Add operands
+
+    Shape shape{1, 0, 2, 1};
+    TypeInfo type{DataType::INT32};
+    Shape shape_scalar(0);
+    TypeInfo type_scalar{DataType::INT32};
+
+    auto operand_lhs = model->operands.emplace(shape, type);
+    auto operand_rhs = model->operands.emplace(shape, type);
+
+    auto operand_activation = model->operands.emplace(shape_scalar, type_scalar);
+    model->operands.at(operand_activation)
+        .data(nnfw::cpp14::make_unique<CachedData>(
+            reinterpret_cast<const uint8_t *>(&_activation_value), 4));
+
+    auto operand_result = model->operands.emplace(shape, type);
+
+    // Add operations
+
+    operation::AddNode::Param param;
+    param.activation = neurun::model::Activation::NONE;
+    auto input_set = OperandIndexSequence{operand_lhs, operand_rhs};
+    auto output_set = OperandIndexSequence{operand_result};
+
+    // Identify model inputs and outputs
+
+    model->inputs.append(operand_lhs);
+    model->inputs.append(operand_rhs);
+    model->outputs.append(operand_result);
+
+    _graph = nnfw::cpp14::make_unique<::neurun::graph::Graph>(std::move(model));
+    _graph->finishBuilding();
+
+    _executor = nnfw::cpp14::make_unique<ExecManager>(_graph->shareModel());
+  }
+
+  void createExecution() { _execution = nnfw::cpp14::make_unique<Execution>(_executor); }
+
+  virtual void TearDown() { _executor = nullptr; }
+
+  std::unique_ptr<::neurun::graph::Graph> _graph{nullptr};
+  std::shared_ptr<ExecManager> _executor{nullptr};
+  std::unique_ptr<Execution> _execution{nullptr};
+  const int32_t _activation_value{0};
+};
+
+TEST_F(InterpExecManagerTest, create_empty)
+{
+  _executor = nnfw::cpp14::make_unique<ExecManager>(std::make_shared<Model>());
+  ASSERT_NE(_executor, nullptr);
+}
+
+TEST_F(InterpExecManagerTest, create_simple)
+{
+  CreateSimpleModel();
+  ASSERT_NE(_executor, nullptr);
+}
+
+TEST_F(InterpExecManagerTest, setInput)
+{
+  CreateSimpleModel();
+  createExecution();
+
+  auto input1 = IOIndex{0};
+  const int32_t input1_buffer[4] = {1, 0, -1, -2};
+
+  EXPECT_THROW(_execution->setInput(input1, reinterpret_cast<const void *>(input1_buffer), 4),
+               std::runtime_error);
+  EXPECT_THROW(_execution->setInput(input1, reinterpret_cast<const void *>(input1_buffer), 12),
+               std::runtime_error);
+  EXPECT_NO_THROW(_execution->setInput(input1, reinterpret_cast<const void *>(input1_buffer), 16));
+}
+
+TEST_F(InterpExecManagerTest, setOutput)
+{
+  CreateSimpleModel();
+  createExecution();
+
+  auto output = IOIndex{0};
+  auto output_idx = _graph->getOutputs().at(output);
+
+  int32_t output_buffer[4] = {};
+
+  EXPECT_THROW(_execution->setOutput(output, reinterpret_cast<void *>(output_buffer), 4),
+               std::runtime_error);
+  EXPECT_THROW(_execution->setOutput(output, reinterpret_cast<void *>(output_buffer), 12),
+               std::runtime_error);
+  EXPECT_NO_THROW(_execution->setOutput(output, reinterpret_cast<void *>(output_buffer), 16));
+}
+
+TEST_F(InterpExecManagerTest, setInputForUnspecifiedDimensions)
+{
+  CreateUnspecifiedDimensionsModel();
+  createExecution();
+
+  auto input1 = IOIndex{0};
+  const int32_t input1_buffer[4] = {1, 0, -1, -2};
+
+  TypeInfo operand_type{DataType::INT32};
+  Shape operand_shape{1, 2, 2, 1};
+
+  EXPECT_THROW(_execution->setInput(input1, operand_type, operand_shape,
+                                    reinterpret_cast<const void *>(input1_buffer), 4),
+               std::runtime_error);
+  EXPECT_THROW(_execution->setInput(input1, operand_type, operand_shape,
+                                    reinterpret_cast<const void *>(input1_buffer), 12),
+               std::runtime_error);
+  EXPECT_NO_THROW(_execution->setInput(input1, operand_type, operand_shape,
+                                       reinterpret_cast<const void *>(input1_buffer), 16));
+}
+
+TEST_F(InterpExecManagerTest, setOutputForUnspecifiedDimensions)
+{
+  CreateUnspecifiedDimensionsModel();
+  createExecution();
+
+  auto output = IOIndex{0};
+  auto output_idx = _graph->getOutputs().at(output);
+
+  TypeInfo operand_type{DataType::INT32};
+  Shape operand_shape{1, 2, 2, 1};
+
+  int32_t output_buffer[4] = {};
+
+  EXPECT_THROW(_execution->setOutput(output, operand_type, operand_shape,
+                                     reinterpret_cast<void *>(output_buffer), 4),
+               std::runtime_error);
+  EXPECT_THROW(_execution->setOutput(output, operand_type, operand_shape,
+                                     reinterpret_cast<void *>(output_buffer), 12),
+               std::runtime_error);
+  EXPECT_NO_THROW(_execution->setOutput(output, operand_type, operand_shape,
+                                        reinterpret_cast<void *>(output_buffer), 16));
+}
+
+TEST_F(InterpExecManagerTest, execute)
+{
+  CreateSimpleModel();
+  createExecution();
+
+  auto input1 = IOIndex{0};
+  auto input2 = IOIndex{1};
+  auto input1_idx = _graph->getInputs().at(input1);
+  auto input2_idx = _graph->getInputs().at(input2);
+
+  const int32_t input1_buffer[4] = {1, 0, -1, -2};
+  const int32_t input2_buffer[4] = {1, -3, 2, -4};
+
+  auto output = IOIndex{0};
+  auto output_idx = _graph->getOutputs().at(output);
+
+  int32_t output_buffer[4] = {};
+
+  EXPECT_NO_THROW(_execution->setInput(input1, reinterpret_cast<const void *>(input1_buffer), 16));
+  EXPECT_NO_THROW(_execution->setInput(input2, reinterpret_cast<const void *>(input2_buffer), 16));
+  EXPECT_NO_THROW(_execution->setOutput(output, reinterpret_cast<void *>(output_buffer), 16));
+  EXPECT_NO_THROW(_execution->execute());
+  EXPECT_EQ(output_buffer[0], 2);
+  EXPECT_EQ(output_buffer[1], -3);
+  EXPECT_EQ(output_buffer[2], 1);
+  EXPECT_EQ(output_buffer[3], -6);
+}
+
+TEST_F(InterpExecManagerTest, executeTwoStep)
+{
+  CreateTwoStepModel();
+  createExecution();
+
+  auto input1 = IOIndex{0};
+  auto input2 = IOIndex{1};
+  auto input1_idx = _graph->getInputs().at(input1);
+  auto input2_idx = _graph->getInputs().at(input2);
+
+  const int32_t input1_buffer[4] = {1, 0, -1, -2};
+  const int32_t input2_buffer[4] = {1, -3, 2, -4};
+
+  auto output = IOIndex{0};
+  auto output_idx = _graph->getOutputs().at(output);
+
+  int32_t output_buffer[4] = {};
+
+  EXPECT_NO_THROW(_execution->setInput(input1, reinterpret_cast<const void *>(input1_buffer), 16));
+  EXPECT_NO_THROW(_execution->setInput(input2, reinterpret_cast<const void *>(input2_buffer), 16));
+  EXPECT_NO_THROW(_execution->setOutput(output, reinterpret_cast<void *>(output_buffer), 16));
+  EXPECT_NO_THROW(_execution->execute());
+  EXPECT_EQ(output_buffer[0], 5);
+  EXPECT_EQ(output_buffer[1], -2);
+  EXPECT_EQ(output_buffer[2], 0);
+  EXPECT_EQ(output_buffer[3], -1);
+}
+
+} // namespace
diff --git a/runtimes/neurun/test/graph/Graph.cc b/runtimes/neurun/test/graph/Graph.cc
index e6db3fe49..ba5271668 100644
--- a/runtimes/neurun/test/graph/Graph.cc
+++ b/runtimes/neurun/test/graph/Graph.cc
@@ -16,37 +16,38 @@
 
 #include <gtest/gtest.h>
 
-#include "graph/Graph.h"
+#include "model/Model.h"
 
+// TODO Change name to Model
 TEST(Graph, inputs_and_outputs)
 {
-  ::neurun::graph::Graph graph;
+  ::neurun::model::Model model;
 
-  ::neurun::model::operand::Index index0{0u};
-  ::neurun::model::operand::Index index1{1u};
+  ::neurun::model::OperandIndex index0{0u};
+  ::neurun::model::OperandIndex index1{1u};
 
-  graph.addInput({index0});
-  graph.addInput({index1});
+  model.inputs.append({index0});
+  model.inputs.append({index1});
 
-  ::neurun::model::operand::Index index10{10u};
-  ::neurun::model::operand::Index index11{11u};
-  ::neurun::model::operand::Index index12{12u};
+  ::neurun::model::OperandIndex index10{10u};
+  ::neurun::model::OperandIndex index11{11u};
+  ::neurun::model::OperandIndex index12{12u};
 
-  graph.addOutput({index10});
-  graph.addOutput({index11});
-  graph.addOutput({index12});
+  model.outputs.append({index10});
+  model.outputs.append({index11});
+  model.outputs.append({index12});
 
-  ASSERT_EQ(graph.getInputs().size(), 2);
-  ASSERT_EQ(graph.getOutputs().size(), 3);
+  ASSERT_EQ(model.inputs.size(), 2);
+  ASSERT_EQ(model.outputs.size(), 3);
 
-  ::neurun::model::operand::IO::Index io_index0{0};
-  ::neurun::model::operand::IO::Index io_index1{1};
-  ::neurun::model::operand::IO::Index io_index2{2};
+  ::neurun::model::IOIndex io_index0{0};
+  ::neurun::model::IOIndex io_index1{1};
+  ::neurun::model::IOIndex io_index2{2};
 
-  ASSERT_EQ(graph.getInputs().at(io_index0), 0);
-  ASSERT_EQ(graph.getInputs().at(io_index1), 1);
+  ASSERT_EQ(model.inputs.at(io_index0), 0);
+  ASSERT_EQ(model.inputs.at(io_index1), 1);
 
-  ASSERT_EQ(graph.getOutputs().at(io_index0), 10);
-  ASSERT_EQ(graph.getOutputs().at(io_index1), 11);
-  ASSERT_EQ(graph.getOutputs().at(io_index2), 12);
+  ASSERT_EQ(model.outputs.at(io_index0), 10);
+  ASSERT_EQ(model.outputs.at(io_index1), 11);
+  ASSERT_EQ(model.outputs.at(io_index2), 12);
 }
diff --git a/runtimes/neurun/test/graph/Index.cc b/runtimes/neurun/test/graph/Index.cc
index c605cc4aa..c24c2dd5e 100644
--- a/runtimes/neurun/test/graph/Index.cc
+++ b/runtimes/neurun/test/graph/Index.cc
@@ -16,9 +16,9 @@
 
 #include <gtest/gtest.h>
 
-#include "graph/Index.h"
+#include "util/Index.h"
 
-using Index = ::neurun::graph::Index<uint32_t, struct TestTag>;
+using Index = ::neurun::util::Index<uint32_t, struct TestTag>;
 
 TEST(Index, index_test)
 {
diff --git a/runtimes/neurun/test/graph/MockNode.h b/runtimes/neurun/test/graph/MockNode.h
index 46a6274dd..9a5df7360 100644
--- a/runtimes/neurun/test/graph/MockNode.h
+++ b/runtimes/neurun/test/graph/MockNode.h
@@ -17,28 +17,28 @@
 #ifndef __NEURUN_TEST_GRAPH_MOCK_NODE_H__
 #define __NEURUN_TEST_GRAPH_MOCK_NODE_H__
 
-#include "model/operation/Node.h"
-#include "model/operand/IndexSet.h"
+#include "model/Operation.h"
+#include "model/OperandIndexSequence.h"
 
 namespace neurun_test
 {
 namespace graph
 {
 
-class SimpleMockNode : public neurun::model::operation::Node
+class SimpleMockNode : public neurun::model::Operation
 {
 public:
-  SimpleMockNode(const neurun::model::operand::IndexSet &inputs,
-                 const neurun::model::operand::IndexSet &outputs)
-      : neurun::model::operation::Node{neurun::model::operation::OperandConstraint::createAny()}
+  SimpleMockNode(const neurun::model::OperandIndexSequence &inputs,
+                 const neurun::model::OperandIndexSequence &outputs)
+      : neurun::model::Operation{neurun::model::operation::OperandConstraint::createAny()}
   {
     setInputs(inputs);
     setOutputs(outputs);
   }
 
 public:
-  virtual void accept(neurun::model::operation::NodeVisitor &&) const override {}
-  virtual std::string getName() const override { return "SimpleMockNode"; }
+  void accept(neurun::model::OperationVisitor &) const override {}
+  std::string getName() const override { return "SimpleMockNode"; }
 };
 
 } // namespace graph
diff --git a/runtimes/neurun/test/graph/operand/IndexSet.cc b/runtimes/neurun/test/graph/operand/IndexSet.cc
index de4768cda..73e7fd8ac 100644
--- a/runtimes/neurun/test/graph/operand/IndexSet.cc
+++ b/runtimes/neurun/test/graph/operand/IndexSet.cc
@@ -16,37 +16,37 @@
 
 #include <gtest/gtest.h>
 
-#include "model/operand/IndexSet.h"
+#include "model/OperandIndexSequence.h"
 
-using neurun::model::operand::Index;
-using neurun::model::operand::IndexSet;
+using neurun::model::OperandIndex;
+using neurun::model::OperandIndexSequence;
 
-TEST(graph_operand_IndexSet, append)
+TEST(graph_OperandIndexSequence, append)
 {
-  IndexSet iset{0, 2, 4, 8};
+  OperandIndexSequence iset{0, 2, 4, 8};
 
   ASSERT_EQ(iset.size(), 4);
 
-  iset.append(Index{10});
+  iset.append(OperandIndex{10});
 
   ASSERT_EQ(iset.size(), 5);
 
-  neurun::model::operand::IO::Index index1{1};
-  neurun::model::operand::IO::Index index2{4};
+  neurun::model::IOIndex index1{1};
+  neurun::model::IOIndex index2{4};
 
   ASSERT_EQ(iset.at(index1), 2);
   ASSERT_EQ(iset.at(index2), 10);
 
-  ASSERT_TRUE(iset.contains(Index{2}));
-  ASSERT_TRUE(iset.contains(Index{10}));
-  ASSERT_FALSE(iset.contains(Index{11}));
+  ASSERT_TRUE(iset.contains(OperandIndex{2}));
+  ASSERT_TRUE(iset.contains(OperandIndex{10}));
+  ASSERT_FALSE(iset.contains(OperandIndex{11}));
 }
 
-TEST(graph_operand_IndexSet, replace)
+TEST(graph_OperandIndexSequence, replace)
 {
-  IndexSet iset{0, 1, 2, 3};
+  OperandIndexSequence iset{0, 1, 2, 3};
 
-  iset.replace(Index{1}, Index{9});
-  ASSERT_FALSE(iset.contains(Index{1}));
-  ASSERT_TRUE(iset.contains(Index{9}));
+  iset.replace(OperandIndex{1}, OperandIndex{9});
+  ASSERT_FALSE(iset.contains(OperandIndex{1}));
+  ASSERT_TRUE(iset.contains(OperandIndex{9}));
 }
diff --git a/runtimes/neurun/test/graph/operand/LayoutSet.cc b/runtimes/neurun/test/graph/operand/LayoutSet.cc
index f83e76e30..b79fd13a3 100644
--- a/runtimes/neurun/test/graph/operand/LayoutSet.cc
+++ b/runtimes/neurun/test/graph/operand/LayoutSet.cc
@@ -16,10 +16,10 @@
 
 #include <gtest/gtest.h>
 
-#include "graph/operand/LayoutSet.h"
+#include "model/LayoutSet.h"
 
-using neurun::graph::operand::Layout;
-using neurun::graph::operand::LayoutSet;
+using neurun::model::Layout;
+using neurun::model::LayoutSet;
 
 TEST(graph_operand_LayoutSet, layout_set_operators)
 {
diff --git a/runtimes/neurun/test/graph/operand/Set.cc b/runtimes/neurun/test/graph/operand/Set.cc
index 00b6a7222..fce422398 100644
--- a/runtimes/neurun/test/graph/operand/Set.cc
+++ b/runtimes/neurun/test/graph/operand/Set.cc
@@ -16,33 +16,30 @@
 
 #include <gtest/gtest.h>
 
-#include "model/operand/Set.h"
+#include "model/Operands.h"
 
 TEST(graph_operand_Set, set_test)
 {
-  neurun::model::operand::Set set;
+  neurun::model::Operands set;
 
-  ::neurun::model::operand::Shape shape0{3};
-  shape0.dim(0) = 1;
-  shape0.dim(1) = 2;
-  shape0.dim(2) = 3;
+  ::neurun::model::Shape shape0{1, 2, 3};
 
-  ::neurun::model::operand::Shape shape1{4};
+  ::neurun::model::Shape shape1(4);
   shape1.dim(0) = 10;
   shape1.dim(1) = 20;
   shape1.dim(2) = 30;
   shape1.dim(3) = 40;
 
-  ::neurun::model::operand::TypeInfo type{ANEURALNETWORKS_TENSOR_INT32, 0, 0};
+  ::neurun::model::TypeInfo type{neurun::model::DataType::INT32};
 
-  set.append(shape0, type);
-  set.append(shape1, type);
+  set.emplace(shape0, type);
+  set.emplace(shape1, type);
 
-  ASSERT_EQ(set.exist(neurun::model::operand::Index{0u}), true);
-  ASSERT_EQ(set.exist(neurun::model::operand::Index{1u}), true);
-  ASSERT_EQ(set.exist(neurun::model::operand::Index{2u}), false);
+  ASSERT_EQ(set.exist(neurun::model::OperandIndex{0u}), true);
+  ASSERT_EQ(set.exist(neurun::model::OperandIndex{1u}), true);
+  ASSERT_EQ(set.exist(neurun::model::OperandIndex{2u}), false);
 
-  ASSERT_EQ(set.at(neurun::model::operand::Index{0u}).shape().dim(0), 1);
-  ASSERT_EQ(set.at(neurun::model::operand::Index{0u}).shape().dim(1), 2);
-  ASSERT_EQ(set.at(neurun::model::operand::Index{0u}).shape().dim(2), 3);
+  ASSERT_EQ(set.at(neurun::model::OperandIndex{0u}).shape().dim(0), 1);
+  ASSERT_EQ(set.at(neurun::model::OperandIndex{0u}).shape().dim(1), 2);
+  ASSERT_EQ(set.at(neurun::model::OperandIndex{0u}).shape().dim(2), 3);
 }
diff --git a/runtimes/neurun/test/graph/operand/UseDef.cc b/runtimes/neurun/test/graph/operand/UseDef.cc
index e3792f746..3afd6daa8 100644
--- a/runtimes/neurun/test/graph/operand/UseDef.cc
+++ b/runtimes/neurun/test/graph/operand/UseDef.cc
@@ -20,56 +20,52 @@
 #include "graph/verifier/Verifier.h"
 #include "cpp14/memory.h"
 #include "../MockNode.h"
+#include "model/Model.h"
 
 #include <typeindex>
 
 namespace
 {
 
-using IndexSet = neurun::model::operand::IndexSet;
+using IndexSet = neurun::model::OperandIndexSequence;
 using MockNode = neurun_test::graph::SimpleMockNode;
 
 } // namespace anonymous
 
 TEST(graph_operand_usedef, usedef_test)
 {
-  neurun::graph::Graph graph;
+  std::unique_ptr<neurun::model::Model> model = nnfw::cpp14::make_unique<neurun::model::Model>();
   neurun::graph::verifier::DAGChecker verifier;
 
-  neurun::model::operand::Shape shape{1u};
-  neurun::model::operand::TypeInfo type{ANEURALNETWORKS_TENSOR_INT32, 0, 0};
-  shape.dim(0) = 3;
+  neurun::model::Shape shape(3);
+  neurun::model::TypeInfo type{neurun::model::DataType::INT32};
 
   // Model Input/Output
-  auto input_operand = graph.addOperand(shape, type);
-  auto output_operand = graph.addOperand(shape, type);
+  auto input_operand = model->operands.emplace(shape, type);
+  auto output_operand = model->operands.emplace(shape, type);
 
-  graph.addInput(input_operand);
-  graph.operands().at(input_operand).setAsModelInput();
-  graph.addOutput(output_operand);
-  graph.operands().at(output_operand).setAsOperationOutput();
+  model->inputs.append(input_operand);
+  model->outputs.append(output_operand);
 
   // MockNode1
-  auto operand_index1 = graph.addOperand(shape, type);
-  graph.operands().at(operand_index1).setAsOperationOutput();
-  auto mocknode_index1 = graph.addOperation(
+  auto operand_index1 = model->operands.emplace(shape, type);
+  auto mocknode_index1 = model->operations.push(
       nnfw::cpp14::make_unique<MockNode>(IndexSet{input_operand}, IndexSet{operand_index1}));
 
   // MockNode2
-  auto operand_index2 = graph.addOperand(shape, type);
-  graph.operands().at(operand_index2).setAsOperationOutput();
-  auto mocknode_index2 = graph.addOperation(
+  auto operand_index2 = model->operands.emplace(shape, type);
+  auto mocknode_index2 = model->operations.push(
       nnfw::cpp14::make_unique<MockNode>(IndexSet{input_operand}, IndexSet{operand_index2}));
 
   // MockNode3(two input)
-  auto multiinput_index = graph.addOperation(nnfw::cpp14::make_unique<MockNode>(
+  auto multiinput_index = model->operations.push(nnfw::cpp14::make_unique<MockNode>(
       IndexSet{operand_index1, operand_index2}, IndexSet{output_operand}));
 
+  neurun::graph::Graph graph{std::move(model)};
   graph.finishBuilding();
 
   ASSERT_EQ(verifier.verify(graph), true);
 
-  const auto &operations = graph.operations();
   // Check def
   ASSERT_EQ(graph.operands().at(operand_index1).getDef().contains(mocknode_index1), true);
   ASSERT_EQ(graph.operands().at(operand_index2).getDef().contains(mocknode_index2), true);
diff --git a/runtimes/neurun/test/graph/operation/Set.cc b/runtimes/neurun/test/graph/operation/Set.cc
index 3560482ee..3c5fd8345 100644
--- a/runtimes/neurun/test/graph/operation/Set.cc
+++ b/runtimes/neurun/test/graph/operation/Set.cc
@@ -17,18 +17,18 @@
 #include <gtest/gtest.h>
 
 #include "../MockNode.h"
-#include "model/operation/Set.h"
+#include "model/Operations.h"
 
-using neurun::model::operation::Set;
-using neurun::model::operation::Node;
-using neurun::model::operation::Index;
+using neurun::model::Operations;
+using neurun::model::Operation;
+using neurun::model::OperationIndex;
 
 TEST(graph_operation_Set, operation_test)
 {
-  Set set;
-  set.append(
-      std::unique_ptr<Node>(new neurun_test::graph::SimpleMockNode({1, 2, 3, 4}, {5, 6, 7})));
-  Index idx{0u};
-  ASSERT_EQ(set.at(idx).getInputs().size(), 4);
-  ASSERT_EQ(set.at(idx).getOutputs().size(), 3);
+  Operations ops;
+  ops.push(
+      std::unique_ptr<Operation>(new neurun_test::graph::SimpleMockNode({1, 2, 3, 4}, {5, 6, 7})));
+  OperationIndex idx{0u};
+  ASSERT_EQ(ops.at(idx).getInputs().size(), 4);
+  ASSERT_EQ(ops.at(idx).getOutputs().size(), 3);
 }
diff --git a/runtimes/neurun/test/graph/operation/SetIO.cc b/runtimes/neurun/test/graph/operation/SetIO.cc
index a475bdcc9..88e111e97 100644
--- a/runtimes/neurun/test/graph/operation/SetIO.cc
+++ b/runtimes/neurun/test/graph/operation/SetIO.cc
@@ -17,72 +17,84 @@
 #include <gtest/gtest.h>
 
 #include "graph/Graph.h"
-#include "cpp14/memory.h"
+#include "model/Model.h"
+#include "model/Index.h"
+#include "model/OperandIndexSequence.h"
 #include "model/operation/Conv2DNode.h"
 #include "model/operation/ConcatNode.h"
-#include "model/operand/Index.h"
-#include "model/operand/IndexSet.h"
+
+#include <cpp14/memory.h>
 
 #include <stdexcept>
 
-using Index = neurun::model::operand::IO::Index;
-using IndexSet = neurun::model::operand::IndexSet;
-using GraphNodeInitParam = neurun::model::operation::Node::InitParam;
+using Index = neurun::model::IOIndex;
+using IndexSet = neurun::model::OperandIndexSequence;
 
 TEST(graph_operation_setIO, operation_setIO_conv)
 {
-  neurun::graph::Graph graph;
+  neurun::model::Model model;
 
-  neurun::model::operand::Shape shape{1u};
-  neurun::model::operand::TypeInfo type{ANEURALNETWORKS_TENSOR_INT32, 0, 0};
-  shape.dim(0) = 3;
+  neurun::model::Shape shape{3};
+  neurun::model::TypeInfo type{neurun::model::DataType::INT32};
 
   // Add Conv
-  std::vector<uint32_t> params;
-  for (int i = 0; i < 7; ++i)
-  {
-    params.emplace_back(graph.addOperand(shape, type).asInt());
-  }
-  uint32_t outoperand = graph.addOperand(shape, type).asInt();
-
   using GraphNode = neurun::model::operation::Conv2DNode;
 
-  auto conv =
-      nnfw::cpp14::make_unique<GraphNode>(GraphNodeInitParam{7, params.data(), 1, &outoperand});
-  ASSERT_EQ(conv->getInputs().at(Index{0}).asInt(), params[0]);
+  auto input_operand = model.operands.emplace(shape, type);
+  auto kernel_operand = model.operands.emplace(shape, type);
+  auto bias_operand = model.operands.emplace(shape, type);
+  IndexSet inputs{input_operand, kernel_operand, bias_operand};
+
+  GraphNode::Param conv_params;
+  conv_params.padding.type = neurun::model::PaddingType::SAME;
+  conv_params.stride.horizontal = 1;
+  conv_params.stride.vertical = 1;
+  conv_params.activation = neurun::model::Activation::NONE;
+
+  auto output_operand = model.operands.emplace(shape, type).value();
+  IndexSet outputs{output_operand};
+
+  auto conv = nnfw::cpp14::make_unique<GraphNode>(inputs, outputs, conv_params);
+
+  ASSERT_NE(conv, nullptr);
+  ASSERT_EQ(conv->getInputs().at(Index{0}).value(), inputs.at(0).value());
   conv->setInputs({8, 9, 10});
-  ASSERT_NE(conv->getInputs().at(Index{0}).asInt(), params[0]);
-  ASSERT_EQ(conv->getInputs().at(Index{0}).asInt(), 8);
+  ASSERT_NE(conv->getInputs().at(Index{0}).value(), inputs.at(0).value());
+  ASSERT_EQ(conv->getInputs().at(Index{0}).value(), 8);
 }
 
 TEST(graph_operation_setIO, operation_setIO_concat)
 {
-  neurun::graph::Graph graph;
+  neurun::model::Model model;
+
+  neurun::model::Shape shape{3};
+
+  neurun::model::TypeInfo type{neurun::model::DataType::INT32};
 
-  neurun::model::operand::Shape shape{1u};
-  neurun::model::operand::TypeInfo type{ANEURALNETWORKS_TENSOR_INT32, 0, 0};
-  shape.dim(0) = 3;
+  using GraphNode = neurun::model::operation::ConcatNode;
 
   // Add Concat
-  std::vector<uint32_t> params;
-  for (int i = 0; i < 7; ++i)
+  IndexSet inputs;
+  for (int i = 0; i < 6; ++i)
   {
-    params.emplace_back(graph.addOperand(shape, type).asInt());
+    inputs.append(model.operands.emplace(shape, type));
   }
-  uint32_t outoperand = graph.addOperand(shape, type).asInt();
 
-  using GraphNode = neurun::model::operation::ConcatNode;
+  GraphNode::Param concat_params{0};
+
+  auto output_operand = model.operands.emplace(shape, type).value();
+  IndexSet outputs{output_operand};
 
-  auto concat =
-      nnfw::cpp14::make_unique<GraphNode>(GraphNodeInitParam{7, params.data(), 1, &outoperand});
+  auto concat = nnfw::cpp14::make_unique<GraphNode>(inputs, outputs, concat_params);
 
+  ASSERT_NE(concat, nullptr);
   ASSERT_EQ(concat->getInputs().size(), 6);
-  ASSERT_EQ(concat->getInputs().at(Index{0}).asInt(), params[0]);
+  ASSERT_EQ(concat->getInputs().at(Index{0}).value(), inputs.at(0).value());
 
   concat->setInputs({80, 6, 9, 11});
   ASSERT_EQ(concat->getInputs().size(), 4);
-  ASSERT_NE(concat->getInputs().at(Index{0}).asInt(), params[0]);
-  ASSERT_EQ(concat->getInputs().at(Index{0}).asInt(), 80);
-  ASSERT_EQ(concat->getInputs().at(Index{2}).asInt(), 9);
+  ASSERT_NE(concat->getInputs().at(Index{0}).value(), inputs.at(0).value());
+  ASSERT_EQ(concat->getInputs().at(Index{0}).value(), 80);
+  ASSERT_EQ(concat->getInputs().at(Index{2}).value(), 9);
   ASSERT_THROW(concat->getInputs().at(Index{5}), std::out_of_range);
 }
diff --git a/runtimes/neurun/test/graph/verifier/Verifier.cc b/runtimes/neurun/test/graph/verifier/Verifier.cc
index a37b0ac1f..45e4d727b 100644
--- a/runtimes/neurun/test/graph/verifier/Verifier.cc
+++ b/runtimes/neurun/test/graph/verifier/Verifier.cc
@@ -16,36 +16,37 @@
 
 #include <gtest/gtest.h>
 
-#include "model/operation/Node.h"
+#include "model/Operation.h"
 #include "graph/Graph.h"
 #include "graph/verifier/Verifier.h"
 #include "cpp14/memory.h"
-#include "model/operand/Object.h"
+#include "model/Model.h"
+#include "model/Operand.h"
 #include "../MockNode.h"
 
-using IndexSet = neurun::model::operand::IndexSet;
+using IndexSet = neurun::model::OperandIndexSequence;
 using MockNode = neurun_test::graph::SimpleMockNode;
 
 TEST(Verifier, dag_checker)
 {
-  neurun::graph::Graph graph;
-  neurun::graph::verifier::DAGChecker verifier;
+  std::unique_ptr<neurun::model::Model> model = nnfw::cpp14::make_unique<neurun::model::Model>();
 
-  ::neurun::model::operand::Shape shape{1u};
-  ::neurun::model::operand::TypeInfo type{ANEURALNETWORKS_TENSOR_INT32, 0, 0};
-  shape.dim(0) = 3;
+  ::neurun::model::Shape shape{3};
+  ::neurun::model::TypeInfo type{neurun::model::DataType::INT32};
 
-  auto operand1 = graph.addOperand(shape, type);
-  auto operand2 = graph.addOperand(shape, type);
+  auto operand1 = model->operands.emplace(shape, type);
+  auto operand2 = model->operands.emplace(shape, type);
 
-  graph.addInput(operand1);
-  graph.operands().at(operand1).setAsModelInput();
-  graph.addOutput(operand2);
-  graph.operands().at(operand2).setAsOperationOutput();
+  model->inputs.append(operand1);
+  model->outputs.append(operand2);
 
-  graph.addOperation(nnfw::cpp14::make_unique<MockNode>(IndexSet{operand1}, IndexSet{operand2}));
+  model->operations.push(
+      nnfw::cpp14::make_unique<MockNode>(IndexSet{operand1}, IndexSet{operand2}));
 
+  neurun::graph::Graph graph{std::move(model)};
   graph.finishBuilding();
 
+  neurun::graph::verifier::DAGChecker verifier;
+
   ASSERT_EQ(verifier.verify(graph), true);
 }
diff --git a/runtimes/neurun/test/model.cc b/runtimes/neurun/test/model.cc
deleted file mode 100644
index 2ba22a204..000000000
--- a/runtimes/neurun/test/model.cc
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *      http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <gtest/gtest.h>
-
-#include "frontend/wrapper/model.h"
-
-TEST(MODEL, model_build)
-{
-  ANeuralNetworksModel model;
-  ASSERT_EQ(model.isFinished(), false);
-}
diff --git a/runtimes/neurun/test/util/ShapeInference.cc b/runtimes/neurun/test/util/ShapeInference.cc
new file mode 100644
index 000000000..a2b8cb9eb
--- /dev/null
+++ b/runtimes/neurun/test/util/ShapeInference.cc
@@ -0,0 +1,233 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <gtest/gtest.h>
+
+#include "model/Layout.h"
+#include "util/ShapeInference.h"
+
+using namespace neurun::model;
+
+TEST(ShapeInference, ElementwiseNode)
+{
+  Shape lhs_shape{1, 299, 299, 3};
+  Shape rhs_shape{3};
+  auto infered_shapes = neurun::shape_inference::inferEltwiseShape(lhs_shape, rhs_shape);
+  auto infered_out_shape = infered_shapes[0];
+
+  ASSERT_EQ(infered_out_shape.rank(), 4);
+  ASSERT_EQ(infered_out_shape.dim(0), 1);
+  ASSERT_EQ(infered_out_shape.dim(1), 299);
+  ASSERT_EQ(infered_out_shape.dim(2), 299);
+  ASSERT_EQ(infered_out_shape.dim(3), 3);
+}
+
+TEST(ShapeInference, IncorrectElementwiseNode)
+{
+  Shape lhs_shape{1, 299, 299, 3};
+  Shape rhs_shape{5, 3};
+  ASSERT_THROW(neurun::shape_inference::inferEltwiseShape(lhs_shape, rhs_shape),
+               std::runtime_error);
+}
+
+TEST(ShapeInference, Pool2DNodeSame)
+{
+  Shape in_shape{10, 6, 12, 20};
+  Stride stride{3, 7};
+  Padding padding{PaddingType::SAME};
+
+  operation::AvgPool2DNode::Param avg_pool_param{3, 6, stride, padding, Activation::NONE};
+  auto infered_shapes = neurun::shape_inference::inferAvgPoolShape(in_shape, avg_pool_param);
+  auto infered_out_shape = infered_shapes[0];
+
+  ASSERT_EQ(infered_out_shape.rank(), 4);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).N, 10);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).H, 2);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).W, 2);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).C, 20);
+
+  operation::MaxPool2DNode::Param max_pool_param{3, 6, stride, padding, Activation::NONE};
+  infered_shapes = neurun::shape_inference::inferMaxPoolShape(in_shape, max_pool_param);
+  infered_out_shape = infered_shapes[0];
+
+  ASSERT_EQ(infered_out_shape.rank(), 4);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).N, 10);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).H, 2);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).W, 2);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).C, 20);
+}
+
+TEST(ShapeInference, Pool2DNodeValid)
+{
+  Shape in_shape{10, 6, 12, 20};
+  Stride stride{3, 7};
+  Padding padding{PaddingType::VALID};
+
+  operation::AvgPool2DNode::Param avg_pool_param{3, 6, stride, padding, Activation::NONE};
+  auto infered_shapes = neurun::shape_inference::inferAvgPoolShape(in_shape, avg_pool_param);
+  auto infered_out_shape = infered_shapes[0];
+
+  ASSERT_EQ(infered_out_shape.rank(), 4);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).N, 10);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).H, 2);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).W, 1);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).C, 20);
+
+  operation::MaxPool2DNode::Param max_pool_param{3, 6, stride, padding, Activation::NONE};
+  infered_shapes = neurun::shape_inference::inferMaxPoolShape(in_shape, max_pool_param);
+  infered_out_shape = infered_shapes[0];
+
+  ASSERT_EQ(infered_out_shape.rank(), 4);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).N, 10);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).H, 2);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).W, 1);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).C, 20);
+}
+
+TEST(ShapeInference, Pool2DNodeExplicit)
+{
+  Shape in_shape{10, 3, 5, 20};
+
+  Stride stride{3, 7};
+  Padding padding{PaddingType::EXPLICIT, {4, 3, 2, 1}};
+
+  operation::AvgPool2DNode::Param avg_pool_param{3, 6, stride, padding, Activation::NONE};
+  auto infered_shapes = neurun::shape_inference::inferAvgPoolShape(in_shape, avg_pool_param);
+  auto infered_out_shape = infered_shapes[0];
+
+  ASSERT_EQ(infered_out_shape.rank(), 4);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).N, 10);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).H, 2);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).W, 1);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).C, 20);
+
+  operation::MaxPool2DNode::Param max_pool_param{3, 6, stride, padding, Activation::NONE};
+  infered_shapes = neurun::shape_inference::inferMaxPoolShape(in_shape, max_pool_param);
+  infered_out_shape = infered_shapes[0];
+
+  ASSERT_EQ(infered_out_shape.rank(), 4);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).N, 10);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).H, 2);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).W, 1);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).C, 20);
+}
+
+TEST(ShapeInference, Conv2DNode)
+{
+  Shape in_shape{10, 6, 12, 20};
+  Shape ker_shape{30, 3, 6, 20};
+
+  operation::Conv2DNode::Param param{Stride{3, 7}, Padding{PaddingType::VALID}, Activation::NONE};
+  auto infered_shapes = neurun::shape_inference::inferConv2DShape(in_shape, ker_shape, param);
+  auto infered_out_shape = infered_shapes[0];
+
+  ASSERT_EQ(infered_out_shape.rank(), 4);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).N, 10);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).H, 2);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).W, 1);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).C, 30);
+
+  param = operation::Conv2DNode::Param{Stride{3, 7}, Padding{PaddingType::SAME}, Activation::NONE};
+  infered_shapes = neurun::shape_inference::inferConv2DShape(in_shape, ker_shape, param);
+  infered_out_shape = infered_shapes[0];
+
+  ASSERT_EQ(infered_out_shape.rank(), 4);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).N, 10);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).H, 2);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).W, 2);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).C, 30);
+
+  param = operation::Conv2DNode::Param{Stride{3, 7}, Padding{PaddingType::EXPLICIT, {4, 3, 2, 1}},
+                                       Activation::NONE};
+  infered_shapes = neurun::shape_inference::inferConv2DShape(in_shape, ker_shape, param);
+  infered_out_shape = infered_shapes[0];
+
+  ASSERT_EQ(infered_out_shape.rank(), 4);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).N, 10);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).H, 3);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).W, 2);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).C, 30);
+}
+
+TEST(ShapeInference, DepthwiseConv2DNode)
+{
+  Shape in_shape{10, 6, 12, 20};
+  Shape ker_shape{1, 3, 6, 60};
+
+  operation::DepthwiseConv2DNode::Param param{Stride{3, 7}, Padding{PaddingType::VALID}, 3,
+                                              Activation::NONE};
+  auto infered_shapes =
+      neurun::shape_inference::inferDepthwiseConv2DShape(in_shape, ker_shape, param);
+  auto infered_out_shape = infered_shapes[0];
+
+  ASSERT_EQ(infered_out_shape.rank(), 4);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).N, 10);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).H, 2);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).W, 1);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).C, 60);
+
+  param = operation::DepthwiseConv2DNode::Param{Stride{3, 7}, Padding{PaddingType::SAME}, 3,
+                                                Activation::NONE};
+  infered_shapes = neurun::shape_inference::inferDepthwiseConv2DShape(in_shape, ker_shape, param);
+  infered_out_shape = infered_shapes[0];
+
+  ASSERT_EQ(infered_out_shape.rank(), 4);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).N, 10);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).H, 2);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).W, 2);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).C, 60);
+
+  param = operation::DepthwiseConv2DNode::Param{
+      Stride{3, 7}, Padding{PaddingType::EXPLICIT, {4, 3, 2, 1}}, 3, Activation::NONE};
+  infered_shapes = neurun::shape_inference::inferDepthwiseConv2DShape(in_shape, ker_shape, param);
+  infered_out_shape = infered_shapes[0];
+
+  ASSERT_EQ(infered_out_shape.rank(), 4);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).N, 10);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).H, 3);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).W, 2);
+  ASSERT_EQ(infered_out_shape.asFeature(Layout::NHWC).C, 60);
+}
+
+TEST(ShapeInference, ConcatNode)
+{
+  Shape in1{10, 20, 30, 3, 50};
+  Shape in2{10, 20, 30, 2, 50};
+  Shape in3{10, 20, 30, 2, 50};
+
+  operation::ConcatNode::Param param{3};
+  auto infered_shapes = neurun::shape_inference::inferConcatShape({in1, in2, in3}, param);
+  auto infered_out_shape = infered_shapes[0];
+
+  ASSERT_EQ(infered_out_shape.rank(), 5);
+  ASSERT_EQ(infered_out_shape.dim(0), 10);
+  ASSERT_EQ(infered_out_shape.dim(1), 20);
+  ASSERT_EQ(infered_out_shape.dim(2), 30);
+  ASSERT_EQ(infered_out_shape.dim(3), 7);
+  ASSERT_EQ(infered_out_shape.dim(4), 50);
+}
+
+TEST(ShapeInference, FullyConnectedNode)
+{
+  Shape in_shape{3, 4, 5, 6};
+  Shape ker_shape{3, 10};
+  auto infered_shapes = neurun::shape_inference::inferFullyConnectedShape(in_shape, ker_shape);
+  auto infered_out_shape = infered_shapes[0];
+
+  ASSERT_EQ(infered_out_shape.rank(), 2);
+  ASSERT_EQ(infered_out_shape.dim(0), 36);
+  ASSERT_EQ(infered_out_shape.dim(1), 3);
+}
diff --git a/runtimes/pure_arm_compute/CMakeLists.txt b/runtimes/pure_arm_compute/CMakeLists.txt
index 2a26a7bf2..32a0ca7ac 100644
--- a/runtimes/pure_arm_compute/CMakeLists.txt
+++ b/runtimes/pure_arm_compute/CMakeLists.txt
@@ -9,11 +9,11 @@ file(GLOB_RECURSE SOURCES "src/*.cc")
 add_library(nnapi_pure_arm_compute SHARED ${SOURCES})
 # To ignore compiler warnings from ARM Compute Library
 target_compile_options(nnapi_pure_arm_compute PRIVATE -Wno-ignored-attributes)
-target_include_directories(nnapi_pure_arm_compute PUBLIC ${NNFW_INCLUDE_DIR})
 target_include_directories(nnapi_pure_arm_compute PUBLIC src)
 if(BUILD_TFLITE_BENCHMARK_MODEL)
   target_compile_definitions(nnapi_pure_arm_compute PUBLIC "TFLITE_PROFILING_ENABLED")
 endif()
+target_link_libraries(nnapi_pure_arm_compute nnfw-header)
 target_link_libraries(nnapi_pure_arm_compute arm_compute arm_compute_ex)
 target_link_libraries(nnapi_pure_arm_compute nnfw_lib_cpp14 nnfw_lib_misc nnfw_lib_profiling)
 
@@ -23,7 +23,6 @@ endif()
 
 set_target_properties(nnapi_pure_arm_compute PROPERTIES OUTPUT_NAME neuralnetworks)
 install(TARGETS nnapi_pure_arm_compute DESTINATION lib/pureacl RENAME neuralnetworks)
-install(TARGETS nnapi_pure_arm_compute DESTINATION lib RENAME neuralnetworks)
 
 # To prevent undefined references
 add_executable(pure_arm_compute_symbolcheck symbolcheck.cpp)
diff --git a/runtimes/pure_arm_compute/src/compilation.cc b/runtimes/pure_arm_compute/src/compilation.cc
index bed42529b..8cc86ebae 100644
--- a/runtimes/pure_arm_compute/src/compilation.cc
+++ b/runtimes/pure_arm_compute/src/compilation.cc
@@ -30,56 +30,12 @@
 #include <arm_compute/runtime/IFunction.h>
 #include <arm_compute/runtime/CL/CLScheduler.h>
 #include <arm_compute/runtime/CL/CLSubTensor.h>
-#include <arm_compute/runtime/CL/functions/CLArithmeticAddition.h>
-#include <arm_compute/runtime/CL/functions/CLArithmeticSubtractionEx.h>
-#include <arm_compute/runtime/CL/functions/CLPadLayerEx.h>
-#include <arm_compute/runtime/CL/functions/CLPixelWiseMultiplication.h>
-#include <arm_compute/runtime/CL/functions/CLPixelWiseDivision.h>
-#include <arm_compute/runtime/CL/functions/CLPoolingLayer.h>
-#include <arm_compute/runtime/CL/functions/CLActivationLayer.h>
-#include <arm_compute/runtime/CL/functions/CLActivationLayerEx.h>
-#include <arm_compute/runtime/CL/functions/CLScale.h>
-#include <arm_compute/runtime/CL/functions/CLSpaceToBatchND.h>
-#include <arm_compute/runtime/CL/functions/CLSpaceToDepth.h>
-#include <arm_compute/runtime/CL/functions/CLReshapeLayer.h>
-#include <arm_compute/runtime/CL/functions/CLStridedSliceEx.h>
-#include <arm_compute/runtime/CL/functions/CLSoftmaxLayer.h>
-#include <arm_compute/runtime/CL/functions/CLGather.h>
-#include <arm_compute/runtime/CL/functions/CLHashtableLookup.h>
-#include <arm_compute/runtime/CL/functions/CLTopKV2.h>
-#include <arm_compute/runtime/CL/functions/CLArgMinMax.h>
-#include <arm_compute/runtime/CL/functions/CLCast.h>
-#include <arm_compute/runtime/CL/functions/CLConvolutionLayer.h>
-#include <arm_compute/runtime/CL/functions/CLDepthwiseConvolutionLayer.h>
-#include <arm_compute/runtime/CL/functions/CLDequantizationLayer.h>
-#include <arm_compute/runtime/CL/functions/CLDepthToSpace.h>
-#include <arm_compute/runtime/CL/functions/CLPermuteEx.h>
-#include <arm_compute/runtime/CL/functions/CLReduceOperation.h>
-#include <arm_compute/runtime/CL/functions/CLRNNLayer.h>
-#include <arm_compute/runtime/CL/functions/CLFloor.h>
-#include <arm_compute/runtime/CL/functions/CLCopy.h>
-#include <arm_compute/runtime/CL/functions/CLNormalizationLayerEx.h>
-#include <arm_compute/runtime/CL/functions/CLExp.h>
-#include <arm_compute/runtime/CL/functions/CLBatchToSpaceND.h>
-#include <arm_compute/runtime/CL/functions/CLEmbeddingLookup.h>
-#include <arm_compute/runtime/CL/functions/CLSquaredDifference.h>
-#include <arm_compute/runtime/CL/functions/CLNeg.h>
-#include <arm_compute/runtime/CL/functions/CLPReLU.h>
-#include <arm_compute/runtime/CL/functions/CLBinaryLogicalOp.h>
-#include <arm_compute/runtime/CL/functions/CLComparisonOp.h>
+#include <arm_compute/runtime/CL/CLFunctions.h>   // Include all ARM Compute CL functions
+#include <arm_compute/runtime/CL/CLFunctionsEx.h> // Include all ARM Compute EX CL functions
 
 #include <arm_compute/runtime/SubTensor.h>
-#include <arm_compute/runtime/NEON/functions/NESoftmaxLayer.h>
-#include <arm_compute/runtime/NEON/functions/NEArithmeticAddition.h>
-#include <arm_compute/runtime/NEON/functions/NEArithmeticSubtraction.h>
-#include <arm_compute/runtime/NEON/functions/NEPixelWiseMultiplication.h>
-#include <arm_compute/runtime/NEON/functions/NEPoolingLayer.h>
-#include <arm_compute/runtime/NEON/functions/NEActivationLayer.h>
-#include <arm_compute/runtime/NEON/functions/NEConvolutionLayer.h>
-#include <arm_compute/runtime/NEON/functions/NEDepthwiseConvolutionLayer.h>
-#include <arm_compute/runtime/NEON/functions/NEFloor.h>
-#include <arm_compute/runtime/NEON/functions/NENormalizationLayerEx.h>
-#include <arm_compute/runtime/NEON/functions/NEReshapeLayer.h>
+#include <arm_compute/runtime/NEON/NEFunctions.h>   // Include all ARM Compute NEON functions
+#include <arm_compute/runtime/NEON/NEFunctionsEx.h> // Include all ARM Compute EX NEON functions
 
 #include "internal/arm_compute.h"
 #include "internal/arm_compute/Cast.h"
@@ -92,23 +48,9 @@
 #include "internal/nnapi/tensor/Reader.h"
 #include "internal/arm_compute/feature/View.h"
 #include "internal/arm_compute/tensor/View.h"
-#include "internal/layers/GenericReshapeLayer.h"
-#include "internal/layers/SimpleArithmeticAddition.h"
-#include "internal/layers/SimplePadLayer.h"
-#include "internal/layers/SimpleCastLayer.h"
-#include "internal/layers/SimpleTransposeConv.h"
-#include "internal/layers/GenericFullyConnectedLayer.h"
-#include "internal/layers/SimpleSpaceToDepth.h"
-#include "internal/layers/SimpleEmbeddingLookup.h"
-#include "internal/layers/SimpleDepthToSpace.h"
-#include "internal/layers/SimpleBatchToSpaceNd.h"
-#include "internal/layers/SimpleHashtableLookupLayer.h"
-#include "internal/layers/SimplePackLayer.h"
-#include "internal/layers/SimpleSpaceToBatchND.h"
-#include "internal/layers/SimpleNeg.h"
-#include "internal/layers/SimpleUnpackLayer.h"
-#include "internal/layers/SimpleSQRT.h"
-#include "internal/layers/SimpleArgMinMax.h"
+
+#include <arm_compute/runtime/misc/functions/GenericReshapeLayer.h>
+#include <arm_compute/runtime/misc/functions/GenericGather.h>
 
 #include "misc/matrix/IndexIterator.h"
 #include "misc/kernel/IndexIterator.h"
@@ -121,6 +63,8 @@
 #include "model.h"
 #include "logging.h"
 
+using namespace arm_compute::misc;
+
 template <typename T> T from_env(const char *);
 
 template <> bool from_env(const char *s)
@@ -183,7 +127,8 @@ Padding valid_padding(void)
   return padding;
 }
 
-Padding same_padding(const nnfw::misc::feature::Shape &ifm_shape, const Stride &stride, uint32_t kw,
+Padding same_padding(const nnfw::misc::feature::Shape &ifm_shape,
+                     const nnfw::misc::feature::Shape &ofm_shape, const Stride &stride, uint32_t kw,
                      uint32_t kh)
 {
   Padding padding;
@@ -195,13 +140,10 @@ Padding same_padding(const nnfw::misc::feature::Shape &ifm_shape, const Stride &
   // padding_to_beginning = total_padding / 2
   // padding_to_end = (total_padding + 1)/2.
   //
-  const int32_t out_size_height = (ifm_shape.H + stride.vertical - 1) / stride.vertical;
-  const int32_t out_size_width = (ifm_shape.W + stride.horizontal - 1) / stride.horizontal;
-
-  const int32_t vertical_needed_input = (out_size_height - 1) * stride.vertical + kh;
+  const int32_t vertical_needed_input = (ofm_shape.H - 1) * stride.vertical + kh;
   const int32_t vertical_total_padding = std::max(0, vertical_needed_input - ifm_shape.H);
 
-  const int32_t horizontal_needed_input = (out_size_width - 1) * stride.horizontal + kw;
+  const int32_t horizontal_needed_input = (ofm_shape.W - 1) * stride.horizontal + kw;
   const int32_t horizontal_total_padding = std::max(0, horizontal_needed_input - ifm_shape.W);
 
   padding.top = vertical_total_padding / 2;
@@ -212,7 +154,7 @@ Padding same_padding(const nnfw::misc::feature::Shape &ifm_shape, const Stride &
   return padding;
 }
 
-::arm_compute::PadStrideInfo asPadStringInfo(const Padding &padding, const Stride &stride)
+::arm_compute::PadStrideInfo asPadStrideInfo(const Padding &padding, const Stride &stride)
 {
   return ::arm_compute::PadStrideInfo{stride.horizontal,
                                       stride.vertical,
@@ -223,6 +165,33 @@ Padding same_padding(const nnfw::misc::feature::Shape &ifm_shape, const Stride &
                                       ::arm_compute::DimensionRoundingType::FLOOR};
 }
 
+::arm_compute::ActivationLayerInfo asActInfo(FuseCode act)
+{
+  if (act == ANEURALNETWORKS_FUSED_NONE)
+  {
+    return ::arm_compute::ActivationLayerInfo();
+  }
+  else if (act == ANEURALNETWORKS_FUSED_RELU)
+  {
+    return ::arm_compute::ActivationLayerInfo(
+        ::arm_compute::ActivationLayerInfo::ActivationFunction::RELU);
+  }
+  else if (act == ANEURALNETWORKS_FUSED_RELU1)
+  {
+    return ::arm_compute::ActivationLayerInfo(
+        ::arm_compute::ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU, 1.0f, -1.0f);
+  }
+  else if (act == ANEURALNETWORKS_FUSED_RELU6)
+  {
+    return ::arm_compute::ActivationLayerInfo(
+        ::arm_compute::ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU, 6.0f, 0.0f);
+  }
+  else
+  {
+    throw std::runtime_error("Not supported, yet");
+  }
+}
+
 struct IAllocationContext
 {
   virtual ~IAllocationContext() = default;
@@ -641,19 +610,6 @@ void Planner::visit(const ::internal::tflite::op::Add::Node &node)
 
     std::unique_ptr<::arm_compute::IFunction> fn;
 
-    // NOTE SimpleArithmeticAddition is quite slow, but may be useful for debugging
-    if (from_env<bool>(std::getenv("USE_SIMPLE_ARITHMETIC_ADDITION")))
-    {
-      // NOTE SimpleArithmeticAddition does not support broadcasting
-      assert(lhs_shape == rhs_shape);
-
-      auto l = nnfw::cpp14::make_unique<SimpleArithmeticAddition>();
-
-      l->configure(lhs_alloc, rhs_alloc, ofm_alloc);
-
-      fn = std::move(l);
-    }
-    else
     {
       if (::internal::arm_compute::isGpuMode())
       {
@@ -737,7 +693,7 @@ void Planner::visit(const ::internal::tflite::op::Sub::Node &node)
 
     if (::internal::arm_compute::isGpuMode())
     {
-      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLArithmeticSubtractionEx>();
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLArithmeticSubtraction>();
 
       // TODO Decide ConvertPolicy (WARP? SATURATE?) according to NN API specification
       fn->configure(CAST_CL(lhs_alloc), CAST_CL(rhs_alloc), CAST_CL(ofm_alloc),
@@ -900,11 +856,9 @@ void Planner::visit(const ::internal::tflite::op::Div::Node &node)
 
     if (::internal::arm_compute::isGpuMode())
     {
-      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLPixelWiseDivision>();
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLArithmeticDivision>();
 
-      fn->configure(CAST_CL(lhs_alloc), CAST_CL(rhs_alloc), CAST_CL(ofm_alloc),
-                    1.0, // scale
-                    arm_compute::ConvertPolicy::SATURATE, arm_compute::RoundingPolicy::TO_ZERO);
+      fn->configure(CAST_CL(lhs_alloc), CAST_CL(rhs_alloc), CAST_CL(ofm_alloc));
 
       builder.append("Div", std::move(fn));
     }
@@ -1039,7 +993,7 @@ void Planner::visit(const ::internal::tflite::op::Conv2D::Implicit::Node &node)
 
   param.stride = stride;
   param.padding = (padding_type == ANEURALNETWORKS_PADDING_SAME)
-                      ? same_padding(ifm_shape, stride, ker_shape.W, ker_shape.H)
+                      ? same_padding(ifm_shape, ofm_shape, stride, ker_shape.W, ker_shape.H)
                       : valid_padding();
 
   param.activation = static_cast<FuseCode>(_ctx.at(activation_index).asScalar<int32_t>());
@@ -1050,14 +1004,18 @@ void Planner::visit(const ::internal::tflite::op::Conv2D::Implicit::Node &node)
     auto ker_alloc = ctx.at(::internal::tflite::operand::Index{param.ker_index});
     auto bias_alloc = ctx.at(::internal::tflite::operand::Index{param.bias_index});
 
-    const auto conv_info = asPadStringInfo(param.padding, param.stride);
+    const auto conv_info = asPadStrideInfo(param.padding, param.stride);
+    const auto fused_act = asActInfo(param.activation);
 
     if (::internal::arm_compute::isGpuMode())
     {
       std::unique_ptr<::arm_compute::CLConvolutionLayer> fn{new ::arm_compute::CLConvolutionLayer};
 
+      // To pass the fused_act parameter, it calls the WeightsInfo() and Size2D(1U, 1U) (dilation)
+      // functions like the default parameter.
       fn->configure(CAST_CL(ifm_alloc), CAST_CL(ker_alloc), CAST_CL(bias_alloc), CAST_CL(ofm_alloc),
-                    conv_info);
+                    conv_info, ::arm_compute::WeightsInfo(), ::arm_compute::Size2D(1U, 1U),
+                    fused_act);
 
       builder.append("Conv2D", std::move(fn));
     }
@@ -1065,12 +1023,13 @@ void Planner::visit(const ::internal::tflite::op::Conv2D::Implicit::Node &node)
     {
       std::unique_ptr<::arm_compute::NEConvolutionLayer> fn{new ::arm_compute::NEConvolutionLayer};
 
-      fn->configure(ifm_alloc, ker_alloc, bias_alloc, ofm_alloc, conv_info);
+      // To pass the fused_act parameter, it calls the WeightsInfo() and Size2D(1U, 1U) (dilation)
+      // functions like the default parameter.
+      fn->configure(ifm_alloc, ker_alloc, bias_alloc, ofm_alloc, conv_info,
+                    ::arm_compute::WeightsInfo(), ::arm_compute::Size2D(1U, 1U), fused_act);
 
       builder.append("Conv2D", std::move(fn));
     }
-
-    ActivationBuilder{builder}.append(param.activation, ofm_alloc);
   };
 
   _builder.addStage(stage);
@@ -1215,14 +1174,18 @@ void Planner::visit(const ::internal::tflite::op::Conv2D::Explicit::Node &node)
     auto ker_alloc = ctx.at(::internal::tflite::operand::Index{param.ker_index});
     auto bias_alloc = ctx.at(::internal::tflite::operand::Index{param.bias_index});
 
-    const auto conv_info = asPadStringInfo(param.padding, param.stride);
+    const auto conv_info = asPadStrideInfo(param.padding, param.stride);
+    const auto fused_act = asActInfo(param.activation);
 
     if (::internal::arm_compute::isGpuMode())
     {
       std::unique_ptr<::arm_compute::CLConvolutionLayer> fn{new ::arm_compute::CLConvolutionLayer};
 
+      // To pass the fused_act parameter, it calls the WeightsInfo() and Size2D(1U, 1U) (dilation)
+      // functions like the default parameter.
       fn->configure(CAST_CL(ifm_alloc), CAST_CL(ker_alloc), CAST_CL(bias_alloc), CAST_CL(ofm_alloc),
-                    conv_info);
+                    conv_info, ::arm_compute::WeightsInfo(), ::arm_compute::Size2D(1U, 1U),
+                    fused_act);
 
       builder.append("Conv2D", std::move(fn));
     }
@@ -1230,12 +1193,13 @@ void Planner::visit(const ::internal::tflite::op::Conv2D::Explicit::Node &node)
     {
       std::unique_ptr<::arm_compute::NEConvolutionLayer> fn{new ::arm_compute::NEConvolutionLayer};
 
-      fn->configure(ifm_alloc, ker_alloc, bias_alloc, ofm_alloc, conv_info);
+      // To pass the fused_act parameter, it calls the WeightsInfo() and Size2D(1U, 1U) (dilation)
+      // functions like the default parameter.
+      fn->configure(ifm_alloc, ker_alloc, bias_alloc, ofm_alloc, conv_info,
+                    ::arm_compute::WeightsInfo(), ::arm_compute::Size2D(1U, 1U), fused_act);
 
       builder.append("Conv2D", std::move(fn));
     }
-
-    ActivationBuilder{builder}.append(param.activation, ofm_alloc);
   };
 
   _builder.addStage(stage);
@@ -1253,7 +1217,7 @@ void Planner::visit(const ::internal::tflite::op::DepthwiseConv2D::Implicit::Nod
   const ::internal::tflite::operand::Index hstride_index{node.param().hstride_index};
 
   const ::internal::tflite::operand::Index padding_index{node.param().padding_index};
-  const ::internal::tflite::operand::Index multipler_index{node.param().multipler_index};
+  const ::internal::tflite::operand::Index multiplier_index{node.param().multiplier_index};
   const ::internal::tflite::operand::Index activation_index{node.param().activation_index};
 
   const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature();
@@ -1262,7 +1226,7 @@ void Planner::visit(const ::internal::tflite::op::DepthwiseConv2D::Implicit::Nod
   const auto ker_shape = _ctx.at(ker_index).shape().asFeature();
   const auto bias_size = _ctx.at(bias_index).shape().asVector();
 
-  auto multiplier = _ctx.at(multipler_index).asScalar<int>();
+  auto multiplier = _ctx.at(multiplier_index).asScalar<int>();
 
   assert(ker_shape.C == bias_size);
   assert(ker_shape.C == ifm_shape.C * multiplier);
@@ -1319,7 +1283,7 @@ void Planner::visit(const ::internal::tflite::op::DepthwiseConv2D::Implicit::Nod
 
   param.stride = stride;
   param.padding = (padding_type == ANEURALNETWORKS_PADDING_SAME)
-                      ? same_padding(ifm_shape, stride, ker_shape.W, ker_shape.H)
+                      ? same_padding(ifm_shape, ofm_shape, stride, ker_shape.W, ker_shape.H)
                       : valid_padding();
 
   param.multipler = multiplier;
@@ -1353,7 +1317,7 @@ void Planner::visit(const ::internal::tflite::op::DepthwiseConv2D::Implicit::Nod
     auto ker_alloc = ctx.at(::internal::tflite::operand::Index{param.ker_index});
     auto bias_alloc = ctx.at(::internal::tflite::operand::Index{param.bias_index});
 
-    const auto conv_info = asPadStringInfo(param.padding, param.stride);
+    const auto conv_info = asPadStrideInfo(param.padding, param.stride);
 
     if (::internal::arm_compute::isGpuMode())
     {
@@ -1395,7 +1359,7 @@ void Planner::visit(const ::internal::tflite::op::DepthwiseConv2D::Explicit::Nod
   const ::internal::tflite::operand::Index padding_top_index{node.param().padding_top_index};
   const ::internal::tflite::operand::Index padding_bottom_index{node.param().padding_bottom_index};
 
-  const ::internal::tflite::operand::Index multipler_index{node.param().multipler_index};
+  const ::internal::tflite::operand::Index multiplier_index{node.param().multiplier_index};
   const ::internal::tflite::operand::Index activation_index{node.param().activation_index};
 
   const auto ofm_shape = _ctx.at(ofm_index).shape().asFeature();
@@ -1404,7 +1368,7 @@ void Planner::visit(const ::internal::tflite::op::DepthwiseConv2D::Explicit::Nod
   const auto ker_shape = _ctx.at(ker_index).shape().asFeature();
   const auto bias_size = _ctx.at(bias_index).shape().asVector();
 
-  auto multiplier = _ctx.at(multipler_index).asScalar<int>();
+  auto multiplier = _ctx.at(multiplier_index).asScalar<int>();
 
   assert(ker_shape.C == bias_size);
   assert(ker_shape.C == ifm_shape.C * multiplier);
@@ -1496,7 +1460,7 @@ void Planner::visit(const ::internal::tflite::op::DepthwiseConv2D::Explicit::Nod
     auto ker_alloc = ctx.at(::internal::tflite::operand::Index{param.ker_index});
     auto bias_alloc = ctx.at(::internal::tflite::operand::Index{param.bias_index});
 
-    const auto conv_info = asPadStringInfo(param.padding, param.stride);
+    const auto conv_info = asPadStrideInfo(param.padding, param.stride);
 
     if (::internal::arm_compute::isGpuMode())
     {
@@ -1560,15 +1524,6 @@ void Planner::visit(const ::internal::tflite::op::Dequantize::Node &node)
 
     std::unique_ptr<::arm_compute::IFunction> fn;
 
-    if (from_env<bool>(std::getenv("USE_SIMPLE_CAST")))
-    {
-      // Use the CPU version of CAST operation
-      auto l = nnfw::cpp14::make_unique<SimpleCastLayer>();
-
-      l->configure(input_alloc, output_alloc);
-      fn = std::move(l);
-    }
-    else // Use the OpenCL version of CAST operation
     {
       if (::internal::arm_compute::isGpuMode())
       {
@@ -1652,7 +1607,7 @@ void Planner::visit(const ::internal::tflite::op::MaxPool2D::Implicit::Node &nod
   param.stride.horizontal = hstride;
 
   param.padding = (padding_type == ANEURALNETWORKS_PADDING_SAME)
-                      ? same_padding(ifm_shape, param.stride, kw, kh)
+                      ? same_padding(ifm_shape, ofm_shape, param.stride, kw, kh)
                       : valid_padding();
   param.activation = static_cast<FuseCode>(_ctx.at(activation_index).asScalar<int32_t>());
 
@@ -1675,7 +1630,7 @@ void Planner::visit(const ::internal::tflite::op::MaxPool2D::Implicit::Node &nod
 
     ::arm_compute::PoolingLayerInfo info{::arm_compute::PoolingType::MAX,
                                          ::arm_compute::Size2D{param.kw, param.kh},
-                                         asPadStringInfo(param.padding, param.stride)};
+                                         asPadStrideInfo(param.padding, param.stride)};
 
     if (::internal::arm_compute::isGpuMode())
     {
@@ -1793,7 +1748,7 @@ void Planner::visit(const ::internal::tflite::op::MaxPool2D::Explicit::Node &nod
 
     ::arm_compute::PoolingLayerInfo info{::arm_compute::PoolingType::MAX,
                                          ::arm_compute::Size2D{param.kw, param.kh},
-                                         asPadStringInfo(param.padding, param.stride)};
+                                         asPadStrideInfo(param.padding, param.stride)};
 
     if (::internal::arm_compute::isGpuMode())
     {
@@ -1883,7 +1838,7 @@ void Planner::visit(const ::internal::tflite::op::AvgPool2D::Implicit::Node &nod
   param.stride.horizontal = hstride;
 
   param.padding = (padding_type == ANEURALNETWORKS_PADDING_SAME)
-                      ? same_padding(ifm_shape, param.stride, kw, kh)
+                      ? same_padding(ifm_shape, ofm_shape, param.stride, kw, kh)
                       : valid_padding();
 
   param.activation = static_cast<FuseCode>(_ctx.at(activation_index).asScalar<int32_t>());
@@ -1908,7 +1863,7 @@ void Planner::visit(const ::internal::tflite::op::AvgPool2D::Implicit::Node &nod
 
     ::arm_compute::PoolingLayerInfo info{
         ::arm_compute::PoolingType::AVG, ::arm_compute::Size2D{param.kw, param.kh},
-        asPadStringInfo(param.padding, param.stride), true /* exclude_padding */};
+        asPadStrideInfo(param.padding, param.stride), true /* exclude_padding */};
 
     if (::internal::arm_compute::isGpuMode())
     {
@@ -2026,7 +1981,7 @@ void Planner::visit(const ::internal::tflite::op::AvgPool2D::Explicit::Node &nod
 
     ::arm_compute::PoolingLayerInfo info{
         ::arm_compute::PoolingType::AVG, ::arm_compute::Size2D{param.kw, param.kh},
-        asPadStringInfo(param.padding, param.stride), true /* exclude_padding */};
+        asPadStrideInfo(param.padding, param.stride), true /* exclude_padding */};
 
     if (::internal::arm_compute::isGpuMode())
     {
@@ -2137,7 +2092,7 @@ void Planner::visit(const ::internal::tflite::op::FullyConnected::Node &node)
     assert(feature_size == batch_size * input_size);
 
     _builder.addShapeConstr(input_index,
-                            asTensorInfo(asTensorShape(_ctx.at(input_index).shape()),
+                            asTensorInfo(asTensorShape(_ctx.at(input_index).shape(), false),
                                          _ctx.at(input_index).type(), _ctx.at(input_index).scale(),
                                          _ctx.at(input_index).zeroPoint()));
 
@@ -2202,10 +2157,10 @@ void Planner::visit(const ::internal::tflite::op::FullyConnected::Node &node)
     auto weight_alloc = ctx.at(::internal::tflite::operand::Index{param.weight_index});
     auto bias_alloc = ctx.at(::internal::tflite::operand::Index{param.bias_index});
 
-    auto fn = nnfw::cpp14::make_unique<GenericFullyConnectedLayer>();
+    auto fn = nnfw::cpp14::make_unique<arm_compute::CLFullyConnectedReshapingLayer>();
 
-    fn->configure(input_alloc, weight_alloc, bias_alloc, output_alloc, needs_reshape,
-                  asTensorShape(reshape));
+    fn->configure(CAST_CL(input_alloc), CAST_CL(weight_alloc), CAST_CL(bias_alloc),
+                  CAST_CL(output_alloc), needs_reshape, asTensorShape(reshape));
 
     builder.append("FullyConnected", std::move(fn));
 
@@ -2275,8 +2230,8 @@ void Planner::visit(const ::internal::tflite::op::Reshape::Node &node)
   const ::internal::tflite::operand::Index output_index{node.param().output_index};
   const ::internal::tflite::operand::Index input_index{node.param().input_index};
 
-  auto input_shape = asTensorShape(_ctx.at(input_index).shape());
-  auto output_shape = asTensorShape(_ctx.at(output_index).shape());
+  auto input_shape = asTensorShape(_ctx.at(input_index).shape(), false);
+  auto output_shape = asTensorShape(_ctx.at(output_index).shape(), false);
 
   assert(input_shape[0] * input_shape[1] * input_shape[2] * input_shape[3] ==
          output_shape[0] * output_shape[1] * output_shape[2] * output_shape[3]);
@@ -2481,7 +2436,15 @@ void Planner::visit(const ::internal::tflite::op::StridedSlice::Node &node)
                    _ctx.at(stridesData_index).scale(), _ctx.at(stridesData_index).zeroPoint()));
 
   // Set initializers for indices data such as order of inputData
-  {
+  int input_rank = _ctx.at(inputData_index).shape().rank();
+  std::vector<int32_t> starts;
+  std::vector<int32_t> ends;
+  std::vector<int32_t> strides;
+  starts.resize(input_rank, 0);
+  ends.resize(input_rank, 0);
+  strides.resize(input_rank, 0);
+  {
+    auto input_shape = _ctx.at(inputData_index).shape();
     auto startData_base = _ctx.at(startData_index).data().base();
     auto endData_base = _ctx.at(endData_index).data().base();
     auto stridesData_base = _ctx.at(stridesData_index).data().base();
@@ -2490,19 +2453,26 @@ void Planner::visit(const ::internal::tflite::op::StridedSlice::Node &node)
     const auto stridesData_size = _ctx.at(stridesData_index).shape().asVector();
 
     assert(_ctx.at(startData_index).type() == ANEURALNETWORKS_TENSOR_INT32);
-    auto startData_initializer =
-        std::bind(initReorderVectorTensor<int32_t>, _1, startData_base, startData_size);
-    _builder.addInitializer(startData_index, startData_initializer);
-
     assert(_ctx.at(endData_index).type() == ANEURALNETWORKS_TENSOR_INT32);
-    auto endData_initializer =
-        std::bind(initReorderVectorTensor<int32_t>, _1, endData_base, endData_size);
-    _builder.addInitializer(endData_index, endData_initializer);
-
     assert(_ctx.at(stridesData_index).type() == ANEURALNETWORKS_TENSOR_INT32);
-    auto stridesData_initializer =
-        std::bind(initReorderVectorTensor<int32_t>, _1, stridesData_base, stridesData_size);
-    _builder.addInitializer(stridesData_index, stridesData_initializer);
+    assert(startData_size == input_rank);
+    assert(endData_size == input_rank);
+    assert(stridesData_size == input_rank);
+
+    assert(startData_base != nullptr);
+    for (uint32_t n = 0; n < input_rank; ++n)
+    {
+      auto axis = ToARMComputeAxis(input_rank, n).value();
+
+      int32_t start_value = *(reinterpret_cast<const int32_t *>(startData_base) + n);
+      starts[axis] = start_value;
+
+      int32_t end_value = *(reinterpret_cast<const int32_t *>(endData_base) + n);
+      ends[axis] = end_value;
+
+      int32_t strides_value = *(reinterpret_cast<const int32_t *>(stridesData_base) + n);
+      strides[axis] = strides_value;
+    }
   }
 
   struct Param
@@ -2510,9 +2480,9 @@ void Planner::visit(const ::internal::tflite::op::StridedSlice::Node &node)
     int32_t outputData_index;
     int32_t inputData_index;
 
-    int32_t startData_index;
-    int32_t endData_index;
-    int32_t stridesData_index;
+    std::vector<int32_t> starts;
+    std::vector<int32_t> ends;
+    std::vector<int32_t> strides;
 
     int32_t beginMask;
     int32_t endMask;
@@ -2523,31 +2493,35 @@ void Planner::visit(const ::internal::tflite::op::StridedSlice::Node &node)
   param.outputData_index = outputData_index.asInt();
   param.inputData_index = inputData_index.asInt();
 
-  param.startData_index = startData_index.asInt();
-  param.endData_index = endData_index.asInt();
-  param.stridesData_index = stridesData_index.asInt();
+  param.starts = starts;
+  param.ends = ends;
+  param.strides = strides;
 
   // Set mask bits such as order of inputData
-  const auto inputData_rank = _ctx.at(inputData_index).shape().rank();
-  param.beginMask = _ctx.at(beginMask_index).asReorderBits<int32_t>(inputData_rank);
-  param.endMask = _ctx.at(endMask_index).asReorderBits<int32_t>(inputData_rank);
-  param.shrinkAxisMask = _ctx.at(shrinkAxisMask_index).asReorderBits<int32_t>(inputData_rank);
+  param.beginMask = _ctx.at(beginMask_index).asReorderBits<int32_t>(input_rank);
+  param.endMask = _ctx.at(endMask_index).asReorderBits<int32_t>(input_rank);
+  param.shrinkAxisMask = _ctx.at(shrinkAxisMask_index).asReorderBits<int32_t>(input_rank);
 
   auto stage = [param](const IAllocationContext &ctx, IExecutionBuilder &builder) {
     auto outputData_alloc = ctx.at(::internal::tflite::operand::Index{param.outputData_index});
     auto inputData_alloc = ctx.at(::internal::tflite::operand::Index{param.inputData_index});
 
-    auto startData_alloc = ctx.at(::internal::tflite::operand::Index{param.startData_index});
-    auto endData_alloc = ctx.at(::internal::tflite::operand::Index{param.endData_index});
-    auto stridesData_alloc = ctx.at(::internal::tflite::operand::Index{param.stridesData_index});
+    ::arm_compute::Coordinates starts;
+    ::arm_compute::Coordinates ends;
+    ::arm_compute::BiStrides strides;
+    for (int i = 0; i < param.starts.size(); ++i)
+    {
+      starts.set(i, param.starts[i]);
+      ends.set(i, param.ends[i]);
+      strides.set(i, param.strides[i]);
+    }
 
     if (::internal::arm_compute::isGpuMode())
     {
-      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLStridedSliceEx>();
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLStridedSlice>();
 
-      fn->configure(CAST_CL(inputData_alloc), CAST_CL(outputData_alloc), CAST_CL(startData_alloc),
-                    CAST_CL(endData_alloc), CAST_CL(stridesData_alloc), param.beginMask,
-                    param.endMask, param.shrinkAxisMask);
+      fn->configure(CAST_CL(inputData_alloc), CAST_CL(outputData_alloc), starts, ends, strides,
+                    param.beginMask, param.endMask, param.shrinkAxisMask);
 
       builder.append("StridedSlice", std::move(fn));
     }
@@ -2846,15 +2820,6 @@ void Planner::visit(const ::internal::tflite::op::Cast::Node &node)
 
     std::unique_ptr<::arm_compute::IFunction> fn;
 
-    if (from_env<bool>(std::getenv("USE_SIMPLE_CAST")))
-    {
-      // Use the CPU version of CAST operation
-      auto l = nnfw::cpp14::make_unique<SimpleCastLayer>();
-
-      l->configure(input_alloc, output_alloc);
-      fn = std::move(l);
-    }
-    else // Use the OpenCL version of CAST operation
     {
       if (::internal::arm_compute::isGpuMode())
       {
@@ -2944,32 +2909,45 @@ void Planner::visit(const ::internal::tflite::op::Gather::Node &node)
 {
   const ::internal::tflite::operand::Index ofm_index{node.param().ofm_index};
 
-  const ::internal::tflite::operand::Index lhs_index{node.param().lhs_index};
-  const ::internal::tflite::operand::Index rhs_index{node.param().rhs_index};
+  const ::internal::tflite::operand::Index ifm_index{node.param().ifm_index};
+  const ::internal::tflite::operand::Index indices_index{node.param().indices_index};
 
   const ::internal::tflite::operand::Index axis_index{node.param().axis_index};
 
-  // Currently, 1D-input and 2D-input are supported.
-  assert(_ctx.at(lhs_index).shape().rank() == 1 || _ctx.at(lhs_index).shape().rank() == 2);
-  assert(_ctx.at(rhs_index).shape().rank() == 1);
+  const auto ifm_shape = _ctx.at(ifm_index).shape();
+  const auto indices_shape = _ctx.at(indices_index).shape();
+  const auto axis_shape = _ctx.at(axis_index).shape();
+  const auto ofm_shape = _ctx.at(ofm_index).shape();
+
+  assert(ifm_shape.rank() <= 4);
+  assert(indices_shape.rank() <= 3);
+  assert(ofm_shape.rank() <= 4);
+  assert(_ctx.at(axis_index).hasData());
+  assert(axis_shape.rank() == 0);
 
   // Set Shape Constraints
+  _builder.addShapeConstr(ofm_index,
+                          asTensorInfo(asTensorShape(_ctx.at(ofm_index).shape(), false),
+                                       _ctx.at(ofm_index).type(), _ctx.at(ofm_index).scale(),
+                                       _ctx.at(ofm_index).zeroPoint()));
+  _builder.addShapeConstr(ifm_index,
+                          asTensorInfo(asTensorShape(_ctx.at(ifm_index).shape(), false),
+                                       _ctx.at(ifm_index).type(), _ctx.at(ifm_index).scale(),
+                                       _ctx.at(ifm_index).zeroPoint()));
   _builder.addShapeConstr(
-      ofm_index, asTensorInfo(asTensorShape(_ctx.at(ofm_index).shape()), _ctx.at(ofm_index).type(),
-                              _ctx.at(ofm_index).scale(), _ctx.at(ofm_index).zeroPoint()));
-  _builder.addShapeConstr(
-      lhs_index, asTensorInfo(asTensorShape(_ctx.at(lhs_index).shape()), _ctx.at(lhs_index).type(),
-                              _ctx.at(lhs_index).scale(), _ctx.at(lhs_index).zeroPoint()));
-  _builder.addShapeConstr(
-      rhs_index, asTensorInfo(asTensorShape(_ctx.at(rhs_index).shape()), _ctx.at(rhs_index).type(),
-                              _ctx.at(rhs_index).scale(), _ctx.at(ofm_index).zeroPoint()));
+      indices_index, asTensorInfo(asTensorShape(_ctx.at(indices_index).shape(), false),
+                                  _ctx.at(indices_index).type(), _ctx.at(indices_index).scale(),
+                                  _ctx.at(indices_index).zeroPoint()));
+
+  const int32_t axis_value = static_cast<int>(_ctx.at(axis_index).asScalar<int32_t>());
+  const int axis = ToARMComputeAxis(ifm_shape.rank(), axis_value).value();
 
   // Construct operation parameters
   struct Param
   {
     int ofm_index;
-    int lhs_index;
-    int rhs_index;
+    int ifm_index;
+    int indices_index;
 
     int axis;
   };
@@ -2977,22 +2955,22 @@ void Planner::visit(const ::internal::tflite::op::Gather::Node &node)
   Param param;
 
   param.ofm_index = ofm_index.asInt();
-  param.lhs_index = lhs_index.asInt();
-  param.rhs_index = rhs_index.asInt();
+  param.ifm_index = ifm_index.asInt();
+  param.indices_index = indices_index.asInt();
 
-  param.axis = static_cast<int>(_ctx.at(axis_index).asScalar<int32_t>());
+  param.axis = axis;
 
   auto stage = [param](const IAllocationContext &ctx, IExecutionBuilder &builder) {
     auto ofm_alloc = ctx.at(::internal::tflite::operand::Index{param.ofm_index});
-    auto lhs_alloc = ctx.at(::internal::tflite::operand::Index{param.lhs_index});
-    auto rhs_alloc = ctx.at(::internal::tflite::operand::Index{param.rhs_index});
+    auto ifm_alloc = ctx.at(::internal::tflite::operand::Index{param.ifm_index});
+    auto indices_alloc = ctx.at(::internal::tflite::operand::Index{param.indices_index});
 
     if (::internal::arm_compute::isGpuMode())
     {
       std::unique_ptr<::arm_compute::IFunction> fn;
 
-      auto l = nnfw::cpp14::make_unique<::arm_compute::CLGather>();
-      l->configure(CAST_CL(lhs_alloc), CAST_CL(rhs_alloc), CAST_CL(ofm_alloc));
+      auto l = nnfw::cpp14::make_unique<GenericGather>();
+      l->configure(CAST_CL(ifm_alloc), CAST_CL(indices_alloc), CAST_CL(ofm_alloc), param.axis);
       fn = std::move(l);
       builder.append("Gather", std::move(fn));
     }
@@ -3011,10 +2989,20 @@ void Planner::visit(const ::internal::tflite::op::PReLU::Node &node)
   const ::internal::tflite::operand::Index ifm_index{node.param().ifm_index};
   const ::internal::tflite::operand::Index alpha_index{node.param().alpha_index};
 
-  // Set shape constraints
+  // Set Shape Constraints and TensorInfo
   _builder.addShapeConstr(
       ofm_index, asTensorInfo(asTensorShape(_ctx.at(ofm_index).shape()), _ctx.at(ofm_index).type(),
                               _ctx.at(ofm_index).scale(), _ctx.at(ofm_index).zeroPoint()));
+
+  if (!(_ctx.at(ifm_index).shape() == _ctx.at(alpha_index).shape()))
+  {
+    const auto broadcast_rank =
+        std::max(_ctx.at(ifm_index).shape().rank(), _ctx.at(alpha_index).shape().rank());
+    const_cast<::internal::tflite::operand::Shape &>(_ctx.at(ifm_index).shape())
+        .extendRank(broadcast_rank);
+    const_cast<::internal::tflite::operand::Shape &>(_ctx.at(alpha_index).shape())
+        .extendRank(broadcast_rank);
+  }
   _builder.addShapeConstr(
       ifm_index, asTensorInfo(asTensorShape(_ctx.at(ifm_index).shape()), _ctx.at(ifm_index).type(),
                               _ctx.at(ifm_index).scale(), _ctx.at(ifm_index).zeroPoint()));
@@ -3430,6 +3418,7 @@ void Planner::visit(const ::internal::tflite::op::Mean::Node &node)
   {
     int ofm_index;
     int ifm_index;
+    bool keep_dims;
     std::set<uint32_t> axis;
   };
 
@@ -3437,18 +3426,25 @@ void Planner::visit(const ::internal::tflite::op::Mean::Node &node)
 
   param.ofm_index = ofm_index.asInt();
   param.ifm_index = ifm_index.asInt();
+  param.keep_dims = keep_dims > 0 ? true : false;
   param.axis = axis;
 
   auto stage = [param](const IAllocationContext &ctx, IExecutionBuilder &builder) {
     auto ofm_alloc = ctx.at(::internal::tflite::operand::Index{param.ofm_index});
     auto ifm_alloc = ctx.at(::internal::tflite::operand::Index{param.ifm_index});
 
+    ::arm_compute::Coordinates reduction_axis;
+    size_t i = 0;
+    for (auto index : param.axis)
+    {
+      reduction_axis.set(i++, index);
+    }
+
     if (::internal::arm_compute::isGpuMode())
     {
-      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLReduceOperation>();
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLReduceMean>();
 
-      fn->configure(CAST_CL(ifm_alloc), CAST_CL(ofm_alloc), param.axis,
-                    ::arm_compute::ReduceOperation::MEAN);
+      fn->configure(CAST_CL(ifm_alloc), reduction_axis, param.keep_dims, CAST_CL(ofm_alloc));
 
       builder.append("Mean", std::move(fn));
     }
@@ -3640,7 +3636,7 @@ void Planner::visit(const ::internal::tflite::op::Transpose::Node &node)
 
     if (::internal::arm_compute::isGpuMode())
     {
-      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLPermuteEx>();
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLPermute>();
 
       fn->configure(CAST_CL(ifm_alloc), CAST_CL(ofm_alloc),
                     getARMComputePermutationVector(param.rank, param.pv));
@@ -3723,7 +3719,7 @@ void Planner::visit(const ::internal::tflite::op::ArgMax::Node &node)
   assert(_ctx.at(axis_index).hasData());
   // Axis dimension is always 1.
   assert(axis_shape.rank() == 1);
-  assert(ifm_shape.rank() == ofm_shape.rank());
+  assert((ifm_shape.rank() - 1) == ofm_shape.rank());
 
   _builder.addShapeConstr(ofm_index, asTensorInfo(asTensorShape(_ctx.at(ofm_index).shape(), false),
                                                   _ctx.at(ofm_index).type()));
@@ -3766,21 +3762,11 @@ void Planner::visit(const ::internal::tflite::op::ArgMax::Node &node)
     auto ofm_alloc = ctx.at(::internal::tflite::operand::Index{param.ofm_index});
     auto ifm_alloc = ctx.at(::internal::tflite::operand::Index{param.ifm_index});
 
-    if (from_env<bool>(std::getenv("USE_SIMPLE_ARGMINMAX")))
-    {
-      // USE CPU VERSION OF ARGMAX
-      auto fn = nnfw::cpp14::make_unique<SimpleArgMinMax>();
-
-      fn->configure(ifm_alloc, ofm_alloc, param.axis, ::arm_compute::ArgOperation::MAX);
-
-      builder.append("ArgMax", std::move(fn));
-    }
-    else
     {
 
       if (::internal::arm_compute::isGpuMode())
       {
-        auto fn = nnfw::cpp14::make_unique<::arm_compute::CLArgMinMax>();
+        auto fn = nnfw::cpp14::make_unique<::arm_compute::CLArgOperation>();
 
         fn->configure(CAST_CL(ifm_alloc), CAST_CL(ofm_alloc), param.axis,
                       ::arm_compute::ArgOperation::MAX);
@@ -3830,16 +3816,6 @@ void Planner::visit(const ::internal::tflite::op::SQRT::Node &node)
     const ::arm_compute::ActivationLayerInfo act_info{
         ::arm_compute::ActivationLayerInfo::ActivationFunction::SQRT};
 
-    if (from_env<bool>(std::getenv("USE_SIMPLE_SQRT")))
-    {
-      // USE CPU VERSION OF SQRT
-      auto fn = nnfw::cpp14::make_unique<SimpleSQRT>();
-
-      fn->configure(input_alloc, output_alloc);
-
-      builder.append("SQRT", std::move(fn));
-    }
-    else
     {
       if (::internal::arm_compute::isGpuMode())
       {
@@ -3895,14 +3871,11 @@ void Planner::visit(const ::internal::tflite::op::RSQRT::Node &node)
     auto output_alloc = ctx.at(::internal::tflite::operand::Index{param.output_index});
     auto input_alloc = ctx.at(::internal::tflite::operand::Index{param.input_index});
 
-    const ::arm_compute::ActivationLayerInfoEx act_info{
-        ::arm_compute::ActivationLayerInfoEx::ActivationFunction::RSQRT};
-
     if (::internal::arm_compute::isGpuMode())
     {
-      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLActivationLayerEx>();
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLRsqrtLayer>();
 
-      fn->configure(CAST_CL(input_alloc), CAST_CL(output_alloc), act_info);
+      fn->configure(CAST_CL(input_alloc), CAST_CL(output_alloc));
 
       builder.append("RSQRT", std::move(fn));
     }
@@ -3963,10 +3936,10 @@ void Planner::visit(const ::internal::tflite::op::Equal::Node &node)
 
     if (::internal::arm_compute::isGpuMode())
     {
-      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLComparisonOp>();
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLComparison>();
 
       fn->configure(CAST_CL(input1_alloc), CAST_CL(input2_alloc), CAST_CL(output_alloc),
-                    ::arm_compute::ComparisonOperation::EQUAL);
+                    ::arm_compute::ComparisonOperation::Equal);
 
       builder.append("Equal", std::move(fn));
     }
@@ -4037,6 +4010,8 @@ void Planner::visit(const ::internal::tflite::op::TransposeConv::Node &node)
     int ker_index;
     Padding padding;
     Stride stride;
+    uint32_t invalid_horizontal;
+    uint32_t invalid_vertical;
   };
 
   Param param;
@@ -4049,24 +4024,41 @@ void Planner::visit(const ::internal::tflite::op::TransposeConv::Node &node)
   param.stride.vertical = vstride;
 
   param.padding = (padding_type == ANEURALNETWORKS_PADDING_SAME)
-                      ? same_padding(ifm_shape, param.stride, ker_shape.W, ker_shape.H)
+                      ? same_padding(ofm_shape, ifm_shape, param.stride, ker_shape.W, ker_shape.H)
                       : valid_padding();
 
+  param.invalid_horizontal =
+      (padding_type == ANEURALNETWORKS_PADDING_SAME)
+          ? 0
+          : ofm_shape.W - (1 + (ifm_shape.W - 1) * hstride) - (ker_shape.W - 1);
+  param.invalid_vertical =
+      (padding_type == ANEURALNETWORKS_PADDING_SAME)
+          ? 0
+          : ofm_shape.H - (1 + (ifm_shape.H - 1) * param.stride.vertical) - (ker_shape.H - 1);
+
   auto stage = [param](const IAllocationContext &ctx, IExecutionBuilder &builder) {
     auto ofm_alloc = ctx.at(::internal::tflite::operand::Index{param.ofm_index});
     auto ifm_alloc = ctx.at(::internal::tflite::operand::Index{param.ifm_index});
     auto ker_alloc = ctx.at(::internal::tflite::operand::Index{param.ker_index});
 
-    auto fn = nnfw::cpp14::make_unique<SimpleTransposeConv>();
-
     // Only rank 4 is supported
     const int rank = 4;
 
-    auto tconv_info = asPadStringInfo(param.padding, param.stride);
+    if (::internal::arm_compute::isGpuMode())
+    {
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLTransposeConvLayer>();
 
-    fn->configure(ifm_alloc, ker_alloc, ofm_alloc, tconv_info, getARMComputeAxises(rank));
+      auto symmetric_tconv_info = asPadStrideInfo(param.padding, param.stride);
 
-    builder.append("TransposeConv", std::move(fn));
+      // TODO Support WeightInfo in some cases in order to performance improvement
+      fn->configure(CAST_CL(ifm_alloc), CAST_CL(ker_alloc), nullptr, CAST_CL(ofm_alloc),
+                    symmetric_tconv_info, param.invalid_horizontal, param.invalid_vertical);
+      builder.append("TransposeConv", std::move(fn));
+    }
+    else
+    {
+      throw std::runtime_error("Not supported, yet");
+    }
   };
   _builder.addStage(stage);
 }
@@ -4119,7 +4111,7 @@ void Planner::visit(const ::internal::tflite::op::SquaredDifference::Node &node)
 
     if (::internal::arm_compute::isGpuMode())
     {
-      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLSquaredDifference>();
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLElementwiseSquaredDiff>();
 
       fn->configure(CAST_CL(lhs_alloc), CAST_CL(rhs_alloc), CAST_CL(ofm_alloc));
       builder.append("SquaredDifference", std::move(fn));
@@ -4204,62 +4196,58 @@ void Planner::visit(const ::internal::tflite::op::Pad::Node &node)
                                    _ctx.at(paddings_index).type(), _ctx.at(paddings_index).scale(),
                                    _ctx.at(paddings_index).zeroPoint()));
 
-  // initializer for padding
-  {
-    auto pad_type = _ctx.at(paddings_index).type();
-
-    if (pad_type == ANEURALNETWORKS_TENSOR_INT32)
-    {
-      auto pad_base = _ctx.at(paddings_index).data().base();
-      auto pad_size = _ctx.at(paddings_index).data().size();
-      auto pad_shape = _ctx.at(paddings_index).shape().asMatrix();
-
-      // Supported padding for height and width only.
-      auto initializer = std::bind(initMatrixTensor<int32_t>, _1, pad_shape, pad_base, pad_size);
-      _builder.addInitializer(paddings_index, initializer);
-    }
-    else
-    {
-      throw std::runtime_error("Only Int32 datatype is supported for Pad values");
-    }
-  }
-
   // Construct operation parameters
   struct Param
   {
     int ofm_index;
     int ifm_index;
-    int padding_index;
+    ::arm_compute::PixelValue pixel_value;
+    ::arm_compute::PaddingList padding_list;
   };
 
   Param param;
 
   param.ofm_index = ofm_index.asInt();
   param.ifm_index = ifm_index.asInt();
-  param.padding_index = paddings_index.asInt();
 
-  auto stage = [param](const IAllocationContext &ctx, IExecutionBuilder &builder) {
-    auto ofm_alloc = ctx.at(::internal::tflite::operand::Index{param.ofm_index});
-    auto ifm_alloc = ctx.at(::internal::tflite::operand::Index{param.ifm_index});
-    auto pad_alloc = ctx.at(::internal::tflite::operand::Index{param.padding_index});
+  // initializer for padding
+  auto rank = _ctx.at(ifm_index).shape().rank();
+  auto pad_type = _ctx.at(paddings_index).type();
 
-    if (from_env<bool>(std::getenv("USE_SIMPLE_PAD")))
-    {
-      // USE CPU VERSION OF PADLAYER
-      auto rank = 4;
-      auto fn = nnfw::cpp14::make_unique<SimplePadLayer>();
+  if (pad_type == ANEURALNETWORKS_TENSOR_INT32)
+  {
+    auto pad_base = _ctx.at(paddings_index).data().base();
+    auto pad_shape = _ctx.at(paddings_index).shape();
 
-      fn->configure(ifm_alloc, ofm_alloc, pad_alloc, getARMComputeAxises(rank));
+    param.padding_list.resize(rank);
+    for (int32_t n = 0; n < rank; ++n)
+    {
+      const int32_t *from = reinterpret_cast<const int32_t *>(pad_base) + (n * pad_shape.dim(1));
+      auto axis = ToARMComputeAxis(rank, n).value();
 
-      builder.append("PAD", std::move(fn));
+      param.padding_list[axis] = ::arm_compute::PaddingInfo{from[0], from[1]};
     }
-    else
+    auto data_type = asDataType(_ctx.at(ifm_index).type());
+    auto quant_info =
+        asQuantizationInfo(_ctx.at(ifm_index).scale(), _ctx.at(ifm_index).zeroPoint());
+    param.pixel_value = ::arm_compute::PixelValue{0, data_type, quant_info};
+  }
+  else
+  {
+    throw std::runtime_error("Only Int32 datatype is supported for Pad values");
+  }
+
+  auto stage = [param](const IAllocationContext &ctx, IExecutionBuilder &builder) {
+    auto ofm_alloc = ctx.at(::internal::tflite::operand::Index{param.ofm_index});
+    auto ifm_alloc = ctx.at(::internal::tflite::operand::Index{param.ifm_index});
+
     {
       if (::internal::arm_compute::isGpuMode()) // GPU
       {
-        auto fn = nnfw::cpp14::make_unique<::arm_compute::CLPadLayerEx>();
+        auto fn = nnfw::cpp14::make_unique<::arm_compute::CLPadLayer>();
 
-        fn->configure(CAST_CL(ifm_alloc), CAST_CL(ofm_alloc), CAST_CL(pad_alloc));
+        fn->configure(CAST_CL(ifm_alloc), CAST_CL(ofm_alloc), param.padding_list,
+                      param.pixel_value);
 
         builder.append("PAD", std::move(fn));
       }
@@ -4323,17 +4311,6 @@ void Planner::visit(const ::internal::tflite::op::SpaceToDepth::Node &node)
     auto output_alloc = ctx.at(::internal::tflite::operand::Index{param.output_index});
     auto input_alloc = ctx.at(::internal::tflite::operand::Index{param.input_index});
 
-    if (from_env<bool>(std::getenv("USE_SIMPLE_SPACETODEPTH")))
-    {
-      // USE CPU VERSION OF SPACETODEPTH
-      auto rank = 4;
-      auto fn = nnfw::cpp14::make_unique<SimpleSpaceToDepth>();
-
-      fn->configure(input_alloc, output_alloc, param.block_size, getARMComputeAxises(rank));
-
-      builder.append("SpaceToDepth", std::move(fn));
-    }
-    else
     {
       if (::internal::arm_compute::isGpuMode()) // GPU
       {
@@ -4361,25 +4338,39 @@ void Planner::visit(const ::internal::tflite::op::SpaceToBatchND::Node &node)
   const ::internal::tflite::operand::Index block_size_index{node.param().block_size_index};
   const ::internal::tflite::operand::Index padding_size_index{node.param().padding_size_index};
 
+  const auto &output_shape = _ctx.at(output_index).shape();
+  const auto &input_shape = _ctx.at(input_index).shape();
+  const auto &padding_size_shape = _ctx.at(padding_size_index).shape();
+  auto block_size_base = reinterpret_cast<const int32_t *>(_ctx.at(block_size_index).data().base());
+  auto padding_size_base =
+      reinterpret_cast<const int32_t *>(_ctx.at(padding_size_index).data().base());
+
   { // New block for assertions
+    const auto &block_size_shape = _ctx.at(block_size_index).shape();
 
     // Currently, only 4D NHWC input/output op_context are supported.
     // The 4D array need to have exactly 2 spatial dimensions.
     // TODO: Support arbitrary dimension in SpaceToBatchND.
-    assert(_ctx.at(input_index).shape().rank() == 4);
-    assert(_ctx.at(output_index).shape().rank() == 4);
-    assert(_ctx.at(block_size_index).shape().rank() == 1);
-    assert(_ctx.at(padding_size_index).shape().rank() == 2);
-
-    const auto &output_shape = _ctx.at(output_index).shape();
-    const auto &input_shape = _ctx.at(input_index).shape();
-    const auto &block_size_shape = _ctx.at(block_size_index).shape();
-    const auto &padding_size_shape = _ctx.at(padding_size_index).shape();
+    assert(input_shape.rank() == 4);
+    assert(output_shape.rank() == 4);
+    assert(block_size_shape.rank() == 1);
+    assert(padding_size_shape.rank() == 2);
 
     assert(output_shape.dim(3) == input_shape.dim(3));
     assert(block_size_shape.dim(0) == 2);
     assert(padding_size_shape.dim(0) == 2);
     assert(padding_size_shape.dim(1) == 2);
+
+    assert(_ctx.at(block_size_index).hasData() && _ctx.at(padding_size_index).hasData());
+    assert(_ctx.at(block_size_index).type() == ANEURALNETWORKS_TENSOR_INT32);
+    assert(_ctx.at(padding_size_index).type() == ANEURALNETWORKS_TENSOR_INT32);
+
+    assert(block_size_base[0] > 0 && block_size_base[1] > 0);
+    assert(output_shape.dim(0) == input_shape.dim(0) * block_size_base[0] * block_size_base[1]);
+    assert(output_shape.dim(1) ==
+           (input_shape.dim(1) + padding_size_base[0] + padding_size_base[1]) / block_size_base[0]);
+    assert(output_shape.dim(2) ==
+           (input_shape.dim(2) + padding_size_base[2] + padding_size_base[3]) / block_size_base[1]);
   }
 
   // Set Shape Constraints and TensorInfo
@@ -4404,72 +4395,31 @@ void Planner::visit(const ::internal::tflite::op::SpaceToBatchND::Node &node)
                                        _ctx.at(padding_size_index).scale(),
                                        _ctx.at(padding_size_index).zeroPoint()));
 
-  if (_ctx.at(block_size_index).hasData())
-  {
-    const auto rank = _ctx.at(input_index).shape().rank();
-    const auto num_of_block_size = _ctx.at(block_size_index).shape().asVector();
-    auto block_size_base = _ctx.at(block_size_index).data().base();
-    auto block_size_type = _ctx.at(block_size_index).type();
-
-    switch (block_size_type)
-    {
-      case ANEURALNETWORKS_TENSOR_INT32:
-      {
-        auto initializer = [block_size_base, num_of_block_size,
-                            rank](::arm_compute::ITensor &tensor) {
-          assert(num_of_block_size < 4);
-          for (size_t n = 0; n < num_of_block_size; ++n)
-          {
-            const int32_t *from = reinterpret_cast<const int32_t *>(block_size_base) + n;
-            int32_t *into = reinterpret_cast<int32_t *>(
-                tensor.ptr_to_element({ToARMComputeAxis(rank, n + 1).value()}));
-            *into = *from;
-          }
-        };
-        _builder.addInitializer(block_size_index, initializer);
+  { // Append block_size initializer
+    auto initializer = [block_size_base](::arm_compute::ITensor &tensor) {
+      const auto block_size_y = block_size_base[0];
+      const auto block_size_x = block_size_base[1];
 
-        break;
-      }
-      default:
-      {
-        throw std::runtime_error("Not supported");
-      }
-    }
+      auto into = reinterpret_cast<int32_t *>(tensor.ptr_to_element({0}));
+      into[0] = block_size_x;
+      into[1] = block_size_y;
+    };
+    _builder.addInitializer(block_size_index, initializer);
   }
 
-  if (_ctx.at(padding_size_index).hasData())
-  {
-    const auto padding_size_shape = _ctx.at(padding_size_index).shape();
-    const auto rank = _ctx.at(input_index).shape().rank();
-    auto padding_size_base = _ctx.at(padding_size_index).data().base();
-    auto padding_size_type = _ctx.at(padding_size_index).type();
-
-    switch (padding_size_type)
-    {
-      case ANEURALNETWORKS_TENSOR_INT32:
-      {
-        auto initializer = [padding_size_base, padding_size_shape,
-                            rank](::arm_compute::ITensor &tensor) {
-          assert(padding_size_shape.dim(1) == 2);
-          assert(padding_size_shape.dim(0) < 4);
-          for (size_t n = 0; n < padding_size_shape.dim(0); ++n)
-          {
-            const int32_t *from = reinterpret_cast<const int32_t *>(padding_size_base) +
-                                  (n * padding_size_shape.dim(1));
-            int32_t *into = reinterpret_cast<int32_t *>(
-                tensor.ptr_to_element({0, ToARMComputeAxis(rank, n + 1).value()}));
-            into[0] = from[0];
-            into[1] = from[1];
-          }
-        };
-        _builder.addInitializer(padding_size_index, initializer);
-        break;
-      }
-      default:
+  { // Append padding_size initializer
+    auto initializer = [padding_size_base, padding_size_shape](::arm_compute::ITensor &tensor) {
+      // If n == 0, then the axis is the height
+      // If n == 1, then the axis is the width
+      for (size_t n = 0; n < padding_size_shape.dim(0); ++n)
       {
-        throw std::runtime_error("Not supported");
+        const auto from = padding_size_base + (n * padding_size_shape.dim(1));
+        auto into = reinterpret_cast<int32_t *>(tensor.ptr_to_element({0, 1 - n}));
+        into[0] = from[0];
+        into[1] = from[1];
       }
-    }
+    };
+    _builder.addInitializer(padding_size_index, initializer);
   }
 
   // Construct operation parameters
@@ -4496,15 +4446,7 @@ void Planner::visit(const ::internal::tflite::op::SpaceToBatchND::Node &node)
     auto block_size_alloc = ctx.at(::internal::tflite::operand::Index{param.block_size_index});
     auto padding_size_alloc = ctx.at(::internal::tflite::operand::Index{param.padding_size_index});
 
-    // NOTE SimpleSpaceToBatchND is quite slow
-    if (from_env<bool>(std::getenv("USE_SIMPLE_SPACE_TO_BATCH_ND")))
-    {
-      auto fn = nnfw::cpp14::make_unique<SimpleSpaceToBatchND>();
-
-      fn->configure(input_alloc, block_size_alloc, padding_size_alloc, output_alloc);
-      builder.append("SpaceToBatchND", std::move(fn));
-    }
-    else if (::internal::arm_compute::isGpuMode())
+    if (::internal::arm_compute::isGpuMode())
     {
       auto fn = nnfw::cpp14::make_unique<::arm_compute::CLSpaceToBatchND>();
 
@@ -4530,6 +4472,7 @@ void Planner::visit(const ::internal::tflite::op::BatchToSpaceNd::Node &node)
 
   assert(_ctx.at(input_index).shape().rank() == 4);
   assert(_ctx.at(output_index).shape().rank() == 4);
+  assert(_ctx.at(block_size_index).shape().rank() == 1);
   assert(_ctx.at(block_size_index).hasData() == true);
 
   const int32_t *block_size =
@@ -4537,15 +4480,7 @@ void Planner::visit(const ::internal::tflite::op::BatchToSpaceNd::Node &node)
 
   const auto &output_shape = _ctx.at(output_index).shape();
   const auto &input_shape = _ctx.at(input_index).shape();
-
-  assert((_ctx.at(block_size_index).data().size() / sizeof(int32_t)) == 2 && block_size[0] > 0 &&
-         block_size[1] > 0);
-  {
-    assert(output_shape.dim(3) == input_shape.dim(3));
-    assert(output_shape.dim(1) == input_shape.dim(1) * block_size[0]);
-    assert(output_shape.dim(2) == input_shape.dim(2) * block_size[1]);
-    assert(output_shape.dim(0) == input_shape.dim(0) / (block_size[0] * block_size[1]));
-  }
+  const auto &block_size_shape = _ctx.at(block_size_index).shape();
 
   // Set Shape Constraints and TensorInfo
   _builder.addShapeConstr(
@@ -4555,11 +4490,40 @@ void Planner::visit(const ::internal::tflite::op::BatchToSpaceNd::Node &node)
       input_index, asTensorInfo(asTensorShape(input_shape, false), _ctx.at(input_index).type(),
                                 _ctx.at(input_index).scale(), _ctx.at(input_index).zeroPoint()));
 
+  _builder.addShapeConstr(block_size_index, asTensorInfo(asTensorShape(block_size_shape),
+                                                         _ctx.at(block_size_index).type(),
+                                                         _ctx.at(block_size_index).scale(),
+                                                         _ctx.at(block_size_index).zeroPoint()));
+
+  // initializer for block_size
+  {
+    const auto block_size_base =
+        reinterpret_cast<const int32_t *>(_ctx.at(block_size_index).data().base());
+
+    assert(output_shape.dim(3) == input_shape.dim(3));
+    assert(output_shape.dim(1) == input_shape.dim(1) * block_size_base[0]);
+    assert(output_shape.dim(2) == input_shape.dim(2) * block_size_base[1]);
+    assert(output_shape.dim(0) == input_shape.dim(0) / (block_size_base[0] * block_size_base[1]));
+    assert(_ctx.at(block_size_index).type() == ANEURALNETWORKS_TENSOR_INT32);
+
+    assert((_ctx.at(block_size_index).data().size() / sizeof(int32_t)) == 2 &&
+           block_size_base[0] > 0 && block_size_base[1] > 0);
+
+    auto initializer = [block_size_base](::arm_compute::ITensor &tensor) {
+      const int32_t *from = reinterpret_cast<const int32_t *>(block_size_base);
+      int32_t *into = reinterpret_cast<int32_t *>(tensor.ptr_to_element({0}));
+      into[0] = from[1];
+      into[1] = from[0];
+    };
+    _builder.addInitializer(block_size_index, initializer);
+  }
+
   // Construct operation parameters
   struct Param
   {
     int output_index;
     int input_index;
+    int block_size_index;
     const int32_t *block_size;
     int32_t rank;
   };
@@ -4568,26 +4532,20 @@ void Planner::visit(const ::internal::tflite::op::BatchToSpaceNd::Node &node)
 
   param.output_index = output_index.asInt();
   param.input_index = input_index.asInt();
+  param.block_size_index = block_size_index.asInt();
   param.block_size = block_size;
   param.rank = _ctx.at(input_index).shape().rank();
 
   auto stage = [param](const IAllocationContext &ctx, IExecutionBuilder &builder) {
     auto output_alloc = ctx.at(::internal::tflite::operand::Index{param.output_index});
     auto input_alloc = ctx.at(::internal::tflite::operand::Index{param.input_index});
+    auto block_size_alloc = ctx.at(::internal::tflite::operand::Index{param.block_size_index});
 
-    // NOTE SimpleBatchToSpaceND is quite slow, but may be useful for debugging
-    if (from_env<bool>(std::getenv("USE_SIMPLE_BATCH_TO_SPACE_ND")))
-    {
-      auto fn = nnfw::cpp14::make_unique<SimpleBatchToSpaceND>();
-
-      fn->configure(input_alloc, output_alloc, param.block_size, getARMComputeAxises(param.rank));
-      builder.append("BatchToSpaceND", std::move(fn));
-    }
-    else if (::internal::arm_compute::isGpuMode())
+    if (::internal::arm_compute::isGpuMode())
     {
-      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLBatchToSpaceND>();
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLBatchToSpaceLayer>();
 
-      fn->configure(CAST_CL(input_alloc), CAST_CL(output_alloc), param.block_size);
+      fn->configure(CAST_CL(input_alloc), CAST_CL(block_size_alloc), CAST_CL(output_alloc));
       builder.append("BatchToSpaceND", std::move(fn));
     }
     else
@@ -4595,7 +4553,6 @@ void Planner::visit(const ::internal::tflite::op::BatchToSpaceNd::Node &node)
       // TODO Enable NEON Support
       throw std::runtime_error("Not supported, yet");
     }
-
   };
 
   _builder.addStage(stage);
@@ -4651,7 +4608,7 @@ void Planner::visit(const ::internal::tflite::op::L2Normalization::Node &node)
 
     if (::internal::arm_compute::isGpuMode())
     {
-      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLNormalizationLayerEx>();
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLNormalizationLayer>();
 
       fn->configure(CAST_CL(ifm_alloc), CAST_CL(ofm_alloc), norm_info);
 
@@ -4659,7 +4616,7 @@ void Planner::visit(const ::internal::tflite::op::L2Normalization::Node &node)
     }
     else
     {
-      auto fn = nnfw::cpp14::make_unique<::arm_compute::NENormalizationLayerEx>();
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::NENormalizationLayer>();
 
       fn->configure(ifm_alloc, ofm_alloc, norm_info);
 
@@ -4733,7 +4690,7 @@ void Planner::visit(const ::internal::tflite::op::L2Pool2D::Implicit::Node &node
   param.stride.horizontal = hstride;
 
   param.padding = (padding_type == ANEURALNETWORKS_PADDING_SAME)
-                      ? same_padding(ifm_shape, param.stride, kw, kh)
+                      ? same_padding(ifm_shape, ofm_shape, param.stride, kw, kh)
                       : valid_padding();
   param.activation = static_cast<FuseCode>(_ctx.at(activation_index).asScalar<int32_t>());
 
@@ -4743,7 +4700,7 @@ void Planner::visit(const ::internal::tflite::op::L2Pool2D::Implicit::Node &node
 
     ::arm_compute::PoolingLayerInfo info{::arm_compute::PoolingType::L2,
                                          ::arm_compute::Size2D{param.kw, param.kh},
-                                         asPadStringInfo(param.padding, param.stride)};
+                                         asPadStrideInfo(param.padding, param.stride)};
 
     if (::internal::arm_compute::isGpuMode())
     {
@@ -4843,7 +4800,7 @@ void Planner::visit(const ::internal::tflite::op::L2Pool2D::Explicit::Node &node
 
     ::arm_compute::PoolingLayerInfo info{::arm_compute::PoolingType::L2,
                                          ::arm_compute::Size2D{param.kw, param.kh},
-                                         asPadStringInfo(param.padding, param.stride)};
+                                         asPadStrideInfo(param.padding, param.stride)};
 
     if (::internal::arm_compute::isGpuMode())
     {
@@ -4878,7 +4835,7 @@ void Planner::visit(const ::internal::tflite::op::EmbeddingLookup::Node &node)
   const auto &lookups_obj = _ctx.at(lookups_index);
   const auto &values_obj = _ctx.at(values_index);
 
-  // Verify operand here, not at SimpleEmbeddingLookup::configure() to avoid acl's modifying
+  // Verify operand here, not at configure() to avoid acl's modifying
   // TensorShape sometimes(Issue: https://github.sec.samsung.net/STAR/nnfw/issues/729)
   {
     assert(lookups_obj.type() == ANEURALNETWORKS_TENSOR_INT32);
@@ -4930,15 +4887,7 @@ void Planner::visit(const ::internal::tflite::op::EmbeddingLookup::Node &node)
     auto lookups_alloc = ctx.at(::internal::tflite::operand::Index{param.lookups_index});
     auto values_alloc = ctx.at(::internal::tflite::operand::Index{param.values_index});
 
-    if (from_env<bool>(std::getenv("USE_SIMPLE_EMBEDDINGLOOKUP")))
-    {
-      auto fn = nnfw::cpp14::make_unique<SimpleEmbeddingLookup>();
-
-      fn->configure(lookups_alloc, values_alloc, output_alloc);
-
-      builder.append("EmbeddingLookup", std::move(fn));
-    }
-    else if (::internal::arm_compute::isGpuMode())
+    if (::internal::arm_compute::isGpuMode())
     {
       auto fn = nnfw::cpp14::make_unique<::arm_compute::CLEmbeddingLookup>();
 
@@ -5034,15 +4983,7 @@ void Planner::visit(const ::internal::tflite::op::HashtableLookup::Node &node)
     auto values_alloc = ctx.at(::internal::tflite::operand::Index{param.values_index});
     auto keys_alloc = ctx.at(::internal::tflite::operand::Index{param.keys_index});
 
-    if (from_env<bool>(std::getenv("USE_SIMPLE_HASHTABLELOOKUP")))
-    {
-      auto fn = nnfw::cpp14::make_unique<SimpleHashtableLookupLayer>();
-
-      fn->configure(lookups_alloc, keys_alloc, values_alloc, output_alloc, hits_alloc);
-
-      builder.append("HashtableLookup", std::move(fn));
-    }
-    else if (::internal::arm_compute::isGpuMode()) // GPU
+    if (::internal::arm_compute::isGpuMode()) // GPU
     {
       auto fn = nnfw::cpp14::make_unique<::arm_compute::CLHashtableLookup>();
 
@@ -5103,12 +5044,12 @@ void Planner::visit(const ::internal::tflite::op::LocalResponseNormalization::No
     auto ofm_alloc = ctx.at(::internal::tflite::operand::Index{param.ofm_index});
     auto ifm_alloc = ctx.at(::internal::tflite::operand::Index{param.ifm_index});
 
-    const auto norm_info =
-        ::arm_compute::NormalizationLayerInfo(::arm_compute::NormType::CROSS_MAP, param.radius,
-                                              param.alpha, param.beta, param.bias, false);
+    const auto norm_info = ::arm_compute::NormalizationLayerInfo(::arm_compute::NormType::CROSS_MAP,
+                                                                 param.radius * 2 + 1, param.alpha,
+                                                                 param.beta, param.bias, false);
     if (::internal::arm_compute::isGpuMode())
     {
-      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLNormalizationLayerEx>();
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLNormalizationLayer>();
 
       fn->configure(CAST_CL(ifm_alloc), CAST_CL(ofm_alloc), norm_info);
 
@@ -5116,7 +5057,7 @@ void Planner::visit(const ::internal::tflite::op::LocalResponseNormalization::No
     }
     else
     {
-      auto fn = nnfw::cpp14::make_unique<::arm_compute::NENormalizationLayerEx>();
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::NENormalizationLayer>();
 
       fn->configure(ifm_alloc, ofm_alloc, norm_info);
 
@@ -5177,17 +5118,6 @@ void Planner::visit(const ::internal::tflite::op::DepthToSpace::Node &node)
     auto output_alloc = ctx.at(::internal::tflite::operand::Index{param.output_index});
     auto input_alloc = ctx.at(::internal::tflite::operand::Index{param.input_index});
 
-    if (from_env<bool>(std::getenv("USE_SIMPLE_DEPTHTOSPACE")))
-    {
-      // USE CPU VERSION OF DEPTHTOSPACE
-      auto rank = 4;
-      auto fn = nnfw::cpp14::make_unique<SimpleDepthToSpace>();
-
-      fn->configure(input_alloc, output_alloc, param.block_size, getARMComputeAxises(rank));
-
-      builder.append("DepthToSpace", std::move(fn));
-    }
-    else
     {
       if (::internal::arm_compute::isGpuMode()) // GPU
       {
@@ -5220,6 +5150,13 @@ void Planner::visit(const ::internal::tflite::op::Unpack::Node &node)
 
   int32_t axis =
       _ctx.at(::internal::tflite::operand::Index{node.param().axis_index}).asScalar<int32_t>();
+  // Negatige axis is supported, -1 implies R-1 axis where R is input rank
+  if (axis < 0)
+  {
+    axis += input_rank;
+    assert(axis >= 0);
+  }
+  uint32_t axis_uint = ToARMComputeAxis(input_rank, axis).value();
   // int32_t num_split =
   // _ctx.at(::internal::tflite::operand::Index{node.param().num_split_index}).asScalar<int32_t>();
 
@@ -5234,14 +5171,19 @@ void Planner::visit(const ::internal::tflite::op::Unpack::Node &node)
   {
     std::vector<int32_t> ofm_indexes;
     int ifm_index;
-    int axis;
+    uint32_t axis;
   };
 
   if (input_rank == 4)
   {
+    // TODO: generate test case for this and generalize 4D method all cases.
+    throw std::runtime_error("UNPACK_4D not implemented");
+  }
+  else if (input_rank == 3)
+  {
     Param param;
     param.ifm_index = ifm_index.asInt();
-    param.axis = axis;
+    param.axis = axis_uint;
     for (const auto &index : node.param().ofm_indexes)
     {
       param.ofm_indexes.push_back(index);
@@ -5252,7 +5194,7 @@ void Planner::visit(const ::internal::tflite::op::Unpack::Node &node)
 
       if (::internal::arm_compute::isGpuMode())
       {
-        auto fn = nnfw::cpp14::make_unique<SimpleUnpackLayer>();
+        auto fn = nnfw::cpp14::make_unique<::arm_compute::CLUnstack>();
         std::vector<::arm_compute::ICLTensor *> outputs;
         for (const auto &index : param.ofm_indexes)
         {
@@ -5269,11 +5211,6 @@ void Planner::visit(const ::internal::tflite::op::Unpack::Node &node)
 
     _builder.addStage(stage);
   }
-  else if (input_rank == 3)
-  {
-    // TODO: generate test case for this and generalize 4D method all cases.
-    throw std::runtime_error("UNPACK_3D not implemented");
-  }
   else if (input_rank == 2)
   {
     throw std::runtime_error("UNPACK_2D not implemented");
@@ -5307,25 +5244,33 @@ void Planner::visit(const ::internal::tflite::op::Pack::Node &node)
 
   int32_t axis =
       _ctx.at(::internal::tflite::operand::Index{node.param().axis_index}).asScalar<int32_t>();
+  // A negative axis implies axis from the end.
+  // For example, axis = -1 implies the first axis from the end, i.e. axis = Rank - 1.
+  // Similarly, axis = -2 imples second axis from the end, i.e. axis = Rank - 2.
+  if (axis < 0)
+  {
+    axis += output_rank;
+    assert(axis >= 0);
+  }
+  uint32_t axis_uint = ToARMComputeAxis(output_rank, axis).value();
 
   struct Param
   {
     std::vector<int32_t> ifm_indexes;
     int ofm_index;
-    int axis;
+    uint32_t axis;
   };
 
   if (input_rank == 3)
   {
+    // TODO: generate test case for this and generalize 4D method all cases.
+    throw std::runtime_error("PACK_3D not implemented");
+  }
+  else if (input_rank == 2)
+  {
     Param param;
     param.ofm_index = ofm_index.asInt();
-    param.axis = axis;
-
-    // TODO: Fix this once all permutations are present.
-    if (param.axis != 0)
-    {
-      throw std::runtime_error("This axis not supported, some 4D permutations are missing");
-    }
+    param.axis = axis_uint;
 
     for (const auto &index : node.param().ifm_indexes)
     {
@@ -5337,14 +5282,14 @@ void Planner::visit(const ::internal::tflite::op::Pack::Node &node)
 
       if (::internal::arm_compute::isGpuMode())
       {
-        auto fn = nnfw::cpp14::make_unique<SimplePackLayer>();
+        auto fn = nnfw::cpp14::make_unique<::arm_compute::CLStackLayer>();
         std::vector<::arm_compute::ICLTensor *> inputs;
         for (const auto &index : param.ifm_indexes)
         {
           auto input_alloc = ctx.at(::internal::tflite::operand::Index{index});
           inputs.push_back(CAST_CL(input_alloc));
         }
-        fn->configure(inputs, CAST_CL(output_alloc), param.axis);
+        fn->configure(inputs, param.axis, CAST_CL(output_alloc));
 
         builder.append("Pack", std::move(fn));
       }
@@ -5354,11 +5299,6 @@ void Planner::visit(const ::internal::tflite::op::Pack::Node &node)
 
     _builder.addStage(stage);
   }
-  else if (input_rank == 2)
-  {
-    // TODO: generate test case for this and generalize 4D method all cases.
-    throw std::runtime_error("PACK_2D not implemented");
-  }
   else if (input_rank == 1)
   {
     throw std::runtime_error("PACK_1D not implemented");
@@ -5398,15 +5338,7 @@ void Planner::visit(const ::internal::tflite::op::Neg::Node &node)
     auto ofm_alloc = ctx.at(::internal::tflite::operand::Index{param.ofm_index});
     auto ifm_alloc = ctx.at(::internal::tflite::operand::Index{param.ifm_index});
 
-    // NOTE SimpleNeg is quite slow, but may be useful for debugging
-    if (from_env<bool>(std::getenv("USE_SIMPLE_NEG")))
-    {
-      auto fn = nnfw::cpp14::make_unique<SimpleNeg>();
-
-      fn->configure(ifm_alloc, ofm_alloc);
-      builder.append("Neg", std::move(fn));
-    }
-    else if (::internal::arm_compute::isGpuMode())
+    if (::internal::arm_compute::isGpuMode())
     {
       auto fn = nnfw::cpp14::make_unique<::arm_compute::CLNeg>();
 
@@ -5455,7 +5387,7 @@ void Planner::visit(const ::internal::tflite::op::Exp::Node &node)
 
     if (::internal::arm_compute::isGpuMode())
     {
-      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLExp>();
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLExpLayer>();
 
       fn->configure(CAST_CL(ifm_alloc), CAST_CL(ofm_alloc));
 
@@ -5596,8 +5528,58 @@ void Planner::visit(const ::internal::tflite::op::ReduceSum::Node &node)
 
 void Planner::visit(const ::internal::tflite::op::Abs::Node &node)
 {
-  // TODO Implement Abs op
-  throw std::runtime_error("Not supported yet");
+  VERBOSE(Tanh) << "Configure Abs operation" << std::endl;
+
+  const ::internal::tflite::operand::Index output_index{node.param().output_index};
+  const ::internal::tflite::operand::Index input_index{node.param().input_index};
+
+  // Set shape constraints
+  _builder.addShapeConstr(output_index,
+                          asTensorInfo(asTensorShape(_ctx.at(output_index).shape()),
+                                       _ctx.at(output_index).type(), _ctx.at(output_index).scale(),
+                                       _ctx.at(output_index).zeroPoint()));
+  _builder.addShapeConstr(input_index,
+                          asTensorInfo(asTensorShape(_ctx.at(input_index).shape()),
+                                       _ctx.at(input_index).type(), _ctx.at(output_index).scale(),
+                                       _ctx.at(output_index).zeroPoint()));
+
+  struct Param
+  {
+    int output_index;
+    int input_index;
+  };
+
+  Param param;
+
+  param.output_index = output_index.asInt();
+  param.input_index = input_index.asInt();
+
+  auto stage = [param](const IAllocationContext &ctx, IExecutionBuilder &builder) {
+    auto output_alloc = ctx.at(::internal::tflite::operand::Index{param.output_index});
+    auto input_alloc = ctx.at(::internal::tflite::operand::Index{param.input_index});
+
+    const ::arm_compute::ActivationLayerInfo act_info{
+        ::arm_compute::ActivationLayerInfo::ActivationFunction::ABS};
+
+    if (::internal::arm_compute::isGpuMode())
+    {
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLActivationLayer>();
+
+      fn->configure(CAST_CL(input_alloc), CAST_CL(output_alloc), act_info);
+
+      builder.append("Abs", std::move(fn));
+    }
+    else
+    {
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::NEActivationLayer>();
+
+      fn->configure(input_alloc, output_alloc, act_info);
+
+      builder.append("Abs", std::move(fn));
+    }
+  };
+
+  _builder.addStage(stage);
 }
 
 void Planner::visit(const ::internal::tflite::op::NotEqual::Node &node)
@@ -5650,10 +5632,10 @@ void Planner::visit(const ::internal::tflite::op::NotEqual::Node &node)
 
     if (::internal::arm_compute::isGpuMode())
     {
-      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLComparisonOp>();
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLComparison>();
 
       fn->configure(CAST_CL(input1_alloc), CAST_CL(input2_alloc), CAST_CL(output_alloc),
-                    ::arm_compute::ComparisonOperation::NOT_EQUAL);
+                    ::arm_compute::ComparisonOperation::NotEqual);
 
       builder.append("NotEqual", std::move(fn));
     }
@@ -5738,8 +5720,50 @@ void Planner::visit(const ::internal::tflite::op::LogicalAnd::Node &node)
 
 void Planner::visit(const ::internal::tflite::op::LogicalNot::Node &node)
 {
-  // TODO Implement LogicalNot op
-  throw std::runtime_error("Not supported yet");
+  const ::internal::tflite::operand::Index output_index{node.param().output_index};
+  const ::internal::tflite::operand::Index input_index{node.param().input_index};
+
+  // Set Shape Constraints and TensorInfo
+  _builder.addShapeConstr(output_index,
+                          asTensorInfo(asTensorShape(_ctx.at(output_index).shape()),
+                                       ::arm_compute::DataType::U8, _ctx.at(output_index).scale(),
+                                       _ctx.at(output_index).zeroPoint()));
+
+  _builder.addShapeConstr(input_index,
+                          asTensorInfo(asTensorShape(_ctx.at(input_index).shape()),
+                                       ::arm_compute::DataType::U8, _ctx.at(input_index).scale(),
+                                       _ctx.at(input_index).zeroPoint()));
+
+  // Construct operation parameters
+  struct Param
+  {
+    int output_index;
+    int input_index;
+  };
+
+  Param param;
+
+  param.output_index = output_index.asInt();
+  param.input_index = input_index.asInt();
+  auto stage = [param](const IAllocationContext &ctx, IExecutionBuilder &builder) {
+    auto output_alloc = ctx.at(::internal::tflite::operand::Index{param.output_index});
+    auto input_alloc = ctx.at(::internal::tflite::operand::Index{param.input_index});
+    if (::internal::arm_compute::isGpuMode())
+    {
+      auto fn = nnfw::cpp14::make_unique<::arm_compute::CLBitwiseNot>();
+
+      fn->configure(CAST_CL(input_alloc), CAST_CL(output_alloc));
+
+      builder.append("LogicalNot", std::move(fn));
+    }
+    else
+    {
+      // TODO Add NEON support
+
+      throw std::runtime_error("Not supported yet");
+    }
+  };
+  _builder.addStage(stage);
 }
 
 void Planner::visit(const ::internal::tflite::op::LogicalOr::Node &node)
diff --git a/runtimes/pure_arm_compute/src/internal/arm_compute/Cast.cc b/runtimes/pure_arm_compute/src/internal/arm_compute/Cast.cc
index ff2f79309..1a5c735ee 100644
--- a/runtimes/pure_arm_compute/src/internal/arm_compute/Cast.cc
+++ b/runtimes/pure_arm_compute/src/internal/arm_compute/Cast.cc
@@ -55,36 +55,16 @@
   int new_pv[4] = {0};
   ::arm_compute::Coordinates axises = getARMComputeAxises(rank);
 
-  if (rank == 4)
+  for (uint32_t i = 0; i < rank; ++i)
   {
-    /**
-    axises = {3,1,0,2}
-       NNAPI      PermutationVector
-    N   0               3
-    H   1               1
-    W   2               0
-    C   3               2
-    **/
-    new_pv[0] = axises[runtime_pv[2]];
-    new_pv[1] = axises[runtime_pv[1]];
-    new_pv[2] = axises[runtime_pv[3]];
-    new_pv[3] = axises[runtime_pv[0]];
-  }
-  else
-  {
-    /**
-    mapping/axises = {rank-1 to 0}
-    CHW --------> WHC
-    or
-    WH ----------> HW
-    **/
-    for (int id = 0; id < rank; ++id)
-    {
-      new_pv[id] = axises[runtime_pv[rank - id - 1]];
-    }
+    new_pv[axises[i]] = ToARMComputeAxis(rank, runtime_pv[i]).value();
   }
 
-  return ::arm_compute::PermutationVector{new_pv[0], new_pv[1], new_pv[2], new_pv[3]};
+  ::arm_compute::PermutationVector ACL_PV =
+      ::arm_compute::PermutationVector{new_pv[0], new_pv[1], new_pv[2], new_pv[3]};
+  ACL_PV.set_num_dimensions(rank);
+
+  return ACL_PV;
 }
 
 ::arm_compute::TensorShape asTensorShape(const internal::tflite::operand::Shape &shape,
@@ -163,3 +143,10 @@
   return ::arm_compute::TensorInfo(shape, 1, asDataType(type),
                                    asQuantizationInfo(scale, zeroPoint));
 }
+
+::arm_compute::TensorInfo asTensorInfo(const ::arm_compute::TensorShape &shape,
+                                       const ::arm_compute::DataType &type, const float scale,
+                                       const int32_t zeroPoint)
+{
+  return ::arm_compute::TensorInfo(shape, 1, type, asQuantizationInfo(scale, zeroPoint));
+}
diff --git a/runtimes/pure_arm_compute/src/internal/arm_compute/Cast.h b/runtimes/pure_arm_compute/src/internal/arm_compute/Cast.h
index 42b547feb..211a6ac87 100644
--- a/runtimes/pure_arm_compute/src/internal/arm_compute/Cast.h
+++ b/runtimes/pure_arm_compute/src/internal/arm_compute/Cast.h
@@ -100,6 +100,18 @@
                                        const float scale = 0.0f, const int32_t zeroPoint = 0);
 
 /**
+ * @brief     Cast from internal tensor info to tensor info object of arm compute
+ * @param[in] shape     Tensor shape
+ * @param[in] type      Tensor type of arm compute
+ * @param[in] scale     Scale of tensor quantization
+ * @param[in] zeroPoint Zeropoint of tensor quantization
+ * @return    TensorInfo object of arm compute
+ */
+::arm_compute::TensorInfo asTensorInfo(const ::arm_compute::TensorShape &shape,
+                                       const ::arm_compute::DataType &type, const float scale,
+                                       const int32_t zeroPoint);
+
+/**
  * @brief       Set value to arm compute tensor with casting
  * @param[in]   value Value to set
  * @param[out]  to    Target tensor of arm compute
diff --git a/runtimes/pure_arm_compute/src/internal/layers/FeatureLoggingLayer.h b/runtimes/pure_arm_compute/src/internal/layers/FeatureLoggingLayer.h
deleted file mode 100644
index 83ae7c17b..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/FeatureLoggingLayer.h
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file        FeatureLoggingLayer.h
- * @brief       This file contains FeatureLoggingLayer class
- * @ingroup     COM_AI_RUNTIME
- */
-
-#ifndef __FEATURE_LOGGING_LAYER_H__
-#define __FEATURE_LOGGING_LAYER_H__
-
-#include <arm_compute/core/ITensor.h>
-#include <arm_compute/runtime/IFunction.h>
-#include <arm_compute/runtime/CL/CLScheduler.h>
-
-#include <iostream>
-#include <iomanip>
-#include <limits>
-
-#include "internal/arm_compute.h"
-
-/**
- * @brief Class to run FeatureLogging Layer
- */
-class FeatureLoggingLayer : public ::arm_compute::IFunction
-{
-public:
-  FeatureLoggingLayer(void) : _tag(""), _target(nullptr)
-  {
-    // DO NOTHING
-  }
-
-public:
-  /**
-   * @brief Configure the layer
-   * @param[in] tag Text tag for this layer
-   * @param[in] target The feature tensor to be printed
-   * @return N/A
-   */
-  void configure(const std::string &tag, ::arm_compute::ITensor *target)
-  {
-    _tag = tag;
-    _target = target;
-  }
-
-public:
-  /**
-   * @brief Run the operation. Must be called after configure().
-   * @return N/A
-   */
-  void run(void) override
-  {
-    if (::internal::arm_compute::isGpuMode())
-    {
-      auto &q = ::arm_compute::CLScheduler::get().queue();
-      CAST_CL(_target)->map(q);
-    }
-
-    const size_t W = _target->info()->dimension(0);
-    const size_t H = _target->info()->dimension(1);
-    const size_t C = _target->info()->dimension(2);
-
-    std::cout << _tag << std::endl;
-
-    for (size_t ch = 0; ch < C; ++ch)
-    {
-      std::cout << "Channel #" << ch << std::endl;
-      for (size_t row = 0; row < H; ++row)
-      {
-        for (size_t col = 0; col < W; ++col)
-        {
-          const arm_compute::Coordinates id{col, row, ch};
-          const auto value = *reinterpret_cast<float *>(_target->ptr_to_element(id));
-
-          // TODO Generalize this to integer types
-          std::cout << std::setprecision(2);
-          std::cout << std::setw(7);
-          std::cout << std::setfill(' ');
-          std::cout << std::fixed;
-          std::cout << value << " ";
-        }
-        std::cout << std::endl;
-      }
-      std::cout << std::endl;
-    }
-
-    if (::internal::arm_compute::isGpuMode())
-    {
-      auto &q = ::arm_compute::CLScheduler::get().queue();
-      CAST_CL(_target)->unmap(q);
-    }
-  }
-
-private:
-  std::string _tag;
-  ::arm_compute::ITensor *_target;
-};
-
-#endif // __FEATURE_LOGGING_LAYER_H__
diff --git a/runtimes/pure_arm_compute/src/internal/layers/GenericFullyConnectedLayer.cc b/runtimes/pure_arm_compute/src/internal/layers/GenericFullyConnectedLayer.cc
deleted file mode 100644
index 28789a801..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/GenericFullyConnectedLayer.cc
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "GenericFullyConnectedLayer.h"
-#include "internal/arm_compute.h"
-
-void GenericFullyConnectedLayer::configure(::arm_compute::ITensor *input,
-                                           ::arm_compute::ITensor *weights,
-                                           ::arm_compute::ITensor *biases,
-                                           ::arm_compute::ITensor *output, bool needs_reshape,
-                                           ::arm_compute::TensorShape reshape)
-{
-  _input = input;
-  _weights = weights;
-  _biases = biases;
-  _output = output;
-  _needs_reshape = needs_reshape;
-
-  // TODO Too many duplicated code. Revise below code.
-  if (::internal::arm_compute::isGpuMode())
-  {
-    if (_needs_reshape)
-    {
-      // reshape
-      auto_init_if_empty(*_cl_buffer.info(), _input->info()->clone()->set_tensor_shape(reshape));
-      _generic_reshape.configure(CAST_CL(_input), &_cl_buffer);
-
-      _cl_fc.configure(&_cl_buffer, CAST_CL(_weights), CAST_CL(_biases), CAST_CL(_output));
-
-      // NOTE _cl_buffer is inaccessible from outside, and thus it is safe to invoke allocate here.
-      _cl_buffer.allocator()->allocate();
-    }
-    else
-    {
-      _cl_fc.configure(CAST_CL(_input), CAST_CL(_weights), CAST_CL(_biases), CAST_CL(_output));
-    }
-  }
-  else
-  {
-    if (_needs_reshape)
-    {
-      // reshape
-      auto_init_if_empty(*_neon_buffer.info(), _input->info()->clone()->set_tensor_shape(reshape));
-      _generic_reshape.configure(_input, &_neon_buffer);
-
-      _neon_fc.configure(&_neon_buffer, _weights, _biases, _output);
-
-      // NOTE _neon_buffer is inaccessible from outside, and thus it is safe to invoke allocate
-      // here.
-      _neon_buffer.allocator()->allocate();
-    }
-    else
-    {
-      _neon_fc.configure(_input, _weights, _biases, _output);
-    }
-  }
-}
-
-void GenericFullyConnectedLayer::run(void)
-{
-  if (::internal::arm_compute::isGpuMode())
-  {
-    if (_needs_reshape)
-      _generic_reshape.run();
-
-    _cl_fc.run();
-  }
-  else
-  {
-    if (_needs_reshape)
-      _generic_reshape.run();
-
-    _neon_fc.run();
-  }
-}
diff --git a/runtimes/pure_arm_compute/src/internal/layers/GenericFullyConnectedLayer.h b/runtimes/pure_arm_compute/src/internal/layers/GenericFullyConnectedLayer.h
deleted file mode 100644
index f1519f54d..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/GenericFullyConnectedLayer.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file        GenericFullyConnectedLayer.h
- * @brief       This file contains GenericFullyConnectedLayer class
- * @ingroup     COM_AI_RUNTIME
- */
-
-#ifndef __GENERIC_FULLY_CONNECTED_LAYER_H__
-#define __GENERIC_FULLY_CONNECTED_LAYER_H__
-
-#include <arm_compute/runtime/CL/functions/CLFullyConnectedLayer.h>
-#include <arm_compute/runtime/NEON/functions/NEFullyConnectedLayer.h>
-#include "internal/layers/GenericReshapeLayer.h"
-
-/**
- * @brief Class to run FullyConnected Layer with both CPU and GPU
- */
-class GenericFullyConnectedLayer : public ::arm_compute::IFunction
-{
-public:
-  GenericFullyConnectedLayer(void)
-      : _input(nullptr), _weights(nullptr), _biases(nullptr), _output(nullptr), _cl_buffer{},
-        _neon_buffer{}, _cl_fc{}, _neon_fc{}, _generic_reshape{}, _needs_reshape(false)
-  {
-    // DO NOTHING
-  }
-
-public:
-  /**
-   * @brief Configure the layer
-   * @param[in] input The source tensor
-   * @param[in] weights The tensor that is filled with weight values
-   * @param[in] biases The tensor that is filled with biase values
-   * @param[in] output The destination tensor
-   * @param[in] needs_reshape Whether it needs to be reshaped or not
-   * @param[in] reshape The tensor shape to be reshaped. Only valid when needs_reshape is true.
-   * @return N/A
-   */
-  void configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *weights,
-                 ::arm_compute::ITensor *biases, ::arm_compute::ITensor *output, bool needs_reshape,
-                 ::arm_compute::TensorShape reshape);
-
-public:
-  /**
-   * @brief Run the operation. Must be called after configure().
-   * @return N/A
-   */
-  void run(void) override;
-
-private:
-  ::arm_compute::ITensor *_input;
-  ::arm_compute::ITensor *_weights;
-  ::arm_compute::ITensor *_biases;
-  ::arm_compute::ITensor *_output;
-
-  // buffer for reshaping input tensor
-  ::arm_compute::CLTensor _cl_buffer;
-  ::arm_compute::Tensor _neon_buffer;
-
-private:
-  ::arm_compute::CLFullyConnectedLayer _cl_fc;
-  ::arm_compute::NEFullyConnectedLayer _neon_fc;
-  GenericReshapeLayer _generic_reshape;
-  bool _needs_reshape;
-};
-
-#endif // __GENERIC_FULLY_CONNECTED_LAYER_H__
diff --git a/runtimes/pure_arm_compute/src/internal/layers/GenericReshapeLayer.cc b/runtimes/pure_arm_compute/src/internal/layers/GenericReshapeLayer.cc
deleted file mode 100644
index c38c2e9e3..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/GenericReshapeLayer.cc
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "GenericReshapeLayer.h"
-#include "internal/arm_compute.h"
-
-void GenericReshapeLayer::configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output)
-{
-  _input = input;
-  _output = output;
-
-  // NOTE This vector comes from CLPermuteKernel implementation
-  //
-  // This implementation permutes a tensor of shape W / H / C into another tensor of shape C / W / H
-  //
-  //     Original | Permuted
-  // 0 | W        | C (from 2)
-  // 1 | H        | W (from 0)
-  // 2 | C        | H (from 1)
-  //
-  const ::arm_compute::PermutationVector pv{2, 0, 1};
-
-  if (::internal::arm_compute::isGpuMode())
-  {
-    _cl_permute.configure(CAST_CL(input), &_cl_permuted, pv);
-    _cl_reshape.configure(&_cl_permuted, CAST_CL(output));
-
-    // NOTE _permuted is inaccessible from outside, and thus it is safe to invoke allocate here.
-    _cl_permuted.allocator()->allocate();
-  }
-  else
-  {
-    _neon_permute.configure(input, &_neon_permuted, pv);
-    _neon_reshape.configure(&_neon_permuted, output);
-
-    // NOTE _permuted is inaccessible from outside, and thus it is safe to invoke allocate here.
-    _neon_permuted.allocator()->allocate();
-  }
-}
-
-void GenericReshapeLayer::run(void)
-{
-  if (::internal::arm_compute::isGpuMode())
-  {
-    _cl_permute.run();
-    _cl_reshape.run();
-  }
-  else
-  {
-    _neon_permute.run();
-    _neon_reshape.run();
-  }
-}
diff --git a/runtimes/pure_arm_compute/src/internal/layers/GenericReshapeLayer.h b/runtimes/pure_arm_compute/src/internal/layers/GenericReshapeLayer.h
deleted file mode 100644
index a22c14c8b..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/GenericReshapeLayer.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file        GenericReshapeLayer.h
- * @brief       This file contains GenericReshapeLayer class
- * @ingroup     COM_AI_RUNTIME
- */
-
-#ifndef __GENERIC_RESHAPE_LAYER_H__
-#define __GENERIC_RESHAPE_LAYER_H__
-
-#include <arm_compute/runtime/Tensor.h>
-#include <arm_compute/runtime/CL/CLTensor.h>
-
-#include <arm_compute/runtime/CL/functions/CLPermute.h>
-#include <arm_compute/runtime/CL/functions/CLReshapeLayer.h>
-#include <arm_compute/runtime/NEON/functions/NEPermute.h>
-#include <arm_compute/runtime/NEON/functions/NEReshapeLayer.h>
-
-/**
- * @brief Class to run Reshape Layer with both CPU and GPU
- */
-class GenericReshapeLayer : public ::arm_compute::IFunction
-{
-public:
-  GenericReshapeLayer(void)
-      : _input(nullptr), _output(nullptr), _cl_permuted{}, _neon_permuted{}, _cl_permute{},
-        _cl_reshape{}, _neon_permute{}, _neon_reshape{}
-  {
-    // DO NOTHING
-  }
-
-public:
-  /**
-   * @brief Configure the layer
-   * @param[in] input The source tensor
-   * @param[in] output The destination tensor
-   * @return N/A
-   */
-  void configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output);
-
-public:
-  /**
-   * @brief Run the operation. Must be called after configure().
-   * @return N/A
-   */
-  void run(void) override;
-
-private:
-  ::arm_compute::ITensor *_input;
-  ::arm_compute::ITensor *_output;
-  ::arm_compute::CLTensor _cl_permuted;
-  ::arm_compute::Tensor _neon_permuted;
-
-private:
-  ::arm_compute::CLPermute _cl_permute;
-  ::arm_compute::CLReshapeLayer _cl_reshape;
-
-  ::arm_compute::NEPermute _neon_permute;
-  ::arm_compute::NEReshapeLayer _neon_reshape;
-};
-
-#endif // __GENERIC_RESHAPE_LAYER_H__
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleArgMinMax.cc b/runtimes/pure_arm_compute/src/internal/layers/SimpleArgMinMax.cc
deleted file mode 100644
index 6d348e814..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleArgMinMax.cc
+++ /dev/null
@@ -1,181 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "internal/layers/SimpleArgMinMax.h"
-#include <arm_compute/runtime/CL/CLScheduler.h>
-
-void SimpleArgMinMax::configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output,
-                                std::vector<uint32_t> axis, ::arm_compute::ArgOperation op)
-{
-  _input = input;
-  _output = output;
-  _axis = axis;
-  _input_rank = input->info()->num_dimensions();
-  _op_type = op;
-}
-
-inline const ::arm_compute::TensorShape
-inferOutputShape(const ::arm_compute::TensorShape &input_shape, const std::vector<uint32_t> &axis,
-                 int input_rank)
-{
-  ::arm_compute::TensorShape out_shape{};
-  size_t dim = 1;
-  for (int i = 0; i < input_rank; ++i)
-  {
-    dim = input_shape[i];
-    out_shape.set(i, dim);
-  }
-
-  for (int i = 0; i < axis.size(); ++i)
-  {
-    out_shape.set(axis[i], 1);
-  }
-
-  return out_shape;
-}
-
-template <typename T>
-inline T getArgMinMaxEle(const ::arm_compute::ITensor *input,
-                         const ::arm_compute::TensorShape &input_shape,
-                         const ::arm_compute::TensorShape &output_shape, const size_t b,
-                         const size_t d, const size_t h, const size_t w, const int axis,
-                         const ::arm_compute::ArgOperation op_type)
-{
-  // If output[dimention] == 1, will check all values of that dimension because of reducing
-  // dimension.
-  // Else will check only one value.
-  const size_t start_b = output_shape[3] == 1 ? 0 : b;
-  const size_t start_d = output_shape[2] == 1 ? 0 : d;
-  const size_t start_h = output_shape[1] == 1 ? 0 : h;
-  const size_t start_w = output_shape[0] == 1 ? 0 : w;
-  const size_t stop_b = output_shape[3] == 1 ? input_shape[3] - 1 : b;
-  const size_t stop_d = output_shape[2] == 1 ? input_shape[2] - 1 : d;
-  const size_t stop_h = output_shape[1] == 1 ? input_shape[1] - 1 : h;
-  const size_t stop_w = output_shape[0] == 1 ? input_shape[0] - 1 : w;
-
-  ::arm_compute::Coordinates id{w, h, d, b};
-  ::arm_compute::Coordinates min_max_id{w, h, d, b};
-
-  T value = *reinterpret_cast<T *>(input->ptr_to_element(id));
-  T tval = *reinterpret_cast<T *>(input->ptr_to_element(id));
-
-  for (size_t in_b = start_b; in_b <= stop_b; ++in_b)
-  {
-    id.set(3, in_b);
-    for (size_t in_d = start_d; in_d <= stop_d; ++in_d)
-    {
-      id.set(2, in_d);
-      for (size_t in_h = start_h; in_h <= stop_h; ++in_h)
-      {
-        id.set(1, in_h);
-        for (size_t in_w = start_w; in_w <= stop_w; ++in_w)
-        {
-          id.set(0, in_w);
-          if (op_type == ::arm_compute::ArgOperation::MIN)
-          {
-            value = std::min<T>(value, *reinterpret_cast<T *>(input->ptr_to_element(id)));
-          }
-          else if (op_type == ::arm_compute::ArgOperation::MAX)
-          {
-            value = std::max<T>(value, *reinterpret_cast<T *>(input->ptr_to_element(id)));
-          }
-          else
-            throw std::runtime_error("This Arg operation is not supported, yet");
-
-          if (tval != value)
-          {
-            min_max_id = id;
-            tval = value;
-          }
-        }
-      }
-    }
-  }
-
-  return min_max_id[axis];
-}
-
-template <typename T>
-inline void
-getArgMinMax(const ::arm_compute::ITensor *input, const ::arm_compute::TensorShape &input_shape,
-             const ::arm_compute::TensorShape &output_shape, ::arm_compute::ITensor *output,
-             const int axis, const ::arm_compute::ArgOperation op_type)
-{
-  ::arm_compute::Coordinates id;
-  for (size_t out_b = 0; out_b < output_shape[3]; ++out_b)
-  {
-    id.set(3, out_b);
-    for (size_t out_d = 0; out_d < output_shape[2]; ++out_d)
-    {
-      id.set(2, out_d);
-      for (size_t out_h = 0; out_h < output_shape[1]; ++out_h)
-      {
-        id.set(1, out_h);
-        for (size_t out_w = 0; out_w < output_shape[0]; ++out_w)
-        {
-          id.set(0, out_w);
-          *reinterpret_cast<int *>(output->ptr_to_element(id)) = getArgMinMaxEle<T>(
-              input, input_shape, output_shape, out_b, out_d, out_h, out_w, axis, op_type);
-        }
-      }
-    }
-  }
-}
-
-void SimpleArgMinMax::run()
-{
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-
-    CAST_CL(_input)->map(q);
-    CAST_CL(_output)->map(q);
-  }
-
-  ::arm_compute::TensorShape input_shape = _input->info()->tensor_shape();
-
-  // Axis dimension is 1 and size is 1.
-  // TODO support axis size > 1.
-  int axis_val = _axis[0];
-  ::arm_compute::TensorShape output_shape = inferOutputShape(input_shape, _axis, _input_rank);
-
-  _output->info()->set_tensor_shape(output_shape);
-  switch (_input->info()->data_type())
-  {
-    case ::arm_compute::DataType::QASYMM8:
-      getArgMinMax<uint8_t>(_input, input_shape, output_shape, _output, axis_val, _op_type);
-      break;
-    case ::arm_compute::DataType::S32:
-      getArgMinMax<int32_t>(_input, input_shape, output_shape, _output, axis_val, _op_type);
-      break;
-    case ::arm_compute::DataType::F32:
-      getArgMinMax<float>(_input, input_shape, output_shape, _output, axis_val, _op_type);
-      break;
-    default:
-      ARM_COMPUTE_ERROR("DataType not supported");
-      break;
-  }
-
-  _output->info()->set_tensor_shape(output_shape);
-
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-
-    CAST_CL(_input)->unmap(q);
-    CAST_CL(_output)->unmap(q);
-  }
-}
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleArgMinMax.h b/runtimes/pure_arm_compute/src/internal/layers/SimpleArgMinMax.h
deleted file mode 100644
index b90e74579..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleArgMinMax.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __SIMPLE_ARG_MIN_MAX_H__
-#define __SIMPLE_ARG_MIN_MAX_H__
-
-#include "internal/arm_compute.h"
-#include "arm_compute/core/TypesEx.h"
-
-class SimpleArgMinMax : public ::arm_compute::IFunction
-{
-public:
-  SimpleArgMinMax(void) : _input(nullptr), _output(nullptr), _axis(), _input_rank(0)
-  {
-    // DO NOTHING
-  }
-
-public:
-  /** Initialise input and output
-   *
-   * @param[in]  input       First tensor input.
-   * @param[out] output      Output tensor.
-   * @param[in]  axis        Dimension along which to find Min or Max Index.
-   */
-  void configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output,
-                 std::vector<uint32_t> axis, ::arm_compute::ArgOperation _op_type);
-
-  void run() override;
-
-private:
-  ::arm_compute::ITensor *_input;
-  ::arm_compute::ITensor *_output;
-  std::vector<uint32_t> _axis;
-  int _input_rank;
-  ::arm_compute::ArgOperation _op_type;
-};
-
-#endif /*__SIMPLE_ARG_MIN_MAX_H__ */
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleArithmeticAddition.h b/runtimes/pure_arm_compute/src/internal/layers/SimpleArithmeticAddition.h
deleted file mode 100644
index aed9ae286..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleArithmeticAddition.h
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file        SimpleArithmeticAddition.h
- * @brief       This file contains SimpleArithmeticAddition class
- * @ingroup     COM_AI_RUNTIME
- */
-
-#ifndef __SIMPLE_ARITHMETIC_ADDITION_H__
-#define __SIMPLE_ARITHMETIC_ADDITION_H__
-
-#include "internal/arm_compute.h"
-#include <arm_compute/core/ITensor.h>
-
-/**
- * @brief Class to run SimpleArithmeticAddition Layer
- */
-class SimpleArithmeticAddition : public ::arm_compute::IFunction
-{
-public:
-  SimpleArithmeticAddition(void) : _lhs(nullptr), _rhs(nullptr), _out(nullptr)
-  {
-    // DO NOTHING
-  }
-
-  /**
-   * @brief Configure the layer
-   * @param[in] lhs Lefthand-side operand
-   * @param[in] rhs Righthand-side operand
-   * @param[in] out The destination tensor(Result operand)
-   * @return N/A
-   */
-  void configure(::arm_compute::ITensor *lhs, ::arm_compute::ITensor *rhs,
-                 ::arm_compute::ITensor *out)
-  {
-    _lhs = lhs;
-    _rhs = rhs;
-    _out = out;
-  }
-
-public:
-  /**
-   * @brief Run the operation. Must be called after configure().
-   * @return N/A
-   */
-  void run(void) override
-  {
-    if (::internal::arm_compute::isGpuMode())
-    {
-      auto &q = ::arm_compute::CLScheduler::get().queue();
-
-      CAST_CL(_lhs)->map(q);
-      CAST_CL(_rhs)->map(q);
-      CAST_CL(_out)->map(q);
-    }
-
-    arm_compute::Window window;
-    window.use_tensor_dimensions(_out->info()->tensor_shape());
-
-    execute_window_loop(window, [this](const arm_compute::Coordinates &id) {
-      // NOTE Must be two input tensors of identical type
-      //      Must be output tensor of the same type as input0.
-      assert(_lhs->info()->data_type() == _rhs->info()->data_type());
-      assert(_lhs->info()->data_type() == _out->info()->data_type());
-
-      switch (_lhs->info()->data_type())
-      {
-        case ::arm_compute::DataType::F32:
-        {
-          const auto lhs_value = *reinterpret_cast<float *>(_lhs->ptr_to_element(id));
-          const auto rhs_value = *reinterpret_cast<float *>(_rhs->ptr_to_element(id));
-          *reinterpret_cast<float *>(_out->ptr_to_element(id)) = lhs_value + rhs_value;
-          break;
-        }
-        case ::arm_compute::DataType::S32:
-        {
-          const auto lhs_value = *reinterpret_cast<int32_t *>(_lhs->ptr_to_element(id));
-          const auto rhs_value = *reinterpret_cast<int32_t *>(_rhs->ptr_to_element(id));
-          *reinterpret_cast<int32_t *>(_out->ptr_to_element(id)) = lhs_value + rhs_value;
-          break;
-        }
-        case ::arm_compute::DataType::U32:
-        {
-          const auto lhs_value = *reinterpret_cast<uint32_t *>(_lhs->ptr_to_element(id));
-          const auto rhs_value = *reinterpret_cast<uint32_t *>(_rhs->ptr_to_element(id));
-          *reinterpret_cast<uint32_t *>(_out->ptr_to_element(id)) = lhs_value + rhs_value;
-          break;
-        }
-        case ::arm_compute::DataType::QASYMM8:
-        {
-          const auto lhs_value = *reinterpret_cast<uint8_t *>(_lhs->ptr_to_element(id));
-          const auto rhs_value = *reinterpret_cast<uint8_t *>(_rhs->ptr_to_element(id));
-          // How to handle with overflow?
-          *reinterpret_cast<uint8_t *>(_out->ptr_to_element(id)) = lhs_value + rhs_value;
-          break;
-        }
-        default:
-          throw std::runtime_error("Not supported, yet");
-          break;
-      }
-    });
-
-    if (::internal::arm_compute::isGpuMode())
-    {
-      auto &q = ::arm_compute::CLScheduler::get().queue();
-
-      CAST_CL(_out)->unmap(q);
-      CAST_CL(_rhs)->unmap(q);
-      CAST_CL(_lhs)->unmap(q);
-    }
-  }
-
-private:
-  ::arm_compute::ITensor *_lhs;
-  ::arm_compute::ITensor *_rhs;
-  ::arm_compute::ITensor *_out;
-};
-
-#endif // __SIMPLE_ARITHMETIC_ADDITION_H__
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleBatchToSpaceNd.cc b/runtimes/pure_arm_compute/src/internal/layers/SimpleBatchToSpaceNd.cc
deleted file mode 100644
index 87175ee1a..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleBatchToSpaceNd.cc
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "internal/layers/SimpleBatchToSpaceNd.h"
-
-#include <arm_compute/runtime/CL/CLScheduler.h>
-
-void SimpleBatchToSpaceND::configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output,
-                                     const int32_t *block_size,
-                                     const ::arm_compute::Coordinates &axises)
-{
-  const auto rank = axises.num_dimensions();
-  assert(rank == 4);
-
-  for (int i = 0; i < rank; ++i)
-    assert(axises[i] >= 0 && axises[i] < rank);
-
-  _input = input;
-  _output = output;
-  _block_size = block_size;
-  _axises = axises;
-}
-
-template <typename T>
-inline void BatchToSpaceND(const ::arm_compute::ITensor *input,
-                           const ::arm_compute::TensorShape &input_shape,
-                           const int32_t *block_size_data, ::arm_compute::ITensor *output,
-                           const ::arm_compute::TensorShape &output_shape,
-                           const ::arm_compute::Coordinates &axises)
-{
-  const int output_batch = output_shape[axises[0]];
-  const int output_height = output_shape[axises[1]];
-  const int output_width = output_shape[axises[2]];
-  const int depth = output_shape[axises[3]];
-
-  for (int out_b = 0; out_b < output_batch; ++out_b)
-  {
-    for (int out_h = 0; out_h < output_height; ++out_h)
-    {
-      for (int out_w = 0; out_w < output_width; ++out_w)
-      {
-        for (int out_d = 0; out_d < depth; ++out_d)
-        {
-          const int in_d = out_d;
-          const int in_h = out_h / block_size_data[0];
-          const int in_w = out_w / block_size_data[1];
-          const int in_b =
-              out_b +
-              ((out_h % block_size_data[0]) * block_size_data[1] + out_w % block_size_data[1]) *
-                  output_batch;
-
-          auto input_id =
-              asARMComputeCoordinates(::arm_compute::Coordinates{in_b, in_h, in_w, in_d}, axises);
-          auto output_id = asARMComputeCoordinates(
-              ::arm_compute::Coordinates{out_b, out_h, out_w, out_d}, axises);
-
-          *reinterpret_cast<T *>(output->ptr_to_element(output_id)) =
-              *reinterpret_cast<T *>(input->ptr_to_element(input_id));
-        }
-      }
-    }
-  }
-}
-void SimpleBatchToSpaceND::run()
-{
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-
-    CAST_CL(_input)->map(q);
-    CAST_CL(_output)->map(q);
-  }
-
-  switch (_input->info()->data_type())
-  {
-    case ::arm_compute::DataType::U8:
-    case ::arm_compute::DataType::QASYMM8:
-      BatchToSpaceND<uint8_t>(_input, _input->info()->tensor_shape(), _block_size, _output,
-                              _output->info()->tensor_shape(), _axises);
-      break;
-    case ::arm_compute::DataType::F32:
-      BatchToSpaceND<float>(_input, _input->info()->tensor_shape(), _block_size, _output,
-                            _output->info()->tensor_shape(), _axises);
-      break;
-    default:
-      ARM_COMPUTE_ERROR("DataType not supported");
-      break;
-  }
-
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-
-    CAST_CL(_input)->unmap(q);
-    CAST_CL(_output)->unmap(q);
-  }
-}
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleBatchToSpaceNd.h b/runtimes/pure_arm_compute/src/internal/layers/SimpleBatchToSpaceNd.h
deleted file mode 100644
index 5695d9719..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleBatchToSpaceNd.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- *Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __SIMPLE_BATCH_TO_SPACE_ND_H__
-#define __SIMPLE_BATCH_TO_SPACE_ND_H__
-
-#include "internal/arm_compute.h"
-#include "internal/arm_compute/Cast.h"
-
-class SimpleBatchToSpaceND : public ::arm_compute::IFunction
-{
-public:
-  SimpleBatchToSpaceND(void) : _input(nullptr), _output(nullptr), _block_size(nullptr), _axises{}
-  {
-    // DO NOTHING
-  }
-
-  /** Initialise input and output
-   *
-   * @param[in]  input       First tensor input.
-   * @param[out] output      Output tensor.
-   * @param[in]  block_size  Block size.
-   * @param[in]  axises      Axises of rank 4
-   */
-  void configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output,
-                 const int32_t *block_size,
-                 const ::arm_compute::Coordinates &axises = getARMComputeAxises(4));
-
-  void run() override;
-
-private:
-  ::arm_compute::ITensor *_input;
-  ::arm_compute::ITensor *_output;
-  const int32_t *_block_size;
-  ::arm_compute::Coordinates _axises;
-};
-
-#endif /*__SIMPLE_BATCH_TO_SPACE_ND_H__ */
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleCastLayer.cc b/runtimes/pure_arm_compute/src/internal/layers/SimpleCastLayer.cc
deleted file mode 100644
index 7c7706a78..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleCastLayer.cc
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "internal/layers/SimpleCastLayer.h"
-
-#include <arm_compute/runtime/CL/CLScheduler.h>
-
-void SimpleCastLayer::castData(::arm_compute::ITensor *in, ::arm_compute::ITensor *out,
-                               const arm_compute::Coordinates &id)
-{
-  switch (in->info()->data_type())
-  {
-    case ::arm_compute::DataType::F32:
-    {
-      copyCast(*reinterpret_cast<float *>(in->ptr_to_element(id)), out, id);
-      break;
-    }
-    case ::arm_compute::DataType::S32:
-    {
-      copyCast(*reinterpret_cast<int32_t *>(in->ptr_to_element(id)), out, id);
-      break;
-    }
-    case ::arm_compute::DataType::U32:
-    {
-      copyCast(*reinterpret_cast<uint32_t *>(in->ptr_to_element(id)), out, id);
-      break;
-    }
-    case ::arm_compute::DataType::QASYMM8:
-    {
-      const uint8_t quantizedValue = *(in->ptr_to_element(id));
-      copyCast(in->info()->quantization_info().dequantize(quantizedValue), out, id);
-      break;
-    }
-    default:
-      throw std::runtime_error("Not supported, yet");
-      break;
-  }
-}
-
-void SimpleCastLayer::configure(::arm_compute::ITensor *in, ::arm_compute::ITensor *out)
-{
-  _in = in;
-  _out = out;
-}
-
-void SimpleCastLayer::run(void)
-{
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-    CAST_CL(_in)->map(q);
-    CAST_CL(_out)->map(q);
-  }
-
-  arm_compute::Window window;
-  window.use_tensor_dimensions(_out->info()->tensor_shape());
-
-  execute_window_loop(window,
-                      [this](const arm_compute::Coordinates &id) { castData(_in, _out, id); });
-
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-    CAST_CL(_out)->unmap(q);
-    CAST_CL(_in)->unmap(q);
-  }
-}
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleCastLayer.h b/runtimes/pure_arm_compute/src/internal/layers/SimpleCastLayer.h
deleted file mode 100644
index f9a48b481..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleCastLayer.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file        SimpleCastLayer.h
- * @brief       This file contains SimpleCastLayer class
- * @ingroup     COM_AI_RUNTIME
- */
-
-#ifndef __SIMPLE_CAST_LAYER_H__
-#define __SIMPLE_CAST_LAYER_H__
-
-#include "internal/arm_compute.h"
-#include "internal/arm_compute/Cast.h"
-
-/**
- * @brief Class to run SimpleCast Layer
- */
-class SimpleCastLayer : public ::arm_compute::IFunction
-{
-public:
-  SimpleCastLayer(void) : _in(nullptr), _out(nullptr)
-  {
-    // DO NOTHING
-  }
-
-  /**
-   * @brief Configure the layer
-   * @param[in] in The source tensor
-   * @param[in] out The destination tensor
-   * @return N/A
-   */
-  void configure(::arm_compute::ITensor *in, ::arm_compute::ITensor *out);
-
-  /**
-   * @brief Run the operation. Must be called after configure().
-   * @return N/A
-   */
-  void run(void) override;
-
-private:
-  /**
-   * @brief Cast and copy data from one tensor to another
-   *
-   * @param[in] in The source tensor
-   * @param[out] out The destination tensor
-   * @param[in] id Coordinates to copy
-   * @return N/A
-   */
-  void castData(::arm_compute::ITensor *in, ::arm_compute::ITensor *out,
-                const arm_compute::Coordinates &id);
-
-  ::arm_compute::ITensor *_in;
-  ::arm_compute::ITensor *_out;
-};
-
-#endif // __SIMPLE_CAST_LAYER_H__
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleDepthToSpace.cc b/runtimes/pure_arm_compute/src/internal/layers/SimpleDepthToSpace.cc
deleted file mode 100644
index d62a8321b..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleDepthToSpace.cc
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "internal/layers/SimpleDepthToSpace.h"
-
-#include <arm_compute/runtime/CL/CLScheduler.h>
-
-void SimpleDepthToSpace::configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output,
-                                   int32_t block_size, const ::arm_compute::Coordinates &axises)
-{
-  const auto rank = axises.num_dimensions();
-  assert(rank == 4);
-  for (int i = 0; i < rank; ++i)
-  {
-    assert(axises[i] >= 0);
-    assert(axises[i] < rank);
-  }
-
-  _input = input;
-  _output = output;
-  _block_size = block_size;
-  _axises = axises;
-}
-
-template <typename T>
-inline void DepthToSpace(const ::arm_compute::ITensor *input,
-                         const ::arm_compute::TensorShape &input_shape, int32_t block_size,
-                         ::arm_compute::ITensor *output,
-                         const ::arm_compute::TensorShape &output_shape,
-                         const ::arm_compute::Coordinates &axises)
-{
-  const int output_batch = output_shape[axises[0]];
-  const int output_height = output_shape[axises[1]];
-  const int output_width = output_shape[axises[2]];
-  const int output_depth = output_shape[axises[3]];
-
-  for (int out_b = 0; out_b < output_batch; ++out_b)
-  {
-    for (int out_h = 0; out_h < output_height; ++out_h)
-    {
-      for (int out_w = 0; out_w < output_width; ++out_w)
-      {
-        for (int out_d = 0; out_d < output_depth; ++out_d)
-        {
-          const int in_b = out_b;
-          const int in_h = out_h / block_size;
-          const int in_w = out_w / block_size;
-          const int in_d =
-              out_d + ((out_h % block_size) * block_size + out_w % block_size) * output_depth;
-
-          auto input_id =
-              asARMComputeCoordinates(::arm_compute::Coordinates{in_b, in_h, in_w, in_d}, axises);
-          auto output_id = asARMComputeCoordinates(
-              ::arm_compute::Coordinates{out_b, out_h, out_w, out_d}, axises);
-
-          *reinterpret_cast<T *>(output->ptr_to_element(output_id)) =
-              *reinterpret_cast<T *>(input->ptr_to_element(input_id));
-        }
-      }
-    }
-  }
-}
-
-void SimpleDepthToSpace::run()
-{
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-
-    CAST_CL(_input)->map(q);
-    CAST_CL(_output)->map(q);
-  }
-
-  switch (_input->info()->data_type())
-  {
-    case ::arm_compute::DataType::U8:
-    case ::arm_compute::DataType::QASYMM8:
-      DepthToSpace<uint8_t>(_input, _input->info()->tensor_shape(), _block_size, _output,
-                            _output->info()->tensor_shape(), _axises);
-      break;
-    case ::arm_compute::DataType::F32:
-      DepthToSpace<float>(_input, _input->info()->tensor_shape(), _block_size, _output,
-                          _output->info()->tensor_shape(), _axises);
-      break;
-    default:
-      ARM_COMPUTE_ERROR("DataType not supported");
-      break;
-  }
-
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-
-    CAST_CL(_input)->unmap(q);
-    CAST_CL(_output)->unmap(q);
-  }
-}
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleDepthToSpace.h b/runtimes/pure_arm_compute/src/internal/layers/SimpleDepthToSpace.h
deleted file mode 100644
index 1032aaa47..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleDepthToSpace.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __SIMPLE_DEPTH_TO_SPACE_H__
-#define __SIMPLE_DEPTH_TO_SPACE_H__
-
-#include "internal/arm_compute.h"
-#include "internal/arm_compute/Cast.h"
-
-class SimpleDepthToSpace : public ::arm_compute::IFunction
-{
-public:
-  SimpleDepthToSpace(void) : _input(nullptr), _output(nullptr), _block_size(0), _axises{}
-  {
-    // DO NOTHING
-  }
-
-public:
-  /** Initialise input and output
-   *
-   * @param[in]  input       First tensor input.
-   * @param[out] output      Output tensor.
-   * @param[in]  block_size  Block size.
-   * @param[in]  axises      Axises of rank 4
-   */
-  void configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output, int32_t block_size,
-                 const ::arm_compute::Coordinates &axises = getARMComputeAxises(4));
-
-  void run() override;
-
-private:
-  ::arm_compute::ITensor *_input;
-  ::arm_compute::ITensor *_output;
-  int32_t _block_size;
-  ::arm_compute::Coordinates _axises;
-};
-
-#endif /*__SIMPLE_DEPTH_TO_SPACE_H__ */
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleEmbeddingLookup.cc b/runtimes/pure_arm_compute/src/internal/layers/SimpleEmbeddingLookup.cc
deleted file mode 100644
index ae740bb10..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleEmbeddingLookup.cc
+++ /dev/null
@@ -1,108 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "internal/layers/SimpleEmbeddingLookup.h"
-
-#include <arm_compute/runtime/CL/CLScheduler.h>
-
-void SimpleEmbeddingLookup::configure(::arm_compute::ITensor *lookups,
-                                      ::arm_compute::ITensor *values,
-                                      ::arm_compute::ITensor *output)
-{
-  assert(values->info()->num_dimensions() == output->info()->num_dimensions());
-  assert(values->info()->num_dimensions() > 1 && values->info()->num_dimensions() <= 4);
-  _lookups = lookups;
-  _values = values;
-  _output = output;
-}
-
-void SimpleEmbeddingLookup::run()
-{
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-
-    CAST_CL(_lookups)->map(q);
-    CAST_CL(_values)->map(q);
-    CAST_CL(_output)->map(q);
-  }
-
-  // type of elements of lookups is always integer
-  const int32_t *lookups_buf = reinterpret_cast<int32_t *>(_lookups->buffer());
-
-  const auto lookups_info = _lookups->info();
-  const auto values_info = _values->info();
-  const auto output_info = _output->info();
-
-  // NOTE The first dimension's position is always at the end of dimensions.
-  const auto first_dim_pos = values_info->num_dimensions() - 1;
-
-  const size_t first_dim = values_info->dimension(first_dim_pos);
-  for (size_t i = 0; i < lookups_info->dimension(0); ++i)
-  {
-    if (lookups_buf[i] < 0 || lookups_buf[i] >= first_dim)
-      throw std::runtime_error("Embedding Lookup: index out of bounds.");
-  }
-
-  // If each strides of values and output are different, applied padding size of the two tensors are
-  // different, therefore, it can not be copied at once.
-  auto can_copy_at_once = [&]() -> bool {
-    const auto &values_strides = values_info->strides_in_bytes();
-    const auto &output_strides = output_info->strides_in_bytes();
-
-    for (size_t i = 0; i < first_dim_pos; ++i)
-    {
-      if (values_strides[i] != values_strides[i])
-        return false;
-    }
-
-    return true;
-  };
-
-  using ::arm_compute::Window;
-  using ::arm_compute::Iterator;
-
-  size_t copy_bytes;
-  Window window;
-  if (can_copy_at_once())
-  {
-    copy_bytes = values_info->total_size() / first_dim;
-    window.use_tensor_dimensions(output_info->tensor_shape(), first_dim_pos);
-  }
-  else
-  {
-    copy_bytes = values_info->dimension(0) * values_info->element_size();
-    window.use_tensor_dimensions(output_info->tensor_shape(), Window::DimY);
-  }
-
-  Iterator it(_output, window);
-  execute_window_loop(window,
-                      [&](const ::arm_compute::Coordinates &id) {
-                        ::arm_compute::Coordinates values_id = id;
-                        const int idx = id[first_dim_pos];
-                        values_id.set(first_dim_pos, lookups_buf[idx]);
-                        memcpy(it.ptr(), _values->ptr_to_element(values_id), copy_bytes);
-                      },
-                      it);
-
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-
-    CAST_CL(_lookups)->unmap(q);
-    CAST_CL(_values)->unmap(q);
-    CAST_CL(_output)->unmap(q);
-  }
-}
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleEmbeddingLookup.h b/runtimes/pure_arm_compute/src/internal/layers/SimpleEmbeddingLookup.h
deleted file mode 100644
index fd499437f..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleEmbeddingLookup.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __SIMPLE_EMBEDDING_LOOKUP_H__
-#define __SIMPLE_EMBEDDING_LOOKUP_H__
-
-#include "internal/arm_compute.h"
-
-/**
- * @file        SimpleEmbeddingLookup.h
- * @brief       This file contains SimpleEmbeddingLookup class
- * @ingroup     COM_AI_RUNTIME
- */
-
-/**
- * @brief Class to run SimpleEmbeddingLookup Layer
- */
-class SimpleEmbeddingLookup : public ::arm_compute::IFunction
-{
-public:
-  SimpleEmbeddingLookup(void) : _lookups(nullptr), _values(nullptr), _output(nullptr)
-  {
-    // DO NOTHING
-  }
-
-public:
-  /**
-   * @brief Configure the layer
-   * @param[in] lookups 1D tensor which contains lookup values
-   * @param[in] values The source tensor
-   * @param[in] output The destination tensor
-   * @return N/A
-   */
-  void configure(::arm_compute::ITensor *lookups, ::arm_compute::ITensor *values,
-                 ::arm_compute::ITensor *output);
-
-  /**
-   * @brief Run the operation. Must be called after configure().
-   * @return N/A
-   */
-  void run() override;
-
-private:
-  ::arm_compute::ITensor *_lookups;
-  ::arm_compute::ITensor *_values;
-  ::arm_compute::ITensor *_output;
-};
-
-#endif /*__SIMPLE_EMBEDDING_LOOKUP_H__ */
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleHashtableLookupLayer.cc b/runtimes/pure_arm_compute/src/internal/layers/SimpleHashtableLookupLayer.cc
deleted file mode 100644
index 7f8ae2505..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleHashtableLookupLayer.cc
+++ /dev/null
@@ -1,140 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "internal/layers/SimpleHashtableLookupLayer.h"
-
-#include <arm_compute/runtime/CL/CLScheduler.h>
-
-void SimpleHashtableLookupLayer::configure(::arm_compute::ITensor *lookups,
-                                           ::arm_compute::ITensor *keys,
-                                           ::arm_compute::ITensor *values,
-                                           ::arm_compute::ITensor *output,
-                                           ::arm_compute::ITensor *hits)
-{
-  _lookups = lookups;
-  _keys = keys;
-  _values = values;
-  _output = output;
-  _hits = hits;
-  _lookup_indices.resize(lookups->info()->dimension(0), -1);
-}
-
-void SimpleHashtableLookupLayer::run()
-{
-  auto &queue = ::arm_compute::CLScheduler::get().queue();
-  if (::internal::arm_compute::isGpuMode())
-  {
-    CAST_CL(_lookups)->map(queue);
-    CAST_CL(_keys)->map(queue);
-    CAST_CL(_values)->map(queue);
-    CAST_CL(_output)->map(queue);
-    CAST_CL(_hits)->map(queue);
-  }
-
-  const int32_t *lookups_buf = reinterpret_cast<int32_t *>(_lookups->buffer());
-  const int32_t *keys_buf = reinterpret_cast<int32_t *>(_keys->buffer());
-  uint8_t *hits_buf = reinterpret_cast<uint8_t *>(_hits->buffer());
-
-  const auto lookups_info = _lookups->info();
-  const auto values_info = _values->info();
-  const auto keys_info = _keys->info();
-  const auto output_info = _output->info();
-
-  // NOTE The first dimension's position must be always at the end of dimensions.
-  const auto first_dim_pos = values_info->num_dimensions() - 1;
-  const size_t first_dim = values_info->dimension(first_dim_pos);
-
-  std::map<int32_t, size_t> key_map;
-  const int keys_num = keys_info->dimension(0);
-  for (size_t key_index = 0; key_index < keys_num; key_index++)
-  {
-    key_map[keys_buf[key_index]] = key_index;
-  }
-
-  const int lookups_num = lookups_info->dimension(0);
-  for (size_t i = 0; i < lookups_num; ++i)
-  {
-    const auto lookup_value = lookups_buf[i];
-    const auto it = key_map.find(lookup_value);
-    if (it != key_map.end())
-    {
-      if (it->second >= first_dim)
-        throw std::runtime_error("HashTable Lookup: index out of bounds.");
-      _lookup_indices[i] = it->second;
-    }
-  }
-
-  // If each strides of values and output are different, applied padding size of the two tensors are
-  // different, therefore, it can not be copied at once.
-  auto can_copy_at_once = [&]() -> bool {
-    const auto &values_strides = values_info->strides_in_bytes();
-    const auto &output_strides = output_info->strides_in_bytes();
-
-    for (size_t i = 0; i < first_dim_pos; ++i)
-    {
-      if (values_strides[i] != values_strides[i])
-        return false;
-    }
-
-    return true;
-  };
-
-  using ::arm_compute::Window;
-  using ::arm_compute::Iterator;
-  using ::arm_compute::Coordinates;
-
-  size_t copy_bytes;
-  Window window;
-  if (can_copy_at_once())
-  {
-    copy_bytes = values_info->total_size() / first_dim;
-    window.use_tensor_dimensions(output_info->tensor_shape(), first_dim_pos);
-  }
-  else
-  {
-    copy_bytes = values_info->dimension(0) * values_info->element_size();
-    window.use_tensor_dimensions(output_info->tensor_shape(), Window::DimY);
-  }
-
-  Iterator it(_output, window);
-  execute_window_loop(window,
-                      [&](const Coordinates &id) {
-                        Coordinates values_id = id;
-                        const int idx = id[first_dim_pos];
-                        const int lookup_index = _lookup_indices[idx];
-                        if (lookup_index >= 0)
-                        {
-                          values_id.set(first_dim_pos, lookup_index);
-                          memcpy(it.ptr(), _values->ptr_to_element(values_id), copy_bytes);
-                          hits_buf[lookup_index] = 1;
-                        }
-                        else
-                        {
-                          memset(it.ptr(), 0, copy_bytes);
-                          hits_buf[lookup_index] = 0;
-                        }
-                      },
-                      it);
-
-  if (::internal::arm_compute::isGpuMode())
-  {
-    CAST_CL(_lookups)->unmap(queue);
-    CAST_CL(_keys)->unmap(queue);
-    CAST_CL(_values)->unmap(queue);
-    CAST_CL(_output)->unmap(queue);
-    CAST_CL(_hits)->unmap(queue);
-  }
-}
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleHashtableLookupLayer.h b/runtimes/pure_arm_compute/src/internal/layers/SimpleHashtableLookupLayer.h
deleted file mode 100644
index ba9d2ec0d..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleHashtableLookupLayer.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __SIMPLE_HASHTABLE_LOOKUP_H__
-#define __SIMPLE_HASHTABLE_LOOKUP_H__
-
-#include "internal/arm_compute.h"
-
-class SimpleHashtableLookupLayer : public ::arm_compute::IFunction
-{
-public:
-  SimpleHashtableLookupLayer(void)
-      : _lookups(nullptr), _keys(nullptr), _values(nullptr), _output(nullptr), _hits(nullptr)
-  {
-    // DO NOTHING
-  }
-
-  void configure(::arm_compute::ITensor *lookups, ::arm_compute::ITensor *keys,
-                 ::arm_compute::ITensor *values, ::arm_compute::ITensor *output,
-                 ::arm_compute::ITensor *hits);
-
-  void run() override;
-
-private:
-  ::arm_compute::ITensor *_lookups;
-  ::arm_compute::ITensor *_keys;
-  ::arm_compute::ITensor *_values;
-  ::arm_compute::ITensor *_output;
-  ::arm_compute::ITensor *_hits;
-  std::vector<int32_t> _lookup_indices;
-};
-
-#endif /*__SIMPLE_HASHTABLE_LOOKUP_H__ */
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleNeg.cc b/runtimes/pure_arm_compute/src/internal/layers/SimpleNeg.cc
deleted file mode 100644
index d3943ad40..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleNeg.cc
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "internal/layers/SimpleNeg.h"
-
-#include <arm_compute/runtime/CL/CLScheduler.h>
-
-void SimpleNeg::configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output)
-{
-  _input = input;
-  _output = output;
-}
-
-void SimpleNeg::run()
-{
-  auto &queue = ::arm_compute::CLScheduler::get().queue();
-  if (::internal::arm_compute::isGpuMode())
-  {
-    CAST_CL(_input)->map(queue);
-    CAST_CL(_output)->map(queue);
-  }
-
-  arm_compute::Window window;
-  window.use_tensor_dimensions(_output->info()->tensor_shape());
-
-  execute_window_loop(window, [this](const arm_compute::Coordinates &id) {
-    // NOTE Must be two input tensors of identical type
-    //      Must be output tensor of the same type as input0.
-    assert(_input->info()->data_type() == _output->info()->data_type());
-
-    switch (_input->info()->data_type())
-    {
-      case ::arm_compute::DataType::F32:
-      {
-        const auto input_value = *reinterpret_cast<float *>(_input->ptr_to_element(id));
-        *reinterpret_cast<float *>(_output->ptr_to_element(id)) = -input_value;
-        break;
-      }
-      case ::arm_compute::DataType::S32:
-      {
-        const auto input_value = *reinterpret_cast<int32_t *>(_input->ptr_to_element(id));
-        *reinterpret_cast<int32_t *>(_output->ptr_to_element(id)) = -input_value;
-        break;
-      }
-      case ::arm_compute::DataType::U32:
-      {
-        const auto input_value = *reinterpret_cast<uint32_t *>(_input->ptr_to_element(id));
-        *reinterpret_cast<uint32_t *>(_output->ptr_to_element(id)) = -input_value;
-        break;
-      }
-      default:
-        throw std::runtime_error("Not supported, yet");
-        break;
-    }
-  });
-
-  if (::internal::arm_compute::isGpuMode())
-  {
-    CAST_CL(_input)->unmap(queue);
-    CAST_CL(_output)->unmap(queue);
-  }
-}
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleNeg.h b/runtimes/pure_arm_compute/src/internal/layers/SimpleNeg.h
deleted file mode 100644
index 4ca88e7f8..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleNeg.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __SIMPLE_NEG_H__
-#define __SIMPLE_NEG_H__
-
-#include "internal/arm_compute.h"
-
-class SimpleNeg : public ::arm_compute::IFunction
-{
-public:
-  SimpleNeg(void) : _input(nullptr), _output(nullptr)
-  {
-    // DO NOTHING
-  }
-
-  void configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output);
-
-  void run() override;
-
-private:
-  ::arm_compute::ITensor *_input;
-  ::arm_compute::ITensor *_output;
-};
-
-#endif /*__SIMPLE_NEG_H__ */
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimplePackLayer.cc b/runtimes/pure_arm_compute/src/internal/layers/SimplePackLayer.cc
deleted file mode 100644
index 2a0a25f0c..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimplePackLayer.cc
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "internal/arm_compute.h"
-#include "SimplePackLayer.h"
-
-void SimplePackLayer::configure(const std::vector<::arm_compute::ICLTensor *> &input_vector,
-                                ::arm_compute::ICLTensor *output, int32_t axis)
-{
-  uint32_t nr_inputs = input_vector.size();
-  uint32_t output_rank = output->info()->num_dimensions();
-  const ::arm_compute::PermutationVector pv{1, 2, 0};
-  _cl_permuted_vector.resize(nr_inputs);
-  _cl_permute_vector.resize(nr_inputs);
-
-  _output = output;
-  // A negative axis implies axis from the end.
-  // For example, axis = -1 implies the first axis from the end, i.e. axis = Rank - 1.
-  // Similarly, axis = -2 imples second axis from the end, i.e. axis = Rank - 2.
-  if (axis < 0)
-  {
-    axis += output_rank;
-  }
-  _axis = ToARMComputeAxis(output_rank, axis).value();
-  _cl_reshape_vector.resize(nr_inputs);
-
-  ::arm_compute::TensorShape subTensor_shape{};
-  for (int i = 0; i < output_rank; i++)
-  {
-    if (i != _axis)
-    {
-      subTensor_shape.set(i, _output->info()->tensor_shape()[i]);
-    }
-    else
-    {
-      subTensor_shape.set(i, 1);
-    }
-  }
-
-  auto subTensor_offset = ::arm_compute::Coordinates{};
-  subTensor_offset.set_num_dimensions(output_rank);
-
-  for (int i = 0; i < input_vector.size(); i++)
-  {
-    _input_vector.push_back(input_vector[i]);
-    subTensor_offset[_axis] = i;
-    auto temp_tensor = std::make_shared<::arm_compute::CLSubTensor>(
-        CAST_CL(_output), subTensor_shape, subTensor_offset, true);
-    _sub_tensor_vector.push_back(temp_tensor);
-    // configure to resize of input tensor in sub tensor offseted, dimension expansion will be
-    // automatic
-    _cl_permute_vector[i].configure(CAST_CL(_input_vector[i]), &_cl_permuted_vector[i], pv);
-    _cl_reshape_vector[i].configure(&_cl_permuted_vector[i], _sub_tensor_vector[i].get());
-    _cl_permuted_vector[i].allocator()->allocate();
-  }
-}
-
-void SimplePackLayer::run(void)
-{
-  for (int i = 0; i < _input_vector.size(); i++)
-  {
-    _cl_permute_vector[i].run();
-    _cl_reshape_vector[i].run();
-  }
-}
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimplePackLayer.h b/runtimes/pure_arm_compute/src/internal/layers/SimplePackLayer.h
deleted file mode 100644
index 2c2fc37f2..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimplePackLayer.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __SIMPLE_PACK_LAYER_H__
-#define __SIMPLE_PACK_LAYER_H__
-
-#include <arm_compute/runtime/CL/CLTensor.h>
-#include <arm_compute/runtime/CL/CLSubTensor.h>
-#include <arm_compute/runtime/CL/functions/CLReshapeLayer.h>
-#include <arm_compute/runtime/CL/functions/CLPermute.h>
-
-class SimplePackLayer : public ::arm_compute::IFunction
-{
-public:
-  SimplePackLayer(void)
-      : _cl_permuted_vector{}, _input_vector{}, _sub_tensor_vector{}, _cl_reshape_vector{},
-        _cl_permute_vector{}, _output(nullptr), _axis(0)
-  {
-    // DO NOTHING
-  }
-
-public:
-  void configure(const std::vector<::arm_compute::ICLTensor *> &input_vector,
-                 ::arm_compute::ICLTensor *output, int axis);
-
-public:
-  void run(void) override;
-
-private:
-  std::vector<::arm_compute::CLTensor> _cl_permuted_vector;
-  std::vector<::arm_compute::ICLTensor *> _input_vector;
-  std::vector<std::shared_ptr<::arm_compute::CLSubTensor>> _sub_tensor_vector;
-  std::vector<::arm_compute::CLReshapeLayer> _cl_reshape_vector;
-  std::vector<::arm_compute::CLPermute> _cl_permute_vector;
-  ::arm_compute::ICLTensor *_output;
-  int _axis;
-};
-
-#endif // __SIMPLE_PACK_LAYER_H__
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimplePadLayer.cc b/runtimes/pure_arm_compute/src/internal/layers/SimplePadLayer.cc
deleted file mode 100644
index 64236603f..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimplePadLayer.cc
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "internal/layers/SimplePadLayer.h"
-#include <arm_compute/runtime/CL/CLScheduler.h>
-
-namespace
-{
-bool validate_arg(const ::arm_compute::ITensor *input, const ::arm_compute::ITensor *output,
-                  const ::arm_compute::ITensor *padding_size,
-                  const ::arm_compute::Coordinates &axises)
-{
-  const int input_batch = input->info()->tensor_shape()[axises[0]];
-  const int input_height = input->info()->tensor_shape()[axises[1]];
-  const int input_width = input->info()->tensor_shape()[axises[2]];
-  const int input_depth = input->info()->tensor_shape()[axises[3]];
-
-  const int output_batch = output->info()->tensor_shape()[axises[0]];
-  const int output_height = output->info()->tensor_shape()[axises[1]];
-  const int output_width = output->info()->tensor_shape()[axises[2]];
-  const int output_depth = output->info()->tensor_shape()[axises[3]];
-
-  auto pad_batch_up = *reinterpret_cast<const int32_t *>(padding_size->ptr_to_element({0, 0}));
-  auto pad_batch_down = *reinterpret_cast<const int32_t *>(padding_size->ptr_to_element({1, 0}));
-  auto pad_height_top = *reinterpret_cast<const int32_t *>(padding_size->ptr_to_element({0, 1}));
-  auto pad_height_bottom = *reinterpret_cast<const int32_t *>(padding_size->ptr_to_element({1, 1}));
-  auto pad_width_left = *reinterpret_cast<const int32_t *>(padding_size->ptr_to_element({0, 2}));
-  auto pad_width_right = *reinterpret_cast<const int32_t *>(padding_size->ptr_to_element({1, 2}));
-  auto pad_depth_front = *reinterpret_cast<const int32_t *>(padding_size->ptr_to_element({0, 3}));
-  auto pad_depth_back = *reinterpret_cast<const int32_t *>(padding_size->ptr_to_element({1, 3}));
-
-  const int padded_batch = input_batch + pad_batch_up + pad_batch_down;
-  const int padded_height = input_height + pad_height_top + pad_height_bottom;
-  const int padded_width = input_width + pad_width_left + pad_width_right;
-  const int padded_depth = input_depth + pad_depth_front + pad_depth_back;
-
-  return (padded_batch == output_batch) && (padded_height == output_height) &&
-         (padded_width == output_width) && (padded_depth == output_depth);
-}
-} // namespace
-
-void SimplePadLayer::configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output,
-                               ::arm_compute::ITensor *padding_size,
-                               const ::arm_compute::Coordinates &axises)
-{
-
-  const auto rank = axises.num_dimensions();
-  assert(rank == 4);
-  assert(input != nullptr && output != nullptr && padding_size != nullptr);
-
-  for (int i = 0; i < rank; ++i)
-  {
-    assert(axises[i] >= 0);
-    assert(axises[i] < rank);
-  }
-
-  _input = input;
-  _output = output;
-  _padding_size = padding_size;
-  _axises = axises;
-}
-
-template <typename T>
-inline void ApplyPadding(const ::arm_compute::ITensor *input_data,
-                         const ::arm_compute::TensorShape &input_shape,
-                         const ::arm_compute::ITensor *padding_size,
-                         ::arm_compute::ITensor *output_data,
-                         const ::arm_compute::TensorShape &output_shape,
-                         const ::arm_compute::Coordinates &axises, T zero_value)
-{
-
-  assert(validate_arg(input_data, output_data, padding_size, axises) &&
-         "Padded Input shape does not match to output shape");
-
-  const int input_batch = input_shape[axises[0]];
-  const int input_height = input_shape[axises[1]];
-  const int input_width = input_shape[axises[2]];
-  const int input_depth = input_shape[axises[3]];
-
-  const int output_batch = output_shape[axises[0]];
-  const int output_height = output_shape[axises[1]];
-  const int output_width = output_shape[axises[2]];
-  const int output_depth = output_shape[axises[3]];
-
-  // Padding size for Up, Top, Left and Front are required.
-  auto pad_batch_up = *reinterpret_cast<const int32_t *>(padding_size->ptr_to_element({0, 0}));
-  auto pad_height_top = *reinterpret_cast<const int32_t *>(padding_size->ptr_to_element({0, 1}));
-  auto pad_width_left = *reinterpret_cast<const int32_t *>(padding_size->ptr_to_element({0, 2}));
-  auto pad_depth_front = *reinterpret_cast<const int32_t *>(padding_size->ptr_to_element({0, 3}));
-
-  for (int out_b = 0; out_b < output_batch; ++out_b)
-  {
-    for (int out_h = 0; out_h < output_height; ++out_h)
-    {
-      for (int out_w = 0; out_w < output_width; ++out_w)
-      {
-        for (int out_d = 0; out_d < output_depth; ++out_d)
-        {
-          auto output_id = asARMComputeCoordinates(
-              ::arm_compute::Coordinates{out_b, out_h, out_w, out_d}, axises);
-
-          if (out_b < pad_batch_up || out_b >= (input_batch + pad_batch_up) ||
-              out_h < pad_height_top || out_h >= (input_height + pad_height_top) ||
-              out_w < pad_width_left || out_w >= (input_width + pad_width_left) ||
-              out_d < pad_depth_front || out_d >= (input_depth + pad_depth_front))
-          {
-            *reinterpret_cast<T *>(output_data->ptr_to_element(output_id)) = zero_value;
-          }
-          else
-          {
-            auto input_id = asARMComputeCoordinates(
-                ::arm_compute::Coordinates{out_b - pad_batch_up, out_h - pad_height_top,
-                                           out_w - pad_width_left, out_d - pad_depth_front},
-                axises);
-            *reinterpret_cast<T *>(output_data->ptr_to_element(output_id)) =
-                *reinterpret_cast<T *>(input_data->ptr_to_element(input_id));
-          }
-        }
-      }
-    }
-  }
-}
-void SimplePadLayer::run()
-{
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-
-    CAST_CL(_input)->map(q);
-    CAST_CL(_output)->map(q);
-    CAST_CL(_padding_size)->map(q);
-  }
-
-  switch (_input->info()->data_type())
-  {
-    case ::arm_compute::DataType::U8:
-    case ::arm_compute::DataType::QASYMM8:
-      ApplyPadding<uint8_t>(_input, _input->info()->tensor_shape(), _padding_size, _output,
-                            _output->info()->tensor_shape(), _axises,
-                            _input->info()->quantization_info().offset);
-      break;
-    case ::arm_compute::DataType::F32:
-      ApplyPadding<float>(_input, _input->info()->tensor_shape(), _padding_size, _output,
-                          _output->info()->tensor_shape(), _axises, 0.0f);
-      break;
-    default:
-      ARM_COMPUTE_ERROR("DataType not supported");
-      break;
-  }
-
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-
-    CAST_CL(_input)->unmap(q);
-    CAST_CL(_output)->unmap(q);
-    CAST_CL(_padding_size)->unmap(q);
-  }
-}
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimplePadLayer.h b/runtimes/pure_arm_compute/src/internal/layers/SimplePadLayer.h
deleted file mode 100644
index 8cb6659ce..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimplePadLayer.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __SIMPLE_PAD_LAYER_H__
-#define __SIMPLE_PAD_LAYER_H__
-
-#include "internal/arm_compute.h"
-#include "internal/arm_compute/Cast.h"
-
-class SimplePadLayer : public ::arm_compute::IFunction
-{
-public:
-  SimplePadLayer(void) : _input(nullptr), _output(nullptr), _padding_size(nullptr), _axises{}
-  {
-    // DO NOTHING
-  }
-
-  void configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output,
-                 ::arm_compute::ITensor *padding_size,
-                 const ::arm_compute::Coordinates &axises = getARMComputeAxises(4));
-
-  void run(void) override;
-
-private:
-  ::arm_compute::ITensor *_input;
-  ::arm_compute::ITensor *_output;
-  ::arm_compute::ITensor *_padding_size;
-  ::arm_compute::Coordinates _axises;
-};
-
-#endif // __SIMPLE_PAD_LAYER_H__
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleSQRT.cc b/runtimes/pure_arm_compute/src/internal/layers/SimpleSQRT.cc
deleted file mode 100644
index b5b3a0950..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleSQRT.cc
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "internal/layers/SimpleSQRT.h"
-
-#include <arm_compute/runtime/CL/CLScheduler.h>
-
-void SimpleSQRT::configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output)
-{
-  _input = input;
-  _output = output;
-}
-
-void SimpleSQRT::run()
-{
-  auto &queue = ::arm_compute::CLScheduler::get().queue();
-  if (::internal::arm_compute::isGpuMode())
-  {
-    CAST_CL(_input)->map(queue);
-    CAST_CL(_output)->map(queue);
-  }
-
-  arm_compute::Window window;
-  window.use_tensor_dimensions(_output->info()->tensor_shape());
-
-  execute_window_loop(window, [this](const arm_compute::Coordinates &id) {
-    // NOTE Must be two input tensors of identical type
-    //      Must be output tensor of the same type as input0.
-    assert(_input->info()->data_type() == _output->info()->data_type());
-
-    const auto input_value = *reinterpret_cast<float *>(_input->ptr_to_element(id));
-    *reinterpret_cast<float *>(_output->ptr_to_element(id)) = sqrt(input_value);
-  });
-
-  if (::internal::arm_compute::isGpuMode())
-  {
-    CAST_CL(_input)->unmap(queue);
-    CAST_CL(_output)->unmap(queue);
-  }
-}
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleSQRT.h b/runtimes/pure_arm_compute/src/internal/layers/SimpleSQRT.h
deleted file mode 100644
index b05a9e32e..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleSQRT.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __SIMPLE_SQRT_H__
-#define __SIMPLE_SQRT_H__
-
-#include "internal/arm_compute.h"
-
-class SimpleSQRT : public ::arm_compute::IFunction
-{
-public:
-  SimpleSQRT(void) : _input(nullptr), _output(nullptr)
-  {
-    // DO NOTHING
-  }
-
-  void configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output);
-
-  void run() override;
-
-private:
-  ::arm_compute::ITensor *_input;
-  ::arm_compute::ITensor *_output;
-};
-
-#endif /*__SIMPLE_SQRT_H__ */
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleSpaceToBatchND.cc b/runtimes/pure_arm_compute/src/internal/layers/SimpleSpaceToBatchND.cc
deleted file mode 100644
index f53675b99..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleSpaceToBatchND.cc
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "internal/layers/SimpleSpaceToBatchND.h"
-
-#include <arm_compute/runtime/CL/CLScheduler.h>
-
-void SimpleSpaceToBatchND::configure(::arm_compute::ITensor *input,
-                                     ::arm_compute::ITensor *block_size,
-                                     ::arm_compute::ITensor *padding_size,
-                                     ::arm_compute::ITensor *output)
-{
-  const auto rank = input->info()->num_dimensions();
-  assert(rank == 4);
-
-  _input = input;
-  _block_size = block_size;
-  _padding_size = padding_size;
-  _output = output;
-}
-
-template <typename T>
-inline void
-SpaceToBatchND(const ::arm_compute::ITensor *input, const ::arm_compute::TensorShape &input_shape,
-               const ::arm_compute::ITensor *block_size, const ::arm_compute::ITensor *padding_size,
-               const ::arm_compute::ITensor *output, const ::arm_compute::TensorShape &output_shape,
-               T zero_value)
-{
-  const int input_batch = input_shape[3];
-  const int input_height = input_shape[1];
-  const int input_width = input_shape[0];
-
-  const int depth = output_shape[2];
-
-  const int padding_height_left = *reinterpret_cast<int *>(padding_size->ptr_to_element({0, 1}));
-  const int padding_height_right = *reinterpret_cast<int *>(padding_size->ptr_to_element({1, 1}));
-  const int padding_width_left = *reinterpret_cast<int *>(padding_size->ptr_to_element({0, 0}));
-  const int padding_width_right = *reinterpret_cast<int *>(padding_size->ptr_to_element({1, 0}));
-  const int padded_height = input_height + padding_height_left + padding_height_right;
-  const int padded_width = input_width + padding_width_left + padding_width_right;
-
-  const int block_size_height = *reinterpret_cast<int *>(block_size->ptr_to_element({1}));
-  const int block_size_width = *reinterpret_cast<int *>(block_size->ptr_to_element({0}));
-
-  assert(padding_height_left >= 0);
-  assert(padding_height_right >= 0);
-  assert(padding_width_left >= 0);
-  assert(padding_width_right >= 0);
-  assert(block_size_height >= 1);
-  assert(block_size_width >= 1);
-  assert(padded_height % block_size_height == 0);
-  assert(padded_width % block_size_width == 0);
-  assert(output->info()->dimension(3) ==
-         input->info()->dimension(3) * (block_size_height * block_size_width));
-
-  for (int in_b = 0; in_b < input_batch; ++in_b)
-  {
-    for (int in_d = 0; in_d < depth; ++in_d)
-    {
-      for (int in_h = 0; in_h < padded_height; ++in_h)
-      {
-        for (int in_w = 0; in_w < padded_width; ++in_w)
-        {
-          const int out_d = in_d;
-          const int out_h = in_h / block_size_height;
-          const int out_w = in_w / block_size_width;
-          const int out_b =
-              in_b +
-              ((in_h % block_size_height) * block_size_width + in_w % block_size_width) *
-                  input_batch;
-
-          const ::arm_compute::Coordinates output_id{out_w, out_h, out_d, out_b};
-
-          if (in_h < padding_height_left || in_h >= (input_height + padding_height_left) ||
-              in_w < padding_width_left || in_w >= (input_width + padding_width_left))
-          {
-            *reinterpret_cast<T *>(output->ptr_to_element(output_id)) = zero_value;
-          }
-          else
-          {
-            const ::arm_compute::Coordinates input_id{in_w - padding_width_left,
-                                                      in_h - padding_height_left, in_d, in_b};
-            *reinterpret_cast<T *>(output->ptr_to_element(output_id)) =
-                *reinterpret_cast<T *>(input->ptr_to_element(input_id));
-          }
-        }
-      }
-    }
-  }
-}
-void SimpleSpaceToBatchND::run()
-{
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-
-    CAST_CL(_input)->map(q);
-    CAST_CL(_block_size)->map(q);
-    CAST_CL(_padding_size)->map(q);
-    CAST_CL(_output)->map(q);
-  }
-
-  switch (_input->info()->data_type())
-  {
-    case ::arm_compute::DataType::U8:
-    case ::arm_compute::DataType::QASYMM8:
-      SpaceToBatchND<uint8_t>(_input, _input->info()->tensor_shape(), _block_size, _padding_size,
-                              _output, _output->info()->tensor_shape(),
-                              _input->info()->quantization_info().offset);
-      break;
-    case ::arm_compute::DataType::F32:
-      SpaceToBatchND<float>(_input, _input->info()->tensor_shape(), _block_size, _padding_size,
-                            _output, _output->info()->tensor_shape(), 0.0f);
-      break;
-    default:
-      ARM_COMPUTE_ERROR("DataType not supported");
-      break;
-  }
-
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-
-    CAST_CL(_input)->unmap(q);
-    CAST_CL(_block_size)->unmap(q);
-    CAST_CL(_padding_size)->unmap(q);
-    CAST_CL(_output)->unmap(q);
-  }
-}
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleSpaceToBatchND.h b/runtimes/pure_arm_compute/src/internal/layers/SimpleSpaceToBatchND.h
deleted file mode 100644
index 4af961d34..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleSpaceToBatchND.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __SIMPLE_SPACE_TO_BATCHND_H__
-#define __SIMPLE_SPACE_TO_BATCHND_H__
-
-#include "internal/arm_compute.h"
-
-class SimpleSpaceToBatchND : public ::arm_compute::IFunction
-{
-public:
-  SimpleSpaceToBatchND(void)
-      : _input(nullptr), _block_size(nullptr), _padding_size(nullptr), _output(nullptr)
-  {
-    // DO NOTHING
-  }
-
-  /** Initialise input and output
-   *
-   * @param[in]  input        First tensor input.
-   * @param[in]  block_size   Block size.
-   * @param[in]  padding_size Padding size.
-   * @param[out] output       Output tensor.
-   */
-  void configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *block_size,
-                 ::arm_compute::ITensor *padding_size, ::arm_compute::ITensor *output);
-
-  void run() override;
-
-private:
-  ::arm_compute::ITensor *_input;
-  ::arm_compute::ITensor *_block_size;
-  ::arm_compute::ITensor *_padding_size;
-  ::arm_compute::ITensor *_output;
-};
-
-#endif /*__SIMPLE_SPACE_TO_BATCHND_H__ */
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleSpaceToDepth.cc b/runtimes/pure_arm_compute/src/internal/layers/SimpleSpaceToDepth.cc
deleted file mode 100644
index 3519da1f3..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleSpaceToDepth.cc
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "internal/layers/SimpleSpaceToDepth.h"
-
-#include <arm_compute/runtime/CL/CLScheduler.h>
-
-void SimpleSpaceToDepth::configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output,
-                                   int32_t block_size, const ::arm_compute::Coordinates &axises)
-{
-  const auto rank = axises.num_dimensions();
-  assert(rank == 4);
-  for (int i = 0; i < rank; ++i)
-  {
-    assert(axises[i] >= 0);
-    assert(axises[i] < rank);
-  }
-
-  _input = input;
-  _output = output;
-  _block_size = block_size;
-  _axises = axises;
-}
-
-template <typename T>
-inline void SpaceToDepth(const ::arm_compute::ITensor *input,
-                         const ::arm_compute::TensorShape &input_shape, int32_t block_size,
-                         ::arm_compute::ITensor *output,
-                         const ::arm_compute::TensorShape &output_shape,
-                         const ::arm_compute::Coordinates &axises)
-{
-  const int input_batch = input_shape[axises[0]];
-  const int input_height = input_shape[axises[1]];
-  const int input_width = input_shape[axises[2]];
-  const int input_depth = input_shape[axises[3]];
-
-  for (int in_b = 0; in_b < input_batch; ++in_b)
-  {
-    for (int in_h = 0; in_h < input_height; ++in_h)
-    {
-      for (int in_w = 0; in_w < input_width; ++in_w)
-      {
-        for (int in_d = 0; in_d < input_depth; ++in_d)
-        {
-          const int out_b = in_b;
-          const int out_h = in_h / block_size;
-          const int out_w = in_w / block_size;
-          const int out_d =
-              in_d + ((in_h % block_size) * block_size + in_w % block_size) * input_depth;
-
-          auto input_id =
-              asARMComputeCoordinates(::arm_compute::Coordinates{in_b, in_h, in_w, in_d}, axises);
-          auto output_id = asARMComputeCoordinates(
-              ::arm_compute::Coordinates{out_b, out_h, out_w, out_d}, axises);
-
-          *reinterpret_cast<T *>(output->ptr_to_element(output_id)) =
-              *reinterpret_cast<T *>(input->ptr_to_element(input_id));
-        }
-      }
-    }
-  }
-}
-
-void SimpleSpaceToDepth::run()
-{
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-
-    CAST_CL(_input)->map(q);
-    CAST_CL(_output)->map(q);
-  }
-
-  switch (_input->info()->data_type())
-  {
-    case ::arm_compute::DataType::U8:
-    case ::arm_compute::DataType::QASYMM8:
-      SpaceToDepth<uint8_t>(_input, _input->info()->tensor_shape(), _block_size, _output,
-                            _output->info()->tensor_shape(), _axises);
-      break;
-    case ::arm_compute::DataType::F32:
-      SpaceToDepth<float>(_input, _input->info()->tensor_shape(), _block_size, _output,
-                          _output->info()->tensor_shape(), _axises);
-      break;
-    default:
-      ARM_COMPUTE_ERROR("DataType not supported");
-      break;
-  }
-
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-
-    CAST_CL(_input)->unmap(q);
-    CAST_CL(_output)->unmap(q);
-  }
-}
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleSpaceToDepth.h b/runtimes/pure_arm_compute/src/internal/layers/SimpleSpaceToDepth.h
deleted file mode 100644
index 9e87c364c..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleSpaceToDepth.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file        SimpleSpaceToDepth.h
- * @brief       This file contains SimpleSpaceToDepth class
- * @ingroup     COM_AI_RUNTIME
- */
-
-#ifndef __SIMPLE_SPACE_TO_DEPTH_H__
-#define __SIMPLE_SPACE_TO_DEPTH_H__
-
-#include "internal/arm_compute.h"
-#include "internal/arm_compute/Cast.h"
-
-/**
- * @brief Class to run SimpleEmbeddingLookup Layer
- */
-class SimpleSpaceToDepth : public ::arm_compute::IFunction
-{
-public:
-  SimpleSpaceToDepth(void) : _input(nullptr), _output(nullptr), _block_size(0), _axises{}
-  {
-    // DO NOTHING
-  }
-
-  /**
-   * @brief Configure the layer
-   * @param[in] input       First tensor input.
-   * @param[in] output      Output tensor.
-   * @param[in] block_size  Block size.
-   * @param[in] axises      Axises of rank 4
-   * @return N/A
-   */
-  void configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *output, int32_t block_size,
-                 const ::arm_compute::Coordinates &axises = getARMComputeAxises(4));
-
-  /**
-   * @brief Run the operation. Must be called after configure().
-   * @return N/A
-   */
-  void run() override;
-
-private:
-  ::arm_compute::ITensor *_input;
-  ::arm_compute::ITensor *_output;
-  int32_t _block_size;
-  ::arm_compute::Coordinates _axises;
-};
-
-#endif /*__SIMPLE_SPACE_TO_DEPTH_H__ */
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleTransposeConv.cc b/runtimes/pure_arm_compute/src/internal/layers/SimpleTransposeConv.cc
deleted file mode 100644
index abc291289..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleTransposeConv.cc
+++ /dev/null
@@ -1,155 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "internal/layers/SimpleTransposeConv.h"
-#include <arm_compute/runtime/CL/CLScheduler.h>
-
-void SimpleTransposeConv::configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *weights,
-                                    ::arm_compute::ITensor *output,
-                                    ::arm_compute::PadStrideInfo &tconv_info,
-                                    ::arm_compute::Coordinates axises)
-{
-  auto rank = axises.num_dimensions();
-
-  assert(rank == 4);
-
-  _input = input;
-  _weights = weights;
-  _output = output;
-  _stride_width = tconv_info.stride().first;
-  _stride_height = tconv_info.stride().second;
-  _pad_width = tconv_info.pad_left();
-  _pad_height = tconv_info.pad_top();
-  _axises = axises;
-}
-
-template <typename T>
-inline void ApplyTransposeConv(
-    const ::arm_compute::TensorShape &input_shape, const ::arm_compute::ITensor *input_data,
-    const ::arm_compute::TensorShape &filter_shape, const ::arm_compute::ITensor *filter_data,
-    const ::arm_compute::TensorShape &output_shape, const ::arm_compute::ITensor *output_data,
-    const int32_t stride_width, const int32_t stride_height, const int32_t pad_width,
-    const int32_t pad_height, const ::arm_compute::Coordinates axises)
-{
-  const int batches = input_shape[axises[0]];
-  const int input_height = input_shape[axises[1]];
-  const int input_width = input_shape[axises[2]];
-  const int input_depth = input_shape[axises[3]];
-
-  const int filter_height = filter_shape[axises[1]];
-  const int filter_width = filter_shape[axises[2]];
-
-  const int output_height = output_shape[axises[1]];
-  const int output_width = output_shape[axises[2]];
-  const int output_depth = output_shape[axises[3]];
-
-  assert(batches == output_shape[axises[0]]);
-  assert(input_depth == filter_shape[axises[3]]);
-  assert(filter_shape[axises[0]] == output_depth);
-
-  // Although transpose convolution simplifies to convolution with transposed
-  // weights for strides of 1, non-unitary striding complicates matters. To
-  // keep this reference implementation as clear as possible, we use a
-  // "scatter" access pattern, where we loop through all the input elements,
-  // computing their influence on the output, rather than looping through the
-  // output elements in the typical "gather" access pattern of a conv. We
-  // therefore must initialize the output array to zero.
-
-  // Loop through input elements one at a time.
-  for (int batch = 0; batch < batches; ++batch)
-  {
-    for (int in_y = 0; in_y < input_height; ++in_y)
-    {
-      for (int in_x = 0; in_x < input_width; ++in_x)
-      {
-        for (int in_channel = 0; in_channel < input_depth; ++in_channel)
-        {
-          // Loop through the output elements it will influence
-          const int out_x_origin = (in_x * stride_width) - pad_width;
-          const int out_y_origin = (in_y * stride_height) - pad_height;
-          for (int filter_y = 0; filter_y < filter_height; ++filter_y)
-          {
-            for (int filter_x = 0; filter_x < filter_width; ++filter_x)
-            {
-              for (int out_channel = 0; out_channel < output_depth; ++out_channel)
-              {
-                // Compute output element location
-                const int out_x = out_x_origin + filter_x;
-                const int out_y = out_y_origin + filter_y;
-                // We cannot accumulate out of bounds
-                if ((out_x >= 0) && (out_x < output_width) && (out_y >= 0) &&
-                    (out_y < output_height))
-                {
-                  auto input_id = asARMComputeCoordinates(
-                      ::arm_compute::Coordinates{batch, in_y, in_x, in_channel}, axises);
-                  auto filter_id = asARMComputeCoordinates(
-                      ::arm_compute::Coordinates{in_channel, filter_y, filter_x, out_channel},
-                      axises);
-                  auto output_id = asARMComputeCoordinates(
-                      ::arm_compute::Coordinates{batch, out_y, out_x, out_channel}, axises);
-                  T input_value = *reinterpret_cast<T *>(input_data->ptr_to_element(input_id));
-                  T filter_value = *reinterpret_cast<T *>(filter_data->ptr_to_element(filter_id));
-                  *reinterpret_cast<T *>(output_data->ptr_to_element(output_id)) +=
-                      input_value * filter_value;
-                }
-              }
-            }
-          }
-        }
-      }
-    }
-  }
-}
-
-void SimpleTransposeConv::run()
-{
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-
-    CAST_CL(_input)->map(q);
-    CAST_CL(_weights)->map(q);
-    CAST_CL(_output)->map(q);
-  }
-
-  switch (_input->info()->data_type())
-  {
-    case ::arm_compute::DataType::S32:
-      ApplyTransposeConv<int32_t>(_input->info()->tensor_shape(), _input,
-                                  _weights->info()->tensor_shape(), _weights,
-                                  _output->info()->tensor_shape(), _output, _stride_width,
-                                  _stride_height, _pad_width, _pad_height, _axises);
-      break;
-    case ::arm_compute::DataType::F32:
-      ApplyTransposeConv<float>(_input->info()->tensor_shape(), _input,
-                                _weights->info()->tensor_shape(), _weights,
-                                _output->info()->tensor_shape(), _output, _stride_width,
-                                _stride_height, _pad_width, _pad_height, _axises);
-      break;
-    default:
-      ARM_COMPUTE_ERROR("DataType not supported");
-      break;
-  }
-
-  if (::internal::arm_compute::isGpuMode())
-  {
-    auto &q = ::arm_compute::CLScheduler::get().queue();
-
-    CAST_CL(_input)->unmap(q);
-    CAST_CL(_weights)->unmap(q);
-    CAST_CL(_output)->unmap(q);
-  }
-}
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleTransposeConv.h b/runtimes/pure_arm_compute/src/internal/layers/SimpleTransposeConv.h
deleted file mode 100644
index c5519828b..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleTransposeConv.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __TRANSPOSE_CONV_EX__
-#define __TRANSPOSE_CONV_EX__
-
-#include "internal/arm_compute.h"
-#include "internal/arm_compute/Cast.h"
-
-class SimpleTransposeConv : public ::arm_compute::IFunction
-{
-public:
-  SimpleTransposeConv()
-      : _input(nullptr), _weights(nullptr), _output(nullptr), _stride_width(0), _stride_height(0),
-        _pad_width(0), _pad_height(0)
-  {
-    // DO NOTHING
-  }
-
-  /** Initialise input and output
-   *
-   * @param[in]  input              First tensor input.
-   * @param[in]  weights            Weights
-   * @param[out] output             Output tensor.
-   * @param[in]  tc_info            Contains padding and policies to be used in the deconvolution,
-   *                                this is decribed in @ref PadStrideInfo.
-   * @param[in]  axises             Axises of rank 4
-   */
-  void configure(::arm_compute::ITensor *input, ::arm_compute::ITensor *weights,
-                 ::arm_compute::ITensor *output, ::arm_compute::PadStrideInfo &tconv_info,
-                 ::arm_compute::Coordinates axises = getARMComputeAxises(4));
-
-  void run() override;
-
-private:
-  ::arm_compute::ITensor *_input;
-  ::arm_compute::ITensor *_weights;
-  ::arm_compute::ITensor *_output;
-  int32_t _stride_width;
-  int32_t _stride_height;
-  int32_t _pad_width;
-  int32_t _pad_height;
-  ::arm_compute::Coordinates _axises;
-};
-
-#endif /*__TRANSPOSE_CONV_EX__ */
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleUnpackLayer.cc b/runtimes/pure_arm_compute/src/internal/layers/SimpleUnpackLayer.cc
deleted file mode 100644
index 910595a44..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleUnpackLayer.cc
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "internal/arm_compute.h"
-#include "SimpleUnpackLayer.h"
-
-void SimpleUnpackLayer::configure(::arm_compute::ICLTensor *input,
-                                  const std::vector<::arm_compute::ICLTensor *> &output_vector,
-                                  int32_t axis)
-{
-  uint32_t nr_outputs = output_vector.size();
-  _cl_permuted_vector.resize(nr_outputs);
-  _cl_permute_vector.resize(nr_outputs);
-  uint32_t input_rank = input->info()->num_dimensions();
-  const ::arm_compute::PermutationVector pv{2, 0, 1};
-  _input = input;
-  // Negatige axis is supported, -1 implies R-1 axis where R is input rank
-  if (axis < 0)
-  {
-    axis += input_rank;
-  }
-  _axis = ToARMComputeAxis(input_rank, axis).value();
-  _cl_reshape_vector.resize(nr_outputs);
-
-  ::arm_compute::TensorShape subTensor_shape{};
-  for (int i = 0; i < input_rank; i++)
-  {
-    if (i != _axis)
-    {
-      subTensor_shape.set(i, _input->info()->tensor_shape()[i]);
-    }
-    else
-    {
-      subTensor_shape.set(i, 1);
-    }
-  }
-
-  auto subTensor_offset = ::arm_compute::Coordinates{};
-  subTensor_offset.set_num_dimensions(input_rank);
-
-  for (int i = 0; i < output_vector.size(); i++)
-  {
-    _output_vector.push_back(output_vector[i]);
-    subTensor_offset[_axis] = i;
-    auto temp_tensor = std::make_shared<::arm_compute::CLSubTensor>(
-        CAST_CL(_input), subTensor_shape, subTensor_offset, true);
-    _sub_tensor_vector.push_back(temp_tensor);
-    // Copies into the subtensor
-    _cl_permute_vector[i].configure(_sub_tensor_vector[i].get(), &_cl_permuted_vector[i], pv);
-    _cl_reshape_vector[i].configure(&_cl_permuted_vector[i], CAST_CL(_output_vector[i]));
-    _cl_permuted_vector[i].allocator()->allocate();
-  }
-}
-
-void SimpleUnpackLayer::run(void)
-{
-  for (int i = 0; i < _output_vector.size(); i++)
-  {
-    _cl_permute_vector[i].run();
-    _cl_reshape_vector[i].run();
-  }
-}
diff --git a/runtimes/pure_arm_compute/src/internal/layers/SimpleUnpackLayer.h b/runtimes/pure_arm_compute/src/internal/layers/SimpleUnpackLayer.h
deleted file mode 100644
index 52fc7513d..000000000
--- a/runtimes/pure_arm_compute/src/internal/layers/SimpleUnpackLayer.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *    http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __UNPACK_LAYER_H__
-#define __UNPACK_LAYER_H__
-
-#include <arm_compute/runtime/CL/CLTensor.h>
-#include <arm_compute/runtime/CL/CLSubTensor.h>
-#include <arm_compute/runtime/CL/functions/CLReshapeLayer.h>
-#include <arm_compute/runtime/CL/functions/CLPermute.h>
-
-class SimpleUnpackLayer : public ::arm_compute::IFunction
-{
-public:
-  SimpleUnpackLayer(void)
-      : _cl_permuted_vector{}, _output_vector{}, _sub_tensor_vector{}, _cl_reshape_vector{},
-        _cl_permute_vector{}, _input(nullptr), _axis(0)
-  {
-    // DO NOTHING
-  }
-
-public:
-  void configure(::arm_compute::ICLTensor *input,
-                 const std::vector<::arm_compute::ICLTensor *> &output_vector, int32_t axis);
-
-public:
-  void run(void) override;
-
-private:
-  std::vector<::arm_compute::CLTensor> _cl_permuted_vector;
-  std::vector<::arm_compute::ICLTensor *> _output_vector;
-  std::vector<std::shared_ptr<::arm_compute::CLSubTensor>> _sub_tensor_vector;
-  std::vector<::arm_compute::CLReshapeLayer> _cl_reshape_vector;
-  std::vector<::arm_compute::CLPermute> _cl_permute_vector;
-  ::arm_compute::ICLTensor *_input;
-  int32_t _axis;
-};
-
-#endif // __UNPACK_LAYER_H__
diff --git a/runtimes/pure_arm_compute/src/internal/nnapi/tensor/Reader.h b/runtimes/pure_arm_compute/src/internal/nnapi/tensor/Reader.h
index cc51db594..fc6d490da 100644
--- a/runtimes/pure_arm_compute/src/internal/nnapi/tensor/Reader.h
+++ b/runtimes/pure_arm_compute/src/internal/nnapi/tensor/Reader.h
@@ -49,7 +49,7 @@ public:
   Reader(const ::nnfw::misc::tensor::Shape &shape, const T *ptr, size_t len)
       : _shape{shape}, _ptr{ptr}
   {
-    assert(shape.element_nums() * sizeof(T) == len);
+    assert(shape.num_elements() * sizeof(T) == len);
     initialize();
   }
 
diff --git a/runtimes/pure_arm_compute/src/internal/nnapi/tensor/View.h b/runtimes/pure_arm_compute/src/internal/nnapi/tensor/View.h
index f8f297f97..4766851b9 100644
--- a/runtimes/pure_arm_compute/src/internal/nnapi/tensor/View.h
+++ b/runtimes/pure_arm_compute/src/internal/nnapi/tensor/View.h
@@ -47,7 +47,7 @@ public:
   // NOTE The parameter len denotes the number of bytes.
   View(const ::nnfw::misc::tensor::Shape &shape, T *ptr, size_t len) : _shape{shape}, _ptr{ptr}
   {
-    assert(shape.element_nums() * sizeof(T) == len);
+    assert(shape.num_elements() * sizeof(T) == len);
   }
 
 public:
diff --git a/runtimes/pure_arm_compute/src/internal/op/DepthwiseConv2D.cc b/runtimes/pure_arm_compute/src/internal/op/DepthwiseConv2D.cc
index f91f834d6..f4d1ca3c5 100644
--- a/runtimes/pure_arm_compute/src/internal/op/DepthwiseConv2D.cc
+++ b/runtimes/pure_arm_compute/src/internal/op/DepthwiseConv2D.cc
@@ -74,7 +74,7 @@ Param::Param(uint32_t inputCount, const uint32_t *inputs, uint32_t outputCount,
   //  6 -> Padding_bottom index
   //  7 -> Stride (width) Index
   //  8 -> Stride (height) INdex
-  //  9 -> Depthwise Multipler
+  //  9 -> Depthwise Multiplier
   //  10 -> Activation Index
   ifm_index = inputs[0];
   ker_index = inputs[1];
@@ -85,7 +85,7 @@ Param::Param(uint32_t inputCount, const uint32_t *inputs, uint32_t outputCount,
   padding_bottom_index = inputs[6];
   hstride_index = inputs[7];
   vstride_index = inputs[8];
-  multipler_index = inputs[9];
+  multiplier_index = inputs[9];
   activation_index = inputs[10];
 }
 
@@ -109,7 +109,7 @@ Param::Param(uint32_t inputCount, const uint32_t *inputs, uint32_t outputCount,
   //  3 -> Padding Code (ANEURALNETWORKS_PADDING_SAME or ANEURALNETWORKS_PADDING_VALID) Index
   //  4 -> Stride (width) Index
   //  5 -> Stride (height) INdex
-  //  6 -> Depthwise Multipler
+  //  6 -> Depthwise Multiplier
   //  7 -> Activation Index
   ifm_index = inputs[0];
   ker_index = inputs[1];
@@ -117,7 +117,7 @@ Param::Param(uint32_t inputCount, const uint32_t *inputs, uint32_t outputCount,
   padding_index = inputs[3];
   hstride_index = inputs[4];
   vstride_index = inputs[5];
-  multipler_index = inputs[6];
+  multiplier_index = inputs[6];
   activation_index = inputs[7];
 }
 
diff --git a/runtimes/pure_arm_compute/src/internal/op/DepthwiseConv2D.h b/runtimes/pure_arm_compute/src/internal/op/DepthwiseConv2D.h
index c63e30aae..01a9e48be 100644
--- a/runtimes/pure_arm_compute/src/internal/op/DepthwiseConv2D.h
+++ b/runtimes/pure_arm_compute/src/internal/op/DepthwiseConv2D.h
@@ -57,7 +57,7 @@ struct Param
   int32_t padding_top_index;    /**< Index of padding top */
   int32_t padding_bottom_index; /**< Index of padding bottom */
 
-  int32_t multipler_index;  /**< Index of multipler */
+  int32_t multiplier_index; /**< Index of multipler */
   int32_t activation_index; /**< Index of activation */
   /**
    * @brief Construct as default
@@ -133,7 +133,7 @@ struct Param
   int32_t vstride_index; /**< Index of vertical stride */
 
   int32_t padding_index;    /**< Index of padding */
-  int32_t multipler_index;  /**< Index of multipler */
+  int32_t multiplier_index; /**< Index of multipler */
   int32_t activation_index; /**< Index of activation */
   /**
    * @brief Construct as default
diff --git a/runtimes/pure_arm_compute/src/internal/op/Gather.cc b/runtimes/pure_arm_compute/src/internal/op/Gather.cc
index 6c0dbaf75..bc517d28c 100644
--- a/runtimes/pure_arm_compute/src/internal/op/Gather.cc
+++ b/runtimes/pure_arm_compute/src/internal/op/Gather.cc
@@ -53,11 +53,11 @@ Param::Param(uint32_t inputCount, const uint32_t *inputs, uint32_t outputCount,
 
   // Each input should be interpreted as follows:
   //
-  //  0 -> LHS Tensor Index
-  //  1 -> RHS Tensor Index
+  //  0 -> input Tensor Index
+  //  1 -> indices Tensor Index
   //  2 -> axis Index
-  lhs_index = inputs[0];
-  rhs_index = inputs[1];
+  ifm_index = inputs[0];
+  indices_index = inputs[1];
   axis_index = inputs[2];
 }
 
diff --git a/runtimes/pure_arm_compute/src/internal/op/Gather.h b/runtimes/pure_arm_compute/src/internal/op/Gather.h
index 4470236eb..d40794f99 100644
--- a/runtimes/pure_arm_compute/src/internal/op/Gather.h
+++ b/runtimes/pure_arm_compute/src/internal/op/Gather.h
@@ -43,9 +43,9 @@ struct Param
 {
   int32_t ofm_index; //!< index for output feature map
 
-  int32_t lhs_index;  //!< index for lhs tensor
-  int32_t rhs_index;  //!< index for rhs tensor
-  int32_t axis_index; //!< index for axis
+  int32_t ifm_index;     //!< index for ifm tensor
+  int32_t indices_index; //!< index for indices tensor
+  int32_t axis_index;    //!< index for axis
 
   /**
    * @brief Default Constructor
diff --git a/runtimes/pure_arm_compute/src/internal/op/Split.cc b/runtimes/pure_arm_compute/src/internal/op/Split.cc
index cbd863fce..6457a106a 100644
--- a/runtimes/pure_arm_compute/src/internal/op/Split.cc
+++ b/runtimes/pure_arm_compute/src/internal/op/Split.cc
@@ -47,13 +47,16 @@ namespace Split
 Param::Param(uint32_t inputCount, const uint32_t *inputs, uint32_t outputCount,
              const uint32_t *outputs)
 {
-  assert(inputCount == 2);
+  assert(inputCount == 3);
 
   // Each input should be interpreted as follows:
-  //  0 -> A 0-D int32 tensor, indicating the dimension along which to split.
-  //  1 -> An n-D tensor, specifying the tensor to be split.
-  axis_index = inputs[0];
-  ifm_index = inputs[1];
+  //  0 -> An n-D tensor, specifying the tensor to be split.
+  //  1 -> A 0-D int32 tensor, indicating the dimension along which to split.
+  //  2 -> A 0-D int32 tensor, indicating the number of outputs
+  //       (It can be ignored on pacl becasue pacl don't support dynamic tensor shape,
+  //        and can be used for verification only)
+  ifm_index = inputs[0];
+  axis_index = inputs[1];
 
   // Each output should be interpreted as follow:
   //  [0, outputCount) -> An n-D tensor.
diff --git a/runtimes/pure_arm_compute/src/internal/op/Split.h b/runtimes/pure_arm_compute/src/internal/op/Split.h
index b2c6c2fd1..cb5f3eb2d 100644
--- a/runtimes/pure_arm_compute/src/internal/op/Split.h
+++ b/runtimes/pure_arm_compute/src/internal/op/Split.h
@@ -42,8 +42,8 @@ namespace Split
  */
 struct Param
 {
-  int32_t axis_index; //!< index for axis
   int32_t ifm_index;  //!< index for input feature map
+  int32_t axis_index; //!< index for axis
 
   std::vector<int32_t> ofm_indexes; //!< index for output feature map
 
diff --git a/runtimes/pure_arm_compute/src/logging.h b/runtimes/pure_arm_compute/src/logging.h
index 914b63057..447da03e2 100644
--- a/runtimes/pure_arm_compute/src/logging.h
+++ b/runtimes/pure_arm_compute/src/logging.h
@@ -41,7 +41,7 @@ public:
   {
     auto env = std::getenv("PURE_ARM_COMPUTE_LOG_ENABLE");
 
-    if (env && std::atoi(env) > 0)
+    if (env && std::strtol(env, NULL, 0) > 0)
     {
       _enabled = true;
     }
diff --git a/runtimes/pure_arm_compute/src/model.cc b/runtimes/pure_arm_compute/src/model.cc
index 2c4120d7a..ddca589db 100644
--- a/runtimes/pure_arm_compute/src/model.cc
+++ b/runtimes/pure_arm_compute/src/model.cc
@@ -763,7 +763,7 @@ int ANeuralNetworksModel_addOperationEx(ANeuralNetworksModel *model,
 
       break;
     }
-    case ANEURALNETWORKS_TENSORFLOW_MAX_EX:
+    case ANEURALNETWORKS_REDUCE_MAX_EX:
     {
       using internal::tflite::op::ReduceMax::Param;
       using internal::tflite::op::ReduceMax::Node;
@@ -822,6 +822,18 @@ int ANeuralNetworksModel_addOperationEx(ANeuralNetworksModel *model,
 
       break;
     }
+    case ANEURALNETWORKS_LOGICAL_NOT_EX:
+    {
+      using internal::tflite::op::LogicalNot::Param;
+      using internal::tflite::op::LogicalNot::Node;
+
+      // Add 'operations'
+      auto &operations = model->deref().operations();
+
+      operations.emplace_back<Node>(Param{inputCount, inputs, outputCount, outputs});
+
+      break;
+    }
     case ANEURALNETWORKS_RSQRT_EX:
     {
       using internal::tflite::op::RSQRT::Param;
diff --git a/scripts/command/build b/scripts/command/build
deleted file mode 100644
index 1e8b9b731..000000000
--- a/scripts/command/build
+++ /dev/null
@@ -1,25 +0,0 @@
-#!/bin/bash
-
-# NOTE 'run' sets NNFW_SCRIPT_PATH and invokes this script
-source "${NNFW_SCRIPT_PATH}/config/build.configuration"
-
-if [[ ! -d "${BUILD_ALIAS}" ]]; then
-  echo "'${BUILD_ALIAS}' does not exist. Please run 'configure' first"
-  exit 255
-fi
-
-# Set parallel build
-# TODO Use argument instead of environment variable
-HOST_OS=${HOST_OS:-linux}
-NPROCS=${NPROCS:-1}
-PARALLEL_BUILD=${PARALLEL_BUILD:-1}
-
-if [ "${PARALLEL_BUILD}" == "1" ]; then
-  # Get number of processors (linux only for now)
-  if [ "${HOST_OS}" == "linux" ]; then
-    NPROCS="$(grep -c ^processor /proc/cpuinfo)"
-  fi
-fi
-
-cd ${BUILD_ALIAS}
-make -j ${NPROCS} "$@"
diff --git a/scripts/command/build-acl b/scripts/command/build-acl
deleted file mode 100644
index a9957555b..000000000
--- a/scripts/command/build-acl
+++ /dev/null
@@ -1,77 +0,0 @@
-#!/bin/bash
-
-# NOTE 'run' sets NNFW_SCRIPT_PATH and invokes this script
-source "${NNFW_SCRIPT_PATH}/config/build.configuration"
-
-# Set parallel build
-# TODO: use argument instead of environment variable and merge with build command
-TARGET_ARCH=${TARGET_ARCH:-armv7l}
-BUILD_TYPE=${BUILD_TYPE:-Debug}
-NPROCS=${NPROCS:-1}
-PARALLEL_BUILD=${PARALLEL_BUILD:-1}
-HOST_OS=${HOST_OS:-linux}
-TARGET_OS=${TARGET_OS:-linux}
-
-# make TARGET and TYPE to lowercase
-TARGET_ARCH_LC="$(echo ${TARGET_ARCH} | tr A-Z a-z)"
-BUILD_TYPE_LC="$(echo ${BUILD_TYPE} | tr A-Z a-z)"
-# we need base name 'arm` for all arm arch
-TARGET_ARCH_BASE="${TARGET_ARCH_LC}"
-
-if [ "${TARGET_ARCH_BASE}" == *"arm64"* ]; then
-  # For now Android is the only option for arm64
-  TARGET_ARCH_BASE=arm64
-  TARGET_OS=android
-fi
-
-if [ "${PARALLEL_BUILD}" == "1" ]; then
-  # Get number of processors (linux only for now)
-  if [ "${HOST_OS}" == "linux" ]; then
-    NPROCS="$(grep -c ^processor /proc/cpuinfo)"
-  fi
-fi
-
-ACL_FOLDER="externals/acl"
-ACL_COMMAND="scons -j${NPROCS} neon=1 opencl=1 examples=0 embed_kernels=1 os=${TARGET_OS}"
-if [ "${TARGET_ARCH_LC}" == "armv7l" ]; then
-  ACL_COMMAND+=" arch=armv7a"
-  ACL_BUILD_OUT="armv7a-${TARGET_OS}"
-elif [ "${TARGET_ARCH_LC}" == "aarch64" ]; then
-  ACL_COMMAND+=" arch=arm64-v8a"
-  ACL_BUILD_OUT="arm64-v8a-${TARGET_OS}"
-elif [ "${TARGET_ARCH_BASE}" == "arm64" ]; then
-  ACL_COMMAND+=" arch=arm64-v8a"
-  ACL_BUILD_OUT="arm64-v8a-${TARGET_OS}"
-fi
-
-if [ "${TARGET_OS}" == "android" ]; then
-  ACL_COMMAND+=" Werror=0"
-  ANDROID_GNUSTL_PATH="${ROOTFS_ARM64}/bin:${ROOTFS_ARM64}/aarch64-linux-android/bin:$$PATH"
-else
-  ACL_COMMAND+=" Werror=1"
-fi
-
-if [ "${BUILD_TYPE_LC}" == "debug" ]; then
-  ACL_COMMAND+=" debug=1 asserts=1"
-fi
-
-ACL_FOLDER_NAME="${ACL_BUILD_OUT}.${BUILD_TYPE_LC}"
-ACL_COMMAND+=" build_dir=${ACL_FOLDER_NAME}"
-ACL_FOLDER_BUILD="${ACL_FOLDER}/build/${ACL_FOLDER_NAME}"
-
-pushd ${ACL_FOLDER}
-if [ "${TARGET_OS}" == "android" ]; then
-  CXX=clang++ CC=clang PATH=${ANDROID_GNUSTL_PATH} ${ACL_COMMAND}
-else
-  ${ACL_COMMAND}
-fi
-popd
-
-WORK_FOLDER=${TARGET_ARCH_LC}-${TARGET_OS}.${BUILD_TYPE_LC}
-WORK_PATH=${NNFW_PROJECT_PATH}/${WORKSPACE_RPATH}/${WORK_FOLDER}
-INSTALL_PATH=${NNFW_INSTALL_PATH:-${WORK_PATH}/out}
-
-mkdir -vp ${INSTALL_PATH}/lib
-cp -v ${ACL_FOLDER_BUILD}/libarm_compute_core.so ${INSTALL_PATH}/lib/.
-cp -v ${ACL_FOLDER_BUILD}/libarm_compute_graph.so ${INSTALL_PATH}/lib/.
-cp -v ${ACL_FOLDER_BUILD}/libarm_compute.so ${INSTALL_PATH}/lib/.
diff --git a/scripts/command/build-docker b/scripts/command/build-docker
deleted file mode 100644
index 2da70be78..000000000
--- a/scripts/command/build-docker
+++ /dev/null
@@ -1,52 +0,0 @@
-#!/bin/bash
-
-function Usage()
-{
-  echo "Usage: $0 $(basename ${BASH_SOURCE[0]}) [OPTIONS]"
-  echo ""
-  echo "Options:"
-  echo "      --tizen                   Build docker image for tizen build"
-  echo "Options can use as docker build option:"
-  docker build --help
-}
-
-DOCKER_FILE_RPATH="docker/Dockerfile"
-DOCKER_BUILD_ARGS=()
-
-# Handle argument for this script
-# Set default docker image name, tag
-for i in "$@"
-do
-  case $i in
-    -h|--help|help)
-      Usage
-      exit 1
-      ;;
-    --tizen)
-      DOCKER_IMAGE_NAME=${DOCKER_IMAGE_NAME:-nnfw_docker_tizen}
-      DOCKER_FILE_RPATH="docker/Dockerfile_tizen"
-      ;;
-  esac
-done
-source "$NNFW_SCRIPT_PATH/config/image_name.configuration"
-DOCKER_BUILD_ARGS+="-t ${DOCKER_IMAGE_NAME}"
-
-# Argument for docker build commands
-for i in "$@"
-do
-  case $i in
-    -h|--help|help)
-    --tizen)
-      # Already handled argument
-      ;;
-    *)
-      DOCKER_BUILD_ARGS+=($1)
-      ;;
-  esac
-  shift
-done
-
-docker build --build-arg http_proxy="$http_proxy" \
-  --build-arg https_proxy="$https_proxy" \
-  ${DOCKER_BUILD_ARGS[@]} \
-  - < $NNFW_SCRIPT_PATH/$DOCKER_FILE_RPATH
diff --git a/scripts/command/configure b/scripts/command/configure
deleted file mode 100644
index 3b654d677..000000000
--- a/scripts/command/configure
+++ /dev/null
@@ -1,85 +0,0 @@
-#!/bin/bash
-
-source "${NNFW_SCRIPT_PATH}/config/build.configuration"
-
-# Set target platform using environment variable
-# TODO: use argument instead of environment variable
-TARGET_ARCH=${TARGET_ARCH:-$(uname -p)}
-BUILD_TYPE=${BUILD_TYPE:-Debug}
-CROSS_BUILD=${CROSS_BUILD:-0}
-HOST_OS=${HOST_OS:-linux}
-TARGET_OS=${TARGET_OS:-linux}
-## TODO: fix obs build break
-OBS_BUILD=${OBS_BUILD:-OFF}
-COVERAGE_BUILD=${COVERAGE_BUILD:-0}
-BENCHMARK_ACL_BUILD=${BENCHMARK_ACL_BUILD:-0}
-OPTIONS=${OPTIONS:-}
-
-# make TARGET and TYPE to lowercase
-TARGET_ARCH_LC="$(echo ${TARGET_ARCH} | tr A-Z a-z)"
-BUILD_TYPE_LC="$(echo ${BUILD_TYPE} | tr A-Z a-z)"
-
-if [ "${TARGET_ARCH_LC}" == *"arm64"* ]; then
-  # arm64 as target-arch comes from Android
-  if [ ! -z ${ROOTFS_DIR} ]; then
-    ROOTFS_ARM64="${ROOTFS_DIR}"
-    export ROOTFS_ARM64
-  fi
-  # For now Android is the only option for arm64
-  TARGET_OS=android
-elif [ "${TARGET_ARCH_LC}" == *"arm"* ]; then
-  if [ ! -z ${ROOTFS_DIR} ] ; then
-    ROOTFS_ARM="${ROOTFS_DIR}"
-    export ROOTFS_ARM
-  fi
-elif [ "${TARGET_ARCH_LC}" == *"aarch64"* ]; then
-  # aarch64 as target-arch comes from all except for Android
-  if [ ! -z ${ROOTFS_DIR} ] ; then
-    ROOTFS_ARM64="${ROOTFS_DIR}"
-    export ROOTFS_ARM64
-  fi
-fi
-
-# Todo: we may set CROSS_BUILD=1 when ROOTFS_DIR is given
-# the toolchain file, only for cross build
-if [ "${CROSS_BUILD}" == "1" ]; then
-  TOOLCHAIN_FILE="cmake/config/config_${TARGET_ARCH_LC}-${TARGET_OS}.cmake"
-  OPTION_TOOLCHAIN="-DCMAKE_TOOLCHAIN_FILE=${TOOLCHAIN_FILE}"
-else
-  OPTION_TOOLCHAIN=
-fi
-
-if [ "${COVERAGE_BUILD}" == "1" ]; then
-  OPTIONS+=" -DCOVERAGE_BUILD=1"
-else
-  OPTIONS+=" -DCOVERAGE_BUILD=0"
-fi
-
-if [ "${BENCHMARK_ACL_BUILD}" ==  "1" ]; then
-  OPTIONS+=" -DBUILD_BENCHMARK_ACL=1"
-fi
-
-WORK_FOLDER=${TARGET_ARCH_LC}-${TARGET_OS}.${BUILD_TYPE_LC}
-WORK_PATH=${NNFW_PROJECT_PATH}/${WORKSPACE_RPATH}/${WORK_FOLDER}
-BUILD_PATH=${WORK_PATH}/obj
-INSTALL_PATH=${NNFW_INSTALL_PATH:-${WORK_PATH}/out}
-
-mkdir -vp ${BUILD_PATH}
-mkdir -vp ${INSTALL_PATH}
-rm -rf ${BUILD_ALIAS}
-rm -rf ${INSTALL_ALIAS}
-ln -s ${BUILD_PATH} ${BUILD_ALIAS}
-ln -s ${INSTALL_PATH} ${INSTALL_ALIAS}
-
-cd "${BUILD_PATH}"
-
-cmake \
-  -B${BUILD_PATH} -H${NNFW_PROJECT_PATH} \
-  -DCMAKE_INSTALL_PREFIX=${INSTALL_PATH} \
-  -DCMAKE_BUILD_TYPE=${BUILD_TYPE_LC} -DTARGET_ARCH=${TARGET_ARCH_LC} \
-  -DHOST_OS=${HOST_OS} \
-  -DTARGET_OS=${TARGET_OS} \
-  -DOBS_BUILD=${OBS_BUILD} \
-  ${OPTION_TOOLCHAIN} \
-  ${OPTIONS} \
-  "${NNFW_PROJECT_PATH}" "$@"
diff --git a/scripts/command/docker-run b/scripts/command/docker-run
deleted file mode 100644
index ff0881967..000000000
--- a/scripts/command/docker-run
+++ /dev/null
@@ -1,10 +0,0 @@
-#!/bin/bash
-
-source "${NNFW_SCRIPT_PATH}/config/docker.configuration"
-
-docker run $DOCKER_RUN_OPTS $DOCKER_ENV_VARS $DOCKER_VOLUMES $DOCKER_IMAGE_NAME "$@"
-EXITCODE=$?
-
-docker_cleanup
-
-exit $EXITCODE
diff --git a/scripts/command/docker-run-user b/scripts/command/docker-run-user
deleted file mode 100644
index d5b74db39..000000000
--- a/scripts/command/docker-run-user
+++ /dev/null
@@ -1,10 +0,0 @@
-#!/bin/bash
-
-source "${NNFW_SCRIPT_PATH}/config/docker.configuration"
-
-DOCKER_RUN_OPTS+=" -u $(id -u):$(id -g)"
-
-docker run $DOCKER_RUN_OPTS $DOCKER_ENV_VARS $DOCKER_VOLUMES $DOCKER_IMAGE_NAME "$@"
-EXITCODE=$?
-
-exit $EXITCODE
diff --git a/scripts/command/docker-shell b/scripts/command/docker-shell
deleted file mode 100644
index 1f942cedb..000000000
--- a/scripts/command/docker-shell
+++ /dev/null
@@ -1,11 +0,0 @@
-#!/bin/bash
-
-source "${NNFW_SCRIPT_PATH}/config/docker.configuration"
-
-DOCKER_RUN_OPTS+=" -it"
-docker run $DOCKER_RUN_OPTS $DOCKER_ENV_VARS $DOCKER_VOLUMES $DOCKER_IMAGE_NAME "/bin/bash"
-EXITCODE=$?
-
-docker_cleanup
-
-exit $EXITCODE
diff --git a/scripts/command/docker_build_cross_arm_ubuntu.sh b/scripts/command/docker_build_cross_arm_ubuntu.sh
deleted file mode 100755
index 29f27260e..000000000
--- a/scripts/command/docker_build_cross_arm_ubuntu.sh
+++ /dev/null
@@ -1,30 +0,0 @@
-#!/bin/bash
-
-DOCKER_ENV_VARS+=" -e TARGET_ARCH=armv7l"
-DOCKER_ENV_VARS+=" -e CROSS_BUILD=1"
-DOCKER_ENV_VARS+=" -e ROOTFS_DIR=/opt/rootfs"
-
-# prepare rootfs
-if [[ ! -d $ROOTFS_DIR ]]; then
-  echo "cannot find rootfs"
-  exit 1
-fi
-
-DOCKER_VOLUMES+=" -v $ROOTFS_DIR:/opt/rootfs"
-
-export DOCKER_ENV_VARS
-export DOCKER_VOLUMES
-
-pushd $NNFW_PROJECT_PATH
-
-if [ -n "$DOCKER_INTERACTIVE" ]; then
-  source run docker-shell
-else
-  CMD="export BENCHMARK_ACL_BUILD=1 && make acl && make && make install && make build_test_suite"
-  source run docker-run-user bash -c "${CMD}"
-fi
-EXITCODE=$?
-
-popd
-
-exit $EXITCODE
diff --git a/scripts/command/docker_build_tizen_cross.sh b/scripts/command/docker_build_tizen_cross.sh
deleted file mode 100755
index 6d750b1a9..000000000
--- a/scripts/command/docker_build_tizen_cross.sh
+++ /dev/null
@@ -1,27 +0,0 @@
-#!/bin/bash
-
-DOCKER_ENV_VARS+=" -e TARGET_ARCH=armv7l"
-DOCKER_ENV_VARS+=" -e CROSS_BUILD=1"
-DOCKER_ENV_VARS+=" -e ROOTFS_DIR=/opt/rootfs"
-DOCKER_ENV_VARS+=" -e TARGET_OS=tizen"
-
-# prepare rootfs
-if [[ ! -d $ROOTFS_DIR ]]; then
-  echo "cannot find rootfs"
-  exit 1
-fi
-
-DOCKER_VOLUMES+=" -v $ROOTFS_DIR/:/opt/rootfs"
-
-export NNFW_PROJECT_PATH
-export NNFW_SCRIPT_PATH
-
-pushd $NNFW_PROJECT_PATH
-
-CMD="make && make install && make build_test_suite"
-source run docker-run-user bash -c "${CMD}"
-EXITCODE=$?
-
-popd
-
-exit $EXITCODE
diff --git a/scripts/command/docker_coverage_report.sh b/scripts/command/docker_coverage_report.sh
deleted file mode 100755
index e4d3a92aa..000000000
--- a/scripts/command/docker_coverage_report.sh
+++ /dev/null
@@ -1,9 +0,0 @@
-#!/bin/bash
-
-DOCKER_ENV_VARS+=" -e SRC_PREFIX=${NNFW_PROJECT_PATH}"
-
-pushd ${NNFW_PROJECT_PATH} > /dev/null
-
-source run docker-run-user bash -c "./run gen_coverage_report.sh"
-
-popd > /dev/null
diff --git a/scripts/command/docker_cross_test_coverage_build.sh b/scripts/command/docker_cross_test_coverage_build.sh
deleted file mode 100755
index 8d8e10835..000000000
--- a/scripts/command/docker_cross_test_coverage_build.sh
+++ /dev/null
@@ -1,21 +0,0 @@
-#!/bin/bash
-
-DOCKER_ENV_VARS+=" -e TARGET_ARCH=armv7l"
-DOCKER_ENV_VARS+=" -e CROSS_BUILD=1"
-DOCKER_ENV_VARS+=" -e ROOTFS_DIR=/opt/rootfs"
-DOCKER_ENV_VARS+=" -e COVERAGE_BUILD=1"
-
-# prepare rootfs
-if [[ ! -d $ROOTFS_DIR ]]; then
-  echo "cannot find rootfs"
-  exit 1
-fi
-
-DOCKER_VOLUMES+=" -v $ROOTFS_DIR:/opt/rootfs"
-
-pushd $NNFW_PROJECT_PATH > /dev/null
-
-CMD="make acl && make && make install && make build_coverage_suite"
-source run docker-run-user bash -c "${CMD}"
-
-popd > /dev/null
diff --git a/scripts/command/docker_env_neurun b/scripts/command/docker_env_neurun
deleted file mode 100644
index 53b3bbc83..000000000
--- a/scripts/command/docker_env_neurun
+++ /dev/null
@@ -1 +0,0 @@
-OPTIONS=-DBUILD_NEURUN=ON
diff --git a/scripts/command/docker_env_pureacl_tflite_benchmark_model b/scripts/command/docker_env_pureacl_tflite_benchmark_model
deleted file mode 100644
index b1c40e16a..000000000
--- a/scripts/command/docker_env_pureacl_tflite_benchmark_model
+++ /dev/null
@@ -1,2 +0,0 @@
-OPTIONS=-DBUILD_PURE_ARM_COMPUTE=ON -DBUILD_TFLITE_BENCHMARK_MODEL=ON
-BUILD_TYPE=Release
diff --git a/scripts/command/docker_gbs_build.sh b/scripts/command/docker_gbs_build.sh
deleted file mode 100755
index 047d9eff8..000000000
--- a/scripts/command/docker_gbs_build.sh
+++ /dev/null
@@ -1,26 +0,0 @@
-#!/bin/bash
-
-DOCKER_IMAGE_NAME=${DOCKER_IMAGE_NAME:-nnfw_docker_tizen}
-DOCKER_RPM_HOME=$NNFW_PROJECT_PATH/rpm
-
-if [ "${GBS_RPM_DIR}" == "" ];
-then
-    GBS_RPM_DIR=$NNFW_PROJECT_PATH/Product/out/rpm
-    mkdir -p ${GBS_RPM_DIR}
-fi
-
-DOCKER_VOLUMES+=" -v ${GBS_RPM_DIR}:${DOCKER_RPM_HOME}"
-
-export NNFW_PROJECT_PATH
-export NNFW_SCRIPT_PATH
-
-pushd $NNFW_PROJECT_PATH
-
-CMD="gbs -c ${NNFW_PROJECT_PATH}/scripts/config/gbs.conf build -A armv7l --profile=profile.tizen --clean --include-all --define '${GBS_DEFINE}' &&
-         cp -rf /home/GBS-ROOT/local/repos/tizen/armv7l/RPMS/*.rpm ${DOCKER_RPM_HOME}/."
-source run docker-run bash -c "${CMD}"
-EXITCODE=$?
-
-popd
-
-exit $EXITCODE
diff --git a/scripts/command/docker_run_test.sh b/scripts/command/docker_run_test.sh
deleted file mode 100755
index dadd19f8a..000000000
--- a/scripts/command/docker_run_test.sh
+++ /dev/null
@@ -1,18 +0,0 @@
-#!/bin/bash
-
-export DOCKER_ENV_VARS
-export DOCKER_VOLUMES
-
-pushd $NNFW_PROJECT_PATH
-
-if [ -n "$DOCKER_INTERACTIVE" ]; then
-  source run docker-shell
-else
-  CMD="make install"
-  source run docker-run-user bash -c "${CMD}"
-fi
-EXITCODE=$?
-
-popd
-
-exit $EXITCODE
diff --git a/scripts/command/format-checker.sh b/scripts/command/format-checker.sh
deleted file mode 100755
index 2e947ec70..000000000
--- a/scripts/command/format-checker.sh
+++ /dev/null
@@ -1,178 +0,0 @@
-#!/bin/bash
-
-INVALID_EXIT=0
-
-pushd () {
-    command pushd "$@" > /dev/null
-}
-
-popd () {
-    command popd "$@" > /dev/null
-}
-
-command_exists() {
-  command -v $1 > /dev/null 2>&1
-}
-
-check_cpp_tool() {
-    if ! command_exists clang-format-3.9; then
-        echo "Error: clang-format-3.9 is not available."
-        echo "       Please install clang-format-3.9."
-        exit 1
-    fi
-}
-
-check_python_tool() {
-    if ! command_exists yapf; then
-        echo "Error: yapf is not available."
-        echo "       Please install yapf."
-        exit 1
-    fi
-}
-
-check_newline() {
-    # Check all files (CMakeLists.txt, *.cl, ... not only for C++, Python)
-    FILES_TO_CHECK=$(git ls-files)
-    if [[ ${#FILES_TO_CHECK} -ne 0 ]]; then
-        CRCHECK=$(file $FILES_TO_CHECK | grep 'with CR')
-    fi
-    FILES_TO_FIX=($(echo "$CRCHECK" | grep "with CRLF line" | cut -d':' -f1))
-    for f in ${FILES_TO_FIX[@]}; do
-        tr -d '\r' < $f > $f.fixed && cat $f.fixed > $f && rm $f.fixed
-    done
-    FILES_TO_FIX=($(echo "$CRCHECK" | grep "with CR line" | cut -d':' -f1))
-    for f in ${FILES_TO_FIX[@]}; do
-        tr '\r' '\n' < $f > $f.fixed && cat $f.fixed > $f && rm $f.fixed
-    done
-}
-
-check_permission() {
-    # Check all files except script
-    FILES_TO_CHECK=()
-    for NON_SCRIPT_FILE in $(git ls-files -- . ':!:run' ':!:scripts/git-hooks/*' ':!:*.sh' ':!:*.py'); do
-        FILES_TO_CHECK+=("${NON_SCRIPT_FILE}")
-    done
-
-    if [[ ${#FILES_TO_CHECK} -eq 0 ]]; then
-        return
-    fi
-    for FILE_TO_CHECK in ${FILES_TO_CHECK[@]}; do
-        RESULT=$(stat -c '%A' ${FILE_TO_CHECK} | grep 'x')
-        if [ "${RESULT}" != "" ]; then
-          chmod a-x ${FILE_TO_CHECK}
-        fi
-    done
-}
-
-check_cpp_files() {
-    DIRECTORIES_TO_BE_TESTED=$1
-    DIRECTORIES_NOT_TO_BE_TESTED=$2
-
-    # Check c++ files
-    for TEST_DIR in ${DIRECTORIES_TO_BE_TESTED[@]}; do
-        pushd $TEST_DIR
-            CPP_FILES_TO_CHECK=$(git ls-files '*.h' '*.cpp' '*.cc' ':!:NeuralNetworks.h')
-            ARR=($CPP_FILES_TO_CHECK)
-            for s in ${DIRECTORIES_NOT_TO_BE_TESTED[@]}; do
-                if [[ $s = $TEST_DIR* ]]; then
-                    skip=${s#$TEST_DIR/}/
-                    ARR=(${ARR[*]//$skip*})
-                fi
-            done
-            CPP_FILES_TO_CHECK=${ARR[*]}
-            if [[ ${#CPP_FILES_TO_CHECK} -ne 0 ]]; then
-                clang-format-3.9 -i $CPP_FILES_TO_CHECK
-                EXIT_CODE=$?
-                if [[ $EXIT_CODE -ne 0 ]]; then
-                    INVALID_EXIT=$EXIT_CODE
-                fi
-            fi
-        popd
-    done
-}
-
-check_python_files() {
-    DIRECTORIES_TO_BE_TESTED=$1
-    DIRECTORIES_NOT_TO_BE_TESTED=$2
-
-    # Check python files
-    for TEST_DIR in ${DIRECTORIES_TO_BE_TESTED[@]}; do
-        pushd $TEST_DIR
-            PYTHON_FILES_TO_CHECK=$(git ls-files '*.py')
-            ARR=($PYTHON_FILES_TO_CHECK)
-            for s in ${DIRECTORIES_NOT_TO_BE_TESTED[@]}; do
-                if [[ $s = $TEST_DIR* ]]; then
-                    skip=${s#$TEST_DIR/}/
-                    ARR=(${ARR[*]//$skip*})
-                fi
-            done
-            PYTHON_FILES_TO_CHECK=${ARR[*]}
-            if [[ ${#PYTHON_FILES_TO_CHECK} -ne 0 ]]; then
-                yapf -i --style='{based_on_style: pep8, column_limit: 90}' $PYTHON_FILES_TO_CHECK
-                EXIT_CODE=$?
-                if [[ $EXIT_CODE -ne 0 ]]; then
-                    INVALID_EXIT=$EXIT_CODE
-                fi
-            fi
-        popd
-    done
-}
-
-echo "Make sure commit all changes before running this checker."
-
-__Check_CPP=${CHECK_CPP:-"1"}
-__Check_PYTHON=${CHECK_PYTHON:-"1"}
-
-DIRECTORIES_TO_BE_TESTED=()
-DIRECTORIES_NOT_TO_BE_TESTED=()
-
-for DIR_TO_BE_TESTED in $(find -name '.FORMATCHECKED' -exec dirname {} \;); do
-    DIRECTORIES_TO_BE_TESTED+=("$DIR_TO_BE_TESTED")
-done
-
-for DIR_NOT_TO_BE_TESTED in $(find -name '.FORMATDENY' -exec dirname {} \;); do
-    DIRECTORIES_NOT_TO_BE_TESTED+=("$DIR_NOT_TO_BE_TESTED")
-done
-
-if [[ ${#DIRECTORIES_TO_BE_TESTED[@]} -eq 0 ]]; then
-    echo "No directories to be checked"
-    exit 0
-fi
-
-check_newline
-check_permission
-
-if [[ $__Check_CPP -ne 0 ]]; then
-  check_cpp_tool
-  check_cpp_files $DIRECTORIES_TO_BE_TESTED $DIRECTORIES_NOT_TO_BE_TESTED
-fi
-
-if [[ $__Check_PYTHON -ne 0 ]]; then
-  check_python_tool
-  check_python_files $DIRECTORIES_TO_BE_TESTED $DIRECTORIES_NOT_TO_BE_TESTED
-fi
-
-git diff --ignore-submodules > format.patch
-PATCHFILE_SIZE=$(stat -c%s format.patch)
-
-if [[ -z "${CRCHECK}" ]] && [[ $PATCHFILE_SIZE -eq 0 ]] && [[ $INVALID_EXIT -eq 0 ]]; then
-    echo "[PASSED] Format checker succeed."
-    exit 0
-fi
-
-# Something went wrong
-
-if [[ ! -z "${CRCHECK}" ]]; then
-    echo "[FAILED] Please use LF for newline for following files."
-    echo "$CRCHECK"
-fi
-
-if [[ $PATCHFILE_SIZE -ne 0 ]]; then
-    echo "[FAILED] Format checker failed and update code to follow convention."
-    echo "         You can find changes in format.patch"
-fi
-
-if [[ $INVALID_EXIT -ne 0 ]]; then
-    echo "[[FAILED] Invalid format checker exit."
-fi
-exit 1
diff --git a/scripts/command/gen_coverage_report.sh b/scripts/command/gen_coverage_report.sh
deleted file mode 100755
index fa72717cf..000000000
--- a/scripts/command/gen_coverage_report.sh
+++ /dev/null
@@ -1,57 +0,0 @@
-#!/bin/bash
-
-# This file is based on https://github.sec.samsung.net/STAR/nncc/pull/80
-
-SCRIPT_ROOT="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )"
-HOST_HOME=$SCRIPT_ROOT/../..
-
-LCOV_PATH=$(command -v lcov)
-GENHTML_PATH=$(command -v genhtml)
-
-
-SRC_PREFIX=${SRC_PREFIX:-${DOCKER_HOME}}
-
-if [[ -z "${LCOV_PATH}" ]]; then
-  echo "ERROR: 'lcov' is not found"
-  exit 255
-fi
-
-if [[ -z "${GENHTML_PATH}" ]]; then
-  echo "ERROR: 'genhtml' is not found"
-  exit 255
-fi
-
-OUTPUT_PATH="$1"
-
-if [[ -z "${OUTPUT_PATH}" ]]; then
-  OUTPUT_PATH="$HOST_HOME/coverage"
-fi
-
-if [[ -e "${OUTPUT_PATH}" ]]; then
-  echo "ERROR: '${OUTPUT_PATH}' already exists"
-  exit 255
-fi
-
-mkdir -p "${OUTPUT_PATH}"
-
-RAW_COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.raw.info"
-LIBS_COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.libs.info"
-INCLUDE_COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.include.info"
-RUNTIMES_COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.runtimes.info"
-TOOLS_COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.tools.info"
-FINAL_COVERAGE_INFO_PATH="${OUTPUT_PATH}/coverage.info"
-HTML_PATH="${OUTPUT_PATH}/html"
-COVERTURA_PATH="${OUTPUT_PATH}/nnfw_coverage.xml"
-
-"${LCOV_PATH}" -c -d "${HOST_HOME}" -o "${RAW_COVERAGE_INFO_PATH}"
-"${LCOV_PATH}" -e "${RAW_COVERAGE_INFO_PATH}" -o "${LIBS_COVERAGE_INFO_PATH}" "${SRC_PREFIX}/libs/*"
-"${LCOV_PATH}" -e "${RAW_COVERAGE_INFO_PATH}" -o "${INCLUDE_COVERAGE_INFO_PATH}" "${SRC_PREFIX}/include/*"
-"${LCOV_PATH}" -e "${RAW_COVERAGE_INFO_PATH}" -o "${RUNTIMES_COVERAGE_INFO_PATH}" "${SRC_PREFIX}/runtimes/*"
-"${LCOV_PATH}" -e "${RAW_COVERAGE_INFO_PATH}" -o "${TOOLS_COVERAGE_INFO_PATH}" "${SRC_PREFIX}/tests/tools/*"
-"${LCOV_PATH}" -a "${LIBS_COVERAGE_INFO_PATH}" -a "${INCLUDE_COVERAGE_INFO_PATH}" \
-               -a "${RUNTIMES_COVERAGE_INFO_PATH}" -a "${TOOLS_COVERAGE_INFO_PATH}" \
-               -o "${FINAL_COVERAGE_INFO_PATH}"
-"${GENHTML_PATH}" "${FINAL_COVERAGE_INFO_PATH}" --output-directory "${HTML_PATH}" ${GENHTML_FLAG:-}
-
-tar -zcf "${OUTPUT_PATH}"/coverage_report.tar.gz "${HTML_PATH}"
-python ${HOST_HOME}/externals/lcov-to-cobertura-xml/lcov_cobertura.py "${FINAL_COVERAGE_INFO_PATH}" -o "${COVERTURA_PATH}"
diff --git a/scripts/command/install b/scripts/command/install
deleted file mode 100644
index a40268a50..000000000
--- a/scripts/command/install
+++ /dev/null
@@ -1,16 +0,0 @@
-#!/bin/bash
-
-source "${NNFW_SCRIPT_PATH}/config/build.configuration"
-
-if [[ ! -d "${BUILD_ALIAS}" ]]; then
-  echo "'${BUILD_ALIAS}' does not exist. Please run 'configure' first"
-  exit 255
-fi
-
-if [[ ! -d "${INSTALL_ALIAS}" ]]; then
-  echo "'${INSTALL_ALIAS}' does not exist. Please run 'configure' first"
-  exit 255
-fi
-
-cd ${BUILD_ALIAS}
-make install
diff --git a/scripts/command/nnfw_docker b/scripts/command/nnfw_docker
deleted file mode 100644
index 211124105..000000000
--- a/scripts/command/nnfw_docker
+++ /dev/null
@@ -1,14 +0,0 @@
-DOCKER_IMAGE_NAME=${DOCKER_IMAGE_NAME:-nnfw_docker}
-
-echo "Using docker image $DOCKER_IMAGE_NAME"
-if [[ "$(docker images -q $DOCKER_IMAGE_NAME 2> /dev/null)" == "" ]]; then
-    echo "Need docker image: $DOCKER_IMAGE_NAME"
-    exit 1
-fi
-
-DOCKER_HOME=/home/nnfw
-
-GIT_SSL_NO_VERIFY=1
-DOCKER_ENV_VARS+=" -e http_proxy"
-DOCKER_ENV_VARS+=" -e no_proxy"
-DOCKER_ENV_VARS+=" -e GIT_SSL_NO_VERIFY"
diff --git a/scripts/command/nnfw_docker_tizen b/scripts/command/nnfw_docker_tizen
deleted file mode 100644
index f2fae9c97..000000000
--- a/scripts/command/nnfw_docker_tizen
+++ /dev/null
@@ -1,14 +0,0 @@
-DOCKER_IMAGE_NAME=${DOCKER_IMAGE_NAME:-nnfw_docker_tizen}
-
-echo "Using docker image $DOCKER_IMAGE_NAME"
-if [[ "$(docker images -q $DOCKER_IMAGE_NAME 2> /dev/null)" == "" ]]; then
-    echo "Need docker image: $DOCKER_IMAGE_NAME"
-    exit 1
-fi
-
-DOCKER_HOME=/home/nnfw
-
-GIT_SSL_NO_VERIFY=1
-DOCKER_ENV_VARS+=" -e http_proxy"
-DOCKER_ENV_VARS+=" -e no_proxy"
-DOCKER_ENV_VARS+=" -e GIT_SSL_NO_VERIFY"
diff --git a/scripts/command/tizen_xu4_test.sh b/scripts/command/tizen_xu4_test.sh
deleted file mode 100755
index 38894df0f..000000000
--- a/scripts/command/tizen_xu4_test.sh
+++ /dev/null
@@ -1,155 +0,0 @@
-#!/bin/bash
-
-SCRIPT_ROOT="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )"
-HOST_HOME=$SCRIPT_ROOT/../..
-if [ -z "$TEST_ROOT" ]; then
-    TEST_ROOT=/opt/usr/nnfw-test
-fi
-
-function Usage()
-{
-    echo "Usage: ./tizen_xu4_test.sh --rpm-dir=path/to/rpm-dir --unittest --verification"
-    echo "Usage: ./tizen_xu4_test.sh --test-suite-path=path/to/test-suite.tar.gz --unittest --verification"
-    echo "--rpm-dir : directory containing nnfw.rpm and nnfw-test.rpm"
-    echo "--test-suite-path : filepath to test-suite.tar.gz"
-    echo "--unittest : run unittest"
-    echo "--verification : run verification"
-    echo "--framework : run framework"
-    echo "--gcov-dir : directory to save gcov files"
-}
-
-
-function prepare_rpm_test()
-{
-    echo "======= Test with rpm packages(gbs build) ======="
-    # clean up
-    $SDB_CMD shell rm -rf $TEST_ROOT
-    $SDB_CMD shell mkdir -p $TEST_ROOT
-    # install nnfw nnfw-test rpms
-    for file in $RPM_DIR/*
-    do
-        $SDB_CMD push $file $TEST_ROOT
-        $SDB_CMD shell rpm -Uvh $TEST_ROOT/$(basename $file) --force --nodeps
-    done
-
-    # download tflite model files
-    pushd $HOST_HOME
-    tests/framework/run_test.sh --download=on
-    tar -zcf cache.tar.gz tests/framework/cache
-    $SDB_CMD push cache.tar.gz $TEST_ROOT/.
-    rm -rf cache.tar.gz
-    $SDB_CMD shell tar -zxf $TEST_ROOT/cache.tar.gz -C $TEST_ROOT
-}
-
-function prepare_suite_test()
-{
-    echo "======= Test with test-suite(cross build) ======="
-    # clean up
-    $SDB_CMD shell rm -rf $TEST_ROOT
-    $SDB_CMD shell mkdir -p $TEST_ROOT
-
-    # install test-suite
-    $SDB_CMD push $TEST_SUITE_PATH $TEST_ROOT/$(basename $TEST_SUITE_PATH)
-    $SDB_CMD shell tar -zxf $TEST_ROOT/$(basename $TEST_SUITE_PATH) -C $TEST_ROOT
-
-    # download tflite model files
-    pushd $HOST_HOME
-    tests/framework/run_test.sh --download=on
-    tar -zcf cache.tar.gz tests/framework/cache
-    $SDB_CMD push cache.tar.gz $TEST_ROOT/.
-    rm -rf cache.tar.gz
-    $SDB_CMD shell tar -zxf $TEST_ROOT/cache.tar.gz -C $TEST_ROOT
-}
-
-
-# Parse command argv
-for i in "$@"
-do
-    case $i in
-        -h|--help|help)
-            Usage
-            exit 1
-            ;;
-        --rpm-dir=*)
-            RPM_DIR=${i#*=}
-            ;;
-        --test-suite-path=*)
-            TEST_SUITE_PATH=${i#*=}
-            ;;
-        --unittest)
-            UNITTEST=on
-            ;;
-        --verification)
-            VERIFICATION=on
-            ;;
-        --framework)
-            FRAMEWORK=on
-            ;;
-        --gcov-dir=*)
-            GCOV_DIR=${i#*=}
-            ;;
-    esac
-    shift
-done
-
-
-N=`sdb devices 2>/dev/null | wc -l`
-
-# exit if no device found
-if [[ $N -le 1 ]]; then
-    echo "No device found."
-    exit 1;
-fi
-
-NUM_DEV=$(($N-1))
-echo "device list"
-DEVICE_LIST=`sdb devices 2>/dev/null`
-echo "$DEVICE_LIST" | tail -n"$NUM_DEV"
-
-if [ -z "$SERIAL" ]; then
-    SERIAL=`echo "$DEVICE_LIST" | tail -n1 | awk '{print $1}'`
-fi
-SDB_CMD="sdb -s $SERIAL "
-
-# root on, remount as rw
-$SDB_CMD root on
-$SDB_CMD shell mount -o rw,remount /
-
-SCRIPT_ROOT="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )"
-ROOT=$SCRIPT_ROOT/../
-
-if [ -z "$RPM_DIR" ] && [ -z "$TEST_SUITE_PATH" ]; then
-    echo "Please provide --rpm-dir or --test-suite-path"
-    exit 255
-fi
-
-if [ ! -z "$RPM_DIR" ]; then
-    prepare_rpm_test
-else
-    prepare_suite_test
-fi
-
-# run unittest
-if [ "$UNITTEST" == "on" ]; then
-    $SDB_CMD shell $TEST_ROOT/tests/scripts/test_driver.sh --unittest --artifactpath=$TEST_ROOT
-fi
-
-# run framework test
-if [ "$FRAMEWORK" == "on" ]; then
-    $SDB_CMD shell $TEST_ROOT/tests/scripts/test_driver.sh --frameworktest --artifactpath=$TEST_ROOT
-fi
-
-# run verification
-if [ "$VERIFICATION" == "on" ]; then
-    $SDB_CMD shell $TEST_ROOT/tests/scripts/test_driver.sh --verification --artifactpath=$TEST_ROOT
-fi
-
-# pull gcov files
-if [ -n "$GCOV_DIR" ]; then
-    $SDB_CMD shell 'rm -rf /home/gcov && mkdir -p /home/gcov'
-    $SDB_CMD shell 'find / -type f \( -iname "*.gcda" -or -iname "*.gcno" \) -exec cp {} /home/gcov/. \;'
-    $SDB_CMD shell 'cd /home/ && tar -zcvf gcov.tar.gz ./gcov '
-    cd $GCOV_DIR
-    sdb pull /home/gcov.tar.gz
-    tar -zxvf gcov.tar.gz
-fi
diff --git a/scripts/config/docker.configuration b/scripts/config/docker.configuration
deleted file mode 100644
index 806ffb32e..000000000
--- a/scripts/config/docker.configuration
+++ /dev/null
@@ -1,44 +0,0 @@
-#!/bin/bash
-
-source "$NNFW_SCRIPT_PATH/config/image_name.configuration"
-
-echo "Using docker image $DOCKER_IMAGE_NAME"
-
-if [ -z "`docker images | grep $DOCKER_IMAGE_NAME`" ]; then
-  echo "Need docker image!"
-  exit 1
-fi
-
-HOST_PATH="$NNFW_PROJECT_PATH"
-DOCKER_PATH="$NNFW_PROJECT_PATH"
-
-export GIT_SSL_NO_VERIFY=1
-
-DOCKER_VOLUMES+=" -v $HOST_PATH:$DOCKER_PATH"
-
-if [[ ! -z $ENV_FILE ]]; then
-  DOCKER_ENV_VARS+=" --env-file ${ENV_FILE} "
-fi
-
-DOCKER_ENV_VARS+=" -e http_proxy"
-DOCKER_ENV_VARS+=" -e no_proxy"
-DOCKER_ENV_VARS+=" -e GIT_SSL_NO_VERIFY"
-DOCKER_ENV_VARS+=" -e EXTERNAL_DOWNLOAD_SERVER"
-
-DOCKER_RUN_OPTS="${DOCKER_OPTS}"
-DOCKER_RUN_OPTS+=" --rm"
-DOCKER_RUN_OPTS+=" -w $DOCKER_PATH"
-
-function docker_cleanup()
-{
-  # Newly created files during during docker run can have different ownership.
-  # This may cause some problems, for example, some jenkins slaves or developers
-  # can't remove built files due to lack of permission.
-  # To address this issue, let's change owner of all files
-  # in nncc to owner of nncc.
-  NNFW_OWNER_UID=$(stat -c "%u" $HOST_PATH)
-  NNFW_OWNER_GID=$(stat -c "%g" $HOST_PATH)
-
-  CMD="chown -R $NNFW_OWNER_UID:$NNFW_OWNER_GID $DOCKER_PATH"
-  docker run $DOCKER_RUN_OPTS $DOCKER_ENV_VARS $DOCKER_VOLUMES $DOCKER_IMAGE_NAME $CMD
-}
diff --git a/scripts/config/gbs.conf b/scripts/config/gbs.conf
deleted file mode 100644
index af555c399..000000000
--- a/scripts/config/gbs.conf
+++ /dev/null
@@ -1,21 +0,0 @@
-[general]
-#Current profile name which should match a profile section name
-profile = profile.tizen
-
-[profile.tizen]
-user=obs_viewer
-passwdx = QlpoOTFBWSZTWWV18UwAAAKDgAAAkiCZgCAAMQZMQQDJ6jQwAvxdyRThQkGV18Uw
-obs = obs.tizen
-repos = repo.tizen_base,repo.tizen_mobile
-buildroot = /home/GBS-ROOT/
-
-[obs.tizen]
-url = http://api.tizen.org
-
-[repo.tizen_mobile]
-url = http://download.tizen.org/snapshots/tizen/unified/latest/repos/standard/packages/
-
-[repo.tizen_base]
-url =  http://download.tizen.org/snapshots/tizen/base/latest/repos/standard/packages/
-
-
diff --git a/scripts/config/image_name.configuration b/scripts/config/image_name.configuration
deleted file mode 100644
index 507f154c7..000000000
--- a/scripts/config/image_name.configuration
+++ /dev/null
@@ -1,3 +0,0 @@
-#!/bin/bash
-
-DOCKER_IMAGE_NAME=${DOCKER_IMAGE_NAME:-nnfw_docker}
diff --git a/scripts/docker/Dockerfile b/scripts/docker/Dockerfile
deleted file mode 100644
index 37e4e1ebf..000000000
--- a/scripts/docker/Dockerfile
+++ /dev/null
@@ -1,19 +0,0 @@
-FROM ubuntu:16.04
-
-ENV http_proxy $http_proxy
-ENV https_proxy $https_proxy
-
-RUN apt-get update && apt-get --yes --force-yes install build-essential
-RUN apt-get update && apt-get --yes --force-yes install scons cmake
-RUN apt-get update && apt-get --yes --force-yes install libboost-all-dev
-RUN apt-get update && apt-get --yes --force-yes install git
-RUN apt-get update && apt-get --yes --force-yes install gcc-5-arm-linux-gnueabi g++-5-arm-linux-gnueabi
-RUN apt-get update && apt-get --yes --force-yes install lcov
-RUN apt-get update && apt-get --yes --force-yes install clang-format-3.9 python-pip
-RUN pip install yapf==0.22.0
-RUN apt-get update && apt-get --yes --force-yes install doxygen graphviz
-RUN apt-get update && apt-get --yes --force-yes install wget
-RUN wget https://releases.linaro.org/components/toolchain/binaries/6.3-2017.02/arm-linux-gnueabihf/gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf.tar.xz -O gcc.tar.xz -nv
-RUN tar -xf gcc.tar.xz -C /opt/ && rm -rf gcc.tar.xz
-ENV PATH "/opt/gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf/bin:$PATH"
-RUN apt-get update && apt-get --yes --force-yes install python3
diff --git a/scripts/docker/Dockerfile_tizen b/scripts/docker/Dockerfile_tizen
deleted file mode 100644
index d56cf78f1..000000000
--- a/scripts/docker/Dockerfile_tizen
+++ /dev/null
@@ -1,13 +0,0 @@
-FROM ubuntu:16.04
-
-ENV http_proxy $http_proxy
-ENV https_proxy $https_proxy
-
-RUN echo 'deb [trusted=yes] http://download.tizen.org/tools/latest-release/Ubuntu_16.04/ /' | cat >> /etc/apt/sources.list
-
-RUN apt-get update && apt-get --yes --force-yes install gbs
-
-RUN apt-get --yes --force-yes install wget unzip
-RUN wget http://download.tizen.org/sdk/tizenstudio/official/binary/sdb_3.1.4_ubuntu-64.zip -O sdb.zip
-RUN unzip -d tmp sdb.zip && rm sdb.zip
-RUN cp tmp/data/tools/sdb /usr/bin/. && rm -rf tmp 
\ No newline at end of file
diff --git a/scripts/git-hooks/install_hooks.sh b/scripts/git-hooks/install_hooks.sh
deleted file mode 100755
index 9ab7342fc..000000000
--- a/scripts/git-hooks/install_hooks.sh
+++ /dev/null
@@ -1,11 +0,0 @@
-#!/usr/bin/env bash
-
-REPO_PATH=$(git rev-parse --show-toplevel)
-REPO_HOOKS_PATH=scripts/git-hooks
-GIT_HOOKS_PATH=$REPO_PATH/.git/hooks
-REPO_PATH_REL=../.. # Relative path from REPO_HOOKS_PATH
-
-# Create symbolic links to hooks dir
-
-# NOTE `ln -s` does not overwrite if the file exists.
-ln -s $REPO_PATH_REL/$REPO_HOOKS_PATH/pre-push $GIT_HOOKS_PATH/pre-push
diff --git a/scripts/git-hooks/pre-push b/scripts/git-hooks/pre-push
deleted file mode 100755
index adad9bd38..000000000
--- a/scripts/git-hooks/pre-push
+++ /dev/null
@@ -1,32 +0,0 @@
-#!/bin/sh
-
-# An example hook script to verify what is about to be pushed.  Called by "git
-# push" after it has checked the remote status, but before anything has been
-# pushed.  If this script exits with a non-zero status nothing will be pushed.
-#
-# This hook is called with the following parameters:
-#
-# $1 -- Name of the remote to which the push is being done
-# $2 -- URL to which the push is being done
-#
-# If pushing without using a named remote those arguments will be equal.
-#
-# Information about the commits which are being pushed is supplied as lines to
-# the standard input in the form:
-#
-#   <local ref> <local sha1> <remote ref> <remote sha1>
-#
-# This sample shows how to prevent push of commits where the log message starts
-# with "WIP" (work in progress).
-
-remote="$1"
-url="$2"
-
-# RUN FORMAT CHECKER
-
-REPO_PATH=$(git rev-parse --show-toplevel)
-cd $REPO_PATH
-
-./run format-checker.sh
-
-exit $?
diff --git a/tests/CMakeLists.txt b/tests/CMakeLists.txt
index 23d09d13e..96b610a45 100644
--- a/tests/CMakeLists.txt
+++ b/tests/CMakeLists.txt
@@ -1,2 +1,3 @@
 add_subdirectory(nnapi)
 add_subdirectory(tools)
+add_subdirectory(custom_op)
diff --git a/tests/custom_op/CMakeLists.txt b/tests/custom_op/CMakeLists.txt
new file mode 100644
index 000000000..ffdfc877c
--- /dev/null
+++ b/tests/custom_op/CMakeLists.txt
@@ -0,0 +1,6 @@
+if(NOT BUILD_NEURUN)
+  return()
+endif(NOT BUILD_NEURUN)
+
+add_subdirectory(apps)
+add_subdirectory(kernels)
diff --git a/tests/custom_op/apps/CMakeLists.txt b/tests/custom_op/apps/CMakeLists.txt
new file mode 100644
index 000000000..18eef3f0e
--- /dev/null
+++ b/tests/custom_op/apps/CMakeLists.txt
@@ -0,0 +1,20 @@
+if(NOT BUILD_NEURUN)
+    return()
+endif(NOT BUILD_NEURUN)
+
+# Takes target name, source list and kernel list
+function(add_nnfw_custom_op_app NAME)
+    cmake_parse_arguments(
+            PARSED_ARGS # prefix of output variables
+            "" # list of names of the boolean arguments (only defined ones will be true)
+            "" # list of names of mono-valued arguments
+            "SOURCES;KERNELS" # list of names of multi-valued arguments (output variables are lists)
+            ${ARGN} # arguments of the function to parse, here we take the all original ones
+    )
+    add_executable(${NAME} ${PARSED_ARGS_SOURCES})
+    target_link_libraries(${NAME} PRIVATE ${PARSED_ARGS_KERNELS})
+    target_link_libraries(${NAME} PRIVATE nnfw-dev)
+    target_link_libraries(${NAME} PRIVATE dl ${LIB_PTHREAD})
+endfunction()
+
+add_subdirectories()
diff --git a/tests/custom_op/apps/FillFrom/CMakeLists.txt b/tests/custom_op/apps/FillFrom/CMakeLists.txt
new file mode 100644
index 000000000..c0914e389
--- /dev/null
+++ b/tests/custom_op/apps/FillFrom/CMakeLists.txt
@@ -0,0 +1,4 @@
+add_nnfw_custom_op_app(FillFrom_runner
+                       SOURCES FillFrom_runner.cc
+                       KERNELS FillFrom
+                       )
diff --git a/tests/custom_op/apps/FillFrom/FillFrom_runner.cc b/tests/custom_op/apps/FillFrom/FillFrom_runner.cc
new file mode 100644
index 000000000..585ffb9cb
--- /dev/null
+++ b/tests/custom_op/apps/FillFrom/FillFrom_runner.cc
@@ -0,0 +1,227 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "nnfw.h"
+#include "nnfw_dev.h"
+
+#include <cassert>
+#include <iostream>
+#include <vector>
+#include <chrono>
+#include <cmath>
+
+#define NNPR_ENSURE_STATUS(a)        \
+  do                                 \
+  {                                  \
+    if ((a) != NNFW_STATUS_NO_ERROR) \
+    {                                \
+      exit(-1);                      \
+    }                                \
+  } while (0)
+
+extern "C" void FillFromEval(nnfw_custom_kernel_params *params, char *userdata,
+                             size_t userdata_size);
+
+const nnfw_custom_eval custom_func_ptr_list[] = {FillFromEval};
+const char *custom_func_name_list[] = {"FillFrom"};
+int custom_func_list_size = 1;
+
+void register_custom_operations(nnfw_session *session)
+{
+  for (int i = 0; i < custom_func_list_size; ++i)
+  {
+    auto name = custom_func_name_list[i];
+    custom_kernel_registration_info info;
+    info.eval_function = custom_func_ptr_list[i];
+    NNPR_ENSURE_STATUS(nnfw_register_custom_op_info(session, name, &info));
+  }
+}
+
+uint64_t NowMicros()
+{
+  auto time_point = std::chrono::high_resolution_clock::now();
+  auto since_epoch = time_point.time_since_epoch();
+  // default precision of high resolution clock is 10e-9 (nanoseconds)
+  return std::chrono::duration_cast<std::chrono::microseconds>(since_epoch).count();
+}
+
+uint64_t num_elems(const nnfw_tensorinfo *ti)
+{
+  uint64_t n = 1;
+  for (uint32_t i = 0; i < ti->rank; ++i)
+  {
+    assert(ti->dims[i] >= 0);
+    n *= ti->dims[i];
+  }
+  return n;
+};
+
+// TODO replace with data import
+// Valid only for model FillFrom.tflite
+// FillFrom(idx=3, val=1.1)
+static const float in_data[10] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10};
+static const float ref_data[10] = {0, 0, 0, 4, 1.1, 1.1, 1.1, 1.1, 1.1, 1.1};
+
+std::vector<float> genData(uint64_t size)
+{
+  assert(size == sizeof(in_data) / sizeof(in_data[0]));
+  std::cout << "Warning: runner uses hardcoded data form in_data" << std::endl;
+  std::vector<float> vec(size);
+  for (uint64_t i = 0; i < size; i++)
+    vec[i] = in_data[i];
+  return vec;
+}
+
+template <typename InIter1, typename InIter2>
+static auto findMaxDifference(InIter1 first1, InIter1 last1, InIter2 first2)
+    -> decltype(*first1 - *first2)
+{
+  auto max_difference = std::abs(*first1 - *first2);
+  for (; first1 != last1; ++first1, ++first2)
+  {
+    auto diff = std::abs(*first1 - *first2);
+    if (diff > max_difference)
+    {
+      max_difference = diff;
+    }
+  }
+  return max_difference;
+}
+
+int main(const int argc, char **argv)
+{
+  if (argc < 2)
+  {
+    std::cerr << "[ERROR] No model specified\n";
+    return 1;
+  }
+
+  char *model_path = argv[1];
+
+  nnfw_session *session = nullptr;
+  NNPR_ENSURE_STATUS(nnfw_create_session(&session));
+
+  register_custom_operations(session);
+
+  NNPR_ENSURE_STATUS(nnfw_load_model_from_file(session, model_path));
+
+  uint32_t num_inputs;
+  NNPR_ENSURE_STATUS(nnfw_input_size(session, &num_inputs));
+
+  // verify input and output
+
+  if (num_inputs == 0)
+  {
+    std::cerr << "[ ERROR ] "
+              << "No inputs in model => execution is not possible" << std::endl;
+    exit(1);
+  }
+
+  auto verifyInputTypes = [session]() {
+    uint32_t sz;
+    NNPR_ENSURE_STATUS(nnfw_input_size(session, &sz));
+    for (uint32_t i = 0; i < sz; ++i)
+    {
+      nnfw_tensorinfo ti;
+      NNPR_ENSURE_STATUS(nnfw_input_tensorinfo(session, i, &ti));
+      if (ti.dtype != NNFW_TYPE_TENSOR_FLOAT32)
+      {
+        std::cerr << "Only float 32bit is supported." << std::endl;
+        exit(-1);
+      }
+    }
+  };
+
+  auto verifyOutputTypes = [session]() {
+    uint32_t sz;
+    NNPR_ENSURE_STATUS(nnfw_output_size(session, &sz));
+
+    for (uint32_t i = 0; i < sz; ++i)
+    {
+      nnfw_tensorinfo ti;
+      NNPR_ENSURE_STATUS(nnfw_output_tensorinfo(session, i, &ti));
+      if (ti.dtype != NNFW_TYPE_TENSOR_FLOAT32)
+      {
+        std::cerr << "Only float 32bit is supported." << std::endl;
+        exit(-1);
+      }
+    }
+  };
+
+  verifyInputTypes();
+  verifyOutputTypes();
+
+  // prepare execution
+
+  uint64_t prepare_ms = NowMicros();
+  NNPR_ENSURE_STATUS(nnfw_prepare(session));
+  prepare_ms = NowMicros() - prepare_ms;
+
+  // prepare input
+  std::vector<std::vector<float>> inputs(num_inputs);
+
+  auto generateInputs = [session, num_inputs, &inputs]() {
+    // generate random data
+    const int seed = 1;
+    for (uint32_t i = 0; i < num_inputs; ++i)
+    {
+      nnfw_tensorinfo ti;
+      NNPR_ENSURE_STATUS(nnfw_input_tensorinfo(session, i, &ti));
+      auto input_num_elements = num_elems(&ti);
+      inputs[i] = genData(input_num_elements);
+      NNPR_ENSURE_STATUS(nnfw_set_input(session, i, NNFW_TYPE_TENSOR_FLOAT32, inputs[i].data(),
+                                        sizeof(float) * input_num_elements));
+    }
+  };
+
+  generateInputs();
+
+  // prepare output
+  uint32_t num_outputs = 0;
+  NNPR_ENSURE_STATUS(nnfw_output_size(session, &num_outputs));
+  std::vector<std::vector<float>> outputs(num_outputs);
+
+  for (uint32_t i = 0; i < num_outputs; i++)
+  {
+    nnfw_tensorinfo ti;
+    NNPR_ENSURE_STATUS(nnfw_output_tensorinfo(session, i, &ti));
+    auto output_num_elements = num_elems(&ti);
+    outputs[i].resize(output_num_elements);
+    NNPR_ENSURE_STATUS(nnfw_set_output(session, i, NNFW_TYPE_TENSOR_FLOAT32, outputs[i].data(),
+                                       sizeof(float) * output_num_elements));
+  }
+
+  uint64_t run_ms = NowMicros();
+  NNPR_ENSURE_STATUS(nnfw_run(session));
+  run_ms = NowMicros() - run_ms;
+
+  const float tolerance = 0.01f;
+  auto max_difference =
+      findMaxDifference(outputs[0].begin(), outputs[0].end(), std::begin(ref_data));
+
+  if (max_difference > tolerance)
+  {
+    std::cout << "Max difference is more than tolerance" << std::endl;
+    std::cout << "Max difference is " << max_difference << std::endl;
+  }
+
+  std::cout << "nnfw_prepare takes " << prepare_ms / 1e3 << " sec" << std::endl;
+  std::cout << "nnfw_run     takes " << run_ms / 1e3 << " sec" << std::endl;
+
+  NNPR_ENSURE_STATUS(nnfw_close_session(session));
+
+  return 0;
+}
diff --git a/tests/custom_op/kernels/CMakeLists.txt b/tests/custom_op/kernels/CMakeLists.txt
new file mode 100644
index 000000000..9b960a3b3
--- /dev/null
+++ b/tests/custom_op/kernels/CMakeLists.txt
@@ -0,0 +1,9 @@
+nnfw_find_package(FlatBuffers REQUIRED)
+
+function(add_nnfw_kernel NAME)
+    add_library(${NAME} STATIC ${ARGN})
+    target_link_libraries(${NAME} PRIVATE nnfw-dev)
+    target_link_libraries(${NAME} PRIVATE flatbuffers)
+endfunction()
+
+add_subdirectories()
diff --git a/tests/custom_op/kernels/FillFrom/CMakeLists.txt b/tests/custom_op/kernels/FillFrom/CMakeLists.txt
new file mode 100644
index 000000000..acef865a4
--- /dev/null
+++ b/tests/custom_op/kernels/FillFrom/CMakeLists.txt
@@ -0,0 +1 @@
+add_nnfw_kernel(FillFrom FillFromKernel.cc)
diff --git a/tests/custom_op/kernels/FillFrom/FillFromKernel.cc b/tests/custom_op/kernels/FillFrom/FillFromKernel.cc
new file mode 100644
index 000000000..3f8da5a92
--- /dev/null
+++ b/tests/custom_op/kernels/FillFrom/FillFromKernel.cc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "nnfw_dev.h"
+
+#include "flatbuffers/flexbuffers.h"
+
+extern "C" void FillFromEval(nnfw_custom_kernel_params *params, char *userdata,
+                             size_t userdata_size)
+{
+  auto userdata_root = flexbuffers::GetRoot(reinterpret_cast<uint8_t *>(userdata), userdata_size);
+
+  auto attr_map = userdata_root.AsMap();
+
+  auto idx = attr_map["idx"].AsInt32();
+  auto val = attr_map["val"].AsFloat();
+
+  int32_t flat_size = 1;
+  for (int32_t i = 0; i < params->inputs[0].type.rank; ++i)
+  {
+    flat_size *= params->inputs[0].type.dims[i];
+  }
+
+  assert(idx <= flat_size);
+
+  auto output_flat = static_cast<float *>(params->outputs[0].allocation);
+  auto input_flat = static_cast<float *>(params->inputs[0].allocation);
+
+  for (int32_t i = 0; i < idx; ++i)
+  {
+    output_flat[i] = 0;
+  }
+
+  for (int32_t i = idx; i < flat_size; ++i)
+  {
+    output_flat[i] = val;
+  }
+
+  output_flat[idx] = input_flat[idx];
+}
diff --git a/tests/custom_op/nnpkgs/FillFrom/FillFrom.json b/tests/custom_op/nnpkgs/FillFrom/FillFrom.json
new file mode 100644
index 000000000..5dac87d6a
--- /dev/null
+++ b/tests/custom_op/nnpkgs/FillFrom/FillFrom.json
@@ -0,0 +1,115 @@
+{
+  version: 3,
+  operator_codes: [
+    {
+      builtin_code: "CUSTOM",
+      custom_code: "FillFrom",
+      version: 1
+    }
+  ],
+  subgraphs: [
+    {
+      tensors: [
+        {
+          shape: [
+            10
+          ],
+          type: "FLOAT32",
+          buffer: 1,
+          name: "t_0",
+          is_variable: false
+        },
+        {
+          shape: [
+            10
+          ],
+          type: "FLOAT32",
+          buffer: 2,
+          name: "t_1",
+          is_variable: false
+        },
+        {
+          shape: [
+            10
+          ],
+          type: "FLOAT32",
+          buffer: 3,
+          name: "t_2",
+          is_variable: false
+        }
+      ],
+      inputs: [
+        0
+      ],
+      outputs: [
+        1
+      ],
+      operators: [
+        {
+          opcode_index: 0,
+          inputs: [
+            0
+          ],
+          outputs: [
+            1
+          ],
+          builtin_options_type: 0,
+          custom_options: [
+            105,
+            100,
+            120,
+            0,
+            118,
+            97,
+            108,
+            0,
+            2,
+            9,
+            6,
+            0,
+            3,
+            0,
+            0,
+            0,
+            1,
+            0,
+            0,
+            0,
+            2,
+            0,
+            0,
+            0,
+            3,
+            0,
+            0,
+            0,
+            205,
+            204,
+            140,
+            63,
+            6,
+            14,
+            10,
+            38,
+            1
+          ],
+          custom_options_format: "FLEXBUFFERS"
+        }
+      ]
+    }
+  ],
+  description: "nnpackage",
+  buffers: [
+    {
+    },
+    {
+    },
+    {
+    },
+    {
+    }
+  ],
+  metadata_buffer: [
+
+  ]
+}
diff --git a/tests/custom_op/nnpkgs/FillFrom/FillFrom.tflite b/tests/custom_op/nnpkgs/FillFrom/FillFrom.tflite
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/tests/custom_op/nnpkgs/FillFrom/FillFrom.tflite
diff --git a/tests/custom_op/nnpkgs/FillFrom/metadata/MANIFEST b/tests/custom_op/nnpkgs/FillFrom/metadata/MANIFEST
new file mode 100644
index 000000000..4e97cf146
--- /dev/null
+++ b/tests/custom_op/nnpkgs/FillFrom/metadata/MANIFEST
@@ -0,0 +1,7 @@
+{
+  "major-version" : "1",
+  "minor-version" : "0",
+  "patch-version" : "0",
+  "models"      : [ "FillFrom.tflite" ],
+  "model-types" : [ "tflite" ]
+}
diff --git a/tests/framework/run_test.sh b/tests/framework/run_test.sh
index a9feaab55..930971534 100755
--- a/tests/framework/run_test.sh
+++ b/tests/framework/run_test.sh
@@ -36,24 +36,26 @@ function Usage()
     echo ""
 }
 
-function verify_downloaded_file()
+function need_download()
 {
     LOCAL_PATH=$1
     REMOTE_URL=$2
-
+    if [ ! -e $LOCAL_PATH ]; then
+        return 0;
+    fi
     # Ignore checking md5 in cache
     if [ ! -z $IGNORE_MD5 ] && [ "$IGNORE_MD5" == "1" ]; then
-        return 0
+        return 1
     fi
 
     LOCAL_HASH=$(md5sum $LOCAL_PATH | awk '{ print $1 }')
-    REMOTE_HASH=$(curl -I -ss $REMOTE_URL | grep '^Content-MD5' | tr -d '\r\n' | awk '{ print $2 }' | base64 -d | xxd -p)
+    REMOTE_HASH=$(curl -ss $REMOTE_URL | md5sum  | awk '{ print $1 }')
     # TODO Emit an error when Content-MD5 field was not found. (Server configuration issue)
-
     if [ "$LOCAL_HASH" != "$REMOTE_HASH" ]; then
         echo "Downloaded file is outdated or incomplete."
-        return 1
+        return 0
     fi
+    return 1
 }
 
 DRIVER_BIN=""
@@ -159,7 +161,7 @@ run_tests()
         fi
 
         # Download unless we have it in cache (Also check md5sum)
-        if [ ! -e $MODELFILE ] || ! verify_downloaded_file "$MODELFILE" "$MODELFILE_URL"; then
+        if need_download "$MODELFILE" "$MODELFILE_URL"; then
             echo ""
             echo "Download test file for $TEST_NAME"
             echo "======================"
@@ -231,7 +233,7 @@ download_tests()
         fi
 
         # Download unless we have it in cache (Also check md5sum)
-        if [ ! -e $MODELFILE ] || ! verify_downloaded_file "$MODELFILE" "$MODELFILE_URL"; then
+        if need_download "$MODELFILE" "$MODELFILE_URL"; then
             echo ""
             echo "Download test file for $TEST_NAME"
             echo "======================"
diff --git a/tests/framework/tests/MODELS/mobilenet/config.sh b/tests/framework/tests/MODELS/mobilenet/config.sh
index b17a3bd54..b23d687cd 100644
--- a/tests/framework/tests/MODELS/mobilenet/config.sh
+++ b/tests/framework/tests/MODELS/mobilenet/config.sh
@@ -1,3 +1,2 @@
 MODELFILE_SERVER_PATH="https://storage.googleapis.com/download.tensorflow.org/models/tflite"
 MODELFILE_NAME="mobilenet_v1_0.25_128_float_2017_11_08.zip"
-STATUS="enabled"
diff --git a/tests/framework/tests/concat/2D/config.sh b/tests/framework/tests/concat/2D/config.sh
index bb71cad83..fd22e708c 100644
--- a/tests/framework/tests/concat/2D/config.sh
+++ b/tests/framework/tests/concat/2D/config.sh
@@ -1,2 +1 @@
 MODELFILE_NAME="concat_test_2d.tflite"
-STATUS="disabled"
diff --git a/tests/framework/tests/custom/abs/config.sh b/tests/framework/tests/custom/abs/config.sh
new file mode 100644
index 000000000..3030bcb72
--- /dev/null
+++ b/tests/framework/tests/custom/abs/config.sh
@@ -0,0 +1 @@
+MODELFILE_NAME="custom_abs_test.tflite"
diff --git a/tests/framework/tests/custom/squared_difference/config.sh b/tests/framework/tests/custom/squared_difference/config.sh
new file mode 100644
index 000000000..745a84447
--- /dev/null
+++ b/tests/framework/tests/custom/squared_difference/config.sh
@@ -0,0 +1 @@
+MODELFILE_NAME="custom_squared_diff_test.tflite"
diff --git a/tests/framework/tests/custom/tensorflowmax/config.sh b/tests/framework/tests/custom/tensorflowmax/config.sh
index 058799935..122c459db 100644
--- a/tests/framework/tests/custom/tensorflowmax/config.sh
+++ b/tests/framework/tests/custom/tensorflowmax/config.sh
@@ -1,2 +1 @@
 MODELFILE_NAME="custom_max_test.tflite"
-STATUS="disabled"
diff --git a/tests/framework/tests/custom/tensorflowsum/config.sh b/tests/framework/tests/custom/tensorflowsum/config.sh
new file mode 100644
index 000000000..0a6dfe348
--- /dev/null
+++ b/tests/framework/tests/custom/tensorflowsum/config.sh
@@ -0,0 +1 @@
+MODELFILE_NAME="custom_sum_test.tflite"
diff --git a/tests/framework/tests/exp/config.sh b/tests/framework/tests/exp/config.sh
index 47f878783..944f0bbce 100644
--- a/tests/framework/tests/exp/config.sh
+++ b/tests/framework/tests/exp/config.sh
@@ -1,2 +1 @@
 MODELFILE_NAME="exp_4d.tflite"
-STATUS="enabled"
diff --git a/tests/framework/tests/hashtable_lookup/config.sh b/tests/framework/tests/hashtable_lookup/config.sh
index 1176a36f1..3222ee4d2 100644
--- a/tests/framework/tests/hashtable_lookup/config.sh
+++ b/tests/framework/tests/hashtable_lookup/config.sh
@@ -1,2 +1 @@
 MODELFILE_NAME="hashtable_lookup_test1.tflite"
-STATUS="disabled"
diff --git a/tests/framework/tests/logistic/config.sh b/tests/framework/tests/logistic/config.sh
index 456773aa9..632c3629e 100644
--- a/tests/framework/tests/logistic/config.sh
+++ b/tests/framework/tests/logistic/config.sh
@@ -1 +1,2 @@
 MODELFILE_NAME="sigmoid_test.tflite"
+STATUS="disabled"
diff --git a/tests/framework/tests/neg/config.sh b/tests/framework/tests/neg/config.sh
index 8cde1a258..000f7c811 100644
--- a/tests/framework/tests/neg/config.sh
+++ b/tests/framework/tests/neg/config.sh
@@ -1,2 +1 @@
 MODELFILE_NAME="neg_4d.tflite"
-STATUS="enabled"
diff --git a/tests/framework/tests/pad/pad1/config.sh b/tests/framework/tests/pad/pad1/config.sh
index 1c154c1dd..088cd8962 100644
--- a/tests/framework/tests/pad/pad1/config.sh
+++ b/tests/framework/tests/pad/pad1/config.sh
@@ -1,2 +1 @@
 MODELFILE_NAME="pad_test.tflite"
-STATUS="disabled"
diff --git a/tests/framework/tests/pad/pad2/config.sh b/tests/framework/tests/pad/pad2/config.sh
index 6a0b2d30f..1683f5350 100644
--- a/tests/framework/tests/pad/pad2/config.sh
+++ b/tests/framework/tests/pad/pad2/config.sh
@@ -1,2 +1 @@
 MODELFILE_NAME="pad_test2.tflite"
-STATUS="disabled"
diff --git a/tests/framework/tests/reduce_max/config.sh b/tests/framework/tests/reduce_max/config.sh
new file mode 100644
index 000000000..d636b8bd3
--- /dev/null
+++ b/tests/framework/tests/reduce_max/config.sh
@@ -0,0 +1 @@
+MODELFILE_NAME="reduce_max_1d.tflite"
diff --git a/tests/framework/tests/reduce_mean/test1/config.sh b/tests/framework/tests/reduce_mean/test1/config.sh
index 7884000aa..2f370ea4e 100644
--- a/tests/framework/tests/reduce_mean/test1/config.sh
+++ b/tests/framework/tests/reduce_mean/test1/config.sh
@@ -1,3 +1 @@
-# REDUCE_MEAN is supported after tensorflow 1.10
 MODELFILE_NAME="reduce_mean_test.tflite"
-STATUS="disabled"
diff --git a/tests/framework/tests/reduce_mean/test2/config.sh b/tests/framework/tests/reduce_mean/test2/config.sh
index d9ca89a7a..6c54779a9 100644
--- a/tests/framework/tests/reduce_mean/test2/config.sh
+++ b/tests/framework/tests/reduce_mean/test2/config.sh
@@ -1,3 +1 @@
-# REDUCE_MEAN is supported after tensorflow 1.10
 MODELFILE_NAME="reduce_mean_test_2.tflite"
-STATUS="disabled"
diff --git a/tests/framework/tests/rsqrt/config.sh b/tests/framework/tests/rsqrt/config.sh
index c97f8af6e..87aa85277 100644
--- a/tests/framework/tests/rsqrt/config.sh
+++ b/tests/framework/tests/rsqrt/config.sh
@@ -1,2 +1 @@
 MODELFILE_NAME="rsqrt_4d.tflite"
-STATUS="disabled"
diff --git a/tests/framework/tests/sub/broadcast/config.sh b/tests/framework/tests/sub/broadcast/config.sh
index f61285915..2b1add0e5 100644
--- a/tests/framework/tests/sub/broadcast/config.sh
+++ b/tests/framework/tests/sub/broadcast/config.sh
@@ -1,2 +1 @@
 MODELFILE_NAME="sub_test_broadcast.tflite"
-STATUS="disabled"
diff --git a/tests/framework/tests/tranpose/config.sh b/tests/framework/tests/transpose/config.sh
index 9adb85e70..9adb85e70 100644
--- a/tests/framework/tests/tranpose/config.sh
+++ b/tests/framework/tests/transpose/config.sh
diff --git a/tests/framework/tests/transpose_conv/same/config.sh b/tests/framework/tests/transpose_conv/same/config.sh
new file mode 100644
index 000000000..2cca86e03
--- /dev/null
+++ b/tests/framework/tests/transpose_conv/same/config.sh
@@ -0,0 +1 @@
+MODELFILE_NAME="transpose_conv_test.tflite"
diff --git a/tests/framework/tests/transpose_conv/valid/config.sh b/tests/framework/tests/transpose_conv/valid/config.sh
new file mode 100644
index 000000000..d162331a3
--- /dev/null
+++ b/tests/framework/tests/transpose_conv/valid/config.sh
@@ -0,0 +1 @@
+MODELFILE_NAME="transpose_conv_valid_test.tflite"
diff --git a/tests/nnapi/CMakeLists.txt b/tests/nnapi/CMakeLists.txt
index d3c9cab4c..dc8ba865f 100644
--- a/tests/nnapi/CMakeLists.txt
+++ b/tests/nnapi/CMakeLists.txt
@@ -2,6 +2,20 @@ if (NOT BUILD_RUNTIME_NNAPI_TEST)
   return()
 endif(NOT BUILD_RUNTIME_NNAPI_TEST)
 
+if (GENERATE_RUNTIME_NNAPI_TESTS)
+  set(GENERATOR_SCRIPT "${CMAKE_CURRENT_SOURCE_DIR}/specs/generate_test.sh")
+  file(GLOB_RECURSE TEST_SPECS "${CMAKE_CURRENT_SOURCE_DIR}/specs/*.mod.py")
+  set(GENERATED_CPPS "${CMAKE_CURRENT_SOURCE_DIR}/src/generated/all_generated_V1_1_cts_tests.cpp"
+                     "${CMAKE_CURRENT_SOURCE_DIR}/src/generated/all_generated_V1_0_cts_tests.cpp"
+                     "${CMAKE_CURRENT_SOURCE_DIR}/src/generated/all_generated_Ex_cts_tests.cpp")
+  add_custom_command(OUTPUT ${GENERATED_CPPS}
+                     COMMAND ${GENERATOR_SCRIPT}
+                     DEPENDS ${GENERATOR_SCRIPT} ${TEST_SPECS}
+                     COMMENT "Generating runtime nnapi tests")
+  add_custom_target(generate-runtime-nnapi-tests
+                    DEPENDS ${GENERATED_CPPS})
+endif(GENERATE_RUNTIME_NNAPI_TESTS)
+
 # Executable `runtime_run` (Dummy runner executable using NN API)
 set(RUNTIME_NNAPI_TEST nnapi_gtest)
 set(RUNTIME_NNAPI_TEST_SRC ${CMAKE_CURRENT_SOURCE_DIR}/src/TestMain.cpp
@@ -12,45 +26,38 @@ set(GENERATED_TEST_SRC ${CMAKE_CURRENT_SOURCE_DIR}/src/TestGenerated_V1_0.cpp
                       ${CMAKE_CURRENT_SOURCE_DIR}/src/TestGenerated_V1_1.cpp
                       ${CMAKE_CURRENT_SOURCE_DIR}/src/TestGenerated_Ex.cpp)
 
-# g++-6.3 can build TestGenerated_XXX.cpp.
-if (CMAKE_COMPILER_IS_GNUCC AND NOT CMAKE_CXX_COMPILER_VERSION VERSION_LESS 6.3)
-  set(RUNTIME_NNAPI_TEST_SRC ${RUNTIME_NNAPI_TEST_SRC} ${GENERATED_TEST_SRC})
-endif()
-
-# Both gbs and cross for tizen support building generated test
-if (OBS_BUILD)
-  set(RUNTIME_NNAPI_TEST_SRC ${RUNTIME_NNAPI_TEST_SRC} ${GENERATED_TEST_SRC})
-endif()
+set(RUNTIME_NNAPI_TEST_SRC ${RUNTIME_NNAPI_TEST_SRC} ${GENERATED_TEST_SRC})
 
 add_executable(${RUNTIME_NNAPI_TEST} ${RUNTIME_NNAPI_TEST_SRC})
 
+if (GENERATE_RUNTIME_NNAPI_TESTS)
+  add_dependencies(${RUNTIME_NNAPI_TEST} generate-runtime-nnapi-tests)
+endif(GENERATE_RUNTIME_NNAPI_TESTS)
+
 nnfw_find_package(GTest)
 
-set(RUNTIME_NNAPI_TEST_SRC_INC ${NNFW_INCLUDE_DIR}
-                               ${CMAKE_CURRENT_SOURCE_DIR}/include
+set(RUNTIME_NNAPI_TEST_SRC_INC ${CMAKE_CURRENT_SOURCE_DIR}/include
                                ${CMAKE_CURRENT_SOURCE_DIR}/src)
 target_include_directories(${RUNTIME_NNAPI_TEST} PRIVATE ${RUNTIME_NNAPI_TEST_SRC_INC})
 
 if (BUILD_NEURUN)
-  set(SKIPLIST_FILE_NAME ${RUNTIME_NNAPI_TEST}.skip.${TARGET_PLATFORM}.neurun)
-elseif (BUILD_PURE_ARM_COMPUTE)
   set(SKIPLIST_FILE_NAME ${RUNTIME_NNAPI_TEST}.skip.${TARGET_PLATFORM})
+elseif (BUILD_PURE_ARM_COMPUTE)
+  set(SKIPLIST_FILE_NAME ${RUNTIME_NNAPI_TEST}.skip.${TARGET_PLATFORM}.pacl)
 endif()
+target_link_libraries(${RUNTIME_NNAPI_TEST} nnfw_lib_nnapi)
 target_link_libraries(${RUNTIME_NNAPI_TEST} gtest)
 target_link_libraries(${RUNTIME_NNAPI_TEST} ${LIB_PTHREAD} dl)
 
-install(TARGETS nnapi_gtest DESTINATION unittest)
+install(TARGETS ${RUNTIME_NNAPI_TEST} DESTINATION unittest)
 
 install(FILES ${SKIPLIST_FILE_NAME}
         DESTINATION unittest
         RENAME ${RUNTIME_NNAPI_TEST}.skip
         OPTIONAL)
 
-# If build both runtime (pure_arm_compute and neurun) at once,
-# install both skiplist file as backup
-if (BUILD_NEURUN AND BUILD_PURE_ARM_COMPUTE)
-  set(SKIPLIST_ALL_RUNTIME
-    ${RUNTIME_NNAPI_TEST}.skip.${TARGET_PLATFORM}
-    ${RUNTIME_NNAPI_TEST}.skip.${TARGET_PLATFORM}.neurun)
-  install(FILES ${SKIPLIST_ALL_RUNTIME} DESTINATION unittest OPTIONAL)
-endif()
+# Install skiplist file for target as backup
+FILE(GLOB SKIPLIST_TARGET ${CMAKE_CURRENT_SOURCE_DIR}/${RUNTIME_NNAPI_TEST}.skip.${TARGET_PLATFORM}*)
+FILE(GLOB SKIPLIST_NOARCH ${CMAKE_CURRENT_SOURCE_DIR}/${RUNTIME_NNAPI_TEST}.skip.noarch.*)
+list(APPEND SKIPLIST_ALL_RUNTIME ${SKIPLIST_TARGET} ${SKIPLIST_NOARCH})
+install(FILES ${SKIPLIST_ALL_RUNTIME} DESTINATION unittest OPTIONAL)
diff --git a/tests/nnapi/nnapi_gtest.skip.armv7l-linux b/tests/nnapi/nnapi_gtest.skip.armv7l-linux
index 1c85418a9..124634a3f 100644
--- a/tests/nnapi/nnapi_gtest.skip.armv7l-linux
+++ b/tests/nnapi/nnapi_gtest.skip.armv7l-linux
@@ -1,44 +1,15 @@
-GeneratedTests.add_broadcast_quant8
-GeneratedTests.add_quant8
-GeneratedTests.argmax_ex_quant8*
-GeneratedTests.logical_not_ex*
-GeneratedTests.logistic_quant8_1
-GeneratedTests.logistic_quant8_2
-GeneratedTests.lsh_projection
-GeneratedTests.lsh_projection_2
-GeneratedTests.lsh_projection_weights_as_inputs
-GeneratedTests.lstm
-GeneratedTests.lstm2
-GeneratedTests.lstm2_state
-GeneratedTests.lstm2_state2
-GeneratedTests.lstm3
-GeneratedTests.lstm3_state
-GeneratedTests.lstm3_state2
-GeneratedTests.lstm3_state3
-GeneratedTests.lstm_state
-GeneratedTests.lstm_state2
-GeneratedTests.mul_broadcast_quant8
-GeneratedTests.mul_quant8
+#
+# Following tests will be skipped on armv7l-linux
+#
+# Not support operations
+GeneratedTests.lsh_projection*
+GeneratedTests.mobilenet*
+GeneratedTests.svdf*
+GeneratedTests.batch_to_space*
+GeneratedTests.space_to_batch*
+# Unexpected result
 GeneratedTests.pack*
-GeneratedTests.svdf
-GeneratedTests.svdf2
-GeneratedTests.svdf_state
-ValidationTestCompilation.CreateExecution
-ValidationTestCompilation.Finish
-ValidationTestCompilation.SetPreference
-ValidationTestExecution.EventWait
-ValidationTestExecution.SetInput
-ValidationTestExecution.SetInputFromMemory
-ValidationTestExecution.SetOutput
-ValidationTestExecution.SetOutputFromMemory
-ValidationTestExecution.StartCompute
-ValidationTestIdentify.DuplicateInputs
-ValidationTestIdentify.DuplicateOutputs
-ValidationTestIdentify.InputIsOutput
-ValidationTestIdentify.OutputIsInput
-ValidationTestModel.AddOperand
-ValidationTestModel.CreateCompilation
-ValidationTestModel.Finish
-ValidationTestModel.IdentifyInputsAndOutputs
-ValidationTestModel.SetOperandValue
-ValidationTestModel.SetOperandValueFromMemory
+# Not support broadcast
+GeneratedTests.logical_or_ex_broadcast_4D_2D
+# Unsupported optional input that has shape
+GeneratedTests.lstm2*
diff --git a/tests/nnapi/nnapi_gtest.skip.armv7l-linux.acl_neon b/tests/nnapi/nnapi_gtest.skip.armv7l-linux.acl_neon
new file mode 100644
index 000000000..964696245
--- /dev/null
+++ b/tests/nnapi/nnapi_gtest.skip.armv7l-linux.acl_neon
@@ -0,0 +1,30 @@
+#
+# Following tests will be skipped on armv7l-linux acl_neon
+#
+# Not support operations
+TrivialTest.BroadcastMulTwo
+GeneratedTests.depth_to_space*
+GeneratedTests.dequantize
+GeneratedTests.embedding_lookup*
+GeneratedTests.hashtable_lookup*
+GeneratedTests.lsh_projection*
+GeneratedTests.mobilenet*
+GeneratedTests.reduce_min*
+GeneratedTests.space_to_depth*
+GeneratedTests.svdf*
+GeneratedTests.batch_to_space*
+GeneratedTests.space_to_batch*
+GeneratedTests.cast_ex*
+GeneratedTests.gather_ex*
+GeneratedTests.reduce_max_ex*
+GeneratedTests.topk_v2*
+# Unexpected result
+GeneratedTests.pack*
+# Float error
+GeneratedTests.exp_ex_1D_float
+GeneratedTests.exp_ex_2D_float
+# Unsupported optional input that has shape
+GeneratedTests.lstm2*
+# Unsupported data type
+GeneratedTests.argmax_ex_int32
+GeneratedTests.argmax_ex_neg_axis_int32
diff --git a/tests/nnapi/nnapi_gtest.skip.armv7l-linux.cpu b/tests/nnapi/nnapi_gtest.skip.armv7l-linux.cpu
new file mode 100644
index 000000000..39b7271ec
--- /dev/null
+++ b/tests/nnapi/nnapi_gtest.skip.armv7l-linux.cpu
@@ -0,0 +1,77 @@
+#
+# Following tests will be skipped on armv7l-linux
+#
+# Not support operations
+TrivialTest.AddTwo
+TrivialTest.AddThree
+TrivialTest.BroadcastAddTwo
+TrivialTest.BroadcastMulTwo
+ValidationTestCompilation.SetPreference
+ValidationTestCompilation.CreateExecution
+ValidationTestCompilation.Finish
+ValidationTestExecution.SetInput
+ValidationTestExecution.SetOutput
+ValidationTestExecution.SetInputFromMemory
+ValidationTestExecution.SetOutputFromMemory
+ValidationTestExecution.StartCompute
+ValidationTestExecution.EventWait
+GeneratedTests.add_broadcast*
+GeneratedTests.add_quant*
+GeneratedTests.argmax*
+GeneratedTests.depth_to_space*
+GeneratedTests.dequantize
+GeneratedTests.embedding_lookup
+GeneratedTests.embedding_lookup_2d_nnfw
+GeneratedTests.embedding_lookup_4d_nnfw
+GeneratedTests.equal_ex*
+GeneratedTests.exp_ex*
+GeneratedTests.floor_
+GeneratedTests.greater_equal_ex*
+GeneratedTests.hashtable_lookup*
+GeneratedTests.l2_normalization*
+GeneratedTests.l2_pool*
+GeneratedTests.local_response_norm*
+GeneratedTests.less_ex*
+GeneratedTests.logical_and_ex*
+GeneratedTests.logical_or_ex*
+GeneratedTests.logistic*
+GeneratedTests.lsh_projection*
+GeneratedTests.lstm*
+GeneratedTests.mobilenet*
+GeneratedTests.mul*
+GeneratedTests.neg*
+GeneratedTests.notequal*
+GeneratedTests.prelu_ex*
+GeneratedTests.reduce_min*
+GeneratedTests.relu1*
+GeneratedTests.relu6*
+GeneratedTests.relu*
+GeneratedTests.resize_bilinear*
+GeneratedTests.rnn*
+GeneratedTests.rsqrt*
+GeneratedTests.mean*
+GeneratedTests.pad*
+GeneratedTests.space_to_depth*
+GeneratedTests.sqrt_ex*
+GeneratedTests.squared_difference_ex*
+GeneratedTests.svdf*
+GeneratedTests.tanh_
+GeneratedTests.batch_to_space*
+GeneratedTests.div_*
+GeneratedTests.space_to_batch*
+GeneratedTests.squeeze*
+GeneratedTests.strided_slice*
+GeneratedTests.sub*
+GeneratedTests.transpose*
+GeneratedTests.cast_ex*
+GeneratedTests.gather_ex*
+GeneratedTests.strided_slice_ex*
+GeneratedTests.reduce_max_ex*
+GeneratedTests.reduce_sum_ex*
+GeneratedTests.topk_v2*
+# Unexpected result
+GeneratedTests.split*
+GeneratedTests.transpose_conv*
+GeneratedTests.pack*
+GeneratedTests.unpack*
+GeneratedTests.logical_not_ex*
diff --git a/tests/nnapi/nnapi_gtest.skip.armv7l-linux.neurun b/tests/nnapi/nnapi_gtest.skip.armv7l-linux.neurun
deleted file mode 100644
index 59957ba60..000000000
--- a/tests/nnapi/nnapi_gtest.skip.armv7l-linux.neurun
+++ /dev/null
@@ -1,117 +0,0 @@
-#
-# Following tests will be skipped on armv7l-linux
-#
-# Not support operations
-TrivialTest.AddTwo
-TrivialTest.AddThree
-TrivialTest.BroadcastAddTwo
-TrivialTest.BroadcastMulTwo
-ValidationTestCompilation.SetPreference
-ValidationTestCompilation.CreateExecution
-ValidationTestCompilation.Finish
-ValidationTestIdentify.InputIsOutput
-ValidationTestIdentify.OutputIsInput
-ValidationTestIdentify.DuplicateInputs
-ValidationTestIdentify.DuplicateOutputs
-ValidationTestIdentify.Ok
-ValidationTestExecution.SetInput
-ValidationTestExecution.SetOutput
-ValidationTestExecution.SetInputFromMemory
-ValidationTestExecution.SetOutputFromMemory
-ValidationTestExecution.StartCompute
-ValidationTestExecution.EventWait
-GeneratedTests.add*
-GeneratedTests.argmax*
-GeneratedTests.avg_pool_float_1
-GeneratedTests.avg_pool_float_2
-GeneratedTests.avg_pool_float_3
-GeneratedTests.avg_pool_float_4
-GeneratedTests.avg_pool_quant8_1
-GeneratedTests.avg_pool_quant8_2
-GeneratedTests.avg_pool_quant8_3
-GeneratedTests.avg_pool_quant8_4
-GeneratedTests.conv_float_channels
-GeneratedTests.conv_float_channels_weights_as_inputs
-GeneratedTests.conv_float_large
-GeneratedTests.conv_float_large_weights_as_inputs
-GeneratedTests.conv_float
-GeneratedTests.conv_float_weights_as_inputs
-GeneratedTests.conv_quant8_channels
-GeneratedTests.conv_quant8_channels_weights_as_inputs
-GeneratedTests.conv_quant8_large
-GeneratedTests.conv_quant8_large_weights_as_inputs
-GeneratedTests.conv_quant8
-GeneratedTests.conv_quant8_overflow
-GeneratedTests.conv_quant8_overflow_weights_as_inputs
-GeneratedTests.conv_quant8_weights_as_inputs
-GeneratedTests.depth_to_space*
-GeneratedTests.depthwise_conv2d*
-GeneratedTests.depthwise_conv
-GeneratedTests.dequantize
-GeneratedTests.embedding_lookup
-GeneratedTests.embedding_lookup_2d_nnfw
-GeneratedTests.embedding_lookup_4d_nnfw
-GeneratedTests.equal_ex*
-GeneratedTests.exp_ex*
-GeneratedTests.floor_
-GeneratedTests.hashtable_lookup*
-GeneratedTests.l2_normalization*
-GeneratedTests.l2_pool*
-GeneratedTests.local_response_norm*
-GeneratedTests.logical_and_ex*
-GeneratedTests.logical_or_ex*
-GeneratedTests.logistic*
-GeneratedTests.lsh_projection*
-GeneratedTests.lstm*
-GeneratedTests.max_pool_float_1
-GeneratedTests.max_pool_float_2
-GeneratedTests.max_pool_float_3
-GeneratedTests.max_pool_quant8_1
-GeneratedTests.max_pool_quant8_2
-GeneratedTests.max_pool_quant8_3
-GeneratedTests.mobilenet*
-GeneratedTests.mul*
-GeneratedTests.neg*
-GeneratedTests.notequal*
-GeneratedTests.prelu_ex*
-GeneratedTests.reduce_min*
-GeneratedTests.relu1*
-GeneratedTests.relu6*
-GeneratedTests.relu*
-GeneratedTests.resize_bilinear*
-GeneratedTests.rnn*
-GeneratedTests.rsqrt*
-GeneratedTests.mean*
-GeneratedTests.pad*
-GeneratedTests.space_to_depth*
-GeneratedTests.sqrt_ex*
-GeneratedTests.squared_difference_ex*
-GeneratedTests.svdf*
-GeneratedTests.tanh_
-GeneratedTests.batch_to_space*
-GeneratedTests.div_*
-GeneratedTests.space_to_batch*
-GeneratedTests.squeeze*
-GeneratedTests.strided_slice*
-GeneratedTests.sub*
-GeneratedTests.transpose*
-GeneratedTests.cast_ex*
-GeneratedTests.gather_ex*
-GeneratedTests.strided_slice_ex*
-GeneratedTests.tensorflowmax_ex*
-GeneratedTests.reduce_sum_ex*
-GeneratedTests.topk_v2*
-# Unhandled exception
-GeneratedTests.concat*
-GeneratedTests.fully_connected*
-GeneratedTests.reshape*
-# Unexpected result
-GeneratedTests.avg_pool_quant8_5
-GeneratedTests.conv_quant8_2
-GeneratedTests.max_pool_quant8_4
-GeneratedTests.softmax*
-GeneratedTests.split*
-GeneratedTests.transpose_conv*
-GeneratedTests.pack*
-GeneratedTests.unpack*
-GeneratedTests.logical_not_ex*
diff --git a/tests/nnapi/nnapi_gtest.skip.armv7l-linux.pacl b/tests/nnapi/nnapi_gtest.skip.armv7l-linux.pacl
new file mode 100644
index 000000000..c6c4f2694
--- /dev/null
+++ b/tests/nnapi/nnapi_gtest.skip.armv7l-linux.pacl
@@ -0,0 +1,38 @@
+GeneratedTests.greater_equal_ex*
+GeneratedTests.less_ex*
+GeneratedTests.lsh_projection
+GeneratedTests.lsh_projection_2
+GeneratedTests.lsh_projection_weights_as_inputs
+GeneratedTests.lstm
+GeneratedTests.lstm2
+GeneratedTests.lstm2_state
+GeneratedTests.lstm2_state2
+GeneratedTests.lstm3
+GeneratedTests.lstm3_state
+GeneratedTests.lstm3_state2
+GeneratedTests.lstm3_state3
+GeneratedTests.lstm_state
+GeneratedTests.lstm_state2
+GeneratedTests.prelu_ex_quant8_1
+GeneratedTests.prelu_ex_broadcast_quant8_1
+GeneratedTests.svdf*
+GeneratedTests.transpose_conv_ex_float_4
+ValidationTestCompilation.CreateExecution
+ValidationTestCompilation.Finish
+ValidationTestCompilation.SetPreference
+ValidationTestExecution.EventWait
+ValidationTestExecution.SetInput
+ValidationTestExecution.SetInputFromMemory
+ValidationTestExecution.SetOutput
+ValidationTestExecution.SetOutputFromMemory
+ValidationTestExecution.StartCompute
+ValidationTestIdentify.DuplicateInputs
+ValidationTestIdentify.DuplicateOutputs
+ValidationTestIdentify.InputIsOutput
+ValidationTestIdentify.OutputIsInput
+ValidationTestModel.AddOperand
+ValidationTestModel.CreateCompilation
+ValidationTestModel.Finish
+ValidationTestModel.IdentifyInputsAndOutputs
+ValidationTestModel.SetOperandValue
+ValidationTestModel.SetOperandValueFromMemory
diff --git a/tests/nnapi/nnapi_gtest.skip.armv7l-tizen b/tests/nnapi/nnapi_gtest.skip.armv7l-tizen
index ebb51de94..124634a3f 100644
--- a/tests/nnapi/nnapi_gtest.skip.armv7l-tizen
+++ b/tests/nnapi/nnapi_gtest.skip.armv7l-tizen
@@ -1,47 +1,15 @@
-GeneratedTests.lsh_projection
-GeneratedTests.lsh_projection_2
-GeneratedTests.lsh_projection_weights_as_inputs
-GeneratedTests.lstm
-GeneratedTests.lstm2
-GeneratedTests.lstm2_state
-GeneratedTests.lstm2_state2
-GeneratedTests.lstm3
-GeneratedTests.lstm3_state
-GeneratedTests.lstm3_state2
-GeneratedTests.lstm3_state3
-GeneratedTests.lstm_state
-GeneratedTests.lstm_state2
-GeneratedTests.notequal*
-GeneratedTests.prelu_ex*
-GeneratedTests.svdf
-GeneratedTests.svdf2
-GeneratedTests.svdf_state
-GeneratedTests.logical_not_ex*
-ValidationTestCompilation.CreateExecution
-ValidationTestCompilation.SetPreference
-ValidationTestIdentify.DuplicateInputs
-ValidationTestIdentify.DuplicateOutputs
-ValidationTestIdentify.InputIsOutput
-ValidationTestIdentify.OutputIsInput
-ValidationTestModel.AddOperand
-ValidationTestModel.CreateCompilation
-ValidationTestModel.Finish
-ValidationTestModel.IdentifyInputsAndOutputs
-ValidationTestModel.SetOperandValue
-ValidationTestModel.SetOperandValueFromMemory
-ValidationTestCompilation.Finish
-ValidationTestExecution.SetInput
-ValidationTestExecution.SetOutput
-ValidationTestExecution.SetInputFromMemory
-ValidationTestExecution.SetOutputFromMemory
-ValidationTestExecution.StartCompute
-ValidationTestExecution.EventWait
-GeneratedTests.add_broadcast_quant8
-GeneratedTests.add_quant8
-GeneratedTests.logical_and_ex*
-GeneratedTests.logical_or_ex*
-GeneratedTests.logistic_quant8_1
-GeneratedTests.logistic_quant8_2
-GeneratedTests.mul_broadcast_quant8
-GeneratedTests.mul_quant8
+#
+# Following tests will be skipped on armv7l-linux
+#
+# Not support operations
+GeneratedTests.lsh_projection*
+GeneratedTests.mobilenet*
+GeneratedTests.svdf*
+GeneratedTests.batch_to_space*
+GeneratedTests.space_to_batch*
+# Unexpected result
 GeneratedTests.pack*
+# Not support broadcast
+GeneratedTests.logical_or_ex_broadcast_4D_2D
+# Unsupported optional input that has shape
+GeneratedTests.lstm2*
diff --git a/tests/nnapi/nnapi_gtest.skip.noarch.interp b/tests/nnapi/nnapi_gtest.skip.noarch.interp
new file mode 100644
index 000000000..6f97b8235
--- /dev/null
+++ b/tests/nnapi/nnapi_gtest.skip.noarch.interp
@@ -0,0 +1,72 @@
+#
+# Following tests will be skipped on x86_64-linux interpreter
+#
+# Not support operations
+TrivialTest.Broadcast*
+GeneratedTests.avg_pool_quant*
+GeneratedTests.concat_quant*
+GeneratedTests.conv_quant*
+GeneratedTests.depthwise_conv2d_quant*
+GeneratedTests.fully_connected_quant*
+GeneratedTests.max_pool_quant*
+GeneratedTests.softmax_quant*
+GeneratedTests.add_broadcast*
+GeneratedTests.add_quant*
+GeneratedTests.argmax*
+GeneratedTests.depth_to_space*
+GeneratedTests.dequantize
+GeneratedTests.embedding_lookup
+GeneratedTests.embedding_lookup_2d_nnfw
+GeneratedTests.embedding_lookup_4d_nnfw
+GeneratedTests.equal_ex*
+GeneratedTests.exp_ex*
+GeneratedTests.floor_
+GeneratedTests.greater_equal_ex*
+GeneratedTests.hashtable_lookup*
+GeneratedTests.l2_normalization*
+GeneratedTests.l2_pool*
+GeneratedTests.local_response_norm*
+GeneratedTests.less_ex*
+GeneratedTests.logical_and_ex*
+GeneratedTests.logical_or_ex*
+GeneratedTests.logistic*
+GeneratedTests.lsh_projection*
+GeneratedTests.lstm*
+GeneratedTests.mobilenet*
+GeneratedTests.mul*
+GeneratedTests.neg*
+GeneratedTests.notequal*
+GeneratedTests.prelu_ex*
+GeneratedTests.reduce_min*
+GeneratedTests.relu1*
+GeneratedTests.relu6*
+GeneratedTests.relu*
+GeneratedTests.resize_bilinear*
+GeneratedTests.rnn*
+GeneratedTests.rsqrt*
+GeneratedTests.mean*
+GeneratedTests.pad*
+GeneratedTests.space_to_depth*
+GeneratedTests.sqrt_ex*
+GeneratedTests.squared_difference_ex*
+GeneratedTests.svdf*
+GeneratedTests.tanh_
+GeneratedTests.batch_to_space*
+GeneratedTests.div_*
+GeneratedTests.space_to_batch*
+GeneratedTests.squeeze*
+GeneratedTests.strided_slice*
+GeneratedTests.sub*
+GeneratedTests.transpose*
+GeneratedTests.cast_ex*
+GeneratedTests.gather_ex*
+GeneratedTests.strided_slice_ex*
+GeneratedTests.reduce_max_ex*
+GeneratedTests.reduce_sum_ex*
+GeneratedTests.topk_v2*
+# Unexpected result
+GeneratedTests.split*
+GeneratedTests.transpose_conv*
+GeneratedTests.pack*
+GeneratedTests.unpack*
+GeneratedTests.logical_not_ex*
diff --git a/tests/nnapi/nnapi_gtest.skip.x86_64-linux b/tests/nnapi/nnapi_gtest.skip.x86_64-linux
index e87c4acf6..901a10391 100644
--- a/tests/nnapi/nnapi_gtest.skip.x86_64-linux
+++ b/tests/nnapi/nnapi_gtest.skip.x86_64-linux
@@ -1,88 +1,78 @@
 #
 # Following tests will be skipped on x86_64-linux
 #
-# =====================
-# Fails in CPU fallback
-# =====================
-GeneratedTests.depth_to_space_float_1
-GeneratedTests.depth_to_space_float_2
-GeneratedTests.depth_to_space_float_3
-GeneratedTests.depth_to_space_quant8_1
-GeneratedTests.depth_to_space_quant8_2
+# Not support operations
+TrivialTest.AddTwo
+TrivialTest.AddThree
+TrivialTest.BroadcastAddTwo
+TrivialTest.BroadcastMulTwo
+ValidationTestCompilation.SetPreference
+ValidationTestCompilation.CreateExecution
+ValidationTestCompilation.Finish
+ValidationTestExecution.SetInput
+ValidationTestExecution.SetOutput
+ValidationTestExecution.SetInputFromMemory
+ValidationTestExecution.SetOutputFromMemory
+ValidationTestExecution.StartCompute
+ValidationTestExecution.EventWait
+GeneratedTests.add_broadcast*
+GeneratedTests.add_quant*
+GeneratedTests.argmax*
+GeneratedTests.depth_to_space*
+GeneratedTests.depthwise_conv2d_quant8*
 GeneratedTests.dequantize
 GeneratedTests.embedding_lookup
-GeneratedTests.exp_ex_1D_float
+GeneratedTests.embedding_lookup_2d_nnfw
+GeneratedTests.embedding_lookup_4d_nnfw
 GeneratedTests.equal_ex*
-GeneratedTests.exp_ex_2D_float
+GeneratedTests.exp_ex*
 GeneratedTests.floor_
-GeneratedTests.hashtable_lookup_float
-GeneratedTests.hashtable_lookup_quant8
-GeneratedTests.l2_normalization_2
-GeneratedTests.l2_normalization_large
-GeneratedTests.l2_normalization
-GeneratedTests.local_response_norm_float_1
-GeneratedTests.local_response_norm_float_2
-GeneratedTests.local_response_norm_float_3
-GeneratedTests.local_response_norm_float_4
+GeneratedTests.greater_equal_ex*
+GeneratedTests.hashtable_lookup*
+GeneratedTests.l2_normalization*
+GeneratedTests.l2_pool*
+GeneratedTests.less*
+GeneratedTests.local_response_norm*
 GeneratedTests.logical_and_ex*
-GeneratedTests.lsh_projection_2
-GeneratedTests.lsh_projection
-GeneratedTests.lsh_projection_weights_as_inputs
-GeneratedTests.lstm2
-GeneratedTests.lstm2_state2
-GeneratedTests.lstm2_state
-GeneratedTests.lstm3
-GeneratedTests.lstm3_state2
-GeneratedTests.lstm3_state3
-GeneratedTests.lstm3_state
-GeneratedTests.lstm
-GeneratedTests.lstm_state2
-GeneratedTests.lstm_state
+GeneratedTests.logical_or_ex*
+GeneratedTests.logistic*
+GeneratedTests.lsh_projection*
+GeneratedTests.lstm*
+GeneratedTests.mobilenet*
+GeneratedTests.mul*
 GeneratedTests.neg*
 GeneratedTests.notequal*
 GeneratedTests.prelu_ex*
-GeneratedTests.reduce_min_ex*
-GeneratedTests.relu1_float_1
-GeneratedTests.relu1_float_2
-GeneratedTests.relu1_quant8_1
-GeneratedTests.relu1_quant8_2
-GeneratedTests.rnn
-GeneratedTests.rnn_state
-GeneratedTests.rsqrt_ex_float_1
-GeneratedTests.space_to_depth_float_1
-GeneratedTests.space_to_depth_float_2
-GeneratedTests.space_to_depth_float_3
-GeneratedTests.space_to_depth_quant8_1
-GeneratedTests.space_to_depth_quant8_2
+GeneratedTests.reduce_min*
+GeneratedTests.relu1*
+GeneratedTests.relu6*
+GeneratedTests.relu*
+GeneratedTests.resize_bilinear*
+GeneratedTests.rnn*
+GeneratedTests.rsqrt*
+GeneratedTests.mean*
+GeneratedTests.pad*
+GeneratedTests.space_to_depth*
 GeneratedTests.sqrt_ex*
 GeneratedTests.squared_difference_ex*
-GeneratedTests.svdf2
-GeneratedTests.svdf
-GeneratedTests.svdf_state
-GeneratedTests.strided_slice_float_10
-GeneratedTests.strided_slice_float_1
-GeneratedTests.strided_slice_float_2
-GeneratedTests.strided_slice_float_3
-GeneratedTests.strided_slice_float_4
-GeneratedTests.strided_slice_float_5
-GeneratedTests.strided_slice_float_6
-GeneratedTests.strided_slice_float_7
-GeneratedTests.strided_slice_float_8
-GeneratedTests.strided_slice_float_9
-GeneratedTests.strided_slice
-GeneratedTests.tensorflowmax_ex*
+GeneratedTests.svdf*
+GeneratedTests.tanh_
+GeneratedTests.batch_to_space*
+GeneratedTests.div_*
+GeneratedTests.space_to_batch*
+GeneratedTests.squeeze*
+GeneratedTests.strided_slice*
+GeneratedTests.sub*
+GeneratedTests.transpose*
+GeneratedTests.cast_ex*
+GeneratedTests.gather_ex*
+GeneratedTests.strided_slice_ex*
+GeneratedTests.reduce_max_ex*
 GeneratedTests.reduce_sum_ex*
-GeneratedTests.sub_broadcast_float
-GeneratedTests.logical_not_ex*
-TrivialTest.*
-ValidationTest.*
-ValidationTestModel.*
-ValidationTestCompilation.*
-ValidationTestIdentify.*
-ValidationTestExecution.*
-GeneratedTests.gather_ex_1D_quant8
-GeneratedTests.gather_ex_2D_quant8
+GeneratedTests.topk_v2*
+# Unexpected result
 GeneratedTests.split*
 GeneratedTests.transpose_conv*
 GeneratedTests.pack*
 GeneratedTests.unpack*
+GeneratedTests.logical_not_ex*
diff --git a/tests/nnapi/nnapi_test_generator/android-p/README.md b/tests/nnapi/nnapi_test_generator/android-p/README.md
new file mode 100644
index 000000000..469e467ea
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-p/README.md
@@ -0,0 +1,11 @@
+# nnapi test generator
+
+_nnapi test generator_ aims at generating NN public C API tests.
+
+To generate tests, run the following command.
+
+```
+$ tests/nnapi/specs/generate_test.sh
+```
+
+Original code is at https://android.googlesource.com/platform/frameworks/ml/+/efd22b6.
diff --git a/externals/nnapi_test_generator/include/TestHarness.h b/tests/nnapi/nnapi_test_generator/android-p/include/TestHarness.h
index 1fcb0d661..1fcb0d661 100644
--- a/externals/nnapi_test_generator/include/TestHarness.h
+++ b/tests/nnapi/nnapi_test_generator/android-p/include/TestHarness.h
diff --git a/externals/nnapi_test_generator/slicing.py b/tests/nnapi/nnapi_test_generator/android-p/slicing.py
index f08e9d1a1..f08e9d1a1 100755..100644
--- a/externals/nnapi_test_generator/slicing.py
+++ b/tests/nnapi/nnapi_test_generator/android-p/slicing.py
diff --git a/externals/nnapi_test_generator/test_generator.py b/tests/nnapi/nnapi_test_generator/android-p/test_generator.py
index 922ef7754..922ef7754 100755..100644
--- a/externals/nnapi_test_generator/test_generator.py
+++ b/tests/nnapi/nnapi_test_generator/android-p/test_generator.py
diff --git a/externals/nnapi_test_generator/tests/P_conv/conv_1_h3_w2_SAME.mod.py b/tests/nnapi/nnapi_test_generator/android-p/tests/P_conv/conv_1_h3_w2_SAME.mod.py
index 8e93749e2..8e93749e2 100644
--- a/externals/nnapi_test_generator/tests/P_conv/conv_1_h3_w2_SAME.mod.py
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_conv/conv_1_h3_w2_SAME.mod.py
diff --git a/externals/nnapi_test_generator/tests/P_conv/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_conv/stderr.txt.expect
index c5a6e36b9..c5a6e36b9 100644
--- a/externals/nnapi_test_generator/tests/P_conv/stderr.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_conv/stderr.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_conv/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_conv/stdout.txt.expect
index 47d92b6b8..47d92b6b8 100644
--- a/externals/nnapi_test_generator/tests/P_conv/stdout.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_conv/stdout.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_depthwise_conv/depthwise_conv.bin.mod.py b/tests/nnapi/nnapi_test_generator/android-p/tests/P_depthwise_conv/depthwise_conv.bin.mod.py
index 8738ee01b..8738ee01b 100644
--- a/externals/nnapi_test_generator/tests/P_depthwise_conv/depthwise_conv.bin.mod.py
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_depthwise_conv/depthwise_conv.bin.mod.py
diff --git a/externals/nnapi_test_generator/tests/P_depthwise_conv/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_depthwise_conv/stderr.txt.expect
index c5a6e36b9..c5a6e36b9 100644
--- a/externals/nnapi_test_generator/tests/P_depthwise_conv/stderr.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_depthwise_conv/stderr.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_depthwise_conv/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_depthwise_conv/stdout.txt.expect
index 9a22cc3e3..9a22cc3e3 100644
--- a/externals/nnapi_test_generator/tests/P_depthwise_conv/stdout.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_depthwise_conv/stdout.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_explicit/explicit_add.mod.py b/tests/nnapi/nnapi_test_generator/android-p/tests/P_explicit/explicit_add.mod.py
index b1c8f99a4..b1c8f99a4 100644
--- a/externals/nnapi_test_generator/tests/P_explicit/explicit_add.mod.py
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_explicit/explicit_add.mod.py
diff --git a/externals/nnapi_test_generator/tests/P_explicit/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_explicit/stderr.txt.expect
index c5a6e36b9..c5a6e36b9 100644
--- a/externals/nnapi_test_generator/tests/P_explicit/stderr.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_explicit/stderr.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_explicit/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_explicit/stdout.txt.expect
index 1221b7bda..1221b7bda 100644
--- a/externals/nnapi_test_generator/tests/P_explicit/stdout.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_explicit/stdout.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_float/addfloat.mod.py b/tests/nnapi/nnapi_test_generator/android-p/tests/P_float/addfloat.mod.py
index f0e4f0430..f0e4f0430 100644
--- a/externals/nnapi_test_generator/tests/P_float/addfloat.mod.py
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_float/addfloat.mod.py
diff --git a/externals/nnapi_test_generator/tests/P_float/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_float/stderr.txt.expect
index c5a6e36b9..c5a6e36b9 100644
--- a/externals/nnapi_test_generator/tests/P_float/stderr.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_float/stderr.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_float/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_float/stdout.txt.expect
index eb8cc146b..eb8cc146b 100644
--- a/externals/nnapi_test_generator/tests/P_float/stdout.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_float/stdout.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_full/addfloat.mod.py b/tests/nnapi/nnapi_test_generator/android-p/tests/P_full/addfloat.mod.py
index dbe7701a1..dbe7701a1 100644
--- a/externals/nnapi_test_generator/tests/P_full/addfloat.mod.py
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_full/addfloat.mod.py
diff --git a/externals/nnapi_test_generator/tests/P_full/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_full/stderr.txt.expect
index c5a6e36b9..c5a6e36b9 100644
--- a/externals/nnapi_test_generator/tests/P_full/stderr.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_full/stderr.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_full/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_full/stdout.txt.expect
index e3d2af3fa..e3d2af3fa 100644
--- a/externals/nnapi_test_generator/tests/P_full/stdout.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_full/stdout.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_lstm/lstm.mod.py b/tests/nnapi/nnapi_test_generator/android-p/tests/P_lstm/lstm.mod.py
index cb1bf6010..cb1bf6010 100644
--- a/externals/nnapi_test_generator/tests/P_lstm/lstm.mod.py
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_lstm/lstm.mod.py
diff --git a/externals/nnapi_test_generator/tests/P_lstm/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_lstm/stderr.txt.expect
index c5a6e36b9..c5a6e36b9 100644
--- a/externals/nnapi_test_generator/tests/P_lstm/stderr.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_lstm/stderr.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_lstm/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_lstm/stdout.txt.expect
index 2ba320d77..2ba320d77 100644
--- a/externals/nnapi_test_generator/tests/P_lstm/stdout.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_lstm/stdout.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_quantized_avgpool/averpoolfloat.mod.py b/tests/nnapi/nnapi_test_generator/android-p/tests/P_quantized_avgpool/averpoolfloat.mod.py
index 17d6e0a4f..17d6e0a4f 100644
--- a/externals/nnapi_test_generator/tests/P_quantized_avgpool/averpoolfloat.mod.py
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_quantized_avgpool/averpoolfloat.mod.py
diff --git a/externals/nnapi_test_generator/tests/P_quantized_avgpool/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_quantized_avgpool/stderr.txt.expect
index c5a6e36b9..c5a6e36b9 100644
--- a/externals/nnapi_test_generator/tests/P_quantized_avgpool/stderr.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_quantized_avgpool/stderr.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_quantized_avgpool/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_quantized_avgpool/stdout.txt.expect
index b4632d34d..b4632d34d 100644
--- a/externals/nnapi_test_generator/tests/P_quantized_avgpool/stdout.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_quantized_avgpool/stdout.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_quantized_conv/quantized.mod.py b/tests/nnapi/nnapi_test_generator/android-p/tests/P_quantized_conv/quantized.mod.py
index 7ef623513..7ef623513 100644
--- a/externals/nnapi_test_generator/tests/P_quantized_conv/quantized.mod.py
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_quantized_conv/quantized.mod.py
diff --git a/externals/nnapi_test_generator/tests/P_quantized_conv/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_quantized_conv/stderr.txt.expect
index c5a6e36b9..c5a6e36b9 100644
--- a/externals/nnapi_test_generator/tests/P_quantized_conv/stderr.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_quantized_conv/stderr.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_quantized_conv/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_quantized_conv/stdout.txt.expect
index 6b28bdd54..6b28bdd54 100644
--- a/externals/nnapi_test_generator/tests/P_quantized_conv/stdout.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_quantized_conv/stdout.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_vts_full/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_vts_full/stderr.txt.expect
index 3decb4c1c..3decb4c1c 100644
--- a/externals/nnapi_test_generator/tests/P_vts_full/stderr.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_vts_full/stderr.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_vts_full/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_vts_full/stdout.txt.expect
index 14cd4f99d..14cd4f99d 100644
--- a/externals/nnapi_test_generator/tests/P_vts_full/stdout.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_vts_full/stdout.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_vts_full/vts_full.mod.py b/tests/nnapi/nnapi_test_generator/android-p/tests/P_vts_full/vts_full.mod.py
index 4ad3b2e4b..4ad3b2e4b 100644
--- a/externals/nnapi_test_generator/tests/P_vts_full/vts_full.mod.py
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_vts_full/vts_full.mod.py
diff --git a/externals/nnapi_test_generator/tests/P_vts_operands/addfloat.mod.py b/tests/nnapi/nnapi_test_generator/android-p/tests/P_vts_operands/addfloat.mod.py
index 976cb35ec..976cb35ec 100644
--- a/externals/nnapi_test_generator/tests/P_vts_operands/addfloat.mod.py
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_vts_operands/addfloat.mod.py
diff --git a/externals/nnapi_test_generator/tests/P_vts_operands/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_vts_operands/stderr.txt.expect
index 3decb4c1c..3decb4c1c 100644
--- a/externals/nnapi_test_generator/tests/P_vts_operands/stderr.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_vts_operands/stderr.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_vts_operands/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_vts_operands/stdout.txt.expect
index 2e74d1fc0..2e74d1fc0 100644
--- a/externals/nnapi_test_generator/tests/P_vts_operands/stdout.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_vts_operands/stdout.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_weird/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_weird/stderr.txt.expect
index c5a6e36b9..c5a6e36b9 100644
--- a/externals/nnapi_test_generator/tests/P_weird/stderr.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_weird/stderr.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_weird/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-p/tests/P_weird/stdout.txt.expect
index fa67d68ac..fa67d68ac 100644
--- a/externals/nnapi_test_generator/tests/P_weird/stdout.txt.expect
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_weird/stdout.txt.expect
diff --git a/externals/nnapi_test_generator/tests/P_weird/weird_add.mod.py b/tests/nnapi/nnapi_test_generator/android-p/tests/P_weird/weird_add.mod.py
index a230267a4..a230267a4 100644
--- a/externals/nnapi_test_generator/tests/P_weird/weird_add.mod.py
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/P_weird/weird_add.mod.py
diff --git a/externals/nnapi_test_generator/tests/test.py b/tests/nnapi/nnapi_test_generator/android-p/tests/test.py
index c987cf680..c987cf680 100755..100644
--- a/externals/nnapi_test_generator/tests/test.py
+++ b/tests/nnapi/nnapi_test_generator/android-p/tests/test.py
diff --git a/externals/nnapi_test_generator/vts_generator.py b/tests/nnapi/nnapi_test_generator/android-p/vts_generator.py
index ab34e2bda..ab34e2bda 100755..100644
--- a/externals/nnapi_test_generator/vts_generator.py
+++ b/tests/nnapi/nnapi_test_generator/android-p/vts_generator.py
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/README.md b/tests/nnapi/nnapi_test_generator/android-q-beta/README.md
new file mode 100644
index 000000000..62a6978cd
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/README.md
@@ -0,0 +1,408 @@
+# NN-API Test Generator
+
+Original code is at https://android.googlesource.com/platform/frameworks/ml/+/ee61649/nn/tools/test_generator/
+
+### Fix for neurun
+
+- Update path in this README.md file for neurun NNAPI frontend test
+  - `nn/runtime/test/specs/` => `tests/nnapi/specs/`
+  - $ANDROID_BUILD_TOP/frameworks/ml/nn/runtime/test/specs => $NNAS_PROJECT_PATH/tests/nnapi/specs
+  - Rebuild with mm afterwards => Rebuild afterwards (mm is not supported)
+
+---
+
+# Using the NN-API Test Generator
+
+## Prerequisites
+
+- Python3
+- Numpy
+
+## Writing a Test Specification
+
+You should create new test specs in `tests/nnapi/specs/<version>/` and name it with `.mod.py` suffix, so that other tools can automatically update the unit tests.
+
+### Specifying Operands
+
+#### Syntax
+
+```
+OperandType(name, (type, shape, <optional scale, zero point>), <optional initializer>)
+```
+
+For example,
+
+```Python
+# p1 is a 2-by-2 fp matrix parameter, with value [1, 2; 3, 4]
+p1 = Parameter("param", ("TENSOR_FLOAT32", [2, 2]), [1, 2, 3, 4])
+
+# i1 is a quantized input of shape (2, 256, 256, 3), with scale = 0.5, zero point = 128
+i1 = Input("input", ("TENSOR_QUANT8_ASYMM", [2, 256, 256, 3], 0.5, 128))
+
+# p2 is an Int32 scalar with value 1
+p2 = Int32Scalar("act", 1)
+```
+
+#### OperandType
+
+There are currently 10 operand types supported by the test generator.
+
+- Input
+- Output
+    * IgnoredOutput, will not compare results in the test
+- Parameter
+    * Int32Scalar, shorthand for parameter with type INT32
+    * Float32Scalar, shorthand for parameter with type FLOAT32
+    * Int32Vector, shorthand for 1-D TENSOR_INT32 parameter
+    * Float32Vector, shorthand for 1-D TENSOR_FLOAT32 parameter
+- Internal, for model with multiple operations
+
+### Specifying Models
+
+#### Instantiate a model
+
+```Python
+# Instantiate a model
+model = Model()
+
+# Instantiate a model with a name
+model2 = Model("model_name")
+```
+
+#### Add an operation
+
+```
+model.Operation(optype, i1, i2, ...).To(o1, o2, ...)
+```
+
+For example,
+
+```Python
+model.Operation("ADD", i1, i2, act).To(o1)
+```
+
+#### Use implicit operands
+
+Simple scalar and 1-D vector parameters can now be directly passed to Operation constructor, and test generator will deduce the operand type from the value provided.
+
+```Python
+model.Operation("MEAN", i1, [1], 0) # axis = [1], keep_dims = 0
+```
+
+Note that, for fp values, the initializer should all be Python fp numbers, e.g. use `1.0` or `1.` instead of `1` for implicit fp operands.
+
+### Specifying Inputs and Expected Outputs
+
+The combination of inputs and expected outputs is called an example for a given model. An example is defined like
+
+```Python
+# Example 1, separate dictionary for inputs and outputs
+input1 = {
+    i1: [1, 2],
+    i2: [3, 4]
+}
+output1 = {o1: [4, 6]}
+
+# Example 2, combined dictionary
+example2_values = {
+    i1: [5, 6],
+    i2: [7, 8],
+    o1: [12, 14]
+}
+
+# Instantiate an example
+Example((input1, output1), example2_values)
+```
+
+By default, examples will be attached to the most recent instantiated model. You can explicitly specify the target model, and optionally, the example name by
+
+```Python
+Example((input1, output1), example2_values, model=model, name="example_name")
+```
+
+### Specifying Variations
+
+You can add variations to the example so that the test generator can automatically create multiple tests. Currently, 6 types of variation are supported:
+
+- DefaultVariation, i.e. no variation
+- DataTypeConverter
+- DataLayoutConverter
+- AxisConverter
+- RelaxedModeConverter
+- ParameterAsInputConverter
+- ActivationConverter
+
+#### DataTypeConverter
+
+Convert input/parameter/output to the specified type, e.g. float32 -> quant8. The target data type for each operand to transform has to be explicitly specified. It is the spec writer's responsibility to ensure such conversion is valid.
+
+```Python
+converter = DataTypeConverter(name="variation_name").Identify({
+    op1: (target_type, target_scale, target_zero_point),
+    op2: (target_type, target_scale, target_zero_point),
+    ...
+})
+```
+
+#### DataLayoutConverter
+
+Convert input/parameter/output between NHWC and NCHW. The caller need to provide a list of target operands to transform, and also the data layout parameter to set.
+
+```Python
+converter = DataLayoutConverter(target_data_layout, name="variation_name").Identify(
+    [op1, op2, ..., layout_parameter]
+)
+```
+
+#### AxisConverter
+
+Transpose a certain axis in input/output to target position, and optionally remove some axis. The caller need to provide a list of target operands to transform, and also the axis parameter to set.
+
+```Python
+converter = AxisConverter(originalAxis, targetAxis, dimension, drop=[], name="variation_name").Identify(
+    [op1, op2, ..., axis_parameter]
+)
+```
+
+This model variation is for ops that apply calculation along certain axis, such as L2_NORMALIZATION, SOFTMAX, and CHANNEL_SHUFFLE. For example, consider L2_NORMALIZATION with input of shape [2, 3, 4, 5] along the last axis, i.e. axis = -1. The output shape would be the same as input. We can create a new model which will do the calculation along axis 0 by transposing input and output shape to [5, 2, 3, 4] and modify the axis parameter to 0. Such converter can be defined as
+
+```Python
+toAxis0 = AxisConverter(-1, 0, 4).Identify([input, output, axis])
+```
+
+The target axis can also be negative to test the negative indexing
+
+```Python
+toAxis0 = AxisConverter(-1, -4, 4).Identify([input, output, axis])
+```
+
+Consider the same L2_NORMALIZATION example, we can also create a new model with input/output of 2D shape [4, 5] by removing the first two dimension. This is essentially doing `new_input = input[0,0,:,:]` in numpy. Such converter can be defined as
+
+```Python
+toDim2 = AxisConverter(-1, -1, 4, drop=[0, 1]).Identify([input, output, axis])
+```
+
+If transposition and removal are specified at the same time, the converter will do transposition first and then remove the axis. For example, the following converter will result in shape [5, 4] and axis 0.
+
+```Python
+toDim2Axis0 = AxisConverter(-1, 2, 4, drop=[0, 1]).Identify([input, output, axis])
+```
+
+#### RelaxedModeConverter
+
+Convert the model to enable/disable relaxed computation.
+
+```Python
+converter = RelaxedModeConverter(is_relaxed, name="variation_name")
+```
+
+#### ParameterAsInputConverter
+
+Convert a certain parameter to model input, e.g. weight in CONV_2D. The caller need to provide a list of target operands to convert.
+
+```Python
+converter = ParameterAsInputConverter(name="variation_name").Identify(
+    [op1, op2, ...]
+)
+```
+
+#### ActivationConverter
+
+Convert the output by certain activation, the original activation is assumed to be NONE. The caller need to provide a list of target operands to transform,  and also the activation parameter to set.
+
+```Python
+converter = ActivationConverter(name="variation_name").Identify(
+    [op1, op2, ..., act_parameter]
+)
+```
+
+#### Add variation to example
+
+Each example can have multiple groups of variations, and if so, will take the cartesian product of the groups. For example, suppose we declare a model with two groups, and each group has two variations: `[[default, nchw], [default, relaxed, quant8]]`. This will result in 6 examples: `[default, default], [default, relaxed], [default, quant8], [nchw, default], [nchw, relaxed], [nchw, quant8]`.
+
+Use `AddVariations` to add a group of variations to the example
+
+```Python
+# Add two groups of variations [default, nchw] and [default, relaxed, quant8]
+example.AddVariations(nchw).AddVariations(relaxed, quant8)
+```
+
+By default, when you add a group of variation, a unnamed default variation will be automatically included in the list. You can name the default variation by
+
+```Python
+example.AddVariations(nchw, defaultName="nhwc").AddVariations(relaxed, quant8)
+```
+
+Also, you can choose not to include default by
+
+```Python
+# Add two groups of variations [nchw] and [default, relaxed, quant8]
+example.AddVariations(nchw, includeDefault=False).AddVariations(relaxed, quant8)
+```
+
+The example above will result in 3 examples: `[nchw, default], [nchw, relaxed], [nchw, quant8]`.
+
+#### Some helper functions
+
+The test generator provides several helper functions or shorthands to add commonly used group of variations.
+
+```Python
+# Each following group of statements are equivalent
+
+# DataTypeConverter
+example.AddVariations(DataTypeConverter().Identify({op1: "TENSOR_FLOAT16", ...}))
+example.AddVariations("float16")    # will apply to every TENSOR_FLOAT32 operands
+
+example.AddVariations(DataTypeConverter().Identify({op1: "TENSOR_INT32", ...}))
+example.AddVariations("int32")      # will apply to every TENSOR_FLOAT32 operands
+
+# DataLayoutConverter
+example.AddVariations(DataLayoutConverter("nchw").Identify(op_list))
+example.AddVariations(("nchw", op_list))
+example.AddNchw(*op_list)
+
+# AxisConverter
+# original axis and dim are deduced from the op_list
+example.AddVariations(*[AxisConverter(origin, t, dim).Identify(op_list) for t in targets])
+example.AddAxis(targets, *op_list)
+
+example.AddVariations(*[
+        AxisConverter(origin, t, dim).Identify(op_list) for t in range(dim)
+    ], includeDefault=False)
+example.AddAllPositiveAxis(*op_list)
+
+example.AddVariations(*[
+        AxisConverter(origin, t, dim).Identify(op_list) for t in range(-dim, dim)
+    ], includeDefault=False)
+example.AddAllAxis(*op_list)
+
+drop = list(range(dim))
+drop.pop(origin)
+example.AddVariations(*[
+    AxisConverter(origin, origin, dim, drop[0:(dim-i)]).Identify(op_list) for i in dims])
+example.AddDims(dims, *op_list)
+
+example.AddVariations(*[
+    AxisConverter(origin, origin, dim, drop[0:i]).Identify(op_list) for i in range(dim)])
+example.AddAllDims(dims, *op_list)
+
+example.AddVariations(*[
+        AxisConverter(origin, j, dim, range(i)).Identify(op_list) \
+                for i in range(dim) for j in range(i, dim)
+    ], includeDefault=False)
+example.AddAllDimsAndPositiveAxis(dims, *op_list)
+
+example.AddVariations(*[
+        AxisConverter(origin, k, dim, range(i)).Identify(op_list) \
+                for i in range(dim) for j in range(i, dim) for k in [j, j - dim]
+    ], includeDefault=False)
+example.AddAllDimsAndAxis(dims, *op_list)
+
+# ParameterAsInputConverter
+example.AddVariations(ParameterAsInputConverter().Identify(op_list))
+example.AddVariations(("as_input", op_list))
+example.AddInput(*op_list)
+
+# RelaxedModeConverter
+example.Addvariations(RelaxedModeConverter(True))
+example.AddVariations("relaxed")
+example.AddRelaxed()
+
+# ActivationConverter
+example.AddVariations(ActivationConverter("relu").Identify(op_list))
+example.AddVariations(("relu", op_list))
+example.AddRelu(*op_list)
+
+example.AddVariations(
+    ActivationConverter("relu").Identify(op_list),
+    ActivationConverter("relu1").Identify(op_list),
+    ActivationConverter("relu6").Identify(op_list))
+example.AddVariations(
+    ("relu", op_list),
+    ("relu1", op_list),
+    ("relu6", op_list))
+example.AddAllActivations(*op_list)
+```
+
+### Specifying the Model Version
+
+If not explicitly specified, the minimal required HAL version will be inferred from the path, e.g. the models defined in `tests/nnapi/specs/V1_0/add.mod.py` will all have version `V1_0`. However there are several exceptions that a certain operation is under-tested in previous version and more tests are added in a later version. In this case, two methods are provided to set the version manually.
+
+#### Set the version when creating the model
+
+Use `IntroducedIn` to set the version of a model. All variations of the model will have the same version.
+
+```Python
+model_V1_0 = Model().IntroducedIn("V1_0")
+...
+# All variations of model_V1_0 will have the same version V1_0.
+Example(example, model=model_V1_0).AddVariations(var0, var1, ...)
+```
+
+#### Set the version overrides
+
+Use `Example.SetVersion` to override the model version for specific tests. The target tests are specified by names. This method can also override the version specified by `IntroducedIn`.
+
+```Python
+Example.SetVersion(<version>, testName0, testName1, ...)
+```
+
+This is useful when only a subset of variations has a different version.
+
+### Creating negative tests
+
+Negative test, also known as validation test, is a testing method that supplies invalid model or request, and expects the target framework or driver to fail gracefully. You can use `ExpectFailure` to tag a example as invalid.
+
+```Python
+Example.ExpectFailure()
+```
+
+### A Complete Example
+
+```Python
+# Declare input, output, and parameters
+i1 = Input("op1", "TENSOR_FLOAT32", "{1, 3, 4, 1}")
+f1 = Parameter("op2", "TENSOR_FLOAT32", "{1, 3, 3, 1}", [1, 4, 7, 2, 5, 8, 3, 6, 9])
+b1 = Parameter("op3", "TENSOR_FLOAT32", "{1}", [-200])
+act = Int32Scalar("act", 0)
+o1 = Output("op4", "TENSOR_FLOAT32", "{1, 3, 4, 1}")
+
+# Instantiate a model and add CONV_2D operation
+# Use implicit parameter for implicit padding and strides
+Model().Operation("CONV_2D", i1, f1, b1, 1, 1, 1, act, layout).To(o1)
+
+# Additional data type
+quant8 = DataTypeConverter().Identify({
+    i1: ("TENSOR_QUANT8_ASYMM", 0.5, 127),
+    f1: ("TENSOR_QUANT8_ASYMM", 0.5, 127),
+    b1: ("TENSOR_INT32", 0.25, 0),
+    o1: ("TENSOR_QUANT8_ASYMM", 1.0, 50)
+})
+
+# Instantiate an example
+example = Example({
+    i1: [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12],
+    o1: [0, 0, 0, 0, 35, 112, 157, 0, 0, 34, 61, 0]
+})
+
+# Only use NCHW data layout
+example.AddNchw(i1, f1, o1, layout, includeDefault=False)
+
+# Add two more groups of variations
+example.AddInput(f1, b1).AddVariations("relaxed", quant8).AddAllActivations(o1, act)
+```
+
+The spec above will result in 24 tests.
+
+## Generate Tests
+
+Once you have your model ready, run
+
+```
+$NNAS_PROJECT_PATH/tests/nnapi/specs/generate_test.sh
+$NNAS_PROJECT_PATH/tests/nnapi/specs/generate_vts_test.sh
+```
+
+It will read and generate all CTS/VTS unit tests based on spec files in `tests/nnapi/specs/V1_*/*` if needed. CTS test generator is able to identify which spec files are modified since last generation and only regenerate those files to reduce compilation time. To force a regeneration, use `-f` flag. The VTS test generator will regenerate tests targeting the latest HAL version by default. Pass the `all` positional argument to override.
+
+Rebuild afterwards.
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/cts_generator.py b/tests/nnapi/nnapi_test_generator/android-q-beta/cts_generator.py
new file mode 100644
index 000000000..bb65762fc
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/cts_generator.py
@@ -0,0 +1,314 @@
+#!/usr/bin/python3
+
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""CTS testcase generator
+
+Implements CTS test backend. Invoked by ml/nn/runtime/test/specs/generate_tests.sh;
+See that script for details on how this script is used.
+
+"""
+
+from __future__ import absolute_import
+from __future__ import division
+from __future__ import print_function
+import argparse
+import math
+import os
+import re
+import sys
+import traceback
+
+# Stuff from test generator
+import test_generator as tg
+from test_generator import ActivationConverter
+from test_generator import BoolScalar
+from test_generator import Configuration
+from test_generator import DataTypeConverter
+from test_generator import DataLayoutConverter
+from test_generator import Example
+from test_generator import Float16Scalar
+from test_generator import Float32Scalar
+from test_generator import Float32Vector
+from test_generator import GetJointStr
+from test_generator import IgnoredOutput
+from test_generator import Input
+from test_generator import Int32Scalar
+from test_generator import Int32Vector
+from test_generator import Internal
+from test_generator import Model
+from test_generator import Operand
+from test_generator import Output
+from test_generator import Parameter
+from test_generator import ParameterAsInputConverter
+from test_generator import RelaxedModeConverter
+from test_generator import SmartOpen
+from test_generator import SymmPerChannelQuantParams
+
+def IndentedPrint(s, indent=2, *args, **kwargs):
+    print('\n'.join([" " * indent + i for i in s.split('\n')]), *args, **kwargs)
+
+# Take a model from command line
+def ParseCmdLine():
+    parser = argparse.ArgumentParser()
+    parser.add_argument("spec", help="the spec file/directory")
+    parser.add_argument(
+        "-m", "--model", help="the output model file/directory", default="-")
+    parser.add_argument(
+        "-e", "--example", help="the output example file/directory", default="-")
+    parser.add_argument(
+        "-t", "--test", help="the output test file/directory", default="-")
+    parser.add_argument(
+        "-f", "--force", help="force to regenerate all spec files", action="store_true")
+    args = parser.parse_args()
+    tg.FileNames.InitializeFileLists(args.spec, args.model, args.example, args.test)
+    Configuration.force_regenerate = args.force
+
+def NeedRegenerate():
+    if not all(os.path.exists(f) for f in \
+        [tg.FileNames.modelFile, tg.FileNames.exampleFile, tg.FileNames.testFile]):
+        return True
+    specTime = os.path.getmtime(tg.FileNames.specFile) + 10
+    modelTime = os.path.getmtime(tg.FileNames.modelFile)
+    exampleTime = os.path.getmtime(tg.FileNames.exampleFile)
+    testTime = os.path.getmtime(tg.FileNames.testFile)
+    if all(t > specTime for t in [modelTime, exampleTime, testTime]):
+        return False
+    return True
+
+# Write headers for generated files, which are boilerplate codes only related to filenames
+def InitializeFiles(model_fd, example_fd, test_fd):
+    specFileBase = os.path.basename(tg.FileNames.specFile)
+    fileHeader = """\
+// Generated from {spec_file}
+// DO NOT EDIT
+// clang-format off
+#include "{header}"
+"""
+    print(fileHeader.format(spec_file=specFileBase, header="TestGenerated.h"), file=test_fd)
+    print(fileHeader.format(spec_file=specFileBase, header="TestGenerated.h"), file=model_fd)
+    print(fileHeader.format(spec_file=specFileBase, header="TestHarness.h"), file=example_fd)
+
+# Dump is_ignored function for IgnoredOutput
+def DumpCtsIsIgnored(model, model_fd):
+    isIgnoredTemplate = """\
+bool {is_ignored_name}(int i) {{
+  static std::set<int> ignore = {{{ignored_index}}};
+  return ignore.find(i) != ignore.end();
+}}
+"""
+    print(isIgnoredTemplate.format(
+        ignored_index=tg.GetJointStr(model.GetIgnoredOutputs(), method=lambda x: str(x.index)),
+        is_ignored_name=str(model.isIgnoredFunctionName)), file=model_fd)
+
+# Dump Model file for Cts tests
+def DumpCtsModel(model, model_fd):
+    assert model.compiled
+    if model.dumped:
+        return
+    namespace = "generated_tests::{spec_name}".format(spec_name=tg.FileNames.specName)
+    print("namespace {namespace} {{\n".format(namespace=namespace), file=model_fd)
+    print("void %s(Model *model) {"%(model.createFunctionName), file=model_fd)
+
+    # Phase 0: types
+    for t in model.GetTypes():
+        if t.scale == 0.0 and t.zeroPoint == 0 and t.extraParams is None:
+            typeDef = "OperandType %s(Type::%s, %s);"%(t, t.type, t.GetDimensionsString())
+        else:
+            if t.extraParams is None or t.extraParams.hide:
+                typeDef = "OperandType %s(Type::%s, %s, %s, %d);"%(
+                    t, t.type, t.GetDimensionsString(), tg.PrettyPrintAsFloat(t.scale), t.zeroPoint)
+            else:
+                assert t.type == "TENSOR_QUANT8_SYMM_PER_CHANNEL", "Unexpected model configuration. " \
+                                                                   "Extra params are currently expected for " \
+                                                                   "TENSOR_QUANT8_SYMM_PER_CHANNEL operand type. "
+                assert t.scale == 0.0 and t.zeroPoint == 0, "Scale and zero point are always zero for " \
+                                                            "TENSOR_QUANT8_SYMM_PER_CHANNEL operands"
+                typeDef = "OperandType %s(Type::%s, %s, %s);"%(
+                    t, t.type, t.GetDimensionsString(), t.extraParams.GetConstructor())
+
+        IndentedPrint(typeDef, file=model_fd)
+
+    # Phase 1: add operands
+    print("  // Phase 1, operands", file=model_fd)
+    for op in model.operands:
+        IndentedPrint("auto %s = model->addOperand(&%s);"%(op, op.type), file=model_fd)
+
+    # Phase 2: operations
+    print("  // Phase 2, operations", file=model_fd)
+    for p in model.GetParameters():
+        paramDef = "static %s %s[] = %s;\nmodel->setOperandValue(%s, %s, sizeof(%s) * %d);"%(
+            p.type.GetCppTypeString(), p.initializer, p.GetListInitialization(), p,
+            p.initializer, p.type.GetCppTypeString(), p.type.GetNumberOfElements())
+        IndentedPrint(paramDef, file=model_fd)
+    for op in model.operations:
+        IndentedPrint("model->addOperation(ANEURALNETWORKS_%s, {%s}, {%s});"%(
+            op.optype, tg.GetJointStr(op.ins), tg.GetJointStr(op.outs)), file=model_fd)
+
+    # Phase 3: add inputs and outputs
+    print ("  // Phase 3, inputs and outputs", file=model_fd)
+    IndentedPrint("model->identifyInputsAndOutputs(\n  {%s},\n  {%s});"%(
+        tg.GetJointStr(model.GetInputs()), tg.GetJointStr(model.GetOutputs())), file=model_fd)
+
+    # Phase 4: set relaxed execution if needed
+    if (model.isRelaxed):
+        print ("  // Phase 4: set relaxed execution", file=model_fd)
+        print ("  model->relaxComputationFloat32toFloat16(true);", file=model_fd)
+
+    print ("  assert(model->isValid());", file=model_fd)
+    print ("}\n", file=model_fd)
+    DumpCtsIsIgnored(model, model_fd)
+    print("}} // namespace {namespace}".format(namespace=namespace), file=model_fd)
+    model.dumped = True
+
+def DumpMixedType(operands, feedDict):
+    supportedTensors = [
+        "DIMENSIONS",
+        "TENSOR_FLOAT32",
+        "TENSOR_INT32",
+        "TENSOR_QUANT8_ASYMM",
+        "TENSOR_OEM_BYTE",
+        "TENSOR_QUANT16_SYMM",
+        "TENSOR_FLOAT16",
+        "TENSOR_BOOL8",
+        "TENSOR_QUANT8_SYMM_PER_CHANNEL",
+        "TENSOR_QUANT16_ASYMM",
+        "TENSOR_QUANT8_SYMM",
+    ]
+    typedMap = {t: [] for t in supportedTensors}
+    FeedAndGet = lambda op, d: op.Feed(d).GetListInitialization()
+    # group the operands by type
+    for operand in operands:
+        try:
+            typedMap[operand.type.type].append(FeedAndGet(operand, feedDict))
+            typedMap["DIMENSIONS"].append("{%d, {%s}}"%(
+                operand.index, GetJointStr(operand.dimensions)))
+        except KeyError as e:
+            traceback.print_exc()
+            sys.exit("Cannot dump tensor of type {}".format(operand.type.type))
+    mixedTypeTemplate = """\
+{{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> Dimensions map
+  .operandDimensions = {{{dimensions_map}}},
+  // int -> FLOAT32 map
+  .float32Operands = {{{float32_map}}},
+  // int -> INT32 map
+  .int32Operands = {{{int32_map}}},
+  // int -> QUANT8_ASYMM map
+  .quant8AsymmOperands = {{{uint8_map}}},
+  // int -> QUANT16_SYMM map
+  .quant16SymmOperands = {{{int16_map}}},
+  // int -> FLOAT16 map
+  .float16Operands = {{{float16_map}}},
+  // int -> BOOL8 map
+  .bool8Operands = {{{bool8_map}}},
+  // int -> QUANT8_SYMM_PER_CHANNEL map
+  .quant8ChannelOperands = {{{int8_map}}},
+  // int -> QUANT16_ASYMM map
+  .quant16AsymmOperands = {{{uint16_map}}},
+  // int -> QUANT8_SYMM map
+  .quant8SymmOperands = {{{quant8_symm_map}}},
+}}"""
+    return mixedTypeTemplate.format(
+        dimensions_map=tg.GetJointStr(typedMap.get("DIMENSIONS", [])),
+        float32_map=tg.GetJointStr(typedMap.get("TENSOR_FLOAT32", [])),
+        int32_map=tg.GetJointStr(typedMap.get("TENSOR_INT32", [])),
+        uint8_map=tg.GetJointStr(typedMap.get("TENSOR_QUANT8_ASYMM", []) +
+                                 typedMap.get("TENSOR_OEM_BYTE", [])),
+        int16_map=tg.GetJointStr(typedMap.get("TENSOR_QUANT16_SYMM", [])),
+        float16_map=tg.GetJointStr(typedMap.get("TENSOR_FLOAT16", [])),
+        int8_map=tg.GetJointStr(typedMap.get("TENSOR_QUANT8_SYMM_PER_CHANNEL", [])),
+        bool8_map=tg.GetJointStr(typedMap.get("TENSOR_BOOL8", [])),
+        uint16_map=tg.GetJointStr(typedMap.get("TENSOR_QUANT16_ASYMM", [])),
+        quant8_symm_map=tg.GetJointStr(typedMap.get("TENSOR_QUANT8_SYMM", []))
+    )
+
+# Dump Example file for Cts tests
+def DumpCtsExample(example, example_fd):
+    namespace = "generated_tests::{spec_name}".format(spec_name=tg.FileNames.specName)
+    print("namespace {namespace} {{\n".format(namespace=namespace), file=example_fd)
+    print("std::vector<::test_helper::MixedTypedExample>& get_%s() {" % (example.examplesName), file=example_fd)
+    print("static std::vector<::test_helper::MixedTypedExample> %s = {" % (example.examplesName), file=example_fd)
+    for inputFeedDict, outputFeedDict in example.feedDicts:
+        print ('// Begin of an example', file = example_fd)
+        print ('{\n.operands = {', file = example_fd)
+        inputs = DumpMixedType(example.model.GetInputs(), inputFeedDict)
+        outputs = DumpMixedType(example.model.GetOutputs(), outputFeedDict)
+        print ('//Input(s)\n%s,' % inputs , file = example_fd)
+        print ('//Output(s)\n%s' % outputs, file = example_fd)
+        print ('},', file = example_fd)
+        if example.expectedMultinomialDistributionTolerance is not None:
+          print ('.expectedMultinomialDistributionTolerance = %f' %
+                 example.expectedMultinomialDistributionTolerance, file = example_fd)
+        print ('}, // End of an example', file = example_fd)
+    print("};", file=example_fd)
+    print("return %s;" % (example.examplesName), file=example_fd)
+    print("};", file=example_fd)
+    print("\n}} // namespace {namespace}".format(namespace=namespace), file=example_fd)
+
+# Dump Test file for Cts tests
+def DumpCtsTest(example, test_fd):
+    namespace = "generated_tests::{spec_name}".format(spec_name=tg.FileNames.specName)
+    testTemplate = """\
+namespace {namespace} {{
+
+void {create_model_name}(Model *model);
+bool {is_ignored_name}(int);
+std::vector<::test_helper::MixedTypedExample>& get_{examples_name}();
+
+TEST_F({test_case_name}, {test_name}) {{
+    execute({create_model_name},
+            {is_ignored_name},
+            get_{examples_name}());
+}}
+
+}} // namespace {namespace}
+"""
+    if example.model.version is not None and not example.expectFailure:
+        testTemplate += """\
+TEST_AVAILABLE_SINCE({version}, {test_name}, {namespace}::{create_model_name})\n"""
+
+    if example.expectFailure:
+        testCaseName = "GeneratedValidationTests"
+    elif example.model.hasDynamicOutputShape:
+        testCaseName = "DynamicOutputShapeTest"
+    else:
+        testCaseName = "GeneratedTests"
+
+    print(testTemplate.format(
+        test_case_name=testCaseName,
+        test_name=str(example.testName),
+        namespace=namespace,
+        create_model_name=str(example.model.createFunctionName),
+        is_ignored_name=str(example.model.isIgnoredFunctionName),
+        examples_name=str(example.examplesName),
+        version=example.model.version), file=test_fd)
+
+if __name__ == '__main__':
+    ParseCmdLine()
+    while tg.FileNames.NextFile():
+        if Configuration.force_regenerate or NeedRegenerate():
+            print("Generating CTS tests from spec %s" % tg.FileNames.specFile, file=sys.stderr)
+            exec(open(tg.FileNames.specFile, "r").read())
+            with SmartOpen(tg.FileNames.modelFile) as model_fd, \
+                 SmartOpen(tg.FileNames.exampleFile) as example_fd, \
+                 SmartOpen(tg.FileNames.testFile) as test_fd:
+                InitializeFiles(model_fd, example_fd, test_fd)
+                Example.DumpAllExamples(
+                    DumpModel=DumpCtsModel, model_fd=model_fd,
+                    DumpExample=DumpCtsExample, example_fd=example_fd,
+                    DumpTest=DumpCtsTest, test_fd=test_fd)
+        else:
+            print("Skip file: %s" % tg.FileNames.specFile, file=sys.stderr)
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/include/TestHarness.h b/tests/nnapi/nnapi_test_generator/android-q-beta/include/TestHarness.h
new file mode 100644
index 000000000..3b4b26b16
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/include/TestHarness.h
@@ -0,0 +1,426 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* Header-only library for various helpers of test harness
+ * See frameworks/ml/nn/runtime/test/TestGenerated.cpp for how this is used.
+ */
+#ifndef ANDROID_FRAMEWORKS_ML_NN_TOOLS_TEST_GENERATOR_TEST_HARNESS_H
+#define ANDROID_FRAMEWORKS_ML_NN_TOOLS_TEST_GENERATOR_TEST_HARNESS_H
+
+#include <gmock/gmock-matchers.h>
+#include <gtest/gtest.h>
+
+#include <cmath>
+#include <functional>
+#include <map>
+#include <tuple>
+#include <vector>
+
+namespace test_helper {
+
+constexpr const size_t gMaximumNumberOfErrorMessages = 10;
+
+// TODO: Figure out the build dependency to make including "CpuOperationUtils.h" work.
+inline void convertFloat16ToFloat32(const _Float16* input, std::vector<float>* output) {
+    for (size_t i = 0; i < output->size(); ++i) {
+        (*output)[i] = static_cast<float>(input[i]);
+    }
+}
+
+// This class is a workaround for two issues our code relies on:
+// 1. sizeof(bool) is implementation defined.
+// 2. vector<bool> does not allow direct pointer access via the data() method.
+class bool8 {
+   public:
+    bool8() : mValue() {}
+    /* implicit */ bool8(bool value) : mValue(value) {}
+    inline operator bool() const { return mValue != 0; }
+
+   private:
+    uint8_t mValue;
+};
+
+static_assert(sizeof(bool8) == 1, "size of bool8 must be 8 bits");
+
+typedef std::map<int, std::vector<uint32_t>> OperandDimensions;
+typedef std::map<int, std::vector<float>> Float32Operands;
+typedef std::map<int, std::vector<int32_t>> Int32Operands;
+typedef std::map<int, std::vector<uint8_t>> Quant8AsymmOperands;
+typedef std::map<int, std::vector<int16_t>> Quant16SymmOperands;
+typedef std::map<int, std::vector<_Float16>> Float16Operands;
+typedef std::map<int, std::vector<bool8>> Bool8Operands;
+typedef std::map<int, std::vector<int8_t>> Quant8ChannelOperands;
+typedef std::map<int, std::vector<uint16_t>> Quant16AsymmOperands;
+typedef std::map<int, std::vector<int8_t>> Quant8SymmOperands;
+struct MixedTyped {
+    static constexpr size_t kNumTypes = 9;
+    OperandDimensions operandDimensions;
+    Float32Operands float32Operands;
+    Int32Operands int32Operands;
+    Quant8AsymmOperands quant8AsymmOperands;
+    Quant16SymmOperands quant16SymmOperands;
+    Float16Operands float16Operands;
+    Bool8Operands bool8Operands;
+    Quant8ChannelOperands quant8ChannelOperands;
+    Quant16AsymmOperands quant16AsymmOperands;
+    Quant8SymmOperands quant8SymmOperands;
+};
+typedef std::pair<MixedTyped, MixedTyped> MixedTypedExampleType;
+
+// Mixed-typed examples
+typedef struct {
+    MixedTypedExampleType operands;
+    // Specifies the RANDOM_MULTINOMIAL distribution tolerance.
+    // If set to greater than zero, the input is compared as log-probabilities
+    // to the output and must be within this tolerance to pass.
+    float expectedMultinomialDistributionTolerance = 0.0;
+} MixedTypedExample;
+
+// Go through all index-value pairs of a given input type
+template <typename T>
+inline void for_each(const std::map<int, std::vector<T>>& idx_and_data,
+                     std::function<void(int, const std::vector<T>&)> execute) {
+    for (auto& i : idx_and_data) {
+        execute(i.first, i.second);
+    }
+}
+
+// non-const variant of for_each
+template <typename T>
+inline void for_each(std::map<int, std::vector<T>>& idx_and_data,
+                     std::function<void(int, std::vector<T>&)> execute) {
+    for (auto& i : idx_and_data) {
+        execute(i.first, i.second);
+    }
+}
+
+// Go through all index-value pairs of a given input type
+template <typename T>
+inline void for_each(const std::map<int, std::vector<T>>& golden,
+                     std::map<int, std::vector<T>>& test,
+                     std::function<void(int, const std::vector<T>&, std::vector<T>&)> execute) {
+    for_each<T>(golden, [&test, &execute](int index, const std::vector<T>& g) {
+        auto& t = test[index];
+        execute(index, g, t);
+    });
+}
+
+// Go through all index-value pairs of a given input type
+template <typename T>
+inline void for_each(
+        const std::map<int, std::vector<T>>& golden, const std::map<int, std::vector<T>>& test,
+        std::function<void(int, const std::vector<T>&, const std::vector<T>&)> execute) {
+    for_each<T>(golden, [&test, &execute](int index, const std::vector<T>& g) {
+        auto t = test.find(index);
+        ASSERT_NE(t, test.end());
+        execute(index, g, t->second);
+    });
+}
+
+// internal helper for for_all
+template <typename T>
+inline void for_all_internal(std::map<int, std::vector<T>>& idx_and_data,
+                             std::function<void(int, void*, size_t)> execute_this) {
+    for_each<T>(idx_and_data, [&execute_this](int idx, std::vector<T>& m) {
+        execute_this(idx, static_cast<void*>(m.data()), m.size() * sizeof(T));
+    });
+}
+
+// Go through all index-value pairs of all input types
+// expects a functor that takes (int index, void *raw data, size_t sz)
+inline void for_all(MixedTyped& idx_and_data,
+                    std::function<void(int, void*, size_t)> execute_this) {
+    for_all_internal(idx_and_data.float32Operands, execute_this);
+    for_all_internal(idx_and_data.int32Operands, execute_this);
+    for_all_internal(idx_and_data.quant8AsymmOperands, execute_this);
+    for_all_internal(idx_and_data.quant16SymmOperands, execute_this);
+    for_all_internal(idx_and_data.float16Operands, execute_this);
+    for_all_internal(idx_and_data.bool8Operands, execute_this);
+    for_all_internal(idx_and_data.quant8ChannelOperands, execute_this);
+    for_all_internal(idx_and_data.quant16AsymmOperands, execute_this);
+    for_all_internal(idx_and_data.quant8SymmOperands, execute_this);
+    static_assert(9 == MixedTyped::kNumTypes,
+                  "Number of types in MixedTyped changed, but for_all function wasn't updated");
+}
+
+// Const variant of internal helper for for_all
+template <typename T>
+inline void for_all_internal(const std::map<int, std::vector<T>>& idx_and_data,
+                             std::function<void(int, const void*, size_t)> execute_this) {
+    for_each<T>(idx_and_data, [&execute_this](int idx, const std::vector<T>& m) {
+        execute_this(idx, static_cast<const void*>(m.data()), m.size() * sizeof(T));
+    });
+}
+
+// Go through all index-value pairs (const variant)
+// expects a functor that takes (int index, const void *raw data, size_t sz)
+inline void for_all(const MixedTyped& idx_and_data,
+                    std::function<void(int, const void*, size_t)> execute_this) {
+    for_all_internal(idx_and_data.float32Operands, execute_this);
+    for_all_internal(idx_and_data.int32Operands, execute_this);
+    for_all_internal(idx_and_data.quant8AsymmOperands, execute_this);
+    for_all_internal(idx_and_data.quant16SymmOperands, execute_this);
+    for_all_internal(idx_and_data.float16Operands, execute_this);
+    for_all_internal(idx_and_data.bool8Operands, execute_this);
+    for_all_internal(idx_and_data.quant8ChannelOperands, execute_this);
+    for_all_internal(idx_and_data.quant16AsymmOperands, execute_this);
+    for_all_internal(idx_and_data.quant8SymmOperands, execute_this);
+    static_assert(
+            9 == MixedTyped::kNumTypes,
+            "Number of types in MixedTyped changed, but const for_all function wasn't updated");
+}
+
+// Helper template - resize test output per golden
+template <typename T>
+inline void resize_accordingly_(const std::map<int, std::vector<T>>& golden,
+                                std::map<int, std::vector<T>>& test) {
+    for_each<T>(golden, test,
+                [](int, const std::vector<T>& g, std::vector<T>& t) { t.resize(g.size()); });
+}
+
+template <>
+inline void resize_accordingly_<uint32_t>(const OperandDimensions& golden,
+                                          OperandDimensions& test) {
+    for_each<uint32_t>(
+            golden, test,
+            [](int, const std::vector<uint32_t>& g, std::vector<uint32_t>& t) { t = g; });
+}
+
+inline void resize_accordingly(const MixedTyped& golden, MixedTyped& test) {
+    resize_accordingly_(golden.operandDimensions, test.operandDimensions);
+    resize_accordingly_(golden.float32Operands, test.float32Operands);
+    resize_accordingly_(golden.int32Operands, test.int32Operands);
+    resize_accordingly_(golden.quant8AsymmOperands, test.quant8AsymmOperands);
+    resize_accordingly_(golden.quant16SymmOperands, test.quant16SymmOperands);
+    resize_accordingly_(golden.float16Operands, test.float16Operands);
+    resize_accordingly_(golden.bool8Operands, test.bool8Operands);
+    resize_accordingly_(golden.quant8ChannelOperands, test.quant8ChannelOperands);
+    resize_accordingly_(golden.quant16AsymmOperands, test.quant16AsymmOperands);
+    resize_accordingly_(golden.quant8SymmOperands, test.quant8SymmOperands);
+    static_assert(9 == MixedTyped::kNumTypes,
+                  "Number of types in MixedTyped changed, but resize_accordingly function wasn't "
+                  "updated");
+}
+
+template <typename T>
+void filter_internal(const std::map<int, std::vector<T>>& golden,
+                     std::map<int, std::vector<T>>* filtered, std::function<bool(int)> is_ignored) {
+    for_each<T>(golden, [filtered, &is_ignored](int index, const std::vector<T>& m) {
+        auto& g = *filtered;
+        if (!is_ignored(index)) g[index] = m;
+    });
+}
+
+inline MixedTyped filter(const MixedTyped& golden, std::function<bool(int)> is_ignored) {
+    MixedTyped filtered;
+    filter_internal(golden.operandDimensions, &filtered.operandDimensions, is_ignored);
+    filter_internal(golden.float32Operands, &filtered.float32Operands, is_ignored);
+    filter_internal(golden.int32Operands, &filtered.int32Operands, is_ignored);
+    filter_internal(golden.quant8AsymmOperands, &filtered.quant8AsymmOperands, is_ignored);
+    filter_internal(golden.quant16SymmOperands, &filtered.quant16SymmOperands, is_ignored);
+    filter_internal(golden.float16Operands, &filtered.float16Operands, is_ignored);
+    filter_internal(golden.bool8Operands, &filtered.bool8Operands, is_ignored);
+    filter_internal(golden.quant8ChannelOperands, &filtered.quant8ChannelOperands, is_ignored);
+    filter_internal(golden.quant16AsymmOperands, &filtered.quant16AsymmOperands, is_ignored);
+    filter_internal(golden.quant8SymmOperands, &filtered.quant8SymmOperands, is_ignored);
+    static_assert(9 == MixedTyped::kNumTypes,
+                  "Number of types in MixedTyped changed, but compare function wasn't updated");
+    return filtered;
+}
+
+// Compare results
+template <typename T>
+void compare_(const std::map<int, std::vector<T>>& golden,
+              const std::map<int, std::vector<T>>& test, std::function<void(T, T)> cmp) {
+    for_each<T>(golden, test, [&cmp](int index, const std::vector<T>& g, const std::vector<T>& t) {
+        for (unsigned int i = 0; i < g.size(); i++) {
+            SCOPED_TRACE(testing::Message()
+                         << "When comparing output " << index << " element " << i);
+            cmp(g[i], t[i]);
+        }
+    });
+}
+
+// TODO: Allow passing accuracy criteria from spec.
+// Currently we only need relaxed accuracy criteria on mobilenet tests, so we return the quant8
+// tolerance simply based on the current test name.
+inline int getQuant8AllowedError() {
+    const ::testing::TestInfo* const testInfo =
+            ::testing::UnitTest::GetInstance()->current_test_info();
+    const std::string testCaseName = testInfo->test_case_name();
+    const std::string testName = testInfo->name();
+    // We relax the quant8 precision for all tests with mobilenet:
+    // - CTS/VTS GeneratedTest and DynamicOutputShapeTest with mobilenet
+    // - VTS CompilationCachingTest and CompilationCachingSecurityTest except for TOCTOU tests
+    if (testName.find("mobilenet") != std::string::npos ||
+        (testCaseName.find("CompilationCaching") != std::string::npos &&
+         testName.find("TOCTOU") == std::string::npos)) {
+        return 2;
+    } else {
+        return 1;
+    }
+}
+
+inline void compare(const MixedTyped& golden, const MixedTyped& test, float fpAtol = 1e-5f,
+                    float fpRtol = 1e-5f) {
+    int quant8AllowedError = getQuant8AllowedError();
+    for_each<uint32_t>(
+            golden.operandDimensions, test.operandDimensions,
+            [](int index, const std::vector<uint32_t>& g, const std::vector<uint32_t>& t) {
+                SCOPED_TRACE(testing::Message()
+                             << "When comparing dimensions for output " << index);
+                EXPECT_EQ(g, t);
+            });
+    size_t totalNumberOfErrors = 0;
+    compare_<float>(golden.float32Operands, test.float32Operands,
+                    [&totalNumberOfErrors, fpAtol, fpRtol](float expected, float actual) {
+                        // Compute the range based on both absolute tolerance and relative tolerance
+                        float fpRange = fpAtol + fpRtol * std::abs(expected);
+                        if (totalNumberOfErrors < gMaximumNumberOfErrorMessages) {
+                            EXPECT_NEAR(expected, actual, fpRange);
+                        }
+                        if (std::abs(expected - actual) > fpRange) {
+                            totalNumberOfErrors++;
+                        }
+                    });
+    compare_<int32_t>(golden.int32Operands, test.int32Operands,
+                      [&totalNumberOfErrors](int32_t expected, int32_t actual) {
+                          if (totalNumberOfErrors < gMaximumNumberOfErrorMessages) {
+                              EXPECT_EQ(expected, actual);
+                          }
+                          if (expected != actual) {
+                              totalNumberOfErrors++;
+                          }
+                      });
+    compare_<uint8_t>(golden.quant8AsymmOperands, test.quant8AsymmOperands,
+                      [&totalNumberOfErrors, quant8AllowedError](uint8_t expected, uint8_t actual) {
+                          if (totalNumberOfErrors < gMaximumNumberOfErrorMessages) {
+                              EXPECT_NEAR(expected, actual, quant8AllowedError);
+                          }
+                          if (std::abs(expected - actual) > quant8AllowedError) {
+                              totalNumberOfErrors++;
+                          }
+                      });
+    compare_<int16_t>(golden.quant16SymmOperands, test.quant16SymmOperands,
+                      [&totalNumberOfErrors](int16_t expected, int16_t actual) {
+                          if (totalNumberOfErrors < gMaximumNumberOfErrorMessages) {
+                              EXPECT_NEAR(expected, actual, 1);
+                          }
+                          if (std::abs(expected - actual) > 1) {
+                              totalNumberOfErrors++;
+                          }
+                      });
+    compare_<_Float16>(golden.float16Operands, test.float16Operands,
+                       [&totalNumberOfErrors, fpAtol, fpRtol](_Float16 expected, _Float16 actual) {
+                           // Compute the range based on both absolute tolerance and relative
+                           // tolerance
+                           float fpRange = fpAtol + fpRtol * std::abs(static_cast<float>(expected));
+                           if (totalNumberOfErrors < gMaximumNumberOfErrorMessages) {
+                               EXPECT_NEAR(expected, actual, fpRange);
+                           }
+                           if (std::abs(static_cast<float>(expected - actual)) > fpRange) {
+                               totalNumberOfErrors++;
+                           }
+                       });
+    compare_<bool8>(golden.bool8Operands, test.bool8Operands,
+                    [&totalNumberOfErrors](bool expected, bool actual) {
+                        if (totalNumberOfErrors < gMaximumNumberOfErrorMessages) {
+                            EXPECT_EQ(expected, actual);
+                        }
+                        if (expected != actual) {
+                            totalNumberOfErrors++;
+                        }
+                    });
+    compare_<int8_t>(golden.quant8ChannelOperands, test.quant8ChannelOperands,
+                     [&totalNumberOfErrors, &quant8AllowedError](int8_t expected, int8_t actual) {
+                         if (totalNumberOfErrors < gMaximumNumberOfErrorMessages) {
+                             EXPECT_NEAR(expected, actual, quant8AllowedError);
+                         }
+                         if (std::abs(static_cast<int>(expected) - static_cast<int>(actual)) >
+                             quant8AllowedError) {
+                             totalNumberOfErrors++;
+                         }
+                     });
+    compare_<uint16_t>(golden.quant16AsymmOperands, test.quant16AsymmOperands,
+                       [&totalNumberOfErrors](int16_t expected, int16_t actual) {
+                           if (totalNumberOfErrors < gMaximumNumberOfErrorMessages) {
+                               EXPECT_NEAR(expected, actual, 1);
+                           }
+                           if (std::abs(expected - actual) > 1) {
+                               totalNumberOfErrors++;
+                           }
+                       });
+    compare_<int8_t>(golden.quant8SymmOperands, test.quant8SymmOperands,
+                     [&totalNumberOfErrors, quant8AllowedError](int8_t expected, int8_t actual) {
+                         if (totalNumberOfErrors < gMaximumNumberOfErrorMessages) {
+                             EXPECT_NEAR(expected, actual, quant8AllowedError);
+                         }
+                         if (std::abs(static_cast<int>(expected) - static_cast<int>(actual)) >
+                             quant8AllowedError) {
+                             totalNumberOfErrors++;
+                         }
+                     });
+
+    static_assert(9 == MixedTyped::kNumTypes,
+                  "Number of types in MixedTyped changed, but compare function wasn't updated");
+    EXPECT_EQ(size_t{0}, totalNumberOfErrors);
+}
+
+// Calculates the expected probability from the unnormalized log-probability of
+// each class in the input and compares it to the actual ocurrence of that class
+// in the output.
+inline void expectMultinomialDistributionWithinTolerance(const MixedTyped& test,
+                                                         const MixedTypedExample& example) {
+    // TODO: These should be parameters but aren't currently preserved in the example.
+    const int kBatchSize = 1;
+    const int kNumClasses = 1024;
+    const int kNumSamples = 128;
+
+    std::vector<int32_t> output = test.int32Operands.at(0);
+    std::vector<int> class_counts;
+    class_counts.resize(kNumClasses);
+    for (int index : output) {
+        class_counts[index]++;
+    }
+    std::vector<float> input;
+    Float32Operands float32Operands = example.operands.first.float32Operands;
+    if (!float32Operands.empty()) {
+        input = example.operands.first.float32Operands.at(0);
+    } else {
+        std::vector<_Float16> inputFloat16 = example.operands.first.float16Operands.at(0);
+        input.resize(inputFloat16.size());
+        convertFloat16ToFloat32(inputFloat16.data(), &input);
+    }
+    for (int b = 0; b < kBatchSize; ++b) {
+        float probability_sum = 0;
+        const int batch_index = kBatchSize * b;
+        for (int i = 0; i < kNumClasses; ++i) {
+            probability_sum += expf(input[batch_index + i]);
+        }
+        for (int i = 0; i < kNumClasses; ++i) {
+            float probability =
+                    static_cast<float>(class_counts[i]) / static_cast<float>(kNumSamples);
+            float probability_expected = expf(input[batch_index + i]) / probability_sum;
+            EXPECT_THAT(probability,
+                        ::testing::FloatNear(probability_expected,
+                                             example.expectedMultinomialDistributionTolerance));
+        }
+    }
+}
+
+};  // namespace test_helper
+
+#endif  // ANDROID_FRAMEWORKS_ML_NN_TOOLS_TEST_GENERATOR_TEST_HARNESS_H
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/spec_visualizer.py b/tests/nnapi/nnapi_test_generator/android-q-beta/spec_visualizer.py
new file mode 100644
index 000000000..73a9628b7
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/spec_visualizer.py
@@ -0,0 +1,266 @@
+#!/usr/bin/python3
+
+# Copyright 2019, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Spec Visualizer
+
+Visualize python spec file for test generator.
+Invoked by ml/nn/runtime/test/specs/visualize_spec.sh;
+See that script for details on how this script is used.
+"""
+
+from __future__ import absolute_import
+from __future__ import division
+from __future__ import print_function
+import argparse
+import json
+import os
+import sys
+from string import Template
+
+# Stuff from test generator
+import test_generator as tg
+from test_generator import ActivationConverter
+from test_generator import BoolScalar
+from test_generator import Configuration
+from test_generator import DataTypeConverter
+from test_generator import DataLayoutConverter
+from test_generator import Example
+from test_generator import Float16Scalar
+from test_generator import Float32Scalar
+from test_generator import Float32Vector
+from test_generator import GetJointStr
+from test_generator import IgnoredOutput
+from test_generator import Input
+from test_generator import Int32Scalar
+from test_generator import Int32Vector
+from test_generator import Internal
+from test_generator import Model
+from test_generator import Operand
+from test_generator import Output
+from test_generator import Parameter
+from test_generator import ParameterAsInputConverter
+from test_generator import RelaxedModeConverter
+from test_generator import SymmPerChannelQuantParams
+
+
+TEMPLATE_FILE = os.path.join(os.path.dirname(os.path.realpath(__file__)), "spec_viz_template.html")
+global_graphs = dict()
+
+
+def FormatArray(data, is_scalar=False):
+    if is_scalar:
+        assert len(data) == 1
+        return str(data[0])
+    else:
+        return "[%s]" % (", ".join(str(i) for i in data))
+
+
+def FormatDict(data):
+    return "<br/>".join("<b>%s:</b> %s"%(k.capitalize(), v) for k, v in data.items())
+
+
+def GetOperandInfo(op):
+    op_info = {"lifetime": op.lifetime, "type": op.type.type}
+
+    if not op.type.IsScalar():
+        op_info["dimensions"] = FormatArray(op.type.dimensions)
+
+    if op.type.scale != 0:
+        op_info["scale"] = op.type.scale
+        op_info["zero point"] = op.type.zeroPoint
+    if op.type.type == "TENSOR_QUANT8_SYMM_PER_CHANNEL":
+        op_info["scale"] = FormatArray(op.type.extraParams.scales)
+        op_info["channel dim"] = op.type.extraParams.channelDim
+
+    return op_info
+
+
+def FormatOperand(op):
+    # All keys and values in op_info will appear in the tooltip. We only display the operand data
+    # if the length is less than 10. This should be convenient enough for most parameters.
+    op_info = GetOperandInfo(op)
+    if isinstance(op, Parameter) and len(op.value) <= 10:
+        op_info["data"] = FormatArray(op.value, op.type.IsScalar())
+
+    template = "<span class='tooltip'><span class='tooltipcontent'>{tooltip_content}</span><a href=\"{inpage_link}\">{op_name}</a></span>"
+    return template.format(
+        op_name=str(op),
+        tooltip_content=FormatDict(op_info),
+        inpage_link="#details-operands-%d" % (op.model_index),
+    )
+
+
+def GetSubgraph(example):
+    """Produces the nodes and edges information for d3 visualization."""
+
+    node_index_map = {}
+    topological_order = []
+
+    def AddToTopologicalOrder(op):
+        if op not in node_index_map:
+            node_index_map[op] = len(topological_order)
+            topological_order.append(op)
+
+    # Get the topological order, both operands and operations are treated the same.
+    # Given that the example.model.operations is already topologically sorted, here we simply
+    # iterate through and insert inputs and outputs.
+    for op in example.model.operations:
+        for i in op.ins:
+            AddToTopologicalOrder(i)
+        AddToTopologicalOrder(op)
+        for o in op.outs:
+            AddToTopologicalOrder(o)
+
+    # Assign layers to the nodes.
+    layers = {}
+    for node in topological_order:
+        layers[node] = max([layers[i] for i in node.ins], default=-1) + 1
+    for node in reversed(topological_order):
+        layers[node] = min([layers[o] for o in node.outs], default=layers[node]+1) - 1
+    num_layers = max(layers.values()) + 1
+
+    # Assign coordinates to the nodes. Nodes are equally spaced.
+    CoordX = lambda index: (index + 0.5) * 200  # 200px spacing horizontally
+    CoordY = lambda index: (index + 0.5) * 100  # 100px spacing vertically
+    coords = {}
+    layer_cnt = [0] * num_layers
+    for node in topological_order:
+        coords[node] = (CoordX(layer_cnt[layers[node]]), CoordY(layers[node]))
+        layer_cnt[layers[node]] += 1
+
+    # Create edges and nodes dictionaries for d3 visualization.
+    OpName = lambda idx: "operation%d" % idx
+    edges = []
+    nodes = []
+    for ind, op in enumerate(example.model.operations):
+        for tensor in op.ins:
+            edges.append({
+                "source": str(tensor),
+                "target": OpName(ind)
+            })
+        for tensor in op.outs:
+            edges.append({
+                "target": str(tensor),
+                "source": OpName(ind)
+            })
+        nodes.append({
+            "index": ind,
+            "id": OpName(ind),
+            "name": op.optype,
+            "group": 2,
+            "x": coords[op][0],
+            "y": coords[op][1],
+        })
+
+    for ind, op in enumerate(example.model.operands):
+        nodes.append({
+            "index": ind,
+            "id": str(op),
+            "name": str(op),
+            "group": 1,
+            "x": coords[op][0],
+            "y": coords[op][1],
+        })
+
+    return {"nodes": nodes, "edges": edges}
+
+
+# The following Get**Info methods will each return a list of dictionaries,
+# whose content will appear in the tables and sidebar views.
+def GetConfigurationsInfo(example):
+    return [{
+        "relaxed": str(example.model.isRelaxed),
+        "use shared memory": str(tg.Configuration.useSHM()),
+        "expect failure": str(example.expectFailure),
+    }]
+
+
+def GetOperandsInfo(example):
+    ret = []
+    for index, op in enumerate(example.model.operands):
+        ret.append({
+                "index": index,
+                "name": str(op),
+                "group": "operand"
+            })
+        ret[-1].update(GetOperandInfo(op))
+        if isinstance(op, Parameter):
+            ret[-1]["data"] = FormatArray(op.value, op.type.IsScalar())
+        elif isinstance(op, Input):
+            ret[-1]["data"] = FormatArray(example.feedDicts[0][0][op], op.type.IsScalar())
+        elif isinstance(op, Output) and not isinstance(op, IgnoredOutput):
+            ret[-1]["data"] = FormatArray(example.feedDicts[0][1][op], op.type.IsScalar())
+    return ret
+
+
+def GetOperationsInfo(example):
+    return [{
+            "index": index,
+            "name": op.optype,
+            "group": "operation",
+            "opcode": op.optype,
+            "inputs": ", ".join(FormatOperand(i) for i in op.ins),
+            "outputs": ", ".join(FormatOperand(o) for o in op.outs),
+        } for index,op in enumerate(example.model.operations)]
+
+
+# TODO: Remove the unused fd from the parameter.
+def ProcessExample(example, fd):
+    """Process an example and save the information into the global dictionary global_graphs."""
+
+    global global_graphs
+    print("    Processing variation %s" % example.testName)
+    global_graphs[str(example.testName)] = {
+        "subgraph": GetSubgraph(example),
+        "details": {
+            "configurations": GetConfigurationsInfo(example),
+            "operands": GetOperandsInfo(example),
+            "operations": GetOperationsInfo(example)
+        }
+    }
+
+
+def DumpHtml(spec_file, out_file):
+    """Dump the final HTML file by replacing entries from a template file."""
+
+    with open(TEMPLATE_FILE, "r") as template_fd:
+        html_template = template_fd.read()
+
+    with open(out_file, "w") as out_fd:
+        out_fd.write(Template(html_template).substitute(
+            spec_name=os.path.basename(spec_file),
+            graph_dump=json.dumps(global_graphs),
+        ))
+
+
+def ParseCmdLine():
+    parser = argparse.ArgumentParser()
+    parser.add_argument("spec", help="the spec file")
+    parser.add_argument("-o", "--out", help="the output html path", default="out.html")
+    args = parser.parse_args()
+    tg.FileNames.InitializeFileLists(args.spec, "-", "-", "-")
+    tg.FileNames.NextFile()
+    return os.path.abspath(args.spec), os.path.abspath(args.out)
+
+
+if __name__ == '__main__':
+    spec_file, out_file = ParseCmdLine()
+    print("Visualizing from spec: %s" % spec_file)
+    exec(open(spec_file, "r").read())
+    Example.DumpAllExamples(DumpExample=ProcessExample, example_fd=0)
+    DumpHtml(spec_file, out_file)
+    print("Output HTML file: %s" % out_file)
+
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/spec_viz_template.html b/tests/nnapi/nnapi_test_generator/android-q-beta/spec_viz_template.html
new file mode 100644
index 000000000..befe469dc
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/spec_viz_template.html
@@ -0,0 +1,438 @@
+<!DOCTYPE html>
+<html>
+<head>
+    <title>$spec_name</title>
+    <style>
+        body {
+            font-family: "Roboto", sans-serif;
+            margin: 0;
+            height: 100%;
+            background-color: rgb(61, 65, 77);
+        }
+
+        #main {
+            width: 62%;
+            transition: 0.5s;
+        }
+
+        #main h1 {
+            padding: 20px;
+            color: #eee;
+            font-size: 24px;
+        }
+
+        .subgraph h3 {
+            text-transform: capitalize;
+        }
+
+        .subgraph {
+            padding: 20px;
+            margin: 20px;
+            border-radius: 10px;
+            background-color: #fff;
+        }
+
+        .subgraph table {
+            border-collapse: collapse;
+            border-spacing: 0;
+        }
+
+        .subgraph thead {
+            background-color: rgb(61, 65, 77);
+            color: white;
+            text-transform: capitalize;
+        }
+
+        .subgraph tbody tr:nth-child(odd) {
+            background-color: #f2f2f2;
+        }
+
+        .subgraph tbody tr:hover {
+            background-color: #d8d8d8;
+        }
+
+        .subgraph td {
+            border: 1px solid #ddd;
+            padding: 8px;
+        }
+
+        .subgraph select {
+            font-weight: bold;
+            text-transform: uppercase;
+            font-size: 18px;
+            color: black;
+        }
+
+        .subgraph svg {
+            background: white;
+            border: 1px solid #ccc;
+        }
+
+        .subgraph .edges line {
+            stroke: #333;
+        }
+
+        .subgraph .nodes text {
+            color: black;
+            pointer-events: none;
+            font-family: sans-serif;
+            font-size: 11px;
+        }
+
+        #sidebar {
+            height: 100%;
+            width: 38%;
+            position: fixed;
+            z-index: 1;
+            top: 0;
+            right: 0;
+            background-color: #eee;
+            overflow-x: hidden;
+            transition: 0.5s;
+            border-left: 1px solid #ccc;
+        }
+
+        #sidebar #sidebar-main {
+            padding: 50px;
+        }
+
+        #sidebar h1 {
+            margin-top: 6px;
+            margin-bottom: 24px;
+            font-weight: bold;
+            font-size: 18px;
+            text-transform: uppercase;
+        }
+
+        #sidebar .subtitle {
+            margin-bottom: 6px;
+            border-bottom: 1px solid #ccc;
+            padding-bottom: 4px;
+            font-weight: bold;
+            font-size: 12px;
+            text-transform: uppercase;
+            color: #555;
+        }
+
+        #sidebar .property {
+            display: block;
+            margin-bottom: 16px;
+        }
+
+        #sidebar .property_title {
+            float: left;
+            width: 80px;
+            margin-top: 0;
+            padding-top: 10px;
+            font-weight: bold;
+            font-size: 12px;
+            text-transform: uppercase;
+            color: #555;
+        }
+
+        #sidebar .property_text {
+            margin-top: 8px;
+            margin-left: 100px;
+            border: 1px solid #ccc;
+            border-radius: 2px;
+            padding: 8px;
+            font-size: 14px;
+            background-color: #fff;
+        }
+
+        #sidebar .closebtn {
+            position: absolute;
+            top: 0;
+            right: 25px;
+            font-size: 36px;
+            margin-left: 50px;
+            text-decoration: none;
+            color: #555;
+        }
+
+        .tooltip {
+            color: blue;
+        }
+
+        .tooltip .tooltipcontent {
+            visibility: hidden;
+            color: black;
+            background-color: #eee;
+            margin-top: 18px;
+            padding: 5px;
+            border: 1px solid #ccc;
+            border-radius: 4px;
+            position: absolute;
+            z-index: 1;
+        }
+
+        .tooltip:hover .tooltipcontent {
+            visibility: visible;
+        }
+    </style>
+    <link href="https://fonts.googleapis.com/css?family=Roboto&display=swap" rel="stylesheet" />
+    <script src="https://d3js.org/d3.v4.min.js"></script>
+    <script>
+        graphs = $graph_dump;
+    </script>
+</head>
+
+<body>
+    <div id="main">
+        <h1>$spec_name</h1>
+        <div class="subgraph" id="main-subgraph">
+            <label for="main-selector">Choose a subgraph: </label>
+            <select id="main-selector" onchange="renderSubgraph(this.value)"></select>
+            <div id="main-tables"></div>
+            <h3>Visual Graph</h3>
+            <svg id="subgraph-svg" width="100%" height="720"></svg>
+        </div>
+    </div>
+
+    <div id="sidebar">
+        <div id="sidebar-main">
+        </div>
+    </div>
+
+    <script>
+        // Render the sidebar view of a given node object.
+        // The node must have "name" and "group" fields available.
+        function renderSidebar(node) {
+            var sidebar = document.getElementById("sidebar-main");
+            sidebar.innerHTML = "";
+            if (node == null) return;
+
+            // Sidebar subtitle -- text taken from node.group.
+            var subtitle = document.createElement("p");
+            subtitle.classList.add("subtitle");
+            subtitle.innerHTML = node.group;
+            sidebar.appendChild(subtitle);
+
+            // Sidebar title -- text taken from node.name.
+            var title = document.createElement("h1");
+            title.innerHTML = node.name;
+            sidebar.appendChild(title);
+
+            // List all the other fields in sidebar.
+            var ignoredFields = ["name", "group"];
+            for (var property in node) {
+                if (ignoredFields.includes(property)) continue;
+
+                var propertyTitle = document.createElement("h2");
+                propertyTitle.classList.add("property_title");
+                propertyTitle.innerHTML = property;
+
+                var propertyText = document.createElement("p");
+                propertyText.classList.add("property_text");
+                propertyText.innerHTML = node[property];
+
+                var propertyDiv = document.createElement("div");
+                propertyDiv.classList.add("property");
+                propertyDiv.appendChild(propertyTitle);
+                propertyDiv.appendChild(propertyText);
+                sidebar.appendChild(propertyDiv);
+            }
+        }
+
+        // Render the SVG DAG visualization, from TFLite graph visualizer.
+        // https://github.com/tensorflow/tensorflow/blob/master/tensorflow/lite/tools/visualize.py
+        //
+        // The node coordiates are pre-calculated from the python visualizer.
+        function renderSvg(subgraph) {
+            var data = graphs[subgraph]["subgraph"];
+            var svg = d3.select("#subgraph-svg");
+            svg.selectAll("*").remove();
+            var width = svg.attr("width");
+            var height = svg.attr("height");
+            // Make the graph scrollable.
+            svg = svg.call(d3.zoom().on("zoom", function () {
+                svg.attr("transform", d3.event.transform);
+            })).append("g");
+            var color = d3.scaleOrdinal(d3.schemeDark2);
+            var simulation = d3.forceSimulation()
+                .force("link", d3.forceLink().id(function (d) { return d.id; }))
+                .force("charge", d3.forceManyBody())
+                .force("center", d3.forceCenter(0.5 * width, 0.5 * height));
+            var edge = svg.append("g").attr("class", "edges").selectAll("line")
+                .data(data.edges).enter().append("path").attr("stroke", "black").attr("fill", "none")
+            // Make the node group
+            var node = svg.selectAll(".nodes")
+                .data(data.nodes)
+                .enter().append("g")
+                .attr("x", function (d) { return d.x })
+                .attr("y", function (d) { return d.y })
+                .attr("transform", function (d) {
+                    return "translate( " + d.x + ", " + d.y + ")"
+                })
+                .attr("class", "nodes")
+                .call(d3.drag()
+                    .on("start", function (d) {
+                        if (!d3.event.active) simulation.alphaTarget(1.0).restart();
+                        d.fx = d.x; d.fy = d.y;
+                    })
+                    .on("drag", function (d) {
+                        d.fx = d3.event.x; d.fy = d3.event.y;
+                    })
+                    .on("end", function (d) {
+                        if (!d3.event.active) simulation.alphaTarget(0);
+                        d.fx = d.fy = null;
+                    }));
+            // Within the group, draw a box for the node position and text
+            // on the side.
+            var node_width = 150;
+            var node_height = 30;
+            node.append("rect")
+                .attr("r", "5px")
+                .attr("width", function (d) { return d.group == 1 ? node_width : node_width + 50; })
+                .attr("height", node_height)
+                .attr("rx", function (d) { return d.group == 1 ? 1 : 10; })
+                .attr("stroke", "#000000")
+                .attr("fill", function (d) { return d.group == 1 ? "#dddddd" : "#000000"; })
+                .attr("onclick", function (d) {
+                    return "renderSidebar(graphs." + subgraph + ".details." +
+                        (d.group == 1 ? "operands" : "operations") + "[" +
+                        d.index.toString() + "])";
+                });
+            node.append("text")
+                .text(function (d) { return d.name; })
+                .attr("x", 5)
+                .attr("y", 20)
+                .attr("fill", function (d) { return d.group == 1 ? "#000000" : "#eeeeee"; })
+            // Setup force parameters and update position callback
+            var node = svg.selectAll(".nodes")
+                .data(data.nodes);
+            // Bind the links
+            var name_to_g = {}
+            node.each(function (data, index, nodes) {
+                name_to_g[data.id] = this;
+            });
+            function proc(w, t) {
+                return parseInt(w.getAttribute(t));
+            }
+            edge.attr("d", function (d) {
+                function lerp(t, a, b) {
+                    return (1.0 - t) * a + t * b;
+                }
+                var x1 = proc(name_to_g[d.source], "x") + node_width / 2;
+                var y1 = proc(name_to_g[d.source], "y") + node_height;
+                var x2 = proc(name_to_g[d.target], "x") + node_width / 2;
+                var y2 = proc(name_to_g[d.target], "y");
+                var s = "M " + x1 + " " + y1
+                    + " C " + x1 + " " + lerp(.5, y1, y2)
+                    + " " + x2 + " " + lerp(.5, y1, y2)
+                    + " " + x2 + " " + y2
+                return s;
+            });
+        }
+
+        // Open a new window and present the full text data.
+        function showFullData(data) {
+            window.open().document.write(data);
+        }
+
+        // Renders a single table.
+        function renderTable(title, data, headers) {
+            var parent = document.getElementById("main-tables");
+
+            // Create heading.
+            var heading = document.createElement("h3");
+            heading.innerHTML = title;
+            parent.appendChild(heading);
+
+            // Filter out headers that do not appear in any data element.
+            headers = headers.filter(function (key) {
+                return data.some(function (elem) { return key in elem; });
+            });
+
+            // Render the table headers.
+            var table = document.createElement("table");
+            let header = table.createTHead().insertRow();
+            for (let key of headers) { header.insertCell().innerHTML = key; }
+
+            // Render the table body.
+            // Since the "data" field could be very large, we omit the full content and
+            // append a "View Full" button to the end.
+            var omittableFields = ["data"];
+            let body = table.createTBody();
+            for (const [index, elem] of data.entries()) {
+                let row = body.insertRow();
+                row.id = "details-" + title.toLowerCase() + "-" + index.toString();
+
+                for (let key of headers) {
+                    var cell = row.insertCell();
+                    var data = key in elem ? elem[key] : "-";
+                    if (omittableFields.includes(key) && data.length > 100) {
+                        // If the data exceeds the length limit, only print the first 80 and
+                        // the last 20 characters.
+                        data = data.substring(0, 80) + " ... " +
+                            data.substring(data.length - 20, data.length) + " ";
+                        cell.innerHTML = data;
+
+                        // Append a "View Full" button to the end.
+                        var href = document.createElement("a");
+                        href.innerHTML = "View Full";
+                        href.href = "javascript:void(0)";
+                        href.onclick = function () { showFullData(elem[key]); };
+                        cell.appendChild(href);
+                    } else {
+                        cell.innerHTML = data;
+                    }
+                }
+            }
+            parent.appendChild(table);
+        }
+
+        function renderTables(subgraph) {
+            document.getElementById("main-tables").innerHTML = "";
+            renderTable("Configurations", graphs[subgraph].details.configurations, [
+                "relaxed",
+                "use shared memory",
+                "expect failure"
+            ]);
+            renderTable("Operands", graphs[subgraph].details.operands, [
+                "index",
+                "name",
+                "type",
+                "dimensions",
+                "scale",
+                "zero point",
+                "channel dim",
+                "lifetime",
+                "data"
+            ]);
+            renderTable("Operations", graphs[subgraph].details.operations, [
+                "index",
+                "opcode",
+                "inputs",
+                "outputs"
+            ]);
+        }
+
+        // Re-render all the information related to a subgraph.
+        // Invoked everytime when the main-selector changes.
+        function renderSubgraph(subgraph) {
+            renderTables(subgraph);
+            renderSvg(subgraph);
+            renderSidebar(null);  // Clear sidebar.
+        }
+
+        // Renders the main-selector and the first subgraph choice in the main-selector.
+        // Only invoked once when the page gets loaded the first time.
+        function renderMain() {
+            var selector = document.getElementById("main-selector");
+            var first = true;
+            for (var subgraph in graphs) {
+                var option = document.createElement("option");
+                option.value = subgraph;
+                option.text = subgraph;
+                selector.appendChild(option);
+                if (first) {
+                    first = false;
+                    renderSubgraph(subgraph);
+                }
+            }
+        }
+        renderMain();
+    </script>
+</body>
+</html>
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/test_generator.py b/tests/nnapi/nnapi_test_generator/android-q-beta/test_generator.py
new file mode 100644
index 000000000..f49385c78
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/test_generator.py
@@ -0,0 +1,1236 @@
+#!/usr/bin/python3
+
+# Copyright 2017, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""NN model compiler
+
+Contain classes definition and utilify functions for compiling models and
+examples into NDK-based CTS and VTS unit tests.
+
+Used by cts_generator.py, vts_generator.py, and spec_visualizer.py
+"""
+
+from __future__ import absolute_import
+from __future__ import division
+from __future__ import print_function
+import argparse
+import copy
+from functools import reduce
+import itertools
+import math
+import os
+import re
+import struct
+import sys
+import contextlib
+import pprint
+import numpy as np
+
+def GetJointStr(l, sep=", ", method=str):
+    return sep.join([method(i) for i in l])
+
+# Print in C float literal format
+def PrettyPrintAsFloat(x):
+    s = str(float(x))
+    if s.find(".") >= 0 or s.find("e") >= 0:
+        return s + "f"
+    else:
+        return s + ".0f"
+
+# Transform from original type to float32
+def Dequantize(v, ty):
+    v -= ty.zeroPoint
+    if ty.scale != 0:
+        v *= ty.scale
+    if isinstance(ty.extraParams, SymmPerChannelQuantParams):
+        v *= ty.extraParams.GetScalesBroadcastArray(ty.dimensions)
+    return v
+
+# Transform float32 to target data type
+def Quantize(v, ty):
+    if ty.scale != 0:
+        v /= ty.scale
+    if isinstance(ty.extraParams, SymmPerChannelQuantParams):
+        v = v / ty.extraParams.GetScalesBroadcastArray(ty.dimensions)
+    v += ty.zeroPoint
+    if not ty.IsFloat():
+        v = np.round(v)
+        v = int(v) if np.isscalar(v) else v.astype(int)
+    if ty.type == "TENSOR_QUANT8_ASYMM":
+        v = np.minimum(np.maximum(v, 0), 255)
+    elif ty.type == "TENSOR_QUANT16_ASYMM":
+        v = np.minimum(np.maximum(v, 0), 65535)
+    elif ty.type == "TENSOR_QUANT8_SYMM_PER_CHANNEL":
+        v = np.minimum(np.maximum(v, -127), 127)
+    elif ty.type == "UINT32":
+        v = np.maximum(v, 0)
+    return v
+
+@contextlib.contextmanager
+def SmartOpen(filename=None, mode="w"):
+    if filename and filename != '-':
+        fh = open(filename, mode)
+    else:
+        fh = sys.stdout
+
+    try:
+        yield fh
+    finally:
+        if fh is not sys.stdout:
+            fh.close()
+
+# Tracking objects inside a model with a unique name
+class NamedObject:
+    existingNames = set()
+
+    def __init__(self, *args, sep="_", showZero=False, startsFrom=0, skipRenaming=False):
+        name = GetJointStr([i for i in args if i is not None and i != ""], sep=sep)
+        if skipRenaming:
+            self.name = name
+            return
+        # make the name unique by renaming with a suffix number
+        uniqueName = name if showZero is False else name + sep + str(startsFrom)
+        while uniqueName in self.__class__.existingNames:
+            startsFrom += 1
+            uniqueName = name + sep + str(startsFrom)
+        self.__class__.existingNames.add(uniqueName)
+        self.name = uniqueName
+
+    def __str__(self):
+        return self.name
+    __repr__ = __str__
+
+    # Since names are unique, objects with the same name are considered equal
+    def __eq__(self, other):
+        return isinstance(other, NamedObject) and self.name == other.name
+
+    def __ne__(self, other):
+        return not self.__eq__(other)
+
+    def __hash__(self):
+        return hash(self.name)
+
+    def __lt__(self, other):
+        return self.name < other.name
+
+# Types, operands should all have a unique name since they share the same namespace
+class NamedVariable(NamedObject):
+    existingNames = set()
+    def __init__(self, *args, sep="_", showZero=False, startsFrom=0, skipRenaming=False):
+        NamedObject.__init__(self, *args, sep=sep, showZero=showZero,
+            startsFrom=startsFrom, skipRenaming=skipRenaming)
+
+# Global variables in the spec namespace such as CreateModel, is_ignored, and examples
+class GlobalVariable(NamedVariable):
+    def __init__(self, *args, skipRenaming=False):
+        NamedObject.__init__(self, *args, startsFrom=1, skipRenaming=skipRenaming)
+
+# Each test should have a unique name, but will not conflict with variables
+class NamedTest(NamedObject):
+    existingNames = set()
+    def __init__(self, *args, startsFrom=0, skipRenaming=False):
+        NamedObject.__init__(self, *args, startsFrom=1, skipRenaming=skipRenaming)
+
+class Type(NamedVariable):
+    typesMap = dict()
+    typeLookup = {
+        "INT32": "int32_t",
+        "UINT32": "uint32_t",
+        "FLOAT32": "float",
+        "FLOAT16": "_Float16",
+        "TENSOR_INT32": "int32_t",
+        "TENSOR_FLOAT16": "_Float16",
+        "TENSOR_FLOAT32": "float",
+        "TENSOR_QUANT8_ASYMM": "uint8_t",
+        "TENSOR_QUANT8_SYMM": "int8_t",
+        "BOOL": "bool8",
+        "TENSOR_QUANT16_ASYMM": "uint16_t",
+        "TENSOR_QUANT16_SYMM": "int16_t",
+        "TENSOR_BOOL8": "bool8",
+        "TENSOR_QUANT8_SYMM_PER_CHANNEL": "int8_t",
+#     "OEM_SCALAR": this is service-defined.
+        "TENSOR_OEM_BYTE": "uint8_t",
+    }
+
+    # types are named as "type0", "type1", ...
+    def __init__(self, vt, dimensions, scale, zeroPoint, name="type", skipRenaming=False,
+                 extraParams=None):
+        NamedVariable.__init__(self, name, sep="", showZero=True, skipRenaming=skipRenaming)
+        self.type = vt
+        self.dimensions = dimensions
+        self.scale = float(scale)
+        self.zeroPoint = int(zeroPoint)
+        self.extraParams = extraParams
+
+    # Factory for Type object, only create a new Type if requested type does
+    # not have a match with all existing types
+    @staticmethod
+    def GetType(vt, dimensions, scale=0, zeroPoint=0, extraParams=None):
+        key = ",".join([vt, str(dimensions), str(scale), str(zeroPoint), str(extraParams)])
+        if key not in Type.typesMap:
+            Type.typesMap[key] = Type(vt, dimensions, scale, zeroPoint, extraParams=extraParams)
+        return Type.typesMap[key]
+
+    @staticmethod
+    def GetAllTypes():
+        # sort to ensure a stable order when dumping the code
+        return sorted(Type.typesMap.values())
+
+    # For backward-compatibility
+    @staticmethod
+    def GetTypeFromString(vt, shape, extraParams=None):
+        dimensions, scale, zeroPoint = Type.GetParsedShape(shape)
+        scale = float(scale)
+        zeroPoint = int(zeroPoint)
+        return Type.GetType(vt, dimensions, scale, zeroPoint, extraParams)
+
+    # For backward-compatibility
+    @staticmethod
+    def GetParsedShape(shape):
+        # Parse shape
+        if (shape != "" and shape != "{}"):
+            left, sep, right = shape.partition('{')
+            real_shape, sep, right = right.partition('}')
+            shape = [int(x) for x in real_shape.split(",")]
+            # left now looks like "0.0f, 127.5f, "
+            scale, sep, zero_point = right.rpartition(',')
+            if scale == "":
+                if zero_point == "":
+                    return shape, "0", "0"
+                return shape, zero_point, "0"
+            left, sep, scale = scale.partition(',')
+            return shape, scale.replace("f", ""), zero_point
+        else:
+            return [], "0", "0"
+
+    def GetNumberOfElements(self):
+        return reduce(lambda x,y: x*y, self.dimensions, 1)
+
+    def GetCppTypeString(self):
+        return Type.typeLookup[self.type]
+
+    def IsFloat(self):
+        return self.GetCppTypeString() in ["float", "_Float16"]
+
+    def IsBool(self):
+        return self.GetCppTypeString() == "bool8"
+
+    def IsScalar(self):
+        return not self.type.startswith("TENSOR_")
+
+    def GetElementByteSize(self):
+        cppTypeString = self.GetCppTypeString()
+        if cppTypeString in ["uint8_t", "int8_t", "bool8"]:
+            return 1
+        elif cppTypeString in ["int16_t", "uint16_t", "_Float16"]:
+            return 2
+        else:
+            return 4
+
+    def GetByteSize(self):
+        return self.GetElementByteSize() * self.GetNumberOfElements()
+
+    def GetDimensionsString(self):
+        return "{" + GetJointStr(self.dimensions) + "}"
+
+    def GetSignatureTuple(self):
+        return (self.type, self.dimensions, self.scale, self.zeroPoint)
+
+    def ToUnspecifiedDim(self):
+        return Type.GetType(self.type, [0] * len(self.dimensions), self.scale, self.zeroPoint)
+
+# To track implicitly convertible parameter types
+class ImplicitParameter():
+    @staticmethod
+    def ImplicitConvertion(value):
+        if isinstance(value, Operand):
+            return value
+        for implicitType in ImplicitParameter.__subclasses__():
+            if implicitType.IsCompatible(value):
+                return implicitType("param", value)
+        assert False, "%s not supported for implicit parameter"%value
+
+
+# ExtraParams with per-channel quantization.
+class SymmPerChannelQuantParams():
+  def __init__(self, channelDim, scales, hide = False):
+    self.channelDim = channelDim
+    self.scales = scales
+    self.hide = hide
+
+  def GetScalesBroadcastArray(self, dimensions):
+    bshape = [1] * len(dimensions)
+    bshape[self.channelDim] = len(self.scales)
+    return np.array(self.scales).reshape(bshape)
+
+  def GetConstructor(self):
+    return "SymmPerChannelQuantParams({%s},%d)" % (
+        ", ".join(str(x) + "f" for x in self.scales), self.channelDim)
+
+  def GetVtsSetter(self):
+    return "channelQuant"
+
+  def GetVtsConstructor(self):
+    return "SymmPerChannelQuantParams{.scales={%s}, .channelDim=%d}" % (
+        ", ".join(str(x) + "f" for x in self.scales), self.channelDim)
+
+
+# An operand that can be fed into operations. Also, an operand is always
+# declared before operations.
+class Operand(NamedVariable):
+
+    def __init__(self, name, opType, value, backward=None, skipRenaming=False, extraParams=None):
+        NamedVariable.__init__(self, name, sep="", skipRenaming=skipRenaming)
+        if type(opType) is str:
+            self.type = Type.GetTypeFromString(opType, value, extraParams)
+            value = backward
+        else:
+            self.type = Type.GetType(*opType, extraParams=extraParams)
+        self.SetValue(value)
+        self.dimensions = self.type.dimensions
+        self.lifetime = "TEMPORARY_VARIABLE"
+        self.model_index = None
+        self.ins = []
+        self.outs = []
+
+    def SetValue(self, value):
+        self.value = value if type(value) is list or type(value) is tuple else [value]
+        return self
+
+    def SetValueFromNumpy(self, value):
+        self.value = value.flatten().tolist()
+        return self
+
+    def GetValueAsNumpy(self):
+        return np.array(self.value).reshape(self.type.dimensions)
+
+    # Print value as cpp-style list initialization
+    def GetListInitialization(self):
+        assert self.value is not None, \
+            "Trying to print operand %s with None value"%(str(self))
+        if self.type.IsFloat():
+            return "{%s}"%(GetJointStr(self.value, method=PrettyPrintAsFloat))
+        elif self.type.IsBool():
+            return "{%s}"%(GetJointStr(self.value, method=lambda v: "true" if v else "false"))
+        else:
+            return "{%s}"%(GetJointStr(self.value, method=lambda x: str(int(x))))
+
+    def ToUnspecifiedDim(self):
+        self.dimensions = self.type.dimensions
+        self.type = self.type.ToUnspecifiedDim()
+
+# Base class of user-defined input/output operand
+class InOut(Operand):
+
+    def __init__(self, name, opType, backward=None, skipRenaming=False, extraParams=None):
+        Operand.__init__(self, name, opType, backward, None, skipRenaming=skipRenaming, extraParams=extraParams)
+        self.lifetime = "MODEL_INPUT"
+        self.index = 0
+
+    def Feed(self, value):
+        self.SetValue(value[self] if type(value) is dict else value)
+        return self
+
+    def GetListInitialization(self):
+        return "{%d, %s}"%(self.index, super().GetListInitialization())
+
+# A user-declared input operand
+class Input(InOut):
+    def __init__(self, name, opType, backward=None, skipRenaming=False, extraParams=None):
+        InOut.__init__(self, name, opType, backward, skipRenaming=skipRenaming, extraParams=extraParams)
+        self.lifetime = "MODEL_INPUT"
+
+# A user-declared output operand
+class Output(InOut):
+    def __init__(self, name, opType, backward=None, skipRenaming=False):
+        InOut.__init__(self, name, opType, backward, skipRenaming=skipRenaming)
+        self.lifetime = "MODEL_OUTPUT"
+
+# An output that we don't want to compare the results
+class IgnoredOutput(Output):
+    def __init__(self, name, opType, backward=None, skipRenaming=False):
+        Output.__init__(self, name, opType, backward, skipRenaming=skipRenaming)
+        self.lifetime = "MODEL_OUTPUT"
+    def Feed(self, value):
+        numElements = reduce(lambda x,y: x*y, self.dimensions, 1)
+        self.value = [0 for x in range(numElements)]
+        return self
+
+# An explicitly declared parameter
+class Parameter(Operand):
+    def __init__(self, name, opType, value, backward=None, skipRenaming=False, extraParams=None):
+        Operand.__init__(self, name, opType, value, backward, skipRenaming=skipRenaming,
+                         extraParams=extraParams)
+        self.initializer = NamedVariable(str(self) + "_init")
+        self.lifetime = "CONSTANT_REFERENCE" if Configuration.useSHM() else "CONSTANT_COPY"
+
+# A shortcut for parameters of INT32
+class Int32Scalar(Parameter, ImplicitParameter):
+    def __init__(self, name, value):
+        Parameter.__init__(self, name, ("INT32", []), int(value))
+    @staticmethod
+    def IsCompatible(value):
+        return type(value) is int
+
+# A shortcut for parameters of FLOAT16
+class Float16Scalar(Parameter, ImplicitParameter):
+    def __init__(self, name, value):
+        Parameter.__init__(self, name, ("FLOAT16", []), float(value))
+    @staticmethod
+    def IsCompatible(value):
+        return False
+
+# A shortcut for parameters of FLOAT32
+class Float32Scalar(Parameter, ImplicitParameter):
+    def __init__(self, name, value):
+        Parameter.__init__(self, name, ("FLOAT32", []), float(value))
+    @staticmethod
+    def IsCompatible(value):
+        return type(value) is float
+
+# A shortcut for parameters of BOOL
+class BoolScalar(Parameter, ImplicitParameter):
+    def __init__(self, name, value):
+        Parameter.__init__(self, name, ("BOOL", []), bool(value))
+    @staticmethod
+    def IsCompatible(value):
+        return type(value) is bool
+
+# A shortcut for parameter of 1-D TENSOR_INT32
+class Int32Vector(Parameter, ImplicitParameter):
+    def __init__(self, name, value):
+        Parameter.__init__(self, name, ("TENSOR_INT32", [len(value)]), [int(v) for v in value])
+    @staticmethod
+    def IsCompatible(value):
+        if type(value) is not list and type(value) is not tuple:
+            return False
+        return all(type(i) is int for i in value)
+
+# A shortcut for parameter of 1-D TENSOR_FLOAT32
+class Float32Vector(Parameter, ImplicitParameter):
+    def __init__(self, name, value):
+        Parameter.__init__(self, name, ("TENSOR_FLOAT32", [len(value)]), [float(v) for v in value])
+    @staticmethod
+    def IsCompatible(value):
+        if type(value) is not list and type(value) is not tuple:
+            return False
+        return all(type(i) is float for i in value)
+
+# An explicitly declared intermediate result
+class Internal(Operand):
+    def __init__(self, name, opType, backward=None, skipRenaming=False):
+        Operand.__init__(self, name, opType, backward, None, skipRenaming=skipRenaming)
+        self.lifetime = "TEMPORARY_VARIABLE"
+
+# An operation in a model, does not need a name
+class Operation:
+
+    def __init__(self, optype, ins, outs):
+        self.optype = optype
+        self.SetInputs(ins)
+        self.SetOutputs(outs)
+
+    # for the ease of debugging
+    def __str__(self):
+        insString = GetJointStr(self.ins)
+        outsString = GetJointStr(self.outs)
+        return "Operation %s: [%s] -> [%s]"%(self.optype, insString, outsString)
+    __repr__ = __str__
+
+    def SetInputs(self, ins):
+        self.ins = [ImplicitParameter.ImplicitConvertion(i) for i in ins]
+        return self
+
+    def SetOutputs(self, outs):
+        self.outs = list(outs)
+        return self
+
+# Main interface
+class Model:
+    models = list()
+
+    def __init__(self, name=None):
+        self.name = name
+        self.operations = []
+        self.operands = []
+        self.isRelaxed = False
+        self.compiled = False
+        self.dumped = False
+        self.hasDynamicOutputShape = False
+        self.version = FileNames.version
+        Model.models.append(self)
+
+    def WithSuffix(self, *args):
+        self.createFunctionName = GlobalVariable("CreateModel", self.name, *args)
+        self.createTestFunctionName = GlobalVariable("createTestModel", self.name, *args)
+        self.isIgnoredFunctionName = GlobalVariable("is_ignored", self.name, *args)
+        return self
+
+    def AddOperation(self, operation):
+        self.operations.append(operation)
+        for i in operation.ins:
+            if i not in self.operands:
+                self.operands.append(i)
+        for o in operation.outs:
+            if o not in self.operands:
+                self.operands.append(o)
+        return self
+
+    def Operation(self, op_name, *args):
+        return self.AddOperation(Operation(op_name, args, []))
+
+    def To(self, *args):
+        assert len(self.operations) > 0
+        if type(args[0]) is tuple or type(args[0]) is list:
+            outs = args[0]
+        else:
+            outs = args
+        self.operations[-1].SetOutputs(outs)
+        for o in outs:
+            if o not in self.operands:
+                self.operands.append(o)
+        return self
+
+    def RelaxedExecution(self, isRelaxed):
+        self.isRelaxed = isRelaxed
+        return self
+
+    def TestDynamicOutputShape(self, hasDynamicOutputShape):
+        self.hasDynamicOutputShape = hasDynamicOutputShape
+        return self
+
+    # Sets the version of the model in compliance tests. Set to None to disable the test.
+    def IntroducedIn(self, ver):
+        self.version = ver
+        return self
+
+    def GetTypes(self):
+        return sorted(list(set(op.type for op in self.operands)))
+
+    def GetInputs(self):
+        return [i for i in self.operands if isinstance(i, Input)]
+
+    def GetOutputs(self):
+        return [o for o in self.operands if isinstance(o, Output)]
+
+    def GetInputsIndex(self):
+        return [i for i,op in enumerate(self.operands) if isinstance(op, Input)]
+
+    def GetOutputsIndex(self):
+        return [o for o,op in enumerate(self.operands) if isinstance(op, Output)]
+
+    def GetIndexOfOperands(self, operands):
+        return [self.operands.index(i) for i in operands]
+
+    def GetIgnoredOutputs(self):
+        return [o for o in self.operands if isinstance(o, IgnoredOutput)]
+
+    def GetParameters(self):
+        return [p for p in self.operands if isinstance(p, Parameter)]
+
+    def GetEquivalentOperands(self, targets):
+        return [self.operands[self.operands.index(t)] for t in targets]
+
+    def UpdateEquivalentOperands(self, targets):
+        for t in targets:
+            self.operands[self.operands.index(t)] = t
+        return self
+
+    def SetOperandIndex(self):
+        for ind, i in enumerate(self.GetInputs()):
+            i.index = ind
+        for ind, o in enumerate(self.GetOutputs()):
+            o.index = ind
+        for ind, op in enumerate(self.operands):
+            op.model_index = ind
+        return self
+
+    def SetOperandInsAndOuts(self):
+        for op in self.operands:
+            op.ins = list()
+            op.outs = list()
+        for op in self.operations:
+            op.ins = self.GetEquivalentOperands(op.ins)
+            op.outs = self.GetEquivalentOperands(op.outs)
+            for i in op.ins:
+                i.outs.append(op)
+            for o in op.outs:
+                o.ins.append(op)
+        return self
+
+    def TopologicalSortHelper(self, op, deps, visited):
+        if op in visited:
+            assert op not in deps, "Cycle detected in the graph"
+        else:
+            visited.add(op)
+            for i in deps[op]:
+                self.TopologicalSortHelper(i, deps, visited)
+            self.operations.append(op)
+            deps.pop(op)
+
+    # Topological sort of the operations, and detect if there is a cycle is the graph
+    def TopologicalSort(self):
+        deps = {op: list() for op in self.operations}
+        [deps[o].append(i) for op in self.operands for o in op.outs for i in op.ins]
+        operations = self.operations.copy()
+        self.operations = []
+        visited = set()
+        for op in operations:
+            self.TopologicalSortHelper(op, deps, visited)
+
+    def SetOutputUnspecified(self):
+        for op in self.operands:
+            op.dimensions = op.type.dimensions
+        if self.hasDynamicOutputShape:
+            for op in self.GetOutputs():
+                op.ToUnspecifiedDim()
+        return self
+
+    def Compile(self):
+        if self.compiled:
+            return self
+        self.SetOperandIndex()
+        self.SetOperandInsAndOuts()
+        self.TopologicalSort()
+        self.SetOutputUnspecified()
+        # Do not check compliance for relaxed mode and dynamic output shape tests.
+        if self.isRelaxed or self.hasDynamicOutputShape:
+            self.IntroducedIn(None)
+        self.compiled = True
+        return self
+
+# To track implicitly convertible variation types
+class ImplicitVariation:
+    @staticmethod
+    def ImplicitConvertion(value):
+        if isinstance(value, ModelVariation):
+            return value
+        for implicitType in ImplicitVariation.__subclasses__():
+            value = value if type(value) is tuple or type(value) is list else [value]
+            if implicitType.IsCompatible(value[0]):
+                var = implicitType(value[0])
+                if len(value) > 1:
+                    var.Identify(*value[1:])
+                return var
+        assert False, "%s not supported for implicit variation"%value[0]
+
+# The base class for model variations
+class ModelVariation:
+
+    def __init__(self, name=None):
+        self.targetOperands = {}
+        self.name = name
+
+    def ApplyToHelper(self, model, args, feedDicts, transform):
+        opVarList = []
+        for op in model.GetEquivalentOperands(sorted(args.keys())):
+            opVar = op
+            feedDictsVar = []
+            if isinstance(op, Input) or isinstance(op, Output):
+                for feedDict in feedDicts:
+                    op_tmp = copy.deepcopy(op)
+                    if op_tmp in feedDict[0]:
+                        opVar = transform(op_tmp.Feed(feedDict[0]), args[op_tmp])
+                    elif op_tmp in feedDict[1]:
+                        opVar = transform(op_tmp.Feed(feedDict[1]), args[op_tmp])
+                    else:
+                        assert False
+                    feedDictsVar.append(opVar.value)
+                assert type(op) == type(opVar), "Can not handle %s -> %s"%(type(op), type(opVar))
+            else:
+                opVar = transform(op, args[op])
+                # handle Parameter -> Input
+                if isinstance(opVar, Input) or isinstance(opVar, Output):
+                    feedDictsVar = [opVar.value] * len(feedDicts)
+            if isinstance(opVar, Input) or isinstance(opVar, Output):
+                for feedDict, feedDictVar in zip(feedDicts, feedDictsVar):
+                    if opVar in feedDict[1]:
+                        feedDict[1][opVar] = feedDictVar
+                    else:
+                        feedDict[0][opVar] = feedDictVar
+            opVarList.append(opVar)
+        return opVarList
+
+    # Make a deepcopy of the model and feedDicts, and apply the change
+    def ApplyTo(self, modelOrigin, feedDictsOrigin):
+        model, feedDicts = copy.deepcopy((modelOrigin, feedDictsOrigin))
+        model.compiled = False
+        model.dumped = False
+
+        if not self.targetOperands:
+            self.AutoIdentify(model)
+
+        # get transformed operands and update feedDicts
+        operandsVar = self.ApplyToHelper(
+            model, self.targetOperands, feedDicts, self.TransformOperand)
+
+        model = self.TransformModel(model)
+        model.UpdateEquivalentOperands(operandsVar)
+        return model, feedDicts
+
+    def IdentifyOperands(self, args=None):
+        if args is None:
+            return self
+        self.targetOperands = args if type(args) is dict else {i: None for i in args}
+        return self
+
+    def Identify(self, operandArgs=None, paramArgs=None):
+        self.IdentifyOperands(operandArgs)
+        return self
+
+    # Set variation to its default name
+    def SetToDefaultName(self):
+        self.name = ""
+        return self
+
+    # Automatically select the target operand list
+    def AutoIdentify(self, model):
+        return self
+
+    # Transform operands that are marked by IdentifyOperands()
+    def TransformOperand(self, op, arg=None):
+        return op
+
+    # Transform the model
+    def TransformModel(self, model):
+        return model
+
+# Default variation that does nothing
+class DefaultVariation(ModelVariation):
+
+    def __init__(self, name=None):
+        ModelVariation.__init__(self, name=name)
+
+# Convert operand data type
+class DataTypeConverter(ModelVariation, ImplicitVariation):
+
+    def __init__(self, targetType=None, name=None):
+        ModelVariation.__init__(self, name=name)
+        if targetType is not None:
+            assert DataTypeConverter.IsCompatible(targetType)
+        self.targetType = targetType
+
+    @staticmethod
+    def IsCompatible(value):
+        return value.lower() in ["float16", "int32"]
+
+    def SetToDefaultName(self):
+        if self.targetType is not None:
+            self.name = self.targetType.lower()
+            return self
+        # get all target types
+        targetTypes = list(zip(*self.targetOperands.values()))[0]
+        if "TENSOR_QUANT8_SYMM_PER_CHANNEL" in targetTypes:
+            self.name = "channelQuant8"
+        elif "TENSOR_QUANT8_ASYMM" in targetTypes:
+            self.name = "quant8"
+        elif "TENSOR_INT32" in targetTypes:
+            self.name = "int32"
+        elif "TENSOR_FLOAT16" in targetTypes:
+            self.name = "float16"
+        else:
+            self.name = "float32"
+        return self
+
+    def AutoIdentify(self, model):
+        if self.targetType is not None:
+            # By default, select all the float32 tensors/scalars
+            targets = {op: ["TENSOR_" + self.targetType.upper()] \
+                    for op in model.operands if op.type.type == "TENSOR_FLOAT32"}
+            targets.update({op: [self.targetType.upper()] \
+                    for op in model.operands if op.type.type == "FLOAT32"})
+            self.Identify(targets)
+        return self
+
+    def TransformOperand(self, op, arg=None):
+        if len(arg) == 1:
+            typeTuple = (arg[0], op.type.dimensions)
+        else:
+            typeTuple = (arg[0], op.type.dimensions, *arg[1:])
+        # To handle Internal operands
+        if op.value is None or op.type.GetNumberOfElements() == 0:
+            op.type = Type.GetType(*typeTuple)
+        else:
+            v = Dequantize(op.GetValueAsNumpy().astype(np.float32), op.type)
+            op.type = Type.GetType(*typeTuple)
+            v = Quantize(v, op.type)
+            op.SetValueFromNumpy(v)
+        return op
+
+# Convert model to turn on/off relaxed computation
+class RelaxedModeConverter(ModelVariation, ImplicitVariation):
+
+    def __init__(self, isRelaxed=True, name=None):
+        ModelVariation.__init__(self, name=name)
+        if isinstance(isRelaxed, bool):
+            self.isRelaxed = isRelaxed
+        else:
+            assert RelaxedModeConverter.IsCompatible(isRelaxed.lower())
+            self.isRelaxed = True
+
+    @staticmethod
+    def IsCompatible(value):
+        return value.lower() in ["relaxed"]
+
+    def SetToDefaultName(self):
+        self.name = "relaxed" if self.isRelaxed else "float"
+        return self
+
+    def TransformModel(self, model):
+        model.RelaxedExecution(self.isRelaxed)
+        return model
+
+# Convert data layout between "NHWC" amd "NCHW"
+class DataLayoutConverter(ModelVariation, ImplicitVariation):
+
+    def __init__(self, targetLayout="nchw", name=None):
+        ModelVariation.__init__(self, name=name)
+        self.targetLayout = targetLayout.lower()
+        assert DataLayoutConverter.IsCompatible(self.targetLayout)
+        self.perm = (0, 3, 1, 2) if self.targetLayout == "nchw" else (0, 2, 3, 1)
+        self.param = True if self.targetLayout == "nchw" else False
+
+    @staticmethod
+    def IsCompatible(value):
+        return value.lower() in ["nhwc", "nchw"]
+
+    def SetToDefaultName(self):
+        self.name = self.targetLayout
+        return self
+
+    def TransformOperand(self, op, arg=None):
+        if len(op.type.dimensions) == 4:
+            # To handle Internal operands
+            if op.value is not None and op.type.GetNumberOfElements() != 0:
+                op.SetValueFromNumpy(op.GetValueAsNumpy().transpose(self.perm))
+            newDim = [op.type.dimensions[i] for i in self.perm]
+            op.type = Type.GetType(op.type.type, newDim, op.type.scale, op.type.zeroPoint)
+        elif len(op.type.dimensions) == 1 and len(op.value) == 4:
+            op.SetValueFromNumpy(op.GetValueAsNumpy()[list(self.perm)])
+        elif op.type.type == "BOOL":
+            op.SetValue(self.param)
+        else:
+            assert False, "%s not supported by DataLayoutConverter"%op
+        return op
+
+# Convert data by tansposing and removing axis
+class AxisConverter(ModelVariation):
+
+    def __init__(self, origin, target, dim, drop=[], name=None):
+        ModelVariation.__init__(self, name=name)
+        self.origin = origin
+        self.target = target
+        assert all(i >= -dim and i < dim for i in [self.origin, self.target])
+        self.dim = dim
+        self.perm = list(range(dim))
+        self.perm.insert(target if target >= 0 else target + dim, self.perm.pop(origin))
+        self.drop = [drop] if type(drop) is int else list(drop)
+        assert all(i >= -dim and i < dim for i in self.drop)
+        self.drop = [i if i >= 0 else i + dim for i in self.drop]
+        assert target not in self.drop and target + dim not in self.drop
+
+    def SetToDefaultName(self):
+        axis = self.target if self.target >= 0 else self.target + self.dim
+        axis -= sum(i < axis for i in self.drop)
+        neg = "" if self.target >= 0 else "_neg"
+        self.name = "dim%d_axis%d%s"%(self.dim - len(self.drop), axis, neg)
+        return self
+
+    def TransposeAxis(self, op):
+        if op.type.type == "INT32":
+            op.SetValue(self.target)
+        elif len(op.type.dimensions) == self.dim:
+            # To handle Internal operands
+            if op.value is not None:
+                op.SetValueFromNumpy(op.GetValueAsNumpy().transpose(self.perm))
+            newDim = [op.type.dimensions[i] for i in self.perm]
+            op.type = Type.GetType(op.type.type, newDim, op.type.scale, op.type.zeroPoint)
+        else:
+            assert False, "%s not supported by AxisConverter"%op
+        return op
+
+    def RemoveAxis(self, op):
+        if op.type.type == "INT32":
+            if op.value[0] >= 0:
+                op.SetValue(op.value[0] - sum(i < op.value[0] for i in self.drop))
+            else:
+                op.SetValue(op.value[0] + sum(i > (op.value[0] + self.dim) for i in self.drop))
+        elif len(op.type.dimensions) == self.dim:
+            if op.value is not None:
+                val = op.GetValueAsNumpy()
+                for i in sorted(self.drop, reverse=True):
+                    val = np.take(val, 0, axis=i)
+                op.SetValueFromNumpy(val)
+            newDim = [op.type.dimensions[i] for i in range(self.dim) if i not in self.drop]
+            op.type = Type.GetType(op.type.type, newDim, op.type.scale, op.type.zeroPoint)
+        else:
+            assert False, "%s not supported by AxisConverter"%op
+        return op
+
+    def TransformOperand(self, op, arg=None):
+        op = self.TransposeAxis(op)
+        op = self.RemoveAxis(op)
+        return op
+
+# Convert a Parameter to Input
+class ParameterAsInputConverter(ModelVariation, ImplicitVariation):
+
+    def __init__(self, arg="as_input", prefix="weight", name=None):
+        ModelVariation.__init__(self, name=name)
+        assert ParameterAsInputConverter.IsCompatible(arg.lower())
+        self.prefix = prefix
+
+    @staticmethod
+    def IsCompatible(value):
+        return value.lower() in ["as_input"]
+
+    def SetToDefaultName(self):
+        self.name = self.prefix + "_as_input"
+        return self
+
+    def TransformOperand(self, op, arg=None):
+        assert isinstance(op, Parameter), "%s cannot be converted to Input."%type(op)
+        newop = Input(op.name, op.type.GetSignatureTuple(), skipRenaming=True, extraParams=op.type.extraParams)
+        newop.SetValue(op.value)
+        return newop
+
+# Convert Output based on activation
+class ActivationConverter(ModelVariation, ImplicitVariation):
+    # (Enum, low, high)
+    actMap = {
+        "none": (0, None, None),
+        "relu": (1, 0.0, None),
+        "relu1": (2, -1.0, 1.0),
+        "relu6": (3, 0.0, 6.0),
+    }
+    def __init__(self, act="relu", name=None):
+        ModelVariation.__init__(self, name=name)
+        self.act = act.lower()
+        assert ActivationConverter.IsCompatible(self.act)
+        self.enum = ActivationConverter.actMap[self.act][0]
+        self.low = ActivationConverter.actMap[self.act][1]
+        self.high = ActivationConverter.actMap[self.act][2]
+
+    @staticmethod
+    def IsCompatible(value):
+        return value.lower() in ActivationConverter.actMap.keys()
+
+    def SetToDefaultName(self):
+        self.name = self.act
+        return self
+
+    def TransformOperand(self, op, arg=None):
+        if op.type.type == "INT32": # activation enum
+            return op.SetValue(self.enum)
+        else:
+            assert isinstance(op, Output)
+            v = op.GetValueAsNumpy()
+            if self.low is not None:
+                low = Quantize(self.low, op.type)
+                v = np.maximum(v, low)
+            if self.high is not None:
+                high = Quantize(self.high, op.type)
+                v = np.minimum(v, high)
+            return op.SetValueFromNumpy(v)
+
+class DynamicOutputShapeConverter(ModelVariation):
+    def __init__(self, name=None):
+        ModelVariation.__init__(self, name=name)
+
+    def SetToDefaultName(self):
+        self.name = "dynamic_output_shape"
+        return self
+
+    def TransformModel(self, model):
+        model.TestDynamicOutputShape(True)
+        return model
+
+# An example is always attached to a model, and could have multiple variations
+class Example:
+    examples = []
+    versionOverrides = {}
+
+    def __init__(self, *args, model=None, name=None):
+        self.model = Model.models[-1] if model is None else model
+        self.name = name
+        self.expectedMultinomialDistributionTolerance = None
+        self.expectFailure = False
+        self.feedDicts = []
+        for feedDict in args:
+            if type(feedDict) is tuple or type(feedDict) is list:
+                self.feedDicts.append(feedDict)
+            elif type(feedDict) is dict:
+                self.feedDicts.append((
+                    {i: feedDict[i] for i in self.model.GetInputs()},
+                    {o: feedDict[o] for o in self.model.GetOutputs()}
+                ))
+            else:
+                assert False
+        if Configuration.test_dynamic_output_shape:
+            self.variations = [[DefaultVariation(), DynamicOutputShapeConverter()]]
+        else:
+            self.variations = []
+        Example.examples.append(self)
+
+    @staticmethod
+    def SetVersion(ver, *args):
+        for name in args:
+            Example.versionOverrides[name] = ver
+
+    # Main entrance of test generator
+    @staticmethod
+    def DumpAllExamples(DumpModel=None, model_fd=None,
+                        DumpExample=None, example_fd=None,
+                        DumpTest=None, test_fd=None):
+        Example.CombineAllExamples()
+        for example in Example.examples:
+            example.Dump(DumpModel, model_fd, DumpExample, example_fd, DumpTest, test_fd)
+
+    # Combine examples with the same model, same name, and same set of variations
+    @staticmethod
+    def CombineAllExamples():
+        modelMap = {}
+        newExamples = []
+        for example in Example.examples:
+            key = (example.model, example.name, tuple(tuple(e) for e in example.variations))
+            if key in modelMap:
+                modelMap[key].Combine(example)
+            else:
+                modelMap[key] = example
+                newExamples.append(example)
+        Example.examples = newExamples
+
+    def AddVariations(self, *args, includeDefault=True, defaultName=None):
+        self.variations.append([DefaultVariation(defaultName)] if includeDefault else [])
+        self.variations[-1].extend(ImplicitVariation.ImplicitConvertion(i) for i in args)
+        return self
+
+    def AddNchw(self, *args, includeDefault=True, defaultName="nhwc"):
+        var = DataLayoutConverter("nchw").Identify(args)
+        self.AddVariations(var, includeDefault=includeDefault, defaultName=defaultName)
+        return self
+
+    def AddRelaxed(self, isRelaxed=True, includeDefault=True, defaultName=None):
+        var = RelaxedModeConverter(isRelaxed)
+        self.AddVariations(var, includeDefault=includeDefault, defaultName=defaultName)
+        return self
+
+    def AddInput(self, *args, includeDefault=True, defaultName=None):
+        var = ParameterAsInputConverter().Identify(args)
+        self.AddVariations(var, includeDefault=includeDefault, defaultName=defaultName)
+        return self
+
+    def AddRelu(self, *args, includeDefault=True, defaultName=None):
+        var = ActivationConverter("relu").Identify(args)
+        self.AddVariations(var, includeDefault=includeDefault, defaultName=defaultName)
+        return self
+
+    def AddAllActivations(self, *args):
+        var = [ActivationConverter(i).Identify(args)
+            for i in sorted(ActivationConverter.actMap.keys())]
+        self.AddVariations(*var, includeDefault=False)
+        return self
+
+    def GuessOriginalAxisAndDim(self, *args):
+        origin = None
+        dim = None
+        for arg in args:
+            if arg.type.type == "INT32":
+                origin = arg.value[0]
+            else:
+                if dim is None:
+                    dim = len(arg.type.dimensions)
+                else:
+                    assert dim == len(arg.type.dimensions)
+        assert dim is not None
+        origin = dim - 1 if origin is None else origin
+        origin = origin + dim if origin < 0 else origin
+        return origin, dim
+
+    def AddAxis(self, axis, *args, includeDefault=True, defaultName=None):
+        origin, dim = self.GuessOriginalAxisAndDim(*args)
+        axis = [axis] if type(axis) is int else list(axis)
+        var = [AxisConverter(origin, a, dim).Identify(args) for a in axis]
+        self.AddVariations(*var, includeDefault=includeDefault, defaultName=defaultName)
+        return self
+
+    def AddAllPositiveAxis(self, *args):
+        origin, dim = self.GuessOriginalAxisAndDim(*args)
+        var = [AxisConverter(origin, a, dim).Identify(args) for a in range(dim)]
+        self.AddVariations(*var, includeDefault=False)
+        return self
+
+    def AddAllAxis(self, *args):
+        origin, dim = self.GuessOriginalAxisAndDim(*args)
+        var = [AxisConverter(origin, a, dim).Identify(args) for a in range(-dim, dim)]
+        self.AddVariations(*var, includeDefault=False)
+        return self
+
+    def AddDims(self, dims, *args, includeDefault=True, defaultName=None):
+        origin, dim = self.GuessOriginalAxisAndDim(*args)
+        dims = [dims] if type(dims) is int else list(dims)
+        drop = list(range(dim))
+        drop.pop(origin)
+        var = [AxisConverter(origin, origin, dim, drop[0:(dim-i)]).Identify(args) for i in dims]
+        self.AddVariations(*var, includeDefault=includeDefault, defaultName=defaultName)
+        return self
+
+    def AddAllDims(self, *args):
+        origin, dim = self.GuessOriginalAxisAndDim(*args)
+        drop = list(range(dim))
+        drop.pop(origin)
+        var = [AxisConverter(origin, origin, dim, drop[0:i]).Identify(args) for i in range(dim)]
+        self.AddVariations(*var, includeDefault=False)
+        return self
+
+    def AddAllDimsAndPositiveAxis(self, *args):
+        origin, dim = self.GuessOriginalAxisAndDim(*args)
+        var = [AxisConverter(origin, j, dim, range(i)).Identify(args) \
+                for i in range(dim) for j in range(i, dim)]
+        self.AddVariations(*var, includeDefault=False)
+        return self
+
+    def AddAllDimsAndAxis(self, *args):
+        origin, dim = self.GuessOriginalAxisAndDim(*args)
+        var = [AxisConverter(origin, k, dim, range(i)).Identify(args) \
+                for i in range(dim) for j in range(i, dim) for k in [j, j - dim]]
+        self.AddVariations(*var, includeDefault=False)
+        return self
+
+    def Combine(self, other):
+        assert self.model is other.model, "Only examples targetting the same model can be combined"
+        assert tuple(self.variations) == tuple(other.variations), \
+            "Only examples with the same set of variations can be combined"
+        assert self.name == other.name, "Only examples with the same name can be combined"
+        self.feedDicts.extend(other.feedDicts)
+        return self
+
+    def Dump(self, DumpModel, model_fd, DumpExample, example_fd, DumpTest, test_fd):
+        [v.SetToDefaultName() for vs in self.variations for v in vs if v.name is None]
+        for variationList in itertools.product(*self.variations):
+            # Apply variations
+            modelOrigin, feedDictsOrigin = self.model, self.feedDicts
+            self.model, self.feedDicts = copy.deepcopy((self.model, self.feedDicts))
+            for variation in variationList:
+                self.model, self.feedDicts = variation.ApplyTo(self.model, self.feedDicts)
+            # Concat names for test and examples
+            varNames = [v.name for v in variationList]
+            self.testName = NamedTest(FileNames.specName, self.model.name, self.name, *varNames)
+            self.examplesName = GlobalVariable("examples", self.model.name, self.name, *varNames)
+            if str(self.testName) in Example.versionOverrides:
+                self.model.IntroducedIn(Example.versionOverrides[str(self.testName)])
+            self.model.WithSuffix(*varNames).Compile()
+            # Dump files
+            if DumpModel is not None and model_fd is not None:
+                DumpModel(self.model, model_fd)
+            if DumpExample is not None and example_fd is not None:
+                DumpExample(self, example_fd)
+            if DumpTest is not None and test_fd is not None:
+                DumpTest(self, test_fd)
+            # Restore model and feedDicts before variation
+            self.model = modelOrigin
+            self.feedDicts = feedDictsOrigin
+        return self
+
+    # Specifies the RANDOM_MULTINOMIAL distribution tolerance.
+    # If set to greater than zero, the input is compared as log-probabilities
+    # to the output and must be within this tolerance to pass.
+    def WithMultinomialDistributionTolerance(self, expectedTolerance):
+      assert self.expectFailure is False
+      self.expectedMultinomialDistributionTolerance = expectedTolerance
+      return self
+
+    # Specifies that this example is expected to fail during compilation or execution.
+    def ExpectFailure(self):
+      assert self.expectedMultinomialDistributionTolerance is None
+      self.expectFailure = True
+      return self
+
+class FileNames:
+    specFiles = []
+    specNames = []
+    modelFiles = []
+    exampleFiles = []
+    testFiles = []
+    specFile = ""
+    specName = ""
+    modelFile = ""
+    exampleFile = ""
+    testFile = ""
+    version = ""
+    fileIndex = 0
+
+    @staticmethod
+    def InitializeFileLists(spec, model, example, test):
+        # get all spec files and target files
+        if os.path.isfile(spec):
+            FileNames.specFiles = [os.path.abspath(spec)]
+        elif os.path.isdir(spec):
+            FileNames.specFiles = sorted([os.path.abspath(os.path.join(spec, f))
+                for f in os.listdir(spec) if f.endswith(".mod.py")])
+        else:
+            assert False, "%s is neither a file or a directory"%spec
+        FileNames.specNames = [re.sub(r"\..*", "", os.path.basename(f))
+            for f in FileNames.specFiles]
+        FileNames.modelFiles = FileNames.ParseTargetFiles(model, ".model.cpp")
+        FileNames.exampleFiles = FileNames.ParseTargetFiles(example, ".example.cpp")
+        FileNames.testFiles = FileNames.ParseTargetFiles(test, ".mod.py.cpp")
+
+    @staticmethod
+    def ParseTargetFiles(arg, ext):
+        numFiles = len(FileNames.specFiles)
+        absPath = os.path.abspath(arg)
+        if os.path.isdir(arg):
+            target = [os.path.join(absPath, f + ext) for f in FileNames.specNames]
+        elif arg == "-":
+            target = ["-"] * numFiles
+        else:
+            target = [absPath] * numFiles
+        return target
+
+    @staticmethod
+    def NextFile():
+        if FileNames.fileIndex >= len(FileNames.specFiles):
+            return False
+        FileNames.specFile = FileNames.specFiles[FileNames.fileIndex]
+        FileNames.specName = FileNames.specNames[FileNames.fileIndex]
+        FileNames.modelFile = FileNames.modelFiles[FileNames.fileIndex]
+        FileNames.exampleFile = FileNames.exampleFiles[FileNames.fileIndex]
+        FileNames.testFile = FileNames.testFiles[FileNames.fileIndex]
+        FileNames.fileIndex += 1
+        NamedObject.existingNames = set()
+        NamedVariable.existingNames = set()
+        NamedTest.existingNames = set()
+        Type.typesMap = dict()
+        Model.models = list()
+        Example.examples = list()
+        Configuration.use_shm_for_weights = False
+
+        # Extract version from absolute file path.
+        versionMatch = re.findall(r"/V\d_\d/", FileNames.specFile)
+        if len(versionMatch) == 1:
+            FileNames.version = versionMatch[0].strip('/')
+        else:
+            FileNames.version = None
+        return True
+
+class Configuration:
+    use_shm_for_weights = False
+    force_regenerate = False
+    test_dynamic_output_shape = True
+
+    @staticmethod
+    def useSHM():
+        return Configuration.use_shm_for_weights
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_float/lstm_float.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_float/lstm_float.mod.py
new file mode 100644
index 000000000..60eec8280
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_float/lstm_float.mod.py
@@ -0,0 +1,145 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+model = Model()
+
+n_batch = 1
+n_input = 2
+# n_cell and n_output have the same size when there is no projection.
+n_cell = 4
+n_output = 4
+
+input = Input("input", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_input))
+
+input_to_input_weights = Input("input_to_input_weights", "TENSOR_FLOAT32", "{%d, %d}" % (n_cell, n_input))
+input_to_forget_weights = Input("input_to_forget_weights", "TENSOR_FLOAT32", "{%d, %d}" % (n_cell, n_input))
+input_to_cell_weights = Input("input_to_cell_weights", "TENSOR_FLOAT32", "{%d, %d}" % (n_cell, n_input))
+input_to_output_weights = Input("input_to_output_weights", "TENSOR_FLOAT32", "{%d, %d}" % (n_cell, n_input))
+
+recurrent_to_input_weights = Input("recurrent_to_intput_weights", "TENSOR_FLOAT32", "{%d, %d}" % (n_cell, n_output))
+recurrent_to_forget_weights = Input("recurrent_to_forget_weights", "TENSOR_FLOAT32", "{%d, %d}" % (n_cell, n_output))
+recurrent_to_cell_weights = Input("recurrent_to_cell_weights", "TENSOR_FLOAT32", "{%d, %d}" % (n_cell, n_output))
+recurrent_to_output_weights = Input("recurrent_to_output_weights", "TENSOR_FLOAT32", "{%d, %d}" % (n_cell, n_output))
+
+cell_to_input_weights = Input("cell_to_input_weights", "TENSOR_FLOAT32", "{0}")
+cell_to_forget_weights = Input("cell_to_forget_weights", "TENSOR_FLOAT32", "{0}")
+cell_to_output_weights = Input("cell_to_output_weights", "TENSOR_FLOAT32", "{0}")
+
+input_gate_bias = Input("input_gate_bias", "TENSOR_FLOAT32", "{%d}"%(n_cell))
+forget_gate_bias = Input("forget_gate_bias", "TENSOR_FLOAT32", "{%d}"%(n_cell))
+cell_gate_bias = Input("cell_gate_bias", "TENSOR_FLOAT32", "{%d}"%(n_cell))
+output_gate_bias = Input("output_gate_bias", "TENSOR_FLOAT32", "{%d}"%(n_cell))
+
+projection_weights = Input("projection_weights", "TENSOR_FLOAT32", "{0,0}")
+projection_bias = Input("projection_bias", "TENSOR_FLOAT32", "{0}")
+
+output_state_in = Input("output_state_in", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_output))
+cell_state_in = Input("cell_state_in", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_cell))
+
+activation_param = Int32Scalar("activation_param", 4)  # Tanh
+cell_clip_param = Float32Scalar("cell_clip_param", 0.)
+proj_clip_param = Float32Scalar("proj_clip_param", 0.)
+
+scratch_buffer = IgnoredOutput("scratch_buffer", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, (n_cell * 4)))
+output_state_out = Output("output_state_out", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_output))
+cell_state_out = Output("cell_state_out", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_cell))
+output = Output("output", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_output))
+
+model = model.Operation("LSTM",
+                        input,
+
+                        input_to_input_weights,
+                        input_to_forget_weights,
+                        input_to_cell_weights,
+                        input_to_output_weights,
+
+                        recurrent_to_input_weights,
+                        recurrent_to_forget_weights,
+                        recurrent_to_cell_weights,
+                        recurrent_to_output_weights,
+
+                        cell_to_input_weights,
+                        cell_to_forget_weights,
+                        cell_to_output_weights,
+
+                        input_gate_bias,
+                        forget_gate_bias,
+                        cell_gate_bias,
+                        output_gate_bias,
+
+                        projection_weights,
+                        projection_bias,
+
+                        output_state_in,
+                        cell_state_in,
+
+                        activation_param,
+                        cell_clip_param,
+                        proj_clip_param
+).To([scratch_buffer, output_state_out, cell_state_out, output])
+model = model.RelaxedExecution(True)
+
+# Example 1. Input in operand 0,
+input0 = {input_to_input_weights:  [-0.45018822, -0.02338299, -0.0870589, -0.34550029, 0.04266912, -0.15680569, -0.34856534, 0.43890524],
+          input_to_forget_weights: [0.09701663, 0.20334584, -0.50592935, -0.31343272, -0.40032279, 0.44781327, 0.01387155, -0.35593212],
+          input_to_cell_weights:   [-0.50013041, 0.1370284, 0.11810488, 0.2013163, -0.20583314, 0.44344562, 0.22077113, -0.29909778],
+          input_to_output_weights: [-0.25065863, -0.28290087, 0.04613829, 0.40525138, 0.44272184, 0.03897077, -0.1556896, 0.19487578],
+
+          input_gate_bias:  [0.,0.,0.,0.],
+          forget_gate_bias: [1.,1.,1.,1.],
+          cell_gate_bias:   [0.,0.,0.,0.],
+          output_gate_bias: [0.,0.,0.,0.],
+
+          recurrent_to_input_weights: [
+              -0.0063535, -0.2042388, 0.31454784, -0.35746509, 0.28902304, 0.08183324,
+            -0.16555229, 0.02286911, -0.13566875, 0.03034258, 0.48091322,
+            -0.12528998, 0.24077177, -0.51332325, -0.33502164, 0.10629296],
+
+          recurrent_to_cell_weights: [
+              -0.3407414, 0.24443203, -0.2078532, 0.26320225, 0.05695659, -0.00123841,
+            -0.4744786, -0.35869038, -0.06418842, -0.13502428, -0.501764, 0.22830659,
+            -0.46367589, 0.26016325, -0.03894562, -0.16368064],
+
+          recurrent_to_forget_weights: [
+              -0.48684245, -0.06655136, 0.42224967, 0.2112639, 0.27654213, 0.20864892,
+            -0.07646349, 0.45877004, 0.00141793, -0.14609534, 0.36447752, 0.09196436,
+            0.28053468, 0.01560611, -0.20127171, -0.01140004],
+
+          recurrent_to_output_weights: [
+              0.43385774, -0.17194885, 0.2718237, 0.09215671, 0.24107647, -0.39835793,
+              0.18212086, 0.01301402, 0.48572797, -0.50656658, 0.20047462, -0.20607421,
+              -0.51818722, -0.15390486, 0.0468148, 0.39922136],
+
+          cell_to_input_weights: [],
+          cell_to_forget_weights: [],
+          cell_to_output_weights: [],
+
+          projection_weights: [],
+          projection_bias: [],
+}
+
+test_input = [2., 3.]
+output_state = [0, 0, 0, 0]
+cell_state = [0, 0, 0, 0]
+golden_output = [-0.02973187, 0.1229473, 0.20885126, -0.15358765,]
+output0 = {
+  scratch_buffer: [ 0 for x in range(n_batch * n_cell * 4) ],
+  cell_state_out: [ -0.145439, 0.157475, 0.293663, -0.277353 ],
+  output_state_out: [ -0.0297319, 0.122947, 0.208851, -0.153588 ],
+  output: golden_output
+}
+input0[input] = test_input
+input0[output_state_in] = output_state
+input0[cell_state_in] = cell_state
+Example((input0, output0))
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_float/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_float/stderr.txt.expect
new file mode 100644
index 000000000..7ac2240b2
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_float/stderr.txt.expect
@@ -0,0 +1,3 @@
+Output CTS model: -
+Output example:-
+Output CTS test: -
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_float/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_float/stdout.txt.expect
new file mode 100644
index 000000000..5fdca97d1
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_float/stdout.txt.expect
@@ -0,0 +1,107 @@
+// clang-format off
+// Generated file (from: lstm_float.mod.py). Do not edit
+// clang-format off
+// Generated file (from: lstm_float.mod.py). Do not edit
+// clang-format off
+// Generated file (from: lstm_float.mod.py). Do not edit
+#include "../../TestGenerated.h"
+
+namespace lstm_float {
+// Generated lstm_float test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace lstm_float
+
+void CreateModel(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {4, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {4, 4});
+  OperandType type3(Type::TENSOR_FLOAT32, {0});
+  OperandType type4(Type::TENSOR_FLOAT32, {4});
+  OperandType type5(Type::TENSOR_FLOAT32, {0, 0});
+  OperandType type6(Type::TENSOR_FLOAT32, {1, 4});
+  OperandType type7(Type::INT32, {});
+  OperandType type8(Type::FLOAT32, {});
+  OperandType type9(Type::TENSOR_FLOAT32, {1, 16});
+  // Phase 1, operands
+  auto input = model->addOperand(&type0);
+  auto input_to_input_weights = model->addOperand(&type1);
+  auto input_to_forget_weights = model->addOperand(&type1);
+  auto input_to_cell_weights = model->addOperand(&type1);
+  auto input_to_output_weights = model->addOperand(&type1);
+  auto recurrent_to_intput_weights = model->addOperand(&type2);
+  auto recurrent_to_forget_weights = model->addOperand(&type2);
+  auto recurrent_to_cell_weights = model->addOperand(&type2);
+  auto recurrent_to_output_weights = model->addOperand(&type2);
+  auto cell_to_input_weights = model->addOperand(&type3);
+  auto cell_to_forget_weights = model->addOperand(&type3);
+  auto cell_to_output_weights = model->addOperand(&type3);
+  auto input_gate_bias = model->addOperand(&type4);
+  auto forget_gate_bias = model->addOperand(&type4);
+  auto cell_gate_bias = model->addOperand(&type4);
+  auto output_gate_bias = model->addOperand(&type4);
+  auto projection_weights = model->addOperand(&type5);
+  auto projection_bias = model->addOperand(&type3);
+  auto output_state_in = model->addOperand(&type6);
+  auto cell_state_in = model->addOperand(&type6);
+  auto activation_param = model->addOperand(&type7);
+  auto cell_clip_param = model->addOperand(&type8);
+  auto proj_clip_param = model->addOperand(&type8);
+  auto scratch_buffer = model->addOperand(&type9);
+  auto output_state_out = model->addOperand(&type6);
+  auto cell_state_out = model->addOperand(&type6);
+  auto output = model->addOperand(&type6);
+  // Phase 2, operations
+  static int32_t activation_param_init[] = {4};
+  model->setOperandValue(activation_param, activation_param_init, sizeof(int32_t) * 1);
+  static float cell_clip_param_init[] = {0.0f};
+  model->setOperandValue(cell_clip_param, cell_clip_param_init, sizeof(float) * 1);
+  static float proj_clip_param_init[] = {0.0f};
+  model->setOperandValue(proj_clip_param, proj_clip_param_init, sizeof(float) * 1);
+  model->addOperation(ANEURALNETWORKS_LSTM, {input, input_to_input_weights, input_to_forget_weights, input_to_cell_weights, input_to_output_weights, recurrent_to_intput_weights, recurrent_to_forget_weights, recurrent_to_cell_weights, recurrent_to_output_weights, cell_to_input_weights, cell_to_forget_weights, cell_to_output_weights, input_gate_bias, forget_gate_bias, cell_gate_bias, output_gate_bias, projection_weights, projection_bias, output_state_in, cell_state_in, activation_param, cell_clip_param, proj_clip_param}, {scratch_buffer, output_state_out, cell_state_out, output});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {input, input_to_input_weights, input_to_forget_weights, input_to_cell_weights, input_to_output_weights, recurrent_to_intput_weights, recurrent_to_forget_weights, recurrent_to_cell_weights, recurrent_to_output_weights, cell_to_input_weights, cell_to_forget_weights, cell_to_output_weights, input_gate_bias, forget_gate_bias, cell_gate_bias, output_gate_bias, projection_weights, projection_bias, output_state_in, cell_state_in},
+    {scratch_buffer, output_state_out, cell_state_out, output});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored(int i) {
+  static std::set<int> ignore = {0};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {2.0f, 3.0f}}, {1, {-0.45018822f, -0.02338299f, -0.0870589f, -0.34550029f, 0.04266912f, -0.15680569f, -0.34856534f, 0.43890524f}}, {2, {0.09701663f, 0.20334584f, -0.50592935f, -0.31343272f, -0.40032279f, 0.44781327f, 0.01387155f, -0.35593212f}}, {3, {-0.50013041f, 0.1370284f, 0.11810488f, 0.2013163f, -0.20583314f, 0.44344562f, 0.22077113f, -0.29909778f}}, {4, {-0.25065863f, -0.28290087f, 0.04613829f, 0.40525138f, 0.44272184f, 0.03897077f, -0.1556896f, 0.19487578f}}, {5, {-0.0063535f, -0.2042388f, 0.31454784f, -0.35746509f, 0.28902304f, 0.08183324f, -0.16555229f, 0.02286911f, -0.13566875f, 0.03034258f, 0.48091322f, -0.12528998f, 0.24077177f, -0.51332325f, -0.33502164f, 0.10629296f}}, {6, {-0.48684245f, -0.06655136f, 0.42224967f, 0.2112639f, 0.27654213f, 0.20864892f, -0.07646349f, 0.45877004f, 0.00141793f, -0.14609534f, 0.36447752f, 0.09196436f, 0.28053468f, 0.01560611f, -0.20127171f, -0.01140004f}}, {7, {-0.3407414f, 0.24443203f, -0.2078532f, 0.26320225f, 0.05695659f, -0.00123841f, -0.4744786f, -0.35869038f, -0.06418842f, -0.13502428f, -0.501764f, 0.22830659f, -0.46367589f, 0.26016325f, -0.03894562f, -0.16368064f}}, {8, {0.43385774f, -0.17194885f, 0.2718237f, 0.09215671f, 0.24107647f, -0.39835793f, 0.18212086f, 0.01301402f, 0.48572797f, -0.50656658f, 0.20047462f, -0.20607421f, -0.51818722f, -0.15390486f, 0.0468148f, 0.39922136f}}, {9, {}}, {10, {}}, {11, {}}, {12, {0.0f, 0.0f, 0.0f, 0.0f}}, {13, {1.0f, 1.0f, 1.0f, 1.0f}}, {14, {0.0f, 0.0f, 0.0f, 0.0f}}, {15, {0.0f, 0.0f, 0.0f, 0.0f}}, {16, {}}, {17, {}}, {18, {0.0f, 0.0f, 0.0f, 0.0f}}, {19, {0.0f, 0.0f, 0.0f, 0.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f}}, {1, {-0.0297319f, 0.122947f, 0.208851f, -0.153588f}}, {2, {-0.145439f, 0.157475f, 0.293663f, -0.277353f}}, {3, {-0.02973187f, 0.1229473f, 0.20885126f, -0.15358765f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, lstm_float) {
+    execute(lstm_float::CreateModel,
+            lstm_float::is_ignored,
+            lstm_float::examples);
+}
+
+#include "../generated/tests/lstm_float.mod.py.cpp"
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_quant8/depthwise_conv2d_quant8.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_quant8/depthwise_conv2d_quant8.mod.py
new file mode 100644
index 000000000..051780877
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_quant8/depthwise_conv2d_quant8.mod.py
@@ -0,0 +1,43 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+model = Model()
+i1 = Input("op1", "TENSOR_QUANT8_ASYMM", "{1, 2, 2, 2}, 0.5f, 0")
+f1 = Input("op2", "TENSOR_QUANT8_ASYMM", "{1, 2, 2, 2}, 0.5f, 0")
+b1 = Input("op3", "TENSOR_INT32", "{2}, 0.25f, 0")
+pad0 = Int32Scalar("pad0", 0)
+act = Int32Scalar("act", 0)
+stride = Int32Scalar("stride", 1)
+cm = Int32Scalar("channelMultiplier", 1)
+output = Output("op4", "TENSOR_QUANT8_ASYMM", "{1,1,1,2}, 1.f, 0")
+
+model = model.Operation("DEPTHWISE_CONV_2D",
+                        i1, f1, b1,
+                        pad0, pad0, pad0, pad0,
+                        stride, stride,
+                        cm, act).To(output)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [4, 16, 4, 32, 4, 64, 4, 128],
+          f1:
+          [2, 4,  2, 0,  2, 2,  2, 0],
+          b1:
+          [0, 0]}
+# (i1 (depthconv) f1)
+output0 = {output: # output 0
+           [8, 48]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_quant8/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_quant8/stderr.txt.expect
new file mode 100644
index 000000000..7ac2240b2
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_quant8/stderr.txt.expect
@@ -0,0 +1,3 @@
+Output CTS model: -
+Output example:-
+Output CTS test: -
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_quant8/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_quant8/stdout.txt.expect
new file mode 100644
index 000000000..9c54412de
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_backward_compatibility_quant8/stdout.txt.expect
@@ -0,0 +1,82 @@
+// clang-format off
+// Generated file (from: depthwise_conv2d_quant8.mod.py). Do not edit
+// clang-format off
+// Generated file (from: depthwise_conv2d_quant8.mod.py). Do not edit
+// clang-format off
+// Generated file (from: depthwise_conv2d_quant8.mod.py). Do not edit
+#include "../../TestGenerated.h"
+
+namespace depthwise_conv2d_quant8 {
+// Generated depthwise_conv2d_quant8 test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace depthwise_conv2d_quant8
+
+void CreateModel(Model *model) {
+  OperandType type0(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 0);
+  OperandType type1(Type::TENSOR_INT32, {2}, 0.25f, 0);
+  OperandType type2(Type::INT32, {});
+  OperandType type3(Type::TENSOR_QUANT8_ASYMM, {1, 1, 1, 2}, 1.0f, 0);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type0);
+  auto op3 = model->addOperand(&type1);
+  auto pad0 = model->addOperand(&type2);
+  auto stride = model->addOperand(&type2);
+  auto channelMultiplier = model->addOperand(&type2);
+  auto act = model->addOperand(&type2);
+  auto op4 = model->addOperand(&type3);
+  // Phase 2, operations
+  static int32_t pad0_init[] = {0};
+  model->setOperandValue(pad0, pad0_init, sizeof(int32_t) * 1);
+  static int32_t stride_init[] = {1};
+  model->setOperandValue(stride, stride_init, sizeof(int32_t) * 1);
+  static int32_t channelMultiplier_init[] = {1};
+  model->setOperandValue(channelMultiplier, channelMultiplier_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {0};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_DEPTHWISE_CONV_2D, {op1, op2, op3, pad0, pad0, pad0, pad0, stride, stride, channelMultiplier, act}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2, op3},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {{2, {0, 0}}},
+  // int -> QUANT8_ASYMM map
+  {{0, {4, 16, 4, 32, 4, 64, 4, 128}}, {1, {2, 4, 2, 0, 2, 2, 2, 0}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {8, 48}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, depthwise_conv2d_quant8) {
+    execute(depthwise_conv2d_quant8::CreateModel,
+            depthwise_conv2d_quant8::is_ignored,
+            depthwise_conv2d_quant8::examples);
+}
+
+#include "../generated/tests/depthwise_conv2d_quant8.mod.py.cpp"
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_float/conv_float.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_float/conv_float.mod.py
new file mode 100644
index 000000000..f6b3e89ca
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_float/conv_float.mod.py
@@ -0,0 +1,35 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{1, 3, 3, 1}")
+f1 = Parameter("op2", "TENSOR_FLOAT32", "{1, 2, 2, 1}", [.25, .25, .25, .25])
+b1 = Parameter("op3", "TENSOR_FLOAT32", "{1}", [0])
+pad0 = Int32Scalar("pad0", 0)
+act = Int32Scalar("act", 0)
+stride = Int32Scalar("stride", 1)
+output = Output("op4", "TENSOR_FLOAT32", "{1, 2, 2, 1}")
+
+model = model.Operation("CONV_2D", i1, f1, b1, pad0, pad0, pad0, pad0, stride, stride, act).To(output)
+model = model.RelaxedExecution(True)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [1.0, 1.0, 1.0, 1.0, 0.5, 1.0, 1.0, 1.0, 1.0]}
+
+output0 = {output: # output 0
+           [.875, .875, .875, .875]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_float/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_float/stderr.txt.expect
new file mode 100644
index 000000000..7ac2240b2
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_float/stderr.txt.expect
@@ -0,0 +1,3 @@
+Output CTS model: -
+Output example:-
+Output CTS test: -
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_float/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_float/stdout.txt.expect
new file mode 100644
index 000000000..cb6c58a3c
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_float/stdout.txt.expect
@@ -0,0 +1,85 @@
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+#include "../../TestGenerated.h"
+
+namespace conv_float {
+// Generated conv_float test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace conv_float
+
+void CreateModel(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 3, 3, 1});
+  OperandType type1(Type::TENSOR_FLOAT32, {1, 2, 2, 1});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto pad0 = model->addOperand(&type3);
+  auto stride = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type1);
+  // Phase 2, operations
+  static float op2_init[] = {0.25f, 0.25f, 0.25f, 0.25f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 4);
+  static float op3_init[] = {0.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t pad0_init[] = {0};
+  model->setOperandValue(pad0, pad0_init, sizeof(int32_t) * 1);
+  static int32_t stride_init[] = {1};
+  model->setOperandValue(stride, stride_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {0};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, pad0, pad0, pad0, pad0, stride, stride, act}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 0.5f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {0.875f, 0.875f, 0.875f, 0.875f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float) {
+    execute(conv_float::CreateModel,
+            conv_float::is_ignored,
+            conv_float::examples);
+}
+
+#include "../generated/tests/conv_float.mod.py.cpp"
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_parameter/mean_implicit.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_parameter/mean_implicit.mod.py
new file mode 100644
index 000000000..be7b22bdb
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_parameter/mean_implicit.mod.py
@@ -0,0 +1,41 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+i0 = Input("i0", ("TENSOR_FLOAT32", [2, 2]))  # input 0
+
+o1 = Output("o1", ("TENSOR_FLOAT32", [1, 2])) # output for model1
+o2 = Output("o2", ("TENSOR_FLOAT32", [2, 1])) # output for model2
+o3 = Output("o3", ("TENSOR_FLOAT32", [1]))    # output for model3
+
+model1 = Model().Operation("MEAN", i0, [0], 1).To(o1)       # along axis 0, keep_dim=True
+model2 = Model().Operation("MEAN", i0, [1], 1).To(o2)       # along axis 1, keep_dim=True
+model3 = Model().Operation("MEAN", i0, [0, 1], 0).To(o3)    # along both axis, keep_dim=False
+
+inputs1 = {i0: [1, 2, 3, 4]}
+outputs11 = {o1: [4, 6]}
+outputs12 = {o2: [3, 7]}
+outputs13 = {o3: [10]}
+
+inputs2 = {i0: [-1, -2, -3, -4]}
+outputs21 = {o1: [-4, -6]}
+outputs22 = {o2: [-3, -7]}
+outputs23 = {o3: [-10]}
+
+Example((inputs1, outputs11), model=model1)
+Example((inputs1, outputs12), model=model2)
+Example((inputs1, outputs13), model=model3)
+
+Example((inputs2, outputs21), model=model1)
+Example((inputs2, outputs22), model=model2)
+Example((inputs2, outputs23), model=model3)
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_parameter/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_parameter/stderr.txt.expect
new file mode 100644
index 000000000..7ac2240b2
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_parameter/stderr.txt.expect
@@ -0,0 +1,3 @@
+Output CTS model: -
+Output example:-
+Output CTS test: -
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_parameter/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_parameter/stdout.txt.expect
new file mode 100644
index 000000000..feebbcc81
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_parameter/stdout.txt.expect
@@ -0,0 +1,262 @@
+// clang-format off
+// Generated file (from: mean_implicit.mod.py). Do not edit
+// clang-format off
+// Generated file (from: mean_implicit.mod.py). Do not edit
+// clang-format off
+// Generated file (from: mean_implicit.mod.py). Do not edit
+#include "../../TestGenerated.h"
+
+namespace mean_implicit {
+// Generated mean_implicit test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace mean_implicit
+
+void CreateModel(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {1, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {2, 1});
+  OperandType type3(Type::TENSOR_FLOAT32, {1});
+  OperandType type4(Type::TENSOR_INT32, {1});
+  OperandType type5(Type::INT32, {});
+  OperandType type6(Type::TENSOR_INT32, {2});
+  // Phase 1, operands
+  auto i0 = model->addOperand(&type0);
+  auto param = model->addOperand(&type4);
+  auto param1 = model->addOperand(&type5);
+  auto o1 = model->addOperand(&type1);
+  // Phase 2, operations
+  static int32_t param_init[] = {0};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_MEAN, {i0, param, param1}, {o1});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {i0},
+    {o1});
+  assert(model->isValid());
+}
+
+bool is_ignored(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {4.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {-1.0f, -2.0f, -3.0f, -4.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {-4.0f, -6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, mean_implicit) {
+    execute(mean_implicit::CreateModel,
+            mean_implicit::is_ignored,
+            mean_implicit::examples);
+}
+
+void CreateModel_2(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {1, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {2, 1});
+  OperandType type3(Type::TENSOR_FLOAT32, {1});
+  OperandType type4(Type::TENSOR_INT32, {1});
+  OperandType type5(Type::INT32, {});
+  OperandType type6(Type::TENSOR_INT32, {2});
+  // Phase 1, operands
+  auto i0 = model->addOperand(&type0);
+  auto param2 = model->addOperand(&type4);
+  auto param3 = model->addOperand(&type5);
+  auto o2 = model->addOperand(&type2);
+  // Phase 2, operations
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t param3_init[] = {1};
+  model->setOperandValue(param3, param3_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_MEAN, {i0, param2, param3}, {o2});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {i0},
+    {o2});
+  assert(model->isValid());
+}
+
+bool is_ignored_2(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_2 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {3.0f, 7.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {-1.0f, -2.0f, -3.0f, -4.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {-3.0f, -7.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, mean_implicit_2) {
+    execute(mean_implicit::CreateModel_2,
+            mean_implicit::is_ignored_2,
+            mean_implicit::examples_2);
+}
+
+void CreateModel_3(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {1, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {2, 1});
+  OperandType type3(Type::TENSOR_FLOAT32, {1});
+  OperandType type4(Type::TENSOR_INT32, {1});
+  OperandType type5(Type::INT32, {});
+  OperandType type6(Type::TENSOR_INT32, {2});
+  // Phase 1, operands
+  auto i0 = model->addOperand(&type0);
+  auto param4 = model->addOperand(&type6);
+  auto param5 = model->addOperand(&type5);
+  auto o3 = model->addOperand(&type3);
+  // Phase 2, operations
+  static int32_t param4_init[] = {0, 1};
+  model->setOperandValue(param4, param4_init, sizeof(int32_t) * 2);
+  static int32_t param5_init[] = {0};
+  model->setOperandValue(param5, param5_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_MEAN, {i0, param4, param5}, {o3});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {i0},
+    {o3});
+  assert(model->isValid());
+}
+
+bool is_ignored_3(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_3 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {10.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {-1.0f, -2.0f, -3.0f, -4.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {-10.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, mean_implicit_3) {
+    execute(mean_implicit::CreateModel_3,
+            mean_implicit::is_ignored_3,
+            mean_implicit::examples_3);
+}
+
+#include "../generated/tests/mean_implicit.mod.py.cpp"
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_variation/conv_float.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_variation/conv_float.mod.py
new file mode 100644
index 000000000..826f390c0
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_variation/conv_float.mod.py
@@ -0,0 +1,52 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{1, 2, 2, 2}")
+f1 = Parameter("op2", "TENSOR_FLOAT32", "{2, 2, 2, 2}", [1, 2, 3, 4, 5, 6, 7, 8, 8, 7, 6, 5, 4, 3, 2, 1])
+b1 = Parameter("op3", "TENSOR_FLOAT32", "{1}", [-200])
+output = Output("op4", "TENSOR_FLOAT32", "{1, 2, 2, 2}")
+act = Int32Scalar("act", 0) # None activation
+layout = Int32Scalar("layout", 0) # NHWC
+
+model = model.Operation("CONV_2D", i1, f1, b1, 1, 1, 1, act, layout).To(output)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [1, 2, 3, 4, 5, 6, 7, 8]}
+
+output0 = {output: # output 0
+           [204, 120, 94, 104, 70, 164, 23, 112]}
+
+quant8 = DataTypeConverter().Identify({
+    i1: ("TENSOR_QUANT8_ASYMM", 0.5, 128),
+    f1: ("TENSOR_QUANT8_ASYMM", 0.25, 128),
+    b1: ("TENSOR_INT32", 0.125, 0),
+    output: ("TENSOR_QUANT8_ASYMM", 2, 100)
+})
+
+# Instantiate an example
+Example(
+    (input0, output0)
+).AddVariations(
+    ("NCHW", [i1, f1, output], [layout])
+).AddVariations(
+    ("relu", [output], [act]),
+    ("relu6", [output], [act]),
+    includeDefault=False
+).AddVariations(
+    ("as_input", [f1])
+).AddVariations(
+    "relaxed", quant8
+)
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_variation/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_variation/stderr.txt.expect
new file mode 100644
index 000000000..7ac2240b2
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_variation/stderr.txt.expect
@@ -0,0 +1,3 @@
+Output CTS model: -
+Output example:-
+Output CTS test: -
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_variation/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_variation/stdout.txt.expect
new file mode 100644
index 000000000..7d3cba69a
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_implicit_variation/stdout.txt.expect
@@ -0,0 +1,1848 @@
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+#include "../../TestGenerated.h"
+
+namespace conv_float {
+// Generated conv_float test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace conv_float
+
+void CreateModel_relu(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu) {
+    execute(conv_float::CreateModel_relu,
+            conv_float::is_ignored_relu,
+            conv_float::examples_relu);
+}
+
+void CreateModel_relu_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_relu_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu_relaxed) {
+    execute(conv_float::CreateModel_relu_relaxed,
+            conv_float::is_ignored_relu_relaxed,
+            conv_float::examples_relu_relaxed);
+}
+
+void CreateModel_relu_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static uint8_t op2_init[] = {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132};
+  model->setOperandValue(op2, op2_init, sizeof(uint8_t) * 16);
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 160, 147, 152, 135, 182, 112, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu_quant8) {
+    execute(conv_float::CreateModel_relu_quant8,
+            conv_float::is_ignored_relu_quant8,
+            conv_float::examples_relu_quant8);
+}
+
+void CreateModel_relu_weight_as_input(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu_weight_as_input) {
+    execute(conv_float::CreateModel_relu_weight_as_input,
+            conv_float::is_ignored_relu_weight_as_input,
+            conv_float::examples_relu_weight_as_input);
+}
+
+void CreateModel_relu_weight_as_input_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_relu_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu_weight_as_input_relaxed) {
+    execute(conv_float::CreateModel_relu_weight_as_input_relaxed,
+            conv_float::is_ignored_relu_weight_as_input_relaxed,
+            conv_float::examples_relu_weight_as_input_relaxed);
+}
+
+void CreateModel_relu_weight_as_input_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}, {1, {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 160, 147, 152, 135, 182, 112, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu_weight_as_input_quant8) {
+    execute(conv_float::CreateModel_relu_weight_as_input_quant8,
+            conv_float::is_ignored_relu_weight_as_input_quant8,
+            conv_float::examples_relu_weight_as_input_quant8);
+}
+
+void CreateModel_relu6(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu6(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu6) {
+    execute(conv_float::CreateModel_relu6,
+            conv_float::is_ignored_relu6,
+            conv_float::examples_relu6);
+}
+
+void CreateModel_relu6_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_relu6_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu6_relaxed) {
+    execute(conv_float::CreateModel_relu6_relaxed,
+            conv_float::is_ignored_relu6_relaxed,
+            conv_float::examples_relu6_relaxed);
+}
+
+void CreateModel_relu6_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static uint8_t op2_init[] = {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132};
+  model->setOperandValue(op2, op2_init, sizeof(uint8_t) * 16);
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu6_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu6_quant8) {
+    execute(conv_float::CreateModel_relu6_quant8,
+            conv_float::is_ignored_relu6_quant8,
+            conv_float::examples_relu6_quant8);
+}
+
+void CreateModel_relu6_weight_as_input(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu6_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu6_weight_as_input) {
+    execute(conv_float::CreateModel_relu6_weight_as_input,
+            conv_float::is_ignored_relu6_weight_as_input,
+            conv_float::examples_relu6_weight_as_input);
+}
+
+void CreateModel_relu6_weight_as_input_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_relu6_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu6_weight_as_input_relaxed) {
+    execute(conv_float::CreateModel_relu6_weight_as_input_relaxed,
+            conv_float::is_ignored_relu6_weight_as_input_relaxed,
+            conv_float::examples_relu6_weight_as_input_relaxed);
+}
+
+void CreateModel_relu6_weight_as_input_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu6_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}, {1, {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu6_weight_as_input_quant8) {
+    execute(conv_float::CreateModel_relu6_weight_as_input_quant8,
+            conv_float::is_ignored_relu6_weight_as_input_quant8,
+            conv_float::examples_relu6_weight_as_input_quant8);
+}
+
+void CreateModel_nchw_relu(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu) {
+    execute(conv_float::CreateModel_nchw_relu,
+            conv_float::is_ignored_nchw_relu,
+            conv_float::examples_nchw_relu);
+}
+
+void CreateModel_nchw_relu_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu_relaxed) {
+    execute(conv_float::CreateModel_nchw_relu_relaxed,
+            conv_float::is_ignored_nchw_relu_relaxed,
+            conv_float::examples_nchw_relu_relaxed);
+}
+
+void CreateModel_nchw_relu_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static uint8_t op2_init[] = {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132};
+  model->setOperandValue(op2, op2_init, sizeof(uint8_t) * 16);
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 147, 135, 112, 160, 152, 182, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu_quant8) {
+    execute(conv_float::CreateModel_nchw_relu_quant8,
+            conv_float::is_ignored_nchw_relu_quant8,
+            conv_float::examples_nchw_relu_quant8);
+}
+
+void CreateModel_nchw_relu_weight_as_input(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu_weight_as_input) {
+    execute(conv_float::CreateModel_nchw_relu_weight_as_input,
+            conv_float::is_ignored_nchw_relu_weight_as_input,
+            conv_float::examples_nchw_relu_weight_as_input);
+}
+
+void CreateModel_nchw_relu_weight_as_input_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu_weight_as_input_relaxed) {
+    execute(conv_float::CreateModel_nchw_relu_weight_as_input_relaxed,
+            conv_float::is_ignored_nchw_relu_weight_as_input_relaxed,
+            conv_float::examples_nchw_relu_weight_as_input_relaxed);
+}
+
+void CreateModel_nchw_relu_weight_as_input_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}, {1, {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 147, 135, 112, 160, 152, 182, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu_weight_as_input_quant8) {
+    execute(conv_float::CreateModel_nchw_relu_weight_as_input_quant8,
+            conv_float::is_ignored_nchw_relu_weight_as_input_quant8,
+            conv_float::examples_nchw_relu_weight_as_input_quant8);
+}
+
+void CreateModel_nchw_relu6(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu6(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu6) {
+    execute(conv_float::CreateModel_nchw_relu6,
+            conv_float::is_ignored_nchw_relu6,
+            conv_float::examples_nchw_relu6);
+}
+
+void CreateModel_nchw_relu6_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu6_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu6_relaxed) {
+    execute(conv_float::CreateModel_nchw_relu6_relaxed,
+            conv_float::is_ignored_nchw_relu6_relaxed,
+            conv_float::examples_nchw_relu6_relaxed);
+}
+
+void CreateModel_nchw_relu6_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static uint8_t op2_init[] = {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132};
+  model->setOperandValue(op2, op2_init, sizeof(uint8_t) * 16);
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu6_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu6_quant8) {
+    execute(conv_float::CreateModel_nchw_relu6_quant8,
+            conv_float::is_ignored_nchw_relu6_quant8,
+            conv_float::examples_nchw_relu6_quant8);
+}
+
+void CreateModel_nchw_relu6_weight_as_input(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu6_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu6_weight_as_input) {
+    execute(conv_float::CreateModel_nchw_relu6_weight_as_input,
+            conv_float::is_ignored_nchw_relu6_weight_as_input,
+            conv_float::examples_nchw_relu6_weight_as_input);
+}
+
+void CreateModel_nchw_relu6_weight_as_input_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu6_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu6_weight_as_input_relaxed) {
+    execute(conv_float::CreateModel_nchw_relu6_weight_as_input_relaxed,
+            conv_float::is_ignored_nchw_relu6_weight_as_input_relaxed,
+            conv_float::examples_nchw_relu6_weight_as_input_relaxed);
+}
+
+void CreateModel_nchw_relu6_weight_as_input_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu6_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}, {1, {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu6_weight_as_input_quant8) {
+    execute(conv_float::CreateModel_nchw_relu6_weight_as_input_quant8,
+            conv_float::is_ignored_nchw_relu6_weight_as_input_quant8,
+            conv_float::examples_nchw_relu6_weight_as_input_quant8);
+}
+
+#include "../generated/tests/conv_float.mod.py.cpp"
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_internal/add_internal.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_internal/add_internal.mod.py
new file mode 100644
index 000000000..28c4afc52
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_internal/add_internal.mod.py
@@ -0,0 +1,71 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+model = Model()
+
+i0 = Input("i0", ("TENSOR_FLOAT32", [2]))  # input 0
+i1 = Input("i1", ("TENSOR_FLOAT32", [2]))  # input 0
+i2 = Input("i2", ("TENSOR_FLOAT32", [2]))  # input 0
+i3 = Input("i3", ("TENSOR_FLOAT32", [2]))  # input 0
+i4 = Input("i4", ("TENSOR_FLOAT32", [2]))  # input 0
+i5 = Input("i5", ("TENSOR_FLOAT32", [2]))  # input 0
+i6 = Input("i6", ("TENSOR_FLOAT32", [2]))  # input 0
+i7 = Input("i7", ("TENSOR_FLOAT32", [2]))  # input 0
+i8 = Input("i8", ("TENSOR_FLOAT32", [2]))  # input 0
+
+t0 = Internal("t0", ("TENSOR_FLOAT32", [2]))
+t1 = Internal("t1", ("TENSOR_FLOAT32", [2]))
+t2 = Internal("t2", ("TENSOR_FLOAT32", [2]))
+t3 = Internal("t3", ("TENSOR_FLOAT32", [2]))
+t4 = Internal("t4", ("TENSOR_FLOAT32", [2]))
+t5 = Internal("t5", ("TENSOR_FLOAT32", [2]))
+t6 = Internal("t6", ("TENSOR_FLOAT32", [2]))
+
+o0 = Output("o0", ("TENSOR_FLOAT32", [2]))
+o1 = Output("o1", ("TENSOR_FLOAT32", [2]))
+o2 = Output("o2", ("TENSOR_FLOAT32", [2]))
+
+p0 = Parameter("p0", ("TENSOR_FLOAT32", [2]), [0.0, 1.0])
+act = Int32Scalar("act", 0)
+
+model.Operation("ADD", o0, o1, act).To(o2)
+model.Operation("ADD", p0, t5, act).To(t6)
+model.Operation("ADD", i2, t0, act).To(t1)
+model.Operation("ADD", i6, p0, act).To(t5)
+model.Operation("ADD", i0, i1, act).To(t0)
+model.Operation("ADD", t1, t3, act).To(t4)
+model.Operation("ADD", t2, i5, act).To(t3)
+model.Operation("ADD", t4, t6, act).To(o0)
+model.Operation("ADD", i3, i4, act).To(t2)
+model.Operation("ADD", i7, i8, act).To(o1)
+
+inputs = {
+    i0: [0, 0],
+    i1: [0, 0],
+    i2: [0, 0],
+    i3: [0, 0],
+    i4: [0, 0],
+    i5: [0, 0],
+    i6: [0, 0],
+    i7: [0, 0],
+    i8: [0, 0]
+}
+
+outputs = {
+    o0: [0, 2],
+    o1: [0, 0],
+    o2: [0, 2]
+}
+
+Example((inputs, outputs))
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_internal/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_internal/stderr.txt.expect
new file mode 100644
index 000000000..7ac2240b2
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_internal/stderr.txt.expect
@@ -0,0 +1,3 @@
+Output CTS model: -
+Output example:-
+Output CTS test: -
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_internal/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_internal/stdout.txt.expect
new file mode 100644
index 000000000..2e271c712
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_internal/stdout.txt.expect
@@ -0,0 +1,98 @@
+// clang-format off
+// Generated file (from: add_internal.mod.py). Do not edit
+// clang-format off
+// Generated file (from: add_internal.mod.py). Do not edit
+// clang-format off
+// Generated file (from: add_internal.mod.py). Do not edit
+#include "../../TestGenerated.h"
+
+namespace add_internal {
+// Generated add_internal test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace add_internal
+
+void CreateModel(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {2});
+  OperandType type1(Type::INT32, {});
+  // Phase 1, operands
+  auto o0 = model->addOperand(&type0);
+  auto o1 = model->addOperand(&type0);
+  auto act = model->addOperand(&type1);
+  auto o2 = model->addOperand(&type0);
+  auto p0 = model->addOperand(&type0);
+  auto t5 = model->addOperand(&type0);
+  auto t6 = model->addOperand(&type0);
+  auto i2 = model->addOperand(&type0);
+  auto t0 = model->addOperand(&type0);
+  auto t1 = model->addOperand(&type0);
+  auto i6 = model->addOperand(&type0);
+  auto i0 = model->addOperand(&type0);
+  auto i1 = model->addOperand(&type0);
+  auto t3 = model->addOperand(&type0);
+  auto t4 = model->addOperand(&type0);
+  auto t2 = model->addOperand(&type0);
+  auto i5 = model->addOperand(&type0);
+  auto i3 = model->addOperand(&type0);
+  auto i4 = model->addOperand(&type0);
+  auto i7 = model->addOperand(&type0);
+  auto i8 = model->addOperand(&type0);
+  // Phase 2, operations
+  static int32_t act_init[] = {0};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static float p0_init[] = {0.0f, 1.0f};
+  model->setOperandValue(p0, p0_init, sizeof(float) * 2);
+  model->addOperation(ANEURALNETWORKS_ADD, {i6, p0, act}, {t5});
+  model->addOperation(ANEURALNETWORKS_ADD, {p0, t5, act}, {t6});
+  model->addOperation(ANEURALNETWORKS_ADD, {i0, i1, act}, {t0});
+  model->addOperation(ANEURALNETWORKS_ADD, {i2, t0, act}, {t1});
+  model->addOperation(ANEURALNETWORKS_ADD, {i3, i4, act}, {t2});
+  model->addOperation(ANEURALNETWORKS_ADD, {t2, i5, act}, {t3});
+  model->addOperation(ANEURALNETWORKS_ADD, {t1, t3, act}, {t4});
+  model->addOperation(ANEURALNETWORKS_ADD, {t4, t6, act}, {o0});
+  model->addOperation(ANEURALNETWORKS_ADD, {i7, i8, act}, {o1});
+  model->addOperation(ANEURALNETWORKS_ADD, {o0, o1, act}, {o2});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {i2, i6, i0, i1, i5, i3, i4, i7, i8},
+    {o0, o1, o2});
+  assert(model->isValid());
+}
+
+bool is_ignored(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {0.0f, 0.0f}}, {1, {0.0f, 0.0f}}, {2, {0.0f, 0.0f}}, {3, {0.0f, 0.0f}}, {4, {0.0f, 0.0f}}, {5, {0.0f, 0.0f}}, {6, {0.0f, 0.0f}}, {7, {0.0f, 0.0f}}, {8, {0.0f, 0.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {0.0f, 2.0f}}, {1, {0.0f, 0.0f}}, {2, {0.0f, 2.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, add_internal) {
+    execute(add_internal::CreateModel,
+            add_internal::is_ignored,
+            add_internal::examples);
+}
+
+#include "../generated/tests/add_internal.mod.py.cpp"
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_naming/conv_float.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_naming/conv_float.mod.py
new file mode 100644
index 000000000..61f7c92ee
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_naming/conv_float.mod.py
@@ -0,0 +1,61 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+model = Model("model_name")
+i1 = Input("op1", "TENSOR_FLOAT32", "{1, 2, 2, 2}")
+f1 = Parameter("op2", "TENSOR_FLOAT32", "{2, 2, 2, 2}", [1, 2, 3, 4, 5, 6, 7, 8, 8, 7, 6, 5, 4, 3, 2, 1])
+b1 = Parameter("op3", "TENSOR_FLOAT32", "{1}", [-200])
+output = Output("op4", "TENSOR_FLOAT32", "{1, 2, 2, 2}")
+act = Int32Scalar("act", 0) # None activation
+layout = Int32Scalar("layout", 0) # NHWC
+pad = Int32Scalar("param", 1)
+stride0 = Int32Scalar("param1", 1)
+stride1 = Int32Scalar("param2", 1)
+
+model = model.Operation("CONV_2D", i1, f1, b1, pad, stride0, stride1, act, layout).To(output)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [1, 2, 3, 4, 5, 6, 7, 8]}
+
+output0 = {output: # output 0
+           [204, 120, 94, 104, 70, 164, 23, 112]}
+
+quant8 = DataTypeConverter(name="quantized").Identify({
+    i1: ("TENSOR_QUANT8_ASYMM", 0.5, 128),
+    f1: ("TENSOR_QUANT8_ASYMM", 0.25, 128),
+    b1: ("TENSOR_INT32", 0.125, 0),
+    output: ("TENSOR_QUANT8_ASYMM", 2, 100)
+})
+nchw = DataLayoutConverter("NCHW", name="nchw_layout").Identify([i1, f1, output], [layout])
+relu = ActivationConverter("relu", name="act").Identify([output], [act])
+relu6 = ActivationConverter("relu6").Identify([output], [act])
+weight_as_input = ParameterAsInputConverter(name="w_as_input").Identify([f1])
+relax = RelaxedModeConverter(True, name="float_relaxed")
+
+# Instantiate an example
+# Will produce cartesian product of
+# [nhwc, nchw_layout] * [act, relu6] * [w_as_param, w_as_input] * [float, float_relaxed, quantized]
+# 24 variations
+Example(
+    (input0, output0), name="example_name"
+).AddVariations(
+    nchw, defaultName="nhwc"
+).AddVariations(
+    relu, relu6, includeDefault=False
+).AddVariations(
+    weight_as_input, defaultName="w_as_param"
+).AddVariations(
+    relax, quant8, defaultName="float"
+)
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_naming/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_naming/stderr.txt.expect
new file mode 100644
index 000000000..7ac2240b2
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_naming/stderr.txt.expect
@@ -0,0 +1,3 @@
+Output CTS model: -
+Output example:-
+Output CTS test: -
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_naming/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_naming/stdout.txt.expect
new file mode 100644
index 000000000..8cc78fe5a
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_naming/stdout.txt.expect
@@ -0,0 +1,1848 @@
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+#include "../../TestGenerated.h"
+
+namespace conv_float {
+// Generated conv_float test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace conv_float
+
+void CreateModel_model_name_nhwc_act_w_as_param_float(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nhwc_act_w_as_param_float(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_act_w_as_param_float = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nhwc_act_w_as_param_float) {
+    execute(conv_float::CreateModel_model_name_nhwc_act_w_as_param_float,
+            conv_float::is_ignored_model_name_nhwc_act_w_as_param_float,
+            conv_float::examples_model_name_example_name_nhwc_act_w_as_param_float);
+}
+
+void CreateModel_model_name_nhwc_act_w_as_param_float_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nhwc_act_w_as_param_float_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_act_w_as_param_float_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nhwc_act_w_as_param_float_relaxed) {
+    execute(conv_float::CreateModel_model_name_nhwc_act_w_as_param_float_relaxed,
+            conv_float::is_ignored_model_name_nhwc_act_w_as_param_float_relaxed,
+            conv_float::examples_model_name_example_name_nhwc_act_w_as_param_float_relaxed);
+}
+
+void CreateModel_model_name_nhwc_act_w_as_param_quantized(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static uint8_t op2_init[] = {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132};
+  model->setOperandValue(op2, op2_init, sizeof(uint8_t) * 16);
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nhwc_act_w_as_param_quantized(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_act_w_as_param_quantized = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 160, 147, 152, 135, 182, 112, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nhwc_act_w_as_param_quantized) {
+    execute(conv_float::CreateModel_model_name_nhwc_act_w_as_param_quantized,
+            conv_float::is_ignored_model_name_nhwc_act_w_as_param_quantized,
+            conv_float::examples_model_name_example_name_nhwc_act_w_as_param_quantized);
+}
+
+void CreateModel_model_name_nhwc_act_w_as_input_float(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nhwc_act_w_as_input_float(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_act_w_as_input_float = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nhwc_act_w_as_input_float) {
+    execute(conv_float::CreateModel_model_name_nhwc_act_w_as_input_float,
+            conv_float::is_ignored_model_name_nhwc_act_w_as_input_float,
+            conv_float::examples_model_name_example_name_nhwc_act_w_as_input_float);
+}
+
+void CreateModel_model_name_nhwc_act_w_as_input_float_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nhwc_act_w_as_input_float_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_act_w_as_input_float_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nhwc_act_w_as_input_float_relaxed) {
+    execute(conv_float::CreateModel_model_name_nhwc_act_w_as_input_float_relaxed,
+            conv_float::is_ignored_model_name_nhwc_act_w_as_input_float_relaxed,
+            conv_float::examples_model_name_example_name_nhwc_act_w_as_input_float_relaxed);
+}
+
+void CreateModel_model_name_nhwc_act_w_as_input_quantized(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nhwc_act_w_as_input_quantized(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_act_w_as_input_quantized = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}, {1, {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 160, 147, 152, 135, 182, 112, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nhwc_act_w_as_input_quantized) {
+    execute(conv_float::CreateModel_model_name_nhwc_act_w_as_input_quantized,
+            conv_float::is_ignored_model_name_nhwc_act_w_as_input_quantized,
+            conv_float::examples_model_name_example_name_nhwc_act_w_as_input_quantized);
+}
+
+void CreateModel_model_name_nhwc_relu6_w_as_param_float(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nhwc_relu6_w_as_param_float(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_relu6_w_as_param_float = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nhwc_relu6_w_as_param_float) {
+    execute(conv_float::CreateModel_model_name_nhwc_relu6_w_as_param_float,
+            conv_float::is_ignored_model_name_nhwc_relu6_w_as_param_float,
+            conv_float::examples_model_name_example_name_nhwc_relu6_w_as_param_float);
+}
+
+void CreateModel_model_name_nhwc_relu6_w_as_param_float_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nhwc_relu6_w_as_param_float_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_relu6_w_as_param_float_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nhwc_relu6_w_as_param_float_relaxed) {
+    execute(conv_float::CreateModel_model_name_nhwc_relu6_w_as_param_float_relaxed,
+            conv_float::is_ignored_model_name_nhwc_relu6_w_as_param_float_relaxed,
+            conv_float::examples_model_name_example_name_nhwc_relu6_w_as_param_float_relaxed);
+}
+
+void CreateModel_model_name_nhwc_relu6_w_as_param_quantized(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static uint8_t op2_init[] = {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132};
+  model->setOperandValue(op2, op2_init, sizeof(uint8_t) * 16);
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nhwc_relu6_w_as_param_quantized(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_relu6_w_as_param_quantized = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nhwc_relu6_w_as_param_quantized) {
+    execute(conv_float::CreateModel_model_name_nhwc_relu6_w_as_param_quantized,
+            conv_float::is_ignored_model_name_nhwc_relu6_w_as_param_quantized,
+            conv_float::examples_model_name_example_name_nhwc_relu6_w_as_param_quantized);
+}
+
+void CreateModel_model_name_nhwc_relu6_w_as_input_float(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nhwc_relu6_w_as_input_float(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_relu6_w_as_input_float = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nhwc_relu6_w_as_input_float) {
+    execute(conv_float::CreateModel_model_name_nhwc_relu6_w_as_input_float,
+            conv_float::is_ignored_model_name_nhwc_relu6_w_as_input_float,
+            conv_float::examples_model_name_example_name_nhwc_relu6_w_as_input_float);
+}
+
+void CreateModel_model_name_nhwc_relu6_w_as_input_float_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nhwc_relu6_w_as_input_float_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_relu6_w_as_input_float_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nhwc_relu6_w_as_input_float_relaxed) {
+    execute(conv_float::CreateModel_model_name_nhwc_relu6_w_as_input_float_relaxed,
+            conv_float::is_ignored_model_name_nhwc_relu6_w_as_input_float_relaxed,
+            conv_float::examples_model_name_example_name_nhwc_relu6_w_as_input_float_relaxed);
+}
+
+void CreateModel_model_name_nhwc_relu6_w_as_input_quantized(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nhwc_relu6_w_as_input_quantized(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_relu6_w_as_input_quantized = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}, {1, {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nhwc_relu6_w_as_input_quantized) {
+    execute(conv_float::CreateModel_model_name_nhwc_relu6_w_as_input_quantized,
+            conv_float::is_ignored_model_name_nhwc_relu6_w_as_input_quantized,
+            conv_float::examples_model_name_example_name_nhwc_relu6_w_as_input_quantized);
+}
+
+void CreateModel_model_name_nchw_layout_act_w_as_param_float(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nchw_layout_act_w_as_param_float(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_act_w_as_param_float = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nchw_layout_act_w_as_param_float) {
+    execute(conv_float::CreateModel_model_name_nchw_layout_act_w_as_param_float,
+            conv_float::is_ignored_model_name_nchw_layout_act_w_as_param_float,
+            conv_float::examples_model_name_example_name_nchw_layout_act_w_as_param_float);
+}
+
+void CreateModel_model_name_nchw_layout_act_w_as_param_float_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nchw_layout_act_w_as_param_float_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_act_w_as_param_float_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nchw_layout_act_w_as_param_float_relaxed) {
+    execute(conv_float::CreateModel_model_name_nchw_layout_act_w_as_param_float_relaxed,
+            conv_float::is_ignored_model_name_nchw_layout_act_w_as_param_float_relaxed,
+            conv_float::examples_model_name_example_name_nchw_layout_act_w_as_param_float_relaxed);
+}
+
+void CreateModel_model_name_nchw_layout_act_w_as_param_quantized(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static uint8_t op2_init[] = {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132};
+  model->setOperandValue(op2, op2_init, sizeof(uint8_t) * 16);
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nchw_layout_act_w_as_param_quantized(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_act_w_as_param_quantized = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 147, 135, 112, 160, 152, 182, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nchw_layout_act_w_as_param_quantized) {
+    execute(conv_float::CreateModel_model_name_nchw_layout_act_w_as_param_quantized,
+            conv_float::is_ignored_model_name_nchw_layout_act_w_as_param_quantized,
+            conv_float::examples_model_name_example_name_nchw_layout_act_w_as_param_quantized);
+}
+
+void CreateModel_model_name_nchw_layout_act_w_as_input_float(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nchw_layout_act_w_as_input_float(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_act_w_as_input_float = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nchw_layout_act_w_as_input_float) {
+    execute(conv_float::CreateModel_model_name_nchw_layout_act_w_as_input_float,
+            conv_float::is_ignored_model_name_nchw_layout_act_w_as_input_float,
+            conv_float::examples_model_name_example_name_nchw_layout_act_w_as_input_float);
+}
+
+void CreateModel_model_name_nchw_layout_act_w_as_input_float_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nchw_layout_act_w_as_input_float_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_act_w_as_input_float_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nchw_layout_act_w_as_input_float_relaxed) {
+    execute(conv_float::CreateModel_model_name_nchw_layout_act_w_as_input_float_relaxed,
+            conv_float::is_ignored_model_name_nchw_layout_act_w_as_input_float_relaxed,
+            conv_float::examples_model_name_example_name_nchw_layout_act_w_as_input_float_relaxed);
+}
+
+void CreateModel_model_name_nchw_layout_act_w_as_input_quantized(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nchw_layout_act_w_as_input_quantized(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_act_w_as_input_quantized = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}, {1, {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 147, 135, 112, 160, 152, 182, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nchw_layout_act_w_as_input_quantized) {
+    execute(conv_float::CreateModel_model_name_nchw_layout_act_w_as_input_quantized,
+            conv_float::is_ignored_model_name_nchw_layout_act_w_as_input_quantized,
+            conv_float::examples_model_name_example_name_nchw_layout_act_w_as_input_quantized);
+}
+
+void CreateModel_model_name_nchw_layout_relu6_w_as_param_float(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nchw_layout_relu6_w_as_param_float(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_relu6_w_as_param_float = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nchw_layout_relu6_w_as_param_float) {
+    execute(conv_float::CreateModel_model_name_nchw_layout_relu6_w_as_param_float,
+            conv_float::is_ignored_model_name_nchw_layout_relu6_w_as_param_float,
+            conv_float::examples_model_name_example_name_nchw_layout_relu6_w_as_param_float);
+}
+
+void CreateModel_model_name_nchw_layout_relu6_w_as_param_float_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nchw_layout_relu6_w_as_param_float_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_relu6_w_as_param_float_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nchw_layout_relu6_w_as_param_float_relaxed) {
+    execute(conv_float::CreateModel_model_name_nchw_layout_relu6_w_as_param_float_relaxed,
+            conv_float::is_ignored_model_name_nchw_layout_relu6_w_as_param_float_relaxed,
+            conv_float::examples_model_name_example_name_nchw_layout_relu6_w_as_param_float_relaxed);
+}
+
+void CreateModel_model_name_nchw_layout_relu6_w_as_param_quantized(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static uint8_t op2_init[] = {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132};
+  model->setOperandValue(op2, op2_init, sizeof(uint8_t) * 16);
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nchw_layout_relu6_w_as_param_quantized(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_relu6_w_as_param_quantized = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nchw_layout_relu6_w_as_param_quantized) {
+    execute(conv_float::CreateModel_model_name_nchw_layout_relu6_w_as_param_quantized,
+            conv_float::is_ignored_model_name_nchw_layout_relu6_w_as_param_quantized,
+            conv_float::examples_model_name_example_name_nchw_layout_relu6_w_as_param_quantized);
+}
+
+void CreateModel_model_name_nchw_layout_relu6_w_as_input_float(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nchw_layout_relu6_w_as_input_float(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_relu6_w_as_input_float = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nchw_layout_relu6_w_as_input_float) {
+    execute(conv_float::CreateModel_model_name_nchw_layout_relu6_w_as_input_float,
+            conv_float::is_ignored_model_name_nchw_layout_relu6_w_as_input_float,
+            conv_float::examples_model_name_example_name_nchw_layout_relu6_w_as_input_float);
+}
+
+void CreateModel_model_name_nchw_layout_relu6_w_as_input_float_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nchw_layout_relu6_w_as_input_float_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_relu6_w_as_input_float_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nchw_layout_relu6_w_as_input_float_relaxed) {
+    execute(conv_float::CreateModel_model_name_nchw_layout_relu6_w_as_input_float_relaxed,
+            conv_float::is_ignored_model_name_nchw_layout_relu6_w_as_input_float_relaxed,
+            conv_float::examples_model_name_example_name_nchw_layout_relu6_w_as_input_float_relaxed);
+}
+
+void CreateModel_model_name_nchw_layout_relu6_w_as_input_quantized(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_model_name_nchw_layout_relu6_w_as_input_quantized(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_relu6_w_as_input_quantized = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}, {1, {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_model_name_example_name_nchw_layout_relu6_w_as_input_quantized) {
+    execute(conv_float::CreateModel_model_name_nchw_layout_relu6_w_as_input_quantized,
+            conv_float::is_ignored_model_name_nchw_layout_relu6_w_as_input_quantized,
+            conv_float::examples_model_name_example_name_nchw_layout_relu6_w_as_input_quantized);
+}
+
+#include "../generated/tests/conv_float.mod.py.cpp"
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_quant8/conv_quant8.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_quant8/conv_quant8.mod.py
new file mode 100644
index 000000000..f6b3e89ca
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_quant8/conv_quant8.mod.py
@@ -0,0 +1,35 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{1, 3, 3, 1}")
+f1 = Parameter("op2", "TENSOR_FLOAT32", "{1, 2, 2, 1}", [.25, .25, .25, .25])
+b1 = Parameter("op3", "TENSOR_FLOAT32", "{1}", [0])
+pad0 = Int32Scalar("pad0", 0)
+act = Int32Scalar("act", 0)
+stride = Int32Scalar("stride", 1)
+output = Output("op4", "TENSOR_FLOAT32", "{1, 2, 2, 1}")
+
+model = model.Operation("CONV_2D", i1, f1, b1, pad0, pad0, pad0, pad0, stride, stride, act).To(output)
+model = model.RelaxedExecution(True)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [1.0, 1.0, 1.0, 1.0, 0.5, 1.0, 1.0, 1.0, 1.0]}
+
+output0 = {output: # output 0
+           [.875, .875, .875, .875]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_quant8/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_quant8/stderr.txt.expect
new file mode 100644
index 000000000..7ac2240b2
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_quant8/stderr.txt.expect
@@ -0,0 +1,3 @@
+Output CTS model: -
+Output example:-
+Output CTS test: -
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_quant8/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_quant8/stdout.txt.expect
new file mode 100644
index 000000000..e0195afb1
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_quant8/stdout.txt.expect
@@ -0,0 +1,85 @@
+// clang-format off
+// Generated file (from: conv_quant8.mod.py). Do not edit
+// clang-format off
+// Generated file (from: conv_quant8.mod.py). Do not edit
+// clang-format off
+// Generated file (from: conv_quant8.mod.py). Do not edit
+#include "../../TestGenerated.h"
+
+namespace conv_quant8 {
+// Generated conv_quant8 test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace conv_quant8
+
+void CreateModel(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 3, 3, 1});
+  OperandType type1(Type::TENSOR_FLOAT32, {1, 2, 2, 1});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto pad0 = model->addOperand(&type3);
+  auto stride = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type1);
+  // Phase 2, operations
+  static float op2_init[] = {0.25f, 0.25f, 0.25f, 0.25f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 4);
+  static float op3_init[] = {0.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t pad0_init[] = {0};
+  model->setOperandValue(pad0, pad0_init, sizeof(int32_t) * 1);
+  static int32_t stride_init[] = {1};
+  model->setOperandValue(stride, stride_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {0};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, pad0, pad0, pad0, pad0, stride, stride, act}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 0.5f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {0.875f, 0.875f, 0.875f, 0.875f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_quant8) {
+    execute(conv_quant8::CreateModel,
+            conv_quant8::is_ignored,
+            conv_quant8::examples);
+}
+
+#include "../generated/tests/conv_quant8.mod.py.cpp"
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_variation/conv_float.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_variation/conv_float.mod.py
new file mode 100644
index 000000000..c5ec8bf4e
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_variation/conv_float.mod.py
@@ -0,0 +1,44 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{1, 2, 2, 2}")
+f1 = Parameter("op2", "TENSOR_FLOAT32", "{2, 2, 2, 2}", [1, 2, 3, 4, 5, 6, 7, 8, 8, 7, 6, 5, 4, 3, 2, 1])
+b1 = Parameter("op3", "TENSOR_FLOAT32", "{1}", [-200])
+output = Output("op4", "TENSOR_FLOAT32", "{1, 2, 2, 2}")
+act = Int32Scalar("act", 0) # None activation
+layout = Int32Scalar("layout", 0) # NHWC
+pad = Int32Scalar("param", 1)
+stride0 = Int32Scalar("param1", 1)
+stride1 = Int32Scalar("param2", 1)
+
+model = model.Operation("CONV_2D", i1, f1, b1, pad, stride0, stride1, act, layout).To(output)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [1, 2, 3, 4, 5, 6, 7, 8]}
+
+output0 = {output: # output 0
+           [204, 120, 94, 104, 70, 164, 23, 112]}
+
+quant8 = DataTypeConverter().Identify({
+    i1: ("TENSOR_QUANT8_ASYMM", 0.5, 128),
+    f1: ("TENSOR_QUANT8_ASYMM", 0.25, 128),
+    b1: ("TENSOR_INT32", 0.125, 0),
+    output: ("TENSOR_QUANT8_ASYMM", 2, 100)
+})
+
+# Instantiate an example
+Example((input0, output0)).AddNchw(i1, f1, output, layout).AddAllActivations(
+    output, act).AddInput(f1).AddVariations(RelaxedModeConverter(True), quant8)
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_variation/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_variation/stderr.txt.expect
new file mode 100644
index 000000000..7ac2240b2
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_variation/stderr.txt.expect
@@ -0,0 +1,3 @@
+Output CTS model: -
+Output example:-
+Output CTS test: -
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_variation/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_variation/stdout.txt.expect
new file mode 100644
index 000000000..87e74f722
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_variation/stdout.txt.expect
@@ -0,0 +1,3688 @@
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+#include "../../TestGenerated.h"
+
+namespace conv_float {
+// Generated conv_float test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace conv_float
+
+void CreateModel_none(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {0};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_none(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_none = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_none) {
+    execute(conv_float::CreateModel_none,
+            conv_float::is_ignored_none,
+            conv_float::examples_none);
+}
+
+void CreateModel_none_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {0};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_none_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_none_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_none_relaxed) {
+    execute(conv_float::CreateModel_none_relaxed,
+            conv_float::is_ignored_none_relaxed,
+            conv_float::examples_none_relaxed);
+}
+
+void CreateModel_none_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static uint8_t op2_init[] = {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132};
+  model->setOperandValue(op2, op2_init, sizeof(uint8_t) * 16);
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {0};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_none_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_none_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 160, 147, 152, 135, 182, 112, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_none_quant8) {
+    execute(conv_float::CreateModel_none_quant8,
+            conv_float::is_ignored_none_quant8,
+            conv_float::examples_none_quant8);
+}
+
+void CreateModel_none_weight_as_input(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {0};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_none_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_none_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_none_weight_as_input) {
+    execute(conv_float::CreateModel_none_weight_as_input,
+            conv_float::is_ignored_none_weight_as_input,
+            conv_float::examples_none_weight_as_input);
+}
+
+void CreateModel_none_weight_as_input_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {0};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_none_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_none_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_none_weight_as_input_relaxed) {
+    execute(conv_float::CreateModel_none_weight_as_input_relaxed,
+            conv_float::is_ignored_none_weight_as_input_relaxed,
+            conv_float::examples_none_weight_as_input_relaxed);
+}
+
+void CreateModel_none_weight_as_input_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {0};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_none_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_none_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}, {1, {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 160, 147, 152, 135, 182, 112, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_none_weight_as_input_quant8) {
+    execute(conv_float::CreateModel_none_weight_as_input_quant8,
+            conv_float::is_ignored_none_weight_as_input_quant8,
+            conv_float::examples_none_weight_as_input_quant8);
+}
+
+void CreateModel_relu(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu) {
+    execute(conv_float::CreateModel_relu,
+            conv_float::is_ignored_relu,
+            conv_float::examples_relu);
+}
+
+void CreateModel_relu_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_relu_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu_relaxed) {
+    execute(conv_float::CreateModel_relu_relaxed,
+            conv_float::is_ignored_relu_relaxed,
+            conv_float::examples_relu_relaxed);
+}
+
+void CreateModel_relu_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static uint8_t op2_init[] = {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132};
+  model->setOperandValue(op2, op2_init, sizeof(uint8_t) * 16);
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 160, 147, 152, 135, 182, 112, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu_quant8) {
+    execute(conv_float::CreateModel_relu_quant8,
+            conv_float::is_ignored_relu_quant8,
+            conv_float::examples_relu_quant8);
+}
+
+void CreateModel_relu_weight_as_input(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu_weight_as_input) {
+    execute(conv_float::CreateModel_relu_weight_as_input,
+            conv_float::is_ignored_relu_weight_as_input,
+            conv_float::examples_relu_weight_as_input);
+}
+
+void CreateModel_relu_weight_as_input_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_relu_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu_weight_as_input_relaxed) {
+    execute(conv_float::CreateModel_relu_weight_as_input_relaxed,
+            conv_float::is_ignored_relu_weight_as_input_relaxed,
+            conv_float::examples_relu_weight_as_input_relaxed);
+}
+
+void CreateModel_relu_weight_as_input_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}, {1, {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 160, 147, 152, 135, 182, 112, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu_weight_as_input_quant8) {
+    execute(conv_float::CreateModel_relu_weight_as_input_quant8,
+            conv_float::is_ignored_relu_weight_as_input_quant8,
+            conv_float::examples_relu_weight_as_input_quant8);
+}
+
+void CreateModel_relu1(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {2};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu1(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu1 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu1) {
+    execute(conv_float::CreateModel_relu1,
+            conv_float::is_ignored_relu1,
+            conv_float::examples_relu1);
+}
+
+void CreateModel_relu1_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {2};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_relu1_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu1_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu1_relaxed) {
+    execute(conv_float::CreateModel_relu1_relaxed,
+            conv_float::is_ignored_relu1_relaxed,
+            conv_float::examples_relu1_relaxed);
+}
+
+void CreateModel_relu1_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static uint8_t op2_init[] = {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132};
+  model->setOperandValue(op2, op2_init, sizeof(uint8_t) * 16);
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {2};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu1_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu1_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {100, 100, 100, 100, 100, 100, 100, 100}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu1_quant8) {
+    execute(conv_float::CreateModel_relu1_quant8,
+            conv_float::is_ignored_relu1_quant8,
+            conv_float::examples_relu1_quant8);
+}
+
+void CreateModel_relu1_weight_as_input(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {2};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu1_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu1_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu1_weight_as_input) {
+    execute(conv_float::CreateModel_relu1_weight_as_input,
+            conv_float::is_ignored_relu1_weight_as_input,
+            conv_float::examples_relu1_weight_as_input);
+}
+
+void CreateModel_relu1_weight_as_input_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {2};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_relu1_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu1_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu1_weight_as_input_relaxed) {
+    execute(conv_float::CreateModel_relu1_weight_as_input_relaxed,
+            conv_float::is_ignored_relu1_weight_as_input_relaxed,
+            conv_float::examples_relu1_weight_as_input_relaxed);
+}
+
+void CreateModel_relu1_weight_as_input_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {2};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu1_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu1_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}, {1, {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {100, 100, 100, 100, 100, 100, 100, 100}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu1_weight_as_input_quant8) {
+    execute(conv_float::CreateModel_relu1_weight_as_input_quant8,
+            conv_float::is_ignored_relu1_weight_as_input_quant8,
+            conv_float::examples_relu1_weight_as_input_quant8);
+}
+
+void CreateModel_relu6(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu6(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu6) {
+    execute(conv_float::CreateModel_relu6,
+            conv_float::is_ignored_relu6,
+            conv_float::examples_relu6);
+}
+
+void CreateModel_relu6_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_relu6_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu6_relaxed) {
+    execute(conv_float::CreateModel_relu6_relaxed,
+            conv_float::is_ignored_relu6_relaxed,
+            conv_float::examples_relu6_relaxed);
+}
+
+void CreateModel_relu6_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static uint8_t op2_init[] = {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132};
+  model->setOperandValue(op2, op2_init, sizeof(uint8_t) * 16);
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu6_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu6_quant8) {
+    execute(conv_float::CreateModel_relu6_quant8,
+            conv_float::is_ignored_relu6_quant8,
+            conv_float::examples_relu6_quant8);
+}
+
+void CreateModel_relu6_weight_as_input(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu6_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu6_weight_as_input) {
+    execute(conv_float::CreateModel_relu6_weight_as_input,
+            conv_float::is_ignored_relu6_weight_as_input,
+            conv_float::examples_relu6_weight_as_input);
+}
+
+void CreateModel_relu6_weight_as_input_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_relu6_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu6_weight_as_input_relaxed) {
+    execute(conv_float::CreateModel_relu6_weight_as_input_relaxed,
+            conv_float::is_ignored_relu6_weight_as_input_relaxed,
+            conv_float::examples_relu6_weight_as_input_relaxed);
+}
+
+void CreateModel_relu6_weight_as_input_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {0};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_relu6_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}, {1, {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_relu6_weight_as_input_quant8) {
+    execute(conv_float::CreateModel_relu6_weight_as_input_quant8,
+            conv_float::is_ignored_relu6_weight_as_input_quant8,
+            conv_float::examples_relu6_weight_as_input_quant8);
+}
+
+void CreateModel_nchw_none(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {0};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_none(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_none = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_none) {
+    execute(conv_float::CreateModel_nchw_none,
+            conv_float::is_ignored_nchw_none,
+            conv_float::examples_nchw_none);
+}
+
+void CreateModel_nchw_none_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {0};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_none_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_none_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_none_relaxed) {
+    execute(conv_float::CreateModel_nchw_none_relaxed,
+            conv_float::is_ignored_nchw_none_relaxed,
+            conv_float::examples_nchw_none_relaxed);
+}
+
+void CreateModel_nchw_none_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static uint8_t op2_init[] = {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132};
+  model->setOperandValue(op2, op2_init, sizeof(uint8_t) * 16);
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {0};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_none_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_none_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 147, 135, 112, 160, 152, 182, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_none_quant8) {
+    execute(conv_float::CreateModel_nchw_none_quant8,
+            conv_float::is_ignored_nchw_none_quant8,
+            conv_float::examples_nchw_none_quant8);
+}
+
+void CreateModel_nchw_none_weight_as_input(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {0};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_none_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_none_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_none_weight_as_input) {
+    execute(conv_float::CreateModel_nchw_none_weight_as_input,
+            conv_float::is_ignored_nchw_none_weight_as_input,
+            conv_float::examples_nchw_none_weight_as_input);
+}
+
+void CreateModel_nchw_none_weight_as_input_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {0};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_none_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_none_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_none_weight_as_input_relaxed) {
+    execute(conv_float::CreateModel_nchw_none_weight_as_input_relaxed,
+            conv_float::is_ignored_nchw_none_weight_as_input_relaxed,
+            conv_float::examples_nchw_none_weight_as_input_relaxed);
+}
+
+void CreateModel_nchw_none_weight_as_input_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {0};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_none_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_none_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}, {1, {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 147, 135, 112, 160, 152, 182, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_none_weight_as_input_quant8) {
+    execute(conv_float::CreateModel_nchw_none_weight_as_input_quant8,
+            conv_float::is_ignored_nchw_none_weight_as_input_quant8,
+            conv_float::examples_nchw_none_weight_as_input_quant8);
+}
+
+void CreateModel_nchw_relu(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu) {
+    execute(conv_float::CreateModel_nchw_relu,
+            conv_float::is_ignored_nchw_relu,
+            conv_float::examples_nchw_relu);
+}
+
+void CreateModel_nchw_relu_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu_relaxed) {
+    execute(conv_float::CreateModel_nchw_relu_relaxed,
+            conv_float::is_ignored_nchw_relu_relaxed,
+            conv_float::examples_nchw_relu_relaxed);
+}
+
+void CreateModel_nchw_relu_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static uint8_t op2_init[] = {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132};
+  model->setOperandValue(op2, op2_init, sizeof(uint8_t) * 16);
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 147, 135, 112, 160, 152, 182, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu_quant8) {
+    execute(conv_float::CreateModel_nchw_relu_quant8,
+            conv_float::is_ignored_nchw_relu_quant8,
+            conv_float::examples_nchw_relu_quant8);
+}
+
+void CreateModel_nchw_relu_weight_as_input(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu_weight_as_input) {
+    execute(conv_float::CreateModel_nchw_relu_weight_as_input,
+            conv_float::is_ignored_nchw_relu_weight_as_input,
+            conv_float::examples_nchw_relu_weight_as_input);
+}
+
+void CreateModel_nchw_relu_weight_as_input_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu_weight_as_input_relaxed) {
+    execute(conv_float::CreateModel_nchw_relu_weight_as_input_relaxed,
+            conv_float::is_ignored_nchw_relu_weight_as_input_relaxed,
+            conv_float::examples_nchw_relu_weight_as_input_relaxed);
+}
+
+void CreateModel_nchw_relu_weight_as_input_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {1};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}, {1, {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 147, 135, 112, 160, 152, 182, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu_weight_as_input_quant8) {
+    execute(conv_float::CreateModel_nchw_relu_weight_as_input_quant8,
+            conv_float::is_ignored_nchw_relu_weight_as_input_quant8,
+            conv_float::examples_nchw_relu_weight_as_input_quant8);
+}
+
+void CreateModel_nchw_relu1(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {2};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu1(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu1 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu1) {
+    execute(conv_float::CreateModel_nchw_relu1,
+            conv_float::is_ignored_nchw_relu1,
+            conv_float::examples_nchw_relu1);
+}
+
+void CreateModel_nchw_relu1_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {2};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu1_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu1_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu1_relaxed) {
+    execute(conv_float::CreateModel_nchw_relu1_relaxed,
+            conv_float::is_ignored_nchw_relu1_relaxed,
+            conv_float::examples_nchw_relu1_relaxed);
+}
+
+void CreateModel_nchw_relu1_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static uint8_t op2_init[] = {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132};
+  model->setOperandValue(op2, op2_init, sizeof(uint8_t) * 16);
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {2};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu1_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu1_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {100, 100, 100, 100, 100, 100, 100, 100}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu1_quant8) {
+    execute(conv_float::CreateModel_nchw_relu1_quant8,
+            conv_float::is_ignored_nchw_relu1_quant8,
+            conv_float::examples_nchw_relu1_quant8);
+}
+
+void CreateModel_nchw_relu1_weight_as_input(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {2};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu1_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu1_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu1_weight_as_input) {
+    execute(conv_float::CreateModel_nchw_relu1_weight_as_input,
+            conv_float::is_ignored_nchw_relu1_weight_as_input,
+            conv_float::examples_nchw_relu1_weight_as_input);
+}
+
+void CreateModel_nchw_relu1_weight_as_input_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {2};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu1_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu1_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu1_weight_as_input_relaxed) {
+    execute(conv_float::CreateModel_nchw_relu1_weight_as_input_relaxed,
+            conv_float::is_ignored_nchw_relu1_weight_as_input_relaxed,
+            conv_float::examples_nchw_relu1_weight_as_input_relaxed);
+}
+
+void CreateModel_nchw_relu1_weight_as_input_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {2};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu1_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu1_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}, {1, {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {100, 100, 100, 100, 100, 100, 100, 100}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu1_weight_as_input_quant8) {
+    execute(conv_float::CreateModel_nchw_relu1_weight_as_input_quant8,
+            conv_float::is_ignored_nchw_relu1_weight_as_input_quant8,
+            conv_float::examples_nchw_relu1_weight_as_input_quant8);
+}
+
+void CreateModel_nchw_relu6(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu6(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu6) {
+    execute(conv_float::CreateModel_nchw_relu6,
+            conv_float::is_ignored_nchw_relu6,
+            conv_float::examples_nchw_relu6);
+}
+
+void CreateModel_nchw_relu6_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op2_init[] = {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f};
+  model->setOperandValue(op2, op2_init, sizeof(float) * 16);
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu6_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu6_relaxed) {
+    execute(conv_float::CreateModel_nchw_relu6_relaxed,
+            conv_float::is_ignored_nchw_relu6_relaxed,
+            conv_float::examples_nchw_relu6_relaxed);
+}
+
+void CreateModel_nchw_relu6_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static uint8_t op2_init[] = {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132};
+  model->setOperandValue(op2, op2_init, sizeof(uint8_t) * 16);
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu6_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu6_quant8) {
+    execute(conv_float::CreateModel_nchw_relu6_quant8,
+            conv_float::is_ignored_nchw_relu6_quant8,
+            conv_float::examples_nchw_relu6_quant8);
+}
+
+void CreateModel_nchw_relu6_weight_as_input(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu6_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu6_weight_as_input) {
+    execute(conv_float::CreateModel_nchw_relu6_weight_as_input,
+            conv_float::is_ignored_nchw_relu6_weight_as_input,
+            conv_float::examples_nchw_relu6_weight_as_input);
+}
+
+void CreateModel_nchw_relu6_weight_as_input_relaxed(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type0);
+  auto op2 = model->addOperand(&type1);
+  auto op3 = model->addOperand(&type2);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type0);
+  // Phase 2, operations
+  static float op3_init[] = {-200.0f};
+  model->setOperandValue(op3, op3_init, sizeof(float) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  // Phase 4: set relaxed execution
+  model->relaxComputationFloat32toFloat16(true);
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu6_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu6_weight_as_input_relaxed) {
+    execute(conv_float::CreateModel_nchw_relu6_weight_as_input_relaxed,
+            conv_float::is_ignored_nchw_relu6_weight_as_input_relaxed,
+            conv_float::examples_nchw_relu6_weight_as_input_relaxed);
+}
+
+void CreateModel_nchw_relu6_weight_as_input_quant8(Model *model) {
+  OperandType type0(Type::TENSOR_FLOAT32, {1, 2, 2, 2});
+  OperandType type1(Type::TENSOR_FLOAT32, {2, 2, 2, 2});
+  OperandType type2(Type::TENSOR_FLOAT32, {1});
+  OperandType type3(Type::INT32, {});
+  OperandType type4(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 0.5f, 128);
+  OperandType type5(Type::TENSOR_QUANT8_ASYMM, {2, 2, 2, 2}, 0.25f, 128);
+  OperandType type6(Type::TENSOR_INT32, {1}, 0.125f, 0);
+  OperandType type7(Type::TENSOR_QUANT8_ASYMM, {1, 2, 2, 2}, 2.0f, 100);
+  // Phase 1, operands
+  auto op1 = model->addOperand(&type4);
+  auto op2 = model->addOperand(&type5);
+  auto op3 = model->addOperand(&type6);
+  auto param = model->addOperand(&type3);
+  auto param1 = model->addOperand(&type3);
+  auto param2 = model->addOperand(&type3);
+  auto act = model->addOperand(&type3);
+  auto layout = model->addOperand(&type3);
+  auto op4 = model->addOperand(&type7);
+  // Phase 2, operations
+  static int32_t op3_init[] = {-1600};
+  model->setOperandValue(op3, op3_init, sizeof(int32_t) * 1);
+  static int32_t param_init[] = {1};
+  model->setOperandValue(param, param_init, sizeof(int32_t) * 1);
+  static int32_t param1_init[] = {1};
+  model->setOperandValue(param1, param1_init, sizeof(int32_t) * 1);
+  static int32_t param2_init[] = {1};
+  model->setOperandValue(param2, param2_init, sizeof(int32_t) * 1);
+  static int32_t act_init[] = {3};
+  model->setOperandValue(act, act_init, sizeof(int32_t) * 1);
+  static int32_t layout_init[] = {1};
+  model->setOperandValue(layout, layout_init, sizeof(int32_t) * 1);
+  model->addOperation(ANEURALNETWORKS_CONV_2D, {op1, op2, op3, param, param1, param2, act, layout}, {op4});
+  // Phase 3, inputs and outputs
+  model->identifyInputsAndOutputs(
+    {op1, op2},
+    {op4});
+  assert(model->isValid());
+}
+
+bool is_ignored_nchw_relu6_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}, {1, {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(GeneratedTests, conv_float_nchw_relu6_weight_as_input_quant8) {
+    execute(conv_float::CreateModel_nchw_relu6_weight_as_input_quant8,
+            conv_float::is_ignored_nchw_relu6_weight_as_input_quant8,
+            conv_float::examples_nchw_relu6_weight_as_input_quant8);
+}
+
+#include "../generated/tests/conv_float.mod.py.cpp"
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_float/lstm_float.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_float/lstm_float.mod.py
new file mode 100644
index 000000000..60eec8280
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_float/lstm_float.mod.py
@@ -0,0 +1,145 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+model = Model()
+
+n_batch = 1
+n_input = 2
+# n_cell and n_output have the same size when there is no projection.
+n_cell = 4
+n_output = 4
+
+input = Input("input", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_input))
+
+input_to_input_weights = Input("input_to_input_weights", "TENSOR_FLOAT32", "{%d, %d}" % (n_cell, n_input))
+input_to_forget_weights = Input("input_to_forget_weights", "TENSOR_FLOAT32", "{%d, %d}" % (n_cell, n_input))
+input_to_cell_weights = Input("input_to_cell_weights", "TENSOR_FLOAT32", "{%d, %d}" % (n_cell, n_input))
+input_to_output_weights = Input("input_to_output_weights", "TENSOR_FLOAT32", "{%d, %d}" % (n_cell, n_input))
+
+recurrent_to_input_weights = Input("recurrent_to_intput_weights", "TENSOR_FLOAT32", "{%d, %d}" % (n_cell, n_output))
+recurrent_to_forget_weights = Input("recurrent_to_forget_weights", "TENSOR_FLOAT32", "{%d, %d}" % (n_cell, n_output))
+recurrent_to_cell_weights = Input("recurrent_to_cell_weights", "TENSOR_FLOAT32", "{%d, %d}" % (n_cell, n_output))
+recurrent_to_output_weights = Input("recurrent_to_output_weights", "TENSOR_FLOAT32", "{%d, %d}" % (n_cell, n_output))
+
+cell_to_input_weights = Input("cell_to_input_weights", "TENSOR_FLOAT32", "{0}")
+cell_to_forget_weights = Input("cell_to_forget_weights", "TENSOR_FLOAT32", "{0}")
+cell_to_output_weights = Input("cell_to_output_weights", "TENSOR_FLOAT32", "{0}")
+
+input_gate_bias = Input("input_gate_bias", "TENSOR_FLOAT32", "{%d}"%(n_cell))
+forget_gate_bias = Input("forget_gate_bias", "TENSOR_FLOAT32", "{%d}"%(n_cell))
+cell_gate_bias = Input("cell_gate_bias", "TENSOR_FLOAT32", "{%d}"%(n_cell))
+output_gate_bias = Input("output_gate_bias", "TENSOR_FLOAT32", "{%d}"%(n_cell))
+
+projection_weights = Input("projection_weights", "TENSOR_FLOAT32", "{0,0}")
+projection_bias = Input("projection_bias", "TENSOR_FLOAT32", "{0}")
+
+output_state_in = Input("output_state_in", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_output))
+cell_state_in = Input("cell_state_in", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_cell))
+
+activation_param = Int32Scalar("activation_param", 4)  # Tanh
+cell_clip_param = Float32Scalar("cell_clip_param", 0.)
+proj_clip_param = Float32Scalar("proj_clip_param", 0.)
+
+scratch_buffer = IgnoredOutput("scratch_buffer", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, (n_cell * 4)))
+output_state_out = Output("output_state_out", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_output))
+cell_state_out = Output("cell_state_out", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_cell))
+output = Output("output", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_output))
+
+model = model.Operation("LSTM",
+                        input,
+
+                        input_to_input_weights,
+                        input_to_forget_weights,
+                        input_to_cell_weights,
+                        input_to_output_weights,
+
+                        recurrent_to_input_weights,
+                        recurrent_to_forget_weights,
+                        recurrent_to_cell_weights,
+                        recurrent_to_output_weights,
+
+                        cell_to_input_weights,
+                        cell_to_forget_weights,
+                        cell_to_output_weights,
+
+                        input_gate_bias,
+                        forget_gate_bias,
+                        cell_gate_bias,
+                        output_gate_bias,
+
+                        projection_weights,
+                        projection_bias,
+
+                        output_state_in,
+                        cell_state_in,
+
+                        activation_param,
+                        cell_clip_param,
+                        proj_clip_param
+).To([scratch_buffer, output_state_out, cell_state_out, output])
+model = model.RelaxedExecution(True)
+
+# Example 1. Input in operand 0,
+input0 = {input_to_input_weights:  [-0.45018822, -0.02338299, -0.0870589, -0.34550029, 0.04266912, -0.15680569, -0.34856534, 0.43890524],
+          input_to_forget_weights: [0.09701663, 0.20334584, -0.50592935, -0.31343272, -0.40032279, 0.44781327, 0.01387155, -0.35593212],
+          input_to_cell_weights:   [-0.50013041, 0.1370284, 0.11810488, 0.2013163, -0.20583314, 0.44344562, 0.22077113, -0.29909778],
+          input_to_output_weights: [-0.25065863, -0.28290087, 0.04613829, 0.40525138, 0.44272184, 0.03897077, -0.1556896, 0.19487578],
+
+          input_gate_bias:  [0.,0.,0.,0.],
+          forget_gate_bias: [1.,1.,1.,1.],
+          cell_gate_bias:   [0.,0.,0.,0.],
+          output_gate_bias: [0.,0.,0.,0.],
+
+          recurrent_to_input_weights: [
+              -0.0063535, -0.2042388, 0.31454784, -0.35746509, 0.28902304, 0.08183324,
+            -0.16555229, 0.02286911, -0.13566875, 0.03034258, 0.48091322,
+            -0.12528998, 0.24077177, -0.51332325, -0.33502164, 0.10629296],
+
+          recurrent_to_cell_weights: [
+              -0.3407414, 0.24443203, -0.2078532, 0.26320225, 0.05695659, -0.00123841,
+            -0.4744786, -0.35869038, -0.06418842, -0.13502428, -0.501764, 0.22830659,
+            -0.46367589, 0.26016325, -0.03894562, -0.16368064],
+
+          recurrent_to_forget_weights: [
+              -0.48684245, -0.06655136, 0.42224967, 0.2112639, 0.27654213, 0.20864892,
+            -0.07646349, 0.45877004, 0.00141793, -0.14609534, 0.36447752, 0.09196436,
+            0.28053468, 0.01560611, -0.20127171, -0.01140004],
+
+          recurrent_to_output_weights: [
+              0.43385774, -0.17194885, 0.2718237, 0.09215671, 0.24107647, -0.39835793,
+              0.18212086, 0.01301402, 0.48572797, -0.50656658, 0.20047462, -0.20607421,
+              -0.51818722, -0.15390486, 0.0468148, 0.39922136],
+
+          cell_to_input_weights: [],
+          cell_to_forget_weights: [],
+          cell_to_output_weights: [],
+
+          projection_weights: [],
+          projection_bias: [],
+}
+
+test_input = [2., 3.]
+output_state = [0, 0, 0, 0]
+cell_state = [0, 0, 0, 0]
+golden_output = [-0.02973187, 0.1229473, 0.20885126, -0.15358765,]
+output0 = {
+  scratch_buffer: [ 0 for x in range(n_batch * n_cell * 4) ],
+  cell_state_out: [ -0.145439, 0.157475, 0.293663, -0.277353 ],
+  output_state_out: [ -0.0297319, 0.122947, 0.208851, -0.153588 ],
+  output: golden_output
+}
+input0[input] = test_input
+input0[output_state_in] = output_state
+input0[cell_state_in] = cell_state
+Example((input0, output0))
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_float/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_float/stderr.txt.expect
new file mode 100644
index 000000000..3decb4c1c
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_float/stderr.txt.expect
@@ -0,0 +1,2 @@
+Output VTS model: -
+Output example:-
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_float/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_float/stdout.txt.expect
new file mode 100644
index 000000000..4ac72618c
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_float/stdout.txt.expect
@@ -0,0 +1,322 @@
+// clang-format off
+// Generated file (from: lstm_float.mod.py). Do not edit
+// clang-format off
+// Generated file (from: lstm_float.mod.py). Do not edit
+// Generated from: lstm_float.mod.py.
+namespace lstm_float {
+// Generated lstm_float test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace lstm_float
+
+// Create the model
+Model createTestModel() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {4, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {4, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {4, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {4, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {4, 4},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {4, 4},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {4, 4},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {4, 4},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {0},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {0},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {0},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {4},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {4},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {4},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {4},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {0, 0},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {0},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 4},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 4},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::FLOAT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::FLOAT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 16},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 4},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 4},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 4},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::LSTM,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22},
+            .outputs = {23, 24, 25, 26},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19};
+    const std::vector<uint32_t> outputIndexes = {23, 24, 25, 26};
+    std::vector<uint8_t> operandValues = {
+      4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored(int i) {
+  static std::set<int> ignore = {0};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {2.0f, 3.0f}}, {1, {-0.45018822f, -0.02338299f, -0.0870589f, -0.34550029f, 0.04266912f, -0.15680569f, -0.34856534f, 0.43890524f}}, {2, {0.09701663f, 0.20334584f, -0.50592935f, -0.31343272f, -0.40032279f, 0.44781327f, 0.01387155f, -0.35593212f}}, {3, {-0.50013041f, 0.1370284f, 0.11810488f, 0.2013163f, -0.20583314f, 0.44344562f, 0.22077113f, -0.29909778f}}, {4, {-0.25065863f, -0.28290087f, 0.04613829f, 0.40525138f, 0.44272184f, 0.03897077f, -0.1556896f, 0.19487578f}}, {5, {-0.0063535f, -0.2042388f, 0.31454784f, -0.35746509f, 0.28902304f, 0.08183324f, -0.16555229f, 0.02286911f, -0.13566875f, 0.03034258f, 0.48091322f, -0.12528998f, 0.24077177f, -0.51332325f, -0.33502164f, 0.10629296f}}, {6, {-0.48684245f, -0.06655136f, 0.42224967f, 0.2112639f, 0.27654213f, 0.20864892f, -0.07646349f, 0.45877004f, 0.00141793f, -0.14609534f, 0.36447752f, 0.09196436f, 0.28053468f, 0.01560611f, -0.20127171f, -0.01140004f}}, {7, {-0.3407414f, 0.24443203f, -0.2078532f, 0.26320225f, 0.05695659f, -0.00123841f, -0.4744786f, -0.35869038f, -0.06418842f, -0.13502428f, -0.501764f, 0.22830659f, -0.46367589f, 0.26016325f, -0.03894562f, -0.16368064f}}, {8, {0.43385774f, -0.17194885f, 0.2718237f, 0.09215671f, 0.24107647f, -0.39835793f, 0.18212086f, 0.01301402f, 0.48572797f, -0.50656658f, 0.20047462f, -0.20607421f, -0.51818722f, -0.15390486f, 0.0468148f, 0.39922136f}}, {9, {}}, {10, {}}, {11, {}}, {12, {0.0f, 0.0f, 0.0f, 0.0f}}, {13, {1.0f, 1.0f, 1.0f, 1.0f}}, {14, {0.0f, 0.0f, 0.0f, 0.0f}}, {15, {0.0f, 0.0f, 0.0f, 0.0f}}, {16, {}}, {17, {}}, {18, {0.0f, 0.0f, 0.0f, 0.0f}}, {19, {0.0f, 0.0f, 0.0f, 0.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f}}, {1, {-0.0297319f, 0.122947f, 0.208851f, -0.153588f}}, {2, {-0.145439f, 0.157475f, 0.293663f, -0.277353f}}, {3, {-0.02973187f, 0.1229473f, 0.20885126f, -0.15358765f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, lstm_float) {
+  generated_tests::Execute(device,
+                           lstm_float::createTestModel,
+                           lstm_float::is_ignored,
+                           lstm_float::examples);
+}
+
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_quant8/depthwise_conv2d_quant8.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_quant8/depthwise_conv2d_quant8.mod.py
new file mode 100644
index 000000000..051780877
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_quant8/depthwise_conv2d_quant8.mod.py
@@ -0,0 +1,43 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+model = Model()
+i1 = Input("op1", "TENSOR_QUANT8_ASYMM", "{1, 2, 2, 2}, 0.5f, 0")
+f1 = Input("op2", "TENSOR_QUANT8_ASYMM", "{1, 2, 2, 2}, 0.5f, 0")
+b1 = Input("op3", "TENSOR_INT32", "{2}, 0.25f, 0")
+pad0 = Int32Scalar("pad0", 0)
+act = Int32Scalar("act", 0)
+stride = Int32Scalar("stride", 1)
+cm = Int32Scalar("channelMultiplier", 1)
+output = Output("op4", "TENSOR_QUANT8_ASYMM", "{1,1,1,2}, 1.f, 0")
+
+model = model.Operation("DEPTHWISE_CONV_2D",
+                        i1, f1, b1,
+                        pad0, pad0, pad0, pad0,
+                        stride, stride,
+                        cm, act).To(output)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [4, 16, 4, 32, 4, 64, 4, 128],
+          f1:
+          [2, 4,  2, 0,  2, 2,  2, 0],
+          b1:
+          [0, 0]}
+# (i1 (depthconv) f1)
+output0 = {output: # output 0
+           [8, 48]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_quant8/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_quant8/stderr.txt.expect
new file mode 100644
index 000000000..3decb4c1c
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_quant8/stderr.txt.expect
@@ -0,0 +1,2 @@
+Output VTS model: -
+Output example:-
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_quant8/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_quant8/stdout.txt.expect
new file mode 100644
index 000000000..760430798
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_backward_compatibility_quant8/stdout.txt.expect
@@ -0,0 +1,150 @@
+// clang-format off
+// Generated file (from: depthwise_conv2d_quant8.mod.py). Do not edit
+// clang-format off
+// Generated file (from: depthwise_conv2d_quant8.mod.py). Do not edit
+// Generated from: depthwise_conv2d_quant8.mod.py.
+namespace depthwise_conv2d_quant8 {
+// Generated depthwise_conv2d_quant8 test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace depthwise_conv2d_quant8
+
+// Create the model
+Model createTestModel() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.25f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 4,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 2,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 1, 1, 2},
+            .numberOfConsumers = 0,
+            .scale = 1.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::DEPTHWISE_CONV_2D,
+            .inputs = {0, 1, 2, 3, 3, 3, 3, 4, 4, 5, 6},
+            .outputs = {7},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1, 2};
+    const std::vector<uint32_t> outputIndexes = {7};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {{2, {0, 0}}},
+  // int -> QUANT8_ASYMM map
+  {{0, {4, 16, 4, 32, 4, 64, 4, 128}}, {1, {2, 4, 2, 0, 2, 2, 2, 0}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {8, 48}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, depthwise_conv2d_quant8) {
+  generated_tests::Execute(device,
+                           depthwise_conv2d_quant8::createTestModel,
+                           depthwise_conv2d_quant8::is_ignored,
+                           depthwise_conv2d_quant8::examples);
+}
+
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_float/conv_float.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_float/conv_float.mod.py
new file mode 100644
index 000000000..f6b3e89ca
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_float/conv_float.mod.py
@@ -0,0 +1,35 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{1, 3, 3, 1}")
+f1 = Parameter("op2", "TENSOR_FLOAT32", "{1, 2, 2, 1}", [.25, .25, .25, .25])
+b1 = Parameter("op3", "TENSOR_FLOAT32", "{1}", [0])
+pad0 = Int32Scalar("pad0", 0)
+act = Int32Scalar("act", 0)
+stride = Int32Scalar("stride", 1)
+output = Output("op4", "TENSOR_FLOAT32", "{1, 2, 2, 1}")
+
+model = model.Operation("CONV_2D", i1, f1, b1, pad0, pad0, pad0, pad0, stride, stride, act).To(output)
+model = model.RelaxedExecution(True)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [1.0, 1.0, 1.0, 1.0, 0.5, 1.0, 1.0, 1.0, 1.0]}
+
+output0 = {output: # output 0
+           [.875, .875, .875, .875]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_float/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_float/stderr.txt.expect
new file mode 100644
index 000000000..3decb4c1c
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_float/stderr.txt.expect
@@ -0,0 +1,2 @@
+Output VTS model: -
+Output example:-
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_float/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_float/stdout.txt.expect
new file mode 100644
index 000000000..ad54e14e2
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_float/stdout.txt.expect
@@ -0,0 +1,142 @@
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+// Generated from: conv_float.mod.py.
+namespace conv_float {
+// Generated conv_float test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace conv_float
+
+// Create the model
+Model createTestModel() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 3, 3, 1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 4,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 2,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 1},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 3, 3, 3, 4, 4, 5},
+            .outputs = {6},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {6};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 62, 0, 0, 128, 62, 0, 0, 128, 62, 0, 0, 128, 62, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 0.5f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {0.875f, 0.875f, 0.875f, 0.875f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel,
+                           conv_float::is_ignored,
+                           conv_float::examples);
+}
+
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_parameter/mean_implicit.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_parameter/mean_implicit.mod.py
new file mode 100644
index 000000000..be7b22bdb
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_parameter/mean_implicit.mod.py
@@ -0,0 +1,41 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+i0 = Input("i0", ("TENSOR_FLOAT32", [2, 2]))  # input 0
+
+o1 = Output("o1", ("TENSOR_FLOAT32", [1, 2])) # output for model1
+o2 = Output("o2", ("TENSOR_FLOAT32", [2, 1])) # output for model2
+o3 = Output("o3", ("TENSOR_FLOAT32", [1]))    # output for model3
+
+model1 = Model().Operation("MEAN", i0, [0], 1).To(o1)       # along axis 0, keep_dim=True
+model2 = Model().Operation("MEAN", i0, [1], 1).To(o2)       # along axis 1, keep_dim=True
+model3 = Model().Operation("MEAN", i0, [0, 1], 0).To(o3)    # along both axis, keep_dim=False
+
+inputs1 = {i0: [1, 2, 3, 4]}
+outputs11 = {o1: [4, 6]}
+outputs12 = {o2: [3, 7]}
+outputs13 = {o3: [10]}
+
+inputs2 = {i0: [-1, -2, -3, -4]}
+outputs21 = {o1: [-4, -6]}
+outputs22 = {o2: [-3, -7]}
+outputs23 = {o3: [-10]}
+
+Example((inputs1, outputs11), model=model1)
+Example((inputs1, outputs12), model=model2)
+Example((inputs1, outputs13), model=model3)
+
+Example((inputs2, outputs21), model=model1)
+Example((inputs2, outputs22), model=model2)
+Example((inputs2, outputs23), model=model3)
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_parameter/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_parameter/stderr.txt.expect
new file mode 100644
index 000000000..3decb4c1c
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_parameter/stderr.txt.expect
@@ -0,0 +1,2 @@
+Output VTS model: -
+Output example:-
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_parameter/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_parameter/stdout.txt.expect
new file mode 100644
index 000000000..f996d8470
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_parameter/stdout.txt.expect
@@ -0,0 +1,381 @@
+// clang-format off
+// Generated file (from: mean_implicit.mod.py). Do not edit
+// clang-format off
+// Generated file (from: mean_implicit.mod.py). Do not edit
+// Generated from: mean_implicit.mod.py.
+namespace mean_implicit {
+// Generated mean_implicit test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace mean_implicit
+
+// Create the model
+Model createTestModel() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2},
+            .numberOfConsumers = 3,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::MEAN,
+            .inputs = {0, 1, 2},
+            .outputs = {3},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {3};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {4.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {-1.0f, -2.0f, -3.0f, -4.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {-4.0f, -6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, mean_implicit) {
+  generated_tests::Execute(device,
+                           mean_implicit::createTestModel,
+                           mean_implicit::is_ignored,
+                           mean_implicit::examples);
+}
+
+// Create the model
+Model createTestModel_2() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2},
+            .numberOfConsumers = 3,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 1},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::MEAN,
+            .inputs = {0, 1, 2},
+            .outputs = {3},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {3};
+    std::vector<uint8_t> operandValues = {
+      1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_2(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_2 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {3.0f, 7.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {-1.0f, -2.0f, -3.0f, -4.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {-3.0f, -7.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, mean_implicit_2) {
+  generated_tests::Execute(device,
+                           mean_implicit::createTestModel_2,
+                           mean_implicit::is_ignored_2,
+                           mean_implicit::examples_2);
+}
+
+// Create the model
+Model createTestModel_3() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2},
+            .numberOfConsumers = 3,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 8},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::MEAN,
+            .inputs = {0, 1, 2},
+            .outputs = {3},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {3};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_3(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_3 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {10.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {-1.0f, -2.0f, -3.0f, -4.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {-10.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, mean_implicit_3) {
+  generated_tests::Execute(device,
+                           mean_implicit::createTestModel_3,
+                           mean_implicit::is_ignored_3,
+                           mean_implicit::examples_3);
+}
+
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_variation/conv_float.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_variation/conv_float.mod.py
new file mode 100644
index 000000000..826f390c0
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_variation/conv_float.mod.py
@@ -0,0 +1,52 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{1, 2, 2, 2}")
+f1 = Parameter("op2", "TENSOR_FLOAT32", "{2, 2, 2, 2}", [1, 2, 3, 4, 5, 6, 7, 8, 8, 7, 6, 5, 4, 3, 2, 1])
+b1 = Parameter("op3", "TENSOR_FLOAT32", "{1}", [-200])
+output = Output("op4", "TENSOR_FLOAT32", "{1, 2, 2, 2}")
+act = Int32Scalar("act", 0) # None activation
+layout = Int32Scalar("layout", 0) # NHWC
+
+model = model.Operation("CONV_2D", i1, f1, b1, 1, 1, 1, act, layout).To(output)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [1, 2, 3, 4, 5, 6, 7, 8]}
+
+output0 = {output: # output 0
+           [204, 120, 94, 104, 70, 164, 23, 112]}
+
+quant8 = DataTypeConverter().Identify({
+    i1: ("TENSOR_QUANT8_ASYMM", 0.5, 128),
+    f1: ("TENSOR_QUANT8_ASYMM", 0.25, 128),
+    b1: ("TENSOR_INT32", 0.125, 0),
+    output: ("TENSOR_QUANT8_ASYMM", 2, 100)
+})
+
+# Instantiate an example
+Example(
+    (input0, output0)
+).AddVariations(
+    ("NCHW", [i1, f1, output], [layout])
+).AddVariations(
+    ("relu", [output], [act]),
+    ("relu6", [output], [act]),
+    includeDefault=False
+).AddVariations(
+    ("as_input", [f1])
+).AddVariations(
+    "relaxed", quant8
+)
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_variation/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_variation/stderr.txt.expect
new file mode 100644
index 000000000..3decb4c1c
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_variation/stderr.txt.expect
@@ -0,0 +1,2 @@
+Output VTS model: -
+Output example:-
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_variation/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_variation/stdout.txt.expect
new file mode 100644
index 000000000..7e100da9b
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_implicit_variation/stdout.txt.expect
@@ -0,0 +1,3548 @@
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+// Generated from: conv_float.mod.py.
+namespace conv_float {
+// Generated conv_float test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace conv_float
+
+// Create the model
+Model createTestModel_relu() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 0, 64, 0, 0, 64, 64, 0, 0, 128, 64, 0, 0, 160, 64, 0, 0, 192, 64, 0, 0, 224, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 224, 64, 0, 0, 192, 64, 0, 0, 160, 64, 0, 0, 128, 64, 0, 0, 64, 64, 0, 0, 0, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu,
+                           conv_float::is_ignored_relu,
+                           conv_float::examples_relu);
+}
+
+// Create the model
+Model createTestModel_relu_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 0, 64, 0, 0, 64, 64, 0, 0, 128, 64, 0, 0, 160, 64, 0, 0, 192, 64, 0, 0, 224, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 224, 64, 0, 0, 192, 64, 0, 0, 160, 64, 0, 0, 128, 64, 0, 0, 64, 64, 0, 0, 0, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_relu_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu_relaxed,
+                           conv_float::is_ignored_relu_relaxed,
+                           conv_float::examples_relu_relaxed);
+}
+
+// Create the model
+Model createTestModel_relu_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 32, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 36, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132, 192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 160, 147, 152, 135, 182, 112, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu_quant8,
+                           conv_float::is_ignored_relu_quant8,
+                           conv_float::examples_relu_quant8);
+}
+
+// Create the model
+Model createTestModel_relu_weight_as_input() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu_weight_as_input) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu_weight_as_input,
+                           conv_float::is_ignored_relu_weight_as_input,
+                           conv_float::examples_relu_weight_as_input);
+}
+
+// Create the model
+Model createTestModel_relu_weight_as_input_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_relu_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu_weight_as_input_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu_weight_as_input_relaxed,
+                           conv_float::is_ignored_relu_weight_as_input_relaxed,
+                           conv_float::examples_relu_weight_as_input_relaxed);
+}
+
+// Create the model
+Model createTestModel_relu_weight_as_input_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}, {1, {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 160, 147, 152, 135, 182, 112, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu_weight_as_input_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu_weight_as_input_quant8,
+                           conv_float::is_ignored_relu_weight_as_input_quant8,
+                           conv_float::examples_relu_weight_as_input_quant8);
+}
+
+// Create the model
+Model createTestModel_relu6() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 0, 64, 0, 0, 64, 64, 0, 0, 128, 64, 0, 0, 160, 64, 0, 0, 192, 64, 0, 0, 224, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 224, 64, 0, 0, 192, 64, 0, 0, 160, 64, 0, 0, 128, 64, 0, 0, 64, 64, 0, 0, 0, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu6(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu6) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu6,
+                           conv_float::is_ignored_relu6,
+                           conv_float::examples_relu6);
+}
+
+// Create the model
+Model createTestModel_relu6_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 0, 64, 0, 0, 64, 64, 0, 0, 128, 64, 0, 0, 160, 64, 0, 0, 192, 64, 0, 0, 224, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 224, 64, 0, 0, 192, 64, 0, 0, 160, 64, 0, 0, 128, 64, 0, 0, 64, 64, 0, 0, 0, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_relu6_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu6_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu6_relaxed,
+                           conv_float::is_ignored_relu6_relaxed,
+                           conv_float::examples_relu6_relaxed);
+}
+
+// Create the model
+Model createTestModel_relu6_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 32, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 36, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132, 192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu6_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu6_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu6_quant8,
+                           conv_float::is_ignored_relu6_quant8,
+                           conv_float::examples_relu6_quant8);
+}
+
+// Create the model
+Model createTestModel_relu6_weight_as_input() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu6_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu6_weight_as_input) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu6_weight_as_input,
+                           conv_float::is_ignored_relu6_weight_as_input,
+                           conv_float::examples_relu6_weight_as_input);
+}
+
+// Create the model
+Model createTestModel_relu6_weight_as_input_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_relu6_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu6_weight_as_input_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu6_weight_as_input_relaxed,
+                           conv_float::is_ignored_relu6_weight_as_input_relaxed,
+                           conv_float::examples_relu6_weight_as_input_relaxed);
+}
+
+// Create the model
+Model createTestModel_relu6_weight_as_input_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu6_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}, {1, {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu6_weight_as_input_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu6_weight_as_input_quant8,
+                           conv_float::is_ignored_relu6_weight_as_input_quant8,
+                           conv_float::examples_relu6_weight_as_input_quant8);
+}
+
+// Create the model
+Model createTestModel_nchw_relu() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 64, 64, 0, 0, 160, 64, 0, 0, 224, 64, 0, 0, 0, 64, 0, 0, 128, 64, 0, 0, 192, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 192, 64, 0, 0, 128, 64, 0, 0, 0, 64, 0, 0, 224, 64, 0, 0, 160, 64, 0, 0, 64, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu,
+                           conv_float::is_ignored_nchw_relu,
+                           conv_float::examples_nchw_relu);
+}
+
+// Create the model
+Model createTestModel_nchw_relu_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 64, 64, 0, 0, 160, 64, 0, 0, 224, 64, 0, 0, 0, 64, 0, 0, 128, 64, 0, 0, 192, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 192, 64, 0, 0, 128, 64, 0, 0, 0, 64, 0, 0, 224, 64, 0, 0, 160, 64, 0, 0, 64, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_nchw_relu_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu_relaxed,
+                           conv_float::is_ignored_nchw_relu_relaxed,
+                           conv_float::examples_nchw_relu_relaxed);
+}
+
+// Create the model
+Model createTestModel_nchw_relu_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 32, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 36, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132, 192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 147, 135, 112, 160, 152, 182, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu_quant8,
+                           conv_float::is_ignored_nchw_relu_quant8,
+                           conv_float::examples_nchw_relu_quant8);
+}
+
+// Create the model
+Model createTestModel_nchw_relu_weight_as_input() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu_weight_as_input) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu_weight_as_input,
+                           conv_float::is_ignored_nchw_relu_weight_as_input,
+                           conv_float::examples_nchw_relu_weight_as_input);
+}
+
+// Create the model
+Model createTestModel_nchw_relu_weight_as_input_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_nchw_relu_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu_weight_as_input_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu_weight_as_input_relaxed,
+                           conv_float::is_ignored_nchw_relu_weight_as_input_relaxed,
+                           conv_float::examples_nchw_relu_weight_as_input_relaxed);
+}
+
+// Create the model
+Model createTestModel_nchw_relu_weight_as_input_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}, {1, {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 147, 135, 112, 160, 152, 182, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu_weight_as_input_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu_weight_as_input_quant8,
+                           conv_float::is_ignored_nchw_relu_weight_as_input_quant8,
+                           conv_float::examples_nchw_relu_weight_as_input_quant8);
+}
+
+// Create the model
+Model createTestModel_nchw_relu6() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 64, 64, 0, 0, 160, 64, 0, 0, 224, 64, 0, 0, 0, 64, 0, 0, 128, 64, 0, 0, 192, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 192, 64, 0, 0, 128, 64, 0, 0, 0, 64, 0, 0, 224, 64, 0, 0, 160, 64, 0, 0, 64, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu6(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu6) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu6,
+                           conv_float::is_ignored_nchw_relu6,
+                           conv_float::examples_nchw_relu6);
+}
+
+// Create the model
+Model createTestModel_nchw_relu6_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 64, 64, 0, 0, 160, 64, 0, 0, 224, 64, 0, 0, 0, 64, 0, 0, 128, 64, 0, 0, 192, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 192, 64, 0, 0, 128, 64, 0, 0, 0, 64, 0, 0, 224, 64, 0, 0, 160, 64, 0, 0, 64, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_nchw_relu6_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu6_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu6_relaxed,
+                           conv_float::is_ignored_nchw_relu6_relaxed,
+                           conv_float::examples_nchw_relu6_relaxed);
+}
+
+// Create the model
+Model createTestModel_nchw_relu6_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 32, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 36, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132, 192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu6_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu6_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu6_quant8,
+                           conv_float::is_ignored_nchw_relu6_quant8,
+                           conv_float::examples_nchw_relu6_quant8);
+}
+
+// Create the model
+Model createTestModel_nchw_relu6_weight_as_input() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu6_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu6_weight_as_input) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu6_weight_as_input,
+                           conv_float::is_ignored_nchw_relu6_weight_as_input,
+                           conv_float::examples_nchw_relu6_weight_as_input);
+}
+
+// Create the model
+Model createTestModel_nchw_relu6_weight_as_input_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_nchw_relu6_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu6_weight_as_input_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu6_weight_as_input_relaxed,
+                           conv_float::is_ignored_nchw_relu6_weight_as_input_relaxed,
+                           conv_float::examples_nchw_relu6_weight_as_input_relaxed);
+}
+
+// Create the model
+Model createTestModel_nchw_relu6_weight_as_input_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu6_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}, {1, {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu6_weight_as_input_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu6_weight_as_input_quant8,
+                           conv_float::is_ignored_nchw_relu6_weight_as_input_quant8,
+                           conv_float::examples_nchw_relu6_weight_as_input_quant8);
+}
+
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_internal/add_internal.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_internal/add_internal.mod.py
new file mode 100644
index 000000000..28c4afc52
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_internal/add_internal.mod.py
@@ -0,0 +1,71 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+model = Model()
+
+i0 = Input("i0", ("TENSOR_FLOAT32", [2]))  # input 0
+i1 = Input("i1", ("TENSOR_FLOAT32", [2]))  # input 0
+i2 = Input("i2", ("TENSOR_FLOAT32", [2]))  # input 0
+i3 = Input("i3", ("TENSOR_FLOAT32", [2]))  # input 0
+i4 = Input("i4", ("TENSOR_FLOAT32", [2]))  # input 0
+i5 = Input("i5", ("TENSOR_FLOAT32", [2]))  # input 0
+i6 = Input("i6", ("TENSOR_FLOAT32", [2]))  # input 0
+i7 = Input("i7", ("TENSOR_FLOAT32", [2]))  # input 0
+i8 = Input("i8", ("TENSOR_FLOAT32", [2]))  # input 0
+
+t0 = Internal("t0", ("TENSOR_FLOAT32", [2]))
+t1 = Internal("t1", ("TENSOR_FLOAT32", [2]))
+t2 = Internal("t2", ("TENSOR_FLOAT32", [2]))
+t3 = Internal("t3", ("TENSOR_FLOAT32", [2]))
+t4 = Internal("t4", ("TENSOR_FLOAT32", [2]))
+t5 = Internal("t5", ("TENSOR_FLOAT32", [2]))
+t6 = Internal("t6", ("TENSOR_FLOAT32", [2]))
+
+o0 = Output("o0", ("TENSOR_FLOAT32", [2]))
+o1 = Output("o1", ("TENSOR_FLOAT32", [2]))
+o2 = Output("o2", ("TENSOR_FLOAT32", [2]))
+
+p0 = Parameter("p0", ("TENSOR_FLOAT32", [2]), [0.0, 1.0])
+act = Int32Scalar("act", 0)
+
+model.Operation("ADD", o0, o1, act).To(o2)
+model.Operation("ADD", p0, t5, act).To(t6)
+model.Operation("ADD", i2, t0, act).To(t1)
+model.Operation("ADD", i6, p0, act).To(t5)
+model.Operation("ADD", i0, i1, act).To(t0)
+model.Operation("ADD", t1, t3, act).To(t4)
+model.Operation("ADD", t2, i5, act).To(t3)
+model.Operation("ADD", t4, t6, act).To(o0)
+model.Operation("ADD", i3, i4, act).To(t2)
+model.Operation("ADD", i7, i8, act).To(o1)
+
+inputs = {
+    i0: [0, 0],
+    i1: [0, 0],
+    i2: [0, 0],
+    i3: [0, 0],
+    i4: [0, 0],
+    i5: [0, 0],
+    i6: [0, 0],
+    i7: [0, 0],
+    i8: [0, 0]
+}
+
+outputs = {
+    o0: [0, 2],
+    o1: [0, 0],
+    o2: [0, 2]
+}
+
+Example((inputs, outputs))
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_internal/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_internal/stderr.txt.expect
new file mode 100644
index 000000000..3decb4c1c
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_internal/stderr.txt.expect
@@ -0,0 +1,2 @@
+Output VTS model: -
+Output example:-
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_internal/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_internal/stdout.txt.expect
new file mode 100644
index 000000000..c656504a1
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_internal/stdout.txt.expect
@@ -0,0 +1,312 @@
+// clang-format off
+// Generated file (from: add_internal.mod.py). Do not edit
+// clang-format off
+// Generated file (from: add_internal.mod.py). Do not edit
+// Generated from: add_internal.mod.py.
+namespace add_internal {
+// Generated add_internal test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace add_internal
+
+// Create the model
+Model createTestModel() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 10,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 2,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 8},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::TEMPORARY_VARIABLE,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::TEMPORARY_VARIABLE,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::TEMPORARY_VARIABLE,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::TEMPORARY_VARIABLE,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::TEMPORARY_VARIABLE,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::TEMPORARY_VARIABLE,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::TEMPORARY_VARIABLE,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::ADD,
+            .inputs = {10, 4, 2},
+            .outputs = {5},
+        },
+        {
+            .type = OperationType::ADD,
+            .inputs = {4, 5, 2},
+            .outputs = {6},
+        },
+        {
+            .type = OperationType::ADD,
+            .inputs = {11, 12, 2},
+            .outputs = {8},
+        },
+        {
+            .type = OperationType::ADD,
+            .inputs = {7, 8, 2},
+            .outputs = {9},
+        },
+        {
+            .type = OperationType::ADD,
+            .inputs = {17, 18, 2},
+            .outputs = {15},
+        },
+        {
+            .type = OperationType::ADD,
+            .inputs = {15, 16, 2},
+            .outputs = {13},
+        },
+        {
+            .type = OperationType::ADD,
+            .inputs = {9, 13, 2},
+            .outputs = {14},
+        },
+        {
+            .type = OperationType::ADD,
+            .inputs = {14, 6, 2},
+            .outputs = {0},
+        },
+        {
+            .type = OperationType::ADD,
+            .inputs = {19, 20, 2},
+            .outputs = {1},
+        },
+        {
+            .type = OperationType::ADD,
+            .inputs = {0, 1, 2},
+            .outputs = {3},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {7, 10, 11, 12, 16, 17, 18, 19, 20};
+    const std::vector<uint32_t> outputIndexes = {0, 1, 3};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 128, 63
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {0.0f, 0.0f}}, {1, {0.0f, 0.0f}}, {2, {0.0f, 0.0f}}, {3, {0.0f, 0.0f}}, {4, {0.0f, 0.0f}}, {5, {0.0f, 0.0f}}, {6, {0.0f, 0.0f}}, {7, {0.0f, 0.0f}}, {8, {0.0f, 0.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {0.0f, 2.0f}}, {1, {0.0f, 0.0f}}, {2, {0.0f, 2.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, add_internal) {
+  generated_tests::Execute(device,
+                           add_internal::createTestModel,
+                           add_internal::is_ignored,
+                           add_internal::examples);
+}
+
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_naming/conv_float.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_naming/conv_float.mod.py
new file mode 100644
index 000000000..61f7c92ee
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_naming/conv_float.mod.py
@@ -0,0 +1,61 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+model = Model("model_name")
+i1 = Input("op1", "TENSOR_FLOAT32", "{1, 2, 2, 2}")
+f1 = Parameter("op2", "TENSOR_FLOAT32", "{2, 2, 2, 2}", [1, 2, 3, 4, 5, 6, 7, 8, 8, 7, 6, 5, 4, 3, 2, 1])
+b1 = Parameter("op3", "TENSOR_FLOAT32", "{1}", [-200])
+output = Output("op4", "TENSOR_FLOAT32", "{1, 2, 2, 2}")
+act = Int32Scalar("act", 0) # None activation
+layout = Int32Scalar("layout", 0) # NHWC
+pad = Int32Scalar("param", 1)
+stride0 = Int32Scalar("param1", 1)
+stride1 = Int32Scalar("param2", 1)
+
+model = model.Operation("CONV_2D", i1, f1, b1, pad, stride0, stride1, act, layout).To(output)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [1, 2, 3, 4, 5, 6, 7, 8]}
+
+output0 = {output: # output 0
+           [204, 120, 94, 104, 70, 164, 23, 112]}
+
+quant8 = DataTypeConverter(name="quantized").Identify({
+    i1: ("TENSOR_QUANT8_ASYMM", 0.5, 128),
+    f1: ("TENSOR_QUANT8_ASYMM", 0.25, 128),
+    b1: ("TENSOR_INT32", 0.125, 0),
+    output: ("TENSOR_QUANT8_ASYMM", 2, 100)
+})
+nchw = DataLayoutConverter("NCHW", name="nchw_layout").Identify([i1, f1, output], [layout])
+relu = ActivationConverter("relu", name="act").Identify([output], [act])
+relu6 = ActivationConverter("relu6").Identify([output], [act])
+weight_as_input = ParameterAsInputConverter(name="w_as_input").Identify([f1])
+relax = RelaxedModeConverter(True, name="float_relaxed")
+
+# Instantiate an example
+# Will produce cartesian product of
+# [nhwc, nchw_layout] * [act, relu6] * [w_as_param, w_as_input] * [float, float_relaxed, quantized]
+# 24 variations
+Example(
+    (input0, output0), name="example_name"
+).AddVariations(
+    nchw, defaultName="nhwc"
+).AddVariations(
+    relu, relu6, includeDefault=False
+).AddVariations(
+    weight_as_input, defaultName="w_as_param"
+).AddVariations(
+    relax, quant8, defaultName="float"
+)
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_naming/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_naming/stderr.txt.expect
new file mode 100644
index 000000000..3decb4c1c
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_naming/stderr.txt.expect
@@ -0,0 +1,2 @@
+Output VTS model: -
+Output example:-
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_naming/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_naming/stdout.txt.expect
new file mode 100644
index 000000000..892700036
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_naming/stdout.txt.expect
@@ -0,0 +1,3548 @@
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+// Generated from: conv_float.mod.py.
+namespace conv_float {
+// Generated conv_float test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace conv_float
+
+// Create the model
+Model createTestModel_model_name_nhwc_act_w_as_param_float() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 0, 64, 0, 0, 64, 64, 0, 0, 128, 64, 0, 0, 160, 64, 0, 0, 192, 64, 0, 0, 224, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 224, 64, 0, 0, 192, 64, 0, 0, 160, 64, 0, 0, 128, 64, 0, 0, 64, 64, 0, 0, 0, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_model_name_nhwc_act_w_as_param_float(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_act_w_as_param_float = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nhwc_act_w_as_param_float) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nhwc_act_w_as_param_float,
+                           conv_float::is_ignored_model_name_nhwc_act_w_as_param_float,
+                           conv_float::examples_model_name_example_name_nhwc_act_w_as_param_float);
+}
+
+// Create the model
+Model createTestModel_model_name_nhwc_act_w_as_param_float_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 0, 64, 0, 0, 64, 64, 0, 0, 128, 64, 0, 0, 160, 64, 0, 0, 192, 64, 0, 0, 224, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 224, 64, 0, 0, 192, 64, 0, 0, 160, 64, 0, 0, 128, 64, 0, 0, 64, 64, 0, 0, 0, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_model_name_nhwc_act_w_as_param_float_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_act_w_as_param_float_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nhwc_act_w_as_param_float_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nhwc_act_w_as_param_float_relaxed,
+                           conv_float::is_ignored_model_name_nhwc_act_w_as_param_float_relaxed,
+                           conv_float::examples_model_name_example_name_nhwc_act_w_as_param_float_relaxed);
+}
+
+// Create the model
+Model createTestModel_model_name_nhwc_act_w_as_param_quantized() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 32, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 36, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132, 192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_model_name_nhwc_act_w_as_param_quantized(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_act_w_as_param_quantized = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 160, 147, 152, 135, 182, 112, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nhwc_act_w_as_param_quantized) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nhwc_act_w_as_param_quantized,
+                           conv_float::is_ignored_model_name_nhwc_act_w_as_param_quantized,
+                           conv_float::examples_model_name_example_name_nhwc_act_w_as_param_quantized);
+}
+
+// Create the model
+Model createTestModel_model_name_nhwc_act_w_as_input_float() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_model_name_nhwc_act_w_as_input_float(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_act_w_as_input_float = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nhwc_act_w_as_input_float) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nhwc_act_w_as_input_float,
+                           conv_float::is_ignored_model_name_nhwc_act_w_as_input_float,
+                           conv_float::examples_model_name_example_name_nhwc_act_w_as_input_float);
+}
+
+// Create the model
+Model createTestModel_model_name_nhwc_act_w_as_input_float_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_model_name_nhwc_act_w_as_input_float_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_act_w_as_input_float_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nhwc_act_w_as_input_float_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nhwc_act_w_as_input_float_relaxed,
+                           conv_float::is_ignored_model_name_nhwc_act_w_as_input_float_relaxed,
+                           conv_float::examples_model_name_example_name_nhwc_act_w_as_input_float_relaxed);
+}
+
+// Create the model
+Model createTestModel_model_name_nhwc_act_w_as_input_quantized() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_model_name_nhwc_act_w_as_input_quantized(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_act_w_as_input_quantized = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}, {1, {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 160, 147, 152, 135, 182, 112, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nhwc_act_w_as_input_quantized) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nhwc_act_w_as_input_quantized,
+                           conv_float::is_ignored_model_name_nhwc_act_w_as_input_quantized,
+                           conv_float::examples_model_name_example_name_nhwc_act_w_as_input_quantized);
+}
+
+// Create the model
+Model createTestModel_model_name_nhwc_relu6_w_as_param_float() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 0, 64, 0, 0, 64, 64, 0, 0, 128, 64, 0, 0, 160, 64, 0, 0, 192, 64, 0, 0, 224, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 224, 64, 0, 0, 192, 64, 0, 0, 160, 64, 0, 0, 128, 64, 0, 0, 64, 64, 0, 0, 0, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_model_name_nhwc_relu6_w_as_param_float(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_relu6_w_as_param_float = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nhwc_relu6_w_as_param_float) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nhwc_relu6_w_as_param_float,
+                           conv_float::is_ignored_model_name_nhwc_relu6_w_as_param_float,
+                           conv_float::examples_model_name_example_name_nhwc_relu6_w_as_param_float);
+}
+
+// Create the model
+Model createTestModel_model_name_nhwc_relu6_w_as_param_float_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 0, 64, 0, 0, 64, 64, 0, 0, 128, 64, 0, 0, 160, 64, 0, 0, 192, 64, 0, 0, 224, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 224, 64, 0, 0, 192, 64, 0, 0, 160, 64, 0, 0, 128, 64, 0, 0, 64, 64, 0, 0, 0, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_model_name_nhwc_relu6_w_as_param_float_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_relu6_w_as_param_float_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nhwc_relu6_w_as_param_float_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nhwc_relu6_w_as_param_float_relaxed,
+                           conv_float::is_ignored_model_name_nhwc_relu6_w_as_param_float_relaxed,
+                           conv_float::examples_model_name_example_name_nhwc_relu6_w_as_param_float_relaxed);
+}
+
+// Create the model
+Model createTestModel_model_name_nhwc_relu6_w_as_param_quantized() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 32, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 36, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132, 192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_model_name_nhwc_relu6_w_as_param_quantized(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_relu6_w_as_param_quantized = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nhwc_relu6_w_as_param_quantized) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nhwc_relu6_w_as_param_quantized,
+                           conv_float::is_ignored_model_name_nhwc_relu6_w_as_param_quantized,
+                           conv_float::examples_model_name_example_name_nhwc_relu6_w_as_param_quantized);
+}
+
+// Create the model
+Model createTestModel_model_name_nhwc_relu6_w_as_input_float() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_model_name_nhwc_relu6_w_as_input_float(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_relu6_w_as_input_float = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nhwc_relu6_w_as_input_float) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nhwc_relu6_w_as_input_float,
+                           conv_float::is_ignored_model_name_nhwc_relu6_w_as_input_float,
+                           conv_float::examples_model_name_example_name_nhwc_relu6_w_as_input_float);
+}
+
+// Create the model
+Model createTestModel_model_name_nhwc_relu6_w_as_input_float_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_model_name_nhwc_relu6_w_as_input_float_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_relu6_w_as_input_float_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nhwc_relu6_w_as_input_float_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nhwc_relu6_w_as_input_float_relaxed,
+                           conv_float::is_ignored_model_name_nhwc_relu6_w_as_input_float_relaxed,
+                           conv_float::examples_model_name_example_name_nhwc_relu6_w_as_input_float_relaxed);
+}
+
+// Create the model
+Model createTestModel_model_name_nhwc_relu6_w_as_input_quantized() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_model_name_nhwc_relu6_w_as_input_quantized(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nhwc_relu6_w_as_input_quantized = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}, {1, {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nhwc_relu6_w_as_input_quantized) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nhwc_relu6_w_as_input_quantized,
+                           conv_float::is_ignored_model_name_nhwc_relu6_w_as_input_quantized,
+                           conv_float::examples_model_name_example_name_nhwc_relu6_w_as_input_quantized);
+}
+
+// Create the model
+Model createTestModel_model_name_nchw_layout_act_w_as_param_float() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 64, 64, 0, 0, 160, 64, 0, 0, 224, 64, 0, 0, 0, 64, 0, 0, 128, 64, 0, 0, 192, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 192, 64, 0, 0, 128, 64, 0, 0, 0, 64, 0, 0, 224, 64, 0, 0, 160, 64, 0, 0, 64, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_model_name_nchw_layout_act_w_as_param_float(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_act_w_as_param_float = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nchw_layout_act_w_as_param_float) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nchw_layout_act_w_as_param_float,
+                           conv_float::is_ignored_model_name_nchw_layout_act_w_as_param_float,
+                           conv_float::examples_model_name_example_name_nchw_layout_act_w_as_param_float);
+}
+
+// Create the model
+Model createTestModel_model_name_nchw_layout_act_w_as_param_float_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 64, 64, 0, 0, 160, 64, 0, 0, 224, 64, 0, 0, 0, 64, 0, 0, 128, 64, 0, 0, 192, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 192, 64, 0, 0, 128, 64, 0, 0, 0, 64, 0, 0, 224, 64, 0, 0, 160, 64, 0, 0, 64, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_model_name_nchw_layout_act_w_as_param_float_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_act_w_as_param_float_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nchw_layout_act_w_as_param_float_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nchw_layout_act_w_as_param_float_relaxed,
+                           conv_float::is_ignored_model_name_nchw_layout_act_w_as_param_float_relaxed,
+                           conv_float::examples_model_name_example_name_nchw_layout_act_w_as_param_float_relaxed);
+}
+
+// Create the model
+Model createTestModel_model_name_nchw_layout_act_w_as_param_quantized() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 32, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 36, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132, 192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_model_name_nchw_layout_act_w_as_param_quantized(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_act_w_as_param_quantized = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 147, 135, 112, 160, 152, 182, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nchw_layout_act_w_as_param_quantized) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nchw_layout_act_w_as_param_quantized,
+                           conv_float::is_ignored_model_name_nchw_layout_act_w_as_param_quantized,
+                           conv_float::examples_model_name_example_name_nchw_layout_act_w_as_param_quantized);
+}
+
+// Create the model
+Model createTestModel_model_name_nchw_layout_act_w_as_input_float() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_model_name_nchw_layout_act_w_as_input_float(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_act_w_as_input_float = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nchw_layout_act_w_as_input_float) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nchw_layout_act_w_as_input_float,
+                           conv_float::is_ignored_model_name_nchw_layout_act_w_as_input_float,
+                           conv_float::examples_model_name_example_name_nchw_layout_act_w_as_input_float);
+}
+
+// Create the model
+Model createTestModel_model_name_nchw_layout_act_w_as_input_float_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_model_name_nchw_layout_act_w_as_input_float_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_act_w_as_input_float_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nchw_layout_act_w_as_input_float_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nchw_layout_act_w_as_input_float_relaxed,
+                           conv_float::is_ignored_model_name_nchw_layout_act_w_as_input_float_relaxed,
+                           conv_float::examples_model_name_example_name_nchw_layout_act_w_as_input_float_relaxed);
+}
+
+// Create the model
+Model createTestModel_model_name_nchw_layout_act_w_as_input_quantized() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_model_name_nchw_layout_act_w_as_input_quantized(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_act_w_as_input_quantized = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}, {1, {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 147, 135, 112, 160, 152, 182, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nchw_layout_act_w_as_input_quantized) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nchw_layout_act_w_as_input_quantized,
+                           conv_float::is_ignored_model_name_nchw_layout_act_w_as_input_quantized,
+                           conv_float::examples_model_name_example_name_nchw_layout_act_w_as_input_quantized);
+}
+
+// Create the model
+Model createTestModel_model_name_nchw_layout_relu6_w_as_param_float() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 64, 64, 0, 0, 160, 64, 0, 0, 224, 64, 0, 0, 0, 64, 0, 0, 128, 64, 0, 0, 192, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 192, 64, 0, 0, 128, 64, 0, 0, 0, 64, 0, 0, 224, 64, 0, 0, 160, 64, 0, 0, 64, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_model_name_nchw_layout_relu6_w_as_param_float(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_relu6_w_as_param_float = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nchw_layout_relu6_w_as_param_float) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nchw_layout_relu6_w_as_param_float,
+                           conv_float::is_ignored_model_name_nchw_layout_relu6_w_as_param_float,
+                           conv_float::examples_model_name_example_name_nchw_layout_relu6_w_as_param_float);
+}
+
+// Create the model
+Model createTestModel_model_name_nchw_layout_relu6_w_as_param_float_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 64, 64, 0, 0, 160, 64, 0, 0, 224, 64, 0, 0, 0, 64, 0, 0, 128, 64, 0, 0, 192, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 192, 64, 0, 0, 128, 64, 0, 0, 0, 64, 0, 0, 224, 64, 0, 0, 160, 64, 0, 0, 64, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_model_name_nchw_layout_relu6_w_as_param_float_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_relu6_w_as_param_float_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nchw_layout_relu6_w_as_param_float_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nchw_layout_relu6_w_as_param_float_relaxed,
+                           conv_float::is_ignored_model_name_nchw_layout_relu6_w_as_param_float_relaxed,
+                           conv_float::examples_model_name_example_name_nchw_layout_relu6_w_as_param_float_relaxed);
+}
+
+// Create the model
+Model createTestModel_model_name_nchw_layout_relu6_w_as_param_quantized() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 32, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 36, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132, 192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_model_name_nchw_layout_relu6_w_as_param_quantized(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_relu6_w_as_param_quantized = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nchw_layout_relu6_w_as_param_quantized) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nchw_layout_relu6_w_as_param_quantized,
+                           conv_float::is_ignored_model_name_nchw_layout_relu6_w_as_param_quantized,
+                           conv_float::examples_model_name_example_name_nchw_layout_relu6_w_as_param_quantized);
+}
+
+// Create the model
+Model createTestModel_model_name_nchw_layout_relu6_w_as_input_float() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_model_name_nchw_layout_relu6_w_as_input_float(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_relu6_w_as_input_float = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nchw_layout_relu6_w_as_input_float) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nchw_layout_relu6_w_as_input_float,
+                           conv_float::is_ignored_model_name_nchw_layout_relu6_w_as_input_float,
+                           conv_float::examples_model_name_example_name_nchw_layout_relu6_w_as_input_float);
+}
+
+// Create the model
+Model createTestModel_model_name_nchw_layout_relu6_w_as_input_float_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_model_name_nchw_layout_relu6_w_as_input_float_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_relu6_w_as_input_float_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nchw_layout_relu6_w_as_input_float_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nchw_layout_relu6_w_as_input_float_relaxed,
+                           conv_float::is_ignored_model_name_nchw_layout_relu6_w_as_input_float_relaxed,
+                           conv_float::examples_model_name_example_name_nchw_layout_relu6_w_as_input_float_relaxed);
+}
+
+// Create the model
+Model createTestModel_model_name_nchw_layout_relu6_w_as_input_quantized() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_model_name_nchw_layout_relu6_w_as_input_quantized(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_model_name_example_name_nchw_layout_relu6_w_as_input_quantized = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}, {1, {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_model_name_example_name_nchw_layout_relu6_w_as_input_quantized) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_model_name_nchw_layout_relu6_w_as_input_quantized,
+                           conv_float::is_ignored_model_name_nchw_layout_relu6_w_as_input_quantized,
+                           conv_float::examples_model_name_example_name_nchw_layout_relu6_w_as_input_quantized);
+}
+
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_quant8/conv_quant8.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_quant8/conv_quant8.mod.py
new file mode 100644
index 000000000..f6b3e89ca
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_quant8/conv_quant8.mod.py
@@ -0,0 +1,35 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{1, 3, 3, 1}")
+f1 = Parameter("op2", "TENSOR_FLOAT32", "{1, 2, 2, 1}", [.25, .25, .25, .25])
+b1 = Parameter("op3", "TENSOR_FLOAT32", "{1}", [0])
+pad0 = Int32Scalar("pad0", 0)
+act = Int32Scalar("act", 0)
+stride = Int32Scalar("stride", 1)
+output = Output("op4", "TENSOR_FLOAT32", "{1, 2, 2, 1}")
+
+model = model.Operation("CONV_2D", i1, f1, b1, pad0, pad0, pad0, pad0, stride, stride, act).To(output)
+model = model.RelaxedExecution(True)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [1.0, 1.0, 1.0, 1.0, 0.5, 1.0, 1.0, 1.0, 1.0]}
+
+output0 = {output: # output 0
+           [.875, .875, .875, .875]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_quant8/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_quant8/stderr.txt.expect
new file mode 100644
index 000000000..3decb4c1c
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_quant8/stderr.txt.expect
@@ -0,0 +1,2 @@
+Output VTS model: -
+Output example:-
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_quant8/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_quant8/stdout.txt.expect
new file mode 100644
index 000000000..0df371ba0
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_quant8/stdout.txt.expect
@@ -0,0 +1,142 @@
+// clang-format off
+// Generated file (from: conv_quant8.mod.py). Do not edit
+// clang-format off
+// Generated file (from: conv_quant8.mod.py). Do not edit
+// Generated from: conv_quant8.mod.py.
+namespace conv_quant8 {
+// Generated conv_quant8 test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace conv_quant8
+
+// Create the model
+Model createTestModel() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 3, 3, 1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 4,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 2,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 1},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 3, 3, 3, 4, 4, 5},
+            .outputs = {6},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {6};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 62, 0, 0, 128, 62, 0, 0, 128, 62, 0, 0, 128, 62, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 0.5f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {0.875f, 0.875f, 0.875f, 0.875f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_quant8) {
+  generated_tests::Execute(device,
+                           conv_quant8::createTestModel,
+                           conv_quant8::is_ignored,
+                           conv_quant8::examples);
+}
+
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_variation/conv_float.mod.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_variation/conv_float.mod.py
new file mode 100644
index 000000000..c95696203
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_variation/conv_float.mod.py
@@ -0,0 +1,46 @@
+# Copyright 2018, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{1, 2, 2, 2}")
+f1 = Parameter("op2", "TENSOR_FLOAT32", "{2, 2, 2, 2}", [1, 2, 3, 4, 5, 6, 7, 8, 8, 7, 6, 5, 4, 3, 2, 1])
+b1 = Parameter("op3", "TENSOR_FLOAT32", "{1}", [-200])
+output = Output("op4", "TENSOR_FLOAT32", "{1, 2, 2, 2}")
+act = Int32Scalar("act", 0) # None activation
+layout = Int32Scalar("layout", 0) # NHWC
+pad = Int32Scalar("param", 1)
+stride0 = Int32Scalar("param1", 1)
+stride1 = Int32Scalar("param2", 1)
+
+model = model.Operation("CONV_2D", i1, f1, b1, pad, stride0, stride1, act, layout).To(output)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [1, 2, 3, 4, 5, 6, 7, 8]}
+
+output0 = {output: # output 0
+           [204, 120, 94, 104, 70, 164, 23, 112]}
+
+quant8 = DataTypeConverter().Identify({
+    i1: ("TENSOR_QUANT8_ASYMM", 0.5, 128),
+    f1: ("TENSOR_QUANT8_ASYMM", 0.25, 128),
+    b1: ("TENSOR_INT32", 0.125, 0),
+    output: ("TENSOR_QUANT8_ASYMM", 2, 100)
+})
+relu = ActivationConverter("relu").Identify([output], [act])
+relu6 = ActivationConverter("relu6").Identify([output], [act])
+
+# Instantiate an example
+Example((input0, output0)).AddNchw(i1, f1, output, layout).AddAllActivations(
+    output, act).AddInput(f1).AddVariations(RelaxedModeConverter(True), quant8)
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_variation/stderr.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_variation/stderr.txt.expect
new file mode 100644
index 000000000..3decb4c1c
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_variation/stderr.txt.expect
@@ -0,0 +1,2 @@
+Output VTS model: -
+Output example:-
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_variation/stdout.txt.expect b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_variation/stdout.txt.expect
new file mode 100644
index 000000000..6ae6401bf
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/P_vts_variation/stdout.txt.expect
@@ -0,0 +1,7084 @@
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+// clang-format off
+// Generated file (from: conv_float.mod.py). Do not edit
+// Generated from: conv_float.mod.py.
+namespace conv_float {
+// Generated conv_float test
+#include "-"
+// Generated model constructor
+#include "-"
+} // namespace conv_float
+
+// Create the model
+Model createTestModel_none() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 0, 64, 0, 0, 64, 64, 0, 0, 128, 64, 0, 0, 160, 64, 0, 0, 192, 64, 0, 0, 224, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 224, 64, 0, 0, 192, 64, 0, 0, 160, 64, 0, 0, 128, 64, 0, 0, 64, 64, 0, 0, 0, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_none(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_none = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_none) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_none,
+                           conv_float::is_ignored_none,
+                           conv_float::examples_none);
+}
+
+// Create the model
+Model createTestModel_none_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 0, 64, 0, 0, 64, 64, 0, 0, 128, 64, 0, 0, 160, 64, 0, 0, 192, 64, 0, 0, 224, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 224, 64, 0, 0, 192, 64, 0, 0, 160, 64, 0, 0, 128, 64, 0, 0, 64, 64, 0, 0, 0, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_none_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_none_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_none_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_none_relaxed,
+                           conv_float::is_ignored_none_relaxed,
+                           conv_float::examples_none_relaxed);
+}
+
+// Create the model
+Model createTestModel_none_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 32, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 36, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132, 192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_none_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_none_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 160, 147, 152, 135, 182, 112, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_none_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_none_quant8,
+                           conv_float::is_ignored_none_quant8,
+                           conv_float::examples_none_quant8);
+}
+
+// Create the model
+Model createTestModel_none_weight_as_input() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_none_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_none_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_none_weight_as_input) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_none_weight_as_input,
+                           conv_float::is_ignored_none_weight_as_input,
+                           conv_float::examples_none_weight_as_input);
+}
+
+// Create the model
+Model createTestModel_none_weight_as_input_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_none_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_none_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_none_weight_as_input_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_none_weight_as_input_relaxed,
+                           conv_float::is_ignored_none_weight_as_input_relaxed,
+                           conv_float::examples_none_weight_as_input_relaxed);
+}
+
+// Create the model
+Model createTestModel_none_weight_as_input_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_none_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_none_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}, {1, {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 160, 147, 152, 135, 182, 112, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_none_weight_as_input_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_none_weight_as_input_quant8,
+                           conv_float::is_ignored_none_weight_as_input_quant8,
+                           conv_float::examples_none_weight_as_input_quant8);
+}
+
+// Create the model
+Model createTestModel_relu() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 0, 64, 0, 0, 64, 64, 0, 0, 128, 64, 0, 0, 160, 64, 0, 0, 192, 64, 0, 0, 224, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 224, 64, 0, 0, 192, 64, 0, 0, 160, 64, 0, 0, 128, 64, 0, 0, 64, 64, 0, 0, 0, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu,
+                           conv_float::is_ignored_relu,
+                           conv_float::examples_relu);
+}
+
+// Create the model
+Model createTestModel_relu_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 0, 64, 0, 0, 64, 64, 0, 0, 128, 64, 0, 0, 160, 64, 0, 0, 192, 64, 0, 0, 224, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 224, 64, 0, 0, 192, 64, 0, 0, 160, 64, 0, 0, 128, 64, 0, 0, 64, 64, 0, 0, 0, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_relu_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu_relaxed,
+                           conv_float::is_ignored_relu_relaxed,
+                           conv_float::examples_relu_relaxed);
+}
+
+// Create the model
+Model createTestModel_relu_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 32, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 36, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132, 192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 160, 147, 152, 135, 182, 112, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu_quant8,
+                           conv_float::is_ignored_relu_quant8,
+                           conv_float::examples_relu_quant8);
+}
+
+// Create the model
+Model createTestModel_relu_weight_as_input() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu_weight_as_input) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu_weight_as_input,
+                           conv_float::is_ignored_relu_weight_as_input,
+                           conv_float::examples_relu_weight_as_input);
+}
+
+// Create the model
+Model createTestModel_relu_weight_as_input_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_relu_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 120.0f, 94.0f, 104.0f, 70.0f, 164.0f, 23.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu_weight_as_input_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu_weight_as_input_relaxed,
+                           conv_float::is_ignored_relu_weight_as_input_relaxed,
+                           conv_float::examples_relu_weight_as_input_relaxed);
+}
+
+// Create the model
+Model createTestModel_relu_weight_as_input_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}, {1, {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 160, 147, 152, 135, 182, 112, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu_weight_as_input_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu_weight_as_input_quant8,
+                           conv_float::is_ignored_relu_weight_as_input_quant8,
+                           conv_float::examples_relu_weight_as_input_quant8);
+}
+
+// Create the model
+Model createTestModel_relu1() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 0, 64, 0, 0, 64, 64, 0, 0, 128, 64, 0, 0, 160, 64, 0, 0, 192, 64, 0, 0, 224, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 224, 64, 0, 0, 192, 64, 0, 0, 160, 64, 0, 0, 128, 64, 0, 0, 64, 64, 0, 0, 0, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu1(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu1 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu1) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu1,
+                           conv_float::is_ignored_relu1,
+                           conv_float::examples_relu1);
+}
+
+// Create the model
+Model createTestModel_relu1_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 0, 64, 0, 0, 64, 64, 0, 0, 128, 64, 0, 0, 160, 64, 0, 0, 192, 64, 0, 0, 224, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 224, 64, 0, 0, 192, 64, 0, 0, 160, 64, 0, 0, 128, 64, 0, 0, 64, 64, 0, 0, 0, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_relu1_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu1_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu1_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu1_relaxed,
+                           conv_float::is_ignored_relu1_relaxed,
+                           conv_float::examples_relu1_relaxed);
+}
+
+// Create the model
+Model createTestModel_relu1_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 32, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 36, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132, 192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu1_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu1_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {100, 100, 100, 100, 100, 100, 100, 100}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu1_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu1_quant8,
+                           conv_float::is_ignored_relu1_quant8,
+                           conv_float::examples_relu1_quant8);
+}
+
+// Create the model
+Model createTestModel_relu1_weight_as_input() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu1_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu1_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu1_weight_as_input) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu1_weight_as_input,
+                           conv_float::is_ignored_relu1_weight_as_input,
+                           conv_float::examples_relu1_weight_as_input);
+}
+
+// Create the model
+Model createTestModel_relu1_weight_as_input_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_relu1_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu1_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu1_weight_as_input_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu1_weight_as_input_relaxed,
+                           conv_float::is_ignored_relu1_weight_as_input_relaxed,
+                           conv_float::examples_relu1_weight_as_input_relaxed);
+}
+
+// Create the model
+Model createTestModel_relu1_weight_as_input_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu1_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu1_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}, {1, {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {100, 100, 100, 100, 100, 100, 100, 100}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu1_weight_as_input_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu1_weight_as_input_quant8,
+                           conv_float::is_ignored_relu1_weight_as_input_quant8,
+                           conv_float::examples_relu1_weight_as_input_quant8);
+}
+
+// Create the model
+Model createTestModel_relu6() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 0, 64, 0, 0, 64, 64, 0, 0, 128, 64, 0, 0, 160, 64, 0, 0, 192, 64, 0, 0, 224, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 224, 64, 0, 0, 192, 64, 0, 0, 160, 64, 0, 0, 128, 64, 0, 0, 64, 64, 0, 0, 0, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu6(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu6) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu6,
+                           conv_float::is_ignored_relu6,
+                           conv_float::examples_relu6);
+}
+
+// Create the model
+Model createTestModel_relu6_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 0, 64, 0, 0, 64, 64, 0, 0, 128, 64, 0, 0, 160, 64, 0, 0, 192, 64, 0, 0, 224, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 224, 64, 0, 0, 192, 64, 0, 0, 160, 64, 0, 0, 128, 64, 0, 0, 64, 64, 0, 0, 0, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_relu6_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu6_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu6_relaxed,
+                           conv_float::is_ignored_relu6_relaxed,
+                           conv_float::examples_relu6_relaxed);
+}
+
+// Create the model
+Model createTestModel_relu6_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 32, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 36, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132, 192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu6_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu6_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu6_quant8,
+                           conv_float::is_ignored_relu6_quant8,
+                           conv_float::examples_relu6_quant8);
+}
+
+// Create the model
+Model createTestModel_relu6_weight_as_input() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu6_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu6_weight_as_input) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu6_weight_as_input,
+                           conv_float::is_ignored_relu6_weight_as_input,
+                           conv_float::examples_relu6_weight_as_input);
+}
+
+// Create the model
+Model createTestModel_relu6_weight_as_input_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_relu6_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f}}, {1, {1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, 7.0f, 8.0f, 8.0f, 7.0f, 6.0f, 5.0f, 4.0f, 3.0f, 2.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu6_weight_as_input_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu6_weight_as_input_relaxed,
+                           conv_float::is_ignored_relu6_weight_as_input_relaxed,
+                           conv_float::examples_relu6_weight_as_input_relaxed);
+}
+
+// Create the model
+Model createTestModel_relu6_weight_as_input_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_relu6_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_relu6_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 132, 134, 136, 138, 140, 142, 144}}, {1, {132, 136, 140, 144, 148, 152, 156, 160, 160, 156, 152, 148, 144, 140, 136, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_relu6_weight_as_input_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_relu6_weight_as_input_quant8,
+                           conv_float::is_ignored_relu6_weight_as_input_quant8,
+                           conv_float::examples_relu6_weight_as_input_quant8);
+}
+
+// Create the model
+Model createTestModel_nchw_none() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 64, 64, 0, 0, 160, 64, 0, 0, 224, 64, 0, 0, 0, 64, 0, 0, 128, 64, 0, 0, 192, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 192, 64, 0, 0, 128, 64, 0, 0, 0, 64, 0, 0, 224, 64, 0, 0, 160, 64, 0, 0, 64, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_none(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_none = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_none) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_none,
+                           conv_float::is_ignored_nchw_none,
+                           conv_float::examples_nchw_none);
+}
+
+// Create the model
+Model createTestModel_nchw_none_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 64, 64, 0, 0, 160, 64, 0, 0, 224, 64, 0, 0, 0, 64, 0, 0, 128, 64, 0, 0, 192, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 192, 64, 0, 0, 128, 64, 0, 0, 0, 64, 0, 0, 224, 64, 0, 0, 160, 64, 0, 0, 64, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_nchw_none_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_none_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_none_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_none_relaxed,
+                           conv_float::is_ignored_nchw_none_relaxed,
+                           conv_float::examples_nchw_none_relaxed);
+}
+
+// Create the model
+Model createTestModel_nchw_none_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 32, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 36, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132, 192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_none_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_none_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 147, 135, 112, 160, 152, 182, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_none_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_none_quant8,
+                           conv_float::is_ignored_nchw_none_quant8,
+                           conv_float::examples_nchw_none_quant8);
+}
+
+// Create the model
+Model createTestModel_nchw_none_weight_as_input() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_none_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_none_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_none_weight_as_input) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_none_weight_as_input,
+                           conv_float::is_ignored_nchw_none_weight_as_input,
+                           conv_float::examples_nchw_none_weight_as_input);
+}
+
+// Create the model
+Model createTestModel_nchw_none_weight_as_input_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_nchw_none_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_none_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_none_weight_as_input_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_none_weight_as_input_relaxed,
+                           conv_float::is_ignored_nchw_none_weight_as_input_relaxed,
+                           conv_float::examples_nchw_none_weight_as_input_relaxed);
+}
+
+// Create the model
+Model createTestModel_nchw_none_weight_as_input_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_none_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_none_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}, {1, {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 147, 135, 112, 160, 152, 182, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_none_weight_as_input_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_none_weight_as_input_quant8,
+                           conv_float::is_ignored_nchw_none_weight_as_input_quant8,
+                           conv_float::examples_nchw_none_weight_as_input_quant8);
+}
+
+// Create the model
+Model createTestModel_nchw_relu() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 64, 64, 0, 0, 160, 64, 0, 0, 224, 64, 0, 0, 0, 64, 0, 0, 128, 64, 0, 0, 192, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 192, 64, 0, 0, 128, 64, 0, 0, 0, 64, 0, 0, 224, 64, 0, 0, 160, 64, 0, 0, 64, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu,
+                           conv_float::is_ignored_nchw_relu,
+                           conv_float::examples_nchw_relu);
+}
+
+// Create the model
+Model createTestModel_nchw_relu_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 64, 64, 0, 0, 160, 64, 0, 0, 224, 64, 0, 0, 0, 64, 0, 0, 128, 64, 0, 0, 192, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 192, 64, 0, 0, 128, 64, 0, 0, 0, 64, 0, 0, 224, 64, 0, 0, 160, 64, 0, 0, 64, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_nchw_relu_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu_relaxed,
+                           conv_float::is_ignored_nchw_relu_relaxed,
+                           conv_float::examples_nchw_relu_relaxed);
+}
+
+// Create the model
+Model createTestModel_nchw_relu_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 32, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 36, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132, 192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 147, 135, 112, 160, 152, 182, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu_quant8,
+                           conv_float::is_ignored_nchw_relu_quant8,
+                           conv_float::examples_nchw_relu_quant8);
+}
+
+// Create the model
+Model createTestModel_nchw_relu_weight_as_input() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu_weight_as_input) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu_weight_as_input,
+                           conv_float::is_ignored_nchw_relu_weight_as_input,
+                           conv_float::examples_nchw_relu_weight_as_input);
+}
+
+// Create the model
+Model createTestModel_nchw_relu_weight_as_input_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_nchw_relu_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {204.0f, 94.0f, 70.0f, 23.0f, 120.0f, 104.0f, 164.0f, 112.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu_weight_as_input_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu_weight_as_input_relaxed,
+                           conv_float::is_ignored_nchw_relu_weight_as_input_relaxed,
+                           conv_float::examples_nchw_relu_weight_as_input_relaxed);
+}
+
+// Create the model
+Model createTestModel_nchw_relu_weight_as_input_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}, {1, {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {202, 147, 135, 112, 160, 152, 182, 156}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu_weight_as_input_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu_weight_as_input_quant8,
+                           conv_float::is_ignored_nchw_relu_weight_as_input_quant8,
+                           conv_float::examples_nchw_relu_weight_as_input_quant8);
+}
+
+// Create the model
+Model createTestModel_nchw_relu1() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 64, 64, 0, 0, 160, 64, 0, 0, 224, 64, 0, 0, 0, 64, 0, 0, 128, 64, 0, 0, 192, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 192, 64, 0, 0, 128, 64, 0, 0, 0, 64, 0, 0, 224, 64, 0, 0, 160, 64, 0, 0, 64, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu1(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu1 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu1) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu1,
+                           conv_float::is_ignored_nchw_relu1,
+                           conv_float::examples_nchw_relu1);
+}
+
+// Create the model
+Model createTestModel_nchw_relu1_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 64, 64, 0, 0, 160, 64, 0, 0, 224, 64, 0, 0, 0, 64, 0, 0, 128, 64, 0, 0, 192, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 192, 64, 0, 0, 128, 64, 0, 0, 0, 64, 0, 0, 224, 64, 0, 0, 160, 64, 0, 0, 64, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_nchw_relu1_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu1_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu1_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu1_relaxed,
+                           conv_float::is_ignored_nchw_relu1_relaxed,
+                           conv_float::examples_nchw_relu1_relaxed);
+}
+
+// Create the model
+Model createTestModel_nchw_relu1_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 32, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 36, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132, 192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu1_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu1_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {100, 100, 100, 100, 100, 100, 100, 100}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu1_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu1_quant8,
+                           conv_float::is_ignored_nchw_relu1_quant8,
+                           conv_float::examples_nchw_relu1_quant8);
+}
+
+// Create the model
+Model createTestModel_nchw_relu1_weight_as_input() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu1_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu1_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu1_weight_as_input) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu1_weight_as_input,
+                           conv_float::is_ignored_nchw_relu1_weight_as_input,
+                           conv_float::examples_nchw_relu1_weight_as_input);
+}
+
+// Create the model
+Model createTestModel_nchw_relu1_weight_as_input_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_nchw_relu1_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu1_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu1_weight_as_input_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu1_weight_as_input_relaxed,
+                           conv_float::is_ignored_nchw_relu1_weight_as_input_relaxed,
+                           conv_float::examples_nchw_relu1_weight_as_input_relaxed);
+}
+
+// Create the model
+Model createTestModel_nchw_relu1_weight_as_input_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu1_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu1_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}, {1, {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {100, 100, 100, 100, 100, 100, 100, 100}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu1_weight_as_input_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu1_weight_as_input_quant8,
+                           conv_float::is_ignored_nchw_relu1_weight_as_input_quant8,
+                           conv_float::examples_nchw_relu1_weight_as_input_quant8);
+}
+
+// Create the model
+Model createTestModel_nchw_relu6() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 64, 64, 0, 0, 160, 64, 0, 0, 224, 64, 0, 0, 0, 64, 0, 0, 128, 64, 0, 0, 192, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 192, 64, 0, 0, 128, 64, 0, 0, 0, 64, 0, 0, 224, 64, 0, 0, 160, 64, 0, 0, 64, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu6(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu6) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu6,
+                           conv_float::is_ignored_nchw_relu6,
+                           conv_float::examples_nchw_relu6);
+}
+
+// Create the model
+Model createTestModel_nchw_relu6_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 64},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 64, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 68, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 72, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 76, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 80, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 84, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 128, 63, 0, 0, 64, 64, 0, 0, 160, 64, 0, 0, 224, 64, 0, 0, 0, 64, 0, 0, 128, 64, 0, 0, 192, 64, 0, 0, 0, 65, 0, 0, 0, 65, 0, 0, 192, 64, 0, 0, 128, 64, 0, 0, 0, 64, 0, 0, 224, 64, 0, 0, 160, 64, 0, 0, 64, 64, 0, 0, 128, 63, 0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_nchw_relu6_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu6_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu6_relaxed,
+                           conv_float::is_ignored_nchw_relu6_relaxed,
+                           conv_float::examples_nchw_relu6_relaxed);
+}
+
+// Create the model
+Model createTestModel_nchw_relu6_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 16},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 24, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 28, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 32, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 36, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132, 192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu6_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu6_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu6_quant8,
+                           conv_float::is_ignored_nchw_relu6_quant8,
+                           conv_float::examples_nchw_relu6_quant8);
+}
+
+// Create the model
+Model createTestModel_nchw_relu6_weight_as_input() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu6_weight_as_input(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_weight_as_input = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu6_weight_as_input) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu6_weight_as_input,
+                           conv_float::is_ignored_nchw_relu6_weight_as_input,
+                           conv_float::examples_nchw_relu6_weight_as_input);
+}
+
+// Create the model
+Model createTestModel_nchw_relu6_weight_as_input_relaxed() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_FLOAT32,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      0, 0, 72, 195, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+        .relaxComputationFloat32toFloat16 = true,
+    };
+}
+
+bool is_ignored_nchw_relu6_weight_as_input_relaxed(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_weight_as_input_relaxed = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f}}, {1, {1.0f, 3.0f, 5.0f, 7.0f, 2.0f, 4.0f, 6.0f, 8.0f, 8.0f, 6.0f, 4.0f, 2.0f, 7.0f, 5.0f, 3.0f, 1.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {{0, {6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f, 6.0f}}},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu6_weight_as_input_relaxed) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu6_weight_as_input_relaxed,
+                           conv_float::is_ignored_nchw_relu6_weight_as_input_relaxed,
+                           conv_float::examples_nchw_relu6_weight_as_input_relaxed);
+}
+
+// Create the model
+Model createTestModel_nchw_relu6_weight_as_input_quant8() {
+    const std::vector<Operand> operands = {
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 1,
+            .scale = 0.5f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {2, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 0.25f,
+            .zeroPoint = 128,
+            .lifetime = OperandLifeTime::MODEL_INPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        },
+        {
+            .type = OperandType::TENSOR_INT32,
+            .dimensions = {1},
+            .numberOfConsumers = 1,
+            .scale = 0.125f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 0, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 4, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 8, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 12, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 16, .length = 4},
+        },
+        {
+            .type = OperandType::INT32,
+            .dimensions = {},
+            .numberOfConsumers = 1,
+            .scale = 0.0f,
+            .zeroPoint = 0,
+            .lifetime = OperandLifeTime::CONSTANT_COPY,
+            .location = {.poolIndex = 0, .offset = 20, .length = 4},
+        },
+        {
+            .type = OperandType::TENSOR_QUANT8_ASYMM,
+            .dimensions = {1, 2, 2, 2},
+            .numberOfConsumers = 0,
+            .scale = 2.0f,
+            .zeroPoint = 100,
+            .lifetime = OperandLifeTime::MODEL_OUTPUT,
+            .location = {.poolIndex = 0, .offset = 0, .length = 0},
+        }
+    };
+
+    const std::vector<Operation> operations = {
+        {
+            .type = OperationType::CONV_2D,
+            .inputs = {0, 1, 2, 3, 4, 5, 6, 7},
+            .outputs = {8},
+        }
+    };
+
+    const std::vector<uint32_t> inputIndexes = {0, 1};
+    const std::vector<uint32_t> outputIndexes = {8};
+    std::vector<uint8_t> operandValues = {
+      192, 249, 255, 255, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 1, 0, 0, 0
+    };
+    const std::vector<hidl_memory> pools = {};
+
+    return {
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,
+    };
+}
+
+bool is_ignored_nchw_relu6_weight_as_input_quant8(int i) {
+  static std::set<int> ignore = {};
+  return ignore.find(i) != ignore.end();
+}
+
+std::vector<MixedTypedExample> examples_nchw_relu6_weight_as_input_quant8 = {
+// Begin of an example
+{
+//Input(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {130, 134, 138, 142, 132, 136, 140, 144}}, {1, {132, 140, 148, 156, 136, 144, 152, 160, 160, 152, 144, 136, 156, 148, 140, 132}}}
+},
+//Output(s)
+{ // See tools/test_generator/include/TestHarness.h:MixedTyped
+  // int -> FLOAT32 map
+  {},
+  // int -> INT32 map
+  {},
+  // int -> QUANT8_ASYMM map
+  {{0, {103, 103, 103, 103, 103, 103, 103, 103}}}
+}
+}, // End of an example
+};
+
+TEST_F(NeuralnetworksHidlTest, conv_float_nchw_relu6_weight_as_input_quant8) {
+  generated_tests::Execute(device,
+                           conv_float::createTestModel_nchw_relu6_weight_as_input_quant8,
+                           conv_float::is_ignored_nchw_relu6_weight_as_input_quant8,
+                           conv_float::examples_nchw_relu6_weight_as_input_quant8);
+}
+
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/tests/test.py b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/test.py
new file mode 100644
index 000000000..248fae3a4
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/tests/test.py
@@ -0,0 +1,328 @@
+#!/usr/bin/python3
+
+# Copyright 2017, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+
+"""NN Model Test Compiler Test.
+
+Runs subdirectories of tests for the test generator/compiler.
+"""
+
+import filecmp
+import glob
+import os
+import re
+import shutil
+import subprocess
+import sys
+import unittest
+
+
+__author__ = 'Android'
+
+
+DOTTED_LINE = '................'
+
+class OrigFile:
+  OrigDir = None
+
+class TestGeneratorTests(unittest.TestCase):
+  """Class to contain all the unittest test cases.
+
+  Tests will be dynamically added to this class as methods.
+  No static tests, so this class is initially empty.
+
+  """
+  pass
+
+
+def GenerateTests(dir_name):
+  """Creates a test method that can be added as method to GenerateTests."""
+  cwd = os.getcwd()
+  def Test(self):
+    os.chdir(cwd)
+    ExecTest(dir_name, self)
+  return Test
+
+
+def AddUnitTests(test_dirs):
+  """Adds a test to Tests for each directory in test_dirs."""
+
+  for t in test_dirs:
+    # Must start with 'test_' according to unittest
+    test_name = 'test_%s' % t
+    test = GenerateTests(t)
+    # Add test as method to TestGeneratorTests with test_name as method name
+    setattr(TestGeneratorTests, test_name, test)
+
+
+class Options(object):
+  verbose = 0
+  cleanup = 1
+  update_cts = 0
+  zero_return = 0
+
+
+def CompareFiles(actual, expect):
+  """Compares actual and expect for equality."""
+  if not os.path.isfile(actual):
+    if Options.verbose:
+      print ('Could not find %s' % actual)
+    return False
+  if not os.path.isfile(expect):
+    if Options.verbose:
+      print ('Could not find %s' % expect)
+    return False
+
+  return filecmp.cmp(actual, expect, False)
+
+
+def CopyIfDifferent(src, dst):
+  """Updates dst if it is different from src."""
+  if not CompareFiles(src, dst):
+    if Options.verbose:
+      print ('Copying from %s to %s' % (src, dst))
+    shutil.copyfile(src, dst)
+
+
+def GetCommandLineArgs(filename):
+  """Extracts command line arguments from first comment line in a file."""
+  f = open(filename, 'r')
+  line = f.readline()
+  f.close()
+  if line[0] == '/' and line[1] == '/':
+    return line[2:].strip()
+  else:
+    return ''
+
+
+def ReadFileToStr(filename):
+  """Returns contents of file as a str."""
+  with open(filename, 'r') as f:
+    return f.read()
+
+
+def ReportIfDifferFromExpected(tests, name, file1, file2):
+  """Fails tests if file1 and file2 differ."""
+  if not CompareFiles(file1, file2):
+    if Options.verbose:
+      err_message = ('%s is different:\n'
+                     'expected:\n%s\n%s%s\n\n'
+                     'actual:\n%s\n%s%s\n') % (
+                         name,
+                         DOTTED_LINE, ReadFileToStr(file1), DOTTED_LINE,
+                         DOTTED_LINE, ReadFileToStr(file2), DOTTED_LINE)
+    else:
+      err_message = '%s is different' % name
+    tests.fail(err_message)
+
+
+def GetRSFiles():
+  """Returns a list of files in cwd with extension '.rs' or '.fs'."""
+  rs_files = glob.glob('*.mod.py')
+  rs_files.sort()
+  return rs_files
+
+
+def GetOutDir():
+  return os.path.abspath(os.path.join(OrigFile.OrigDir, "../"))
+
+
+# Declare/define cache variable for GetOutDir to cache results
+# This way we only need to call subprocesses once to get the directory
+GetOutDir.cache = None
+
+
+def CreateCmd(run_vts):
+  """Creates the test command to run for the current test."""
+  cmd_string = ('%s/%s_generator.py'
+                ) % (GetOutDir(), "cts" if not run_vts else "vts")
+  base_args = cmd_string.split()
+  rs_files = GetRSFiles()
+
+  # Extra command line arguments can be placed as // comments at the start of
+  # any .rs file. We automatically bundle up all of these extra args and invoke
+  # llvm-rs-cc with them.
+  extra_args_str = ''
+  for rs_file in rs_files:
+    extra_args_str += GetCommandLineArgs(rs_file)
+  extra_args = extra_args_str.split()
+
+  args = base_args + extra_args + rs_files
+  return args
+
+def Cleanup():
+  """Cleans up the cwd of any tmp files created in current test."""
+  try:
+    os.remove('stdout.txt')
+    os.remove('stderr.txt')
+    shutil.rmtree('tmp/')
+  except OSError:
+    pass
+
+
+def CheckTestResult(dir_name, subprocess_ret, tests, args):
+  """Checks the result of the subprocess command to see if it passed/failed.
+
+  If dir_name starts with 'F_', then subprocess is expected to fail.
+  If it instead succeeded, then this test is failed.
+  Vice versa with a dir_name starting with 'P_'.
+
+  Args:
+    dir_name: name of current directory/test name
+    subprocess_ret: return code of subprocess
+    tests: unittest, call tests.fail(reason) when failure
+    args: the arguments for the command that was run
+  """
+  if dir_name[0:2] == 'F_':
+    if subprocess_ret == 0:
+      if Options.verbose:
+        err_message = ('Command (%s) passed on invalid input\n'
+                       'stdout:\n%s\n%s%s\n') % (
+                           ' '.join(args),
+                           DOTTED_LINE, ReadFileToStr('stdout.txt'), DOTTED_LINE
+                       )
+      else:
+        err_message = 'Command passed on invalid input'
+      tests.fail(err_message)
+  elif dir_name[0:2] == 'P_':
+    if subprocess_ret != 0:
+      if Options.verbose:
+        err_message = ('Command (%s) failed on valid input\n'
+                       'stderr:\n%s\n%s%s\n') % (
+                           ' '.join(args),
+                           DOTTED_LINE, ReadFileToStr('stderr.txt'), DOTTED_LINE
+                       )
+      else:
+        err_message = 'Command failed on valid input'
+      tests.fail(err_message)
+  else:
+    tests.fail('Invalid test name: ' + dir_name +
+               ', should start with F_ or P_')
+
+
+
+def ExecTest(dir_name, tests):
+  """Executes an test generator test from dir_name."""
+
+  os.chdir(dir_name)
+  stdout_file = open('stdout.txt', 'w+')
+  stderr_file = open('stderr.txt', 'w+')
+  run_vts = (dir_name[2:5] == 'vts')
+  args = CreateCmd(run_vts)
+
+  if Options.verbose > 1:
+    print ('Executing:', ' '.join(args))
+
+  # Execute the command and check the resulting shell return value.
+  # All tests that are expected to FAIL have directory names that
+  # start with 'F_'. Other tests that are expected to PASS have
+  # directory names that start with 'P_'.
+  ret = 0
+  try:
+    ret = subprocess.call(args, stdout=stdout_file, stderr=stderr_file)
+  except OSError:
+    tests.fail('subprocess.call failed: ' + ' '.join(args))
+
+  stdout_file.close()
+  stderr_file.close()
+
+  CheckTestResult(dir_name, ret, tests, args)
+
+  ReportIfDifferFromExpected(tests, 'stdout', 'stdout.txt.expect', 'stdout.txt')
+  ReportIfDifferFromExpected(tests, 'stderr', 'stderr.txt.expect', 'stderr.txt')
+
+  if Options.cleanup:
+    Cleanup()
+
+
+def Usage():
+  """Print out usage information."""
+  print ('Usage: %s [OPTION]... [TESTNAME]...'
+         'Renderscript Compiler Test Harness\n'
+         'Runs TESTNAMEs (all tests by default)\n'
+         'Available Options:\n'
+         '  -h, --help          Help message\n'
+         '  -n, --no-cleanup    Don\'t clean up after running tests\n'
+         '  -v, --verbose       Verbose output.  Enter multiple -v to get more verbose.\n'
+         '  -z, --zero-return   Return 0 as exit code no matter if tests fail. Required for TreeHugger.\n'
+        ) % (sys.argv[0]),
+  return
+
+
+def main():
+  """Runs the unittest suite.
+
+  Parses command line arguments, adds test directories as tests.
+
+  Returns:
+    0 if '-z' flag is set.
+    Else unittest.main() returns with its own error code.
+  """
+
+  OrigFile.OrigDir = os.path.dirname(os.path.abspath(__file__))
+  # Chdir to the directory this file is in since tests are in this directory
+  os.chdir(OrigFile.OrigDir)
+  files = []
+  for arg in sys.argv[1:]:
+    if arg in ('-h', '--help'):
+      Usage()
+      return 0
+    elif arg in ('-n', '--no-cleanup'):
+      Options.cleanup = 0
+    elif arg in ('-u', '--update-cts'):
+      Options.update_cts = 1
+    elif arg in ('-v', '--verbose'):
+      Options.verbose += 1
+    elif arg in ('-z', '--zero-return'):
+      Options.zero_return = 1
+    else:
+      # Test list to run
+      if os.path.isdir(arg):
+        files.append(arg)
+      else:
+        print >> sys.stderr, 'Invalid test or option: %s' % arg
+        return 1
+
+  if not files:
+    file_names = os.listdir('.')
+    # Test names must start with 'F_' or 'P_'
+    # 'F_' tests are expected to fail
+    # 'P_' tests are expected to pass
+    for f in file_names:
+      if os.path.isdir(f) and (f[0:2] == 'F_' or f[0:2] == 'P_'):
+        files.append(f)
+    files.sort()
+
+  AddUnitTests(files)
+
+  # verbosity=2 is necessary for PythonUnitTestRunner to parse the results
+  # Otherwise verbosity does not matter
+  # If Options.zero_return is set, do not let unittest.main() exit
+  #  This is necessary in TreeHugger to distinguish between failing tests and
+  #  failing to execute the python script
+  # If Options.zero_return is not set, let unittest.main() exit
+  #  In this case it will return a non-zero code if any tests fail
+  unittest_exit = Options.zero_return == 0
+  unittest.main(verbosity=2,
+                argv=[sys.argv[0]] + ['TestGeneratorTests'],
+                exit=unittest_exit)
+
+  return 0
+
+
+if __name__ == '__main__':
+  sys.exit(main())
+
diff --git a/tests/nnapi/nnapi_test_generator/android-q-beta/vts_generator.py b/tests/nnapi/nnapi_test_generator/android-q-beta/vts_generator.py
new file mode 100644
index 000000000..2aa8731a0
--- /dev/null
+++ b/tests/nnapi/nnapi_test_generator/android-q-beta/vts_generator.py
@@ -0,0 +1,361 @@
+#!/usr/bin/python3
+
+# Copyright 2017, The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+"""VTS testcase generator
+
+Implements VTS test backend. Shares most logic with the CTS test
+generator. Invoked by ml/nn/runtime/test/specs/generate_vts_tests.sh;
+See that script for details on how this script is used.
+
+"""
+
+from __future__ import absolute_import
+from __future__ import division
+from __future__ import print_function
+import argparse
+from functools import reduce
+import math
+import numpy as np
+import os
+import re
+import struct
+import contextlib
+import pprint
+
+# Stuff from test generator
+import test_generator as tg
+from test_generator import ActivationConverter
+from test_generator import BoolScalar
+from test_generator import Configuration
+from test_generator import DataTypeConverter
+from test_generator import DataLayoutConverter
+from test_generator import Example
+from test_generator import Float16Scalar
+from test_generator import Float32Scalar
+from test_generator import Float32Vector
+from test_generator import IgnoredOutput
+from test_generator import Input
+from test_generator import Int32Scalar
+from test_generator import Int32Vector
+from test_generator import Internal
+from test_generator import Model
+from test_generator import Operand
+from test_generator import Output
+from test_generator import Parameter
+from test_generator import ParameterAsInputConverter
+from test_generator import RelaxedModeConverter
+from test_generator import SmartOpen
+from test_generator import SymmPerChannelQuantParams
+
+# Dumping methods that shared with CTS generator
+from cts_generator import DumpCtsIsIgnored
+
+
+# TODO: Make this part of tg.Configuration?
+target_hal_version = None
+
+
+# Take a model from command line
+def ParseCmdLine():
+    parser = argparse.ArgumentParser()
+    parser.add_argument("spec", help="the spec file")
+    parser.add_argument(
+        "-m", "--model", help="the output model file", default="-")
+    parser.add_argument(
+        "-t", "--test", help="the output test file", default="-")
+    parser.add_argument(
+        "--target_hal_version",
+        help="the HAL version of the output",
+        required=True,
+        choices=["V1_0", "V1_1", "V1_2"])
+    args = parser.parse_args()
+    example = "-"  # VTS generator does not generate examples. See cts_generator.py.
+    tg.FileNames.InitializeFileLists(
+        args.spec, args.model, example, args.test)
+    global target_hal_version
+    target_hal_version = args.target_hal_version
+
+# Generate operands in VTS format
+def generate_vts_operands(model):
+  # Dump operand definitions
+  op_def = """\
+        {{
+            .type = OperandType::{operand_type},
+            .dimensions = {shape},
+            .numberOfConsumers = {no_consumers},
+            .scale = {scale},
+            .zeroPoint = {zero_point},
+            .lifetime = OperandLifeTime::{lifetime},
+            .location = {{.poolIndex = 0, .offset = {offset}, .length = {length}}},{extraParams}
+        }}"""
+  offset = 0
+  op_definitions = []
+  extra_params_definitions = []
+  for index, o in enumerate(model.operands):
+    length = o.type.GetByteSize() if isinstance(o, Parameter) else 0
+    add_extra_params = o.type.extraParams is not None and not o.type.extraParams.hide
+    op = {
+        "operand_type": o.type.type,
+        "shape": o.type.GetDimensionsString(),
+        "no_consumers": len(o.outs),
+        "scale": tg.PrettyPrintAsFloat(o.type.scale),
+        "zero_point": str(int(o.type.zeroPoint)),
+        "lifetime": o.lifetime,
+        "offset": offset if isinstance(o, Parameter) else 0,
+        "length": length,
+        "extraParams": "" if not add_extra_params else "\n            .extraParams = std::move(extraParams%d)," % (index,),
+    }
+    offset += length
+    op_definitions.append(op_def.format(**op))
+
+    extra_params_def = """\
+    Operand::ExtraParams extraParams{index};
+    extraParams{index}.{setMethodName}({param});
+"""
+
+    if add_extra_params:
+      ep = o.type.extraParams
+      op = {
+          "index": index,
+          "setMethodName": ep.GetVtsSetter(),
+          "param": ep.GetVtsConstructor(),
+      }
+      extra_params_definitions.append(extra_params_def.format(**op))
+
+  op_vec = """{0}\
+    const std::vector<Operand> operands = {{
+{1}
+    }};""".format(",\n".join(extra_params_definitions), ",\n".join(op_definitions))
+  return op_vec
+
+# Generate VTS operand values
+def generate_vts_operand_values(operands):
+    weights = [o for o in operands if isinstance(o, Parameter)]
+    binit = []
+    for w in weights:
+        ty = w.type.type
+        if ty == "TENSOR_QUANT8_ASYMM":
+            binit += w.value
+        elif ty == "TENSOR_QUANT8_SYMM_PER_CHANNEL" or ty == "TENSOR_QUANT8_SYMM":
+            binit += [struct.pack("b", value)[0] for value in w.value]
+        elif ty == "BOOL" or ty == "TENSOR_BOOL8":
+            binit += [1 if x else 0 for x in w.value]
+        elif ty == "TENSOR_FLOAT16" or ty == "FLOAT16":
+            for f in w.value:
+                # The pack format for float16 is not available until Python 3.6.
+                binit += [int(x) for x in np.float16(f).tostring()]
+        elif ty in {"TENSOR_FLOAT32", "FLOAT32", "TENSOR_INT32", "INT32", "TENSOR_QUANT16_ASYMM"}:
+            if ty in ["TENSOR_FLOAT32", "FLOAT32"]:
+                fmt = "f"
+            elif ty in ["TENSOR_INT32", "INT32"]:
+                fmt = "i"
+            elif ty == "TENSOR_QUANT16_ASYMM":
+                fmt = "H"
+            for f in w.value:
+                binit += [int(x) for x in struct.pack(fmt, f)]
+        else:
+            assert 0 and "Unsupported VTS operand type"
+
+    init_defs = ", ".join([str(x) for x in binit])
+    if (init_defs != ""):
+        init_defs = "\n      %s\n    " % init_defs
+    byte_vec_fmt = """{%s}""" % init_defs
+    return byte_vec_fmt
+
+# Generate VTS operations
+def generate_vts_operation(op, model):
+    op_fmt = """\
+        {{
+            .type = OperationType::{op_code},
+            .inputs = {{{ins}}},
+            .outputs = {{{outs}}},
+        }}"""
+    op_content = {
+        'op_code': op.optype,
+        'ins': tg.GetJointStr(model.GetIndexOfOperands(op.ins)),
+        'outs': tg.GetJointStr(model.GetIndexOfOperands(op.outs))
+    }
+    return op_fmt.format(**op_content)
+
+def generate_vts_operations(model):
+    vts_ops = [generate_vts_operation(op, model) for op in model.operations]
+    return ",\n".join(vts_ops)
+
+def generate_vts_model(model, model_file):
+  operand_values_fmt = ""
+  if Configuration.useSHM():
+    # Boilerplate code for passing weights in shared memory
+    operand_values_fmt = """\
+    std::vector<uint8_t> operandValues = {{}};
+    const uint8_t data[] = {operand_values};
+
+    // Allocate segment of android shared memory, wrapped in hidl_memory.
+    // This object will be automatically freed when sharedMemory is destroyed.
+    hidl_memory sharedMemory = ::android::nn::allocateSharedMemory(sizeof(data));
+
+    // Mmap ashmem into usable address and hold it within the mappedMemory object.
+    // MappedMemory will automatically munmap the memory when it is destroyed.
+    sp<::android::hidl::memory::V1_0::IMemory> mappedMemory = mapMemory(sharedMemory);
+
+    if (mappedMemory != nullptr) {{
+        // Retrieve the mmapped pointer.
+        uint8_t* mappedPointer =
+                static_cast<uint8_t*>(static_cast<void*>(mappedMemory->getPointer()));
+
+        if (mappedPointer != nullptr) {{
+            // Acquire the write lock for the shared memory segment, upload the data,
+            // and release the lock.
+            mappedMemory->update();
+            std::copy(data, data + sizeof(data), mappedPointer);
+            mappedMemory->commit();
+        }}
+    }}
+
+    const std::vector<hidl_memory> pools = {{sharedMemory}};
+"""
+  else:
+    # Passing weights via operandValues
+    operand_values_fmt = """\
+    std::vector<uint8_t> operandValues = {operand_values};
+    const std::vector<hidl_memory> pools = {{}};
+"""
+
+  operand_values_val = {
+      'operand_values': generate_vts_operand_values(model.operands)
+  }
+  operand_values = operand_values_fmt.format(**operand_values_val)
+  #  operand_values = operand_values_fmt
+  model_fmt = """\
+// Create the model
+Model {create_test_model_name}() {{
+{operand_decls}
+
+    const std::vector<Operation> operations = {{
+{operations}
+    }};
+
+    const std::vector<uint32_t> inputIndexes = {{{input_indices}}};
+    const std::vector<uint32_t> outputIndexes = {{{output_indices}}};
+{operand_values}
+    return {{
+        .operands = operands,
+        .operations = operations,
+        .inputIndexes = inputIndexes,
+        .outputIndexes = outputIndexes,
+        .operandValues = operandValues,
+        .pools = pools,{relaxed_field}
+    }};
+}}
+"""
+  model_dict = {
+      "hal_version": target_hal_version,
+      "create_test_model_name": str(model.createTestFunctionName),
+      "operations": generate_vts_operations(model),
+      "operand_decls": generate_vts_operands(model),
+      "operand_values": operand_values,
+      "output_indices": tg.GetJointStr(model.GetOutputsIndex()),
+      "input_indices": tg.GetJointStr(model.GetInputsIndex()),
+      "relaxed_field":
+        "\n        .relaxComputationFloat32toFloat16 = true," if (model.isRelaxed) else ""
+  }
+  print(model_fmt.format(**model_dict), file = model_file)
+
+def generate_vts(model, model_file):
+    assert model.compiled
+    # Do not generate DynamicOutputShapeTest for pre-1.2 VTS.
+    if model.hasDynamicOutputShape and target_hal_version < "V1_2":
+        return
+    namespace = "android::hardware::neuralnetworks::{hal_version}::generated_tests::{spec_name}".format(spec_name=tg.FileNames.specName, hal_version=target_hal_version)
+    print("namespace {namespace} {{\n".format(namespace=namespace), file=model_file)
+    generate_vts_model(model, model_file)
+    DumpCtsIsIgnored(model, model_file)
+    print("}} // namespace {namespace}".format(namespace=namespace), file=model_file)
+
+def generate_vts_test(example, test_file):
+    # Do not generate DynamicOutputShapeTest for pre-1.2 VTS.
+    if example.model.hasDynamicOutputShape and target_hal_version < "V1_2":
+        return
+
+    generated_vts_namespace = "android::hardware::neuralnetworks::{hal_version}::generated_tests::{spec_name}".format(spec_name=tg.FileNames.specName, hal_version=target_hal_version)
+    generated_cts_namespace = "generated_tests::{spec_name}".format(spec_name=tg.FileNames.specName)
+    testTemplate = """\
+namespace {generated_cts_namespace} {{
+
+std::vector<::test_helper::MixedTypedExample>& get_{examples_name}();
+
+}} // namespace {generated_cts_namespace}
+
+namespace {generated_vts_namespace} {{
+
+Model {create_model_name}();
+bool {is_ignored_name}(int);
+"""
+
+    if not example.expectFailure:
+        testTemplate += """
+TEST_F({test_case_name}, {test_name}) {{
+  Execute(device,
+          {create_model_name},
+          {is_ignored_name},
+          ::{generated_cts_namespace}::get_{examples_name}(){test_dynamic_output_shape});
+}}
+"""
+
+    testTemplate += """
+TEST_F(ValidationTest, {test_name}) {{
+  const Model model = {create_model_name}();
+  const std::vector<Request> requests = createRequests(::{generated_cts_namespace}::get_{examples_name}());
+  validateEverything(model, requests);
+}}
+
+}} // namespace {generated_vts_namespace}
+"""
+
+    print(testTemplate.format(
+            test_case_name="DynamicOutputShapeTest" if example.model.hasDynamicOutputShape \
+                           else "NeuralnetworksHidlTest",
+            test_name=str(example.testName),
+            generated_vts_namespace=generated_vts_namespace,
+            generated_cts_namespace=generated_cts_namespace,
+            hal_version=target_hal_version,
+            create_model_name=str(example.model.createTestFunctionName),
+            is_ignored_name=str(example.model.isIgnoredFunctionName),
+            examples_name=str(example.examplesName),
+            test_dynamic_output_shape=", true" if example.model.hasDynamicOutputShape else "",
+            validation_method="validateFailure" if example.expectFailure else "validateEverything",
+        ), file=test_fd)
+
+def InitializeFiles(model_fd, test_fd):
+    specFileBase = os.path.basename(tg.FileNames.specFile)
+    fileHeader = """\
+// Generated from {spec_file}
+// DO NOT EDIT
+// clang-format off
+#include "GeneratedTests.h"
+""".format(spec_file=specFileBase)
+    print(fileHeader, file=model_fd)
+    print(fileHeader, file=test_fd)
+
+if __name__ == "__main__":
+    ParseCmdLine()
+    while tg.FileNames.NextFile():
+        print("Generating VTS tests from %s" % tg.FileNames.specFile)
+        exec (open(tg.FileNames.specFile, "r").read())
+        with SmartOpen(tg.FileNames.modelFile) as model_fd, \
+             SmartOpen(tg.FileNames.testFile) as test_fd:
+            InitializeFiles(model_fd, test_fd)
+            Example.DumpAllExamples(
+                DumpModel=generate_vts, model_fd=model_fd,
+                DumpTest=generate_vts_test, test_fd=test_fd)
diff --git a/tests/nnapi/specs/Ex/argmax_ex_float_1.mod.py b/tests/nnapi/specs/Ex/argmax_ex_float_1.mod.py
index e2255e004..dc29fb358 100644
--- a/tests/nnapi/specs/Ex/argmax_ex_float_1.mod.py
+++ b/tests/nnapi/specs/Ex/argmax_ex_float_1.mod.py
@@ -1,7 +1,7 @@
 model = Model()
 i1 = Input("input", "TENSOR_FLOAT32", "{1, 2, 2, 1}")
 axis = Parameter("axis", "TENSOR_INT32", "{1}", [1])
-output = Output("output", "TENSOR_INT32", "{1, 1, 2, 1}")
+output = Output("output", "TENSOR_INT32", "{1, 2, 1}")
 
 model = model.Operation("ARGMAX_EX", i1, axis).To(output)
 
diff --git a/tests/nnapi/specs/Ex/argmax_ex_float_2.mod.py b/tests/nnapi/specs/Ex/argmax_ex_float_2.mod.py
index 6f06bfd0b..8b6ed565f 100644
--- a/tests/nnapi/specs/Ex/argmax_ex_float_2.mod.py
+++ b/tests/nnapi/specs/Ex/argmax_ex_float_2.mod.py
@@ -1,7 +1,7 @@
 model = Model()
 i1 = Input("input", "TENSOR_FLOAT32", "{1, 2, 2, 2}")
 axis = Parameter("axis", "TENSOR_INT32", "{1}", [3])
-output = Output("output", "TENSOR_INT32", "{1, 2, 2, 1}")
+output = Output("output", "TENSOR_INT32", "{1, 2, 2}")
 
 model = model.Operation("ARGMAX_EX", i1, axis).To(output)
 
diff --git a/tests/nnapi/specs/Ex/argmax_ex_int32.mod.py b/tests/nnapi/specs/Ex/argmax_ex_int32.mod.py
index f7f98afe2..b5d01dd85 100644
--- a/tests/nnapi/specs/Ex/argmax_ex_int32.mod.py
+++ b/tests/nnapi/specs/Ex/argmax_ex_int32.mod.py
@@ -1,7 +1,7 @@
 model = Model()
 i1 = Input("input", "TENSOR_INT32", "{1, 2, 2, 1}")
 axis = Parameter("axis", "TENSOR_INT32", "{1}", [1])
-output = Output("output", "TENSOR_INT32", "{1, 1, 2, 1}")
+output = Output("output", "TENSOR_INT32", "{1, 2, 1}")
 
 model = model.Operation("ARGMAX_EX", i1, axis).To(output)
 
diff --git a/tests/nnapi/specs/Ex/argmax_ex_neg_axis_float.mod.py b/tests/nnapi/specs/Ex/argmax_ex_neg_axis_float.mod.py
index b29cf1eb6..977cac061 100644
--- a/tests/nnapi/specs/Ex/argmax_ex_neg_axis_float.mod.py
+++ b/tests/nnapi/specs/Ex/argmax_ex_neg_axis_float.mod.py
@@ -1,7 +1,7 @@
 model = Model()
 i1 = Input("input", "TENSOR_FLOAT32", "{1, 2, 4, 1}")
 axis = Parameter("axis", "TENSOR_INT32", "{1}", [-3])
-output = Output("output", "TENSOR_INT32", "{1, 1, 4, 1}")
+output = Output("output", "TENSOR_INT32", "{1, 4, 1}")
 
 model = model.Operation("ARGMAX_EX", i1, axis).To(output)
 
diff --git a/tests/nnapi/specs/Ex/argmax_ex_neg_axis_int32.mod.py b/tests/nnapi/specs/Ex/argmax_ex_neg_axis_int32.mod.py
index ddc27b35a..9f448e08d 100644
--- a/tests/nnapi/specs/Ex/argmax_ex_neg_axis_int32.mod.py
+++ b/tests/nnapi/specs/Ex/argmax_ex_neg_axis_int32.mod.py
@@ -1,7 +1,7 @@
 model = Model()
 i1 = Input("input", "TENSOR_INT32", "{1, 2, 4, 1}")
 axis = Parameter("axis", "TENSOR_INT32", "{1}", [-3])
-output = Output("output", "TENSOR_INT32", "{1, 1, 4, 1}")
+output = Output("output", "TENSOR_INT32", "{1, 4, 1}")
 
 model = model.Operation("ARGMAX_EX", i1, axis).To(output)
 
diff --git a/tests/nnapi/specs/Ex/argmax_ex_quant8.mod.py b/tests/nnapi/specs/Ex/argmax_ex_quant8.mod.py
index fd3c5230b..c3131ef91 100644
--- a/tests/nnapi/specs/Ex/argmax_ex_quant8.mod.py
+++ b/tests/nnapi/specs/Ex/argmax_ex_quant8.mod.py
@@ -1,7 +1,7 @@
 model = Model()
 i1 = Input("input", "TENSOR_QUANT8_ASYMM", "{1, 2, 2, 1}, 0.5f, 2")
 axis = Parameter("axis", "TENSOR_INT32", "{1}", [1])
-output = Output("output", "TENSOR_INT32", "{1, 1, 2, 1}")
+output = Output("output", "TENSOR_INT32", "{1, 2, 1}")
 
 model = model.Operation("ARGMAX_EX", i1, axis).To(output)
 
diff --git a/tests/nnapi/specs/Ex/argmax_ex_quant8_neg_axis.mod.py b/tests/nnapi/specs/Ex/argmax_ex_quant8_neg_axis.mod.py
index c7ddc0e5d..9146d8f14 100644
--- a/tests/nnapi/specs/Ex/argmax_ex_quant8_neg_axis.mod.py
+++ b/tests/nnapi/specs/Ex/argmax_ex_quant8_neg_axis.mod.py
@@ -1,7 +1,7 @@
 model = Model()
 i1 = Input("input", "TENSOR_QUANT8_ASYMM", "{1, 2, 4, 1}, 0.5f, 5")
 axis = Parameter("axis", "TENSOR_INT32", "{1}", [-3])
-output = Output("output", "TENSOR_INT32", "{1, 1, 4, 1}")
+output = Output("output", "TENSOR_INT32", "{1, 4, 1}")
 
 model = model.Operation("ARGMAX_EX", i1, axis).To(output)
 
diff --git a/tests/nnapi/specs/Ex/gather_ex_2D_2D_float_1.mod.py b/tests/nnapi/specs/Ex/gather_ex_2D_2D_float_1.mod.py
new file mode 100644
index 000000000..9edc80deb
--- /dev/null
+++ b/tests/nnapi/specs/Ex/gather_ex_2D_2D_float_1.mod.py
@@ -0,0 +1,22 @@
+# model
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{3,4}") # a vector of 12 float32s
+i2 = Input("op2", "TENSOR_INT32", "{1,2}") # another vector of 2 int32s
+axis = Int32Scalar("axis", 0)
+i3 = Output("op3", "TENSOR_FLOAT32", "{1,2,4}") # a vector of 8 float32s
+model = model.Operation("GATHER_EX", i1, i2, axis).To(i3)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [3.123456789123456789, 4.123456789123456789, 5.123456789123456789, 6.123456789123456789,
+          7.123456789123456789, 8.123456789123456789, 9.123456789123456789, 1.123456789123456789,
+          2.123456789123456789, 18.123456789123456789, 19.123456789123456789, 11.123456789123456789],
+          i2: # input 1
+          [1, 0]}
+
+output0 = {i3: # output 0
+           [7.123456789123456789, 8.123456789123456789, 9.123456789123456789, 1.123456789123456789,
+            3.123456789123456789, 4.123456789123456789, 5.123456789123456789, 6.123456789123456789]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/gather_ex_2D_2D_float_2.mod.py b/tests/nnapi/specs/Ex/gather_ex_2D_2D_float_2.mod.py
new file mode 100644
index 000000000..85fd43466
--- /dev/null
+++ b/tests/nnapi/specs/Ex/gather_ex_2D_2D_float_2.mod.py
@@ -0,0 +1,23 @@
+# model
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{3,4}") # a vector of 12 float32s
+i2 = Input("op2", "TENSOR_INT32", "{1,2}") # another vector of 2 int32s
+axis = Int32Scalar("axis", 1)
+i3 = Output("op3", "TENSOR_FLOAT32", "{3,1,2}") # a vector of 6 float32s
+model = model.Operation("GATHER_EX", i1, i2, axis).To(i3)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [3.123456789123456789, 4.123456789123456789, 5.123456789123456789, 6.123456789123456789,
+          7.123456789123456789, 8.123456789123456789, 9.123456789123456789, 1.123456789123456789,
+          2.123456789123456789, 18.123456789123456789, 19.123456789123456789, 11.123456789123456789],
+          i2: # input 1
+          [1, 0]}
+
+output0 = {i3: # output 0
+           [4.123456789123456789, 3.123456789123456789,
+            8.123456789123456789, 7.123456789123456789,
+            18.123456789123456789, 2.123456789123456789]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/gather_ex_2D_3D_float_1.mod.py b/tests/nnapi/specs/Ex/gather_ex_2D_3D_float_1.mod.py
new file mode 100644
index 000000000..652016af5
--- /dev/null
+++ b/tests/nnapi/specs/Ex/gather_ex_2D_3D_float_1.mod.py
@@ -0,0 +1,22 @@
+# model
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{3,4}") # a vector of 12 float32s
+i2 = Input("op2", "TENSOR_INT32", "{1,1,2}") # another vector of 2 int32s
+axis = Int32Scalar("axis", 0)
+i3 = Output("op3", "TENSOR_FLOAT32", "{1,1,2,4}") # a vector of 8 float32s
+model = model.Operation("GATHER_EX", i1, i2, axis).To(i3)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [3.123456789123456789, 4.123456789123456789, 5.123456789123456789, 6.123456789123456789,
+          7.123456789123456789, 8.123456789123456789, 9.123456789123456789, 1.123456789123456789,
+          2.123456789123456789, 18.123456789123456789, 19.123456789123456789, 11.123456789123456789],
+          i2: # input 1
+          [1, 0]}
+
+output0 = {i3: # output 0
+           [7.123456789123456789, 8.123456789123456789, 9.123456789123456789, 1.123456789123456789,
+            3.123456789123456789, 4.123456789123456789, 5.123456789123456789, 6.123456789123456789]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/gather_ex_2D_3D_float_2.mod.py b/tests/nnapi/specs/Ex/gather_ex_2D_3D_float_2.mod.py
new file mode 100644
index 000000000..850d330b9
--- /dev/null
+++ b/tests/nnapi/specs/Ex/gather_ex_2D_3D_float_2.mod.py
@@ -0,0 +1,23 @@
+# model
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{3,4}") # a vector of 12 float32s
+i2 = Input("op2", "TENSOR_INT32", "{1,2,1}") # another vector of 2 int32s
+axis = Int32Scalar("axis", 1)
+i3 = Output("op3", "TENSOR_FLOAT32", "{3,1,2,1}") # a vector of 6 float32s
+model = model.Operation("GATHER_EX", i1, i2, axis).To(i3)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [3.123456789123456789, 4.123456789123456789, 5.123456789123456789, 6.123456789123456789,
+          7.123456789123456789, 8.123456789123456789, 9.123456789123456789, 1.123456789123456789,
+          2.123456789123456789, 18.123456789123456789, 19.123456789123456789, 11.123456789123456789],
+          i2: # input 1
+          [1, 0]}
+
+output0 = {i3: # output 0
+           [4.123456789123456789, 3.123456789123456789,
+            8.123456789123456789, 7.123456789123456789,
+            18.123456789123456789, 2.123456789123456789]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/gather_ex_3D_2D_float_1.mod.py b/tests/nnapi/specs/Ex/gather_ex_3D_2D_float_1.mod.py
new file mode 100644
index 000000000..09db60294
--- /dev/null
+++ b/tests/nnapi/specs/Ex/gather_ex_3D_2D_float_1.mod.py
@@ -0,0 +1,29 @@
+# model
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{2,3,4}") # a vector of 24 float32s
+i2 = Input("op2", "TENSOR_INT32", "{1,2}") # another vector of 2 int32s
+axis = Int32Scalar("axis", 0)
+i3 = Output("op3", "TENSOR_FLOAT32", "{1,2,3,4}") # a vector of 24 float32s
+model = model.Operation("GATHER_EX", i1, i2, axis).To(i3)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [3.123456789123456789, 4.123456789123456789, 5.123456789123456789, 6.123456789123456789,
+          7.123456789123456789, 8.123456789123456789, 9.123456789123456789, 1.123456789123456789,
+          2.123456789123456789, 18.123456789123456789, 19.123456789123456789, 11.123456789123456789,
+          13.123456789123456789, 14.123456789123456789, 15.123456789123456789, 16.123456789123456789,
+          17.123456789123456789, 18.123456789123456789, 19.123456789123456789, 11.123456789123456789,
+          12.123456789123456789, 28.123456789123456789, 29.123456789123456789, 21.123456789123456789],
+          i2: # input 1
+          [1, 0]}
+
+output0 = {i3: # output 0
+           [13.123456789123456789, 14.123456789123456789, 15.123456789123456789, 16.123456789123456789,
+           17.123456789123456789, 18.123456789123456789, 19.123456789123456789, 11.123456789123456789,
+           12.123456789123456789, 28.123456789123456789, 29.123456789123456789, 21.123456789123456789,
+           3.123456789123456789, 4.123456789123456789, 5.123456789123456789, 6.123456789123456789,
+           7.123456789123456789, 8.123456789123456789, 9.123456789123456789, 1.123456789123456789,
+           2.123456789123456789, 18.123456789123456789, 19.123456789123456789, 11.123456789123456789]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/gather_ex_3D_2D_float_2.mod.py b/tests/nnapi/specs/Ex/gather_ex_3D_2D_float_2.mod.py
new file mode 100644
index 000000000..bfdc83c58
--- /dev/null
+++ b/tests/nnapi/specs/Ex/gather_ex_3D_2D_float_2.mod.py
@@ -0,0 +1,29 @@
+# model
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{2,3,4}") # a vector of 24 float32s
+i2 = Input("op2", "TENSOR_INT32", "{2,1}") # another vector of 2 int32s
+axis = Int32Scalar("axis", 0)
+i3 = Output("op3", "TENSOR_FLOAT32", "{2,1,3,4}") # a vector of 24 float32s
+model = model.Operation("GATHER_EX", i1, i2, axis).To(i3)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [3.123456789123456789, 4.123456789123456789, 5.123456789123456789, 6.123456789123456789,
+          7.123456789123456789, 8.123456789123456789, 9.123456789123456789, 1.123456789123456789,
+          2.123456789123456789, 18.123456789123456789, 19.123456789123456789, 11.123456789123456789,
+          13.123456789123456789, 14.123456789123456789, 15.123456789123456789, 16.123456789123456789,
+          17.123456789123456789, 18.123456789123456789, 19.123456789123456789, 11.123456789123456789,
+          12.123456789123456789, 28.123456789123456789, 29.123456789123456789, 21.123456789123456789],
+          i2: # input 1
+          [0, 0]}
+
+output0 = {i3: # output 0
+           [3.123456789123456789, 4.123456789123456789, 5.123456789123456789, 6.123456789123456789,
+           7.123456789123456789, 8.123456789123456789, 9.123456789123456789, 1.123456789123456789,
+           2.123456789123456789, 18.123456789123456789, 19.123456789123456789, 11.123456789123456789,
+           3.123456789123456789, 4.123456789123456789, 5.123456789123456789, 6.123456789123456789,
+           7.123456789123456789, 8.123456789123456789, 9.123456789123456789, 1.123456789123456789,
+           2.123456789123456789, 18.123456789123456789, 19.123456789123456789, 11.123456789123456789]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/gather_ex_3D_2D_float_3.mod.py b/tests/nnapi/specs/Ex/gather_ex_3D_2D_float_3.mod.py
new file mode 100644
index 000000000..cfcd1b479
--- /dev/null
+++ b/tests/nnapi/specs/Ex/gather_ex_3D_2D_float_3.mod.py
@@ -0,0 +1,26 @@
+# model
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{2,3,4}") # a vector of 24 float32s
+i2 = Input("op2", "TENSOR_INT32", "{2,1}") # another vector of 2 int32s
+axis = Int32Scalar("axis", 2)
+i3 = Output("op3", "TENSOR_FLOAT32", "{2,3,2,1}") # a vector of 12 float32s
+model = model.Operation("GATHER_EX", i1, i2, axis).To(i3)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [3.123456789123456789, 4.123456789123456789, 5.123456789123456789, 6.123456789123456789,
+          7.123456789123456789, 8.123456789123456789, 9.123456789123456789, 1.123456789123456789,
+          2.123456789123456789, 18.123456789123456789, 19.123456789123456789, 11.123456789123456789,
+          13.123456789123456789, 14.123456789123456789, 15.123456789123456789, 16.123456789123456789,
+          17.123456789123456789, 18.123456789123456789, 19.123456789123456789, 11.123456789123456789,
+          12.123456789123456789, 28.123456789123456789, 29.123456789123456789, 21.123456789123456789],
+          i2: # input 1
+          [3, 1]}
+
+output0 = {i3: # output 0
+           [6.123456789123456789, 4.123456789123456789, 1.123456789123456789, 8.123456789123456789,
+            11.123456789123456789, 18.123456789123456789, 16.123456789123456789, 14.123456789123456789,
+            11.123456789123456789, 18.123456789123456789, 21.123456789123456789, 28.123456789123456789]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/gather_ex_4D_float.mod.py b/tests/nnapi/specs/Ex/gather_ex_4D_float.mod.py
new file mode 100644
index 000000000..38fa8d015
--- /dev/null
+++ b/tests/nnapi/specs/Ex/gather_ex_4D_float.mod.py
@@ -0,0 +1,41 @@
+# This test case is for 4d input gather operator.
+# The input shape is [1,2,3,4] and this test produces output
+# by referencing the data on axis 0 from the input to the indices value [0,0].
+# In this case, the output shape changeds to [2,2,3,4] because it uses [0,0] indices on the 0 axis,
+# and the data is configured as filling the 0th data of the input axis 0 twice.
+
+# model
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{1,2,3,4}") # a vector of 24 float32s
+i2 = Input("op2", "TENSOR_INT32", "{2}") # another vector of 2 int32s
+axis = Int32Scalar("axis", 0)
+i3 = Output("op3", "TENSOR_FLOAT32", "{2,2,3,4}") # a vector of 48 float32s
+model = model.Operation("GATHER_EX", i1, i2, axis).To(i3)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [1.123456789123456789, 2.123456789123456789, 3.123456789123456789, 4.123456789123456789,
+          5.123456789123456789, 6.123456789123456789, 7.123456789123456789, 8.123456789123456789,
+          9.123456789123456789, 10.123456789123456789, 11.123456789123456789, 12.123456789123456789,
+          13.123456789123456789, 14.123456789123456789, 15.123456789123456789, 16.123456789123456789,
+          17.123456789123456789, 18.123456789123456789, 19.123456789123456789, 20.123456789123456789,
+          21.123456789123456789, 22.123456789123456789, 23.123456789123456789, 24.123456789123456789],
+          i2: # input 1
+          [0, 0]}
+
+output0 = {i3: # output 0
+          [1.123456789123456789, 2.123456789123456789, 3.123456789123456789, 4.123456789123456789,
+          5.123456789123456789, 6.123456789123456789, 7.123456789123456789, 8.123456789123456789,
+          9.123456789123456789, 10.123456789123456789, 11.123456789123456789, 12.123456789123456789,
+          13.123456789123456789, 14.123456789123456789, 15.123456789123456789, 16.123456789123456789,
+          17.123456789123456789, 18.123456789123456789, 19.123456789123456789, 20.123456789123456789,
+          21.123456789123456789, 22.123456789123456789, 23.123456789123456789, 24.123456789123456789,
+          1.123456789123456789, 2.123456789123456789, 3.123456789123456789, 4.123456789123456789,
+          5.123456789123456789, 6.123456789123456789, 7.123456789123456789, 8.123456789123456789,
+          9.123456789123456789, 10.123456789123456789, 11.123456789123456789, 12.123456789123456789,
+          13.123456789123456789, 14.123456789123456789, 15.123456789123456789, 16.123456789123456789,
+          17.123456789123456789, 18.123456789123456789, 19.123456789123456789, 20.123456789123456789,
+          21.123456789123456789, 22.123456789123456789, 23.123456789123456789, 24.123456789123456789]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/greater_equal_ex.mod.py b/tests/nnapi/specs/Ex/greater_equal_ex.mod.py
new file mode 100644
index 000000000..7c62d568b
--- /dev/null
+++ b/tests/nnapi/specs/Ex/greater_equal_ex.mod.py
@@ -0,0 +1,35 @@
+#
+# Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+# Copyright (C) 2018 The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+# model
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{2, 1}")
+i2 = Input("op2", "TENSOR_FLOAT32", "{2}")
+i3 = Output("op3", "TENSOR_QUANT8_ASYMM", "{2, 2}, 1.0, 0")
+model = model.Operation("GREATER_EQUAL_EX", i1, i2).To(i3)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [5, 10],
+          i2: # input 1
+          [10, 5]}
+
+output0 = {i3: # output 0
+           [0, 255, 255, 255]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/less_ex.mod.py b/tests/nnapi/specs/Ex/less_ex.mod.py
new file mode 100644
index 000000000..3ae15b62f
--- /dev/null
+++ b/tests/nnapi/specs/Ex/less_ex.mod.py
@@ -0,0 +1,35 @@
+#
+# Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+# Copyright (C) 2018 The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+# model
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{2, 1}")
+i2 = Input("op2", "TENSOR_FLOAT32", "{2}")
+i3 = Output("op3", "TENSOR_QUANT8_ASYMM", "{2, 2}, 1.0, 0")
+model = model.Operation("LESS_EX", i1, i2).To(i3)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [5, 10],
+          i2: # input 1
+          [10, 5]}
+
+output0 = {i3: # output 0
+           [255, 0, 0, 0]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/pack_ex_2D_float_1.mod.py b/tests/nnapi/specs/Ex/pack_ex_2D_float_1.mod.py
new file mode 100644
index 000000000..06f6e6a7b
--- /dev/null
+++ b/tests/nnapi/specs/Ex/pack_ex_2D_float_1.mod.py
@@ -0,0 +1,54 @@
+# Sample Stack or Pack model
+model = Model()
+i1 = Input("input1", "TENSOR_FLOAT32", "{6, 4}")
+i2 = Input("input2", "TENSOR_FLOAT32", "{6, 4}")
+i3 = Input("input3", "TENSOR_FLOAT32", "{6, 4}")
+num = Int32Scalar("num_tensors", 3)
+axis = Int32Scalar("axis", 0)
+out = Output("output", "TENSOR_FLOAT32", "{3, 6, 4}")
+model = model.Operation("PACK_EX", i1, i2, i3, num, axis).To(out)
+
+input0 = {i1: # input 0
+          [0.3, 1.0, 2.0, 3.0,
+	   4.0, 5.5, 6.3, 7.2,
+	   8.22, 9.8, 10.3, 11.0,
+	   12.22, 13.2, 14.44, 15.32,
+	   16.55, 17.33, 18.1, 19.0,
+	   20.32, 21.9, 22.1, 23.22],
+          i2: # input 1
+          [24.22, 25.1, 26.0, 27.12,
+	   28.32, 29.11, 30.0, 31.98,
+	   32.99, 33.11, 34.1, 35.123,
+	   36.21, 37.22, 38.23, 39.76,
+	   40.1, 41.43, 42.34, 43.1,
+	   44.123, 45.43, 46.1, 47.1],
+          i3: # input 2
+          [48.0, 49.76, 50.0, 51.1,
+	   52.22, 53.12, 54.1, 55.5,
+	   56.5, 57.4, 58.1, 59.23,
+	   60.2, 61.12, 62.11, 63.34,
+	   64.11, 65.1, 66.43, 67.1,
+	   68.1, 69.34, 70.11, 71.45]}
+
+output0 = {out: # output 0
+	   [0.3, 1.0, 2.0, 3.0,
+            4.0, 5.5, 6.3, 7.2,
+            8.22, 9.8, 10.3, 11.0,
+            12.22, 13.2, 14.44, 15.32,
+            16.55, 17.33, 18.1, 19.0,
+            20.32, 21.9, 22.1, 23.22,
+            24.22, 25.1, 26.0, 27.12,
+            28.32, 29.11, 30.0, 31.98,
+            32.99, 33.11, 34.1, 35.123,
+            36.21, 37.22, 38.23, 39.76,
+            40.1, 41.43, 42.34, 43.1,
+            44.123, 45.43, 46.1, 47.1,
+            48.0, 49.76, 50.0, 51.1,
+            52.22, 53.12, 54.1, 55.5,
+            56.5, 57.4, 58.1, 59.23,
+            60.2, 61.12, 62.11, 63.34,
+            64.11, 65.1, 66.43, 67.1,
+            68.1, 69.34, 70.11, 71.45]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/pack_ex_2D_float_2.mod.py b/tests/nnapi/specs/Ex/pack_ex_2D_float_2.mod.py
new file mode 100644
index 000000000..acc8c891f
--- /dev/null
+++ b/tests/nnapi/specs/Ex/pack_ex_2D_float_2.mod.py
@@ -0,0 +1,54 @@
+# Sample Stack or Pack model
+model = Model()
+i1 = Input("input1", "TENSOR_FLOAT32", "{6, 4}")
+i2 = Input("input2", "TENSOR_FLOAT32", "{6, 4}")
+i3 = Input("input3", "TENSOR_FLOAT32", "{6, 4}")
+num = Int32Scalar("num_tensors", 3)
+axis = Int32Scalar("axis", 1)
+out = Output("output", "TENSOR_FLOAT32", "{6, 3, 4}")
+model = model.Operation("PACK_EX", i1, i2, i3, num, axis).To(out)
+
+input0 = {i1: # input 0
+          [0.3, 1.0, 2.0, 3.0,
+	   4.0, 5.5, 6.3, 7.2,
+	   8.22, 9.8, 10.3, 11.0,
+	   12.22, 13.2, 14.44, 15.32,
+	   16.55, 17.33, 18.1, 19.0,
+	   20.32, 21.9, 22.1, 23.22],
+          i2: # input 1
+          [24.22, 25.1, 26.0, 27.12,
+	   28.32, 29.11, 30.0, 31.98,
+	   32.99, 33.11, 34.1, 35.123,
+	   36.21, 37.22, 38.23, 39.76,
+	   40.1, 41.43, 42.34, 43.1,
+	   44.123, 45.43, 46.1, 47.1],
+          i3: # input 2
+          [48.0, 49.76, 50.0, 51.1,
+	   52.22, 53.12, 54.1, 55.5,
+	   56.5, 57.4, 58.1, 59.23,
+	   60.2, 61.12, 62.11, 63.34,
+	   64.11, 65.1, 66.43, 67.1,
+	   68.1, 69.34, 70.11, 71.45]}
+
+output0 = {out: # output 0
+           [0.3, 1.0, 2.0, 3.0,
+	   24.22, 25.1, 26.0, 27.12,
+	   48.0, 49.76, 50.0, 51.1,
+	   4.0, 5.5, 6.3, 7.2,
+	   28.32, 29.11, 30.0, 31.98,
+	   52.22, 53.12, 54.1, 55.5,
+	   8.22, 9.8, 10.3, 11.0,
+	   32.99, 33.11, 34.1, 35.123,
+	   56.5, 57.4, 58.1, 59.23,
+	   12.22, 13.2, 14.44, 15.32,
+	   36.21, 37.22, 38.23, 39.76,
+	   60.2, 61.12, 62.11, 63.34,
+	   16.55, 17.33, 18.1, 19.0,
+	   40.1, 41.43, 42.34, 43.1,
+	   64.11, 65.1, 66.43, 67.1,
+	   20.32, 21.9, 22.1, 23.22,
+	   44.123, 45.43, 46.1, 47.1,
+	   68.1, 69.34, 70.11, 71.45]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/pack_ex_2D_int_1.mod.py b/tests/nnapi/specs/Ex/pack_ex_2D_int_1.mod.py
new file mode 100644
index 000000000..0ffd6cf9d
--- /dev/null
+++ b/tests/nnapi/specs/Ex/pack_ex_2D_int_1.mod.py
@@ -0,0 +1,25 @@
+# Sample Stack or Pack model
+model = Model()
+i1 = Input("input1", "TENSOR_INT32", "{6, 4}")
+i2 = Input("input2", "TENSOR_INT32", "{6, 4}")
+i3 = Input("input3", "TENSOR_INT32", "{6, 4}")
+num = Int32Scalar("num_tensors", 3)
+axis = Int32Scalar("axis", 0)
+out = Output("output", "TENSOR_INT32", "{3, 6, 4}")
+model = model.Operation("PACK_EX", i1, i2, i3, num, axis).To(out)
+
+input0 = {i1: # input 0
+         [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23],
+         i2: # input 1
+         [24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47],
+         i3: # input 2
+         [48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71]}
+
+output0 = {out: # output 0
+           [ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
+             18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35,
+             36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
+             54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/pack_ex_2D_int_2.mod.py b/tests/nnapi/specs/Ex/pack_ex_2D_int_2.mod.py
new file mode 100644
index 000000000..c9bdc419b
--- /dev/null
+++ b/tests/nnapi/specs/Ex/pack_ex_2D_int_2.mod.py
@@ -0,0 +1,25 @@
+# Sample Stack or Pack model
+model = Model()
+i1 = Input("input1", "TENSOR_INT32", "{6, 4}")
+i2 = Input("input2", "TENSOR_INT32", "{6, 4}")
+i3 = Input("input3", "TENSOR_INT32", "{6, 4}")
+num = Int32Scalar("num_tensors", 3)
+axis = Int32Scalar("axis", 1)
+out = Output("output", "TENSOR_INT32", "{6, 3, 4}")
+model = model.Operation("PACK_EX", i1, i2, i3, num, axis).To(out)
+
+input0 = {i1: # input 0
+         [ 0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23],
+           i2: # input 1
+           [24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47],
+           i3: # input 2
+          [48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71]}
+
+output0 = {out: # output 0
+           [ 0,  1,  2,  3, 24, 25, 26, 27, 48, 49, 50, 51,  4,  5,  6,  7, 28, 29,
+             30, 31, 52, 53, 54, 55,  8,  9, 10, 11, 32, 33, 34, 35, 56, 57, 58, 59,
+             12, 13, 14, 15, 36, 37, 38, 39, 60, 61, 62, 63, 16, 17, 18, 19, 40, 41,
+             42, 43, 64, 65, 66, 67, 20, 21, 22, 23, 44, 45, 46, 47, 68, 69, 70, 71]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/pack_ex_3D_float_1.mod.py b/tests/nnapi/specs/Ex/pack_ex_3D_float_1.mod.py
deleted file mode 100644
index 3f3ea683f..000000000
--- a/tests/nnapi/specs/Ex/pack_ex_3D_float_1.mod.py
+++ /dev/null
@@ -1,54 +0,0 @@
-# Sample Stack or Pack model
-model = Model()
-i1 = Input("input1", "TENSOR_FLOAT32", "{2, 3, 4}")
-i2 = Input("input2", "TENSOR_FLOAT32", "{2, 3, 4}")
-i3 = Input("input3", "TENSOR_FLOAT32", "{2, 3, 4}")
-num = Int32Scalar("num_tensors", 3)
-axis = Int32Scalar("axis", 0)
-out = Output("output", "TENSOR_FLOAT32", "{3, 2, 3, 4}")
-model = model.Operation("PACK_EX", i1, i2, i3, num, axis).To(out)
-
-input0 = {i1: # input 0
-          [0.3, 1.0, 2.0, 3.0,
-	   4.0, 5.5, 6.3, 7.2,
-	   8.22, 9.8, 10.3, 11.0,
-	   12.22, 13.2, 14.44, 15.32,
-	   16.55, 17.33, 18.1, 19.0,
-	   20.32, 21.9, 22.1, 23.22],
-          i2: # input 1
-          [24.22, 25.1, 26.0, 27.12,
-	   28.32, 29.11, 30.0, 31.98,
-	   32.99, 33.11, 34.1, 35.123,
-	   36.21, 37.22, 38.23, 39.76,
-	   40.1, 41.43, 42.34, 43.1,
-	   44.123, 45.43, 46.1, 47.1],
-          i3: # input 2
-          [48.0, 49.76, 50.0, 51.1,
-	   52.22, 53.12, 54.1, 55.5,
-	   56.5, 57.4, 58.1, 59.23,
-	   60.2, 61.12, 62.11, 63.34,
-	   64.11, 65.1, 66.43, 67.1,
-	   68.1, 69.34, 70.11, 71.45]}
-
-output0 = {out: # output 0
-	   [0.3, 1.0, 2.0, 3.0,
-            4.0, 5.5, 6.3, 7.2,
-            8.22, 9.8, 10.3, 11.0,
-            12.22, 13.2, 14.44, 15.32,
-            16.55, 17.33, 18.1, 19.0,
-            20.32, 21.9, 22.1, 23.22,
-            24.22, 25.1, 26.0, 27.12,
-            28.32, 29.11, 30.0, 31.98,
-            32.99, 33.11, 34.1, 35.123,
-            36.21, 37.22, 38.23, 39.76,
-            40.1, 41.43, 42.34, 43.1,
-            44.123, 45.43, 46.1, 47.1,
-            48.0, 49.76, 50.0, 51.1,
-            52.22, 53.12, 54.1, 55.5,
-            56.5, 57.4, 58.1, 59.23,
-            60.2, 61.12, 62.11, 63.34,
-            64.11, 65.1, 66.43, 67.1,
-            68.1, 69.34, 70.11, 71.45]}
-
-# Instantiate an example
-Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/pack_ex_3D_float_2.mod.py b/tests/nnapi/specs/Ex/pack_ex_3D_float_2.mod.py
deleted file mode 100644
index d0caa02cc..000000000
--- a/tests/nnapi/specs/Ex/pack_ex_3D_float_2.mod.py
+++ /dev/null
@@ -1,54 +0,0 @@
-# Sample Stack or Pack model
-model = Model()
-i1 = Input("input1", "TENSOR_FLOAT32", "{2, 3, 4}")
-i2 = Input("input2", "TENSOR_FLOAT32", "{2, 3, 4}")
-i3 = Input("input3", "TENSOR_FLOAT32", "{2, 3, 4}")
-num = Int32Scalar("num_tensors", 3)
-axis = Int32Scalar("axis", 2)
-out = Output("output", "TENSOR_FLOAT32", "{2, 3, 3, 4}")
-model = model.Operation("PACK_EX", i1, i2, i3, num, axis).To(out)
-
-input0 = {i1: # input 0
-          [0.3, 1.0, 2.0, 3.0,
-	   4.0, 5.5, 6.3, 7.2,
-	   8.22, 9.8, 10.3, 11.0,
-	   12.22, 13.2, 14.44, 15.32,
-	   16.55, 17.33, 18.1, 19.0,
-	   20.32, 21.9, 22.1, 23.22],
-          i2: # input 1
-          [24.22, 25.1, 26.0, 27.12,
-	   28.32, 29.11, 30.0, 31.98,
-	   32.99, 33.11, 34.1, 35.123,
-	   36.21, 37.22, 38.23, 39.76,
-	   40.1, 41.43, 42.34, 43.1,
-	   44.123, 45.43, 46.1, 47.1],
-          i3: # input 2
-          [48.0, 49.76, 50.0, 51.1,
-	   52.22, 53.12, 54.1, 55.5,
-	   56.5, 57.4, 58.1, 59.23,
-	   60.2, 61.12, 62.11, 63.34,
-	   64.11, 65.1, 66.43, 67.1,
-	   68.1, 69.34, 70.11, 71.45]}
-
-output0 = {out: # output 0
-           [0.3, 1.0, 2.0, 3.0,
-	   24.22, 25.1, 26.0, 27.12,
-	   48.0, 49.76, 50.0, 51.1,
-	   4.0, 5.5, 6.3, 7.2,
-	   28.32, 29.11, 30.0, 31.98,
-	   52.22, 53.12, 54.1, 55.5,
-	   8.22, 9.8, 10.3, 11.0,
-	   32.99, 33.11, 34.1, 35.123,
-	   56.5, 57.4, 58.1, 59.23,
-	   12.22, 13.2, 14.44, 15.32,
-	   36.21, 37.22, 38.23, 39.76,
-	   60.2, 61.12, 62.11, 63.34,
-	   16.55, 17.33, 18.1, 19.0,
-	   40.1, 41.43, 42.34, 43.1,
-	   64.11, 65.1, 66.43, 67.1,
-	   20.32, 21.9, 22.1, 23.22,
-	   44.123, 45.43, 46.1, 47.1,
-	   68.1, 69.34, 70.11, 71.45]}
-
-# Instantiate an example
-Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/pack_ex_3D_int_1.mod.py b/tests/nnapi/specs/Ex/pack_ex_3D_int_1.mod.py
deleted file mode 100644
index 23b365957..000000000
--- a/tests/nnapi/specs/Ex/pack_ex_3D_int_1.mod.py
+++ /dev/null
@@ -1,25 +0,0 @@
-# Sample Stack or Pack model
-model = Model()
-i1 = Input("input1", "TENSOR_INT32", "{2, 3, 4}")
-i2 = Input("input2", "TENSOR_INT32", "{2, 3, 4}")
-i3 = Input("input3", "TENSOR_INT32", "{2, 3, 4}")
-num = Int32Scalar("num_tensors", 3)
-axis = Int32Scalar("axis", 0)
-out = Output("output", "TENSOR_INT32", "{3, 2, 3, 4}")
-model = model.Operation("PACK_EX", i1, i2, i3, num, axis).To(out)
-
-input0 = {i1: # input 0
-         [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23],
-         i2: # input 1
-         [24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47],
-         i3: # input 2
-         [48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71]}
-
-output0 = {out: # output 0
-           [ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
-             18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35,
-             36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
-             54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71]}
-
-# Instantiate an example
-Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/pack_ex_3D_int_2.mod.py b/tests/nnapi/specs/Ex/pack_ex_3D_int_2.mod.py
deleted file mode 100644
index 747fcc628..000000000
--- a/tests/nnapi/specs/Ex/pack_ex_3D_int_2.mod.py
+++ /dev/null
@@ -1,25 +0,0 @@
-# Sample Stack or Pack model
-model = Model()
-i1 = Input("input1", "TENSOR_INT32", "{2, 3, 4}")
-i2 = Input("input2", "TENSOR_INT32", "{2, 3, 4}")
-i3 = Input("input3", "TENSOR_INT32", "{2, 3, 4}")
-num = Int32Scalar("num_tensors", 3)
-axis = Int32Scalar("axis", 2)
-out = Output("output", "TENSOR_INT32", "{2, 3, 3, 4}")
-model = model.Operation("PACK_EX", i1, i2, i3, num, axis).To(out)
-
-input0 = {i1: # input 0
-         [ 0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23],
-           i2: # input 1
-           [24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47],
-           i3: # input 2
-          [48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71]}
-
-output0 = {out: # output 0
-           [ 0,  1,  2,  3, 24, 25, 26, 27, 48, 49, 50, 51,  4,  5,  6,  7, 28, 29,
-             30, 31, 52, 53, 54, 55,  8,  9, 10, 11, 32, 33, 34, 35, 56, 57, 58, 59,
-             12, 13, 14, 15, 36, 37, 38, 39, 60, 61, 62, 63, 16, 17, 18, 19, 40, 41,
-             42, 43, 64, 65, 66, 67, 20, 21, 22, 23, 44, 45, 46, 47, 68, 69, 70, 71]}
-
-# Instantiate an example
-Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/prelu_ex_broadcast_float_1.mod.py b/tests/nnapi/specs/Ex/prelu_ex_broadcast_float_1.mod.py
new file mode 100644
index 000000000..23e363f5c
--- /dev/null
+++ b/tests/nnapi/specs/Ex/prelu_ex_broadcast_float_1.mod.py
@@ -0,0 +1,23 @@
+# model
+model = Model()
+i1 = Input("op1", "TENSOR_FLOAT32", "{1, 2, 2, 3}") # a vector of input
+i2 = Input("op2", "TENSOR_FLOAT32", "{1, 1, 1, 3}") # a vector of alpha
+i3 = Output("op3", "TENSOR_FLOAT32", "{1, 2, 2, 3}") # a vector of output
+model = model.Operation("PRELU_EX", i1, i2).To(i3)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [0.0, 0.0, 0.0,
+           1.0, 1.0, 1.0,
+          -1.0, -1.0, -1.0,
+          -2.0, -2.0, -2.0],
+          i2: # input 1
+          [0.0, 1.0, 2.0]}
+
+output0 = {i3: # output 0
+           [0.0, 0.0, 0.0,
+            1.0, 1.0, 1.0,
+            0.0, -1.0, -2.0,
+            0.0, -2.0, -4.0]}
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/prelu_ex_broadcast_quant8_1.mod.py b/tests/nnapi/specs/Ex/prelu_ex_broadcast_quant8_1.mod.py
new file mode 100644
index 000000000..5fc6884bc
--- /dev/null
+++ b/tests/nnapi/specs/Ex/prelu_ex_broadcast_quant8_1.mod.py
@@ -0,0 +1,24 @@
+# model
+model = Model()
+i1 = Input("op1", "TENSOR_QUANT8_ASYMM", "{1, 2, 2, 3}, 1.0f, 2") # a vector of input
+i2 = Input("op2", "TENSOR_QUANT8_ASYMM", "{1, 1, 3}, 1.0f, 1") # a vector of alpha
+i3 = Output("op3", "TENSOR_QUANT8_ASYMM", "{1, 2, 2, 3}, 0.5f, 3") # a vector of output
+model = model.Operation("PRELU_EX", i1, i2).To(i3)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [1, 1, 1,
+           2, 2, 2,
+           3, 3, 3,
+           1, 2, 3],
+          i2: # input 1
+          [0, 1, 2]}
+
+output0 = {i3: # output 0
+           [5, 3, 1,
+            3, 3, 3,
+            5, 5, 5,
+            5, 3, 5]}
+# Instantiate an example
+Example((input0, output0))
+
diff --git a/tests/nnapi/specs/Ex/prelu_ex_float_2.mod.py b/tests/nnapi/specs/Ex/prelu_ex_float_2.mod.py
deleted file mode 100644
index d2ebd2a0b..000000000
--- a/tests/nnapi/specs/Ex/prelu_ex_float_2.mod.py
+++ /dev/null
@@ -1,22 +0,0 @@
-# model
-model = Model()
-i1 = Input("op1", "TENSOR_FLOAT32", "{1, 2, 2, 1}") # a vector of input
-i2 = Input("op2", "TENSOR_FLOAT32", "{1, 2, 2, 1}") # a vector of alpha
-i3 = Output("op3", "TENSOR_FLOAT32", "{1, 2, 2, 1}") # a vector of output
-model = model.Operation("PRELU_EX", i1, i2).To(i3)
-
-# Example 1. Input in operand 0,
-input0 = {i1: # input 0
-          [3.0, -2.0,
-           -1.0, -2.0
-	  ],
-          i2: # input 1
-          [0.0, 1.0,
-	   1.0, 2.0]}
-
-output0 = {i3: # output 0
-           [3.0, -2.0,
-            -1.0, -4.0
-           ]}
-# Instantiate an example
-Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/prelu_ex_quant8_1.mod.py b/tests/nnapi/specs/Ex/prelu_ex_quant8_1.mod.py
new file mode 100644
index 000000000..9548f8255
--- /dev/null
+++ b/tests/nnapi/specs/Ex/prelu_ex_quant8_1.mod.py
@@ -0,0 +1,23 @@
+# model
+model = Model()
+i1 = Input("op1", "TENSOR_QUANT8_ASYMM", "{1, 2, 2, 1}, 0.5f, 5") # a vector of input
+i2 = Input("op2", "TENSOR_QUANT8_ASYMM", "{1, 2, 2, 1}, 0.5f, 1") # a vector of alpha
+i3 = Output("op3", "TENSOR_QUANT8_ASYMM", "{1, 2, 2, 1}, 0.1f, 3") # a vector of output
+model = model.Operation("PRELU_EX", i1, i2).To(i3)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [3, 1,
+           7, 11
+	  ],
+          i2: # input 1
+          [0, 1,
+	   2, 2]}
+
+output0 = {i3: # output 0
+           [8, 3,
+            13, 33
+           ]}
+# Instantiate an example
+Example((input0, output0))
+
diff --git a/tests/nnapi/specs/Ex/reduce_max_ex_2D_float.mod.py b/tests/nnapi/specs/Ex/reduce_max_ex_2D_float.mod.py
new file mode 100644
index 000000000..5df76cbdb
--- /dev/null
+++ b/tests/nnapi/specs/Ex/reduce_max_ex_2D_float.mod.py
@@ -0,0 +1,18 @@
+# model
+model = Model()
+i1 = Input("input", "TENSOR_FLOAT32", "{3, 4}")
+axis = Int32Scalar("axis", 1)
+out1 = Output("output", "TENSOR_FLOAT32", "{3}")
+model = model.Operation("REDUCE_MAX_EX", i1, axis).To(out1)
+
+# Example 1. Input in operand 0, 1
+input0 = {i1: # input 0
+          [3.2, 11.47, 3.8, 5.76,
+           28.2, 0.999, -1.3, -13.5,
+           -3.4, -22.1, -2.2, -49.7]}
+
+output0 = {out1: # output 0
+           [11.47, 28.2, -2.2]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/reduce_max_ex_2D_int32.mod.py b/tests/nnapi/specs/Ex/reduce_max_ex_2D_int32.mod.py
new file mode 100644
index 000000000..94e952646
--- /dev/null
+++ b/tests/nnapi/specs/Ex/reduce_max_ex_2D_int32.mod.py
@@ -0,0 +1,18 @@
+# model
+model = Model()
+i1 = Input("input", "TENSOR_INT32", "{3, 4}")
+axis = Int32Scalar("axis", 1)
+out1 = Output("output", "TENSOR_INT32", "{3}")
+model = model.Operation("REDUCE_MAX_EX", i1, axis).To(out1)
+
+# Example 1. Input in operand 0, 1
+input0 = {i1: # input 0
+          [3, 11, 3, 5,
+           28, 0, -1, -13,
+           -4, -22, -2, -49]}
+
+output0 = {out1: # output 0
+           [11, 28, -2]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/reduce_max_ex_4D_float_reducing_C.mod.py b/tests/nnapi/specs/Ex/reduce_max_ex_4D_float_reducing_C.mod.py
new file mode 100644
index 000000000..4143b4b4c
--- /dev/null
+++ b/tests/nnapi/specs/Ex/reduce_max_ex_4D_float_reducing_C.mod.py
@@ -0,0 +1,34 @@
+batch = 2
+rows = 3
+cols = 4
+depth = 5
+
+input_table = [x for x in range(batch * rows * cols * depth)]
+for i in range(batch):
+  for j in range(rows):
+    for k in range(cols):
+      for l in range(depth):
+        input_table[i * rows * cols * depth + j * cols * depth + k * depth + l] = i * rows * cols * depth + j * cols * depth + k * depth + l;
+
+output_table = [x for x in range(batch * rows * cols)]
+for i in range(batch):
+  for j in range(rows):
+    for k in range(cols):
+      output_table[i * rows * cols + j * cols + k] = i * rows * cols * depth + j * cols * depth + k * depth + depth - 1;
+
+model = Model()
+i1 = Input("input", "TENSOR_FLOAT32", "{%d, %d, %d, %d}" % (batch, rows, cols, depth))
+axis = Parameter("axis", "TENSOR_INT32", "{2}", [3, -1])
+output = Output("output", "TENSOR_FLOAT32", "{%d, %d, %d}" % (batch, rows, cols))
+
+model = model.Operation("REDUCE_MAX_EX", i1, axis).To(output)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          input_table}
+
+output0 = {output: # output 0
+          output_table}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/reduce_max_ex_4D_float_reducing_HW.mod.py b/tests/nnapi/specs/Ex/reduce_max_ex_4D_float_reducing_HW.mod.py
new file mode 100644
index 000000000..e220df7a8
--- /dev/null
+++ b/tests/nnapi/specs/Ex/reduce_max_ex_4D_float_reducing_HW.mod.py
@@ -0,0 +1,34 @@
+batch = 2
+rows = 3
+cols = 4
+depth = 5
+
+input_table = [x for x in range(batch * rows * cols * depth)]
+for i in range(batch):
+  for j in range(rows):
+    for k in range(cols):
+      for l in range(depth):
+        input_table[i * rows * cols * depth + j * cols * depth + k * depth + l] = i * rows * cols * depth + j * cols * depth + k * depth + l;
+
+# Since the axises to be reduced are {rows, cols} and the value of the input always increases in here, the output's values are i * rows * cols * depth + (rows - 1) * cols * depth + (cols - 1) * depth + l.
+output_table = [x for x in range(batch * depth)]
+for i in range(batch):
+  for l in range(depth):
+    output_table[i * depth + l] = i * rows * cols * depth + (rows - 1) * cols * depth + (cols - 1) * depth + l;
+
+model = Model()
+i1 = Input("input", "TENSOR_FLOAT32", "{%d, %d, %d, %d}" % (batch, rows, cols, depth))
+axis = Parameter("axis", "TENSOR_INT32", "{4}", [1, 2, -3, -2])
+output = Output("output", "TENSOR_FLOAT32", "{%d, %d}" % (batch, depth))
+
+model = model.Operation("REDUCE_MAX_EX", i1, axis).To(output)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          input_table}
+
+output0 = {output: # output 0
+          output_table}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/reduce_max_ex_float.mod.py b/tests/nnapi/specs/Ex/reduce_max_ex_float.mod.py
new file mode 100644
index 000000000..c6387ae3d
--- /dev/null
+++ b/tests/nnapi/specs/Ex/reduce_max_ex_float.mod.py
@@ -0,0 +1,18 @@
+model = Model()
+i1 = Input("input", "TENSOR_FLOAT32", "{1, 2, 2, 1}")
+axis = Parameter("axis", "TENSOR_INT32", "{1}", [2])
+output = Output("output", "TENSOR_FLOAT32", "{1, 2, 1}")
+
+model = model.Operation("REDUCE_MAX_EX", i1, axis).To(output)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [1.0, 2.0,
+           3.0, 4.0]}
+
+output0 = {output: # output 0
+          [2.0,
+           4.0]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/reduce_max_ex_float_1.mod.py b/tests/nnapi/specs/Ex/reduce_max_ex_float_1.mod.py
new file mode 100644
index 000000000..7871c6123
--- /dev/null
+++ b/tests/nnapi/specs/Ex/reduce_max_ex_float_1.mod.py
@@ -0,0 +1,17 @@
+model = Model()
+i1 = Input("input", "TENSOR_FLOAT32", "{4, 3, 2}")
+axis = Parameter("axis", "TENSOR_INT32", "{4}", [1, 0, -3, -3])
+output = Output("output", "TENSOR_FLOAT32", "{2}")
+
+model = model.Operation("REDUCE_MAX_EX", i1, axis).To(output)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [1.0,  2.0,  3.0,  4.0,  5.0,  6.0,  7.0,  8.0,  9.0,  10.0, 11.0, 12.0,
+           13.0, 14.0, 15.0, 16.0, 17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0]}
+
+output0 = {output: # output 0
+          [23.0, 24.0]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/reduce_max_ex_float_2.mod.py b/tests/nnapi/specs/Ex/reduce_max_ex_float_2.mod.py
new file mode 100644
index 000000000..fb523b294
--- /dev/null
+++ b/tests/nnapi/specs/Ex/reduce_max_ex_float_2.mod.py
@@ -0,0 +1,17 @@
+model = Model()
+i1 = Input("input", "TENSOR_FLOAT32", "{4, 3, 2}")
+axis = Parameter("axis", "TENSOR_INT32", "{2}", [0, 2])
+output = Output("output", "TENSOR_FLOAT32", "{1, 3, 1}")
+
+model = model.Operation("REDUCE_MAX_EX", i1, axis).To(output)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [1.0,  2.0,  3.0,  4.0,  5.0,  6.0,  7.0,  8.0,  9.0,  10.0, 11.0, 12.0,
+           13.0, 14.0, 15.0, 16.0, 17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0]}
+
+output0 = {output: # output 0
+          [20, 22, 24]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/reduce_max_ex_quant8_1.mod.py b/tests/nnapi/specs/Ex/reduce_max_ex_quant8_1.mod.py
new file mode 100644
index 000000000..9cef1def4
--- /dev/null
+++ b/tests/nnapi/specs/Ex/reduce_max_ex_quant8_1.mod.py
@@ -0,0 +1,18 @@
+model = Model()
+i1 = Input("input", "TENSOR_QUANT8_ASYMM", "{4, 3, 2}, 0.8, 5")
+axis = Parameter("axis", "TENSOR_INT32", "{4}", [1, 0, -3, -3])
+output = Output("output", "TENSOR_QUANT8_ASYMM", "{2}, 0.8, 5")
+
+model = model.Operation("REDUCE_MAX_EX", i1, axis).To(output)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [1,  2,  3,  4,  5,  6,  7,  8,
+           9,  10, 11, 12, 13, 14, 15, 16,
+           17, 18, 19, 20, 21, 22, 23, 24]}
+
+output0 = {output: # output 0
+          [23, 24]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/reduce_max_ex_quant8_2.mod.py b/tests/nnapi/specs/Ex/reduce_max_ex_quant8_2.mod.py
new file mode 100644
index 000000000..d59c11b0e
--- /dev/null
+++ b/tests/nnapi/specs/Ex/reduce_max_ex_quant8_2.mod.py
@@ -0,0 +1,18 @@
+model = Model()
+i1 = Input("input", "TENSOR_QUANT8_ASYMM", "{4, 3, 2}, 0.8, 5")
+axis = Parameter("axis", "TENSOR_INT32", "{2}", [0, 2])
+output = Output("output", "TENSOR_QUANT8_ASYMM", "{1, 3, 1}, 0.8, 5")
+
+model = model.Operation("REDUCE_MAX_EX", i1, axis).To(output)
+
+# Example 1. Input in operand 0,
+input0 = {i1: # input 0
+          [1,  2,  3,  4,  5,  6,  7,  8,
+           9,  10, 11, 12, 13, 14, 15, 16,
+           17, 18, 19, 20, 21, 22, 23, 24]}
+
+output0 = {output: # output 0
+          [20, 22, 24]}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/split_ex_1D_float.mod.py b/tests/nnapi/specs/Ex/split_ex_1D_float.mod.py
index 97b61462e..137ece828 100644
--- a/tests/nnapi/specs/Ex/split_ex_1D_float.mod.py
+++ b/tests/nnapi/specs/Ex/split_ex_1D_float.mod.py
@@ -2,6 +2,7 @@
 model = Model()
 i1 = Input("op1", "TENSOR_FLOAT32", "{8}")
 axis = Int32Scalar("axis", 0)
+num_out = Int32Scalar("num_out", 8)
 i2 = Output("op2", "TENSOR_FLOAT32", "{1}")
 i3 = Output("op3", "TENSOR_FLOAT32", "{1}")
 i4 = Output("op4", "TENSOR_FLOAT32", "{1}")
@@ -11,7 +12,7 @@ i7 = Output("op7", "TENSOR_FLOAT32", "{1}")
 i8 = Output("op8", "TENSOR_FLOAT32", "{1}")
 i9 = Output("op9", "TENSOR_FLOAT32", "{1}")
 
-model = model.Operation("SPLIT_EX", axis, i1).To([i2, i3, i4, i5, i6, i7, i8, i9])
+model = model.Operation("SPLIT_EX", i1, axis, num_out).To([i2, i3, i4, i5, i6, i7, i8, i9])
 
 # Example 1. Input in operand 0,
 input0 = {i1: # input 0
diff --git a/tests/nnapi/specs/Ex/split_ex_1D_int32.mod.py b/tests/nnapi/specs/Ex/split_ex_1D_int32.mod.py
index 378b37707..9bfc215f6 100644
--- a/tests/nnapi/specs/Ex/split_ex_1D_int32.mod.py
+++ b/tests/nnapi/specs/Ex/split_ex_1D_int32.mod.py
@@ -2,6 +2,7 @@
 model = Model()
 i1 = Input("op1", "TENSOR_INT32", "{8}")
 axis = Int32Scalar("axis", 0)
+num_out = Int32Scalar("num_out", 8)
 i2 = Output("op2", "TENSOR_INT32", "{1}")
 i3 = Output("op3", "TENSOR_INT32", "{1}")
 i4 = Output("op4", "TENSOR_INT32", "{1}")
@@ -11,7 +12,7 @@ i7 = Output("op7", "TENSOR_INT32", "{1}")
 i8 = Output("op8", "TENSOR_INT32", "{1}")
 i9 = Output("op9", "TENSOR_INT32", "{1}")
 
-model = model.Operation("SPLIT_EX", axis, i1).To([i2, i3, i4, i5, i6, i7, i8, i9])
+model = model.Operation("SPLIT_EX", i1, axis, num_out).To([i2, i3, i4, i5, i6, i7, i8, i9])
 
 # Example 1. Input in operand 0,
 input0 = {i1: # input 0
diff --git a/tests/nnapi/specs/Ex/split_ex_4D_float_1.mod.py b/tests/nnapi/specs/Ex/split_ex_4D_float_1.mod.py
index 3059fae7c..2353a8a0f 100644
--- a/tests/nnapi/specs/Ex/split_ex_4D_float_1.mod.py
+++ b/tests/nnapi/specs/Ex/split_ex_4D_float_1.mod.py
@@ -2,9 +2,10 @@
 model = Model()
 i1 = Input("op1", "TENSOR_FLOAT32", "{2,2,2,2}")
 axis = Int32Scalar("axis", 0)
+num_out = Int32Scalar("num_out", 2)
 i2 = Output("op2", "TENSOR_FLOAT32", "{1,2,2,2}")
 i3 = Output("op3", "TENSOR_FLOAT32", "{1,2,2,2}")
-model = model.Operation("SPLIT_EX", axis, i1).To([i2, i3])
+model = model.Operation("SPLIT_EX", i1, axis, num_out).To([i2, i3])
 
 # Example 1. Input in operand 0,
 input0 = {i1: # input 0
diff --git a/tests/nnapi/specs/Ex/split_ex_4D_float_2.mod.py b/tests/nnapi/specs/Ex/split_ex_4D_float_2.mod.py
index faa59bc3c..30ecf2416 100644
--- a/tests/nnapi/specs/Ex/split_ex_4D_float_2.mod.py
+++ b/tests/nnapi/specs/Ex/split_ex_4D_float_2.mod.py
@@ -2,9 +2,10 @@
 model = Model()
 i1 = Input("op1", "TENSOR_FLOAT32", "{2,2,2,2}")
 axis = Int32Scalar("axis", 3)
+num_out = Int32Scalar("num_out", 2)
 i2 = Output("op2", "TENSOR_FLOAT32", "{2,2,2,1}")
 i3 = Output("op3", "TENSOR_FLOAT32", "{2,2,2,1}")
-model = model.Operation("SPLIT_EX", axis, i1).To([i2, i3])
+model = model.Operation("SPLIT_EX", i1, axis, num_out).To([i2, i3])
 
 # Example 1. Input in operand 0,
 input0 = {i1: # input 0
diff --git a/tests/nnapi/specs/Ex/split_ex_4D_float_3.mod.py b/tests/nnapi/specs/Ex/split_ex_4D_float_3.mod.py
index 2091e4b4a..1f7a07880 100644
--- a/tests/nnapi/specs/Ex/split_ex_4D_float_3.mod.py
+++ b/tests/nnapi/specs/Ex/split_ex_4D_float_3.mod.py
@@ -2,9 +2,10 @@
 model = Model()
 i1 = Input("op1", "TENSOR_FLOAT32", "{2,2,2,2}")
 axis = Int32Scalar("axis", -4) # Negative axis
+num_out = Int32Scalar("num_out", 2)
 i2 = Output("op2", "TENSOR_FLOAT32", "{1,2,2,2}")
 i3 = Output("op3", "TENSOR_FLOAT32", "{1,2,2,2}")
-model = model.Operation("SPLIT_EX", axis, i1).To([i2, i3])
+model = model.Operation("SPLIT_EX", i1, axis, num_out).To([i2, i3])
 
 # Example 1. Input in operand 0,
 input0 = {i1: # input 0
diff --git a/tests/nnapi/specs/Ex/split_ex_4D_int32_1.mod.py b/tests/nnapi/specs/Ex/split_ex_4D_int32_1.mod.py
index 3e9438f50..b1c6692ee 100644
--- a/tests/nnapi/specs/Ex/split_ex_4D_int32_1.mod.py
+++ b/tests/nnapi/specs/Ex/split_ex_4D_int32_1.mod.py
@@ -2,9 +2,10 @@
 model = Model()
 i1 = Input("op1", "TENSOR_INT32", "{2,2,2,2}")
 axis = Int32Scalar("axis", 0)
+num_out = Int32Scalar("num_out", 2)
 i2 = Output("op2", "TENSOR_INT32", "{1,2,2,2}")
 i3 = Output("op3", "TENSOR_INT32", "{1,2,2,2}")
-model = model.Operation("SPLIT_EX", axis, i1).To([i2, i3])
+model = model.Operation("SPLIT_EX", i1, axis, num_out).To([i2, i3])
 
 # Example 1. Input in operand 0,
 input0 = {i1: # input 0
diff --git a/tests/nnapi/specs/Ex/split_ex_4D_int32_2.mod.py b/tests/nnapi/specs/Ex/split_ex_4D_int32_2.mod.py
index 83253cb14..88a7cca48 100644
--- a/tests/nnapi/specs/Ex/split_ex_4D_int32_2.mod.py
+++ b/tests/nnapi/specs/Ex/split_ex_4D_int32_2.mod.py
@@ -2,9 +2,10 @@
 model = Model()
 i1 = Input("op1", "TENSOR_INT32", "{2,2,2,2}")
 axis = Int32Scalar("axis", 1)
+num_out = Int32Scalar("num_out", 2)
 i2 = Output("op2", "TENSOR_INT32", "{2,1,2,2}")
 i3 = Output("op3", "TENSOR_INT32", "{2,1,2,2}")
-model = model.Operation("SPLIT_EX", axis, i1).To([i2, i3])
+model = model.Operation("SPLIT_EX", i1, axis, num_out).To([i2, i3])
 
 # Example 1. Input in operand 0,
 input0 = {i1: # input 0
diff --git a/tests/nnapi/specs/Ex/split_ex_4D_int32_3.mod.py b/tests/nnapi/specs/Ex/split_ex_4D_int32_3.mod.py
index b20b2053b..6f5cc621b 100644
--- a/tests/nnapi/specs/Ex/split_ex_4D_int32_3.mod.py
+++ b/tests/nnapi/specs/Ex/split_ex_4D_int32_3.mod.py
@@ -2,9 +2,10 @@
 model = Model()
 i1 = Input("op1", "TENSOR_INT32", "{2,2,2,2}")
 axis = Int32Scalar("axis", 2)
+num_out = Int32Scalar("num_out", 2)
 i2 = Output("op2", "TENSOR_INT32", "{2,2,1,2}")
 i3 = Output("op3", "TENSOR_INT32", "{2,2,1,2}")
-model = model.Operation("SPLIT_EX", axis, i1).To([i2, i3])
+model = model.Operation("SPLIT_EX", i1, axis, num_out).To([i2, i3])
 
 # Example 1. Input in operand 0,
 input0 = {i1: # input 0
diff --git a/tests/nnapi/specs/Ex/split_ex_4D_int32_4.mod.py b/tests/nnapi/specs/Ex/split_ex_4D_int32_4.mod.py
index 3c255cc48..fb6710171 100644
--- a/tests/nnapi/specs/Ex/split_ex_4D_int32_4.mod.py
+++ b/tests/nnapi/specs/Ex/split_ex_4D_int32_4.mod.py
@@ -2,9 +2,10 @@
 model = Model()
 i1 = Input("op1", "TENSOR_INT32", "{2,2,2,2}")
 axis = Int32Scalar("axis", 3)
+num_out = Int32Scalar("num_out", 2)
 i2 = Output("op2", "TENSOR_INT32", "{2,2,2,1}")
 i3 = Output("op3", "TENSOR_INT32", "{2,2,2,1}")
-model = model.Operation("SPLIT_EX", axis, i1).To([i2, i3])
+model = model.Operation("SPLIT_EX", i1, axis, num_out).To([i2, i3])
 
 # Example 1. Input in operand 0,
 input0 = {i1: # input 0
diff --git a/tests/nnapi/specs/Ex/split_ex_4D_int32_5.mod.py b/tests/nnapi/specs/Ex/split_ex_4D_int32_5.mod.py
index 30e5e245d..338794855 100644
--- a/tests/nnapi/specs/Ex/split_ex_4D_int32_5.mod.py
+++ b/tests/nnapi/specs/Ex/split_ex_4D_int32_5.mod.py
@@ -2,9 +2,10 @@
 model = Model()
 i1 = Input("op1", "TENSOR_INT32", "{2,2,2,2}")
 axis = Int32Scalar("axis", -4) # Negative axis
+num_out = Int32Scalar("num_out", 2)
 i2 = Output("op2", "TENSOR_INT32", "{1,2,2,2}")
 i3 = Output("op3", "TENSOR_INT32", "{1,2,2,2}")
-model = model.Operation("SPLIT_EX", axis, i1).To([i2, i3])
+model = model.Operation("SPLIT_EX", i1, axis, num_out).To([i2, i3])
 
 # Example 1. Input in operand 0,
 input0 = {i1: # input 0
diff --git a/tests/nnapi/specs/Ex/split_ex_4D_quant8.mod.py b/tests/nnapi/specs/Ex/split_ex_4D_quant8.mod.py
index 46cb3ab78..a3dbffaa9 100644
--- a/tests/nnapi/specs/Ex/split_ex_4D_quant8.mod.py
+++ b/tests/nnapi/specs/Ex/split_ex_4D_quant8.mod.py
@@ -2,9 +2,10 @@
 model = Model()
 i1 = Input("op1", "TENSOR_QUANT8_ASYMM", "{2,2,2,2}, 0.5f, 1")
 axis = Int32Scalar("axis", 0)
+num_out = Int32Scalar("num_out", 2)
 i2 = Output("op2", "TENSOR_QUANT8_ASYMM", "{1,2,2,2}, 0.5f, 1")
 i3 = Output("op3", "TENSOR_QUANT8_ASYMM", "{1,2,2,2}, 0.5f, 1")
-model = model.Operation("SPLIT_EX", axis, i1).To([i2, i3])
+model = model.Operation("SPLIT_EX", i1, axis, num_out).To([i2, i3])
 
 # Example 1. Input in operand 0,
 input0 = {i1: # input 0
diff --git a/tests/nnapi/specs/Ex/tensorflowmax_ex_2D_float.mod.py b/tests/nnapi/specs/Ex/tensorflowmax_ex_2D_float.mod.py
deleted file mode 100644
index 6cf8d83e7..000000000
--- a/tests/nnapi/specs/Ex/tensorflowmax_ex_2D_float.mod.py
+++ /dev/null
@@ -1,18 +0,0 @@
-# model
-model = Model()
-i1 = Input("input", "TENSOR_FLOAT32", "{3, 4}")
-axis = Int32Scalar("axis", 1)
-out1 = Output("output", "TENSOR_FLOAT32", "{3}")
-model = model.Operation("TENSORFLOW_MAX_EX", i1, axis).To(out1)
-
-# Example 1. Input in operand 0, 1
-input0 = {i1: # input 0
-          [3.2, 11.47, 3.8, 5.76,
-           28.2, 0.999, -1.3, -13.5,
-           -3.4, -22.1, -2.2, -49.7]}
-
-output0 = {out1: # output 0
-           [11.47, 28.2, -2.2]}
-
-# Instantiate an example
-Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/tensorflowmax_ex_2D_int32.mod.py b/tests/nnapi/specs/Ex/tensorflowmax_ex_2D_int32.mod.py
deleted file mode 100644
index 940dab3c3..000000000
--- a/tests/nnapi/specs/Ex/tensorflowmax_ex_2D_int32.mod.py
+++ /dev/null
@@ -1,18 +0,0 @@
-# model
-model = Model()
-i1 = Input("input", "TENSOR_INT32", "{3, 4}")
-axis = Int32Scalar("axis", 1)
-out1 = Output("output", "TENSOR_INT32", "{3}")
-model = model.Operation("TENSORFLOW_MAX_EX", i1, axis).To(out1)
-
-# Example 1. Input in operand 0, 1
-input0 = {i1: # input 0
-          [3, 11, 3, 5,
-           28, 0, -1, -13,
-           -4, -22, -2, -49]}
-
-output0 = {out1: # output 0
-           [11, 28, -2]}
-
-# Instantiate an example
-Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/tensorflowmax_ex_4D_float_reducing_C.mod.py b/tests/nnapi/specs/Ex/tensorflowmax_ex_4D_float_reducing_C.mod.py
deleted file mode 100644
index 82a5dbb93..000000000
--- a/tests/nnapi/specs/Ex/tensorflowmax_ex_4D_float_reducing_C.mod.py
+++ /dev/null
@@ -1,34 +0,0 @@
-batch = 2
-rows = 3
-cols = 4
-depth = 5
-
-input_table = [x for x in range(batch * rows * cols * depth)]
-for i in range(batch):
-  for j in range(rows):
-    for k in range(cols):
-      for l in range(depth):
-        input_table[i * rows * cols * depth + j * cols * depth + k * depth + l] = i * rows * cols * depth + j * cols * depth + k * depth + l;
-
-output_table = [x for x in range(batch * rows * cols)]
-for i in range(batch):
-  for j in range(rows):
-    for k in range(cols):
-      output_table[i * rows * cols + j * cols + k] = i * rows * cols * depth + j * cols * depth + k * depth + depth - 1;
-
-model = Model()
-i1 = Input("input", "TENSOR_FLOAT32", "{%d, %d, %d, %d}" % (batch, rows, cols, depth))
-axis = Parameter("axis", "TENSOR_INT32", "{2}", [3, -1])
-output = Output("output", "TENSOR_FLOAT32", "{%d, %d, %d}" % (batch, rows, cols))
-
-model = model.Operation("TENSORFLOW_MAX_EX", i1, axis).To(output)
-
-# Example 1. Input in operand 0,
-input0 = {i1: # input 0
-          input_table}
-
-output0 = {output: # output 0
-          output_table}
-
-# Instantiate an example
-Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/tensorflowmax_ex_4D_float_reducing_HW.mod.py b/tests/nnapi/specs/Ex/tensorflowmax_ex_4D_float_reducing_HW.mod.py
deleted file mode 100644
index a12762055..000000000
--- a/tests/nnapi/specs/Ex/tensorflowmax_ex_4D_float_reducing_HW.mod.py
+++ /dev/null
@@ -1,34 +0,0 @@
-batch = 2
-rows = 3
-cols = 4
-depth = 5
-
-input_table = [x for x in range(batch * rows * cols * depth)]
-for i in range(batch):
-  for j in range(rows):
-    for k in range(cols):
-      for l in range(depth):
-        input_table[i * rows * cols * depth + j * cols * depth + k * depth + l] = i * rows * cols * depth + j * cols * depth + k * depth + l;
-
-# Since the axises to be reduced are {rows, cols} and the value of the input always increases in here, the output's values are i * rows * cols * depth + (rows - 1) * cols * depth + (cols - 1) * depth + l.
-output_table = [x for x in range(batch * depth)]
-for i in range(batch):
-  for l in range(depth):
-    output_table[i * depth + l] = i * rows * cols * depth + (rows - 1) * cols * depth + (cols - 1) * depth + l;
-
-model = Model()
-i1 = Input("input", "TENSOR_FLOAT32", "{%d, %d, %d, %d}" % (batch, rows, cols, depth))
-axis = Parameter("axis", "TENSOR_INT32", "{4}", [1, 2, -3, -2])
-output = Output("output", "TENSOR_FLOAT32", "{%d, %d}" % (batch, depth))
-
-model = model.Operation("TENSORFLOW_MAX_EX", i1, axis).To(output)
-
-# Example 1. Input in operand 0,
-input0 = {i1: # input 0
-          input_table}
-
-output0 = {output: # output 0
-          output_table}
-
-# Instantiate an example
-Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/tensorflowmax_ex_float.mod.py b/tests/nnapi/specs/Ex/tensorflowmax_ex_float.mod.py
deleted file mode 100644
index 6de220721..000000000
--- a/tests/nnapi/specs/Ex/tensorflowmax_ex_float.mod.py
+++ /dev/null
@@ -1,18 +0,0 @@
-model = Model()
-i1 = Input("input", "TENSOR_FLOAT32", "{1, 2, 2, 1}")
-axis = Parameter("axis", "TENSOR_INT32", "{1}", [2])
-output = Output("output", "TENSOR_FLOAT32", "{1, 2, 1}")
-
-model = model.Operation("TENSORFLOW_MAX_EX", i1, axis).To(output)
-
-# Example 1. Input in operand 0,
-input0 = {i1: # input 0
-          [1.0, 2.0,
-           3.0, 4.0]}
-
-output0 = {output: # output 0
-          [2.0,
-           4.0]}
-
-# Instantiate an example
-Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/tensorflowmax_ex_float_1.mod.py b/tests/nnapi/specs/Ex/tensorflowmax_ex_float_1.mod.py
deleted file mode 100644
index 42dc9d94b..000000000
--- a/tests/nnapi/specs/Ex/tensorflowmax_ex_float_1.mod.py
+++ /dev/null
@@ -1,17 +0,0 @@
-model = Model()
-i1 = Input("input", "TENSOR_FLOAT32", "{4, 3, 2}")
-axis = Parameter("axis", "TENSOR_INT32", "{4}", [1, 0, -3, -3])
-output = Output("output", "TENSOR_FLOAT32", "{2}")
-
-model = model.Operation("TENSORFLOW_MAX_EX", i1, axis).To(output)
-
-# Example 1. Input in operand 0,
-input0 = {i1: # input 0
-          [1.0,  2.0,  3.0,  4.0,  5.0,  6.0,  7.0,  8.0,  9.0,  10.0, 11.0, 12.0,
-           13.0, 14.0, 15.0, 16.0, 17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0]}
-
-output0 = {output: # output 0
-          [23.0, 24.0]}
-
-# Instantiate an example
-Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/tensorflowmax_ex_float_2.mod.py b/tests/nnapi/specs/Ex/tensorflowmax_ex_float_2.mod.py
deleted file mode 100644
index 98c0d9d03..000000000
--- a/tests/nnapi/specs/Ex/tensorflowmax_ex_float_2.mod.py
+++ /dev/null
@@ -1,17 +0,0 @@
-model = Model()
-i1 = Input("input", "TENSOR_FLOAT32", "{4, 3, 2}")
-axis = Parameter("axis", "TENSOR_INT32", "{2}", [0, 2])
-output = Output("output", "TENSOR_FLOAT32", "{1, 3, 1}")
-
-model = model.Operation("TENSORFLOW_MAX_EX", i1, axis).To(output)
-
-# Example 1. Input in operand 0,
-input0 = {i1: # input 0
-          [1.0,  2.0,  3.0,  4.0,  5.0,  6.0,  7.0,  8.0,  9.0,  10.0, 11.0, 12.0,
-           13.0, 14.0, 15.0, 16.0, 17.0, 18.0, 19.0, 20.0, 21.0, 22.0, 23.0, 24.0]}
-
-output0 = {output: # output 0
-          [20, 22, 24]}
-
-# Instantiate an example
-Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/tensorflowmax_ex_quant8_1.mod.py b/tests/nnapi/specs/Ex/tensorflowmax_ex_quant8_1.mod.py
deleted file mode 100644
index 8e85633b3..000000000
--- a/tests/nnapi/specs/Ex/tensorflowmax_ex_quant8_1.mod.py
+++ /dev/null
@@ -1,18 +0,0 @@
-model = Model()
-i1 = Input("input", "TENSOR_QUANT8_ASYMM", "{4, 3, 2}, 0.8, 5")
-axis = Parameter("axis", "TENSOR_INT32", "{4}", [1, 0, -3, -3])
-output = Output("output", "TENSOR_QUANT8_ASYMM", "{2}, 0.8, 5")
-
-model = model.Operation("TENSORFLOW_MAX_EX", i1, axis).To(output)
-
-# Example 1. Input in operand 0,
-input0 = {i1: # input 0
-          [1,  2,  3,  4,  5,  6,  7,  8,
-           9,  10, 11, 12, 13, 14, 15, 16,
-           17, 18, 19, 20, 21, 22, 23, 24]}
-
-output0 = {output: # output 0
-          [23, 24]}
-
-# Instantiate an example
-Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/tensorflowmax_ex_quant8_2.mod.py b/tests/nnapi/specs/Ex/tensorflowmax_ex_quant8_2.mod.py
deleted file mode 100644
index 75138b14a..000000000
--- a/tests/nnapi/specs/Ex/tensorflowmax_ex_quant8_2.mod.py
+++ /dev/null
@@ -1,18 +0,0 @@
-model = Model()
-i1 = Input("input", "TENSOR_QUANT8_ASYMM", "{4, 3, 2}, 0.8, 5")
-axis = Parameter("axis", "TENSOR_INT32", "{2}", [0, 2])
-output = Output("output", "TENSOR_QUANT8_ASYMM", "{1, 3, 1}, 0.8, 5")
-
-model = model.Operation("TENSORFLOW_MAX_EX", i1, axis).To(output)
-
-# Example 1. Input in operand 0,
-input0 = {i1: # input 0
-          [1,  2,  3,  4,  5,  6,  7,  8,
-           9,  10, 11, 12, 13, 14, 15, 16,
-           17, 18, 19, 20, 21, 22, 23, 24]}
-
-output0 = {output: # output 0
-          [20, 22, 24]}
-
-# Instantiate an example
-Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/transpose_conv_ex_float_4.mod.py b/tests/nnapi/specs/Ex/transpose_conv_ex_float_4.mod.py
new file mode 100644
index 000000000..71383b4c1
--- /dev/null
+++ b/tests/nnapi/specs/Ex/transpose_conv_ex_float_4.mod.py
@@ -0,0 +1,56 @@
+# model
+model = Model()
+i0 = Input("op_shape", "TENSOR_INT32", "{4}")
+weights = Input("ker", "TENSOR_FLOAT32", "{1, 3, 3, 1}")
+i1 = Input("in", "TENSOR_FLOAT32", "{1, 4, 4, 1}" )
+pad = Int32Scalar("pad_same", 1)
+s_x = Int32Scalar("stride_x", 2)
+s_y = Int32Scalar("stride_y", 2)
+i2 = Output("op", "TENSOR_FLOAT32", "{1, 8, 8, 1}")
+model = model.Operation("TRANSPOSE_CONV_EX", i0, weights, i1, pad, s_x, s_y).To(i2)
+
+batch = 1
+in_chans = 1
+out_chans = 1
+in_rows = 4
+in_cols = 4
+out_rows = 8
+out_cols = 8
+ker_rows = 3
+ker_cols = 3
+stride = 2
+# pad is 0 (left: 0  right: 1 top: 0 bottom: 1)
+input_table = [x for x in range(batch * in_rows * in_cols * in_chans)]
+kernel_table = [x for x in range(out_chans * ker_rows * ker_cols * in_chans)]
+out_table = [0 for x in range(batch * out_rows * out_cols * out_chans)]
+
+for i in range(batch):
+  for j in range(in_rows):
+    for k in range(in_cols):
+      for l in range(in_chans):
+        out_row_origin = j * stride
+        out_col_origin = k * stride
+        input_value = input_table[((i * in_rows + j) * in_cols + k) * in_chans + l]
+
+        for m in range(ker_rows):
+          for n in range(ker_cols):
+            for o in range(out_chans):
+              out_row = out_row_origin + m
+              out_col = out_col_origin + n
+              if (out_row < out_rows) and (out_col < out_cols) and (out_row >= 0) and (out_col >= 0):
+                kernel_value = kernel_table[((o * ker_rows + m) * ker_cols + n) * in_chans + l]
+                out_table[((i * out_rows + out_row) * out_cols + out_col) * out_chans + o] += (input_value * kernel_value)
+
+# Example 1. Input in operand 0,
+input0 = {i0:  # output shape
+          [1, 8, 8, 1],
+          i1:  # input 0
+          input_table,
+          weights:  # input 1
+          kernel_table}
+
+output0 = {i2:  # output 0
+           out_table}
+
+# Instantiate an example
+Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/transpose_conv_ex_int_1.mod.py b/tests/nnapi/specs/Ex/transpose_conv_ex_int_1.mod.py
deleted file mode 100644
index fb8eb72be..000000000
--- a/tests/nnapi/specs/Ex/transpose_conv_ex_int_1.mod.py
+++ /dev/null
@@ -1,24 +0,0 @@
-# model
-model = Model()
-i0 = Input("op_shape", "TENSOR_INT32", "{4}")
-weights = Input("ker", "TENSOR_INT32", "{1, 3, 3, 1}")
-i1 = Input("in", "TENSOR_INT32", "{1, 4, 4, 1}" )
-pad = Int32Scalar("pad_same", 1)
-s_x = Int32Scalar("stride_x", 1)
-s_y = Int32Scalar("stride_y", 1)
-i2 = Output("op", "TENSOR_INT32", "{1, 4, 4, 1}")
-model = model.Operation("TRANSPOSE_CONV_EX", i0, weights, i1, pad, s_x, s_y).To(i2)
-
-# Example 1. Input in operand 0,
-input0 = {i0:  # output shape
-          [1, 4, 4, 1],
-          i1:  # input 0
-          [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16],
-          weights:  # input 1
-          [1, 2, 3, 4, 5, 6, 7, 8, 9]}
-
-output0 = {i2:  # output 0
-           [29, 62, 83, 75, 99, 192, 237, 198, 207, 372, 417, 330, 263, 446, 485, 365]}
-
-# Instantiate an example
-Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/transpose_conv_ex_int_2.mod.py b/tests/nnapi/specs/Ex/transpose_conv_ex_int_2.mod.py
deleted file mode 100644
index 9bf4b113d..000000000
--- a/tests/nnapi/specs/Ex/transpose_conv_ex_int_2.mod.py
+++ /dev/null
@@ -1,25 +0,0 @@
-# model
-model = Model()
-i0 = Input("op_shape", "TENSOR_INT32", "{4}")
-weights = Input("ker", "TENSOR_INT32", "{1, 3, 3, 1}")
-i1 = Input("in", "TENSOR_INT32", "{1, 2, 2, 1}" )
-pad = Int32Scalar("pad_valid", 2)
-s_x = Int32Scalar("stride_x", 2)
-s_y = Int32Scalar("stride_y", 2)
-i2 = Output("op", "TENSOR_INT32", "{1, 5, 5, 1}")
-model = model.Operation("TRANSPOSE_CONV_EX", i0, weights, i1, pad, s_x, s_y).To(i2)
-
-# Example 1. Input in operand 0,
-input0 = {i0:  # output shape
-          [1, 5, 5, 1],
-          i1:  # input 0
-          [1, 2, 3, 4],
-          weights:  # input 1
-          [1, 2, 3, 4, 5, 6, 7, 8, 9]}
-
-output0 = {i2:  # output 0
-           [1,  2,  5,  4,  6,  4,  5,  14, 10, 12, 10, 14, 36,
-            24, 30, 12, 15, 34, 20, 24, 21, 24, 55, 32, 36]}
-
-# Instantiate an example
-Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/transpose_conv_ex_int_3.mod.py b/tests/nnapi/specs/Ex/transpose_conv_ex_int_3.mod.py
deleted file mode 100644
index e44480968..000000000
--- a/tests/nnapi/specs/Ex/transpose_conv_ex_int_3.mod.py
+++ /dev/null
@@ -1,27 +0,0 @@
-# model
-model = Model()
-i0 = Input("op_shape", "TENSOR_INT32", "{4}")
-weights = Input("ker", "TENSOR_INT32", "{2, 3, 3, 1}")
-i1 = Input("in", "TENSOR_INT32", "{1, 2, 2, 1}" )
-pad = Int32Scalar("pad_valid", 2)
-s_x = Int32Scalar("stride_x", 2)
-s_y = Int32Scalar("stride_y", 2)
-i2 = Output("op", "TENSOR_INT32", "{1, 5, 5, 2}")
-model = model.Operation("TRANSPOSE_CONV_EX", i0, weights, i1, pad, s_x, s_y).To(i2)
-
-# Example 1. Input in operand 0,
-input0 = {i0:  # output shape
-          [1, 5, 5, 2],
-          i1:  # input 0
-          [1, 2, 3, 4],
-          weights:  # input 1
-          [1, 3, 5, 7, 9, 11, 13, 15, 17, 2, 4, 6, 8, 10, 12, 14, 16, 18]}
-
-output0 = {i2:  # output 0
-           [1,  2,  3,  4,  7,  10,  6,   8,  10, 12, 7,  8,  9,
-            10, 25, 28, 18, 20, 22,  24,  16, 20, 24, 28, 62, 72,
-            42, 48, 54, 60, 21, 24,  27,  30, 61, 68, 36, 40, 44,
-            48, 39, 42, 45, 48, 103, 110, 60, 64, 68, 72]}
-
-# Instantiate an example
-Example((input0, output0))
diff --git a/tests/nnapi/specs/Ex/unpack_ex_3D_float_1.mod.py b/tests/nnapi/specs/Ex/unpack_ex_3D_float_1.mod.py
index e5cb38e4b..7e8ef6086 100644
--- a/tests/nnapi/specs/Ex/unpack_ex_3D_float_1.mod.py
+++ b/tests/nnapi/specs/Ex/unpack_ex_3D_float_1.mod.py
@@ -1,11 +1,11 @@
 # Sample UnPack model, axis = 0
 model = Model()
-input = Input("input", "TENSOR_FLOAT32", "{3, 2, 3, 4}")
+input = Input("input", "TENSOR_FLOAT32", "{3, 6, 4}")
 axis = Int32Scalar("axis", 0)
 num_splits = Int32Scalar("num_splits", 3)
-out1 = Output("output1", "TENSOR_FLOAT32", "{2, 3, 4}")
-out2 = Output("output2", "TENSOR_FLOAT32", "{2, 3, 4}")
-out3 = Output("output3", "TENSOR_FLOAT32", "{2, 3, 4}")
+out1 = Output("output1", "TENSOR_FLOAT32", "{6, 4}")
+out2 = Output("output2", "TENSOR_FLOAT32", "{6, 4}")
+out3 = Output("output3", "TENSOR_FLOAT32", "{6, 4}")
 model = model.Operation("UNPACK_EX", input, num_splits, axis).To([out1, out2, out3])
 
 input0 = {input: # input 0
diff --git a/tests/nnapi/specs/Ex/unpack_ex_3D_float_2.mod.py b/tests/nnapi/specs/Ex/unpack_ex_3D_float_2.mod.py
index 1d1045ae9..ed7800ad4 100644
--- a/tests/nnapi/specs/Ex/unpack_ex_3D_float_2.mod.py
+++ b/tests/nnapi/specs/Ex/unpack_ex_3D_float_2.mod.py
@@ -1,11 +1,11 @@
-# Sample UnPack model, axis = 2
+# Sample UnPack model, axis = 1
 model = Model()
-input = Input("input", "TENSOR_FLOAT32", "{3, 2, 3, 4}")
-axis = Int32Scalar("axis", 2)
+input = Input("input", "TENSOR_FLOAT32", "{6, 3, 4}")
+axis = Int32Scalar("axis", 1)
 num_splits = Int32Scalar("num_splits", 3)
-out1 = Output("output1", "TENSOR_FLOAT32", "{3, 2, 4}")
-out2 = Output("output2", "TENSOR_FLOAT32", "{3, 2, 4}")
-out3 = Output("output3", "TENSOR_FLOAT32", "{3, 2, 4}")
+out1 = Output("output1", "TENSOR_FLOAT32", "{6, 4}")
+out2 = Output("output2", "TENSOR_FLOAT32", "{6, 4}")
+out3 = Output("output3", "TENSOR_FLOAT32", "{6, 4}")
 model = model.Operation("UNPACK_EX", input, num_splits, axis).To([out1, out2, out3])
 
 input0 = {input: # input 0
diff --git a/tests/nnapi/specs/Ex/unpack_ex_3D_int_1.mod.py b/tests/nnapi/specs/Ex/unpack_ex_3D_int_1.mod.py
index 2a668cf7e..34e153bfc 100644
--- a/tests/nnapi/specs/Ex/unpack_ex_3D_int_1.mod.py
+++ b/tests/nnapi/specs/Ex/unpack_ex_3D_int_1.mod.py
@@ -1,11 +1,11 @@
 # Sample UnPack model, axis = 0
 model = Model()
-input = Input("input", "TENSOR_INT32", "{3, 2, 3, 4}")
+input = Input("input", "TENSOR_INT32", "{3, 6, 4}")
 axis = Int32Scalar("axis", 0)
 num_splits = Int32Scalar("num_splits", 3)
-out1 = Output("output1", "TENSOR_INT32", "{2, 3, 4}")
-out2 = Output("output2", "TENSOR_INT32", "{2, 3, 4}")
-out3 = Output("output3", "TENSOR_INT32", "{2, 3, 4}")
+out1 = Output("output1", "TENSOR_INT32", "{6, 4}")
+out2 = Output("output2", "TENSOR_INT32", "{6, 4}")
+out3 = Output("output3", "TENSOR_INT32", "{6, 4}")
 model = model.Operation("UNPACK_EX", input, num_splits, axis).To([out1, out2, out3])
 
 input0 = {input: # input 0
diff --git a/tests/nnapi/specs/Ex/unpack_ex_3D_int_2.mod.py b/tests/nnapi/specs/Ex/unpack_ex_3D_int_2.mod.py
index 115954972..db51351c5 100644
--- a/tests/nnapi/specs/Ex/unpack_ex_3D_int_2.mod.py
+++ b/tests/nnapi/specs/Ex/unpack_ex_3D_int_2.mod.py
@@ -1,11 +1,11 @@
-# Sample UnPack model, axis = 2
+# Sample UnPack model, axis = 1
 model = Model()
-input = Input("input", "TENSOR_INT32", "{3, 2, 3, 4}")
-axis = Int32Scalar("axis", 2)
+input = Input("input", "TENSOR_INT32", "{6, 3, 4}")
+axis = Int32Scalar("axis", 1)
 num_splits = Int32Scalar("num_splits", 3)
-out1 = Output("output1", "TENSOR_INT32", "{3, 2, 4}")
-out2 = Output("output2", "TENSOR_INT32", "{3, 2, 4}")
-out3 = Output("output3", "TENSOR_INT32", "{3, 2, 4}")
+out1 = Output("output1", "TENSOR_INT32", "{6, 4}")
+out2 = Output("output2", "TENSOR_INT32", "{6, 4}")
+out3 = Output("output3", "TENSOR_INT32", "{6, 4}")
 model = model.Operation("UNPACK_EX", input, num_splits, axis).To([out1, out2, out3])
 
 input0 = {input: # input 0
diff --git a/tests/nnapi/specs/V1_0/conv_1_h3_w2_SAME.mod.py b/tests/nnapi/specs/V1_0/conv_1_h3_w2_SAME.mod.py
index 34f2c49f9..45a356927 100644
--- a/tests/nnapi/specs/V1_0/conv_1_h3_w2_SAME.mod.py
+++ b/tests/nnapi/specs/V1_0/conv_1_h3_w2_SAME.mod.py
@@ -7,7 +7,7 @@ i2 = Input("op2", "TENSOR_FLOAT32", "{1, 8, 8, 3}") # input 0
 i3 = Output("op3", "TENSOR_FLOAT32", "{1, 8, 8, 1}") # output 0
 i0 = Parameter("op0", "TENSOR_FLOAT32", "{1, 3, 2, 3}", [-0.966213, -0.467474, -0.82203, -0.579455, 0.0278809, -0.79946, -0.684259, 0.563238, 0.37289, 0.738216, 0.386045, -0.917775, 0.184325, -0.270568, 0.82236, 0.0973683, -0.941308, -0.144706]) # parameters
 i1 = Parameter("op1", "TENSOR_FLOAT32", "{1}", [0]) # parameters
-model = model.Conv(i2, i0, i1, i4, i5, i6, i7).To(i3)
+model = model.Operation("CONV_2D", i2, i0, i1, i4, i5, i6, i7).To(i3)
 
 input0 = {i2: [-0.869931, 0.644628, -0.918393, 0.153672, 0.868562, -0.358177, -0.134931, -0.247565, 0.22174, -0.259157, -0.284296, -0.538065, 0.765559, 0.41986, -0.556241, 0.658494, 0.214355, -0.850169, -0.252893, -0.478935, 0.530526, -0.0700663, -0.988729, -0.303061, 0.150845, 0.829915, 0.476349, 0.406537, -0.355343, 0.757145, -0.356362, 0.800482, -0.713861, 0.210483, -0.634303, 0.718236, -0.752038, 0.457547, -0.550769, -0.551178, 0.446766, -0.227462, 0.216348, -0.852806, -0.351486, 0.55906, -0.668493, -0.303493, -0.363763, -0.162837, 0.0701012, 0.756097, -0.142269, 0.329724, -0.656317, -0.998086, -0.652949, -0.40316, -0.893682, 0.432744, 0.612362, -0.869588, -0.71327, -0.398092, -0.0423559, 0.436576, -0.925272, 0.176549, 0.822904, 0.096833, -0.296802, -0.427195, 0.031654, -0.254479, 0.244905, 0.0948254, 0.643769, -0.90391, 0.352665, -0.901179, 0.266159, -0.968068, -0.615401, -0.388975, 0.939052, -0.116289, 0.107523, -0.0582711, 0.435172, 0.334675, 0.459711, 0.717436, 0.496627, -0.680175, -0.415066, 0.339848, 0.506004, -0.337808, -0.107218, -0.172496, 0.870638, 0.931872, -0.953884, 0.903042, 0.760078, 0.209727, -0.285384, -0.45514, 0.113194, 0.0756611, 0.0924435, -0.472863, 0.960609, -0.160385, -0.839445, 0.457097, 0.163348, 0.344867, -0.131619, 0.688715, -0.540827, 0.571259, -0.95587, 0.506164, -0.155839, 0.0789621, 0.756772, -0.662069, 0.242908, 0.460821, 0.177872, -0.289839, -0.640603, 0.702598, -0.506406, -0.568262, -0.0713716, 0.413792, 0.159673, -0.305208, 0.133816, -0.160254, 0.787323, -0.753244, 0.600721, 0.263186, -0.162387, 0.477962, -0.702951, -0.731036, -0.939481, -0.524519, 0.934072, -0.511637, -0.503499, 0.106236, -0.323684, 0.534444, -0.843745, 0.364171, 0.0370358, -0.168801, -0.404559, -0.814178, 0.91745, -0.334276, 0.66925, -0.801201, 0.156511, -0.427949, 0.379153, 0.818597, -0.649902, 0.427087, -0.586015, -0.559789, -0.833923, 0.0892409, -0.621251, 0.213826, 0.465509, 0.4704, 0.380261, 0.413067, 0.180822, 0.172866, 0.59614, 0.825575, 0.662916, -0.704381, -0.297631, 0.697778]}
 
diff --git a/tests/nnapi/specs/V1_0/conv_1_h3_w2_VALID.mod.py b/tests/nnapi/specs/V1_0/conv_1_h3_w2_VALID.mod.py
index 3a4a2a1aa..0e0974371 100644
--- a/tests/nnapi/specs/V1_0/conv_1_h3_w2_VALID.mod.py
+++ b/tests/nnapi/specs/V1_0/conv_1_h3_w2_VALID.mod.py
@@ -7,7 +7,7 @@ i2 = Input("op2", "TENSOR_FLOAT32", "{1, 8, 8, 3}") # input 0
 i3 = Output("op3", "TENSOR_FLOAT32", "{1, 6, 7, 1}") # output 0
 i0 = Parameter("op0", "TENSOR_FLOAT32", "{1, 3, 2, 3}", [-0.966213, -0.467474, -0.82203, -0.579455, 0.0278809, -0.79946, -0.684259, 0.563238, 0.37289, 0.738216, 0.386045, -0.917775, 0.184325, -0.270568, 0.82236, 0.0973683, -0.941308, -0.144706]) # parameters
 i1 = Parameter("op1", "TENSOR_FLOAT32", "{1}", [0]) # parameters
-model = model.Conv(i2, i0, i1, i4, i5, i6, i7).To(i3)
+model = model.Operation("CONV_2D", i2, i0, i1, i4, i5, i6, i7).To(i3)
 
 input0 = {i2: [-0.869931, 0.644628, -0.918393, 0.153672, 0.868562, -0.358177, -0.134931, -0.247565, 0.22174, -0.259157, -0.284296, -0.538065, 0.765559, 0.41986, -0.556241, 0.658494, 0.214355, -0.850169, -0.252893, -0.478935, 0.530526, -0.0700663, -0.988729, -0.303061, 0.150845, 0.829915, 0.476349, 0.406537, -0.355343, 0.757145, -0.356362, 0.800482, -0.713861, 0.210483, -0.634303, 0.718236, -0.752038, 0.457547, -0.550769, -0.551178, 0.446766, -0.227462, 0.216348, -0.852806, -0.351486, 0.55906, -0.668493, -0.303493, -0.363763, -0.162837, 0.0701012, 0.756097, -0.142269, 0.329724, -0.656317, -0.998086, -0.652949, -0.40316, -0.893682, 0.432744, 0.612362, -0.869588, -0.71327, -0.398092, -0.0423559, 0.436576, -0.925272, 0.176549, 0.822904, 0.096833, -0.296802, -0.427195, 0.031654, -0.254479, 0.244905, 0.0948254, 0.643769, -0.90391, 0.352665, -0.901179, 0.266159, -0.968068, -0.615401, -0.388975, 0.939052, -0.116289, 0.107523, -0.0582711, 0.435172, 0.334675, 0.459711, 0.717436, 0.496627, -0.680175, -0.415066, 0.339848, 0.506004, -0.337808, -0.107218, -0.172496, 0.870638, 0.931872, -0.953884, 0.903042, 0.760078, 0.209727, -0.285384, -0.45514, 0.113194, 0.0756611, 0.0924435, -0.472863, 0.960609, -0.160385, -0.839445, 0.457097, 0.163348, 0.344867, -0.131619, 0.688715, -0.540827, 0.571259, -0.95587, 0.506164, -0.155839, 0.0789621, 0.756772, -0.662069, 0.242908, 0.460821, 0.177872, -0.289839, -0.640603, 0.702598, -0.506406, -0.568262, -0.0713716, 0.413792, 0.159673, -0.305208, 0.133816, -0.160254, 0.787323, -0.753244, 0.600721, 0.263186, -0.162387, 0.477962, -0.702951, -0.731036, -0.939481, -0.524519, 0.934072, -0.511637, -0.503499, 0.106236, -0.323684, 0.534444, -0.843745, 0.364171, 0.0370358, -0.168801, -0.404559, -0.814178, 0.91745, -0.334276, 0.66925, -0.801201, 0.156511, -0.427949, 0.379153, 0.818597, -0.649902, 0.427087, -0.586015, -0.559789, -0.833923, 0.0892409, -0.621251, 0.213826, 0.465509, 0.4704, 0.380261, 0.413067, 0.180822, 0.172866, 0.59614, 0.825575, 0.662916, -0.704381, -0.297631, 0.697778]}
 
diff --git a/tests/nnapi/specs/V1_0/conv_3_h3_w2_SAME.mod.py b/tests/nnapi/specs/V1_0/conv_3_h3_w2_SAME.mod.py
index d7df3a34f..3ba4bad52 100644
--- a/tests/nnapi/specs/V1_0/conv_3_h3_w2_SAME.mod.py
+++ b/tests/nnapi/specs/V1_0/conv_3_h3_w2_SAME.mod.py
@@ -7,7 +7,7 @@ i2 = Input("op2", "TENSOR_FLOAT32", "{1, 8, 8, 3}") # input 0
 i3 = Output("op3", "TENSOR_FLOAT32", "{1, 8, 8, 3}") # output 0
 i0 = Parameter("op0", "TENSOR_FLOAT32", "{3, 3, 2, 3}", [-0.966213, -0.579455, -0.684259, 0.738216, 0.184325, 0.0973683, -0.176863, -0.23936, -0.000233404, 0.055546, -0.232658, -0.316404, -0.012904, 0.320705, -0.326657, -0.919674, 0.868081, -0.824608, -0.467474, 0.0278809, 0.563238, 0.386045, -0.270568, -0.941308, -0.779227, -0.261492, -0.774804, -0.79665, 0.22473, -0.414312, 0.685897, -0.327792, 0.77395, -0.714578, -0.972365, 0.0696099, -0.82203, -0.79946, 0.37289, -0.917775, 0.82236, -0.144706, -0.167188, 0.268062, 0.702641, -0.412223, 0.755759, 0.721547, -0.43637, -0.274905, -0.269165, 0.16102, 0.819857, -0.312008]) # parameters
 i1 = Parameter("op1", "TENSOR_FLOAT32", "{3}", [0, 0, 0]) # parameters
-model = model.Conv(i2, i0, i1, i4, i5, i6, i7).To(i3)
+model = model.Operation("CONV_2D", i2, i0, i1, i4, i5, i6, i7).To(i3)
 
 input0 = {i2: [-0.869931, 0.644628, -0.918393, 0.153672, 0.868562, -0.358177, -0.134931, -0.247565, 0.22174, -0.259157, -0.284296, -0.538065, 0.765559, 0.41986, -0.556241, 0.658494, 0.214355, -0.850169, -0.252893, -0.478935, 0.530526, -0.0700663, -0.988729, -0.303061, 0.150845, 0.829915, 0.476349, 0.406537, -0.355343, 0.757145, -0.356362, 0.800482, -0.713861, 0.210483, -0.634303, 0.718236, -0.752038, 0.457547, -0.550769, -0.551178, 0.446766, -0.227462, 0.216348, -0.852806, -0.351486, 0.55906, -0.668493, -0.303493, -0.363763, -0.162837, 0.0701012, 0.756097, -0.142269, 0.329724, -0.656317, -0.998086, -0.652949, -0.40316, -0.893682, 0.432744, 0.612362, -0.869588, -0.71327, -0.398092, -0.0423559, 0.436576, -0.925272, 0.176549, 0.822904, 0.096833, -0.296802, -0.427195, 0.031654, -0.254479, 0.244905, 0.0948254, 0.643769, -0.90391, 0.352665, -0.901179, 0.266159, -0.968068, -0.615401, -0.388975, 0.939052, -0.116289, 0.107523, -0.0582711, 0.435172, 0.334675, 0.459711, 0.717436, 0.496627, -0.680175, -0.415066, 0.339848, 0.506004, -0.337808, -0.107218, -0.172496, 0.870638, 0.931872, -0.953884, 0.903042, 0.760078, 0.209727, -0.285384, -0.45514, 0.113194, 0.0756611, 0.0924435, -0.472863, 0.960609, -0.160385, -0.839445, 0.457097, 0.163348, 0.344867, -0.131619, 0.688715, -0.540827, 0.571259, -0.95587, 0.506164, -0.155839, 0.0789621, 0.756772, -0.662069, 0.242908, 0.460821, 0.177872, -0.289839, -0.640603, 0.702598, -0.506406, -0.568262, -0.0713716, 0.413792, 0.159673, -0.305208, 0.133816, -0.160254, 0.787323, -0.753244, 0.600721, 0.263186, -0.162387, 0.477962, -0.702951, -0.731036, -0.939481, -0.524519, 0.934072, -0.511637, -0.503499, 0.106236, -0.323684, 0.534444, -0.843745, 0.364171, 0.0370358, -0.168801, -0.404559, -0.814178, 0.91745, -0.334276, 0.66925, -0.801201, 0.156511, -0.427949, 0.379153, 0.818597, -0.649902, 0.427087, -0.586015, -0.559789, -0.833923, 0.0892409, -0.621251, 0.213826, 0.465509, 0.4704, 0.380261, 0.413067, 0.180822, 0.172866, 0.59614, 0.825575, 0.662916, -0.704381, -0.297631, 0.697778]}
 
diff --git a/tests/nnapi/specs/V1_0/conv_3_h3_w2_VALID.mod.py b/tests/nnapi/specs/V1_0/conv_3_h3_w2_VALID.mod.py
index a7ab91f33..545e9fdc6 100644
--- a/tests/nnapi/specs/V1_0/conv_3_h3_w2_VALID.mod.py
+++ b/tests/nnapi/specs/V1_0/conv_3_h3_w2_VALID.mod.py
@@ -7,7 +7,7 @@ i2 = Input("op2", "TENSOR_FLOAT32", "{1, 8, 8, 3}") # input 0
 i3 = Output("op3", "TENSOR_FLOAT32", "{1, 6, 7, 3}") # output 0
 i0 = Parameter("op0", "TENSOR_FLOAT32", "{3, 3, 2, 3}", [-0.966213, -0.579455, -0.684259, 0.738216, 0.184325, 0.0973683, -0.176863, -0.23936, -0.000233404, 0.055546, -0.232658, -0.316404, -0.012904, 0.320705, -0.326657, -0.919674, 0.868081, -0.824608, -0.467474, 0.0278809, 0.563238, 0.386045, -0.270568, -0.941308, -0.779227, -0.261492, -0.774804, -0.79665, 0.22473, -0.414312, 0.685897, -0.327792, 0.77395, -0.714578, -0.972365, 0.0696099, -0.82203, -0.79946, 0.37289, -0.917775, 0.82236, -0.144706, -0.167188, 0.268062, 0.702641, -0.412223, 0.755759, 0.721547, -0.43637, -0.274905, -0.269165, 0.16102, 0.819857, -0.312008]) # parameters
 i1 = Parameter("op1", "TENSOR_FLOAT32", "{3}", [0, 0, 0]) # parameters
-model = model.Conv(i2, i0, i1, i4, i5, i6, i7).To(i3)
+model = model.Operation("CONV_2D", i2, i0, i1, i4, i5, i6, i7).To(i3)
 
 input0 = {i2: [-0.869931, 0.644628, -0.918393, 0.153672, 0.868562, -0.358177, -0.134931, -0.247565, 0.22174, -0.259157, -0.284296, -0.538065, 0.765559, 0.41986, -0.556241, 0.658494, 0.214355, -0.850169, -0.252893, -0.478935, 0.530526, -0.0700663, -0.988729, -0.303061, 0.150845, 0.829915, 0.476349, 0.406537, -0.355343, 0.757145, -0.356362, 0.800482, -0.713861, 0.210483, -0.634303, 0.718236, -0.752038, 0.457547, -0.550769, -0.551178, 0.446766, -0.227462, 0.216348, -0.852806, -0.351486, 0.55906, -0.668493, -0.303493, -0.363763, -0.162837, 0.0701012, 0.756097, -0.142269, 0.329724, -0.656317, -0.998086, -0.652949, -0.40316, -0.893682, 0.432744, 0.612362, -0.869588, -0.71327, -0.398092, -0.0423559, 0.436576, -0.925272, 0.176549, 0.822904, 0.096833, -0.296802, -0.427195, 0.031654, -0.254479, 0.244905, 0.0948254, 0.643769, -0.90391, 0.352665, -0.901179, 0.266159, -0.968068, -0.615401, -0.388975, 0.939052, -0.116289, 0.107523, -0.0582711, 0.435172, 0.334675, 0.459711, 0.717436, 0.496627, -0.680175, -0.415066, 0.339848, 0.506004, -0.337808, -0.107218, -0.172496, 0.870638, 0.931872, -0.953884, 0.903042, 0.760078, 0.209727, -0.285384, -0.45514, 0.113194, 0.0756611, 0.0924435, -0.472863, 0.960609, -0.160385, -0.839445, 0.457097, 0.163348, 0.344867, -0.131619, 0.688715, -0.540827, 0.571259, -0.95587, 0.506164, -0.155839, 0.0789621, 0.756772, -0.662069, 0.242908, 0.460821, 0.177872, -0.289839, -0.640603, 0.702598, -0.506406, -0.568262, -0.0713716, 0.413792, 0.159673, -0.305208, 0.133816, -0.160254, 0.787323, -0.753244, 0.600721, 0.263186, -0.162387, 0.477962, -0.702951, -0.731036, -0.939481, -0.524519, 0.934072, -0.511637, -0.503499, 0.106236, -0.323684, 0.534444, -0.843745, 0.364171, 0.0370358, -0.168801, -0.404559, -0.814178, 0.91745, -0.334276, 0.66925, -0.801201, 0.156511, -0.427949, 0.379153, 0.818597, -0.649902, 0.427087, -0.586015, -0.559789, -0.833923, 0.0892409, -0.621251, 0.213826, 0.465509, 0.4704, 0.380261, 0.413067, 0.180822, 0.172866, 0.59614, 0.825575, 0.662916, -0.704381, -0.297631, 0.697778]}
 
diff --git a/tests/nnapi/specs/V1_0/depthwise_conv.mod.py b/tests/nnapi/specs/V1_0/depthwise_conv.mod.py
index d88206fdd..5e7886d26 100644
--- a/tests/nnapi/specs/V1_0/depthwise_conv.mod.py
+++ b/tests/nnapi/specs/V1_0/depthwise_conv.mod.py
@@ -8,7 +8,7 @@ i2 = Input("op2", "TENSOR_FLOAT32", "{1, 8, 8, 3}") # input 0
 i3 = Output("op3", "TENSOR_FLOAT32", "{1, 8, 8, 3}") # output 0
 i0 = Parameter("op0", "TENSOR_FLOAT32", "{1, 1, 1, 3}", [-0.966213, -0.467474, -0.82203]) # parameters
 i1 = Parameter("op1", "TENSOR_FLOAT32", "{3}", [0, 0, 0]) # parameters
-model = model.DepthWiseConv(i2, i0, i1, i4, i5, i6, i7, i8).To(i3)
+model = model.Operation("DEPTHWISE_CONV_2D", i2, i0, i1, i4, i5, i6, i7, i8).To(i3)
 
 input0 = {i2: [-0.869931, 0.644628, -0.918393, 0.153672, 0.868562, -0.358177, -0.134931, -0.247565, 0.22174, -0.259157, -0.284296, -0.538065, 0.765559, 0.41986, -0.556241, 0.658494, 0.214355, -0.850169, -0.252893, -0.478935, 0.530526, -0.0700663, -0.988729, -0.303061, 0.150845, 0.829915, 0.476349, 0.406537, -0.355343, 0.757145, -0.356362, 0.800482, -0.713861, 0.210483, -0.634303, 0.718236, -0.752038, 0.457547, -0.550769, -0.551178, 0.446766, -0.227462, 0.216348, -0.852806, -0.351486, 0.55906, -0.668493, -0.303493, -0.363763, -0.162837, 0.0701012, 0.756097, -0.142269, 0.329724, -0.656317, -0.998086, -0.652949, -0.40316, -0.893682, 0.432744, 0.612362, -0.869588, -0.71327, -0.398092, -0.0423559, 0.436576, -0.925272, 0.176549, 0.822904, 0.096833, -0.296802, -0.427195, 0.031654, -0.254479, 0.244905, 0.0948254, 0.643769, -0.90391, 0.352665, -0.901179, 0.266159, -0.968068, -0.615401, -0.388975, 0.939052, -0.116289, 0.107523, -0.0582711, 0.435172, 0.334675, 0.459711, 0.717436, 0.496627, -0.680175, -0.415066, 0.339848, 0.506004, -0.337808, -0.107218, -0.172496, 0.870638, 0.931872, -0.953884, 0.903042, 0.760078, 0.209727, -0.285384, -0.45514, 0.113194, 0.0756611, 0.0924435, -0.472863, 0.960609, -0.160385, -0.839445, 0.457097, 0.163348, 0.344867, -0.131619, 0.688715, -0.540827, 0.571259, -0.95587, 0.506164, -0.155839, 0.0789621, 0.756772, -0.662069, 0.242908, 0.460821, 0.177872, -0.289839, -0.640603, 0.702598, -0.506406, -0.568262, -0.0713716, 0.413792, 0.159673, -0.305208, 0.133816, -0.160254, 0.787323, -0.753244, 0.600721, 0.263186, -0.162387, 0.477962, -0.702951, -0.731036, -0.939481, -0.524519, 0.934072, -0.511637, -0.503499, 0.106236, -0.323684, 0.534444, -0.843745, 0.364171, 0.0370358, -0.168801, -0.404559, -0.814178, 0.91745, -0.334276, 0.66925, -0.801201, 0.156511, -0.427949, 0.379153, 0.818597, -0.649902, 0.427087, -0.586015, -0.559789, -0.833923, 0.0892409, -0.621251, 0.213826, 0.465509, 0.4704, 0.380261, 0.413067, 0.180822, 0.172866, 0.59614, 0.825575, 0.662916, -0.704381, -0.297631, 0.697778]}
 
diff --git a/tests/nnapi/specs/V1_0/lstm3.mod.py b/tests/nnapi/specs/V1_0/lstm3.mod.py
index a9d2bf884..3abbaa001 100644
--- a/tests/nnapi/specs/V1_0/lstm3.mod.py
+++ b/tests/nnapi/specs/V1_0/lstm3.mod.py
@@ -60,7 +60,6 @@ output_state_out = Output("output_state_out", "TENSOR_FLOAT32", "{%d, %d}" % (n_
 cell_state_out = Output("cell_state_out", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_cell))
 output = Output("output", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_output))
 
-# TODO: need support for more than one output
 model = model.Operation("LSTM",
                         input,
 
diff --git a/tests/nnapi/specs/V1_0/lstm3_state.mod.py b/tests/nnapi/specs/V1_0/lstm3_state.mod.py
index 1fd91a91e..18a2d11f3 100644
--- a/tests/nnapi/specs/V1_0/lstm3_state.mod.py
+++ b/tests/nnapi/specs/V1_0/lstm3_state.mod.py
@@ -60,7 +60,6 @@ output_state_out = Output("output_state_out", "TENSOR_FLOAT32", "{%d, %d}" % (n_
 cell_state_out = Output("cell_state_out", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_cell))
 output = Output("output", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_output))
 
-# TODO: need support for more than one output
 model = model.Operation("LSTM",
                         input,
 
diff --git a/tests/nnapi/specs/V1_0/lstm3_state2.mod.py b/tests/nnapi/specs/V1_0/lstm3_state2.mod.py
index bc6ae7e86..38be40645 100644
--- a/tests/nnapi/specs/V1_0/lstm3_state2.mod.py
+++ b/tests/nnapi/specs/V1_0/lstm3_state2.mod.py
@@ -60,7 +60,6 @@ output_state_out = Output("output_state_out", "TENSOR_FLOAT32", "{%d, %d}" % (n_
 cell_state_out = Output("cell_state_out", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_cell))
 output = Output("output", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_output))
 
-# TODO: need support for more than one output
 model = model.Operation("LSTM",
                         input,
 
diff --git a/tests/nnapi/specs/V1_0/lstm3_state3.mod.py b/tests/nnapi/specs/V1_0/lstm3_state3.mod.py
index 40262c251..a0cd9df58 100644
--- a/tests/nnapi/specs/V1_0/lstm3_state3.mod.py
+++ b/tests/nnapi/specs/V1_0/lstm3_state3.mod.py
@@ -60,7 +60,6 @@ output_state_out = IgnoredOutput("output_state_out", "TENSOR_FLOAT32", "{%d, %d}
 cell_state_out = IgnoredOutput("cell_state_out", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_cell))
 output = Output("output", "TENSOR_FLOAT32", "{%d, %d}" % (n_batch, n_output))
 
-# TODO: need support for more than one output
 model = model.Operation("LSTM",
                         input,
 
diff --git a/tests/nnapi/specs/V1_0/mobilenet_224_gender_basic_fixed.mod.py b/tests/nnapi/specs/V1_0/mobilenet_224_gender_basic_fixed.mod.py
index 390ccc35e..c08bb310b 100644
--- a/tests/nnapi/specs/V1_0/mobilenet_224_gender_basic_fixed.mod.py
+++ b/tests/nnapi/specs/V1_0/mobilenet_224_gender_basic_fixed.mod.py
@@ -1,3 +1,5 @@
+# Comment out: too large test. we can test mobilenet using frameworktest
+"""
 # Passing weights via shared memory
 Configuration.use_shm_for_weights = True
 model = Model()
@@ -219,36 +221,36 @@ i81 = Internal("op81", "TENSOR_FLOAT32", "{1, 1, 1, 256}") # intermediate result
 i82 = Internal("op82", "TENSOR_FLOAT32", "{1, 1, 1, 11}") # intermediate result
 i83 = Parameter("op83", "TENSOR_FLOAT32", "{11}", [-0.0293549, -0.0835053, -0.228576, -0.0980885, -0.0370638, -0.195879, -0.0452258, 0.0371641, -0.0585841, -0.0984154, -0.141293]) # parameters
 i84 = Parameter("op84", "TENSOR_FLOAT32", "{11, 1, 1, 256}", [0.0984852, 0.672424, 0.392549, -0.262182, 0.303914, -0.0118188, 0.027943, 0.0164078, 0.200583, -0.808626, 0.234772, -0.0253635, -0.198519, -0.176824, -0.580674, 0.0681573, -0.0134279, 0.172173, -0.284882, -0.0895141, 0.0142356, -0.0479431, 0.0736678, 0.00298977, 0.152355, -0.0370715, 0.463201, 0.0146613, 0.0971624, -0.0791196, 0.556621, -0.00950762, 0.0160531, 0.091037, 0.376353, -0.0996081, -0.0418334, -0.427482, -0.202679, -0.197079, 0.021873, -0.105617, 0.36447, 0.389277, 0.0429815, 0.0480496, -0.170086, -0.191548, -0.237921, 0.155838, -0.100796, 0.0539355, 0.103154, 0.0441985, -0.20672, 0.358565, -0.105794, -0.635905, 0.193301, 0.112419, -0.184668, 0.157954, -0.301095, -0.153072, -0.0535615, -0.0661999, -0.197056, -0.0835003, -0.074932, -0.111766, -0.356266, 0.649165, -0.0527003, -0.0597135, 0.109839, -0.270809, 0.0333183, -0.211454, 0.0594729, -0.166949, 0.21057, 0.224925, -0.222835, -0.0178217, 0.127268, 0.229248, 0.262987, 0.0318244, 0.293201, -0.361254, -0.0624992, -0.0696259, 0.0456531, -0.0287401, 0.0863351, -0.106142, 0.81137, 0.305728, 0.398482, -0.0190696, -0.133965, -0.223757, -0.153242, -0.261303, 0.111363, -0.113733, 0.0028724, -0.0878969, 0.0498853, -0.000613516, -0.0819123, -0.0154599, -0.0938842, -0.108295, 0.340323, -0.139579, -0.117066, 0.145283, -0.106254, 0.201248, -0.152479, 0.162457, -0.0751263, 0.00127508, -0.0218281, 0.126278, -0.100075, 0.426783, -0.108719, 0.207569, -0.327427, 0.277309, 0.0404061, -0.334901, 0.154047, -0.287619, 0.0161922, -0.00054208, -0.233675, 0.564603, 0.201628, 0.0510375, -0.16502, -0.0155493, -0.125359, -0.0996153, 0.0133961, -0.492208, 0.109118, -0.136327, 0.0252329, 0.0556799, -0.196804, -0.0612012, -0.0392273, 0.133385, 0.253763, -0.208136, -0.00507434, -0.0584744, 0.0855089, -0.00321895, -0.209376, 0.0618401, 0.0129248, -0.130721, -0.168413, 0.122652, 0.0927544, -0.180775, -0.0463842, -0.626248, -0.00596579, 0.0822374, -0.254325, -0.361624, 0.778701, -0.0705549, 0.40832, 0.0932269, 0.10348, 0.258843, -0.117135, 0.131713, -0.457018, -0.364692, 0.0741725, 0.168267, 0.0904773, -0.333243, 0.18358, -0.0407786, -0.0115824, 0.304328, 0.177285, 0.206312, -0.503914, 0.310439, 0.533919, 0.0925376, 0.449889, -0.45417, 0.89017, -0.00580558, 0.317744, 0.0176692, -0.0267303, -0.0657997, -0.333455, -0.0895455, -0.0203959, -0.329956, 0.0542947, -0.03533, 0.0496151, 0.145015, 0.135449, -0.239986, -0.442413, -0.0922021, 0.396803, 0.0695849, -0.00921835, 0.405834, 0.477558, 0.08952, 0.101425, -0.0264703, -0.124621, 0.070554, -0.101953, 0.224768, 0.021384, 0.293433, -0.297231, 0.0841252, 0.0290684, -0.211267, -0.116215, 0.433678, -0.626231, -0.139838, 0.0290375, -0.24486, 0.282119, -0.486426, -0.402424, -0.561959, -0.450933, 0.0501238, -0.194682, -0.231145, -0.210372, -0.0802564, -0.170723, -0.248902, -0.0122576, 0.0776341, 0.197615, 0.094212, 0.0318287, -0.237544, 0.135516, -0.537321, -0.0906906, 0.172587, 0.179816, 0.0792088, 0.354531, 0.0801259, 0.0145845, -0.14874, 0.0367363, -0.0733148, -0.125755, -0.252037, -0.101672, -0.14809, -0.188341, -0.264003, -0.201581, -0.0605842, 0.0142779, -0.322517, -0.130978, 0.301363, -0.276394, 0.0248554, -0.168732, 0.158651, 0.150037, -0.0472578, 0.241238, -0.109832, -0.500172, -0.0574687, 0.143137, 0.177313, 0.0489008, 0.24142, -0.0742049, -0.103464, -0.0383113, -0.0148622, -0.101849, 0.0425005, 0.0543708, 0.0710147, 0.169901, 0.304119, 0.180413, -0.330647, -0.250029, 0.0651902, 0.173465, -0.475872, 0.393697, 0.147345, -0.00802343, -0.0545821, -0.119, -0.0282713, 0.0414947, 0.0618215, -0.132909, 0.480818, -0.124287, -0.0484199, -0.344362, 0.071471, 0.267047, -0.279627, -0.289336, 0.0609794, 0.339502, -0.0956702, -0.361749, -0.0153208, -0.102628, 0.0936787, -0.130392, 0.348396, 0.200636, -0.249164, -0.177583, -0.0716032, 0.118703, 0.123365, -0.0366422, 0.231096, 0.0022177, 0.128202, 0.222367, -0.176409, -0.153065, -0.0287899, -0.355792, -0.543125, 0.177245, 0.116598, 0.0451388, -0.0286715, -0.174033, 0.476808, 0.298325, -0.0593149, -0.0491401, 0.0263619, 0.0565123, 0.0500395, -0.40961, -0.0481743, -0.0744737, -0.050528, -0.428685, -0.0457881, -0.105794, 0.0951161, -0.299268, -0.229566, -0.206985, -0.0780657, -0.0322681, 0.266195, -0.0781984, -0.598814, -0.280207, 0.0516518, -0.0447187, 0.0980521, 0.0216666, 0.038809, 0.147272, -0.357397, 0.0504251, 0.126596, -0.0935991, -0.142778, 0.0864683, -0.116768, -0.164657, -0.380078, 0.00184015, -0.0684899, -0.134349, 0.184285, -0.281853, -0.185581, 0.347765, 0.301739, -0.17311, -0.0586592, -0.253355, 0.135704, -0.025141, -0.398732, 0.176819, 0.164295, -0.0964961, 0.235867, -0.162969, -0.365092, 0.0342, 0.305977, 0.192868, -0.150942, 0.132645, 0.220341, -0.158242, -0.168888, 0.103491, -0.1672, 0.0127892, -0.0176947, 0.230234, -0.129157, -0.319789, -0.188887, 0.469657, 0.0599872, 0.173128, 0.207658, -0.257826, 0.422512, 0.0304435, -0.0700446, 0.00292699, -0.254277, -0.0987592, 0.0906241, -0.234816, 0.030083, -0.00973596, 0.120037, -0.317601, -0.12708, 0.102184, 0.0740557, 0.191923, 0.215419, 0.090792, -0.416807, -0.211088, -0.0667573, -0.042666, 0.00698668, -0.187608, 0.11397, 0.0282127, -0.0646227, -0.0786383, 0.338181, -0.158486, -0.0404435, -0.148313, 0.129857, 0.036822, 0.214085, 0.0271965, 0.0712011, -0.0142654, 0.21793, -0.101845, -0.0134659, -0.386899, -0.253225, -0.201138, -0.168, -0.111886, 0.149919, -0.252716, -0.312013, -0.494531, 0.20132, 0.1455, -0.0390248, -0.2497, 0.0187322, 0.212352, 0.176346, -0.0186768, -0.0587664, 0.140535, 0.130711, -0.048937, -0.0333832, 0.146999, -0.0536035, -0.210655, 0.277771, 0.136683, -0.458041, 0.106529, -0.152398, -0.0336699, 0.151721, -0.0533765, -0.168961, 0.175815, -0.24888, 0.0907924, -0.0133408, 0.175644, -0.0246879, -0.00687254, 0.185182, -0.256385, -0.163355, -0.256984, -0.315761, -0.181824, -0.0306672, 0.152588, -0.0713595, -0.0721906, -0.332328, -0.322698, -0.00929737, 0.0818944, 0.0742352, -0.166805, 0.0944738, -0.167636, 0.0871255, 0.0792785, 0.0354259, 0.293364, 0.215322, 0.272799, -0.0492312, -0.269483, -0.220346, -0.0881883, -0.105395, 0.170322, 0.0396378, 0.0702321, 0.0164758, -0.0229642, -0.120222, -0.00534489, 0.138123, -0.141178, 0.00600586, 0.0114309, 0.160046, -0.0782422, -0.221657, -0.222359, -0.0160572, -0.0427344, -0.0939852, 0.19013, 0.128755, 0.0826387, 0.0959137, -0.121338, 0.116419, -0.0815084, -0.148231, -0.102396, -0.302046, -0.0136386, 0.146457, -0.273797, -0.0766018, 0.103427, -0.0941844, -0.236219, -0.106905, 0.188707, -0.119065, -0.109619, -0.376718, -0.250552, -0.119213, -0.0698239, 0.0548951, -0.0984231, -0.274015, 0.0116218, -0.0560431, -0.0176495, 0.106143, 0.191658, -0.291245, 0.198666, -0.1415, 0.121305, 0.00787936, -0.161106, -0.0559996, -0.025235, -0.227444, 0.124586, 0.153714, 0.0339968, -0.0791643, -0.204395, -0.139891, -0.136988, -0.182275, 0.059441, -0.135392, -0.0206536, -0.177236, -0.0461415, 0.0707632, 0.279827, -0.00538458, -0.0227107, -0.0780397, 0.0654234, -0.00893195, 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-0.0112998, 0.107964, -0.805638, 0.341425, 0.104876, -0.379418, -0.16812, 0.0873235, -0.591176, 0.347932, -0.092094, -0.0951583, -0.079231, -0.102, 0.430467, -0.0629909, 0.103386, -0.394243, 0.0921294, -0.303268, -0.0878409, 0.0222568, 0.177541, 0.05269, -0.245371, -0.394972, 0.169095, -0.0322228, 0.0854907, -0.277685, 0.169834, -0.157112, -0.125601, -0.123642, 0.287326, -0.11461, -0.0400871, 0.0935002, -0.239499, -0.00406349, 0.116467, 0.195647, 0.0169376, 0.108949, -0.256211, 0.199251, -0.22503, 0.183724, -0.0459538, -0.0573185, -0.135267, -0.17563, -0.105615, -0.216777, 0.136895, -0.131041, 0.143448, 0.116321, 0.341659, 0.04663, -0.138582, 0.113484, 0.000281706, 0.183075, -0.205364, 0.217528, -0.0325774, -0.0481017, -0.00686094, -0.13989, 0.0995296, -0.476637, 0.120914, 0.178213, 0.11095, -0.154424, 0.169363, 0.288232, 0.105104, 0.440652, 0.0404736, -0.163574, -0.0724218, -0.174028, 0.137715, 0.255176, -0.133188, -0.10359, -0.150963, -0.0850369, 0.162774, -0.00694466, -0.523244, -0.400547, -0.11478, 0.0923003, 0.00922158, 0.165169, 0.114364, 0.396211, 0.0621255, 0.413189, 0.0759307, -0.148507, 0.243803, 0.066523, -0.0649491, 0.0867938, 0.134912, -0.44741, 0.133082, 0.0237098, -0.327549, -0.0172026, -0.104394, -0.204443, 0.0804548, -0.25669, -0.280141, 0.184742, -0.182915, -0.301567, -0.132653, -0.362342, -0.0867399, -0.248574, 0.018783, -0.0144377, -0.193732, -0.0568637, 0.0212203, 0.145462, -0.04467, 0.188485, -0.0192423, -0.162427, -0.431459, -0.316196, -0.0197834, 0.142554, 0.161446, -0.204556, 0.10123, 0.136505, -0.0421437, 0.0382004, -0.0105015, 0.26352, 0.128504, 0.220373, -0.0459283, -0.0794771, 0.126873, 0.102329, 0.160555, -0.344226, 0.11844, -0.152884, -0.369259, -0.732194, -0.285659, 0.27297, 0.0434638, -0.115029, -0.178296, -0.010171, -0.108856, 0.243398, -0.120003, 0.0617609, -0.0377697, 0.0882623, 0.317397, -0.142634, 0.0613519, 0.0625693, 0.29804, -0.276065, -0.283755, -0.0586926, 0.0609932, 0.172328, 0.380084, 0.0817355, -0.0889897, 0.16975, -0.0727911, 0.558122, 0.129139, 0.0967012, -0.00808779, -0.281368, 0.229454, -0.0657459, 0.110639, 0.0990761, -0.0734602, -0.124961, 0.120193, 0.0117927, -0.00164934, -0.068704, 0.0934271, -0.150389, 0.267866, 0.111924, 0.22073, -0.0826743, 0.0181881, 0.164808, 0.08553, 0.0064627, -0.100066, -0.196847, -0.260685, -0.161078, -0.0889612, 0.267343, -0.183189, 0.099878, 0.206179, -0.134037, -0.0753274, 0.073361, 0.123856, -0.11014, -0.23651, -0.079332, -0.179564, -0.0953625, 0.0816014, -0.0153009, 0.0216921, -0.214616, 0.0721763, -0.337629, 0.113998, 0.30383, 0.213949, 0.0748996, -0.154083, 0.082343, 0.0915755, -0.165324, -0.161256, -0.0732527, -0.0771391, -0.179746, 0.148814, -0.229269, -0.00684043, -0.0877735, -0.232043, 0.0358457, 0.0860737, -0.016937, 0.0052483, 0.203986, -0.0327027, 0.0828824, 0.0515511, -0.0446207, 0.0495584, 0.06504, -0.0502581, -0.0989093, -0.242931, -0.161322, 0.0412978, 0.0882053, -0.0868244, 0.0333411, 0.0033292, 0.0956053, 0.224343, -0.0605414, 0.200487, 0.139677, 0.0741737, 0.131144, -0.0156217, 0.119855, -0.0672591, 0.0646749, 0.0212678, -0.0612522, 0.127438, 0.165742, 0.149455, 0.120228, 0.245928, -0.536011, -0.0221017, 0.0210271, 0.196356, 0.0401149, -0.00733165, -0.270396, -0.00968083, -0.0709557, -0.120717, 0.140489, 0.0935343, -0.172696, 0.301435, -0.0935873, -0.0353977, 0.0539549, -0.0338224, -0.239903, -0.0209894, -0.17114, 0.267786, 0.20251, -0.0980189, -0.04852, -0.207071, -0.253257, -0.0564701, -0.0518127, -0.0537929, -0.390881, 0.0470064, 0.0306878, 0.104422, 0.150282, 0.0117885, -0.093087, -0.0377776, -0.0618607, -0.0869537, 0.137726, 0.0903727, 0.0346921, 0.0111, -0.241767, -0.201946, 0.09471, -0.156048, -0.0978701, -0.239229, -0.0308635, -0.122071, -0.433478, -0.0514787, -0.182472, -0.181954, 0.0416541, -0.0883368, 0.157402, -0.462445, -0.103609, -0.160994, -0.0133393, -0.096508, 0.100438, 0.00418135, -0.0122206, 0.172408, 0.0437795, -0.172367, -0.0189107, -0.0304423, 0.0780768, -0.116228, -0.0305065, -0.0440305, 0.00286725, -0.157059, 0.132452, -0.101883, -0.138483, 0.00723927, 0.0342281, 0.206677, -0.0770022, 0.0227105, -0.111016, -0.170921, 0.055846, 0.246527, -0.142554, -0.380108, -0.0346903, 0.138706, -0.176424, 0.112018, 0.0435032, -0.127998, -0.169885, -0.0509104, -0.0870096, -0.535699, -0.0638343, -0.0311837, 0.078099, -0.0342351, 0.0749799, 0.3883, -0.154977, 0.224178, 0.0550229, 0.107375, 0.33049, 0.0969202, 0.0756623, -0.233299, -0.104361, 0.442374, 0.0844492, 0.0705411, -0.140545, -0.0663961, -0.0728755, -0.0621244, -0.0819853, -0.112193, -0.176114, -0.0938139, -0.214228, 0.0190762, -0.213562, -0.190233, 0.133314, -0.148665, 0.0915799, 0.187216, -0.284974, 0.00733069, 0.0156916, 0.015107, 0.0318654, 0.346104, -0.124227, 0.137341, 0.0592528, -0.387351, -0.221991, 0.360592, -0.0931174, -0.0492834, 0.199867, -0.0852204, 0.150399, 0.0413833, 0.235906, -0.0706518, -0.166653, -0.0586646, -0.109711, -0.0823073, 0.257342, -0.224644, -0.430506, -0.105588, 0.0250296, -0.042311, -0.0996558, -0.115579, -0.286667, -0.154598, -0.137322, 0.176363, 0.088216, 0.161978, 0.255623, -0.0123169, -0.00387241, -0.318043, -0.21894, -0.412465, -0.415855, 0.255024, 0.361044, 0.0300423, -0.119439, 0.0657428, -0.238206, 0.340391, 0.201176, 0.102395, 0.216324, -0.121531, 0.265799, 0.0327802, 0.194072, -0.0792337, 0.456093, 0.0971469, -0.0170099, -0.0294468, -0.318039, -0.242527, -0.1083, 0.295943, -0.0284033, -0.156199, -0.20311, -0.075091, 0.528829, -0.165604, 0.0532403, 0.0505752, -0.413034, 0.175453, -0.0970195, -0.029351, 0.103333, 0.271092, 0.0511197, -0.182135, 0.112932, -0.32439, 0.294457, -0.0818895, 0.0914322, 0.185025, 0.0543957, -0.0167575, 0.504046, -0.0647153, -0.166975, 0.0248059, 0.0379442, 0.0980366, -0.178135, 0.143822, 0.45732, -0.0912428, -0.179338, 0.349726, -0.0596313, -0.299861, 0.112567, 0.0666395, 0.345303, 0.164124, -0.00265316, -0.0732412, 0.348079, -0.249414, 0.0465329, 0.0693596, 0.0799214, 0.000123214, 0.180679, 0.0912923, -0.300121, -0.288428, 0.150135, 0.112936, 0.104813, -0.0555879, -0.00205972, -0.0251151, -0.0788264, -0.016778, -0.110796, -0.083048, -0.212734, 0.288568, -0.114228, -0.113358, 0.110789, 0.118645, 0.133466, -0.0298552, -0.241374, 0.157257, 0.0861554, -0.0909277, 0.00156177, 0.106539, -0.209104, -0.106974, 0.0203283, -0.18111, -0.311602, -0.00371812, 0.0711113, -0.206721, 0.286076, 0.139713, 0.116621, 0.182792, 0.0246107, -0.17972, 0.041917, 0.0724635, 0.266344, 0.0989191, 0.0723898, 0.0257298, 0.104898, 0.0681826, -0.0704781, 0.00212139, -0.363547, 0.0274255, -0.106295, -0.363965, 0.127051, -0.0575343, -0.200952, -0.0666189, -0.139465, -0.0171747, 0.253794, -0.258602, -0.166356, -0.107649, 0.267331, 0.104521, -0.020921, -0.0780469, 0.125002, 0.0202556, -0.0899181, -0.126559, -0.297855, 0.121539, -0.0671643, -0.0444782, 0.334408, 0.0882725, -0.0879492, -0.00277655, -0.0616985, 0.0564236, -0.11618, -0.22836, 0.112953, 0.176082, 0.09988, -0.00635589, -0.114234, 0.241135, 0.0966775, -0.0961065, 0.137214, -0.0832349, -0.54299, -0.2335, -0.033801, -0.11505, -0.366386, -0.238099, -0.0951656, 0.263106, 0.129292, -0.14762, 0.0700404, 0.0195349, -0.286227, -0.273371, 0.0587288, -0.257152, -0.136248, -0.13336, -0.248086, 0.273973, -0.302625, -0.085841, -0.0839808, -0.130464, 0.252972, -0.0415149, -0.0695038, -0.091557, -0.262375, -0.0645785, 0.188566, -0.202261, -0.112712, 0.00631479, 0.0132917, -0.0130675, -0.302285, 0.0556928, -0.0211812, -0.0555546, 0.0291112, 0.168815, 0.143654, -0.00564186, -0.0614248, -0.0939664, 0.0959667, -0.209823, -0.103889, -0.206011, -0.0394793, 0.0545815, -0.0348762, -0.132075, -0.0489917, -0.177563, -0.164591, -0.0174372, -0.276844, -0.132214, -0.236278, -0.0614254, -0.230962, -0.409367, -0.08959, 0.182197, -0.341314, -0.0645579, -0.0161434, -0.166644, -0.0784324, -0.387537, 0.236617, -0.115318, -0.11315, -0.109817, -0.0949309, -0.253715, -0.254404, -0.0876592, -0.243118, -0.219172, 0.0341202, 0.0203343, 0.0435131, -0.0266338, 0.140304, -0.20669, -0.130739, 0.0213059, 0.182793, -0.0711616, -0.165651, -0.212373, -0.0972764, -0.284464, -0.0834676, -0.129573, -0.133945, 0.0684521, -0.133913, 0.165726, -0.176839, -0.0940447, -0.145421, -0.0471074, 0.00950449, 0.0308656, -0.00761046, -0.19397, -0.161623, 0.10975, -0.0398157, 0.00168868, 0.0626417, -0.118388, -0.134741, -0.243707, 0.146451, -0.165854, 0.0585878, 0.0269307, 0.163195, -0.197056, 0.0438799, -0.152668, -0.178631, -0.167278, 0.0258257, -0.22958, -0.101918, 0.0360034, -0.165612, -0.112482, -0.419959, -0.369384, 0.0468117, 0.202511, 0.161559, 0.0360435, -0.211843, 0.0480519, -0.252478, -0.0951382, 0.100791, -0.379245, -0.129869, -0.036501, 0.0685223, 0.0247177, -0.0751386, -0.12451, 0.244585, -0.0103249, -0.346383, -0.300614, 0.230366, -0.187795, -0.0326416, 0.0735751, -0.0136039, -0.0219528, 0.0629145, -0.0308739, -0.101514, -0.169444, 0.058706, -0.133274, -0.200294, -0.372511, -0.214898, -0.184366, 0.253648, -0.0362453, 0.0618937, 0.0838244, -0.0386255, 0.129191, -0.147435, -0.180809, -0.0797491, -0.286544, -0.273005, 0.116222, -0.255255, -0.0504643, -0.0567216, -0.0204081, 0.206331, -0.225266, -0.211665, -0.259216, -0.0676753, -0.176153, 0.285802, -0.00560349, -0.0253936, -0.182537, -0.344487, -0.341246, -0.171879, 0.24462, 0.015354, -0.0255803, -0.0855239, -0.151488, -0.0329621, 0.311794, 0.0889872, -0.142655, -0.00124048, 0.0175189, 0.0459686, 0.279491, -0.237445, 0.0570048, -0.00665275, -0.0558817, 0.0731352, 0.0291331, 0.0918153, 0.0276626, -0.135103, -0.303909, 0.0283329, -0.203482, -0.0849922, -0.284485, -0.214908, 0.0836636, -0.219738, 0.136157, 0.0332432, -0.143305, 0.0283252, -0.178703, -0.0742534, -0.153174, 0.02235, -0.0753622, -0.210102, -0.0915751, -0.0189732, -0.239039, -0.135349, -0.104589, -0.0658414, -0.183206, -0.123006, 0.0835748, -0.0703047, -0.207461, -0.274129, -0.225327, -0.113485, 0.13316, 0.0295303, -0.0958281]) # parameters
-model = model.Conv(i86, i2, i1, i87, i88, i89, i90).To(i0)
-model = model.DepthWiseConv(i0, i29, i28, i91, i92, i93, i94, i95).To(i27)
-model = model.Conv(i27, i32, i31, i96, i97, i98, i99).To(i30)
-model = model.DepthWiseConv(i30, i35, i34, i100, i101, i102, i103, i104).To(i33)
-model = model.Conv(i33, i38, i37, i105, i106, i107, i108).To(i36)
-model = model.DepthWiseConv(i36, i41, i40, i109, i110, i111, i112, i113).To(i39)
-model = model.Conv(i39, i44, i43, i114, i115, i116, i117).To(i42)
-model = model.DepthWiseConv(i42, i47, i46, i118, i119, i120, i121, i122).To(i45)
-model = model.Conv(i45, i50, i49, i123, i124, i125, i126).To(i48)
-model = model.DepthWiseConv(i48, i53, i52, i127, i128, i129, i130, i131).To(i51)
-model = model.Conv(i51, i56, i55, i132, i133, i134, i135).To(i54)
-model = model.DepthWiseConv(i54, i59, i58, i136, i137, i138, i139, i140).To(i57)
-model = model.Conv(i57, i62, i61, i141, i142, i143, i144).To(i60)
-model = model.DepthWiseConv(i60, i65, i64, i145, i146, i147, i148, i149).To(i63)
-model = model.Conv(i63, i68, i67, i150, i151, i152, i153).To(i66)
-model = model.DepthWiseConv(i66, i71, i70, i154, i155, i156, i157, i158).To(i69)
-model = model.Conv(i69, i74, i73, i159, i160, i161, i162).To(i72)
-model = model.DepthWiseConv(i72, i77, i76, i163, i164, i165, i166, i167).To(i75)
-model = model.Conv(i75, i80, i79, i168, i169, i170, i171).To(i78)
-model = model.DepthWiseConv(i78, i5, i4, i172, i173, i174, i175, i176).To(i3)
-model = model.Conv(i3, i8, i7, i177, i178, i179, i180).To(i6)
-model = model.DepthWiseConv(i6, i11, i10, i181, i182, i183, i184, i185).To(i9)
-model = model.Conv(i9, i14, i13, i186, i187, i188, i189).To(i12)
-model = model.DepthWiseConv(i12, i17, i16, i190, i191, i192, i193, i194).To(i15)
-model = model.Conv(i15, i20, i19, i195, i196, i197, i198).To(i18)
-model = model.DepthWiseConv(i18, i23, i22, i199, i200, i201, i202, i203).To(i21)
-model = model.Conv(i21, i26, i25, i204, i205, i206, i207).To(i24)
-model = model.AveragePool(i24, i208, i209, i210, i211, i212, i213).To(i81)
-model = model.Conv(i81, i84, i83, i214, i215, i216, i217).To(i82)
-model = model.Logistic(i82).To(i85)
+model = model.Operation("CONV_2D", i86, i2, i1, i87, i88, i89, i90).To(i0)
+model = model.Operation("DEPTHWISE_CONV_2D", i0, i29, i28, i91, i92, i93, i94, i95).To(i27)
+model = model.Operation("CONV_2D", i27, i32, i31, i96, i97, i98, i99).To(i30)
+model = model.Operation("DEPTHWISE_CONV_2D", i30, i35, i34, i100, i101, i102, i103, i104).To(i33)
+model = model.Operation("CONV_2D", i33, i38, i37, i105, i106, i107, i108).To(i36)
+model = model.Operation("DEPTHWISE_CONV_2D", i36, i41, i40, i109, i110, i111, i112, i113).To(i39)
+model = model.Operation("CONV_2D", i39, i44, i43, i114, i115, i116, i117).To(i42)
+model = model.Operation("DEPTHWISE_CONV_2D", i42, i47, i46, i118, i119, i120, i121, i122).To(i45)
+model = model.Operation("CONV_2D", i45, i50, i49, i123, i124, i125, i126).To(i48)
+model = model.Operation("DEPTHWISE_CONV_2D", i48, i53, i52, i127, i128, i129, i130, i131).To(i51)
+model = model.Operation("CONV_2D", i51, i56, i55, i132, i133, i134, i135).To(i54)
+model = model.Operation("DEPTHWISE_CONV_2D", i54, i59, i58, i136, i137, i138, i139, i140).To(i57)
+model = model.Operation("CONV_2D", i57, i62, i61, i141, i142, i143, i144).To(i60)
+model = model.Operation("DEPTHWISE_CONV_2D", i60, i65, i64, i145, i146, i147, i148, i149).To(i63)
+model = model.Operation("CONV_2D", i63, i68, i67, i150, i151, i152, i153).To(i66)
+model = model.Operation("DEPTHWISE_CONV_2D", i66, i71, i70, i154, i155, i156, i157, i158).To(i69)
+model = model.Operation("CONV_2D", i69, i74, i73, i159, i160, i161, i162).To(i72)
+model = model.Operation("DEPTHWISE_CONV_2D", i72, i77, i76, i163, i164, i165, i166, i167).To(i75)
+model = model.Operation("CONV_2D", i75, i80, i79, i168, i169, i170, i171).To(i78)
+model = model.Operation("DEPTHWISE_CONV_2D", i78, i5, i4, i172, i173, i174, i175, i176).To(i3)
+model = model.Operation("CONV_2D", i3, i8, i7, i177, i178, i179, i180).To(i6)
+model = model.Operation("DEPTHWISE_CONV_2D", i6, i11, i10, i181, i182, i183, i184, i185).To(i9)
+model = model.Operation("CONV_2D", i9, i14, i13, i186, i187, i188, i189).To(i12)
+model = model.Operation("DEPTHWISE_CONV_2D", i12, i17, i16, i190, i191, i192, i193, i194).To(i15)
+model = model.Operation("CONV_2D", i15, i20, i19, i195, i196, i197, i198).To(i18)
+model = model.Operation("DEPTHWISE_CONV_2D", i18, i23, i22, i199, i200, i201, i202, i203).To(i21)
+model = model.Operation("CONV_2D", i21, i26, i25, i204, i205, i206, i207).To(i24)
+model = model.Operation("AVERAGE_POOL_2D", i24, i208, i209, i210, i211, i212, i213).To(i81)
+model = model.Operation("CONV_2D", i81, i84, i83, i214, i215, i216, i217).To(i82)
+model = model.Operation("LOGISTIC", i82).To(i85)
 
 # Example 1
 input0 = { i86: [0.791841, 0.131271, 0.840444, 0.524133, 0.301398, 0.711596, 8.78908e-05, 0.358888, 0.156309, 0.273055, 0.143706, 0.663516, 0.817875, 0.0178006, 0.0663899, 0.38532, 0.108224, 0.120309, 0.252355, 0.468634, 0.535587, 0.372087, 0.0191815, 0.0750463, 0.896686, 0.564102, 0.781927, 0.138955, 0.876559, 0.672544, 0.47254, 0.685613, 0.864712, 0.678431, 0.681087, 0.954624, 0.707985, 0.0945955, 0.663676, 0.0174337, 0.514265, 0.0993437, 0.837646, 0.16886, 0.0206787, 0.460454, 0.298217, 0.0939906, 0.792089, 0.145739, 0.124991, 0.152928, 0.18507, 0.0910606, 0.886938, 0.703805, 0.738545, 0.0914867, 0.785625, 0.255978, 0.25971, 0.564347, 0.496365, 0.40138, 0.181351, 0.229051, 0.528806, 0.815946, 0.723594, 0.0782805, 0.417488, 0.357831, 0.699987, 0.110877, 0.706929, 0.361355, 0.44735, 0.51417, 0.234213, 0.49157, 0.754239, 0.35671, 0.90015, 0.368686, 0.162982, 0.467298, 0.712059, 0.73199, 0.394652, 0.216439, 0.0325005, 0.675254, 0.0965207, 0.919576, 0.46926, 0.923022, 0.0721544, 0.0620356, 0.570436, 0.418233, 0.734994, 0.626141, 0.189962, 0.680934, 0.576122, 0.377738, 0.927142, 0.31627, 0.0390065, 0.305891, 0.777981, 0.576827, 0.999185, 0.849222, 0.221597, 0.0529092, 0.741046, 0.810611, 0.641734, 0.2737, 0.0306115, 0.382373, 0.117532, 0.690233, 0.20231, 0.599944, 0.464123, 0.79606, 0.171281, 0.0924674, 0.502584, 0.689291, 0.549744, 0.951152, 0.579524, 0.796293, 0.971173, 0.903601, 0.376714, 0.915486, 0.521651, 0.888365, 0.355228, 0.648741, 0.900593, 0.48239, 0.317946, 0.524421, 0.99061, 0.842221, 0.102702, 0.679481, 0.588507, 0.7512, 0.177413, 0.762043, 0.63814, 0.509979, 0.245258, 0.97713, 0.206899, 0.0342631, 0.582589, 0.677466, 0.548678, 0.969459, 0.763207, 0.659911, 0.720006, 0.492729, 0.721137, 0.198181, 0.0767499, 0.279166, 0.563685, 0.578014, 0.284114, 0.0313309, 0.545107, 0.675547, 0.902745, 0.799514, 0.14417, 0.197687, 0.187282, 0.0420023, 0.238308, 0.154671, 0.243883, 0.777129, 0.291907, 0.959133, 0.166203, 0.355963, 0.831646, 0.308086, 0.148097, 0.342163, 0.366069, 0.669976, 0.482005, 0.50455, 0.114772, 0.909615, 0.592529, 0.819863, 0.7448, 0.733599, 0.0818953, 0.333677, 0.436425, 0.640028, 0.128689, 0.802751, 0.053884, 0.0968059, 0.0141547, 0.189447, 0.458282, 0.301719, 0.332669, 0.697625, 0.607359, 0.96581, 0.0482129, 0.658574, 0.283779, 0.428031, 0.120848, 0.387377, 0.169832, 0.0381746, 0.549549, 0.721105, 0.281996, 0.282577, 0.183188, 0.237784, 0.590087, 0.289398, 0.540784, 0.301099, 0.396178, 0.855404, 0.460563, 0.125632, 0.150601, 0.271058, 0.696146, 0.947483, 0.735739, 0.425141, 0.977515, 0.3452, 0.143326, 0.274614, 0.925826, 0.81308, 0.535078, 0.998599, 0.427464, 0.260845, 0.137486, 0.837797, 0.0631066, 0.0876196, 0.588056, 0.40014, 0.815027, 0.494389, 0.355774, 0.450119, 0.717888, 0.423054, 0.20979, 0.842124, 0.399906, 0.410846, 0.559933, 0.451017, 0.558568, 0.944169, 0.881834, 0.00384158, 0.103625, 0.309752, 0.40491, 0.98423, 0.303001, 0.486862, 0.394447, 0.108623, 0.258184, 0.172573, 0.0685831, 0.358462, 0.272746, 0.875298, 0.690985, 0.800497, 0.512517, 0.692277, 0.0706645, 0.259856, 0.37559, 0.213658, 0.53025, 0.405643, 0.656994, 0.228048, 0.247219, 0.300241, 0.700641, 0.0177141, 0.466215, 0.200764, 0.857363, 0.483106, 0.522657, 0.144218, 0.267424, 0.291684, 0.67167, 0.0357309, 0.265176, 0.520329, 0.556993, 0.984931, 0.183227, 0.335942, 0.992855, 0.175479, 0.425192, 0.826319, 0.433081, 0.727791, 0.245524, 0.0597154, 0.156634, 0.64591, 0.958063, 0.537418, 0.295089, 0.0732913, 0.742363, 0.642074, 0.826581, 0.682193, 0.852718, 0.999771, 0.315818, 0.571465, 0.491486, 0.235984, 0.0818711, 0.636604, 0.212895, 0.660947, 0.765877, 0.0767624, 0.73344, 0.679814, 0.36851, 0.915551, 0.0944369, 0.982257, 0.872403, 0.796865, 0.114389, 0.967463, 0.957193, 0.575821, 0.713856, 0.91271, 0.124751, 0.106865, 0.376894, 0.421127, 0.793781, 0.914849, 0.691005, 0.944351, 0.332563, 0.170314, 0.447437, 0.760359, 0.683639, 0.393852, 0.668889, 0.222266, 0.667067, 0.217586, 0.189967, 0.136813, 0.329066, 0.51118, 0.15714, 0.403605, 0.674683, 0.644709, 0.908952, 0.496509, 0.0120233, 0.245706, 0.0329395, 0.795719, 0.986633, 0.865211, 0.0771508, 0.487609, 0.241025, 0.669604, 0.477396, 0.428557, 0.0621134, 0.68842, 0.784684, 0.556526, 0.0546337, 0.498104, 0.944155, 0.975526, 0.0519842, 0.828273, 0.220436, 0.0973805, 0.639122, 0.750508, 0.236016, 0.866084, 0.276684, 0.992722, 0.183576, 0.535933, 0.792447, 0.142149, 0.988627, 0.818945, 0.724294, 0.276561, 0.745799, 0.390849, 0.752617, 0.732283, 0.401179, 0.683818, 0.660091, 0.844869, 0.287746, 0.187653, 0.968993, 0.541457, 0.543372, 0.775215, 0.92933, 0.475041, 0.306358, 0.783032, 0.593079, 0.119069, 0.869258, 0.970535, 0.351855, 0.558143, 0.969403, 0.412738, 0.264689, 0.482702, 0.789336, 0.437969, 0.159124, 0.426539, 0.198885, 0.0177727, 0.691272, 0.0595643, 0.359525, 0.6306, 0.149484, 0.994781, 0.845899, 0.811227, 0.82501, 0.27116, 0.7401, 0.190015, 0.458648, 0.841917, 0.328061, 0.231616, 0.510571, 0.0631396, 0.292842, 0.333388, 0.216002, 0.933854, 0.765494, 0.300234, 0.158843, 0.608681, 0.49692, 0.622592, 0.869762, 0.515378, 0.243813, 0.351183, 0.529368, 0.311112, 0.238909, 0.433752, 0.998878, 0.62677, 0.838139, 0.650211, 0.636101, 0.667345, 0.948906, 0.309283, 0.202239, 0.449868, 0.432025, 0.187258, 0.99759, 0.487673, 0.824721, 0.51251, 0.854737, 0.412896, 0.810302, 0.105718, 0.319232, 0.99164, 0.123529, 0.316028, 0.570233, 0.662391, 0.669733, 0.0749745, 0.66906, 0.00903542, 0.510595, 0.967114, 0.783757, 0.869923, 0.655048, 0.260669, 0.68839, 0.87354, 0.913864, 0.113415, 0.625024, 0.474351, 0.776453, 0.21527, 0.113414, 0.749888, 0.626217, 0.388871, 0.0309753, 0.475298, 0.422064, 0.460825, 0.32816, 0.955097, 0.627315, 0.792411, 0.00766529, 0.566721, 0.407374, 0.634685, 0.627003, 0.375373, 0.31221, 0.861205, 0.608589, 0.880119, 0.52554, 0.605035, 0.118977, 0.613206, 0.383087, 0.716612, 0.622154, 0.851895, 0.0783142, 0.475583, 0.21843, 0.584996, 0.938854, 0.62971, 0.813131, 0.892749, 0.798681, 0.795511, 0.0655248, 0.285758, 0.246531, 0.78642, 0.342706, 0.583047, 0.0344585, 0.144597, 0.251586, 0.915092, 0.863438, 0.647058, 0.0484427, 0.898403, 0.423501, 0.992785, 0.0703023, 0.799657, 0.665863, 0.0711288, 0.680655, 0.65026, 0.1549, 0.593819, 0.767113, 0.150623, 0.918489, 0.176067, 0.85076, 0.979277, 0.572358, 0.13148, 0.643712, 0.831597, 0.0992917, 0.272232, 0.694243, 0.335103, 0.241076, 0.246106, 0.942713, 0.432468, 0.789363, 0.458507, 0.339482, 0.0900444, 0.74853, 0.14387, 0.38917, 0.957029, 0.989021, 0.611135, 0.697256, 0.0395212, 0.549286, 0.985937, 0.312926, 0.527949, 0.354932, 0.589522, 0.936589, 0.198696, 0.480116, 0.992084, 0.407626, 0.139969, 0.0251239, 0.499093, 0.985195, 0.595041, 0.680062, 0.801376, 0.61929, 0.480137, 0.331, 0.345052, 0.859727, 0.588247, 0.295778, 0.0999083, 0.376957, 0.470159, 0.216982, 0.530417, 0.551786, 0.491341, 0.598367, 0.749522, 0.181984, 0.472262, 0.934373, 0.378052, 0.376463, 0.439012, 0.64088, 0.202156, 0.905179, 0.79377, 0.695248, 0.815266, 0.0739469, 0.620277, 0.889489, 0.361428, 0.37442, 0.936218, 0.255595, 0.112557, 0.398399, 0.11098, 0.222453, 0.265583, 0.0120594, 0.814637, 0.373474, 0.369039, 0.877383, 0.91715, 0.759644, 0.170179, 0.658204, 0.0327627, 0.837132, 0.225002, 0.0310278, 0.275552, 0.929744, 0.718458, 0.343128, 0.762734, 0.354592, 0.220131, 0.885119, 0.477841, 0.080636, 0.342969, 0.402588, 0.0586417, 0.866942, 0.657128, 0.135711, 0.23269, 0.885087, 0.301901, 0.0223638, 0.243521, 0.897715, 0.831138, 0.422695, 0.373375, 0.604348, 0.216366, 0.117223, 0.52669, 0.957595, 0.397123, 0.527852, 0.162748, 0.331502, 0.0476454, 0.493669, 0.45054, 0.0189271, 0.832804, 0.245005, 0.0257984, 0.806287, 0.573803, 0.554897, 0.242035, 0.551262, 0.807645, 0.697002, 0.236734, 0.0732667, 0.825466, 0.273506, 0.918823, 0.728595, 0.514056, 0.913061, 0.990209, 0.569672, 0.73299, 0.254236, 0.226596, 0.438448, 0.718309, 0.0261628, 0.522876, 0.13089, 0.518293, 0.489113, 0.856953, 0.859139, 0.0102561, 0.241273, 0.265863, 0.46517, 0.692028, 0.0965296, 0.357579, 0.0809109, 0.973039, 0.241768, 0.178742, 0.16546, 0.32408, 0.51216, 0.353633, 0.914092, 0.996733, 0.527617, 0.38878, 0.968574, 0.189173, 0.297074, 0.0769255, 0.329634, 0.999992, 0.376291, 0.353023, 0.968517, 0.936789, 0.839482, 0.141374, 0.287281, 0.899092, 0.276857, 0.701517, 0.705605, 0.694727, 0.709399, 0.150969, 0.838456, 0.872205, 0.251672, 0.0823043, 0.433517, 0.114241, 0.686941, 0.604298, 0.96366, 0.998541, 0.542768, 0.763697, 0.487684, 0.614873, 0.118265, 0.82044, 0.928577, 0.130926, 0.788807, 0.116383, 0.961747, 0.119231, 0.584441, 0.492563, 0.310756, 0.386993, 0.706782, 0.856075, 0.351463, 0.88558, 0.953703, 0.625848, 0.152387, 0.725336, 0.209592, 0.510357, 0.994541, 0.563889, 0.112611, 0.188244, 0.200779, 0.603122, 0.498709, 0.401355, 0.256663, 0.72548, 0.286149, 0.585824, 0.729582, 0.109245, 0.750599, 0.526262, 0.2682, 0.0439657, 0.940121, 0.51635, 0.563138, 0.648896, 0.626415, 0.326178, 0.514948, 0.792292, 0.132806, 0.0344517, 0.68247, 0.688457, 0.0830311, 0.822472, 0.421894, 0.363927, 0.258686, 0.469445, 0.484979, 0.261765, 0.0107293, 0.823743, 0.898295, 0.685985, 0.12627, 0.0935537, 0.710923, 0.221798, 0.466435, 0.204661, 0.419436, 0.888813, 0.812406, 0.0987169, 0.56719, 0.0848368, 0.415454, 0.0568779, 0.0836185, 0.591172, 0.222817, 0.084403, 0.443582, 0.511802, 0.291254, 0.57206, 0.538638, 0.0480104, 0.394755, 0.146417, 0.486177, 0.275562, 0.991969, 0.152291, 0.125037, 0.734148, 0.273974, 0.907751, 0.0557118, 0.625865, 0.540812, 0.404363, 0.683585, 0.817448, 0.880429, 0.0368383, 0.117144, 0.452914, 0.601129, 0.816468, 0.177218, 0.341007, 0.437119, 0.512966, 0.734273, 0.670025, 0.774994, 0.516255, 0.403913, 0.194468, 0.730509, 0.915396, 0.733057, 0.226151, 0.773553, 0.560888, 0.322723, 0.880917, 0.354637, 0.764857, 0.101728, 0.98936, 0.770464, 0.363922, 0.268453, 0.122471, 0.468997, 0.227406, 0.908916, 0.838655, 0.675934, 0.297773, 0.820353, 0.968448, 0.22299, 0.45603, 0.883587, 0.961793, 0.981808, 0.0918925, 0.289544, 0.0126749, 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@@ -256,4 +258,4 @@ input0 = { i86: [0.791841, 0.131271, 0.840444, 0.524133, 0.301398, 0.711596, 8.7
 output0 = {i85: [0.605085, 0.0733608, 0.0200205, 0.114568, 0.178815, 0.0580576, 0.123144, 0.232838, 0.0916902, 0.111395, 0.138349]}
 
 Example((input0, output0))
-
+"""
diff --git a/tests/nnapi/specs/V1_0/mobilenet_quantized.mod.py b/tests/nnapi/specs/V1_0/mobilenet_quantized.mod.py
index 3f9684950..3a49f0719 100644
--- a/tests/nnapi/specs/V1_0/mobilenet_quantized.mod.py
+++ b/tests/nnapi/specs/V1_0/mobilenet_quantized.mod.py
@@ -1,3 +1,5 @@
+# Comment out: too large test. we can test mobilenet using frameworktest
+"""
 # Passing weights via shared memory
 Configuration.use_shm_for_weights = True
 model = Model()
@@ -222,40 +224,41 @@ i83 = Parameter("op83", "TENSOR_INT32", "{1001}, 0.000139550233143, 0", [-4628,
 i84 = Parameter("op84", "TENSOR_QUANT8_ASYMM", "{1001, 1, 1, 1024}, 0.00593112036586, 66", [65, 65, 65, 66, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 66, 66, 65, 65, 65, 66, 66, 65, 65, 65, 66, 66, 65, 65, 65, 65, 66, 65, 65, 65, 65, 65, 66, 65, 66, 65, 65, 65, 65, 65, 66, 66, 65, 65, 66, 65, 65, 65, 65, 66, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 66, 65, 65, 65, 65, 65, 66, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 66, 65, 65, 65, 65, 66, 65, 65, 65, 65, 66, 65, 65, 66, 66, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 66, 65, 65, 66, 65, 65, 65, 65, 66, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, 66, 66, 66, 65, 65, 65, 66, 65, 65, 65, 66, 65, 65, 65, 65, 65, 65, 65, 65, 66, 66, 65, 65, 66, 65, 65, 65, 65, 65, 66, 65, 65, 65, 65, 65, 65, 65, 65, 65, 66, 65, 65, 65, 65, 65, 65, 65, 66, 65, 66, 65, 65, 66, 65, 65, 66, 65, 65, 66, 66, 65, 65, 65, 65, 65, 65, 65, 65, 66, 65, 66, 65, 65, 65, 65, 65, 65, 65, 65, 66, 65, 65, 66, 65, 65, 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118, 65, 50, 89, 57, 52, 65, 60, 73, 55, 56, 53, 81, 74, 60, 64, 57, 78, 55, 55, 81, 52, 60, 69, 78, 50, 82, 72, 90, 90, 87, 68, 59, 55, 76, 50, 58, 57, 58, 118, 81, 68, 72, 107, 62, 63, 100, 48, 70, 53, 61, 71, 60, 57, 53, 72, 57, 53, 89, 104, 66, 110, 56, 66, 61, 36, 60, 60, 57, 72, 64, 100, 52, 55, 63, 71, 62, 87, 88, 72, 68, 51, 60, 61, 67, 81, 125, 43, 62, 67, 75, 80, 69, 69, 62, 57, 40, 58, 50, 58, 66, 63, 61, 79, 69, 64, 68, 51, 71, 63, 99, 98, 59, 66, 45, 67, 50, 45, 68, 79, 61, 58, 72, 74, 67, 76, 57, 91, 56, 67, 87, 75, 79, 93, 77, 60, 56, 63, 68, 66, 78, 60, 53, 67, 79, 56, 50, 53, 66, 68, 76, 76, 56, 64, 68, 56, 49, 49, 87, 67, 53, 41, 56, 81, 63, 67, 56, 86, 57, 57, 45, 68, 63, 53, 75, 54, 57, 79, 70, 59, 76, 76, 68, 62, 57, 74, 67, 63, 62, 85, 49, 73, 61, 82, 54, 73, 72, 64, 57, 58, 113, 65, 54, 55, 60, 75, 54, 80, 77, 32, 67, 71, 67, 67, 69, 68, 60, 46, 82, 66, 121, 54, 62, 58, 56, 54, 67, 53, 61, 70, 52, 72, 50, 76, 71, 62, 73, 62, 77, 54, 53, 79, 70, 52, 62, 50, 66, 43, 68, 49, 61, 59, 52, 78, 61, 93, 52, 85, 85, 56, 62, 49, 48, 57, 86, 69, 52, 73, 69, 57, 55, 63, 67, 81, 95, 64, 67, 67, 54, 69, 57, 77, 56, 59, 78, 49, 58, 57, 62, 61, 70, 69, 45, 63, 59, 63, 66, 57, 66, 79, 52, 61, 52, 54, 51, 60, 74, 55, 59, 69, 52, 58, 65, 57, 71, 68, 55, 77, 85, 54, 72, 69, 82, 78, 78, 63, 59, 60, 63, 87, 75, 61, 77, 57, 83, 48, 64, 48, 58, 68, 69, 70, 79, 61, 65, 60, 64, 53, 72, 83, 69, 73, 85, 82, 52, 84, 62, 60, 84, 91, 73, 66, 79, 83, 65, 86, 57, 65, 90, 55, 59, 79, 54, 56, 67, 81, 66, 88, 71, 66, 58, 61, 62, 70, 70, 65, 61, 50, 77, 67, 76, 60, 70, 67, 57, 64, 84, 84, 41, 75, 66, 86, 71, 67, 51, 72, 83, 58, 88, 67, 74, 79, 63, 63, 76, 78, 52, 82, 93, 57, 84, 65, 58, 56, 79, 62, 61, 77, 61, 78, 71, 43, 73, 42, 56, 78, 64, 69, 63, 94, 65, 52, 74, 82, 55, 76, 72, 54, 59, 63, 56, 44, 45, 59, 69, 62, 49, 62, 72, 86, 80, 51, 55, 51, 62, 97, 77, 63, 77, 64, 58, 59, 49, 42, 46, 83, 71, 56, 61, 71, 61, 70, 91, 45, 55, 66, 96, 56, 94, 48, 48, 64, 71, 57, 76, 69, 57, 72, 65, 87, 44, 45, 64, 65, 68, 81, 59, 63, 57, 63, 76, 49, 66, 52, 69, 200, 62, 71, 66, 66, 53, 73, 43, 70, 93, 57, 54, 45, 69, 60, 53, 53, 129, 73, 68, 64, 50, 55, 84, 78, 71, 51, 60, 109, 57, 75, 85, 71, 63, 55, 61, 51, 59, 52, 61, 72, 61, 59, 59, 80, 70, 71, 84, 59, 58, 65, 41, 57, 67, 61, 61, 69, 68, 74, 47, 57, 62, 66, 65, 54, 43, 65, 48, 50, 77, 85, 68, 59, 71, 100, 67, 56, 53, 89, 55, 63, 76, 59, 47, 49, 69, 65, 57, 94, 79, 64, 63, 59, 64, 65, 75, 62, 53, 53, 66, 84, 101, 78, 74, 75, 50, 69, 62, 64, 65, 64, 54, 67, 75, 59, 76, 70, 69, 78, 68, 67, 74, 60, 93, 67, 56, 66, 55, 59, 52, 42, 88, 79, 68, 76, 46, 50, 42, 55, 61, 71, 55, 63, 66, 71, 62, 61, 67, 65, 78, 79, 91, 72, 57, 50, 73, 77, 81, 68, 81, 68, 65, 69, 59, 57, 67, 77, 58, 69, 65, 62, 71, 69, 86, 62, 63, 84, 50, 73, 60, 68, 85, 61, 70, 52, 63, 54, 66, 106, 71, 80, 47, 79, 60, 96, 60, 69, 71, 48, 64, 64, 48, 85, 77, 71, 60, 53, 59, 59, 75, 64, 88, 78, 59, 52, 58, 49, 129, 53, 72, 72, 83, 70, 94, 40, 78, 71, 91, 59, 60, 63, 70, 57, 45, 65, 41, 69, 62, 60, 59, 69, 88, 78, 70, 53, 131, 50, 43, 77, 70, 65, 76, 59, 78, 64, 62, 51, 59, 67, 60, 71, 46, 75, 58, 54, 65, 40, 53, 42, 64, 50, 79, 69, 71, 72, 73, 68, 77, 67, 77, 76, 46, 61, 55, 57, 59, 70, 63, 67, 42, 62, 63, 58, 65, 76, 59, 58, 48, 54, 61, 52, 72, 70, 51, 72, 71, 68, 76, 96, 60, 80, 70, 70, 69, 51, 57, 53, 68, 91, 61, 65, 68, 43, 60, 88, 60, 47, 64, 60, 66, 81, 57, 45, 73, 76, 77, 64, 59, 61, 45, 75, 54, 56, 85, 63, 72, 45, 84, 89, 66, 58, 86, 58, 74, 58, 61, 73, 59, 80, 69, 62, 63, 57, 46, 40, 70, 76, 58, 68, 88, 55, 59, 81, 84, 60, 66, 66, 53, 68, 58, 64, 60, 66, 78, 84, 55, 68, 61, 108, 65, 67, 113, 74, 106, 69, 77, 59, 51, 66, 55, 65, 59, 38, 48, 68, 85, 66, 80, 44, 65, 79, 82, 60, 61, 73, 61, 69, 76, 62, 58, 75, 47, 82, 72, 94, 71, 76, 58, 69, 51, 66, 59, 76, 59, 65, 49, 61, 79, 65, 61, 75, 65, 55, 81, 63, 59, 82, 65, 59, 71, 61, 54, 75, 63, 61, 68, 85, 41, 56, 65, 74, 78, 56, 78, 77, 66, 76, 44, 62, 64, 75, 50, 71, 74, 87, 95, 77, 56, 34, 61, 78, 63, 55, 63, 63, 53, 66, 91, 56, 62, 69, 63, 64, 64, 109, 52, 63, 64, 96, 46, 65, 86, 79, 86, 64, 80, 54, 83, 97, 93, 73, 86, 65, 47, 124, 57, 60, 61, 79, 56, 52, 60, 67, 57, 53, 66, 66, 48, 60, 68, 79, 61, 75, 56, 70, 66, 63, 74, 68, 86, 57, 72, 84, 66, 87, 60, 80, 42, 69, 71, 58, 68, 61, 56, 50, 54, 71, 62, 59, 44, 69, 73, 64, 72, 104, 81, 55, 60, 77, 64, 82, 92, 54, 75, 70, 68, 59, 59, 69, 61, 54, 78, 83, 66, 62, 50, 80, 72, 52, 81, 61, 68, 75, 78, 58, 49, 57, 49, 78, 49, 51, 69, 44, 48, 57, 106, 66, 68, 79, 77, 63, 64, 61, 82, 68, 55, 50, 55, 79, 69, 71, 71, 49, 42, 77, 86, 90, 74, 64, 77, 63, 74, 85, 52, 75, 85, 67, 115, 51, 55, 55, 53, 80, 61, 60, 48, 69, 49, 74, 76, 44, 44, 79, 64, 83, 57, 60, 57, 65, 60, 54, 59, 56, 70, 73, 46, 71, 82, 58, 77, 98, 60, 72, 69, 85, 88, 47, 141, 54, 78, 63, 75, 75, 66, 64, 50, 61, 72, 59, 49, 65, 49, 55, 63, 69, 59, 65, 66, 71, 66, 59, 58, 69, 83, 71, 61, 63, 58, 59, 72, 77, 66, 64, 57, 81, 59, 52, 76, 77, 65, 81, 61, 52, 68, 87, 67, 61, 63, 81, 61, 56, 64, 84, 67, 63, 68, 57, 69, 66, 78, 63, 58, 70, 57, 80, 82, 75, 66, 75, 60, 69, 64, 67, 77, 59, 64, 60, 58, 69, 59, 90, 55, 76, 61, 70, 61, 76, 60, 59, 65, 62, 75, 65, 66, 54, 56, 68, 59, 80, 78, 52, 135, 58, 63, 73, 114, 67, 62, 47, 63, 67, 54, 58, 59, 81, 55, 72, 76, 43, 73, 74, 61, 49, 68, 67, 92, 69, 57, 39, 54, 52, 78, 85, 77, 55, 57, 67, 53, 57, 86, 78, 108, 76, 70, 65, 52, 81, 55, 68, 49, 57, 66, 64, 62, 68, 86, 65, 83, 73, 56, 96, 45, 73, 59, 66, 60, 86, 57, 61, 56, 63, 57, 72, 51, 52, 44, 61, 76, 48, 53, 57, 83, 47, 76, 76, 75, 53, 67, 56, 54, 62, 60, 72, 50, 87, 56, 64, 64, 35, 60, 56, 74, 44, 71, 67, 68, 67, 55, 92, 73, 62, 57, 71, 71, 47, 65, 64, 67, 63, 44, 67, 86, 59, 66, 82, 54, 61, 77, 62, 64, 72, 28, 107, 64, 54, 62, 72, 48, 61, 90, 52, 80, 48, 73, 66, 69, 86, 71, 68, 71, 69, 66, 98, 54, 82, 73, 86, 73, 67, 79, 93, 84, 66, 73, 40, 58, 50, 63, 39, 35, 63, 76, 73, 114, 45, 44, 86, 73, 61, 38, 60, 49, 79, 135, 59, 54, 60, 75, 69, 74, 56, 52, 59, 65, 74, 58, 74, 70, 60, 86, 67, 67, 57, 57, 76, 60, 54, 52, 77, 62, 65, 51, 53, 58, 73, 57, 56, 71, 56, 88, 78, 68, 96, 55, 77, 65, 55, 65, 66, 80, 67, 69, 58, 52, 72, 43, 66, 71, 59, 69, 71, 64, 67, 96, 67, 69, 78, 55, 101, 50, 88, 51, 55, 80, 70, 69, 67, 75, 96, 50, 49, 58, 69, 65, 53, 67, 66, 70, 93, 68, 79, 60, 68, 103, 76, 69, 54, 56, 71, 72, 55, 55, 55, 54, 60, 83, 57, 58, 52, 68, 50, 76, 65, 71, 57, 78, 78, 39, 72, 74, 74, 74, 61, 120, 81, 70, 61, 55, 77, 63, 60, 60, 55, 64, 63, 74, 65, 67, 56, 67, 76, 64, 67, 41, 50, 74, 84, 77, 54, 69, 54, 90, 55, 58, 62, 66, 46, 66, 63, 84, 74, 60, 52, 58, 78, 73, 68, 115, 55, 75, 56, 71, 46, 48, 44, 91, 52, 70, 69, 77, 83, 82, 61, 50, 36, 72, 64, 74, 67, 52, 65, 67, 60, 74, 49, 54, 43, 76, 68, 79, 56, 55, 74, 86, 103, 78, 50, 69, 69, 60, 59, 57, 67, 84, 84, 68, 35, 70, 72, 61, 62, 61, 62, 68, 79, 69, 49, 69, 78, 85, 67, 57, 65, 67, 128, 70, 80, 61, 87, 44, 45, 62, 49, 59, 77, 84, 62, 53, 61, 58, 79, 78, 103, 117, 85, 121, 55, 61, 87, 67, 68, 89, 76, 62, 44, 56, 65, 66, 57, 83, 70, 53, 75, 51, 73, 58, 59, 102, 75, 76, 60, 68, 83, 68, 59, 53, 30, 82, 62, 47, 57, 58, 74, 102, 49, 67, 54, 91, 54, 59, 66, 49, 77, 71, 50, 105, 60, 65, 57, 84, 69, 95, 56, 76, 67, 46, 74, 64, 66, 59, 74, 59, 116, 67, 85, 45, 68, 61, 77, 68, 55, 85, 91, 64, 86, 45, 58, 62, 60, 57, 58, 79, 55, 64, 60, 68, 74, 72, 97, 57, 65, 69, 56, 64, 58, 44, 43, 42, 59, 57, 78, 53, 51, 61, 73, 104, 76, 69, 80, 45, 87, 71, 62, 57, 64, 66, 113, 54, 77, 90, 76, 62, 70, 76, 72, 95, 51, 43, 94, 76, 60, 57, 62, 53, 49, 68, 76, 68, 57, 49, 55, 51, 71, 70, 76, 56, 55, 62, 62, 82, 70, 67, 77, 48, 64, 33, 49, 53, 52, 65, 64, 56, 53, 56, 90, 64, 86, 79, 54, 58, 63, 69, 46, 65, 149, 84, 65, 53, 55, 50, 50, 67, 73, 44, 49, 82, 60, 84, 51, 80, 61, 76, 60, 64, 78, 53, 43, 72, 95, 77, 64, 69, 43, 75, 59, 109, 72, 62, 71, 65, 72, 69, 66, 65, 75, 60, 93, 63, 73, 56, 54, 52, 67, 68, 92, 75, 90, 70, 67, 51, 56, 65, 109, 70, 101, 88, 67, 66, 56, 61, 71, 65, 69, 38, 65, 70, 80, 78, 64, 75, 46, 66, 39, 66, 70, 63, 70, 53, 59, 44, 45, 54, 79, 84, 102, 64, 87, 66, 58, 49, 74, 47, 61, 69, 62, 75, 62, 90, 59, 43, 60, 40, 55, 79, 66, 61, 51, 69, 54, 107, 46, 51, 69, 54, 67, 51, 57, 55, 62, 61, 61, 75, 63, 59, 62, 77, 78, 87, 56, 94, 64, 61, 57, 80, 64, 69, 58, 82, 64, 47, 93, 39, 53, 47, 74, 56, 72, 58, 68, 43, 55, 60, 72, 63, 85, 66, 54, 71, 61, 55, 65, 65, 103, 61, 68, 80, 103, 81, 60, 56, 66, 93, 80, 77, 53, 55, 107, 52, 47, 56, 65, 99, 56, 54, 80, 65, 43, 74, 54, 62, 50, 35, 50, 72, 100, 50, 69, 42, 50, 69, 38, 60, 52, 63, 83, 63, 41, 57, 63, 66, 63, 74, 54, 66, 66, 54, 54, 65, 68, 65, 59, 64, 109, 58, 67, 38, 72, 68, 59, 67, 48, 94, 79, 86, 122, 82, 83, 60, 55, 96, 58, 60, 57, 52, 65, 69, 29, 61, 64, 57, 73, 87, 42, 81, 68, 62, 52, 54, 71, 42, 63, 55, 57, 52, 46, 72, 44, 52, 64, 65, 73, 70, 52, 57, 42, 55, 50, 49, 52, 55, 45, 126, 43, 68, 54, 58, 56, 53, 62, 64, 53, 61, 43, 71, 54, 85, 79, 68, 69, 88, 59, 52, 91, 54, 75, 64, 63, 51, 72, 79, 85, 67, 84, 66, 63, 63, 75, 57, 64, 78, 93, 80, 81, 68, 56, 54, 60, 84, 43, 79, 105, 61, 44, 47, 55, 78, 85, 68, 87, 69, 49, 66, 52, 72, 40, 104, 77, 59, 64, 87, 60, 56, 67, 53, 56, 84, 78, 90, 61, 55, 58, 63, 74, 58, 40, 55, 50, 51, 50, 66, 42, 91, 73, 48, 87, 76, 88, 83, 19, 61, 66, 69, 42, 79, 68, 43, 70, 62, 73, 63, 34, 66, 87, 67, 81, 74, 86, 64, 61, 59, 60, 93, 65, 70, 54, 48, 56, 55, 55, 62, 59, 52, 55, 69, 81, 61, 54, 66, 70, 92, 51, 61, 67, 118, 53, 55, 85, 75, 79, 53, 73, 58, 54, 89, 52, 37, 85, 86, 61, 66, 57, 80, 53, 62, 57, 56, 70, 87, 65, 54, 50, 47, 84, 58, 50, 102, 61, 47, 71, 61, 46, 59, 72, 76, 63, 58, 49, 60, 57, 92, 52, 85, 76, 57, 68, 75, 75, 71, 70, 67, 69, 48, 59, 56, 58, 76, 52, 50, 29, 66, 63, 68, 78, 62, 22, 93, 59, 50, 53, 71, 60, 44, 48, 66, 85, 120, 61, 88, 113, 79, 137, 67, 77, 52, 54, 111, 54, 73, 55, 47, 66, 71, 69, 69, 61]) # parameters
 i86 = Internal("op86", "TENSOR_QUANT8_ASYMM", "{1, 1001}, 0.14927123487, 69") # intermediate result
 i87 = Parameter("op87", "TENSOR_INT32", "{2}, 0, 0", [1, 1001]) # parameters
-model = model.Conv(i88, i2, i1, i104, i105, i106, i107).To(i0)
-model = model.DepthWiseConv(i0, i29, i28, i108, i109, i110, i111, i112).To(i27)
-model = model.Conv(i27, i32, i31, i113, i114, i115, i116).To(i30)
-model = model.DepthWiseConv(i30, i35, i34, i117, i118, i119, i120, i121).To(i33)
-model = model.Conv(i33, i38, i37, i122, i123, i124, i125).To(i36)
-model = model.DepthWiseConv(i36, i41, i40, i126, i127, i128, i129, i130).To(i39)
-model = model.Conv(i39, i44, i43, i131, i132, i133, i134).To(i42)
-model = model.DepthWiseConv(i42, i47, i46, i135, i136, i137, i138, i139).To(i45)
-model = model.Conv(i45, i50, i49, i140, i141, i142, i143).To(i48)
-model = model.DepthWiseConv(i48, i53, i52, i144, i145, i146, i147, i148).To(i51)
-model = model.Conv(i51, i56, i55, i149, i150, i151, i152).To(i54)
-model = model.DepthWiseConv(i54, i59, i58, i153, i154, i155, i156, i157).To(i57)
-model = model.Conv(i57, i62, i61, i158, i159, i160, i161).To(i60)
-model = model.DepthWiseConv(i60, i65, i64, i162, i163, i164, i165, i166).To(i63)
-model = model.Conv(i63, i68, i67, i167, i168, i169, i170).To(i66)
-model = model.DepthWiseConv(i66, i71, i70, i171, i172, i173, i174, i175).To(i69)
-model = model.Conv(i69, i74, i73, i176, i177, i178, i179).To(i72)
-model = model.DepthWiseConv(i72, i77, i76, i180, i181, i182, i183, i184).To(i75)
-model = model.Conv(i75, i80, i79, i185, i186, i187, i188).To(i78)
-model = model.DepthWiseConv(i78, i5, i4, i189, i190, i191, i192, i193).To(i3)
-model = model.Conv(i3, i8, i7, i194, i195, i196, i197).To(i6)
-model = model.DepthWiseConv(i6, i11, i10, i198, i199, i200, i201, i202).To(i9)
-model = model.Conv(i9, i14, i13, i203, i204, i205, i206).To(i12)
-model = model.DepthWiseConv(i12, i17, i16, i207, i208, i209, i210, i211).To(i15)
-model = model.Conv(i15, i20, i19, i212, i213, i214, i215).To(i18)
-model = model.DepthWiseConv(i18, i23, i22, i216, i217, i218, i219, i220).To(i21)
-model = model.Conv(i21, i26, i25, i221, i222, i223, i224).To(i24)
-model = model.AveragePool(i24, i225, i226, i227, i228, i229, i230).To(i81)
-model = model.Conv(i81, i84, i83, i231, i232, i233, i234).To(i82)
-model = model.Reshape(i82, i87).To(i86)
-model = model.SoftMax(i86, i235).To(i85)
+model = model.Operation("CONV_2D", i88, i2, i1, i104, i105, i106, i107).To(i0)
+model = model.Operation("DEPTHWISE_CONV_2D", i0, i29, i28, i108, i109, i110, i111, i112).To(i27)
+model = model.Operation("CONV_2D", i27, i32, i31, i113, i114, i115, i116).To(i30)
+model = model.Operation("DEPTHWISE_CONV_2D", i30, i35, i34, i117, i118, i119, i120, i121).To(i33)
+model = model.Operation("CONV_2D", i33, i38, i37, i122, i123, i124, i125).To(i36)
+model = model.Operation("DEPTHWISE_CONV_2D", i36, i41, i40, i126, i127, i128, i129, i130).To(i39)
+model = model.Operation("CONV_2D", i39, i44, i43, i131, i132, i133, i134).To(i42)
+model = model.Operation("DEPTHWISE_CONV_2D", i42, i47, i46, i135, i136, i137, i138, i139).To(i45)
+model = model.Operation("CONV_2D", i45, i50, i49, i140, i141, i142, i143).To(i48)
+model = model.Operation("DEPTHWISE_CONV_2D", i48, i53, i52, i144, i145, i146, i147, i148).To(i51)
+model = model.Operation("CONV_2D", i51, i56, i55, i149, i150, i151, i152).To(i54)
+model = model.Operation("DEPTHWISE_CONV_2D", i54, i59, i58, i153, i154, i155, i156, i157).To(i57)
+model = model.Operation("CONV_2D", i57, i62, i61, i158, i159, i160, i161).To(i60)
+model = model.Operation("DEPTHWISE_CONV_2D", i60, i65, i64, i162, i163, i164, i165, i166).To(i63)
+model = model.Operation("CONV_2D", i63, i68, i67, i167, i168, i169, i170).To(i66)
+model = model.Operation("DEPTHWISE_CONV_2D", i66, i71, i70, i171, i172, i173, i174, i175).To(i69)
+model = model.Operation("CONV_2D", i69, i74, i73, i176, i177, i178, i179).To(i72)
+model = model.Operation("DEPTHWISE_CONV_2D", i72, i77, i76, i180, i181, i182, i183, i184).To(i75)
+model = model.Operation("CONV_2D", i75, i80, i79, i185, i186, i187, i188).To(i78)
+model = model.Operation("DEPTHWISE_CONV_2D", i78, i5, i4, i189, i190, i191, i192, i193).To(i3)
+model = model.Operation("CONV_2D", i3, i8, i7, i194, i195, i196, i197).To(i6)
+model = model.Operation("DEPTHWISE_CONV_2D", i6, i11, i10, i198, i199, i200, i201, i202).To(i9)
+model = model.Operation("CONV_2D", i9, i14, i13, i203, i204, i205, i206).To(i12)
+model = model.Operation("DEPTHWISE_CONV_2D", i12, i17, i16, i207, i208, i209, i210, i211).To(i15)
+model = model.Operation("CONV_2D", i15, i20, i19, i212, i213, i214, i215).To(i18)
+model = model.Operation("DEPTHWISE_CONV_2D", i18, i23, i22, i216, i217, i218, i219, i220).To(i21)
+model = model.Operation("CONV_2D", i21, i26, i25, i221, i222, i223, i224).To(i24)
+model = model.Operation("AVERAGE_POOL_2D", i24, i225, i226, i227, i228, i229, i230).To(i81)
+model = model.Operation("CONV_2D", i81, i84, i83, i231, i232, i233, i234).To(i82)
+model = model.Operation("RESHAPE", i82, i87).To(i86)
+model = model.Operation("SOFTMAX", i86, i235).To(i85)
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28, 32, 19, 27, 29, 17, 30, 34, 21, 35, 39, 26, 23, 25, 13, 31, 30, 19, 51, 43, 34, 44, 41, 31, 42, 39, 28, 39, 36, 28, 36, 36, 25, 43, 43, 32, 32, 31, 22, 31, 30, 21, 44, 41, 33, 47, 46, 37, 49, 49, 38, 39, 36, 28, 40, 38, 27, 40, 41, 29, 33, 32, 23, 37, 39, 27, 30, 29, 18, 43, 45, 33, 23, 26, 11, 33, 31, 20, 33, 31, 18, 36, 33, 20, 60, 58, 45, 42, 39, 28, 30, 29, 18, 40, 39, 28, 43, 40, 29, 43, 40, 29, 56, 58, 46, 36, 38, 26, 50, 52, 40, 31, 33, 21, 46, 45, 34, 43, 43, 32, 36, 40, 29, 40, 41, 34, 50, 53, 45, 44, 45, 38, 31, 33, 25, 47, 51, 43, 55, 56, 49, 39, 45, 36, 38, 42, 32, 67, 71, 63, 41, 42, 35, 44, 47, 41, 43, 46, 40, 39, 38, 31, 42, 43, 36, 34, 35, 28, 39, 43, 35, 31, 37, 28, 38, 39, 34, 44, 45, 38, 33, 31, 27, 31, 29, 23, 34, 35, 28, 28, 27, 21, 34, 33, 25, 33, 32, 23, 41, 40, 32, 38, 40, 30, 27, 28, 19, 53, 55, 46, 38, 40, 32, 34, 35, 28, 58, 59, 52, 38, 40, 32, 77, 78, 71, 88, 87, 78, 87, 86, 77, 102, 101, 90, 83, 81, 68, 91, 88, 75, 104, 102, 89, 97, 92, 78, 130, 126, 112, 242, 238, 223, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 96, 91, 79, 95, 88, 76, 87, 85, 72, 96, 89, 76, 103, 98, 86, 84, 77, 66, 97, 90, 79, 89, 89, 75, 91, 86, 76, 86, 83, 70, 85, 82, 71, 41, 43, 31, 57, 61, 48, 48, 53, 38, 26, 33, 19, 51, 53, 41, 38, 40, 30, 48, 48, 36, 34, 36, 24, 30, 32, 22, 36, 36, 25, 30, 32, 20, 33, 34, 25, 36, 38, 26, 37, 39, 27, 44, 41, 31, 23, 22, 11, 17, 21, 8, 44, 27, 21, 31, 33, 21, 36, 36, 25, 49, 45, 37, 26, 25, 16, 29, 31, 19, 39, 36, 28, 32, 31, 20, 42, 39, 28, 46, 43, 35, 32, 31, 20, 35, 34, 26, 40, 37, 29, 32, 36, 24, 26, 27, 18, 29, 33, 22, 33, 32, 21, 22, 29, 15, 49, 49, 36, 58, 43, 36, 31, 29, 16, 47, 37, 29, 35, 39, 26, 21, 23, 11, 33, 38, 25, 38, 42, 29, 39, 46, 30, 57, 59, 47, 35, 39, 26, 48, 50, 38, 40, 41, 29, 32, 37, 22, 45, 49, 36, 41, 41, 29, 45, 44, 33, 35, 36, 27, 50, 54, 43, 32, 36, 28, 31, 33, 25, 40, 44, 36, 38, 41, 34, 31, 34, 29, 52, 54, 46, 38, 41, 36, 52, 55, 49, 57, 60, 54, 38, 43, 37, 55, 56, 51, 38, 41, 36, 45, 46, 41, 34, 35, 30, 44, 47, 39, 37, 38, 31, 45, 43, 37, 42, 41, 35, 48, 47, 39, 34, 35, 28, 40, 39, 32, 82, 81, 72, 68, 67, 58, 70, 69, 61, 90, 89, 80, 84, 84, 72, 86, 83, 75, 91, 90, 82, 88, 85, 77, 108, 107, 96, 104, 102, 91, 102, 99, 89, 115, 112, 100, 186, 181, 169, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 254, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 90, 84, 68, 87, 85, 72, 82, 80, 67, 78, 78, 65, 89, 87, 72, 80, 78, 63, 82, 80, 67, 67, 67, 51, 84, 83, 75, 76, 76, 60, 68, 68, 52, 16, 18, 6, 74, 76, 66, 35, 37, 23, 38, 42, 29, 36, 38, 26, 56, 55, 47, 54, 52, 41, 41, 41, 29, 55, 54, 46, 31, 30, 19, 19, 24, 11, 29, 31, 19, 30, 29, 18, 35, 37, 25, 34, 34, 22, 19, 21, 8, 38, 37, 26, 22, 26, 13, 30, 32, 20, 29, 31, 21, 54, 51, 43, 28, 35, 21, 57, 57, 46, 35, 31, 23, 33, 30, 22, 35, 31, 23, 31, 30, 21, 32, 29, 19, 38, 35, 27, 35, 29, 22, 21, 23, 13, 24, 26, 16, 35, 38, 28, 25, 24, 15, 18, 22, 10, 35, 32, 21, 29, 31, 17, 22, 30, 13, 35, 32, 19, 12, 14, 2, 36, 36, 25, 19, 21, 8, 39, 43, 31, 30, 34, 21, 29, 31, 17, 39, 43, 31, 42, 44, 32, 32, 31, 20, 23, 27, 14, 33, 35, 22, 37, 39, 27, 36, 40, 29, 33, 37, 29, 43, 51, 42, 33, 39, 30, 14, 32, 20, 20, 28, 18, 41, 47, 40, 40, 43, 38, 42, 43, 36, 42, 45, 39, 41, 42, 37, 38, 41, 34, 44, 45, 42, 54, 52, 48, 44, 45, 40, 56, 57, 52, 47, 45, 41, 55, 54, 48, 69, 70, 63, 80, 79, 70, 66, 65, 56, 109, 108, 99, 73, 72, 63, 84, 83, 75, 103, 100, 92, 95, 94, 83, 105, 105, 94, 96, 95, 84, 97, 95, 84, 152, 151, 140, 223, 220, 210, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 89, 84, 68, 76, 76, 62, 76, 76, 62, 78, 80, 66, 79, 76, 64, 77, 74, 59, 62, 62, 46, 77, 74, 61, 76, 76, 64, 74, 72, 57, 80, 80, 64, 9, 12, 0, 59, 68, 54, 46, 46, 32, 54, 41, 34, 19, 21, 8, 40, 42, 27, 48, 48, 36, 33, 35, 22, 28, 31, 21, 17, 21, 11, 24, 28, 15, 28, 28, 17, 39, 38, 27, 38, 37, 26, 31, 28, 18, 27, 27, 15, 39, 36, 26, 42, 39, 28, 21, 23, 11, 24, 26, 14, 17, 19, 7, 25, 29, 17, 20, 22, 10, 30, 29, 20, 36, 36, 27, 32, 31, 22, 28, 27, 19, 19, 18, 9, 31, 30, 21, 24, 23, 14, 28, 30, 18, 23, 25, 15, 31, 30, 21, 26, 26, 14, 24, 28, 15, 12, 21, 6, 25, 30, 15, 25, 35, 18, 38, 41, 26, 37, 40, 25, 38, 37, 26, 30, 32, 20, 17, 27, 10, 34, 41, 25, 38, 41, 26, 20, 29, 12, 33, 40, 24, 31, 33, 21, 35, 39, 24, 30, 32, 20, 33, 35, 22, 32, 36, 24, 35, 36, 27, 50, 47, 39, 39, 36, 28, 46, 45, 38, 39, 38, 31, 50, 51, 44, 42, 45, 37, 53, 55, 48, 40, 41, 34, 56, 57, 50, 70, 69, 61, 67, 64, 58, 87, 84, 76, 83, 80, 72, 88, 85, 75, 100, 97, 89, 105, 104, 96, 103, 102, 93, 96, 93, 83, 106, 103, 92, 121, 118, 107, 138, 135, 125, 222, 219, 209, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, ]}
 
 output0 = {i85: [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 245, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ]}
 
 # Instantiate an example
 Example((input0, output0))
+"""
diff --git a/tests/nnapi/specs/V1_0/resize_bilinear.mod.py b/tests/nnapi/specs/V1_0/resize_bilinear.mod.py
index c596407ac..17fb34007 100644
--- a/tests/nnapi/specs/V1_0/resize_bilinear.mod.py
+++ b/tests/nnapi/specs/V1_0/resize_bilinear.mod.py
@@ -2,9 +2,9 @@
 model = Model()
 i1 = Input("op1", "TENSOR_FLOAT32", "{1, 2, 2, 1}")
 i2 = Output("op2", "TENSOR_FLOAT32", "{1, 3, 3, 1}")
-h = Int32Scalar("height", 3) # an int32_t scalar bias
 w = Int32Scalar("width", 3)
-model = model.Operation("RESIZE_BILINEAR", i1, h, w).To(i2)
+h = Int32Scalar("height", 3)
+model = model.Operation("RESIZE_BILINEAR", i1, w, h).To(i2)
 
 # Example 1. Input in operand 0,
 input0 = {i1: # input 0
diff --git a/tests/nnapi/specs/V1_0/resize_bilinear_2.mod.py b/tests/nnapi/specs/V1_0/resize_bilinear_2.mod.py
index 06a33b865..4035b4371 100644
--- a/tests/nnapi/specs/V1_0/resize_bilinear_2.mod.py
+++ b/tests/nnapi/specs/V1_0/resize_bilinear_2.mod.py
@@ -18,9 +18,9 @@
 model = Model()
 i1 = Input("op1", "TENSOR_FLOAT32", "{1, 2, 2, 2}")
 i2 = Output("op2", "TENSOR_FLOAT32", "{1, 3, 3, 2}")
-h = Int32Scalar("height", 3) # an int32_t scalar bias
 w = Int32Scalar("width", 3)
-model = model.Operation("RESIZE_BILINEAR", i1, h, w).To(i2)
+h = Int32Scalar("height", 3)
+model = model.Operation("RESIZE_BILINEAR", i1, w, h).To(i2)
 
 # Example 1. Input in operand 0,
 input0 = {i1: # input 0
diff --git a/tests/nnapi/specs/V1_0/svdf_bias_present.mod.py b/tests/nnapi/specs/V1_0/svdf_bias_present.mod.py
new file mode 100644
index 000000000..ae7d1e7b8
--- /dev/null
+++ b/tests/nnapi/specs/V1_0/svdf_bias_present.mod.py
@@ -0,0 +1,138 @@
+#
+# Copyright (C) 2019 The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+batches = 2
+features = 4
+rank = 1
+units = int(features / rank)
+input_size = 3
+memory_size = 10
+
+model = Model()
+
+input = Input("input", "TENSOR_FLOAT32", "{%d, %d}" % (batches, input_size))
+weights_feature = Input("weights_feature", "TENSOR_FLOAT32", "{%d, %d}" % (features, input_size))
+weights_time = Input("weights_time", "TENSOR_FLOAT32", "{%d, %d}" % (features, memory_size))
+bias = Input("bias", "TENSOR_FLOAT32", "{%d}" % (units))
+state_in = Input("state_in", "TENSOR_FLOAT32", "{%d, %d}" % (batches, memory_size*features))
+rank_param = Int32Scalar("rank_param", rank)
+activation_param = Int32Scalar("activation_param", 0)
+state_out = IgnoredOutput("state_out", "TENSOR_FLOAT32", "{%d, %d}" % (batches, memory_size*features))
+output = Output("output", "TENSOR_FLOAT32", "{%d, %d}" % (batches, units))
+
+model = model.Operation("SVDF", input, weights_feature, weights_time, bias, state_in,
+                        rank_param, activation_param).To([state_out, output])
+
+input0 = {
+    input: [],
+    weights_feature: [
+        -0.31930989, -0.36118156, 0.0079667, 0.37613347,
+      0.22197971, 0.12416199, 0.27901134, 0.27557442,
+      0.3905206, -0.36137494, -0.06634006, -0.10640851
+    ],
+    weights_time: [
+        -0.31930989, 0.37613347,  0.27901134,  -0.36137494, -0.36118156,
+      0.22197971,  0.27557442,  -0.06634006, 0.0079667,   0.12416199,
+
+       0.3905206,   -0.10640851, -0.0976817,  0.15294972,  0.39635518,
+      -0.02702999, 0.39296314,  0.15785322,  0.21931258,  0.31053296,
+
+       -0.36916667, 0.38031587,  -0.21580373, 0.27072677,  0.23622236,
+      0.34936687,  0.18174365,  0.35907319,  -0.17493086, 0.324846,
+
+       -0.10781813, 0.27201805,  0.14324132,  -0.23681851, -0.27115166,
+      -0.01580888, -0.14943552, 0.15465137,  0.09784451,  -0.0337657
+    ],
+    bias: [1.0, 2.0, 3.0, 4.0],
+    state_in: [0 for _ in range(batches * memory_size * features)],
+}
+
+test_inputs = [
+    0.12609188,  -0.46347019, -0.89598465,
+    0.12609188,  -0.46347019, -0.89598465,
+
+    0.14278367,  -1.64410412, -0.75222826,
+    0.14278367,  -1.64410412, -0.75222826,
+
+    0.49837467,  0.19278903,  0.26584083,
+    0.49837467,  0.19278903,  0.26584083,
+
+    -0.11186574, 0.13164264,  -0.05349274,
+    -0.11186574, 0.13164264,  -0.05349274,
+
+    -0.68892461, 0.37783599,  0.18263303,
+    -0.68892461, 0.37783599,  0.18263303,
+
+    -0.81299269, -0.86831826, 1.43940818,
+    -0.81299269, -0.86831826, 1.43940818,
+
+    -1.45006323, -0.82251364, -1.69082689,
+    -1.45006323, -0.82251364, -1.69082689,
+
+    0.03966608,  -0.24936394, -0.77526885,
+    0.03966608,  -0.24936394, -0.77526885,
+
+    0.11771342,  -0.23761693, -0.65898693,
+    0.11771342,  -0.23761693, -0.65898693,
+
+    -0.89477462, 1.67204106,  -0.53235275,
+    -0.89477462, 1.67204106,  -0.53235275
+]
+
+golden_outputs = [
+    1.014899,    1.9482339,  2.856275,  3.99728117,
+    1.014899,    1.9482339,  2.856275,  3.99728117,
+
+    1.068281,    1.837783,   2.847732,  4.00323521,
+    1.068281,    1.837783,   2.847732,  4.00323521,
+
+    0.9682179,   1.9666911,  3.0609602, 4.0333759,
+    0.9682179,   1.9666911,  3.0609602, 4.0333759,
+
+    0.99376901,  1.922299,   2.608807,  3.9863309,
+    0.99376901,  1.922299,   2.608807,  3.9863309,
+
+    1.201551,    1.835393,   2.820538,  3.9407261,
+    1.201551,    1.835393,   2.820538,  3.9407261,
+
+    1.0886511,   1.9124599,  2.730717,  4.0281379,
+    1.0886511,   1.9124599,  2.730717,  4.0281379,
+
+    0.798826,    1.413855,   2.371376,  3.9669588,
+    0.798826,    1.413855,   2.371376,  3.9669588,
+
+    0.9160904,   1.700671,   3.108746,  4.109808,
+    0.9160904,   1.700671,   3.108746,  4.109808,
+
+    1.419114,    1.762176,   2.577373,  4.175115,
+    1.419114,    1.762176,   2.577373,  4.175115,
+
+    1.36726,     1.477697,   2.543498,  3.824525,
+    1.36726,     1.477697,   2.543498,  3.824525
+]
+
+output0 = {state_out: [0 for _ in range(batches * memory_size * features)],
+           output: []}
+
+# TODO: enable more data points after fixing the reference issue
+for i in range(1):
+  batch_start = i * input_size * batches
+  batch_end = batch_start + input_size * batches
+  input0[input] = test_inputs[batch_start:batch_end]
+  golden_start = i * units * batches
+  golden_end = golden_start + units * batches
+  output0[output] = golden_outputs[golden_start:golden_end]
+  Example((input0, output0))
diff --git a/tests/nnapi/specs/generate_test.sh b/tests/nnapi/specs/generate_test.sh
index 2d7e5ccf9..2f1afbc66 100755
--- a/tests/nnapi/specs/generate_test.sh
+++ b/tests/nnapi/specs/generate_test.sh
@@ -47,7 +47,7 @@ function generate_one_testcase {
   BASENAME=${BASENAME%".mod.py"};
   local EXAMPLE="-e $NNAPI_BASE/$TEST_DIR/src/generated/examples/$BASENAME.example.cpp"
 
-  $NNAPI_BASE/externals/nnapi_test_generator/test_generator.py ./`basename $1`\
+  $NNAPI_BASE/$TEST_DIR/nnapi_test_generator/android-p/test_generator.py ./`basename $1`\
     -m $NNAPI_BASE/$TEST_DIR/src/generated/models/$BASENAME.model.cpp $EXAMPLE
   ret=$?
   # Paste these lines into TestGenerated.cpp
diff --git a/tests/nnapi/src/TestValidation.cpp b/tests/nnapi/src/TestValidation.cpp
index 2d605bb7e..19db43800 100644
--- a/tests/nnapi/src/TestValidation.cpp
+++ b/tests/nnapi/src/TestValidation.cpp
@@ -23,6 +23,9 @@
 #include <sys/mman.h>
 #include <stdio.h>
 #include <stdlib.h>
+// Note: neurun is allow to set activation operand constant only,
+//       so we change test to set operand #2 to constant. (ANEURALNETWORKS_FUSED_NONE)
+//       And model's input is changed: [0, 1, 2] -> [0, 1]
 // This file tests all the validations done by the Neural Networks API.
 namespace {
 
@@ -84,6 +87,9 @@ class ValidationTestIdentify : public ValidationTestModel {
         ASSERT_EQ(ANeuralNetworksModel_addOperand(mModel, &tensorType), ANEURALNETWORKS_NO_ERROR);
         ASSERT_EQ(ANeuralNetworksModel_addOperand(mModel, &scalarType), ANEURALNETWORKS_NO_ERROR);
         ASSERT_EQ(ANeuralNetworksModel_addOperand(mModel, &tensorType), ANEURALNETWORKS_NO_ERROR);
+        // neurun is allow to set activation operand constant only
+        int32_t act = ANEURALNETWORKS_FUSED_NONE;
+        ASSERT_EQ(ANeuralNetworksModel_setOperandValue(mModel, 2, &act, sizeof(act)), ANEURALNETWORKS_NO_ERROR);
         uint32_t inList[3]{0, 1, 2};
         uint32_t outList[1]{3};
         ASSERT_EQ(ANeuralNetworksModel_addOperation(mModel, ANEURALNETWORKS_ADD, 3, inList, 1,
@@ -112,12 +118,15 @@ protected:
         ASSERT_EQ(ANeuralNetworksModel_addOperand(mModel, &tensorType), ANEURALNETWORKS_NO_ERROR);
         ASSERT_EQ(ANeuralNetworksModel_addOperand(mModel, &scalarType), ANEURALNETWORKS_NO_ERROR);
         ASSERT_EQ(ANeuralNetworksModel_addOperand(mModel, &tensorType), ANEURALNETWORKS_NO_ERROR);
+        // neurun is allow to set activation operand constant only
+        int32_t act = ANEURALNETWORKS_FUSED_NONE;
+        ASSERT_EQ(ANeuralNetworksModel_setOperandValue(mModel, 2, &act, sizeof(act)), ANEURALNETWORKS_NO_ERROR);
         uint32_t inList[3]{0, 1, 2};
         uint32_t outList[1]{3};
         ASSERT_EQ(ANeuralNetworksModel_addOperation(mModel, ANEURALNETWORKS_ADD, 3, inList, 1,
                                                     outList),
                   ANEURALNETWORKS_NO_ERROR);
-        ASSERT_EQ(ANeuralNetworksModel_identifyInputsAndOutputs(mModel, 3, inList, 1, outList),
+        ASSERT_EQ(ANeuralNetworksModel_identifyInputsAndOutputs(mModel, 2, inList, 1, outList),
                   ANEURALNETWORKS_NO_ERROR);
         ASSERT_EQ(ANeuralNetworksModel_finish(mModel), ANEURALNETWORKS_NO_ERROR);
 
@@ -390,44 +399,44 @@ TEST_F(ValidationTestModel, CreateCompilation) {
 }
 
 TEST_F(ValidationTestIdentify, Ok) {
-    uint32_t inList[3]{0, 1, 2};
+    uint32_t inList[2]{0, 1};
     uint32_t outList[1]{3};
 
-    ASSERT_EQ(ANeuralNetworksModel_identifyInputsAndOutputs(mModel, 3, inList, 1, outList),
+    ASSERT_EQ(ANeuralNetworksModel_identifyInputsAndOutputs(mModel, 2, inList, 1, outList),
               ANEURALNETWORKS_NO_ERROR);
 
     ASSERT_EQ(ANeuralNetworksModel_finish(mModel), ANEURALNETWORKS_NO_ERROR);
 }
 
 TEST_F(ValidationTestIdentify, InputIsOutput) {
-    uint32_t inList[3]{0, 1, 2};
+    uint32_t inList[2]{0, 1};
     uint32_t outList[2]{3, 0};
 
-    ASSERT_EQ(ANeuralNetworksModel_identifyInputsAndOutputs(mModel, 3, inList, 2, outList),
+    ASSERT_EQ(ANeuralNetworksModel_identifyInputsAndOutputs(mModel, 2, inList, 2, outList),
               ANEURALNETWORKS_BAD_DATA);
 }
 
 TEST_F(ValidationTestIdentify, OutputIsInput) {
-    uint32_t inList[4]{0, 1, 2, 3};
+    uint32_t inList[3]{0, 1, 3};
     uint32_t outList[1]{3};
 
-    ASSERT_EQ(ANeuralNetworksModel_identifyInputsAndOutputs(mModel, 4, inList, 1, outList),
+    ASSERT_EQ(ANeuralNetworksModel_identifyInputsAndOutputs(mModel, 3, inList, 1, outList),
               ANEURALNETWORKS_BAD_DATA);
 }
 
 TEST_F(ValidationTestIdentify, DuplicateInputs) {
-    uint32_t inList[4]{0, 1, 2, 0};
+    uint32_t inList[3]{0, 1, 0};
     uint32_t outList[1]{3};
 
-    ASSERT_EQ(ANeuralNetworksModel_identifyInputsAndOutputs(mModel, 4, inList, 1, outList),
+    ASSERT_EQ(ANeuralNetworksModel_identifyInputsAndOutputs(mModel, 3, inList, 1, outList),
               ANEURALNETWORKS_BAD_DATA);
 }
 
 TEST_F(ValidationTestIdentify, DuplicateOutputs) {
-    uint32_t inList[3]{0, 1, 2};
+    uint32_t inList[2]{0, 1};
     uint32_t outList[2]{3, 3};
 
-    ASSERT_EQ(ANeuralNetworksModel_identifyInputsAndOutputs(mModel, 3, inList, 2, outList),
+    ASSERT_EQ(ANeuralNetworksModel_identifyInputsAndOutputs(mModel, 2, inList, 2, outList),
               ANEURALNETWORKS_BAD_DATA);
 }
 
diff --git a/tests/scripts/common.sh b/tests/scripts/common.sh
index 12a35fd35..1e7ab39c7 100755
--- a/tests/scripts/common.sh
+++ b/tests/scripts/common.sh
@@ -32,3 +32,31 @@ function switch_nnfw_kernel_env()
         fi
     done
 }
+
+function get_result_of_benchmark_test()
+{
+    local RUN_TEST_SH=$1
+    local DRIVER_BIN=$2
+    local MODEL=$3
+    local LOG_FILE=$4
+
+    local RET=0
+    $RUN_TEST_SH --driverbin=$DRIVER_BIN $MODEL > $LOG_FILE 2>&1
+    RET=$?
+    if [[ $RET -ne 0 ]]; then
+        echo "Testing $MODEL aborted... exit code: $RET"
+        exit $RET
+    fi
+
+    local RESULT=`grep -E '^Mean:' $LOG_FILE | sed -e 's/ms//g' | awk '{print $2}'`
+    echo "$RESULT"
+}
+
+function print_result_of_benchmark_test()
+{
+    local NAME=$1
+    local RESULT=$2
+    local RESULT_FILE=$3
+
+    echo "$NAME $RESULT" > $RESULT_FILE
+}
diff --git a/tests/scripts/neurun_frameworktest_list.armv7l.acl_neon.txt b/tests/scripts/neurun_frameworktest_list.armv7l.acl_neon.txt
new file mode 100644
index 000000000..0de5dd10e
--- /dev/null
+++ b/tests/scripts/neurun_frameworktest_list.armv7l.acl_neon.txt
@@ -0,0 +1,31 @@
+add
+average_pool_2d
+concat
+conv_2d
+depthwise_conv_2d
+div
+floor
+fullyconnected/fc1
+l2_normalization
+l2_pool_2d
+logistic
+max_pool_2d
+mean
+mul
+pad
+reduce_mean
+relu
+relu6
+reshape
+resize_bilinear
+rsqrt
+softmax
+squeeze
+sqrt
+strided_slice
+sub
+tanh
+transpose
+transpose_conv
+MODELS/inception_module
+MODELS/mobilenet
diff --git a/tests/scripts/neurun_frameworktest_list.armv7l.cpu.txt b/tests/scripts/neurun_frameworktest_list.armv7l.cpu.txt
new file mode 100644
index 000000000..51125da2e
--- /dev/null
+++ b/tests/scripts/neurun_frameworktest_list.armv7l.cpu.txt
@@ -0,0 +1,11 @@
+average_pool_2d
+concat
+conv_2d
+depthwise_conv_2d
+fullyconnected/fc1
+max_pool_2d
+softmax
+reshape/reshape1
+add
+MODELS/inception_module
+MODELS/mobilenet
diff --git a/tests/scripts/neurun_frameworktest_list.txt b/tests/scripts/neurun_frameworktest_list.txt
deleted file mode 100644
index 9c4e97dac..000000000
--- a/tests/scripts/neurun_frameworktest_list.txt
+++ /dev/null
@@ -1,9 +0,0 @@
-average_pool_2d
-concat/concat1
-concat/concat2
-conv_2d
-fullyconnected/fc1
-max_pool_2d
-softmax
-reshape/reshape1
-MODELS/inception_module
diff --git a/tests/scripts/neurun_frameworktest_list.x86-64.cpu.txt b/tests/scripts/neurun_frameworktest_list.x86-64.cpu.txt
new file mode 100644
index 000000000..a5ec1eb5b
--- /dev/null
+++ b/tests/scripts/neurun_frameworktest_list.x86-64.cpu.txt
@@ -0,0 +1,10 @@
+average_pool_2d
+concat
+conv_2d
+depthwise_conv_2d
+fullyconnected/fc1
+max_pool_2d
+softmax
+reshape/reshape1
+add
+MODELS/inception_module
diff --git a/tests/scripts/pacl_frameworktest_list.armv7l-linux.txt b/tests/scripts/pacl_frameworktest_list.armv7l-linux.txt
new file mode 100644
index 000000000..ec52c3669
--- /dev/null
+++ b/tests/scripts/pacl_frameworktest_list.armv7l-linux.txt
@@ -0,0 +1,36 @@
+add
+average_pool_2d
+cast
+concat/concat1
+concat/concat2
+conv2d
+depthwise_conv_2d
+div
+embedding_lookup
+exp
+floor
+fullyconnected/fc1
+gather
+hashtable_lookup
+l2_normalization
+l2_pool_2d
+logistic
+max_pool_2d
+mean
+MODELS/inception_module
+MODELS/mobilenet
+mul
+neg
+pad/4D_2D
+relu
+reul6
+reshape
+resize_bilinear
+softmax
+space_to_depth
+squeeze
+strided_slice
+sub
+tanh
+topk_v2
+transpose
diff --git a/tests/scripts/py/test_driver.py b/tests/scripts/py/test_driver.py
index f9c48e11f..39e5315f6 100755
--- a/tests/scripts/py/test_driver.py
+++ b/tests/scripts/py/test_driver.py
@@ -69,6 +69,7 @@ def get_parsed_options():
         dest="benchmark_on",
         default=False,
         help="(default=off) run benchmark")
+    # TODO Remove deprecated --benchmark_acl option
     parser.add_argument(
         "--benchmark_acl",
         action="store_true",
@@ -270,14 +271,6 @@ def run_benchmarkop(options):
     os.system(cmd)
 
 
-def run_benchmarkacl(options):
-    cmd = "{artifactpath}/tests/scripts/run_benchmark_acl.sh \
-            --reportdir={reportdir}/benchmark \
-            --bindir={artifactpath}/Product/out/bin".format(
-        reportdir=options.reportdir, artifactpath=options.artifactpath)
-    os.system(cmd)
-
-
 def make_json_for_benchmark_result(options):
     cmd = "source {artifactpath}/tests/scripts/print_to_json.sh && ".format(
         artifactpath=options.artifactpath)
@@ -377,10 +370,6 @@ def main():
     if options.benchmark_on:
         run_benchmark(options)
 
-    # benchmark_acl
-    if options.benchmarkacl_on:
-        run_benchmarkacl(options)
-
     # benchmark_op
     if options.benchmarkop_on:
         run_benchmarkop(options)
diff --git a/tests/scripts/run_benchmark.sh b/tests/scripts/run_benchmark.sh
index 6980475b6..e22b40043 100755
--- a/tests/scripts/run_benchmark.sh
+++ b/tests/scripts/run_benchmark.sh
@@ -51,34 +51,6 @@ do
     shift
 done
 
-function get_result_of_benchmark_test()
-{
-    local RUN_TEST_SH=$1
-    local DRIVER_BIN=$2
-    local MODEL=$3
-    local LOG_FILE=$4
-
-    local RET=0
-    $RUN_TEST_SH --driverbin=$DRIVER_BIN $MODEL > $LOG_FILE 2>&1
-    RET=$?
-    if [[ $RET -ne 0 ]]; then
-        echo "Testing $MODEL aborted... exit code: $RET"
-        exit $RET
-    fi
-
-    local RESULT=`grep -E '^Mean:' $LOG_FILE | sed -e 's/ms//g' | awk '{print $2}'`
-    echo "$RESULT"
-}
-
-function print_result_of_benchmark_test()
-{
-    local NAME=$1
-    local RESULT=$2
-    local RESULT_FILE=$3
-
-    echo "$NAME $RESULT" > $RESULT_FILE
-}
-
 function run_benchmark_test()
 {
     local DRIVER_BIN=$BENCHMARK_DRIVER_BIN
diff --git a/tests/scripts/run_benchmark_acl.sh b/tests/scripts/run_benchmark_acl.sh
deleted file mode 100755
index c6a643baa..000000000
--- a/tests/scripts/run_benchmark_acl.sh
+++ /dev/null
@@ -1,113 +0,0 @@
-#!/bin/bash
-#
-# Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#    http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-MY_PATH="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )"
-
-source $MY_PATH/common.sh
-
-BENCHMARKACL_BIN_DIR=
-BENCHMARKACL_REPORT_DIR=
-BENCHMARKACL_MODELS_FILE=
-BENCHMARKACL_MODEL_LIST="inceptionv3/inception_nonslim inceptionv3/inception_slim"
-
-function Usage()
-{
-    # TODO: Fill this
-    echo "Usage: LD_LIBRARY_PATH=Product/out/lib ./$0 --reportdir=report"
-}
-
-for i in "$@"
-do
-    case $i in
-        -h|--help|help)
-            Usage
-            exit 1
-            ;;
-        --reportdir=*)
-            BENCHMARKACL_REPORT_DIR=${i#*=}
-            BENCHMARKACL_MODELS_FILE=$BENCHMARKACL_REPORT_DIR/benchmarkacl_models.txt
-            ;;
-        --bindir=*)
-            BENCHMARKACL_BIN_DIR=${i#*=}
-            ;;
-    esac
-    shift
-done
-
-function run_benchmark_acl()
-{
-    local REPORT_DIR=$BENCHMARKACL_REPORT_DIR
-    local DRIVER_DIR=$BENCHMARKACL_BIN_DIR
-    local LOG_FILE=""
-    local RESULT_FILE=""
-    local RESULT=""
-    local RET=0
-
-    export COUNT=5
-    echo "============================================"
-    local i=0
-    for BENCHMARK_ACL_BIN in $(ls $DRIVER_DIR/benchmark_*); do
-        local BENCHMARK_ACL_BIN_BASENAME=$(basename $BENCHMARK_ACL_BIN)
-        mkdir -p $REPORT_DIR/$BENCHMARK_ACL_BIN_BASENAME
-        echo "Benchmark/acl test by $BENCHMARK_ACL_BIN_BASENAME"
-        echo $BENCHMARK_ACL_BIN_BASENAME >> $BENCHMARKACL_MODELS_FILE
-
-        # ACL(NEON)
-        LOG_FILE=$REPORT_DIR/$BENCHMARK_ACL_BIN_BASENAME/acl_neon.txt
-        RESULT_FILE=$REPORT_DIR/$BENCHMARK_ACL_BIN_BASENAME/acl_neon.result
-        echo -n "ACL(NEON)...... "
-        $BENCHMARK_ACL_BIN 0 > $LOG_FILE 2>&1
-        RET=$?
-        if [[ $RET -ne 0 ]]; then
-            echo "aborted... exit code: $RET"
-            exit $RET
-        fi
-        RESULT=`grep -E '^Mean:' $LOG_FILE | sed -e 's/ms//g' | awk '{print $2}'`
-        echo "$RESULT ms"
-        echo "ACL(NEON)" $RESULT > $RESULT_FILE
-
-        # ACL(OpenCL)
-        LOG_FILE=$REPORT_DIR/$BENCHMARK_ACL_BIN_BASENAME/acl_opencl.txt
-        RESULT_FILE=$REPORT_DIR/$BENCHMARK_ACL_BIN_BASENAME/acl_opencl.result
-        echo -n "ACL(OpenCL).... "
-        $BENCHMARK_ACL_BIN 1 > $LOG_FILE 2>&1
-        RET=$?
-        if [[ $RET -ne 0 ]]; then
-            echo "aborted... exit code: $RET"
-            exit $RET
-        fi
-        RESULT=`grep -E '^Mean:' $LOG_FILE | sed -e 's/ms//g' | awk '{print $2}'`
-        echo "$RESULT ms"
-        echo "ACL(OpenCL)" $RESULT > $RESULT_FILE
-
-        if [[ $i -ne $(ls $DRIVER_DIR/benchmark_* | wc -w)-1 ]]; then
-            echo ""
-        fi
-        i=$((i+1))
-    done
-    echo "============================================"
-    unset COUNT
-}
-
-if [ ! -e "$BENCHMARKACL_REPORT_DIR" ]; then
-    mkdir -p $BENCHMARKACL_REPORT_DIR
-fi
-
-rm -rf $BENCHMARKACL_MODELS_FILE
-
-echo ""
-run_benchmark_acl
-echo ""
diff --git a/tests/scripts/run_benchmark_op.sh b/tests/scripts/run_benchmark_op.sh
index 6576d1287..a9c7432c1 100755
--- a/tests/scripts/run_benchmark_op.sh
+++ b/tests/scripts/run_benchmark_op.sh
@@ -129,6 +129,11 @@ function run_benchmark_test()
         STATUS="enabled"
         source $MODEL_TEST_ROOT_PATH/$MODEL/config.sh
 
+        # Skip 'disabled' tests
+        if [ $(tr '[:upper:]' '[:lower:]' <<< "$STATUS") == "disabled" ]; then
+            continue
+        fi
+
         echo "Benchmark test with `basename $DRIVER_BIN` & `echo $MODEL`"
         echo $MODEL >> $BENCHMARK_MODELS_FILE
 
diff --git a/tests/scripts/run_benchmark_tflite_model.in b/tests/scripts/run_benchmark_tflite_model.in
index 1003ecc13..4a0398685 100644
--- a/tests/scripts/run_benchmark_tflite_model.in
+++ b/tests/scripts/run_benchmark_tflite_model.in
@@ -1 +1,2 @@
 MODELS/inception_nonslim	--input_layer=Mul --input_layer_shape=1,299,299,3 --num_threads=1 --num_runs=1
+MODELS/mobilenet	--input_layer=input --input_layer_shape=1,128,128,3 --num_threads=1 --num_runs=1
diff --git a/tests/scripts/run_benchmark_tflite_model.sh b/tests/scripts/run_benchmark_tflite_model.sh
index 50a2a5fb3..3bc185191 100755
--- a/tests/scripts/run_benchmark_tflite_model.sh
+++ b/tests/scripts/run_benchmark_tflite_model.sh
@@ -18,7 +18,7 @@ SCRIPT_DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )"
 NNFW_DIR="$(dirname "$(dirname "${SCRIPT_DIR}")")"
 REPORT_DIR="$NNFW_DIR/report/tflite_benchmark_model"
 MODEL_ROOT="$NNFW_DIR/tests/framework/tests"
-LD_LIBRARY_PATH="$NNFW_DIR/Product/out/lib"
+LD_LIBRARY_PATH="$NNFW_DIR/Product/out/lib/pureacl:$NNFW_DIR/Product/out/lib"
 
 RUN_TEST=$NNFW_DIR/tests/framework/run_test.sh
 MODEL_IN=${BASH_SOURCE[0]%.sh}.in
diff --git a/tests/scripts/run_frameworktest.sh b/tests/scripts/run_frameworktest.sh
index 343fd0292..bf36d0c4f 100755
--- a/tests/scripts/run_frameworktest.sh
+++ b/tests/scripts/run_frameworktest.sh
@@ -23,8 +23,17 @@ FWTEST_TEST_NAME=
 
 function Usage()
 {
-    # TODO: Fill this
-    echo "Usage: LD_LIBRARY_PATH=Product/out/lib ./$0 --reportdir=report"
+    echo "Usage Example:"
+    echo "LD_LIBRARY_PATH=Product/out/lib ./$0 \\"
+    echo "  --runtestsh=tests/framework/run_test.sh \\ # Test runner script path"
+    echo "  --driverbin=Product/out/bin/tflite_run \\  # Test driver path"
+    echo "  --frameworktest_list_file=tests/scripts/neurun_frameworktest_list.armv7l.cpu.txt \\"
+    echo "  --reportdir=report \\            # Directory for the report files will be saved"
+    echo "  --tapname=framework_test.tap \\  # Tap file name"
+    echo "  --logname=framework_test.log \\  # Log file name"
+    echo "  --testname=Frameworktest         # Name of the test just a label of tests"
+
+    exit 1
 }
 
 for i in "$@"
@@ -32,7 +41,6 @@ do
     case $i in
         -h|--help|help)
             Usage
-            exit 1
             ;;
         --runtestsh=*)
             FWTEST_RUN_TEST_SH=${i#*=}
@@ -59,7 +67,12 @@ do
     shift
 done
 
-# TODO: handle exceptions for params
+[ ! -z "$FWTEST_RUN_TEST_SH" ] || Usage
+[ ! -z "$FWTEST_DRIVER_BIN" ] || Usage
+[ ! -z "$FWTEST_REPORT_DIR" ] || Usage
+[ ! -z "$FWTEST_TAP_NAME" ] || Usage
+[ ! -z "$FWTEST_LOG_NAME" ] || Usage
+[ ! -z "$FWTEST_TEST_NAME" ] || Usage
 
 if [ ! -e "$FWTEST_REPORT_DIR" ]; then
     mkdir -p $FWTEST_REPORT_DIR
diff --git a/tests/scripts/run_unittest.sh b/tests/scripts/run_unittest.sh
index 5eddfb32c..54a01913b 100755
--- a/tests/scripts/run_unittest.sh
+++ b/tests/scripts/run_unittest.sh
@@ -22,7 +22,7 @@ UNITTEST_RUN_ALL=""
 function Usage()
 {
     # TODO: Fill this
-    echo "Usage: LD_LIBRARY_PATH=Product/out/lib ./$0 --reportdir=report --unittestdir=Product/out/bin"
+    echo "Usage: LD_LIBRARY_PATH=Product/out/lib ./$0 --reportdir=report --unittestdir=Product/out/unittest"
 }
 
 get_gtest_option()
diff --git a/tests/scripts/test_driver.sh b/tests/scripts/test_driver.sh
index 97a3dab27..a5dbf4aaf 100755
--- a/tests/scripts/test_driver.sh
+++ b/tests/scripts/test_driver.sh
@@ -74,7 +74,6 @@ VERIFICATION_ON="false"
 BENCHMARK_ON="false"
 BENCHMARK_OP_ON="false"
 BENCHMARK_TFLITE_MODEL_ON="false"
-BENCHMARK_ACL_ON="false"
 ACL_ENV_ON="false"
 PROFILE_ON="false"
 REPORT_DIR=""
@@ -149,9 +148,9 @@ do
             ALLTEST_ON="false"
             BENCHMARK_TFLITE_MODEL_ON="true"
             ;;
+        # TODO Remove --benchmark_acl option after CI update
         --benchmark_acl)
             ALLTEST_ON="false"
-            BENCHMARK_ACL_ON="true"
             ;;
         --acl_envon)
             ACL_ENV_ON="true"
@@ -208,7 +207,7 @@ if [ "$ACL_ENV_ON" == "true" ]; then
     switch_nnfw_kernel_env "ON" "acl"
 fi
 
-# Run unittest in each part such as Runtime, ACL
+# Run unittest in each part such as Runtime
 if [ "$ALLTEST_ON" == "true" ] || [ "$UNITTEST_ON" == "true" ]; then
     if [ "$UNITTESTALL_ON" == "true" ]; then
         $TEST_DRIVER_DIR/run_unittest.sh \
@@ -285,15 +284,8 @@ if [ "$BENCHMARK_OP_ON" == "true" ]; then
         --modelfilepath=$ARTIFACT_PATH/tests/framework
 fi
 
-# Run benchmark/acl/benchmark_googlenet, mobilenet and inception_v3
-if [ "$BENCHMARK_ACL_ON" == "true" ]; then
-    $TEST_DRIVER_DIR/run_benchmark_acl.sh \
-        --reportdir=$REPORT_DIR/benchmark \
-        --bindir=$ARTIFACT_PATH/Product/out/bin
-fi
-
 # Make json file. Actually, this process is only needed on CI. That's why it is in test_driver.sh.
-if [ "$BENCHMARK_ON" == "true" ] || [ "$BENCHMARK_ACL_ON" == "true" ] || [ "$BENCHMARK_OP_ON" == "true" ]; then
+if [ "$BENCHMARK_ON" == "true" ] || [ "$BENCHMARK_OP_ON" == "true" ]; then
     # functions to fill json with benchmark results
     source $ARTIFACT_PATH/tests/scripts/print_to_json.sh
     if [ "$BENCHMARK_OP_ON" == "true" ]; then
diff --git a/tests/scripts/test_performance.sh b/tests/scripts/test_performance.sh
new file mode 100644
index 000000000..29f90b9b8
--- /dev/null
+++ b/tests/scripts/test_performance.sh
@@ -0,0 +1,182 @@
+#!/bin/bash
+
+MY_PATH="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )"
+source $MY_PATH/common.sh
+
+PRINT_WIDTH=45
+BACKEND_CNT=3
+# Run profiler BACKEND_CNT+1 times: on each run of the first BACKEND_CNT runs it will
+#     collect metrics for one unmeasured backend. On the last run metrics for data transfer
+PROFILING_RUN_CNT=$((BACKEND_CNT+1))
+TEST_DRIVER_DIR="$( cd "$( dirname "${BASH_SOURCE}" )" && pwd )"
+ARTIFACT_PATH="$TEST_DRIVER_DIR/../.."
+BENCHMARK_DRIVER_BIN=$ARTIFACT_PATH/Product/out/bin/tflite_benchmark
+REPORT_DIR=$ARTIFACT_PATH/report
+RUN_TEST_SH=$ARTIFACT_PATH/tests/framework/run_test.sh
+BENCHMARK_MODEL_LIST="MODELS/inception_nonslim MODELS/inception_slim MODELS/mobilenet"
+
+if [ ! -e "$RUN_TEST_SH" ]; then
+    echo "Cannot find $RUN_TEST_SH"
+    exit 1
+fi
+
+
+BENCHMARK_REPORT_DIR=$REPORT_DIR/benchmark
+BENCHMARK_MODELS_FILE=$BENCHMARK_REPORT_DIR/benchmark_models.txt
+
+function print_with_dots()
+{
+    local MSG=$1
+    pad=$(printf '%0.1s' "."{1..45})
+    padlength=$((PRINT_WIDTH- ${#MSG}))
+    printf '%s' "$MSG"
+    printf '%*.*s ' 0 $padlength "$pad"
+}
+
+function run_without_sched()
+{
+    local RESULT_SCH_INT=$1
+    local REPORT_MODEL_DIR=$2
+    local MODEL=$3
+    local EXECUTOR=$4
+    local BACKEND=$5
+
+    LOG_FILE=$REPORT_MODEL_DIR/tflite_${EXECUTOR,,}_$BACKEND.txt
+    export OP_BACKEND_ALLOPS=$BACKEND
+    export EXECUTOR=$EXECUTOR
+
+    print_with_dots "$EXECUTOR $BACKEND without scheduler"
+
+    RESULT=$(get_result_of_benchmark_test $RUN_TEST_SH $BENCHMARK_DRIVER_BIN $MODEL $LOG_FILE)
+
+    printf -v RESULT_INT '%d' $RESULT 2>/dev/null
+    PERCENTAGE=$((100-RESULT_SCH_INT*100/RESULT_INT))
+    echo "$RESULT ms. Parallel scheduler is $PERCENTAGE% faster"
+}
+
+function run_benchmark_test()
+{
+    local LOG_FILE=
+    local RESULT=
+    local REPORT_MODEL_DIR=
+
+    export COUNT=5
+    echo "============================================"
+    local i=0
+    export USE_NNAPI=1
+    export BACKENDS="acl_cl;acl_neon;cpu"
+    # Remove metrics so that profiler can get metrics for operations
+    #      with input&output sizes the same as the model
+    rm "exec_time.json" 2>/dev/null
+    for MODEL in $BENCHMARK_MODEL_LIST; do
+
+        echo "Benchmark test with `basename $BENCHMARK_DRIVER_BIN` & `echo $MODEL`"
+        echo $MODEL >> $BENCHMARK_MODELS_FILE
+
+        REPORT_MODEL_DIR=$BENCHMARK_REPORT_DIR/scheduler_benchmark/$MODEL
+        mkdir -p $REPORT_MODEL_DIR
+
+##################################################################################
+        # Get metrics by running profiler
+##################################################################################
+        export USE_SCHEDULER=1
+        export PROFILING_MODE=1
+        export EXECUTOR="Dataflow"
+        export NEURUN_LOG_ENABLE=1
+        for ((j = 1 ; j <= $PROFILING_RUN_CNT ; j++)); do
+            # Save the verbose log of each run
+            LOG_FILE=$REPORT_MODEL_DIR/tflite_profiling_$j.txt
+
+            print_with_dots "Profiling run #$j out of $PROFILING_RUN_CNT"
+
+            $RUN_TEST_SH --driverbin=$BENCHMARK_DRIVER_BIN $MODEL > $LOG_FILE 2>&1
+            RET=$?
+            if [[ $RET -ne 0 ]]; then
+                echo "Profiling $MODEL aborted in run#$j... exit code: $RET"xX
+                exit $RET
+            fi
+            echo "finished"
+            # Save the exec_time.json of each run
+            cp "exec_time.json" $REPORT_MODEL_DIR/"exec_time_$j.json"
+        done
+        unset NEURUN_LOG_ENABLE
+
+
+##################################################################################
+        # Turn off profiling
+##################################################################################
+        export PROFILING_MODE=0
+
+##################################################################################
+        # Run ParallelExecutor with scheduler
+##################################################################################
+        LOG_FILE=$REPORT_MODEL_DIR/tflite_parallel_with_scheduler.txt
+        export EXECUTOR="Parallel"
+        export GRAPH_DOT_DUMP=1
+        print_with_dots "Parallel with scheduler"
+
+        RESULT=$(get_result_of_benchmark_test $RUN_TEST_SH $BENCHMARK_DRIVER_BIN $MODEL $LOG_FILE)
+        echo "$RESULT ms"
+
+        printf -v RESULT_SCH_INT '%d' $RESULT 2>/dev/null
+
+        mv "after_lower.dot" $REPORT_MODEL_DIR/"after_lower_parallel.dot"
+
+##################################################################################
+        # Run Linear executor with scheduler
+##################################################################################
+        LOG_FILE=$REPORT_MODEL_DIR/tflite_linear_with_scheduler.txt
+        export EXECUTOR="Linear"
+        export GRAPH_DOT_DUMP=1
+        print_with_dots "Linear with scheduler"
+
+        RESULT=$(get_result_of_benchmark_test $RUN_TEST_SH $BENCHMARK_DRIVER_BIN $MODEL $LOG_FILE)
+
+        printf -v RESULT_INT '%d' $RESULT 2>/dev/null
+        PERCENTAGE=$((100-RESULT_SCH_INT*100/RESULT_INT))
+        echo "$RESULT ms. Parallel scheduler is $PERCENTAGE% faster"
+
+        # Remove metrics so that for next model in profiler can get metrics
+        #   for operations with input&output sizes the same as the model
+        mv "exec_time.json" $REPORT_MODEL_DIR
+        # Save the dot graph
+        mv "after_lower.dot" $REPORT_MODEL_DIR/"after_lower_linear.dot"
+        unset GRAPH_DOT_DUMP
+
+##################################################################################
+        # Turn off scheduler
+##################################################################################
+        export USE_SCHEDULER=0
+
+        # Run LinearExecutor on acl_cl without scheduler
+        run_without_sched $RESULT_SCH_INT $REPORT_MODEL_DIR $MODEL "Linear" "acl_cl"
+
+        # Run LinearExecutor on acl_neon without scheduler
+        run_without_sched $RESULT_SCH_INT $REPORT_MODEL_DIR $MODEL "Linear" "acl_neon"
+
+        # Run ParallelExecutor on acl_cl without scheduler
+        run_without_sched $RESULT_SCH_INT $REPORT_MODEL_DIR $MODEL "Parallel" "acl_cl"
+
+        # Run ParallelExecutor on acl_neon without scheduler
+        run_without_sched $RESULT_SCH_INT $REPORT_MODEL_DIR $MODEL "Parallel" "acl_neon"
+
+        if [[ $i -ne $(echo $BENCHMARK_MODEL_LIST | wc -w)-1 ]]; then
+            echo ""
+        fi
+        i=$((i+1))
+
+        unset USE_SCHEDULER
+        unset PROFILING_MODE
+        unset EXECUTOR
+        unset OP_BACKEND_ALLOPS
+    done
+    unset BACKENDS
+    echo "============================================"
+    unset COUNT
+    unset USE_NNAPI
+
+}
+
+echo ""
+run_benchmark_test
+echo ""
diff --git a/tests/tools/CMakeLists.txt b/tests/tools/CMakeLists.txt
index b1eea12f9..5ea6cdadd 100644
--- a/tests/tools/CMakeLists.txt
+++ b/tests/tools/CMakeLists.txt
@@ -1,8 +1 @@
-set(EXCLUDE_DIR "")
-
-if(OBS_BUILD)
-  list(APPEND EXCLUDE_DIR tflite_benchmark_model)
-  list(APPEND EXCLUDE_DIR tflite_run)
-endif(OBS_BUILD)
-
-add_subdirectories(EXCLUDES ${EXCLUDE_DIR})
+add_subdirectories()
diff --git a/tests/tools/nnapi_test/src/nnapi_test.cc b/tests/tools/nnapi_test/src/nnapi_test.cc
index 73e80f01f..799188f66 100644
--- a/tests/tools/nnapi_test/src/nnapi_test.cc
+++ b/tests/tools/nnapi_test/src/nnapi_test.cc
@@ -15,7 +15,7 @@
  */
 
 #include "tflite/ext/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
+#include "tensorflow/lite/model.h"
 
 #include "tflite/interp/FlatBufferBuilder.h"
 #include "tflite/Diff.h"
diff --git a/tests/tools/nnpackage_run/CMakeLists.txt b/tests/tools/nnpackage_run/CMakeLists.txt
new file mode 100644
index 000000000..5fd7136cc
--- /dev/null
+++ b/tests/tools/nnpackage_run/CMakeLists.txt
@@ -0,0 +1,32 @@
+if(NOT BUILD_NNPACKAGE_RUN)
+  return()
+endif(NOT BUILD_NNPACKAGE_RUN)
+
+if(NOT BUILD_NEURUN)
+  return()
+endif(NOT BUILD_NEURUN)
+
+nnfw_find_package(HDF5 QUIET)
+if(NOT HDF5_FOUND)
+  message(WARNING "HDF5 NOT found. Install libhdf5-dev to build nnpackage_run.")
+  return()
+endif(NOT HDF5_FOUND)
+
+list(APPEND NNPACKAGE_RUN_SRCS "src/nnpackage_run.cc")
+list(APPEND NNPACKAGE_RUN_SRCS "src/args.cc")
+list(APPEND NNPACKAGE_RUN_SRCS "src/tensor_dumper.cc")
+
+nnfw_find_package(Boost REQUIRED)
+
+add_executable(nnpackage_run ${NNPACKAGE_RUN_SRCS})
+target_include_directories(nnpackage_run PRIVATE src)
+target_include_directories(nnpackage_run PRIVATE ${Boost_INCLUDE_DIRS})
+target_include_directories(nnpackage_run PRIVATE ${HDF5_INCLUDE_DIRS})
+
+target_link_libraries(nnpackage_run neurun_core neurun tflite_loader)
+target_link_libraries(nnpackage_run tensorflow-lite ${LIB_PTHREAD} dl nnfw_lib_tflite)
+target_link_libraries(nnpackage_run nnfw-dev)
+target_link_libraries(nnpackage_run boost_program_options boost_system boost_filesystem)
+target_link_libraries(nnpackage_run ${HDF5_LIBRARIES})
+
+install(TARGETS nnpackage_run DESTINATION bin)
diff --git a/tests/tools/nnpackage_run/README.md b/tests/tools/nnpackage_run/README.md
new file mode 100644
index 000000000..c7167b2d4
--- /dev/null
+++ b/tests/tools/nnpackage_run/README.md
@@ -0,0 +1,22 @@
+# nnpackage_run
+
+`nnpackage_run` is a tool to run `nnpackage`.
+
+It takes `nnpackage` as input. It uses **runtime API** internally.
+
+## Usage
+
+### Simple run
+
+This will run with random input data
+
+```
+$ ./nnpackage_run path_to_nnpackage_directory
+```
+
+Output would look like:
+
+```
+nnfw_prepare takes 425.235 sec
+nnfw_run     takes 2.525 sec
+```
diff --git a/tests/tools/nnpackage_run/src/args.cc b/tests/tools/nnpackage_run/src/args.cc
new file mode 100644
index 000000000..a7593fabb
--- /dev/null
+++ b/tests/tools/nnpackage_run/src/args.cc
@@ -0,0 +1,108 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "args.h"
+
+#include <iostream>
+#include <boost/filesystem.hpp>
+
+namespace NNPackageRun
+{
+
+Args::Args(const int argc, char **argv) noexcept
+{
+  Initialize();
+  Parse(argc, argv);
+}
+
+void Args::Initialize(void)
+{
+  // General options
+  po::options_description general("General options");
+
+  // clang-format off
+  general.add_options()
+    ("help,h", "Display available options")
+    ("nnpackage", po::value<std::string>()->required())
+    ("dump,d", po::value<std::string>()->default_value(""), "Output filename")
+    ("load,l", po::value<std::string>()->default_value(""), "Input filename");
+  // clang-format on
+
+  _options.add(general);
+  _positional.add("nnpackage", 1);
+}
+
+void Args::Parse(const int argc, char **argv)
+{
+  po::variables_map vm;
+  po::store(po::command_line_parser(argc, argv).options(_options).positional(_positional).run(),
+            vm);
+
+  {
+    auto conflicting_options = [&](const std::string &o1, const std::string &o2) {
+      if ((vm.count(o1) && !vm[o1].defaulted()) && (vm.count(o2) && !vm[o2].defaulted()))
+      {
+        throw boost::program_options::error(std::string("Two options '") + o1 + "' and '" + o2 +
+                                            "' cannot be given at once.");
+      }
+    };
+  }
+
+  if (vm.count("help"))
+  {
+    std::cout << "nnpackage_run\n\n";
+    std::cout << "Usage: " << argv[0] << " path to nnpackage root directory [<options>]\n\n";
+    std::cout << _options;
+    std::cout << "\n";
+
+    exit(0);
+  }
+
+  po::notify(vm);
+
+  if (vm.count("dump"))
+  {
+    _dump_filename = vm["dump"].as<std::string>();
+  }
+
+  if (vm.count("load"))
+  {
+    _load_filename = vm["load"].as<std::string>();
+  }
+
+  if (vm.count("nnpackage"))
+  {
+    _package_filename = vm["nnpackage"].as<std::string>();
+
+    if (_package_filename.empty())
+    {
+      // TODO Print usage instead of the below message
+      std::cerr << "Please specify nnpackage file. Run with `--help` for usage."
+                << "\n";
+
+      exit(1);
+    }
+    else
+    {
+      if (!boost::filesystem::exists(_package_filename))
+      {
+        std::cerr << "nnpackage not found: " << _package_filename << "\n";
+      }
+    }
+  }
+}
+
+} // end of namespace NNPackageRun
diff --git a/tests/tools/nnpackage_run/src/args.h b/tests/tools/nnpackage_run/src/args.h
new file mode 100644
index 000000000..d064d77e7
--- /dev/null
+++ b/tests/tools/nnpackage_run/src/args.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNPACKAGE_RUN_ARGS_H__
+#define __NNPACKAGE_RUN_ARGS_H__
+
+#include <string>
+#include <boost/program_options.hpp>
+
+namespace po = boost::program_options;
+
+namespace NNPackageRun
+{
+
+class Args
+{
+public:
+  Args(const int argc, char **argv) noexcept;
+  void print(void);
+
+  const std::string &getPackageFilename(void) const { return _package_filename; }
+  const std::string &getDumpFilename(void) const { return _dump_filename; }
+  const std::string &getLoadFilename(void) const { return _load_filename; }
+
+private:
+  void Initialize();
+  void Parse(const int argc, char **argv);
+
+private:
+  po::positional_options_description _positional;
+  po::options_description _options;
+
+  std::string _package_filename;
+  std::string _dump_filename;
+  std::string _load_filename;
+};
+
+} // end of namespace NNPackageRun
+
+#endif // __NNPACKAGE_RUN_ARGS_H__
diff --git a/tests/tools/nnpackage_run/src/nnpackage_run.cc b/tests/tools/nnpackage_run/src/nnpackage_run.cc
new file mode 100644
index 000000000..97edebf4c
--- /dev/null
+++ b/tests/tools/nnpackage_run/src/nnpackage_run.cc
@@ -0,0 +1,259 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "args.h"
+#include "tflite/Diff.h"
+#include "tensor_dumper.h"
+#include "hdf5.h"
+#include "nnfw.h"
+
+#include <assert.h>
+#include <iostream>
+
+#include <chrono>
+
+#define NNPR_ENSURE_STATUS(a)        \
+  do                                 \
+  {                                  \
+    if ((a) != NNFW_STATUS_NO_ERROR) \
+    {                                \
+      exit(-1);                      \
+    }                                \
+  } while (0)
+
+uint64_t NowMicros()
+{
+  auto time_point = std::chrono::high_resolution_clock::now();
+  auto since_epoch = time_point.time_since_epoch();
+  // default precision of high resolution clock is 10e-9 (nanoseconds)
+  return std::chrono::duration_cast<std::chrono::microseconds>(since_epoch).count();
+}
+
+uint64_t num_elems(const nnfw_tensorinfo *ti)
+{
+  uint64_t n = 1;
+  for (uint32_t i = 0; i < ti->rank; ++i)
+  {
+    assert(ti->dims[i] >= 0);
+    n *= ti->dims[i];
+  }
+  return n;
+};
+
+std::vector<float> randomData(RandomGenerator &randgen, uint64_t size)
+{
+  std::vector<float> vec(size);
+  for (uint64_t i = 0; i < size; i++)
+    vec[i] = randgen.generate<float>();
+  return vec;
+}
+
+static const char *h5_value_grpname = "value";
+
+int main(const int argc, char **argv)
+{
+  NNPackageRun::Args args(argc, argv);
+  auto nnpackage_path = args.getPackageFilename();
+
+  nnfw_session *session = nullptr;
+  NNPR_ENSURE_STATUS(nnfw_create_session(&session));
+  NNPR_ENSURE_STATUS(nnfw_load_model_from_file(session, nnpackage_path.c_str()));
+
+  uint32_t num_inputs;
+  NNPR_ENSURE_STATUS(nnfw_input_size(session, &num_inputs));
+
+  // verify input and output
+
+  if (num_inputs == 0)
+  {
+    std::cerr << "[ ERROR ] "
+              << "No inputs in model => execution is not possible" << std::endl;
+    exit(1);
+  }
+
+  auto verifyInputTypes = [session]() {
+    uint32_t sz;
+    NNPR_ENSURE_STATUS(nnfw_input_size(session, &sz));
+    for (uint32_t i = 0; i < sz; ++i)
+    {
+      nnfw_tensorinfo ti;
+      NNPR_ENSURE_STATUS(nnfw_input_tensorinfo(session, i, &ti));
+      if (ti.dtype != NNFW_TYPE_TENSOR_FLOAT32)
+      {
+        std::cerr << "Only float 32bit is supported." << std::endl;
+        exit(-1);
+      }
+    }
+  };
+
+  auto verifyOutputTypes = [session]() {
+    uint32_t sz;
+    NNPR_ENSURE_STATUS(nnfw_output_size(session, &sz));
+
+    for (uint32_t i = 0; i < sz; ++i)
+    {
+      nnfw_tensorinfo ti;
+      NNPR_ENSURE_STATUS(nnfw_output_tensorinfo(session, i, &ti));
+      if (ti.dtype != NNFW_TYPE_TENSOR_FLOAT32)
+      {
+        std::cerr << "Only float 32bit is supported." << std::endl;
+        exit(-1);
+      }
+    }
+  };
+
+  verifyInputTypes();
+  verifyOutputTypes();
+
+  // prepare execution
+
+  uint64_t prepare_ms = NowMicros();
+  NNPR_ENSURE_STATUS(nnfw_prepare(session));
+  prepare_ms = NowMicros() - prepare_ms;
+
+  // prepare input
+
+  std::vector<std::vector<float>> inputs(num_inputs);
+
+  auto loadInputs = [session, num_inputs, &inputs](std::string filename) {
+    hid_t file_id = H5Fopen(filename.c_str(), H5F_ACC_RDONLY, H5P_DEFAULT);
+    if (file_id < 0)
+    {
+      std::cerr << "error during opening file " << filename << "." << std::endl;
+      exit(-1);
+    }
+    hid_t valgrp_id = H5Gopen(file_id, h5_value_grpname, H5P_DEFAULT);
+    if (valgrp_id < 0)
+    {
+      std::cerr << "error during opening group " << h5_value_grpname << "." << std::endl;
+      H5Fclose(file_id);
+      exit(-1);
+    }
+    for (uint32_t i = 0; i < num_inputs; ++i)
+    {
+      nnfw_tensorinfo ti;
+      NNPR_ENSURE_STATUS(nnfw_input_tensorinfo(session, i, &ti));
+
+      hid_t dset_id = H5Dopen(valgrp_id, std::to_string(i).c_str(), H5P_DEFAULT);
+      if (dset_id < 0)
+      {
+        std::cerr << "error during opening dataset " << std::to_string(i) << "." << std::endl;
+        H5Gclose(valgrp_id);
+        H5Fclose(file_id);
+        exit(-1);
+      }
+
+      // check type
+      hid_t type = H5Dget_type(dset_id);
+      if (!H5Tequal(type, H5T_IEEE_F32BE))
+      {
+        std::cerr << "h5 input has non-float32 type. nnpkg_run supports float32 only." << std::endl;
+        H5Dclose(dset_id);
+        H5Gclose(valgrp_id);
+        H5Fclose(file_id);
+        exit(-1);
+      }
+      // allocate memory for data
+      auto sz = num_elems(&ti);
+      inputs[i].resize(sz);
+      // read data
+      H5Dread(dset_id, H5T_NATIVE_FLOAT, H5S_ALL, H5S_ALL, H5P_DEFAULT, inputs[i].data());
+
+      NNPR_ENSURE_STATUS(nnfw_set_input(session, i, NNFW_TYPE_TENSOR_FLOAT32, inputs[i].data(),
+                                        sizeof(float) * num_elems(&ti)));
+      // clean up
+      H5Dclose(dset_id);
+    }
+    H5Gclose(valgrp_id);
+    H5Fclose(file_id);
+  };
+
+  auto generateInputs = [session, num_inputs, &inputs]() {
+    // generate random data
+    const int seed = 1;
+    RandomGenerator randgen{seed, 0.0f, 2.0f};
+    for (uint32_t i = 0; i < num_inputs; ++i)
+    {
+      nnfw_tensorinfo ti;
+      NNPR_ENSURE_STATUS(nnfw_input_tensorinfo(session, i, &ti));
+      auto input_num_elements = num_elems(&ti);
+      inputs[i] = randomData(randgen, input_num_elements);
+      NNPR_ENSURE_STATUS(nnfw_set_input(session, i, NNFW_TYPE_TENSOR_FLOAT32, inputs[i].data(),
+                                        sizeof(float) * input_num_elements));
+    }
+  };
+
+  if (!args.getLoadFilename().empty())
+    loadInputs(args.getLoadFilename());
+  else
+    generateInputs();
+
+  // prepare output
+
+  uint32_t num_outputs = 0;
+  NNPR_ENSURE_STATUS(nnfw_output_size(session, &num_outputs));
+  std::vector<std::vector<float>> outputs(num_outputs);
+
+  for (uint32_t i = 0; i < num_outputs; i++)
+  {
+    nnfw_tensorinfo ti;
+    NNPR_ENSURE_STATUS(nnfw_output_tensorinfo(session, i, &ti));
+    auto output_num_elements = num_elems(&ti);
+    outputs[i].resize(output_num_elements);
+    NNPR_ENSURE_STATUS(nnfw_set_output(session, i, NNFW_TYPE_TENSOR_FLOAT32, outputs[i].data(),
+                                       sizeof(float) * output_num_elements));
+  }
+
+  uint64_t run_ms = NowMicros();
+  NNPR_ENSURE_STATUS(nnfw_run(session));
+  run_ms = NowMicros() - run_ms;
+
+  // dump output tensors
+
+  auto dumpOutputs = [session, num_outputs, &outputs](std::string filename) {
+    hid_t file_id = H5Fcreate(filename.c_str(), H5F_ACC_TRUNC, H5P_DEFAULT, H5P_DEFAULT);
+    for (uint32_t i = 0; i < num_outputs; i++)
+    {
+      nnfw_tensorinfo ti;
+      NNPR_ENSURE_STATUS(nnfw_output_tensorinfo(session, i, &ti));
+      std::vector<hsize_t> dims;
+      dims.resize(ti.rank);
+      for (uint32_t j = 0; j < ti.rank; ++j)
+      {
+        assert(ti.dims[j] >= 0);
+        dims[j] = ti.dims[j];
+      }
+      hid_t valgrp_id = H5Gcreate(file_id, h5_value_grpname, H5P_DEFAULT, H5P_DEFAULT, H5P_DEFAULT);
+      hid_t dsp_id = H5Screate_simple(ti.rank, dims.data(), NULL);
+      hid_t dset_id = H5Dcreate2(valgrp_id, std::to_string(i).c_str(), H5T_IEEE_F32BE, dsp_id,
+                                 H5P_DEFAULT, H5P_DEFAULT, H5P_DEFAULT);
+      H5Dwrite(dset_id, H5T_NATIVE_FLOAT, H5S_ALL, H5S_ALL, H5P_DEFAULT, outputs[i].data());
+      H5Dclose(dset_id);
+      H5Sclose(dsp_id);
+    }
+    H5Fclose(file_id);
+  };
+
+  if (!args.getDumpFilename().empty())
+    dumpOutputs(args.getDumpFilename());
+
+  std::cout << "nnfw_prepare takes " << prepare_ms / 1e3 << " sec" << std::endl;
+  std::cout << "nnfw_run     takes " << run_ms / 1e3 << " sec" << std::endl;
+
+  NNPR_ENSURE_STATUS(nnfw_close_session(session));
+
+  return 0;
+}
diff --git a/tests/tools/nnpackage_run/src/tensor_dumper.cc b/tests/tools/nnpackage_run/src/tensor_dumper.cc
new file mode 100644
index 000000000..ae4ed9518
--- /dev/null
+++ b/tests/tools/nnpackage_run/src/tensor_dumper.cc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "tensor_dumper.h"
+
+#include <fstream>
+#include <iostream>
+#include <cstring>
+
+namespace NNPackageRun
+{
+TensorDumper::TensorDumper(const std::string &filename)
+{
+  // TODO Handle file open/write error
+  file_.open(filename, std::ios::out | std::ios::binary);
+  dumpInt32(version);
+}
+
+TensorDumper::~TensorDumper() { file_.close(); }
+
+void TensorDumper::dumpInt32(int32_t i)
+{
+  file_.write(reinterpret_cast<const char *>(&i), sizeof(i));
+}
+
+void TensorDumper::dumpSizeT(size_t i)
+{
+  file_.write(reinterpret_cast<const char *>(&i), sizeof(i));
+}
+
+void TensorDumper::dumpTensor(const nnfw_tensorinfo ti, void *buffer, size_t bytes)
+{
+  dumpInt32(ti.dtype);
+  dumpInt32(ti.rank);
+  for (uint i = 0; i < ti.rank; ++i)
+    dumpInt32(ti.dims[i]);
+  dumpSizeT(bytes);
+  file_.write(static_cast<char *>(buffer), bytes);
+}
+
+} // end of namespace NNPackageRun
\ No newline at end of file
diff --git a/tests/tools/nnpackage_run/src/tensor_dumper.h b/tests/tools/nnpackage_run/src/tensor_dumper.h
new file mode 100644
index 000000000..12cc22f18
--- /dev/null
+++ b/tests/tools/nnpackage_run/src/tensor_dumper.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NNPACKAGE_RUN_TENSOR_DUMPER_H__
+#define __NNPACKAGE_RUN_TENSOR_DUMPER_H__
+
+#include <memory>
+#include <string>
+#include <vector>
+#include <stddef.h>
+#include <fstream>
+
+#include "nnfw.h"
+
+namespace NNPackageRun
+{
+
+class TensorDumper
+{
+public:
+  TensorDumper(const std::string &filename);
+  void dumpTensor(const nnfw_tensorinfo ti, void *buffer, size_t bytes);
+  void dumpInt32(int32_t i);
+  void dumpSizeT(size_t i);
+  ~TensorDumper();
+
+private:
+  static constexpr int version = 1;
+  std::ofstream file_;
+};
+
+} // end of namespace NNPackageRun
+
+#endif // __NNPACKAGE_RUN_TENSOR_DUMPER_H__
diff --git a/tests/tools/tflite_benchmark/CMakeLists.txt b/tests/tools/tflite_benchmark/CMakeLists.txt
index 56421a294..634d451bc 100644
--- a/tests/tools/tflite_benchmark/CMakeLists.txt
+++ b/tests/tools/tflite_benchmark/CMakeLists.txt
@@ -1,5 +1,10 @@
 list(APPEND SOURCES "src/tflite_benchmark.cc")
 
+nnfw_find_package(Boost REQUIRED)
+
 add_executable(tflite_benchmark ${SOURCES})
 target_link_libraries(tflite_benchmark nnfw_lib_tflite tensorflow-lite ${LIB_PTHREAD} dl nnfw_lib_misc)
+
+target_include_directories(tflite_benchmark PRIVATE ${Boost_INCLUDE_DIRS})
+
 install(TARGETS tflite_benchmark DESTINATION bin)
diff --git a/tests/tools/tflite_benchmark/src/tflite_benchmark.cc b/tests/tools/tflite_benchmark/src/tflite_benchmark.cc
index b77afc189..1fde0c449 100644
--- a/tests/tools/tflite_benchmark/src/tflite_benchmark.cc
+++ b/tests/tools/tflite_benchmark/src/tflite_benchmark.cc
@@ -15,7 +15,7 @@
  */
 
 #include "tflite/ext/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
+#include "tensorflow/lite/model.h"
 
 #include "tflite/Assert.h"
 #include "tflite/Session.h"
@@ -30,9 +30,11 @@
 #include <boost/accumulators/statistics/max.hpp>
 #include <boost/accumulators/statistics/mean.hpp>
 
+#include <chrono>
 #include <iostream>
+#include <thread>
 
-#include "misc/environment.h"
+#include "misc/EnvVar.h"
 #include "misc/benchmark.h"
 
 using namespace tflite;
@@ -50,14 +52,41 @@ void help(std::ostream &out, const int argc, char **argv)
 
 bool checkParams(const int argc, char **argv)
 {
-  if (argc < 2)
+  try
+  {
+    if (argc < 2)
+    {
+      help(std::cerr, argc, argv);
+      return false;
+    }
+  }
+  catch (const std::exception &e)
   {
-    help(std::cerr, argc, argv);
+    std::cerr << e.what() << std::endl;
+
     return false;
   }
+
   return true;
 }
 
+// Verifies whether the model is a flatbuffer file.
+class BMFlatBufferVerifier : public tflite::TfLiteVerifier
+{
+public:
+  bool Verify(const char *data, int length, tflite::ErrorReporter *reporter) override
+  {
+
+    flatbuffers::Verifier verifier(reinterpret_cast<const uint8_t *>(data), length);
+    if (!tflite::VerifyModelBuffer(verifier))
+    {
+      reporter->Report("The model is not a valid Flatbuffer file");
+      return false;
+    }
+    return true;
+  }
+};
+
 int main(const int argc, char **argv)
 {
 
@@ -68,8 +97,9 @@ int main(const int argc, char **argv)
 
   const auto filename = argv[1];
 
-  const bool use_nnapi = nnfw::misc::get_env_bool("USE_NNAPI");
-  const auto thread_count = nnfw::misc::get_env_int("THREAD", -1);
+  const bool use_nnapi = nnfw::misc::EnvVar("USE_NNAPI").asBool(false);
+  const auto thread_count = nnfw::misc::EnvVar("THREAD").asInt(-1);
+  const auto pause = nnfw::misc::EnvVar("PAUSE").asInt(0);
 
   std::cout << "Num threads: " << thread_count << std::endl;
   if (use_nnapi)
@@ -77,9 +107,17 @@ int main(const int argc, char **argv)
     std::cout << "Use NNAPI" << std::endl;
   }
 
+  assert(pause >= 0);
+  if (pause > 0)
+  {
+    std::cout << "Insert " << pause << "s pause between iterations" << std::endl;
+  }
+
   StderrReporter error_reporter;
 
-  auto model = FlatBufferModel::BuildFromFile(filename, &error_reporter);
+  std::unique_ptr<tflite::TfLiteVerifier> verifier{new BMFlatBufferVerifier};
+
+  auto model = FlatBufferModel::VerifyAndBuildFromFile(filename, verifier.get(), &error_reporter);
   if (model == nullptr)
   {
     std::cerr << "Cannot create model" << std::endl;
@@ -206,7 +244,7 @@ int main(const int argc, char **argv)
   //
   // Measure
   //
-  const auto cnt = nnfw::misc::get_env_int("COUNT", 1);
+  const auto cnt = nnfw::misc::EnvVar("COUNT").asInt(1);
 
   using namespace boost::accumulators;
 
@@ -228,6 +266,12 @@ int main(const int argc, char **argv)
     acc(elapsed.count());
 
     std::cout << "Iteration " << n << ": " << elapsed.count() << "ms" << std::endl;
+
+    // Insert "pause"
+    if ((n != cnt - 1) && (pause > 0))
+    {
+      std::this_thread::sleep_for(std::chrono::seconds(pause));
+    }
   }
 
   std::cout << "--------" << std::endl;
diff --git a/tests/tools/tflite_benchmark_model/CMakeLists.txt b/tests/tools/tflite_benchmark_model/CMakeLists.txt
index c48f658c1..ea4986a8c 100644
--- a/tests/tools/tflite_benchmark_model/CMakeLists.txt
+++ b/tests/tools/tflite_benchmark_model/CMakeLists.txt
@@ -2,10 +2,16 @@ if (NOT BUILD_TFLITE_BENCHMARK_MODEL)
   return()
 endif(NOT BUILD_TFLITE_BENCHMARK_MODEL)
 
+nnfw_find_package(TensorFlowLite REQUIRED)
+
+# TODO Remove this target_compile_definitions command, and just check its presence.
+#      This change is prerequisites on pre-built tensorflow-lite package support
+target_compile_definitions(tensorflow-lite PUBLIC "TFLITE_PROFILING_ENABLED")
+
 file(GLOB_RECURSE SOURCES "*.cc")
 
 nnfw_find_package(TensorFlowSource REQUIRED)
-set(TENSORFLOW_LITE_BASE "${TensorFlowSource_DIR}/tensorflow/contrib/lite")
+set(TENSORFLOW_LITE_BASE "${TensorFlowSource_DIR}/tensorflow/lite")
 list(APPEND SOURCES "${TENSORFLOW_LITE_BASE}/tools/benchmark/benchmark_main.cc"
                     "${TENSORFLOW_LITE_BASE}/tools/benchmark/benchmark_model.cc"
                     "${TENSORFLOW_LITE_BASE}/tools/benchmark/benchmark_params.cc"
diff --git a/tests/tools/tflite_benchmark_model/README.md b/tests/tools/tflite_benchmark_model/README.md
index 8d997639f..a71a2fa1c 100644
--- a/tests/tools/tflite_benchmark_model/README.md
+++ b/tests/tools/tflite_benchmark_model/README.md
@@ -9,7 +9,7 @@ of runs. Aggregrate latency statistics are reported after running the benchmark.
 
 The instructions below are for running the binary on Desktop and Android,
 for iOS please use the
-[iOS benchmark app](https://github.com/tensorflow/tensorflow/tree/master/tensorflow/contrib/lite/tools/benchmark/ios).
+[iOS benchmark app](https://github.com/tensorflow/tensorflow/tree/master/tensorflow/lite/tools/benchmark/ios).
 
 ## Parameters
 
@@ -45,14 +45,14 @@ and the following optional parameters:
 bazel build -c opt \
   --config=android_arm \
   --cxxopt='--std=c++11' \
-  tensorflow/contrib/lite/tools/benchmark:benchmark_model
+  tensorflow/lite/tools/benchmark:benchmark_model
 ```
 
 (2) Connect your phone. Push the binary to your phone with adb push
      (make the directory if required):
 
 ```
-adb push bazel-bin/tensorflow/contrib/lite/tools/benchmark/benchmark_model /data/local/tmp
+adb push bazel-bin/tensorflow/lite/tools/benchmark/benchmark_model /data/local/tmp
 ```
 
 (3) Make the binary executable.
@@ -79,14 +79,14 @@ adb shell /data/local/tmp/benchmark_model \
 (1) build the binary
 
 ```
-bazel build -c opt tensorflow/contrib/lite/tools/benchmark:benchmark_model
+bazel build -c opt tensorflow/lite/tools/benchmark:benchmark_model
 ```
 
 (2) Run on your compute graph, similar to the Android case but without the need of adb shell.
 For example:
 
 ```
-bazel-bin/tensorflow/contrib/lite/tools/benchmark/benchmark_model \
+bazel-bin/tensorflow/lite/tools/benchmark/benchmark_model \
   --graph=mobilenet_quant_v1_224.tflite \
   --num_threads=4
 ```
@@ -126,7 +126,7 @@ bazel build -c opt \
   --config=android_arm \
   --cxxopt='--std=c++11' \
   --copt=-DTFLITE_PROFILING_ENABLED \
-  tensorflow/contrib/lite/tools/benchmark:benchmark_model
+  tensorflow/lite/tools/benchmark:benchmark_model
 ```
 This compiles TFLite with profiling enabled, now you can run the benchmark binary like before. The binary will produce detailed statistics for each operation similar to those shown below:
 
diff --git a/tests/tools/tflite_benchmark_model/benchmark_tflite_model.cc b/tests/tools/tflite_benchmark_model/benchmark_tflite_model.cc
index efc8bae52..f6dda2628 100644
--- a/tests/tools/tflite_benchmark_model/benchmark_tflite_model.cc
+++ b/tests/tools/tflite_benchmark_model/benchmark_tflite_model.cc
@@ -29,7 +29,7 @@ See the License for the specific language governing permissions and
 limitations under the License.
 ==============================================================================*/
 
-#include "tensorflow/contrib/lite/tools/benchmark/benchmark_tflite_model.h"
+#include "tensorflow/lite/tools/benchmark/benchmark_tflite_model.h"
 
 #include <cstdarg>
 #include <cstdlib>
@@ -40,13 +40,13 @@ limitations under the License.
 #include <vector>
 
 #ifdef TFLITE_FLEX
-#include "tensorflow/contrib/lite/delegates/flex/delegate.h"
+#include "tensorflow/lite/delegates/flex/delegate.h"
 #endif  // TFLITE_FLEX
 #include "tflite/ext/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/op_resolver.h"
-#include "tensorflow/contrib/lite/string_util.h"
-#include "tensorflow/contrib/lite/tools/benchmark/logging.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/op_resolver.h"
+#include "tensorflow/lite/string_util.h"
+#include "tensorflow/lite/tools/benchmark/logging.h"
 
 // For profiling nnapi_delegate
 #include "profiling/profiling.h"
@@ -321,7 +321,7 @@ void BenchmarkTfLiteModel::Init() {
   ::profiling::Context::get().setProfiler(interpreter->GetProfiler());
 
   auto enable_sync = std::getenv("PROFILING_OP_SYNC");
-  if (enable_sync && std::atoi(enable_sync) != 0)
+  if (enable_sync && std::strtol(enable_sync, NULL, 0) != 0)
   {
     ::profiling::Context::get().setSync();
   }
diff --git a/tests/tools/tflite_benchmark_model/profile_summarizer.cc b/tests/tools/tflite_benchmark_model/profile_summarizer.cc
index ce19b0c98..b547c7095 100644
--- a/tests/tools/tflite_benchmark_model/profile_summarizer.cc
+++ b/tests/tools/tflite_benchmark_model/profile_summarizer.cc
@@ -29,11 +29,11 @@ See the License for the specific language governing permissions and
 limitations under the License.
 ==============================================================================*/
 
-#include "tensorflow/contrib/lite/profiling/profile_summarizer.h"
+#include "tensorflow/lite/profiling/profile_summarizer.h"
 
 #include <sstream>
 
-#include "tensorflow/contrib/lite/schema/schema_generated.h"
+#include "tensorflow/lite/schema/schema_generated.h"
 
 namespace tflite {
 namespace profiling {
diff --git a/tests/tools/tflite_loader/CMakeLists.txt b/tests/tools/tflite_loader/CMakeLists.txt
new file mode 100644
index 000000000..2705537d8
--- /dev/null
+++ b/tests/tools/tflite_loader/CMakeLists.txt
@@ -0,0 +1,23 @@
+if(NOT BUILD_TFLITE_LOADER_TEST_TOOL)
+  message("skipping tflite loader tool build")
+  return()
+endif(NOT BUILD_TFLITE_LOADER_TEST_TOOL)
+
+if(NOT BUILD_NEURUN)
+  message("skipping tflite loader tool build: neurun is not built")
+  return()
+endif(NOT BUILD_NEURUN)
+
+list(APPEND SOURCES "src/tflite_loader.cc")
+list(APPEND SOURCES "src/args.cc")
+
+nnfw_find_package(Boost REQUIRED)
+
+add_executable(tflite_loader_test_tool ${SOURCES})
+target_include_directories(tflite_loader_test_tool PRIVATE ${Boost_INCLUDE_DIRS})
+
+target_link_libraries(tflite_loader_test_tool neurun_core neurun tflite_loader)
+target_link_libraries(tflite_loader_test_tool nnfw_lib_tflite tensorflow-lite ${LIB_PTHREAD} dl nnfw_lib_misc)
+target_link_libraries(tflite_loader_test_tool boost_program_options boost_system boost_filesystem)
+
+install(TARGETS tflite_loader_test_tool DESTINATION bin)
diff --git a/tests/tools/tflite_loader/src/args.cc b/tests/tools/tflite_loader/src/args.cc
new file mode 100644
index 000000000..3fe1d0bf4
--- /dev/null
+++ b/tests/tools/tflite_loader/src/args.cc
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "args.h"
+
+#include <iostream>
+
+#include <boost/filesystem.hpp>
+
+namespace TFLiteRun
+{
+
+Args::Args(const int argc, char **argv) noexcept
+{
+  Initialize();
+  Parse(argc, argv);
+}
+
+void Args::Initialize(void)
+{
+  // General options
+  po::options_description general("General options");
+
+  // clang-format off
+  general.add_options()
+    ("help,h", "Display available options")
+    ("tflite", po::value<std::string>()->default_value("")->required(), "Input tflite model file for serialization")
+    ("data,d", po::value<std::vector<std::string>>()->multitoken()->default_value(std::vector<std::string>{}, ""), "Input data file for model");
+  // clang-format on
+
+  _options.add(general);
+  _positional.add("tflite", 1);
+}
+
+void Args::print(char **argv)
+{
+  std::cout << "tflite_loader" << std::endl << std::endl;
+  std::cout << "Load tflite model by Loader and TFLite and compare their output" << std::endl;
+  std::cout << "Usage:" << std::endl;
+  std::cout << argv[0] << " --tflite model_file.tflite --data input_data.dat" << std::endl;
+  std::cout << _options;
+  std::cout << std::endl;
+}
+
+void Args::Parse(const int argc, char **argv)
+{
+  po::variables_map vm;
+  po::store(po::command_line_parser(argc, argv).options(_options).positional(_positional).run(),
+            vm);
+  po::notify(vm);
+
+  if (vm.count("help"))
+  {
+    print(argv);
+
+    exit(0);
+  }
+
+  if (vm.count("tflite"))
+  {
+    _tflite_filename = vm["tflite"].as<std::string>();
+  }
+
+  if (vm.count("data"))
+  {
+    _data_filenames = vm["data"].as<std::vector<std::string>>();
+  }
+}
+
+} // end of namespace TFLiteRun
diff --git a/tests/tools/tflite_loader/src/args.h b/tests/tools/tflite_loader/src/args.h
new file mode 100644
index 000000000..4d0e8ff41
--- /dev/null
+++ b/tests/tools/tflite_loader/src/args.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __TFLITE_LOADER_TOOLS_SRC_ARGS_H__
+#define __TFLITE_LOADER_TOOLS_SRC_ARGS_H__
+
+#include <string>
+#include <boost/program_options.hpp>
+
+namespace po = boost::program_options;
+
+namespace TFLiteRun
+{
+
+class Args
+{
+public:
+  Args(const int argc, char **argv) noexcept;
+  void print(char **argv);
+
+  const std::string &getTFLiteFilename(void) const { return _tflite_filename; }
+  const std::vector<std::string> &getDataFilenames(void) const { return _data_filenames; }
+
+private:
+  void Initialize();
+  void Parse(const int argc, char **argv);
+
+private:
+  po::options_description _options;
+  po::positional_options_description _positional;
+
+  std::string _tflite_filename;
+  std::vector<std::string> _data_filenames;
+};
+
+} // namespace TFLiteRun
+
+#endif // __TFLITE_LOADER_TOOLS_SRC_ARGS_H__
diff --git a/tests/tools/tflite_loader/src/tflite_loader.cc b/tests/tools/tflite_loader/src/tflite_loader.cc
new file mode 100644
index 000000000..c2388f3cc
--- /dev/null
+++ b/tests/tools/tflite_loader/src/tflite_loader.cc
@@ -0,0 +1,289 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "tflite/ext/kernels/register.h"
+
+#include "args.h"
+#include "tflite/InterpreterSession.h"
+#include "tflite/Assert.h"
+#include "tflite/Diff.h"
+#include "misc/tensor/IndexIterator.h"
+
+#include <iostream>
+#include <fstream>
+
+#include "compiler/Compiler.h"
+#include "exec/Execution.h"
+#include "graph/Graph.h"
+
+#include "loader.h"
+
+#include "cpp14/memory.h"
+
+const int RUN_FAILED = 1;
+
+using namespace tflite;
+using namespace nnfw::tflite;
+
+const int FILE_ERROR = 2;
+const float DIFFERENCE_THRESHOLD = 10e-5;
+
+// Read vector of floats from selected file
+std::vector<float> readData(const string &path)
+{
+  std::ifstream in(path);
+  if (!in.good())
+  {
+    std::cerr << "can not open data file " << path << "\n";
+    exit(FILE_ERROR);
+  }
+  in.seekg(0, std::ifstream::end);
+  size_t len = in.tellg();
+  in.seekg(0, std::ifstream::beg);
+  assert(len % sizeof(float) == 0);
+  size_t size = len / sizeof(float);
+  std::vector<float> vec(size);
+  for (size_t i = 0; i < size; ++i)
+  {
+    in.read(reinterpret_cast<char *>(&vec[i]), sizeof(float));
+  }
+  return vec;
+}
+
+std::vector<float> randomData(RandomGenerator &randgen, const uint64_t size)
+{
+  std::vector<float> vec(size);
+  for (uint64_t i = 0; i < size; i++)
+  {
+    vec[i] = randgen.generate<float>();
+  }
+  return vec;
+}
+
+void executeGraph(const std::shared_ptr<neurun::graph::Graph> &g,
+                  const std::vector<std::vector<float>> &inputs,
+                  std::vector<std::vector<float>> &outputs)
+{
+  auto compiler = new neurun::compiler::Compiler(g);
+  // Compilation
+  try
+  {
+    compiler->compile();
+  }
+  catch (const std::exception &e)
+  {
+    std::cerr << "[Execution] Can't compile model" << std::endl;
+    std::cerr << e.what() << std::endl;
+    exit(-1);
+  }
+
+  std::cout << "[Execution] Graph compiled!" << std::endl;
+
+  std::shared_ptr<neurun::exec::IExecutor> executor;
+  compiler->release(executor);
+  auto execution = std::make_shared<neurun::exec::Execution>(executor);
+
+  // Verify input shapes
+  auto num_inputs = inputs.size();
+  for (size_t i = 0; i < num_inputs; i++)
+  {
+    auto input_operand_idx = g->getInputs().at(i);
+    auto input_shape = g->operands().at(input_operand_idx).shape();
+    assert(inputs[i].size() == input_shape.num_elements());
+  }
+
+  // Set output shapes
+  auto num_outputs = g->getOutputs().size();
+  outputs.resize(num_outputs);
+  for (uint32_t i = 0; i < num_outputs; i++)
+  {
+    auto output_operand_idx = g->getOutputs().at(i);
+    auto output_shape = g->operands().at(output_operand_idx).shape();
+    outputs[i].resize(output_shape.num_elements());
+  }
+
+  // Setting IO
+  try
+  {
+    for (size_t i = 0; i < num_inputs; i++)
+      execution->setInput(neurun::model::IOIndex(i), inputs[i].data(),
+                          inputs[i].size() * sizeof(float));
+    for (uint32_t i = 0; i < num_outputs; i++)
+      execution->setOutput(neurun::model::IOIndex(i), outputs[i].data(),
+                           outputs[i].size() * sizeof(float));
+  }
+  catch (const std::exception &e)
+  {
+    std::cerr << "[Execution] Can't set model IO" << std::endl;
+    std::cerr << e.what() << '\n';
+    exit(-1);
+  }
+
+  execution->execute();
+  std::cout << "[Execution] Done!" << std::endl;
+
+  delete compiler;
+}
+
+int main(const int argc, char **argv)
+{
+  TFLiteRun::Args args(argc, argv);
+
+  auto tflite_file = args.getTFLiteFilename();
+  auto data_files = args.getDataFilenames();
+
+  if (tflite_file.empty())
+  {
+    args.print(argv);
+    return RUN_FAILED;
+  }
+
+  std::cout << "[Execution] Stage start!" << std::endl;
+  auto test_model = nnfw::cpp14::make_unique<neurun::model::Model>();
+  auto test_graph = std::make_shared<neurun::graph::Graph>(std::move(test_model));
+  // Loading
+  try
+  {
+    tflite_loader::Loader loader(*test_graph);
+    loader.loadFromFile(tflite_file.c_str());
+  }
+  catch (std::exception &e)
+  {
+    std::cerr << "[ ERROR ] "
+              << "Failure during model load" << std::endl;
+    std::cerr << e.what() << std::endl;
+    exit(-1);
+  }
+
+  // TODO: Support another input/output types
+  for (const auto &input_idx : test_graph->getInputs())
+  {
+    const auto input_type = test_graph->operands().at(input_idx).typeInfo().type();
+    assert(input_type == neurun::model::DataType::FLOAT32 && "Only FLOAT32 inputs are supported");
+  }
+  for (const auto &output_idx : test_graph->getOutputs())
+  {
+    const auto output_type = test_graph->operands().at(output_idx).typeInfo().type();
+    assert(output_type == neurun::model::DataType::FLOAT32 && "Only FLOAT32 outputs are supported");
+  }
+
+  std::cout << "[Execution] Model is deserialized!" << std::endl;
+  auto num_inputs = test_graph->getInputs().size();
+  std::vector<std::vector<float>> inputs(num_inputs);
+  bool generate_data = data_files.empty();
+  bool read_data = data_files.size() == num_inputs;
+  if (num_inputs == 0)
+  {
+    std::cerr << "[ ERROR ] "
+              << "No inputs in model => execution is not possible" << std::endl;
+    exit(1);
+  }
+  if (!generate_data && !read_data)
+  {
+    std::cerr << "[ ERROR ] "
+              << "Wrong number of input files." << std::endl;
+    exit(1);
+  }
+
+  const int seed = 1; /* TODO Add an option for seed value */
+  RandomGenerator randgen{seed, 0.0f, 2.0f};
+  for (uint32_t i = 0; i < num_inputs; i++)
+  {
+    if (generate_data)
+    {
+      uint64_t sz = test_graph->operands().at(test_graph->getInputs().at(i)).shape().num_elements();
+      inputs[i] = randomData(randgen, sz);
+    }
+    else /* read_data */
+      inputs[i] = readData(data_files[i]);
+  }
+  std::cout << "[Execution] Input data is defined!" << std::endl;
+  std::vector<std::vector<float>> outputs;
+  // Run graph
+  executeGraph(test_graph, inputs, outputs);
+  // Compare with tflite
+  std::cout << "[Comparison] Stage start!" << std::endl;
+  // Read tflite model
+  StderrReporter error_reporter;
+  auto model = FlatBufferModel::BuildFromFile(tflite_file.c_str(), &error_reporter);
+
+  BuiltinOpResolver resolver;
+  InterpreterBuilder builder(*model, resolver);
+
+  std::unique_ptr<Interpreter> interpreter;
+  try
+  {
+    TFLITE_ENSURE(builder(&interpreter));
+  }
+  catch (const std::exception &e)
+  {
+    std::cerr << e.what() << std::endl;
+    exit(FILE_ERROR);
+  }
+  interpreter->SetNumThreads(2);
+
+  auto sess = std::make_shared<nnfw::tflite::InterpreterSession>(interpreter.get());
+  sess->prepare();
+  // Set input and run
+  for (uint32_t i = 0; i < num_inputs; i++)
+  {
+    auto input_tensor = interpreter->tensor(interpreter->inputs().at(i));
+    memcpy(input_tensor->data.f, inputs[i].data(), inputs[i].size() * sizeof(float));
+  }
+  if (!sess->run())
+  {
+    std::cout << "[Comparison] TFLite run failed!" << std::endl;
+    assert(0 && "Run failed!");
+  }
+  std::cout << "[Comparison] TFLite run done!" << std::endl;
+
+  // Calculate max difference over all outputs
+  float max_difference = 0.0f;
+  auto num_outputs = test_graph->getOutputs().size();
+  for (uint32_t out_idx = 0; out_idx < num_outputs; out_idx++)
+  {
+    const auto &tflite_output_tensor = interpreter->tensor(interpreter->outputs().at(out_idx));
+    const auto &nnfw_output_tensor = outputs[out_idx];
+
+    if (nnfw_output_tensor.size() != tflite_output_tensor->bytes / sizeof(float))
+      std::cout << "[Comparison] Different size of outputs!" << std::endl;
+    // Check max difference
+    float *tflite_out_ptr = tflite_output_tensor->data.f;
+    for (const auto &nnfw_out : nnfw_output_tensor)
+    {
+      if (std::abs(nnfw_out - *tflite_out_ptr) > max_difference)
+        max_difference = std::abs(nnfw_out - *tflite_out_ptr);
+
+      tflite_out_ptr++;
+    }
+  }
+
+  // Print results
+  std::cout << "[Comparison] Max difference: " << max_difference << std::endl;
+  int ret = 0;
+  if (max_difference > DIFFERENCE_THRESHOLD)
+  {
+    std::cout << "[Comparison] Outputs is not equal!" << std::endl;
+    ret = 1;
+  }
+  else
+  {
+    std::cout << "[Comparison] Outputs is equal!" << std::endl;
+  }
+  std::cout << "[Comparison] Done!" << std::endl;
+
+  return ret;
+}
diff --git a/tests/tools/tflite_run/CMakeLists.txt b/tests/tools/tflite_run/CMakeLists.txt
index 49d87318f..1887d7cbf 100644
--- a/tests/tools/tflite_run/CMakeLists.txt
+++ b/tests/tools/tflite_run/CMakeLists.txt
@@ -1,11 +1,18 @@
+if(NOT BUILD_TFLITE_RUN)
+  return()
+endif(NOT BUILD_TFLITE_RUN)
+
 list(APPEND TFLITE_RUN_SRCS "src/tflite_run.cc")
-list(APPEND TFLITE_RUN_SRCS "src/bin_image.cc")
 list(APPEND TFLITE_RUN_SRCS "src/args.cc")
 list(APPEND TFLITE_RUN_SRCS "src/tensor_dumper.cc")
 list(APPEND TFLITE_RUN_SRCS "src/tensor_loader.cc")
 
+nnfw_find_package(Boost REQUIRED)
+
 add_executable(tflite_run ${TFLITE_RUN_SRCS})
 target_include_directories(tflite_run PRIVATE src)
+target_include_directories(tflite_run PRIVATE ${Boost_INCLUDE_DIRS})
+
 target_link_libraries(tflite_run tensorflow-lite ${LIB_PTHREAD} dl nnfw_lib_tflite)
 target_link_libraries(tflite_run boost_program_options boost_system boost_filesystem)
 
diff --git a/tests/tools/tflite_run/src/args.cc b/tests/tools/tflite_run/src/args.cc
index 713a0a9d2..6c85d884e 100644
--- a/tests/tools/tflite_run/src/args.cc
+++ b/tests/tools/tflite_run/src/args.cc
@@ -23,7 +23,7 @@
 namespace TFLiteRun
 {
 
-Args::Args(const int argc, char **argv)
+Args::Args(const int argc, char **argv) noexcept
 {
   Initialize();
   Parse(argc, argv);
@@ -38,7 +38,9 @@ void Args::Initialize(void)
   // clang-format off
   general.add_options()
     ("help,h", "Display available options")
+    ("input,i", po::value<std::string>()->default_value(""), "Input filename")
     ("dump,d", po::value<std::string>()->default_value(""), "Output filename")
+    ("ishapes", po::value<std::vector<int>>()->multitoken(), "Input shapes")
     ("compare,c", po::value<std::string>()->default_value(""), "filename to be compared with")
     ("tflite", po::value<std::string>()->required());
   // clang-format on
@@ -52,9 +54,7 @@ void Args::Parse(const int argc, char **argv)
   po::variables_map vm;
   po::store(po::command_line_parser(argc, argv).options(_options).positional(_positional).run(),
             vm);
-  po::notify(vm);
 
-#if 0 // Enable this when we have mutually conflicting options
   {
     auto conflicting_options = [&](const std::string &o1, const std::string &o2) {
       if ((vm.count(o1) && !vm[o1].defaulted()) && (vm.count(o2) && !vm[o2].defaulted()))
@@ -66,7 +66,6 @@ void Args::Parse(const int argc, char **argv)
 
     conflicting_options("input", "compare");
   }
-#endif
 
   if (vm.count("help"))
   {
@@ -78,6 +77,8 @@ void Args::Parse(const int argc, char **argv)
     exit(0);
   }
 
+  po::notify(vm);
+
   if (vm.count("dump"))
   {
     _dump_filename = vm["dump"].as<std::string>();
@@ -88,6 +89,28 @@ void Args::Parse(const int argc, char **argv)
     _compare_filename = vm["compare"].as<std::string>();
   }
 
+  if (vm.count("input"))
+  {
+    _input_filename = vm["input"].as<std::string>();
+
+    if (!_input_filename.empty())
+    {
+      if (!boost::filesystem::exists(_input_filename))
+      {
+        std::cerr << "input image file not found: " << _input_filename << "\n";
+      }
+    }
+  }
+
+  if (vm.count("ishapes"))
+  {
+    _input_shapes.resize(vm["ishapes"].as<std::vector<int>>().size());
+    for (auto i = 0; i < _input_shapes.size(); i++)
+    {
+      _input_shapes[i] = vm["ishapes"].as<std::vector<int>>()[i];
+    }
+  }
+
   if (vm.count("tflite"))
   {
     _tflite_filename = vm["tflite"].as<std::string>();
diff --git a/tests/tools/tflite_run/src/args.h b/tests/tools/tflite_run/src/args.h
index 5561544eb..25fd77a63 100644
--- a/tests/tools/tflite_run/src/args.h
+++ b/tests/tools/tflite_run/src/args.h
@@ -28,12 +28,14 @@ namespace TFLiteRun
 class Args
 {
 public:
-  Args(const int argc, char **argv);
+  Args(const int argc, char **argv) noexcept;
   void print(void);
 
   const std::string &getTFLiteFilename(void) const { return _tflite_filename; }
   const std::string &getDumpFilename(void) const { return _dump_filename; }
   const std::string &getCompareFilename(void) const { return _compare_filename; }
+  const std::string &getInputFilename(void) const { return _input_filename; }
+  const std::vector<int> &getInputShapes(void) const { return _input_shapes; }
 
 private:
   void Initialize();
@@ -46,6 +48,8 @@ private:
   std::string _tflite_filename;
   std::string _dump_filename;
   std::string _compare_filename;
+  std::string _input_filename;
+  std::vector<int> _input_shapes;
 };
 
 } // end of namespace TFLiteRun
diff --git a/tests/tools/tflite_run/src/bin_image.h b/tests/tools/tflite_run/src/bin_image.h
index 845011be6..5fc813e94 100644
--- a/tests/tools/tflite_run/src/bin_image.h
+++ b/tests/tools/tflite_run/src/bin_image.h
@@ -20,7 +20,7 @@
 #include <string>
 #include <vector>
 
-#include "tensorflow/contrib/lite/context.h"
+#include "tensorflow/lite/context.h"
 
 class BinImage
 {
diff --git a/tests/tools/tflite_run/src/tensor_dumper.cc b/tests/tools/tflite_run/src/tensor_dumper.cc
index 8568c9b67..4ccd4e11a 100644
--- a/tests/tools/tflite_run/src/tensor_dumper.cc
+++ b/tests/tools/tflite_run/src/tensor_dumper.cc
@@ -1,10 +1,26 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
 #include "tensor_dumper.h"
 
 #include <fstream>
 #include <iostream>
 #include <cstring>
 
-#include "tensorflow/contrib/lite/interpreter.h"
+#include "tensorflow/lite/interpreter.h"
 
 namespace TFLiteRun
 {
diff --git a/tests/tools/tflite_run/src/tensor_dumper.h b/tests/tools/tflite_run/src/tensor_dumper.h
index 2805f1076..5fdcc54f7 100644
--- a/tests/tools/tflite_run/src/tensor_dumper.h
+++ b/tests/tools/tflite_run/src/tensor_dumper.h
@@ -1,3 +1,19 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
 #ifndef __TFLITE_RUN_TENSOR_DUMPER_H__
 #define __TFLITE_RUN_TENSOR_DUMPER_H__
 
diff --git a/tests/tools/tflite_run/src/tensor_loader.cc b/tests/tools/tflite_run/src/tensor_loader.cc
index 934b78f40..de605bacf 100644
--- a/tests/tools/tflite_run/src/tensor_loader.cc
+++ b/tests/tools/tflite_run/src/tensor_loader.cc
@@ -14,7 +14,7 @@ TensorLoader::TensorLoader(tflite::Interpreter &interpreter)
 {
 }
 
-void TensorLoader::load(const std::string &filename)
+void TensorLoader::loadDumpedTensors(const std::string &filename)
 {
   // TODO Handle file open/read error
   std::ifstream file(filename, std::ios::ate | std::ios::binary);
@@ -28,9 +28,37 @@ void TensorLoader::load(const std::string &filename)
   file.read(reinterpret_cast<char *>(tensor_indices_raw), sizeof(tensor_indices_raw));
   std::vector<int> tensor_indices(tensor_indices_raw, tensor_indices_raw + num_tensors);
 
-  _raw_data = std::unique_ptr<float>(new float[file_size]);
+  _raw_data = std::unique_ptr<float[]>(new float[file_size]);
   file.read(reinterpret_cast<char *>(_raw_data.get()), file_size);
+  file.close();
+
+  size_t read_bytes = loadTensorsFromRawData(tensor_indices);
+
+  // The file size and total output tensor size must match
+  assert(file_size ==
+         sizeof(num_tensors) + sizeof(tensor_indices_raw) + read_bytes * sizeof(float));
+}
+
+void TensorLoader::loadRawTensors(const std::string &filename,
+                                  const std::vector<int> &tensor_indices)
+{
+  // TODO Handle file open/read error
+  std::ifstream file(filename, std::ios::ate | std::ios::binary);
+  size_t file_size = file.tellg();
+  file.seekg(0, std::ios::beg);
 
+  _raw_data = std::unique_ptr<float[]>(new float[file_size]);
+  file.read(reinterpret_cast<char *>(_raw_data.get()), file_size);
+  file.close();
+
+  size_t read_bytes = loadTensorsFromRawData(tensor_indices);
+
+  // The file size and total output tensor size must match
+  assert(file_size == read_bytes * sizeof(float));
+}
+
+size_t TensorLoader::loadTensorsFromRawData(const std::vector<int> &tensor_indices)
+{
   size_t offset = 0;
   for (const auto &o : tensor_indices)
   {
@@ -51,10 +79,7 @@ void TensorLoader::load(const std::string &filename)
     _tensor_map.insert(std::make_pair(o, nnfw::tflite::TensorView<float>(shape, base)));
   }
 
-  // The file size and total output tensor size must match
-  assert(file_size == sizeof(num_tensors) + sizeof(tensor_indices_raw) + offset * sizeof(float));
-
-  file.close();
+  return offset;
 }
 
 const nnfw::tflite::TensorView<float> &TensorLoader::get(int tensor_idx) const
diff --git a/tests/tools/tflite_run/src/tensor_loader.h b/tests/tools/tflite_run/src/tensor_loader.h
index fc4a37a08..2e671aa8a 100644
--- a/tests/tools/tflite_run/src/tensor_loader.h
+++ b/tests/tools/tflite_run/src/tensor_loader.h
@@ -20,13 +20,15 @@ class TensorLoader
 {
 public:
   TensorLoader(tflite::Interpreter &interpreter);
-  void load(const std::string &filename);
+  void loadDumpedTensors(const std::string &filename);
+  void loadRawTensors(const std::string &filename, const std::vector<int> &tensor_indices);
   const nnfw::tflite::TensorView<float> &get(int tensor_idx) const;
   size_t getNums() const { return _tensor_map.size(); }
 
 private:
+  size_t loadTensorsFromRawData(const std::vector<int> &tensor_indices);
   tflite::Interpreter &_interpreter;
-  std::unique_ptr<float> _raw_data;
+  std::unique_ptr<float[]> _raw_data;
   std::unordered_map<int, nnfw::tflite::TensorView<float>> _tensor_map;
 };
 
diff --git a/tests/tools/tflite_run/src/tflite_run.cc b/tests/tools/tflite_run/src/tflite_run.cc
index 5be6909e5..deed12856 100644
--- a/tests/tools/tflite_run/src/tflite_run.cc
+++ b/tests/tools/tflite_run/src/tflite_run.cc
@@ -15,14 +15,13 @@
  */
 
 #include "tflite/ext/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
+#include "tensorflow/lite/model.h"
 
-#include "bin_image.h"
 #include "args.h"
 #include "tensor_dumper.h"
 #include "tensor_loader.h"
 #include "misc/benchmark.h"
-#include "misc/environment.h"
+#include "misc/EnvVar.h"
 #include "misc/fp32.h"
 #include "tflite/Diff.h"
 #include "tflite/Assert.h"
@@ -65,15 +64,23 @@ int main(const int argc, char **argv)
   std::chrono::milliseconds t_prepare(0);
   std::chrono::milliseconds t_invoke(0);
 
-  nnfw::misc::benchmark::measure(t_prepare) << [&](void) {
-    BuiltinOpResolver resolver;
+  try
+  {
+    nnfw::misc::benchmark::measure(t_prepare) << [&](void) {
+      BuiltinOpResolver resolver;
 
-    InterpreterBuilder builder(*model, resolver);
+      InterpreterBuilder builder(*model, resolver);
 
-    TFLITE_ENSURE(builder(&interpreter))
+      TFLITE_ENSURE(builder(&interpreter))
 
-    interpreter->SetNumThreads(1);
-  };
+      interpreter->SetNumThreads(nnfw::misc::EnvVar("THREAD").asInt(-1));
+    };
+  }
+  catch (const std::exception &e)
+  {
+    std::cerr << e.what() << '\n';
+    return 1;
+  }
 
   std::shared_ptr<nnfw::tflite::Session> sess;
 
@@ -88,12 +95,45 @@ int main(const int argc, char **argv)
 
   sess->prepare();
 
+  if (args.getInputShapes().size() != 0)
+  {
+    const int dim_values = args.getInputShapes().size();
+    int offset = 0;
+
+    for (const auto &id : interpreter->inputs())
+    {
+      TfLiteTensor *tensor = interpreter->tensor(id);
+      std::vector<int32_t> new_dim;
+      new_dim.resize(tensor->dims->size);
+
+      for (uint32_t axis = 0; axis < tensor->dims->size; axis++, offset++)
+      {
+        new_dim[axis] =
+            ((offset < dim_values) ? args.getInputShapes()[offset] : tensor->dims->data[axis]);
+      }
+
+      interpreter->ResizeInputTensor(id, new_dim);
+
+      if (offset >= dim_values)
+        break;
+    }
+    interpreter->AllocateTensors();
+  }
+
   TFLiteRun::TensorLoader tensor_loader(*interpreter);
 
-  // Load input from dumped tensor file.
-  if (!args.getCompareFilename().empty())
+  // Load input from raw or dumped tensor file.
+  // Two options are exclusive and will be checked from Args.
+  if (!args.getInputFilename().empty() || !args.getCompareFilename().empty())
   {
-    tensor_loader.load(args.getCompareFilename());
+    if (!args.getInputFilename().empty())
+    {
+      tensor_loader.loadRawTensors(args.getInputFilename(), interpreter->inputs());
+    }
+    else
+    {
+      tensor_loader.loadDumpedTensors(args.getCompareFilename());
+    }
 
     for (const auto &o : interpreter->inputs())
     {
@@ -226,8 +266,7 @@ int main(const int argc, char **argv)
 
     // TODO Code duplication (copied from RandomTestRunner)
 
-    int tolerance = 1;
-    nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
+    int tolerance = nnfw::misc::EnvVar("TOLERANCE").asInt(1);
 
     auto equals = [tolerance](float lhs, float rhs) {
       // NOTE Hybrid approach
diff --git a/tools/CMakeLists.txt b/tools/CMakeLists.txt
index 7181629f3..ba69aafd2 100644
--- a/tools/CMakeLists.txt
+++ b/tools/CMakeLists.txt
@@ -1,6 +1,5 @@
-if(OBS_BUILD)
+if(NOT BUILD_TOOLS)
   return()
-endif(OBS_BUILD)
+endif(NOT BUILD_TOOLS)
 
-add_subdirectory(nnapi_quickcheck)
-add_subdirectory(opencl_tool)
+add_subdirectories()
diff --git a/tools/cross/build_android_rootfs.sh b/tools/cross/build_android_rootfs.sh
index d0b4afd7b..035e5110e 100755
--- a/tools/cross/build_android_rootfs.sh
+++ b/tools/cross/build_android_rootfs.sh
@@ -101,7 +101,7 @@ cp -rv $__ToolchainDir/$BOOST_BASENAME/boost $__RootfsDir/sysroot/usr/include
 if [[ "$__ACL" == 1 ]]; then
     echo "Installing arm compute library"
 
-    ACL_VERSION=18.03
+    ACL_VERSION=19.05
     ACL_BASENAME=arm_compute-v$ACL_VERSION-bin-android
     wget -nv -nc https://github.com/ARM-software/ComputeLibrary/releases/download/v$ACL_VERSION/$ACL_BASENAME.tar.gz -O $__ToolchainDir/$ACL_BASENAME.tar.gz
 
diff --git a/tools/cross/build_rootfs.sh b/tools/cross/build_rootfs.sh
index 3d0837bb6..3aa242bed 100755
--- a/tools/cross/build_rootfs.sh
+++ b/tools/cross/build_rootfs.sh
@@ -28,6 +28,7 @@ __UbuntuPackages="build-essential"
 
 # other development supports
 __UbuntuPackages+=" libboost-all-dev ocl-icd-opencl-dev"
+__UbuntuPackages+=" libhdf5-dev"
 
 # symlinks fixer
 __UbuntuPackages+=" symlinks"
@@ -116,6 +117,9 @@ if [[ -n $__LinuxCodeName ]]; then
     chroot $__RootfsDir apt-get update
     chroot $__RootfsDir apt-get -f -y install
     chroot $__RootfsDir apt-get -y install $__UbuntuPackages
+    machine=$(chroot $__RootfsDir gcc -dumpmachine)
+    chroot $__RootfsDir ln -s /usr/lib/${machine}/libhdf5_serial.a /usr/lib/${machine}/libhdf5.a
+    chroot $__RootfsDir ln -s /usr/lib/${machine}/libhdf5_serial.so /usr/lib/${machine}/libhdf5.so
     chroot $__RootfsDir symlinks -cr /usr
 
     if [ $__SkipUnmount == 0 ]; then
diff --git a/tools/extract_weights_from_tflite/extract.py b/tools/extract_weights_from_tflite/extract.py
index afde08c69..7559ba7e8 100755
--- a/tools/extract_weights_from_tflite/extract.py
+++ b/tools/extract_weights_from_tflite/extract.py
@@ -41,9 +41,9 @@ buffer_name_map = {}
 for t in tensors:
     if 'buffer' in t:
         if t['buffer'] in buffer_name_map:
-            print 'find conflict!!'
-            print t
-            print buffer_name_map
+            print('find conflict!!')
+            print(t)
+            print(buffer_name_map)
         comps = t['name'].split('/')
         names = []
         if len(comps) > 1 and comps[0] == comps[1]:
@@ -60,7 +60,8 @@ for i in range(len(j['buffers'])):
     b = j['buffers'][i]
     if 'data' in b:
         if i not in buffer_name_map:
-            print "buffer %d is not found in buffer_name_map. skip printing the buffer..."
+            print("buffer %d is not found in buffer_name_map. skip printing the buffer..."
+                  % i)
             continue
 
         filename = "%s.npy" % (buffer_name_map[i]['name'])
@@ -83,8 +84,8 @@ for i in range(len(j['buffers'])):
         elif len(shape) == 1:
             pass
         else:
-            print "Undefined length: conversion skipped. shape=", shape
+            print("Undefined length: conversion skipped. shape=", shape)
         #print shape, filename, n.shape
         np.save(filename, n)
 
-print "Done."
+print("Done.")
diff --git a/tools/extract_weights_from_tflite/extract_from_tflite.sh b/tools/extract_weights_from_tflite/extract_from_tflite.sh
index be84f25f3..7bc870bec 100755
--- a/tools/extract_weights_from_tflite/extract_from_tflite.sh
+++ b/tools/extract_weights_from_tflite/extract_from_tflite.sh
@@ -27,5 +27,5 @@ TFLITE_FILE=$1
 TFLITE_FILENAME=${TFLITE_FILE##*\/}
 TFLITE_JSON=${TFLITE_FILENAME%\.tflite}.json
 
-$FLATC --json --strict-json $ROOT_PATH/externals/tensorflow/tensorflow/contrib/lite/schema/schema.fbs -- $TFLITE_FILE
+$FLATC --json --strict-json $ROOT_PATH/externals/tensorflow/tensorflow/lite/schema/schema.fbs -- $TFLITE_FILE
 $SCRIPT_PATH/extract.py $TFLITE_JSON
diff --git a/tools/extract_weights_from_tflite/print_op.py b/tools/extract_weights_from_tflite/print_op.py
index 16aff9720..a946b926c 100755
--- a/tools/extract_weights_from_tflite/print_op.py
+++ b/tools/extract_weights_from_tflite/print_op.py
@@ -48,11 +48,11 @@ for o in operators:
     elif 'builtin_options_type' in o:
         # if we cannot find opcode_index, print option type instead.
         op_name = o['builtin_options_type']
-    print "Layer:", op_name
+    print("Layer:", op_name)
 
-    print "    Input shapes ---"
+    print("    Input shapes ---")
     for inp in o['inputs']:
-        print "      ", tensors[inp]['shape']
-    print "    Output shapes ---"
+        print("      ", tensors[inp]['shape'])
+    print("    Output shapes ---")
     for outp in o['outputs']:
-        print "      ", tensors[outp]['shape']
+        print("      ", tensors[outp]['shape'])
diff --git a/tools/image_importer/image_importer.py b/tools/image_importer/image_importer.py
index 77508e1b6..f849e8879 100755
--- a/tools/image_importer/image_importer.py
+++ b/tools/image_importer/image_importer.py
@@ -25,9 +25,9 @@ if (len(sys.argv) < 3):
 img = Image.open(sys.argv[1])
 outfile = sys.argv[2]
 
-print "Image format = ", img.bits, img.size, img.format
+print("Image format = ", img.bits, img.size, img.format)
 
 with open(outfile, 'wb') as f:
     f.write(img.tobytes())
 
-print "Done."
+print("Done.")
diff --git a/tools/kbenchmark/Args.cc b/tools/kbenchmark/Args.cc
new file mode 100644
index 000000000..204810b87
--- /dev/null
+++ b/tools/kbenchmark/Args.cc
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "Args.h"
+
+#include <iostream>
+#include <boost/filesystem.hpp>
+
+namespace kbenchmark
+{
+
+Args::Args(const int argc, char **argv) noexcept { Initialize(argc, argv); }
+
+void Args::Initialize(const int argc, char **argv)
+{
+  // General options
+  po::options_description general("General options");
+  // clang-format off
+  general.add_options()("help,h", "Display available options")
+    ("config,c", po::value<std::string>(&_config)->required(), "Configuration filename")
+    ("kernel,k", po::value<std::vector<std::string>>(&_kernel)->multitoken()->composing()->required(), "Kernel library name, support multiple kernel libraries")
+    ("reporter,r", po::value<std::string>(&_reporter)->default_value("standard"), "Set reporter types(standard, html, junit, csv)")
+    ("filter,f", po::value<std::string>(&_filter)->default_value(".*"), "Only run benchmarks whose name matches the regular expression pattern")
+    ("verbose,v", po::value<int>(&_verbose)->default_value(0)->implicit_value(true), "Show verbose output")
+    ("output,o", po::value<std::string>(&_output)->default_value(""), "Set additional strings for output file name")
+  ;
+  // clang-format on
+
+  po::variables_map vm;
+  po::store(po::parse_command_line(argc, argv, general), vm);
+
+  try
+  {
+    po::notify(vm);
+  }
+  catch (const boost::program_options::required_option &e)
+  {
+    if (vm.count("help"))
+    {
+      std::cout << general << std::endl;
+      exit(0);
+    }
+    else
+    {
+      throw e;
+    }
+  }
+
+  if (vm.count("help"))
+  {
+    std::cout << general << std::endl;
+    exit(0);
+  }
+
+  if (vm.count("config"))
+  {
+    if (_config.substr(_config.find_last_of(".") + 1) != "config")
+    {
+      std::cerr << "Please specify .config file" << std::endl;
+      exit(1);
+    }
+
+    if (!boost::filesystem::exists(_config))
+    {
+      std::cerr << _config << " file not found" << std::endl;
+      exit(1);
+    }
+  }
+
+  if (vm.count("kernel"))
+  {
+    for (auto &k : _kernel)
+    {
+      if (!boost::filesystem::exists(k))
+      {
+        std::cerr << k << " file not found" << std::endl;
+        exit(1);
+      }
+    }
+  }
+
+  if (vm.count("reporter"))
+  {
+    if (_reporter != "junit" && _reporter != "csv" && _reporter != "html" &&
+        _reporter != "standard")
+    {
+      std::cerr << "Invalid reporter" << std::endl;
+      exit(1);
+    }
+  }
+}
+
+} // namespace kbenchmark
diff --git a/tools/kbenchmark/Args.h b/tools/kbenchmark/Args.h
new file mode 100644
index 000000000..ff1400c12
--- /dev/null
+++ b/tools/kbenchmark/Args.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __KBENCHMARK_ARGS_H__
+#define __KBENCHMARK_ARGS_H__
+
+#include <string>
+#include <vector>
+#include <boost/program_options.hpp>
+
+namespace po = boost::program_options;
+
+namespace kbenchmark
+{
+
+class Args
+{
+public:
+  Args(const int argc, char **argv) noexcept;
+
+  const std::string &config(void) { return _config; }
+  const std::vector<std::string> &kernel(void) { return _kernel; }
+  const std::string &reporter(void) { return _reporter; }
+  const std::string &filter(void) { return _filter; }
+  const std::string &output(void) { return _output; }
+  int verbose(void) { return _verbose; }
+
+private:
+  void Initialize(const int argc, char **argv);
+
+private:
+  std::string _config;
+  std::vector<std::string> _kernel;
+  std::string _reporter;
+  std::string _filter;
+  std::string _output;
+  int _verbose;
+};
+
+} // namespace kbenchmark
+
+#endif // __KBENCHMARK_ARGS_H__
diff --git a/tools/kbenchmark/CMakeLists.txt b/tools/kbenchmark/CMakeLists.txt
new file mode 100644
index 000000000..ebf9a6725
--- /dev/null
+++ b/tools/kbenchmark/CMakeLists.txt
@@ -0,0 +1,29 @@
+if(NOT BUILD_KBENCHMARK)
+  return()
+endif(NOT BUILD_KBENCHMARK)
+
+nnfw_find_package(Nonius QUIET)
+
+if(NOT Nonius_FOUND)
+  return()
+endif(NOT Nonius_FOUND)
+
+nnfw_find_package(Boost QUIET)
+
+if(NOT Boost_FOUND)
+  return()
+endif(NOT Boost_FOUND)
+
+# driver
+file(GLOB_RECURSE SOURCES "*.cc")
+
+add_executable(kbenchmark ${SOURCES})
+target_compile_options(kbenchmark PRIVATE -Wno-psabi)
+target_include_directories(kbenchmark PUBLIC ${CMAKE_CURRENT_SOURCE_DIR})
+target_link_libraries(kbenchmark PUBLIC nonius)
+target_link_libraries(kbenchmark PUBLIC dl)
+target_link_libraries(kbenchmark PUBLIC pthread boost_program_options boost_system boost_filesystem)
+install(TARGETS kbenchmark DESTINATION bin)
+
+# kernel libraries
+add_subdirectory(kernels)
diff --git a/tools/kbenchmark/ConfigFile.h b/tools/kbenchmark/ConfigFile.h
new file mode 100644
index 000000000..d6365a400
--- /dev/null
+++ b/tools/kbenchmark/ConfigFile.h
@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __KBENCHMARK_CONFIG_FILE_H__
+#define __KBENCHMARK_CONFIG_FILE_H__
+
+#include <fstream>
+#include <string>
+#include <algorithm>
+#include <regex>
+#include <map>
+
+namespace
+{
+
+std::string getName(const std::string &src)
+{
+  std::string name{src.substr(0, src.find_last_of("."))};
+
+  std::string op;
+  size_t pos = 0;
+  std::string token{"Main_model_"};
+  if ((pos = name.find(token)) != std::string::npos)
+  {
+    op = name.substr(pos + token.size());
+  }
+  else if ((pos = name.find("Model_#")) != std::string::npos)
+  {
+    op = std::regex_replace(name, std::regex("[^0-9]*([0-9]+)_*"), "$2");
+  }
+  return op;
+}
+
+std::string trim(const std::string &src, const std::string &delims)
+{
+  std::string str{src};
+  for (int i = 0; i < delims.size(); ++i)
+  {
+    str.erase(std::remove(str.begin(), str.end(), delims[i]), str.end());
+  }
+  return str;
+}
+
+} // namespace
+
+namespace kbenchmark
+{
+
+using OperationInfo = std::map<std::string, std::string>;
+
+class ConfigFile
+{
+public:
+  using iterator = std::map<int, OperationInfo>::iterator;
+  using const_iterator = std::map<int, OperationInfo>::const_iterator;
+
+public:
+  ConfigFile(const std::string &config) : _name{getName(config)}
+  {
+    std::ifstream file(config.c_str());
+
+    std::string line;
+    int id;
+    std::string key;
+    std::string value;
+    size_t pos;
+
+    while (std::getline(file, line))
+    {
+      if (!line.length())
+        continue;
+      if (line[0] == '#')
+        continue;
+      if (line[0] == '[')
+      {
+        id = std::stoi(line.substr(1, line.find(']') - 1));
+        continue;
+      }
+      pos = line.find(':');
+      key = line.substr(0, pos);
+      value = trim(line.substr(pos + 1), " []");
+      _contents[id][key] = value;
+    }
+  }
+
+  const std::string name(void) { return _name; }
+
+  iterator begin(void) { return _contents.begin(); }
+  iterator end(void) { return _contents.end(); }
+  const_iterator begin(void) const { return _contents.begin(); }
+  const_iterator end(void) const { return _contents.end(); }
+  const_iterator cbegin(void) const { return _contents.cbegin(); }
+  const_iterator cend(void) const { return _contents.cend(); }
+
+private:
+  std::string _name;
+  std::map<int, OperationInfo> _contents;
+};
+
+} // namespace kbenchmark
+
+#endif // __KBENCHMARK_CONFIG_FILE_H__
diff --git a/tools/kbenchmark/Driver.cc b/tools/kbenchmark/Driver.cc
new file mode 100644
index 000000000..f2874d533
--- /dev/null
+++ b/tools/kbenchmark/Driver.cc
@@ -0,0 +1,147 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "Args.h"
+#include "ConfigFile.h"
+#include "OperationLoader.h"
+
+#include <nonius/nonius.h++>
+
+#include <iostream>
+#include <string>
+
+// NOTE dlfcn.h is not a standard library
+#include <dlfcn.h>
+
+using namespace kbenchmark;
+
+int main(int argc, char *argv[])
+{
+  Args args(argc, argv);
+
+  // nonius::benchmark_registry aka std::vector<nonius::benchmark>
+  nonius::benchmark_registry benchmarks;
+
+  // Load kernel library
+  const std::vector<std::string> &kernel_list = args.kernel();
+  std::vector<void *> khandle_list;
+
+  for (auto &k : kernel_list)
+  {
+    void *khandle;
+    typedef nonius::benchmark_registry &(*benchmark_entry)(void);
+    benchmark_entry kbenchmark_entry;
+    // TODO Check if the paramters are valid
+
+    khandle = dlopen(k.c_str(), RTLD_LAZY);
+    if (khandle == nullptr)
+    {
+      std::cerr << "Fail to dlopen " << k << std::endl;
+      return EINVAL;
+    }
+    char *error;
+    kbenchmark_entry = reinterpret_cast<benchmark_entry>(dlsym(khandle, "benchmark_functions"));
+    if ((error = dlerror()) != nullptr)
+    {
+      dlclose(khandle);
+      std::cerr << error << std::endl;
+      return EINVAL;
+    }
+
+    // Save khandle for dlclose
+    khandle_list.push_back(khandle);
+
+    // Add current kernel benchmark functions to gloal benchmark list
+    nonius::benchmark_registry &kbenchmarks = kbenchmark_entry();
+    benchmarks.insert(std::end(benchmarks), std::begin(kbenchmarks), std::end(kbenchmarks));
+  }
+
+  // Set default test name
+  std::string config_name{args.config()};
+  config_name = config_name.substr(config_name.find_last_of("/") + 1);
+  config_name = config_name.substr(0, config_name.find_last_of("."));
+  std::string test_name{"test_benchmark_" + config_name};
+  if (!args.output().empty())
+  {
+    test_name += (std::string{"_"} + args.output());
+  }
+  std::cout << "Benchmark test name\n    " << test_name << std::endl;
+
+  if (args.verbose())
+  {
+    std::cout << "benchmark functions list:" << std::endl;
+    for (auto &&f : benchmarks)
+    {
+      if (std::regex_match(f.name, std::regex(args.filter())))
+      {
+        std::cout << "    " << f.name << std::endl;
+      }
+    }
+  }
+
+  std::string reporter{args.reporter()};
+  std::string ext{"." + reporter};
+  if (reporter == "standard")
+  {
+    ext = ".txt";
+  }
+
+  // Set noninus configuration
+  nonius::configuration cfg;
+  cfg.reporter = reporter;
+  cfg.filter_pattern = args.filter();
+  cfg.verbose = args.verbose();
+  cfg.title = test_name;
+  cfg.output_file = test_name + ext;
+  cfg.summary = true;
+
+  // Create ConfigFile object from config file
+  ConfigFile cf(args.config());
+
+  // Get OperationLoader instance
+  OperationLoader &opl = OperationLoader::getInstance();
+
+  if (!opl.is_valid(cf.name()))
+  {
+    std::cerr << cf.name() << " is not valid operation" << std::endl;
+  }
+  else
+  {
+    for (auto &c : cf)
+    {
+      if (reporter != "html")
+      {
+        std::string temp_name{test_name + std::string{"_"} + std::to_string(c.first)};
+        cfg.title = temp_name;
+        cfg.output_file = temp_name + ext;
+      }
+
+      nonius::parameters op_params = opl[cf.name()]->params(c.first, c.second);
+      cfg.params.map = cfg.params.map.merged(op_params);
+
+      nonius::go(cfg, benchmarks);
+    }
+  }
+
+  // Release kernel library
+  benchmarks.clear();
+  for (auto khandle : khandle_list)
+  {
+    dlclose(khandle);
+  }
+
+  return 0;
+}
diff --git a/tools/kbenchmark/Operation.h b/tools/kbenchmark/Operation.h
new file mode 100644
index 000000000..4bf1e8c94
--- /dev/null
+++ b/tools/kbenchmark/Operation.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __KBENCHMARK_OPERATION_H__
+#define __KBENCHMARK_OPERATION_H__
+
+#include <nonius/param.h++>
+
+#include "ConfigFile.h"
+
+namespace kbenchmark
+{
+
+class Operation
+{
+public:
+  Operation() = default;
+
+  virtual nonius::parameters params(int layer_num, OperationInfo &info) = 0;
+};
+
+} // namespace kbenchmark
+
+#endif // __KBENCHMARK_OPERATION_H__
diff --git a/tools/kbenchmark/OperationLoader.h b/tools/kbenchmark/OperationLoader.h
new file mode 100644
index 000000000..3659c307c
--- /dev/null
+++ b/tools/kbenchmark/OperationLoader.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __KBENCHMARK_OPERATION_LOADER_H__
+#define __KBENCHMARK_OPERATION_LOADER_H__
+
+#include <string>
+#include <unordered_map>
+
+#include "Operation.h"
+#include "operations/Convolution.h"
+#include "operations/TransposeConv.h"
+
+namespace kbenchmark
+{
+
+class OperationLoader
+{
+public:
+  static OperationLoader &getInstance(void)
+  {
+    static OperationLoader instance;
+    return instance;
+  }
+
+  Operation *operator[](const std::string &name) { return _map[name]; }
+  bool is_valid(const std::string &name) { return _map.count(name); }
+
+private:
+  OperationLoader(void)
+  {
+#define OP(ConfigName, OperationName) _map[ConfigName] = new operation::OperationName();
+#include "Operations.lst"
+#undef OP
+  }
+
+  ~OperationLoader() = default;
+  OperationLoader(const OperationLoader &) = delete;
+  OperationLoader &operator=(const OperationLoader &) = delete;
+
+private:
+  std::unordered_map<std::string, Operation *> _map;
+};
+
+} // namespace kbenchmark
+
+#endif // __KBENCHMARK_OPERATION_LOADER_H__
diff --git a/tools/kbenchmark/Operations.lst b/tools/kbenchmark/Operations.lst
new file mode 100644
index 000000000..6e51af654
--- /dev/null
+++ b/tools/kbenchmark/Operations.lst
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef OP
+#error  Define OP before including this file
+#endif
+
+// Config Name        Operation Name
+OP("CONV_2D",         Convolution)
+OP("TRANSPOSE_CONV",  TransposeConv)
diff --git a/tools/kbenchmark/README.md b/tools/kbenchmark/README.md
new file mode 100644
index 000000000..45e4970f0
--- /dev/null
+++ b/tools/kbenchmark/README.md
@@ -0,0 +1,81 @@
+# kbenchmark
+
+## Purpose
+
+Most people can use several neural network kernel libraries to inference AI models on Linux system. Each kernel library is implemented in a number of ways, which can give different performance to different configurations. This benchmark tool can help you measure the system's performance with each configuration, and identify possible issues on your system.
+
+## Prerequisites
+
+### Relevant libraries
+This script is based on [libnonius](https://github.com/libnonius/nonius) micro-benchmarking framework. This micro-benchmarking framework will be downloaded automatically if you set the `BUILD_KBENCHMARK` configuration to on and build nnfw. If you want to download manually, please use the following path.
+* [Download Nonius header files](https://github.com/libnonius/nonius/releases)
+
+### Configuration file
+This tool works depending on a configuration file generated from [summarize_tflite.sh](nnfw/blob/master/tools/tflkit/summarize_tflite.sh). You can make a configuration file using the following commands.
+```
+nnfw$ cd tools/tflkit
+nnfw/tools/tflkit$ ./summarize_tflite.sh [tflite model file] -c -p [file prefix]
+```
+Or
+```
+nnfw$ cd tools/tflitefile_tool
+nnfw/tools/tflitefile_tool$ python model_parser.py [tflite model file] -c -p [file prefix]
+```
+
+The generated configuration file will have the following format:
+```
+tools/tflitefile_tool$ cat inceptionv3_slim_Main_model_CONV_2D.config | head -n 25
+# CONV_2D, Total count: 95
+
+[0]
+input: [1, 299, 299, 3]
+input_type: FLOAT32
+weights: [32, 3, 3, 3]
+weights_type: FLOAT32
+bias: [32]
+bias_type: FLOAT32
+output_counts: 1
+output0: [1, 149, 149, 32]
+output0_type: FLOAT32
+stride_w: 2
+stride_h: 2
+dilation_w: 1
+dilation_h: 1
+padding: VALID
+fused_act: RELU
+
+[1]
+input: [1, 149, 149, 32]
+input_type: FLOAT32
+weights: [32, 3, 3, 32]
+weights_type: FLOAT32
+bias: [32]
+```
+
+### Benchmark kernel library
+This tool needs kernel benchmark libraries. The kernel benchmark library depends on `nonius` c++ micro-benchmarking framework. You can get the detail guideline in [libnonius/nonius](https://github.com/libnonius/nonius) github repository. The `nonius` library uses morden C++ and is header only. The kernel benchmark libraries will be linked to `kbenchmark` tool using dynamic linking loader. So, it should export the `nonius::benchmark_registry &benchmark_functions(void)` symbol. This symbol should return the nonius benchmark test lists. You can see all benchmark test lists that are executed using `--verbose` option as log.
+
+## kbenchmark
+
+### Available commands
+The binary takes the following required parameters:
+
+* `config`: `string` \
+  The path to the configuration file.
+* `kernel`: `string` \
+  The path to the benchmark kernel library file. It allows multiple kernel libraries either by using space or by repeatedly calling `--kernel`.
+
+and the following optional parameters:
+
+* `reporter`: `string` \
+  Set the reporter types among `standard`, `html`, `junit` or `csv`. Default reporter type is `standard`.
+* `output`: `string` \
+  Set the additional strings for output file name.
+* `help`: \
+  Display available options.
+* `verbose`: \
+  Show verbose messages.
+
+### Operations
+The `OperationLoader` loads each operation information from configuration file. This loader takes the last string of the configuration file name as a key of `OperationLoader` map. So the configuration file should not be changed. For example, if the configuration file name is a `inceptionv3_slim_Main_model_CONV_2D.test.config`, the `OperationLoader` takes `CONV_2D` as a key of map. The `CONV_2D` key is connected to `Convolution` class in `operations/Convolution.h`. This related information is described in `Operations.lst` file. Each operation class will return the `nonius::parameters` from `OperationInfo` in `ConfigFile` class.
+
diff --git a/tools/kbenchmark/Utils.h b/tools/kbenchmark/Utils.h
new file mode 100644
index 000000000..cda6c3263
--- /dev/null
+++ b/tools/kbenchmark/Utils.h
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __KBENCHMARK_UTILS_H__
+#define __KBENCHMARK_UTILS_H__
+
+#include <sstream>
+#include <string>
+#include <vector>
+#include <cassert>
+
+namespace kbenchmark
+{
+
+void check_valid_key(const std::string &key, OperationInfo &info)
+{
+  OperationInfo::const_iterator it;
+  it = info.find(key);
+  assert(it != info.end());
+}
+
+std::vector<int> dims(const std::string &src)
+{
+  std::vector<int> dim;
+
+  std::stringstream ss(src);
+  int i;
+  while (ss >> i)
+  {
+    dim.push_back(i);
+    if (ss.peek() == ',')
+      ss.ignore();
+  }
+  return dim;
+}
+
+std::vector<int> get_key_dims(const std::string &key, OperationInfo &info)
+{
+  check_valid_key(key, info);
+  return dims(info[key]);
+}
+
+int get_key_int(const std::string &key, OperationInfo &info)
+{
+  check_valid_key(key, info);
+  return std::stoi(info[key]);
+}
+
+std::string get_key_string(const std::string &key, OperationInfo &info)
+{
+  check_valid_key(key, info);
+  return info[key];
+}
+
+} // namespace kbenchmark
+
+#endif // __KBENCHMARK_UTILS_H__
diff --git a/tools/kbenchmark/kernels/CMakeLists.txt b/tools/kbenchmark/kernels/CMakeLists.txt
new file mode 100644
index 000000000..5ea6cdadd
--- /dev/null
+++ b/tools/kbenchmark/kernels/CMakeLists.txt
@@ -0,0 +1 @@
+add_subdirectories()
diff --git a/tools/kbenchmark/kernels/acl_cl/CMakeLists.txt b/tools/kbenchmark/kernels/acl_cl/CMakeLists.txt
new file mode 100644
index 000000000..c727905a6
--- /dev/null
+++ b/tools/kbenchmark/kernels/acl_cl/CMakeLists.txt
@@ -0,0 +1,20 @@
+nnfw_find_package(ARMCompute QUIET)
+if(NOT ARMCompute_FOUND)
+  return()
+endif(NOT ARMCompute_FOUND)
+
+function(add_kben_acl_cl_library)
+  cmake_parse_arguments(ARG "" "NAME" "SOURCES" ${ARGN})
+
+  add_library(${ARG_NAME} SHARED ${ARG_SOURCES})
+  target_compile_options(${ARG_NAME} PRIVATE -Wno-psabi)
+  target_include_directories(${ARG_NAME} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/..)
+  target_link_libraries(${ARG_NAME} nonius)
+  target_link_libraries(${ARG_NAME} arm_compute)
+  target_link_libraries(${ARG_NAME} arm_compute_ex)
+  target_link_libraries(${ARG_NAME} pthread)
+  install(TARGETS ${ARG_NAME} DESTINATION lib/kben)
+endfunction(add_kben_acl_cl_library)
+
+add_kben_acl_cl_library(NAME kben_acl_cl_conv SOURCES Convolution.cpp)
+add_kben_acl_cl_library(NAME kben_acl_cl_transpose_conv SOURCES TransposeConv.cpp)
diff --git a/tools/kbenchmark/kernels/acl_cl/Convolution.cpp b/tools/kbenchmark/kernels/acl_cl/Convolution.cpp
new file mode 100644
index 000000000..37d179ac3
--- /dev/null
+++ b/tools/kbenchmark/kernels/acl_cl/Convolution.cpp
@@ -0,0 +1,514 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file Conv2D benchmark with various algorithms (draft version)
+ */
+
+#include <nonius/nonius.h++>
+
+#include <arm_compute/core/Types.h>
+#include <arm_compute/runtime/CL/CLScheduler.h>
+#include <arm_compute/runtime/CL/CLFunctions.h>
+
+#include <cstdint>
+#include <cassert>
+#include <stdexcept>
+
+using namespace arm_compute;
+
+//
+// Helpers
+//
+namespace
+{
+
+enum Layout
+{
+  NCHW,
+  NHWC
+};
+
+struct Initializer
+{
+  Initializer() { CLScheduler::get().default_init(); }
+};
+
+Initializer initializer;
+
+TensorInfo make_info(uint32_t N)
+{
+  TensorShape shape{N};
+  return TensorInfo{shape, 1, DataType::F32};
+}
+
+template <enum Layout> TensorInfo make_info(uint32_t N, uint32_t C, uint32_t H, uint32_t W);
+
+template <> TensorInfo make_info<NCHW>(uint32_t N, uint32_t C, uint32_t H, uint32_t W)
+{
+  TensorShape shape{W, H, C, N};
+  TensorInfo info{shape, 1, DataType::F32};
+  info.set_data_layout(DataLayout::NCHW);
+  return info;
+}
+
+template <> TensorInfo make_info<NHWC>(uint32_t N, uint32_t C, uint32_t H, uint32_t W)
+{
+  TensorShape shape{C, W, H, N};
+  TensorInfo info{shape, 1, DataType::F32};
+  info.set_data_layout(DataLayout::NHWC);
+  return info;
+}
+
+inline void check(const Status &status)
+{
+  if (!status)
+  {
+    std::cerr << status.error_description() << std::endl;
+    throw std::runtime_error{"ERROR"};
+  }
+}
+
+inline bool is_odd(uint32_t n) { return (n % 2 != 0) ? true : false; }
+
+} // namespace
+
+//
+// Benchmark Parameters
+//
+NONIUS_PARAM(BATCH, 1);
+
+NONIUS_PARAM(IFM_C, 3);
+NONIUS_PARAM(IFM_H, 244);
+NONIUS_PARAM(IFM_W, 244);
+
+NONIUS_PARAM(OFM_C, 3);
+NONIUS_PARAM(OFM_H, 244);
+NONIUS_PARAM(OFM_W, 244);
+
+NONIUS_PARAM(KER_H, 3);
+NONIUS_PARAM(KER_W, 3);
+
+NONIUS_PARAM(STRIDE_H, 1);
+NONIUS_PARAM(STRIDE_W, 1);
+
+NONIUS_PARAM(PADDING, std::string{"SAME"})
+NONIUS_PARAM(FUSED_ACT, std::string{"RELU"})
+
+//
+// Configuration Helpers
+//
+namespace
+{
+
+struct Configuration
+{
+  uint32_t ifm_N;
+  uint32_t ifm_C;
+  uint32_t ifm_H;
+  uint32_t ifm_W;
+
+  uint32_t ofm_N;
+  uint32_t ofm_C;
+  uint32_t ofm_H;
+  uint32_t ofm_W;
+
+  uint32_t ker_N;
+  uint32_t ker_C;
+  uint32_t ker_H;
+  uint32_t ker_W;
+
+  uint32_t vertical_stride;
+  uint32_t horizontal_stride;
+
+  std::string padding;
+  std::string fused_act;
+
+  uint32_t top_padding;
+  uint32_t bottom_padding;
+  uint32_t left_padding;
+  uint32_t right_padding;
+
+  Configuration(nonius::chronometer meter)
+  {
+    ifm_N = meter.param<BATCH>();
+    ifm_C = meter.param<IFM_C>();
+    ifm_H = meter.param<IFM_H>();
+    ifm_W = meter.param<IFM_W>();
+
+    ofm_N = meter.param<BATCH>();
+    ofm_C = meter.param<OFM_C>();
+    ofm_H = meter.param<OFM_H>();
+    ofm_W = meter.param<OFM_W>();
+
+    ker_N = meter.param<OFM_C>();
+    ker_C = meter.param<IFM_C>();
+    ker_H = meter.param<KER_H>();
+    ker_W = meter.param<KER_W>();
+
+    vertical_stride = meter.param<STRIDE_H>();
+    horizontal_stride = meter.param<STRIDE_W>();
+
+    padding = meter.param<PADDING>();
+    fused_act = meter.param<FUSED_ACT>();
+
+    assert((ifm_H - ker_H) % vertical_stride == 0);
+    assert((ifm_W - ker_H) % horizontal_stride == 0);
+
+    uint32_t const effective_ofm_H = (ifm_H - ker_H) / vertical_stride + 1;
+    uint32_t const effective_ofm_W = (ifm_W - ker_H) / horizontal_stride + 1;
+
+    assert(ofm_H >= effective_ofm_H);
+    assert(ofm_W >= effective_ofm_W);
+
+    uint32_t const pad_H = ofm_H - effective_ofm_H;
+    uint32_t const pad_W = ofm_W - effective_ofm_W;
+
+    top_padding = pad_H / 2;
+    bottom_padding = pad_H / 2;
+    left_padding = pad_W / 2;
+    right_padding = pad_W / 2;
+
+    if (is_odd(pad_H))
+      top_padding += 1;
+    if (is_odd(pad_W))
+      left_padding += 1;
+  }
+
+  template <Layout L> TensorInfo src_info() const
+  {
+    return make_info<L>(ifm_N, ifm_C, ifm_H, ifm_W);
+  }
+  template <Layout L> TensorInfo dst_info() const
+  {
+    return make_info<L>(ofm_N, ofm_C, ofm_H, ofm_W);
+  }
+  template <Layout L> TensorInfo ker_info() const
+  {
+    return make_info<L>(ker_N, ker_C, ker_H, ker_W);
+  }
+  TensorInfo bias_info(void) const { return make_info(ker_N); }
+
+  PadStrideInfo pad_stride_info(void) const
+  {
+    return PadStrideInfo{horizontal_stride,
+                         vertical_stride,
+                         left_padding,
+                         right_padding,
+                         top_padding,
+                         bottom_padding,
+                         DimensionRoundingType::FLOOR};
+  }
+};
+
+} // namespace
+
+//
+// Benchmark Implementations
+//
+namespace
+{
+
+inline nonius::benchmark_registry &local_benchmark_registry()
+{
+  static nonius::benchmark_registry registry;
+  return registry;
+}
+
+} // namespace
+
+#define NONIUS_LOCAL_BENCHMARK(name, ...)                                              \
+  namespace                                                                            \
+  {                                                                                    \
+  static ::nonius::benchmark_registrar                                                 \
+      NONIUS_DETAIL_UNIQUE_NAME(benchmark_registrar)(local_benchmark_registry(), name, \
+                                                     __VA_ARGS__);                     \
+  }
+
+NONIUS_LOCAL_BENCHMARK("CLDirectConvolutionLayer_NCHW", [](nonius::chronometer meter) {
+  CLDirectConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  CLTensor src_tensor{};
+  CLTensor dst_tensor{};
+  CLTensor ker_tensor{};
+  CLTensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NCHW>());
+  dst_tensor.allocator()->init(p.dst_info<NCHW>());
+  ker_tensor.allocator()->init(p.ker_info<NCHW>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  try
+  {
+    check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                        p.pad_stride_info()));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run!
+  meter.measure([&](int) {
+    conv.run();
+    CLScheduler::get().sync();
+  });
+})
+
+NONIUS_LOCAL_BENCHMARK("CLDirectConvolutionLayer_NHWC", [](nonius::chronometer meter) {
+  CLDirectConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  CLTensor src_tensor{};
+  CLTensor dst_tensor{};
+  CLTensor ker_tensor{};
+  CLTensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NHWC>());
+  dst_tensor.allocator()->init(p.dst_info<NHWC>());
+  ker_tensor.allocator()->init(p.ker_info<NHWC>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  try
+  {
+    check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                        p.pad_stride_info()));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run!
+  meter.measure([&](int) {
+    conv.run();
+    CLScheduler::get().sync();
+  });
+})
+
+NONIUS_LOCAL_BENCHMARK("CLGEMMConvolutionLayer_NCHW", [](nonius::chronometer meter) {
+  CLGEMMConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  CLTensor src_tensor{};
+  CLTensor dst_tensor{};
+  CLTensor ker_tensor{};
+  CLTensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NCHW>());
+  dst_tensor.allocator()->init(p.dst_info<NCHW>());
+  ker_tensor.allocator()->init(p.ker_info<NCHW>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  try
+  {
+    check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                        p.pad_stride_info()));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run
+  meter.measure([&](int) {
+    conv.run();
+    CLScheduler::get().sync();
+  });
+})
+
+NONIUS_LOCAL_BENCHMARK("CLGEMMConvolutionLayer_NHWC", [](nonius::chronometer meter) {
+  CLGEMMConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  CLTensor src_tensor{};
+  CLTensor dst_tensor{};
+  CLTensor ker_tensor{};
+  CLTensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NHWC>());
+  dst_tensor.allocator()->init(p.dst_info<NHWC>());
+  ker_tensor.allocator()->init(p.ker_info<NHWC>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  try
+  {
+    check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                        p.pad_stride_info()));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run
+  meter.measure([&](int) {
+    conv.run();
+    CLScheduler::get().sync();
+  });
+})
+
+NONIUS_LOCAL_BENCHMARK("CLWinogradConvolutionLayer_NCHW", [](nonius::chronometer meter) {
+  CLWinogradConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  CLTensor src_tensor{};
+  CLTensor dst_tensor{};
+  CLTensor ker_tensor{};
+  CLTensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NCHW>());
+  dst_tensor.allocator()->init(p.dst_info<NCHW>());
+  ker_tensor.allocator()->init(p.ker_info<NCHW>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  try
+  {
+    check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                        p.pad_stride_info()));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run
+  meter.measure([&](int) {
+    conv.run();
+    CLScheduler::get().sync();
+  });
+})
+
+NONIUS_LOCAL_BENCHMARK("CLWinogradConvolutionLayer_NHWC", [](nonius::chronometer meter) {
+  CLWinogradConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  CLTensor src_tensor{};
+  CLTensor dst_tensor{};
+  CLTensor ker_tensor{};
+  CLTensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NHWC>());
+  dst_tensor.allocator()->init(p.dst_info<NHWC>());
+  ker_tensor.allocator()->init(p.ker_info<NHWC>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  try
+  {
+    check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                        p.pad_stride_info()));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run
+  meter.measure([&](int) {
+    conv.run();
+    CLScheduler::get().sync();
+  });
+})
+
+extern "C" nonius::benchmark_registry &benchmark_functions(void)
+{
+  return local_benchmark_registry();
+}
diff --git a/tools/kbenchmark/kernels/acl_cl/TransposeConv.cpp b/tools/kbenchmark/kernels/acl_cl/TransposeConv.cpp
new file mode 100644
index 000000000..8278a61d3
--- /dev/null
+++ b/tools/kbenchmark/kernels/acl_cl/TransposeConv.cpp
@@ -0,0 +1,393 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file TransposeConv benchmark with various algorithms
+ */
+
+#include <nonius/nonius.h++>
+
+#include <arm_compute/core/Types.h>
+#include <arm_compute/runtime/CL/CLScheduler.h>
+#include <arm_compute/runtime/CL/CLFunctions.h>
+#include <arm_compute/runtime/CL/CLFunctionsEx.h>
+
+#include <cstdint>
+#include <cassert>
+#include <stdexcept>
+
+#include "acl_common/Utils.h"
+
+using namespace arm_compute;
+using namespace kbenchmark::kernels::acl_common;
+
+//
+// Helpers
+//
+namespace
+{
+
+enum Layout
+{
+  NCHW,
+  NHWC
+};
+
+struct Initializer
+{
+  Initializer() { CLScheduler::get().default_init(); }
+};
+
+Initializer initializer;
+
+TensorInfo make_info(uint32_t N)
+{
+  TensorShape shape{N};
+  return TensorInfo{shape, 1, DataType::F32};
+}
+
+template <enum Layout> TensorInfo make_info(uint32_t N, uint32_t C, uint32_t H, uint32_t W);
+
+template <> TensorInfo make_info<NCHW>(uint32_t N, uint32_t C, uint32_t H, uint32_t W)
+{
+  TensorShape shape{W, H, C, N};
+  TensorInfo info{shape, 1, DataType::F32};
+  info.set_data_layout(DataLayout::NCHW);
+  return info;
+}
+
+template <> TensorInfo make_info<NHWC>(uint32_t N, uint32_t C, uint32_t H, uint32_t W)
+{
+  TensorShape shape{C, W, H, N};
+  TensorInfo info{shape, 1, DataType::F32};
+  info.set_data_layout(DataLayout::NHWC);
+  return info;
+}
+
+inline void check(const Status &status)
+{
+  if (!status)
+  {
+    std::cerr << status.error_description() << std::endl;
+    throw std::runtime_error{"ERROR"};
+  }
+}
+
+inline bool is_odd(uint32_t n) { return (n % 2 != 0) ? true : false; }
+
+} // namespace
+
+//
+// Benchmark Parameters
+//
+NONIUS_PARAM(BATCH, 1);
+
+NONIUS_PARAM(IFM_C, 3);
+NONIUS_PARAM(IFM_H, 244);
+NONIUS_PARAM(IFM_W, 244);
+
+NONIUS_PARAM(OFM_C, 3);
+NONIUS_PARAM(OFM_H, 244);
+NONIUS_PARAM(OFM_W, 244);
+
+NONIUS_PARAM(KER_H, 3);
+NONIUS_PARAM(KER_W, 3);
+
+NONIUS_PARAM(STRIDE_H, 1);
+NONIUS_PARAM(STRIDE_W, 1);
+
+NONIUS_PARAM(PADDING, std::string{"SAME"})
+
+//
+// Configuration Helpers
+//
+namespace
+{
+
+struct Configuration
+{
+  uint32_t ifm_N;
+  uint32_t ifm_C;
+  uint32_t ifm_H;
+  uint32_t ifm_W;
+
+  uint32_t ofm_N;
+  uint32_t ofm_C;
+  uint32_t ofm_H;
+  uint32_t ofm_W;
+
+  uint32_t ker_N;
+  uint32_t ker_C;
+  uint32_t ker_H;
+  uint32_t ker_W;
+
+  uint32_t vertical_stride;
+  uint32_t horizontal_stride;
+
+  PadStrideInfo deconv_info;
+
+  uint32_t inner_border_right;
+  uint32_t inner_border_top;
+
+  Configuration(nonius::chronometer meter)
+  {
+    ifm_N = meter.param<BATCH>();
+    ifm_C = meter.param<IFM_C>();
+    ifm_H = meter.param<IFM_H>();
+    ifm_W = meter.param<IFM_W>();
+
+    ofm_N = meter.param<BATCH>();
+    ofm_C = meter.param<OFM_C>();
+    ofm_H = meter.param<OFM_H>();
+    ofm_W = meter.param<OFM_W>();
+
+    ker_N = meter.param<OFM_C>();
+    ker_C = meter.param<IFM_C>();
+    ker_H = meter.param<KER_H>();
+    ker_W = meter.param<KER_W>();
+
+    vertical_stride = meter.param<STRIDE_H>();
+    horizontal_stride = meter.param<STRIDE_W>();
+
+    // NOTE The padding calculation formula of TransposeConv is opposite to Conv.
+    //      So the location of ifm and ofm is changed.
+    auto padding_info = calculatePadding(meter.param<PADDING>(), ofm_H, ofm_W, ifm_H, ifm_W,
+                                         vertical_stride, horizontal_stride, ker_H, ker_W);
+
+    inner_border_right = padding_info.right - padding_info.left;
+    inner_border_top = padding_info.bottom - padding_info.top;
+
+    padding_info.left = padding_info.right;
+    padding_info.top = padding_info.bottom;
+
+    deconv_info = asPadStrideInfo(padding_info, vertical_stride, horizontal_stride);
+  }
+
+  template <Layout L> TensorInfo src_info() const
+  {
+    return make_info<L>(ifm_N, ifm_C, ifm_H, ifm_W);
+  }
+  template <Layout L> TensorInfo dst_info() const
+  {
+    return make_info<L>(ofm_N, ofm_C, ofm_H, ofm_W);
+  }
+  template <Layout L> TensorInfo ker_info() const
+  {
+    return make_info<L>(ker_N, ker_C, ker_H, ker_W);
+  }
+  TensorInfo bias_info(void) const { return make_info(ker_N); }
+};
+
+} // namespace
+
+//
+// Benchmark Implementations
+//
+namespace
+{
+
+inline nonius::benchmark_registry &local_benchmark_registry()
+{
+  static nonius::benchmark_registry registry;
+  return registry;
+}
+
+} // namespace
+
+#define NONIUS_LOCAL_BENCHMARK(name, ...)                                              \
+  namespace                                                                            \
+  {                                                                                    \
+  static ::nonius::benchmark_registrar                                                 \
+      NONIUS_DETAIL_UNIQUE_NAME(benchmark_registrar)(local_benchmark_registry(), name, \
+                                                     __VA_ARGS__);                     \
+  }
+
+NONIUS_LOCAL_BENCHMARK("CLDeconvolutionLayer_NCHW", [](nonius::chronometer meter) {
+  CLDeconvolutionLayer deconv;
+
+  // Configure
+  Configuration p{meter};
+
+  CLTensor src_tensor{};
+  CLTensor dst_tensor{};
+  CLTensor ker_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NCHW>());
+  dst_tensor.allocator()->init(p.dst_info<NCHW>());
+  ker_tensor.allocator()->init(p.ker_info<NCHW>());
+
+  try
+  {
+    check(deconv.validate(src_tensor.info(), ker_tensor.info(), nullptr, dst_tensor.info(),
+                          p.deconv_info, p.inner_border_right, p.inner_border_top));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  deconv.configure(&src_tensor, &ker_tensor, nullptr, &dst_tensor, p.deconv_info,
+                   p.inner_border_right, p.inner_border_top);
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run!
+  meter.measure([&](int) {
+    deconv.run();
+    CLScheduler::get().sync();
+  });
+})
+
+NONIUS_LOCAL_BENCHMARK("CLDeconvolutionLayer_NHWC", [](nonius::chronometer meter) {
+  CLDeconvolutionLayer deconv;
+
+  // Configure
+  Configuration p{meter};
+
+  CLTensor src_tensor{};
+  CLTensor dst_tensor{};
+  CLTensor ker_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NHWC>());
+  dst_tensor.allocator()->init(p.dst_info<NHWC>());
+  ker_tensor.allocator()->init(p.ker_info<NHWC>());
+
+  try
+  {
+    check(deconv.validate(src_tensor.info(), ker_tensor.info(), nullptr, dst_tensor.info(),
+                          p.deconv_info, p.inner_border_right, p.inner_border_top));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  deconv.configure(&src_tensor, &ker_tensor, nullptr, &dst_tensor, p.deconv_info,
+                   p.inner_border_right, p.inner_border_top);
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run!
+  meter.measure([&](int) {
+    deconv.run();
+    CLScheduler::get().sync();
+  });
+})
+
+NONIUS_LOCAL_BENCHMARK("CLDeconvolutionLayerEx_NCHW", [](nonius::chronometer meter) {
+  CLDeconvolutionLayerEx deconv;
+
+  // Configure
+  Configuration p{meter};
+
+  CLTensor src_tensor{};
+  CLTensor dst_tensor{};
+  CLTensor ker_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NCHW>());
+  dst_tensor.allocator()->init(p.dst_info<NCHW>());
+  ker_tensor.allocator()->init(p.ker_info<NCHW>());
+
+  try
+  {
+    check(deconv.validate(src_tensor.info(), ker_tensor.info(), nullptr, dst_tensor.info(),
+                          p.deconv_info, p.inner_border_right, p.inner_border_top));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  deconv.configure(&src_tensor, &ker_tensor, nullptr, &dst_tensor, p.deconv_info,
+                   p.inner_border_right, p.inner_border_top);
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run!
+  meter.measure([&](int) {
+    deconv.run();
+    CLScheduler::get().sync();
+  });
+})
+
+NONIUS_LOCAL_BENCHMARK("CLDeconvolutionLayerEx_NHWC", [](nonius::chronometer meter) {
+  CLDeconvolutionLayerEx deconv;
+
+  // Configure
+  Configuration p{meter};
+
+  CLTensor src_tensor{};
+  CLTensor dst_tensor{};
+  CLTensor ker_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NHWC>());
+  dst_tensor.allocator()->init(p.dst_info<NHWC>());
+  ker_tensor.allocator()->init(p.ker_info<NHWC>());
+
+  try
+  {
+    check(deconv.validate(src_tensor.info(), ker_tensor.info(), nullptr, dst_tensor.info(),
+                          p.deconv_info, p.inner_border_right, p.inner_border_top));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  deconv.configure(&src_tensor, &ker_tensor, nullptr, &dst_tensor, p.deconv_info,
+                   p.inner_border_right, p.inner_border_top);
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run!
+  meter.measure([&](int) {
+    deconv.run();
+    CLScheduler::get().sync();
+  });
+})
+
+extern "C" nonius::benchmark_registry &benchmark_functions(void)
+{
+  return local_benchmark_registry();
+}
diff --git a/tools/kbenchmark/kernels/acl_common/Utils.h b/tools/kbenchmark/kernels/acl_common/Utils.h
new file mode 100644
index 000000000..2f3648d9b
--- /dev/null
+++ b/tools/kbenchmark/kernels/acl_common/Utils.h
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __KBENCHMARK_KERNELS_ACL_COMMON_UTILS_H__
+#define __KBENCHMARK_KERNELS_ACL_COMMON_UTILS_H__
+
+#include <algorithm>
+
+using namespace arm_compute;
+
+namespace kbenchmark
+{
+namespace kernels
+{
+namespace acl_common
+{
+
+struct PaddingInfo
+{
+  uint32_t top;
+  uint32_t bottom;
+  uint32_t left;
+  uint32_t right;
+};
+
+PaddingInfo calculatePadding(const std::string &padding_name, const uint32_t ifm_H,
+                             const uint32_t ifm_W, const uint32_t ofm_H, const uint32_t ofm_W,
+                             const uint32_t vertical_stride, const uint32_t horizontal_stride,
+                             const uint32_t ker_H, const uint32_t ker_W)
+{
+  uint32_t top;
+  uint32_t bottom;
+  uint32_t left;
+  uint32_t right;
+
+  if (padding_name == "VALID")
+  {
+    top = bottom = left = right = 0;
+  }
+  else if (padding_name == "SAME")
+  {
+    const int32_t vertical_needed_input = (ofm_H - 1) * vertical_stride + ker_H;
+    const int32_t vertical_total_padding = std::max(0, vertical_needed_input - (int32_t)ifm_H);
+
+    const int32_t horizontal_needed_input = (ofm_W - 1) * horizontal_stride + ker_W;
+    const int32_t horizontal_total_padding = std::max(0, horizontal_needed_input - (int32_t)ifm_W);
+
+    top = vertical_total_padding / 2;
+    bottom = (vertical_total_padding + 1) / 2;
+    left = horizontal_total_padding / 2;
+    right = (horizontal_total_padding + 1) / 2;
+  }
+
+  return PaddingInfo{top, bottom, left, right};
+}
+
+PadStrideInfo asPadStrideInfo(const PaddingInfo &padding, uint32_t vertical_stride,
+                              uint32_t horizontal_stride)
+{
+  return PadStrideInfo{horizontal_stride,
+                       vertical_stride,
+                       padding.left,
+                       padding.right,
+                       padding.top,
+                       padding.bottom,
+                       DimensionRoundingType::FLOOR};
+}
+
+ActivationLayerInfo asActivationLayerInfo(const std::string &act_name)
+{
+  if (act_name == "NONE")
+  {
+    return ActivationLayerInfo{};
+  }
+  else if (act_name == "RELU")
+  {
+    return ActivationLayerInfo{ActivationLayerInfo::ActivationFunction::RELU};
+  }
+  else
+  {
+    throw std::runtime_error{"Not support activation layer info"};
+  }
+}
+
+} // namespace acl_common
+} // namespace kernels
+} // namespace kbenchmark
+
+#endif // __KBENCHMARK_KERNELS_ACL_COMMON_UTILS_H__
diff --git a/tools/kbenchmark/kernels/acl_neon/CMakeLists.txt b/tools/kbenchmark/kernels/acl_neon/CMakeLists.txt
new file mode 100644
index 000000000..54afdab09
--- /dev/null
+++ b/tools/kbenchmark/kernels/acl_neon/CMakeLists.txt
@@ -0,0 +1,19 @@
+nnfw_find_package(ARMCompute QUIET)
+if(NOT ARMCompute_FOUND)
+  return()
+endif(NOT ARMCompute_FOUND)
+
+function(add_kben_acl_neon_library)
+  cmake_parse_arguments(ARG "" "NAME" "SOURCES" ${ARGN})
+
+  add_library(${ARG_NAME} SHARED ${ARG_SOURCES})
+  target_compile_options(${ARG_NAME} PRIVATE -Wno-psabi)
+  target_include_directories(${ARG_NAME} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/..)
+  target_link_libraries(${ARG_NAME} nonius)
+  target_link_libraries(${ARG_NAME} arm_compute)
+  target_link_libraries(${ARG_NAME} pthread)
+  install(TARGETS ${ARG_NAME} DESTINATION lib/kben)
+endfunction(add_kben_acl_neon_library)
+
+add_kben_acl_neon_library(NAME kben_acl_neon_conv SOURCES Convolution.cpp)
+add_kben_acl_neon_library(NAME kben_acl_neon_transpose_conv SOURCES TransposeConv.cpp)
diff --git a/tools/kbenchmark/kernels/acl_neon/Convolution.cpp b/tools/kbenchmark/kernels/acl_neon/Convolution.cpp
new file mode 100644
index 000000000..2d19cb21e
--- /dev/null
+++ b/tools/kbenchmark/kernels/acl_neon/Convolution.cpp
@@ -0,0 +1,489 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file Conv2D benchmark with various algorithms (draft version)
+ */
+
+#include <nonius/nonius.h++>
+
+#include <arm_compute/core/Types.h>
+#include <arm_compute/runtime/NEON/NEScheduler.h>
+#include <arm_compute/runtime/NEON/NEFunctions.h>
+
+#include <cstdint>
+#include <cassert>
+#include <stdexcept>
+
+using namespace arm_compute;
+
+//
+// Helpers
+//
+namespace
+{
+
+enum Layout
+{
+  NCHW,
+  NHWC
+};
+
+TensorInfo make_info(uint32_t N)
+{
+  TensorShape shape{N};
+  return TensorInfo{shape, 1, DataType::F32};
+}
+
+template <enum Layout> TensorInfo make_info(uint32_t N, uint32_t C, uint32_t H, uint32_t W);
+
+template <> TensorInfo make_info<NCHW>(uint32_t N, uint32_t C, uint32_t H, uint32_t W)
+{
+  TensorShape shape{W, H, C, N};
+  TensorInfo info{shape, 1, DataType::F32};
+  info.set_data_layout(DataLayout::NCHW);
+  return info;
+}
+
+template <> TensorInfo make_info<NHWC>(uint32_t N, uint32_t C, uint32_t H, uint32_t W)
+{
+  TensorShape shape{C, W, H, N};
+  TensorInfo info{shape, 1, DataType::F32};
+  info.set_data_layout(DataLayout::NHWC);
+  return info;
+}
+
+inline void check(const Status &status)
+{
+  if (!status)
+  {
+    std::cerr << status.error_description() << std::endl;
+    throw std::runtime_error{"ERROR"};
+  }
+}
+
+inline bool is_odd(uint32_t n) { return (n % 2 != 0) ? true : false; }
+
+} // namespace
+
+//
+// Benchmark Parameters
+//
+NONIUS_PARAM(BATCH, 1);
+
+NONIUS_PARAM(IFM_C, 3);
+NONIUS_PARAM(IFM_H, 244);
+NONIUS_PARAM(IFM_W, 244);
+
+NONIUS_PARAM(OFM_C, 3);
+NONIUS_PARAM(OFM_H, 244);
+NONIUS_PARAM(OFM_W, 244);
+
+NONIUS_PARAM(KER_H, 3);
+NONIUS_PARAM(KER_W, 3);
+
+NONIUS_PARAM(STRIDE_H, 1);
+NONIUS_PARAM(STRIDE_W, 1);
+
+NONIUS_PARAM(PADDING, std::string{"SAME"})
+NONIUS_PARAM(FUSED_ACT, std::string{"RELU"})
+
+//
+// Configuration Helpers
+//
+namespace
+{
+
+struct Configuration
+{
+  uint32_t ifm_N;
+  uint32_t ifm_C;
+  uint32_t ifm_H;
+  uint32_t ifm_W;
+
+  uint32_t ofm_N;
+  uint32_t ofm_C;
+  uint32_t ofm_H;
+  uint32_t ofm_W;
+
+  uint32_t ker_N;
+  uint32_t ker_C;
+  uint32_t ker_H;
+  uint32_t ker_W;
+
+  uint32_t vertical_stride;
+  uint32_t horizontal_stride;
+
+  std::string padding;
+  std::string fused_act;
+
+  uint32_t top_padding;
+  uint32_t bottom_padding;
+  uint32_t left_padding;
+  uint32_t right_padding;
+
+  Configuration(nonius::chronometer meter)
+  {
+    ifm_N = meter.param<BATCH>();
+    ifm_C = meter.param<IFM_C>();
+    ifm_H = meter.param<IFM_H>();
+    ifm_W = meter.param<IFM_W>();
+
+    ofm_N = meter.param<BATCH>();
+    ofm_C = meter.param<OFM_C>();
+    ofm_H = meter.param<OFM_H>();
+    ofm_W = meter.param<OFM_W>();
+
+    ker_N = meter.param<OFM_C>();
+    ker_C = meter.param<IFM_C>();
+    ker_H = meter.param<KER_H>();
+    ker_W = meter.param<KER_W>();
+
+    vertical_stride = meter.param<STRIDE_H>();
+    horizontal_stride = meter.param<STRIDE_W>();
+
+    padding = meter.param<PADDING>();
+    fused_act = meter.param<FUSED_ACT>();
+
+    assert((ifm_H - ker_H) % vertical_stride == 0);
+    assert((ifm_W - ker_H) % horizontal_stride == 0);
+
+    uint32_t const effective_ofm_H = (ifm_H - ker_H) / vertical_stride + 1;
+    uint32_t const effective_ofm_W = (ifm_W - ker_H) / horizontal_stride + 1;
+
+    assert(ofm_H >= effective_ofm_H);
+    assert(ofm_W >= effective_ofm_W);
+
+    uint32_t const pad_H = ofm_H - effective_ofm_H;
+    uint32_t const pad_W = ofm_W - effective_ofm_W;
+
+    top_padding = pad_H / 2;
+    bottom_padding = pad_H / 2;
+    left_padding = pad_W / 2;
+    right_padding = pad_W / 2;
+
+    if (is_odd(pad_H))
+      top_padding += 1;
+    if (is_odd(pad_W))
+      left_padding += 1;
+  }
+
+  template <Layout L> TensorInfo src_info() const
+  {
+    return make_info<L>(ifm_N, ifm_C, ifm_H, ifm_W);
+  }
+  template <Layout L> TensorInfo dst_info() const
+  {
+    return make_info<L>(ofm_N, ofm_C, ofm_H, ofm_W);
+  }
+  template <Layout L> TensorInfo ker_info() const
+  {
+    return make_info<L>(ker_N, ker_C, ker_H, ker_W);
+  }
+  TensorInfo bias_info(void) const { return make_info(ker_N); }
+
+  PadStrideInfo pad_stride_info(void) const
+  {
+    return PadStrideInfo{horizontal_stride,
+                         vertical_stride,
+                         left_padding,
+                         right_padding,
+                         top_padding,
+                         bottom_padding,
+                         DimensionRoundingType::FLOOR};
+  }
+};
+
+} // namespace
+
+//
+// Benchmark Implementations
+//
+namespace
+{
+
+inline nonius::benchmark_registry &local_benchmark_registry()
+{
+  static nonius::benchmark_registry registry;
+  return registry;
+}
+
+} // namespace
+
+#define NONIUS_LOCAL_BENCHMARK(name, ...)                                              \
+  namespace                                                                            \
+  {                                                                                    \
+  static ::nonius::benchmark_registrar                                                 \
+      NONIUS_DETAIL_UNIQUE_NAME(benchmark_registrar)(local_benchmark_registry(), name, \
+                                                     __VA_ARGS__);                     \
+  }
+
+NONIUS_LOCAL_BENCHMARK("NEDirectConvolutionLayer_NCHW", [](nonius::chronometer meter) {
+  NEDirectConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  Tensor src_tensor{};
+  Tensor dst_tensor{};
+  Tensor ker_tensor{};
+  Tensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NCHW>());
+  dst_tensor.allocator()->init(p.dst_info<NCHW>());
+  ker_tensor.allocator()->init(p.ker_info<NCHW>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  try
+  {
+    check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                        p.pad_stride_info()));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run!
+  meter.measure([&](int) { conv.run(); });
+})
+
+NONIUS_LOCAL_BENCHMARK("NEDirectConvolutionLayer_NHWC", [](nonius::chronometer meter) {
+  NEDirectConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  Tensor src_tensor{};
+  Tensor dst_tensor{};
+  Tensor ker_tensor{};
+  Tensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NHWC>());
+  dst_tensor.allocator()->init(p.dst_info<NHWC>());
+  ker_tensor.allocator()->init(p.ker_info<NHWC>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  try
+  {
+    check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                        p.pad_stride_info()));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run!
+  meter.measure([&](int) { conv.run(); });
+})
+
+NONIUS_LOCAL_BENCHMARK("NEGEMMConvolutionLayer_NCHW", [](nonius::chronometer meter) {
+  NEGEMMConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  Tensor src_tensor{};
+  Tensor dst_tensor{};
+  Tensor ker_tensor{};
+  Tensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NCHW>());
+  dst_tensor.allocator()->init(p.dst_info<NCHW>());
+  ker_tensor.allocator()->init(p.ker_info<NCHW>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  try
+  {
+    check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                        p.pad_stride_info()));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run
+  meter.measure([&](int) { conv.run(); });
+})
+
+NONIUS_LOCAL_BENCHMARK("NEGEMMConvolutionLayer_NHWC", [](nonius::chronometer meter) {
+  NEGEMMConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  Tensor src_tensor{};
+  Tensor dst_tensor{};
+  Tensor ker_tensor{};
+  Tensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NHWC>());
+  dst_tensor.allocator()->init(p.dst_info<NHWC>());
+  ker_tensor.allocator()->init(p.ker_info<NHWC>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  try
+  {
+    check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                        p.pad_stride_info()));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run
+  meter.measure([&](int) { conv.run(); });
+})
+
+NONIUS_LOCAL_BENCHMARK("NEWinogradConvolutionLayer_NCHW", [](nonius::chronometer meter) {
+  NEWinogradConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  Tensor src_tensor{};
+  Tensor dst_tensor{};
+  Tensor ker_tensor{};
+  Tensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NCHW>());
+  dst_tensor.allocator()->init(p.dst_info<NCHW>());
+  ker_tensor.allocator()->init(p.ker_info<NCHW>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  try
+  {
+    check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                        p.pad_stride_info()));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run
+  meter.measure([&](int) { conv.run(); });
+})
+
+NONIUS_LOCAL_BENCHMARK("NEWinogradConvolutionLayer_NHWC", [](nonius::chronometer meter) {
+  NEWinogradConvolutionLayer conv;
+
+  // Configure
+  Configuration p{meter};
+
+  Tensor src_tensor{};
+  Tensor dst_tensor{};
+  Tensor ker_tensor{};
+  Tensor bias_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NHWC>());
+  dst_tensor.allocator()->init(p.dst_info<NHWC>());
+  ker_tensor.allocator()->init(p.ker_info<NHWC>());
+  bias_tensor.allocator()->init(p.bias_info());
+
+  try
+  {
+    check(conv.validate(src_tensor.info(), ker_tensor.info(), bias_tensor.info(), dst_tensor.info(),
+                        p.pad_stride_info()));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  conv.configure(&src_tensor, &ker_tensor, &bias_tensor, &dst_tensor, p.pad_stride_info());
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  bias_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run
+  meter.measure([&](int) { conv.run(); });
+})
+
+extern "C" nonius::benchmark_registry &benchmark_functions(void)
+{
+  return local_benchmark_registry();
+}
diff --git a/tools/kbenchmark/kernels/acl_neon/TransposeConv.cpp b/tools/kbenchmark/kernels/acl_neon/TransposeConv.cpp
new file mode 100644
index 000000000..0878499e4
--- /dev/null
+++ b/tools/kbenchmark/kernels/acl_neon/TransposeConv.cpp
@@ -0,0 +1,293 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file TransposeConv benchmark with various algorithms
+ */
+
+#include <nonius/nonius.h++>
+
+#include <arm_compute/core/Types.h>
+#include <arm_compute/runtime/NEON/NEScheduler.h>
+#include <arm_compute/runtime/NEON/NEFunctions.h>
+
+#include <cstdint>
+#include <cassert>
+#include <stdexcept>
+
+#include "acl_common/Utils.h"
+
+using namespace arm_compute;
+using namespace kbenchmark::kernels::acl_common;
+
+//
+// Helpers
+//
+namespace
+{
+
+enum Layout
+{
+  NCHW,
+  NHWC
+};
+
+TensorInfo make_info(uint32_t N)
+{
+  TensorShape shape{N};
+  return TensorInfo{shape, 1, DataType::F32};
+}
+
+template <enum Layout> TensorInfo make_info(uint32_t N, uint32_t C, uint32_t H, uint32_t W);
+
+template <> TensorInfo make_info<NCHW>(uint32_t N, uint32_t C, uint32_t H, uint32_t W)
+{
+  TensorShape shape{W, H, C, N};
+  TensorInfo info{shape, 1, DataType::F32};
+  info.set_data_layout(DataLayout::NCHW);
+  return info;
+}
+
+template <> TensorInfo make_info<NHWC>(uint32_t N, uint32_t C, uint32_t H, uint32_t W)
+{
+  TensorShape shape{C, W, H, N};
+  TensorInfo info{shape, 1, DataType::F32};
+  info.set_data_layout(DataLayout::NHWC);
+  return info;
+}
+
+inline void check(const Status &status)
+{
+  if (!status)
+  {
+    std::cerr << status.error_description() << std::endl;
+    throw std::runtime_error{"ERROR"};
+  }
+}
+
+inline bool is_odd(uint32_t n) { return (n % 2 != 0) ? true : false; }
+
+} // namespace
+
+//
+// Benchmark Parameters
+//
+NONIUS_PARAM(BATCH, 1);
+
+NONIUS_PARAM(IFM_C, 3);
+NONIUS_PARAM(IFM_H, 244);
+NONIUS_PARAM(IFM_W, 244);
+
+NONIUS_PARAM(OFM_C, 3);
+NONIUS_PARAM(OFM_H, 244);
+NONIUS_PARAM(OFM_W, 244);
+
+NONIUS_PARAM(KER_H, 3);
+NONIUS_PARAM(KER_W, 3);
+
+NONIUS_PARAM(STRIDE_H, 1);
+NONIUS_PARAM(STRIDE_W, 1);
+
+NONIUS_PARAM(PADDING, std::string{"SAME"})
+
+//
+// Configuration Helpers
+//
+namespace
+{
+
+struct Configuration
+{
+  uint32_t ifm_N;
+  uint32_t ifm_C;
+  uint32_t ifm_H;
+  uint32_t ifm_W;
+
+  uint32_t ofm_N;
+  uint32_t ofm_C;
+  uint32_t ofm_H;
+  uint32_t ofm_W;
+
+  uint32_t ker_N;
+  uint32_t ker_C;
+  uint32_t ker_H;
+  uint32_t ker_W;
+
+  uint32_t vertical_stride;
+  uint32_t horizontal_stride;
+
+  PadStrideInfo deconv_info;
+
+  uint32_t inner_border_right;
+  uint32_t inner_border_top;
+
+  Configuration(nonius::chronometer meter)
+  {
+    ifm_N = meter.param<BATCH>();
+    ifm_C = meter.param<IFM_C>();
+    ifm_H = meter.param<IFM_H>();
+    ifm_W = meter.param<IFM_W>();
+
+    ofm_N = meter.param<BATCH>();
+    ofm_C = meter.param<OFM_C>();
+    ofm_H = meter.param<OFM_H>();
+    ofm_W = meter.param<OFM_W>();
+
+    ker_N = meter.param<OFM_C>();
+    ker_C = meter.param<IFM_C>();
+    ker_H = meter.param<KER_H>();
+    ker_W = meter.param<KER_W>();
+
+    vertical_stride = meter.param<STRIDE_H>();
+    horizontal_stride = meter.param<STRIDE_W>();
+
+    // NOTE The padding calculation formula of TransposeConv is opposite to Conv.
+    //      So the location of ifm and ofm is changed.
+    auto padding_info = calculatePadding(meter.param<PADDING>(), ofm_H, ofm_W, ifm_H, ifm_W,
+                                         vertical_stride, horizontal_stride, ker_H, ker_W);
+
+    inner_border_right = padding_info.right - padding_info.left;
+    inner_border_top = padding_info.bottom - padding_info.top;
+
+    padding_info.left = padding_info.right;
+    padding_info.top = padding_info.bottom;
+
+    deconv_info = asPadStrideInfo(padding_info, vertical_stride, horizontal_stride);
+  }
+
+  template <Layout L> TensorInfo src_info() const
+  {
+    return make_info<L>(ifm_N, ifm_C, ifm_H, ifm_W);
+  }
+  template <Layout L> TensorInfo dst_info() const
+  {
+    return make_info<L>(ofm_N, ofm_C, ofm_H, ofm_W);
+  }
+  template <Layout L> TensorInfo ker_info() const
+  {
+    return make_info<L>(ker_N, ker_C, ker_H, ker_W);
+  }
+  TensorInfo bias_info(void) const { return make_info(ker_N); }
+};
+
+} // namespace
+
+//
+// Benchmark Implementations
+//
+namespace
+{
+
+inline nonius::benchmark_registry &local_benchmark_registry()
+{
+  static nonius::benchmark_registry registry;
+  return registry;
+}
+
+} // namespace
+
+#define NONIUS_LOCAL_BENCHMARK(name, ...)                                              \
+  namespace                                                                            \
+  {                                                                                    \
+  static ::nonius::benchmark_registrar                                                 \
+      NONIUS_DETAIL_UNIQUE_NAME(benchmark_registrar)(local_benchmark_registry(), name, \
+                                                     __VA_ARGS__);                     \
+  }
+
+NONIUS_LOCAL_BENCHMARK("NEDeconvolutionLayer_NCHW", [](nonius::chronometer meter) {
+  NEDeconvolutionLayer deconv;
+
+  // Configure
+  Configuration p{meter};
+
+  Tensor src_tensor{};
+  Tensor dst_tensor{};
+  Tensor ker_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NCHW>());
+  dst_tensor.allocator()->init(p.dst_info<NCHW>());
+  ker_tensor.allocator()->init(p.ker_info<NCHW>());
+
+  try
+  {
+    check(deconv.validate(src_tensor.info(), ker_tensor.info(), nullptr, dst_tensor.info(),
+                          p.deconv_info, p.inner_border_right, p.inner_border_top));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  deconv.configure(&src_tensor, &ker_tensor, nullptr, &dst_tensor, p.deconv_info,
+                   p.inner_border_right, p.inner_border_top);
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run!
+  meter.measure([&](int) { deconv.run(); });
+})
+
+NONIUS_LOCAL_BENCHMARK("NEDeconvolutionLayer_NHWC", [](nonius::chronometer meter) {
+  NEDeconvolutionLayer deconv;
+
+  // Configure
+  Configuration p{meter};
+
+  Tensor src_tensor{};
+  Tensor dst_tensor{};
+  Tensor ker_tensor{};
+
+  src_tensor.allocator()->init(p.src_info<NHWC>());
+  dst_tensor.allocator()->init(p.dst_info<NHWC>());
+  ker_tensor.allocator()->init(p.ker_info<NHWC>());
+
+  try
+  {
+    check(deconv.validate(src_tensor.info(), ker_tensor.info(), nullptr, dst_tensor.info(),
+                          p.deconv_info, p.inner_border_right, p.inner_border_top));
+  }
+  catch (...)
+  {
+    meter.measure([&](int) {
+      // DO NOTHING
+      volatile int x = 0;
+      return x;
+    });
+    return;
+  }
+
+  deconv.configure(&src_tensor, &ker_tensor, nullptr, &dst_tensor, p.deconv_info,
+                   p.inner_border_right, p.inner_border_top);
+
+  src_tensor.allocator()->allocate();
+  ker_tensor.allocator()->allocate();
+  dst_tensor.allocator()->allocate();
+
+  // Run!
+  meter.measure([&](int) { deconv.run(); });
+})
+
+extern "C" nonius::benchmark_registry &benchmark_functions(void)
+{
+  return local_benchmark_registry();
+}
diff --git a/tools/kbenchmark/operations/Convolution.h b/tools/kbenchmark/operations/Convolution.h
new file mode 100644
index 000000000..a3dc4166c
--- /dev/null
+++ b/tools/kbenchmark/operations/Convolution.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __KBENCHMARK_OPERATIONS_CONVOLUTION_H__
+#define __KBENCHMARK_OPERATIONS_CONVOLUTION_H__
+
+#include "Operation.h"
+#include "Utils.h"
+
+namespace kbenchmark
+{
+namespace operation
+{
+
+class Convolution final : public Operation
+{
+public:
+  Convolution() = default;
+
+  nonius::parameters params(int layer_num, OperationInfo &info) override
+  {
+    nonius::parameters params;
+
+    params.insert({"LAYER", nonius::param{layer_num}});
+
+    params.insert({"BATCH", nonius::param{1}});
+
+    auto _input = get_key_dims({"input"}, info);
+    params.insert({"IFM_C", nonius::param{_input[3]}});
+    params.insert({"IFM_H", nonius::param{_input[1]}});
+    params.insert({"IFM_W", nonius::param{_input[2]}});
+
+    auto _output0 = get_key_dims({"output0"}, info);
+    params.insert({"OFM_C", nonius::param{_output0[3]}});
+    params.insert({"OFM_H", nonius::param{_output0[1]}});
+    params.insert({"OFM_W", nonius::param{_output0[2]}});
+
+    auto _weights = get_key_dims({"weights"}, info);
+    params.insert({"KER_H", nonius::param{_weights[1]}});
+    params.insert({"KER_W", nonius::param{_weights[2]}});
+
+    auto _stride_h = get_key_int({"stride_h"}, info);
+    auto _stride_w = get_key_int({"stride_w"}, info);
+    params.insert({"STRIDE_H", nonius::param{_stride_h}});
+    params.insert({"STRIDE_W", nonius::param{_stride_w}});
+
+    auto _pad = get_key_string({"padding"}, info);
+    params.insert({"PADDING", nonius::param{_pad}});
+
+    auto _act = get_key_string({"fused_act"}, info);
+    params.insert({"FUSED_ACT", nonius::param{_act}});
+
+    return params;
+  }
+};
+
+} // namespace operation
+} // namespace kbenchmark
+
+#endif // __KBENCHMARK_OPERATIONS_CONVOLUTION_H__
diff --git a/tools/kbenchmark/operations/TransposeConv.h b/tools/kbenchmark/operations/TransposeConv.h
new file mode 100644
index 000000000..69ab307bd
--- /dev/null
+++ b/tools/kbenchmark/operations/TransposeConv.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __KBENCHMARK_OPERATIONS_TRANSPOSE_CONV_H__
+#define __KBENCHMARK_OPERATIONS_TRANSPOSE_CONV_H__
+
+#include "Operation.h"
+#include "Utils.h"
+
+namespace kbenchmark
+{
+namespace operation
+{
+
+class TransposeConv final : public Operation
+{
+public:
+  TransposeConv() = default;
+
+  nonius::parameters params(int layer_num, OperationInfo &info) override
+  {
+    nonius::parameters params;
+
+    params.insert({"LAYER", nonius::param{layer_num}});
+
+    params.insert({"BATCH", nonius::param{1}});
+
+    // TODO The output_shape will be used in Dynamic tensor case
+    auto _output_shape = get_key_dims({"input0"}, info);
+
+    auto _weights = get_key_dims({"input1"}, info);
+    params.insert({"KER_H", nonius::param{_weights[1]}});
+    params.insert({"KER_W", nonius::param{_weights[2]}});
+
+    auto _input = get_key_dims({"input2"}, info);
+    params.insert({"IFM_H", nonius::param{_input[1]}});
+    params.insert({"IFM_W", nonius::param{_input[2]}});
+    params.insert({"IFM_C", nonius::param{_input[3]}});
+
+    auto _output = get_key_dims({"output0"}, info);
+    params.insert({"OFM_H", nonius::param{_output[1]}});
+    params.insert({"OFM_W", nonius::param{_output[2]}});
+    params.insert({"OFM_C", nonius::param{_output[3]}});
+
+    auto _stride_h = get_key_int({"stride_h"}, info);
+    auto _stride_w = get_key_int({"stride_w"}, info);
+    params.insert({"STRIDE_H", nonius::param{_stride_h}});
+    params.insert({"STRIDE_W", nonius::param{_stride_w}});
+
+    auto _pad = get_key_string({"padding"}, info);
+    params.insert({"PADDING", nonius::param{_pad}});
+
+    return params;
+  }
+};
+
+} // namespace operation
+} // namespace kbenchmark
+
+#endif // __KBENCHMARK_OPERATIONS_TRANSPOSE_CONV_H__
diff --git a/tools/lcov-to-cobertura-xml/.FORMATDENY b/tools/lcov-to-cobertura-xml/.FORMATDENY
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/tools/lcov-to-cobertura-xml/.FORMATDENY
diff --git a/externals/lcov-to-cobertura-xml/README.md b/tools/lcov-to-cobertura-xml/README.md
index 2fc4cff42..2fc4cff42 100644
--- a/externals/lcov-to-cobertura-xml/README.md
+++ b/tools/lcov-to-cobertura-xml/README.md
diff --git a/externals/lcov-to-cobertura-xml/lcov_cobertura.py b/tools/lcov-to-cobertura-xml/lcov_cobertura.py
index 7aae6d115..7aae6d115 100755..100644
--- a/externals/lcov-to-cobertura-xml/lcov_cobertura.py
+++ b/tools/lcov-to-cobertura-xml/lcov_cobertura.py
diff --git a/tools/nnapi_quickcheck/lib/env.cpp b/tools/nnapi_quickcheck/lib/env.cpp
index 758516752..005e876c2 100644
--- a/tools/nnapi_quickcheck/lib/env.cpp
+++ b/tools/nnapi_quickcheck/lib/env.cpp
@@ -16,14 +16,14 @@
 
 #include "env.h"
 
-#include "util/environment.h"
+#include "misc/environment.h"
 
 //
 // Integer variable
 //
 IntVar::IntVar(const std::string &name, int32_t value) : _value{value}
 {
-  nnfw::util::env::IntAccessor{name}.access(_value);
+  nnfw::misc::env::IntAccessor{name}.access(_value);
 }
 
 //
@@ -31,7 +31,7 @@ IntVar::IntVar(const std::string &name, int32_t value) : _value{value}
 //
 FloatVar::FloatVar(const std::string &name, float value) : _value{value}
 {
-  nnfw::util::env::FloatAccessor{name}.access(_value);
+  nnfw::misc::env::FloatAccessor{name}.access(_value);
 }
 
 //
diff --git a/tools/nnapi_quickcheck/tests/add_1.cpp b/tools/nnapi_quickcheck/tests/add_1.cpp
index 098b8591b..f5363f918 100644
--- a/tools/nnapi_quickcheck/tests/add_1.cpp
+++ b/tools/nnapi_quickcheck/tests/add_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_add_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "add_1.lst"
@@ -146,7 +146,7 @@ TEST(NNAPI_Quickcheck_add_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/add_2.cpp b/tools/nnapi_quickcheck/tests/add_2.cpp
index 12851f1b0..fe4d12f5d 100644
--- a/tools/nnapi_quickcheck/tests/add_2.cpp
+++ b/tools/nnapi_quickcheck/tests/add_2.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_add_2, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "add_2.lst"
@@ -164,7 +164,7 @@ TEST(NNAPI_Quickcheck_add_2, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/add_3.cpp b/tools/nnapi_quickcheck/tests/add_3.cpp
index a7b2f436e..ce409ccbc 100644
--- a/tools/nnapi_quickcheck/tests/add_3.cpp
+++ b/tools/nnapi_quickcheck/tests/add_3.cpp
@@ -16,14 +16,14 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
 
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/TensorShapeUtils.h"
@@ -36,14 +36,14 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_add_3, simple_test)
 {
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Initialize random number generator
   std::minstd_rand random(SEED);
@@ -52,9 +52,9 @@ TEST(NNAPI_Quickcheck_add_3, simple_test)
 #include "add_3.lst"
 #undef STR_VALUE
 
-  const auto LHS_SHAPE = nnfw::util::tensor::Shape::from(LHS_SHAPE_Value());
-  const auto RHS_SHAPE = nnfw::util::tensor::Shape::from(RHS_SHAPE_Value());
-  const auto OUT_SHAPE = nnfw::support::tflite::broadcast(LHS_SHAPE, RHS_SHAPE);
+  const auto LHS_SHAPE = nnfw::misc::tensor::Shape::from(LHS_SHAPE_Value());
+  const auto RHS_SHAPE = nnfw::misc::tensor::Shape::from(RHS_SHAPE_Value());
+  const auto OUT_SHAPE = nnfw::tflite::broadcast(LHS_SHAPE, RHS_SHAPE);
 
   std::cout << "Configurations:" << std::endl;
 #define PRINT_NEWLINE()     \
@@ -75,7 +75,7 @@ TEST(NNAPI_Quickcheck_add_3, simple_test)
 #undef PRINT_NEWLINE
 
   auto setup = [&](Interpreter &interp) {
-    using nnfw::support::tflite::as_dims;
+    using nnfw::tflite::as_dims;
 
     // Comment from 'context.h'
     //
@@ -121,15 +121,15 @@ TEST(NNAPI_Quickcheck_add_3, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
   param.verbose = 0;
   param.tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(param.verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(param.tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(param.verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(param.tolerance);
 
   int res = RandomTestRunner{SEED, param}.run(builder);
 
diff --git a/tools/nnapi_quickcheck/tests/add_4.cpp b/tools/nnapi_quickcheck/tests/add_4.cpp
index 217438fb1..b1231dd3f 100644
--- a/tools/nnapi_quickcheck/tests/add_4.cpp
+++ b/tools/nnapi_quickcheck/tests/add_4.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_add_4, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "add_4.lst"
@@ -146,7 +146,7 @@ TEST(NNAPI_Quickcheck_add_4, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/add_5.cpp b/tools/nnapi_quickcheck/tests/add_5.cpp
index 2f02c8292..f900153c1 100644
--- a/tools/nnapi_quickcheck/tests/add_5.cpp
+++ b/tools/nnapi_quickcheck/tests/add_5.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_add_5, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "add_5.lst"
@@ -139,7 +139,7 @@ TEST(NNAPI_Quickcheck_add_5, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/add_6.cpp b/tools/nnapi_quickcheck/tests/add_6.cpp
index 3af2c4af3..83b87ef32 100644
--- a/tools/nnapi_quickcheck/tests/add_6.cpp
+++ b/tools/nnapi_quickcheck/tests/add_6.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_add_6, simple_test)
 {
   int verbose = 1;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "add_6.lst"
@@ -131,7 +131,7 @@ TEST(NNAPI_Quickcheck_add_6, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/add_7.cpp b/tools/nnapi_quickcheck/tests/add_7.cpp
index 1ebf18e32..732320f4a 100644
--- a/tools/nnapi_quickcheck/tests/add_7.cpp
+++ b/tools/nnapi_quickcheck/tests/add_7.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_add_7, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "add_7.lst"
@@ -139,7 +139,7 @@ TEST(NNAPI_Quickcheck_add_7, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/add_8.cpp b/tools/nnapi_quickcheck/tests/add_8.cpp
index d4a5e4838..d89e977d5 100644
--- a/tools/nnapi_quickcheck/tests/add_8.cpp
+++ b/tools/nnapi_quickcheck/tests/add_8.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_add_8, simple_test)
 {
   int verbose = 1;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "add_8.lst"
@@ -177,7 +177,7 @@ TEST(NNAPI_Quickcheck_add_8, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/add_9.cpp b/tools/nnapi_quickcheck/tests/add_9.cpp
index 6c0cc2240..fd4e1f9c1 100644
--- a/tools/nnapi_quickcheck/tests/add_9.cpp
+++ b/tools/nnapi_quickcheck/tests/add_9.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_add_9, simple_test)
 {
   int verbose = 1;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "add_9.lst"
@@ -174,7 +174,7 @@ TEST(NNAPI_Quickcheck_add_9, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/add_quan_1.cpp b/tools/nnapi_quickcheck/tests/add_quan_1.cpp
index daf15e091..e3d85122f 100644
--- a/tools/nnapi_quickcheck/tests/add_quan_1.cpp
+++ b/tools/nnapi_quickcheck/tests/add_quan_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_add_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "add_quan_1.lst"
@@ -149,7 +149,7 @@ TEST(NNAPI_Quickcheck_add_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/avg_pool_1.cpp b/tools/nnapi_quickcheck/tests/avg_pool_1.cpp
index e68cfc5b3..052c68915 100644
--- a/tools/nnapi_quickcheck/tests/avg_pool_1.cpp
+++ b/tools/nnapi_quickcheck/tests/avg_pool_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -32,21 +32,21 @@
 #include <iostream>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_avg_pool_1, simple_test)
 {
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Set random test parameters
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "avg_pool_1.lst"
@@ -137,7 +137,7 @@ TEST(NNAPI_Quickcheck_avg_pool_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/avg_pool_quan_1.cpp b/tools/nnapi_quickcheck/tests/avg_pool_quan_1.cpp
index b24733ab0..86f35f76d 100644
--- a/tools/nnapi_quickcheck/tests/avg_pool_quan_1.cpp
+++ b/tools/nnapi_quickcheck/tests/avg_pool_quan_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -32,21 +32,21 @@
 #include <iostream>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_avg_pool_1, simple_test)
 {
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Set random test parameters
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "avg_pool_quan_1.lst"
@@ -136,7 +136,7 @@ TEST(NNAPI_Quickcheck_avg_pool_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/cast_1.cpp b/tools/nnapi_quickcheck/tests/cast_1.cpp
index bf493d091..788cd575f 100644
--- a/tools/nnapi_quickcheck/tests/cast_1.cpp
+++ b/tools/nnapi_quickcheck/tests/cast_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/interp/FunctionBuilder.h"
@@ -34,20 +34,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_cast_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "cast_1.lst"
@@ -123,7 +123,7 @@ TEST(NNAPI_Quickcheck_cast_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/cast_2.cpp b/tools/nnapi_quickcheck/tests/cast_2.cpp
index d85781d0c..a9e99ee2b 100644
--- a/tools/nnapi_quickcheck/tests/cast_2.cpp
+++ b/tools/nnapi_quickcheck/tests/cast_2.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_cast_2, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "cast_2.lst"
@@ -121,7 +121,7 @@ TEST(NNAPI_Quickcheck_cast_2, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/cast_q_to_f_1.cpp b/tools/nnapi_quickcheck/tests/cast_q_to_f_1.cpp
index ede763701..4af6c772f 100644
--- a/tools/nnapi_quickcheck/tests/cast_q_to_f_1.cpp
+++ b/tools/nnapi_quickcheck/tests/cast_q_to_f_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/interp/FunctionBuilder.h"
@@ -34,20 +34,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_cast_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "cast_q_to_f_1.lst"
@@ -123,7 +123,7 @@ TEST(NNAPI_Quickcheck_cast_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/concat_1.cpp b/tools/nnapi_quickcheck/tests/concat_1.cpp
index cc14d083a..d2cb1aada 100644
--- a/tools/nnapi_quickcheck/tests/concat_1.cpp
+++ b/tools/nnapi_quickcheck/tests/concat_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_concat_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "concat_1.lst"
@@ -148,7 +148,7 @@ TEST(NNAPI_Quickcheck_concat_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/concat_quan_1.cpp b/tools/nnapi_quickcheck/tests/concat_quan_1.cpp
index f804b819b..f861ac857 100644
--- a/tools/nnapi_quickcheck/tests/concat_quan_1.cpp
+++ b/tools/nnapi_quickcheck/tests/concat_quan_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_concat_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "concat_quan_1.lst"
@@ -150,7 +150,7 @@ TEST(NNAPI_Quickcheck_concat_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/conv_1.cpp b/tools/nnapi_quickcheck/tests/conv_1.cpp
index 57b6abdfd..b5b145ccb 100644
--- a/tools/nnapi_quickcheck/tests/conv_1.cpp
+++ b/tools/nnapi_quickcheck/tests/conv_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_conv_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "conv_1.lst"
@@ -194,7 +194,7 @@ TEST(NNAPI_Quickcheck_conv_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/conv_quan_1.cpp b/tools/nnapi_quickcheck/tests/conv_quan_1.cpp
index 025cccadd..28245477b 100644
--- a/tools/nnapi_quickcheck/tests/conv_quan_1.cpp
+++ b/tools/nnapi_quickcheck/tests/conv_quan_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_conv_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "conv_quan_1.lst"
@@ -198,7 +198,7 @@ TEST(NNAPI_Quickcheck_conv_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/dconv_1.cpp b/tools/nnapi_quickcheck/tests/dconv_1.cpp
index 21d648331..36ec7a943 100644
--- a/tools/nnapi_quickcheck/tests/dconv_1.cpp
+++ b/tools/nnapi_quickcheck/tests/dconv_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_dconv_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "dconv_1.lst"
@@ -192,7 +192,7 @@ TEST(NNAPI_Quickcheck_dconv_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/dconv_quan_1.cpp b/tools/nnapi_quickcheck/tests/dconv_quan_1.cpp
index 7cb9383e4..8305ad140 100644
--- a/tools/nnapi_quickcheck/tests/dconv_quan_1.cpp
+++ b/tools/nnapi_quickcheck/tests/dconv_quan_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_dconv_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "dconv_quan_1.lst"
@@ -196,7 +196,7 @@ TEST(NNAPI_Quickcheck_dconv_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/dequantize_1.cpp b/tools/nnapi_quickcheck/tests/dequantize_1.cpp
index 467392dc3..e725fa220 100644
--- a/tools/nnapi_quickcheck/tests/dequantize_1.cpp
+++ b/tools/nnapi_quickcheck/tests/dequantize_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/interp/FunctionBuilder.h"
@@ -34,20 +34,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_dequantize_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "dequantize_1.lst"
@@ -123,7 +123,7 @@ TEST(NNAPI_Quickcheck_dequantize_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/div_1.cpp b/tools/nnapi_quickcheck/tests/div_1.cpp
index 1fe0f7a28..26dfbbe53 100644
--- a/tools/nnapi_quickcheck/tests/div_1.cpp
+++ b/tools/nnapi_quickcheck/tests/div_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_div_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "div_1.lst"
@@ -146,7 +146,7 @@ TEST(NNAPI_Quickcheck_div_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/div_2.cpp b/tools/nnapi_quickcheck/tests/div_2.cpp
index 883167e95..df4efa4ff 100644
--- a/tools/nnapi_quickcheck/tests/div_2.cpp
+++ b/tools/nnapi_quickcheck/tests/div_2.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_div_2, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "div_2.lst"
@@ -139,7 +139,7 @@ TEST(NNAPI_Quickcheck_div_2, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/fully_connected_1.cpp b/tools/nnapi_quickcheck/tests/fully_connected_1.cpp
index ea5df23d2..43cd0a470 100644
--- a/tools/nnapi_quickcheck/tests/fully_connected_1.cpp
+++ b/tools/nnapi_quickcheck/tests/fully_connected_1.cpp
@@ -16,12 +16,12 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -34,7 +34,7 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 template <typename T> T *make_malloc(void) { return reinterpret_cast<T *>(malloc(sizeof(T))); }
 
@@ -43,13 +43,13 @@ TEST(NNAPI_Quickcheck_fully_connected_1, simple_test)
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "conv_1.lst"
@@ -174,7 +174,7 @@ TEST(NNAPI_Quickcheck_fully_connected_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/fully_connected_quan_1.cpp b/tools/nnapi_quickcheck/tests/fully_connected_quan_1.cpp
index c434d75f8..2c6883546 100644
--- a/tools/nnapi_quickcheck/tests/fully_connected_quan_1.cpp
+++ b/tools/nnapi_quickcheck/tests/fully_connected_quan_1.cpp
@@ -16,12 +16,12 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -34,7 +34,7 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 template <typename T> T *make_malloc(void) { return reinterpret_cast<T *>(malloc(sizeof(T))); }
 
@@ -43,13 +43,13 @@ TEST(NNAPI_Quickcheck_fully_connected_1, simple_test)
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "fully_connected_quan_1.lst"
@@ -176,7 +176,7 @@ TEST(NNAPI_Quickcheck_fully_connected_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/gather_1.cpp b/tools/nnapi_quickcheck/tests/gather_1.cpp
index b916676c7..4ab164ea1 100644
--- a/tools/nnapi_quickcheck/tests/gather_1.cpp
+++ b/tools/nnapi_quickcheck/tests/gather_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/interp/FunctionBuilder.h"
@@ -31,21 +31,21 @@
 #include <iostream>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_gather_1, simple_test)
 {
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Set random test parameters
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "gather_1.lst"
@@ -119,7 +119,7 @@ TEST(NNAPI_Quickcheck_gather_1, simple_test)
     interp.SetOutputs({2});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/gather_2.cpp b/tools/nnapi_quickcheck/tests/gather_2.cpp
index 4b115685d..ac9ec8b3b 100644
--- a/tools/nnapi_quickcheck/tests/gather_2.cpp
+++ b/tools/nnapi_quickcheck/tests/gather_2.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/interp/FunctionBuilder.h"
@@ -31,21 +31,21 @@
 #include <iostream>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_gather_2, simple_test)
 {
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Set random test parameters
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "gather_2.lst"
@@ -123,7 +123,7 @@ TEST(NNAPI_Quickcheck_gather_2, simple_test)
     interp.SetOutputs({2});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/logistic_quan_1.cpp b/tools/nnapi_quickcheck/tests/logistic_quan_1.cpp
index e9e3bc1f7..0b0a69029 100644
--- a/tools/nnapi_quickcheck/tests/logistic_quan_1.cpp
+++ b/tools/nnapi_quickcheck/tests/logistic_quan_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_logistic_quan_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "logistic_quan_1.lst"
@@ -127,7 +127,7 @@ TEST(NNAPI_Quickcheck_logistic_quan_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/max_pool_1.cpp b/tools/nnapi_quickcheck/tests/max_pool_1.cpp
index 07fa9ac5b..62f985d65 100644
--- a/tools/nnapi_quickcheck/tests/max_pool_1.cpp
+++ b/tools/nnapi_quickcheck/tests/max_pool_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -32,21 +32,21 @@
 #include <iostream>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_max_pool_1, simple_test)
 {
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Set random test parameters
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "max_pool_1.lst"
@@ -143,7 +143,7 @@ TEST(NNAPI_Quickcheck_max_pool_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/max_pool_quan_1.cpp b/tools/nnapi_quickcheck/tests/max_pool_quan_1.cpp
index d241c43ba..2c05a7d22 100644
--- a/tools/nnapi_quickcheck/tests/max_pool_quan_1.cpp
+++ b/tools/nnapi_quickcheck/tests/max_pool_quan_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -32,21 +32,21 @@
 #include <iostream>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_max_pool_1, simple_test)
 {
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Set random test parameters
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "max_pool_quan_1.lst"
@@ -145,7 +145,7 @@ TEST(NNAPI_Quickcheck_max_pool_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/mul_1.cpp b/tools/nnapi_quickcheck/tests/mul_1.cpp
index cf7282bc7..57ab71350 100644
--- a/tools/nnapi_quickcheck/tests/mul_1.cpp
+++ b/tools/nnapi_quickcheck/tests/mul_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/interp/FunctionBuilder.h"
@@ -34,20 +34,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_mul_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "mul_1.lst"
@@ -137,7 +137,7 @@ TEST(NNAPI_Quickcheck_mul_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/mul_2.cpp b/tools/nnapi_quickcheck/tests/mul_2.cpp
index 734be8e3f..a692616e0 100644
--- a/tools/nnapi_quickcheck/tests/mul_2.cpp
+++ b/tools/nnapi_quickcheck/tests/mul_2.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/interp/FunctionBuilder.h"
@@ -34,20 +34,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_mul_2, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "mul_2.lst"
@@ -137,7 +137,7 @@ TEST(NNAPI_Quickcheck_mul_2, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/mul_quan_1.cpp b/tools/nnapi_quickcheck/tests/mul_quan_1.cpp
index 72903fe42..5f0061e8d 100644
--- a/tools/nnapi_quickcheck/tests/mul_quan_1.cpp
+++ b/tools/nnapi_quickcheck/tests/mul_quan_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/interp/FunctionBuilder.h"
@@ -34,20 +34,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_mul_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "mul_1.lst"
@@ -139,7 +139,7 @@ TEST(NNAPI_Quickcheck_mul_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/relu1_1.cpp b/tools/nnapi_quickcheck/tests/relu1_1.cpp
index b729c50c3..25e71dc55 100644
--- a/tools/nnapi_quickcheck/tests/relu1_1.cpp
+++ b/tools/nnapi_quickcheck/tests/relu1_1.cpp
@@ -14,14 +14,14 @@
  * limitations under the License.
  */
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
-#include "util/feature/Shape.h"
+#include "misc/environment.h"
+#include "misc/feature/Shape.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -33,15 +33,15 @@
 #include <cassert>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 int main(int argc, char **argv)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "relu1_1.lst"
@@ -53,7 +53,7 @@ int main(int argc, char **argv)
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Initialize random number generator
   std::minstd_rand random(SEED);
@@ -110,7 +110,7 @@ int main(int argc, char **argv)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/relu6_1.cpp b/tools/nnapi_quickcheck/tests/relu6_1.cpp
index cafbe8377..43e8383f3 100644
--- a/tools/nnapi_quickcheck/tests/relu6_1.cpp
+++ b/tools/nnapi_quickcheck/tests/relu6_1.cpp
@@ -16,14 +16,14 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
-#include "util/feature/Shape.h"
+#include "misc/environment.h"
+#include "misc/feature/Shape.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,15 +35,15 @@
 #include <cassert>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_relu6_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "relu6_1.lst"
@@ -55,7 +55,7 @@ TEST(NNAPI_Quickcheck_relu6_1, simple_test)
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Initialize random number generator
   std::minstd_rand random(SEED);
@@ -112,7 +112,7 @@ TEST(NNAPI_Quickcheck_relu6_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/relu6_quan_1.cpp b/tools/nnapi_quickcheck/tests/relu6_quan_1.cpp
index 3d8ce4f7c..8356442ce 100644
--- a/tools/nnapi_quickcheck/tests/relu6_quan_1.cpp
+++ b/tools/nnapi_quickcheck/tests/relu6_quan_1.cpp
@@ -14,14 +14,14 @@
  * limitations under the License.
  */
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
-#include "util/feature/Shape.h"
+#include "misc/environment.h"
+#include "misc/feature/Shape.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -33,15 +33,15 @@
 #include <cassert>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 int main(int argc, char **argv)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "relu6_quan_1.lst"
@@ -53,7 +53,7 @@ int main(int argc, char **argv)
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Initialize random number generator
   std::minstd_rand random(SEED);
@@ -112,7 +112,7 @@ int main(int argc, char **argv)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/relu_1.cpp b/tools/nnapi_quickcheck/tests/relu_1.cpp
index c7141ca6a..decd0ddfb 100644
--- a/tools/nnapi_quickcheck/tests/relu_1.cpp
+++ b/tools/nnapi_quickcheck/tests/relu_1.cpp
@@ -16,14 +16,14 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
-#include "util/feature/Shape.h"
+#include "misc/environment.h"
+#include "misc/feature/Shape.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,15 +35,15 @@
 #include <cassert>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_relu_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "relu_1.lst"
@@ -55,7 +55,7 @@ TEST(NNAPI_Quickcheck_relu_1, simple_test)
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Initialize random number generator
   std::minstd_rand random(SEED);
@@ -112,7 +112,7 @@ TEST(NNAPI_Quickcheck_relu_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/relu_2.cpp b/tools/nnapi_quickcheck/tests/relu_2.cpp
index 74ab113c2..ccb9f06c4 100644
--- a/tools/nnapi_quickcheck/tests/relu_2.cpp
+++ b/tools/nnapi_quickcheck/tests/relu_2.cpp
@@ -16,14 +16,14 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
-#include "util/feature/Shape.h"
+#include "misc/environment.h"
+#include "misc/feature/Shape.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,15 +35,15 @@
 #include <cassert>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_relu_2, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "relu_2.lst"
@@ -56,7 +56,7 @@ TEST(NNAPI_Quickcheck_relu_2, simple_test)
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Initialize random number generator
   std::minstd_rand random(SEED);
@@ -115,7 +115,7 @@ TEST(NNAPI_Quickcheck_relu_2, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/relu_3.cpp b/tools/nnapi_quickcheck/tests/relu_3.cpp
index f876e18ee..59a856041 100644
--- a/tools/nnapi_quickcheck/tests/relu_3.cpp
+++ b/tools/nnapi_quickcheck/tests/relu_3.cpp
@@ -16,14 +16,14 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
-#include "util/feature/Shape.h"
+#include "misc/environment.h"
+#include "misc/feature/Shape.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,15 +35,15 @@
 #include <cassert>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_relu_3, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "relu_3.lst"
@@ -57,7 +57,7 @@ TEST(NNAPI_Quickcheck_relu_3, simple_test)
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Initialize random number generator
   std::minstd_rand random(SEED);
@@ -118,7 +118,7 @@ TEST(NNAPI_Quickcheck_relu_3, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/relu_quan_1.cpp b/tools/nnapi_quickcheck/tests/relu_quan_1.cpp
index 7bc6181ad..303080ef5 100644
--- a/tools/nnapi_quickcheck/tests/relu_quan_1.cpp
+++ b/tools/nnapi_quickcheck/tests/relu_quan_1.cpp
@@ -14,14 +14,14 @@
  * limitations under the License.
  */
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
-#include "util/feature/Shape.h"
+#include "misc/environment.h"
+#include "misc/feature/Shape.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -33,15 +33,15 @@
 #include <cassert>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 int main(int argc, char **argv)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "relu_quan_1.lst"
@@ -53,7 +53,7 @@ int main(int argc, char **argv)
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Initialize random number generator
   std::minstd_rand random(SEED);
@@ -112,7 +112,7 @@ int main(int argc, char **argv)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/reshape_1.cpp b/tools/nnapi_quickcheck/tests/reshape_1.cpp
index a35623ced..54cfce2f7 100644
--- a/tools/nnapi_quickcheck/tests/reshape_1.cpp
+++ b/tools/nnapi_quickcheck/tests/reshape_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -32,21 +32,21 @@
 #include <iostream>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_reshape_1, simple_test)
 {
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Set random test parameters
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "max_pool_1.lst"
@@ -128,7 +128,7 @@ TEST(NNAPI_Quickcheck_reshape_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/reshape_quan_1.cpp b/tools/nnapi_quickcheck/tests/reshape_quan_1.cpp
index fb1db77e7..8eb0bf387 100644
--- a/tools/nnapi_quickcheck/tests/reshape_quan_1.cpp
+++ b/tools/nnapi_quickcheck/tests/reshape_quan_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -32,21 +32,21 @@
 #include <iostream>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_reshape_1, simple_test)
 {
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Set random test parameters
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "reshape_quan_1.lst"
@@ -130,7 +130,7 @@ TEST(NNAPI_Quickcheck_reshape_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/resize_bilinear_1.cpp b/tools/nnapi_quickcheck/tests/resize_bilinear_1.cpp
index 3c7ce28b1..5b2d7b634 100644
--- a/tools/nnapi_quickcheck/tests/resize_bilinear_1.cpp
+++ b/tools/nnapi_quickcheck/tests/resize_bilinear_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -32,21 +32,21 @@
 #include <iostream>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_resize_bilinear_1, simple_test)
 {
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Set random test parameters
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "resize_bilinear_1.lst"
@@ -128,7 +128,7 @@ TEST(NNAPI_Quickcheck_resize_bilinear_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/softmax_1.cpp b/tools/nnapi_quickcheck/tests/softmax_1.cpp
index b9cc6bf0f..71424755a 100644
--- a/tools/nnapi_quickcheck/tests/softmax_1.cpp
+++ b/tools/nnapi_quickcheck/tests/softmax_1.cpp
@@ -16,14 +16,14 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
-#include "util/feature/Shape.h"
+#include "misc/environment.h"
+#include "misc/feature/Shape.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,15 +35,15 @@
 #include <cassert>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_softmax_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "softmax_1.lst"
@@ -56,12 +56,12 @@ TEST(NNAPI_Quickcheck_softmax_1, simple_test)
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Initialize random number generator
   std::minstd_rand random(SEED);
 
-  const nnfw::util::feature::Shape ifm_shape{IFM_C, IFM_H, IFM_W};
+  const nnfw::misc::feature::Shape ifm_shape{IFM_C, IFM_H, IFM_W};
 
   const int32_t OFM_C = IFM_C;
   const int32_t OFM_H = IFM_H;
@@ -107,7 +107,7 @@ TEST(NNAPI_Quickcheck_softmax_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/softmax_2.cpp b/tools/nnapi_quickcheck/tests/softmax_2.cpp
index 402435718..df1ff2731 100644
--- a/tools/nnapi_quickcheck/tests/softmax_2.cpp
+++ b/tools/nnapi_quickcheck/tests/softmax_2.cpp
@@ -16,14 +16,14 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
-#include "util/feature/Shape.h"
+#include "misc/environment.h"
+#include "misc/feature/Shape.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,15 +35,15 @@
 #include <cassert>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_softmax_2, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define FLOAT_VALUE(NAME, VALUE) FloatVar NAME##_Value(#NAME, VALUE);
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
@@ -75,12 +75,12 @@ TEST(NNAPI_Quickcheck_softmax_2, simple_test)
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Initialize random number generator
   std::minstd_rand random(SEED);
 
-  const nnfw::util::feature::Shape ifm_shape{IFM_C, IFM_H, IFM_W};
+  const nnfw::misc::feature::Shape ifm_shape{IFM_C, IFM_H, IFM_W};
 
   const int32_t OFM_C = IFM_C;
   const int32_t OFM_H = IFM_H;
@@ -126,7 +126,7 @@ TEST(NNAPI_Quickcheck_softmax_2, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/softmax_quan_1.cpp b/tools/nnapi_quickcheck/tests/softmax_quan_1.cpp
index 2c12e1104..5d38f7727 100644
--- a/tools/nnapi_quickcheck/tests/softmax_quan_1.cpp
+++ b/tools/nnapi_quickcheck/tests/softmax_quan_1.cpp
@@ -16,14 +16,14 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
-#include "util/feature/Shape.h"
+#include "misc/environment.h"
+#include "misc/feature/Shape.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,15 +35,15 @@
 #include <cassert>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_softmax_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "softmax_quan_1.lst"
@@ -56,12 +56,12 @@ TEST(NNAPI_Quickcheck_softmax_1, simple_test)
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Initialize random number generator
   std::minstd_rand random(SEED);
 
-  const nnfw::util::feature::Shape ifm_shape{IFM_C, IFM_H, IFM_W};
+  const nnfw::misc::feature::Shape ifm_shape{IFM_C, IFM_H, IFM_W};
 
   const int32_t OFM_C = IFM_C;
   const int32_t OFM_H = IFM_H;
@@ -109,7 +109,7 @@ TEST(NNAPI_Quickcheck_softmax_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/split_1.cpp b/tools/nnapi_quickcheck/tests/split_1.cpp
index 735a0777f..95a7aa842 100644
--- a/tools/nnapi_quickcheck/tests/split_1.cpp
+++ b/tools/nnapi_quickcheck/tests/split_1.cpp
@@ -16,14 +16,14 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
-#include "util/feature/Shape.h"
+#include "misc/environment.h"
+#include "misc/feature/Shape.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,15 +35,15 @@
 #include <cassert>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_split_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "split_1.lst"
@@ -59,7 +59,7 @@ TEST(NNAPI_Quickcheck_split_1, simple_test)
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Initialize random number generator
   std::minstd_rand random(SEED);
@@ -140,7 +140,7 @@ TEST(NNAPI_Quickcheck_split_1, simple_test)
     interp.SetOutputs(ofm_indexes);
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/split_2.cpp b/tools/nnapi_quickcheck/tests/split_2.cpp
index 0d4bf3e13..eb06ea0f2 100644
--- a/tools/nnapi_quickcheck/tests/split_2.cpp
+++ b/tools/nnapi_quickcheck/tests/split_2.cpp
@@ -16,14 +16,14 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
-#include "util/feature/Shape.h"
+#include "misc/environment.h"
+#include "misc/feature/Shape.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,15 +35,15 @@
 #include <cassert>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_split_2, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "split_2.lst"
@@ -59,7 +59,7 @@ TEST(NNAPI_Quickcheck_split_2, simple_test)
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Initialize random number generator
   std::minstd_rand random(SEED);
@@ -140,7 +140,7 @@ TEST(NNAPI_Quickcheck_split_2, simple_test)
     interp.SetOutputs(ofm_indexes);
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/split_3.cpp b/tools/nnapi_quickcheck/tests/split_3.cpp
index eaa65bdc2..e3beb5bd2 100644
--- a/tools/nnapi_quickcheck/tests/split_3.cpp
+++ b/tools/nnapi_quickcheck/tests/split_3.cpp
@@ -16,14 +16,14 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
-#include "util/feature/Shape.h"
+#include "misc/environment.h"
+#include "misc/feature/Shape.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,15 +35,15 @@
 #include <cassert>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_split_3, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "split_3.lst"
@@ -57,7 +57,7 @@ TEST(NNAPI_Quickcheck_split_3, simple_test)
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Initialize random number generator
   std::minstd_rand random(SEED);
@@ -134,7 +134,7 @@ TEST(NNAPI_Quickcheck_split_3, simple_test)
     interp.SetOutputs(ofm_indexes);
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/split_4.cpp b/tools/nnapi_quickcheck/tests/split_4.cpp
index 394c392b6..e098973d2 100644
--- a/tools/nnapi_quickcheck/tests/split_4.cpp
+++ b/tools/nnapi_quickcheck/tests/split_4.cpp
@@ -16,14 +16,14 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
-#include "util/feature/Shape.h"
+#include "misc/environment.h"
+#include "misc/feature/Shape.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,15 +35,15 @@
 #include <cassert>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_split_4, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "split_4.lst"
@@ -57,7 +57,7 @@ TEST(NNAPI_Quickcheck_split_4, simple_test)
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Initialize random number generator
   std::minstd_rand random(SEED);
@@ -134,7 +134,7 @@ TEST(NNAPI_Quickcheck_split_4, simple_test)
     interp.SetOutputs(ofm_indexes);
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/sub_1.cpp b/tools/nnapi_quickcheck/tests/sub_1.cpp
index 9e4ff4ce7..8bc4208c5 100644
--- a/tools/nnapi_quickcheck/tests/sub_1.cpp
+++ b/tools/nnapi_quickcheck/tests/sub_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_sub_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "sub_1.lst"
@@ -146,7 +146,7 @@ TEST(NNAPI_Quickcheck_sub_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/sub_2.cpp b/tools/nnapi_quickcheck/tests/sub_2.cpp
index 2702edbf1..423e105f2 100644
--- a/tools/nnapi_quickcheck/tests/sub_2.cpp
+++ b/tools/nnapi_quickcheck/tests/sub_2.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_sub_2, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "sub_2.lst"
@@ -139,7 +139,7 @@ TEST(NNAPI_Quickcheck_sub_2, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/sub_3.cpp b/tools/nnapi_quickcheck/tests/sub_3.cpp
index 6122e2486..7bb6ab4c0 100644
--- a/tools/nnapi_quickcheck/tests/sub_3.cpp
+++ b/tools/nnapi_quickcheck/tests/sub_3.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_sub_3, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "sub_3.lst"
@@ -131,7 +131,7 @@ TEST(NNAPI_Quickcheck_sub_3, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/sub_4.cpp b/tools/nnapi_quickcheck/tests/sub_4.cpp
index 28922fe4b..7fc857746 100644
--- a/tools/nnapi_quickcheck/tests/sub_4.cpp
+++ b/tools/nnapi_quickcheck/tests/sub_4.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_sub_4, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "sub_1.lst"
@@ -139,7 +139,7 @@ TEST(NNAPI_Quickcheck_sub_4, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/sub_5.cpp b/tools/nnapi_quickcheck/tests/sub_5.cpp
index e421a12c2..19f95b616 100644
--- a/tools/nnapi_quickcheck/tests/sub_5.cpp
+++ b/tools/nnapi_quickcheck/tests/sub_5.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_sub_5, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "sub_5.lst"
@@ -175,7 +175,7 @@ TEST(NNAPI_Quickcheck_sub_5, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/sub_6.cpp b/tools/nnapi_quickcheck/tests/sub_6.cpp
index 00bfc5423..66b167eb3 100644
--- a/tools/nnapi_quickcheck/tests/sub_6.cpp
+++ b/tools/nnapi_quickcheck/tests/sub_6.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_sub_6, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "sub_6.lst"
@@ -175,7 +175,7 @@ TEST(NNAPI_Quickcheck_sub_6, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/tanh_1.cpp b/tools/nnapi_quickcheck/tests/tanh_1.cpp
index 6a9a29933..7dd92613c 100644
--- a/tools/nnapi_quickcheck/tests/tanh_1.cpp
+++ b/tools/nnapi_quickcheck/tests/tanh_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -35,20 +35,20 @@
 #include <random>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_tanh_1, simple_test)
 {
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "tanh_1.lst"
@@ -121,7 +121,7 @@ TEST(NNAPI_Quickcheck_tanh_1, simple_test)
     interp.SetOutputs({0});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnapi_quickcheck/tests/topk_v2_1.cpp b/tools/nnapi_quickcheck/tests/topk_v2_1.cpp
index 4b145e5a7..c47af57cc 100644
--- a/tools/nnapi_quickcheck/tests/topk_v2_1.cpp
+++ b/tools/nnapi_quickcheck/tests/topk_v2_1.cpp
@@ -16,13 +16,13 @@
 
 #include "gtest/gtest.h"
 
-#include "tflite/kernels/register.h"
-#include "tensorflow/contrib/lite/model.h"
-#include "tensorflow/contrib/lite/builtin_op_data.h"
+#include "tflite/ext/kernels/register.h"
+#include "tensorflow/lite/model.h"
+#include "tensorflow/lite/builtin_op_data.h"
 
 #include "env.h"
 #include "memory.h"
-#include "util/environment.h"
+#include "misc/environment.h"
 
 #include "tflite/Diff.h"
 #include "tflite/Quantization.h"
@@ -32,21 +32,21 @@
 #include <iostream>
 
 using namespace tflite;
-using namespace tflite::ops::builtin;
+using namespace nnfw::tflite;
 
 TEST(NNAPI_Quickcheck_topk_v2_1, simple_test)
 {
   // Set random seed
   int SEED = std::chrono::system_clock::now().time_since_epoch().count();
 
-  nnfw::util::env::IntAccessor("SEED").access(SEED);
+  nnfw::misc::env::IntAccessor("SEED").access(SEED);
 
   // Set random test parameters
   int verbose = 0;
   int tolerance = 1;
 
-  nnfw::util::env::IntAccessor("VERBOSE").access(verbose);
-  nnfw::util::env::IntAccessor("TOLERANCE").access(tolerance);
+  nnfw::misc::env::IntAccessor("VERBOSE").access(verbose);
+  nnfw::misc::env::IntAccessor("TOLERANCE").access(tolerance);
 
 #define INT_VALUE(NAME, VALUE) IntVar NAME##_Value(#NAME, VALUE);
 #include "topk_v2_1.lst"
@@ -125,7 +125,7 @@ TEST(NNAPI_Quickcheck_topk_v2_1, simple_test)
     interp.SetOutputs({2, 3});
   };
 
-  const nnfw::support::tflite::interp::FunctionBuilder builder(setup);
+  const nnfw::tflite::FunctionBuilder builder(setup);
 
   RandomTestParam param;
 
diff --git a/tools/nnpackage_tool/model2nnpkg/README.md b/tools/nnpackage_tool/model2nnpkg/README.md
new file mode 100644
index 000000000..716f4f8d5
--- /dev/null
+++ b/tools/nnpackage_tool/model2nnpkg/README.md
@@ -0,0 +1,21 @@
+# model2nnpkg
+
+`model2nnpkg` is a tool to convert model (either `tflite` or `circle`) to `nnpackage`.
+
+It takes `modelfile` as input and generates `nnpackage`.
+
+## Usage
+
+```
+Usage: model2nnpkg.sh [options] modelfile
+Convert modelfile (either tflite or circle) to nnpackage.
+
+Options:
+    -h   show this help
+    -o   set nnpackage output directory (default=.)
+
+Examples:
+    model2nnpkg.sh add.tflite        => create nnpackage in ./
+    model2nnpkg.sh -o out add.tflite => create nnpackage in out/
+
+```
diff --git a/tools/nnpackage_tool/model2nnpkg/model2nnpkg.sh b/tools/nnpackage_tool/model2nnpkg/model2nnpkg.sh
new file mode 100644
index 000000000..87cd7878b
--- /dev/null
+++ b/tools/nnpackage_tool/model2nnpkg/model2nnpkg.sh
@@ -0,0 +1,70 @@
+#!/bin/bash
+
+set -eu
+
+progname=$(basename "${BASH_SOURCE[0]}")
+outdir="."
+
+usage() {
+  echo "Usage: $progname [options] modelfile"
+  echo "Convert modelfile (either tflite or circle) to nnpackage."
+  echo ""
+  echo "Options:"
+  echo "    -h   show this help"
+  echo "    -o   set nnpackage output directory (default=$outdir)"
+  echo ""
+  echo "Examples:"
+  echo "    $progname add.tflite        => create nnpackage in $outdir/"
+  echo "    $progname -o out add.tflite => create nnpackage in out/"
+  exit 1
+}
+
+if [ $# -eq 0 ]; then
+  echo "For help, type $progname -h"
+  exit 1
+fi
+
+while getopts "ho:" OPTION; do
+case "${OPTION}" in
+    h) usage;;
+    o) outdir=$OPTARG;;
+    ?) exit 1;;
+esac
+done
+
+shift $((OPTIND-1))
+
+if [ $# -ne 1 ]; then
+  echo "error: wrong argument (no argument or too many arguments)."
+  echo "For help, type $progname -h"
+  exit 1
+fi
+
+modelfile=$(basename "$1")
+
+if [[ "$modelfile" != *.* ]]; then
+  echo "error: modelfile does not have extension."
+  echo "Please provide extension so that $progname can identify what type of model you use."
+  exit 1
+fi
+
+if [ ! -e $1 ]; then
+  echo "error: "$1" does not exist."
+  exit 1
+fi
+
+name=${modelfile%.*}
+extension=${modelfile##*.}
+
+echo "Generating nnpackage "$name" in "$outdir""
+mkdir -p "$outdir"/"$name"/metadata
+cat > "$outdir"/"$name"/metadata/MANIFEST <<-EOF
+{
+  "major-version" : "1",
+  "minor-version" : "0",
+  "patch-version" : "0",
+  "models"      : [ "$name.$extension" ],
+  "model-types" : [ "$extension" ]
+}
+EOF
+cp "$1" "$outdir"/"$name"
diff --git a/tools/nnpackage_tool/nncc-tc-to-nnpkg-tc/README.md b/tools/nnpackage_tool/nncc-tc-to-nnpkg-tc/README.md
new file mode 100644
index 000000000..9e5ae2938
--- /dev/null
+++ b/tools/nnpackage_tool/nncc-tc-to-nnpkg-tc/README.md
@@ -0,0 +1,26 @@
+# nncc-tc-to-nnpkg-tc
+
+`model2nnpkg` is a tool to convert model (either `tflite` or `circle`) to `nnpackage`.
+
+It takes `modelfile` as input and generates `nnpackage`.
+
+## Usage
+
+```
+Usage: nncc-tc-to-nnpkg-tc.sh [options] nncc_tc_name
+Convert nncc testcase to nnpackage testcase.
+
+Options:
+    -h   show this help
+    -i   set input directory (default=.)
+    -o   set nnpackage testcase output directory (default=.)
+
+Env:
+   model2nnpkg    path to model2nnpkg tool (default={this_script_home}/../model2nnpkg)
+
+Examples:
+    nncc-tc-to-nnpkg-tc.sh -i build/compiler/tf2tflite UNIT_Add_000
+      => create nnpackage testcase in ./ from build/compiler/tf2tflite/UNIT_Add_000.*
+    nncc-tc-to-nnpkg-tc.sh -o out UNIT_Add_000
+      => create nnpackage testcase in out/ using ./UNIT_Add_000.*
+```
diff --git a/tools/nnpackage_tool/nncc-tc-to-nnpkg-tc/nncc-tc-to-nnpkg-tc.sh b/tools/nnpackage_tool/nncc-tc-to-nnpkg-tc/nncc-tc-to-nnpkg-tc.sh
new file mode 100644
index 000000000..01ce1476f
--- /dev/null
+++ b/tools/nnpackage_tool/nncc-tc-to-nnpkg-tc/nncc-tc-to-nnpkg-tc.sh
@@ -0,0 +1,84 @@
+#!/bin/bash
+
+set -eu
+
+progname=$(basename "${BASH_SOURCE[0]}")
+script_dir="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )"
+model2nnpkg=${model2nnpkg:-"$script_dir"/../model2nnpkg/model2nnpkg.sh}
+
+indir="."
+outdir="."
+
+usage() {
+  echo "Usage: $progname [options] nncc_tc_name"
+  echo "Convert nncc testcase to nnpackage testcase."
+  echo ""
+  echo "Options:"
+  echo "    -h   show this help"
+  echo "    -i   set input directory (default=$indir)"
+  echo "    -o   set nnpackage testcase output directory (default=$outdir)"
+  echo ""
+  echo "Env:"
+  echo "   model2nnpkg    path to model2nnpkg tool (default={this_script_home}/../model2nnpkg)"
+  echo ""
+  echo "Examples:"
+  echo "    $progname -i build/compiler/tf2tflite UNIT_Add_000"
+  echo "      => create nnpackage testcase in $outdir/ from build/compiler/tf2tflite/UNIT_Add_000.*"
+  echo "    $progname -o out UNIT_Add_000"
+  echo "      => create nnpackage testcase in out/ using $indir/UNIT_Add_000.*"
+  exit 1
+}
+
+if [ $# -eq 0 ]; then
+  echo "For help, type $progname -h"
+  exit 1
+fi
+
+while getopts "hi:o:" OPTION; do
+case "${OPTION}" in
+    h) usage;;
+    i) indir=$OPTARG;;
+    o) outdir=$OPTARG;;
+    ?) exit 1;;
+esac
+done
+
+shift $((OPTIND-1))
+
+if [ $# -ne 1 ]; then
+  echo "error: wrong argument (no argument or too many arguments)."
+  echo "For help, type $progname -h"
+  exit 1
+fi
+
+tcname=$1
+
+supported_model_types="
+circle
+tflite
+"
+
+model_type=""
+
+for ext in $supported_model_types; do
+  [ -e "$indir/$tcname"."$ext" ] && model_type=$ext
+done;
+
+if [[ "$model_type" == "" ]]; then
+  echo "error: No modelfile is found in $indir/$tcname*"
+  exit 1
+fi
+
+$model2nnpkg -o "$outdir" "$indir/$tcname"."$model_type"
+
+extensions="
+expected.h5
+input.h5
+"
+
+destdir="$outdir/$tcname/metadata/tc"
+mkdir -p "$destdir"
+for ext in $extensions; do
+  cp "$indir/$tcname.$ext" "$destdir/$ext"
+done;
+
diff --git a/tools/nnpackage_tool/nnpackager/nnpackager.py b/tools/nnpackage_tool/nnpackager/nnpackager.py
new file mode 100644
index 000000000..8e2805aa7
--- /dev/null
+++ b/tools/nnpackage_tool/nnpackager/nnpackager.py
@@ -0,0 +1,65 @@
+#!/usr/bin/python3
+
+import json
+import os
+from collections import OrderedDict
+import sys
+import argparse
+import shutil
+
+
+def verify(path):
+    nnpackage_root_path = path
+
+    # Check nnpackage_root existence
+    if not os.path.isdir(nnpackage_root_path):
+        print("Error: nnpackage_root {} does not exist.".format(nnpackage_root_path))
+        sys.exit(-1)
+
+    # Check MANIFEST existence
+    manifest_path = os.path.join(nnpackage_root_path, "metadata", "MANIFEST")
+    if not os.path.exists(manifest_path):
+        print("Error: MANIFEST {} does not exist.".format(manifest_path))
+        sys.exit(-1)
+
+    # Check MANIFEST
+    with open(manifest_path, "r") as f:
+        try:
+            json_dict = json.load(f, object_pairs_hook=OrderedDict)
+            # Check models attributes
+            for m in json_dict["models"]:
+                model_path = os.path.join(nnpackage_root_path, m)
+                if not os.path.exists(model_path):
+                    print("Error: model {} does not exist.".format(model_path))
+                    sys.exit(-1)
+            print("nnpackage validation check passed.")
+        except ValueError:
+            print("MANIFEST is not valid JSON.")
+        except KeyError:
+            print("models attribute does not exist.")
+
+
+def compress(path):
+    nnpackage_name = os.path.basename(os.path.normpath(path))
+    shutil.make_archive(nnpackage_name, 'zip', path)
+    print("nnpackage compression is done")
+
+
+if __name__ == '__main__':
+    parser = argparse.ArgumentParser()
+    parser.add_argument('path', type=str, help='the path to nnpackage')
+    parser.add_argument(
+        '-v', '--verify', action='store_true', help="verify nnpackage (default: false)")
+    parser.add_argument(
+        '-c',
+        '--compress',
+        action='store_true',
+        help="compress nnpackage (default: false)")
+
+    args = parser.parse_args()
+
+    if args.verify:
+        verify(args.path)
+
+    if args.compress:
+        compress(args.path)
diff --git a/tools/nnpackage_tool/nnpkg_test/README.md b/tools/nnpackage_tool/nnpkg_test/README.md
new file mode 100644
index 000000000..916877a3d
--- /dev/null
+++ b/tools/nnpackage_tool/nnpkg_test/README.md
@@ -0,0 +1,42 @@
+# nnpkg_test
+
+`nnpkg_test` is a tool to run an nnpackage testcase.
+
+`nnpackage testcase` is an nnpackage with additional data:
+
+- input.h5 (input data)
+- expected.h5 (expected outpute data)
+
+`nnpkg_test` uses `nnpackage_run` internally to run `nnpackage`.
+
+Then, it compares through `difftool` (either `i5diff` or `h5diff`).
+
+`nnpkg_test` returns `0` on success, `non-zero` otherwise.
+
+## Usage
+
+```
+$ tools/nnpackage_tool/nnpkg_test/nnpkg_test.sh -h
+Usage: nnpkg_test.sh [options] nnpackage_test
+Run an nnpackage testcase
+
+Returns
+     0       success
+  non-zero   failure
+
+Options:
+    -h   show this help
+    -i   set input directory (default=.)
+    -o   set output directory (default=.)
+    -d   delete dumped file on failure.
+         (dumped file are always deleted on success) (default=0)
+
+Environment variables:
+   nnpackage_run    path to nnpackage_run (default=Product/out/bin/nnpackage_run)
+   difftool         path to i5diff or h5diff (default=h5diff)
+
+Examples:
+    nnpkg_test.sh Add_000                => run ./Add_000 and check output
+    nnpkg_test.sh -i nnpkg-tcs Add_000   => run nnpkg-tcs/Add_000 and check output
+
+```
diff --git a/tools/nnpackage_tool/nnpkg_test/list b/tools/nnpackage_tool/nnpkg_test/list
new file mode 100644
index 000000000..b4dcc882c
--- /dev/null
+++ b/tools/nnpackage_tool/nnpkg_test/list
@@ -0,0 +1,22 @@
+UNIT_Add_000
+UNIT_AvgPool_000
+UNIT_AvgPool_001
+UNIT_BiasAdd_002
+UNIT_Concat_002
+UNIT_Conv2D_000
+UNIT_DepthwiseConv2D_000
+UNIT_DepthwiseConv2D_001
+UNIT_MaxPool_000
+UNIT_MaxPool_001
+UNIT_RealDiv_000
+UNIT_Relu_000
+UNIT_Relu6_000
+UNIT_Reshape_000
+UNIT_Rsqrt_000
+UNIT_Softmax_001
+UNIT_Sqrt_000
+UNIT_Squeeze_000
+UNIT_Squeeze_001
+UNIT_Squeeze_002
+UNIT_Sub_000
+UNIT_Tanh_000
diff --git a/tools/nnpackage_tool/nnpkg_test/nnpkg_test.sh b/tools/nnpackage_tool/nnpkg_test/nnpkg_test.sh
new file mode 100644
index 000000000..e4b81a09f
--- /dev/null
+++ b/tools/nnpackage_tool/nnpkg_test/nnpkg_test.sh
@@ -0,0 +1,122 @@
+#!/bin/bash
+
+set -u
+
+command_exists() {
+	command -v "$@" > /dev/null 2>&1
+}
+
+progname=$(basename "${BASH_SOURCE[0]}")
+indir="."
+outdir="."
+nnpkg_run=${nnpkg_run:-"Product/out/bin/nnpackage_run"}
+difftool=${difftool:-"h5diff"}
+delete_dumped_on_failure=0
+
+usage() {
+  echo "Usage: $progname [options] nnpackage_test"
+  echo "Run an nnpackage testcase"
+  echo ""
+  echo "Returns"
+  echo "     0       success"
+  echo "  non-zero   failure"
+  echo ""
+  echo "Options:"
+  echo "    -h   show this help"
+  echo "    -i   set input directory (default=$indir)"
+  echo "    -o   set output directory (default=$outdir)"
+  echo "    -d   delete dumped file on failure."
+  echo "         (dumped file are always deleted on success) (default=$delete_dumped_on_failure)"
+  echo ""
+  echo "Environment variables:"
+  echo "   nnpackage_run    path to nnpackage_run (default=Product/out/bin/nnpackage_run)"
+  echo "   difftool         path to i5diff or h5diff (default=h5diff)"
+  echo ""
+  echo "Examples:"
+  echo "    $progname Add_000                => run $indir/Add_000 and check output"
+  echo "    $progname -i nnpkg-tcs Add_000   => run nnpkg-tcs/Add_000 and check output"
+  exit 1
+}
+
+if [ $# -eq 0 ]; then
+  echo "For help, type $progname -h"
+  exit 1
+fi
+
+while getopts "hdi:" OPTION; do
+case "${OPTION}" in
+    h) usage;;
+    d) delete_dumped_on_failure=1;;
+    i) indir=$OPTARG;;
+    ?) exit 1;;
+esac
+done
+
+shift $((OPTIND-1))
+
+if [ $# -ne 1 ]; then
+  echo "error: wrong argument (no argument or too many arguments)."
+  echo "For help, type $progname -h"
+  exit 1
+fi
+
+if [ ! -e Product ]; then
+  echo "error: please make sure to run this script in nnfw home."
+  exit 1
+fi
+
+tcname=$(basename "$1")
+nnpkg="$indir/$tcname"
+
+# run
+
+if [ ! -e $nnpkg ]; then
+  echo "error: nnpackage "$nnpkg" does not exist."
+  exit 1
+fi
+
+if ! command_exists $nnpkg_run; then
+  echo "error: runner "$nnpkg_run" does not exist."
+  exit 1
+fi
+
+dumped="$outdir/$tcname".out.h5
+
+echo -n "[  Run  ] $nnpkg "
+
+if LD_LIBRARY_PATH=Product/out/lib $nnpkg_run \
+--nnpackage "$nnpkg" \
+--load "$nnpkg/metadata/tc/input.h5" \
+--dump "$dumped" >& /dev/null > "$dumped.log" 2>&1 ; then
+  echo -e "\tPass"
+  rm "$dumped.log"
+else
+  echo -e "\tFail"
+  echo ""
+  cat "$dumped.log"
+  echo ""
+  rm "$dumped.log"
+  exit 2
+fi
+
+# diff
+
+if ! command_exists $difftool; then
+  echo "error: difftool "$difftool" does not exist."
+  exit 1
+fi
+
+expected="$nnpkg/metadata/tc/expected.h5"
+
+echo -n "[Compare] $nnpkg "
+
+if $difftool -d 0.001 -v "$dumped" "$expected" /value >& "$dumped.log"; then
+  echo -e "\tPass"
+  rm "$dumped" "$dumped.log"
+else
+  echo -e "\tFail"
+  [ $delete_dumped_on_failure ] && rm "$dumped"
+  cat "$dumped.log"
+  rm "$dumped.log"
+  exit 3
+fi
diff --git a/tools/nnpackage_tool/tflite2circle/README.md b/tools/nnpackage_tool/tflite2circle/README.md
new file mode 100644
index 000000000..94ef5068c
--- /dev/null
+++ b/tools/nnpackage_tool/tflite2circle/README.md
@@ -0,0 +1,28 @@
+# tflite2circle
+
+`tflite2circle` is a tool to convert tflite into circle.
+
+## Usage
+
+```
+Usage: tflite2circle.sh [options] tflite
+Convert tflite to circle
+
+Returns
+     0       success
+  non-zero   failure
+
+Options:
+    -h   show this help
+    -o   set output directory (default=.)
+
+Environment variables:
+   flatc           path to flatc
+                   (default=./build/externals/FLATBUFFERS/build/flatc)
+   tflite_schema   path to schema.fbs
+                   (default=./externals/TENSORFLOW-1.12/tensorflow/contrib/lite/schema/schema.fbs)
+
+Examples:
+    tflite2circle.sh Add_000.tflite         => convert Add_000.tflite into Add_000.circle
+    tflite2circle.sh -o my/circles Add_000  => convert Add_000.tflite into my/circles/Add_000.circle
+```
diff --git a/tools/nnpackage_tool/tflite2circle/tflite2circle.sh b/tools/nnpackage_tool/tflite2circle/tflite2circle.sh
new file mode 100644
index 000000000..259e57d83
--- /dev/null
+++ b/tools/nnpackage_tool/tflite2circle/tflite2circle.sh
@@ -0,0 +1,73 @@
+#!/bin/bash
+
+set -u
+
+progname=$(basename "${BASH_SOURCE[0]}")
+script_dir="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )"
+outdir="."
+flatc=${flatc:-"./build/externals/FLATBUFFERS/build/flatc"}
+tflite_schema=${tflite_schema:-"./externals/TENSORFLOW-1.12/tensorflow/contrib/lite/schema/schema.fbs"}
+circle_schema=${circle_schema:-"./nnpackage/schema/circle_schema.fbs"}
+
+usage() {
+  echo "Usage: $progname [options] tflite"
+  echo "Convert tflite to circle"
+  echo ""
+  echo "Returns"
+  echo "     0       success"
+  echo "  non-zero   failure"
+  echo ""
+  echo "Options:"
+  echo "    -h   show this help"
+  echo "    -o   set output directory (default=$outdir)"
+  echo ""
+  echo "Environment variables:"
+  echo "   flatc           path to flatc"
+  echo "                   (default=./build/externals/FLATBUFFERS/build/flatc)"
+  echo "   tflite_schema   path to tflite schema (i.e. schema.fbs)"
+  echo "                   (default=./externals/TENSORFLOW-1.12/tensorflow/contrib/lite/schema/schema.fbs)"
+  echo "   circle_schema   path to circle schema"
+  echo "                   (default=./nnpackage/schema/circle_schema.fbs)"
+  echo ""
+  echo "Examples:"
+  echo "    $progname Add_000.tflite         => convert Add_000.tflite into Add_000.circle"
+  echo "    $progname -o my/circles Add_000  => convert Add_000.tflite into my/circles/Add_000.circle"
+  exit 1
+}
+
+if [ $# -eq 0 ]; then
+  echo "For help, type $progname -h"
+  exit 1
+fi
+
+while getopts "ho:" OPTION; do
+case "${OPTION}" in
+    h) usage;;
+    o) outdir=$OPTARG;;
+    ?) exit 1;;
+esac
+done
+
+shift $((OPTIND-1))
+
+if [ $# -ne 1 ]; then
+  echo "error: wrong argument (no argument or too many arguments)."
+  echo "For help, type $progname -h"
+  exit 1
+fi
+
+if [ ! -e Product ]; then
+  echo "error: please make sure to run this script in nnfw home."
+  exit 1
+fi
+
+tflite_base=$(basename "$1")
+name=${tflite_base%.*}
+
+# convert
+
+mkdir -p "${outdir}"
+${flatc} -o ${outdir} --defaults-json --strict-json -t ${tflite_schema} -- $1
+${script_dir}/tflitejson2circlejson.py "${outdir}/${name}.json" > "${outdir}/${name}.circle"
+${flatc} -o ${outdir} -b ${circle_schema} "${outdir}/${name}.circle"
+rm -f ${outdir}/${name}.json
diff --git a/tools/nnpackage_tool/tflite2circle/tflitejson2circlejson.py b/tools/nnpackage_tool/tflite2circle/tflitejson2circlejson.py
new file mode 100644
index 000000000..c20a0c53e
--- /dev/null
+++ b/tools/nnpackage_tool/tflite2circle/tflitejson2circlejson.py
@@ -0,0 +1,28 @@
+#!/usr/bin/python3
+
+import json
+import os
+import sys
+from collections import OrderedDict
+
+
+def usage():
+    script = os.path.basename(os.path.basename(__file__))
+    print("Usage: {} path_to_tflite_in_json".format(script))
+    sys.exit(-1)
+
+
+if __name__ == '__main__':
+    if len(sys.argv) != 2:
+        usage()
+
+    json_path = sys.argv[1]
+    with open(json_path, "r") as f:
+        try:
+            json_dict = json.load(f, object_pairs_hook=OrderedDict)
+            for subgraph in json_dict["subgraphs"]:
+                subgraph["data_format"] = "CHANNELS_LAST"
+            print(json.dumps(json_dict, indent=2))
+        except KeyError:
+            print("subgraphs attribute does not exist.")
+            sys.exit(-2)
diff --git a/tools/opencl_tool/CMakeLists.txt b/tools/opencl_tool/CMakeLists.txt
index 66b92854c..f1fcc8702 100644
--- a/tools/opencl_tool/CMakeLists.txt
+++ b/tools/opencl_tool/CMakeLists.txt
@@ -4,9 +4,9 @@ endif(NOT ${TARGET_ARCH_BASE} STREQUAL "arm")
 
 list(APPEND OPENCL_INFO_SOURCE "src/opencl_info.cc")
 
+nnfw_find_package(ARMCompute REQUIRED)
+
 add_executable(opencl_info ${OPENCL_INFO_SOURCE})
-target_include_directories(opencl_info PUBLIC ${CMAKE_SOURCE_DIR}/externals/acl)
-target_include_directories(opencl_info PUBLIC ${CMAKE_SOURCE_DIR}/externals/acl/include)
 target_link_libraries(opencl_info arm_compute)
 
 install(TARGETS opencl_info DESTINATION bin)
diff --git a/tools/pbfile_tool/convert_pb_to_pbtxt.py b/tools/pbfile_tool/convert_pb_to_pbtxt.py
new file mode 100644
index 000000000..28a3da4c2
--- /dev/null
+++ b/tools/pbfile_tool/convert_pb_to_pbtxt.py
@@ -0,0 +1,54 @@
+# Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#    http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+#
+# This tool converts frozen pb file in tensorflow to pbtxt text file
+#
+
+import os
+import argparse
+
+from tensorflow.python.platform import gfile
+import tensorflow as tf
+
+
+def convert(pb_path):
+
+    directory = os.path.dirname(pb_path)
+    filename = os.path.basename(pb_path)
+
+    with gfile.GFile(pb_path, 'rb') as f:
+        content = f.read()
+
+    graph_def = tf.GraphDef()
+    graph_def.ParseFromString(content)
+    tf.import_graph_def(graph_def, name='')
+
+    tf.train.write_graph(graph_def, directory, filename + '.pbtxt', as_text=True)
+
+    return os.path.join(directory, filename + '.pbtxt')
+
+
+if __name__ == "__main__":
+
+    parser = argparse.ArgumentParser(
+        description='convert pb (binary) file to pbtxt (text) file')
+    parser.add_argument("path", help="path of Tensorflow frozen model file in .pb format")
+
+    args = parser.parse_args()
+    pb_path = args.path
+
+    pbtxt_path = convert(pb_path)
+
+    print("converted: " + pbtxt_path)
diff --git a/tools/pbfile_tool/pb_info.py b/tools/pbfile_tool/pb_info.py
index 110b15e02..7add94fa8 100755
--- a/tools/pbfile_tool/pb_info.py
+++ b/tools/pbfile_tool/pb_info.py
@@ -16,7 +16,6 @@
 
 import tensorflow as tf
 from google.protobuf import text_format
-from tensorflow.python.platform import gfile
 from tensorflow.python.tools import freeze_graph
 from tensorflow.python.tools import optimize_for_inference_lib
 
@@ -40,7 +39,7 @@ def importGraphIntoSession(sess, filename):
     assert sess
     (_, _, ext) = splitDirFilenameExt(filename)
     if (ext.lower() == 'pb'):
-        with gfile.FastGFile(filename, 'rb') as f:
+        with tf.gfile.GFile(filename, 'rb') as f:
             graph_def = tf.GraphDef()
             graph_def.ParseFromString(f.read())
 
diff --git a/tools/tensorflow_model_freezer/base_freezer.py b/tools/tensorflow_model_freezer/base_freezer.py
index 96d011718..a365a7806 100644
--- a/tools/tensorflow_model_freezer/base_freezer.py
+++ b/tools/tensorflow_model_freezer/base_freezer.py
@@ -91,18 +91,17 @@ class BaseFreezer(object):
         return tf_tensor
 
     def saveRelatedFiles(self, sess, input_node_list, output_node_list, fn_prefix):
-        ''' saves pb, pbtxt, chpt files and then freeze graph under top_node_name into directory '''
-        ''' produce pb, pbtxt, and ckpt files '''
+        # saves pb, pbtxt, chpt files and then freeze graph under top_node_name into directory
+        # produce pb, pbtxt, and ckpt files
         (pb_path, pbtxt_path, checkpoint_path) = util.savePbAndCkpt(
             sess, self.getOutputDirectory(), fn_prefix)
 
         print("")
         print("# 1. Created Tensorflow model files :\n\t-{}\n\t-{}\n\t-{}\n".format(
             pb_path, pbtxt_path, checkpoint_path))
-        '''
-        produce frozen files
-        include only nodes below softmax node. nodes for gradient descent (reduce_mean, GradientDescentOptimizer, ...) will not be included
-        '''
+
+        # produce frozen files
+        # include only nodes below softmax node. nodes for gradient descent (reduce_mean, GradientDescentOptimizer, ...) will not be included
         sess.close()
 
         output_node_name = fn_prefix
@@ -115,27 +114,25 @@ class BaseFreezer(object):
 
         self.generateTensorboardLog(pb_path, frozen_pb_path, fn_prefix)
         print("")
-        ''' generate tflite file. '''
-        # manually put back imported modules. refer to https://github.com/tensorflow/tensorflow/issues/15410#issuecomment-352189481
-        import tempfile
-        import subprocess
-        tf.contrib.lite.tempfile = tempfile
-        tf.contrib.lite.subprocess = subprocess
 
+        # generate tflite file.
+        # code from https://www.tensorflow.org/lite/convert/python_api
         tflite_path = os.path.join(self.getOutputDirectory(), fn_prefix + ".tflite")
+        try:
+            # sometime, name of node "input" contains "input:0". Let's remove ":0"
+            pure_name = lambda complex_name: complex_name.name.split(":")[0]
 
-        tf.reset_default_graph()
-        sess = tf.Session()
+            # returns list after mapping pure_name(element in tensor_list)
+            name_list = lambda tensor_list: map(pure_name, tensor_list)
 
-        util.importGraphIntoSession(sess, frozen_pb_path, "")
-        try:
-            converter = tf.contrib.lite.TFLiteConverter.from_session(
-                sess, input_node_list, output_node_list)
+            converter = tf.contrib.lite.TFLiteConverter.from_frozen_graph(
+                frozen_pb_path, name_list(input_node_list), name_list(output_node_list))
             tflite_model = converter.convert()
             open(tflite_path, "wb").write(tflite_model)
-            print("# 3. TOCO : Created TFLITE file :\n\t-{}\n".format(tflite_path))
+            print("# 3. TensorFlow Lite Converter : converted PB file to {}\n".format(
+                tflite_path))
         except Exception:
-            print("# 3. TOCO failed\n")
+            print("# 3. TensorFlow Lite Converter failed\n")
             print(traceback.format_exc())
 
         return (pb_path, frozen_pb_path, tflite_path)
@@ -175,7 +172,8 @@ class BaseFreezer(object):
                 # build model
                 (input_node_list, output_node_list) = self.buildModel(
                     sess, test_cases.get(tc_name), tc_name)
-                ''' Now, save to proto buffer format and checkpoint '''
+
+                # Now, save to proto buffer format and checkpoint
                 (pb_path, frozen_pb_path, tflite_path) = self.saveRelatedFiles(
                     sess, input_node_list, output_node_list, tc_name)
 
@@ -195,7 +193,8 @@ class BaseFreezer(object):
             # build model
             (input_node_list, output_node_list) = self.buildModel(
                 sess, test_cases.get(tc_name), tc_name)
-            ''' Now, save to proto buffer format and checkpoint '''
+
+            # Now, save to proto buffer format and checkpoint
             (pb_path, frozen_pb_path, tflite_path) = self.saveRelatedFiles(
                 sess, input_node_list, output_node_list, tc_name)
 
diff --git a/tools/tensorflow_model_freezer/model_freezer_util.py b/tools/tensorflow_model_freezer/model_freezer_util.py
index 3b847f043..3fdbba785 100644
--- a/tools/tensorflow_model_freezer/model_freezer_util.py
+++ b/tools/tensorflow_model_freezer/model_freezer_util.py
@@ -92,8 +92,6 @@ def convertPbtxt2Pb(pbtxtPath):
 def convertPb2Pbtxt(pbPath):
     ''' convert pb file to pbtxt file. e.g., /tmp/a.pb --> /tmp/a.pbtxt '''
 
-    from tensorflow.python.platform import gfile
-
     (directory, filename, ext) = splitDirFilenameExt(pbPath)
 
     with gfile.FastGFile(pbPath, 'rb') as f:
diff --git a/tools/tensorflow_model_freezer/sample/ARGMAX_gen.py b/tools/tensorflow_model_freezer/sample/ARGMAX_gen.py
index 68e2262c0..0fa019a2a 100755
--- a/tools/tensorflow_model_freezer/sample/ARGMAX_gen.py
+++ b/tools/tensorflow_model_freezer/sample/ARGMAX_gen.py
@@ -30,7 +30,7 @@ class Gen(base.BaseFreezer):
     '''
 
     def __init__(self, path):
-        super(self.__class__, self).__init__(path)
+        super(Gen, self).__init__(path)
 
     def getOutputDirectory(self):
         return os.path.join(self.root_output_path,
diff --git a/tools/tensorflow_model_freezer/sample/ARGMIN_gen.py b/tools/tensorflow_model_freezer/sample/ARGMIN_gen.py
index 68b399234..9406d4255 100755
--- a/tools/tensorflow_model_freezer/sample/ARGMIN_gen.py
+++ b/tools/tensorflow_model_freezer/sample/ARGMIN_gen.py
@@ -30,7 +30,7 @@ class Gen(base.BaseFreezer):
     '''
 
     def __init__(self, path):
-        super(self.__class__, self).__init__(path)
+        super(Gen, self).__init__(path)
 
     def getOutputDirectory(self):
         return os.path.join(self.root_output_path,
diff --git a/tools/tensorflow_model_freezer/sample/DIV_gen.py b/tools/tensorflow_model_freezer/sample/DIV_gen.py
index d1b794cd7..f4f319f73 100755
--- a/tools/tensorflow_model_freezer/sample/DIV_gen.py
+++ b/tools/tensorflow_model_freezer/sample/DIV_gen.py
@@ -30,7 +30,7 @@ class Gen(base.BaseFreezer):
     '''
 
     def __init__(self, path):
-        super(self.__class__, self).__init__(path)
+        super(Gen, self).__init__(path)
 
     def getOutputDirectory(self):
         return os.path.join(self.root_output_path,
diff --git a/tools/tensorflow_model_freezer/sample/LOGICAL_AND_gen.py b/tools/tensorflow_model_freezer/sample/LOGICAL_AND_gen.py
index 912af65b2..fdd4c45a7 100755
--- a/tools/tensorflow_model_freezer/sample/LOGICAL_AND_gen.py
+++ b/tools/tensorflow_model_freezer/sample/LOGICAL_AND_gen.py
@@ -30,7 +30,7 @@ class Gen(base.BaseFreezer):
     '''
 
     def __init__(self, path):
-        super(self.__class__, self).__init__(path)
+        super(Gen, self).__init__(path)
 
     def getOutputDirectory(self):
         return os.path.join(self.root_output_path,
diff --git a/tools/tensorflow_model_freezer/sample/LOGICAL_NOT_gen.py b/tools/tensorflow_model_freezer/sample/LOGICAL_NOT_gen.py
index 34c0994ea..297a5aca2 100755
--- a/tools/tensorflow_model_freezer/sample/LOGICAL_NOT_gen.py
+++ b/tools/tensorflow_model_freezer/sample/LOGICAL_NOT_gen.py
@@ -30,7 +30,7 @@ class Gen(base.BaseFreezer):
     '''
 
     def __init__(self, path):
-        super(self.__class__, self).__init__(path)
+        super(Gen, self).__init__(path)
 
     def getOutputDirectory(self):
         return os.path.join(self.root_output_path,
diff --git a/tools/tensorflow_model_freezer/sample/LOGICAL_OR_gen.py b/tools/tensorflow_model_freezer/sample/LOGICAL_OR_gen.py
index 714a52e8d..70b897989 100755
--- a/tools/tensorflow_model_freezer/sample/LOGICAL_OR_gen.py
+++ b/tools/tensorflow_model_freezer/sample/LOGICAL_OR_gen.py
@@ -30,7 +30,7 @@ class Gen(base.BaseFreezer):
     '''
 
     def __init__(self, path):
-        super(self.__class__, self).__init__(path)
+        super(Gen, self).__init__(path)
 
     def getOutputDirectory(self):
         return os.path.join(self.root_output_path,
diff --git a/tools/tensorflow_model_freezer/sample/MUL_gen.py b/tools/tensorflow_model_freezer/sample/MUL_gen.py
index 596898dbb..0c7056b82 100755
--- a/tools/tensorflow_model_freezer/sample/MUL_gen.py
+++ b/tools/tensorflow_model_freezer/sample/MUL_gen.py
@@ -30,7 +30,7 @@ class Gen(base.BaseFreezer):
     '''
 
     def __init__(self, path):
-        super(self.__class__, self).__init__(path)
+        super(Gen, self).__init__(path)
 
     def getOutputDirectory(self):
         return os.path.join(self.root_output_path,
diff --git a/tools/tensorflow_model_freezer/sample/Operation_gen.py b/tools/tensorflow_model_freezer/sample/Operation_gen.py
index be4d74b2c..3a810e53d 100644
--- a/tools/tensorflow_model_freezer/sample/Operation_gen.py
+++ b/tools/tensorflow_model_freezer/sample/Operation_gen.py
@@ -27,7 +27,7 @@ import model_freezer_util as util
 # see MUL_gen.py for details usage and sample
 class GenFloor(base.BaseFreezer):
     def __init__(self, path):
-        super(self.__class__, self).__init__(path)
+        super(GenFloor, self).__init__(path)
 
     def getOutputDirectory(self):
         return os.path.join(self.root_output_path,
@@ -66,7 +66,7 @@ class GenFloor(base.BaseFreezer):
 
 class GenPad(base.BaseFreezer):
     def __init__(self, path):
-        super(self.__class__, self).__init__(path)
+        super(GenPad, self).__init__(path)
 
     def getOutputDirectory(self):
         return os.path.join(self.root_output_path,
@@ -111,7 +111,7 @@ class GenPad(base.BaseFreezer):
 
 class GenSqueeze(base.BaseFreezer):
     def __init__(self, path):
-        super(self.__class__, self).__init__(path)
+        super(GenSqueeze, self).__init__(path)
 
     def getOutputDirectory(self):
         return os.path.join(self.root_output_path,
@@ -150,7 +150,7 @@ class GenSqueeze(base.BaseFreezer):
 
 class GenTranspose(base.BaseFreezer):
     def __init__(self, path):
-        super(self.__class__, self).__init__(path)
+        super(GenTranspose, self).__init__(path)
 
     def getOutputDirectory(self):
         return os.path.join(self.root_output_path,
@@ -187,13 +187,11 @@ class GenTranspose(base.BaseFreezer):
         return (input_list, [output_node])
 
 
-'''
-How to run
-$ chmod +x tools/tensorflow_model_freezer/sample/name_of_this_file.py
-$ PYTHONPATH=$PYTHONPATH:./tools/tensorflow_model_freezer/ \
-      tools/tensorflow_model_freezer/sample/name_of_this_file.py \
-      ~/temp  # directory where model files are saved
-'''
+# How to run
+# $ chmod +x tools/tensorflow_model_freezer/sample/name_of_this_file.py
+# $ PYTHONPATH=$PYTHONPATH:./tools/tensorflow_model_freezer/ \
+#      tools/tensorflow_model_freezer/sample/name_of_this_file.py \
+#      ~/temp  # directory where model files are saved
 # --------
 if __name__ == "__main__":
 
diff --git a/tools/tensorflow_model_freezer/sample/SQUEEZE_gen.py b/tools/tensorflow_model_freezer/sample/SQUEEZE_gen.py
index 12fb5122e..a4d802ec5 100755
--- a/tools/tensorflow_model_freezer/sample/SQUEEZE_gen.py
+++ b/tools/tensorflow_model_freezer/sample/SQUEEZE_gen.py
@@ -30,7 +30,7 @@ class Gen(base.BaseFreezer):
     '''
 
     def __init__(self, path):
-        super(self.__class__, self).__init__(path)
+        super(Gen, self).__init__(path)
 
     def getOutputDirectory(self):
         return os.path.join(self.root_output_path,
diff --git a/tools/tensorflow_model_freezer/sample/STACK_gen.py b/tools/tensorflow_model_freezer/sample/STACK_gen.py
index 2bea40698..3eee6240c 100755
--- a/tools/tensorflow_model_freezer/sample/STACK_gen.py
+++ b/tools/tensorflow_model_freezer/sample/STACK_gen.py
@@ -30,7 +30,7 @@ class Gen(base.BaseFreezer):
     '''
 
     def __init__(self, path):
-        super(self.__class__, self).__init__(path)
+        super(Gen, self).__init__(path)
 
     def getOutputDirectory(self):
         return os.path.join(self.root_output_path,
diff --git a/tools/tensorflow_model_freezer/sample/TOPK_gen.py b/tools/tensorflow_model_freezer/sample/TOPK_gen.py
index 8f1882bd1..27b6f60a8 100755
--- a/tools/tensorflow_model_freezer/sample/TOPK_gen.py
+++ b/tools/tensorflow_model_freezer/sample/TOPK_gen.py
@@ -30,7 +30,7 @@ class Gen(base.BaseFreezer):
     '''
 
     def __init__(self, path):
-        super(self.__class__, self).__init__(path)
+        super(Gen, self).__init__(path)
 
     def getOutputDirectory(self):
         return os.path.join(self.root_output_path,
diff --git a/tools/tensorflow_model_freezer/sample/UNSTACK_gen.py b/tools/tensorflow_model_freezer/sample/UNSTACK_gen.py
index c5bce0d18..3cee7459f 100644
--- a/tools/tensorflow_model_freezer/sample/UNSTACK_gen.py
+++ b/tools/tensorflow_model_freezer/sample/UNSTACK_gen.py
@@ -30,7 +30,7 @@ class Gen(base.BaseFreezer):
     '''
 
     def __init__(self, path):
-        super(self.__class__, self).__init__(path)
+        super(Gen, self).__init__(path)
 
     def getOutputDirectory(self):
         return os.path.join(self.root_output_path,
diff --git a/tools/tflite_accuracy/CMakeLists.txt b/tools/tflite_accuracy/CMakeLists.txt
new file mode 100644
index 000000000..b545ac6bd
--- /dev/null
+++ b/tools/tflite_accuracy/CMakeLists.txt
@@ -0,0 +1,13 @@
+if(NOT BUILD_TFLITE_ACCURACY)
+  return()
+endif(NOT BUILD_TFLITE_ACCURACY)
+
+list(APPEND TFLITE_ACCURACY_SRCS "src/tflite_accuracy.cc")
+
+add_executable(tflite_accuracy ${TFLITE_ACCURACY_SRCS})
+target_include_directories(tflite_accuracy PRIVATE src)
+target_link_libraries(tflite_accuracy tensorflow-lite ${LIB_PTHREAD} dl nnfw_lib_tflite)
+target_link_libraries(tflite_accuracy boost_program_options boost_system boost_filesystem)
+
+install(TARGETS tflite_accuracy DESTINATION bin)
+
diff --git a/tools/tflite_accuracy/README.md b/tools/tflite_accuracy/README.md
new file mode 100644
index 000000000..22804e140
--- /dev/null
+++ b/tools/tflite_accuracy/README.md
@@ -0,0 +1,37 @@
+Using the batch execution tool
+==============================
+
+The batch execution tool (`tflite_accuracy`) can be used to run experiments
+where execution time and accuracy are to be measured on a test set.
+`tflite_accuracy` reads a neural network model from a file and a series of
+input images from a directory, runs each image through the network,
+and collect statistics, such as execution time and accuracy.
+
+In order to run this tool, you'll need:
+
+* a model in `.tflite` format;
+* a set of preprocessed input images in binary format, properly named
+(see below).
+
+`tflite_accuracy` expects all the input images to be located in the same directory
+in the file system. Each image file is the binary dump of the network's
+input tensor. So, if the network's input tensor is a `float32` tensor of 
+format (1, 224, 224, 3) containing 1 image of height 224, width 224, and
+3 channels, each image file is expected to be a series of 224 * 224 * 3 
+`float32` values.
+
+`tflite_accuracy` does **not** perform any preprocessing on the input tensor
+(e.g., subtraction of mean or division by standard deviation). Each image 
+file is treated as the final value of the input tensor, so all the
+necessary preprocessing should be done prior to invoking the tool.
+
+In order to calculate accuracy on the image set, `tflite_accuracy` needs to know
+the correct label corresponding to each image. This information is
+extracted from the file's name: the first four characters in the name are
+assumed to be the numerical code of the image's class. So, a file named
+`0123_0123456789.bin` is assumed to represent an image belonging to class
+`123`. The remainder of the name (`0123456789` in the example) is assumed 
+to be an identifier of the image itself.
+
+The width and height each image can be informed via the command line
+argument `--imgsize`, whose default value is 224.
\ No newline at end of file
diff --git a/tools/tflite_accuracy/src/labels.h b/tools/tflite_accuracy/src/labels.h
new file mode 100644
index 000000000..1e5170e06
--- /dev/null
+++ b/tools/tflite_accuracy/src/labels.h
@@ -0,0 +1,1023 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef LABELS_H_
+#define LABELS_H_
+
+// Labels used for image classification (imagenet dataset)
+static const char *labels[] = {"background",
+                               "tench",
+                               "goldfish",
+                               "great white shark",
+                               "tiger shark",
+                               "hammerhead",
+                               "electric ray",
+                               "stingray",
+                               "cock",
+                               "hen",
+                               "ostrich",
+                               "brambling",
+                               "goldfinch",
+                               "house finch",
+                               "junco",
+                               "indigo bunting",
+                               "robin",
+                               "bulbul",
+                               "jay",
+                               "magpie",
+                               "chickadee",
+                               "water ouzel",
+                               "kite",
+                               "bald eagle",
+                               "vulture",
+                               "great grey owl",
+                               "European fire salamander",
+                               "common newt",
+                               "eft",
+                               "spotted salamander",
+                               "axolotl",
+                               "bullfrog",
+                               "tree frog",
+                               "tailed frog",
+                               "loggerhead",
+                               "leatherback turtle",
+                               "mud turtle",
+                               "terrapin",
+                               "box turtle",
+                               "banded gecko",
+                               "common iguana",
+                               "American chameleon",
+                               "whiptail",
+                               "agama",
+                               "frilled lizard",
+                               "alligator lizard",
+                               "Gila monster",
+                               "green lizard",
+                               "African chameleon",
+                               "Komodo dragon",
+                               "African crocodile",
+                               "American alligator",
+                               "triceratops",
+                               "thunder snake",
+                               "ringneck snake",
+                               "hognose snake",
+                               "green snake",
+                               "king snake",
+                               "garter snake",
+                               "water snake",
+                               "vine snake",
+                               "night snake",
+                               "boa constrictor",
+                               "rock python",
+                               "Indian cobra",
+                               "green mamba",
+                               "sea snake",
+                               "horned viper",
+                               "diamondback",
+                               "sidewinder",
+                               "trilobite",
+                               "harvestman",
+                               "scorpion",
+                               "black and gold garden spider",
+                               "barn spider",
+                               "garden spider",
+                               "black widow",
+                               "tarantula",
+                               "wolf spider",
+                               "tick",
+                               "centipede",
+                               "black grouse",
+                               "ptarmigan",
+                               "ruffed grouse",
+                               "prairie chicken",
+                               "peacock",
+                               "quail",
+                               "partridge",
+                               "African grey",
+                               "macaw",
+                               "sulphur-crested cockatoo",
+                               "lorikeet",
+                               "coucal",
+                               "bee eater",
+                               "hornbill",
+                               "hummingbird",
+                               "jacamar",
+                               "toucan",
+                               "drake",
+                               "red-breasted merganser",
+                               "goose",
+                               "black swan",
+                               "tusker",
+                               "echidna",
+                               "platypus",
+                               "wallaby",
+                               "koala",
+                               "wombat",
+                               "jellyfish",
+                               "sea anemone",
+                               "brain coral",
+                               "flatworm",
+                               "nematode",
+                               "conch",
+                               "snail",
+                               "slug",
+                               "sea slug",
+                               "chiton",
+                               "chambered nautilus",
+                               "Dungeness crab",
+                               "rock crab",
+                               "fiddler crab",
+                               "king crab",
+                               "American lobster",
+                               "spiny lobster",
+                               "crayfish",
+                               "hermit crab",
+                               "isopod",
+                               "white stork",
+                               "black stork",
+                               "spoonbill",
+                               "flamingo",
+                               "little blue heron",
+                               "American egret",
+                               "bittern",
+                               "crane",
+                               "limpkin",
+                               "European gallinule",
+                               "American coot",
+                               "bustard",
+                               "ruddy turnstone",
+                               "red-backed sandpiper",
+                               "redshank",
+                               "dowitcher",
+                               "oystercatcher",
+                               "pelican",
+                               "king penguin",
+                               "albatross",
+                               "grey whale",
+                               "killer whale",
+                               "dugong",
+                               "sea lion",
+                               "Chihuahua",
+                               "Japanese spaniel",
+                               "Maltese dog",
+                               "Pekinese",
+                               "Shih-Tzu",
+                               "Blenheim spaniel",
+                               "papillon",
+                               "toy terrier",
+                               "Rhodesian ridgeback",
+                               "Afghan hound",
+                               "basset",
+                               "beagle",
+                               "bloodhound",
+                               "bluetick",
+                               "black-and-tan coonhound",
+                               "Walker hound",
+                               "English foxhound",
+                               "redbone",
+                               "borzoi",
+                               "Irish wolfhound",
+                               "Italian greyhound",
+                               "whippet",
+                               "Ibizan hound",
+                               "Norwegian elkhound",
+                               "otterhound",
+                               "Saluki",
+                               "Scottish deerhound",
+                               "Weimaraner",
+                               "Staffordshire bullterrier",
+                               "American Staffordshire terrier",
+                               "Bedlington terrier",
+                               "Border terrier",
+                               "Kerry blue terrier",
+                               "Irish terrier",
+                               "Norfolk terrier",
+                               "Norwich terrier",
+                               "Yorkshire terrier",
+                               "wire-haired fox terrier",
+                               "Lakeland terrier",
+                               "Sealyham terrier",
+                               "Airedale",
+                               "cairn",
+                               "Australian terrier",
+                               "Dandie Dinmont",
+                               "Boston bull",
+                               "miniature schnauzer",
+                               "giant schnauzer",
+                               "standard schnauzer",
+                               "Scotch terrier",
+                               "Tibetan terrier",
+                               "silky terrier",
+                               "soft-coated wheaten terrier",
+                               "West Highland white terrier",
+                               "Lhasa",
+                               "flat-coated retriever",
+                               "curly-coated retriever",
+                               "golden retriever",
+                               "Labrador retriever",
+                               "Chesapeake Bay retriever",
+                               "German short-haired pointer",
+                               "vizsla",
+                               "English setter",
+                               "Irish setter",
+                               "Gordon setter",
+                               "Brittany spaniel",
+                               "clumber",
+                               "English springer",
+                               "Welsh springer spaniel",
+                               "cocker spaniel",
+                               "Sussex spaniel",
+                               "Irish water spaniel",
+                               "kuvasz",
+                               "schipperke",
+                               "groenendael",
+                               "malinois",
+                               "briard",
+                               "kelpie",
+                               "komondor",
+                               "Old English sheepdog",
+                               "Shetland sheepdog",
+                               "collie",
+                               "Border collie",
+                               "Bouvier des Flandres",
+                               "Rottweiler",
+                               "German shepherd",
+                               "Doberman",
+                               "miniature pinscher",
+                               "Greater Swiss Mountain dog",
+                               "Bernese mountain dog",
+                               "Appenzeller",
+                               "EntleBucher",
+                               "boxer",
+                               "bull mastiff",
+                               "Tibetan mastiff",
+                               "French bulldog",
+                               "Great Dane",
+                               "Saint Bernard",
+                               "Eskimo dog",
+                               "malamute",
+                               "Siberian husky",
+                               "dalmatian",
+                               "affenpinscher",
+                               "basenji",
+                               "pug",
+                               "Leonberg",
+                               "Newfoundland",
+                               "Great Pyrenees",
+                               "Samoyed",
+                               "Pomeranian",
+                               "chow",
+                               "keeshond",
+                               "Brabancon griffon",
+                               "Pembroke",
+                               "Cardigan",
+                               "toy poodle",
+                               "miniature poodle",
+                               "standard poodle",
+                               "Mexican hairless",
+                               "timber wolf",
+                               "white wolf",
+                               "red wolf",
+                               "coyote",
+                               "dingo",
+                               "dhole",
+                               "African hunting dog",
+                               "hyena",
+                               "red fox",
+                               "kit fox",
+                               "Arctic fox",
+                               "grey fox",
+                               "tabby",
+                               "tiger cat",
+                               "Persian cat",
+                               "Siamese cat",
+                               "Egyptian cat",
+                               "cougar",
+                               "lynx",
+                               "leopard",
+                               "snow leopard",
+                               "jaguar",
+                               "lion",
+                               "tiger",
+                               "cheetah",
+                               "brown bear",
+                               "American black bear",
+                               "ice bear",
+                               "sloth bear",
+                               "mongoose",
+                               "meerkat",
+                               "tiger beetle",
+                               "ladybug",
+                               "ground beetle",
+                               "long-horned beetle",
+                               "leaf beetle",
+                               "dung beetle",
+                               "rhinoceros beetle",
+                               "weevil",
+                               "fly",
+                               "bee",
+                               "ant",
+                               "grasshopper",
+                               "cricket",
+                               "walking stick",
+                               "cockroach",
+                               "mantis",
+                               "cicada",
+                               "leafhopper",
+                               "lacewing",
+                               "dragonfly",
+                               "damselfly",
+                               "admiral",
+                               "ringlet",
+                               "monarch",
+                               "cabbage butterfly",
+                               "sulphur butterfly",
+                               "lycaenid",
+                               "starfish",
+                               "sea urchin",
+                               "sea cucumber",
+                               "wood rabbit",
+                               "hare",
+                               "Angora",
+                               "hamster",
+                               "porcupine",
+                               "fox squirrel",
+                               "marmot",
+                               "beaver",
+                               "guinea pig",
+                               "sorrel",
+                               "zebra",
+                               "hog",
+                               "wild boar",
+                               "warthog",
+                               "hippopotamus",
+                               "ox",
+                               "water buffalo",
+                               "bison",
+                               "ram",
+                               "bighorn",
+                               "ibex",
+                               "hartebeest",
+                               "impala",
+                               "gazelle",
+                               "Arabian camel",
+                               "llama",
+                               "weasel",
+                               "mink",
+                               "polecat",
+                               "black-footed ferret",
+                               "otter",
+                               "skunk",
+                               "badger",
+                               "armadillo",
+                               "three-toed sloth",
+                               "orangutan",
+                               "gorilla",
+                               "chimpanzee",
+                               "gibbon",
+                               "siamang",
+                               "guenon",
+                               "patas",
+                               "baboon",
+                               "macaque",
+                               "langur",
+                               "colobus",
+                               "proboscis monkey",
+                               "marmoset",
+                               "capuchin",
+                               "howler monkey",
+                               "titi",
+                               "spider monkey",
+                               "squirrel monkey",
+                               "Madagascar cat",
+                               "indri",
+                               "Indian elephant",
+                               "African elephant",
+                               "lesser panda",
+                               "giant panda",
+                               "barracouta",
+                               "eel",
+                               "coho",
+                               "rock beauty",
+                               "anemone fish",
+                               "sturgeon",
+                               "gar",
+                               "lionfish",
+                               "puffer",
+                               "abacus",
+                               "abaya",
+                               "academic gown",
+                               "accordion",
+                               "acoustic guitar",
+                               "aircraft carrier",
+                               "airliner",
+                               "airship",
+                               "altar",
+                               "ambulance",
+                               "amphibian",
+                               "analog clock",
+                               "apiary",
+                               "apron",
+                               "ashcan",
+                               "assault rifle",
+                               "backpack",
+                               "bakery",
+                               "balance beam",
+                               "balloon",
+                               "ballpoint",
+                               "Band Aid",
+                               "banjo",
+                               "bannister",
+                               "barbell",
+                               "barber chair",
+                               "barbershop",
+                               "barn",
+                               "barometer",
+                               "barrel",
+                               "barrow",
+                               "baseball",
+                               "basketball",
+                               "bassinet",
+                               "bassoon",
+                               "bathing cap",
+                               "bath towel",
+                               "bathtub",
+                               "beach wagon",
+                               "beacon",
+                               "beaker",
+                               "bearskin",
+                               "beer bottle",
+                               "beer glass",
+                               "bell cote",
+                               "bib",
+                               "bicycle-built-for-two",
+                               "bikini",
+                               "binder",
+                               "binoculars",
+                               "birdhouse",
+                               "boathouse",
+                               "bobsled",
+                               "bolo tie",
+                               "bonnet",
+                               "bookcase",
+                               "bookshop",
+                               "bottlecap",
+                               "bow",
+                               "bow tie",
+                               "brass",
+                               "brassiere",
+                               "breakwater",
+                               "breastplate",
+                               "broom",
+                               "bucket",
+                               "buckle",
+                               "bulletproof vest",
+                               "bullet train",
+                               "butcher shop",
+                               "cab",
+                               "caldron",
+                               "candle",
+                               "cannon",
+                               "canoe",
+                               "can opener",
+                               "cardigan",
+                               "car mirror",
+                               "carousel",
+                               "carpenter's kit",
+                               "carton",
+                               "car wheel",
+                               "cash machine",
+                               "cassette",
+                               "cassette player",
+                               "castle",
+                               "catamaran",
+                               "CD player",
+                               "cello",
+                               "cellular telephone",
+                               "chain",
+                               "chainlink fence",
+                               "chain mail",
+                               "chain saw",
+                               "chest",
+                               "chiffonier",
+                               "chime",
+                               "china cabinet",
+                               "Christmas stocking",
+                               "church",
+                               "cinema",
+                               "cleaver",
+                               "cliff dwelling",
+                               "cloak",
+                               "clog",
+                               "cocktail shaker",
+                               "coffee mug",
+                               "coffeepot",
+                               "coil",
+                               "combination lock",
+                               "computer keyboard",
+                               "confectionery",
+                               "container ship",
+                               "convertible",
+                               "corkscrew",
+                               "cornet",
+                               "cowboy boot",
+                               "cowboy hat",
+                               "cradle",
+                               "crane",
+                               "crash helmet",
+                               "crate",
+                               "crib",
+                               "Crock Pot",
+                               "croquet ball",
+                               "crutch",
+                               "cuirass",
+                               "dam",
+                               "desk",
+                               "desktop computer",
+                               "dial telephone",
+                               "diaper",
+                               "digital clock",
+                               "digital watch",
+                               "dining table",
+                               "dishrag",
+                               "dishwasher",
+                               "disk brake",
+                               "dock",
+                               "dogsled",
+                               "dome",
+                               "doormat",
+                               "drilling platform",
+                               "drum",
+                               "drumstick",
+                               "dumbbell",
+                               "Dutch oven",
+                               "electric fan",
+                               "electric guitar",
+                               "electric locomotive",
+                               "entertainment center",
+                               "envelope",
+                               "espresso maker",
+                               "face powder",
+                               "feather boa",
+                               "file",
+                               "fireboat",
+                               "fire engine",
+                               "fire screen",
+                               "flagpole",
+                               "flute",
+                               "folding chair",
+                               "football helmet",
+                               "forklift",
+                               "fountain",
+                               "fountain pen",
+                               "four-poster",
+                               "freight car",
+                               "French horn",
+                               "frying pan",
+                               "fur coat",
+                               "garbage truck",
+                               "gasmask",
+                               "gas pump",
+                               "goblet",
+                               "go-kart",
+                               "golf ball",
+                               "golfcart",
+                               "gondola",
+                               "gong",
+                               "gown",
+                               "grand piano",
+                               "greenhouse",
+                               "grille",
+                               "grocery store",
+                               "guillotine",
+                               "hair slide",
+                               "hair spray",
+                               "half track",
+                               "hammer",
+                               "hamper",
+                               "hand blower",
+                               "hand-held computer",
+                               "handkerchief",
+                               "hard disc",
+                               "harmonica",
+                               "harp",
+                               "harvester",
+                               "hatchet",
+                               "holster",
+                               "home theater",
+                               "honeycomb",
+                               "hook",
+                               "hoopskirt",
+                               "horizontal bar",
+                               "horse cart",
+                               "hourglass",
+                               "iPod",
+                               "iron",
+                               "jack-o'-lantern",
+                               "jean",
+                               "jeep",
+                               "jersey",
+                               "jigsaw puzzle",
+                               "jinrikisha",
+                               "joystick",
+                               "kimono",
+                               "knee pad",
+                               "knot",
+                               "lab coat",
+                               "ladle",
+                               "lampshade",
+                               "laptop",
+                               "lawn mower",
+                               "lens cap",
+                               "letter opener",
+                               "library",
+                               "lifeboat",
+                               "lighter",
+                               "limousine",
+                               "liner",
+                               "lipstick",
+                               "Loafer",
+                               "lotion",
+                               "loudspeaker",
+                               "loupe",
+                               "lumbermill",
+                               "magnetic compass",
+                               "mailbag",
+                               "mailbox",
+                               "maillot",
+                               "maillot",
+                               "manhole cover",
+                               "maraca",
+                               "marimba",
+                               "mask",
+                               "matchstick",
+                               "maypole",
+                               "maze",
+                               "measuring cup",
+                               "medicine chest",
+                               "megalith",
+                               "microphone",
+                               "microwave",
+                               "military uniform",
+                               "milk can",
+                               "minibus",
+                               "miniskirt",
+                               "minivan",
+                               "missile",
+                               "mitten",
+                               "mixing bowl",
+                               "mobile home",
+                               "Model T",
+                               "modem",
+                               "monastery",
+                               "monitor",
+                               "moped",
+                               "mortar",
+                               "mortarboard",
+                               "mosque",
+                               "mosquito net",
+                               "motor scooter",
+                               "mountain bike",
+                               "mountain tent",
+                               "mouse",
+                               "mousetrap",
+                               "moving van",
+                               "muzzle",
+                               "nail",
+                               "neck brace",
+                               "necklace",
+                               "nipple",
+                               "notebook",
+                               "obelisk",
+                               "oboe",
+                               "ocarina",
+                               "odometer",
+                               "oil filter",
+                               "organ",
+                               "oscilloscope",
+                               "overskirt",
+                               "oxcart",
+                               "oxygen mask",
+                               "packet",
+                               "paddle",
+                               "paddlewheel",
+                               "padlock",
+                               "paintbrush",
+                               "pajama",
+                               "palace",
+                               "panpipe",
+                               "paper towel",
+                               "parachute",
+                               "parallel bars",
+                               "park bench",
+                               "parking meter",
+                               "passenger car",
+                               "patio",
+                               "pay-phone",
+                               "pedestal",
+                               "pencil box",
+                               "pencil sharpener",
+                               "perfume",
+                               "Petri dish",
+                               "photocopier",
+                               "pick",
+                               "pickelhaube",
+                               "picket fence",
+                               "pickup",
+                               "pier",
+                               "piggy bank",
+                               "pill bottle",
+                               "pillow",
+                               "ping-pong ball",
+                               "pinwheel",
+                               "pirate",
+                               "pitcher",
+                               "plane",
+                               "planetarium",
+                               "plastic bag",
+                               "plate rack",
+                               "plow",
+                               "plunger",
+                               "Polaroid camera",
+                               "pole",
+                               "police van",
+                               "poncho",
+                               "pool table",
+                               "pop bottle",
+                               "pot",
+                               "potter's wheel",
+                               "power drill",
+                               "prayer rug",
+                               "printer",
+                               "prison",
+                               "projectile",
+                               "projector",
+                               "puck",
+                               "punching bag",
+                               "purse",
+                               "quill",
+                               "quilt",
+                               "racer",
+                               "racket",
+                               "radiator",
+                               "radio",
+                               "radio telescope",
+                               "rain barrel",
+                               "recreational vehicle",
+                               "reel",
+                               "reflex camera",
+                               "refrigerator",
+                               "remote control",
+                               "restaurant",
+                               "revolver",
+                               "rifle",
+                               "rocking chair",
+                               "rotisserie",
+                               "rubber eraser",
+                               "rugby ball",
+                               "rule",
+                               "running shoe",
+                               "safe",
+                               "safety pin",
+                               "saltshaker",
+                               "sandal",
+                               "sarong",
+                               "sax",
+                               "scabbard",
+                               "scale",
+                               "school bus",
+                               "schooner",
+                               "scoreboard",
+                               "screen",
+                               "screw",
+                               "screwdriver",
+                               "seat belt",
+                               "sewing machine",
+                               "shield",
+                               "shoe shop",
+                               "shoji",
+                               "shopping basket",
+                               "shopping cart",
+                               "shovel",
+                               "shower cap",
+                               "shower curtain",
+                               "ski",
+                               "ski mask",
+                               "sleeping bag",
+                               "slide rule",
+                               "sliding door",
+                               "slot",
+                               "snorkel",
+                               "snowmobile",
+                               "snowplow",
+                               "soap dispenser",
+                               "soccer ball",
+                               "sock",
+                               "solar dish",
+                               "sombrero",
+                               "soup bowl",
+                               "space bar",
+                               "space heater",
+                               "space shuttle",
+                               "spatula",
+                               "speedboat",
+                               "spider web",
+                               "spindle",
+                               "sports car",
+                               "spotlight",
+                               "stage",
+                               "steam locomotive",
+                               "steel arch bridge",
+                               "steel drum",
+                               "stethoscope",
+                               "stole",
+                               "stone wall",
+                               "stopwatch",
+                               "stove",
+                               "strainer",
+                               "streetcar",
+                               "stretcher",
+                               "studio couch",
+                               "stupa",
+                               "submarine",
+                               "suit",
+                               "sundial",
+                               "sunglass",
+                               "sunglasses",
+                               "sunscreen",
+                               "suspension bridge",
+                               "swab",
+                               "sweatshirt",
+                               "swimming trunks",
+                               "swing",
+                               "switch",
+                               "syringe",
+                               "table lamp",
+                               "tank",
+                               "tape player",
+                               "teapot",
+                               "teddy",
+                               "television",
+                               "tennis ball",
+                               "thatch",
+                               "theater curtain",
+                               "thimble",
+                               "thresher",
+                               "throne",
+                               "tile roof",
+                               "toaster",
+                               "tobacco shop",
+                               "toilet seat",
+                               "torch",
+                               "totem pole",
+                               "tow truck",
+                               "toyshop",
+                               "tractor",
+                               "trailer truck",
+                               "tray",
+                               "trench coat",
+                               "tricycle",
+                               "trimaran",
+                               "tripod",
+                               "triumphal arch",
+                               "trolleybus",
+                               "trombone",
+                               "tub",
+                               "turnstile",
+                               "typewriter keyboard",
+                               "umbrella",
+                               "unicycle",
+                               "upright",
+                               "vacuum",
+                               "vase",
+                               "vault",
+                               "velvet",
+                               "vending machine",
+                               "vestment",
+                               "viaduct",
+                               "violin",
+                               "volleyball",
+                               "waffle iron",
+                               "wall clock",
+                               "wallet",
+                               "wardrobe",
+                               "warplane",
+                               "washbasin",
+                               "washer",
+                               "water bottle",
+                               "water jug",
+                               "water tower",
+                               "whiskey jug",
+                               "whistle",
+                               "wig",
+                               "window screen",
+                               "window shade",
+                               "Windsor tie",
+                               "wine bottle",
+                               "wing",
+                               "wok",
+                               "wooden spoon",
+                               "wool",
+                               "worm fence",
+                               "wreck",
+                               "yawl",
+                               "yurt",
+                               "web site",
+                               "comic book",
+                               "crossword puzzle",
+                               "street sign",
+                               "traffic light",
+                               "book jacket",
+                               "menu",
+                               "plate",
+                               "guacamole",
+                               "consomme",
+                               "hot pot",
+                               "trifle",
+                               "ice cream",
+                               "ice lolly",
+                               "French loaf",
+                               "bagel",
+                               "pretzel",
+                               "cheeseburger",
+                               "hotdog",
+                               "mashed potato",
+                               "head cabbage",
+                               "broccoli",
+                               "cauliflower",
+                               "zucchini",
+                               "spaghetti squash",
+                               "acorn squash",
+                               "butternut squash",
+                               "cucumber",
+                               "artichoke",
+                               "bell pepper",
+                               "cardoon",
+                               "mushroom",
+                               "Granny Smith",
+                               "strawberry",
+                               "orange",
+                               "lemon",
+                               "fig",
+                               "pineapple",
+                               "banana",
+                               "jackfruit",
+                               "custard apple",
+                               "pomegranate",
+                               "hay",
+                               "carbonara",
+                               "chocolate sauce",
+                               "dough",
+                               "meat loaf",
+                               "pizza",
+                               "potpie",
+                               "burrito",
+                               "red wine",
+                               "espresso",
+                               "cup",
+                               "eggnog",
+                               "alp",
+                               "bubble",
+                               "cliff",
+                               "coral reef",
+                               "geyser",
+                               "lakeside",
+                               "promontory",
+                               "sandbar",
+                               "seashore",
+                               "valley",
+                               "volcano",
+                               "ballplayer",
+                               "groom",
+                               "scuba diver",
+                               "rapeseed",
+                               "daisy",
+                               "yellow lady's slipper",
+                               "corn",
+                               "acorn",
+                               "hip",
+                               "buckeye",
+                               "coral fungus",
+                               "agaric",
+                               "gyromitra",
+                               "stinkhorn",
+                               "earthstar",
+                               "hen-of-the-woods",
+                               "bolete",
+                               "ear",
+                               "toilet tissue"};
+
+#endif /* LABELS_H_ */
diff --git a/tools/tflite_accuracy/src/tflite_accuracy.cc b/tools/tflite_accuracy/src/tflite_accuracy.cc
new file mode 100644
index 000000000..3b7d21e82
--- /dev/null
+++ b/tools/tflite_accuracy/src/tflite_accuracy.cc
@@ -0,0 +1,494 @@
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <algorithm>
+#include <atomic>
+#include <chrono>
+#include <forward_list>
+#include <fstream>
+#include <iostream>
+#include <memory>
+#include <numeric>
+#include <stdexcept>
+#include <string>
+#include <thread>
+
+#include <boost/filesystem.hpp>
+#include <boost/format.hpp>
+#include <boost/program_options.hpp>
+
+#include <cmath>
+#include <cstdint>
+#include <signal.h>
+
+#include <tensorflow/lite/context.h>
+#include <tensorflow/lite/interpreter.h>
+#include <tensorflow/lite/model.h>
+
+#include "labels.h"
+#include "tflite/ext/nnapi_delegate.h"
+#include "tflite/ext/kernels/register.h"
+
+const std::string kDefaultImagesDir = "res/input/";
+const std::string kDefaultModelFile = "res/model.tflite";
+
+template <typename... Args> void Print(const char *fmt, Args... args)
+{
+#if __cplusplus >= 201703L
+  std::cerr << boost::str(boost::format(fmt) % ... % std::forward<Args>(args)) << std::endl;
+#else
+  boost::format f(fmt);
+  using unroll = int[];
+  unroll{0, (f % std::forward<Args>(args), 0)...};
+  std::cerr << boost::str(f) << std::endl;
+#endif
+}
+
+template <typename DataType> struct BaseLabelData
+{
+  explicit BaseLabelData(int label = -1, DataType confidence = 0)
+      : label(label), confidence(confidence)
+  {
+  }
+
+  static std::vector<BaseLabelData<DataType>> FindLabels(const DataType *output_tensor,
+                                                         unsigned int top_n = 5)
+  {
+    top_n = top_n > 1000 ? 1000 : top_n;
+    size_t n = 0;
+    std::vector<size_t> indices(1000);
+    std::generate(indices.begin(), indices.end(), [&n]() { return n++; });
+    std::sort(indices.begin(), indices.end(), [output_tensor](const size_t &i1, const size_t &i2) {
+      return output_tensor[i1] > output_tensor[i2];
+    });
+    std::vector<BaseLabelData<DataType>> results(top_n);
+    for (unsigned int i = 0; i < top_n; ++i)
+    {
+      results[i].label = indices[i];
+      results[i].confidence = output_tensor[indices[i]];
+    }
+    return results;
+  }
+
+  int label;
+  DataType confidence;
+};
+
+class BaseRunner
+{
+public:
+  virtual ~BaseRunner() = default;
+
+  /**
+   * @brief Run a model for each file in a directory, and collect and print
+   * statistics.
+   */
+  virtual void IterateInDirectory(const std::string &dir_path, const int labels_offset) = 0;
+
+  /**
+   * @brief Request that the iteration be stopped after the current file.
+   */
+  virtual void ScheduleInterruption() = 0;
+};
+
+template <typename DataType_> class Runner : public BaseRunner
+{
+public:
+  using DataType = DataType_;
+  using LabelData = BaseLabelData<DataType>;
+
+  const int kInputSize;
+  const int KOutputSize = 1001 * sizeof(DataType);
+
+  Runner(std::unique_ptr<tflite::Interpreter> interpreter,
+         std::unique_ptr<tflite::FlatBufferModel> model,
+         std::unique_ptr<::nnfw::tflite::NNAPIDelegate> delegate, unsigned img_size)
+      : interpreter(std::move(interpreter)), model(std::move(model)), delegate(std::move(delegate)),
+        interrupted(false), kInputSize(1 * img_size * img_size * 3 * sizeof(DataType))
+  {
+    inference_times.reserve(500);
+    top1.reserve(500);
+    top5.reserve(500);
+  }
+
+  virtual ~Runner() = default;
+
+  /**
+   * @brief Get the model's input tensor.
+   */
+  virtual DataType *GetInputTensor() = 0;
+
+  /**
+   * @brief Get the model's output tensor.
+   */
+  virtual DataType *GetOutputTensor() = 0;
+
+  /**
+   * @brief Load Image file into tensor.
+   * @return Class number if present in filename, -1 otherwise.
+   */
+  virtual int LoadFile(const boost::filesystem::path &input_file)
+  {
+    DataType *input_tensor = GetInputTensor();
+    if (input_file.extension() == ".bin")
+    {
+      // Load data as raw tensor
+      std::ifstream input_stream(input_file.string(), std::ifstream::binary);
+      input_stream.read(reinterpret_cast<char *>(input_tensor), kInputSize);
+      input_stream.close();
+      int class_num = boost::lexical_cast<int>(input_file.filename().string().substr(0, 4));
+      return class_num;
+    }
+    else
+    {
+      // Load data as image file
+      throw std::runtime_error("Runner can only load *.bin files");
+    }
+  }
+
+  void Invoke()
+  {
+    TfLiteStatus status;
+    if (delegate)
+    {
+      status = delegate->Invoke(interpreter.get());
+    }
+    else
+    {
+      status = interpreter->Invoke();
+    }
+    if (status != kTfLiteOk)
+    {
+      throw std::runtime_error("Failed to invoke interpreter.");
+    }
+  }
+
+  int Process()
+  {
+    auto t0 = std::chrono::high_resolution_clock::now();
+    Invoke();
+    auto t1 = std::chrono::high_resolution_clock::now();
+    std::chrono::duration<double> fs = t1 - t0;
+    auto d = std::chrono::duration_cast<std::chrono::milliseconds>(fs);
+    inference_times.push_back(d.count());
+    if (d > std::chrono::milliseconds(10))
+    {
+      Print("  -- inference duration: %lld ms", d.count());
+    }
+    else
+    {
+      auto du = std::chrono::duration_cast<std::chrono::microseconds>(fs);
+      Print("  -- inference duration: %lld us", du.count());
+    }
+    return 0;
+  }
+
+  void DumpOutputTensor(const std::string &output_file)
+  {
+    DataType *output_tensor = GetOutputTensor();
+    std::ofstream output_stream(output_file, std::ofstream::binary);
+    output_stream.write(reinterpret_cast<char *>(output_tensor), KOutputSize);
+  }
+
+  void PrintExecutionSummary() const
+  {
+    Print("Execution summary:");
+    Print("  -- # of processed images: %d", num_images);
+    if (num_images == 0)
+    {
+      return;
+    }
+    // Inference time - mean
+    double mean = std::accumulate(inference_times.begin(), inference_times.end(), 0.0) / num_images;
+    Print("  -- mean inference time: %.1f ms", mean);
+    // Inference time - std
+    std::vector<double> diff(num_images);
+    std::transform(inference_times.begin(), inference_times.end(), diff.begin(),
+                   [mean](size_t n) { return n - mean; });
+    double sq_sum = std::inner_product(diff.begin(), diff.end(), diff.begin(), 0.0);
+    double std_inference_time = std::sqrt(sq_sum / num_images);
+    Print("  -- std inference time: %.1f ms", std_inference_time);
+    // Top-1 and Top-5 accuracies
+    float num_top1 = std::accumulate(top1.begin(), top1.end(), 0);
+    float num_top5 = std::accumulate(top5.begin(), top5.end(), 0);
+    Print("  -- top1: %.3f, top5: %.3f", num_top1 / num_images, num_top5 / num_images);
+  }
+
+  virtual void ScheduleInterruption() override { interrupted = true; }
+
+  virtual void IterateInDirectory(const std::string &dir_path, const int labels_offset) override
+  {
+    interrupted = false;
+    namespace fs = boost::filesystem;
+    if (!fs::is_directory(dir_path))
+    {
+      throw std::runtime_error("Could not open input directory.");
+    }
+
+    inference_times.clear();
+    top1.clear();
+    top5.clear();
+    int class_num;
+    num_images = 0;
+    std::vector<LabelData> lds;
+    fs::directory_iterator end;
+    for (auto it = fs::directory_iterator(dir_path); it != end; ++it)
+    {
+      if (interrupted)
+      {
+        break;
+      }
+      if (!fs::is_regular_file(*it))
+      {
+        continue;
+      }
+      Print("File : %s", it->path().string());
+      try
+      {
+        class_num = LoadFile(*it) + labels_offset;
+        Print("Class: %d", class_num);
+      }
+      catch (std::exception &e)
+      {
+        Print("%s", e.what());
+        continue;
+      }
+      int status = Process();
+      if (status == 0)
+      {
+        DataType *output_tensor = GetOutputTensor();
+        lds = LabelData::FindLabels(output_tensor, 5);
+        bool is_top1 = lds[0].label == class_num;
+        bool is_top5 = false;
+        for (const auto &ld : lds)
+        {
+          is_top5 = is_top5 || (ld.label == class_num);
+          Print("  -- label: %s (%d), prob: %.3f", ld.label >= 0 ? labels[ld.label] : "", ld.label,
+                static_cast<float>(ld.confidence));
+        }
+        Print("  -- top1: %d, top5: %d", is_top1, is_top5);
+        top1.push_back(is_top1);
+        top5.push_back(is_top5);
+      }
+      ++num_images;
+    }
+    PrintExecutionSummary();
+  }
+
+protected:
+  std::unique_ptr<tflite::Interpreter> interpreter;
+  std::unique_ptr<tflite::FlatBufferModel> model;
+  std::unique_ptr<::nnfw::tflite::NNAPIDelegate> delegate;
+
+  std::vector<size_t> inference_times;
+  std::vector<bool> top1;
+  std::vector<bool> top5;
+  uint num_images;
+  std::atomic_bool interrupted;
+};
+
+class FloatRunner : public Runner<float>
+{
+public:
+  using Runner<float>::DataType;
+
+  FloatRunner(std::unique_ptr<tflite::Interpreter> interpreter,
+              std::unique_ptr<tflite::FlatBufferModel> model,
+              std::unique_ptr<::nnfw::tflite::NNAPIDelegate> delegate, unsigned img_size)
+      : Runner<float>(std::move(interpreter), std::move(model), std::move(delegate), img_size)
+  {
+  }
+
+  virtual ~FloatRunner() = default;
+
+  virtual DataType *GetInputTensor() override
+  {
+    return interpreter->tensor(interpreter->inputs()[0])->data.f;
+  }
+
+  virtual DataType *GetOutputTensor() override
+  {
+    return interpreter->tensor(interpreter->outputs()[0])->data.f;
+  }
+};
+
+class QuantizedRunner : public Runner<uint8_t>
+{
+public:
+  using Runner<uint8_t>::DataType;
+
+  QuantizedRunner(std::unique_ptr<tflite::Interpreter> interpreter,
+                  std::unique_ptr<tflite::FlatBufferModel> model,
+                  std::unique_ptr<::nnfw::tflite::NNAPIDelegate> delegate, unsigned img_size)
+      : Runner<uint8_t>(std::move(interpreter), std::move(model), std::move(delegate), img_size)
+  {
+  }
+
+  virtual ~QuantizedRunner() = default;
+
+  virtual DataType *GetInputTensor() override
+  {
+    return interpreter->tensor(interpreter->inputs()[0])->data.uint8;
+  }
+
+  virtual DataType *GetOutputTensor() override
+  {
+    return interpreter->tensor(interpreter->outputs()[0])->data.uint8;
+  }
+};
+
+enum class Target
+{
+  TfLiteCpu,      /**< Use Tensorflow Lite's CPU kernels. */
+  TfLiteDelegate, /**< Use Tensorflow Lite's NN API delegate. */
+  NnfwDelegate    /**< Use NNFW's NN API delegate. */
+};
+
+std::unique_ptr<BaseRunner> MakeRunner(const std::string &model_path, unsigned img_size,
+                                       Target target = Target::NnfwDelegate)
+{
+  auto model = tflite::FlatBufferModel::BuildFromFile(model_path.c_str());
+  if (not model)
+  {
+    throw std::runtime_error(model_path + ": file not found or corrupted.");
+  }
+  Print("Model loaded.");
+
+  std::unique_ptr<tflite::Interpreter> interpreter;
+  nnfw::tflite::BuiltinOpResolver resolver;
+  tflite::InterpreterBuilder(*model, resolver)(&interpreter);
+  if (not interpreter)
+  {
+    throw std::runtime_error("interpreter construction failed.");
+  }
+  if (target == Target::TfLiteCpu)
+  {
+    interpreter->SetNumThreads(std::max(std::thread::hardware_concurrency(), 1U));
+  }
+  else
+  {
+    interpreter->SetNumThreads(1);
+  }
+  if (target == Target::TfLiteDelegate)
+  {
+    interpreter->UseNNAPI(true);
+  }
+
+  int input_index = interpreter->inputs()[0];
+  interpreter->ResizeInputTensor(input_index,
+                                 {1, static_cast<int>(img_size), static_cast<int>(img_size), 3});
+  if (interpreter->AllocateTensors() != kTfLiteOk)
+  {
+    throw std::runtime_error("tensor allocation failed.");
+  }
+
+  if (target == Target::TfLiteDelegate)
+  {
+    // Do a fake run to load NN API functions.
+    interpreter->Invoke();
+  }
+
+  std::unique_ptr<::nnfw::tflite::NNAPIDelegate> delegate;
+  if (target == Target::NnfwDelegate)
+  {
+    delegate.reset(new ::nnfw::tflite::NNAPIDelegate);
+    delegate->BuildGraph(interpreter.get());
+  }
+
+  if (interpreter->tensor(input_index)->type == kTfLiteFloat32)
+  {
+    return std::unique_ptr<FloatRunner>(
+        new FloatRunner(std::move(interpreter), std::move(model), std::move(delegate), img_size));
+  }
+  else if (interpreter->tensor(input_index)->type == kTfLiteUInt8)
+  {
+    return std::unique_ptr<QuantizedRunner>(new QuantizedRunner(
+        std::move(interpreter), std::move(model), std::move(delegate), img_size));
+  }
+  throw std::invalid_argument("data type of model's input tensor is not supported.");
+}
+
+Target GetTarget(const std::string &str)
+{
+  static const std::map<std::string, Target> target_names{
+      {"tflite-cpu", Target::TfLiteCpu},
+      {"tflite-delegate", Target::TfLiteDelegate},
+      {"nnfw-delegate", Target::NnfwDelegate}};
+  if (target_names.find(str) == target_names.end())
+  {
+    throw std::invalid_argument(
+        str + ": invalid target. Run with --help for a list of available targets.");
+  }
+  return target_names.at(str);
+}
+
+// We need a global pointer to the runner for the SIGINT handler
+BaseRunner *runner_ptr = nullptr;
+void HandleSigInt(int)
+{
+  if (runner_ptr != nullptr)
+  {
+    Print("Interrupted. Execution will stop after current image.");
+    runner_ptr->ScheduleInterruption();
+    runner_ptr = nullptr;
+  }
+  else
+  {
+    exit(1);
+  }
+}
+
+int main(int argc, char *argv[]) try
+{
+  namespace po = boost::program_options;
+  po::options_description desc("Run a model on multiple binary images and print"
+                               " statistics");
+  desc.add_options()("help", "print this message and quit")(
+      "model", po::value<std::string>()->default_value(kDefaultModelFile), "tflite file")(
+      "input", po::value<std::string>()->default_value(kDefaultImagesDir),
+      "directory with input images")("offset", po::value<int>()->default_value(1), "labels offset")(
+      "target", po::value<std::string>()->default_value("nnfw-delegate"),
+      "how the model will be run (available targets: tflite-cpu, "
+      "tflite-delegate, nnfw-delegate)")("imgsize", po::value<unsigned>()->default_value(224),
+                                         "the width and height of the image");
+  po::variables_map vm;
+  po::store(po::parse_command_line(argc, argv, desc), vm);
+  if (vm.count("help"))
+  {
+    std::cerr << desc << std::endl;
+    return 0;
+  }
+
+  auto runner = MakeRunner(vm["model"].as<std::string>(), vm["imgsize"].as<unsigned>(),
+                           GetTarget(vm["target"].as<std::string>()));
+  runner_ptr = runner.get();
+
+  struct sigaction sigint_handler;
+  sigint_handler.sa_handler = HandleSigInt;
+  sigemptyset(&sigint_handler.sa_mask);
+  sigint_handler.sa_flags = 0;
+  sigaction(SIGINT, &sigint_handler, nullptr);
+
+  Print("Running TensorFlow Lite...");
+  runner->IterateInDirectory(vm["input"].as<std::string>(), vm["offset"].as<int>());
+  Print("Done.");
+  return 0;
+}
+catch (std::exception &e)
+{
+  Print("%s: %s", argv[0], e.what());
+  return 1;
+}
diff --git a/tools/tflitefile_tool/config_saver.py b/tools/tflitefile_tool/config_saver.py
new file mode 100644
index 000000000..8abd3cf8b
--- /dev/null
+++ b/tools/tflitefile_tool/config_saver.py
@@ -0,0 +1,131 @@
+#!/usr/bin/python
+
+# Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#    http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+from operator_wrapping import Operator
+from tensor_printer import TensorPrinter
+from option_printer import OptionPrinter
+from perf_predictor import PerfPredictor
+
+
+class ConfigSaver(object):
+    def __init__(self, file_name, operator):
+        self.file_name = file_name
+        self.operator = operator
+        # Set self.verbose to 2 level to print more information
+        self.verbose = 2
+        self.op_idx = operator.operator_idx
+        self.op_name = operator.opcode_str
+
+        self.f = open(file_name, 'at')
+
+    def __del__(self):
+        self.f.close()
+
+    def SaveInfo(self):
+        self.f.write("[{}]\n".format(self.op_idx))
+        if (self.op_name == 'CONV_2D'):
+            self.SaveConv2DInputs()
+        else:
+            self.SaveInputs()
+
+        self.SaveOutputs()
+
+        self.SaveAttributes()
+
+        self.f.write('\n')
+
+    def SaveConv2DInputs(self):
+        if (len(self.operator.inputs) != 3):
+            raise AssertionError('Conv2D input count should be 3')
+
+        inputs = self.operator.inputs[0]
+        weights = self.operator.inputs[1]
+        bias = self.operator.inputs[2]
+
+        self.f.write("input: {}\n".format(
+            TensorPrinter(self.verbose, inputs).GetShapeString()))
+        self.f.write("input_type: {}\n".format(inputs.type_name))
+        self.f.write("weights: {}\n".format(
+            TensorPrinter(self.verbose, weights).GetShapeString()))
+        self.f.write("weights_type: {}\n".format(weights.type_name))
+        self.f.write("bias: {}\n".format(
+            TensorPrinter(self.verbose, bias).GetShapeString()))
+        self.f.write("bias_type: {}\n".format(bias.type_name))
+
+    def SaveInputs(self):
+        total = len(self.operator.inputs)
+        self.f.write("input_counts: {}\n".format(total))
+        for idx in range(total):
+            tensor = self.operator.inputs[idx]
+            input_shape_str = TensorPrinter(self.verbose, tensor).GetShapeString()
+            self.f.write("input{}: {}\n".format(idx, input_shape_str))
+            self.f.write("input{}_type: {}\n".format(idx, tensor.type_name))
+
+    def SaveOutputs(self):
+        total = len(self.operator.outputs)
+        self.f.write("output_counts: {}\n".format(total))
+        for idx in range(total):
+            tensor = self.operator.outputs[idx]
+            output_shape_str = TensorPrinter(self.verbose, tensor).GetShapeString()
+            self.f.write("output{}: {}\n".format(idx, output_shape_str))
+            self.f.write("output{}_type: {}\n".format(idx, tensor.type_name))
+
+    def SaveFilter(self):
+        self.f.write("filter_w: {}\n".format(self.operator.options.FilterWidth()))
+        self.f.write("filter_h: {}\n".format(self.operator.options.FilterHeight()))
+
+    def SaveStride(self):
+        self.f.write("stride_w: {}\n".format(self.operator.options.StrideW()))
+        self.f.write("stride_h: {}\n".format(self.operator.options.StrideH()))
+
+    def SaveDilation(self):
+        self.f.write("dilation_w: {}\n".format(self.operator.options.DilationWFactor()))
+        self.f.write("dilation_h: {}\n".format(self.operator.options.DilationHFactor()))
+
+    def SavePadding(self):
+        if self.operator.options.Padding() == 0:
+            self.f.write("padding: SAME\n")
+        elif self.operator.options.Padding() == 1:
+            self.f.write("padding: VALID\n")
+
+    def SaveFusedAct(self):
+        if self.operator.fused_activation is not "NONE":
+            self.f.write("fused_act: {}\n".format(self.operator.fused_activation))
+
+    def SaveAttributes(self):
+        # operator option
+        # Some operations does not have option. In such case no option is printed
+        option_str = OptionPrinter(self.verbose, self.op_name,
+                                   self.operator.options).GetOptionString()
+        if self.op_name == 'AVERAGE_POOL_2D' or self.op_name == 'MAX_POOL_2D':
+            self.SaveFilter()
+            self.SaveStride()
+            self.SavePadding()
+        elif self.op_name == 'CONV_2D':
+            self.SaveStride()
+            self.SaveDilation()
+            self.SavePadding()
+        elif self.op_name == 'TRANSPOSE_CONV':
+            self.SaveStride()
+            self.SavePadding()
+        elif self.op_name == 'DEPTHWISE_CONV_2D':
+            self.SaveStride()
+            self.SaveDilation()
+            self.SavePadding()
+            self.f.write("depthmultiplier: {}\n".format(
+                self.operator.options.DepthMultiplier()))
+
+        self.SaveFusedAct()
diff --git a/tools/tflitefile_tool/model_parser.py b/tools/tflitefile_tool/model_parser.py
index 0edabbba1..6f9e1c616 100755
--- a/tools/tflitefile_tool/model_parser.py
+++ b/tools/tflitefile_tool/model_parser.py
@@ -29,6 +29,7 @@ import tflite.SubGraph
 import argparse
 from operator_parser import OperatorParser
 from model_printer import ModelPrinter
+from model_saver import ModelSaver
 from perf_predictor import PerfPredictor
 
 
@@ -62,6 +63,15 @@ class TFLiteModelFileParser(object):
                 for operator_index in args.operator:
                     self.print_operator_index.append(int(operator_index))
 
+        # Set config option
+        self.save = False
+        if args.config:
+            self.save = True
+            self.save_config = True
+
+        if self.save == True:
+            self.save_prefix = args.prefix
+
     def PrintModel(self, model_name, op_parser):
         printer = ModelPrinter(self.print_level, op_parser, model_name)
 
@@ -73,6 +83,12 @@ class TFLiteModelFileParser(object):
 
         printer.PrintInfo()
 
+    def SaveModel(self, model_name, op_parser):
+        saver = ModelSaver(model_name, op_parser)
+
+        if self.save_config == True:
+            saver.SaveConfigInfo(self.save_prefix)
+
     def main(self):
         # Generate Model: top structure of tflite model file
         buf = self.tflite_file.read()
@@ -81,18 +97,22 @@ class TFLiteModelFileParser(object):
 
         # Model file can have many models
         # 1st subgraph is main model
-        model_name = "Main model"
+        model_name = "Main_model"
         for subgraph_index in range(tf_model.SubgraphsLength()):
             tf_subgraph = tf_model.Subgraphs(subgraph_index)
             if (subgraph_index != 0):
-                model_name = "Model #" + str(subgraph_index)
+                model_name = "Model_#" + str(subgraph_index)
 
             # Parse Operators
             op_parser = OperatorParser(tf_model, tf_subgraph, PerfPredictor())
             op_parser.Parse()
 
-            # print all of operators or requested objects
-            self.PrintModel(model_name, op_parser)
+            if self.save == False:
+                # print all of operators or requested objects
+                self.PrintModel(model_name, op_parser)
+            else:
+                # save all of operators in this model
+                self.SaveModel(model_name, op_parser)
 
 
 if __name__ == '__main__':
@@ -109,6 +129,13 @@ if __name__ == '__main__':
         '--operator',
         nargs='*',
         help="operator ID to print information (default: all)")
+    arg_parser.add_argument(
+        '-c',
+        '--config',
+        action='store_true',
+        help="Save the configuration file per operator")
+    arg_parser.add_argument(
+        '-p', '--prefix', help="file prefix to be saved (with -c/--config option)")
     args = arg_parser.parse_args()
 
     # Call main function
diff --git a/tools/tflitefile_tool/model_printer.py b/tools/tflitefile_tool/model_printer.py
index ad06fa7a7..0c11d01bd 100644
--- a/tools/tflitefile_tool/model_printer.py
+++ b/tools/tflitefile_tool/model_printer.py
@@ -134,9 +134,13 @@ class ModelPrinter(object):
 
     def PrintTotalMemory(self):
         total_memory = 0
+        filled_memory = 0  # only memory for constant
         for tensor in self.op_parser.GetAllTensors():
+            if tensor.tf_buffer.DataLength() != 0:
+                filled_memory += tensor.memory_size
             total_memory += tensor.memory_size
 
         from tensor_printer import ConvertBytesToHuman
-        print("Expected total memory for allocating all tensors: {0}".format(
-            ConvertBytesToHuman(total_memory)))
+        print("Expected TOTAL  memory: {0}".format(ConvertBytesToHuman(total_memory)))
+        print("Expected FILLED memory: {0}".format(ConvertBytesToHuman(filled_memory)))
+        print('')
diff --git a/tools/tflitefile_tool/model_saver.py b/tools/tflitefile_tool/model_saver.py
new file mode 100644
index 000000000..15037a1fe
--- /dev/null
+++ b/tools/tflitefile_tool/model_saver.py
@@ -0,0 +1,36 @@
+#!/usr/bin/python
+
+# Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#    http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+from config_saver import ConfigSaver
+
+
+class ModelSaver(object):
+    def __init__(self, model_name, op_parser):
+        self.model_name = model_name
+        self.op_parser = op_parser
+
+    def SaveConfigInfo(self, prefix):
+        print("Save model configuration file")
+        for type_str, oper_list in self.op_parser.operators_per_type.items():
+            if prefix:
+                file_name = "{}_{}_{}.config".format(prefix, self.model_name, type_str)
+            else:
+                file_name = "{}_{}.config".format(self.model_name, type_str)
+            print("{} file is generated".format(file_name))
+            with open(file_name, 'wt') as f:
+                f.write("# {}, Total count: {}\n\n".format(type_str, len(oper_list)))
+            for operator in oper_list:
+                ConfigSaver(file_name, operator).SaveInfo()
diff --git a/tools/tflitefile_tool/operation.py b/tools/tflitefile_tool/operation.py
index 127d6c566..6aa752772 100755
--- a/tools/tflitefile_tool/operation.py
+++ b/tools/tflitefile_tool/operation.py
@@ -20,13 +20,11 @@ import tflite.BuiltinOptions
 import tflite.Tensor
 from tensor_wrapping import Tensor
 import math
-'''
-NOTICE
-- an internal class. do not import outside this file.
-- REF: https://stackoverflow.com/questions/551038/private-implementation-class-in-python
-'''
 
 
+# NOTICE
+# - an internal class. do not import outside this file.
+# - REF: https://stackoverflow.com/questions/551038/private-implementation-class-in-python
 class _OperationComputeMethod(object):
     '''
     NOTE: How to count operations of convolution(and also pooling)?
@@ -55,7 +53,7 @@ class _OperationComputeMethod(object):
     Anyway, we can calculate total operations on this way. This can apply to the way of pooling.
     '''
 
-    def ComputeOperationForConv2D(tf_operator, inputs, outputs):
+    def ComputeOperationForConv2D(self, tf_operator, inputs, outputs):
         assert (
             tf_operator.BuiltinOptionsType() == tflite.BuiltinOptions.BuiltinOptions()
             .Conv2DOptions)
@@ -83,16 +81,14 @@ class _OperationComputeMethod(object):
         nonlinear_instr_num = 0
         return (add_instr_num, mul_instr_num, nonlinear_instr_num)
 
-    '''
-    NOTE: Reference the comment 'NOTE' of ComputeOperationForConv2D
-    '''
+    # NOTE: Reference the comment 'NOTE' of ComputeOperationForConv2D
 
-    def ComputeOperationForPooling(tf_operator, inputs, outputs):
+    def ComputeOperationForPooling(self, tf_operator, inputs, outputs):
         assert (
             tf_operator.BuiltinOptionsType() == tflite.BuiltinOptions.BuiltinOptions()
             .Pool2DOptions)
 
-        input_tensor = inputs[0].tf_tensor
+        dummy_input_tensor = inputs[0].tf_tensor
         output_tensor = outputs[0].tf_tensor
 
         pool2d_options = tflite.Pool2DOptions.Pool2DOptions()
@@ -113,14 +109,14 @@ class _OperationComputeMethod(object):
         nonlinear_instr_num = 0
         return (add_instr_num, mul_instr_num, nonlinear_instr_num)
 
-    def ComputeOperationForSoftmax(tf_operator, inputs, outputs):
+    def ComputeOperationForSoftmax(self, tf_operator, inputs, outputs):
         assert (
             tf_operator.BuiltinOptionsType() == tflite.BuiltinOptions.BuiltinOptions()
             .SoftmaxOptions)
 
         input_tensor = inputs[0].tf_tensor
 
-        batch_size = input_tensor.Shape(0)
+        dummy_batch_size = input_tensor.Shape(0)
         input_dim = input_tensor.Shape(1)
 
         # Softmax(x_i) = exp(x_i) / sum of exp(x)
@@ -129,7 +125,7 @@ class _OperationComputeMethod(object):
         nonlinear_instr_num = input_dim + input_dim  # sum of exp(x) and exp(x_i)
         return (add_instr_num, mul_instr_num, nonlinear_instr_num)
 
-    def ComputeOperationForFullyConnected(tf_operator, inputs, outputs):
+    def ComputeOperationForFullyConnected(self, tf_operator, inputs, outputs):
         assert (
             tf_operator.BuiltinOptionsType() == tflite.BuiltinOptions.BuiltinOptions()
             .FullyConnectedOptions)
@@ -150,13 +146,13 @@ class _OperationComputeMethod(object):
         nonlinear_instr_num = 0
         return (add_instr_num, mul_instr_num, nonlinear_instr_num)
 
-    def ComputeOperationForNothing(tf_operator, inputs, outputs):
+    def ComputeOperationForNothing(self, tf_operator, inputs, outputs):
         add_instr_num = 0
         mul_instr_num = 0
         nonlinear_instr_num = 0
         return (add_instr_num, mul_instr_num, nonlinear_instr_num)
 
-    def NYI_ComputeOperation(tf_operator, inputs, outputs):
+    def NYI_ComputeOperation(self, tf_operator, inputs, outputs):
         pass
 
     operation_to_method_map = {
@@ -167,7 +163,7 @@ class _OperationComputeMethod(object):
         "SOFTMAX": ComputeOperationForSoftmax,
         "FULLY_CONNECTED": ComputeOperationForFullyConnected,
         "CONCATENATION": ComputeOperationForNothing,
-        # ADAS
+        # Extension
         "TOPK_V2": NYI_ComputeOperation,
         "SUB": NYI_ComputeOperation,
         "STRIDED_SLICE": NYI_ComputeOperation,
@@ -207,7 +203,7 @@ class Operation(object):
             return
 
         self.add_instr_num, self.mul_instr_num, self.nonlinear_instr_num = method(
-            self.tf_operator, self.inputs, self.outputs)
+            _OperationComputeMethod(), self.tf_operator, self.inputs, self.outputs)
 
     def TotalInstrNum(self):
         return (self.add_instr_num + self.mul_instr_num + self.nonlinear_instr_num)
diff --git a/tools/tflitefile_tool/option_printer.py b/tools/tflitefile_tool/option_printer.py
index 08754f1ce..15265adf2 100644
--- a/tools/tflitefile_tool/option_printer.py
+++ b/tools/tflitefile_tool/option_printer.py
@@ -35,35 +35,33 @@ class OptionPrinter(object):
         if (self.options == 0):
             return
 
-        if (self.op_name == "AVERAGE_POOL_2D" or self.op_name == "MAX_POOL_2D"):
+        option_str = self.GetOptionString()
+        if option_str:
             print("{}Options".format(tab))
+            print("{}\t{}".format(tab, option_str))
 
-            print("{}\t{}, {}, {}".format(
-                tab, "Filter W:H = {}:{}".format(self.options.FilterWidth(),
-                                                 self.options.FilterHeight()),
+    def GetOptionString(self):
+        if (self.op_name == "AVERAGE_POOL_2D" or self.op_name == "MAX_POOL_2D"):
+            return "{}, {}, {}".format(
+                "Filter W:H = {}:{}".format(self.options.FilterWidth(),
+                                            self.options.FilterHeight()),
                 "Stride W:H = {}:{}".format(self.options.StrideW(),
                                             self.options.StrideH()),
-                "Padding = {}".format(self.GetPadding())))
-
+                "Padding = {}".format(self.GetPadding()))
         elif (self.op_name == "CONV_2D"):
-            print("{}Options".format(tab))
-
-            print("{}\t{}, {}, {}".format(
-                tab, "Stride W:H = {}:{}".format(self.options.StrideW(),
-                                                 self.options.StrideH()),
+            return "{}, {}, {}".format(
+                "Stride W:H = {}:{}".format(self.options.StrideW(),
+                                            self.options.StrideH()),
                 "Dilation W:H = {}:{}".format(self.options.DilationWFactor(),
                                               self.options.DilationHFactor()),
-                "Padding = {}".format(self.GetPadding())))
-
+                "Padding = {}".format(self.GetPadding()))
         elif (self.op_name == "DEPTHWISE_CONV_2D"):
-            print("{}Options".format(tab))
-
             # yapf: disable
-            print("{}\t{}, {}, {}, {}".format(
-                tab, "Stride W:H = {}:{}".format(self.options.StrideW(),
+            return "{}, {}, {}, {}".format(
+                "Stride W:H = {}:{}".format(self.options.StrideW(),
                                                  self.options.StrideH()),
                 "Dilation W:H = {}:{}".format(self.options.DilationWFactor(),
                                               self.options.DilationHFactor()),
                 "Padding = {}".format(self.GetPadding()),
-                "DepthMultiplier = {}".format(self.options.DepthMultiplier())))
+                "DepthMultiplier = {}".format(self.options.DepthMultiplier()))
             # yapf: enable
diff --git a/tools/tflitefile_tool/select_operator.py b/tools/tflitefile_tool/select_operator.py
index c5d311d59..892341029 100644
--- a/tools/tflitefile_tool/select_operator.py
+++ b/tools/tflitefile_tool/select_operator.py
@@ -141,7 +141,7 @@ def GenerateQuantization(new_builder, selected_quantization):
         tflite.QuantizationParameters.QuantizationParametersStartScaleVector(
             new_builder, zeropoint_num)
         for zeropoint_idx in reversed(range(zeropoint_num)):
-            new_builder.PrependFloat32(selected_quantization.ZeroPoint(zeropoint_idx))
+            new_builder.PrependInt64(selected_quantization.ZeroPoint(zeropoint_idx))
         new_zeropoint = new_builder.EndVector(zeropoint_num)
 
     # Create quantization
diff --git a/tools/tflitefile_tool/tflite/AbsOptions.py b/tools/tflitefile_tool/tflite/AbsOptions.py
new file mode 100644
index 000000000..748509293
--- /dev/null
+++ b/tools/tflitefile_tool/tflite/AbsOptions.py
@@ -0,0 +1,28 @@
+# automatically generated by the FlatBuffers compiler, do not modify
+
+# namespace: tflite
+
+import flatbuffers
+
+
+class AbsOptions(object):
+    __slots__ = ['_tab']
+
+    @classmethod
+    def GetRootAsAbsOptions(cls, buf, offset):
+        n = flatbuffers.encode.Get(flatbuffers.packer.uoffset, buf, offset)
+        x = AbsOptions()
+        x.Init(buf, n + offset)
+        return x
+
+    # AbsOptions
+    def Init(self, buf, pos):
+        self._tab = flatbuffers.table.Table(buf, pos)
+
+
+def AbsOptionsStart(builder):
+    builder.StartObject(0)
+
+
+def AbsOptionsEnd(builder):
+    return builder.EndObject()
diff --git a/tools/tflitefile_tool/tflite/BidirectionalSequenceLSTMOptions.py b/tools/tflitefile_tool/tflite/BidirectionalSequenceLSTMOptions.py
new file mode 100644
index 000000000..eac2e27ab
--- /dev/null
+++ b/tools/tflitefile_tool/tflite/BidirectionalSequenceLSTMOptions.py
@@ -0,0 +1,74 @@
+# automatically generated by the FlatBuffers compiler, do not modify
+
+# namespace: tflite
+
+import flatbuffers
+
+
+class BidirectionalSequenceLSTMOptions(object):
+    __slots__ = ['_tab']
+
+    @classmethod
+    def GetRootAsBidirectionalSequenceLSTMOptions(cls, buf, offset):
+        n = flatbuffers.encode.Get(flatbuffers.packer.uoffset, buf, offset)
+        x = BidirectionalSequenceLSTMOptions()
+        x.Init(buf, n + offset)
+        return x
+
+    # BidirectionalSequenceLSTMOptions
+    def Init(self, buf, pos):
+        self._tab = flatbuffers.table.Table(buf, pos)
+
+    # BidirectionalSequenceLSTMOptions
+    def FusedActivationFunction(self):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(4))
+        if o != 0:
+            return self._tab.Get(flatbuffers.number_types.Int8Flags, o + self._tab.Pos)
+        return 0
+
+    # BidirectionalSequenceLSTMOptions
+    def CellClip(self):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(6))
+        if o != 0:
+            return self._tab.Get(flatbuffers.number_types.Float32Flags, o + self._tab.Pos)
+        return 0.0
+
+    # BidirectionalSequenceLSTMOptions
+    def ProjClip(self):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(8))
+        if o != 0:
+            return self._tab.Get(flatbuffers.number_types.Float32Flags, o + self._tab.Pos)
+        return 0.0
+
+    # BidirectionalSequenceLSTMOptions
+    def MergeOutputs(self):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(10))
+        if o != 0:
+            return bool(
+                self._tab.Get(flatbuffers.number_types.BoolFlags, o + self._tab.Pos))
+        return False
+
+
+def BidirectionalSequenceLSTMOptionsStart(builder):
+    builder.StartObject(4)
+
+
+def BidirectionalSequenceLSTMOptionsAddFusedActivationFunction(builder,
+                                                               fusedActivationFunction):
+    builder.PrependInt8Slot(0, fusedActivationFunction, 0)
+
+
+def BidirectionalSequenceLSTMOptionsAddCellClip(builder, cellClip):
+    builder.PrependFloat32Slot(1, cellClip, 0.0)
+
+
+def BidirectionalSequenceLSTMOptionsAddProjClip(builder, projClip):
+    builder.PrependFloat32Slot(2, projClip, 0.0)
+
+
+def BidirectionalSequenceLSTMOptionsAddMergeOutputs(builder, mergeOutputs):
+    builder.PrependBoolSlot(3, mergeOutputs, 0)
+
+
+def BidirectionalSequenceLSTMOptionsEnd(builder):
+    return builder.EndObject()
diff --git a/tools/tflitefile_tool/tflite/BidirectionalSequenceRNNOptions.py b/tools/tflitefile_tool/tflite/BidirectionalSequenceRNNOptions.py
index 474ee4ba2..e1d4f6553 100644
--- a/tools/tflitefile_tool/tflite/BidirectionalSequenceRNNOptions.py
+++ b/tools/tflitefile_tool/tflite/BidirectionalSequenceRNNOptions.py
@@ -34,9 +34,17 @@ class BidirectionalSequenceRNNOptions(object):
             return self._tab.Get(flatbuffers.number_types.Int8Flags, o + self._tab.Pos)
         return 0
 
+    # BidirectionalSequenceRNNOptions
+    def MergeOutputs(self):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(8))
+        if o != 0:
+            return bool(
+                self._tab.Get(flatbuffers.number_types.BoolFlags, o + self._tab.Pos))
+        return False
+
 
 def BidirectionalSequenceRNNOptionsStart(builder):
-    builder.StartObject(2)
+    builder.StartObject(3)
 
 
 def BidirectionalSequenceRNNOptionsAddTimeMajor(builder, timeMajor):
@@ -48,5 +56,9 @@ def BidirectionalSequenceRNNOptionsAddFusedActivationFunction(builder,
     builder.PrependInt8Slot(1, fusedActivationFunction, 0)
 
 
+def BidirectionalSequenceRNNOptionsAddMergeOutputs(builder, mergeOutputs):
+    builder.PrependBoolSlot(2, mergeOutputs, 0)
+
+
 def BidirectionalSequenceRNNOptionsEnd(builder):
     return builder.EndObject()
diff --git a/tools/tflitefile_tool/tflite/BuiltinOperator.py b/tools/tflitefile_tool/tflite/BuiltinOperator.py
index 8e2f9c680..481eeffe8 100644
--- a/tools/tflitefile_tool/tflite/BuiltinOperator.py
+++ b/tools/tflitefile_tool/tflite/BuiltinOperator.py
@@ -98,3 +98,11 @@ class BuiltinOperator(object):
     SQUARE = 92
     ZEROS_LIKE = 93
     FILL = 94
+    FLOOR_MOD = 95
+    RANGE = 96
+    RESIZE_NEAREST_NEIGHBOR = 97
+    LEAKY_RELU = 98
+    SQUARED_DIFFERENCE = 99
+    MIRROR_PAD = 100
+    ABS = 101
+    SPLIT_V = 102
diff --git a/tools/tflitefile_tool/tflite/BuiltinOptions.py b/tools/tflitefile_tool/tflite/BuiltinOptions.py
index 7e1eb34ac..ad115814a 100644
--- a/tools/tflitefile_tool/tflite/BuiltinOptions.py
+++ b/tools/tflitefile_tool/tflite/BuiltinOptions.py
@@ -73,3 +73,14 @@ class BuiltinOptions(object):
     SquareOptions = 66
     ZerosLikeOptions = 67
     FillOptions = 68
+    BidirectionalSequenceLSTMOptions = 69
+    BidirectionalSequenceRNNOptions = 70
+    UnidirectionalSequenceLSTMOptions = 71
+    FloorModOptions = 72
+    RangeOptions = 73
+    ResizeNearestNeighborOptions = 74
+    LeakyReluOptions = 75
+    SquaredDifferenceOptions = 76
+    MirrorPadOptions = 77
+    AbsOptions = 78
+    SplitVOptions = 79
diff --git a/tools/tflitefile_tool/tflite/CustomQuantization.py b/tools/tflitefile_tool/tflite/CustomQuantization.py
new file mode 100644
index 000000000..8cc1db1e2
--- /dev/null
+++ b/tools/tflitefile_tool/tflite/CustomQuantization.py
@@ -0,0 +1,61 @@
+# automatically generated by the FlatBuffers compiler, do not modify
+
+# namespace: tflite
+
+import flatbuffers
+
+
+class CustomQuantization(object):
+    __slots__ = ['_tab']
+
+    @classmethod
+    def GetRootAsCustomQuantization(cls, buf, offset):
+        n = flatbuffers.encode.Get(flatbuffers.packer.uoffset, buf, offset)
+        x = CustomQuantization()
+        x.Init(buf, n + offset)
+        return x
+
+    # CustomQuantization
+    def Init(self, buf, pos):
+        self._tab = flatbuffers.table.Table(buf, pos)
+
+    # CustomQuantization
+    def Custom(self, j):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(4))
+        if o != 0:
+            a = self._tab.Vector(o)
+            return self._tab.Get(
+                flatbuffers.number_types.Uint8Flags,
+                a + flatbuffers.number_types.UOffsetTFlags.py_type(j * 1))
+        return 0
+
+    # CustomQuantization
+    def CustomAsNumpy(self):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(4))
+        if o != 0:
+            return self._tab.GetVectorAsNumpy(flatbuffers.number_types.Uint8Flags, o)
+        return 0
+
+    # CustomQuantization
+    def CustomLength(self):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(4))
+        if o != 0:
+            return self._tab.VectorLen(o)
+        return 0
+
+
+def CustomQuantizationStart(builder):
+    builder.StartObject(1)
+
+
+def CustomQuantizationAddCustom(builder, custom):
+    builder.PrependUOffsetTRelativeSlot(
+        0, flatbuffers.number_types.UOffsetTFlags.py_type(custom), 0)
+
+
+def CustomQuantizationStartCustomVector(builder, numElems):
+    return builder.StartVector(1, numElems, 1)
+
+
+def CustomQuantizationEnd(builder):
+    return builder.EndObject()
diff --git a/tools/tflitefile_tool/tflite/FakeQuantOptions.py b/tools/tflitefile_tool/tflite/FakeQuantOptions.py
index c266bfc9d..6a208e765 100644
--- a/tools/tflitefile_tool/tflite/FakeQuantOptions.py
+++ b/tools/tflitefile_tool/tflite/FakeQuantOptions.py
@@ -53,12 +53,12 @@ def FakeQuantOptionsStart(builder):
     builder.StartObject(4)
 
 
-def FakeQuantOptionsAddMin(builder, min):
-    builder.PrependFloat32Slot(0, min, 0.0)
+def FakeQuantOptionsAddMin(builder, minSlot):
+    builder.PrependFloat32Slot(0, minSlot, 0.0)
 
 
-def FakeQuantOptionsAddMax(builder, max):
-    builder.PrependFloat32Slot(1, max, 0.0)
+def FakeQuantOptionsAddMax(builder, maxSlot):
+    builder.PrependFloat32Slot(1, maxSlot, 0.0)
 
 
 def FakeQuantOptionsAddNumBits(builder, numBits):
diff --git a/tools/tflitefile_tool/tflite/FloorModOptions.py b/tools/tflitefile_tool/tflite/FloorModOptions.py
new file mode 100644
index 000000000..d2f7b3b48
--- /dev/null
+++ b/tools/tflitefile_tool/tflite/FloorModOptions.py
@@ -0,0 +1,28 @@
+# automatically generated by the FlatBuffers compiler, do not modify
+
+# namespace: tflite
+
+import flatbuffers
+
+
+class FloorModOptions(object):
+    __slots__ = ['_tab']
+
+    @classmethod
+    def GetRootAsFloorModOptions(cls, buf, offset):
+        n = flatbuffers.encode.Get(flatbuffers.packer.uoffset, buf, offset)
+        x = FloorModOptions()
+        x.Init(buf, n + offset)
+        return x
+
+    # FloorModOptions
+    def Init(self, buf, pos):
+        self._tab = flatbuffers.table.Table(buf, pos)
+
+
+def FloorModOptionsStart(builder):
+    builder.StartObject(0)
+
+
+def FloorModOptionsEnd(builder):
+    return builder.EndObject()
diff --git a/tools/tflitefile_tool/tflite/LSHProjectionOptions.py b/tools/tflitefile_tool/tflite/LSHProjectionOptions.py
index 055eb75ff..ea1e20bbe 100644
--- a/tools/tflitefile_tool/tflite/LSHProjectionOptions.py
+++ b/tools/tflitefile_tool/tflite/LSHProjectionOptions.py
@@ -31,8 +31,8 @@ def LSHProjectionOptionsStart(builder):
     builder.StartObject(1)
 
 
-def LSHProjectionOptionsAddType(builder, type):
-    builder.PrependInt8Slot(0, type, 0)
+def LSHProjectionOptionsAddType(builder, typeSlot):
+    builder.PrependInt8Slot(0, typeSlot, 0)
 
 
 def LSHProjectionOptionsEnd(builder):
diff --git a/tools/tflitefile_tool/tflite/LeakyReluOptions.py b/tools/tflitefile_tool/tflite/LeakyReluOptions.py
new file mode 100644
index 000000000..a4ffa3759
--- /dev/null
+++ b/tools/tflitefile_tool/tflite/LeakyReluOptions.py
@@ -0,0 +1,39 @@
+# automatically generated by the FlatBuffers compiler, do not modify
+
+# namespace: tflite
+
+import flatbuffers
+
+
+class LeakyReluOptions(object):
+    __slots__ = ['_tab']
+
+    @classmethod
+    def GetRootAsLeakyReluOptions(cls, buf, offset):
+        n = flatbuffers.encode.Get(flatbuffers.packer.uoffset, buf, offset)
+        x = LeakyReluOptions()
+        x.Init(buf, n + offset)
+        return x
+
+    # LeakyReluOptions
+    def Init(self, buf, pos):
+        self._tab = flatbuffers.table.Table(buf, pos)
+
+    # LeakyReluOptions
+    def Alpha(self):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(4))
+        if o != 0:
+            return self._tab.Get(flatbuffers.number_types.Float32Flags, o + self._tab.Pos)
+        return 0.0
+
+
+def LeakyReluOptionsStart(builder):
+    builder.StartObject(1)
+
+
+def LeakyReluOptionsAddAlpha(builder, alpha):
+    builder.PrependFloat32Slot(0, alpha, 0.0)
+
+
+def LeakyReluOptionsEnd(builder):
+    return builder.EndObject()
diff --git a/tools/tflitefile_tool/tflite/MirrorPadMode.py b/tools/tflitefile_tool/tflite/MirrorPadMode.py
new file mode 100644
index 000000000..85718ebf2
--- /dev/null
+++ b/tools/tflitefile_tool/tflite/MirrorPadMode.py
@@ -0,0 +1,8 @@
+# automatically generated by the FlatBuffers compiler, do not modify
+
+# namespace: tflite
+
+
+class MirrorPadMode(object):
+    REFLECT = 0
+    SYMMETRIC = 1
diff --git a/tools/tflitefile_tool/tflite/MirrorPadOptions.py b/tools/tflitefile_tool/tflite/MirrorPadOptions.py
new file mode 100644
index 000000000..4d908e15b
--- /dev/null
+++ b/tools/tflitefile_tool/tflite/MirrorPadOptions.py
@@ -0,0 +1,39 @@
+# automatically generated by the FlatBuffers compiler, do not modify
+
+# namespace: tflite
+
+import flatbuffers
+
+
+class MirrorPadOptions(object):
+    __slots__ = ['_tab']
+
+    @classmethod
+    def GetRootAsMirrorPadOptions(cls, buf, offset):
+        n = flatbuffers.encode.Get(flatbuffers.packer.uoffset, buf, offset)
+        x = MirrorPadOptions()
+        x.Init(buf, n + offset)
+        return x
+
+    # MirrorPadOptions
+    def Init(self, buf, pos):
+        self._tab = flatbuffers.table.Table(buf, pos)
+
+    # MirrorPadOptions
+    def Mode(self):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(4))
+        if o != 0:
+            return self._tab.Get(flatbuffers.number_types.Int8Flags, o + self._tab.Pos)
+        return 0
+
+
+def MirrorPadOptionsStart(builder):
+    builder.StartObject(1)
+
+
+def MirrorPadOptionsAddMode(builder, mode):
+    builder.PrependInt8Slot(0, mode, 0)
+
+
+def MirrorPadOptionsEnd(builder):
+    return builder.EndObject()
diff --git a/tools/tflitefile_tool/tflite/QuantizationDetails.py b/tools/tflitefile_tool/tflite/QuantizationDetails.py
new file mode 100644
index 000000000..93e322e18
--- /dev/null
+++ b/tools/tflitefile_tool/tflite/QuantizationDetails.py
@@ -0,0 +1,8 @@
+# automatically generated by the FlatBuffers compiler, do not modify
+
+# namespace: tflite
+
+
+class QuantizationDetails(object):
+    NONE = 0
+    CustomQuantization = 1
diff --git a/tools/tflitefile_tool/tflite/QuantizationParameters.py b/tools/tflitefile_tool/tflite/QuantizationParameters.py
index 7d5e53072..9a752d7e5 100644
--- a/tools/tflitefile_tool/tflite/QuantizationParameters.py
+++ b/tools/tflitefile_tool/tflite/QuantizationParameters.py
@@ -115,23 +115,40 @@ class QuantizationParameters(object):
             return self._tab.VectorLen(o)
         return 0
 
+    # QuantizationParameters
+    def DetailsType(self):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(12))
+        if o != 0:
+            return self._tab.Get(flatbuffers.number_types.Uint8Flags, o + self._tab.Pos)
+        return 0
+
+    # QuantizationParameters
+    def Details(self):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(14))
+        if o != 0:
+            from flatbuffers.table import Table
+            obj = Table(bytearray(), 0)
+            self._tab.Union(obj, o)
+            return obj
+        return None
+
 
 def QuantizationParametersStart(builder):
-    builder.StartObject(4)
+    builder.StartObject(6)
 
 
-def QuantizationParametersAddMin(builder, min):
+def QuantizationParametersAddMin(builder, minSlot):
     builder.PrependUOffsetTRelativeSlot(
-        0, flatbuffers.number_types.UOffsetTFlags.py_type(min), 0)
+        0, flatbuffers.number_types.UOffsetTFlags.py_type(minSlot), 0)
 
 
 def QuantizationParametersStartMinVector(builder, numElems):
     return builder.StartVector(4, numElems, 4)
 
 
-def QuantizationParametersAddMax(builder, max):
+def QuantizationParametersAddMax(builder, maxSlot):
     builder.PrependUOffsetTRelativeSlot(
-        1, flatbuffers.number_types.UOffsetTFlags.py_type(max), 0)
+        1, flatbuffers.number_types.UOffsetTFlags.py_type(maxSlot), 0)
 
 
 def QuantizationParametersStartMaxVector(builder, numElems):
@@ -156,5 +173,14 @@ def QuantizationParametersStartZeroPointVector(builder, numElems):
     return builder.StartVector(8, numElems, 8)
 
 
+def QuantizationParametersAddDetailsType(builder, detailsType):
+    builder.PrependUint8Slot(4, detailsType, 0)
+
+
+def QuantizationParametersAddDetails(builder, details):
+    builder.PrependUOffsetTRelativeSlot(
+        5, flatbuffers.number_types.UOffsetTFlags.py_type(details), 0)
+
+
 def QuantizationParametersEnd(builder):
     return builder.EndObject()
diff --git a/tools/tflitefile_tool/tflite/RangeOptions.py b/tools/tflitefile_tool/tflite/RangeOptions.py
new file mode 100644
index 000000000..917795f6a
--- /dev/null
+++ b/tools/tflitefile_tool/tflite/RangeOptions.py
@@ -0,0 +1,28 @@
+# automatically generated by the FlatBuffers compiler, do not modify
+
+# namespace: tflite
+
+import flatbuffers
+
+
+class RangeOptions(object):
+    __slots__ = ['_tab']
+
+    @classmethod
+    def GetRootAsRangeOptions(cls, buf, offset):
+        n = flatbuffers.encode.Get(flatbuffers.packer.uoffset, buf, offset)
+        x = RangeOptions()
+        x.Init(buf, n + offset)
+        return x
+
+    # RangeOptions
+    def Init(self, buf, pos):
+        self._tab = flatbuffers.table.Table(buf, pos)
+
+
+def RangeOptionsStart(builder):
+    builder.StartObject(0)
+
+
+def RangeOptionsEnd(builder):
+    return builder.EndObject()
diff --git a/tools/tflitefile_tool/tflite/ResizeNearestNeighborOptions.py b/tools/tflitefile_tool/tflite/ResizeNearestNeighborOptions.py
new file mode 100644
index 000000000..5ce4f75ba
--- /dev/null
+++ b/tools/tflitefile_tool/tflite/ResizeNearestNeighborOptions.py
@@ -0,0 +1,40 @@
+# automatically generated by the FlatBuffers compiler, do not modify
+
+# namespace: tflite
+
+import flatbuffers
+
+
+class ResizeNearestNeighborOptions(object):
+    __slots__ = ['_tab']
+
+    @classmethod
+    def GetRootAsResizeNearestNeighborOptions(cls, buf, offset):
+        n = flatbuffers.encode.Get(flatbuffers.packer.uoffset, buf, offset)
+        x = ResizeNearestNeighborOptions()
+        x.Init(buf, n + offset)
+        return x
+
+    # ResizeNearestNeighborOptions
+    def Init(self, buf, pos):
+        self._tab = flatbuffers.table.Table(buf, pos)
+
+    # ResizeNearestNeighborOptions
+    def AlignCorners(self):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(4))
+        if o != 0:
+            return bool(
+                self._tab.Get(flatbuffers.number_types.BoolFlags, o + self._tab.Pos))
+        return False
+
+
+def ResizeNearestNeighborOptionsStart(builder):
+    builder.StartObject(1)
+
+
+def ResizeNearestNeighborOptionsAddAlignCorners(builder, alignCorners):
+    builder.PrependBoolSlot(0, alignCorners, 0)
+
+
+def ResizeNearestNeighborOptionsEnd(builder):
+    return builder.EndObject()
diff --git a/tools/tflitefile_tool/tflite/SplitVOptions.py b/tools/tflitefile_tool/tflite/SplitVOptions.py
new file mode 100644
index 000000000..37816ce5b
--- /dev/null
+++ b/tools/tflitefile_tool/tflite/SplitVOptions.py
@@ -0,0 +1,39 @@
+# automatically generated by the FlatBuffers compiler, do not modify
+
+# namespace: tflite
+
+import flatbuffers
+
+
+class SplitVOptions(object):
+    __slots__ = ['_tab']
+
+    @classmethod
+    def GetRootAsSplitVOptions(cls, buf, offset):
+        n = flatbuffers.encode.Get(flatbuffers.packer.uoffset, buf, offset)
+        x = SplitVOptions()
+        x.Init(buf, n + offset)
+        return x
+
+    # SplitVOptions
+    def Init(self, buf, pos):
+        self._tab = flatbuffers.table.Table(buf, pos)
+
+    # SplitVOptions
+    def NumSplits(self):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(4))
+        if o != 0:
+            return self._tab.Get(flatbuffers.number_types.Int32Flags, o + self._tab.Pos)
+        return 0
+
+
+def SplitVOptionsStart(builder):
+    builder.StartObject(1)
+
+
+def SplitVOptionsAddNumSplits(builder, numSplits):
+    builder.PrependInt32Slot(0, numSplits, 0)
+
+
+def SplitVOptionsEnd(builder):
+    return builder.EndObject()
diff --git a/tools/tflitefile_tool/tflite/SquaredDifferenceOptions.py b/tools/tflitefile_tool/tflite/SquaredDifferenceOptions.py
new file mode 100644
index 000000000..17e022f34
--- /dev/null
+++ b/tools/tflitefile_tool/tflite/SquaredDifferenceOptions.py
@@ -0,0 +1,28 @@
+# automatically generated by the FlatBuffers compiler, do not modify
+
+# namespace: tflite
+
+import flatbuffers
+
+
+class SquaredDifferenceOptions(object):
+    __slots__ = ['_tab']
+
+    @classmethod
+    def GetRootAsSquaredDifferenceOptions(cls, buf, offset):
+        n = flatbuffers.encode.Get(flatbuffers.packer.uoffset, buf, offset)
+        x = SquaredDifferenceOptions()
+        x.Init(buf, n + offset)
+        return x
+
+    # SquaredDifferenceOptions
+    def Init(self, buf, pos):
+        self._tab = flatbuffers.table.Table(buf, pos)
+
+
+def SquaredDifferenceOptionsStart(builder):
+    builder.StartObject(0)
+
+
+def SquaredDifferenceOptionsEnd(builder):
+    return builder.EndObject()
diff --git a/tools/tflitefile_tool/tflite/Tensor.py b/tools/tflitefile_tool/tflite/Tensor.py
index e5f13301c..120cce50b 100644
--- a/tools/tflitefile_tool/tflite/Tensor.py
+++ b/tools/tflitefile_tool/tflite/Tensor.py
@@ -97,8 +97,8 @@ def TensorStartShapeVector(builder, numElems):
     return builder.StartVector(4, numElems, 4)
 
 
-def TensorAddType(builder, type):
-    builder.PrependInt8Slot(1, type, 0)
+def TensorAddType(builder, typeSlot):
+    builder.PrependInt8Slot(1, typeSlot, 0)
 
 
 def TensorAddBuffer(builder, buffer):
diff --git a/tools/tflitefile_tool/tflite/TensorType.py b/tools/tflitefile_tool/tflite/TensorType.py
index e375c65ee..ac7fe2014 100644
--- a/tools/tflitefile_tool/tflite/TensorType.py
+++ b/tools/tflitefile_tool/tflite/TensorType.py
@@ -13,3 +13,4 @@ class TensorType(object):
     BOOL = 6
     INT16 = 7
     COMPLEX64 = 8
+    INT8 = 9
diff --git a/tools/tflitefile_tool/tflite/UnidirectionalSequenceLSTMOptions.py b/tools/tflitefile_tool/tflite/UnidirectionalSequenceLSTMOptions.py
new file mode 100644
index 000000000..ffbb6378f
--- /dev/null
+++ b/tools/tflitefile_tool/tflite/UnidirectionalSequenceLSTMOptions.py
@@ -0,0 +1,74 @@
+# automatically generated by the FlatBuffers compiler, do not modify
+
+# namespace: tflite
+
+import flatbuffers
+
+
+class UnidirectionalSequenceLSTMOptions(object):
+    __slots__ = ['_tab']
+
+    @classmethod
+    def GetRootAsUnidirectionalSequenceLSTMOptions(cls, buf, offset):
+        n = flatbuffers.encode.Get(flatbuffers.packer.uoffset, buf, offset)
+        x = UnidirectionalSequenceLSTMOptions()
+        x.Init(buf, n + offset)
+        return x
+
+    # UnidirectionalSequenceLSTMOptions
+    def Init(self, buf, pos):
+        self._tab = flatbuffers.table.Table(buf, pos)
+
+    # UnidirectionalSequenceLSTMOptions
+    def FusedActivationFunction(self):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(4))
+        if o != 0:
+            return self._tab.Get(flatbuffers.number_types.Int8Flags, o + self._tab.Pos)
+        return 0
+
+    # UnidirectionalSequenceLSTMOptions
+    def CellClip(self):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(6))
+        if o != 0:
+            return self._tab.Get(flatbuffers.number_types.Float32Flags, o + self._tab.Pos)
+        return 0.0
+
+    # UnidirectionalSequenceLSTMOptions
+    def ProjClip(self):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(8))
+        if o != 0:
+            return self._tab.Get(flatbuffers.number_types.Float32Flags, o + self._tab.Pos)
+        return 0.0
+
+    # UnidirectionalSequenceLSTMOptions
+    def TimeMajor(self):
+        o = flatbuffers.number_types.UOffsetTFlags.py_type(self._tab.Offset(10))
+        if o != 0:
+            return bool(
+                self._tab.Get(flatbuffers.number_types.BoolFlags, o + self._tab.Pos))
+        return False
+
+
+def UnidirectionalSequenceLSTMOptionsStart(builder):
+    builder.StartObject(4)
+
+
+def UnidirectionalSequenceLSTMOptionsAddFusedActivationFunction(
+        builder, fusedActivationFunction):
+    builder.PrependInt8Slot(0, fusedActivationFunction, 0)
+
+
+def UnidirectionalSequenceLSTMOptionsAddCellClip(builder, cellClip):
+    builder.PrependFloat32Slot(1, cellClip, 0.0)
+
+
+def UnidirectionalSequenceLSTMOptionsAddProjClip(builder, projClip):
+    builder.PrependFloat32Slot(2, projClip, 0.0)
+
+
+def UnidirectionalSequenceLSTMOptionsAddTimeMajor(builder, timeMajor):
+    builder.PrependBoolSlot(3, timeMajor, 0)
+
+
+def UnidirectionalSequenceLSTMOptionsEnd(builder):
+    return builder.EndObject()
diff --git a/tools/tflkit/freeze_graph.sh b/tools/tflkit/freeze_graph.sh
index c491ba4d2..ae771cf80 100755
--- a/tools/tflkit/freeze_graph.sh
+++ b/tools/tflkit/freeze_graph.sh
@@ -4,13 +4,11 @@ usage()
 {
   echo "usage : $0"
   echo "       --info=Information file"
-  echo "       --tensorflow_path=TensorFlow path (Use externals/tensorflow by default)"
+  echo "       [--tensorflow_path=TensorFlow path] (If omitted, the module installed in system will be used by default.)"
 }
 
 SCRIPT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
 
-TF_DIR="${SCRIPT_PATH}/../../externals/tensorflow"
-
 for i in "$@"
 do
   case $i in
@@ -37,11 +35,6 @@ if [ -z "$INFO" ]; then
   usage
   exit 1
 fi
-if [ -z "$TF_DIR" ]; then
-  echo "tensorflow_path is unset or set to the empty string"
-  usage
-  exit 1
-fi
 
 if [ ! -x "$(command -v bazel)" ]; then
   echo "Cannot find bazel. Please install bazel."
@@ -74,17 +67,22 @@ fi
 
 CUR_DIR=$(pwd)
 {
-  echo "Enter $TF_DIR"
-  pushd $TF_DIR > /dev/null
+  if [ -e "$TF_DIR" ]; then
+    echo "Enter $TF_DIR"
+    pushd $TF_DIR > /dev/null
+    FREEZE_GRAPH="bazel run tensorflow/python/tools:freeze_graph -- "
+  else
+    FREEZE_GRAPH="python -m tensorflow.python.tools.freeze_graph "
+  fi
 
   if [ ! -z $SAVED_MODEL ]; then
-    bazel run tensorflow/python/tools:freeze_graph -- \
+    $FREEZE_GRAPH \
     --input_saved_model_dir="$SAVED_MODEL" \
     --input_binary=True \
     --output_node_names="$OUTPUT" \
     --output_graph="$FROZEN_PATH"
   else
-    bazel run tensorflow/python/tools:freeze_graph -- \
+    $FREEZE_GRAPH \
     --input_meta_graph="$META_GRAPH" \
     --input_checkpoint="$CKPT_PATH" \
     --input_binary=True \
@@ -92,7 +90,9 @@ CUR_DIR=$(pwd)
     --output_graph="$FROZEN_PATH"
   fi
 
-  popd
+  if [ -e "$TF_DIR" ]; then
+    popd
+  fi
 
   echo "OUTPUT FILE : $FROZEN_PATH"
 }
diff --git a/tools/tflkit/summarize_pb.py b/tools/tflkit/summarize_pb.py
index 633804114..bdc6b252c 100644
--- a/tools/tflkit/summarize_pb.py
+++ b/tools/tflkit/summarize_pb.py
@@ -40,7 +40,7 @@ def PrintInput(data):
 
 def PrintOutput(data):
     print("Outputs")
-    sub = re.findall('\((.*?)\)', data)
+    sub = re.findall(r'\((.*?)\)', data)
     for i in sub:
         print('\t' + i)
 
diff --git a/tools/tflkit/tflite_convert.sh b/tools/tflkit/tflite_convert.sh
index 2056797ab..f5b94ede0 100755
--- a/tools/tflkit/tflite_convert.sh
+++ b/tools/tflkit/tflite_convert.sh
@@ -3,15 +3,12 @@
 usage()
 {
   echo "usage : $0"
-  echo "       --info=Information file"
-  echo "       --tensorflow_path=TensorFlow path (Use externals/tensorflow by default)"
-  echo "       --tensorflow_version=TensorFlow version (Must be entered)"
+  echo "       --info=<infroamtion file>"
+  echo "       [ --tensorflow_path=<path> --tensorflow_version=<version> ] (If omitted, the module installed in system will be used by default.)"
 }
 
 SCRIPT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
 
-TF_DIR="${SCRIPT_PATH}/../../externals/tensorflow"
-
 for i in "$@"
 do
   case $i in
@@ -41,15 +38,16 @@ if [ -z "$INFO" ]; then
   usage
   exit 1
 fi
-if [ -z "$TF_DIR" ]; then
-  echo "tensorflow_path is unset or set to the empty string"
-  usage
-  exit 1
-fi
+
 if [ -z "$TF_VERSION" ]; then
-  echo "tensorflow_version is unset or set to the empty string"
-  usage
-  exit 1
+  if [ -z "$TF_DIR" ]; then
+    TF_VERSION=$(python -c 'import tensorflow as tf; print(tf.__version__)')
+    echo "TensorFlow version detected : $TF_VERSION"
+  else
+    echo "tensorflow_version is unset or set to the empty string"
+    usage
+    exit 1
+  fi
 fi
 
 if [ ! -x "$(command -v bazel)" ]; then
@@ -87,8 +85,13 @@ fi
 
 CUR_DIR=$(pwd)
 {
-  echo "Enter $TF_DIR"
-  pushd $TF_DIR > /dev/null
+  if [ -e "$TF_DIR" ]; then
+    echo "Enter $TF_DIR"
+    pushd $TF_DIR > /dev/null
+    TFLITE_CONVERT="bazel run tensorflow/lite/python:tflite_convert -- "
+  else
+    TFLITE_CONVERT="python -m tensorflow.lite.python.tflite_convert "
+  fi
 
   NAME_LIST=()
   INPUT_SHAPE_LIST=()
@@ -111,7 +114,7 @@ CUR_DIR=$(pwd)
 
   for (( i=0; i < ${#NAME_LIST[@]}; ++i )); do
     if [ "${TF_VERSION%%.*}" = "2" ]; then
-      bazel run tensorflow/lite/python:tflite_convert -- \
+      $TFLITE_CONVERT \
       --output_file="${NAME_LIST[$i]}" \
       --graph_def_file="$GRAPHDEF_PATH" \
       --input_arrays="$INPUT" \
@@ -119,7 +122,7 @@ CUR_DIR=$(pwd)
       --output_arrays="$OUTPUT" \
       --allow_custom_ops=true
     else
-      bazel run tensorflow/contrib/lite/python:tflite_convert -- \
+      $TFLITE_CONVERT \
       --output_file="${NAME_LIST[$i]}" \
       --graph_def_file="$GRAPHDEF_PATH" \
       --input_arrays="$INPUT" \
@@ -128,7 +131,10 @@ CUR_DIR=$(pwd)
       --allow_custom_ops
     fi
   done
-  popd
+
+  if [ -e "$TF_DIR" ]; then
+    popd
+  fi
 
   for (( i=0; i < ${#NAME_LIST[@]}; ++i )); do
     echo "OUTPUT FILE : ${NAME_LIST[$i]}"