path: root/src/tdm_exynos_pp.c

/**************************************************************************

libtdm_exynos

Copyright 2015 Samsung Electronics co., Ltd. All Rights Reserved.

Contact: SooChan Lim <sc1.lim@samsung.com>

Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sub license, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:

The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial portions
of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

**************************************************************************/

#ifdef HAVE_CONFIG_H
#include "config.h"
#endif

#include "tdm_backend_exynos.h"

typedef struct _tdm_exynos_pp_data {
	tdm_exynos_display *display_data;

	hal_tdm_info_pp info;

	struct list_head pending_buffer_list;
	struct list_head buffer_list;

	hal_tdm_pp_done_handler done_func;
	void *done_user_data;

	int first_event;

	struct list_head link;
} tdm_exynos_pp_data;

typedef struct _tdm_exynos_pp_buffer {
	tdm_exynos_pp_data *pp_data;
	tbm_surface_h src;
	tbm_surface_h dst;

	struct list_head link;
} tdm_exynos_pp_buffer;


static int pp_list_init;
static struct list_head pp_list;

struct exynos_drm_ipp_std_task {
	struct drm_exynos_ipp_task_buffer buf[2];
	struct drm_exynos_ipp_task_rect rect[2];
	struct drm_exynos_ipp_task_transform transform;
} __packed;

static unsigned int hal_tdm_transform_to_drm(hal_tdm_transform t)
{
	switch (t) {
	case HAL_TDM_TRANSFORM_NORMAL:
		return DRM_MODE_ROTATE_0;
	case HAL_TDM_TRANSFORM_90:
		return DRM_MODE_ROTATE_90;
	case HAL_TDM_TRANSFORM_180:
		return DRM_MODE_ROTATE_180;
	case HAL_TDM_TRANSFORM_270:
		return DRM_MODE_ROTATE_270;
	case HAL_TDM_TRANSFORM_FLIPPED:
		return DRM_MODE_REFLECT_Y;
	case HAL_TDM_TRANSFORM_FLIPPED_90:
		return DRM_MODE_REFLECT_Y | DRM_MODE_ROTATE_90;
	case HAL_TDM_TRANSFORM_FLIPPED_180:
		return DRM_MODE_REFLECT_Y | DRM_MODE_ROTATE_180;
	case HAL_TDM_TRANSFORM_FLIPPED_270:
		return DRM_MODE_REFLECT_Y | DRM_MODE_ROTATE_270;
	}
	return 0;
}

static hal_tdm_error
_tdm_exynos_pp_process(tdm_exynos_pp_data *pp_data, tdm_exynos_pp_buffer *buffer)
{
	tdm_exynos_display *display_data = pp_data->display_data;
	hal_tdm_info_pp *info = &pp_data->info;
	int i, plane_num, ret = 0;

	struct exynos_drm_ipp_std_task task;
	struct drm_exynos_ioctl_ipp_commit arg;

	CLEAR(task);

	/* src buf */
	task.buf[0].id = DRM_EXYNOS_IPP_TASK_BUFFER | DRM_EXYNOS_IPP_TASK_TYPE_SOURCE;
	task.buf[0].fourcc = tdm_exynos_format_to_drm_format(tbm_surface_get_format(buffer->src));
	task.buf[0].width = tbm_surface_get_width(buffer->src);
	task.buf[0].height = tbm_surface_get_height(buffer->src);

	plane_num = tbm_surface_internal_get_num_planes(tbm_surface_get_format(buffer->src));
	for (i = 0; i < EXYNOS_DRM_PLANAR_MAX && i < plane_num; i++) {
		uint32_t size, offset, pitch;
		int bo_index;
		tbm_bo bo;

		bo_index = tbm_surface_internal_get_plane_bo_idx(buffer->src, i);
		bo = tbm_surface_internal_get_bo(buffer->src, bo_index);

		tbm_surface_internal_get_plane_data(buffer->src, i, &size, &offset, &pitch);
		task.buf[0].gem_id[i] = tbm_bo_get_handle(bo, TBM_DEVICE_DEFAULT).u32;
		task.buf[0].pitch[i] = pitch;
		task.buf[0].offset[i] = offset;
	}

	/* dst buf */
	task.buf[1].id = DRM_EXYNOS_IPP_TASK_BUFFER | DRM_EXYNOS_IPP_TASK_TYPE_DESTINATION;
	task.buf[1].fourcc = tdm_exynos_format_to_drm_format(tbm_surface_get_format(buffer->dst));
	task.buf[1].width = tbm_surface_get_width(buffer->dst);
	task.buf[1].height = tbm_surface_get_height(buffer->dst);

	plane_num = tbm_surface_internal_get_num_planes(tbm_surface_get_format(buffer->dst));
	for (i = 0; i < EXYNOS_DRM_PLANAR_MAX && i < plane_num; i++) {
		uint32_t size, offset, pitch;
		int bo_index;
		tbm_bo bo;

		bo_index = tbm_surface_internal_get_plane_bo_idx(buffer->dst, i);
		bo = tbm_surface_internal_get_bo(buffer->dst, bo_index);

		tbm_surface_internal_get_plane_data(buffer->dst, i, &size, &offset, &pitch);
		task.buf[1].gem_id[i] = tbm_bo_get_handle(bo, TBM_DEVICE_DEFAULT).u32;
		task.buf[1].pitch[i] = pitch;
		task.buf[1].offset[i] = offset;
	}

	task.rect[0].id = DRM_EXYNOS_IPP_TASK_RECTANGLE | DRM_EXYNOS_IPP_TASK_TYPE_SOURCE;
	task.rect[0].x = info->src_config.pos.x;
	task.rect[0].y = info->src_config.pos.y;
	task.rect[0].w = info->src_config.pos.w;
	task.rect[0].h = info->src_config.pos.h;

	task.rect[1].id = DRM_EXYNOS_IPP_TASK_RECTANGLE | DRM_EXYNOS_IPP_TASK_TYPE_DESTINATION;
	task.rect[1].x = info->dst_config.pos.x;
	task.rect[1].y = info->dst_config.pos.y;
	task.rect[1].w = info->dst_config.pos.w;
	task.rect[1].h = info->dst_config.pos.h;

	task.transform.id = DRM_EXYNOS_IPP_TASK_TRANSFORM;
	task.transform.rotation = hal_tdm_transform_to_drm(info->transform);

	CLEAR(arg);
	arg.flags = DRM_EXYNOS_IPP_FLAG_EVENT | DRM_EXYNOS_IPP_FLAG_NONBLOCK;
	arg.ipp_id = display_data->ipp_module_id;
	arg.params_size = sizeof(task);
	arg.params_ptr = (unsigned long)(&task);
	arg.user_data = (__u64)(uintptr_t)buffer;

	ret = ioctl(display_data->drm_fd, DRM_IOCTL_EXYNOS_IPP_COMMIT, &arg);
	if (ret) {
		TDM_BACKEND_ERR("ipp commit failed. %xx pp_data(%p), buffer(%p). %m", DRM_IOCTL_EXYNOS_IPP_COMMIT, pp_data, buffer);
		return HAL_TDM_ERROR_OPERATION_FAILED;
	}

	return HAL_TDM_ERROR_NONE;
}

void
tdm_exynos_pp_handler(unsigned int tv_sec, unsigned int tv_usec, void *data)
{
	tdm_exynos_pp_buffer *b = NULL, *bb, *dequeued_buffer = data;
	tdm_exynos_pp_data *pp_data;

	if (!dequeued_buffer) {
		TDM_BACKEND_ERR("invalid params");
		return;
	}

	if (!pp_list_init)
		return;

	pp_data = dequeued_buffer->pp_data;

	TDM_BACKEND_DBG("pp_data(%p) buffer(%p)", pp_data, dequeued_buffer);

	LIST_FOR_EACH_ENTRY_SAFE(b, bb, &pp_data->buffer_list, link) {
		if (b == dequeued_buffer) {
			LIST_DEL(&dequeued_buffer->link);
			TDM_BACKEND_DBG("dequeued: %p", dequeued_buffer);
			break;
		}
	}

	if (!pp_data->first_event) {
		TDM_BACKEND_DBG("pp(%p) got a first event. ", pp_data);
		pp_data->first_event = 1;
	}

	if (pp_data->done_func)
		pp_data->done_func(pp_data,
				   dequeued_buffer->src,
				   dequeued_buffer->dst,
				   pp_data->done_user_data);
	free(dequeued_buffer);
}

static enum drm_exynos_ipp_capability required_exynos_ipp_caps =
	DRM_EXYNOS_IPP_CAP_CROP | DRM_EXYNOS_IPP_CAP_ROTATE |
	DRM_EXYNOS_IPP_CAP_SCALE | DRM_EXYNOS_IPP_CAP_CONVERT;

hal_tdm_error
tdm_exynos_pp_init(tdm_exynos_display *display_data)
{
	struct drm_exynos_ioctl_ipp_get_caps caps_arg;
	struct drm_exynos_ioctl_ipp_get_res res_arg;
	uint32_t *ipps;
	int i;

	display_data->ipp_module_id = -1;

	CLEAR(res_arg);
	if (ioctl(display_data->drm_fd, DRM_IOCTL_EXYNOS_IPP_GET_RESOURCES,
		  &res_arg)) {
		TDM_BACKEND_ERR("failed to get Exynos IPP resources");
		return HAL_TDM_ERROR_NO_CAPABILITY;
	}

	ipps = calloc(res_arg.count_ipps, sizeof(*ipps));
	if (!ipps) {
		TDM_BACKEND_ERR("alloc failed");
		return HAL_TDM_ERROR_OUT_OF_MEMORY;
	}

	res_arg.ipp_id_ptr = (unsigned long)ipps;
	if (ioctl(display_data->drm_fd, DRM_IOCTL_EXYNOS_IPP_GET_RESOURCES,
		  &res_arg)) {
		TDM_BACKEND_ERR("failed to get Exynos IPP resources");
		free(ipps);
		return HAL_TDM_ERROR_NO_CAPABILITY;
	}

	for (i = 0; i < res_arg.count_ipps; i++) {
		CLEAR(caps_arg);
		caps_arg.ipp_id = ipps[i];
		if (ioctl(display_data->drm_fd, DRM_IOCTL_EXYNOS_IPP_GET_CAPS,
		  &caps_arg)) {
			TDM_BACKEND_ERR("failed to get IPP capabilities");
			free(ipps);
			return HAL_TDM_ERROR_NO_CAPABILITY;
		}
		if ((caps_arg.capabilities & required_exynos_ipp_caps) ==
		    required_exynos_ipp_caps)
			break;
	}
	if (i == res_arg.count_ipps) {
		free(ipps);
		return HAL_TDM_ERROR_NO_CAPABILITY;
	}

	TDM_BACKEND_INFO("selected Exynos IPP module id %d", ipps[i]);
	display_data->ipp_module_id = ipps[i];
	free(ipps);

	return HAL_TDM_ERROR_NONE;
}

hal_tdm_error
tdm_exynos_pp_get_capability(tdm_exynos_display *display_data, hal_tdm_caps_pp *caps)
{
	struct drm_exynos_ioctl_ipp_get_caps caps_arg;
	struct drm_exynos_ipp_format *formats;
	int i, pp_formats;

	if (!caps) {
		TDM_BACKEND_ERR("invalid params");
		return HAL_TDM_ERROR_INVALID_PARAMETER;
	}

	CLEAR(caps_arg);
	caps_arg.ipp_id = display_data->ipp_module_id;
	if (ioctl(display_data->drm_fd, DRM_IOCTL_EXYNOS_IPP_GET_CAPS,
		  &caps_arg)) {
		TDM_BACKEND_ERR("failed to get IPP capabilities");
		return HAL_TDM_ERROR_NO_CAPABILITY;
	}

	formats = calloc(caps_arg.formats_count, sizeof(*formats));
	if (!formats) {
		TDM_BACKEND_ERR("alloc failed");
		return HAL_TDM_ERROR_OUT_OF_MEMORY;
	}

	caps_arg.formats_ptr = (unsigned long) formats;
	if (ioctl(display_data->drm_fd, DRM_IOCTL_EXYNOS_IPP_GET_CAPS,
		  &caps_arg)) {
		TDM_BACKEND_ERR("failed to get IPP capabilities");
		free(formats);
		return HAL_TDM_ERROR_NO_CAPABILITY;
	}

	for (pp_formats = 0, i = 0; i < caps_arg.formats_count; i++)
		if (formats[i].modifier == 0 &&
		    tdm_exynos_format_to_tbm_format(formats[i].fourcc))
			pp_formats++;

	caps->capabilities = HAL_TDM_PP_CAPABILITY_ASYNC;
	caps->format_count = pp_formats;

	/* will be freed in frontend */
	caps->formats = calloc(pp_formats, sizeof(tbm_format));
	if (!caps->formats) {
		TDM_BACKEND_ERR("alloc failed");
		free(formats);
		return HAL_TDM_ERROR_OUT_OF_MEMORY;
	}

	for (pp_formats = 0, i = 0; i < caps_arg.formats_count; i++) {
		tbm_format f;
		f = tdm_exynos_format_to_tbm_format(formats[i].fourcc);
		if (formats[i].modifier == 0 && f)
			caps->formats[pp_formats++] = f;
	}

	caps->min_w = 16;
	caps->min_h = 8;
	caps->max_w = -1;   /* not defined */
	caps->max_h = -1;
	caps->preferred_align = 16;

	caps->max_attach_count = -1;

	free(formats);

	return HAL_TDM_ERROR_NONE;
}

hal_tdm_pp *
tdm_exynos_pp_create(tdm_exynos_display *display_data, hal_tdm_error *error)
{
	tdm_exynos_pp_data *pp_data = calloc(1, sizeof(tdm_exynos_pp_data));
	if (!pp_data) {
		TDM_BACKEND_ERR("alloc failed");
		if (error)
			*error = HAL_TDM_ERROR_OUT_OF_MEMORY;
		return NULL;
	}

	pp_data->display_data = display_data;

	LIST_INITHEAD(&pp_data->pending_buffer_list);
	LIST_INITHEAD(&pp_data->buffer_list);

	if (!pp_list_init) {
		pp_list_init = 1;
		LIST_INITHEAD(&pp_list);
	}
	LIST_ADDTAIL(&pp_data->link, &pp_list);

	return pp_data;
}

void
exynos_pp_destroy(hal_tdm_pp *pp)
{
	tdm_exynos_pp_data *pp_data = pp;
	tdm_exynos_pp_buffer *b = NULL, *bb = NULL;

	if (!pp_data)
		return;

	LIST_FOR_EACH_ENTRY_SAFE(b, bb, &pp_data->pending_buffer_list, link) {
		LIST_DEL(&b->link);
		free(b);
	}
	LIST_DEL(&pp_data->link);

	free(pp_data);
}

hal_tdm_error
exynos_pp_set_info(hal_tdm_pp *pp, hal_tdm_info_pp *info)
{
	tdm_exynos_pp_data *pp_data = pp;

	TDM_BACKEND_RETURN_VAL_IF_FAIL(pp_data, HAL_TDM_ERROR_INVALID_PARAMETER);
	TDM_BACKEND_RETURN_VAL_IF_FAIL(info, HAL_TDM_ERROR_INVALID_PARAMETER);

	if (info->sync) {
		TDM_BACKEND_ERR("not support sync mode currently");
		return HAL_TDM_ERROR_INVALID_PARAMETER;
	}

	pp_data->info = *info;

	return HAL_TDM_ERROR_NONE;
}

hal_tdm_error
exynos_pp_attach(hal_tdm_pp *pp, tbm_surface_h src, tbm_surface_h dst)
{
	tdm_exynos_pp_data *pp_data = pp;
	tdm_exynos_pp_buffer *buffer;

	TDM_BACKEND_RETURN_VAL_IF_FAIL(pp_data, HAL_TDM_ERROR_INVALID_PARAMETER);
	TDM_BACKEND_RETURN_VAL_IF_FAIL(src, HAL_TDM_ERROR_INVALID_PARAMETER);
	TDM_BACKEND_RETURN_VAL_IF_FAIL(dst, HAL_TDM_ERROR_INVALID_PARAMETER);

	buffer = calloc(1, sizeof(tdm_exynos_pp_buffer));
	if (!buffer) {
		TDM_BACKEND_ERR("alloc failed");
		return HAL_TDM_ERROR_NONE;
	}

	LIST_ADDTAIL(&buffer->link, &pp_data->pending_buffer_list);
	buffer->src = src;
	buffer->dst = dst;
	buffer->pp_data = pp_data;

	return HAL_TDM_ERROR_NONE;
}

hal_tdm_error
exynos_pp_commit(hal_tdm_pp *pp)
{
	tdm_exynos_pp_data *pp_data = pp;
	tdm_exynos_pp_buffer *b = NULL, *bb = NULL;

	TDM_BACKEND_RETURN_VAL_IF_FAIL(pp_data, HAL_TDM_ERROR_INVALID_PARAMETER);

	LIST_FOR_EACH_ENTRY_SAFE(b, bb, &pp_data->pending_buffer_list, link) {
		LIST_DEL(&b->link);
		_tdm_exynos_pp_process(pp_data, b);
		LIST_ADDTAIL(&b->link, &pp_data->buffer_list);
	}

	return HAL_TDM_ERROR_NONE;
}

hal_tdm_error
exynos_pp_set_done_handler(hal_tdm_pp *pp, hal_tdm_pp_done_handler func,
								  void *user_data)
{
	tdm_exynos_pp_data *pp_data = pp;

	TDM_BACKEND_RETURN_VAL_IF_FAIL(pp_data, HAL_TDM_ERROR_INVALID_PARAMETER);
	TDM_BACKEND_RETURN_VAL_IF_FAIL(func, HAL_TDM_ERROR_INVALID_PARAMETER);

	pp_data->done_func = func;
	pp_data->done_user_data = user_data;

	return HAL_TDM_ERROR_NONE;
}